diff --git a/.cproject b/.cproject
new file mode 100644
index 0000000..73044d8
--- /dev/null
+++ b/.cproject
@@ -0,0 +1,218 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1194477200">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1194477200" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1194477200" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1194477200." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.2146901235" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.632711562" name="Internal Toolchain Type" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.799723134" name="Internal Toolchain Version" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" useByScannerDiscovery="false" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.37601034" name="Mcu" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32F746NGHx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.39577679" name="CpuId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1488223185" name="CpuCoreId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1791474244" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv5-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.487263327" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.890470160" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="STM32F746G-DISCO" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1958805466" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32F746G-DISCO || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Middlewares/Third_Party/FreeRTOS/Source/include | ../Middlewares/Third_Party/LwIP/src/include/netif/ppp | ../Middlewares/Third_Party/LwIP/src/include/lwip/priv | ../Drivers/CMSIS/Device/ST/STM32F7xx/Include | ../Middlewares/Third_Party/LwIP/src/include/compat/stdc | ../Drivers/STM32F7xx_HAL_Driver/Inc | ../Middlewares/Third_Party/LwIP/src/include/lwip/prot | ../Middlewares/Third_Party/LwIP/src/include/lwip/apps | ../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys | ../Middlewares/Third_Party/LwIP/system/arch | ../Middlewares/Third_Party/LwIP/src/include | ../LWIP/App | ../Middlewares/Third_Party/LwIP/src/include/compat/posix | ../Drivers/CMSIS/Include | ../Core/Inc | ../LWIP/Target | ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 | ../Middlewares/Third_Party/LwIP/src/include/lwip | ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../Middlewares/Third_Party/LwIP/src/include/compat/posix/net | ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy | ../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa | ../Middlewares/Third_Party/LwIP/system | ../Middlewares/Third_Party/LwIP/src/include/netif ||  ||  || USE_HAL_DRIVER | STM32F746xx ||  || LWIP | Drivers | Core/Startup | Middlewares | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32F746NGHX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.799155872" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/Space_Invaders}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1783868624" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.780926285" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1560670408" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.761529350" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1274419264" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.377935607" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1038594092" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1238047193" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32F746xx"/>
+									<listOptionValue builtIn="false" value="DEBUG"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1377347807" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
+									<listOptionValue builtIn="false" value="../Core/Inc"/>
+									<listOptionValue builtIn="false" value="../LWIP/App"/>
+									<listOptionValue builtIn="false" value="../LWIP/Target"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/system"/>
+									<listOptionValue builtIn="false" value="../Drivers/STM32F7xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/netif/ppp"/>
+									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32F7xx/Include"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/lwip"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/lwip/apps"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/lwip/priv"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/lwip/prot"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/netif"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/compat/posix"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/compat/posix/net"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/compat/stdc"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/system/arch"/>
+									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.87817352" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1343168346" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.669348639" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.976677396" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.878209151" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.319498274" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32F746NGHX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.444395353" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.19594521" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.778617986" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.553053911" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1200138922" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.159952973" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.882795509" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1848411153" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1939191649" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.2135018173" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="LWIP"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.828754881">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.828754881" moduleId="org.eclipse.cdt.core.settings" name="Release">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.828754881" name="Release" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.828754881." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release.1476035035" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release">
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1096866949" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.317639583" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" useByScannerDiscovery="false" value="7-2018-q2-update" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.801306204" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32F746NGHx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.520410938" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.416217756" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1522127733" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv5-sp-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.545091261" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.607595520" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="STM32F746G-DISCO" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.558315874" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32F746G-DISCO || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Middlewares/Third_Party/FreeRTOS/Source/include | ../Middlewares/Third_Party/LwIP/src/include/netif/ppp | ../Middlewares/Third_Party/LwIP/src/include/lwip/priv | ../Drivers/CMSIS/Device/ST/STM32F7xx/Include | ../Middlewares/Third_Party/LwIP/src/include/compat/stdc | ../Drivers/STM32F7xx_HAL_Driver/Inc | ../Middlewares/Third_Party/LwIP/src/include/lwip/prot | ../Middlewares/Third_Party/LwIP/src/include/lwip/apps | ../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys | ../Middlewares/Third_Party/LwIP/system/arch | ../Middlewares/Third_Party/LwIP/src/include | ../LWIP/App | ../Middlewares/Third_Party/LwIP/src/include/compat/posix | ../Drivers/CMSIS/Include | ../Core/Inc | ../LWIP/Target | ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 | ../Middlewares/Third_Party/LwIP/src/include/lwip | ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../Middlewares/Third_Party/LwIP/src/include/compat/posix/net | ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy | ../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa | ../Middlewares/Third_Party/LwIP/system | ../Middlewares/Third_Party/LwIP/src/include/netif ||  ||  || USE_HAL_DRIVER | STM32F746xx ||  || LWIP | Drivers | Core/Startup | Middlewares | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32F746NGHX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1795884258" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/Space_Invaders}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1804714813" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.2132570717" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1766521218" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.2107618315" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.799177914" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1144516799" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.541366423" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.784157414" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32F746xx"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.1652885433" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
+									<listOptionValue builtIn="false" value="../Core/Inc"/>
+									<listOptionValue builtIn="false" value="../LWIP/App"/>
+									<listOptionValue builtIn="false" value="../LWIP/Target"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/system"/>
+									<listOptionValue builtIn="false" value="../Drivers/STM32F7xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/include"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/netif/ppp"/>
+									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32F7xx/Include"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/lwip"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/lwip/apps"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/lwip/priv"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/lwip/prot"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/netif"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/compat/posix"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/compat/posix/net"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/src/include/compat/stdc"/>
+									<listOptionValue builtIn="false" value="../Middlewares/Third_Party/LwIP/system/arch"/>
+									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.191975477" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1378547770" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.2054590607" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.97137371" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.865418901" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1403345380" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32F746NGHX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1781370890" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.172243805" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.989435073" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.2086610503" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.303714380" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.2058501123" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.495178777" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1576641902" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.508915103" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.405524966" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="LWIP"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+	<storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="Space_Invaders.null.1972844263" name="Space_Invaders"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.828754881;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.828754881.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.799177914;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.191975477">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1194477200;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1194477200.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1274419264;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.87817352">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+</cproject>
diff --git a/.mxproject b/.mxproject
new file mode 100644
index 0000000..5161ed6
--- /dev/null
+++ b/.mxproject
@@ -0,0 +1,37 @@
+[PreviousLibFiles]
+LibFiles=Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dsi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h;Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h;Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h;Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h;Middlewares/Third_Party/FreeRTOS/Source/include/list.h;Middlewares/Third_Party/FreeRTOS/Source/include/message_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h;Middlewares/Third_Party/FreeRTOS/Source/include/portable.h;Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h;Middlewares/Third_Party/FreeRTOS/Source/include/queue.h;Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h;Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h;Middlewares/Third_Party/FreeRTOS/Source/include/StackMacros.h;Middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/task.h;Middlewares/Third_Party/FreeRTOS/Source/include/timers.h;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ccp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/chap_ms.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/chap-md5.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/chap-new.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/eap.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/eui64.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/fsm.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ipcp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ipv6cp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/lcp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/magic.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/mppe.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_impl.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppapi.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppcrypt.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppdebug.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppoe.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppol2tp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppos.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/upap.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/vj.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ecp.h;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c;Middlewares/Third_Party/LwIP/src/netif/ppp/auth.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.c;Middlewares/Third_Party/LwIP/src/netif/ppp/demand.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.c;Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/magic.c;Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.c;Middlewares/Third_Party/LwIP/src/netif/ppp/upap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/utils.c;Middlewares/Third_Party/LwIP/src/netif/ppp/vj.c;Middlewares/Third_Party/LwIP/src/netif/bridgeif.c;Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.c;Middlewares/Third_Party/LwIP/src/netif/ethernet.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.c;Middlewares/Third_Party/LwIP/src/netif/slipif.c;Middlewares/Third_Party/LwIP/src/netif/zepif.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.c;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dsi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h;Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h;Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h;Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h;Middlewares/Third_Party/FreeRTOS/Source/include/list.h;Middlewares/Third_Party/FreeRTOS/Source/include/message_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h;Middlewares/Third_Party/FreeRTOS/Source/include/portable.h;Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h;Middlewares/Third_Party/FreeRTOS/Source/include/queue.h;Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h;Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h;Middlewares/Third_Party/FreeRTOS/Source/include/StackMacros.h;Middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/task.h;Middlewares/Third_Party/FreeRTOS/Source/include/timers.h;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ccp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/chap_ms.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/chap-md5.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/chap-new.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/eap.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/eui64.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/fsm.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ipcp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ipv6cp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/lcp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/magic.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/mppe.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_impl.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppapi.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppcrypt.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppdebug.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppoe.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppol2tp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppos.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/upap.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/vj.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ecp.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Middlewares/Third_Party/LwIP/src/include/lwip/altcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/altcp_tcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/altcp_tls.h;Middlewares/Third_Party/LwIP/src/include/lwip/api.h;Middlewares/Third_Party/LwIP/src/include/lwip/arch.h;Middlewares/Third_Party/LwIP/src/include/lwip/autoip.h;Middlewares/Third_Party/LwIP/src/include/lwip/debug.h;Middlewares/Third_Party/LwIP/src/include/lwip/def.h;Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/dhcp6.h;Middlewares/Third_Party/LwIP/src/include/lwip/dns.h;Middlewares/Third_Party/LwIP/src/include/lwip/err.h;Middlewares/Third_Party/LwIP/src/include/lwip/errno.h;Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h;Middlewares/Third_Party/LwIP/src/include/lwip/ethip6.h;Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/icmp6.h;Middlewares/Third_Party/LwIP/src/include/lwip/if_api.h;Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/inet.h;Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h;Middlewares/Third_Party/LwIP/src/include/lwip/init.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip4_frag.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip6_frag.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip6_zone.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h;Middlewares/Third_Party/LwIP/src/include/lwip/mem.h;Middlewares/Third_Party/LwIP/src/include/lwip/memp.h;Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h;Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h;Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h;Middlewares/Third_Party/LwIP/src/include/lwip/netdb.h;Middlewares/Third_Party/LwIP/src/include/lwip/netif.h;Middlewares/Third_Party/LwIP/src/include/lwip/netifapi.h;Middlewares/Third_Party/LwIP/src/include/lwip/opt.h;Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h;Middlewares/Third_Party/LwIP/src/include/lwip/raw.h;Middlewares/Third_Party/LwIP/src/include/lwip/sio.h;Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/sockets.h;Middlewares/Third_Party/LwIP/src/include/lwip/stats.h;Middlewares/Third_Party/LwIP/src/include/lwip/sys.h;Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h;Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h;Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h;Middlewares/Third_Party/LwIP/src/include/lwip/udp.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/altcp_proxyconnect.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/altcp_tls_mbedtls_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/fs.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/httpd.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/httpd_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/http_client.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/lwiperf.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mdns.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mdns_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mdns_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/netbiosns.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/netbiosns_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/smtp.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/smtp_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmpv3.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_core.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_mib2.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_scalar.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_snmpv2_framework.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_snmpv2_usm.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_table.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_threadsync.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/sntp.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/sntp_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/tftp_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/tftp_server.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/altcp_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/api_msg.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/nd6_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/raw_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/sockets_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/autoip.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/dhcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/dhcp6.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/dns.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/iana.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp6.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/igmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip6.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/mld6.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/nd6.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h;Middlewares/Third_Party/LwIP/src/include/netif/bridgeif.h;Middlewares/Third_Party/LwIP/src/include/netif/bridgeif_opts.h;Middlewares/Third_Party/LwIP/src/include/netif/etharp.h;Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h;Middlewares/Third_Party/LwIP/src/include/netif/ieee802154.h;Middlewares/Third_Party/LwIP/src/include/netif/lowpan6.h;Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_ble.h;Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_common.h;Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_opts.h;Middlewares/Third_Party/LwIP/src/include/netif/slipif.h;Middlewares/Third_Party/LwIP/src/include/netif/zepif.h;Middlewares/Third_Party/LwIP/src/include/compat/posix/netdb.h;Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa/inet.h;Middlewares/Third_Party/LwIP/src/include/compat/posix/net/if.h;Middlewares/Third_Party/LwIP/src/include/compat/posix/sys/socket.h;Middlewares/Third_Party/LwIP/src/include/compat/stdc/errno.h;Middlewares/Third_Party/LwIP/system/arch/bpstruct.h;Middlewares/Third_Party/LwIP/system/arch/cc.h;Middlewares/Third_Party/LwIP/system/arch/cpu.h;Middlewares/Third_Party/LwIP/system/arch/epstruct.h;Middlewares/Third_Party/LwIP/system/arch/init.h;Middlewares/Third_Party/LwIP/system/arch/lib.h;Middlewares/Third_Party/LwIP/system/arch/perf.h;Middlewares/Third_Party/LwIP/system/arch/sys_arch.h;Middlewares/Third_Party/LwIP/src/api/api_lib.c;Middlewares/Third_Party/LwIP/src/api/api_msg.c;Middlewares/Third_Party/LwIP/src/api/err.c;Middlewares/Third_Party/LwIP/src/api/if_api.c;Middlewares/Third_Party/LwIP/src/api/netbuf.c;Middlewares/Third_Party/LwIP/src/api/netdb.c;Middlewares/Third_Party/LwIP/src/api/netifapi.c;Middlewares/Third_Party/LwIP/src/api/sockets.c;Middlewares/Third_Party/LwIP/src/api/tcpip.c;Middlewares/Third_Party/LwIP/src/core/altcp.c;Middlewares/Third_Party/LwIP/src/core/altcp_alloc.c;Middlewares/Third_Party/LwIP/src/core/altcp_tcp.c;Middlewares/Third_Party/LwIP/src/core/def.c;Middlewares/Third_Party/LwIP/src/core/dns.c;Middlewares/Third_Party/LwIP/src/core/inet_chksum.c;Middlewares/Third_Party/LwIP/src/core/init.c;Middlewares/Third_Party/LwIP/src/core/ip.c;Middlewares/Third_Party/LwIP/src/core/mem.c;Middlewares/Third_Party/LwIP/src/core/memp.c;Middlewares/Third_Party/LwIP/src/core/netif.c;Middlewares/Third_Party/LwIP/src/core/pbuf.c;Middlewares/Third_Party/LwIP/src/core/raw.c;Middlewares/Third_Party/LwIP/src/core/stats.c;Middlewares/Third_Party/LwIP/src/core/sys.c;Middlewares/Third_Party/LwIP/src/core/tcp.c;Middlewares/Third_Party/LwIP/src/core/tcp_in.c;Middlewares/Third_Party/LwIP/src/core/tcp_out.c;Middlewares/Third_Party/LwIP/src/core/timeouts.c;Middlewares/Third_Party/LwIP/src/core/udp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.c;Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.c;Middlewares/Third_Party/LwIP/system/OS/sys_arch.c;Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.c;Middlewares/Third_Party/LwIP/src/include/lwip/altcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/altcp_tcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/altcp_tls.h;Middlewares/Third_Party/LwIP/src/include/lwip/api.h;Middlewares/Third_Party/LwIP/src/include/lwip/arch.h;Middlewares/Third_Party/LwIP/src/include/lwip/autoip.h;Middlewares/Third_Party/LwIP/src/include/lwip/debug.h;Middlewares/Third_Party/LwIP/src/include/lwip/def.h;Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/dhcp6.h;Middlewares/Third_Party/LwIP/src/include/lwip/dns.h;Middlewares/Third_Party/LwIP/src/include/lwip/err.h;Middlewares/Third_Party/LwIP/src/include/lwip/errno.h;Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h;Middlewares/Third_Party/LwIP/src/include/lwip/ethip6.h;Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/icmp6.h;Middlewares/Third_Party/LwIP/src/include/lwip/if_api.h;Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/inet.h;Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h;Middlewares/Third_Party/LwIP/src/include/lwip/init.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip4_frag.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip6_frag.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip6_zone.h;Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h;Middlewares/Third_Party/LwIP/src/include/lwip/mem.h;Middlewares/Third_Party/LwIP/src/include/lwip/memp.h;Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h;Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h;Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h;Middlewares/Third_Party/LwIP/src/include/lwip/netdb.h;Middlewares/Third_Party/LwIP/src/include/lwip/netif.h;Middlewares/Third_Party/LwIP/src/include/lwip/netifapi.h;Middlewares/Third_Party/LwIP/src/include/lwip/opt.h;Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h;Middlewares/Third_Party/LwIP/src/include/lwip/raw.h;Middlewares/Third_Party/LwIP/src/include/lwip/sio.h;Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/sockets.h;Middlewares/Third_Party/LwIP/src/include/lwip/stats.h;Middlewares/Third_Party/LwIP/src/include/lwip/sys.h;Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h;Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h;Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h;Middlewares/Third_Party/LwIP/src/include/lwip/udp.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/altcp_proxyconnect.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/altcp_tls_mbedtls_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/fs.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/httpd.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/httpd_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/http_client.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/lwiperf.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mdns.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mdns_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mdns_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/netbiosns.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/netbiosns_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/smtp.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/smtp_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmpv3.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_core.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_mib2.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_scalar.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_snmpv2_framework.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_snmpv2_usm.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_table.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/snmp_threadsync.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/sntp.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/sntp_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/tftp_opts.h;Middlewares/Third_Party/LwIP/src/include/lwip/apps/tftp_server.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/altcp_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/api_msg.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/nd6_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/raw_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/sockets_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/autoip.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/dhcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/dhcp6.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/dns.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/iana.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp6.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/igmp.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip6.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/mld6.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/nd6.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h;Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h;Middlewares/Third_Party/LwIP/src/include/netif/bridgeif.h;Middlewares/Third_Party/LwIP/src/include/netif/bridgeif_opts.h;Middlewares/Third_Party/LwIP/src/include/netif/etharp.h;Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h;Middlewares/Third_Party/LwIP/src/include/netif/ieee802154.h;Middlewares/Third_Party/LwIP/src/include/netif/lowpan6.h;Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_ble.h;Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_common.h;Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_opts.h;Middlewares/Third_Party/LwIP/src/include/netif/slipif.h;Middlewares/Third_Party/LwIP/src/include/netif/zepif.h;Middlewares/Third_Party/LwIP/src/include/compat/posix/netdb.h;Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa/inet.h;Middlewares/Third_Party/LwIP/src/include/compat/posix/net/if.h;Middlewares/Third_Party/LwIP/src/include/compat/posix/sys/socket.h;Middlewares/Third_Party/LwIP/src/include/compat/stdc/errno.h;Middlewares/Third_Party/LwIP/system/arch/bpstruct.h;Middlewares/Third_Party/LwIP/system/arch/cc.h;Middlewares/Third_Party/LwIP/system/arch/cpu.h;Middlewares/Third_Party/LwIP/system/arch/epstruct.h;Middlewares/Third_Party/LwIP/system/arch/init.h;Middlewares/Third_Party/LwIP/system/arch/lib.h;Middlewares/Third_Party/LwIP/system/arch/perf.h;Middlewares/Third_Party/LwIP/system/arch/sys_arch.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
+
+[PreviousUsedCubeIDEFiles]
+SourceFiles=Core\Src\main.c;Core\Src\freertos.c;LWIP\App\lwip.c;LWIP\Target\ethernetif.c;Core\Src\stm32f7xx_it.c;Core\Src\stm32f7xx_hal_msp.c;Core\Src\stm32f7xx_hal_timebase_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c;Middlewares/Third_Party/LwIP/src/netif/ppp/auth.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.c;Middlewares/Third_Party/LwIP/src/netif/ppp/demand.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.c;Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/magic.c;Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.c;Middlewares/Third_Party/LwIP/src/netif/ppp/upap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/utils.c;Middlewares/Third_Party/LwIP/src/netif/ppp/vj.c;Middlewares/Third_Party/LwIP/src/netif/bridgeif.c;Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.c;Middlewares/Third_Party/LwIP/src/netif/ethernet.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.c;Middlewares/Third_Party/LwIP/src/netif/slipif.c;Middlewares/Third_Party/LwIP/src/netif/zepif.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.c;Middlewares/Third_Party/LwIP/src/api/api_lib.c;Middlewares/Third_Party/LwIP/src/api/api_msg.c;Middlewares/Third_Party/LwIP/src/api/err.c;Middlewares/Third_Party/LwIP/src/api/if_api.c;Middlewares/Third_Party/LwIP/src/api/netbuf.c;Middlewares/Third_Party/LwIP/src/api/netdb.c;Middlewares/Third_Party/LwIP/src/api/netifapi.c;Middlewares/Third_Party/LwIP/src/api/sockets.c;Middlewares/Third_Party/LwIP/src/api/tcpip.c;Middlewares/Third_Party/LwIP/src/core/altcp.c;Middlewares/Third_Party/LwIP/src/core/altcp_alloc.c;Middlewares/Third_Party/LwIP/src/core/altcp_tcp.c;Middlewares/Third_Party/LwIP/src/core/def.c;Middlewares/Third_Party/LwIP/src/core/dns.c;Middlewares/Third_Party/LwIP/src/core/inet_chksum.c;Middlewares/Third_Party/LwIP/src/core/init.c;Middlewares/Third_Party/LwIP/src/core/ip.c;Middlewares/Third_Party/LwIP/src/core/mem.c;Middlewares/Third_Party/LwIP/src/core/memp.c;Middlewares/Third_Party/LwIP/src/core/netif.c;Middlewares/Third_Party/LwIP/src/core/pbuf.c;Middlewares/Third_Party/LwIP/src/core/raw.c;Middlewares/Third_Party/LwIP/src/core/stats.c;Middlewares/Third_Party/LwIP/src/core/sys.c;Middlewares/Third_Party/LwIP/src/core/tcp.c;Middlewares/Third_Party/LwIP/src/core/tcp_in.c;Middlewares/Third_Party/LwIP/src/core/tcp_out.c;Middlewares/Third_Party/LwIP/src/core/timeouts.c;Middlewares/Third_Party/LwIP/src/core/udp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.c;Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.c;Middlewares/Third_Party/LwIP/system/OS/sys_arch.c;Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.c;Core\Src/system_stm32f7xx.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c;Middlewares/Third_Party/LwIP/src/netif/ppp/auth.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.c;Middlewares/Third_Party/LwIP/src/netif/ppp/demand.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.c;Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/magic.c;Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.c;Middlewares/Third_Party/LwIP/src/netif/ppp/upap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/utils.c;Middlewares/Third_Party/LwIP/src/netif/ppp/vj.c;Middlewares/Third_Party/LwIP/src/netif/bridgeif.c;Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.c;Middlewares/Third_Party/LwIP/src/netif/ethernet.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.c;Middlewares/Third_Party/LwIP/src/netif/slipif.c;Middlewares/Third_Party/LwIP/src/netif/zepif.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.c;Middlewares/Third_Party/LwIP/src/api/api_lib.c;Middlewares/Third_Party/LwIP/src/api/api_msg.c;Middlewares/Third_Party/LwIP/src/api/err.c;Middlewares/Third_Party/LwIP/src/api/if_api.c;Middlewares/Third_Party/LwIP/src/api/netbuf.c;Middlewares/Third_Party/LwIP/src/api/netdb.c;Middlewares/Third_Party/LwIP/src/api/netifapi.c;Middlewares/Third_Party/LwIP/src/api/sockets.c;Middlewares/Third_Party/LwIP/src/api/tcpip.c;Middlewares/Third_Party/LwIP/src/core/altcp.c;Middlewares/Third_Party/LwIP/src/core/altcp_alloc.c;Middlewares/Third_Party/LwIP/src/core/altcp_tcp.c;Middlewares/Third_Party/LwIP/src/core/def.c;Middlewares/Third_Party/LwIP/src/core/dns.c;Middlewares/Third_Party/LwIP/src/core/inet_chksum.c;Middlewares/Third_Party/LwIP/src/core/init.c;Middlewares/Third_Party/LwIP/src/core/ip.c;Middlewares/Third_Party/LwIP/src/core/mem.c;Middlewares/Third_Party/LwIP/src/core/memp.c;Middlewares/Third_Party/LwIP/src/core/netif.c;Middlewares/Third_Party/LwIP/src/core/pbuf.c;Middlewares/Third_Party/LwIP/src/core/raw.c;Middlewares/Third_Party/LwIP/src/core/stats.c;Middlewares/Third_Party/LwIP/src/core/sys.c;Middlewares/Third_Party/LwIP/src/core/tcp.c;Middlewares/Third_Party/LwIP/src/core/tcp_in.c;Middlewares/Third_Party/LwIP/src/core/tcp_out.c;Middlewares/Third_Party/LwIP/src/core/timeouts.c;Middlewares/Third_Party/LwIP/src/core/udp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.c;Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.c;Middlewares/Third_Party/LwIP/system/OS/sys_arch.c;Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.c;Core\Src/system_stm32f7xx.c;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c;Middlewares/Third_Party/LwIP/src/netif/ppp/auth.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.c;Middlewares/Third_Party/LwIP/src/netif/ppp/demand.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.c;Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/magic.c;Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.c;Middlewares/Third_Party/LwIP/src/netif/ppp/upap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/utils.c;Middlewares/Third_Party/LwIP/src/netif/ppp/vj.c;Middlewares/Third_Party/LwIP/src/netif/bridgeif.c;Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.c;Middlewares/Third_Party/LwIP/src/netif/ethernet.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.c;Middlewares/Third_Party/LwIP/src/netif/slipif.c;Middlewares/Third_Party/LwIP/src/netif/zepif.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.c;Middlewares/Third_Party/LwIP/src/api/api_lib.c;Middlewares/Third_Party/LwIP/src/api/api_msg.c;Middlewares/Third_Party/LwIP/src/api/err.c;Middlewares/Third_Party/LwIP/src/api/if_api.c;Middlewares/Third_Party/LwIP/src/api/netbuf.c;Middlewares/Third_Party/LwIP/src/api/netdb.c;Middlewares/Third_Party/LwIP/src/api/netifapi.c;Middlewares/Third_Party/LwIP/src/api/sockets.c;Middlewares/Third_Party/LwIP/src/api/tcpip.c;Middlewares/Third_Party/LwIP/src/core/altcp.c;Middlewares/Third_Party/LwIP/src/core/altcp_alloc.c;Middlewares/Third_Party/LwIP/src/core/altcp_tcp.c;Middlewares/Third_Party/LwIP/src/core/def.c;Middlewares/Third_Party/LwIP/src/core/dns.c;Middlewares/Third_Party/LwIP/src/core/inet_chksum.c;Middlewares/Third_Party/LwIP/src/core/init.c;Middlewares/Third_Party/LwIP/src/core/ip.c;Middlewares/Third_Party/LwIP/src/core/mem.c;Middlewares/Third_Party/LwIP/src/core/memp.c;Middlewares/Third_Party/LwIP/src/core/netif.c;Middlewares/Third_Party/LwIP/src/core/pbuf.c;Middlewares/Third_Party/LwIP/src/core/raw.c;Middlewares/Third_Party/LwIP/src/core/stats.c;Middlewares/Third_Party/LwIP/src/core/sys.c;Middlewares/Third_Party/LwIP/src/core/tcp.c;Middlewares/Third_Party/LwIP/src/core/tcp_in.c;Middlewares/Third_Party/LwIP/src/core/tcp_out.c;Middlewares/Third_Party/LwIP/src/core/timeouts.c;Middlewares/Third_Party/LwIP/src/core/udp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.c;Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.c;Middlewares/Third_Party/LwIP/system/OS/sys_arch.c;Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.c;
+HeaderPath=Middlewares\Third_Party\LwIP\src\include;Middlewares\Third_Party\LwIP\system;Middlewares\Third_Party\LwIP\src\include;Middlewares\Third_Party\LwIP\system;Drivers\STM32F7xx_HAL_Driver\Inc;Drivers\STM32F7xx_HAL_Driver\Inc\Legacy;Middlewares\Third_Party\FreeRTOS\Source\include;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM7\r0p1;Middlewares\Third_Party\LwIP\src\include\netif\ppp;Drivers\CMSIS\Device\ST\STM32F7xx\Include;Middlewares\Third_Party\LwIP\src\include\lwip;Middlewares\Third_Party\LwIP\src\include\lwip\apps;Middlewares\Third_Party\LwIP\src\include\lwip\priv;Middlewares\Third_Party\LwIP\src\include\lwip\prot;Middlewares\Third_Party\LwIP\src\include\netif;Middlewares\Third_Party\LwIP\src\include\compat\posix;Middlewares\Third_Party\LwIP\src\include\compat\posix\arpa;Middlewares\Third_Party\LwIP\src\include\compat\posix\net;Middlewares\Third_Party\LwIP\src\include\compat\posix\sys;Middlewares\Third_Party\LwIP\src\include\compat\stdc;Middlewares\Third_Party\LwIP\system\arch;Drivers\CMSIS\Include;Core\Inc;LWIP\App;LWIP\Target;
+CDefines=USE_HAL_DRIVER;STM32F746xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
+[PreviousGenFiles]
+AdvancedFolderStructure=true
+HeaderFileListSize=7
+HeaderFiles#0=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/Core/Inc/FreeRTOSConfig.h
+HeaderFiles#1=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/LWIP/App/lwip.h
+HeaderFiles#2=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/LWIP/Target/lwipopts.h
+HeaderFiles#3=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/LWIP/Target/ethernetif.h
+HeaderFiles#4=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/Core/Inc/stm32f7xx_it.h
+HeaderFiles#5=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/Core/Inc/stm32f7xx_hal_conf.h
+HeaderFiles#6=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/Core/Inc/main.h
+HeaderFolderListSize=3
+HeaderPath#0=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/Core/Inc
+HeaderPath#1=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/LWIP/App
+HeaderPath#2=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/LWIP/Target
+HeaderFiles=;
+SourceFileListSize=7
+SourceFiles#0=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/Core/Src/freertos.c
+SourceFiles#1=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/LWIP/App/lwip.c
+SourceFiles#2=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/LWIP/Target/ethernetif.c
+SourceFiles#3=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/Core/Src/stm32f7xx_it.c
+SourceFiles#4=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/Core/Src/stm32f7xx_hal_msp.c
+SourceFiles#5=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/Core/Src/stm32f7xx_hal_timebase_tim.c
+SourceFiles#6=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/Core/Src/main.c
+SourceFolderListSize=3
+SourcePath#0=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/Core/Src
+SourcePath#1=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/LWIP/App
+SourcePath#2=C:/Users/thoma/Desktop/Scolaire/info_indus_s2/Projet/Space_Invaders/LWIP/Target
+SourceFiles=;
+
diff --git a/.project b/.project
new file mode 100644
index 0000000..cd2c15a
--- /dev/null
+++ b/.project
@@ -0,0 +1,33 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>Space_Invaders</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+</projectDescription>
diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml
new file mode 100644
index 0000000..c3bae7c
--- /dev/null
+++ b/.settings/language.settings.xml
@@ -0,0 +1,27 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project>
+	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1194477200" name="Debug">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1404850310802429698" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.828754881" name="Release">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1404850310802429698" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+</project>
diff --git a/.settings/stm32cubeide.project.prefs b/.settings/stm32cubeide.project.prefs
new file mode 100644
index 0000000..ae4574a
--- /dev/null
+++ b/.settings/stm32cubeide.project.prefs
@@ -0,0 +1,4 @@
+635E684B79701B039C64EA45C3F84D30=CA3D7F5B74D23BB249A63D9AEFB759CA
+8DF89ED150041C4CBC7CB9A9CAA90856=97BE6964F306799AFB7A9F5FF625EF7F
+DC22A860405A8BF2F2C095E5B6529F12=97BE6964F306799AFB7A9F5FF625EF7F
+eclipse.preferences.version=1
diff --git a/Core/Inc/FreeRTOSConfig.h b/Core/Inc/FreeRTOSConfig.h
index 9331ae5..70df7bf 100644
--- a/Core/Inc/FreeRTOSConfig.h
+++ b/Core/Inc/FreeRTOSConfig.h
@@ -92,7 +92,7 @@ to exclude the API function. */
 #define INCLUDE_vTaskDelete                  1
 #define INCLUDE_vTaskCleanUpResources        0
 #define INCLUDE_vTaskSuspend                 1
-#define INCLUDE_vTaskDelayUntil              0
+#define INCLUDE_vTaskDelayUntil              1
 #define INCLUDE_vTaskDelay                   1
 #define INCLUDE_xTaskGetSchedulerState       1
 
diff --git a/Core/Inc/main.h b/Core/Inc/main.h
index 5b92fd6..758a1ae 100644
--- a/Core/Inc/main.h
+++ b/Core/Inc/main.h
@@ -216,6 +216,9 @@ void Error_Handler(void);
 #define ULPI_D4_GPIO_Port GPIOB
 /* USER CODE BEGIN Private defines */
 
+
+
+
 /* USER CODE END Private defines */
 
 #ifdef __cplusplus
diff --git a/Core/Src/main.c b/Core/Src/main.c
index ef2fa4a..0defa9f 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -83,6 +83,11 @@ osThreadId GameMasterHandle;
 osThreadId Joueur_1Handle;
 osThreadId Block_EnemieHandle;
 osThreadId ProjectileHandle;
+osMessageQId Queue_EHandle;
+osMessageQId Queue_FHandle;
+osMessageQId Queue_JHandle;
+osMessageQId Queue_PHandle;
+osMessageQId Queue_NHandle;
 /* USER CODE BEGIN PV */
 
 /* USER CODE END PV */
@@ -117,11 +122,39 @@ void f_projectile(void const * argument);
 
 /* USER CODE BEGIN PFP */
 
+
 /* USER CODE END PFP */
 
 /* Private user code ---------------------------------------------------------*/
 /* USER CODE BEGIN 0 */
 
+struct Missile
+{
+	uint16_t x;
+	uint16_t y;
+	uint8_t dx;
+	uint8_t dy;
+	uint8_t equipe;
+	char color;
+	uint8_t damage;
+};
+
+struct Joueur
+{
+	uint16_t x;
+	uint16_t y;
+	uint8_t dx;
+	uint8_t dy;
+	uint8_t health;
+	struct Missile missile;
+};
+
+// Définition des paramètres du joueurs
+
+struct Joueur joueur = {10, 10, 1, 1, 3};
+
+
+
 /* USER CODE END 0 */
 
 /**
@@ -133,10 +166,11 @@ int main(void)
   /* USER CODE BEGIN 1 */
   char text[50] = {};
   static TS_StateTypeDef TS_State;
-  uint32_t potl, potr, joystick_h, joystick_v;
   ADC_ChannelConfTypeDef sConfig = {0};
   sConfig.Rank = ADC_REGULAR_RANK_1;
   sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+
+
   /* USER CODE END 1 */
 
   /* MCU Configuration--------------------------------------------------------*/
@@ -205,6 +239,27 @@ int main(void)
   /* start timers, add new ones, ... */
   /* USER CODE END RTOS_TIMERS */
 
+  /* Create the queue(s) */
+  /* definition and creation of Queue_E */
+  osMessageQDef(Queue_E, 16, uint16_t);
+  Queue_EHandle = osMessageCreate(osMessageQ(Queue_E), NULL);
+
+  /* definition and creation of Queue_F */
+  osMessageQDef(Queue_F, 1, uint8_t);
+  Queue_FHandle = osMessageCreate(osMessageQ(Queue_F), NULL);
+
+  /* definition and creation of Queue_J */
+  osMessageQDef(Queue_J, 16, uint16_t);
+  Queue_JHandle = osMessageCreate(osMessageQ(Queue_J), NULL);
+
+  /* definition and creation of Queue_P */
+  osMessageQDef(Queue_P, 16, uint16_t);
+  Queue_PHandle = osMessageCreate(osMessageQ(Queue_P), NULL);
+
+  /* definition and creation of Queue_N */
+  osMessageQDef(Queue_N, 16, uint16_t);
+  Queue_NHandle = osMessageCreate(osMessageQ(Queue_N), NULL);
+
   /* USER CODE BEGIN RTOS_QUEUES */
   /* add queues, ... */
   /* USER CODE END RTOS_QUEUES */
@@ -223,8 +278,8 @@ int main(void)
   Block_EnemieHandle = osThreadCreate(osThread(Block_Enemie), NULL);
 
   /* definition and creation of Projectile */
-  osThreadStaticDef(Projectile, f_projectile, osPriorityNormal, 0, 128, Dynamic, &NULL);
-  ProjectileHandle = osThreadCreate(osThread(Projectile), (void*) sens);
+  osThreadDef(Projectile, f_projectile, osPriorityNormal, 0, 128);
+  ProjectileHandle = osThreadCreate(osThread(Projectile), NULL);
 
   /* USER CODE BEGIN RTOS_THREADS */
   /* add threads, ... */
@@ -246,43 +301,29 @@ int main(void)
     sprintf(text, "BP1 : %d", HAL_GPIO_ReadPin(BP1_GPIO_Port, BP1_Pin));
     BSP_LCD_DisplayStringAtLine(5, (uint8_t *)text);
 
-    sConfig.Channel = ADC_CHANNEL_6;
-    HAL_ADC_ConfigChannel(&hadc3, &sConfig);
-    HAL_ADC_Start(&hadc3);
-    while (HAL_ADC_PollForConversion(&hadc3, 100) != HAL_OK)
+
       ;
-    potr = HAL_ADC_GetValue(&hadc3);
 
     sConfig.Channel = ADC_CHANNEL_7;
     HAL_ADC_ConfigChannel(&hadc3, &sConfig);
     HAL_ADC_Start(&hadc3);
-    while (HAL_ADC_PollForConversion(&hadc3, 100) != HAL_OK)
-      ;
-    potl = HAL_ADC_GetValue(&hadc3);
 
+    sConfig.Channel = ADC_CHANNEL_6;
+	HAL_ADC_ConfigChannel(&hadc3, &sConfig);
+	HAL_ADC_Start(&hadc3);
     sConfig.Channel = ADC_CHANNEL_8;
     HAL_ADC_ConfigChannel(&hadc3, &sConfig);
     HAL_ADC_Start(&hadc3);
-    while (HAL_ADC_PollForConversion(&hadc3, 100) != HAL_OK)
-      ;
-    joystick_v = HAL_ADC_GetValue(&hadc3);
 
     HAL_ADC_Start(&hadc1);
-    while (HAL_ADC_PollForConversion(&hadc1, 100) != HAL_OK)
-      ;
-    joystick_h = HAL_ADC_GetValue(&hadc1);
 
-    sprintf(text, "POTL : %4u POTR : %4u joy_v : %4u joy_h : %4u",
-            (uint)potl, (uint)potr, (uint)joystick_v, (uint)joystick_h);
-    BSP_LCD_DisplayStringAtLine(9, (uint8_t *)text);
+
 
     BSP_TS_GetState(&TS_State);
     if (TS_State.touchDetected)
     {
       BSP_LCD_FillCircle(TS_State.touchX[0], TS_State.touchY[0], 4);
     }
-    BSP_LCD_DisplyString(0, "coucou");
-    BSP_LCD_DisplyString(1, "Tu veux voir ma ****");
     /* USER CODE END WHILE */
 
     /* USER CODE BEGIN 3 */
@@ -1500,9 +1541,12 @@ static void MX_GPIO_Init(void)
 
 /* USER CODE BEGIN 4 */
 int envoie_score( int score){
+	/*
 socket = udp_new;
-
+*/
+return 0;
 }
+
 /* USER CODE END 4 */
 
 /* USER CODE BEGIN Header_f_GameMaster */
@@ -1522,6 +1566,12 @@ void f_GameMaster(void const * argument)
   /* Infinite loop */
   for (;;)
   {
+
+
+
+
+
+
     vTaskDelayUntil(&xLastWakeTime, xPeriodeTache);
   }
   /* USER CODE END 5 */
@@ -1539,9 +1589,55 @@ void f_Joueur_1(void const * argument)
   /* USER CODE BEGIN f_Joueur_1 */
   TickType_t xLastWakeTime;
   const TickType_t xPeriodeTache = 10;
+  uint16_t Width = 20;
+  uint16_t Height = 20;
+  uint32_t joystick_h, joystick_v;
+  uint8_t stop = 1;
+
+  struct Missile missile;
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+   sConfig.Rank = ADC_REGULAR_RANK_1;
+   sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+
+  sConfig.Channel = ADC_CHANNEL_8;
+  HAL_ADC_ConfigChannel(&hadc3, &sConfig);
+  HAL_ADC_Start(&hadc3);
+
+  HAL_ADC_Start(&hadc1);
+
+
   /* Infinite loop */
   for (;;)
   {
+
+	BSP_LCD_SetTextColor(LCD_COLOR_WHITE);
+	BSP_LCD_FillRect(joueur.x, joueur.y, Width, Height);
+
+	// BSP_LCD_DrawBitmap(uint32_t Xpos, uint32_t Ypos, uint8_t *pbmp)
+	while (HAL_ADC_PollForConversion(&hadc3, 100) != HAL_OK);
+	joystick_v = HAL_ADC_GetValue(&hadc3);
+	while (HAL_ADC_PollForConversion(&hadc1, 100) != HAL_OK);
+	joystick_h = HAL_ADC_GetValue(&hadc1);
+
+	if ((joueur.y < 27424- Width - joueur.dy)&&(joystick_h < 1900)) joueur.y += joueur.dy;
+	if ((joueur.y > Width + joueur.dy)&&(joystick_h > 2100)) joueur.y -= joueur.dy;
+
+	if ((joueur.x > Height + joueur.dx)&&(joystick_v < 1900)) joueur.x += joueur.dx;
+	if ((joueur.x < 480-Height - joueur.dx)&&(joystick_v > 2100)) joueur.x -= joueur.dx;
+
+
+	BSP_LCD_SetTextColor(LCD_COLOR_BLACK);
+	BSP_LCD_FillRect(joueur.x, joueur.y, Width, Height);
+
+	if (xQueueReceive(Queue_JHandle, &missile, 0) == pdPASS)
+		joueur.health = joueur.health - missile.damage;
+	// On envoie 1 si le joueur est mort et on envoie 0 si les enemis sont tous morts
+		if (joueur.health == 0)xQueueSend(Queue_FHandle,&stop,0);
+
+	// TODO La condition sur une entrée analogique pour envoyer un missile
+	struct Missile missile = {joueur.x, joueur.y,joueur.missile.dx, joueur.missile.dy, 1, joueur.missile.color, joueur.missile.damage};
+	xQueueSend(Queue_NHandle,&missile,0);
     vTaskDelayUntil(&xLastWakeTime, xPeriodeTache);
   }
   /* USER CODE END f_Joueur_1 */
@@ -1580,6 +1676,8 @@ void f_projectile(void const * argument)
   TickType_t xLastWakeTime;
   const TickType_t xPeriodeTache = 10;
   /* Infinite loop */
+  struct Missile liste_missile[50];
+
   for (;;)
   {
     vTaskDelayUntil(&xLastWakeTime, xPeriodeTache);
diff --git a/Debug/Core/Src/freertos.d b/Debug/Core/Src/freertos.d
index bc7b019..91a56a2 100644
--- a/Debug/Core/Src/freertos.d
+++ b/Debug/Core/Src/freertos.d
@@ -30,9 +30,12 @@ Core/Src/freertos.o: ../Core/Src/freertos.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -43,6 +46,7 @@ Core/Src/freertos.o: ../Core/Src/freertos.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -116,12 +120,18 @@ Core/Src/freertos.o: ../Core/Src/freertos.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -142,6 +152,8 @@ Core/Src/freertos.o: ../Core/Src/freertos.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Core/Src/freertos.o b/Debug/Core/Src/freertos.o
index 99a0a60..95de140 100644
Binary files a/Debug/Core/Src/freertos.o and b/Debug/Core/Src/freertos.o differ
diff --git a/Debug/Core/Src/ft5336.o b/Debug/Core/Src/ft5336.o
index 933d3f2..e6028e5 100644
Binary files a/Debug/Core/Src/ft5336.o and b/Debug/Core/Src/ft5336.o differ
diff --git a/Debug/Core/Src/main.d b/Debug/Core/Src/main.d
index a68d336..b1523c6 100644
--- a/Debug/Core/Src/main.d
+++ b/Debug/Core/Src/main.d
@@ -21,9 +21,12 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -34,6 +37,7 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -59,6 +63,46 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
  ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
  ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
  ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../LWIP/App/lwip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../LWIP/Target/ethernetif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h \
  ../Core/Inc/stm32746g_discovery_lcd.h ../Core/Inc/rk043fn48h.h \
  ../Core/Inc/stm32746g_discovery_sdram.h \
  ../Core/Inc/stm32746g_discovery.h ../Core/Inc/../../Fonts/fonts.h \
@@ -111,12 +155,18 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -137,6 +187,8 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
@@ -187,6 +239,86 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
 
 ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
 
+../LWIP/App/lwip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../LWIP/Target/ethernetif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
+
 ../Core/Inc/stm32746g_discovery_lcd.h:
 
 ../Core/Inc/rk043fn48h.h:
diff --git a/Debug/Core/Src/main.o b/Debug/Core/Src/main.o
index f0eed21..ee84fb6 100644
Binary files a/Debug/Core/Src/main.o and b/Debug/Core/Src/main.o differ
diff --git a/Debug/Core/Src/main.su b/Debug/Core/Src/main.su
index cd9558b..61967a6 100644
--- a/Debug/Core/Src/main.su
+++ b/Debug/Core/Src/main.su
@@ -1,24 +1,30 @@
-main.c:115:5:main	136	static
-main.c:255:6:SystemClock_Config	216	static
-main.c:330:13:MX_ADC1_Init	24	static
-main.c:380:13:MX_ADC3_Init	24	static
-main.c:430:13:MX_DAC_Init	16	static
-main.c:468:13:MX_DMA2D_Init	8	static
-main.c:505:13:MX_I2C1_Init	8	static
-main.c:551:13:MX_I2C3_Init	8	static
-main.c:597:13:MX_LTDC_Init	64	static
-main.c:659:13:MX_RTC_Init	80	static
-main.c:751:13:MX_SPI2_Init	8	static
-main.c:791:13:MX_TIM1_Init	40	static
-main.c:838:13:MX_TIM2_Init	40	static
-main.c:883:13:MX_TIM3_Init	88	static
-main.c:949:13:MX_TIM5_Init	40	static
-main.c:994:13:MX_TIM8_Init	112	static
-main.c:1073:13:MX_UART7_Init	8	static
-main.c:1108:13:MX_USART1_UART_Init	8	static
-main.c:1143:13:MX_USART6_UART_Init	8	static
-main.c:1174:13:MX_FMC_Init	40	static
-main.c:1225:13:MX_GPIO_Init	72	static
-main.c:1412:6:StartDefaultTask	16	static
-main.c:1431:6:HAL_TIM_PeriodElapsedCallback	16	static
-main.c:1448:6:Error_Handler	4	static,ignoring_inline_asm
+main.c:164:5:main	280	static
+main.c:338:6:SystemClock_Config	216	static
+main.c:414:13:MX_ADC1_Init	24	static
+main.c:464:13:MX_ADC3_Init	24	static
+main.c:514:13:MX_CRC_Init	8	static
+main.c:545:13:MX_DAC_Init	16	static
+main.c:583:13:MX_DMA2D_Init	8	static
+main.c:620:13:MX_I2C1_Init	8	static
+main.c:666:13:MX_I2C3_Init	8	static
+main.c:712:13:MX_LTDC_Init	64	static
+main.c:774:13:MX_RNG_Init	8	static
+main.c:800:13:MX_RTC_Init	80	static
+main.c:892:13:MX_SPI2_Init	8	static
+main.c:932:13:MX_TIM1_Init	40	static
+main.c:979:13:MX_TIM2_Init	40	static
+main.c:1024:13:MX_TIM3_Init	88	static
+main.c:1090:13:MX_TIM5_Init	40	static
+main.c:1135:13:MX_TIM8_Init	112	static
+main.c:1214:13:MX_UART7_Init	8	static
+main.c:1249:13:MX_USART1_UART_Init	8	static
+main.c:1284:13:MX_USART6_UART_Init	8	static
+main.c:1315:13:MX_FMC_Init	40	static
+main.c:1366:13:MX_GPIO_Init	72	static
+main.c:1543:5:envoie_score	16	static
+main.c:1559:6:f_GameMaster	24	static
+main.c:1587:6:f_Joueur_1	80	static
+main.c:1653:6:f_block_enemie	24	static
+main.c:1673:6:f_projectile	528	static
+main.c:1696:6:HAL_TIM_PeriodElapsedCallback	16	static
+main.c:1713:6:Error_Handler	4	static,ignoring_inline_asm
diff --git a/Debug/Core/Src/stm32746g_discovery.d b/Debug/Core/Src/stm32746g_discovery.d
index 1c81ae0..7344ca1 100644
--- a/Debug/Core/Src/stm32746g_discovery.d
+++ b/Debug/Core/Src/stm32746g_discovery.d
@@ -22,9 +22,12 @@ Core/Src/stm32746g_discovery.o: ../Core/Src/stm32746g_discovery.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Core/Src/stm32746g_discovery.o: ../Core/Src/stm32746g_discovery.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -90,12 +94,18 @@ Core/Src/stm32746g_discovery.o: ../Core/Src/stm32746g_discovery.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -116,6 +126,8 @@ Core/Src/stm32746g_discovery.o: ../Core/Src/stm32746g_discovery.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Core/Src/stm32746g_discovery.o b/Debug/Core/Src/stm32746g_discovery.o
index d440a2c..d4dd324 100644
Binary files a/Debug/Core/Src/stm32746g_discovery.o and b/Debug/Core/Src/stm32746g_discovery.o differ
diff --git a/Debug/Core/Src/stm32746g_discovery_lcd.d b/Debug/Core/Src/stm32746g_discovery_lcd.d
index 2e22b6c..f01bba2 100644
--- a/Debug/Core/Src/stm32746g_discovery_lcd.d
+++ b/Debug/Core/Src/stm32746g_discovery_lcd.d
@@ -23,9 +23,12 @@ Core/Src/stm32746g_discovery_lcd.o: ../Core/Src/stm32746g_discovery_lcd.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -36,6 +39,7 @@ Core/Src/stm32746g_discovery_lcd.o: ../Core/Src/stm32746g_discovery_lcd.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -100,12 +104,18 @@ Core/Src/stm32746g_discovery_lcd.o: ../Core/Src/stm32746g_discovery_lcd.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -126,6 +136,8 @@ Core/Src/stm32746g_discovery_lcd.o: ../Core/Src/stm32746g_discovery_lcd.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Core/Src/stm32746g_discovery_lcd.o b/Debug/Core/Src/stm32746g_discovery_lcd.o
index 637ae9a..843025f 100644
Binary files a/Debug/Core/Src/stm32746g_discovery_lcd.o and b/Debug/Core/Src/stm32746g_discovery_lcd.o differ
diff --git a/Debug/Core/Src/stm32746g_discovery_sdram.d b/Debug/Core/Src/stm32746g_discovery_sdram.d
index 80a054d..0ab3375 100644
--- a/Debug/Core/Src/stm32746g_discovery_sdram.d
+++ b/Debug/Core/Src/stm32746g_discovery_sdram.d
@@ -23,9 +23,12 @@ Core/Src/stm32746g_discovery_sdram.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -36,6 +39,7 @@ Core/Src/stm32746g_discovery_sdram.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -91,12 +95,18 @@ Core/Src/stm32746g_discovery_sdram.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -117,6 +127,8 @@ Core/Src/stm32746g_discovery_sdram.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Core/Src/stm32746g_discovery_sdram.o b/Debug/Core/Src/stm32746g_discovery_sdram.o
index 12dbfe2..c17fafc 100644
Binary files a/Debug/Core/Src/stm32746g_discovery_sdram.o and b/Debug/Core/Src/stm32746g_discovery_sdram.o differ
diff --git a/Debug/Core/Src/stm32746g_discovery_ts.d b/Debug/Core/Src/stm32746g_discovery_ts.d
index 85b0c78..84ce300 100644
--- a/Debug/Core/Src/stm32746g_discovery_ts.d
+++ b/Debug/Core/Src/stm32746g_discovery_ts.d
@@ -22,9 +22,12 @@ Core/Src/stm32746g_discovery_ts.o: ../Core/Src/stm32746g_discovery_ts.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Core/Src/stm32746g_discovery_ts.o: ../Core/Src/stm32746g_discovery_ts.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -93,12 +97,18 @@ Core/Src/stm32746g_discovery_ts.o: ../Core/Src/stm32746g_discovery_ts.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -119,6 +129,8 @@ Core/Src/stm32746g_discovery_ts.o: ../Core/Src/stm32746g_discovery_ts.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Core/Src/stm32746g_discovery_ts.o b/Debug/Core/Src/stm32746g_discovery_ts.o
index 8ca6743..b5c3c55 100644
Binary files a/Debug/Core/Src/stm32746g_discovery_ts.o and b/Debug/Core/Src/stm32746g_discovery_ts.o differ
diff --git a/Debug/Core/Src/stm32f7xx_hal_msp.d b/Debug/Core/Src/stm32f7xx_hal_msp.d
index 0103ec0..ac16021 100644
--- a/Debug/Core/Src/stm32f7xx_hal_msp.d
+++ b/Debug/Core/Src/stm32f7xx_hal_msp.d
@@ -21,9 +21,12 @@ Core/Src/stm32f7xx_hal_msp.o: ../Core/Src/stm32f7xx_hal_msp.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -34,6 +37,7 @@ Core/Src/stm32f7xx_hal_msp.o: ../Core/Src/stm32f7xx_hal_msp.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -89,12 +93,18 @@ Core/Src/stm32f7xx_hal_msp.o: ../Core/Src/stm32f7xx_hal_msp.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -115,6 +125,8 @@ Core/Src/stm32f7xx_hal_msp.o: ../Core/Src/stm32f7xx_hal_msp.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Core/Src/stm32f7xx_hal_msp.o b/Debug/Core/Src/stm32f7xx_hal_msp.o
index 9ff5c9c..6cc8225 100644
Binary files a/Debug/Core/Src/stm32f7xx_hal_msp.o and b/Debug/Core/Src/stm32f7xx_hal_msp.o differ
diff --git a/Debug/Core/Src/stm32f7xx_hal_msp.su b/Debug/Core/Src/stm32f7xx_hal_msp.su
index ef8ee3e..4b43a49 100644
--- a/Debug/Core/Src/stm32f7xx_hal_msp.su
+++ b/Debug/Core/Src/stm32f7xx_hal_msp.su
@@ -1,24 +1,28 @@
 stm32f7xx_hal_msp.c:66:6:HAL_MspInit	16	static
 stm32f7xx_hal_msp.c:90:6:HAL_ADC_MspInit	56	static
 stm32f7xx_hal_msp.c:146:6:HAL_ADC_MspDeInit	16	static
-stm32f7xx_hal_msp.c:193:6:HAL_DAC_MspInit	48	static
-stm32f7xx_hal_msp.c:229:6:HAL_DAC_MspDeInit	16	static
-stm32f7xx_hal_msp.c:259:6:HAL_DMA2D_MspInit	24	static
-stm32f7xx_hal_msp.c:281:6:HAL_DMA2D_MspDeInit	16	static
-stm32f7xx_hal_msp.c:303:6:HAL_I2C_MspInit	56	static
-stm32f7xx_hal_msp.c:363:6:HAL_I2C_MspDeInit	16	static
-stm32f7xx_hal_msp.c:414:6:HAL_LTDC_MspInit	64	static
-stm32f7xx_hal_msp.c:515:6:HAL_LTDC_MspDeInit	16	static
-stm32f7xx_hal_msp.c:584:6:HAL_RTC_MspInit	16	static
-stm32f7xx_hal_msp.c:606:6:HAL_RTC_MspDeInit	16	static
-stm32f7xx_hal_msp.c:628:6:HAL_SPI_MspInit	48	static
-stm32f7xx_hal_msp.c:681:6:HAL_SPI_MspDeInit	16	static
-stm32f7xx_hal_msp.c:714:6:HAL_TIM_Base_MspInit	40	static
-stm32f7xx_hal_msp.c:774:6:HAL_TIM_MspPostInit	48	static
-stm32f7xx_hal_msp.c:826:6:HAL_TIM_Base_MspDeInit	16	static
-stm32f7xx_hal_msp.c:892:6:HAL_UART_MspInit	64	static
-stm32f7xx_hal_msp.c:984:6:HAL_UART_MspDeInit	16	static
-stm32f7xx_hal_msp.c:1047:13:HAL_FMC_MspInit	32	static
-stm32f7xx_hal_msp.c:1153:6:HAL_SDRAM_MspInit	16	static
-stm32f7xx_hal_msp.c:1165:13:HAL_FMC_MspDeInit	8	static
-stm32f7xx_hal_msp.c:1239:6:HAL_SDRAM_MspDeInit	16	static
+stm32f7xx_hal_msp.c:193:6:HAL_CRC_MspInit	24	static
+stm32f7xx_hal_msp.c:215:6:HAL_CRC_MspDeInit	16	static
+stm32f7xx_hal_msp.c:237:6:HAL_DAC_MspInit	48	static
+stm32f7xx_hal_msp.c:273:6:HAL_DAC_MspDeInit	16	static
+stm32f7xx_hal_msp.c:303:6:HAL_DMA2D_MspInit	24	static
+stm32f7xx_hal_msp.c:325:6:HAL_DMA2D_MspDeInit	16	static
+stm32f7xx_hal_msp.c:347:6:HAL_I2C_MspInit	56	static
+stm32f7xx_hal_msp.c:407:6:HAL_I2C_MspDeInit	16	static
+stm32f7xx_hal_msp.c:458:6:HAL_LTDC_MspInit	64	static
+stm32f7xx_hal_msp.c:559:6:HAL_LTDC_MspDeInit	16	static
+stm32f7xx_hal_msp.c:628:6:HAL_RNG_MspInit	24	static
+stm32f7xx_hal_msp.c:650:6:HAL_RNG_MspDeInit	16	static
+stm32f7xx_hal_msp.c:672:6:HAL_RTC_MspInit	16	static
+stm32f7xx_hal_msp.c:694:6:HAL_RTC_MspDeInit	16	static
+stm32f7xx_hal_msp.c:716:6:HAL_SPI_MspInit	48	static
+stm32f7xx_hal_msp.c:769:6:HAL_SPI_MspDeInit	16	static
+stm32f7xx_hal_msp.c:802:6:HAL_TIM_Base_MspInit	40	static
+stm32f7xx_hal_msp.c:862:6:HAL_TIM_MspPostInit	48	static
+stm32f7xx_hal_msp.c:914:6:HAL_TIM_Base_MspDeInit	16	static
+stm32f7xx_hal_msp.c:980:6:HAL_UART_MspInit	64	static
+stm32f7xx_hal_msp.c:1072:6:HAL_UART_MspDeInit	16	static
+stm32f7xx_hal_msp.c:1135:13:HAL_FMC_MspInit	32	static
+stm32f7xx_hal_msp.c:1241:6:HAL_SDRAM_MspInit	16	static
+stm32f7xx_hal_msp.c:1253:13:HAL_FMC_MspDeInit	8	static
+stm32f7xx_hal_msp.c:1327:6:HAL_SDRAM_MspDeInit	16	static
diff --git a/Debug/Core/Src/stm32f7xx_hal_timebase_tim.d b/Debug/Core/Src/stm32f7xx_hal_timebase_tim.d
index 7a90751..344d5e4 100644
--- a/Debug/Core/Src/stm32f7xx_hal_timebase_tim.d
+++ b/Debug/Core/Src/stm32f7xx_hal_timebase_tim.d
@@ -22,9 +22,12 @@ Core/Src/stm32f7xx_hal_timebase_tim.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Core/Src/stm32f7xx_hal_timebase_tim.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Core/Src/stm32f7xx_hal_timebase_tim.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Core/Src/stm32f7xx_hal_timebase_tim.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Core/Src/stm32f7xx_hal_timebase_tim.o b/Debug/Core/Src/stm32f7xx_hal_timebase_tim.o
index 4ed8c41..66ea8eb 100644
Binary files a/Debug/Core/Src/stm32f7xx_hal_timebase_tim.o and b/Debug/Core/Src/stm32f7xx_hal_timebase_tim.o differ
diff --git a/Debug/Core/Src/stm32f7xx_it.d b/Debug/Core/Src/stm32f7xx_it.d
index 5f20399..1627419 100644
--- a/Debug/Core/Src/stm32f7xx_it.d
+++ b/Debug/Core/Src/stm32f7xx_it.d
@@ -21,9 +21,12 @@ Core/Src/stm32f7xx_it.o: ../Core/Src/stm32f7xx_it.c ../Core/Inc/main.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -34,6 +37,7 @@ Core/Src/stm32f7xx_it.o: ../Core/Src/stm32f7xx_it.c ../Core/Inc/main.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -90,12 +94,18 @@ Core/Src/stm32f7xx_it.o: ../Core/Src/stm32f7xx_it.c ../Core/Inc/main.h \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -116,6 +126,8 @@ Core/Src/stm32f7xx_it.o: ../Core/Src/stm32f7xx_it.c ../Core/Inc/main.h \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Core/Src/stm32f7xx_it.o b/Debug/Core/Src/stm32f7xx_it.o
index 78ce64f..1855cf2 100644
Binary files a/Debug/Core/Src/stm32f7xx_it.o and b/Debug/Core/Src/stm32f7xx_it.o differ
diff --git a/Debug/Core/Src/stm32f7xx_it.su b/Debug/Core/Src/stm32f7xx_it.su
index 7e0660e..615188c 100644
--- a/Debug/Core/Src/stm32f7xx_it.su
+++ b/Debug/Core/Src/stm32f7xx_it.su
@@ -1,8 +1,9 @@
-stm32f7xx_it.c:73:6:NMI_Handler	4	static
-stm32f7xx_it.c:88:6:HardFault_Handler	4	static
-stm32f7xx_it.c:103:6:MemManage_Handler	4	static
-stm32f7xx_it.c:118:6:BusFault_Handler	4	static
-stm32f7xx_it.c:133:6:UsageFault_Handler	4	static
-stm32f7xx_it.c:148:6:DebugMon_Handler	4	static
-stm32f7xx_it.c:168:6:TIM6_DAC_IRQHandler	8	static
-stm32f7xx_it.c:183:6:LTDC_IRQHandler	8	static
+stm32f7xx_it.c:74:6:NMI_Handler	4	static
+stm32f7xx_it.c:89:6:HardFault_Handler	4	static
+stm32f7xx_it.c:104:6:MemManage_Handler	4	static
+stm32f7xx_it.c:119:6:BusFault_Handler	4	static
+stm32f7xx_it.c:134:6:UsageFault_Handler	4	static
+stm32f7xx_it.c:149:6:DebugMon_Handler	4	static
+stm32f7xx_it.c:169:6:TIM6_DAC_IRQHandler	8	static
+stm32f7xx_it.c:184:6:ETH_IRQHandler	8	static
+stm32f7xx_it.c:198:6:LTDC_IRQHandler	8	static
diff --git a/Debug/Core/Src/subdir.mk b/Debug/Core/Src/subdir.mk
index 77d6a3c..d7e40f4 100644
--- a/Debug/Core/Src/subdir.mk
+++ b/Debug/Core/Src/subdir.mk
@@ -51,29 +51,29 @@ C_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Core/Src/freertos.o: ../Core/Src/freertos.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/freertos.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/freertos.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/ft5336.o: ../Core/Src/ft5336.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/ft5336.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/ft5336.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/main.o: ../Core/Src/main.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/stm32746g_discovery.o: ../Core/Src/stm32746g_discovery.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32746g_discovery.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32746g_discovery.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/stm32746g_discovery_lcd.o: ../Core/Src/stm32746g_discovery_lcd.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32746g_discovery_lcd.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32746g_discovery_lcd.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/stm32746g_discovery_sdram.o: ../Core/Src/stm32746g_discovery_sdram.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32746g_discovery_sdram.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32746g_discovery_sdram.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/stm32746g_discovery_ts.o: ../Core/Src/stm32746g_discovery_ts.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32746g_discovery_ts.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32746g_discovery_ts.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/stm32f7xx_hal_msp.o: ../Core/Src/stm32f7xx_hal_msp.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f7xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f7xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/stm32f7xx_hal_timebase_tim.o: ../Core/Src/stm32f7xx_hal_timebase_tim.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f7xx_hal_timebase_tim.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f7xx_hal_timebase_tim.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/stm32f7xx_it.o: ../Core/Src/stm32f7xx_it.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f7xx_it.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f7xx_it.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/syscalls.o: ../Core/Src/syscalls.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/sysmem.o: ../Core/Src/sysmem.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/system_stm32f7xx.o: ../Core/Src/system_stm32f7xx.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32f7xx.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32f7xx.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 
diff --git a/Debug/Core/Src/syscalls.d b/Debug/Core/Src/syscalls.d
index 8667c70..a164a2d 100644
--- a/Debug/Core/Src/syscalls.d
+++ b/Debug/Core/Src/syscalls.d
@@ -1 +1,165 @@
-Core/Src/syscalls.o: ../Core/Src/syscalls.c
+Core/Src/syscalls.o: ../Core/Src/syscalls.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Core/Src/syscalls.o b/Debug/Core/Src/syscalls.o
index b1f3a2e..e64132c 100644
Binary files a/Debug/Core/Src/syscalls.o and b/Debug/Core/Src/syscalls.o differ
diff --git a/Debug/Core/Src/syscalls.su b/Debug/Core/Src/syscalls.su
index 492a785..c1e53bb 100644
--- a/Debug/Core/Src/syscalls.su
+++ b/Debug/Core/Src/syscalls.su
@@ -14,5 +14,5 @@ syscalls.c:126:5:_unlink	16	static
 syscalls.c:132:5:_times	16	static
 syscalls.c:137:5:_stat	16	static
 syscalls.c:143:5:_link	16	static
-syscalls.c:149:5:_fork	8	static
+syscalls.c:149:5:_fork	4	static
 syscalls.c:155:5:_execve	24	static
diff --git a/Debug/Core/Src/sysmem.d b/Debug/Core/Src/sysmem.d
index 74fecf9..d364bc7 100644
--- a/Debug/Core/Src/sysmem.d
+++ b/Debug/Core/Src/sysmem.d
@@ -1 +1,165 @@
-Core/Src/sysmem.o: ../Core/Src/sysmem.c
+Core/Src/sysmem.o: ../Core/Src/sysmem.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Core/Src/sysmem.o b/Debug/Core/Src/sysmem.o
index 394553a..b576f16 100644
Binary files a/Debug/Core/Src/sysmem.o and b/Debug/Core/Src/sysmem.o differ
diff --git a/Debug/Core/Src/system_stm32f7xx.d b/Debug/Core/Src/system_stm32f7xx.d
index 5bb8f64..138d115 100644
--- a/Debug/Core/Src/system_stm32f7xx.d
+++ b/Debug/Core/Src/system_stm32f7xx.d
@@ -21,9 +21,12 @@ Core/Src/system_stm32f7xx.o: ../Core/Src/system_stm32f7xx.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -34,6 +37,7 @@ Core/Src/system_stm32f7xx.o: ../Core/Src/system_stm32f7xx.c \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -87,12 +91,18 @@ Core/Src/system_stm32f7xx.o: ../Core/Src/system_stm32f7xx.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -113,6 +123,8 @@ Core/Src/system_stm32f7xx.o: ../Core/Src/system_stm32f7xx.c \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Core/Src/system_stm32f7xx.o b/Debug/Core/Src/system_stm32f7xx.o
index ba14dc2..0694762 100644
Binary files a/Debug/Core/Src/system_stm32f7xx.o and b/Debug/Core/Src/system_stm32f7xx.o differ
diff --git a/Debug/Core/Startup/startup_stm32f746nghx.o b/Debug/Core/Startup/startup_stm32f746nghx.o
index a1997ea..c8fdcce 100644
Binary files a/Debug/Core/Startup/startup_stm32f746nghx.o and b/Debug/Core/Startup/startup_stm32f746nghx.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.d
index eee271e..eb5fdf9 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
index 520107a..7e49cc0 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.d
index 076962c..aec994c 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
index b150667..c7c03f1 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.d
index 0f98675..8804854 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
index 5c46197..3e01bfb 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.d
index 1891e19..f20cb92 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
index ffaef6f..ebc3fa9 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.d
new file mode 100644
index 0000000..4bfb659
--- /dev/null
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.d
@@ -0,0 +1,143 @@
+Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o: \
+ ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.c \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
new file mode 100644
index 0000000..1ad48ad
Binary files /dev/null and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.su b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.su
new file mode 100644
index 0000000..4185919
--- /dev/null
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.su
@@ -0,0 +1,9 @@
+stm32f7xx_hal_crc.c:103:19:HAL_CRC_Init	16	static
+stm32f7xx_hal_crc.c:179:19:HAL_CRC_DeInit	16	static
+stm32f7xx_hal_crc.c:223:13:HAL_CRC_MspInit	16	static
+stm32f7xx_hal_crc.c:238:13:HAL_CRC_MspDeInit	16	static
+stm32f7xx_hal_crc.c:287:10:HAL_CRC_Accumulate	32	static
+stm32f7xx_hal_crc.c:339:10:HAL_CRC_Calculate	32	static
+stm32f7xx_hal_crc.c:406:22:HAL_CRC_GetState	16	static
+stm32f7xx_hal_crc.c:432:17:CRC_Handle_8	40	static
+stm32f7xx_hal_crc.c:483:17:CRC_Handle_16	32	static
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.d
new file mode 100644
index 0000000..e1e36a1
--- /dev/null
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.d
@@ -0,0 +1,143 @@
+Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o: \
+ ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.c \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
new file mode 100644
index 0000000..d25b652
Binary files /dev/null and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.su b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.su
new file mode 100644
index 0000000..efe0884
--- /dev/null
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.su
@@ -0,0 +1,3 @@
+stm32f7xx_hal_crc_ex.c:89:19:HAL_CRCEx_Polynomial_Set	32	static
+stm32f7xx_hal_crc_ex.c:159:19:HAL_CRCEx_Input_Data_Reverse	16	static
+stm32f7xx_hal_crc_ex.c:185:19:HAL_CRCEx_Output_Data_Reverse	16	static
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.d
index 8a46bcb..5a85258 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
index 6ce0f51..573d9c0 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.d
index ddfb40c..5da24f2 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
index 8c1dde8..77269d0 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.d
index 07250e3..304ecf8 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
index 0d48878..7b41f03 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.d
index 0d2c657..c945396 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
index 5a98bc3..706722a 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.d
index 376258d..3dd0a6b 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
index 62af2df..24c22f8 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.d
index f5e4b44..1b4c5e0 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
index 88b0546..ad24be1 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.d
new file mode 100644
index 0000000..def2fbe
--- /dev/null
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.d
@@ -0,0 +1,143 @@
+Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o: \
+ ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
new file mode 100644
index 0000000..12e052f
Binary files /dev/null and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.su b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.su
new file mode 100644
index 0000000..75173c7
--- /dev/null
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.su
@@ -0,0 +1,31 @@
+stm32f7xx_hal_eth.c:208:19:HAL_ETH_Init	40	static
+stm32f7xx_hal_eth.c:493:19:HAL_ETH_DeInit	16	static
+stm32f7xx_hal_eth.c:529:19:HAL_ETH_DMATxDescListInit	32	static
+stm32f7xx_hal_eth.c:596:19:HAL_ETH_DMARxDescListInit	32	static
+stm32f7xx_hal_eth.c:663:13:HAL_ETH_MspInit	16	static
+stm32f7xx_hal_eth.c:679:13:HAL_ETH_MspDeInit	16	static
+stm32f7xx_hal_eth.c:890:19:HAL_ETH_TransmitFrame	32	static
+stm32f7xx_hal_eth.c:1003:19:HAL_ETH_GetReceivedFrame	24	static
+stm32f7xx_hal_eth.c:1083:19:HAL_ETH_GetReceivedFrame_IT	24	static
+stm32f7xx_hal_eth.c:1168:6:HAL_ETH_IRQHandler	16	static
+stm32f7xx_hal_eth.c:1242:13:HAL_ETH_TxCpltCallback	16	static
+stm32f7xx_hal_eth.c:1258:13:HAL_ETH_RxCpltCallback	16	static
+stm32f7xx_hal_eth.c:1274:13:HAL_ETH_ErrorCallback	16	static
+stm32f7xx_hal_eth.c:1296:19:HAL_ETH_ReadPHYRegister	32	static
+stm32f7xx_hal_eth.c:1368:19:HAL_ETH_WritePHYRegister	32	static
+stm32f7xx_hal_eth.c:1460:19:HAL_ETH_Start	16	static
+stm32f7xx_hal_eth.c:1499:19:HAL_ETH_Stop	16	static
+stm32f7xx_hal_eth.c:1539:19:HAL_ETH_ConfigMAC	24	static
+stm32f7xx_hal_eth.c:1706:19:HAL_ETH_ConfigDMA	24	static
+stm32f7xx_hal_eth.c:1813:22:HAL_ETH_GetState	16	static
+stm32f7xx_hal_eth.c:1838:13:ETH_MACDMAConfig	200	static
+stm32f7xx_hal_eth.c:2101:13:ETH_MACAddressConfig	32	static
+stm32f7xx_hal_eth.c:2125:13:ETH_MACTransmissionEnable	24	static
+stm32f7xx_hal_eth.c:2145:13:ETH_MACTransmissionDisable	24	static
+stm32f7xx_hal_eth.c:2165:13:ETH_MACReceptionEnable	24	static
+stm32f7xx_hal_eth.c:2185:13:ETH_MACReceptionDisable	24	static
+stm32f7xx_hal_eth.c:2205:13:ETH_DMATransmissionEnable	16	static
+stm32f7xx_hal_eth.c:2217:13:ETH_DMATransmissionDisable	16	static
+stm32f7xx_hal_eth.c:2229:13:ETH_DMAReceptionEnable	16	static
+stm32f7xx_hal_eth.c:2241:13:ETH_DMAReceptionDisable	16	static
+stm32f7xx_hal_eth.c:2253:13:ETH_FlushTransmitFIFO	24	static
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.d
index 3cb0c14..052f676 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
index cb7d4d3..d2ff24a 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.d
index 3d88d5c..8e667a7 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
index 9cf73c1..e940e44 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.d
index 1c83120..1d66f0b 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
index 8cf8275..0e67128 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.d
index 5fd667b..c05d564 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
index 1c0951d..0e56a4c 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.d
index 6c30600..7885b5a 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
index 0c9312d..f9b43e7 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.d
index 7e9d67c..9273122 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
index 3b35ecf..f1c8fe0 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.d
index 298d926..c4d90d6 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
index bc7c2a9..073ee82 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.d
index 40fabae..bc96562 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
index 4e0b819..02eadaf 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.d
index ac0be5e..3573d6a 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
index d5d624a..cc9b702 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.d
index 91f87f9..9777e7f 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
index 4eec0f7..30072aa 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.d
index 5bfe437..7a61464 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
index 44fa0de..f09e9dc 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.d
index ca300b5..4e4bae3 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
index dfa837a..41df82d 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.d
new file mode 100644
index 0000000..3fddd8b
--- /dev/null
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.d
@@ -0,0 +1,143 @@
+Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o: \
+ ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.c \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
new file mode 100644
index 0000000..54a74a4
Binary files /dev/null and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.su b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.su
new file mode 100644
index 0000000..5341562
--- /dev/null
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.su
@@ -0,0 +1,14 @@
+stm32f7xx_hal_rng.c:155:19:HAL_RNG_Init	16	static
+stm32f7xx_hal_rng.c:216:19:HAL_RNG_DeInit	16	static
+stm32f7xx_hal_rng.c:262:13:HAL_RNG_MspInit	16	static
+stm32f7xx_hal_rng.c:277:13:HAL_RNG_MspDeInit	16	static
+stm32f7xx_hal_rng.c:551:19:HAL_RNG_GenerateRandomNumber	24	static
+stm32f7xx_hal_rng.c:605:19:HAL_RNG_GenerateRandomNumber_IT	24	static
+stm32f7xx_hal_rng.c:640:10:HAL_RNG_GetRandomNumber	16	static
+stm32f7xx_hal_rng.c:659:10:HAL_RNG_GetRandomNumber_IT	24	static
+stm32f7xx_hal_rng.c:700:6:HAL_RNG_IRQHandler	24	static
+stm32f7xx_hal_rng.c:772:10:HAL_RNG_ReadLastRandomNumber	16	static
+stm32f7xx_hal_rng.c:789:13:HAL_RNG_ReadyDataCallback	16	static
+stm32f7xx_hal_rng.c:805:13:HAL_RNG_ErrorCallback	16	static
+stm32f7xx_hal_rng.c:839:22:HAL_RNG_GetState	16	static
+stm32f7xx_hal_rng.c:849:10:HAL_RNG_GetError	16	static
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.d
index 62c7973..1f615c3 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
index 1cbb03e..17db426 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.d
index d051e05..c014ff2 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
index b4293f0..a464ee0 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.d
index de90529..317a103 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
index c95bcb9..464965b 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.d
index 21fde23..d51f21f 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
index 94aead9..c0c9d87 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.d
index 5713560..1c8ff3f 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
index d76cd9f..1b5ed15 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.d
index 180a271..513e059 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
index 655b7db..46604bc 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.d
index 2112b64..2ea9ceb 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
index b8041f2..53c1221 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.d
index f8207f6..365a315 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
index 490f5fe..6d14885 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.d
index 55929c1..a0684e7 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
index 131f79d..ea6fee9 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.d b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.d
index ab32145..59b5f8e 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.d
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.d
@@ -22,9 +22,12 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
@@ -35,6 +38,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o: \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
  ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
@@ -88,12 +92,18 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
@@ -114,6 +124,8 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o: \
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
 
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
 
 ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
index 56a03f5..95b9fff 100644
Binary files a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o and b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o differ
diff --git a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk
index 10e9774..84b1536 100644
--- a/Debug/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk
+++ b/Debug/Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk
@@ -8,12 +8,15 @@ C_SRCS += \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c \
+../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.c \
+../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.c \
+../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c \
@@ -26,6 +29,7 @@ C_SRCS += \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c \
+../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.c \
 ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c \
@@ -42,12 +46,15 @@ OBJS += \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o \
+./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o \
+./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o \
+./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o \
@@ -60,6 +67,7 @@ OBJS += \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o \
+./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o \
@@ -76,12 +84,15 @@ C_DEPS += \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.d \
+./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.d \
+./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.d \
+./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.d \
@@ -94,6 +105,7 @@ C_DEPS += \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.d \
+./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.d \
 ./Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.d \
@@ -108,67 +120,75 @@ C_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o: ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 
diff --git a/Debug/LWIP/App/lwip.d b/Debug/LWIP/App/lwip.d
new file mode 100644
index 0000000..cd6be92
--- /dev/null
+++ b/Debug/LWIP/App/lwip.d
@@ -0,0 +1,317 @@
+LWIP/App/lwip.o: ../LWIP/App/lwip.c ../LWIP/App/lwip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../LWIP/Target/ethernetif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/init.h
+
+../LWIP/App/lwip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../LWIP/Target/ethernetif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/init.h:
diff --git a/Debug/LWIP/App/lwip.o b/Debug/LWIP/App/lwip.o
new file mode 100644
index 0000000..0042eb2
Binary files /dev/null and b/Debug/LWIP/App/lwip.o differ
diff --git a/Debug/LWIP/App/lwip.su b/Debug/LWIP/App/lwip.su
new file mode 100644
index 0000000..a46f148
--- /dev/null
+++ b/Debug/LWIP/App/lwip.su
@@ -0,0 +1 @@
+lwip.c:57:6:MX_LWIP_Init	72	static
diff --git a/Debug/LWIP/App/subdir.mk b/Debug/LWIP/App/subdir.mk
new file mode 100644
index 0000000..b0e9345
--- /dev/null
+++ b/Debug/LWIP/App/subdir.mk
@@ -0,0 +1,19 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../LWIP/App/lwip.c 
+
+OBJS += \
+./LWIP/App/lwip.o 
+
+C_DEPS += \
+./LWIP/App/lwip.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+LWIP/App/lwip.o: ../LWIP/App/lwip.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"LWIP/App/lwip.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
diff --git a/Debug/LWIP/Target/ethernetif.d b/Debug/LWIP/Target/ethernetif.d
new file mode 100644
index 0000000..8d88853
--- /dev/null
+++ b/Debug/LWIP/Target/ethernetif.d
@@ -0,0 +1,297 @@
+LWIP/Target/ethernetif.o: ../LWIP/Target/ethernetif.c ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ethip6.h \
+ ../LWIP/Target/ethernetif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ethip6.h:
+
+../LWIP/Target/ethernetif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
diff --git a/Debug/LWIP/Target/ethernetif.o b/Debug/LWIP/Target/ethernetif.o
new file mode 100644
index 0000000..e7127f0
Binary files /dev/null and b/Debug/LWIP/Target/ethernetif.o differ
diff --git a/Debug/LWIP/Target/ethernetif.su b/Debug/LWIP/Target/ethernetif.su
new file mode 100644
index 0000000..48c3584
--- /dev/null
+++ b/Debug/LWIP/Target/ethernetif.su
@@ -0,0 +1,13 @@
+ethernetif.c:88:6:HAL_ETH_MspInit	64	static
+ethernetif.c:143:6:HAL_ETH_MspDeInit	16	static
+ethernetif.c:184:6:HAL_ETH_RxCpltCallback	16	static
+ethernetif.c:203:13:low_level_init	80	static
+ethernetif.c:321:14:low_level_output	48	static
+ethernetif.c:405:22:low_level_input	56	static
+ethernetif.c:494:6:ethernetif_input	24	static
+ethernetif.c:553:7:ethernetif_init	16	static
+ethernetif.c:600:7:sys_jiffies	8	static
+ethernetif.c:611:7:sys_now	8	static
+ethernetif.c:623:6:ethernetif_set_link	24	static
+ethernetif.c:664:6:ethernetif_update_config	24	static
+ethernetif.c:752:13:ethernetif_notify_conn_changed	16	static
diff --git a/Debug/LWIP/Target/subdir.mk b/Debug/LWIP/Target/subdir.mk
new file mode 100644
index 0000000..c0877ae
--- /dev/null
+++ b/Debug/LWIP/Target/subdir.mk
@@ -0,0 +1,19 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../LWIP/Target/ethernetif.c 
+
+OBJS += \
+./LWIP/Target/ethernetif.o 
+
+C_DEPS += \
+./LWIP/Target/ethernetif.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+LWIP/Target/ethernetif.o: ../LWIP/Target/ethernetif.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"LWIP/Target/ethernetif.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
index 8fdcb6f..7ecbded 100644
Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o and b/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o differ
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.su
index 5fabf54..d740f69 100644
--- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.su
+++ b/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.su
@@ -43,7 +43,7 @@ cmsis_os.c:1432:10:osThreadSuspend	16	static
 cmsis_os.c:1448:10:osThreadResume	16	static,ignoring_inline_asm
 cmsis_os.c:1472:10:osThreadSuspendAll	8	static
 cmsis_os.c:1483:10:osThreadResumeAll	8	static
-cmsis_os.c:1500:10:osDelayUntil	16	static
+cmsis_os.c:1500:10:osDelayUntil	24	static
 cmsis_os.c:1520:10:osAbortDelay	16	static
 cmsis_os.c:1541:10:osThreadList	16	static
 cmsis_os.c:1555:9:osMessagePeek	48	static
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/subdir.mk b/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/subdir.mk
index f302221..5f04ba9 100644
--- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/subdir.mk
+++ b/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/subdir.mk
@@ -15,5 +15,5 @@ C_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.o
index ba6096c..e1fc511 100644
Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.o and b/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.o differ
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
index a1d1b62..8c02e43 100644
Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.o and b/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.o differ
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.o
index 453b1ce..018ad7c 100644
Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.o and b/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.o differ
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
index 31498bd..72fc008 100644
Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o and b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o differ
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/subdir.mk b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/subdir.mk
index b5f124f..8f2fded 100644
--- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/subdir.mk
+++ b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/subdir.mk
@@ -15,5 +15,5 @@ C_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
index b34ce18..f34d755 100644
Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o and b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o differ
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk
index 4312653..7c4e14d 100644
--- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk
+++ b/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk
@@ -15,5 +15,5 @@ C_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.o
index c2e8255..c6d84ce 100644
Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.o and b/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.o differ
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
index 4482606..ed48718 100644
Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o and b/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o differ
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/subdir.mk b/Debug/Middlewares/Third_Party/FreeRTOS/Source/subdir.mk
index e0613a5..11dc2d3 100644
--- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/subdir.mk
+++ b/Debug/Middlewares/Third_Party/FreeRTOS/Source/subdir.mk
@@ -33,17 +33,17 @@ C_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Middlewares/Third_Party/FreeRTOS/Source/croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/croutine.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/croutine.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/event_groups.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/event_groups.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Middlewares/Third_Party/FreeRTOS/Source/list.o: ../Middlewares/Third_Party/FreeRTOS/Source/list.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/list.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/list.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Middlewares/Third_Party/FreeRTOS/Source/queue.o: ../Middlewares/Third_Party/FreeRTOS/Source/queue.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/queue.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/queue.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o: ../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Middlewares/Third_Party/FreeRTOS/Source/tasks.o: ../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/tasks.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/tasks.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Middlewares/Third_Party/FreeRTOS/Source/timers.o: ../Middlewares/Third_Party/FreeRTOS/Source/timers.c
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/timers.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/FreeRTOS/Source/timers.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.o
index 529081b..41b33df 100644
Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.o and b/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.o differ
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.su b/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.su
index c9c96fa..c55f552 100644
--- a/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.su
+++ b/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.su
@@ -3,6 +3,7 @@ tasks.c:730:13:xTaskCreate	56	static
 tasks.c:821:13:prvInitialiseNewTask	40	static,ignoring_inline_asm
 tasks.c:1072:13:prvAddNewTaskToReadyList	16	static,ignoring_inline_asm
 tasks.c:1157:7:vTaskDelete	24	static,ignoring_inline_asm
+tasks.c:1249:7:vTaskDelayUntil	48	static,ignoring_inline_asm
 tasks.c:1333:7:vTaskDelay	24	static,ignoring_inline_asm
 tasks.c:1470:14:uxTaskPriorityGet	24	static
 tasks.c:1492:14:uxTaskPriorityGetFromISR	40	static,ignoring_inline_asm
diff --git a/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.o b/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.o
index cfad288..2e96f4c 100644
Binary files a/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.o and b/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/api_lib.d b/Debug/Middlewares/Third_Party/LwIP/src/api/api_lib.d
new file mode 100644
index 0000000..28aceb5
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/api_lib.d
@@ -0,0 +1,325 @@
+Middlewares/Third_Party/LwIP/src/api/api_lib.o: \
+ ../Middlewares/Third_Party/LwIP/src/api/api_lib.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/api.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/raw.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/api_msg.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/api.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/raw.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/api_msg.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/api_lib.o b/Debug/Middlewares/Third_Party/LwIP/src/api/api_lib.o
new file mode 100644
index 0000000..8032f2e
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/api/api_lib.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/api_lib.su b/Debug/Middlewares/Third_Party/LwIP/src/api/api_lib.su
new file mode 100644
index 0000000..e2a2cb9
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/api_lib.su
@@ -0,0 +1,28 @@
+api_lib.c:118:1:netconn_apimsg	24	static
+api_lib.c:149:1:netconn_new_with_proto_and_callback	56	static
+api_lib.c:192:1:netconn_prepare_delete	56	static
+api_lib.c:233:1:netconn_delete	24	static
+api_lib.c:269:1:netconn_getaddr	64	static
+api_lib.c:307:1:netconn_bind	64	static
+api_lib.c:351:1:netconn_bind_if	56	static
+api_lib.c:377:1:netconn_connect	64	static
+api_lib.c:409:1:netconn_disconnect	56	static
+api_lib.c:434:1:netconn_listen_with_backlog	56	static
+api_lib.c:471:1:netconn_accept	32	static
+api_lib.c:579:1:netconn_recv_data	40	static
+api_lib.c:677:1:netconn_tcp_recvd_msg	24	static
+api_lib.c:689:1:netconn_tcp_recvd	56	static
+api_lib.c:703:1:netconn_recv_data_tcp	72	static
+api_lib.c:782:1:netconn_recv_tcp_pbuf	16	static
+api_lib.c:803:1:netconn_recv_tcp_pbuf_flags	24	static
+api_lib.c:822:1:netconn_recv_udp_raw_netbuf	16	static
+api_lib.c:842:1:netconn_recv_udp_raw_netbuf_flags	24	static
+api_lib.c:860:1:netconn_recv	32	static
+api_lib.c:922:1:netconn_sendto	24	static
+api_lib.c:941:1:netconn_send	56	static
+api_lib.c:974:1:netconn_write_partly	40	static
+api_lib.c:997:1:netconn_write_vectors_partly	80	static
+api_lib.c:1089:1:netconn_close_shutdown	56	static
+api_lib.c:1125:1:netconn_close	16	static
+api_lib.c:1139:1:netconn_err	24	static
+api_lib.c:1163:1:netconn_shutdown	16	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/api_msg.d b/Debug/Middlewares/Third_Party/LwIP/src/api/api_msg.d
new file mode 100644
index 0000000..a3be732
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/api_msg.d
@@ -0,0 +1,325 @@
+Middlewares/Third_Party/LwIP/src/api/api_msg.o: \
+ ../Middlewares/Third_Party/LwIP/src/api/api_msg.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/api_msg.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/api.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/raw.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dns.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/api_msg.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/api.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/raw.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dns.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/api_msg.o b/Debug/Middlewares/Third_Party/LwIP/src/api/api_msg.o
new file mode 100644
index 0000000..c932d51
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/api/api_msg.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/api_msg.su b/Debug/Middlewares/Third_Party/LwIP/src/api/api_msg.su
new file mode 100644
index 0000000..091ba5a
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/api_msg.su
@@ -0,0 +1,28 @@
+api_msg.c:115:1:lwip_netconn_err_to_msg	16	static
+api_msg.c:131:1:lwip_netconn_is_err_msg	16	static
+api_msg.c:218:1:recv_udp	40	static
+api_msg.c:293:1:recv_tcp	40	static
+api_msg.c:357:1:poll_tcp	24	static
+api_msg.c:398:1:sent_tcp	32	static
+api_msg.c:432:1:err_tcp	40	static
+api_msg.c:514:1:setup_tcp	24	static
+api_msg.c:533:1:accept_function	48	static
+api_msg.c:609:1:pcb_new	32	static
+api_msg.c:680:1:lwip_netconn_do_newconn	24	static
+api_msg.c:705:1:netconn_alloc	32	static
+api_msg.c:794:1:netconn_free	16	static
+api_msg.c:827:1:netconn_drain	32	static
+api_msg.c:920:1:lwip_netconn_do_close_internal	32	static
+api_msg.c:1113:1:lwip_netconn_do_delconn	24	static
+api_msg.c:1216:1:lwip_netconn_do_bind	24	static
+api_msg.c:1256:1:lwip_netconn_do_bind_if	32	static
+api_msg.c:1301:1:lwip_netconn_do_connected	40	static
+api_msg.c:1350:1:lwip_netconn_do_connect	32	static
+api_msg.c:1425:1:lwip_netconn_do_disconnect	24	static
+api_msg.c:1449:1:lwip_netconn_do_listen	32	static
+api_msg.c:1532:1:lwip_netconn_do_send	24	static
+api_msg.c:1589:1:lwip_netconn_do_recv	32	static
+api_msg.c:1640:1:lwip_netconn_do_writemore	40	static
+api_msg.c:1813:1:lwip_netconn_do_write	24	static
+api_msg.c:1867:1:lwip_netconn_do_getaddr	24	static
+api_msg.c:1934:1:lwip_netconn_do_close	24	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/err.d b/Debug/Middlewares/Third_Party/LwIP/src/api/err.d
new file mode 100644
index 0000000..a49373d
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/err.d
@@ -0,0 +1,229 @@
+Middlewares/Third_Party/LwIP/src/api/err.o: \
+ ../Middlewares/Third_Party/LwIP/src/api/err.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/err.o b/Debug/Middlewares/Third_Party/LwIP/src/api/err.o
new file mode 100644
index 0000000..3140470
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/api/err.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/err.su b/Debug/Middlewares/Third_Party/LwIP/src/api/err.su
new file mode 100644
index 0000000..9737952
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/err.su
@@ -0,0 +1 @@
+err.c:69:1:err_to_errno	16	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/if_api.d b/Debug/Middlewares/Third_Party/LwIP/src/api/if_api.d
new file mode 100644
index 0000000..5401dca
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/if_api.d
@@ -0,0 +1,280 @@
+Middlewares/Third_Party/LwIP/src/api/if_api.o: \
+ ../Middlewares/Third_Party/LwIP/src/api/if_api.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/if_api.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netifapi.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/sockets_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sockets.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/inet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/if_api.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netifapi.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/sockets_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sockets.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/inet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/if_api.o b/Debug/Middlewares/Third_Party/LwIP/src/api/if_api.o
new file mode 100644
index 0000000..261f698
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/api/if_api.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/if_api.su b/Debug/Middlewares/Third_Party/LwIP/src/api/if_api.su
new file mode 100644
index 0000000..96b8eea
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/if_api.su
@@ -0,0 +1,2 @@
+if_api.c:61:1:lwip_if_indextoname	16	static
+if_api.c:86:1:lwip_if_nametoindex	16	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/netbuf.d b/Debug/Middlewares/Third_Party/LwIP/src/api/netbuf.d
new file mode 100644
index 0000000..8e79a8c
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/netbuf.d
@@ -0,0 +1,205 @@
+Middlewares/Third_Party/LwIP/src/api/netbuf.o: \
+ ../Middlewares/Third_Party/LwIP/src/api/netbuf.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/netbuf.o b/Debug/Middlewares/Third_Party/LwIP/src/api/netbuf.o
new file mode 100644
index 0000000..6c06584
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/api/netbuf.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/netbuf.su b/Debug/Middlewares/Third_Party/LwIP/src/api/netbuf.su
new file mode 100644
index 0000000..902e6f0
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/netbuf.su
@@ -0,0 +1,9 @@
+netbuf.c:63:9:netbuf_new	16	static
+netbuf.c:81:1:netbuf_delete	16	static
+netbuf.c:102:1:netbuf_alloc	16	static
+netbuf.c:127:1:netbuf_free	16	static
+netbuf.c:151:1:netbuf_ref	24	static
+netbuf.c:176:1:netbuf_chain	16	static
+netbuf.c:196:1:netbuf_data	24	static
+netbuf.c:222:1:netbuf_next	16	static
+netbuf.c:244:1:netbuf_first	16	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/netdb.d b/Debug/Middlewares/Third_Party/LwIP/src/api/netdb.d
new file mode 100644
index 0000000..fb64c65
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/netdb.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/api/netdb.o: \
+ ../Middlewares/Third_Party/LwIP/src/api/netdb.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netdb.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netdb.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/netdb.o b/Debug/Middlewares/Third_Party/LwIP/src/api/netdb.o
new file mode 100644
index 0000000..37c5cfe
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/api/netdb.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/netdb.su b/Debug/Middlewares/Third_Party/LwIP/src/api/netdb.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/netifapi.d b/Debug/Middlewares/Third_Party/LwIP/src/api/netifapi.d
new file mode 100644
index 0000000..9c8561a
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/netifapi.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/api/netifapi.o: \
+ ../Middlewares/Third_Party/LwIP/src/api/netifapi.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/netifapi.o b/Debug/Middlewares/Third_Party/LwIP/src/api/netifapi.o
new file mode 100644
index 0000000..75c5aaa
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/api/netifapi.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/netifapi.su b/Debug/Middlewares/Third_Party/LwIP/src/api/netifapi.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/sockets.d b/Debug/Middlewares/Third_Party/LwIP/src/api/sockets.d
new file mode 100644
index 0000000..f423768
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/sockets.d
@@ -0,0 +1,331 @@
+Middlewares/Third_Party/LwIP/src/api/sockets.o: \
+ ../Middlewares/Third_Party/LwIP/src/api/sockets.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sockets.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/inet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/sockets_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/api.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/raw.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sockets.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/inet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/sockets_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/api.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/raw.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/sockets.o b/Debug/Middlewares/Third_Party/LwIP/src/api/sockets.o
new file mode 100644
index 0000000..3fc1ffb
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/api/sockets.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/sockets.su b/Debug/Middlewares/Third_Party/LwIP/src/api/sockets.su
new file mode 100644
index 0000000..4932b89
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/sockets.su
@@ -0,0 +1,54 @@
+sockets.c:320:1:lwip_socket_thread_init	4	static
+sockets.c:327:1:lwip_socket_thread_cleanup	4	static
+sockets.c:411:1:tryget_socket_unconn_nouse	24	static
+sockets.c:422:1:lwip_socket_dbg_get_socket	16	static
+sockets.c:429:1:tryget_socket_unconn	24	static
+sockets.c:442:1:tryget_socket_unconn_locked	24	static
+sockets.c:460:1:tryget_socket	24	static
+sockets.c:479:1:get_socket	24	static
+sockets.c:501:1:alloc_socket	24	static
+sockets.c:548:1:free_socket_locked	24	static
+sockets.c:572:1:free_socket_free_elements	24	static
+sockets.c:594:1:free_socket	32	static
+sockets.c:620:1:lwip_accept	112	static
+sockets.c:718:1:lwip_bind	48	static
+sockets.c:772:1:lwip_close	32	static
+sockets.c:813:1:lwip_connect	56	static
+sockets.c:881:1:lwip_listen	40	static
+sockets.c:920:1:lwip_recv_tcp	56	static
+sockets.c:1023:1:lwip_sock_make_addr	56	static
+sockets.c:1056:1:lwip_recv_tcp_from	40	static
+sockets.c:1088:1:lwip_recvfrom_udp_raw	64	static
+sockets.c:1199:1:lwip_recvfrom	96	static
+sockets.c:1252:1:lwip_read	32	static
+sockets.c:1258:1:lwip_readv	56	static
+sockets.c:1275:1:lwip_recv	32	static
+sockets.c:1281:1:lwip_recvmsg	80	static
+sockets.c:1382:1:lwip_send	48	static
+sockets.c:1422:1:lwip_sendmsg	120	static
+sockets.c:1585:1:lwip_sendto	64	static
+sockets.c:1685:1:lwip_socket	32	static
+sockets.c:1746:1:lwip_write	24	static
+sockets.c:1752:1:lwip_writev	56	static
+sockets.c:1771:1:lwip_link_select_cb	16	static
+sockets.c:1795:1:lwip_unlink_select_cb	16	static
+sockets.c:1835:1:lwip_selscan	104	static
+sockets.c:1964:1:lwip_select	144	static
+sockets.c:2193:1:lwip_pollscan	56	static
+sockets.c:2319:1:lwip_poll	72	static
+sockets.c:2438:1:lwip_poll_should_wake	32	static
+sockets.c:2477:1:event_callback	48	static
+sockets.c:2576:13:select_check_waiters	40	static
+sockets.c:2655:1:lwip_shutdown	48	static
+sockets.c:2700:1:lwip_getaddrname	72	static
+sockets.c:2747:1:lwip_getpeername	24	static
+sockets.c:2753:1:lwip_getsockname	24	static
+sockets.c:2759:1:lwip_getsockopt	48	static
+sockets.c:2859:1:lwip_sockopt_to_ipopt	16	static
+sockets.c:2882:1:lwip_getsockopt_impl	32	static
+sockets.c:3205:1:lwip_setsockopt	48	static
+sockets.c:3303:1:lwip_setsockopt_impl	40	static
+sockets.c:3743:1:lwip_ioctl	40	static
+sockets.c:3836:1:lwip_fcntl	56	static
+sockets.c:3919:1:lwip_inet_ntop	32	static
+sockets.c:3952:1:lwip_inet_pton	32	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/subdir.mk b/Debug/Middlewares/Third_Party/LwIP/src/api/subdir.mk
new file mode 100644
index 0000000..1614065
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/subdir.mk
@@ -0,0 +1,59 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/LwIP/src/api/api_lib.c \
+../Middlewares/Third_Party/LwIP/src/api/api_msg.c \
+../Middlewares/Third_Party/LwIP/src/api/err.c \
+../Middlewares/Third_Party/LwIP/src/api/if_api.c \
+../Middlewares/Third_Party/LwIP/src/api/netbuf.c \
+../Middlewares/Third_Party/LwIP/src/api/netdb.c \
+../Middlewares/Third_Party/LwIP/src/api/netifapi.c \
+../Middlewares/Third_Party/LwIP/src/api/sockets.c \
+../Middlewares/Third_Party/LwIP/src/api/tcpip.c 
+
+OBJS += \
+./Middlewares/Third_Party/LwIP/src/api/api_lib.o \
+./Middlewares/Third_Party/LwIP/src/api/api_msg.o \
+./Middlewares/Third_Party/LwIP/src/api/err.o \
+./Middlewares/Third_Party/LwIP/src/api/if_api.o \
+./Middlewares/Third_Party/LwIP/src/api/netbuf.o \
+./Middlewares/Third_Party/LwIP/src/api/netdb.o \
+./Middlewares/Third_Party/LwIP/src/api/netifapi.o \
+./Middlewares/Third_Party/LwIP/src/api/sockets.o \
+./Middlewares/Third_Party/LwIP/src/api/tcpip.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/LwIP/src/api/api_lib.d \
+./Middlewares/Third_Party/LwIP/src/api/api_msg.d \
+./Middlewares/Third_Party/LwIP/src/api/err.d \
+./Middlewares/Third_Party/LwIP/src/api/if_api.d \
+./Middlewares/Third_Party/LwIP/src/api/netbuf.d \
+./Middlewares/Third_Party/LwIP/src/api/netdb.d \
+./Middlewares/Third_Party/LwIP/src/api/netifapi.d \
+./Middlewares/Third_Party/LwIP/src/api/sockets.d \
+./Middlewares/Third_Party/LwIP/src/api/tcpip.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/LwIP/src/api/api_lib.o: ../Middlewares/Third_Party/LwIP/src/api/api_lib.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/api/api_lib.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/api/api_msg.o: ../Middlewares/Third_Party/LwIP/src/api/api_msg.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/api/api_msg.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/api/err.o: ../Middlewares/Third_Party/LwIP/src/api/err.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/api/err.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/api/if_api.o: ../Middlewares/Third_Party/LwIP/src/api/if_api.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/api/if_api.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/api/netbuf.o: ../Middlewares/Third_Party/LwIP/src/api/netbuf.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/api/netbuf.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/api/netdb.o: ../Middlewares/Third_Party/LwIP/src/api/netdb.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/api/netdb.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/api/netifapi.o: ../Middlewares/Third_Party/LwIP/src/api/netifapi.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/api/netifapi.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/api/sockets.o: ../Middlewares/Third_Party/LwIP/src/api/sockets.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/api/sockets.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/api/tcpip.o: ../Middlewares/Third_Party/LwIP/src/api/tcpip.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/api/tcpip.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/tcpip.d b/Debug/Middlewares/Third_Party/LwIP/src/api/tcpip.d
new file mode 100644
index 0000000..28e2062
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/tcpip.d
@@ -0,0 +1,304 @@
+Middlewares/Third_Party/LwIP/src/api/tcpip.o: \
+ ../Middlewares/Third_Party/LwIP/src/api/tcpip.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/init.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/init.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/tcpip.o b/Debug/Middlewares/Third_Party/LwIP/src/api/tcpip.o
new file mode 100644
index 0000000..114064e
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/api/tcpip.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/api/tcpip.su b/Debug/Middlewares/Third_Party/LwIP/src/api/tcpip.su
new file mode 100644
index 0000000..dc58b63
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/api/tcpip.su
@@ -0,0 +1,17 @@
+tcpip.c:84:1:tcpip_timeouts_mbox_fetch	24	static
+tcpip.c:127:1:tcpip_thread	24	static
+tcpip.c:156:1:tcpip_thread_handle_msg	16	static
+tcpip.c:240:1:tcpip_inpkt	32	static
+tcpip.c:283:1:tcpip_input	16	static
+tcpip.c:309:1:tcpip_callback	24	static
+tcpip.c:345:1:tcpip_try_callback	24	static
+tcpip.c:437:1:tcpip_send_msg_wait_sem	24	static
+tcpip.c:473:1:tcpip_api_call	24	static
+tcpip.c:531:1:tcpip_callbackmsg_new	24	static
+tcpip.c:552:1:tcpip_callbackmsg_delete	16	static
+tcpip.c:567:1:tcpip_callbackmsg_trycallback	16	static
+tcpip.c:586:1:tcpip_callbackmsg_trycallback_fromisr	16	static
+tcpip.c:602:1:tcpip_init	24	static
+tcpip.c:627:1:pbuf_free_int	24	static
+tcpip.c:640:1:pbuf_free_callback	16	static
+tcpip.c:653:1:mem_free_callback	16	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.d b/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.d
new file mode 100644
index 0000000..2f90df9
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.d
@@ -0,0 +1,313 @@
+Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o: \
+ ../Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/iana.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/altcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/altcp_tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/altcp_tls.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/iana.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/apps/mqtt_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/altcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/altcp_tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/altcp_tls.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o b/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
new file mode 100644
index 0000000..9071364
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.su b/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.su
new file mode 100644
index 0000000..d4859a4
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.su
@@ -0,0 +1,38 @@
+mqtt.c:170:1:msg_generate_packet_id	16	static
+mqtt.c:184:1:mqtt_ringbuf_put	16	static
+mqtt.c:195:1:mqtt_ringbuf_get_ptr	16	static
+mqtt.c:201:1:mqtt_ringbuf_advance_get_idx	16	static
+mqtt.c:213:1:mqtt_ringbuf_len	24	static
+mqtt.c:234:1:mqtt_output_send	32	static
+mqtt.c:287:1:mqtt_create_request	32	static
+mqtt.c:313:1:mqtt_append_request	32	static
+mqtt.c:342:1:mqtt_delete_request	16	static
+mqtt.c:356:1:mqtt_take_request	24	static
+mqtt.c:391:1:mqtt_request_time_elapsed	24	static
+mqtt.c:420:1:mqtt_clear_requests	24	static
+mqtt.c:436:1:mqtt_init_requests	24	static
+mqtt.c:451:1:mqtt_output_append_u8	16	static
+mqtt.c:457:6:mqtt_output_append_u16	16	static
+mqtt.c:464:1:mqtt_output_append_buf	32	static
+mqtt.c:473:1:mqtt_output_append_string	32	static
+mqtt.c:494:1:mqtt_output_append_fixed_header	16	static
+mqtt.c:514:1:mqtt_output_check_space	32	static
+mqtt.c:537:1:mqtt_close	24	static
+mqtt.c:576:1:mqtt_cyclic_timer	32	static
+mqtt.c:635:1:pub_ack_rec_rel_response	32	static
+mqtt.c:656:1:mqtt_incomming_suback	16	static
+mqtt.c:672:1:mqtt_message_received	72	static
+mqtt.c:839:1:mqtt_parse_incoming	40	static
+mqtt.c:932:1:mqtt_tcp_recv_cb	32	static
+mqtt.c:976:1:mqtt_tcp_sent_cb	32	static
+mqtt.c:1009:1:mqtt_tcp_err_cb	24	static
+mqtt.c:1027:1:mqtt_tcp_poll_cb	24	static
+mqtt.c:1044:1:mqtt_tcp_connect_cb	32	static
+mqtt.c:1097:1:mqtt_publish	56	static
+mqtt.c:1173:1:mqtt_sub_unsub	56	static
+mqtt.c:1238:1:mqtt_set_inpub_callback	24	static
+mqtt.c:1254:1:mqtt_client_new	8	static
+mqtt.c:1266:1:mqtt_client_free	16	static
+mqtt.c:1283:1:mqtt_client_connect	56	static
+mqtt.c:1437:1:mqtt_disconnect	16	static
+mqtt.c:1456:1:mqtt_client_is_connected	16	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/subdir.mk b/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/subdir.mk
new file mode 100644
index 0000000..dac9681
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/apps/mqtt/subdir.mk
@@ -0,0 +1,19 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.c 
+
+OBJS += \
+./Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o: ../Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/altcp.d b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp.d
new file mode 100644
index 0000000..9c70a89
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/altcp.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/altcp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/altcp.o b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp.o
new file mode 100644
index 0000000..19a5ef2
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/altcp.su b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_alloc.d b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_alloc.d
new file mode 100644
index 0000000..0556c04
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_alloc.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/altcp_alloc.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
new file mode 100644
index 0000000..6f389cb
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_alloc.su b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_alloc.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_tcp.d b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_tcp.d
new file mode 100644
index 0000000..792d4d0
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_tcp.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/altcp_tcp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
new file mode 100644
index 0000000..4468b81
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_tcp.su b/Debug/Middlewares/Third_Party/LwIP/src/core/altcp_tcp.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/def.d b/Debug/Middlewares/Third_Party/LwIP/src/core/def.d
new file mode 100644
index 0000000..8ca7b7a
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/def.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/core/def.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/def.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/def.o b/Debug/Middlewares/Third_Party/LwIP/src/core/def.o
new file mode 100644
index 0000000..aca56a0
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/def.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/def.su b/Debug/Middlewares/Third_Party/LwIP/src/core/def.su
new file mode 100644
index 0000000..90761fe
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/def.su
@@ -0,0 +1,6 @@
+def.c:76:1:lwip_htons	16	static
+def.c:90:1:lwip_htonl	16	static
+def.c:105:1:lwip_strnstr	32	static
+def.c:128:1:lwip_stricmp	24	static
+def.c:163:1:lwip_strnicmp	32	static
+def.c:199:1:lwip_itoa	40	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/dns.d b/Debug/Middlewares/Third_Party/LwIP/src/core/dns.d
new file mode 100644
index 0000000..fb2884e
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/dns.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/dns.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/dns.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/dns.o b/Debug/Middlewares/Third_Party/LwIP/src/core/dns.o
new file mode 100644
index 0000000..68f5a10
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/dns.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/dns.su b/Debug/Middlewares/Third_Party/LwIP/src/core/dns.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/inet_chksum.d b/Debug/Middlewares/Third_Party/LwIP/src/core/inet_chksum.d
new file mode 100644
index 0000000..ac25017
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/inet_chksum.d
@@ -0,0 +1,187 @@
+Middlewares/Third_Party/LwIP/src/core/inet_chksum.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/inet_chksum.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/inet_chksum.o b/Debug/Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
new file mode 100644
index 0000000..d777da8
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/inet_chksum.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/inet_chksum.su b/Debug/Middlewares/Third_Party/LwIP/src/core/inet_chksum.su
new file mode 100644
index 0000000..7854193
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/inet_chksum.su
@@ -0,0 +1,9 @@
+inet_chksum.c:133:1:lwip_standard_chksum	40	static
+inet_chksum.c:260:1:inet_cksum_pseudo_base	32	static
+inet_chksum.c:310:1:inet_chksum_pseudo	32	static
+inet_chksum.c:379:1:ip_chksum_pseudo	32	static
+inet_chksum.c:399:1:inet_cksum_pseudo_partial_base	40	static
+inet_chksum.c:456:1:inet_chksum_pseudo_partial	40	static
+inet_chksum.c:526:1:ip_chksum_pseudo_partial	32	static
+inet_chksum.c:555:1:inet_chksum	16	static
+inet_chksum.c:568:1:inet_chksum_pbuf	32	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/init.d b/Debug/Middlewares/Third_Party/LwIP/src/core/init.d
new file mode 100644
index 0000000..455245f
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/init.d
@@ -0,0 +1,355 @@
+Middlewares/Third_Party/LwIP/src/core/init.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/init.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/init.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sockets.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/inet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/raw.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dns.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/api.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_impl.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/init.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sockets.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/inet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/raw.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dns.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/api.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_impl.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/init.o b/Debug/Middlewares/Third_Party/LwIP/src/core/init.o
new file mode 100644
index 0000000..1a88fab
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/init.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/init.su b/Debug/Middlewares/Third_Party/LwIP/src/core/init.su
new file mode 100644
index 0000000..d2a9aba
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/init.su
@@ -0,0 +1 @@
+init.c:332:1:lwip_init	16	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ip.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ip.d
new file mode 100644
index 0000000..a0a4a59
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ip.d
@@ -0,0 +1,220 @@
+Middlewares/Third_Party/LwIP/src/core/ip.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ip.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ip.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ip.o
new file mode 100644
index 0000000..608eeaa
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ip.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ip.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ip.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.d
new file mode 100644
index 0000000..17eeb94
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
new file mode 100644
index 0000000..6b17eed
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.d
new file mode 100644
index 0000000..d1d3fdc
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.d
@@ -0,0 +1,253 @@
+Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/autoip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dns.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/dhcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/iana.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/autoip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dns.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/dhcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/iana.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
new file mode 100644
index 0000000..eb8be50
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.su
new file mode 100644
index 0000000..206b5d9
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.su
@@ -0,0 +1,37 @@
+dhcp.c:226:1:dhcp_inc_pcb_refcount	8	static
+dhcp.c:253:1:dhcp_dec_pcb_refcount	8	static
+dhcp.c:277:1:dhcp_handle_nak	24	static
+dhcp.c:303:1:dhcp_check	24	static
+dhcp.c:332:1:dhcp_handle_offer	24	static
+dhcp.c:366:1:dhcp_select	56	static
+dhcp.c:430:1:dhcp_coarse_tmr	16	static
+dhcp.c:468:1:dhcp_fine_tmr	16	static
+dhcp.c:499:1:dhcp_timeout	24	static
+dhcp.c:546:1:dhcp_t1_timeout	24	static
+dhcp.c:573:1:dhcp_t2_timeout	24	static
+dhcp.c:599:1:dhcp_handle_ack	24	static
+dhcp.c:690:1:dhcp_set_struct	16	static
+dhcp.c:712:6:dhcp_cleanup	16	static
+dhcp.c:737:1:dhcp_start	24	static
+dhcp.c:814:1:dhcp_inform	88	static
+dhcp.c:858:1:dhcp_network_changed	24	static
+dhcp.c:903:1:dhcp_arp_reply	24	static
+dhcp.c:935:1:dhcp_decline	56	static
+dhcp.c:981:1:dhcp_discover	48	static
+dhcp.c:1040:1:dhcp_bind	40	static
+dhcp.c:1150:1:dhcp_renew	48	static
+dhcp.c:1206:1:dhcp_rebind	48	static
+dhcp.c:1260:1:dhcp_reboot	56	static
+dhcp.c:1318:1:dhcp_release_and_stop	56	static
+dhcp.c:1394:1:dhcp_release	16	static
+dhcp.c:1406:1:dhcp_stop	16	static
+dhcp.c:1417:1:dhcp_set_state	16	static
+dhcp.c:1432:1:dhcp_option	16	static
+dhcp.c:1444:1:dhcp_option_byte	16	static
+dhcp.c:1452:1:dhcp_option_short	16	static
+dhcp.c:1461:1:dhcp_option_long	24	static
+dhcp.c:1507:1:dhcp_parse_reply	72	static
+dhcp.c:1754:1:dhcp_recv	48	static
+dhcp.c:1874:1:dhcp_create_msg	40	static
+dhcp.c:1960:1:dhcp_option_trailer	24	static
+dhcp.c:1980:1:dhcp_supplied_address	24	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.d
new file mode 100644
index 0000000..df3026d
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.d
@@ -0,0 +1,253 @@
+Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/autoip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/iana.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/autoip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/iana.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
new file mode 100644
index 0000000..8752d82
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.su
new file mode 100644
index 0000000..495dd50
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.su
@@ -0,0 +1,14 @@
+etharp.c:168:1:etharp_free_entry	16	static
+etharp.c:197:1:etharp_tmr	16	static
+etharp.c:256:1:etharp_find_entry	48	static
+etharp.c:422:1:etharp_update_arp_entry	40	static
+etharp.c:559:1:etharp_cleanup_netif	24	static
+etharp.c:583:1:etharp_find_addr	32	static
+etharp.c:612:1:etharp_get_entry	24	static
+etharp.c:641:1:etharp_input	56	static
+etharp.c:748:1:etharp_output_to_arp_index	32	static
+etharp.c:791:1:etharp_output	48	static
+etharp.c:933:1:etharp_query	56	static
+etharp.c:1101:1:etharp_raw	48	static
+etharp.c:1181:1:etharp_request_dst	40	static
+etharp.c:1198:1:etharp_request	16	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.d
new file mode 100644
index 0000000..c9d0d91
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.d
@@ -0,0 +1,229 @@
+Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
new file mode 100644
index 0000000..25ea175
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.su
new file mode 100644
index 0000000..f10993f
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.su
@@ -0,0 +1,4 @@
+icmp.c:80:1:icmp_input	64	static
+icmp.c:308:1:icmp_dest_unreach	16	static
+icmp.c:323:1:icmp_time_exceeded	16	static
+icmp.c:340:1:icmp_send_response	56	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.d
new file mode 100644
index 0000000..8cdbd97
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
new file mode 100644
index 0000000..b98fe7d
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.d
new file mode 100644
index 0000000..cba4fc1
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.d
@@ -0,0 +1,262 @@
+Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_frag.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/raw_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/autoip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/iana.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_frag.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/raw_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/autoip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/iana.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
new file mode 100644
index 0000000..9edfcfd
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.su
new file mode 100644
index 0000000..2567ced
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.su
@@ -0,0 +1,6 @@
+ip4.c:152:1:ip4_route	24	static
+ip4.c:374:1:ip4_input_accept	16	static
+ip4.c:426:1:ip4_input	40	static
+ip4.c:787:1:ip4_output_if	48	static
+ip4.c:827:1:ip4_output_if_src	40	static
+ip4.c:1028:1:ip4_output	48	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.d
new file mode 100644
index 0000000..52a8fa6
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.d
@@ -0,0 +1,205 @@
+Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
new file mode 100644
index 0000000..2a98b95
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.su
new file mode 100644
index 0000000..986dbc8
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.su
@@ -0,0 +1,6 @@
+ip4_addr.c:58:1:ip4_addr_isbroadcast_u32	24	static
+ip4_addr.c:93:1:ip4_addr_netmask_valid	24	static
+ip4_addr.c:123:1:ipaddr_addr	24	static
+ip4_addr.c:145:1:ip4addr_aton	56	static
+ip4_addr.c:267:1:ip4addr_ntoa	16	static
+ip4_addr.c:283:1:ip4addr_ntoa_r	56	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.d
new file mode 100644
index 0000000..931f191
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.d
@@ -0,0 +1,232 @@
+Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_frag.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_frag.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
new file mode 100644
index 0000000..1a4ab89
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.su
new file mode 100644
index 0000000..d94fb68
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.su
@@ -0,0 +1,11 @@
+ip4_frag.c:128:1:ip_reass_tmr	24	static
+ip4_frag.c:164:1:ip_reass_free_complete_datagram	40	static
+ip4_frag.c:227:1:ip_reass_remove_oldest_datagram	48	static
+ip4_frag.c:278:1:ip_reass_enqueue_new_datagram	24	static
+ip4_frag.c:317:1:ip_reass_dequeue_datagram	16	static
+ip4_frag.c:344:1:ip_reass_chain_frag_into_datagram_and_validate	56	static
+ip4_frag.c:503:1:ip4_reass	64	static
+ip4_frag.c:699:1:ip_frag_alloc_pbuf_custom_ref	8	static
+ip4_frag.c:706:1:ip_frag_free_pbuf_custom_ref	16	static
+ip4_frag.c:715:1:ipfrag_free_pbuf_custom	24	static
+ip4_frag.c:740:1:ip4_frag	88	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/subdir.mk b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/subdir.mk
new file mode 100644
index 0000000..065eae5
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv4/subdir.mk
@@ -0,0 +1,54 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.c 
+
+OBJS += \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o: ../Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o: ../Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o: ../Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o: ../Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o: ../Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o: ../Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o: ../Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o: ../Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.d
new file mode 100644
index 0000000..4e8c88e
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
new file mode 100644
index 0000000..764e359
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.d
new file mode 100644
index 0000000..8601e99
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
new file mode 100644
index 0000000..4680bf7
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.d
new file mode 100644
index 0000000..95d89f7
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
new file mode 100644
index 0000000..1875925
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.d
new file mode 100644
index 0000000..b01a86c
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
new file mode 100644
index 0000000..7b6ab57
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.d
new file mode 100644
index 0000000..c95273e
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
new file mode 100644
index 0000000..66d8fa4
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.d
new file mode 100644
index 0000000..81a4579
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
new file mode 100644
index 0000000..09640fb
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.d
new file mode 100644
index 0000000..218eda2
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.d
@@ -0,0 +1,232 @@
+Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_frag.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_frag.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
new file mode 100644
index 0000000..3e2a78b
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.d
new file mode 100644
index 0000000..96fc435
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
new file mode 100644
index 0000000..43d0861
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.d b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.d
new file mode 100644
index 0000000..523ba2e
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
new file mode 100644
index 0000000..ef2506c
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.su b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/subdir.mk b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/subdir.mk
new file mode 100644
index 0000000..0fbee7d
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/ipv6/subdir.mk
@@ -0,0 +1,59 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.c \
+../Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.c 
+
+OBJS += \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.d \
+./Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o: ../Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o: ../Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o: ../Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o: ../Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o: ../Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o: ../Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o: ../Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o: ../Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o: ../Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/mem.d b/Debug/Middlewares/Third_Party/LwIP/src/core/mem.d
new file mode 100644
index 0000000..b148367
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/mem.d
@@ -0,0 +1,244 @@
+Middlewares/Third_Party/LwIP/src/core/mem.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/mem.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/mem.o b/Debug/Middlewares/Third_Party/LwIP/src/core/mem.o
new file mode 100644
index 0000000..944ab5d
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/mem.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/mem.su b/Debug/Middlewares/Third_Party/LwIP/src/core/mem.su
new file mode 100644
index 0000000..7b321fa
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/mem.su
@@ -0,0 +1,9 @@
+mem.c:451:1:ptr_to_mem	16	static
+mem.c:457:1:mem_to_ptr	16	static
+mem.c:474:1:plug_holes	32	static
+mem.c:516:1:mem_init	16	static
+mem.c:551:1:mem_link_valid	32	static
+mem.c:617:1:mem_free	40	static
+mem.c:699:1:mem_trim	40	static
+mem.c:831:1:mem_malloc	40	static
+mem.c:999:1:mem_calloc	24	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/memp.d b/Debug/Middlewares/Third_Party/LwIP/src/core/memp.d
new file mode 100644
index 0000000..3aa08d1
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/memp.d
@@ -0,0 +1,373 @@
+Middlewares/Third_Party/LwIP/src/core/memp.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/memp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/raw.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/altcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_frag.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/api.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/api_msg.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/sockets_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sockets.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/inet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netdb.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dns.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/nd6_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_frag.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/raw.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/altcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_frag.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/api.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/api_msg.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/sockets_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sockets.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/inet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/errno.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netdb.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dns.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/nd6_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_frag.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/memp.o b/Debug/Middlewares/Third_Party/LwIP/src/core/memp.o
new file mode 100644
index 0000000..f2ddf64
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/memp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/memp.su b/Debug/Middlewares/Third_Party/LwIP/src/core/memp.su
new file mode 100644
index 0000000..965e99f
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/memp.su
@@ -0,0 +1,8 @@
+memp.c:175:1:memp_init_pool	24	static
+memp.c:224:1:memp_init	16	static
+memp.c:245:1:do_memp_malloc_pool	24	static
+memp.c:311:1:memp_malloc_pool	16	static
+memp.c:337:1:memp_malloc	24	static
+memp.c:359:1:do_memp_free_pool	24	static
+memp.c:403:1:memp_free_pool	16	static
+memp.c:420:1:memp_free	16	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/netif.d b/Debug/Middlewares/Third_Party/LwIP/src/core/netif.d
new file mode 100644
index 0000000..9d8231b
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/netif.d
@@ -0,0 +1,328 @@
+Middlewares/Third_Party/LwIP/src/core/netif.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/netif.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/raw_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/raw_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/netif.o b/Debug/Middlewares/Third_Party/LwIP/src/core/netif.o
new file mode 100644
index 0000000..fd56c2c
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/netif.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/netif.su b/Debug/Middlewares/Third_Party/LwIP/src/core/netif.su
new file mode 100644
index 0000000..22d9ae4
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/netif.su
@@ -0,0 +1,25 @@
+netif.c:177:1:netif_init	4	static
+netif.c:217:1:netif_input	16	static
+netif.c:239:1:netif_add_noaddr	40	static
+netif.c:276:1:netif_add	32	static
+netif.c:442:1:netif_do_ip_addr_changed	16	static
+netif.c:457:1:netif_do_set_ipaddr	32	static
+netif.c:500:1:netif_set_ipaddr	24	static
+netif.c:523:1:netif_do_set_netmask	24	static
+netif.c:560:1:netif_set_netmask	24	static
+netif.c:587:1:netif_do_set_gw	24	static
+netif.c:621:1:netif_set_gw	24	static
+netif.c:658:1:netif_set_addr	40	static
+netif.c:737:1:netif_remove	24	static
+netif.c:822:1:netif_set_default	16	static
+netif.c:844:1:netif_set_up	16	static
+netif.c:875:1:netif_issue_reports	16	static
+netif.c:919:1:netif_set_down	16	static
+netif.c:988:1:netif_set_link_up	16	static
+netif.c:1026:1:netif_set_link_down	16	static
+netif.c:1051:1:netif_set_link_callback	16	static
+netif.c:1619:1:netif_null_output_ip4	24	static
+netif.c:1637:1:netif_name_to_index	24	static
+netif.c:1656:1:netif_index_to_name	24	static
+netif.c:1676:1:netif_get_by_index	24	static
+netif.c:1701:1:netif_find	24	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/pbuf.d b/Debug/Middlewares/Third_Party/LwIP/src/core/pbuf.d
new file mode 100644
index 0000000..d8bbafd
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/pbuf.d
@@ -0,0 +1,301 @@
+Middlewares/Third_Party/LwIP/src/core/pbuf.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/pbuf.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/pbuf.o b/Debug/Middlewares/Third_Party/LwIP/src/core/pbuf.o
new file mode 100644
index 0000000..de02ce3
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/pbuf.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/pbuf.su b/Debug/Middlewares/Third_Party/LwIP/src/core/pbuf.su
new file mode 100644
index 0000000..a919917
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/pbuf.su
@@ -0,0 +1,37 @@
+pbuf.c:128:1:pbuf_free_ooseq	16	static
+pbuf.c:148:1:pbuf_free_ooseq_callback	16	static
+pbuf.c:157:1:pbuf_pool_is_empty	16	static
+pbuf.c:179:1:pbuf_init_alloced_pbuf	24	static
+pbuf.c:224:1:pbuf_alloc	56	static
+pbuf.c:327:1:pbuf_alloc_reference	32	static
+pbuf.c:363:1:pbuf_alloced_custom	40	static
+pbuf.c:402:1:pbuf_realloc	24	static
+pbuf.c:473:1:pbuf_add_header_impl	32	static
+pbuf.c:551:1:pbuf_add_header	16	static
+pbuf.c:561:1:pbuf_add_header_force	16	static
+pbuf.c:582:1:pbuf_remove_header	24	static
+pbuf.c:616:1:pbuf_header_impl	16	static
+pbuf.c:646:1:pbuf_header	16	static
+pbuf.c:656:1:pbuf_header_force	16	static
+pbuf.c:671:1:pbuf_free_header	32	static
+pbuf.c:725:1:pbuf_free	40	static
+pbuf.c:809:1:pbuf_clen	24	static
+pbuf.c:829:1:pbuf_ref	24	static
+pbuf.c:853:1:pbuf_cat	24	static
+pbuf.c:895:1:pbuf_chain	16	static
+pbuf.c:912:1:pbuf_dechain	24	static
+pbuf.c:961:1:pbuf_copy	32	static
+pbuf.c:1027:1:pbuf_copy_partial	40	static
+pbuf.c:1074:1:pbuf_get_contiguous	32	static
+pbuf.c:1152:1:pbuf_skip_const	32	static
+pbuf.c:1178:1:pbuf_skip	32	static
+pbuf.c:1196:1:pbuf_take	40	static
+pbuf.c:1240:1:pbuf_take_at	40	static
+pbuf.c:1278:1:pbuf_coalesce	24	static
+pbuf.c:1306:1:pbuf_clone	24	static
+pbuf.c:1371:1:pbuf_get_at	24	static
+pbuf.c:1389:1:pbuf_try_get_at	24	static
+pbuf.c:1411:1:pbuf_put_at	24	static
+pbuf.c:1434:1:pbuf_memcmp	40	static
+pbuf.c:1476:1:pbuf_memfind	32	static
+pbuf.c:1503:1:pbuf_strstr	24	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/raw.d b/Debug/Middlewares/Third_Party/LwIP/src/core/raw.d
new file mode 100644
index 0000000..c25368d
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/raw.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/raw.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/raw.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/raw.o b/Debug/Middlewares/Third_Party/LwIP/src/core/raw.o
new file mode 100644
index 0000000..a84f1c3
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/raw.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/raw.su b/Debug/Middlewares/Third_Party/LwIP/src/core/raw.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/stats.d b/Debug/Middlewares/Third_Party/LwIP/src/core/stats.d
new file mode 100644
index 0000000..bd5e5eb
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/stats.d
@@ -0,0 +1,163 @@
+Middlewares/Third_Party/LwIP/src/core/stats.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/stats.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/stats.o b/Debug/Middlewares/Third_Party/LwIP/src/core/stats.o
new file mode 100644
index 0000000..e26b1cb
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/stats.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/stats.su b/Debug/Middlewares/Third_Party/LwIP/src/core/stats.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/subdir.mk b/Debug/Middlewares/Third_Party/LwIP/src/core/subdir.mk
new file mode 100644
index 0000000..f88b105
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/subdir.mk
@@ -0,0 +1,114 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/LwIP/src/core/altcp.c \
+../Middlewares/Third_Party/LwIP/src/core/altcp_alloc.c \
+../Middlewares/Third_Party/LwIP/src/core/altcp_tcp.c \
+../Middlewares/Third_Party/LwIP/src/core/def.c \
+../Middlewares/Third_Party/LwIP/src/core/dns.c \
+../Middlewares/Third_Party/LwIP/src/core/inet_chksum.c \
+../Middlewares/Third_Party/LwIP/src/core/init.c \
+../Middlewares/Third_Party/LwIP/src/core/ip.c \
+../Middlewares/Third_Party/LwIP/src/core/mem.c \
+../Middlewares/Third_Party/LwIP/src/core/memp.c \
+../Middlewares/Third_Party/LwIP/src/core/netif.c \
+../Middlewares/Third_Party/LwIP/src/core/pbuf.c \
+../Middlewares/Third_Party/LwIP/src/core/raw.c \
+../Middlewares/Third_Party/LwIP/src/core/stats.c \
+../Middlewares/Third_Party/LwIP/src/core/sys.c \
+../Middlewares/Third_Party/LwIP/src/core/tcp.c \
+../Middlewares/Third_Party/LwIP/src/core/tcp_in.c \
+../Middlewares/Third_Party/LwIP/src/core/tcp_out.c \
+../Middlewares/Third_Party/LwIP/src/core/timeouts.c \
+../Middlewares/Third_Party/LwIP/src/core/udp.c 
+
+OBJS += \
+./Middlewares/Third_Party/LwIP/src/core/altcp.o \
+./Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o \
+./Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o \
+./Middlewares/Third_Party/LwIP/src/core/def.o \
+./Middlewares/Third_Party/LwIP/src/core/dns.o \
+./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o \
+./Middlewares/Third_Party/LwIP/src/core/init.o \
+./Middlewares/Third_Party/LwIP/src/core/ip.o \
+./Middlewares/Third_Party/LwIP/src/core/mem.o \
+./Middlewares/Third_Party/LwIP/src/core/memp.o \
+./Middlewares/Third_Party/LwIP/src/core/netif.o \
+./Middlewares/Third_Party/LwIP/src/core/pbuf.o \
+./Middlewares/Third_Party/LwIP/src/core/raw.o \
+./Middlewares/Third_Party/LwIP/src/core/stats.o \
+./Middlewares/Third_Party/LwIP/src/core/sys.o \
+./Middlewares/Third_Party/LwIP/src/core/tcp.o \
+./Middlewares/Third_Party/LwIP/src/core/tcp_in.o \
+./Middlewares/Third_Party/LwIP/src/core/tcp_out.o \
+./Middlewares/Third_Party/LwIP/src/core/timeouts.o \
+./Middlewares/Third_Party/LwIP/src/core/udp.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/LwIP/src/core/altcp.d \
+./Middlewares/Third_Party/LwIP/src/core/altcp_alloc.d \
+./Middlewares/Third_Party/LwIP/src/core/altcp_tcp.d \
+./Middlewares/Third_Party/LwIP/src/core/def.d \
+./Middlewares/Third_Party/LwIP/src/core/dns.d \
+./Middlewares/Third_Party/LwIP/src/core/inet_chksum.d \
+./Middlewares/Third_Party/LwIP/src/core/init.d \
+./Middlewares/Third_Party/LwIP/src/core/ip.d \
+./Middlewares/Third_Party/LwIP/src/core/mem.d \
+./Middlewares/Third_Party/LwIP/src/core/memp.d \
+./Middlewares/Third_Party/LwIP/src/core/netif.d \
+./Middlewares/Third_Party/LwIP/src/core/pbuf.d \
+./Middlewares/Third_Party/LwIP/src/core/raw.d \
+./Middlewares/Third_Party/LwIP/src/core/stats.d \
+./Middlewares/Third_Party/LwIP/src/core/sys.d \
+./Middlewares/Third_Party/LwIP/src/core/tcp.d \
+./Middlewares/Third_Party/LwIP/src/core/tcp_in.d \
+./Middlewares/Third_Party/LwIP/src/core/tcp_out.d \
+./Middlewares/Third_Party/LwIP/src/core/timeouts.d \
+./Middlewares/Third_Party/LwIP/src/core/udp.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/LwIP/src/core/altcp.o: ../Middlewares/Third_Party/LwIP/src/core/altcp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/altcp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o: ../Middlewares/Third_Party/LwIP/src/core/altcp_alloc.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/altcp_alloc.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o: ../Middlewares/Third_Party/LwIP/src/core/altcp_tcp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/altcp_tcp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/def.o: ../Middlewares/Third_Party/LwIP/src/core/def.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/def.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/dns.o: ../Middlewares/Third_Party/LwIP/src/core/dns.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/dns.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/inet_chksum.o: ../Middlewares/Third_Party/LwIP/src/core/inet_chksum.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/inet_chksum.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/init.o: ../Middlewares/Third_Party/LwIP/src/core/init.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/init.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/ip.o: ../Middlewares/Third_Party/LwIP/src/core/ip.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/ip.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/mem.o: ../Middlewares/Third_Party/LwIP/src/core/mem.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/mem.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/memp.o: ../Middlewares/Third_Party/LwIP/src/core/memp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/memp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/netif.o: ../Middlewares/Third_Party/LwIP/src/core/netif.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/netif.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/pbuf.o: ../Middlewares/Third_Party/LwIP/src/core/pbuf.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/pbuf.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/raw.o: ../Middlewares/Third_Party/LwIP/src/core/raw.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/raw.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/stats.o: ../Middlewares/Third_Party/LwIP/src/core/stats.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/stats.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/sys.o: ../Middlewares/Third_Party/LwIP/src/core/sys.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/sys.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/tcp.o: ../Middlewares/Third_Party/LwIP/src/core/tcp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/tcp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/tcp_in.o: ../Middlewares/Third_Party/LwIP/src/core/tcp_in.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/tcp_in.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/tcp_out.o: ../Middlewares/Third_Party/LwIP/src/core/tcp_out.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/tcp_out.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/timeouts.o: ../Middlewares/Third_Party/LwIP/src/core/timeouts.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/timeouts.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/core/udp.o: ../Middlewares/Third_Party/LwIP/src/core/udp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/core/udp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/sys.d b/Debug/Middlewares/Third_Party/LwIP/src/core/sys.d
new file mode 100644
index 0000000..e95c2ff
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/sys.d
@@ -0,0 +1,223 @@
+Middlewares/Third_Party/LwIP/src/core/sys.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/sys.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/sys.o b/Debug/Middlewares/Third_Party/LwIP/src/core/sys.o
new file mode 100644
index 0000000..fc04727
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/sys.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/sys.su b/Debug/Middlewares/Third_Party/LwIP/src/core/sys.su
new file mode 100644
index 0000000..4578e0b
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/sys.su
@@ -0,0 +1 @@
+sys.c:135:1:sys_msleep	24	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/tcp.d b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp.d
new file mode 100644
index 0000000..c9bd196
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp.d
@@ -0,0 +1,241 @@
+Middlewares/Third_Party/LwIP/src/core/tcp.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/tcp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/tcp.o b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp.o
new file mode 100644
index 0000000..9edcfcb
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/tcp.su b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp.su
new file mode 100644
index 0000000..b0a9226
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp.su
@@ -0,0 +1,52 @@
+tcp.c:201:1:tcp_init	8	static
+tcp.c:210:1:tcp_free	16	static
+tcp.c:221:1:tcp_free_listen	16	static
+tcp.c:234:1:tcp_tmr	8	static
+tcp.c:251:1:tcp_remove_listener	24	static
+tcp.c:269:1:tcp_listen_closed	24	static
+tcp.c:348:1:tcp_close_shutdown	48	static
+tcp.c:409:1:tcp_close_shutdown_fin	24	static
+tcp.c:484:1:tcp_close	16	static
+tcp.c:515:1:tcp_shutdown	24	static
+tcp.c:563:1:tcp_abandon	64	static
+tcp.c:638:1:tcp_abort	16	static
+tcp.c:661:1:tcp_bind	40	static
+tcp.c:763:1:tcp_bind_netif	16	static
+tcp.c:778:1:tcp_accept_null	24	static
+tcp.c:825:1:tcp_listen_with_backlog	16	static
+tcp.c:848:1:tcp_listen_with_backlog_and_err	40	static
+tcp.c:930:1:tcp_update_rcv_ann_wnd	24	static
+tcp.c:968:1:tcp_recved	24	static
+tcp.c:1011:1:tcp_new_port	16	static
+tcp.c:1067:1:tcp_connect	48	static
+tcp.c:1192:1:tcp_slowtmr	80	static
+tcp.c:1479:1:tcp_fasttmr	16	static
+tcp.c:1526:1:tcp_txnow	16	static
+tcp.c:1539:1:tcp_process_refused_data	32	static
+tcp.c:1608:1:tcp_segs_free	24	static
+tcp.c:1623:1:tcp_seg_free	16	static
+tcp.c:1644:1:tcp_setprio	16	static
+tcp.c:1662:1:tcp_seg_copy	24	static
+tcp.c:1684:1:tcp_recv_null	24	static
+tcp.c:1706:1:tcp_kill_prio	32	static
+tcp.c:1752:1:tcp_kill_state	32	static
+tcp.c:1784:1:tcp_kill_timewait	24	static
+tcp.c:1811:1:tcp_handle_closepend	16	static
+tcp.c:1834:1:tcp_alloc	24	static
+tcp.c:1945:1:tcp_new	8	static
+tcp.c:1962:1:tcp_new_ip_type	24	static
+tcp.c:1988:1:tcp_arg	16	static
+tcp.c:2011:1:tcp_recv	16	static
+tcp.c:2031:1:tcp_sent	16	static
+tcp.c:2057:1:tcp_err	16	static
+tcp.c:2076:1:tcp_accept	24	static
+tcp.c:2105:1:tcp_poll	24	static
+tcp.c:2127:1:tcp_pcb_purge	16	static
+tcp.c:2177:1:tcp_pcb_remove	24	static
+tcp.c:2215:1:tcp_next_iss	16	static
+tcp.c:2238:1:tcp_eff_send_mss_netif	32	static
+tcp.c:2299:1:tcp_netif_ip_addr_changed_pcblist	24	static
+tcp.c:2331:1:tcp_netif_ip_addr_changed	24	static
+tcp.c:2354:1:tcp_debug_state_str	16	static
+tcp.c:2360:1:tcp_tcp_get_tcp_addrinfo	24	static
+tcp.c:2386:1:tcp_free_ooseq	16	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_in.d b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_in.d
new file mode 100644
index 0000000..d79a710
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_in.d
@@ -0,0 +1,244 @@
+Middlewares/Third_Party/LwIP/src/core/tcp_in.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/tcp_in.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_in.o b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_in.o
new file mode 100644
index 0000000..7f8a9e0
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_in.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_in.su b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_in.su
new file mode 100644
index 0000000..2d1426d
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_in.su
@@ -0,0 +1,11 @@
+tcp_in.c:118:1:tcp_input	64	static
+tcp_in.c:600:1:tcp_input_delayed_close	16	static
+tcp_in.c:630:1:tcp_listen_input	56	static
+tcp_in.c:739:1:tcp_timewait_input	32	static
+tcp_in.c:788:1:tcp_process	64	static
+tcp_in.c:1051:1:tcp_oos_insert_segment	32	static
+tcp_in.c:1088:1:tcp_free_acked_segments	40	static
+tcp_in.c:1141:1:tcp_receive	96	static
+tcp_in.c:1888:1:tcp_get_next_optbyte	16	static
+tcp_in.c:1909:1:tcp_parseopt	24	static
+tcp_in.c:2029:1:tcp_trigger_input_pcb_close	4	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_out.d b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_out.d
new file mode 100644
index 0000000..940a19d
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_out.d
@@ -0,0 +1,241 @@
+Middlewares/Third_Party/LwIP/src/core/tcp_out.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/tcp_out.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_out.o b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_out.o
new file mode 100644
index 0000000..f8b7354
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_out.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_out.su b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_out.su
new file mode 100644
index 0000000..e82dfb9
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/tcp_out.su
@@ -0,0 +1,24 @@
+tcp_out.c:132:1:tcp_route	24	static
+tcp_out.c:158:1:tcp_create_segment	40	static
+tcp_out.c:225:1:tcp_pbuf_prealloc	32	static
+tcp_out.c:305:1:tcp_write_checks	16	static
+tcp_out.c:390:1:tcp_write	120	static
+tcp_out.c:827:1:tcp_split_unsent_seg	56	static
+tcp_out.c:1001:1:tcp_send_fin	32	static
+tcp_out.c:1032:1:tcp_enqueue_flags	48	static
+tcp_out.c:1237:1:tcp_output	56	static
+tcp_out.c:1432:1:tcp_output_segment_busy	16	static
+tcp_out.c:1455:1:tcp_output_segment	64	static
+tcp_out.c:1631:1:tcp_rexmit_rto_prepare	32	static
+tcp_out.c:1686:1:tcp_rexmit_rto_commit	16	static
+tcp_out.c:1707:1:tcp_rexmit_rto	16	static
+tcp_out.c:1724:1:tcp_rexmit	32	static
+tcp_out.c:1783:1:tcp_rexmit_fast	16	static
+tcp_out.c:1818:1:tcp_output_alloc_header_common	32	static
+tcp_out.c:1853:1:tcp_output_alloc_header	56	static
+tcp_out.c:1872:1:tcp_output_fill_options	40	static
+tcp_out.c:1921:1:tcp_output_control_segment	48	static
+tcp_out.c:1980:1:tcp_rst	56	static
+tcp_out.c:2019:1:tcp_send_empty_ack	40	static
+tcp_out.c:2078:1:tcp_keepalive	40	static
+tcp_out.c:2116:1:tcp_zero_window_probe	56	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/timeouts.d b/Debug/Middlewares/Third_Party/LwIP/src/core/timeouts.d
new file mode 100644
index 0000000..c0795e9
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/timeouts.d
@@ -0,0 +1,349 @@
+Middlewares/Third_Party/LwIP/src/core/timeouts.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/timeouts.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_frag.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/autoip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dns.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_frag.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp6.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpbase.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/tcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/tcpip_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_frag.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/autoip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/igmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dns.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/nd6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_frag.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mld6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp6.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/timeouts.o b/Debug/Middlewares/Third_Party/LwIP/src/core/timeouts.o
new file mode 100644
index 0000000..8b73bf9
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/timeouts.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/timeouts.su b/Debug/Middlewares/Third_Party/LwIP/src/core/timeouts.su
new file mode 100644
index 0000000..9506d80
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/timeouts.su
@@ -0,0 +1,10 @@
+timeouts.c:144:1:tcpip_tcp_timer	16	static
+timeouts.c:166:1:tcp_timer_needed	8	static
+timeouts.c:183:1:sys_timeout_abs	32	static
+timeouts.c:232:1:lwip_cyclic_timer	32	static
+timeouts.c:264:6:sys_timeouts_init	16	static
+timeouts.c:290:1:sys_timeout	32	static
+timeouts.c:317:1:sys_untimeout	24	static
+timeouts.c:352:1:sys_check_timeouts	24	static
+timeouts.c:404:1:sys_restart_timeouts	24	static
+timeouts.c:426:1:sys_timeouts_sleeptime	16	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/udp.d b/Debug/Middlewares/Third_Party/LwIP/src/core/udp.d
new file mode 100644
index 0000000..1a314c5
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/udp.d
@@ -0,0 +1,247 @@
+Middlewares/Third_Party/LwIP/src/core/udp.o: \
+ ../Middlewares/Third_Party/LwIP/src/core/udp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/icmp6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/udp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/inet_chksum.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/icmp6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/icmp6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/dhcp.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/udp.o b/Debug/Middlewares/Third_Party/LwIP/src/core/udp.o
new file mode 100644
index 0000000..c887434
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/core/udp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/core/udp.su b/Debug/Middlewares/Third_Party/LwIP/src/core/udp.su
new file mode 100644
index 0000000..551c6ba
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/core/udp.su
@@ -0,0 +1,17 @@
+udp.c:87:1:udp_init	8	static
+udp.c:100:1:udp_new_port	16	static
+udp.c:130:1:udp_input_local_match	24	static
+udp.c:194:1:udp_input	64	static
+udp.c:467:1:udp_send	16	static
+udp.c:520:1:udp_sendto	40	static
+udp.c:624:1:udp_sendto_if	40	static
+udp.c:699:1:udp_sendto_if_src	56	static
+udp.c:932:1:udp_bind	32	static
+udp.c:1042:1:udp_bind_netif	16	static
+udp.c:1071:1:udp_connect	32	static
+udp.c:1126:1:udp_disconnect	16	static
+udp.c:1158:1:udp_recv	24	static
+udp.c:1179:1:udp_remove	24	static
+udp.c:1218:1:udp_new	16	static
+udp.c:1255:1:udp_new_ip_type	24	static
+udp.c:1278:6:udp_netif_ip_addr_changed	24	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif.d
new file mode 100644
index 0000000..4c9ef9a
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif.d
@@ -0,0 +1,298 @@
+Middlewares/Third_Party/LwIP/src/netif/bridgeif.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/bridgeif.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/bridgeif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/bridgeif_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ethip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/bridgeif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/bridgeif_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ethip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
new file mode 100644
index 0000000..33bf416
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.d
new file mode 100644
index 0000000..81a87e6
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.d
@@ -0,0 +1,280 @@
+Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/bridgeif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/bridgeif_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/bridgeif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/bridgeif_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/tcpip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/timeouts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
new file mode 100644
index 0000000..581c65e
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.su
new file mode 100644
index 0000000..d6a97cb
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.su
@@ -0,0 +1,5 @@
+bridgeif_fdb.c:76:1:bridgeif_fdb_update_src	40	static
+bridgeif_fdb.c:128:1:bridgeif_fdb_get_dst_ports	32	static
+bridgeif_fdb.c:153:1:bridgeif_fdb_age_one_second	32	static
+bridgeif_fdb.c:180:1:bridgeif_age_tmr	24	static
+bridgeif_fdb.c:195:1:bridgeif_fdb_init	32	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ethernet.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ethernet.d
new file mode 100644
index 0000000..c6240bb
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ethernet.d
@@ -0,0 +1,241 @@
+Middlewares/Third_Party/LwIP/src/netif/ethernet.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ethernet.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ethernet.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ieee.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip4.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/etharp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/prot/ip.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ethernet.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ethernet.o
new file mode 100644
index 0000000..9895fe5
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ethernet.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ethernet.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ethernet.su
new file mode 100644
index 0000000..f372ebe
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ethernet.su
@@ -0,0 +1,2 @@
+ethernet.c:81:1:ethernet_input	32	static
+ethernet.c:270:1:ethernet_output	32	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6.d
new file mode 100644
index 0000000..7d71a68
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6.d
@@ -0,0 +1,169 @@
+Middlewares/Third_Party/LwIP/src/netif/lowpan6.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/lowpan6.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
new file mode 100644
index 0000000..db0f7dd
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.d
new file mode 100644
index 0000000..4d72767
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.d
@@ -0,0 +1,169 @@
+Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_ble.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_ble.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
new file mode 100644
index 0000000..20bc34f
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.d
new file mode 100644
index 0000000..5a20746
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.d
@@ -0,0 +1,169 @@
+Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_common.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_common.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
new file mode 100644
index 0000000..a70efd8
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/auth.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/auth.d
new file mode 100644
index 0000000..fa60757
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/auth.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/auth.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
new file mode 100644
index 0000000..d27544b
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/auth.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/auth.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.d
new file mode 100644
index 0000000..a48c362
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
new file mode 100644
index 0000000..d2d5ddf
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.d
new file mode 100644
index 0000000..bb2908a
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
new file mode 100644
index 0000000..79b806c
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.d
new file mode 100644
index 0000000..1d7ca61
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
new file mode 100644
index 0000000..66005ce
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.d
new file mode 100644
index 0000000..5da3bba
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
new file mode 100644
index 0000000..e72ea3d
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/demand.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/demand.d
new file mode 100644
index 0000000..1f1df9c
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/demand.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/demand.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
new file mode 100644
index 0000000..76651e0
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/demand.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/demand.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eap.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eap.d
new file mode 100644
index 0000000..fa82a53
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eap.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/eap.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
new file mode 100644
index 0000000..c40a0c9
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eap.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eap.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.d
new file mode 100644
index 0000000..c49bce4
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
new file mode 100644
index 0000000..9ebd704
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.d
new file mode 100644
index 0000000..cfc909b
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
new file mode 100644
index 0000000..ac0c2e8
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.d
new file mode 100644
index 0000000..31761a0
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
new file mode 100644
index 0000000..a51c054
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.d
new file mode 100644
index 0000000..8817794
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
new file mode 100644
index 0000000..7256475
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.d
new file mode 100644
index 0000000..b6c433d
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
new file mode 100644
index 0000000..a06de68
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.d
new file mode 100644
index 0000000..3c4070e
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
new file mode 100644
index 0000000..e692453
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/magic.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/magic.d
new file mode 100644
index 0000000..3a527b0
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/magic.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/magic.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
new file mode 100644
index 0000000..6d9b297
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/magic.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/magic.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.d
new file mode 100644
index 0000000..7b552c3
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
new file mode 100644
index 0000000..09b8ba3
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.d
new file mode 100644
index 0000000..61a5a0b
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
new file mode 100644
index 0000000..0cc7683
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.d
new file mode 100644
index 0000000..977d642
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
new file mode 100644
index 0000000..4ba567f
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.d
new file mode 100644
index 0000000..20ae48c
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
new file mode 100644
index 0000000..e470e40
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.d
new file mode 100644
index 0000000..522b90b
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
new file mode 100644
index 0000000..660fc2d
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.d
new file mode 100644
index 0000000..3cbc08e
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
new file mode 100644
index 0000000..464ad1c
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.d
new file mode 100644
index 0000000..2456d84
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
new file mode 100644
index 0000000..9004ddd
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.d
new file mode 100644
index 0000000..0ff96e5
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
new file mode 100644
index 0000000..40de721
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/subdir.mk b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/subdir.mk
new file mode 100644
index 0000000..dee96f4
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/subdir.mk
@@ -0,0 +1,139 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/auth.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/demand.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/eap.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/magic.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/upap.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/utils.c \
+../Middlewares/Third_Party/LwIP/src/netif/ppp/vj.c 
+
+OBJS += \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/auth.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/demand.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/eap.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/magic.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/upap.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/utils.d \
+./Middlewares/Third_Party/LwIP/src/netif/ppp/vj.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/auth.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/auth.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/demand.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/demand.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/eap.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/eap.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/magic.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/magic.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/upap.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/upap.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/utils.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/utils.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o: ../Middlewares/Third_Party/LwIP/src/netif/ppp/vj.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ppp/vj.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/upap.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/upap.d
new file mode 100644
index 0000000..87aabad
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/upap.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/upap.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
new file mode 100644
index 0000000..73d5d42
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/upap.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/upap.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/utils.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/utils.d
new file mode 100644
index 0000000..6ecddac
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/utils.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/utils.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
new file mode 100644
index 0000000..cc8b696
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/utils.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/utils.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/vj.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/vj.d
new file mode 100644
index 0000000..d7ad75d
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/vj.d
@@ -0,0 +1,166 @@
+Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/ppp/vj.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
new file mode 100644
index 0000000..674609f
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/vj.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/ppp/vj.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/slipif.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/slipif.d
new file mode 100644
index 0000000..85bf3b6
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/slipif.d
@@ -0,0 +1,271 @@
+Middlewares/Third_Party/LwIP/src/netif/slipif.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/slipif.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/slipif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sio.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/slipif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/netif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip4_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/ip6_addr.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/pbuf.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/snmp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sio.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/slipif.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/slipif.o
new file mode 100644
index 0000000..ab984c9
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/slipif.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/slipif.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/slipif.su
new file mode 100644
index 0000000..f384533
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/slipif.su
@@ -0,0 +1,7 @@
+slipif.c:116:1:slipif_output	32	static
+slipif.c:172:1:slipif_output_v4	24	static
+slipif.c:207:1:slipif_rxbyte	24	static
+slipif.c:310:1:slipif_rxbyte_input	24	static
+slipif.c:330:1:slipif_loop_thread	32	static
+slipif.c:360:1:slipif_init	32	static
+slipif.c:426:1:slipif_poll	24	static
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/subdir.mk b/Debug/Middlewares/Third_Party/LwIP/src/netif/subdir.mk
new file mode 100644
index 0000000..fdd6bed
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/subdir.mk
@@ -0,0 +1,54 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/LwIP/src/netif/bridgeif.c \
+../Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.c \
+../Middlewares/Third_Party/LwIP/src/netif/ethernet.c \
+../Middlewares/Third_Party/LwIP/src/netif/lowpan6.c \
+../Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.c \
+../Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.c \
+../Middlewares/Third_Party/LwIP/src/netif/slipif.c \
+../Middlewares/Third_Party/LwIP/src/netif/zepif.c 
+
+OBJS += \
+./Middlewares/Third_Party/LwIP/src/netif/bridgeif.o \
+./Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o \
+./Middlewares/Third_Party/LwIP/src/netif/ethernet.o \
+./Middlewares/Third_Party/LwIP/src/netif/lowpan6.o \
+./Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o \
+./Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o \
+./Middlewares/Third_Party/LwIP/src/netif/slipif.o \
+./Middlewares/Third_Party/LwIP/src/netif/zepif.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/LwIP/src/netif/bridgeif.d \
+./Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.d \
+./Middlewares/Third_Party/LwIP/src/netif/ethernet.d \
+./Middlewares/Third_Party/LwIP/src/netif/lowpan6.d \
+./Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.d \
+./Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.d \
+./Middlewares/Third_Party/LwIP/src/netif/slipif.d \
+./Middlewares/Third_Party/LwIP/src/netif/zepif.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/LwIP/src/netif/bridgeif.o: ../Middlewares/Third_Party/LwIP/src/netif/bridgeif.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/bridgeif.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o: ../Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/ethernet.o: ../Middlewares/Third_Party/LwIP/src/netif/ethernet.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/ethernet.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/lowpan6.o: ../Middlewares/Third_Party/LwIP/src/netif/lowpan6.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/lowpan6.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o: ../Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o: ../Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/slipif.o: ../Middlewares/Third_Party/LwIP/src/netif/slipif.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/slipif.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+Middlewares/Third_Party/LwIP/src/netif/zepif.o: ../Middlewares/Third_Party/LwIP/src/netif/zepif.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/src/netif/zepif.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/zepif.d b/Debug/Middlewares/Third_Party/LwIP/src/netif/zepif.d
new file mode 100644
index 0000000..b2f510a
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/src/netif/zepif.d
@@ -0,0 +1,172 @@
+Middlewares/Third_Party/LwIP/src/netif/zepif.o: \
+ ../Middlewares/Third_Party/LwIP/src/netif/zepif.c \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/zepif.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6.h \
+ ../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_opts.h
+
+../Middlewares/Third_Party/LwIP/src/include/netif/zepif.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6.h:
+
+../Middlewares/Third_Party/LwIP/src/include/netif/lowpan6_opts.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/zepif.o b/Debug/Middlewares/Third_Party/LwIP/src/netif/zepif.o
new file mode 100644
index 0000000..7eae0b5
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/src/netif/zepif.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/src/netif/zepif.su b/Debug/Middlewares/Third_Party/LwIP/src/netif/zepif.su
new file mode 100644
index 0000000..e69de29
diff --git a/Debug/Middlewares/Third_Party/LwIP/system/OS/subdir.mk b/Debug/Middlewares/Third_Party/LwIP/system/OS/subdir.mk
new file mode 100644
index 0000000..64f3681
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/system/OS/subdir.mk
@@ -0,0 +1,19 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/LwIP/system/OS/sys_arch.c 
+
+OBJS += \
+./Middlewares/Third_Party/LwIP/system/OS/sys_arch.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/LwIP/system/OS/sys_arch.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/LwIP/system/OS/sys_arch.o: ../Middlewares/Third_Party/LwIP/system/OS/sys_arch.c
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m7 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F746xx -DDEBUG -c -I../Core/Inc -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Drivers/STM32F7xx_HAL_Driver/Inc -I../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Drivers/CMSIS/Device/ST/STM32F7xx/Include -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/compat/posix -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/arpa -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/net -I../Middlewares/Third_Party/LwIP/src/include/compat/posix/sys -I../Middlewares/Third_Party/LwIP/src/include/compat/stdc -I../Middlewares/Third_Party/LwIP/system/arch -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Middlewares/Third_Party/LwIP/system/OS/sys_arch.d" -MT"$@" --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
diff --git a/Debug/Middlewares/Third_Party/LwIP/system/OS/sys_arch.d b/Debug/Middlewares/Third_Party/LwIP/system/OS/sys_arch.d
new file mode 100644
index 0000000..b0cbcf1
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/system/OS/sys_arch.d
@@ -0,0 +1,244 @@
+Middlewares/Third_Party/LwIP/system/OS/sys_arch.o: \
+ ../Middlewares/Third_Party/LwIP/system/OS/sys_arch.c \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cc.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/cpu.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h \
+ ../LWIP/Target/lwipopts.h ../Core/Inc/main.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
+ ../Core/Inc/stm32f7xx_hal_conf.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h \
+ ../Drivers/CMSIS/Include/core_cm7.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
+ ../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/def.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/err.h \
+ ../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h \
+ ../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/debug.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/arch.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cc.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/cpu.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/opt.h:
+
+../LWIP/Target/lwipopts.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
+
+../Core/Inc/stm32f7xx_hal_conf.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h:
+
+../Drivers/CMSIS/Include/core_cm7.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Include/mpu_armv7.h:
+
+../Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_crc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dac_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_ltdc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rng.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rtc_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_spi_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
+
+../Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/def.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/sys.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/err.h:
+
+../Middlewares/Third_Party/LwIP/system/arch/sys_arch.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+
+../Core/Inc/FreeRTOSConfig.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/mem.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/stats.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/memp.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_std.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/memp_priv.h:
+
+../Middlewares/Third_Party/LwIP/src/include/lwip/priv/mem_priv.h:
diff --git a/Debug/Middlewares/Third_Party/LwIP/system/OS/sys_arch.o b/Debug/Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
new file mode 100644
index 0000000..305509d
Binary files /dev/null and b/Debug/Middlewares/Third_Party/LwIP/system/OS/sys_arch.o differ
diff --git a/Debug/Middlewares/Third_Party/LwIP/system/OS/sys_arch.su b/Debug/Middlewares/Third_Party/LwIP/system/OS/sys_arch.su
new file mode 100644
index 0000000..80d3ceb
--- /dev/null
+++ b/Debug/Middlewares/Third_Party/LwIP/system/OS/sys_arch.su
@@ -0,0 +1,23 @@
+sys_arch.c:50:7:sys_mbox_new	32	static
+sys_arch.c:77:6:sys_mbox_free	16	static
+sys_arch.c:104:6:sys_mbox_post	16	static
+sys_arch.c:116:7:sys_mbox_trypost	24	static
+sys_arch.c:143:7:sys_mbox_trypost_fromisr	16	static
+sys_arch.c:164:7:sys_arch_mbox_fetch	56	static
+sys_arch.c:213:7:sys_arch_mbox_tryfetch	32	static
+sys_arch.c:235:5:sys_mbox_valid	16	static
+sys_arch.c:243:6:sys_mbox_set_invalid	16	static
+sys_arch.c:251:7:sys_sem_new	24	static
+sys_arch.c:303:7:sys_arch_sem_wait	24	static
+sys_arch.c:341:6:sys_sem_signal	16	static
+sys_arch.c:348:6:sys_sem_free	16	static
+sys_arch.c:357:5:sys_sem_valid	16	static
+sys_arch.c:366:6:sys_sem_set_invalid	16	static
+sys_arch.c:379:6:sys_init	8	static
+sys_arch.c:393:7:sys_mutex_new	24	static
+sys_arch.c:420:6:sys_mutex_free	16	static
+sys_arch.c:430:6:sys_mutex_lock	16	static
+sys_arch.c:441:6:sys_mutex_unlock	16	static
+sys_arch.c:455:14:sys_thread_new	56	static
+sys_arch.c:486:12:sys_arch_protect	8	static
+sys_arch.c:506:6:sys_arch_unprotect	16	static
diff --git a/Debug/Space_Invaders.bin b/Debug/Space_Invaders.bin
new file mode 100644
index 0000000..f6fd986
Binary files /dev/null and b/Debug/Space_Invaders.bin differ
diff --git a/Debug/Space_Invaders.elf b/Debug/Space_Invaders.elf
new file mode 100644
index 0000000..b060455
Binary files /dev/null and b/Debug/Space_Invaders.elf differ
diff --git a/Debug/Space_Invaders.list b/Debug/Space_Invaders.list
new file mode 100644
index 0000000..3829207
--- /dev/null
+++ b/Debug/Space_Invaders.list
@@ -0,0 +1,79184 @@
+
+Space_Invaders.elf:     file format elf32-littlearm
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .isr_vector   000001c8  08000000  08000000  00010000  2**0
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  1 .text         0001d3c0  080001d0  080001d0  000101d0  2**4
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  2 .rodata       000050c0  0801d590  0801d590  0002d590  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  3 .ARM.extab    00000000  08022650  08022650  000400d4  2**0
+                  CONTENTS
+  4 .ARM          00000008  08022650  08022650  00032650  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  5 .preinit_array 00000000  08022658  08022658  000400d4  2**0
+                  CONTENTS, ALLOC, LOAD, DATA
+  6 .init_array   00000004  08022658  08022658  00032658  2**2
+                  CONTENTS, ALLOC, LOAD, DATA
+  7 .fini_array   00000004  0802265c  0802265c  0003265c  2**2
+                  CONTENTS, ALLOC, LOAD, DATA
+  8 .data         000000d4  20000000  08022660  00040000  2**2
+                  CONTENTS, ALLOC, LOAD, DATA
+  9 .bss          0000f760  200000d4  08022734  000400d4  2**2
+                  ALLOC
+ 10 ._user_heap_stack 00000604  2000f834  08022734  0004f834  2**0
+                  ALLOC
+ 11 .ARM.attributes 00000030  00000000  00000000  000400d4  2**0
+                  CONTENTS, READONLY
+ 12 .debug_info   00055ae6  00000000  00000000  00040104  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 13 .debug_abbrev 00009e26  00000000  00000000  00095bea  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 14 .debug_aranges 00003580  00000000  00000000  0009fa10  2**3
+                  CONTENTS, READONLY, DEBUGGING
+ 15 .debug_ranges 00003288  00000000  00000000  000a2f90  2**3
+                  CONTENTS, READONLY, DEBUGGING
+ 16 .debug_macro  0003df8f  00000000  00000000  000a6218  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 17 .debug_line   0003e223  00000000  00000000  000e41a7  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 18 .debug_str    00133260  00000000  00000000  001223ca  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 19 .comment      0000007b  00000000  00000000  0025562a  2**0
+                  CONTENTS, READONLY
+ 20 .debug_frame  0000e6d0  00000000  00000000  002556a8  2**2
+                  CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+080001d0 <__do_global_dtors_aux>:
+ 80001d0:	b510      	push	{r4, lr}
+ 80001d2:	4c05      	ldr	r4, [pc, #20]	; (80001e8 <__do_global_dtors_aux+0x18>)
+ 80001d4:	7823      	ldrb	r3, [r4, #0]
+ 80001d6:	b933      	cbnz	r3, 80001e6 <__do_global_dtors_aux+0x16>
+ 80001d8:	4b04      	ldr	r3, [pc, #16]	; (80001ec <__do_global_dtors_aux+0x1c>)
+ 80001da:	b113      	cbz	r3, 80001e2 <__do_global_dtors_aux+0x12>
+ 80001dc:	4804      	ldr	r0, [pc, #16]	; (80001f0 <__do_global_dtors_aux+0x20>)
+ 80001de:	f3af 8000 	nop.w
+ 80001e2:	2301      	movs	r3, #1
+ 80001e4:	7023      	strb	r3, [r4, #0]
+ 80001e6:	bd10      	pop	{r4, pc}
+ 80001e8:	200000d4 	.word	0x200000d4
+ 80001ec:	00000000 	.word	0x00000000
+ 80001f0:	0801d578 	.word	0x0801d578
+
+080001f4 <frame_dummy>:
+ 80001f4:	b508      	push	{r3, lr}
+ 80001f6:	4b03      	ldr	r3, [pc, #12]	; (8000204 <frame_dummy+0x10>)
+ 80001f8:	b11b      	cbz	r3, 8000202 <frame_dummy+0xe>
+ 80001fa:	4903      	ldr	r1, [pc, #12]	; (8000208 <frame_dummy+0x14>)
+ 80001fc:	4803      	ldr	r0, [pc, #12]	; (800020c <frame_dummy+0x18>)
+ 80001fe:	f3af 8000 	nop.w
+ 8000202:	bd08      	pop	{r3, pc}
+ 8000204:	00000000 	.word	0x00000000
+ 8000208:	200000d8 	.word	0x200000d8
+ 800020c:	0801d578 	.word	0x0801d578
+
+08000210 <memchr>:
+ 8000210:	f001 01ff 	and.w	r1, r1, #255	; 0xff
+ 8000214:	2a10      	cmp	r2, #16
+ 8000216:	db2b      	blt.n	8000270 <memchr+0x60>
+ 8000218:	f010 0f07 	tst.w	r0, #7
+ 800021c:	d008      	beq.n	8000230 <memchr+0x20>
+ 800021e:	f810 3b01 	ldrb.w	r3, [r0], #1
+ 8000222:	3a01      	subs	r2, #1
+ 8000224:	428b      	cmp	r3, r1
+ 8000226:	d02d      	beq.n	8000284 <memchr+0x74>
+ 8000228:	f010 0f07 	tst.w	r0, #7
+ 800022c:	b342      	cbz	r2, 8000280 <memchr+0x70>
+ 800022e:	d1f6      	bne.n	800021e <memchr+0xe>
+ 8000230:	b4f0      	push	{r4, r5, r6, r7}
+ 8000232:	ea41 2101 	orr.w	r1, r1, r1, lsl #8
+ 8000236:	ea41 4101 	orr.w	r1, r1, r1, lsl #16
+ 800023a:	f022 0407 	bic.w	r4, r2, #7
+ 800023e:	f07f 0700 	mvns.w	r7, #0
+ 8000242:	2300      	movs	r3, #0
+ 8000244:	e8f0 5602 	ldrd	r5, r6, [r0], #8
+ 8000248:	3c08      	subs	r4, #8
+ 800024a:	ea85 0501 	eor.w	r5, r5, r1
+ 800024e:	ea86 0601 	eor.w	r6, r6, r1
+ 8000252:	fa85 f547 	uadd8	r5, r5, r7
+ 8000256:	faa3 f587 	sel	r5, r3, r7
+ 800025a:	fa86 f647 	uadd8	r6, r6, r7
+ 800025e:	faa5 f687 	sel	r6, r5, r7
+ 8000262:	b98e      	cbnz	r6, 8000288 <memchr+0x78>
+ 8000264:	d1ee      	bne.n	8000244 <memchr+0x34>
+ 8000266:	bcf0      	pop	{r4, r5, r6, r7}
+ 8000268:	f001 01ff 	and.w	r1, r1, #255	; 0xff
+ 800026c:	f002 0207 	and.w	r2, r2, #7
+ 8000270:	b132      	cbz	r2, 8000280 <memchr+0x70>
+ 8000272:	f810 3b01 	ldrb.w	r3, [r0], #1
+ 8000276:	3a01      	subs	r2, #1
+ 8000278:	ea83 0301 	eor.w	r3, r3, r1
+ 800027c:	b113      	cbz	r3, 8000284 <memchr+0x74>
+ 800027e:	d1f8      	bne.n	8000272 <memchr+0x62>
+ 8000280:	2000      	movs	r0, #0
+ 8000282:	4770      	bx	lr
+ 8000284:	3801      	subs	r0, #1
+ 8000286:	4770      	bx	lr
+ 8000288:	2d00      	cmp	r5, #0
+ 800028a:	bf06      	itte	eq
+ 800028c:	4635      	moveq	r5, r6
+ 800028e:	3803      	subeq	r0, #3
+ 8000290:	3807      	subne	r0, #7
+ 8000292:	f015 0f01 	tst.w	r5, #1
+ 8000296:	d107      	bne.n	80002a8 <memchr+0x98>
+ 8000298:	3001      	adds	r0, #1
+ 800029a:	f415 7f80 	tst.w	r5, #256	; 0x100
+ 800029e:	bf02      	ittt	eq
+ 80002a0:	3001      	addeq	r0, #1
+ 80002a2:	f415 3fc0 	tsteq.w	r5, #98304	; 0x18000
+ 80002a6:	3001      	addeq	r0, #1
+ 80002a8:	bcf0      	pop	{r4, r5, r6, r7}
+ 80002aa:	3801      	subs	r0, #1
+ 80002ac:	4770      	bx	lr
+ 80002ae:	bf00      	nop
+
+080002b0 <__aeabi_uldivmod>:
+ 80002b0:	b953      	cbnz	r3, 80002c8 <__aeabi_uldivmod+0x18>
+ 80002b2:	b94a      	cbnz	r2, 80002c8 <__aeabi_uldivmod+0x18>
+ 80002b4:	2900      	cmp	r1, #0
+ 80002b6:	bf08      	it	eq
+ 80002b8:	2800      	cmpeq	r0, #0
+ 80002ba:	bf1c      	itt	ne
+ 80002bc:	f04f 31ff 	movne.w	r1, #4294967295
+ 80002c0:	f04f 30ff 	movne.w	r0, #4294967295
+ 80002c4:	f000 b972 	b.w	80005ac <__aeabi_idiv0>
+ 80002c8:	f1ad 0c08 	sub.w	ip, sp, #8
+ 80002cc:	e96d ce04 	strd	ip, lr, [sp, #-16]!
+ 80002d0:	f000 f806 	bl	80002e0 <__udivmoddi4>
+ 80002d4:	f8dd e004 	ldr.w	lr, [sp, #4]
+ 80002d8:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
+ 80002dc:	b004      	add	sp, #16
+ 80002de:	4770      	bx	lr
+
+080002e0 <__udivmoddi4>:
+ 80002e0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 80002e4:	9e08      	ldr	r6, [sp, #32]
+ 80002e6:	4604      	mov	r4, r0
+ 80002e8:	4688      	mov	r8, r1
+ 80002ea:	2b00      	cmp	r3, #0
+ 80002ec:	d14b      	bne.n	8000386 <__udivmoddi4+0xa6>
+ 80002ee:	428a      	cmp	r2, r1
+ 80002f0:	4615      	mov	r5, r2
+ 80002f2:	d967      	bls.n	80003c4 <__udivmoddi4+0xe4>
+ 80002f4:	fab2 f282 	clz	r2, r2
+ 80002f8:	b14a      	cbz	r2, 800030e <__udivmoddi4+0x2e>
+ 80002fa:	f1c2 0720 	rsb	r7, r2, #32
+ 80002fe:	fa01 f302 	lsl.w	r3, r1, r2
+ 8000302:	fa20 f707 	lsr.w	r7, r0, r7
+ 8000306:	4095      	lsls	r5, r2
+ 8000308:	ea47 0803 	orr.w	r8, r7, r3
+ 800030c:	4094      	lsls	r4, r2
+ 800030e:	ea4f 4e15 	mov.w	lr, r5, lsr #16
+ 8000312:	0c23      	lsrs	r3, r4, #16
+ 8000314:	fbb8 f7fe 	udiv	r7, r8, lr
+ 8000318:	fa1f fc85 	uxth.w	ip, r5
+ 800031c:	fb0e 8817 	mls	r8, lr, r7, r8
+ 8000320:	ea43 4308 	orr.w	r3, r3, r8, lsl #16
+ 8000324:	fb07 f10c 	mul.w	r1, r7, ip
+ 8000328:	4299      	cmp	r1, r3
+ 800032a:	d909      	bls.n	8000340 <__udivmoddi4+0x60>
+ 800032c:	18eb      	adds	r3, r5, r3
+ 800032e:	f107 30ff 	add.w	r0, r7, #4294967295
+ 8000332:	f080 811b 	bcs.w	800056c <__udivmoddi4+0x28c>
+ 8000336:	4299      	cmp	r1, r3
+ 8000338:	f240 8118 	bls.w	800056c <__udivmoddi4+0x28c>
+ 800033c:	3f02      	subs	r7, #2
+ 800033e:	442b      	add	r3, r5
+ 8000340:	1a5b      	subs	r3, r3, r1
+ 8000342:	b2a4      	uxth	r4, r4
+ 8000344:	fbb3 f0fe 	udiv	r0, r3, lr
+ 8000348:	fb0e 3310 	mls	r3, lr, r0, r3
+ 800034c:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
+ 8000350:	fb00 fc0c 	mul.w	ip, r0, ip
+ 8000354:	45a4      	cmp	ip, r4
+ 8000356:	d909      	bls.n	800036c <__udivmoddi4+0x8c>
+ 8000358:	192c      	adds	r4, r5, r4
+ 800035a:	f100 33ff 	add.w	r3, r0, #4294967295
+ 800035e:	f080 8107 	bcs.w	8000570 <__udivmoddi4+0x290>
+ 8000362:	45a4      	cmp	ip, r4
+ 8000364:	f240 8104 	bls.w	8000570 <__udivmoddi4+0x290>
+ 8000368:	3802      	subs	r0, #2
+ 800036a:	442c      	add	r4, r5
+ 800036c:	ea40 4007 	orr.w	r0, r0, r7, lsl #16
+ 8000370:	eba4 040c 	sub.w	r4, r4, ip
+ 8000374:	2700      	movs	r7, #0
+ 8000376:	b11e      	cbz	r6, 8000380 <__udivmoddi4+0xa0>
+ 8000378:	40d4      	lsrs	r4, r2
+ 800037a:	2300      	movs	r3, #0
+ 800037c:	e9c6 4300 	strd	r4, r3, [r6]
+ 8000380:	4639      	mov	r1, r7
+ 8000382:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 8000386:	428b      	cmp	r3, r1
+ 8000388:	d909      	bls.n	800039e <__udivmoddi4+0xbe>
+ 800038a:	2e00      	cmp	r6, #0
+ 800038c:	f000 80eb 	beq.w	8000566 <__udivmoddi4+0x286>
+ 8000390:	2700      	movs	r7, #0
+ 8000392:	e9c6 0100 	strd	r0, r1, [r6]
+ 8000396:	4638      	mov	r0, r7
+ 8000398:	4639      	mov	r1, r7
+ 800039a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 800039e:	fab3 f783 	clz	r7, r3
+ 80003a2:	2f00      	cmp	r7, #0
+ 80003a4:	d147      	bne.n	8000436 <__udivmoddi4+0x156>
+ 80003a6:	428b      	cmp	r3, r1
+ 80003a8:	d302      	bcc.n	80003b0 <__udivmoddi4+0xd0>
+ 80003aa:	4282      	cmp	r2, r0
+ 80003ac:	f200 80fa 	bhi.w	80005a4 <__udivmoddi4+0x2c4>
+ 80003b0:	1a84      	subs	r4, r0, r2
+ 80003b2:	eb61 0303 	sbc.w	r3, r1, r3
+ 80003b6:	2001      	movs	r0, #1
+ 80003b8:	4698      	mov	r8, r3
+ 80003ba:	2e00      	cmp	r6, #0
+ 80003bc:	d0e0      	beq.n	8000380 <__udivmoddi4+0xa0>
+ 80003be:	e9c6 4800 	strd	r4, r8, [r6]
+ 80003c2:	e7dd      	b.n	8000380 <__udivmoddi4+0xa0>
+ 80003c4:	b902      	cbnz	r2, 80003c8 <__udivmoddi4+0xe8>
+ 80003c6:	deff      	udf	#255	; 0xff
+ 80003c8:	fab2 f282 	clz	r2, r2
+ 80003cc:	2a00      	cmp	r2, #0
+ 80003ce:	f040 808f 	bne.w	80004f0 <__udivmoddi4+0x210>
+ 80003d2:	1b49      	subs	r1, r1, r5
+ 80003d4:	ea4f 4e15 	mov.w	lr, r5, lsr #16
+ 80003d8:	fa1f f885 	uxth.w	r8, r5
+ 80003dc:	2701      	movs	r7, #1
+ 80003de:	fbb1 fcfe 	udiv	ip, r1, lr
+ 80003e2:	0c23      	lsrs	r3, r4, #16
+ 80003e4:	fb0e 111c 	mls	r1, lr, ip, r1
+ 80003e8:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
+ 80003ec:	fb08 f10c 	mul.w	r1, r8, ip
+ 80003f0:	4299      	cmp	r1, r3
+ 80003f2:	d907      	bls.n	8000404 <__udivmoddi4+0x124>
+ 80003f4:	18eb      	adds	r3, r5, r3
+ 80003f6:	f10c 30ff 	add.w	r0, ip, #4294967295
+ 80003fa:	d202      	bcs.n	8000402 <__udivmoddi4+0x122>
+ 80003fc:	4299      	cmp	r1, r3
+ 80003fe:	f200 80cd 	bhi.w	800059c <__udivmoddi4+0x2bc>
+ 8000402:	4684      	mov	ip, r0
+ 8000404:	1a59      	subs	r1, r3, r1
+ 8000406:	b2a3      	uxth	r3, r4
+ 8000408:	fbb1 f0fe 	udiv	r0, r1, lr
+ 800040c:	fb0e 1410 	mls	r4, lr, r0, r1
+ 8000410:	ea43 4404 	orr.w	r4, r3, r4, lsl #16
+ 8000414:	fb08 f800 	mul.w	r8, r8, r0
+ 8000418:	45a0      	cmp	r8, r4
+ 800041a:	d907      	bls.n	800042c <__udivmoddi4+0x14c>
+ 800041c:	192c      	adds	r4, r5, r4
+ 800041e:	f100 33ff 	add.w	r3, r0, #4294967295
+ 8000422:	d202      	bcs.n	800042a <__udivmoddi4+0x14a>
+ 8000424:	45a0      	cmp	r8, r4
+ 8000426:	f200 80b6 	bhi.w	8000596 <__udivmoddi4+0x2b6>
+ 800042a:	4618      	mov	r0, r3
+ 800042c:	eba4 0408 	sub.w	r4, r4, r8
+ 8000430:	ea40 400c 	orr.w	r0, r0, ip, lsl #16
+ 8000434:	e79f      	b.n	8000376 <__udivmoddi4+0x96>
+ 8000436:	f1c7 0c20 	rsb	ip, r7, #32
+ 800043a:	40bb      	lsls	r3, r7
+ 800043c:	fa22 fe0c 	lsr.w	lr, r2, ip
+ 8000440:	ea4e 0e03 	orr.w	lr, lr, r3
+ 8000444:	fa01 f407 	lsl.w	r4, r1, r7
+ 8000448:	fa20 f50c 	lsr.w	r5, r0, ip
+ 800044c:	fa21 f30c 	lsr.w	r3, r1, ip
+ 8000450:	ea4f 481e 	mov.w	r8, lr, lsr #16
+ 8000454:	4325      	orrs	r5, r4
+ 8000456:	fbb3 f9f8 	udiv	r9, r3, r8
+ 800045a:	0c2c      	lsrs	r4, r5, #16
+ 800045c:	fb08 3319 	mls	r3, r8, r9, r3
+ 8000460:	fa1f fa8e 	uxth.w	sl, lr
+ 8000464:	ea44 4303 	orr.w	r3, r4, r3, lsl #16
+ 8000468:	fb09 f40a 	mul.w	r4, r9, sl
+ 800046c:	429c      	cmp	r4, r3
+ 800046e:	fa02 f207 	lsl.w	r2, r2, r7
+ 8000472:	fa00 f107 	lsl.w	r1, r0, r7
+ 8000476:	d90b      	bls.n	8000490 <__udivmoddi4+0x1b0>
+ 8000478:	eb1e 0303 	adds.w	r3, lr, r3
+ 800047c:	f109 30ff 	add.w	r0, r9, #4294967295
+ 8000480:	f080 8087 	bcs.w	8000592 <__udivmoddi4+0x2b2>
+ 8000484:	429c      	cmp	r4, r3
+ 8000486:	f240 8084 	bls.w	8000592 <__udivmoddi4+0x2b2>
+ 800048a:	f1a9 0902 	sub.w	r9, r9, #2
+ 800048e:	4473      	add	r3, lr
+ 8000490:	1b1b      	subs	r3, r3, r4
+ 8000492:	b2ad      	uxth	r5, r5
+ 8000494:	fbb3 f0f8 	udiv	r0, r3, r8
+ 8000498:	fb08 3310 	mls	r3, r8, r0, r3
+ 800049c:	ea45 4403 	orr.w	r4, r5, r3, lsl #16
+ 80004a0:	fb00 fa0a 	mul.w	sl, r0, sl
+ 80004a4:	45a2      	cmp	sl, r4
+ 80004a6:	d908      	bls.n	80004ba <__udivmoddi4+0x1da>
+ 80004a8:	eb1e 0404 	adds.w	r4, lr, r4
+ 80004ac:	f100 33ff 	add.w	r3, r0, #4294967295
+ 80004b0:	d26b      	bcs.n	800058a <__udivmoddi4+0x2aa>
+ 80004b2:	45a2      	cmp	sl, r4
+ 80004b4:	d969      	bls.n	800058a <__udivmoddi4+0x2aa>
+ 80004b6:	3802      	subs	r0, #2
+ 80004b8:	4474      	add	r4, lr
+ 80004ba:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
+ 80004be:	fba0 8902 	umull	r8, r9, r0, r2
+ 80004c2:	eba4 040a 	sub.w	r4, r4, sl
+ 80004c6:	454c      	cmp	r4, r9
+ 80004c8:	46c2      	mov	sl, r8
+ 80004ca:	464b      	mov	r3, r9
+ 80004cc:	d354      	bcc.n	8000578 <__udivmoddi4+0x298>
+ 80004ce:	d051      	beq.n	8000574 <__udivmoddi4+0x294>
+ 80004d0:	2e00      	cmp	r6, #0
+ 80004d2:	d069      	beq.n	80005a8 <__udivmoddi4+0x2c8>
+ 80004d4:	ebb1 050a 	subs.w	r5, r1, sl
+ 80004d8:	eb64 0403 	sbc.w	r4, r4, r3
+ 80004dc:	fa04 fc0c 	lsl.w	ip, r4, ip
+ 80004e0:	40fd      	lsrs	r5, r7
+ 80004e2:	40fc      	lsrs	r4, r7
+ 80004e4:	ea4c 0505 	orr.w	r5, ip, r5
+ 80004e8:	e9c6 5400 	strd	r5, r4, [r6]
+ 80004ec:	2700      	movs	r7, #0
+ 80004ee:	e747      	b.n	8000380 <__udivmoddi4+0xa0>
+ 80004f0:	f1c2 0320 	rsb	r3, r2, #32
+ 80004f4:	fa20 f703 	lsr.w	r7, r0, r3
+ 80004f8:	4095      	lsls	r5, r2
+ 80004fa:	fa01 f002 	lsl.w	r0, r1, r2
+ 80004fe:	fa21 f303 	lsr.w	r3, r1, r3
+ 8000502:	ea4f 4e15 	mov.w	lr, r5, lsr #16
+ 8000506:	4338      	orrs	r0, r7
+ 8000508:	0c01      	lsrs	r1, r0, #16
+ 800050a:	fbb3 f7fe 	udiv	r7, r3, lr
+ 800050e:	fa1f f885 	uxth.w	r8, r5
+ 8000512:	fb0e 3317 	mls	r3, lr, r7, r3
+ 8000516:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
+ 800051a:	fb07 f308 	mul.w	r3, r7, r8
+ 800051e:	428b      	cmp	r3, r1
+ 8000520:	fa04 f402 	lsl.w	r4, r4, r2
+ 8000524:	d907      	bls.n	8000536 <__udivmoddi4+0x256>
+ 8000526:	1869      	adds	r1, r5, r1
+ 8000528:	f107 3cff 	add.w	ip, r7, #4294967295
+ 800052c:	d22f      	bcs.n	800058e <__udivmoddi4+0x2ae>
+ 800052e:	428b      	cmp	r3, r1
+ 8000530:	d92d      	bls.n	800058e <__udivmoddi4+0x2ae>
+ 8000532:	3f02      	subs	r7, #2
+ 8000534:	4429      	add	r1, r5
+ 8000536:	1acb      	subs	r3, r1, r3
+ 8000538:	b281      	uxth	r1, r0
+ 800053a:	fbb3 f0fe 	udiv	r0, r3, lr
+ 800053e:	fb0e 3310 	mls	r3, lr, r0, r3
+ 8000542:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
+ 8000546:	fb00 f308 	mul.w	r3, r0, r8
+ 800054a:	428b      	cmp	r3, r1
+ 800054c:	d907      	bls.n	800055e <__udivmoddi4+0x27e>
+ 800054e:	1869      	adds	r1, r5, r1
+ 8000550:	f100 3cff 	add.w	ip, r0, #4294967295
+ 8000554:	d217      	bcs.n	8000586 <__udivmoddi4+0x2a6>
+ 8000556:	428b      	cmp	r3, r1
+ 8000558:	d915      	bls.n	8000586 <__udivmoddi4+0x2a6>
+ 800055a:	3802      	subs	r0, #2
+ 800055c:	4429      	add	r1, r5
+ 800055e:	1ac9      	subs	r1, r1, r3
+ 8000560:	ea40 4707 	orr.w	r7, r0, r7, lsl #16
+ 8000564:	e73b      	b.n	80003de <__udivmoddi4+0xfe>
+ 8000566:	4637      	mov	r7, r6
+ 8000568:	4630      	mov	r0, r6
+ 800056a:	e709      	b.n	8000380 <__udivmoddi4+0xa0>
+ 800056c:	4607      	mov	r7, r0
+ 800056e:	e6e7      	b.n	8000340 <__udivmoddi4+0x60>
+ 8000570:	4618      	mov	r0, r3
+ 8000572:	e6fb      	b.n	800036c <__udivmoddi4+0x8c>
+ 8000574:	4541      	cmp	r1, r8
+ 8000576:	d2ab      	bcs.n	80004d0 <__udivmoddi4+0x1f0>
+ 8000578:	ebb8 0a02 	subs.w	sl, r8, r2
+ 800057c:	eb69 020e 	sbc.w	r2, r9, lr
+ 8000580:	3801      	subs	r0, #1
+ 8000582:	4613      	mov	r3, r2
+ 8000584:	e7a4      	b.n	80004d0 <__udivmoddi4+0x1f0>
+ 8000586:	4660      	mov	r0, ip
+ 8000588:	e7e9      	b.n	800055e <__udivmoddi4+0x27e>
+ 800058a:	4618      	mov	r0, r3
+ 800058c:	e795      	b.n	80004ba <__udivmoddi4+0x1da>
+ 800058e:	4667      	mov	r7, ip
+ 8000590:	e7d1      	b.n	8000536 <__udivmoddi4+0x256>
+ 8000592:	4681      	mov	r9, r0
+ 8000594:	e77c      	b.n	8000490 <__udivmoddi4+0x1b0>
+ 8000596:	3802      	subs	r0, #2
+ 8000598:	442c      	add	r4, r5
+ 800059a:	e747      	b.n	800042c <__udivmoddi4+0x14c>
+ 800059c:	f1ac 0c02 	sub.w	ip, ip, #2
+ 80005a0:	442b      	add	r3, r5
+ 80005a2:	e72f      	b.n	8000404 <__udivmoddi4+0x124>
+ 80005a4:	4638      	mov	r0, r7
+ 80005a6:	e708      	b.n	80003ba <__udivmoddi4+0xda>
+ 80005a8:	4637      	mov	r7, r6
+ 80005aa:	e6e9      	b.n	8000380 <__udivmoddi4+0xa0>
+
+080005ac <__aeabi_idiv0>:
+ 80005ac:	4770      	bx	lr
+ 80005ae:	bf00      	nop
+
+080005b0 <vApplicationIdleHook>:
+void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName);
+void vApplicationMallocFailedHook(void);
+
+/* USER CODE BEGIN 2 */
+__weak void vApplicationIdleHook( void )
+{
+ 80005b0:	b480      	push	{r7}
+ 80005b2:	af00      	add	r7, sp, #0
+   specified, or call vTaskDelay()). If the application makes use of the
+   vTaskDelete() API function (as this demo application does) then it is also
+   important that vApplicationIdleHook() is permitted to return to its calling
+   function, because it is the responsibility of the idle task to clean up
+   memory allocated by the kernel to any task that has since been deleted. */
+}
+ 80005b4:	bf00      	nop
+ 80005b6:	46bd      	mov	sp, r7
+ 80005b8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80005bc:	4770      	bx	lr
+
+080005be <vApplicationStackOverflowHook>:
+/* USER CODE END 2 */
+
+/* USER CODE BEGIN 4 */
+__weak void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
+{
+ 80005be:	b480      	push	{r7}
+ 80005c0:	b083      	sub	sp, #12
+ 80005c2:	af00      	add	r7, sp, #0
+ 80005c4:	6078      	str	r0, [r7, #4]
+ 80005c6:	6039      	str	r1, [r7, #0]
+   /* Run time stack overflow checking is performed if
+   configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
+   called if a stack overflow is detected. */
+}
+ 80005c8:	bf00      	nop
+ 80005ca:	370c      	adds	r7, #12
+ 80005cc:	46bd      	mov	sp, r7
+ 80005ce:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80005d2:	4770      	bx	lr
+
+080005d4 <vApplicationMallocFailedHook>:
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN 5 */
+__weak void vApplicationMallocFailedHook(void)
+{
+ 80005d4:	b480      	push	{r7}
+ 80005d6:	af00      	add	r7, sp, #0
+   demo application. If heap_1.c or heap_2.c are used, then the size of the
+   heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in
+   FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used
+   to query the size of free heap space that remains (although it does not
+   provide information on how the remaining heap might be fragmented). */
+}
+ 80005d8:	bf00      	nop
+ 80005da:	46bd      	mov	sp, r7
+ 80005dc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80005e0:	4770      	bx	lr
+	...
+
+080005e4 <vApplicationGetIdleTaskMemory>:
+/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
+static StaticTask_t xIdleTaskTCBBuffer;
+static StackType_t xIdleStack[configMINIMAL_STACK_SIZE];
+
+void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
+{
+ 80005e4:	b480      	push	{r7}
+ 80005e6:	b085      	sub	sp, #20
+ 80005e8:	af00      	add	r7, sp, #0
+ 80005ea:	60f8      	str	r0, [r7, #12]
+ 80005ec:	60b9      	str	r1, [r7, #8]
+ 80005ee:	607a      	str	r2, [r7, #4]
+  *ppxIdleTaskTCBBuffer = &xIdleTaskTCBBuffer;
+ 80005f0:	68fb      	ldr	r3, [r7, #12]
+ 80005f2:	4a07      	ldr	r2, [pc, #28]	; (8000610 <vApplicationGetIdleTaskMemory+0x2c>)
+ 80005f4:	601a      	str	r2, [r3, #0]
+  *ppxIdleTaskStackBuffer = &xIdleStack[0];
+ 80005f6:	68bb      	ldr	r3, [r7, #8]
+ 80005f8:	4a06      	ldr	r2, [pc, #24]	; (8000614 <vApplicationGetIdleTaskMemory+0x30>)
+ 80005fa:	601a      	str	r2, [r3, #0]
+  *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
+ 80005fc:	687b      	ldr	r3, [r7, #4]
+ 80005fe:	2280      	movs	r2, #128	; 0x80
+ 8000600:	601a      	str	r2, [r3, #0]
+  /* place for user code */
+}
+ 8000602:	bf00      	nop
+ 8000604:	3714      	adds	r7, #20
+ 8000606:	46bd      	mov	sp, r7
+ 8000608:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800060c:	4770      	bx	lr
+ 800060e:	bf00      	nop
+ 8000610:	200000f0 	.word	0x200000f0
+ 8000614:	20000148 	.word	0x20000148
+
+08000618 <ft5336_Init>:
+  *         from MCU to FT5336 : ie I2C channel initialization (if required).
+  * @param  DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+  * @retval None
+  */
+void ft5336_Init(uint16_t DeviceAddr)
+{
+ 8000618:	b580      	push	{r7, lr}
+ 800061a:	b082      	sub	sp, #8
+ 800061c:	af00      	add	r7, sp, #0
+ 800061e:	4603      	mov	r3, r0
+ 8000620:	80fb      	strh	r3, [r7, #6]
+  /* Wait at least 200ms after power up before accessing registers
+   * Trsi timing (Time of starting to report point after resetting) from FT5336GQQ datasheet */
+  TS_IO_Delay(200);
+ 8000622:	20c8      	movs	r0, #200	; 0xc8
+ 8000624:	f001 ffec 	bl	8002600 <TS_IO_Delay>
+
+  /* Initialize I2C link if needed */
+  ft5336_I2C_InitializeIfRequired();
+ 8000628:	f000 fa7a 	bl	8000b20 <ft5336_I2C_InitializeIfRequired>
+}
+ 800062c:	bf00      	nop
+ 800062e:	3708      	adds	r7, #8
+ 8000630:	46bd      	mov	sp, r7
+ 8000632:	bd80      	pop	{r7, pc}
+
+08000634 <ft5336_Reset>:
+  *         @note : Not applicable to FT5336.
+  * @param  DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+  * @retval None
+  */
+void ft5336_Reset(uint16_t DeviceAddr)
+{
+ 8000634:	b480      	push	{r7}
+ 8000636:	b083      	sub	sp, #12
+ 8000638:	af00      	add	r7, sp, #0
+ 800063a:	4603      	mov	r3, r0
+ 800063c:	80fb      	strh	r3, [r7, #6]
+  /* Do nothing */
+  /* No software reset sequence available in FT5336 IC */
+}
+ 800063e:	bf00      	nop
+ 8000640:	370c      	adds	r7, #12
+ 8000642:	46bd      	mov	sp, r7
+ 8000644:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000648:	4770      	bx	lr
+
+0800064a <ft5336_ReadID>:
+  *         able to read the FT5336 device ID, and verify this is a FT5336.
+  * @param  DeviceAddr: I2C FT5336 Slave address.
+  * @retval The Device ID (two bytes).
+  */
+uint16_t ft5336_ReadID(uint16_t DeviceAddr)
+{
+ 800064a:	b580      	push	{r7, lr}
+ 800064c:	b084      	sub	sp, #16
+ 800064e:	af00      	add	r7, sp, #0
+ 8000650:	4603      	mov	r3, r0
+ 8000652:	80fb      	strh	r3, [r7, #6]
+  volatile uint8_t ucReadId = 0;
+ 8000654:	2300      	movs	r3, #0
+ 8000656:	737b      	strb	r3, [r7, #13]
+  uint8_t nbReadAttempts = 0;
+ 8000658:	2300      	movs	r3, #0
+ 800065a:	73fb      	strb	r3, [r7, #15]
+  uint8_t bFoundDevice = 0; /* Device not found by default */
+ 800065c:	2300      	movs	r3, #0
+ 800065e:	73bb      	strb	r3, [r7, #14]
+
+  /* Initialize I2C link if needed */
+  ft5336_I2C_InitializeIfRequired();
+ 8000660:	f000 fa5e 	bl	8000b20 <ft5336_I2C_InitializeIfRequired>
+
+  /* At maximum 4 attempts to read ID : exit at first finding of the searched device ID */
+  for(nbReadAttempts = 0; ((nbReadAttempts < 3) && !(bFoundDevice)); nbReadAttempts++)
+ 8000664:	2300      	movs	r3, #0
+ 8000666:	73fb      	strb	r3, [r7, #15]
+ 8000668:	e010      	b.n	800068c <ft5336_ReadID+0x42>
+  {
+    /* Read register FT5336_CHIP_ID_REG as DeviceID detection */
+    ucReadId = TS_IO_Read(DeviceAddr, FT5336_CHIP_ID_REG);
+ 800066a:	88fb      	ldrh	r3, [r7, #6]
+ 800066c:	b2db      	uxtb	r3, r3
+ 800066e:	21a8      	movs	r1, #168	; 0xa8
+ 8000670:	4618      	mov	r0, r3
+ 8000672:	f001 ffa7 	bl	80025c4 <TS_IO_Read>
+ 8000676:	4603      	mov	r3, r0
+ 8000678:	737b      	strb	r3, [r7, #13]
+
+    /* Found the searched device ID ? */
+    if(ucReadId == FT5336_ID_VALUE)
+ 800067a:	7b7b      	ldrb	r3, [r7, #13]
+ 800067c:	b2db      	uxtb	r3, r3
+ 800067e:	2b51      	cmp	r3, #81	; 0x51
+ 8000680:	d101      	bne.n	8000686 <ft5336_ReadID+0x3c>
+    {
+      /* Set device as found */
+      bFoundDevice = 1;
+ 8000682:	2301      	movs	r3, #1
+ 8000684:	73bb      	strb	r3, [r7, #14]
+  for(nbReadAttempts = 0; ((nbReadAttempts < 3) && !(bFoundDevice)); nbReadAttempts++)
+ 8000686:	7bfb      	ldrb	r3, [r7, #15]
+ 8000688:	3301      	adds	r3, #1
+ 800068a:	73fb      	strb	r3, [r7, #15]
+ 800068c:	7bfb      	ldrb	r3, [r7, #15]
+ 800068e:	2b02      	cmp	r3, #2
+ 8000690:	d802      	bhi.n	8000698 <ft5336_ReadID+0x4e>
+ 8000692:	7bbb      	ldrb	r3, [r7, #14]
+ 8000694:	2b00      	cmp	r3, #0
+ 8000696:	d0e8      	beq.n	800066a <ft5336_ReadID+0x20>
+    }
+  }
+
+  /* Return the device ID value */
+  return (ucReadId);
+ 8000698:	7b7b      	ldrb	r3, [r7, #13]
+ 800069a:	b2db      	uxtb	r3, r3
+ 800069c:	b29b      	uxth	r3, r3
+}
+ 800069e:	4618      	mov	r0, r3
+ 80006a0:	3710      	adds	r7, #16
+ 80006a2:	46bd      	mov	sp, r7
+ 80006a4:	bd80      	pop	{r7, pc}
+
+080006a6 <ft5336_TS_Start>:
+  * @brief  Configures the touch Screen IC device to start detecting touches
+  * @param  DeviceAddr: Device address on communication Bus (I2C slave address).
+  * @retval None.
+  */
+void ft5336_TS_Start(uint16_t DeviceAddr)
+{
+ 80006a6:	b580      	push	{r7, lr}
+ 80006a8:	b082      	sub	sp, #8
+ 80006aa:	af00      	add	r7, sp, #0
+ 80006ac:	4603      	mov	r3, r0
+ 80006ae:	80fb      	strh	r3, [r7, #6]
+  /* Minimum static configuration of FT5336 */
+  FT5336_ASSERT(ft5336_TS_Configure(DeviceAddr));
+ 80006b0:	88fb      	ldrh	r3, [r7, #6]
+ 80006b2:	4618      	mov	r0, r3
+ 80006b4:	f000 fa44 	bl	8000b40 <ft5336_TS_Configure>
+
+  /* By default set FT5336 IC in Polling mode : no INT generation on FT5336 for new touch available */
+  /* Note TS_INT is active low                                                                      */
+  ft5336_TS_DisableIT(DeviceAddr);
+ 80006b8:	88fb      	ldrh	r3, [r7, #6]
+ 80006ba:	4618      	mov	r0, r3
+ 80006bc:	f000 f932 	bl	8000924 <ft5336_TS_DisableIT>
+}
+ 80006c0:	bf00      	nop
+ 80006c2:	3708      	adds	r7, #8
+ 80006c4:	46bd      	mov	sp, r7
+ 80006c6:	bd80      	pop	{r7, pc}
+
+080006c8 <ft5336_TS_DetectTouch>:
+  *         variables).
+  * @param  DeviceAddr: Device address on communication Bus.
+  * @retval : Number of active touches detected (can be 0, 1 or 2).
+  */
+uint8_t ft5336_TS_DetectTouch(uint16_t DeviceAddr)
+{
+ 80006c8:	b580      	push	{r7, lr}
+ 80006ca:	b084      	sub	sp, #16
+ 80006cc:	af00      	add	r7, sp, #0
+ 80006ce:	4603      	mov	r3, r0
+ 80006d0:	80fb      	strh	r3, [r7, #6]
+  volatile uint8_t nbTouch = 0;
+ 80006d2:	2300      	movs	r3, #0
+ 80006d4:	73fb      	strb	r3, [r7, #15]
+
+  /* Read register FT5336_TD_STAT_REG to check number of touches detection */
+  nbTouch = TS_IO_Read(DeviceAddr, FT5336_TD_STAT_REG);
+ 80006d6:	88fb      	ldrh	r3, [r7, #6]
+ 80006d8:	b2db      	uxtb	r3, r3
+ 80006da:	2102      	movs	r1, #2
+ 80006dc:	4618      	mov	r0, r3
+ 80006de:	f001 ff71 	bl	80025c4 <TS_IO_Read>
+ 80006e2:	4603      	mov	r3, r0
+ 80006e4:	73fb      	strb	r3, [r7, #15]
+  nbTouch &= FT5336_TD_STAT_MASK;
+ 80006e6:	7bfb      	ldrb	r3, [r7, #15]
+ 80006e8:	b2db      	uxtb	r3, r3
+ 80006ea:	f003 030f 	and.w	r3, r3, #15
+ 80006ee:	b2db      	uxtb	r3, r3
+ 80006f0:	73fb      	strb	r3, [r7, #15]
+
+  if(nbTouch > FT5336_MAX_DETECTABLE_TOUCH)
+ 80006f2:	7bfb      	ldrb	r3, [r7, #15]
+ 80006f4:	b2db      	uxtb	r3, r3
+ 80006f6:	2b05      	cmp	r3, #5
+ 80006f8:	d901      	bls.n	80006fe <ft5336_TS_DetectTouch+0x36>
+  {
+    /* If invalid number of touch detected, set it to zero */
+    nbTouch = 0;
+ 80006fa:	2300      	movs	r3, #0
+ 80006fc:	73fb      	strb	r3, [r7, #15]
+  }
+
+  /* Update ft5336 driver internal global : current number of active touches */
+  ft5336_handle.currActiveTouchNb = nbTouch;
+ 80006fe:	7bfb      	ldrb	r3, [r7, #15]
+ 8000700:	b2da      	uxtb	r2, r3
+ 8000702:	4b05      	ldr	r3, [pc, #20]	; (8000718 <ft5336_TS_DetectTouch+0x50>)
+ 8000704:	705a      	strb	r2, [r3, #1]
+
+  /* Reset current active touch index on which to work on */
+  ft5336_handle.currActiveTouchIdx = 0;
+ 8000706:	4b04      	ldr	r3, [pc, #16]	; (8000718 <ft5336_TS_DetectTouch+0x50>)
+ 8000708:	2200      	movs	r2, #0
+ 800070a:	709a      	strb	r2, [r3, #2]
+
+  return(nbTouch);
+ 800070c:	7bfb      	ldrb	r3, [r7, #15]
+ 800070e:	b2db      	uxtb	r3, r3
+}
+ 8000710:	4618      	mov	r0, r3
+ 8000712:	3710      	adds	r7, #16
+ 8000714:	46bd      	mov	sp, r7
+ 8000716:	bd80      	pop	{r7, pc}
+ 8000718:	20000348 	.word	0x20000348
+
+0800071c <ft5336_TS_GetXY>:
+  * @param  X: Pointer to X position value
+  * @param  Y: Pointer to Y position value
+  * @retval None.
+  */
+void ft5336_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
+{
+ 800071c:	b580      	push	{r7, lr}
+ 800071e:	b086      	sub	sp, #24
+ 8000720:	af00      	add	r7, sp, #0
+ 8000722:	4603      	mov	r3, r0
+ 8000724:	60b9      	str	r1, [r7, #8]
+ 8000726:	607a      	str	r2, [r7, #4]
+ 8000728:	81fb      	strh	r3, [r7, #14]
+  volatile uint8_t ucReadData = 0;
+ 800072a:	2300      	movs	r3, #0
+ 800072c:	74fb      	strb	r3, [r7, #19]
+  static uint16_t coord;
+  uint8_t regAddressXLow = 0;
+ 800072e:	2300      	movs	r3, #0
+ 8000730:	75fb      	strb	r3, [r7, #23]
+  uint8_t regAddressXHigh = 0;
+ 8000732:	2300      	movs	r3, #0
+ 8000734:	75bb      	strb	r3, [r7, #22]
+  uint8_t regAddressYLow = 0;
+ 8000736:	2300      	movs	r3, #0
+ 8000738:	757b      	strb	r3, [r7, #21]
+  uint8_t regAddressYHigh = 0;
+ 800073a:	2300      	movs	r3, #0
+ 800073c:	753b      	strb	r3, [r7, #20]
+
+  if(ft5336_handle.currActiveTouchIdx < ft5336_handle.currActiveTouchNb)
+ 800073e:	4b6d      	ldr	r3, [pc, #436]	; (80008f4 <ft5336_TS_GetXY+0x1d8>)
+ 8000740:	789a      	ldrb	r2, [r3, #2]
+ 8000742:	4b6c      	ldr	r3, [pc, #432]	; (80008f4 <ft5336_TS_GetXY+0x1d8>)
+ 8000744:	785b      	ldrb	r3, [r3, #1]
+ 8000746:	429a      	cmp	r2, r3
+ 8000748:	f080 80cf 	bcs.w	80008ea <ft5336_TS_GetXY+0x1ce>
+  {
+    switch(ft5336_handle.currActiveTouchIdx)
+ 800074c:	4b69      	ldr	r3, [pc, #420]	; (80008f4 <ft5336_TS_GetXY+0x1d8>)
+ 800074e:	789b      	ldrb	r3, [r3, #2]
+ 8000750:	2b09      	cmp	r3, #9
+ 8000752:	d871      	bhi.n	8000838 <ft5336_TS_GetXY+0x11c>
+ 8000754:	a201      	add	r2, pc, #4	; (adr r2, 800075c <ft5336_TS_GetXY+0x40>)
+ 8000756:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 800075a:	bf00      	nop
+ 800075c:	08000785 	.word	0x08000785
+ 8000760:	08000797 	.word	0x08000797
+ 8000764:	080007a9 	.word	0x080007a9
+ 8000768:	080007bb 	.word	0x080007bb
+ 800076c:	080007cd 	.word	0x080007cd
+ 8000770:	080007df 	.word	0x080007df
+ 8000774:	080007f1 	.word	0x080007f1
+ 8000778:	08000803 	.word	0x08000803
+ 800077c:	08000815 	.word	0x08000815
+ 8000780:	08000827 	.word	0x08000827
+    {
+    case 0 :
+      regAddressXLow  = FT5336_P1_XL_REG;
+ 8000784:	2304      	movs	r3, #4
+ 8000786:	75fb      	strb	r3, [r7, #23]
+      regAddressXHigh = FT5336_P1_XH_REG;
+ 8000788:	2303      	movs	r3, #3
+ 800078a:	75bb      	strb	r3, [r7, #22]
+      regAddressYLow  = FT5336_P1_YL_REG;
+ 800078c:	2306      	movs	r3, #6
+ 800078e:	757b      	strb	r3, [r7, #21]
+      regAddressYHigh = FT5336_P1_YH_REG;
+ 8000790:	2305      	movs	r3, #5
+ 8000792:	753b      	strb	r3, [r7, #20]
+      break;
+ 8000794:	e051      	b.n	800083a <ft5336_TS_GetXY+0x11e>
+
+    case 1 :
+      regAddressXLow  = FT5336_P2_XL_REG;
+ 8000796:	230a      	movs	r3, #10
+ 8000798:	75fb      	strb	r3, [r7, #23]
+      regAddressXHigh = FT5336_P2_XH_REG;
+ 800079a:	2309      	movs	r3, #9
+ 800079c:	75bb      	strb	r3, [r7, #22]
+      regAddressYLow  = FT5336_P2_YL_REG;
+ 800079e:	230c      	movs	r3, #12
+ 80007a0:	757b      	strb	r3, [r7, #21]
+      regAddressYHigh = FT5336_P2_YH_REG;
+ 80007a2:	230b      	movs	r3, #11
+ 80007a4:	753b      	strb	r3, [r7, #20]
+      break;
+ 80007a6:	e048      	b.n	800083a <ft5336_TS_GetXY+0x11e>
+
+    case 2 :
+      regAddressXLow  = FT5336_P3_XL_REG;
+ 80007a8:	2310      	movs	r3, #16
+ 80007aa:	75fb      	strb	r3, [r7, #23]
+      regAddressXHigh = FT5336_P3_XH_REG;
+ 80007ac:	230f      	movs	r3, #15
+ 80007ae:	75bb      	strb	r3, [r7, #22]
+      regAddressYLow  = FT5336_P3_YL_REG;
+ 80007b0:	2312      	movs	r3, #18
+ 80007b2:	757b      	strb	r3, [r7, #21]
+      regAddressYHigh = FT5336_P3_YH_REG;
+ 80007b4:	2311      	movs	r3, #17
+ 80007b6:	753b      	strb	r3, [r7, #20]
+      break;
+ 80007b8:	e03f      	b.n	800083a <ft5336_TS_GetXY+0x11e>
+
+    case 3 :
+      regAddressXLow  = FT5336_P4_XL_REG;
+ 80007ba:	2316      	movs	r3, #22
+ 80007bc:	75fb      	strb	r3, [r7, #23]
+      regAddressXHigh = FT5336_P4_XH_REG;
+ 80007be:	2315      	movs	r3, #21
+ 80007c0:	75bb      	strb	r3, [r7, #22]
+      regAddressYLow  = FT5336_P4_YL_REG;
+ 80007c2:	2318      	movs	r3, #24
+ 80007c4:	757b      	strb	r3, [r7, #21]
+      regAddressYHigh = FT5336_P4_YH_REG;
+ 80007c6:	2317      	movs	r3, #23
+ 80007c8:	753b      	strb	r3, [r7, #20]
+      break;
+ 80007ca:	e036      	b.n	800083a <ft5336_TS_GetXY+0x11e>
+
+    case 4 :
+      regAddressXLow  = FT5336_P5_XL_REG;
+ 80007cc:	231c      	movs	r3, #28
+ 80007ce:	75fb      	strb	r3, [r7, #23]
+      regAddressXHigh = FT5336_P5_XH_REG;
+ 80007d0:	231b      	movs	r3, #27
+ 80007d2:	75bb      	strb	r3, [r7, #22]
+      regAddressYLow  = FT5336_P5_YL_REG;
+ 80007d4:	231e      	movs	r3, #30
+ 80007d6:	757b      	strb	r3, [r7, #21]
+      regAddressYHigh = FT5336_P5_YH_REG;
+ 80007d8:	231d      	movs	r3, #29
+ 80007da:	753b      	strb	r3, [r7, #20]
+      break;
+ 80007dc:	e02d      	b.n	800083a <ft5336_TS_GetXY+0x11e>
+
+    case 5 :
+      regAddressXLow  = FT5336_P6_XL_REG;
+ 80007de:	2322      	movs	r3, #34	; 0x22
+ 80007e0:	75fb      	strb	r3, [r7, #23]
+      regAddressXHigh = FT5336_P6_XH_REG;
+ 80007e2:	2321      	movs	r3, #33	; 0x21
+ 80007e4:	75bb      	strb	r3, [r7, #22]
+      regAddressYLow  = FT5336_P6_YL_REG;
+ 80007e6:	2324      	movs	r3, #36	; 0x24
+ 80007e8:	757b      	strb	r3, [r7, #21]
+      regAddressYHigh = FT5336_P6_YH_REG;
+ 80007ea:	2323      	movs	r3, #35	; 0x23
+ 80007ec:	753b      	strb	r3, [r7, #20]
+      break;
+ 80007ee:	e024      	b.n	800083a <ft5336_TS_GetXY+0x11e>
+
+    case 6 :
+      regAddressXLow  = FT5336_P7_XL_REG;
+ 80007f0:	2328      	movs	r3, #40	; 0x28
+ 80007f2:	75fb      	strb	r3, [r7, #23]
+      regAddressXHigh = FT5336_P7_XH_REG;
+ 80007f4:	2327      	movs	r3, #39	; 0x27
+ 80007f6:	75bb      	strb	r3, [r7, #22]
+      regAddressYLow  = FT5336_P7_YL_REG;
+ 80007f8:	232a      	movs	r3, #42	; 0x2a
+ 80007fa:	757b      	strb	r3, [r7, #21]
+      regAddressYHigh = FT5336_P7_YH_REG;
+ 80007fc:	2329      	movs	r3, #41	; 0x29
+ 80007fe:	753b      	strb	r3, [r7, #20]
+      break;
+ 8000800:	e01b      	b.n	800083a <ft5336_TS_GetXY+0x11e>
+
+    case 7 :
+      regAddressXLow  = FT5336_P8_XL_REG;
+ 8000802:	232e      	movs	r3, #46	; 0x2e
+ 8000804:	75fb      	strb	r3, [r7, #23]
+      regAddressXHigh = FT5336_P8_XH_REG;
+ 8000806:	232d      	movs	r3, #45	; 0x2d
+ 8000808:	75bb      	strb	r3, [r7, #22]
+      regAddressYLow  = FT5336_P8_YL_REG;
+ 800080a:	2330      	movs	r3, #48	; 0x30
+ 800080c:	757b      	strb	r3, [r7, #21]
+      regAddressYHigh = FT5336_P8_YH_REG;
+ 800080e:	232f      	movs	r3, #47	; 0x2f
+ 8000810:	753b      	strb	r3, [r7, #20]
+      break;
+ 8000812:	e012      	b.n	800083a <ft5336_TS_GetXY+0x11e>
+
+    case 8 :
+      regAddressXLow  = FT5336_P9_XL_REG;
+ 8000814:	2334      	movs	r3, #52	; 0x34
+ 8000816:	75fb      	strb	r3, [r7, #23]
+      regAddressXHigh = FT5336_P9_XH_REG;
+ 8000818:	2333      	movs	r3, #51	; 0x33
+ 800081a:	75bb      	strb	r3, [r7, #22]
+      regAddressYLow  = FT5336_P9_YL_REG;
+ 800081c:	2336      	movs	r3, #54	; 0x36
+ 800081e:	757b      	strb	r3, [r7, #21]
+      regAddressYHigh = FT5336_P9_YH_REG;
+ 8000820:	2335      	movs	r3, #53	; 0x35
+ 8000822:	753b      	strb	r3, [r7, #20]
+      break;
+ 8000824:	e009      	b.n	800083a <ft5336_TS_GetXY+0x11e>
+
+    case 9 :
+      regAddressXLow  = FT5336_P10_XL_REG;
+ 8000826:	233a      	movs	r3, #58	; 0x3a
+ 8000828:	75fb      	strb	r3, [r7, #23]
+      regAddressXHigh = FT5336_P10_XH_REG;
+ 800082a:	2339      	movs	r3, #57	; 0x39
+ 800082c:	75bb      	strb	r3, [r7, #22]
+      regAddressYLow  = FT5336_P10_YL_REG;
+ 800082e:	233c      	movs	r3, #60	; 0x3c
+ 8000830:	757b      	strb	r3, [r7, #21]
+      regAddressYHigh = FT5336_P10_YH_REG;
+ 8000832:	233b      	movs	r3, #59	; 0x3b
+ 8000834:	753b      	strb	r3, [r7, #20]
+      break;
+ 8000836:	e000      	b.n	800083a <ft5336_TS_GetXY+0x11e>
+
+    default :
+      break;
+ 8000838:	bf00      	nop
+
+    } /* end switch(ft5336_handle.currActiveTouchIdx) */
+
+    /* Read low part of X position */
+    ucReadData = TS_IO_Read(DeviceAddr, regAddressXLow);
+ 800083a:	89fb      	ldrh	r3, [r7, #14]
+ 800083c:	b2db      	uxtb	r3, r3
+ 800083e:	7dfa      	ldrb	r2, [r7, #23]
+ 8000840:	4611      	mov	r1, r2
+ 8000842:	4618      	mov	r0, r3
+ 8000844:	f001 febe 	bl	80025c4 <TS_IO_Read>
+ 8000848:	4603      	mov	r3, r0
+ 800084a:	74fb      	strb	r3, [r7, #19]
+    coord = (ucReadData & FT5336_TOUCH_POS_LSB_MASK) >> FT5336_TOUCH_POS_LSB_SHIFT;
+ 800084c:	7cfb      	ldrb	r3, [r7, #19]
+ 800084e:	b2db      	uxtb	r3, r3
+ 8000850:	b29a      	uxth	r2, r3
+ 8000852:	4b29      	ldr	r3, [pc, #164]	; (80008f8 <ft5336_TS_GetXY+0x1dc>)
+ 8000854:	801a      	strh	r2, [r3, #0]
+
+    /* Read high part of X position */
+    ucReadData = TS_IO_Read(DeviceAddr, regAddressXHigh);
+ 8000856:	89fb      	ldrh	r3, [r7, #14]
+ 8000858:	b2db      	uxtb	r3, r3
+ 800085a:	7dba      	ldrb	r2, [r7, #22]
+ 800085c:	4611      	mov	r1, r2
+ 800085e:	4618      	mov	r0, r3
+ 8000860:	f001 feb0 	bl	80025c4 <TS_IO_Read>
+ 8000864:	4603      	mov	r3, r0
+ 8000866:	74fb      	strb	r3, [r7, #19]
+    coord |= ((ucReadData & FT5336_TOUCH_POS_MSB_MASK) >> FT5336_TOUCH_POS_MSB_SHIFT) << 8;
+ 8000868:	7cfb      	ldrb	r3, [r7, #19]
+ 800086a:	b2db      	uxtb	r3, r3
+ 800086c:	021b      	lsls	r3, r3, #8
+ 800086e:	f403 6370 	and.w	r3, r3, #3840	; 0xf00
+ 8000872:	b21a      	sxth	r2, r3
+ 8000874:	4b20      	ldr	r3, [pc, #128]	; (80008f8 <ft5336_TS_GetXY+0x1dc>)
+ 8000876:	881b      	ldrh	r3, [r3, #0]
+ 8000878:	b21b      	sxth	r3, r3
+ 800087a:	4313      	orrs	r3, r2
+ 800087c:	b21b      	sxth	r3, r3
+ 800087e:	b29a      	uxth	r2, r3
+ 8000880:	4b1d      	ldr	r3, [pc, #116]	; (80008f8 <ft5336_TS_GetXY+0x1dc>)
+ 8000882:	801a      	strh	r2, [r3, #0]
+
+    /* Send back ready X position to caller */
+    *X = coord;
+ 8000884:	4b1c      	ldr	r3, [pc, #112]	; (80008f8 <ft5336_TS_GetXY+0x1dc>)
+ 8000886:	881a      	ldrh	r2, [r3, #0]
+ 8000888:	68bb      	ldr	r3, [r7, #8]
+ 800088a:	801a      	strh	r2, [r3, #0]
+
+    /* Read low part of Y position */
+    ucReadData = TS_IO_Read(DeviceAddr, regAddressYLow);
+ 800088c:	89fb      	ldrh	r3, [r7, #14]
+ 800088e:	b2db      	uxtb	r3, r3
+ 8000890:	7d7a      	ldrb	r2, [r7, #21]
+ 8000892:	4611      	mov	r1, r2
+ 8000894:	4618      	mov	r0, r3
+ 8000896:	f001 fe95 	bl	80025c4 <TS_IO_Read>
+ 800089a:	4603      	mov	r3, r0
+ 800089c:	74fb      	strb	r3, [r7, #19]
+    coord = (ucReadData & FT5336_TOUCH_POS_LSB_MASK) >> FT5336_TOUCH_POS_LSB_SHIFT;
+ 800089e:	7cfb      	ldrb	r3, [r7, #19]
+ 80008a0:	b2db      	uxtb	r3, r3
+ 80008a2:	b29a      	uxth	r2, r3
+ 80008a4:	4b14      	ldr	r3, [pc, #80]	; (80008f8 <ft5336_TS_GetXY+0x1dc>)
+ 80008a6:	801a      	strh	r2, [r3, #0]
+
+    /* Read high part of Y position */
+    ucReadData = TS_IO_Read(DeviceAddr, regAddressYHigh);
+ 80008a8:	89fb      	ldrh	r3, [r7, #14]
+ 80008aa:	b2db      	uxtb	r3, r3
+ 80008ac:	7d3a      	ldrb	r2, [r7, #20]
+ 80008ae:	4611      	mov	r1, r2
+ 80008b0:	4618      	mov	r0, r3
+ 80008b2:	f001 fe87 	bl	80025c4 <TS_IO_Read>
+ 80008b6:	4603      	mov	r3, r0
+ 80008b8:	74fb      	strb	r3, [r7, #19]
+    coord |= ((ucReadData & FT5336_TOUCH_POS_MSB_MASK) >> FT5336_TOUCH_POS_MSB_SHIFT) << 8;
+ 80008ba:	7cfb      	ldrb	r3, [r7, #19]
+ 80008bc:	b2db      	uxtb	r3, r3
+ 80008be:	021b      	lsls	r3, r3, #8
+ 80008c0:	f403 6370 	and.w	r3, r3, #3840	; 0xf00
+ 80008c4:	b21a      	sxth	r2, r3
+ 80008c6:	4b0c      	ldr	r3, [pc, #48]	; (80008f8 <ft5336_TS_GetXY+0x1dc>)
+ 80008c8:	881b      	ldrh	r3, [r3, #0]
+ 80008ca:	b21b      	sxth	r3, r3
+ 80008cc:	4313      	orrs	r3, r2
+ 80008ce:	b21b      	sxth	r3, r3
+ 80008d0:	b29a      	uxth	r2, r3
+ 80008d2:	4b09      	ldr	r3, [pc, #36]	; (80008f8 <ft5336_TS_GetXY+0x1dc>)
+ 80008d4:	801a      	strh	r2, [r3, #0]
+
+    /* Send back ready Y position to caller */
+    *Y = coord;
+ 80008d6:	4b08      	ldr	r3, [pc, #32]	; (80008f8 <ft5336_TS_GetXY+0x1dc>)
+ 80008d8:	881a      	ldrh	r2, [r3, #0]
+ 80008da:	687b      	ldr	r3, [r7, #4]
+ 80008dc:	801a      	strh	r2, [r3, #0]
+
+    ft5336_handle.currActiveTouchIdx++; /* next call will work on next touch */
+ 80008de:	4b05      	ldr	r3, [pc, #20]	; (80008f4 <ft5336_TS_GetXY+0x1d8>)
+ 80008e0:	789b      	ldrb	r3, [r3, #2]
+ 80008e2:	3301      	adds	r3, #1
+ 80008e4:	b2da      	uxtb	r2, r3
+ 80008e6:	4b03      	ldr	r3, [pc, #12]	; (80008f4 <ft5336_TS_GetXY+0x1d8>)
+ 80008e8:	709a      	strb	r2, [r3, #2]
+
+  } /* of if(ft5336_handle.currActiveTouchIdx < ft5336_handle.currActiveTouchNb) */
+}
+ 80008ea:	bf00      	nop
+ 80008ec:	3718      	adds	r7, #24
+ 80008ee:	46bd      	mov	sp, r7
+ 80008f0:	bd80      	pop	{r7, pc}
+ 80008f2:	bf00      	nop
+ 80008f4:	20000348 	.word	0x20000348
+ 80008f8:	2000034c 	.word	0x2000034c
+
+080008fc <ft5336_TS_EnableIT>:
+  *         connected to MCU as EXTI.
+  * @param  DeviceAddr: Device address on communication Bus (Slave I2C address of FT5336).
+  * @retval None
+  */
+void ft5336_TS_EnableIT(uint16_t DeviceAddr)
+{
+ 80008fc:	b580      	push	{r7, lr}
+ 80008fe:	b084      	sub	sp, #16
+ 8000900:	af00      	add	r7, sp, #0
+ 8000902:	4603      	mov	r3, r0
+ 8000904:	80fb      	strh	r3, [r7, #6]
+   uint8_t regValue = 0;
+ 8000906:	2300      	movs	r3, #0
+ 8000908:	73fb      	strb	r3, [r7, #15]
+   regValue = (FT5336_G_MODE_INTERRUPT_TRIGGER & (FT5336_G_MODE_INTERRUPT_MASK >> FT5336_G_MODE_INTERRUPT_SHIFT)) << FT5336_G_MODE_INTERRUPT_SHIFT;
+ 800090a:	2301      	movs	r3, #1
+ 800090c:	73fb      	strb	r3, [r7, #15]
+
+   /* Set interrupt trigger mode in FT5336_GMODE_REG */
+   TS_IO_Write(DeviceAddr, FT5336_GMODE_REG, regValue);
+ 800090e:	88fb      	ldrh	r3, [r7, #6]
+ 8000910:	b2db      	uxtb	r3, r3
+ 8000912:	7bfa      	ldrb	r2, [r7, #15]
+ 8000914:	21a4      	movs	r1, #164	; 0xa4
+ 8000916:	4618      	mov	r0, r3
+ 8000918:	f001 fe3a 	bl	8002590 <TS_IO_Write>
+}
+ 800091c:	bf00      	nop
+ 800091e:	3710      	adds	r7, #16
+ 8000920:	46bd      	mov	sp, r7
+ 8000922:	bd80      	pop	{r7, pc}
+
+08000924 <ft5336_TS_DisableIT>:
+  *         connected to MCU as EXTI.
+  * @param  DeviceAddr: Device address on communication Bus (Slave I2C address of FT5336).
+  * @retval None
+  */
+void ft5336_TS_DisableIT(uint16_t DeviceAddr)
+{
+ 8000924:	b580      	push	{r7, lr}
+ 8000926:	b084      	sub	sp, #16
+ 8000928:	af00      	add	r7, sp, #0
+ 800092a:	4603      	mov	r3, r0
+ 800092c:	80fb      	strh	r3, [r7, #6]
+  uint8_t regValue = 0;
+ 800092e:	2300      	movs	r3, #0
+ 8000930:	73fb      	strb	r3, [r7, #15]
+  regValue = (FT5336_G_MODE_INTERRUPT_POLLING & (FT5336_G_MODE_INTERRUPT_MASK >> FT5336_G_MODE_INTERRUPT_SHIFT)) << FT5336_G_MODE_INTERRUPT_SHIFT;
+ 8000932:	2300      	movs	r3, #0
+ 8000934:	73fb      	strb	r3, [r7, #15]
+
+  /* Set interrupt polling mode in FT5336_GMODE_REG */
+  TS_IO_Write(DeviceAddr, FT5336_GMODE_REG, regValue);
+ 8000936:	88fb      	ldrh	r3, [r7, #6]
+ 8000938:	b2db      	uxtb	r3, r3
+ 800093a:	7bfa      	ldrb	r2, [r7, #15]
+ 800093c:	21a4      	movs	r1, #164	; 0xa4
+ 800093e:	4618      	mov	r0, r3
+ 8000940:	f001 fe26 	bl	8002590 <TS_IO_Write>
+}
+ 8000944:	bf00      	nop
+ 8000946:	3710      	adds	r7, #16
+ 8000948:	46bd      	mov	sp, r7
+ 800094a:	bd80      	pop	{r7, pc}
+
+0800094c <ft5336_TS_ITStatus>:
+  *         @note : This feature is not applicable to FT5336.
+  * @param  DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+  * @retval TS interrupts status : always return 0 here
+  */
+uint8_t ft5336_TS_ITStatus(uint16_t DeviceAddr)
+{
+ 800094c:	b480      	push	{r7}
+ 800094e:	b083      	sub	sp, #12
+ 8000950:	af00      	add	r7, sp, #0
+ 8000952:	4603      	mov	r3, r0
+ 8000954:	80fb      	strh	r3, [r7, #6]
+  /* Always return 0 as feature not applicable to FT5336 */
+  return 0;
+ 8000956:	2300      	movs	r3, #0
+}
+ 8000958:	4618      	mov	r0, r3
+ 800095a:	370c      	adds	r7, #12
+ 800095c:	46bd      	mov	sp, r7
+ 800095e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000962:	4770      	bx	lr
+
+08000964 <ft5336_TS_ClearIT>:
+  *         @note : This feature is not applicable to FT5336.
+  * @param  DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+  * @retval None
+  */
+void ft5336_TS_ClearIT(uint16_t DeviceAddr)
+{
+ 8000964:	b480      	push	{r7}
+ 8000966:	b083      	sub	sp, #12
+ 8000968:	af00      	add	r7, sp, #0
+ 800096a:	4603      	mov	r3, r0
+ 800096c:	80fb      	strh	r3, [r7, #6]
+  /* Nothing to be done here for FT5336 */
+}
+ 800096e:	bf00      	nop
+ 8000970:	370c      	adds	r7, #12
+ 8000972:	46bd      	mov	sp, r7
+ 8000974:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000978:	4770      	bx	lr
+
+0800097a <ft5336_TS_GetGestureID>:
+  * @param  DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+  * @param  pGestureId : Pointer to get last touch gesture Identification.
+  * @retval None.
+  */
+void ft5336_TS_GetGestureID(uint16_t DeviceAddr, uint32_t * pGestureId)
+{
+ 800097a:	b580      	push	{r7, lr}
+ 800097c:	b084      	sub	sp, #16
+ 800097e:	af00      	add	r7, sp, #0
+ 8000980:	4603      	mov	r3, r0
+ 8000982:	6039      	str	r1, [r7, #0]
+ 8000984:	80fb      	strh	r3, [r7, #6]
+  volatile uint8_t ucReadData = 0;
+ 8000986:	2300      	movs	r3, #0
+ 8000988:	73fb      	strb	r3, [r7, #15]
+
+  ucReadData = TS_IO_Read(DeviceAddr, FT5336_GEST_ID_REG);
+ 800098a:	88fb      	ldrh	r3, [r7, #6]
+ 800098c:	b2db      	uxtb	r3, r3
+ 800098e:	2101      	movs	r1, #1
+ 8000990:	4618      	mov	r0, r3
+ 8000992:	f001 fe17 	bl	80025c4 <TS_IO_Read>
+ 8000996:	4603      	mov	r3, r0
+ 8000998:	73fb      	strb	r3, [r7, #15]
+
+  * pGestureId = ucReadData;
+ 800099a:	7bfb      	ldrb	r3, [r7, #15]
+ 800099c:	b2db      	uxtb	r3, r3
+ 800099e:	461a      	mov	r2, r3
+ 80009a0:	683b      	ldr	r3, [r7, #0]
+ 80009a2:	601a      	str	r2, [r3, #0]
+}
+ 80009a4:	bf00      	nop
+ 80009a6:	3710      	adds	r7, #16
+ 80009a8:	46bd      	mov	sp, r7
+ 80009aa:	bd80      	pop	{r7, pc}
+
+080009ac <ft5336_TS_GetTouchInfo>:
+void ft5336_TS_GetTouchInfo(uint16_t   DeviceAddr,
+                            uint32_t   touchIdx,
+                            uint32_t * pWeight,
+                            uint32_t * pArea,
+                            uint32_t * pEvent)
+{
+ 80009ac:	b580      	push	{r7, lr}
+ 80009ae:	b086      	sub	sp, #24
+ 80009b0:	af00      	add	r7, sp, #0
+ 80009b2:	60b9      	str	r1, [r7, #8]
+ 80009b4:	607a      	str	r2, [r7, #4]
+ 80009b6:	603b      	str	r3, [r7, #0]
+ 80009b8:	4603      	mov	r3, r0
+ 80009ba:	81fb      	strh	r3, [r7, #14]
+  volatile uint8_t ucReadData = 0;
+ 80009bc:	2300      	movs	r3, #0
+ 80009be:	753b      	strb	r3, [r7, #20]
+  uint8_t regAddressXHigh = 0;
+ 80009c0:	2300      	movs	r3, #0
+ 80009c2:	75fb      	strb	r3, [r7, #23]
+  uint8_t regAddressPWeight = 0;
+ 80009c4:	2300      	movs	r3, #0
+ 80009c6:	75bb      	strb	r3, [r7, #22]
+  uint8_t regAddressPMisc = 0;
+ 80009c8:	2300      	movs	r3, #0
+ 80009ca:	757b      	strb	r3, [r7, #21]
+
+  if(touchIdx < ft5336_handle.currActiveTouchNb)
+ 80009cc:	4b4d      	ldr	r3, [pc, #308]	; (8000b04 <ft5336_TS_GetTouchInfo+0x158>)
+ 80009ce:	785b      	ldrb	r3, [r3, #1]
+ 80009d0:	461a      	mov	r2, r3
+ 80009d2:	68bb      	ldr	r3, [r7, #8]
+ 80009d4:	4293      	cmp	r3, r2
+ 80009d6:	f080 8090 	bcs.w	8000afa <ft5336_TS_GetTouchInfo+0x14e>
+  {
+    switch(touchIdx)
+ 80009da:	68bb      	ldr	r3, [r7, #8]
+ 80009dc:	2b09      	cmp	r3, #9
+ 80009de:	d85d      	bhi.n	8000a9c <ft5336_TS_GetTouchInfo+0xf0>
+ 80009e0:	a201      	add	r2, pc, #4	; (adr r2, 80009e8 <ft5336_TS_GetTouchInfo+0x3c>)
+ 80009e2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 80009e6:	bf00      	nop
+ 80009e8:	08000a11 	.word	0x08000a11
+ 80009ec:	08000a1f 	.word	0x08000a1f
+ 80009f0:	08000a2d 	.word	0x08000a2d
+ 80009f4:	08000a3b 	.word	0x08000a3b
+ 80009f8:	08000a49 	.word	0x08000a49
+ 80009fc:	08000a57 	.word	0x08000a57
+ 8000a00:	08000a65 	.word	0x08000a65
+ 8000a04:	08000a73 	.word	0x08000a73
+ 8000a08:	08000a81 	.word	0x08000a81
+ 8000a0c:	08000a8f 	.word	0x08000a8f
+    {
+    case 0 :
+      regAddressXHigh   = FT5336_P1_XH_REG;
+ 8000a10:	2303      	movs	r3, #3
+ 8000a12:	75fb      	strb	r3, [r7, #23]
+      regAddressPWeight = FT5336_P1_WEIGHT_REG;
+ 8000a14:	2307      	movs	r3, #7
+ 8000a16:	75bb      	strb	r3, [r7, #22]
+      regAddressPMisc   = FT5336_P1_MISC_REG;
+ 8000a18:	2308      	movs	r3, #8
+ 8000a1a:	757b      	strb	r3, [r7, #21]
+      break;
+ 8000a1c:	e03f      	b.n	8000a9e <ft5336_TS_GetTouchInfo+0xf2>
+
+    case 1 :
+      regAddressXHigh   = FT5336_P2_XH_REG;
+ 8000a1e:	2309      	movs	r3, #9
+ 8000a20:	75fb      	strb	r3, [r7, #23]
+      regAddressPWeight = FT5336_P2_WEIGHT_REG;
+ 8000a22:	230d      	movs	r3, #13
+ 8000a24:	75bb      	strb	r3, [r7, #22]
+      regAddressPMisc   = FT5336_P2_MISC_REG;
+ 8000a26:	230e      	movs	r3, #14
+ 8000a28:	757b      	strb	r3, [r7, #21]
+      break;
+ 8000a2a:	e038      	b.n	8000a9e <ft5336_TS_GetTouchInfo+0xf2>
+
+    case 2 :
+      regAddressXHigh   = FT5336_P3_XH_REG;
+ 8000a2c:	230f      	movs	r3, #15
+ 8000a2e:	75fb      	strb	r3, [r7, #23]
+      regAddressPWeight = FT5336_P3_WEIGHT_REG;
+ 8000a30:	2313      	movs	r3, #19
+ 8000a32:	75bb      	strb	r3, [r7, #22]
+      regAddressPMisc   = FT5336_P3_MISC_REG;
+ 8000a34:	2314      	movs	r3, #20
+ 8000a36:	757b      	strb	r3, [r7, #21]
+      break;
+ 8000a38:	e031      	b.n	8000a9e <ft5336_TS_GetTouchInfo+0xf2>
+
+    case 3 :
+      regAddressXHigh   = FT5336_P4_XH_REG;
+ 8000a3a:	2315      	movs	r3, #21
+ 8000a3c:	75fb      	strb	r3, [r7, #23]
+      regAddressPWeight = FT5336_P4_WEIGHT_REG;
+ 8000a3e:	2319      	movs	r3, #25
+ 8000a40:	75bb      	strb	r3, [r7, #22]
+      regAddressPMisc   = FT5336_P4_MISC_REG;
+ 8000a42:	231a      	movs	r3, #26
+ 8000a44:	757b      	strb	r3, [r7, #21]
+      break;
+ 8000a46:	e02a      	b.n	8000a9e <ft5336_TS_GetTouchInfo+0xf2>
+
+    case 4 :
+      regAddressXHigh   = FT5336_P5_XH_REG;
+ 8000a48:	231b      	movs	r3, #27
+ 8000a4a:	75fb      	strb	r3, [r7, #23]
+      regAddressPWeight = FT5336_P5_WEIGHT_REG;
+ 8000a4c:	231f      	movs	r3, #31
+ 8000a4e:	75bb      	strb	r3, [r7, #22]
+      regAddressPMisc   = FT5336_P5_MISC_REG;
+ 8000a50:	2320      	movs	r3, #32
+ 8000a52:	757b      	strb	r3, [r7, #21]
+      break;
+ 8000a54:	e023      	b.n	8000a9e <ft5336_TS_GetTouchInfo+0xf2>
+
+    case 5 :
+      regAddressXHigh   = FT5336_P6_XH_REG;
+ 8000a56:	2321      	movs	r3, #33	; 0x21
+ 8000a58:	75fb      	strb	r3, [r7, #23]
+      regAddressPWeight = FT5336_P6_WEIGHT_REG;
+ 8000a5a:	2325      	movs	r3, #37	; 0x25
+ 8000a5c:	75bb      	strb	r3, [r7, #22]
+      regAddressPMisc   = FT5336_P6_MISC_REG;
+ 8000a5e:	2326      	movs	r3, #38	; 0x26
+ 8000a60:	757b      	strb	r3, [r7, #21]
+      break;
+ 8000a62:	e01c      	b.n	8000a9e <ft5336_TS_GetTouchInfo+0xf2>
+
+    case 6 :
+      regAddressXHigh   = FT5336_P7_XH_REG;
+ 8000a64:	2327      	movs	r3, #39	; 0x27
+ 8000a66:	75fb      	strb	r3, [r7, #23]
+      regAddressPWeight = FT5336_P7_WEIGHT_REG;
+ 8000a68:	232b      	movs	r3, #43	; 0x2b
+ 8000a6a:	75bb      	strb	r3, [r7, #22]
+      regAddressPMisc   = FT5336_P7_MISC_REG;
+ 8000a6c:	232c      	movs	r3, #44	; 0x2c
+ 8000a6e:	757b      	strb	r3, [r7, #21]
+      break;
+ 8000a70:	e015      	b.n	8000a9e <ft5336_TS_GetTouchInfo+0xf2>
+
+    case 7 :
+      regAddressXHigh   = FT5336_P8_XH_REG;
+ 8000a72:	232d      	movs	r3, #45	; 0x2d
+ 8000a74:	75fb      	strb	r3, [r7, #23]
+      regAddressPWeight = FT5336_P8_WEIGHT_REG;
+ 8000a76:	2331      	movs	r3, #49	; 0x31
+ 8000a78:	75bb      	strb	r3, [r7, #22]
+      regAddressPMisc   = FT5336_P8_MISC_REG;
+ 8000a7a:	2332      	movs	r3, #50	; 0x32
+ 8000a7c:	757b      	strb	r3, [r7, #21]
+      break;
+ 8000a7e:	e00e      	b.n	8000a9e <ft5336_TS_GetTouchInfo+0xf2>
+
+    case 8 :
+      regAddressXHigh   = FT5336_P9_XH_REG;
+ 8000a80:	2333      	movs	r3, #51	; 0x33
+ 8000a82:	75fb      	strb	r3, [r7, #23]
+      regAddressPWeight = FT5336_P9_WEIGHT_REG;
+ 8000a84:	2337      	movs	r3, #55	; 0x37
+ 8000a86:	75bb      	strb	r3, [r7, #22]
+      regAddressPMisc   = FT5336_P9_MISC_REG;
+ 8000a88:	2338      	movs	r3, #56	; 0x38
+ 8000a8a:	757b      	strb	r3, [r7, #21]
+      break;
+ 8000a8c:	e007      	b.n	8000a9e <ft5336_TS_GetTouchInfo+0xf2>
+
+    case 9 :
+      regAddressXHigh   = FT5336_P10_XH_REG;
+ 8000a8e:	2339      	movs	r3, #57	; 0x39
+ 8000a90:	75fb      	strb	r3, [r7, #23]
+      regAddressPWeight = FT5336_P10_WEIGHT_REG;
+ 8000a92:	233d      	movs	r3, #61	; 0x3d
+ 8000a94:	75bb      	strb	r3, [r7, #22]
+      regAddressPMisc   = FT5336_P10_MISC_REG;
+ 8000a96:	233e      	movs	r3, #62	; 0x3e
+ 8000a98:	757b      	strb	r3, [r7, #21]
+      break;
+ 8000a9a:	e000      	b.n	8000a9e <ft5336_TS_GetTouchInfo+0xf2>
+
+    default :
+      break;
+ 8000a9c:	bf00      	nop
+
+    } /* end switch(touchIdx) */
+
+    /* Read Event Id of touch index */
+    ucReadData = TS_IO_Read(DeviceAddr, regAddressXHigh);
+ 8000a9e:	89fb      	ldrh	r3, [r7, #14]
+ 8000aa0:	b2db      	uxtb	r3, r3
+ 8000aa2:	7dfa      	ldrb	r2, [r7, #23]
+ 8000aa4:	4611      	mov	r1, r2
+ 8000aa6:	4618      	mov	r0, r3
+ 8000aa8:	f001 fd8c 	bl	80025c4 <TS_IO_Read>
+ 8000aac:	4603      	mov	r3, r0
+ 8000aae:	753b      	strb	r3, [r7, #20]
+    * pEvent = (ucReadData & FT5336_TOUCH_EVT_FLAG_MASK) >> FT5336_TOUCH_EVT_FLAG_SHIFT;
+ 8000ab0:	7d3b      	ldrb	r3, [r7, #20]
+ 8000ab2:	b2db      	uxtb	r3, r3
+ 8000ab4:	119b      	asrs	r3, r3, #6
+ 8000ab6:	f003 0203 	and.w	r2, r3, #3
+ 8000aba:	6a3b      	ldr	r3, [r7, #32]
+ 8000abc:	601a      	str	r2, [r3, #0]
+
+    /* Read weight of touch index */
+    ucReadData = TS_IO_Read(DeviceAddr, regAddressPWeight);
+ 8000abe:	89fb      	ldrh	r3, [r7, #14]
+ 8000ac0:	b2db      	uxtb	r3, r3
+ 8000ac2:	7dba      	ldrb	r2, [r7, #22]
+ 8000ac4:	4611      	mov	r1, r2
+ 8000ac6:	4618      	mov	r0, r3
+ 8000ac8:	f001 fd7c 	bl	80025c4 <TS_IO_Read>
+ 8000acc:	4603      	mov	r3, r0
+ 8000ace:	753b      	strb	r3, [r7, #20]
+    * pWeight = (ucReadData & FT5336_TOUCH_WEIGHT_MASK) >> FT5336_TOUCH_WEIGHT_SHIFT;
+ 8000ad0:	7d3b      	ldrb	r3, [r7, #20]
+ 8000ad2:	b2db      	uxtb	r3, r3
+ 8000ad4:	461a      	mov	r2, r3
+ 8000ad6:	687b      	ldr	r3, [r7, #4]
+ 8000ad8:	601a      	str	r2, [r3, #0]
+
+    /* Read area of touch index */
+    ucReadData = TS_IO_Read(DeviceAddr, regAddressPMisc);
+ 8000ada:	89fb      	ldrh	r3, [r7, #14]
+ 8000adc:	b2db      	uxtb	r3, r3
+ 8000ade:	7d7a      	ldrb	r2, [r7, #21]
+ 8000ae0:	4611      	mov	r1, r2
+ 8000ae2:	4618      	mov	r0, r3
+ 8000ae4:	f001 fd6e 	bl	80025c4 <TS_IO_Read>
+ 8000ae8:	4603      	mov	r3, r0
+ 8000aea:	753b      	strb	r3, [r7, #20]
+    * pArea = (ucReadData & FT5336_TOUCH_AREA_MASK) >> FT5336_TOUCH_AREA_SHIFT;
+ 8000aec:	7d3b      	ldrb	r3, [r7, #20]
+ 8000aee:	b2db      	uxtb	r3, r3
+ 8000af0:	111b      	asrs	r3, r3, #4
+ 8000af2:	f003 0204 	and.w	r2, r3, #4
+ 8000af6:	683b      	ldr	r3, [r7, #0]
+ 8000af8:	601a      	str	r2, [r3, #0]
+
+  } /* of if(touchIdx < ft5336_handle.currActiveTouchNb) */
+}
+ 8000afa:	bf00      	nop
+ 8000afc:	3718      	adds	r7, #24
+ 8000afe:	46bd      	mov	sp, r7
+ 8000b00:	bd80      	pop	{r7, pc}
+ 8000b02:	bf00      	nop
+ 8000b04:	20000348 	.word	0x20000348
+
+08000b08 <ft5336_Get_I2C_InitializedStatus>:
+  * @brief  Return the status of I2C was initialized or not.
+  * @param  None.
+  * @retval : I2C initialization status.
+  */
+static uint8_t ft5336_Get_I2C_InitializedStatus(void)
+{
+ 8000b08:	b480      	push	{r7}
+ 8000b0a:	af00      	add	r7, sp, #0
+  return(ft5336_handle.i2cInitialized);
+ 8000b0c:	4b03      	ldr	r3, [pc, #12]	; (8000b1c <ft5336_Get_I2C_InitializedStatus+0x14>)
+ 8000b0e:	781b      	ldrb	r3, [r3, #0]
+}
+ 8000b10:	4618      	mov	r0, r3
+ 8000b12:	46bd      	mov	sp, r7
+ 8000b14:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000b18:	4770      	bx	lr
+ 8000b1a:	bf00      	nop
+ 8000b1c:	20000348 	.word	0x20000348
+
+08000b20 <ft5336_I2C_InitializeIfRequired>:
+  * @brief  I2C initialize if needed.
+  * @param  None.
+  * @retval : None.
+  */
+static void ft5336_I2C_InitializeIfRequired(void)
+{
+ 8000b20:	b580      	push	{r7, lr}
+ 8000b22:	af00      	add	r7, sp, #0
+  if(ft5336_Get_I2C_InitializedStatus() == FT5336_I2C_NOT_INITIALIZED)
+ 8000b24:	f7ff fff0 	bl	8000b08 <ft5336_Get_I2C_InitializedStatus>
+ 8000b28:	4603      	mov	r3, r0
+ 8000b2a:	2b00      	cmp	r3, #0
+ 8000b2c:	d104      	bne.n	8000b38 <ft5336_I2C_InitializeIfRequired+0x18>
+  {
+    /* Initialize TS IO BUS layer (I2C) */
+    TS_IO_Init();
+ 8000b2e:	f001 fd25 	bl	800257c <TS_IO_Init>
+
+    /* Set state to initialized */
+    ft5336_handle.i2cInitialized = FT5336_I2C_INITIALIZED;
+ 8000b32:	4b02      	ldr	r3, [pc, #8]	; (8000b3c <ft5336_I2C_InitializeIfRequired+0x1c>)
+ 8000b34:	2201      	movs	r2, #1
+ 8000b36:	701a      	strb	r2, [r3, #0]
+  }
+}
+ 8000b38:	bf00      	nop
+ 8000b3a:	bd80      	pop	{r7, pc}
+ 8000b3c:	20000348 	.word	0x20000348
+
+08000b40 <ft5336_TS_Configure>:
+  * @brief  Basic static configuration of TouchScreen
+  * @param  DeviceAddr: FT5336 Device address for communication on I2C Bus.
+  * @retval Status FT5336_STATUS_OK or FT5336_STATUS_NOT_OK.
+  */
+static uint32_t ft5336_TS_Configure(uint16_t DeviceAddr)
+{
+ 8000b40:	b480      	push	{r7}
+ 8000b42:	b085      	sub	sp, #20
+ 8000b44:	af00      	add	r7, sp, #0
+ 8000b46:	4603      	mov	r3, r0
+ 8000b48:	80fb      	strh	r3, [r7, #6]
+  uint32_t status = FT5336_STATUS_OK;
+ 8000b4a:	2300      	movs	r3, #0
+ 8000b4c:	60fb      	str	r3, [r7, #12]
+
+  /* Nothing special to be done for FT5336 */
+
+  return(status);
+ 8000b4e:	68fb      	ldr	r3, [r7, #12]
+}
+ 8000b50:	4618      	mov	r0, r3
+ 8000b52:	3714      	adds	r7, #20
+ 8000b54:	46bd      	mov	sp, r7
+ 8000b56:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000b5a:	4770      	bx	lr
+
+08000b5c <main>:
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+ 8000b5c:	b5b0      	push	{r4, r5, r7, lr}
+ 8000b5e:	b0c2      	sub	sp, #264	; 0x108
+ 8000b60:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN 1 */
+  char text[50] = {};
+ 8000b62:	f107 03d4 	add.w	r3, r7, #212	; 0xd4
+ 8000b66:	2232      	movs	r2, #50	; 0x32
+ 8000b68:	2100      	movs	r1, #0
+ 8000b6a:	4618      	mov	r0, r3
+ 8000b6c:	f01b fc3b 	bl	801c3e6 <memset>
+  static TS_StateTypeDef TS_State;
+  ADC_ChannelConfTypeDef sConfig = {0};
+ 8000b70:	f107 03c4 	add.w	r3, r7, #196	; 0xc4
+ 8000b74:	2200      	movs	r2, #0
+ 8000b76:	601a      	str	r2, [r3, #0]
+ 8000b78:	605a      	str	r2, [r3, #4]
+ 8000b7a:	609a      	str	r2, [r3, #8]
+ 8000b7c:	60da      	str	r2, [r3, #12]
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+ 8000b7e:	2301      	movs	r3, #1
+ 8000b80:	f8c7 30c8 	str.w	r3, [r7, #200]	; 0xc8
+  sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+ 8000b84:	2300      	movs	r3, #0
+ 8000b86:	f8c7 30cc 	str.w	r3, [r7, #204]	; 0xcc
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+ 8000b8a:	f003 ffbc 	bl	8004b06 <HAL_Init>
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+ 8000b8e:	f000 f989 	bl	8000ea4 <SystemClock_Config>
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+ 8000b92:	f001 f85d 	bl	8001c50 <MX_GPIO_Init>
+  MX_ADC3_Init();
+ 8000b96:	f000 fa8b 	bl	80010b0 <MX_ADC3_Init>
+  MX_I2C1_Init();
+ 8000b9a:	f000 fb59 	bl	8001250 <MX_I2C1_Init>
+  MX_I2C3_Init();
+ 8000b9e:	f000 fb97 	bl	80012d0 <MX_I2C3_Init>
+  MX_LTDC_Init();
+ 8000ba2:	f000 fbd5 	bl	8001350 <MX_LTDC_Init>
+  MX_RTC_Init();
+ 8000ba6:	f000 fc69 	bl	800147c <MX_RTC_Init>
+  MX_SPI2_Init();
+ 8000baa:	f000 fd0d 	bl	80015c8 <MX_SPI2_Init>
+  MX_TIM1_Init();
+ 8000bae:	f000 fd49 	bl	8001644 <MX_TIM1_Init>
+  MX_TIM2_Init();
+ 8000bb2:	f000 fd9b 	bl	80016ec <MX_TIM2_Init>
+  MX_TIM3_Init();
+ 8000bb6:	f000 fde7 	bl	8001788 <MX_TIM3_Init>
+  MX_TIM5_Init();
+ 8000bba:	f000 fe73 	bl	80018a4 <MX_TIM5_Init>
+  MX_TIM8_Init();
+ 8000bbe:	f000 febf 	bl	8001940 <MX_TIM8_Init>
+  MX_USART1_UART_Init();
+ 8000bc2:	f000 ff97 	bl	8001af4 <MX_USART1_UART_Init>
+  MX_USART6_UART_Init();
+ 8000bc6:	f000 ffc5 	bl	8001b54 <MX_USART6_UART_Init>
+  MX_ADC1_Init();
+ 8000bca:	f000 fa1f 	bl	800100c <MX_ADC1_Init>
+  MX_DAC_Init();
+ 8000bce:	f000 fae3 	bl	8001198 <MX_DAC_Init>
+  MX_UART7_Init();
+ 8000bd2:	f000 ff5f 	bl	8001a94 <MX_UART7_Init>
+  MX_FMC_Init();
+ 8000bd6:	f000 ffed 	bl	8001bb4 <MX_FMC_Init>
+  MX_DMA2D_Init();
+ 8000bda:	f000 fb07 	bl	80011ec <MX_DMA2D_Init>
+  MX_CRC_Init();
+ 8000bde:	f000 fab9 	bl	8001154 <MX_CRC_Init>
+  MX_RNG_Init();
+ 8000be2:	f000 fc37 	bl	8001454 <MX_RNG_Init>
+  /* USER CODE BEGIN 2 */
+  BSP_LCD_Init();
+ 8000be6:	f001 fd17 	bl	8002618 <BSP_LCD_Init>
+  BSP_LCD_LayerDefaultInit(0, LCD_FB_START_ADDRESS);
+ 8000bea:	f04f 4140 	mov.w	r1, #3221225472	; 0xc0000000
+ 8000bee:	2000      	movs	r0, #0
+ 8000bf0:	f001 fdaa 	bl	8002748 <BSP_LCD_LayerDefaultInit>
+  BSP_LCD_LayerDefaultInit(1,
+                           LCD_FB_START_ADDRESS + BSP_LCD_GetXSize() * BSP_LCD_GetYSize() * 4);
+ 8000bf4:	f001 fd80 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8000bf8:	4604      	mov	r4, r0
+ 8000bfa:	f001 fd91 	bl	8002720 <BSP_LCD_GetYSize>
+ 8000bfe:	4603      	mov	r3, r0
+ 8000c00:	fb03 f304 	mul.w	r3, r3, r4
+  BSP_LCD_LayerDefaultInit(1,
+ 8000c04:	f103 5340 	add.w	r3, r3, #805306368	; 0x30000000
+ 8000c08:	009b      	lsls	r3, r3, #2
+ 8000c0a:	4619      	mov	r1, r3
+ 8000c0c:	2001      	movs	r0, #1
+ 8000c0e:	f001 fd9b 	bl	8002748 <BSP_LCD_LayerDefaultInit>
+  BSP_LCD_DisplayOn();
+ 8000c12:	f002 fa63 	bl	80030dc <BSP_LCD_DisplayOn>
+  BSP_LCD_SelectLayer(1);
+ 8000c16:	2001      	movs	r0, #1
+ 8000c18:	f001 fdf6 	bl	8002808 <BSP_LCD_SelectLayer>
+  BSP_LCD_Clear(LCD_COLOR_LIGHTGREEN);
+ 8000c1c:	f06f 107f 	mvn.w	r0, #8323199	; 0x7f007f
+ 8000c20:	f001 fe64 	bl	80028ec <BSP_LCD_Clear>
+  BSP_LCD_SetFont(&Font12);
+ 8000c24:	4887      	ldr	r0, [pc, #540]	; (8000e44 <main+0x2e8>)
+ 8000c26:	f001 fe31 	bl	800288c <BSP_LCD_SetFont>
+  BSP_LCD_SetTextColor(LCD_COLOR_BLUE);
+ 8000c2a:	4887      	ldr	r0, [pc, #540]	; (8000e48 <main+0x2ec>)
+ 8000c2c:	f001 fdfc 	bl	8002828 <BSP_LCD_SetTextColor>
+  BSP_LCD_SetBackColor(LCD_COLOR_LIGHTGREEN);
+ 8000c30:	f06f 107f 	mvn.w	r0, #8323199	; 0x7f007f
+ 8000c34:	f001 fe10 	bl	8002858 <BSP_LCD_SetBackColor>
+
+  BSP_TS_Init(BSP_LCD_GetXSize(), BSP_LCD_GetYSize());
+ 8000c38:	f001 fd5e 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8000c3c:	4603      	mov	r3, r0
+ 8000c3e:	b29c      	uxth	r4, r3
+ 8000c40:	f001 fd6e 	bl	8002720 <BSP_LCD_GetYSize>
+ 8000c44:	4603      	mov	r3, r0
+ 8000c46:	b29b      	uxth	r3, r3
+ 8000c48:	4619      	mov	r1, r3
+ 8000c4a:	4620      	mov	r0, r4
+ 8000c4c:	f002 fe14 	bl	8003878 <BSP_TS_Init>
+  /* start timers, add new ones, ... */
+  /* USER CODE END RTOS_TIMERS */
+
+  /* Create the queue(s) */
+  /* definition and creation of Queue_E */
+  osMessageQDef(Queue_E, 16, uint16_t);
+ 8000c50:	4b7e      	ldr	r3, [pc, #504]	; (8000e4c <main+0x2f0>)
+ 8000c52:	f107 04b4 	add.w	r4, r7, #180	; 0xb4
+ 8000c56:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
+ 8000c58:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
+  Queue_EHandle = osMessageCreate(osMessageQ(Queue_E), NULL);
+ 8000c5c:	f107 03b4 	add.w	r3, r7, #180	; 0xb4
+ 8000c60:	2100      	movs	r1, #0
+ 8000c62:	4618      	mov	r0, r3
+ 8000c64:	f00c faf0 	bl	800d248 <osMessageCreate>
+ 8000c68:	4602      	mov	r2, r0
+ 8000c6a:	4b79      	ldr	r3, [pc, #484]	; (8000e50 <main+0x2f4>)
+ 8000c6c:	601a      	str	r2, [r3, #0]
+
+  /* definition and creation of Queue_F */
+  osMessageQDef(Queue_F, 1, uint8_t);
+ 8000c6e:	4b79      	ldr	r3, [pc, #484]	; (8000e54 <main+0x2f8>)
+ 8000c70:	f107 04a4 	add.w	r4, r7, #164	; 0xa4
+ 8000c74:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
+ 8000c76:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
+  Queue_FHandle = osMessageCreate(osMessageQ(Queue_F), NULL);
+ 8000c7a:	f107 03a4 	add.w	r3, r7, #164	; 0xa4
+ 8000c7e:	2100      	movs	r1, #0
+ 8000c80:	4618      	mov	r0, r3
+ 8000c82:	f00c fae1 	bl	800d248 <osMessageCreate>
+ 8000c86:	4602      	mov	r2, r0
+ 8000c88:	4b73      	ldr	r3, [pc, #460]	; (8000e58 <main+0x2fc>)
+ 8000c8a:	601a      	str	r2, [r3, #0]
+
+  /* definition and creation of Queue_J */
+  osMessageQDef(Queue_J, 16, uint16_t);
+ 8000c8c:	4b6f      	ldr	r3, [pc, #444]	; (8000e4c <main+0x2f0>)
+ 8000c8e:	f107 0494 	add.w	r4, r7, #148	; 0x94
+ 8000c92:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
+ 8000c94:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
+  Queue_JHandle = osMessageCreate(osMessageQ(Queue_J), NULL);
+ 8000c98:	f107 0394 	add.w	r3, r7, #148	; 0x94
+ 8000c9c:	2100      	movs	r1, #0
+ 8000c9e:	4618      	mov	r0, r3
+ 8000ca0:	f00c fad2 	bl	800d248 <osMessageCreate>
+ 8000ca4:	4602      	mov	r2, r0
+ 8000ca6:	4b6d      	ldr	r3, [pc, #436]	; (8000e5c <main+0x300>)
+ 8000ca8:	601a      	str	r2, [r3, #0]
+
+  /* definition and creation of Queue_P */
+  osMessageQDef(Queue_P, 16, uint16_t);
+ 8000caa:	4b68      	ldr	r3, [pc, #416]	; (8000e4c <main+0x2f0>)
+ 8000cac:	f107 0484 	add.w	r4, r7, #132	; 0x84
+ 8000cb0:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
+ 8000cb2:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
+  Queue_PHandle = osMessageCreate(osMessageQ(Queue_P), NULL);
+ 8000cb6:	f107 0384 	add.w	r3, r7, #132	; 0x84
+ 8000cba:	2100      	movs	r1, #0
+ 8000cbc:	4618      	mov	r0, r3
+ 8000cbe:	f00c fac3 	bl	800d248 <osMessageCreate>
+ 8000cc2:	4602      	mov	r2, r0
+ 8000cc4:	4b66      	ldr	r3, [pc, #408]	; (8000e60 <main+0x304>)
+ 8000cc6:	601a      	str	r2, [r3, #0]
+
+  /* definition and creation of Queue_N */
+  osMessageQDef(Queue_N, 16, uint16_t);
+ 8000cc8:	4b60      	ldr	r3, [pc, #384]	; (8000e4c <main+0x2f0>)
+ 8000cca:	f107 0474 	add.w	r4, r7, #116	; 0x74
+ 8000cce:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
+ 8000cd0:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
+  Queue_NHandle = osMessageCreate(osMessageQ(Queue_N), NULL);
+ 8000cd4:	f107 0374 	add.w	r3, r7, #116	; 0x74
+ 8000cd8:	2100      	movs	r1, #0
+ 8000cda:	4618      	mov	r0, r3
+ 8000cdc:	f00c fab4 	bl	800d248 <osMessageCreate>
+ 8000ce0:	4602      	mov	r2, r0
+ 8000ce2:	4b60      	ldr	r3, [pc, #384]	; (8000e64 <main+0x308>)
+ 8000ce4:	601a      	str	r2, [r3, #0]
+  /* add queues, ... */
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of GameMaster */
+  osThreadDef(GameMaster, f_GameMaster, osPriorityNormal, 0, 128);
+ 8000ce6:	4b60      	ldr	r3, [pc, #384]	; (8000e68 <main+0x30c>)
+ 8000ce8:	f107 0458 	add.w	r4, r7, #88	; 0x58
+ 8000cec:	461d      	mov	r5, r3
+ 8000cee:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 8000cf0:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 8000cf2:	e895 0007 	ldmia.w	r5, {r0, r1, r2}
+ 8000cf6:	e884 0007 	stmia.w	r4, {r0, r1, r2}
+  GameMasterHandle = osThreadCreate(osThread(GameMaster), NULL);
+ 8000cfa:	f107 0358 	add.w	r3, r7, #88	; 0x58
+ 8000cfe:	2100      	movs	r1, #0
+ 8000d00:	4618      	mov	r0, r3
+ 8000d02:	f00c f8e0 	bl	800cec6 <osThreadCreate>
+ 8000d06:	4602      	mov	r2, r0
+ 8000d08:	4b58      	ldr	r3, [pc, #352]	; (8000e6c <main+0x310>)
+ 8000d0a:	601a      	str	r2, [r3, #0]
+
+  /* definition and creation of Joueur_1 */
+  osThreadDef(Joueur_1, f_Joueur_1, osPriorityNormal, 0, 128);
+ 8000d0c:	4b58      	ldr	r3, [pc, #352]	; (8000e70 <main+0x314>)
+ 8000d0e:	f107 043c 	add.w	r4, r7, #60	; 0x3c
+ 8000d12:	461d      	mov	r5, r3
+ 8000d14:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 8000d16:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 8000d18:	e895 0007 	ldmia.w	r5, {r0, r1, r2}
+ 8000d1c:	e884 0007 	stmia.w	r4, {r0, r1, r2}
+  Joueur_1Handle = osThreadCreate(osThread(Joueur_1), NULL);
+ 8000d20:	f107 033c 	add.w	r3, r7, #60	; 0x3c
+ 8000d24:	2100      	movs	r1, #0
+ 8000d26:	4618      	mov	r0, r3
+ 8000d28:	f00c f8cd 	bl	800cec6 <osThreadCreate>
+ 8000d2c:	4602      	mov	r2, r0
+ 8000d2e:	4b51      	ldr	r3, [pc, #324]	; (8000e74 <main+0x318>)
+ 8000d30:	601a      	str	r2, [r3, #0]
+
+  /* definition and creation of Block_Enemie */
+  osThreadDef(Block_Enemie, f_block_enemie, osPriorityIdle, 0, 128);
+ 8000d32:	4b51      	ldr	r3, [pc, #324]	; (8000e78 <main+0x31c>)
+ 8000d34:	f107 0420 	add.w	r4, r7, #32
+ 8000d38:	461d      	mov	r5, r3
+ 8000d3a:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 8000d3c:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 8000d3e:	e895 0007 	ldmia.w	r5, {r0, r1, r2}
+ 8000d42:	e884 0007 	stmia.w	r4, {r0, r1, r2}
+  Block_EnemieHandle = osThreadCreate(osThread(Block_Enemie), NULL);
+ 8000d46:	f107 0320 	add.w	r3, r7, #32
+ 8000d4a:	2100      	movs	r1, #0
+ 8000d4c:	4618      	mov	r0, r3
+ 8000d4e:	f00c f8ba 	bl	800cec6 <osThreadCreate>
+ 8000d52:	4602      	mov	r2, r0
+ 8000d54:	4b49      	ldr	r3, [pc, #292]	; (8000e7c <main+0x320>)
+ 8000d56:	601a      	str	r2, [r3, #0]
+
+  /* definition and creation of Projectile */
+  osThreadDef(Projectile, f_projectile, osPriorityNormal, 0, 128);
+ 8000d58:	1d3b      	adds	r3, r7, #4
+ 8000d5a:	4a49      	ldr	r2, [pc, #292]	; (8000e80 <main+0x324>)
+ 8000d5c:	461c      	mov	r4, r3
+ 8000d5e:	4615      	mov	r5, r2
+ 8000d60:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 8000d62:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 8000d64:	e895 0007 	ldmia.w	r5, {r0, r1, r2}
+ 8000d68:	e884 0007 	stmia.w	r4, {r0, r1, r2}
+  ProjectileHandle = osThreadCreate(osThread(Projectile), NULL);
+ 8000d6c:	1d3b      	adds	r3, r7, #4
+ 8000d6e:	2100      	movs	r1, #0
+ 8000d70:	4618      	mov	r0, r3
+ 8000d72:	f00c f8a8 	bl	800cec6 <osThreadCreate>
+ 8000d76:	4602      	mov	r2, r0
+ 8000d78:	4b42      	ldr	r3, [pc, #264]	; (8000e84 <main+0x328>)
+ 8000d7a:	601a      	str	r2, [r3, #0]
+  /* USER CODE BEGIN RTOS_THREADS */
+  /* add threads, ... */
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+ 8000d7c:	f00c f88c 	bl	800ce98 <osKernelStart>
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* Code de base */
+    HAL_GPIO_WritePin(LED13_GPIO_Port, LED13_Pin,
+ 8000d80:	f44f 7180 	mov.w	r1, #256	; 0x100
+ 8000d84:	4840      	ldr	r0, [pc, #256]	; (8000e88 <main+0x32c>)
+ 8000d86:	f006 fe03 	bl	8007990 <HAL_GPIO_ReadPin>
+ 8000d8a:	4603      	mov	r3, r0
+ 8000d8c:	461a      	mov	r2, r3
+ 8000d8e:	f44f 4180 	mov.w	r1, #16384	; 0x4000
+ 8000d92:	483e      	ldr	r0, [pc, #248]	; (8000e8c <main+0x330>)
+ 8000d94:	f006 fe14 	bl	80079c0 <HAL_GPIO_WritePin>
+                      HAL_GPIO_ReadPin(BP1_GPIO_Port, BP1_Pin));
+    HAL_GPIO_WritePin(LED14_GPIO_Port, LED14_Pin,
+ 8000d98:	f44f 4100 	mov.w	r1, #32768	; 0x8000
+ 8000d9c:	483a      	ldr	r0, [pc, #232]	; (8000e88 <main+0x32c>)
+ 8000d9e:	f006 fdf7 	bl	8007990 <HAL_GPIO_ReadPin>
+ 8000da2:	4603      	mov	r3, r0
+ 8000da4:	461a      	mov	r2, r3
+ 8000da6:	2120      	movs	r1, #32
+ 8000da8:	4839      	ldr	r0, [pc, #228]	; (8000e90 <main+0x334>)
+ 8000daa:	f006 fe09 	bl	80079c0 <HAL_GPIO_WritePin>
+                      HAL_GPIO_ReadPin(BP2_GPIO_Port, BP2_Pin));
+    sprintf(text, "BP1 : %d", HAL_GPIO_ReadPin(BP1_GPIO_Port, BP1_Pin));
+ 8000dae:	f44f 7180 	mov.w	r1, #256	; 0x100
+ 8000db2:	4835      	ldr	r0, [pc, #212]	; (8000e88 <main+0x32c>)
+ 8000db4:	f006 fdec 	bl	8007990 <HAL_GPIO_ReadPin>
+ 8000db8:	4603      	mov	r3, r0
+ 8000dba:	461a      	mov	r2, r3
+ 8000dbc:	f107 03d4 	add.w	r3, r7, #212	; 0xd4
+ 8000dc0:	4934      	ldr	r1, [pc, #208]	; (8000e94 <main+0x338>)
+ 8000dc2:	4618      	mov	r0, r3
+ 8000dc4:	f01b fb64 	bl	801c490 <siprintf>
+    BSP_LCD_DisplayStringAtLine(5, (uint8_t *)text);
+ 8000dc8:	f107 03d4 	add.w	r3, r7, #212	; 0xd4
+ 8000dcc:	4619      	mov	r1, r3
+ 8000dce:	2005      	movs	r0, #5
+ 8000dd0:	f001 febc 	bl	8002b4c <BSP_LCD_DisplayStringAtLine>
+
+
+      ;
+
+    sConfig.Channel = ADC_CHANNEL_7;
+ 8000dd4:	2307      	movs	r3, #7
+ 8000dd6:	f8c7 30c4 	str.w	r3, [r7, #196]	; 0xc4
+    HAL_ADC_ConfigChannel(&hadc3, &sConfig);
+ 8000dda:	f107 03c4 	add.w	r3, r7, #196	; 0xc4
+ 8000dde:	4619      	mov	r1, r3
+ 8000de0:	482d      	ldr	r0, [pc, #180]	; (8000e98 <main+0x33c>)
+ 8000de2:	f004 f875 	bl	8004ed0 <HAL_ADC_ConfigChannel>
+    HAL_ADC_Start(&hadc3);
+ 8000de6:	482c      	ldr	r0, [pc, #176]	; (8000e98 <main+0x33c>)
+ 8000de8:	f003 ff20 	bl	8004c2c <HAL_ADC_Start>
+
+    sConfig.Channel = ADC_CHANNEL_6;
+ 8000dec:	2306      	movs	r3, #6
+ 8000dee:	f8c7 30c4 	str.w	r3, [r7, #196]	; 0xc4
+	HAL_ADC_ConfigChannel(&hadc3, &sConfig);
+ 8000df2:	f107 03c4 	add.w	r3, r7, #196	; 0xc4
+ 8000df6:	4619      	mov	r1, r3
+ 8000df8:	4827      	ldr	r0, [pc, #156]	; (8000e98 <main+0x33c>)
+ 8000dfa:	f004 f869 	bl	8004ed0 <HAL_ADC_ConfigChannel>
+	HAL_ADC_Start(&hadc3);
+ 8000dfe:	4826      	ldr	r0, [pc, #152]	; (8000e98 <main+0x33c>)
+ 8000e00:	f003 ff14 	bl	8004c2c <HAL_ADC_Start>
+    sConfig.Channel = ADC_CHANNEL_8;
+ 8000e04:	2308      	movs	r3, #8
+ 8000e06:	f8c7 30c4 	str.w	r3, [r7, #196]	; 0xc4
+    HAL_ADC_ConfigChannel(&hadc3, &sConfig);
+ 8000e0a:	f107 03c4 	add.w	r3, r7, #196	; 0xc4
+ 8000e0e:	4619      	mov	r1, r3
+ 8000e10:	4821      	ldr	r0, [pc, #132]	; (8000e98 <main+0x33c>)
+ 8000e12:	f004 f85d 	bl	8004ed0 <HAL_ADC_ConfigChannel>
+    HAL_ADC_Start(&hadc3);
+ 8000e16:	4820      	ldr	r0, [pc, #128]	; (8000e98 <main+0x33c>)
+ 8000e18:	f003 ff08 	bl	8004c2c <HAL_ADC_Start>
+
+    HAL_ADC_Start(&hadc1);
+ 8000e1c:	481f      	ldr	r0, [pc, #124]	; (8000e9c <main+0x340>)
+ 8000e1e:	f003 ff05 	bl	8004c2c <HAL_ADC_Start>
+
+
+
+    BSP_TS_GetState(&TS_State);
+ 8000e22:	481f      	ldr	r0, [pc, #124]	; (8000ea0 <main+0x344>)
+ 8000e24:	f002 fd68 	bl	80038f8 <BSP_TS_GetState>
+    if (TS_State.touchDetected)
+ 8000e28:	4b1d      	ldr	r3, [pc, #116]	; (8000ea0 <main+0x344>)
+ 8000e2a:	781b      	ldrb	r3, [r3, #0]
+ 8000e2c:	2b00      	cmp	r3, #0
+ 8000e2e:	d0a7      	beq.n	8000d80 <main+0x224>
+    {
+      BSP_LCD_FillCircle(TS_State.touchX[0], TS_State.touchY[0], 4);
+ 8000e30:	4b1b      	ldr	r3, [pc, #108]	; (8000ea0 <main+0x344>)
+ 8000e32:	8858      	ldrh	r0, [r3, #2]
+ 8000e34:	4b1a      	ldr	r3, [pc, #104]	; (8000ea0 <main+0x344>)
+ 8000e36:	899b      	ldrh	r3, [r3, #12]
+ 8000e38:	2204      	movs	r2, #4
+ 8000e3a:	4619      	mov	r1, r3
+ 8000e3c:	f002 f8ae 	bl	8002f9c <BSP_LCD_FillCircle>
+    HAL_GPIO_WritePin(LED13_GPIO_Port, LED13_Pin,
+ 8000e40:	e79e      	b.n	8000d80 <main+0x224>
+ 8000e42:	bf00      	nop
+ 8000e44:	20000044 	.word	0x20000044
+ 8000e48:	ff0000ff 	.word	0xff0000ff
+ 8000e4c:	0801d59c 	.word	0x0801d59c
+ 8000e50:	20008e20 	.word	0x20008e20
+ 8000e54:	0801d5ac 	.word	0x0801d5ac
+ 8000e58:	20008c8c 	.word	0x20008c8c
+ 8000e5c:	200089d8 	.word	0x200089d8
+ 8000e60:	20008c90 	.word	0x20008c90
+ 8000e64:	20008c08 	.word	0x20008c08
+ 8000e68:	0801d5c8 	.word	0x0801d5c8
+ 8000e6c:	20008d9c 	.word	0x20008d9c
+ 8000e70:	0801d5f0 	.word	0x0801d5f0
+ 8000e74:	20008a4c 	.word	0x20008a4c
+ 8000e78:	0801d61c 	.word	0x0801d61c
+ 8000e7c:	20008e58 	.word	0x20008e58
+ 8000e80:	0801d644 	.word	0x0801d644
+ 8000e84:	20008ca8 	.word	0x20008ca8
+ 8000e88:	40020000 	.word	0x40020000
+ 8000e8c:	40021c00 	.word	0x40021c00
+ 8000e90:	40021000 	.word	0x40021000
+ 8000e94:	0801d590 	.word	0x0801d590
+ 8000e98:	20008bc0 	.word	0x20008bc0
+ 8000e9c:	20008b78 	.word	0x20008b78
+ 8000ea0:	20000350 	.word	0x20000350
+
+08000ea4 <SystemClock_Config>:
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+ 8000ea4:	b580      	push	{r7, lr}
+ 8000ea6:	b0b4      	sub	sp, #208	; 0xd0
+ 8000ea8:	af00      	add	r7, sp, #0
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ 8000eaa:	f107 03a0 	add.w	r3, r7, #160	; 0xa0
+ 8000eae:	2230      	movs	r2, #48	; 0x30
+ 8000eb0:	2100      	movs	r1, #0
+ 8000eb2:	4618      	mov	r0, r3
+ 8000eb4:	f01b fa97 	bl	801c3e6 <memset>
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ 8000eb8:	f107 038c 	add.w	r3, r7, #140	; 0x8c
+ 8000ebc:	2200      	movs	r2, #0
+ 8000ebe:	601a      	str	r2, [r3, #0]
+ 8000ec0:	605a      	str	r2, [r3, #4]
+ 8000ec2:	609a      	str	r2, [r3, #8]
+ 8000ec4:	60da      	str	r2, [r3, #12]
+ 8000ec6:	611a      	str	r2, [r3, #16]
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+ 8000ec8:	f107 0308 	add.w	r3, r7, #8
+ 8000ecc:	2284      	movs	r2, #132	; 0x84
+ 8000ece:	2100      	movs	r1, #0
+ 8000ed0:	4618      	mov	r0, r3
+ 8000ed2:	f01b fa88 	bl	801c3e6 <memset>
+
+  /** Configure LSE Drive Capability
+  */
+  HAL_PWR_EnableBkUpAccess();
+ 8000ed6:	f007 feb5 	bl	8008c44 <HAL_PWR_EnableBkUpAccess>
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+ 8000eda:	4b49      	ldr	r3, [pc, #292]	; (8001000 <SystemClock_Config+0x15c>)
+ 8000edc:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8000ede:	4a48      	ldr	r2, [pc, #288]	; (8001000 <SystemClock_Config+0x15c>)
+ 8000ee0:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
+ 8000ee4:	6413      	str	r3, [r2, #64]	; 0x40
+ 8000ee6:	4b46      	ldr	r3, [pc, #280]	; (8001000 <SystemClock_Config+0x15c>)
+ 8000ee8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8000eea:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
+ 8000eee:	607b      	str	r3, [r7, #4]
+ 8000ef0:	687b      	ldr	r3, [r7, #4]
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 8000ef2:	4b44      	ldr	r3, [pc, #272]	; (8001004 <SystemClock_Config+0x160>)
+ 8000ef4:	681b      	ldr	r3, [r3, #0]
+ 8000ef6:	4a43      	ldr	r2, [pc, #268]	; (8001004 <SystemClock_Config+0x160>)
+ 8000ef8:	f443 4340 	orr.w	r3, r3, #49152	; 0xc000
+ 8000efc:	6013      	str	r3, [r2, #0]
+ 8000efe:	4b41      	ldr	r3, [pc, #260]	; (8001004 <SystemClock_Config+0x160>)
+ 8000f00:	681b      	ldr	r3, [r3, #0]
+ 8000f02:	f403 4340 	and.w	r3, r3, #49152	; 0xc000
+ 8000f06:	603b      	str	r3, [r7, #0]
+ 8000f08:	683b      	ldr	r3, [r7, #0]
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
+ 8000f0a:	2309      	movs	r3, #9
+ 8000f0c:	f8c7 30a0 	str.w	r3, [r7, #160]	; 0xa0
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ 8000f10:	f44f 3380 	mov.w	r3, #65536	; 0x10000
+ 8000f14:	f8c7 30a4 	str.w	r3, [r7, #164]	; 0xa4
+  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+ 8000f18:	2301      	movs	r3, #1
+ 8000f1a:	f8c7 30b4 	str.w	r3, [r7, #180]	; 0xb4
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 8000f1e:	2302      	movs	r3, #2
+ 8000f20:	f8c7 30b8 	str.w	r3, [r7, #184]	; 0xb8
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ 8000f24:	f44f 0380 	mov.w	r3, #4194304	; 0x400000
+ 8000f28:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+  RCC_OscInitStruct.PLL.PLLM = 25;
+ 8000f2c:	2319      	movs	r3, #25
+ 8000f2e:	f8c7 30c0 	str.w	r3, [r7, #192]	; 0xc0
+  RCC_OscInitStruct.PLL.PLLN = 400;
+ 8000f32:	f44f 73c8 	mov.w	r3, #400	; 0x190
+ 8000f36:	f8c7 30c4 	str.w	r3, [r7, #196]	; 0xc4
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ 8000f3a:	2302      	movs	r3, #2
+ 8000f3c:	f8c7 30c8 	str.w	r3, [r7, #200]	; 0xc8
+  RCC_OscInitStruct.PLL.PLLQ = 9;
+ 8000f40:	2309      	movs	r3, #9
+ 8000f42:	f8c7 30cc 	str.w	r3, [r7, #204]	; 0xcc
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 8000f46:	f107 03a0 	add.w	r3, r7, #160	; 0xa0
+ 8000f4a:	4618      	mov	r0, r3
+ 8000f4c:	f007 feda 	bl	8008d04 <HAL_RCC_OscConfig>
+ 8000f50:	4603      	mov	r3, r0
+ 8000f52:	2b00      	cmp	r3, #0
+ 8000f54:	d001      	beq.n	8000f5a <SystemClock_Config+0xb6>
+  {
+    Error_Handler();
+ 8000f56:	f001 f9b7 	bl	80022c8 <Error_Handler>
+  }
+  /** Activate the Over-Drive mode
+  */
+  if (HAL_PWREx_EnableOverDrive() != HAL_OK)
+ 8000f5a:	f007 fe83 	bl	8008c64 <HAL_PWREx_EnableOverDrive>
+ 8000f5e:	4603      	mov	r3, r0
+ 8000f60:	2b00      	cmp	r3, #0
+ 8000f62:	d001      	beq.n	8000f68 <SystemClock_Config+0xc4>
+  {
+    Error_Handler();
+ 8000f64:	f001 f9b0 	bl	80022c8 <Error_Handler>
+  }
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ 8000f68:	230f      	movs	r3, #15
+ 8000f6a:	f8c7 308c 	str.w	r3, [r7, #140]	; 0x8c
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ 8000f6e:	2302      	movs	r3, #2
+ 8000f70:	f8c7 3090 	str.w	r3, [r7, #144]	; 0x90
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 8000f74:	2300      	movs	r3, #0
+ 8000f76:	f8c7 3094 	str.w	r3, [r7, #148]	; 0x94
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+ 8000f7a:	f44f 53a0 	mov.w	r3, #5120	; 0x1400
+ 8000f7e:	f8c7 3098 	str.w	r3, [r7, #152]	; 0x98
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+ 8000f82:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 8000f86:	f8c7 309c 	str.w	r3, [r7, #156]	; 0x9c
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK)
+ 8000f8a:	f107 038c 	add.w	r3, r7, #140	; 0x8c
+ 8000f8e:	2106      	movs	r1, #6
+ 8000f90:	4618      	mov	r0, r3
+ 8000f92:	f008 f95b 	bl	800924c <HAL_RCC_ClockConfig>
+ 8000f96:	4603      	mov	r3, r0
+ 8000f98:	2b00      	cmp	r3, #0
+ 8000f9a:	d001      	beq.n	8000fa0 <SystemClock_Config+0xfc>
+  {
+    Error_Handler();
+ 8000f9c:	f001 f994 	bl	80022c8 <Error_Handler>
+  }
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_RTC
+ 8000fa0:	4b19      	ldr	r3, [pc, #100]	; (8001008 <SystemClock_Config+0x164>)
+ 8000fa2:	60bb      	str	r3, [r7, #8]
+                              |RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART6
+                              |RCC_PERIPHCLK_UART7|RCC_PERIPHCLK_I2C1
+                              |RCC_PERIPHCLK_I2C3|RCC_PERIPHCLK_CLK48;
+  PeriphClkInitStruct.PLLSAI.PLLSAIN = 384;
+ 8000fa4:	f44f 73c0 	mov.w	r3, #384	; 0x180
+ 8000fa8:	61fb      	str	r3, [r7, #28]
+  PeriphClkInitStruct.PLLSAI.PLLSAIR = 5;
+ 8000faa:	2305      	movs	r3, #5
+ 8000fac:	627b      	str	r3, [r7, #36]	; 0x24
+  PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
+ 8000fae:	2302      	movs	r3, #2
+ 8000fb0:	623b      	str	r3, [r7, #32]
+  PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV8;
+ 8000fb2:	2303      	movs	r3, #3
+ 8000fb4:	62bb      	str	r3, [r7, #40]	; 0x28
+  PeriphClkInitStruct.PLLSAIDivQ = 1;
+ 8000fb6:	2301      	movs	r3, #1
+ 8000fb8:	633b      	str	r3, [r7, #48]	; 0x30
+  PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_8;
+ 8000fba:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8000fbe:	637b      	str	r3, [r7, #52]	; 0x34
+  PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
+ 8000fc0:	f44f 7300 	mov.w	r3, #512	; 0x200
+ 8000fc4:	63bb      	str	r3, [r7, #56]	; 0x38
+  PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ 8000fc6:	2300      	movs	r3, #0
+ 8000fc8:	64fb      	str	r3, [r7, #76]	; 0x4c
+  PeriphClkInitStruct.Usart6ClockSelection = RCC_USART6CLKSOURCE_PCLK2;
+ 8000fca:	2300      	movs	r3, #0
+ 8000fcc:	663b      	str	r3, [r7, #96]	; 0x60
+  PeriphClkInitStruct.Uart7ClockSelection = RCC_UART7CLKSOURCE_PCLK1;
+ 8000fce:	2300      	movs	r3, #0
+ 8000fd0:	667b      	str	r3, [r7, #100]	; 0x64
+  PeriphClkInitStruct.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
+ 8000fd2:	2300      	movs	r3, #0
+ 8000fd4:	66fb      	str	r3, [r7, #108]	; 0x6c
+  PeriphClkInitStruct.I2c3ClockSelection = RCC_I2C3CLKSOURCE_PCLK1;
+ 8000fd6:	2300      	movs	r3, #0
+ 8000fd8:	677b      	str	r3, [r7, #116]	; 0x74
+  PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLLSAIP;
+ 8000fda:	f04f 6300 	mov.w	r3, #134217728	; 0x8000000
+ 8000fde:	f8c7 3084 	str.w	r3, [r7, #132]	; 0x84
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ 8000fe2:	f107 0308 	add.w	r3, r7, #8
+ 8000fe6:	4618      	mov	r0, r3
+ 8000fe8:	f008 fb34 	bl	8009654 <HAL_RCCEx_PeriphCLKConfig>
+ 8000fec:	4603      	mov	r3, r0
+ 8000fee:	2b00      	cmp	r3, #0
+ 8000ff0:	d001      	beq.n	8000ff6 <SystemClock_Config+0x152>
+  {
+    Error_Handler();
+ 8000ff2:	f001 f969 	bl	80022c8 <Error_Handler>
+  }
+}
+ 8000ff6:	bf00      	nop
+ 8000ff8:	37d0      	adds	r7, #208	; 0xd0
+ 8000ffa:	46bd      	mov	sp, r7
+ 8000ffc:	bd80      	pop	{r7, pc}
+ 8000ffe:	bf00      	nop
+ 8001000:	40023800 	.word	0x40023800
+ 8001004:	40007000 	.word	0x40007000
+ 8001008:	00215868 	.word	0x00215868
+
+0800100c <MX_ADC1_Init>:
+  * @brief ADC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC1_Init(void)
+{
+ 800100c:	b580      	push	{r7, lr}
+ 800100e:	b084      	sub	sp, #16
+ 8001010:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN ADC1_Init 0 */
+
+  /* USER CODE END ADC1_Init 0 */
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+ 8001012:	463b      	mov	r3, r7
+ 8001014:	2200      	movs	r2, #0
+ 8001016:	601a      	str	r2, [r3, #0]
+ 8001018:	605a      	str	r2, [r3, #4]
+ 800101a:	609a      	str	r2, [r3, #8]
+ 800101c:	60da      	str	r2, [r3, #12]
+  /* USER CODE BEGIN ADC1_Init 1 */
+
+  /* USER CODE END ADC1_Init 1 */
+  /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
+  */
+  hadc1.Instance = ADC1;
+ 800101e:	4b21      	ldr	r3, [pc, #132]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 8001020:	4a21      	ldr	r2, [pc, #132]	; (80010a8 <MX_ADC1_Init+0x9c>)
+ 8001022:	601a      	str	r2, [r3, #0]
+  hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+ 8001024:	4b1f      	ldr	r3, [pc, #124]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 8001026:	f44f 3280 	mov.w	r2, #65536	; 0x10000
+ 800102a:	605a      	str	r2, [r3, #4]
+  hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ 800102c:	4b1d      	ldr	r3, [pc, #116]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 800102e:	2200      	movs	r2, #0
+ 8001030:	609a      	str	r2, [r3, #8]
+  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+ 8001032:	4b1c      	ldr	r3, [pc, #112]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 8001034:	2200      	movs	r2, #0
+ 8001036:	611a      	str	r2, [r3, #16]
+  hadc1.Init.ContinuousConvMode = DISABLE;
+ 8001038:	4b1a      	ldr	r3, [pc, #104]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 800103a:	2200      	movs	r2, #0
+ 800103c:	619a      	str	r2, [r3, #24]
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+ 800103e:	4b19      	ldr	r3, [pc, #100]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 8001040:	2200      	movs	r2, #0
+ 8001042:	f883 2020 	strb.w	r2, [r3, #32]
+  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 8001046:	4b17      	ldr	r3, [pc, #92]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 8001048:	2200      	movs	r2, #0
+ 800104a:	62da      	str	r2, [r3, #44]	; 0x2c
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 800104c:	4b15      	ldr	r3, [pc, #84]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 800104e:	4a17      	ldr	r2, [pc, #92]	; (80010ac <MX_ADC1_Init+0xa0>)
+ 8001050:	629a      	str	r2, [r3, #40]	; 0x28
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 8001052:	4b14      	ldr	r3, [pc, #80]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 8001054:	2200      	movs	r2, #0
+ 8001056:	60da      	str	r2, [r3, #12]
+  hadc1.Init.NbrOfConversion = 1;
+ 8001058:	4b12      	ldr	r3, [pc, #72]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 800105a:	2201      	movs	r2, #1
+ 800105c:	61da      	str	r2, [r3, #28]
+  hadc1.Init.DMAContinuousRequests = DISABLE;
+ 800105e:	4b11      	ldr	r3, [pc, #68]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 8001060:	2200      	movs	r2, #0
+ 8001062:	f883 2030 	strb.w	r2, [r3, #48]	; 0x30
+  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 8001066:	4b0f      	ldr	r3, [pc, #60]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 8001068:	2201      	movs	r2, #1
+ 800106a:	615a      	str	r2, [r3, #20]
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ 800106c:	480d      	ldr	r0, [pc, #52]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 800106e:	f003 fd99 	bl	8004ba4 <HAL_ADC_Init>
+ 8001072:	4603      	mov	r3, r0
+ 8001074:	2b00      	cmp	r3, #0
+ 8001076:	d001      	beq.n	800107c <MX_ADC1_Init+0x70>
+  {
+    Error_Handler();
+ 8001078:	f001 f926 	bl	80022c8 <Error_Handler>
+  }
+  /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
+  */
+  sConfig.Channel = ADC_CHANNEL_0;
+ 800107c:	2300      	movs	r3, #0
+ 800107e:	603b      	str	r3, [r7, #0]
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+ 8001080:	2301      	movs	r3, #1
+ 8001082:	607b      	str	r3, [r7, #4]
+  sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+ 8001084:	2300      	movs	r3, #0
+ 8001086:	60bb      	str	r3, [r7, #8]
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 8001088:	463b      	mov	r3, r7
+ 800108a:	4619      	mov	r1, r3
+ 800108c:	4805      	ldr	r0, [pc, #20]	; (80010a4 <MX_ADC1_Init+0x98>)
+ 800108e:	f003 ff1f 	bl	8004ed0 <HAL_ADC_ConfigChannel>
+ 8001092:	4603      	mov	r3, r0
+ 8001094:	2b00      	cmp	r3, #0
+ 8001096:	d001      	beq.n	800109c <MX_ADC1_Init+0x90>
+  {
+    Error_Handler();
+ 8001098:	f001 f916 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN ADC1_Init 2 */
+
+  /* USER CODE END ADC1_Init 2 */
+
+}
+ 800109c:	bf00      	nop
+ 800109e:	3710      	adds	r7, #16
+ 80010a0:	46bd      	mov	sp, r7
+ 80010a2:	bd80      	pop	{r7, pc}
+ 80010a4:	20008b78 	.word	0x20008b78
+ 80010a8:	40012000 	.word	0x40012000
+ 80010ac:	0f000001 	.word	0x0f000001
+
+080010b0 <MX_ADC3_Init>:
+  * @brief ADC3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC3_Init(void)
+{
+ 80010b0:	b580      	push	{r7, lr}
+ 80010b2:	b084      	sub	sp, #16
+ 80010b4:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN ADC3_Init 0 */
+
+  /* USER CODE END ADC3_Init 0 */
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+ 80010b6:	463b      	mov	r3, r7
+ 80010b8:	2200      	movs	r2, #0
+ 80010ba:	601a      	str	r2, [r3, #0]
+ 80010bc:	605a      	str	r2, [r3, #4]
+ 80010be:	609a      	str	r2, [r3, #8]
+ 80010c0:	60da      	str	r2, [r3, #12]
+  /* USER CODE BEGIN ADC3_Init 1 */
+
+  /* USER CODE END ADC3_Init 1 */
+  /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
+  */
+  hadc3.Instance = ADC3;
+ 80010c2:	4b21      	ldr	r3, [pc, #132]	; (8001148 <MX_ADC3_Init+0x98>)
+ 80010c4:	4a21      	ldr	r2, [pc, #132]	; (800114c <MX_ADC3_Init+0x9c>)
+ 80010c6:	601a      	str	r2, [r3, #0]
+  hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+ 80010c8:	4b1f      	ldr	r3, [pc, #124]	; (8001148 <MX_ADC3_Init+0x98>)
+ 80010ca:	f44f 3280 	mov.w	r2, #65536	; 0x10000
+ 80010ce:	605a      	str	r2, [r3, #4]
+  hadc3.Init.Resolution = ADC_RESOLUTION_12B;
+ 80010d0:	4b1d      	ldr	r3, [pc, #116]	; (8001148 <MX_ADC3_Init+0x98>)
+ 80010d2:	2200      	movs	r2, #0
+ 80010d4:	609a      	str	r2, [r3, #8]
+  hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
+ 80010d6:	4b1c      	ldr	r3, [pc, #112]	; (8001148 <MX_ADC3_Init+0x98>)
+ 80010d8:	2200      	movs	r2, #0
+ 80010da:	611a      	str	r2, [r3, #16]
+  hadc3.Init.ContinuousConvMode = DISABLE;
+ 80010dc:	4b1a      	ldr	r3, [pc, #104]	; (8001148 <MX_ADC3_Init+0x98>)
+ 80010de:	2200      	movs	r2, #0
+ 80010e0:	619a      	str	r2, [r3, #24]
+  hadc3.Init.DiscontinuousConvMode = DISABLE;
+ 80010e2:	4b19      	ldr	r3, [pc, #100]	; (8001148 <MX_ADC3_Init+0x98>)
+ 80010e4:	2200      	movs	r2, #0
+ 80010e6:	f883 2020 	strb.w	r2, [r3, #32]
+  hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 80010ea:	4b17      	ldr	r3, [pc, #92]	; (8001148 <MX_ADC3_Init+0x98>)
+ 80010ec:	2200      	movs	r2, #0
+ 80010ee:	62da      	str	r2, [r3, #44]	; 0x2c
+  hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 80010f0:	4b15      	ldr	r3, [pc, #84]	; (8001148 <MX_ADC3_Init+0x98>)
+ 80010f2:	4a17      	ldr	r2, [pc, #92]	; (8001150 <MX_ADC3_Init+0xa0>)
+ 80010f4:	629a      	str	r2, [r3, #40]	; 0x28
+  hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 80010f6:	4b14      	ldr	r3, [pc, #80]	; (8001148 <MX_ADC3_Init+0x98>)
+ 80010f8:	2200      	movs	r2, #0
+ 80010fa:	60da      	str	r2, [r3, #12]
+  hadc3.Init.NbrOfConversion = 1;
+ 80010fc:	4b12      	ldr	r3, [pc, #72]	; (8001148 <MX_ADC3_Init+0x98>)
+ 80010fe:	2201      	movs	r2, #1
+ 8001100:	61da      	str	r2, [r3, #28]
+  hadc3.Init.DMAContinuousRequests = DISABLE;
+ 8001102:	4b11      	ldr	r3, [pc, #68]	; (8001148 <MX_ADC3_Init+0x98>)
+ 8001104:	2200      	movs	r2, #0
+ 8001106:	f883 2030 	strb.w	r2, [r3, #48]	; 0x30
+  hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 800110a:	4b0f      	ldr	r3, [pc, #60]	; (8001148 <MX_ADC3_Init+0x98>)
+ 800110c:	2201      	movs	r2, #1
+ 800110e:	615a      	str	r2, [r3, #20]
+  if (HAL_ADC_Init(&hadc3) != HAL_OK)
+ 8001110:	480d      	ldr	r0, [pc, #52]	; (8001148 <MX_ADC3_Init+0x98>)
+ 8001112:	f003 fd47 	bl	8004ba4 <HAL_ADC_Init>
+ 8001116:	4603      	mov	r3, r0
+ 8001118:	2b00      	cmp	r3, #0
+ 800111a:	d001      	beq.n	8001120 <MX_ADC3_Init+0x70>
+  {
+    Error_Handler();
+ 800111c:	f001 f8d4 	bl	80022c8 <Error_Handler>
+  }
+  /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
+  */
+  sConfig.Channel = ADC_CHANNEL_6;
+ 8001120:	2306      	movs	r3, #6
+ 8001122:	603b      	str	r3, [r7, #0]
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+ 8001124:	2301      	movs	r3, #1
+ 8001126:	607b      	str	r3, [r7, #4]
+  sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+ 8001128:	2300      	movs	r3, #0
+ 800112a:	60bb      	str	r3, [r7, #8]
+  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+ 800112c:	463b      	mov	r3, r7
+ 800112e:	4619      	mov	r1, r3
+ 8001130:	4805      	ldr	r0, [pc, #20]	; (8001148 <MX_ADC3_Init+0x98>)
+ 8001132:	f003 fecd 	bl	8004ed0 <HAL_ADC_ConfigChannel>
+ 8001136:	4603      	mov	r3, r0
+ 8001138:	2b00      	cmp	r3, #0
+ 800113a:	d001      	beq.n	8001140 <MX_ADC3_Init+0x90>
+  {
+    Error_Handler();
+ 800113c:	f001 f8c4 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN ADC3_Init 2 */
+
+  /* USER CODE END ADC3_Init 2 */
+
+}
+ 8001140:	bf00      	nop
+ 8001142:	3710      	adds	r7, #16
+ 8001144:	46bd      	mov	sp, r7
+ 8001146:	bd80      	pop	{r7, pc}
+ 8001148:	20008bc0 	.word	0x20008bc0
+ 800114c:	40012200 	.word	0x40012200
+ 8001150:	0f000001 	.word	0x0f000001
+
+08001154 <MX_CRC_Init>:
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+ 8001154:	b580      	push	{r7, lr}
+ 8001156:	af00      	add	r7, sp, #0
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+ 8001158:	4b0d      	ldr	r3, [pc, #52]	; (8001190 <MX_CRC_Init+0x3c>)
+ 800115a:	4a0e      	ldr	r2, [pc, #56]	; (8001194 <MX_CRC_Init+0x40>)
+ 800115c:	601a      	str	r2, [r3, #0]
+  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE;
+ 800115e:	4b0c      	ldr	r3, [pc, #48]	; (8001190 <MX_CRC_Init+0x3c>)
+ 8001160:	2200      	movs	r2, #0
+ 8001162:	711a      	strb	r2, [r3, #4]
+  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
+ 8001164:	4b0a      	ldr	r3, [pc, #40]	; (8001190 <MX_CRC_Init+0x3c>)
+ 8001166:	2200      	movs	r2, #0
+ 8001168:	715a      	strb	r2, [r3, #5]
+  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
+ 800116a:	4b09      	ldr	r3, [pc, #36]	; (8001190 <MX_CRC_Init+0x3c>)
+ 800116c:	2200      	movs	r2, #0
+ 800116e:	615a      	str	r2, [r3, #20]
+  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
+ 8001170:	4b07      	ldr	r3, [pc, #28]	; (8001190 <MX_CRC_Init+0x3c>)
+ 8001172:	2200      	movs	r2, #0
+ 8001174:	619a      	str	r2, [r3, #24]
+  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
+ 8001176:	4b06      	ldr	r3, [pc, #24]	; (8001190 <MX_CRC_Init+0x3c>)
+ 8001178:	2201      	movs	r2, #1
+ 800117a:	621a      	str	r2, [r3, #32]
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+ 800117c:	4804      	ldr	r0, [pc, #16]	; (8001190 <MX_CRC_Init+0x3c>)
+ 800117e:	f004 f9cd 	bl	800551c <HAL_CRC_Init>
+ 8001182:	4603      	mov	r3, r0
+ 8001184:	2b00      	cmp	r3, #0
+ 8001186:	d001      	beq.n	800118c <MX_CRC_Init+0x38>
+  {
+    Error_Handler();
+ 8001188:	f001 f89e 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+ 800118c:	bf00      	nop
+ 800118e:	bd80      	pop	{r7, pc}
+ 8001190:	20008a28 	.word	0x20008a28
+ 8001194:	40023000 	.word	0x40023000
+
+08001198 <MX_DAC_Init>:
+  * @brief DAC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DAC_Init(void)
+{
+ 8001198:	b580      	push	{r7, lr}
+ 800119a:	b082      	sub	sp, #8
+ 800119c:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN DAC_Init 0 */
+
+  /* USER CODE END DAC_Init 0 */
+
+  DAC_ChannelConfTypeDef sConfig = {0};
+ 800119e:	463b      	mov	r3, r7
+ 80011a0:	2200      	movs	r2, #0
+ 80011a2:	601a      	str	r2, [r3, #0]
+ 80011a4:	605a      	str	r2, [r3, #4]
+  /* USER CODE BEGIN DAC_Init 1 */
+
+  /* USER CODE END DAC_Init 1 */
+  /** DAC Initialization
+  */
+  hdac.Instance = DAC;
+ 80011a6:	4b0f      	ldr	r3, [pc, #60]	; (80011e4 <MX_DAC_Init+0x4c>)
+ 80011a8:	4a0f      	ldr	r2, [pc, #60]	; (80011e8 <MX_DAC_Init+0x50>)
+ 80011aa:	601a      	str	r2, [r3, #0]
+  if (HAL_DAC_Init(&hdac) != HAL_OK)
+ 80011ac:	480d      	ldr	r0, [pc, #52]	; (80011e4 <MX_DAC_Init+0x4c>)
+ 80011ae:	f004 fa9f 	bl	80056f0 <HAL_DAC_Init>
+ 80011b2:	4603      	mov	r3, r0
+ 80011b4:	2b00      	cmp	r3, #0
+ 80011b6:	d001      	beq.n	80011bc <MX_DAC_Init+0x24>
+  {
+    Error_Handler();
+ 80011b8:	f001 f886 	bl	80022c8 <Error_Handler>
+  }
+  /** DAC channel OUT1 config
+  */
+  sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
+ 80011bc:	2300      	movs	r3, #0
+ 80011be:	603b      	str	r3, [r7, #0]
+  sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
+ 80011c0:	2300      	movs	r3, #0
+ 80011c2:	607b      	str	r3, [r7, #4]
+  if (HAL_DAC_ConfigChannel(&hdac, &sConfig, DAC_CHANNEL_1) != HAL_OK)
+ 80011c4:	463b      	mov	r3, r7
+ 80011c6:	2200      	movs	r2, #0
+ 80011c8:	4619      	mov	r1, r3
+ 80011ca:	4806      	ldr	r0, [pc, #24]	; (80011e4 <MX_DAC_Init+0x4c>)
+ 80011cc:	f004 fb06 	bl	80057dc <HAL_DAC_ConfigChannel>
+ 80011d0:	4603      	mov	r3, r0
+ 80011d2:	2b00      	cmp	r3, #0
+ 80011d4:	d001      	beq.n	80011da <MX_DAC_Init+0x42>
+  {
+    Error_Handler();
+ 80011d6:	f001 f877 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN DAC_Init 2 */
+
+  /* USER CODE END DAC_Init 2 */
+
+}
+ 80011da:	bf00      	nop
+ 80011dc:	3708      	adds	r7, #8
+ 80011de:	46bd      	mov	sp, r7
+ 80011e0:	bd80      	pop	{r7, pc}
+ 80011e2:	bf00      	nop
+ 80011e4:	20008c94 	.word	0x20008c94
+ 80011e8:	40007400 	.word	0x40007400
+
+080011ec <MX_DMA2D_Init>:
+  * @brief DMA2D Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DMA2D_Init(void)
+{
+ 80011ec:	b580      	push	{r7, lr}
+ 80011ee:	af00      	add	r7, sp, #0
+  /* USER CODE END DMA2D_Init 0 */
+
+  /* USER CODE BEGIN DMA2D_Init 1 */
+
+  /* USER CODE END DMA2D_Init 1 */
+  hdma2d.Instance = DMA2D;
+ 80011f0:	4b15      	ldr	r3, [pc, #84]	; (8001248 <MX_DMA2D_Init+0x5c>)
+ 80011f2:	4a16      	ldr	r2, [pc, #88]	; (800124c <MX_DMA2D_Init+0x60>)
+ 80011f4:	601a      	str	r2, [r3, #0]
+  hdma2d.Init.Mode = DMA2D_M2M;
+ 80011f6:	4b14      	ldr	r3, [pc, #80]	; (8001248 <MX_DMA2D_Init+0x5c>)
+ 80011f8:	2200      	movs	r2, #0
+ 80011fa:	605a      	str	r2, [r3, #4]
+  hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
+ 80011fc:	4b12      	ldr	r3, [pc, #72]	; (8001248 <MX_DMA2D_Init+0x5c>)
+ 80011fe:	2200      	movs	r2, #0
+ 8001200:	609a      	str	r2, [r3, #8]
+  hdma2d.Init.OutputOffset = 0;
+ 8001202:	4b11      	ldr	r3, [pc, #68]	; (8001248 <MX_DMA2D_Init+0x5c>)
+ 8001204:	2200      	movs	r2, #0
+ 8001206:	60da      	str	r2, [r3, #12]
+  hdma2d.LayerCfg[1].InputOffset = 0;
+ 8001208:	4b0f      	ldr	r3, [pc, #60]	; (8001248 <MX_DMA2D_Init+0x5c>)
+ 800120a:	2200      	movs	r2, #0
+ 800120c:	629a      	str	r2, [r3, #40]	; 0x28
+  hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
+ 800120e:	4b0e      	ldr	r3, [pc, #56]	; (8001248 <MX_DMA2D_Init+0x5c>)
+ 8001210:	2200      	movs	r2, #0
+ 8001212:	62da      	str	r2, [r3, #44]	; 0x2c
+  hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
+ 8001214:	4b0c      	ldr	r3, [pc, #48]	; (8001248 <MX_DMA2D_Init+0x5c>)
+ 8001216:	2200      	movs	r2, #0
+ 8001218:	631a      	str	r2, [r3, #48]	; 0x30
+  hdma2d.LayerCfg[1].InputAlpha = 0;
+ 800121a:	4b0b      	ldr	r3, [pc, #44]	; (8001248 <MX_DMA2D_Init+0x5c>)
+ 800121c:	2200      	movs	r2, #0
+ 800121e:	635a      	str	r2, [r3, #52]	; 0x34
+  if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
+ 8001220:	4809      	ldr	r0, [pc, #36]	; (8001248 <MX_DMA2D_Init+0x5c>)
+ 8001222:	f004 fcef 	bl	8005c04 <HAL_DMA2D_Init>
+ 8001226:	4603      	mov	r3, r0
+ 8001228:	2b00      	cmp	r3, #0
+ 800122a:	d001      	beq.n	8001230 <MX_DMA2D_Init+0x44>
+  {
+    Error_Handler();
+ 800122c:	f001 f84c 	bl	80022c8 <Error_Handler>
+  }
+  if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
+ 8001230:	2101      	movs	r1, #1
+ 8001232:	4805      	ldr	r0, [pc, #20]	; (8001248 <MX_DMA2D_Init+0x5c>)
+ 8001234:	f004 fe44 	bl	8005ec0 <HAL_DMA2D_ConfigLayer>
+ 8001238:	4603      	mov	r3, r0
+ 800123a:	2b00      	cmp	r3, #0
+ 800123c:	d001      	beq.n	8001242 <MX_DMA2D_Init+0x56>
+  {
+    Error_Handler();
+ 800123e:	f001 f843 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN DMA2D_Init 2 */
+
+  /* USER CODE END DMA2D_Init 2 */
+
+}
+ 8001242:	bf00      	nop
+ 8001244:	bd80      	pop	{r7, pc}
+ 8001246:	bf00      	nop
+ 8001248:	20008da0 	.word	0x20008da0
+ 800124c:	4002b000 	.word	0x4002b000
+
+08001250 <MX_I2C1_Init>:
+  * @brief I2C1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_I2C1_Init(void)
+{
+ 8001250:	b580      	push	{r7, lr}
+ 8001252:	af00      	add	r7, sp, #0
+  /* USER CODE END I2C1_Init 0 */
+
+  /* USER CODE BEGIN I2C1_Init 1 */
+
+  /* USER CODE END I2C1_Init 1 */
+  hi2c1.Instance = I2C1;
+ 8001254:	4b1b      	ldr	r3, [pc, #108]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 8001256:	4a1c      	ldr	r2, [pc, #112]	; (80012c8 <MX_I2C1_Init+0x78>)
+ 8001258:	601a      	str	r2, [r3, #0]
+  hi2c1.Init.Timing = 0x00C0EAFF;
+ 800125a:	4b1a      	ldr	r3, [pc, #104]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 800125c:	4a1b      	ldr	r2, [pc, #108]	; (80012cc <MX_I2C1_Init+0x7c>)
+ 800125e:	605a      	str	r2, [r3, #4]
+  hi2c1.Init.OwnAddress1 = 0;
+ 8001260:	4b18      	ldr	r3, [pc, #96]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 8001262:	2200      	movs	r2, #0
+ 8001264:	609a      	str	r2, [r3, #8]
+  hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+ 8001266:	4b17      	ldr	r3, [pc, #92]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 8001268:	2201      	movs	r2, #1
+ 800126a:	60da      	str	r2, [r3, #12]
+  hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+ 800126c:	4b15      	ldr	r3, [pc, #84]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 800126e:	2200      	movs	r2, #0
+ 8001270:	611a      	str	r2, [r3, #16]
+  hi2c1.Init.OwnAddress2 = 0;
+ 8001272:	4b14      	ldr	r3, [pc, #80]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 8001274:	2200      	movs	r2, #0
+ 8001276:	615a      	str	r2, [r3, #20]
+  hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
+ 8001278:	4b12      	ldr	r3, [pc, #72]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 800127a:	2200      	movs	r2, #0
+ 800127c:	619a      	str	r2, [r3, #24]
+  hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+ 800127e:	4b11      	ldr	r3, [pc, #68]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 8001280:	2200      	movs	r2, #0
+ 8001282:	61da      	str	r2, [r3, #28]
+  hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+ 8001284:	4b0f      	ldr	r3, [pc, #60]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 8001286:	2200      	movs	r2, #0
+ 8001288:	621a      	str	r2, [r3, #32]
+  if (HAL_I2C_Init(&hi2c1) != HAL_OK)
+ 800128a:	480e      	ldr	r0, [pc, #56]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 800128c:	f006 fbb2 	bl	80079f4 <HAL_I2C_Init>
+ 8001290:	4603      	mov	r3, r0
+ 8001292:	2b00      	cmp	r3, #0
+ 8001294:	d001      	beq.n	800129a <MX_I2C1_Init+0x4a>
+  {
+    Error_Handler();
+ 8001296:	f001 f817 	bl	80022c8 <Error_Handler>
+  }
+  /** Configure Analogue filter
+  */
+  if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+ 800129a:	2100      	movs	r1, #0
+ 800129c:	4809      	ldr	r0, [pc, #36]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 800129e:	f007 f8c1 	bl	8008424 <HAL_I2CEx_ConfigAnalogFilter>
+ 80012a2:	4603      	mov	r3, r0
+ 80012a4:	2b00      	cmp	r3, #0
+ 80012a6:	d001      	beq.n	80012ac <MX_I2C1_Init+0x5c>
+  {
+    Error_Handler();
+ 80012a8:	f001 f80e 	bl	80022c8 <Error_Handler>
+  }
+  /** Configure Digital filter
+  */
+  if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
+ 80012ac:	2100      	movs	r1, #0
+ 80012ae:	4805      	ldr	r0, [pc, #20]	; (80012c4 <MX_I2C1_Init+0x74>)
+ 80012b0:	f007 f903 	bl	80084ba <HAL_I2CEx_ConfigDigitalFilter>
+ 80012b4:	4603      	mov	r3, r0
+ 80012b6:	2b00      	cmp	r3, #0
+ 80012b8:	d001      	beq.n	80012be <MX_I2C1_Init+0x6e>
+  {
+    Error_Handler();
+ 80012ba:	f001 f805 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN I2C1_Init 2 */
+
+  /* USER CODE END I2C1_Init 2 */
+
+}
+ 80012be:	bf00      	nop
+ 80012c0:	bd80      	pop	{r7, pc}
+ 80012c2:	bf00      	nop
+ 80012c4:	200089dc 	.word	0x200089dc
+ 80012c8:	40005400 	.word	0x40005400
+ 80012cc:	00c0eaff 	.word	0x00c0eaff
+
+080012d0 <MX_I2C3_Init>:
+  * @brief I2C3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_I2C3_Init(void)
+{
+ 80012d0:	b580      	push	{r7, lr}
+ 80012d2:	af00      	add	r7, sp, #0
+  /* USER CODE END I2C3_Init 0 */
+
+  /* USER CODE BEGIN I2C3_Init 1 */
+
+  /* USER CODE END I2C3_Init 1 */
+  hi2c3.Instance = I2C3;
+ 80012d4:	4b1b      	ldr	r3, [pc, #108]	; (8001344 <MX_I2C3_Init+0x74>)
+ 80012d6:	4a1c      	ldr	r2, [pc, #112]	; (8001348 <MX_I2C3_Init+0x78>)
+ 80012d8:	601a      	str	r2, [r3, #0]
+  hi2c3.Init.Timing = 0x00C0EAFF;
+ 80012da:	4b1a      	ldr	r3, [pc, #104]	; (8001344 <MX_I2C3_Init+0x74>)
+ 80012dc:	4a1b      	ldr	r2, [pc, #108]	; (800134c <MX_I2C3_Init+0x7c>)
+ 80012de:	605a      	str	r2, [r3, #4]
+  hi2c3.Init.OwnAddress1 = 0;
+ 80012e0:	4b18      	ldr	r3, [pc, #96]	; (8001344 <MX_I2C3_Init+0x74>)
+ 80012e2:	2200      	movs	r2, #0
+ 80012e4:	609a      	str	r2, [r3, #8]
+  hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+ 80012e6:	4b17      	ldr	r3, [pc, #92]	; (8001344 <MX_I2C3_Init+0x74>)
+ 80012e8:	2201      	movs	r2, #1
+ 80012ea:	60da      	str	r2, [r3, #12]
+  hi2c3.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+ 80012ec:	4b15      	ldr	r3, [pc, #84]	; (8001344 <MX_I2C3_Init+0x74>)
+ 80012ee:	2200      	movs	r2, #0
+ 80012f0:	611a      	str	r2, [r3, #16]
+  hi2c3.Init.OwnAddress2 = 0;
+ 80012f2:	4b14      	ldr	r3, [pc, #80]	; (8001344 <MX_I2C3_Init+0x74>)
+ 80012f4:	2200      	movs	r2, #0
+ 80012f6:	615a      	str	r2, [r3, #20]
+  hi2c3.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
+ 80012f8:	4b12      	ldr	r3, [pc, #72]	; (8001344 <MX_I2C3_Init+0x74>)
+ 80012fa:	2200      	movs	r2, #0
+ 80012fc:	619a      	str	r2, [r3, #24]
+  hi2c3.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+ 80012fe:	4b11      	ldr	r3, [pc, #68]	; (8001344 <MX_I2C3_Init+0x74>)
+ 8001300:	2200      	movs	r2, #0
+ 8001302:	61da      	str	r2, [r3, #28]
+  hi2c3.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+ 8001304:	4b0f      	ldr	r3, [pc, #60]	; (8001344 <MX_I2C3_Init+0x74>)
+ 8001306:	2200      	movs	r2, #0
+ 8001308:	621a      	str	r2, [r3, #32]
+  if (HAL_I2C_Init(&hi2c3) != HAL_OK)
+ 800130a:	480e      	ldr	r0, [pc, #56]	; (8001344 <MX_I2C3_Init+0x74>)
+ 800130c:	f006 fb72 	bl	80079f4 <HAL_I2C_Init>
+ 8001310:	4603      	mov	r3, r0
+ 8001312:	2b00      	cmp	r3, #0
+ 8001314:	d001      	beq.n	800131a <MX_I2C3_Init+0x4a>
+  {
+    Error_Handler();
+ 8001316:	f000 ffd7 	bl	80022c8 <Error_Handler>
+  }
+  /** Configure Analogue filter
+  */
+  if (HAL_I2CEx_ConfigAnalogFilter(&hi2c3, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+ 800131a:	2100      	movs	r1, #0
+ 800131c:	4809      	ldr	r0, [pc, #36]	; (8001344 <MX_I2C3_Init+0x74>)
+ 800131e:	f007 f881 	bl	8008424 <HAL_I2CEx_ConfigAnalogFilter>
+ 8001322:	4603      	mov	r3, r0
+ 8001324:	2b00      	cmp	r3, #0
+ 8001326:	d001      	beq.n	800132c <MX_I2C3_Init+0x5c>
+  {
+    Error_Handler();
+ 8001328:	f000 ffce 	bl	80022c8 <Error_Handler>
+  }
+  /** Configure Digital filter
+  */
+  if (HAL_I2CEx_ConfigDigitalFilter(&hi2c3, 0) != HAL_OK)
+ 800132c:	2100      	movs	r1, #0
+ 800132e:	4805      	ldr	r0, [pc, #20]	; (8001344 <MX_I2C3_Init+0x74>)
+ 8001330:	f007 f8c3 	bl	80084ba <HAL_I2CEx_ConfigDigitalFilter>
+ 8001334:	4603      	mov	r3, r0
+ 8001336:	2b00      	cmp	r3, #0
+ 8001338:	d001      	beq.n	800133e <MX_I2C3_Init+0x6e>
+  {
+    Error_Handler();
+ 800133a:	f000 ffc5 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN I2C3_Init 2 */
+
+  /* USER CODE END I2C3_Init 2 */
+
+}
+ 800133e:	bf00      	nop
+ 8001340:	bd80      	pop	{r7, pc}
+ 8001342:	bf00      	nop
+ 8001344:	20008868 	.word	0x20008868
+ 8001348:	40005c00 	.word	0x40005c00
+ 800134c:	00c0eaff 	.word	0x00c0eaff
+
+08001350 <MX_LTDC_Init>:
+  * @brief LTDC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_LTDC_Init(void)
+{
+ 8001350:	b580      	push	{r7, lr}
+ 8001352:	b08e      	sub	sp, #56	; 0x38
+ 8001354:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN LTDC_Init 0 */
+
+  /* USER CODE END LTDC_Init 0 */
+
+  LTDC_LayerCfgTypeDef pLayerCfg = {0};
+ 8001356:	1d3b      	adds	r3, r7, #4
+ 8001358:	2234      	movs	r2, #52	; 0x34
+ 800135a:	2100      	movs	r1, #0
+ 800135c:	4618      	mov	r0, r3
+ 800135e:	f01b f842 	bl	801c3e6 <memset>
+
+  /* USER CODE BEGIN LTDC_Init 1 */
+
+  /* USER CODE END LTDC_Init 1 */
+  hltdc.Instance = LTDC;
+ 8001362:	4b3a      	ldr	r3, [pc, #232]	; (800144c <MX_LTDC_Init+0xfc>)
+ 8001364:	4a3a      	ldr	r2, [pc, #232]	; (8001450 <MX_LTDC_Init+0x100>)
+ 8001366:	601a      	str	r2, [r3, #0]
+  hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
+ 8001368:	4b38      	ldr	r3, [pc, #224]	; (800144c <MX_LTDC_Init+0xfc>)
+ 800136a:	2200      	movs	r2, #0
+ 800136c:	605a      	str	r2, [r3, #4]
+  hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
+ 800136e:	4b37      	ldr	r3, [pc, #220]	; (800144c <MX_LTDC_Init+0xfc>)
+ 8001370:	2200      	movs	r2, #0
+ 8001372:	609a      	str	r2, [r3, #8]
+  hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
+ 8001374:	4b35      	ldr	r3, [pc, #212]	; (800144c <MX_LTDC_Init+0xfc>)
+ 8001376:	2200      	movs	r2, #0
+ 8001378:	60da      	str	r2, [r3, #12]
+  hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+ 800137a:	4b34      	ldr	r3, [pc, #208]	; (800144c <MX_LTDC_Init+0xfc>)
+ 800137c:	2200      	movs	r2, #0
+ 800137e:	611a      	str	r2, [r3, #16]
+  hltdc.Init.HorizontalSync = 40;
+ 8001380:	4b32      	ldr	r3, [pc, #200]	; (800144c <MX_LTDC_Init+0xfc>)
+ 8001382:	2228      	movs	r2, #40	; 0x28
+ 8001384:	615a      	str	r2, [r3, #20]
+  hltdc.Init.VerticalSync = 9;
+ 8001386:	4b31      	ldr	r3, [pc, #196]	; (800144c <MX_LTDC_Init+0xfc>)
+ 8001388:	2209      	movs	r2, #9
+ 800138a:	619a      	str	r2, [r3, #24]
+  hltdc.Init.AccumulatedHBP = 53;
+ 800138c:	4b2f      	ldr	r3, [pc, #188]	; (800144c <MX_LTDC_Init+0xfc>)
+ 800138e:	2235      	movs	r2, #53	; 0x35
+ 8001390:	61da      	str	r2, [r3, #28]
+  hltdc.Init.AccumulatedVBP = 11;
+ 8001392:	4b2e      	ldr	r3, [pc, #184]	; (800144c <MX_LTDC_Init+0xfc>)
+ 8001394:	220b      	movs	r2, #11
+ 8001396:	621a      	str	r2, [r3, #32]
+  hltdc.Init.AccumulatedActiveW = 533;
+ 8001398:	4b2c      	ldr	r3, [pc, #176]	; (800144c <MX_LTDC_Init+0xfc>)
+ 800139a:	f240 2215 	movw	r2, #533	; 0x215
+ 800139e:	625a      	str	r2, [r3, #36]	; 0x24
+  hltdc.Init.AccumulatedActiveH = 283;
+ 80013a0:	4b2a      	ldr	r3, [pc, #168]	; (800144c <MX_LTDC_Init+0xfc>)
+ 80013a2:	f240 121b 	movw	r2, #283	; 0x11b
+ 80013a6:	629a      	str	r2, [r3, #40]	; 0x28
+  hltdc.Init.TotalWidth = 565;
+ 80013a8:	4b28      	ldr	r3, [pc, #160]	; (800144c <MX_LTDC_Init+0xfc>)
+ 80013aa:	f240 2235 	movw	r2, #565	; 0x235
+ 80013ae:	62da      	str	r2, [r3, #44]	; 0x2c
+  hltdc.Init.TotalHeigh = 285;
+ 80013b0:	4b26      	ldr	r3, [pc, #152]	; (800144c <MX_LTDC_Init+0xfc>)
+ 80013b2:	f240 121d 	movw	r2, #285	; 0x11d
+ 80013b6:	631a      	str	r2, [r3, #48]	; 0x30
+  hltdc.Init.Backcolor.Blue = 0;
+ 80013b8:	4b24      	ldr	r3, [pc, #144]	; (800144c <MX_LTDC_Init+0xfc>)
+ 80013ba:	2200      	movs	r2, #0
+ 80013bc:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
+  hltdc.Init.Backcolor.Green = 0;
+ 80013c0:	4b22      	ldr	r3, [pc, #136]	; (800144c <MX_LTDC_Init+0xfc>)
+ 80013c2:	2200      	movs	r2, #0
+ 80013c4:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
+  hltdc.Init.Backcolor.Red = 0;
+ 80013c8:	4b20      	ldr	r3, [pc, #128]	; (800144c <MX_LTDC_Init+0xfc>)
+ 80013ca:	2200      	movs	r2, #0
+ 80013cc:	f883 2036 	strb.w	r2, [r3, #54]	; 0x36
+  if (HAL_LTDC_Init(&hltdc) != HAL_OK)
+ 80013d0:	481e      	ldr	r0, [pc, #120]	; (800144c <MX_LTDC_Init+0xfc>)
+ 80013d2:	f007 f8bf 	bl	8008554 <HAL_LTDC_Init>
+ 80013d6:	4603      	mov	r3, r0
+ 80013d8:	2b00      	cmp	r3, #0
+ 80013da:	d001      	beq.n	80013e0 <MX_LTDC_Init+0x90>
+  {
+    Error_Handler();
+ 80013dc:	f000 ff74 	bl	80022c8 <Error_Handler>
+  }
+  pLayerCfg.WindowX0 = 0;
+ 80013e0:	2300      	movs	r3, #0
+ 80013e2:	607b      	str	r3, [r7, #4]
+  pLayerCfg.WindowX1 = 480;
+ 80013e4:	f44f 73f0 	mov.w	r3, #480	; 0x1e0
+ 80013e8:	60bb      	str	r3, [r7, #8]
+  pLayerCfg.WindowY0 = 0;
+ 80013ea:	2300      	movs	r3, #0
+ 80013ec:	60fb      	str	r3, [r7, #12]
+  pLayerCfg.WindowY1 = 272;
+ 80013ee:	f44f 7388 	mov.w	r3, #272	; 0x110
+ 80013f2:	613b      	str	r3, [r7, #16]
+  pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565;
+ 80013f4:	2302      	movs	r3, #2
+ 80013f6:	617b      	str	r3, [r7, #20]
+  pLayerCfg.Alpha = 255;
+ 80013f8:	23ff      	movs	r3, #255	; 0xff
+ 80013fa:	61bb      	str	r3, [r7, #24]
+  pLayerCfg.Alpha0 = 0;
+ 80013fc:	2300      	movs	r3, #0
+ 80013fe:	61fb      	str	r3, [r7, #28]
+  pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
+ 8001400:	f44f 63c0 	mov.w	r3, #1536	; 0x600
+ 8001404:	623b      	str	r3, [r7, #32]
+  pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
+ 8001406:	2307      	movs	r3, #7
+ 8001408:	627b      	str	r3, [r7, #36]	; 0x24
+  pLayerCfg.FBStartAdress = 0xC0000000;
+ 800140a:	f04f 4340 	mov.w	r3, #3221225472	; 0xc0000000
+ 800140e:	62bb      	str	r3, [r7, #40]	; 0x28
+  pLayerCfg.ImageWidth = 480;
+ 8001410:	f44f 73f0 	mov.w	r3, #480	; 0x1e0
+ 8001414:	62fb      	str	r3, [r7, #44]	; 0x2c
+  pLayerCfg.ImageHeight = 272;
+ 8001416:	f44f 7388 	mov.w	r3, #272	; 0x110
+ 800141a:	633b      	str	r3, [r7, #48]	; 0x30
+  pLayerCfg.Backcolor.Blue = 0;
+ 800141c:	2300      	movs	r3, #0
+ 800141e:	f887 3034 	strb.w	r3, [r7, #52]	; 0x34
+  pLayerCfg.Backcolor.Green = 0;
+ 8001422:	2300      	movs	r3, #0
+ 8001424:	f887 3035 	strb.w	r3, [r7, #53]	; 0x35
+  pLayerCfg.Backcolor.Red = 0;
+ 8001428:	2300      	movs	r3, #0
+ 800142a:	f887 3036 	strb.w	r3, [r7, #54]	; 0x36
+  if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
+ 800142e:	1d3b      	adds	r3, r7, #4
+ 8001430:	2200      	movs	r2, #0
+ 8001432:	4619      	mov	r1, r3
+ 8001434:	4805      	ldr	r0, [pc, #20]	; (800144c <MX_LTDC_Init+0xfc>)
+ 8001436:	f007 fa1f 	bl	8008878 <HAL_LTDC_ConfigLayer>
+ 800143a:	4603      	mov	r3, r0
+ 800143c:	2b00      	cmp	r3, #0
+ 800143e:	d001      	beq.n	8001444 <MX_LTDC_Init+0xf4>
+  {
+    Error_Handler();
+ 8001440:	f000 ff42 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN LTDC_Init 2 */
+
+  /* USER CODE END LTDC_Init 2 */
+
+}
+ 8001444:	bf00      	nop
+ 8001446:	3738      	adds	r7, #56	; 0x38
+ 8001448:	46bd      	mov	sp, r7
+ 800144a:	bd80      	pop	{r7, pc}
+ 800144c:	20008ad0 	.word	0x20008ad0
+ 8001450:	40016800 	.word	0x40016800
+
+08001454 <MX_RNG_Init>:
+  * @brief RNG Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_RNG_Init(void)
+{
+ 8001454:	b580      	push	{r7, lr}
+ 8001456:	af00      	add	r7, sp, #0
+  /* USER CODE END RNG_Init 0 */
+
+  /* USER CODE BEGIN RNG_Init 1 */
+
+  /* USER CODE END RNG_Init 1 */
+  hrng.Instance = RNG;
+ 8001458:	4b06      	ldr	r3, [pc, #24]	; (8001474 <MX_RNG_Init+0x20>)
+ 800145a:	4a07      	ldr	r2, [pc, #28]	; (8001478 <MX_RNG_Init+0x24>)
+ 800145c:	601a      	str	r2, [r3, #0]
+  if (HAL_RNG_Init(&hrng) != HAL_OK)
+ 800145e:	4805      	ldr	r0, [pc, #20]	; (8001474 <MX_RNG_Init+0x20>)
+ 8001460:	f008 fce6 	bl	8009e30 <HAL_RNG_Init>
+ 8001464:	4603      	mov	r3, r0
+ 8001466:	2b00      	cmp	r3, #0
+ 8001468:	d001      	beq.n	800146e <MX_RNG_Init+0x1a>
+  {
+    Error_Handler();
+ 800146a:	f000 ff2d 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN RNG_Init 2 */
+
+  /* USER CODE END RNG_Init 2 */
+
+}
+ 800146e:	bf00      	nop
+ 8001470:	bd80      	pop	{r7, pc}
+ 8001472:	bf00      	nop
+ 8001474:	20008d0c 	.word	0x20008d0c
+ 8001478:	50060800 	.word	0x50060800
+
+0800147c <MX_RTC_Init>:
+  * @brief RTC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_RTC_Init(void)
+{
+ 800147c:	b580      	push	{r7, lr}
+ 800147e:	b092      	sub	sp, #72	; 0x48
+ 8001480:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN RTC_Init 0 */
+
+  /* USER CODE END RTC_Init 0 */
+
+  RTC_TimeTypeDef sTime = {0};
+ 8001482:	f107 0330 	add.w	r3, r7, #48	; 0x30
+ 8001486:	2200      	movs	r2, #0
+ 8001488:	601a      	str	r2, [r3, #0]
+ 800148a:	605a      	str	r2, [r3, #4]
+ 800148c:	609a      	str	r2, [r3, #8]
+ 800148e:	60da      	str	r2, [r3, #12]
+ 8001490:	611a      	str	r2, [r3, #16]
+ 8001492:	615a      	str	r2, [r3, #20]
+  RTC_DateTypeDef sDate = {0};
+ 8001494:	2300      	movs	r3, #0
+ 8001496:	62fb      	str	r3, [r7, #44]	; 0x2c
+  RTC_AlarmTypeDef sAlarm = {0};
+ 8001498:	463b      	mov	r3, r7
+ 800149a:	222c      	movs	r2, #44	; 0x2c
+ 800149c:	2100      	movs	r1, #0
+ 800149e:	4618      	mov	r0, r3
+ 80014a0:	f01a ffa1 	bl	801c3e6 <memset>
+  /* USER CODE BEGIN RTC_Init 1 */
+
+  /* USER CODE END RTC_Init 1 */
+  /** Initialize RTC Only
+  */
+  hrtc.Instance = RTC;
+ 80014a4:	4b46      	ldr	r3, [pc, #280]	; (80015c0 <MX_RTC_Init+0x144>)
+ 80014a6:	4a47      	ldr	r2, [pc, #284]	; (80015c4 <MX_RTC_Init+0x148>)
+ 80014a8:	601a      	str	r2, [r3, #0]
+  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
+ 80014aa:	4b45      	ldr	r3, [pc, #276]	; (80015c0 <MX_RTC_Init+0x144>)
+ 80014ac:	2200      	movs	r2, #0
+ 80014ae:	605a      	str	r2, [r3, #4]
+  hrtc.Init.AsynchPrediv = 127;
+ 80014b0:	4b43      	ldr	r3, [pc, #268]	; (80015c0 <MX_RTC_Init+0x144>)
+ 80014b2:	227f      	movs	r2, #127	; 0x7f
+ 80014b4:	609a      	str	r2, [r3, #8]
+  hrtc.Init.SynchPrediv = 255;
+ 80014b6:	4b42      	ldr	r3, [pc, #264]	; (80015c0 <MX_RTC_Init+0x144>)
+ 80014b8:	22ff      	movs	r2, #255	; 0xff
+ 80014ba:	60da      	str	r2, [r3, #12]
+  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
+ 80014bc:	4b40      	ldr	r3, [pc, #256]	; (80015c0 <MX_RTC_Init+0x144>)
+ 80014be:	2200      	movs	r2, #0
+ 80014c0:	611a      	str	r2, [r3, #16]
+  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+ 80014c2:	4b3f      	ldr	r3, [pc, #252]	; (80015c0 <MX_RTC_Init+0x144>)
+ 80014c4:	2200      	movs	r2, #0
+ 80014c6:	615a      	str	r2, [r3, #20]
+  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+ 80014c8:	4b3d      	ldr	r3, [pc, #244]	; (80015c0 <MX_RTC_Init+0x144>)
+ 80014ca:	2200      	movs	r2, #0
+ 80014cc:	619a      	str	r2, [r3, #24]
+  if (HAL_RTC_Init(&hrtc) != HAL_OK)
+ 80014ce:	483c      	ldr	r0, [pc, #240]	; (80015c0 <MX_RTC_Init+0x144>)
+ 80014d0:	f008 fcd8 	bl	8009e84 <HAL_RTC_Init>
+ 80014d4:	4603      	mov	r3, r0
+ 80014d6:	2b00      	cmp	r3, #0
+ 80014d8:	d001      	beq.n	80014de <MX_RTC_Init+0x62>
+  {
+    Error_Handler();
+ 80014da:	f000 fef5 	bl	80022c8 <Error_Handler>
+
+  /* USER CODE END Check_RTC_BKUP */
+
+  /** Initialize RTC and set the Time and Date
+  */
+  sTime.Hours = 0x0;
+ 80014de:	2300      	movs	r3, #0
+ 80014e0:	f887 3030 	strb.w	r3, [r7, #48]	; 0x30
+  sTime.Minutes = 0x0;
+ 80014e4:	2300      	movs	r3, #0
+ 80014e6:	f887 3031 	strb.w	r3, [r7, #49]	; 0x31
+  sTime.Seconds = 0x0;
+ 80014ea:	2300      	movs	r3, #0
+ 80014ec:	f887 3032 	strb.w	r3, [r7, #50]	; 0x32
+  sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
+ 80014f0:	2300      	movs	r3, #0
+ 80014f2:	643b      	str	r3, [r7, #64]	; 0x40
+  sTime.StoreOperation = RTC_STOREOPERATION_RESET;
+ 80014f4:	2300      	movs	r3, #0
+ 80014f6:	647b      	str	r3, [r7, #68]	; 0x44
+  if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
+ 80014f8:	f107 0330 	add.w	r3, r7, #48	; 0x30
+ 80014fc:	2201      	movs	r2, #1
+ 80014fe:	4619      	mov	r1, r3
+ 8001500:	482f      	ldr	r0, [pc, #188]	; (80015c0 <MX_RTC_Init+0x144>)
+ 8001502:	f008 fd3b 	bl	8009f7c <HAL_RTC_SetTime>
+ 8001506:	4603      	mov	r3, r0
+ 8001508:	2b00      	cmp	r3, #0
+ 800150a:	d001      	beq.n	8001510 <MX_RTC_Init+0x94>
+  {
+    Error_Handler();
+ 800150c:	f000 fedc 	bl	80022c8 <Error_Handler>
+  }
+  sDate.WeekDay = RTC_WEEKDAY_MONDAY;
+ 8001510:	2301      	movs	r3, #1
+ 8001512:	f887 302c 	strb.w	r3, [r7, #44]	; 0x2c
+  sDate.Month = RTC_MONTH_JANUARY;
+ 8001516:	2301      	movs	r3, #1
+ 8001518:	f887 302d 	strb.w	r3, [r7, #45]	; 0x2d
+  sDate.Date = 0x1;
+ 800151c:	2301      	movs	r3, #1
+ 800151e:	f887 302e 	strb.w	r3, [r7, #46]	; 0x2e
+  sDate.Year = 0x0;
+ 8001522:	2300      	movs	r3, #0
+ 8001524:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
+  if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BCD) != HAL_OK)
+ 8001528:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 800152c:	2201      	movs	r2, #1
+ 800152e:	4619      	mov	r1, r3
+ 8001530:	4823      	ldr	r0, [pc, #140]	; (80015c0 <MX_RTC_Init+0x144>)
+ 8001532:	f008 fde1 	bl	800a0f8 <HAL_RTC_SetDate>
+ 8001536:	4603      	mov	r3, r0
+ 8001538:	2b00      	cmp	r3, #0
+ 800153a:	d001      	beq.n	8001540 <MX_RTC_Init+0xc4>
+  {
+    Error_Handler();
+ 800153c:	f000 fec4 	bl	80022c8 <Error_Handler>
+  }
+  /** Enable the Alarm A
+  */
+  sAlarm.AlarmTime.Hours = 0x0;
+ 8001540:	2300      	movs	r3, #0
+ 8001542:	703b      	strb	r3, [r7, #0]
+  sAlarm.AlarmTime.Minutes = 0x0;
+ 8001544:	2300      	movs	r3, #0
+ 8001546:	707b      	strb	r3, [r7, #1]
+  sAlarm.AlarmTime.Seconds = 0x0;
+ 8001548:	2300      	movs	r3, #0
+ 800154a:	70bb      	strb	r3, [r7, #2]
+  sAlarm.AlarmTime.SubSeconds = 0x0;
+ 800154c:	2300      	movs	r3, #0
+ 800154e:	607b      	str	r3, [r7, #4]
+  sAlarm.AlarmTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
+ 8001550:	2300      	movs	r3, #0
+ 8001552:	613b      	str	r3, [r7, #16]
+  sAlarm.AlarmTime.StoreOperation = RTC_STOREOPERATION_RESET;
+ 8001554:	2300      	movs	r3, #0
+ 8001556:	617b      	str	r3, [r7, #20]
+  sAlarm.AlarmMask = RTC_ALARMMASK_NONE;
+ 8001558:	2300      	movs	r3, #0
+ 800155a:	61bb      	str	r3, [r7, #24]
+  sAlarm.AlarmSubSecondMask = RTC_ALARMSUBSECONDMASK_ALL;
+ 800155c:	2300      	movs	r3, #0
+ 800155e:	61fb      	str	r3, [r7, #28]
+  sAlarm.AlarmDateWeekDaySel = RTC_ALARMDATEWEEKDAYSEL_DATE;
+ 8001560:	2300      	movs	r3, #0
+ 8001562:	623b      	str	r3, [r7, #32]
+  sAlarm.AlarmDateWeekDay = 0x1;
+ 8001564:	2301      	movs	r3, #1
+ 8001566:	f887 3024 	strb.w	r3, [r7, #36]	; 0x24
+  sAlarm.Alarm = RTC_ALARM_A;
+ 800156a:	f44f 7380 	mov.w	r3, #256	; 0x100
+ 800156e:	62bb      	str	r3, [r7, #40]	; 0x28
+  if (HAL_RTC_SetAlarm(&hrtc, &sAlarm, RTC_FORMAT_BCD) != HAL_OK)
+ 8001570:	463b      	mov	r3, r7
+ 8001572:	2201      	movs	r2, #1
+ 8001574:	4619      	mov	r1, r3
+ 8001576:	4812      	ldr	r0, [pc, #72]	; (80015c0 <MX_RTC_Init+0x144>)
+ 8001578:	f008 fe66 	bl	800a248 <HAL_RTC_SetAlarm>
+ 800157c:	4603      	mov	r3, r0
+ 800157e:	2b00      	cmp	r3, #0
+ 8001580:	d001      	beq.n	8001586 <MX_RTC_Init+0x10a>
+  {
+    Error_Handler();
+ 8001582:	f000 fea1 	bl	80022c8 <Error_Handler>
+  }
+  /** Enable the Alarm B
+  */
+  sAlarm.Alarm = RTC_ALARM_B;
+ 8001586:	f44f 7300 	mov.w	r3, #512	; 0x200
+ 800158a:	62bb      	str	r3, [r7, #40]	; 0x28
+  if (HAL_RTC_SetAlarm(&hrtc, &sAlarm, RTC_FORMAT_BCD) != HAL_OK)
+ 800158c:	463b      	mov	r3, r7
+ 800158e:	2201      	movs	r2, #1
+ 8001590:	4619      	mov	r1, r3
+ 8001592:	480b      	ldr	r0, [pc, #44]	; (80015c0 <MX_RTC_Init+0x144>)
+ 8001594:	f008 fe58 	bl	800a248 <HAL_RTC_SetAlarm>
+ 8001598:	4603      	mov	r3, r0
+ 800159a:	2b00      	cmp	r3, #0
+ 800159c:	d001      	beq.n	80015a2 <MX_RTC_Init+0x126>
+  {
+    Error_Handler();
+ 800159e:	f000 fe93 	bl	80022c8 <Error_Handler>
+  }
+  /** Enable the TimeStamp
+  */
+  if (HAL_RTCEx_SetTimeStamp(&hrtc, RTC_TIMESTAMPEDGE_RISING, RTC_TIMESTAMPPIN_POS1) != HAL_OK)
+ 80015a2:	2202      	movs	r2, #2
+ 80015a4:	2100      	movs	r1, #0
+ 80015a6:	4806      	ldr	r0, [pc, #24]	; (80015c0 <MX_RTC_Init+0x144>)
+ 80015a8:	f008 ffd8 	bl	800a55c <HAL_RTCEx_SetTimeStamp>
+ 80015ac:	4603      	mov	r3, r0
+ 80015ae:	2b00      	cmp	r3, #0
+ 80015b0:	d001      	beq.n	80015b6 <MX_RTC_Init+0x13a>
+  {
+    Error_Handler();
+ 80015b2:	f000 fe89 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN RTC_Init 2 */
+
+  /* USER CODE END RTC_Init 2 */
+
+}
+ 80015b6:	bf00      	nop
+ 80015b8:	3748      	adds	r7, #72	; 0x48
+ 80015ba:	46bd      	mov	sp, r7
+ 80015bc:	bd80      	pop	{r7, pc}
+ 80015be:	bf00      	nop
+ 80015c0:	20008cac 	.word	0x20008cac
+ 80015c4:	40002800 	.word	0x40002800
+
+080015c8 <MX_SPI2_Init>:
+  * @brief SPI2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_SPI2_Init(void)
+{
+ 80015c8:	b580      	push	{r7, lr}
+ 80015ca:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN SPI2_Init 1 */
+
+  /* USER CODE END SPI2_Init 1 */
+  /* SPI2 parameter configuration*/
+  hspi2.Instance = SPI2;
+ 80015cc:	4b1b      	ldr	r3, [pc, #108]	; (800163c <MX_SPI2_Init+0x74>)
+ 80015ce:	4a1c      	ldr	r2, [pc, #112]	; (8001640 <MX_SPI2_Init+0x78>)
+ 80015d0:	601a      	str	r2, [r3, #0]
+  hspi2.Init.Mode = SPI_MODE_MASTER;
+ 80015d2:	4b1a      	ldr	r3, [pc, #104]	; (800163c <MX_SPI2_Init+0x74>)
+ 80015d4:	f44f 7282 	mov.w	r2, #260	; 0x104
+ 80015d8:	605a      	str	r2, [r3, #4]
+  hspi2.Init.Direction = SPI_DIRECTION_2LINES;
+ 80015da:	4b18      	ldr	r3, [pc, #96]	; (800163c <MX_SPI2_Init+0x74>)
+ 80015dc:	2200      	movs	r2, #0
+ 80015de:	609a      	str	r2, [r3, #8]
+  hspi2.Init.DataSize = SPI_DATASIZE_4BIT;
+ 80015e0:	4b16      	ldr	r3, [pc, #88]	; (800163c <MX_SPI2_Init+0x74>)
+ 80015e2:	f44f 7240 	mov.w	r2, #768	; 0x300
+ 80015e6:	60da      	str	r2, [r3, #12]
+  hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
+ 80015e8:	4b14      	ldr	r3, [pc, #80]	; (800163c <MX_SPI2_Init+0x74>)
+ 80015ea:	2200      	movs	r2, #0
+ 80015ec:	611a      	str	r2, [r3, #16]
+  hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
+ 80015ee:	4b13      	ldr	r3, [pc, #76]	; (800163c <MX_SPI2_Init+0x74>)
+ 80015f0:	2200      	movs	r2, #0
+ 80015f2:	615a      	str	r2, [r3, #20]
+  hspi2.Init.NSS = SPI_NSS_HARD_OUTPUT;
+ 80015f4:	4b11      	ldr	r3, [pc, #68]	; (800163c <MX_SPI2_Init+0x74>)
+ 80015f6:	f44f 2280 	mov.w	r2, #262144	; 0x40000
+ 80015fa:	619a      	str	r2, [r3, #24]
+  hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
+ 80015fc:	4b0f      	ldr	r3, [pc, #60]	; (800163c <MX_SPI2_Init+0x74>)
+ 80015fe:	2200      	movs	r2, #0
+ 8001600:	61da      	str	r2, [r3, #28]
+  hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
+ 8001602:	4b0e      	ldr	r3, [pc, #56]	; (800163c <MX_SPI2_Init+0x74>)
+ 8001604:	2200      	movs	r2, #0
+ 8001606:	621a      	str	r2, [r3, #32]
+  hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
+ 8001608:	4b0c      	ldr	r3, [pc, #48]	; (800163c <MX_SPI2_Init+0x74>)
+ 800160a:	2200      	movs	r2, #0
+ 800160c:	625a      	str	r2, [r3, #36]	; 0x24
+  hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+ 800160e:	4b0b      	ldr	r3, [pc, #44]	; (800163c <MX_SPI2_Init+0x74>)
+ 8001610:	2200      	movs	r2, #0
+ 8001612:	629a      	str	r2, [r3, #40]	; 0x28
+  hspi2.Init.CRCPolynomial = 7;
+ 8001614:	4b09      	ldr	r3, [pc, #36]	; (800163c <MX_SPI2_Init+0x74>)
+ 8001616:	2207      	movs	r2, #7
+ 8001618:	62da      	str	r2, [r3, #44]	; 0x2c
+  hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
+ 800161a:	4b08      	ldr	r3, [pc, #32]	; (800163c <MX_SPI2_Init+0x74>)
+ 800161c:	2200      	movs	r2, #0
+ 800161e:	631a      	str	r2, [r3, #48]	; 0x30
+  hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
+ 8001620:	4b06      	ldr	r3, [pc, #24]	; (800163c <MX_SPI2_Init+0x74>)
+ 8001622:	2208      	movs	r2, #8
+ 8001624:	635a      	str	r2, [r3, #52]	; 0x34
+  if (HAL_SPI_Init(&hspi2) != HAL_OK)
+ 8001626:	4805      	ldr	r0, [pc, #20]	; (800163c <MX_SPI2_Init+0x74>)
+ 8001628:	f009 f86d 	bl	800a706 <HAL_SPI_Init>
+ 800162c:	4603      	mov	r3, r0
+ 800162e:	2b00      	cmp	r3, #0
+ 8001630:	d001      	beq.n	8001636 <MX_SPI2_Init+0x6e>
+  {
+    Error_Handler();
+ 8001632:	f000 fe49 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN SPI2_Init 2 */
+
+  /* USER CODE END SPI2_Init 2 */
+
+}
+ 8001636:	bf00      	nop
+ 8001638:	bd80      	pop	{r7, pc}
+ 800163a:	bf00      	nop
+ 800163c:	200088b4 	.word	0x200088b4
+ 8001640:	40003800 	.word	0x40003800
+
+08001644 <MX_TIM1_Init>:
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+ 8001644:	b580      	push	{r7, lr}
+ 8001646:	b088      	sub	sp, #32
+ 8001648:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ 800164a:	f107 0310 	add.w	r3, r7, #16
+ 800164e:	2200      	movs	r2, #0
+ 8001650:	601a      	str	r2, [r3, #0]
+ 8001652:	605a      	str	r2, [r3, #4]
+ 8001654:	609a      	str	r2, [r3, #8]
+ 8001656:	60da      	str	r2, [r3, #12]
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 8001658:	1d3b      	adds	r3, r7, #4
+ 800165a:	2200      	movs	r2, #0
+ 800165c:	601a      	str	r2, [r3, #0]
+ 800165e:	605a      	str	r2, [r3, #4]
+ 8001660:	609a      	str	r2, [r3, #8]
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+ 8001662:	4b20      	ldr	r3, [pc, #128]	; (80016e4 <MX_TIM1_Init+0xa0>)
+ 8001664:	4a20      	ldr	r2, [pc, #128]	; (80016e8 <MX_TIM1_Init+0xa4>)
+ 8001666:	601a      	str	r2, [r3, #0]
+  htim1.Init.Prescaler = 0;
+ 8001668:	4b1e      	ldr	r3, [pc, #120]	; (80016e4 <MX_TIM1_Init+0xa0>)
+ 800166a:	2200      	movs	r2, #0
+ 800166c:	605a      	str	r2, [r3, #4]
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 800166e:	4b1d      	ldr	r3, [pc, #116]	; (80016e4 <MX_TIM1_Init+0xa0>)
+ 8001670:	2200      	movs	r2, #0
+ 8001672:	609a      	str	r2, [r3, #8]
+  htim1.Init.Period = 65535;
+ 8001674:	4b1b      	ldr	r3, [pc, #108]	; (80016e4 <MX_TIM1_Init+0xa0>)
+ 8001676:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 800167a:	60da      	str	r2, [r3, #12]
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 800167c:	4b19      	ldr	r3, [pc, #100]	; (80016e4 <MX_TIM1_Init+0xa0>)
+ 800167e:	2200      	movs	r2, #0
+ 8001680:	611a      	str	r2, [r3, #16]
+  htim1.Init.RepetitionCounter = 0;
+ 8001682:	4b18      	ldr	r3, [pc, #96]	; (80016e4 <MX_TIM1_Init+0xa0>)
+ 8001684:	2200      	movs	r2, #0
+ 8001686:	615a      	str	r2, [r3, #20]
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 8001688:	4b16      	ldr	r3, [pc, #88]	; (80016e4 <MX_TIM1_Init+0xa0>)
+ 800168a:	2200      	movs	r2, #0
+ 800168c:	619a      	str	r2, [r3, #24]
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+ 800168e:	4815      	ldr	r0, [pc, #84]	; (80016e4 <MX_TIM1_Init+0xa0>)
+ 8001690:	f009 f8cb 	bl	800a82a <HAL_TIM_Base_Init>
+ 8001694:	4603      	mov	r3, r0
+ 8001696:	2b00      	cmp	r3, #0
+ 8001698:	d001      	beq.n	800169e <MX_TIM1_Init+0x5a>
+  {
+    Error_Handler();
+ 800169a:	f000 fe15 	bl	80022c8 <Error_Handler>
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ 800169e:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 80016a2:	613b      	str	r3, [r7, #16]
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+ 80016a4:	f107 0310 	add.w	r3, r7, #16
+ 80016a8:	4619      	mov	r1, r3
+ 80016aa:	480e      	ldr	r0, [pc, #56]	; (80016e4 <MX_TIM1_Init+0xa0>)
+ 80016ac:	f009 fb7e 	bl	800adac <HAL_TIM_ConfigClockSource>
+ 80016b0:	4603      	mov	r3, r0
+ 80016b2:	2b00      	cmp	r3, #0
+ 80016b4:	d001      	beq.n	80016ba <MX_TIM1_Init+0x76>
+  {
+    Error_Handler();
+ 80016b6:	f000 fe07 	bl	80022c8 <Error_Handler>
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ 80016ba:	2300      	movs	r3, #0
+ 80016bc:	607b      	str	r3, [r7, #4]
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+ 80016be:	2300      	movs	r3, #0
+ 80016c0:	60bb      	str	r3, [r7, #8]
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 80016c2:	2300      	movs	r3, #0
+ 80016c4:	60fb      	str	r3, [r7, #12]
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+ 80016c6:	1d3b      	adds	r3, r7, #4
+ 80016c8:	4619      	mov	r1, r3
+ 80016ca:	4806      	ldr	r0, [pc, #24]	; (80016e4 <MX_TIM1_Init+0xa0>)
+ 80016cc:	f00a f8b2 	bl	800b834 <HAL_TIMEx_MasterConfigSynchronization>
+ 80016d0:	4603      	mov	r3, r0
+ 80016d2:	2b00      	cmp	r3, #0
+ 80016d4:	d001      	beq.n	80016da <MX_TIM1_Init+0x96>
+  {
+    Error_Handler();
+ 80016d6:	f000 fdf7 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+ 80016da:	bf00      	nop
+ 80016dc:	3720      	adds	r7, #32
+ 80016de:	46bd      	mov	sp, r7
+ 80016e0:	bd80      	pop	{r7, pc}
+ 80016e2:	bf00      	nop
+ 80016e4:	20008ccc 	.word	0x20008ccc
+ 80016e8:	40010000 	.word	0x40010000
+
+080016ec <MX_TIM2_Init>:
+  * @brief TIM2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM2_Init(void)
+{
+ 80016ec:	b580      	push	{r7, lr}
+ 80016ee:	b088      	sub	sp, #32
+ 80016f0:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN TIM2_Init 0 */
+
+  /* USER CODE END TIM2_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ 80016f2:	f107 0310 	add.w	r3, r7, #16
+ 80016f6:	2200      	movs	r2, #0
+ 80016f8:	601a      	str	r2, [r3, #0]
+ 80016fa:	605a      	str	r2, [r3, #4]
+ 80016fc:	609a      	str	r2, [r3, #8]
+ 80016fe:	60da      	str	r2, [r3, #12]
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 8001700:	1d3b      	adds	r3, r7, #4
+ 8001702:	2200      	movs	r2, #0
+ 8001704:	601a      	str	r2, [r3, #0]
+ 8001706:	605a      	str	r2, [r3, #4]
+ 8001708:	609a      	str	r2, [r3, #8]
+
+  /* USER CODE BEGIN TIM2_Init 1 */
+
+  /* USER CODE END TIM2_Init 1 */
+  htim2.Instance = TIM2;
+ 800170a:	4b1e      	ldr	r3, [pc, #120]	; (8001784 <MX_TIM2_Init+0x98>)
+ 800170c:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
+ 8001710:	601a      	str	r2, [r3, #0]
+  htim2.Init.Prescaler = 0;
+ 8001712:	4b1c      	ldr	r3, [pc, #112]	; (8001784 <MX_TIM2_Init+0x98>)
+ 8001714:	2200      	movs	r2, #0
+ 8001716:	605a      	str	r2, [r3, #4]
+  htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 8001718:	4b1a      	ldr	r3, [pc, #104]	; (8001784 <MX_TIM2_Init+0x98>)
+ 800171a:	2200      	movs	r2, #0
+ 800171c:	609a      	str	r2, [r3, #8]
+  htim2.Init.Period = 4294967295;
+ 800171e:	4b19      	ldr	r3, [pc, #100]	; (8001784 <MX_TIM2_Init+0x98>)
+ 8001720:	f04f 32ff 	mov.w	r2, #4294967295
+ 8001724:	60da      	str	r2, [r3, #12]
+  htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 8001726:	4b17      	ldr	r3, [pc, #92]	; (8001784 <MX_TIM2_Init+0x98>)
+ 8001728:	2200      	movs	r2, #0
+ 800172a:	611a      	str	r2, [r3, #16]
+  htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 800172c:	4b15      	ldr	r3, [pc, #84]	; (8001784 <MX_TIM2_Init+0x98>)
+ 800172e:	2200      	movs	r2, #0
+ 8001730:	619a      	str	r2, [r3, #24]
+  if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
+ 8001732:	4814      	ldr	r0, [pc, #80]	; (8001784 <MX_TIM2_Init+0x98>)
+ 8001734:	f009 f879 	bl	800a82a <HAL_TIM_Base_Init>
+ 8001738:	4603      	mov	r3, r0
+ 800173a:	2b00      	cmp	r3, #0
+ 800173c:	d001      	beq.n	8001742 <MX_TIM2_Init+0x56>
+  {
+    Error_Handler();
+ 800173e:	f000 fdc3 	bl	80022c8 <Error_Handler>
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ 8001742:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 8001746:	613b      	str	r3, [r7, #16]
+  if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
+ 8001748:	f107 0310 	add.w	r3, r7, #16
+ 800174c:	4619      	mov	r1, r3
+ 800174e:	480d      	ldr	r0, [pc, #52]	; (8001784 <MX_TIM2_Init+0x98>)
+ 8001750:	f009 fb2c 	bl	800adac <HAL_TIM_ConfigClockSource>
+ 8001754:	4603      	mov	r3, r0
+ 8001756:	2b00      	cmp	r3, #0
+ 8001758:	d001      	beq.n	800175e <MX_TIM2_Init+0x72>
+  {
+    Error_Handler();
+ 800175a:	f000 fdb5 	bl	80022c8 <Error_Handler>
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ 800175e:	2300      	movs	r3, #0
+ 8001760:	607b      	str	r3, [r7, #4]
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 8001762:	2300      	movs	r3, #0
+ 8001764:	60fb      	str	r3, [r7, #12]
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
+ 8001766:	1d3b      	adds	r3, r7, #4
+ 8001768:	4619      	mov	r1, r3
+ 800176a:	4806      	ldr	r0, [pc, #24]	; (8001784 <MX_TIM2_Init+0x98>)
+ 800176c:	f00a f862 	bl	800b834 <HAL_TIMEx_MasterConfigSynchronization>
+ 8001770:	4603      	mov	r3, r0
+ 8001772:	2b00      	cmp	r3, #0
+ 8001774:	d001      	beq.n	800177a <MX_TIM2_Init+0x8e>
+  {
+    Error_Handler();
+ 8001776:	f000 fda7 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN TIM2_Init 2 */
+
+  /* USER CODE END TIM2_Init 2 */
+
+}
+ 800177a:	bf00      	nop
+ 800177c:	3720      	adds	r7, #32
+ 800177e:	46bd      	mov	sp, r7
+ 8001780:	bd80      	pop	{r7, pc}
+ 8001782:	bf00      	nop
+ 8001784:	20008de0 	.word	0x20008de0
+
+08001788 <MX_TIM3_Init>:
+  * @brief TIM3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM3_Init(void)
+{
+ 8001788:	b580      	push	{r7, lr}
+ 800178a:	b094      	sub	sp, #80	; 0x50
+ 800178c:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN TIM3_Init 0 */
+
+  /* USER CODE END TIM3_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ 800178e:	f107 0340 	add.w	r3, r7, #64	; 0x40
+ 8001792:	2200      	movs	r2, #0
+ 8001794:	601a      	str	r2, [r3, #0]
+ 8001796:	605a      	str	r2, [r3, #4]
+ 8001798:	609a      	str	r2, [r3, #8]
+ 800179a:	60da      	str	r2, [r3, #12]
+  TIM_SlaveConfigTypeDef sSlaveConfig = {0};
+ 800179c:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 80017a0:	2200      	movs	r2, #0
+ 80017a2:	601a      	str	r2, [r3, #0]
+ 80017a4:	605a      	str	r2, [r3, #4]
+ 80017a6:	609a      	str	r2, [r3, #8]
+ 80017a8:	60da      	str	r2, [r3, #12]
+ 80017aa:	611a      	str	r2, [r3, #16]
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 80017ac:	f107 0320 	add.w	r3, r7, #32
+ 80017b0:	2200      	movs	r2, #0
+ 80017b2:	601a      	str	r2, [r3, #0]
+ 80017b4:	605a      	str	r2, [r3, #4]
+ 80017b6:	609a      	str	r2, [r3, #8]
+  TIM_OC_InitTypeDef sConfigOC = {0};
+ 80017b8:	1d3b      	adds	r3, r7, #4
+ 80017ba:	2200      	movs	r2, #0
+ 80017bc:	601a      	str	r2, [r3, #0]
+ 80017be:	605a      	str	r2, [r3, #4]
+ 80017c0:	609a      	str	r2, [r3, #8]
+ 80017c2:	60da      	str	r2, [r3, #12]
+ 80017c4:	611a      	str	r2, [r3, #16]
+ 80017c6:	615a      	str	r2, [r3, #20]
+ 80017c8:	619a      	str	r2, [r3, #24]
+
+  /* USER CODE BEGIN TIM3_Init 1 */
+
+  /* USER CODE END TIM3_Init 1 */
+  htim3.Instance = TIM3;
+ 80017ca:	4b34      	ldr	r3, [pc, #208]	; (800189c <MX_TIM3_Init+0x114>)
+ 80017cc:	4a34      	ldr	r2, [pc, #208]	; (80018a0 <MX_TIM3_Init+0x118>)
+ 80017ce:	601a      	str	r2, [r3, #0]
+  htim3.Init.Prescaler = 0;
+ 80017d0:	4b32      	ldr	r3, [pc, #200]	; (800189c <MX_TIM3_Init+0x114>)
+ 80017d2:	2200      	movs	r2, #0
+ 80017d4:	605a      	str	r2, [r3, #4]
+  htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 80017d6:	4b31      	ldr	r3, [pc, #196]	; (800189c <MX_TIM3_Init+0x114>)
+ 80017d8:	2200      	movs	r2, #0
+ 80017da:	609a      	str	r2, [r3, #8]
+  htim3.Init.Period = 65535;
+ 80017dc:	4b2f      	ldr	r3, [pc, #188]	; (800189c <MX_TIM3_Init+0x114>)
+ 80017de:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 80017e2:	60da      	str	r2, [r3, #12]
+  htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 80017e4:	4b2d      	ldr	r3, [pc, #180]	; (800189c <MX_TIM3_Init+0x114>)
+ 80017e6:	2200      	movs	r2, #0
+ 80017e8:	611a      	str	r2, [r3, #16]
+  htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 80017ea:	4b2c      	ldr	r3, [pc, #176]	; (800189c <MX_TIM3_Init+0x114>)
+ 80017ec:	2200      	movs	r2, #0
+ 80017ee:	619a      	str	r2, [r3, #24]
+  if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
+ 80017f0:	482a      	ldr	r0, [pc, #168]	; (800189c <MX_TIM3_Init+0x114>)
+ 80017f2:	f009 f81a 	bl	800a82a <HAL_TIM_Base_Init>
+ 80017f6:	4603      	mov	r3, r0
+ 80017f8:	2b00      	cmp	r3, #0
+ 80017fa:	d001      	beq.n	8001800 <MX_TIM3_Init+0x78>
+  {
+    Error_Handler();
+ 80017fc:	f000 fd64 	bl	80022c8 <Error_Handler>
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ 8001800:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 8001804:	643b      	str	r3, [r7, #64]	; 0x40
+  if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
+ 8001806:	f107 0340 	add.w	r3, r7, #64	; 0x40
+ 800180a:	4619      	mov	r1, r3
+ 800180c:	4823      	ldr	r0, [pc, #140]	; (800189c <MX_TIM3_Init+0x114>)
+ 800180e:	f009 facd 	bl	800adac <HAL_TIM_ConfigClockSource>
+ 8001812:	4603      	mov	r3, r0
+ 8001814:	2b00      	cmp	r3, #0
+ 8001816:	d001      	beq.n	800181c <MX_TIM3_Init+0x94>
+  {
+    Error_Handler();
+ 8001818:	f000 fd56 	bl	80022c8 <Error_Handler>
+  }
+  if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
+ 800181c:	481f      	ldr	r0, [pc, #124]	; (800189c <MX_TIM3_Init+0x114>)
+ 800181e:	f009 f859 	bl	800a8d4 <HAL_TIM_PWM_Init>
+ 8001822:	4603      	mov	r3, r0
+ 8001824:	2b00      	cmp	r3, #0
+ 8001826:	d001      	beq.n	800182c <MX_TIM3_Init+0xa4>
+  {
+    Error_Handler();
+ 8001828:	f000 fd4e 	bl	80022c8 <Error_Handler>
+  }
+  sSlaveConfig.SlaveMode = TIM_SLAVEMODE_DISABLE;
+ 800182c:	2300      	movs	r3, #0
+ 800182e:	62fb      	str	r3, [r7, #44]	; 0x2c
+  sSlaveConfig.InputTrigger = TIM_TS_ITR0;
+ 8001830:	2300      	movs	r3, #0
+ 8001832:	633b      	str	r3, [r7, #48]	; 0x30
+  if (HAL_TIM_SlaveConfigSynchro(&htim3, &sSlaveConfig) != HAL_OK)
+ 8001834:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001838:	4619      	mov	r1, r3
+ 800183a:	4818      	ldr	r0, [pc, #96]	; (800189c <MX_TIM3_Init+0x114>)
+ 800183c:	f009 fb70 	bl	800af20 <HAL_TIM_SlaveConfigSynchro>
+ 8001840:	4603      	mov	r3, r0
+ 8001842:	2b00      	cmp	r3, #0
+ 8001844:	d001      	beq.n	800184a <MX_TIM3_Init+0xc2>
+  {
+    Error_Handler();
+ 8001846:	f000 fd3f 	bl	80022c8 <Error_Handler>
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ 800184a:	2300      	movs	r3, #0
+ 800184c:	623b      	str	r3, [r7, #32]
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 800184e:	2300      	movs	r3, #0
+ 8001850:	62bb      	str	r3, [r7, #40]	; 0x28
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
+ 8001852:	f107 0320 	add.w	r3, r7, #32
+ 8001856:	4619      	mov	r1, r3
+ 8001858:	4810      	ldr	r0, [pc, #64]	; (800189c <MX_TIM3_Init+0x114>)
+ 800185a:	f009 ffeb 	bl	800b834 <HAL_TIMEx_MasterConfigSynchronization>
+ 800185e:	4603      	mov	r3, r0
+ 8001860:	2b00      	cmp	r3, #0
+ 8001862:	d001      	beq.n	8001868 <MX_TIM3_Init+0xe0>
+  {
+    Error_Handler();
+ 8001864:	f000 fd30 	bl	80022c8 <Error_Handler>
+  }
+  sConfigOC.OCMode = TIM_OCMODE_PWM1;
+ 8001868:	2360      	movs	r3, #96	; 0x60
+ 800186a:	607b      	str	r3, [r7, #4]
+  sConfigOC.Pulse = 0;
+ 800186c:	2300      	movs	r3, #0
+ 800186e:	60bb      	str	r3, [r7, #8]
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 8001870:	2300      	movs	r3, #0
+ 8001872:	60fb      	str	r3, [r7, #12]
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 8001874:	2300      	movs	r3, #0
+ 8001876:	617b      	str	r3, [r7, #20]
+  if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+ 8001878:	1d3b      	adds	r3, r7, #4
+ 800187a:	2200      	movs	r2, #0
+ 800187c:	4619      	mov	r1, r3
+ 800187e:	4807      	ldr	r0, [pc, #28]	; (800189c <MX_TIM3_Init+0x114>)
+ 8001880:	f009 f97c 	bl	800ab7c <HAL_TIM_PWM_ConfigChannel>
+ 8001884:	4603      	mov	r3, r0
+ 8001886:	2b00      	cmp	r3, #0
+ 8001888:	d001      	beq.n	800188e <MX_TIM3_Init+0x106>
+  {
+    Error_Handler();
+ 800188a:	f000 fd1d 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN TIM3_Init 2 */
+
+  /* USER CODE END TIM3_Init 2 */
+  HAL_TIM_MspPostInit(&htim3);
+ 800188e:	4803      	ldr	r0, [pc, #12]	; (800189c <MX_TIM3_Init+0x114>)
+ 8001890:	f002 fe06 	bl	80044a0 <HAL_TIM_MspPostInit>
+
+}
+ 8001894:	bf00      	nop
+ 8001896:	3750      	adds	r7, #80	; 0x50
+ 8001898:	46bd      	mov	sp, r7
+ 800189a:	bd80      	pop	{r7, pc}
+ 800189c:	20008a90 	.word	0x20008a90
+ 80018a0:	40000400 	.word	0x40000400
+
+080018a4 <MX_TIM5_Init>:
+  * @brief TIM5 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM5_Init(void)
+{
+ 80018a4:	b580      	push	{r7, lr}
+ 80018a6:	b088      	sub	sp, #32
+ 80018a8:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN TIM5_Init 0 */
+
+  /* USER CODE END TIM5_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ 80018aa:	f107 0310 	add.w	r3, r7, #16
+ 80018ae:	2200      	movs	r2, #0
+ 80018b0:	601a      	str	r2, [r3, #0]
+ 80018b2:	605a      	str	r2, [r3, #4]
+ 80018b4:	609a      	str	r2, [r3, #8]
+ 80018b6:	60da      	str	r2, [r3, #12]
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 80018b8:	1d3b      	adds	r3, r7, #4
+ 80018ba:	2200      	movs	r2, #0
+ 80018bc:	601a      	str	r2, [r3, #0]
+ 80018be:	605a      	str	r2, [r3, #4]
+ 80018c0:	609a      	str	r2, [r3, #8]
+
+  /* USER CODE BEGIN TIM5_Init 1 */
+
+  /* USER CODE END TIM5_Init 1 */
+  htim5.Instance = TIM5;
+ 80018c2:	4b1d      	ldr	r3, [pc, #116]	; (8001938 <MX_TIM5_Init+0x94>)
+ 80018c4:	4a1d      	ldr	r2, [pc, #116]	; (800193c <MX_TIM5_Init+0x98>)
+ 80018c6:	601a      	str	r2, [r3, #0]
+  htim5.Init.Prescaler = 0;
+ 80018c8:	4b1b      	ldr	r3, [pc, #108]	; (8001938 <MX_TIM5_Init+0x94>)
+ 80018ca:	2200      	movs	r2, #0
+ 80018cc:	605a      	str	r2, [r3, #4]
+  htim5.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 80018ce:	4b1a      	ldr	r3, [pc, #104]	; (8001938 <MX_TIM5_Init+0x94>)
+ 80018d0:	2200      	movs	r2, #0
+ 80018d2:	609a      	str	r2, [r3, #8]
+  htim5.Init.Period = 4294967295;
+ 80018d4:	4b18      	ldr	r3, [pc, #96]	; (8001938 <MX_TIM5_Init+0x94>)
+ 80018d6:	f04f 32ff 	mov.w	r2, #4294967295
+ 80018da:	60da      	str	r2, [r3, #12]
+  htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 80018dc:	4b16      	ldr	r3, [pc, #88]	; (8001938 <MX_TIM5_Init+0x94>)
+ 80018de:	2200      	movs	r2, #0
+ 80018e0:	611a      	str	r2, [r3, #16]
+  htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 80018e2:	4b15      	ldr	r3, [pc, #84]	; (8001938 <MX_TIM5_Init+0x94>)
+ 80018e4:	2200      	movs	r2, #0
+ 80018e6:	619a      	str	r2, [r3, #24]
+  if (HAL_TIM_Base_Init(&htim5) != HAL_OK)
+ 80018e8:	4813      	ldr	r0, [pc, #76]	; (8001938 <MX_TIM5_Init+0x94>)
+ 80018ea:	f008 ff9e 	bl	800a82a <HAL_TIM_Base_Init>
+ 80018ee:	4603      	mov	r3, r0
+ 80018f0:	2b00      	cmp	r3, #0
+ 80018f2:	d001      	beq.n	80018f8 <MX_TIM5_Init+0x54>
+  {
+    Error_Handler();
+ 80018f4:	f000 fce8 	bl	80022c8 <Error_Handler>
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ 80018f8:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 80018fc:	613b      	str	r3, [r7, #16]
+  if (HAL_TIM_ConfigClockSource(&htim5, &sClockSourceConfig) != HAL_OK)
+ 80018fe:	f107 0310 	add.w	r3, r7, #16
+ 8001902:	4619      	mov	r1, r3
+ 8001904:	480c      	ldr	r0, [pc, #48]	; (8001938 <MX_TIM5_Init+0x94>)
+ 8001906:	f009 fa51 	bl	800adac <HAL_TIM_ConfigClockSource>
+ 800190a:	4603      	mov	r3, r0
+ 800190c:	2b00      	cmp	r3, #0
+ 800190e:	d001      	beq.n	8001914 <MX_TIM5_Init+0x70>
+  {
+    Error_Handler();
+ 8001910:	f000 fcda 	bl	80022c8 <Error_Handler>
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ 8001914:	2300      	movs	r3, #0
+ 8001916:	607b      	str	r3, [r7, #4]
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 8001918:	2300      	movs	r3, #0
+ 800191a:	60fb      	str	r3, [r7, #12]
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) != HAL_OK)
+ 800191c:	1d3b      	adds	r3, r7, #4
+ 800191e:	4619      	mov	r1, r3
+ 8001920:	4805      	ldr	r0, [pc, #20]	; (8001938 <MX_TIM5_Init+0x94>)
+ 8001922:	f009 ff87 	bl	800b834 <HAL_TIMEx_MasterConfigSynchronization>
+ 8001926:	4603      	mov	r3, r0
+ 8001928:	2b00      	cmp	r3, #0
+ 800192a:	d001      	beq.n	8001930 <MX_TIM5_Init+0x8c>
+  {
+    Error_Handler();
+ 800192c:	f000 fccc 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN TIM5_Init 2 */
+
+  /* USER CODE END TIM5_Init 2 */
+
+}
+ 8001930:	bf00      	nop
+ 8001932:	3720      	adds	r7, #32
+ 8001934:	46bd      	mov	sp, r7
+ 8001936:	bd80      	pop	{r7, pc}
+ 8001938:	20008a50 	.word	0x20008a50
+ 800193c:	40000c00 	.word	0x40000c00
+
+08001940 <MX_TIM8_Init>:
+  * @brief TIM8 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM8_Init(void)
+{
+ 8001940:	b580      	push	{r7, lr}
+ 8001942:	b09a      	sub	sp, #104	; 0x68
+ 8001944:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN TIM8_Init 0 */
+
+  /* USER CODE END TIM8_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ 8001946:	f107 0358 	add.w	r3, r7, #88	; 0x58
+ 800194a:	2200      	movs	r2, #0
+ 800194c:	601a      	str	r2, [r3, #0]
+ 800194e:	605a      	str	r2, [r3, #4]
+ 8001950:	609a      	str	r2, [r3, #8]
+ 8001952:	60da      	str	r2, [r3, #12]
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 8001954:	f107 034c 	add.w	r3, r7, #76	; 0x4c
+ 8001958:	2200      	movs	r2, #0
+ 800195a:	601a      	str	r2, [r3, #0]
+ 800195c:	605a      	str	r2, [r3, #4]
+ 800195e:	609a      	str	r2, [r3, #8]
+  TIM_OC_InitTypeDef sConfigOC = {0};
+ 8001960:	f107 0330 	add.w	r3, r7, #48	; 0x30
+ 8001964:	2200      	movs	r2, #0
+ 8001966:	601a      	str	r2, [r3, #0]
+ 8001968:	605a      	str	r2, [r3, #4]
+ 800196a:	609a      	str	r2, [r3, #8]
+ 800196c:	60da      	str	r2, [r3, #12]
+ 800196e:	611a      	str	r2, [r3, #16]
+ 8001970:	615a      	str	r2, [r3, #20]
+ 8001972:	619a      	str	r2, [r3, #24]
+  TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+ 8001974:	1d3b      	adds	r3, r7, #4
+ 8001976:	222c      	movs	r2, #44	; 0x2c
+ 8001978:	2100      	movs	r1, #0
+ 800197a:	4618      	mov	r0, r3
+ 800197c:	f01a fd33 	bl	801c3e6 <memset>
+
+  /* USER CODE BEGIN TIM8_Init 1 */
+
+  /* USER CODE END TIM8_Init 1 */
+  htim8.Instance = TIM8;
+ 8001980:	4b42      	ldr	r3, [pc, #264]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 8001982:	4a43      	ldr	r2, [pc, #268]	; (8001a90 <MX_TIM8_Init+0x150>)
+ 8001984:	601a      	str	r2, [r3, #0]
+  htim8.Init.Prescaler = 0;
+ 8001986:	4b41      	ldr	r3, [pc, #260]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 8001988:	2200      	movs	r2, #0
+ 800198a:	605a      	str	r2, [r3, #4]
+  htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 800198c:	4b3f      	ldr	r3, [pc, #252]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 800198e:	2200      	movs	r2, #0
+ 8001990:	609a      	str	r2, [r3, #8]
+  htim8.Init.Period = 65535;
+ 8001992:	4b3e      	ldr	r3, [pc, #248]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 8001994:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8001998:	60da      	str	r2, [r3, #12]
+  htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 800199a:	4b3c      	ldr	r3, [pc, #240]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 800199c:	2200      	movs	r2, #0
+ 800199e:	611a      	str	r2, [r3, #16]
+  htim8.Init.RepetitionCounter = 0;
+ 80019a0:	4b3a      	ldr	r3, [pc, #232]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 80019a2:	2200      	movs	r2, #0
+ 80019a4:	615a      	str	r2, [r3, #20]
+  htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 80019a6:	4b39      	ldr	r3, [pc, #228]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 80019a8:	2200      	movs	r2, #0
+ 80019aa:	619a      	str	r2, [r3, #24]
+  if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
+ 80019ac:	4837      	ldr	r0, [pc, #220]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 80019ae:	f008 ff3c 	bl	800a82a <HAL_TIM_Base_Init>
+ 80019b2:	4603      	mov	r3, r0
+ 80019b4:	2b00      	cmp	r3, #0
+ 80019b6:	d001      	beq.n	80019bc <MX_TIM8_Init+0x7c>
+  {
+    Error_Handler();
+ 80019b8:	f000 fc86 	bl	80022c8 <Error_Handler>
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ 80019bc:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 80019c0:	65bb      	str	r3, [r7, #88]	; 0x58
+  if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
+ 80019c2:	f107 0358 	add.w	r3, r7, #88	; 0x58
+ 80019c6:	4619      	mov	r1, r3
+ 80019c8:	4830      	ldr	r0, [pc, #192]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 80019ca:	f009 f9ef 	bl	800adac <HAL_TIM_ConfigClockSource>
+ 80019ce:	4603      	mov	r3, r0
+ 80019d0:	2b00      	cmp	r3, #0
+ 80019d2:	d001      	beq.n	80019d8 <MX_TIM8_Init+0x98>
+  {
+    Error_Handler();
+ 80019d4:	f000 fc78 	bl	80022c8 <Error_Handler>
+  }
+  if (HAL_TIM_PWM_Init(&htim8) != HAL_OK)
+ 80019d8:	482c      	ldr	r0, [pc, #176]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 80019da:	f008 ff7b 	bl	800a8d4 <HAL_TIM_PWM_Init>
+ 80019de:	4603      	mov	r3, r0
+ 80019e0:	2b00      	cmp	r3, #0
+ 80019e2:	d001      	beq.n	80019e8 <MX_TIM8_Init+0xa8>
+  {
+    Error_Handler();
+ 80019e4:	f000 fc70 	bl	80022c8 <Error_Handler>
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ 80019e8:	2300      	movs	r3, #0
+ 80019ea:	64fb      	str	r3, [r7, #76]	; 0x4c
+  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+ 80019ec:	2300      	movs	r3, #0
+ 80019ee:	653b      	str	r3, [r7, #80]	; 0x50
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 80019f0:	2300      	movs	r3, #0
+ 80019f2:	657b      	str	r3, [r7, #84]	; 0x54
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
+ 80019f4:	f107 034c 	add.w	r3, r7, #76	; 0x4c
+ 80019f8:	4619      	mov	r1, r3
+ 80019fa:	4824      	ldr	r0, [pc, #144]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 80019fc:	f009 ff1a 	bl	800b834 <HAL_TIMEx_MasterConfigSynchronization>
+ 8001a00:	4603      	mov	r3, r0
+ 8001a02:	2b00      	cmp	r3, #0
+ 8001a04:	d001      	beq.n	8001a0a <MX_TIM8_Init+0xca>
+  {
+    Error_Handler();
+ 8001a06:	f000 fc5f 	bl	80022c8 <Error_Handler>
+  }
+  sConfigOC.OCMode = TIM_OCMODE_PWM1;
+ 8001a0a:	2360      	movs	r3, #96	; 0x60
+ 8001a0c:	633b      	str	r3, [r7, #48]	; 0x30
+  sConfigOC.Pulse = 0;
+ 8001a0e:	2300      	movs	r3, #0
+ 8001a10:	637b      	str	r3, [r7, #52]	; 0x34
+  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 8001a12:	2300      	movs	r3, #0
+ 8001a14:	63bb      	str	r3, [r7, #56]	; 0x38
+  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 8001a16:	2300      	movs	r3, #0
+ 8001a18:	643b      	str	r3, [r7, #64]	; 0x40
+  sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
+ 8001a1a:	2300      	movs	r3, #0
+ 8001a1c:	647b      	str	r3, [r7, #68]	; 0x44
+  sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
+ 8001a1e:	2300      	movs	r3, #0
+ 8001a20:	64bb      	str	r3, [r7, #72]	; 0x48
+  if (HAL_TIM_PWM_ConfigChannel(&htim8, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
+ 8001a22:	f107 0330 	add.w	r3, r7, #48	; 0x30
+ 8001a26:	220c      	movs	r2, #12
+ 8001a28:	4619      	mov	r1, r3
+ 8001a2a:	4818      	ldr	r0, [pc, #96]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 8001a2c:	f009 f8a6 	bl	800ab7c <HAL_TIM_PWM_ConfigChannel>
+ 8001a30:	4603      	mov	r3, r0
+ 8001a32:	2b00      	cmp	r3, #0
+ 8001a34:	d001      	beq.n	8001a3a <MX_TIM8_Init+0xfa>
+  {
+    Error_Handler();
+ 8001a36:	f000 fc47 	bl	80022c8 <Error_Handler>
+  }
+  sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
+ 8001a3a:	2300      	movs	r3, #0
+ 8001a3c:	607b      	str	r3, [r7, #4]
+  sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+ 8001a3e:	2300      	movs	r3, #0
+ 8001a40:	60bb      	str	r3, [r7, #8]
+  sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+ 8001a42:	2300      	movs	r3, #0
+ 8001a44:	60fb      	str	r3, [r7, #12]
+  sBreakDeadTimeConfig.DeadTime = 0;
+ 8001a46:	2300      	movs	r3, #0
+ 8001a48:	613b      	str	r3, [r7, #16]
+  sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+ 8001a4a:	2300      	movs	r3, #0
+ 8001a4c:	617b      	str	r3, [r7, #20]
+  sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+ 8001a4e:	f44f 5300 	mov.w	r3, #8192	; 0x2000
+ 8001a52:	61bb      	str	r3, [r7, #24]
+  sBreakDeadTimeConfig.BreakFilter = 0;
+ 8001a54:	2300      	movs	r3, #0
+ 8001a56:	61fb      	str	r3, [r7, #28]
+  sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+ 8001a58:	2300      	movs	r3, #0
+ 8001a5a:	623b      	str	r3, [r7, #32]
+  sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+ 8001a5c:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
+ 8001a60:	627b      	str	r3, [r7, #36]	; 0x24
+  sBreakDeadTimeConfig.Break2Filter = 0;
+ 8001a62:	2300      	movs	r3, #0
+ 8001a64:	62bb      	str	r3, [r7, #40]	; 0x28
+  sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+ 8001a66:	2300      	movs	r3, #0
+ 8001a68:	62fb      	str	r3, [r7, #44]	; 0x2c
+  if (HAL_TIMEx_ConfigBreakDeadTime(&htim8, &sBreakDeadTimeConfig) != HAL_OK)
+ 8001a6a:	1d3b      	adds	r3, r7, #4
+ 8001a6c:	4619      	mov	r1, r3
+ 8001a6e:	4807      	ldr	r0, [pc, #28]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 8001a70:	f009 ff6e 	bl	800b950 <HAL_TIMEx_ConfigBreakDeadTime>
+ 8001a74:	4603      	mov	r3, r0
+ 8001a76:	2b00      	cmp	r3, #0
+ 8001a78:	d001      	beq.n	8001a7e <MX_TIM8_Init+0x13e>
+  {
+    Error_Handler();
+ 8001a7a:	f000 fc25 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN TIM8_Init 2 */
+
+  /* USER CODE END TIM8_Init 2 */
+  HAL_TIM_MspPostInit(&htim8);
+ 8001a7e:	4803      	ldr	r0, [pc, #12]	; (8001a8c <MX_TIM8_Init+0x14c>)
+ 8001a80:	f002 fd0e 	bl	80044a0 <HAL_TIM_MspPostInit>
+
+}
+ 8001a84:	bf00      	nop
+ 8001a86:	3768      	adds	r7, #104	; 0x68
+ 8001a88:	46bd      	mov	sp, r7
+ 8001a8a:	bd80      	pop	{r7, pc}
+ 8001a8c:	20008998 	.word	0x20008998
+ 8001a90:	40010400 	.word	0x40010400
+
+08001a94 <MX_UART7_Init>:
+  * @brief UART7 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_UART7_Init(void)
+{
+ 8001a94:	b580      	push	{r7, lr}
+ 8001a96:	af00      	add	r7, sp, #0
+  /* USER CODE END UART7_Init 0 */
+
+  /* USER CODE BEGIN UART7_Init 1 */
+
+  /* USER CODE END UART7_Init 1 */
+  huart7.Instance = UART7;
+ 8001a98:	4b14      	ldr	r3, [pc, #80]	; (8001aec <MX_UART7_Init+0x58>)
+ 8001a9a:	4a15      	ldr	r2, [pc, #84]	; (8001af0 <MX_UART7_Init+0x5c>)
+ 8001a9c:	601a      	str	r2, [r3, #0]
+  huart7.Init.BaudRate = 115200;
+ 8001a9e:	4b13      	ldr	r3, [pc, #76]	; (8001aec <MX_UART7_Init+0x58>)
+ 8001aa0:	f44f 32e1 	mov.w	r2, #115200	; 0x1c200
+ 8001aa4:	605a      	str	r2, [r3, #4]
+  huart7.Init.WordLength = UART_WORDLENGTH_8B;
+ 8001aa6:	4b11      	ldr	r3, [pc, #68]	; (8001aec <MX_UART7_Init+0x58>)
+ 8001aa8:	2200      	movs	r2, #0
+ 8001aaa:	609a      	str	r2, [r3, #8]
+  huart7.Init.StopBits = UART_STOPBITS_1;
+ 8001aac:	4b0f      	ldr	r3, [pc, #60]	; (8001aec <MX_UART7_Init+0x58>)
+ 8001aae:	2200      	movs	r2, #0
+ 8001ab0:	60da      	str	r2, [r3, #12]
+  huart7.Init.Parity = UART_PARITY_NONE;
+ 8001ab2:	4b0e      	ldr	r3, [pc, #56]	; (8001aec <MX_UART7_Init+0x58>)
+ 8001ab4:	2200      	movs	r2, #0
+ 8001ab6:	611a      	str	r2, [r3, #16]
+  huart7.Init.Mode = UART_MODE_TX_RX;
+ 8001ab8:	4b0c      	ldr	r3, [pc, #48]	; (8001aec <MX_UART7_Init+0x58>)
+ 8001aba:	220c      	movs	r2, #12
+ 8001abc:	615a      	str	r2, [r3, #20]
+  huart7.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ 8001abe:	4b0b      	ldr	r3, [pc, #44]	; (8001aec <MX_UART7_Init+0x58>)
+ 8001ac0:	2200      	movs	r2, #0
+ 8001ac2:	619a      	str	r2, [r3, #24]
+  huart7.Init.OverSampling = UART_OVERSAMPLING_16;
+ 8001ac4:	4b09      	ldr	r3, [pc, #36]	; (8001aec <MX_UART7_Init+0x58>)
+ 8001ac6:	2200      	movs	r2, #0
+ 8001ac8:	61da      	str	r2, [r3, #28]
+  huart7.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ 8001aca:	4b08      	ldr	r3, [pc, #32]	; (8001aec <MX_UART7_Init+0x58>)
+ 8001acc:	2200      	movs	r2, #0
+ 8001ace:	621a      	str	r2, [r3, #32]
+  huart7.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ 8001ad0:	4b06      	ldr	r3, [pc, #24]	; (8001aec <MX_UART7_Init+0x58>)
+ 8001ad2:	2200      	movs	r2, #0
+ 8001ad4:	625a      	str	r2, [r3, #36]	; 0x24
+  if (HAL_UART_Init(&huart7) != HAL_OK)
+ 8001ad6:	4805      	ldr	r0, [pc, #20]	; (8001aec <MX_UART7_Init+0x58>)
+ 8001ad8:	f009 ffd6 	bl	800ba88 <HAL_UART_Init>
+ 8001adc:	4603      	mov	r3, r0
+ 8001ade:	2b00      	cmp	r3, #0
+ 8001ae0:	d001      	beq.n	8001ae6 <MX_UART7_Init+0x52>
+  {
+    Error_Handler();
+ 8001ae2:	f000 fbf1 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN UART7_Init 2 */
+
+  /* USER CODE END UART7_Init 2 */
+
+}
+ 8001ae6:	bf00      	nop
+ 8001ae8:	bd80      	pop	{r7, pc}
+ 8001aea:	bf00      	nop
+ 8001aec:	20008918 	.word	0x20008918
+ 8001af0:	40007800 	.word	0x40007800
+
+08001af4 <MX_USART1_UART_Init>:
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+ 8001af4:	b580      	push	{r7, lr}
+ 8001af6:	af00      	add	r7, sp, #0
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+ 8001af8:	4b14      	ldr	r3, [pc, #80]	; (8001b4c <MX_USART1_UART_Init+0x58>)
+ 8001afa:	4a15      	ldr	r2, [pc, #84]	; (8001b50 <MX_USART1_UART_Init+0x5c>)
+ 8001afc:	601a      	str	r2, [r3, #0]
+  huart1.Init.BaudRate = 115200;
+ 8001afe:	4b13      	ldr	r3, [pc, #76]	; (8001b4c <MX_USART1_UART_Init+0x58>)
+ 8001b00:	f44f 32e1 	mov.w	r2, #115200	; 0x1c200
+ 8001b04:	605a      	str	r2, [r3, #4]
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+ 8001b06:	4b11      	ldr	r3, [pc, #68]	; (8001b4c <MX_USART1_UART_Init+0x58>)
+ 8001b08:	2200      	movs	r2, #0
+ 8001b0a:	609a      	str	r2, [r3, #8]
+  huart1.Init.StopBits = UART_STOPBITS_1;
+ 8001b0c:	4b0f      	ldr	r3, [pc, #60]	; (8001b4c <MX_USART1_UART_Init+0x58>)
+ 8001b0e:	2200      	movs	r2, #0
+ 8001b10:	60da      	str	r2, [r3, #12]
+  huart1.Init.Parity = UART_PARITY_NONE;
+ 8001b12:	4b0e      	ldr	r3, [pc, #56]	; (8001b4c <MX_USART1_UART_Init+0x58>)
+ 8001b14:	2200      	movs	r2, #0
+ 8001b16:	611a      	str	r2, [r3, #16]
+  huart1.Init.Mode = UART_MODE_TX_RX;
+ 8001b18:	4b0c      	ldr	r3, [pc, #48]	; (8001b4c <MX_USART1_UART_Init+0x58>)
+ 8001b1a:	220c      	movs	r2, #12
+ 8001b1c:	615a      	str	r2, [r3, #20]
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ 8001b1e:	4b0b      	ldr	r3, [pc, #44]	; (8001b4c <MX_USART1_UART_Init+0x58>)
+ 8001b20:	2200      	movs	r2, #0
+ 8001b22:	619a      	str	r2, [r3, #24]
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+ 8001b24:	4b09      	ldr	r3, [pc, #36]	; (8001b4c <MX_USART1_UART_Init+0x58>)
+ 8001b26:	2200      	movs	r2, #0
+ 8001b28:	61da      	str	r2, [r3, #28]
+  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ 8001b2a:	4b08      	ldr	r3, [pc, #32]	; (8001b4c <MX_USART1_UART_Init+0x58>)
+ 8001b2c:	2200      	movs	r2, #0
+ 8001b2e:	621a      	str	r2, [r3, #32]
+  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ 8001b30:	4b06      	ldr	r3, [pc, #24]	; (8001b4c <MX_USART1_UART_Init+0x58>)
+ 8001b32:	2200      	movs	r2, #0
+ 8001b34:	625a      	str	r2, [r3, #36]	; 0x24
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+ 8001b36:	4805      	ldr	r0, [pc, #20]	; (8001b4c <MX_USART1_UART_Init+0x58>)
+ 8001b38:	f009 ffa6 	bl	800ba88 <HAL_UART_Init>
+ 8001b3c:	4603      	mov	r3, r0
+ 8001b3e:	2b00      	cmp	r3, #0
+ 8001b40:	d001      	beq.n	8001b46 <MX_USART1_UART_Init+0x52>
+  {
+    Error_Handler();
+ 8001b42:	f000 fbc1 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+ 8001b46:	bf00      	nop
+ 8001b48:	bd80      	pop	{r7, pc}
+ 8001b4a:	bf00      	nop
+ 8001b4c:	20008c0c 	.word	0x20008c0c
+ 8001b50:	40011000 	.word	0x40011000
+
+08001b54 <MX_USART6_UART_Init>:
+  * @brief USART6 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART6_UART_Init(void)
+{
+ 8001b54:	b580      	push	{r7, lr}
+ 8001b56:	af00      	add	r7, sp, #0
+  /* USER CODE END USART6_Init 0 */
+
+  /* USER CODE BEGIN USART6_Init 1 */
+
+  /* USER CODE END USART6_Init 1 */
+  huart6.Instance = USART6;
+ 8001b58:	4b14      	ldr	r3, [pc, #80]	; (8001bac <MX_USART6_UART_Init+0x58>)
+ 8001b5a:	4a15      	ldr	r2, [pc, #84]	; (8001bb0 <MX_USART6_UART_Init+0x5c>)
+ 8001b5c:	601a      	str	r2, [r3, #0]
+  huart6.Init.BaudRate = 115200;
+ 8001b5e:	4b13      	ldr	r3, [pc, #76]	; (8001bac <MX_USART6_UART_Init+0x58>)
+ 8001b60:	f44f 32e1 	mov.w	r2, #115200	; 0x1c200
+ 8001b64:	605a      	str	r2, [r3, #4]
+  huart6.Init.WordLength = UART_WORDLENGTH_8B;
+ 8001b66:	4b11      	ldr	r3, [pc, #68]	; (8001bac <MX_USART6_UART_Init+0x58>)
+ 8001b68:	2200      	movs	r2, #0
+ 8001b6a:	609a      	str	r2, [r3, #8]
+  huart6.Init.StopBits = UART_STOPBITS_1;
+ 8001b6c:	4b0f      	ldr	r3, [pc, #60]	; (8001bac <MX_USART6_UART_Init+0x58>)
+ 8001b6e:	2200      	movs	r2, #0
+ 8001b70:	60da      	str	r2, [r3, #12]
+  huart6.Init.Parity = UART_PARITY_NONE;
+ 8001b72:	4b0e      	ldr	r3, [pc, #56]	; (8001bac <MX_USART6_UART_Init+0x58>)
+ 8001b74:	2200      	movs	r2, #0
+ 8001b76:	611a      	str	r2, [r3, #16]
+  huart6.Init.Mode = UART_MODE_TX_RX;
+ 8001b78:	4b0c      	ldr	r3, [pc, #48]	; (8001bac <MX_USART6_UART_Init+0x58>)
+ 8001b7a:	220c      	movs	r2, #12
+ 8001b7c:	615a      	str	r2, [r3, #20]
+  huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ 8001b7e:	4b0b      	ldr	r3, [pc, #44]	; (8001bac <MX_USART6_UART_Init+0x58>)
+ 8001b80:	2200      	movs	r2, #0
+ 8001b82:	619a      	str	r2, [r3, #24]
+  huart6.Init.OverSampling = UART_OVERSAMPLING_16;
+ 8001b84:	4b09      	ldr	r3, [pc, #36]	; (8001bac <MX_USART6_UART_Init+0x58>)
+ 8001b86:	2200      	movs	r2, #0
+ 8001b88:	61da      	str	r2, [r3, #28]
+  huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ 8001b8a:	4b08      	ldr	r3, [pc, #32]	; (8001bac <MX_USART6_UART_Init+0x58>)
+ 8001b8c:	2200      	movs	r2, #0
+ 8001b8e:	621a      	str	r2, [r3, #32]
+  huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ 8001b90:	4b06      	ldr	r3, [pc, #24]	; (8001bac <MX_USART6_UART_Init+0x58>)
+ 8001b92:	2200      	movs	r2, #0
+ 8001b94:	625a      	str	r2, [r3, #36]	; 0x24
+  if (HAL_UART_Init(&huart6) != HAL_OK)
+ 8001b96:	4805      	ldr	r0, [pc, #20]	; (8001bac <MX_USART6_UART_Init+0x58>)
+ 8001b98:	f009 ff76 	bl	800ba88 <HAL_UART_Init>
+ 8001b9c:	4603      	mov	r3, r0
+ 8001b9e:	2b00      	cmp	r3, #0
+ 8001ba0:	d001      	beq.n	8001ba6 <MX_USART6_UART_Init+0x52>
+  {
+    Error_Handler();
+ 8001ba2:	f000 fb91 	bl	80022c8 <Error_Handler>
+  }
+  /* USER CODE BEGIN USART6_Init 2 */
+
+  /* USER CODE END USART6_Init 2 */
+
+}
+ 8001ba6:	bf00      	nop
+ 8001ba8:	bd80      	pop	{r7, pc}
+ 8001baa:	bf00      	nop
+ 8001bac:	20008d1c 	.word	0x20008d1c
+ 8001bb0:	40011400 	.word	0x40011400
+
+08001bb4 <MX_FMC_Init>:
+
+/* FMC initialization function */
+static void MX_FMC_Init(void)
+{
+ 8001bb4:	b580      	push	{r7, lr}
+ 8001bb6:	b088      	sub	sp, #32
+ 8001bb8:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN FMC_Init 0 */
+
+  /* USER CODE END FMC_Init 0 */
+
+  FMC_SDRAM_TimingTypeDef SdramTiming = {0};
+ 8001bba:	1d3b      	adds	r3, r7, #4
+ 8001bbc:	2200      	movs	r2, #0
+ 8001bbe:	601a      	str	r2, [r3, #0]
+ 8001bc0:	605a      	str	r2, [r3, #4]
+ 8001bc2:	609a      	str	r2, [r3, #8]
+ 8001bc4:	60da      	str	r2, [r3, #12]
+ 8001bc6:	611a      	str	r2, [r3, #16]
+ 8001bc8:	615a      	str	r2, [r3, #20]
+ 8001bca:	619a      	str	r2, [r3, #24]
+
+  /* USER CODE END FMC_Init 1 */
+
+  /** Perform the SDRAM1 memory initialization sequence
+  */
+  hsdram1.Instance = FMC_SDRAM_DEVICE;
+ 8001bcc:	4b1e      	ldr	r3, [pc, #120]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001bce:	4a1f      	ldr	r2, [pc, #124]	; (8001c4c <MX_FMC_Init+0x98>)
+ 8001bd0:	601a      	str	r2, [r3, #0]
+  /* hsdram1.Init */
+  hsdram1.Init.SDBank = FMC_SDRAM_BANK1;
+ 8001bd2:	4b1d      	ldr	r3, [pc, #116]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001bd4:	2200      	movs	r2, #0
+ 8001bd6:	605a      	str	r2, [r3, #4]
+  hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
+ 8001bd8:	4b1b      	ldr	r3, [pc, #108]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001bda:	2200      	movs	r2, #0
+ 8001bdc:	609a      	str	r2, [r3, #8]
+  hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
+ 8001bde:	4b1a      	ldr	r3, [pc, #104]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001be0:	2204      	movs	r2, #4
+ 8001be2:	60da      	str	r2, [r3, #12]
+  hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;
+ 8001be4:	4b18      	ldr	r3, [pc, #96]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001be6:	2210      	movs	r2, #16
+ 8001be8:	611a      	str	r2, [r3, #16]
+  hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
+ 8001bea:	4b17      	ldr	r3, [pc, #92]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001bec:	2240      	movs	r2, #64	; 0x40
+ 8001bee:	615a      	str	r2, [r3, #20]
+  hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_1;
+ 8001bf0:	4b15      	ldr	r3, [pc, #84]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001bf2:	2280      	movs	r2, #128	; 0x80
+ 8001bf4:	619a      	str	r2, [r3, #24]
+  hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
+ 8001bf6:	4b14      	ldr	r3, [pc, #80]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001bf8:	2200      	movs	r2, #0
+ 8001bfa:	61da      	str	r2, [r3, #28]
+  hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_DISABLE;
+ 8001bfc:	4b12      	ldr	r3, [pc, #72]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001bfe:	2200      	movs	r2, #0
+ 8001c00:	621a      	str	r2, [r3, #32]
+  hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
+ 8001c02:	4b11      	ldr	r3, [pc, #68]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001c04:	2200      	movs	r2, #0
+ 8001c06:	625a      	str	r2, [r3, #36]	; 0x24
+  hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
+ 8001c08:	4b0f      	ldr	r3, [pc, #60]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001c0a:	2200      	movs	r2, #0
+ 8001c0c:	629a      	str	r2, [r3, #40]	; 0x28
+  /* SdramTiming */
+  SdramTiming.LoadToActiveDelay = 16;
+ 8001c0e:	2310      	movs	r3, #16
+ 8001c10:	607b      	str	r3, [r7, #4]
+  SdramTiming.ExitSelfRefreshDelay = 16;
+ 8001c12:	2310      	movs	r3, #16
+ 8001c14:	60bb      	str	r3, [r7, #8]
+  SdramTiming.SelfRefreshTime = 16;
+ 8001c16:	2310      	movs	r3, #16
+ 8001c18:	60fb      	str	r3, [r7, #12]
+  SdramTiming.RowCycleDelay = 16;
+ 8001c1a:	2310      	movs	r3, #16
+ 8001c1c:	613b      	str	r3, [r7, #16]
+  SdramTiming.WriteRecoveryTime = 16;
+ 8001c1e:	2310      	movs	r3, #16
+ 8001c20:	617b      	str	r3, [r7, #20]
+  SdramTiming.RPDelay = 16;
+ 8001c22:	2310      	movs	r3, #16
+ 8001c24:	61bb      	str	r3, [r7, #24]
+  SdramTiming.RCDDelay = 16;
+ 8001c26:	2310      	movs	r3, #16
+ 8001c28:	61fb      	str	r3, [r7, #28]
+
+  if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
+ 8001c2a:	1d3b      	adds	r3, r7, #4
+ 8001c2c:	4619      	mov	r1, r3
+ 8001c2e:	4806      	ldr	r0, [pc, #24]	; (8001c48 <MX_FMC_Init+0x94>)
+ 8001c30:	f008 fcea 	bl	800a608 <HAL_SDRAM_Init>
+ 8001c34:	4603      	mov	r3, r0
+ 8001c36:	2b00      	cmp	r3, #0
+ 8001c38:	d001      	beq.n	8001c3e <MX_FMC_Init+0x8a>
+  {
+    Error_Handler( );
+ 8001c3a:	f000 fb45 	bl	80022c8 <Error_Handler>
+  }
+
+  /* USER CODE BEGIN FMC_Init 2 */
+
+  /* USER CODE END FMC_Init 2 */
+}
+ 8001c3e:	bf00      	nop
+ 8001c40:	3720      	adds	r7, #32
+ 8001c42:	46bd      	mov	sp, r7
+ 8001c44:	bd80      	pop	{r7, pc}
+ 8001c46:	bf00      	nop
+ 8001c48:	20008e24 	.word	0x20008e24
+ 8001c4c:	a0000140 	.word	0xa0000140
+
+08001c50 <MX_GPIO_Init>:
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+ 8001c50:	b580      	push	{r7, lr}
+ 8001c52:	b090      	sub	sp, #64	; 0x40
+ 8001c54:	af00      	add	r7, sp, #0
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8001c56:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001c5a:	2200      	movs	r2, #0
+ 8001c5c:	601a      	str	r2, [r3, #0]
+ 8001c5e:	605a      	str	r2, [r3, #4]
+ 8001c60:	609a      	str	r2, [r3, #8]
+ 8001c62:	60da      	str	r2, [r3, #12]
+ 8001c64:	611a      	str	r2, [r3, #16]
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+ 8001c66:	4bb0      	ldr	r3, [pc, #704]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001c68:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001c6a:	4aaf      	ldr	r2, [pc, #700]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001c6c:	f043 0310 	orr.w	r3, r3, #16
+ 8001c70:	6313      	str	r3, [r2, #48]	; 0x30
+ 8001c72:	4bad      	ldr	r3, [pc, #692]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001c74:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001c76:	f003 0310 	and.w	r3, r3, #16
+ 8001c7a:	62bb      	str	r3, [r7, #40]	; 0x28
+ 8001c7c:	6abb      	ldr	r3, [r7, #40]	; 0x28
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+ 8001c7e:	4baa      	ldr	r3, [pc, #680]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001c80:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001c82:	4aa9      	ldr	r2, [pc, #676]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001c84:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 8001c88:	6313      	str	r3, [r2, #48]	; 0x30
+ 8001c8a:	4ba7      	ldr	r3, [pc, #668]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001c8c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001c8e:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 8001c92:	627b      	str	r3, [r7, #36]	; 0x24
+ 8001c94:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+ 8001c96:	4ba4      	ldr	r3, [pc, #656]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001c98:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001c9a:	4aa3      	ldr	r2, [pc, #652]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001c9c:	f043 0302 	orr.w	r3, r3, #2
+ 8001ca0:	6313      	str	r3, [r2, #48]	; 0x30
+ 8001ca2:	4ba1      	ldr	r3, [pc, #644]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001ca4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001ca6:	f003 0302 	and.w	r3, r3, #2
+ 8001caa:	623b      	str	r3, [r7, #32]
+ 8001cac:	6a3b      	ldr	r3, [r7, #32]
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+ 8001cae:	4b9e      	ldr	r3, [pc, #632]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001cb0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001cb2:	4a9d      	ldr	r2, [pc, #628]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001cb4:	f043 0301 	orr.w	r3, r3, #1
+ 8001cb8:	6313      	str	r3, [r2, #48]	; 0x30
+ 8001cba:	4b9b      	ldr	r3, [pc, #620]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001cbc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001cbe:	f003 0301 	and.w	r3, r3, #1
+ 8001cc2:	61fb      	str	r3, [r7, #28]
+ 8001cc4:	69fb      	ldr	r3, [r7, #28]
+  __HAL_RCC_GPIOJ_CLK_ENABLE();
+ 8001cc6:	4b98      	ldr	r3, [pc, #608]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001cc8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001cca:	4a97      	ldr	r2, [pc, #604]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001ccc:	f443 7300 	orr.w	r3, r3, #512	; 0x200
+ 8001cd0:	6313      	str	r3, [r2, #48]	; 0x30
+ 8001cd2:	4b95      	ldr	r3, [pc, #596]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001cd4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001cd6:	f403 7300 	and.w	r3, r3, #512	; 0x200
+ 8001cda:	61bb      	str	r3, [r7, #24]
+ 8001cdc:	69bb      	ldr	r3, [r7, #24]
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+ 8001cde:	4b92      	ldr	r3, [pc, #584]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001ce0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001ce2:	4a91      	ldr	r2, [pc, #580]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001ce4:	f043 0308 	orr.w	r3, r3, #8
+ 8001ce8:	6313      	str	r3, [r2, #48]	; 0x30
+ 8001cea:	4b8f      	ldr	r3, [pc, #572]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001cec:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001cee:	f003 0308 	and.w	r3, r3, #8
+ 8001cf2:	617b      	str	r3, [r7, #20]
+ 8001cf4:	697b      	ldr	r3, [r7, #20]
+  __HAL_RCC_GPIOI_CLK_ENABLE();
+ 8001cf6:	4b8c      	ldr	r3, [pc, #560]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001cf8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001cfa:	4a8b      	ldr	r2, [pc, #556]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001cfc:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 8001d00:	6313      	str	r3, [r2, #48]	; 0x30
+ 8001d02:	4b89      	ldr	r3, [pc, #548]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d04:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001d06:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 8001d0a:	613b      	str	r3, [r7, #16]
+ 8001d0c:	693b      	ldr	r3, [r7, #16]
+  __HAL_RCC_GPIOK_CLK_ENABLE();
+ 8001d0e:	4b86      	ldr	r3, [pc, #536]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d10:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001d12:	4a85      	ldr	r2, [pc, #532]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d14:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
+ 8001d18:	6313      	str	r3, [r2, #48]	; 0x30
+ 8001d1a:	4b83      	ldr	r3, [pc, #524]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d1c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001d1e:	f403 6380 	and.w	r3, r3, #1024	; 0x400
+ 8001d22:	60fb      	str	r3, [r7, #12]
+ 8001d24:	68fb      	ldr	r3, [r7, #12]
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+ 8001d26:	4b80      	ldr	r3, [pc, #512]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d28:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001d2a:	4a7f      	ldr	r2, [pc, #508]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d2c:	f043 0304 	orr.w	r3, r3, #4
+ 8001d30:	6313      	str	r3, [r2, #48]	; 0x30
+ 8001d32:	4b7d      	ldr	r3, [pc, #500]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d34:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001d36:	f003 0304 	and.w	r3, r3, #4
+ 8001d3a:	60bb      	str	r3, [r7, #8]
+ 8001d3c:	68bb      	ldr	r3, [r7, #8]
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+ 8001d3e:	4b7a      	ldr	r3, [pc, #488]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d40:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001d42:	4a79      	ldr	r2, [pc, #484]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d44:	f043 0320 	orr.w	r3, r3, #32
+ 8001d48:	6313      	str	r3, [r2, #48]	; 0x30
+ 8001d4a:	4b77      	ldr	r3, [pc, #476]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d4c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001d4e:	f003 0320 	and.w	r3, r3, #32
+ 8001d52:	607b      	str	r3, [r7, #4]
+ 8001d54:	687b      	ldr	r3, [r7, #4]
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+ 8001d56:	4b74      	ldr	r3, [pc, #464]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d58:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001d5a:	4a73      	ldr	r2, [pc, #460]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d5c:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 8001d60:	6313      	str	r3, [r2, #48]	; 0x30
+ 8001d62:	4b71      	ldr	r3, [pc, #452]	; (8001f28 <MX_GPIO_Init+0x2d8>)
+ 8001d64:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001d66:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 8001d6a:	603b      	str	r3, [r7, #0]
+ 8001d6c:	683b      	ldr	r3, [r7, #0]
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, LED14_Pin|LED15_Pin, GPIO_PIN_RESET);
+ 8001d6e:	2200      	movs	r2, #0
+ 8001d70:	2160      	movs	r1, #96	; 0x60
+ 8001d72:	486e      	ldr	r0, [pc, #440]	; (8001f2c <MX_GPIO_Init+0x2dc>)
+ 8001d74:	f005 fe24 	bl	80079c0 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(OTG_FS_PowerSwitchOn_GPIO_Port, OTG_FS_PowerSwitchOn_Pin, GPIO_PIN_SET);
+ 8001d78:	2201      	movs	r2, #1
+ 8001d7a:	2120      	movs	r1, #32
+ 8001d7c:	486c      	ldr	r0, [pc, #432]	; (8001f30 <MX_GPIO_Init+0x2e0>)
+ 8001d7e:	f005 fe1f 	bl	80079c0 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(LED16_GPIO_Port, LED16_Pin, GPIO_PIN_RESET);
+ 8001d82:	2200      	movs	r2, #0
+ 8001d84:	2108      	movs	r1, #8
+ 8001d86:	486a      	ldr	r0, [pc, #424]	; (8001f30 <MX_GPIO_Init+0x2e0>)
+ 8001d88:	f005 fe1a 	bl	80079c0 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(LED3_GPIO_Port, LED3_Pin, GPIO_PIN_RESET);
+ 8001d8c:	2200      	movs	r2, #0
+ 8001d8e:	2108      	movs	r1, #8
+ 8001d90:	4868      	ldr	r0, [pc, #416]	; (8001f34 <MX_GPIO_Init+0x2e4>)
+ 8001d92:	f005 fe15 	bl	80079c0 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(LCD_BL_CTRL_GPIO_Port, LCD_BL_CTRL_Pin, GPIO_PIN_SET);
+ 8001d96:	2201      	movs	r2, #1
+ 8001d98:	2108      	movs	r1, #8
+ 8001d9a:	4867      	ldr	r0, [pc, #412]	; (8001f38 <MX_GPIO_Init+0x2e8>)
+ 8001d9c:	f005 fe10 	bl	80079c0 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(LCD_DISP_GPIO_Port, LCD_DISP_Pin, GPIO_PIN_SET);
+ 8001da0:	2201      	movs	r2, #1
+ 8001da2:	f44f 5180 	mov.w	r1, #4096	; 0x1000
+ 8001da6:	4863      	ldr	r0, [pc, #396]	; (8001f34 <MX_GPIO_Init+0x2e4>)
+ 8001da8:	f005 fe0a 	bl	80079c0 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOH, LED13_Pin|LED17_Pin|LED11_Pin|LED12_Pin
+ 8001dac:	2200      	movs	r2, #0
+ 8001dae:	f645 6140 	movw	r1, #24128	; 0x5e40
+ 8001db2:	4862      	ldr	r0, [pc, #392]	; (8001f3c <MX_GPIO_Init+0x2ec>)
+ 8001db4:	f005 fe04 	bl	80079c0 <HAL_GPIO_WritePin>
+                          |LED2_Pin|LED18_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(EXT_RST_GPIO_Port, EXT_RST_Pin, GPIO_PIN_RESET);
+ 8001db8:	2200      	movs	r2, #0
+ 8001dba:	2108      	movs	r1, #8
+ 8001dbc:	4860      	ldr	r0, [pc, #384]	; (8001f40 <MX_GPIO_Init+0x2f0>)
+ 8001dbe:	f005 fdff 	bl	80079c0 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin : PE3 */
+  GPIO_InitStruct.Pin = GPIO_PIN_3;
+ 8001dc2:	2308      	movs	r3, #8
+ 8001dc4:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 8001dc6:	2300      	movs	r3, #0
+ 8001dc8:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001dca:	2300      	movs	r3, #0
+ 8001dcc:	637b      	str	r3, [r7, #52]	; 0x34
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 8001dce:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001dd2:	4619      	mov	r1, r3
+ 8001dd4:	4855      	ldr	r0, [pc, #340]	; (8001f2c <MX_GPIO_Init+0x2dc>)
+ 8001dd6:	f005 fb27 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : ULPI_D7_Pin ULPI_D6_Pin ULPI_D5_Pin ULPI_D2_Pin
+                           ULPI_D1_Pin ULPI_D4_Pin */
+  GPIO_InitStruct.Pin = ULPI_D7_Pin|ULPI_D6_Pin|ULPI_D5_Pin|ULPI_D2_Pin
+ 8001dda:	f643 0323 	movw	r3, #14371	; 0x3823
+ 8001dde:	62fb      	str	r3, [r7, #44]	; 0x2c
+                          |ULPI_D1_Pin|ULPI_D4_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001de0:	2302      	movs	r3, #2
+ 8001de2:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001de4:	2300      	movs	r3, #0
+ 8001de6:	637b      	str	r3, [r7, #52]	; 0x34
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8001de8:	2303      	movs	r3, #3
+ 8001dea:	63bb      	str	r3, [r7, #56]	; 0x38
+  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
+ 8001dec:	230a      	movs	r3, #10
+ 8001dee:	63fb      	str	r3, [r7, #60]	; 0x3c
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 8001df0:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001df4:	4619      	mov	r1, r3
+ 8001df6:	4853      	ldr	r0, [pc, #332]	; (8001f44 <MX_GPIO_Init+0x2f4>)
+ 8001df8:	f005 fb16 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : BP2_Pin BP1_Pin */
+  GPIO_InitStruct.Pin = BP2_Pin|BP1_Pin;
+ 8001dfc:	f44f 4301 	mov.w	r3, #33024	; 0x8100
+ 8001e00:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 8001e02:	2300      	movs	r3, #0
+ 8001e04:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001e06:	2300      	movs	r3, #0
+ 8001e08:	637b      	str	r3, [r7, #52]	; 0x34
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 8001e0a:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001e0e:	4619      	mov	r1, r3
+ 8001e10:	484d      	ldr	r0, [pc, #308]	; (8001f48 <MX_GPIO_Init+0x2f8>)
+ 8001e12:	f005 fb09 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : LED14_Pin LED15_Pin */
+  GPIO_InitStruct.Pin = LED14_Pin|LED15_Pin;
+ 8001e16:	2360      	movs	r3, #96	; 0x60
+ 8001e18:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8001e1a:	2301      	movs	r3, #1
+ 8001e1c:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001e1e:	2300      	movs	r3, #0
+ 8001e20:	637b      	str	r3, [r7, #52]	; 0x34
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8001e22:	2300      	movs	r3, #0
+ 8001e24:	63bb      	str	r3, [r7, #56]	; 0x38
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 8001e26:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001e2a:	4619      	mov	r1, r3
+ 8001e2c:	483f      	ldr	r0, [pc, #252]	; (8001f2c <MX_GPIO_Init+0x2dc>)
+ 8001e2e:	f005 fafb 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pin : OTG_FS_VBUS_Pin */
+  GPIO_InitStruct.Pin = OTG_FS_VBUS_Pin;
+ 8001e32:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 8001e36:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 8001e38:	2300      	movs	r3, #0
+ 8001e3a:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001e3c:	2300      	movs	r3, #0
+ 8001e3e:	637b      	str	r3, [r7, #52]	; 0x34
+  HAL_GPIO_Init(OTG_FS_VBUS_GPIO_Port, &GPIO_InitStruct);
+ 8001e40:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001e44:	4619      	mov	r1, r3
+ 8001e46:	4841      	ldr	r0, [pc, #260]	; (8001f4c <MX_GPIO_Init+0x2fc>)
+ 8001e48:	f005 faee 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pin : Audio_INT_Pin */
+  GPIO_InitStruct.Pin = Audio_INT_Pin;
+ 8001e4c:	2340      	movs	r3, #64	; 0x40
+ 8001e4e:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+ 8001e50:	4b3f      	ldr	r3, [pc, #252]	; (8001f50 <MX_GPIO_Init+0x300>)
+ 8001e52:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001e54:	2300      	movs	r3, #0
+ 8001e56:	637b      	str	r3, [r7, #52]	; 0x34
+  HAL_GPIO_Init(Audio_INT_GPIO_Port, &GPIO_InitStruct);
+ 8001e58:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001e5c:	4619      	mov	r1, r3
+ 8001e5e:	4834      	ldr	r0, [pc, #208]	; (8001f30 <MX_GPIO_Init+0x2e0>)
+ 8001e60:	f005 fae2 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : OTG_FS_PowerSwitchOn_Pin LED16_Pin */
+  GPIO_InitStruct.Pin = OTG_FS_PowerSwitchOn_Pin|LED16_Pin;
+ 8001e64:	2328      	movs	r3, #40	; 0x28
+ 8001e66:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8001e68:	2301      	movs	r3, #1
+ 8001e6a:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001e6c:	2300      	movs	r3, #0
+ 8001e6e:	637b      	str	r3, [r7, #52]	; 0x34
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8001e70:	2300      	movs	r3, #0
+ 8001e72:	63bb      	str	r3, [r7, #56]	; 0x38
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 8001e74:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001e78:	4619      	mov	r1, r3
+ 8001e7a:	482d      	ldr	r0, [pc, #180]	; (8001f30 <MX_GPIO_Init+0x2e0>)
+ 8001e7c:	f005 fad4 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : LED3_Pin LCD_DISP_Pin */
+  GPIO_InitStruct.Pin = LED3_Pin|LCD_DISP_Pin;
+ 8001e80:	f241 0308 	movw	r3, #4104	; 0x1008
+ 8001e84:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8001e86:	2301      	movs	r3, #1
+ 8001e88:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001e8a:	2300      	movs	r3, #0
+ 8001e8c:	637b      	str	r3, [r7, #52]	; 0x34
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8001e8e:	2300      	movs	r3, #0
+ 8001e90:	63bb      	str	r3, [r7, #56]	; 0x38
+  HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
+ 8001e92:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001e96:	4619      	mov	r1, r3
+ 8001e98:	4826      	ldr	r0, [pc, #152]	; (8001f34 <MX_GPIO_Init+0x2e4>)
+ 8001e9a:	f005 fac5 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pin : uSD_Detect_Pin */
+  GPIO_InitStruct.Pin = uSD_Detect_Pin;
+ 8001e9e:	f44f 5300 	mov.w	r3, #8192	; 0x2000
+ 8001ea2:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 8001ea4:	2300      	movs	r3, #0
+ 8001ea6:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001ea8:	2300      	movs	r3, #0
+ 8001eaa:	637b      	str	r3, [r7, #52]	; 0x34
+  HAL_GPIO_Init(uSD_Detect_GPIO_Port, &GPIO_InitStruct);
+ 8001eac:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001eb0:	4619      	mov	r1, r3
+ 8001eb2:	4828      	ldr	r0, [pc, #160]	; (8001f54 <MX_GPIO_Init+0x304>)
+ 8001eb4:	f005 fab8 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pin : LCD_BL_CTRL_Pin */
+  GPIO_InitStruct.Pin = LCD_BL_CTRL_Pin;
+ 8001eb8:	2308      	movs	r3, #8
+ 8001eba:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8001ebc:	2301      	movs	r3, #1
+ 8001ebe:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001ec0:	2300      	movs	r3, #0
+ 8001ec2:	637b      	str	r3, [r7, #52]	; 0x34
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8001ec4:	2300      	movs	r3, #0
+ 8001ec6:	63bb      	str	r3, [r7, #56]	; 0x38
+  HAL_GPIO_Init(LCD_BL_CTRL_GPIO_Port, &GPIO_InitStruct);
+ 8001ec8:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001ecc:	4619      	mov	r1, r3
+ 8001ece:	481a      	ldr	r0, [pc, #104]	; (8001f38 <MX_GPIO_Init+0x2e8>)
+ 8001ed0:	f005 faaa 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pin : OTG_FS_OverCurrent_Pin */
+  GPIO_InitStruct.Pin = OTG_FS_OverCurrent_Pin;
+ 8001ed4:	2310      	movs	r3, #16
+ 8001ed6:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 8001ed8:	2300      	movs	r3, #0
+ 8001eda:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001edc:	2300      	movs	r3, #0
+ 8001ede:	637b      	str	r3, [r7, #52]	; 0x34
+  HAL_GPIO_Init(OTG_FS_OverCurrent_GPIO_Port, &GPIO_InitStruct);
+ 8001ee0:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001ee4:	4619      	mov	r1, r3
+ 8001ee6:	4812      	ldr	r0, [pc, #72]	; (8001f30 <MX_GPIO_Init+0x2e0>)
+ 8001ee8:	f005 fa9e 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : TP3_Pin NC2_Pin */
+  GPIO_InitStruct.Pin = TP3_Pin|NC2_Pin;
+ 8001eec:	f248 0304 	movw	r3, #32772	; 0x8004
+ 8001ef0:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 8001ef2:	2300      	movs	r3, #0
+ 8001ef4:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001ef6:	2300      	movs	r3, #0
+ 8001ef8:	637b      	str	r3, [r7, #52]	; 0x34
+  HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
+ 8001efa:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001efe:	4619      	mov	r1, r3
+ 8001f00:	480e      	ldr	r0, [pc, #56]	; (8001f3c <MX_GPIO_Init+0x2ec>)
+ 8001f02:	f005 fa91 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : LED13_Pin LED17_Pin LED11_Pin LED12_Pin
+                           LED2_Pin LED18_Pin */
+  GPIO_InitStruct.Pin = LED13_Pin|LED17_Pin|LED11_Pin|LED12_Pin
+ 8001f06:	f645 6340 	movw	r3, #24128	; 0x5e40
+ 8001f0a:	62fb      	str	r3, [r7, #44]	; 0x2c
+                          |LED2_Pin|LED18_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8001f0c:	2301      	movs	r3, #1
+ 8001f0e:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001f10:	2300      	movs	r3, #0
+ 8001f12:	637b      	str	r3, [r7, #52]	; 0x34
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8001f14:	2300      	movs	r3, #0
+ 8001f16:	63bb      	str	r3, [r7, #56]	; 0x38
+  HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
+ 8001f18:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001f1c:	4619      	mov	r1, r3
+ 8001f1e:	4807      	ldr	r0, [pc, #28]	; (8001f3c <MX_GPIO_Init+0x2ec>)
+ 8001f20:	f005 fa82 	bl	8007428 <HAL_GPIO_Init>
+ 8001f24:	e018      	b.n	8001f58 <MX_GPIO_Init+0x308>
+ 8001f26:	bf00      	nop
+ 8001f28:	40023800 	.word	0x40023800
+ 8001f2c:	40021000 	.word	0x40021000
+ 8001f30:	40020c00 	.word	0x40020c00
+ 8001f34:	40022000 	.word	0x40022000
+ 8001f38:	40022800 	.word	0x40022800
+ 8001f3c:	40021c00 	.word	0x40021c00
+ 8001f40:	40021800 	.word	0x40021800
+ 8001f44:	40020400 	.word	0x40020400
+ 8001f48:	40020000 	.word	0x40020000
+ 8001f4c:	40022400 	.word	0x40022400
+ 8001f50:	10120000 	.word	0x10120000
+ 8001f54:	40020800 	.word	0x40020800
+
+  /*Configure GPIO pin : LCD_INT_Pin */
+  GPIO_InitStruct.Pin = LCD_INT_Pin;
+ 8001f58:	f44f 5300 	mov.w	r3, #8192	; 0x2000
+ 8001f5c:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+ 8001f5e:	4b2c      	ldr	r3, [pc, #176]	; (8002010 <MX_GPIO_Init+0x3c0>)
+ 8001f60:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001f62:	2300      	movs	r3, #0
+ 8001f64:	637b      	str	r3, [r7, #52]	; 0x34
+  HAL_GPIO_Init(LCD_INT_GPIO_Port, &GPIO_InitStruct);
+ 8001f66:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001f6a:	4619      	mov	r1, r3
+ 8001f6c:	4829      	ldr	r0, [pc, #164]	; (8002014 <MX_GPIO_Init+0x3c4>)
+ 8001f6e:	f005 fa5b 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pin : ULPI_NXT_Pin */
+  GPIO_InitStruct.Pin = ULPI_NXT_Pin;
+ 8001f72:	2310      	movs	r3, #16
+ 8001f74:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001f76:	2302      	movs	r3, #2
+ 8001f78:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001f7a:	2300      	movs	r3, #0
+ 8001f7c:	637b      	str	r3, [r7, #52]	; 0x34
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8001f7e:	2303      	movs	r3, #3
+ 8001f80:	63bb      	str	r3, [r7, #56]	; 0x38
+  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
+ 8001f82:	230a      	movs	r3, #10
+ 8001f84:	63fb      	str	r3, [r7, #60]	; 0x3c
+  HAL_GPIO_Init(ULPI_NXT_GPIO_Port, &GPIO_InitStruct);
+ 8001f86:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001f8a:	4619      	mov	r1, r3
+ 8001f8c:	4822      	ldr	r0, [pc, #136]	; (8002018 <MX_GPIO_Init+0x3c8>)
+ 8001f8e:	f005 fa4b 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : BP_JOYSTICK_Pin RMII_RXER_Pin */
+  GPIO_InitStruct.Pin = BP_JOYSTICK_Pin|RMII_RXER_Pin;
+ 8001f92:	2384      	movs	r3, #132	; 0x84
+ 8001f94:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 8001f96:	2300      	movs	r3, #0
+ 8001f98:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001f9a:	2300      	movs	r3, #0
+ 8001f9c:	637b      	str	r3, [r7, #52]	; 0x34
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 8001f9e:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001fa2:	4619      	mov	r1, r3
+ 8001fa4:	481d      	ldr	r0, [pc, #116]	; (800201c <MX_GPIO_Init+0x3cc>)
+ 8001fa6:	f005 fa3f 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : ULPI_STP_Pin ULPI_DIR_Pin */
+  GPIO_InitStruct.Pin = ULPI_STP_Pin|ULPI_DIR_Pin;
+ 8001faa:	2305      	movs	r3, #5
+ 8001fac:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001fae:	2302      	movs	r3, #2
+ 8001fb0:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001fb2:	2300      	movs	r3, #0
+ 8001fb4:	637b      	str	r3, [r7, #52]	; 0x34
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8001fb6:	2303      	movs	r3, #3
+ 8001fb8:	63bb      	str	r3, [r7, #56]	; 0x38
+  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
+ 8001fba:	230a      	movs	r3, #10
+ 8001fbc:	63fb      	str	r3, [r7, #60]	; 0x3c
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ 8001fbe:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001fc2:	4619      	mov	r1, r3
+ 8001fc4:	4816      	ldr	r0, [pc, #88]	; (8002020 <MX_GPIO_Init+0x3d0>)
+ 8001fc6:	f005 fa2f 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pin : EXT_RST_Pin */
+  GPIO_InitStruct.Pin = EXT_RST_Pin;
+ 8001fca:	2308      	movs	r3, #8
+ 8001fcc:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8001fce:	2301      	movs	r3, #1
+ 8001fd0:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001fd2:	2300      	movs	r3, #0
+ 8001fd4:	637b      	str	r3, [r7, #52]	; 0x34
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8001fd6:	2300      	movs	r3, #0
+ 8001fd8:	63bb      	str	r3, [r7, #56]	; 0x38
+  HAL_GPIO_Init(EXT_RST_GPIO_Port, &GPIO_InitStruct);
+ 8001fda:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001fde:	4619      	mov	r1, r3
+ 8001fe0:	480e      	ldr	r0, [pc, #56]	; (800201c <MX_GPIO_Init+0x3cc>)
+ 8001fe2:	f005 fa21 	bl	8007428 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : ULPI_CLK_Pin ULPI_D0_Pin */
+  GPIO_InitStruct.Pin = ULPI_CLK_Pin|ULPI_D0_Pin;
+ 8001fe6:	2328      	movs	r3, #40	; 0x28
+ 8001fe8:	62fb      	str	r3, [r7, #44]	; 0x2c
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001fea:	2302      	movs	r3, #2
+ 8001fec:	633b      	str	r3, [r7, #48]	; 0x30
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001fee:	2300      	movs	r3, #0
+ 8001ff0:	637b      	str	r3, [r7, #52]	; 0x34
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8001ff2:	2303      	movs	r3, #3
+ 8001ff4:	63bb      	str	r3, [r7, #56]	; 0x38
+  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
+ 8001ff6:	230a      	movs	r3, #10
+ 8001ff8:	63fb      	str	r3, [r7, #60]	; 0x3c
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 8001ffa:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8001ffe:	4619      	mov	r1, r3
+ 8002000:	4808      	ldr	r0, [pc, #32]	; (8002024 <MX_GPIO_Init+0x3d4>)
+ 8002002:	f005 fa11 	bl	8007428 <HAL_GPIO_Init>
+
+}
+ 8002006:	bf00      	nop
+ 8002008:	3740      	adds	r7, #64	; 0x40
+ 800200a:	46bd      	mov	sp, r7
+ 800200c:	bd80      	pop	{r7, pc}
+ 800200e:	bf00      	nop
+ 8002010:	10120000 	.word	0x10120000
+ 8002014:	40022000 	.word	0x40022000
+ 8002018:	40021c00 	.word	0x40021c00
+ 800201c:	40021800 	.word	0x40021800
+ 8002020:	40020800 	.word	0x40020800
+ 8002024:	40020000 	.word	0x40020000
+
+08002028 <f_GameMaster>:
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_f_GameMaster */
+void f_GameMaster(void const * argument)
+{
+ 8002028:	b580      	push	{r7, lr}
+ 800202a:	b084      	sub	sp, #16
+ 800202c:	af00      	add	r7, sp, #0
+ 800202e:	6078      	str	r0, [r7, #4]
+  /* init code for LWIP */
+  MX_LWIP_Init();
+ 8002030:	f00a fa94 	bl	800c55c <MX_LWIP_Init>
+  /* USER CODE BEGIN 5 */
+  TickType_t xLastWakeTime;
+  const TickType_t xPeriodeTache = 10;
+ 8002034:	230a      	movs	r3, #10
+ 8002036:	60fb      	str	r3, [r7, #12]
+
+
+
+
+
+    vTaskDelayUntil(&xLastWakeTime, xPeriodeTache);
+ 8002038:	f107 0308 	add.w	r3, r7, #8
+ 800203c:	68f9      	ldr	r1, [r7, #12]
+ 800203e:	4618      	mov	r0, r3
+ 8002040:	f00c fc06 	bl	800e850 <vTaskDelayUntil>
+ 8002044:	e7f8      	b.n	8002038 <f_GameMaster+0x10>
+	...
+
+08002048 <f_Joueur_1>:
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_f_Joueur_1 */
+void f_Joueur_1(void const * argument)
+{
+ 8002048:	b580      	push	{r7, lr}
+ 800204a:	b092      	sub	sp, #72	; 0x48
+ 800204c:	af00      	add	r7, sp, #0
+ 800204e:	6078      	str	r0, [r7, #4]
+  /* USER CODE BEGIN f_Joueur_1 */
+  TickType_t xLastWakeTime;
+  const TickType_t xPeriodeTache = 10;
+ 8002050:	230a      	movs	r3, #10
+ 8002052:	647b      	str	r3, [r7, #68]	; 0x44
+  uint16_t Width = 20;
+ 8002054:	2314      	movs	r3, #20
+ 8002056:	f8a7 3042 	strh.w	r3, [r7, #66]	; 0x42
+  uint16_t Height = 20;
+ 800205a:	2314      	movs	r3, #20
+ 800205c:	f8a7 3040 	strh.w	r3, [r7, #64]	; 0x40
+  uint32_t joystick_h, joystick_v;
+  uint8_t stop = 1;
+ 8002060:	2301      	movs	r3, #1
+ 8002062:	f887 3033 	strb.w	r3, [r7, #51]	; 0x33
+
+  struct Missile missile;
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+ 8002066:	f107 0318 	add.w	r3, r7, #24
+ 800206a:	2200      	movs	r2, #0
+ 800206c:	601a      	str	r2, [r3, #0]
+ 800206e:	605a      	str	r2, [r3, #4]
+ 8002070:	609a      	str	r2, [r3, #8]
+ 8002072:	60da      	str	r2, [r3, #12]
+   sConfig.Rank = ADC_REGULAR_RANK_1;
+ 8002074:	2301      	movs	r3, #1
+ 8002076:	61fb      	str	r3, [r7, #28]
+   sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+ 8002078:	2300      	movs	r3, #0
+ 800207a:	623b      	str	r3, [r7, #32]
+
+  sConfig.Channel = ADC_CHANNEL_8;
+ 800207c:	2308      	movs	r3, #8
+ 800207e:	61bb      	str	r3, [r7, #24]
+  HAL_ADC_ConfigChannel(&hadc3, &sConfig);
+ 8002080:	f107 0318 	add.w	r3, r7, #24
+ 8002084:	4619      	mov	r1, r3
+ 8002086:	4872      	ldr	r0, [pc, #456]	; (8002250 <f_Joueur_1+0x208>)
+ 8002088:	f002 ff22 	bl	8004ed0 <HAL_ADC_ConfigChannel>
+  HAL_ADC_Start(&hadc3);
+ 800208c:	4870      	ldr	r0, [pc, #448]	; (8002250 <f_Joueur_1+0x208>)
+ 800208e:	f002 fdcd 	bl	8004c2c <HAL_ADC_Start>
+
+  HAL_ADC_Start(&hadc1);
+ 8002092:	4870      	ldr	r0, [pc, #448]	; (8002254 <f_Joueur_1+0x20c>)
+ 8002094:	f002 fdca 	bl	8004c2c <HAL_ADC_Start>
+
+  /* Infinite loop */
+  for (;;)
+  {
+
+	BSP_LCD_SetTextColor(LCD_COLOR_WHITE);
+ 8002098:	f04f 30ff 	mov.w	r0, #4294967295
+ 800209c:	f000 fbc4 	bl	8002828 <BSP_LCD_SetTextColor>
+	BSP_LCD_FillRect(joueur.x, joueur.y, Width, Height);
+ 80020a0:	4b6d      	ldr	r3, [pc, #436]	; (8002258 <f_Joueur_1+0x210>)
+ 80020a2:	8818      	ldrh	r0, [r3, #0]
+ 80020a4:	4b6c      	ldr	r3, [pc, #432]	; (8002258 <f_Joueur_1+0x210>)
+ 80020a6:	8859      	ldrh	r1, [r3, #2]
+ 80020a8:	f8b7 3040 	ldrh.w	r3, [r7, #64]	; 0x40
+ 80020ac:	f8b7 2042 	ldrh.w	r2, [r7, #66]	; 0x42
+ 80020b0:	f000 fefa 	bl	8002ea8 <BSP_LCD_FillRect>
+
+	// BSP_LCD_DrawBitmap(uint32_t Xpos, uint32_t Ypos, uint8_t *pbmp)
+	while (HAL_ADC_PollForConversion(&hadc3, 100) != HAL_OK);
+ 80020b4:	bf00      	nop
+ 80020b6:	2164      	movs	r1, #100	; 0x64
+ 80020b8:	4865      	ldr	r0, [pc, #404]	; (8002250 <f_Joueur_1+0x208>)
+ 80020ba:	f002 fe77 	bl	8004dac <HAL_ADC_PollForConversion>
+ 80020be:	4603      	mov	r3, r0
+ 80020c0:	2b00      	cmp	r3, #0
+ 80020c2:	d1f8      	bne.n	80020b6 <f_Joueur_1+0x6e>
+	joystick_v = HAL_ADC_GetValue(&hadc3);
+ 80020c4:	4862      	ldr	r0, [pc, #392]	; (8002250 <f_Joueur_1+0x208>)
+ 80020c6:	f002 fef5 	bl	8004eb4 <HAL_ADC_GetValue>
+ 80020ca:	63f8      	str	r0, [r7, #60]	; 0x3c
+	while (HAL_ADC_PollForConversion(&hadc1, 100) != HAL_OK);
+ 80020cc:	bf00      	nop
+ 80020ce:	2164      	movs	r1, #100	; 0x64
+ 80020d0:	4860      	ldr	r0, [pc, #384]	; (8002254 <f_Joueur_1+0x20c>)
+ 80020d2:	f002 fe6b 	bl	8004dac <HAL_ADC_PollForConversion>
+ 80020d6:	4603      	mov	r3, r0
+ 80020d8:	2b00      	cmp	r3, #0
+ 80020da:	d1f8      	bne.n	80020ce <f_Joueur_1+0x86>
+	joystick_h = HAL_ADC_GetValue(&hadc1);
+ 80020dc:	485d      	ldr	r0, [pc, #372]	; (8002254 <f_Joueur_1+0x20c>)
+ 80020de:	f002 fee9 	bl	8004eb4 <HAL_ADC_GetValue>
+ 80020e2:	63b8      	str	r0, [r7, #56]	; 0x38
+
+	if ((joueur.y < 27424- Width - joueur.dy)&&(joystick_h < 1900)) joueur.y += joueur.dy;
+ 80020e4:	4b5c      	ldr	r3, [pc, #368]	; (8002258 <f_Joueur_1+0x210>)
+ 80020e6:	885b      	ldrh	r3, [r3, #2]
+ 80020e8:	4619      	mov	r1, r3
+ 80020ea:	f8b7 2042 	ldrh.w	r2, [r7, #66]	; 0x42
+ 80020ee:	f646 3320 	movw	r3, #27424	; 0x6b20
+ 80020f2:	1a9b      	subs	r3, r3, r2
+ 80020f4:	4a58      	ldr	r2, [pc, #352]	; (8002258 <f_Joueur_1+0x210>)
+ 80020f6:	7952      	ldrb	r2, [r2, #5]
+ 80020f8:	1a9b      	subs	r3, r3, r2
+ 80020fa:	4299      	cmp	r1, r3
+ 80020fc:	da0d      	bge.n	800211a <f_Joueur_1+0xd2>
+ 80020fe:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 8002100:	f240 726b 	movw	r2, #1899	; 0x76b
+ 8002104:	4293      	cmp	r3, r2
+ 8002106:	d808      	bhi.n	800211a <f_Joueur_1+0xd2>
+ 8002108:	4b53      	ldr	r3, [pc, #332]	; (8002258 <f_Joueur_1+0x210>)
+ 800210a:	885a      	ldrh	r2, [r3, #2]
+ 800210c:	4b52      	ldr	r3, [pc, #328]	; (8002258 <f_Joueur_1+0x210>)
+ 800210e:	795b      	ldrb	r3, [r3, #5]
+ 8002110:	b29b      	uxth	r3, r3
+ 8002112:	4413      	add	r3, r2
+ 8002114:	b29a      	uxth	r2, r3
+ 8002116:	4b50      	ldr	r3, [pc, #320]	; (8002258 <f_Joueur_1+0x210>)
+ 8002118:	805a      	strh	r2, [r3, #2]
+	if ((joueur.y > Width + joueur.dy)&&(joystick_h > 2100)) joueur.y -= joueur.dy;
+ 800211a:	4b4f      	ldr	r3, [pc, #316]	; (8002258 <f_Joueur_1+0x210>)
+ 800211c:	885b      	ldrh	r3, [r3, #2]
+ 800211e:	4619      	mov	r1, r3
+ 8002120:	f8b7 3042 	ldrh.w	r3, [r7, #66]	; 0x42
+ 8002124:	4a4c      	ldr	r2, [pc, #304]	; (8002258 <f_Joueur_1+0x210>)
+ 8002126:	7952      	ldrb	r2, [r2, #5]
+ 8002128:	4413      	add	r3, r2
+ 800212a:	4299      	cmp	r1, r3
+ 800212c:	dd0d      	ble.n	800214a <f_Joueur_1+0x102>
+ 800212e:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 8002130:	f640 0234 	movw	r2, #2100	; 0x834
+ 8002134:	4293      	cmp	r3, r2
+ 8002136:	d908      	bls.n	800214a <f_Joueur_1+0x102>
+ 8002138:	4b47      	ldr	r3, [pc, #284]	; (8002258 <f_Joueur_1+0x210>)
+ 800213a:	885a      	ldrh	r2, [r3, #2]
+ 800213c:	4b46      	ldr	r3, [pc, #280]	; (8002258 <f_Joueur_1+0x210>)
+ 800213e:	795b      	ldrb	r3, [r3, #5]
+ 8002140:	b29b      	uxth	r3, r3
+ 8002142:	1ad3      	subs	r3, r2, r3
+ 8002144:	b29a      	uxth	r2, r3
+ 8002146:	4b44      	ldr	r3, [pc, #272]	; (8002258 <f_Joueur_1+0x210>)
+ 8002148:	805a      	strh	r2, [r3, #2]
+
+	if ((joueur.x > Height + joueur.dx)&&(joystick_v < 1900)) joueur.x += joueur.dx;
+ 800214a:	4b43      	ldr	r3, [pc, #268]	; (8002258 <f_Joueur_1+0x210>)
+ 800214c:	881b      	ldrh	r3, [r3, #0]
+ 800214e:	4619      	mov	r1, r3
+ 8002150:	f8b7 3040 	ldrh.w	r3, [r7, #64]	; 0x40
+ 8002154:	4a40      	ldr	r2, [pc, #256]	; (8002258 <f_Joueur_1+0x210>)
+ 8002156:	7912      	ldrb	r2, [r2, #4]
+ 8002158:	4413      	add	r3, r2
+ 800215a:	4299      	cmp	r1, r3
+ 800215c:	dd0d      	ble.n	800217a <f_Joueur_1+0x132>
+ 800215e:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 8002160:	f240 726b 	movw	r2, #1899	; 0x76b
+ 8002164:	4293      	cmp	r3, r2
+ 8002166:	d808      	bhi.n	800217a <f_Joueur_1+0x132>
+ 8002168:	4b3b      	ldr	r3, [pc, #236]	; (8002258 <f_Joueur_1+0x210>)
+ 800216a:	881a      	ldrh	r2, [r3, #0]
+ 800216c:	4b3a      	ldr	r3, [pc, #232]	; (8002258 <f_Joueur_1+0x210>)
+ 800216e:	791b      	ldrb	r3, [r3, #4]
+ 8002170:	b29b      	uxth	r3, r3
+ 8002172:	4413      	add	r3, r2
+ 8002174:	b29a      	uxth	r2, r3
+ 8002176:	4b38      	ldr	r3, [pc, #224]	; (8002258 <f_Joueur_1+0x210>)
+ 8002178:	801a      	strh	r2, [r3, #0]
+	if ((joueur.x < 480-Height - joueur.dx)&&(joystick_v > 2100)) joueur.x -= joueur.dx;
+ 800217a:	4b37      	ldr	r3, [pc, #220]	; (8002258 <f_Joueur_1+0x210>)
+ 800217c:	881b      	ldrh	r3, [r3, #0]
+ 800217e:	4619      	mov	r1, r3
+ 8002180:	f8b7 3040 	ldrh.w	r3, [r7, #64]	; 0x40
+ 8002184:	f5c3 73f0 	rsb	r3, r3, #480	; 0x1e0
+ 8002188:	4a33      	ldr	r2, [pc, #204]	; (8002258 <f_Joueur_1+0x210>)
+ 800218a:	7912      	ldrb	r2, [r2, #4]
+ 800218c:	1a9b      	subs	r3, r3, r2
+ 800218e:	4299      	cmp	r1, r3
+ 8002190:	da0d      	bge.n	80021ae <f_Joueur_1+0x166>
+ 8002192:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 8002194:	f640 0234 	movw	r2, #2100	; 0x834
+ 8002198:	4293      	cmp	r3, r2
+ 800219a:	d908      	bls.n	80021ae <f_Joueur_1+0x166>
+ 800219c:	4b2e      	ldr	r3, [pc, #184]	; (8002258 <f_Joueur_1+0x210>)
+ 800219e:	881a      	ldrh	r2, [r3, #0]
+ 80021a0:	4b2d      	ldr	r3, [pc, #180]	; (8002258 <f_Joueur_1+0x210>)
+ 80021a2:	791b      	ldrb	r3, [r3, #4]
+ 80021a4:	b29b      	uxth	r3, r3
+ 80021a6:	1ad3      	subs	r3, r2, r3
+ 80021a8:	b29a      	uxth	r2, r3
+ 80021aa:	4b2b      	ldr	r3, [pc, #172]	; (8002258 <f_Joueur_1+0x210>)
+ 80021ac:	801a      	strh	r2, [r3, #0]
+
+
+	BSP_LCD_SetTextColor(LCD_COLOR_BLACK);
+ 80021ae:	f04f 407f 	mov.w	r0, #4278190080	; 0xff000000
+ 80021b2:	f000 fb39 	bl	8002828 <BSP_LCD_SetTextColor>
+	BSP_LCD_FillRect(joueur.x, joueur.y, Width, Height);
+ 80021b6:	4b28      	ldr	r3, [pc, #160]	; (8002258 <f_Joueur_1+0x210>)
+ 80021b8:	8818      	ldrh	r0, [r3, #0]
+ 80021ba:	4b27      	ldr	r3, [pc, #156]	; (8002258 <f_Joueur_1+0x210>)
+ 80021bc:	8859      	ldrh	r1, [r3, #2]
+ 80021be:	f8b7 3040 	ldrh.w	r3, [r7, #64]	; 0x40
+ 80021c2:	f8b7 2042 	ldrh.w	r2, [r7, #66]	; 0x42
+ 80021c6:	f000 fe6f 	bl	8002ea8 <BSP_LCD_FillRect>
+
+	if (xQueueReceive(Queue_JHandle, &missile, 0) == pdPASS)
+ 80021ca:	4b24      	ldr	r3, [pc, #144]	; (800225c <f_Joueur_1+0x214>)
+ 80021cc:	681b      	ldr	r3, [r3, #0]
+ 80021ce:	f107 0128 	add.w	r1, r7, #40	; 0x28
+ 80021d2:	2200      	movs	r2, #0
+ 80021d4:	4618      	mov	r0, r3
+ 80021d6:	f00b fdfb 	bl	800ddd0 <xQueueReceive>
+ 80021da:	4603      	mov	r3, r0
+ 80021dc:	2b01      	cmp	r3, #1
+ 80021de:	d107      	bne.n	80021f0 <f_Joueur_1+0x1a8>
+		joueur.health = joueur.health - missile.damage;
+ 80021e0:	4b1d      	ldr	r3, [pc, #116]	; (8002258 <f_Joueur_1+0x210>)
+ 80021e2:	799a      	ldrb	r2, [r3, #6]
+ 80021e4:	f897 3030 	ldrb.w	r3, [r7, #48]	; 0x30
+ 80021e8:	1ad3      	subs	r3, r2, r3
+ 80021ea:	b2da      	uxtb	r2, r3
+ 80021ec:	4b1a      	ldr	r3, [pc, #104]	; (8002258 <f_Joueur_1+0x210>)
+ 80021ee:	719a      	strb	r2, [r3, #6]
+	// On envoie 1 si le joueur est mort et on envoie 0 si les enemis sont tous morts
+		if (joueur.health == 0)xQueueSend(Queue_FHandle,&stop,0);
+ 80021f0:	4b19      	ldr	r3, [pc, #100]	; (8002258 <f_Joueur_1+0x210>)
+ 80021f2:	799b      	ldrb	r3, [r3, #6]
+ 80021f4:	2b00      	cmp	r3, #0
+ 80021f6:	d107      	bne.n	8002208 <f_Joueur_1+0x1c0>
+ 80021f8:	4b19      	ldr	r3, [pc, #100]	; (8002260 <f_Joueur_1+0x218>)
+ 80021fa:	6818      	ldr	r0, [r3, #0]
+ 80021fc:	f107 0133 	add.w	r1, r7, #51	; 0x33
+ 8002200:	2300      	movs	r3, #0
+ 8002202:	2200      	movs	r2, #0
+ 8002204:	f00b fbb4 	bl	800d970 <xQueueGenericSend>
+
+	// TODO La condition sur une entrée analogique pour envoyer un missile
+	struct Missile missile = {joueur.x, joueur.y,joueur.missile.dx, joueur.missile.dy, 1, joueur.missile.color, joueur.missile.damage};
+ 8002208:	4b13      	ldr	r3, [pc, #76]	; (8002258 <f_Joueur_1+0x210>)
+ 800220a:	881b      	ldrh	r3, [r3, #0]
+ 800220c:	81bb      	strh	r3, [r7, #12]
+ 800220e:	4b12      	ldr	r3, [pc, #72]	; (8002258 <f_Joueur_1+0x210>)
+ 8002210:	885b      	ldrh	r3, [r3, #2]
+ 8002212:	81fb      	strh	r3, [r7, #14]
+ 8002214:	4b10      	ldr	r3, [pc, #64]	; (8002258 <f_Joueur_1+0x210>)
+ 8002216:	7b1b      	ldrb	r3, [r3, #12]
+ 8002218:	743b      	strb	r3, [r7, #16]
+ 800221a:	4b0f      	ldr	r3, [pc, #60]	; (8002258 <f_Joueur_1+0x210>)
+ 800221c:	7b5b      	ldrb	r3, [r3, #13]
+ 800221e:	747b      	strb	r3, [r7, #17]
+ 8002220:	2301      	movs	r3, #1
+ 8002222:	74bb      	strb	r3, [r7, #18]
+ 8002224:	4b0c      	ldr	r3, [pc, #48]	; (8002258 <f_Joueur_1+0x210>)
+ 8002226:	7bdb      	ldrb	r3, [r3, #15]
+ 8002228:	74fb      	strb	r3, [r7, #19]
+ 800222a:	4b0b      	ldr	r3, [pc, #44]	; (8002258 <f_Joueur_1+0x210>)
+ 800222c:	7c1b      	ldrb	r3, [r3, #16]
+ 800222e:	753b      	strb	r3, [r7, #20]
+	xQueueSend(Queue_NHandle,&missile,0);
+ 8002230:	4b0c      	ldr	r3, [pc, #48]	; (8002264 <f_Joueur_1+0x21c>)
+ 8002232:	6818      	ldr	r0, [r3, #0]
+ 8002234:	f107 010c 	add.w	r1, r7, #12
+ 8002238:	2300      	movs	r3, #0
+ 800223a:	2200      	movs	r2, #0
+ 800223c:	f00b fb98 	bl	800d970 <xQueueGenericSend>
+    vTaskDelayUntil(&xLastWakeTime, xPeriodeTache);
+ 8002240:	f107 0334 	add.w	r3, r7, #52	; 0x34
+ 8002244:	6c79      	ldr	r1, [r7, #68]	; 0x44
+ 8002246:	4618      	mov	r0, r3
+ 8002248:	f00c fb02 	bl	800e850 <vTaskDelayUntil>
+  {
+ 800224c:	e724      	b.n	8002098 <f_Joueur_1+0x50>
+ 800224e:	bf00      	nop
+ 8002250:	20008bc0 	.word	0x20008bc0
+ 8002254:	20008b78 	.word	0x20008b78
+ 8002258:	20000028 	.word	0x20000028
+ 800225c:	200089d8 	.word	0x200089d8
+ 8002260:	20008c8c 	.word	0x20008c8c
+ 8002264:	20008c08 	.word	0x20008c08
+
+08002268 <f_block_enemie>:
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_f_block_enemie */
+void f_block_enemie(void const * argument)
+{
+ 8002268:	b580      	push	{r7, lr}
+ 800226a:	b084      	sub	sp, #16
+ 800226c:	af00      	add	r7, sp, #0
+ 800226e:	6078      	str	r0, [r7, #4]
+  /* USER CODE BEGIN f_block_enemie */
+  TickType_t xLastWakeTime;
+  const TickType_t xPeriodeTache = 10;
+ 8002270:	230a      	movs	r3, #10
+ 8002272:	60fb      	str	r3, [r7, #12]
+  /* Infinite loop */
+  for (;;)
+  {
+    vTaskDelayUntil(&xLastWakeTime, xPeriodeTache);
+ 8002274:	f107 0308 	add.w	r3, r7, #8
+ 8002278:	68f9      	ldr	r1, [r7, #12]
+ 800227a:	4618      	mov	r0, r3
+ 800227c:	f00c fae8 	bl	800e850 <vTaskDelayUntil>
+ 8002280:	e7f8      	b.n	8002274 <f_block_enemie+0xc>
+
+08002282 <f_projectile>:
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_f_projectile */
+void f_projectile(void const * argument)
+{
+ 8002282:	b580      	push	{r7, lr}
+ 8002284:	f5ad 7d02 	sub.w	sp, sp, #520	; 0x208
+ 8002288:	af00      	add	r7, sp, #0
+ 800228a:	1d3b      	adds	r3, r7, #4
+ 800228c:	6018      	str	r0, [r3, #0]
+  /* USER CODE BEGIN f_projectile */
+  TickType_t xLastWakeTime;
+  const TickType_t xPeriodeTache = 10;
+ 800228e:	230a      	movs	r3, #10
+ 8002290:	f8c7 3204 	str.w	r3, [r7, #516]	; 0x204
+  /* Infinite loop */
+  struct Missile liste_missile[50];
+
+  for (;;)
+  {
+    vTaskDelayUntil(&xLastWakeTime, xPeriodeTache);
+ 8002294:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002298:	f8d7 1204 	ldr.w	r1, [r7, #516]	; 0x204
+ 800229c:	4618      	mov	r0, r3
+ 800229e:	f00c fad7 	bl	800e850 <vTaskDelayUntil>
+ 80022a2:	e7f7      	b.n	8002294 <f_projectile+0x12>
+
+080022a4 <HAL_TIM_PeriodElapsedCallback>:
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ 80022a4:	b580      	push	{r7, lr}
+ 80022a6:	b082      	sub	sp, #8
+ 80022a8:	af00      	add	r7, sp, #0
+ 80022aa:	6078      	str	r0, [r7, #4]
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6) {
+ 80022ac:	687b      	ldr	r3, [r7, #4]
+ 80022ae:	681b      	ldr	r3, [r3, #0]
+ 80022b0:	4a04      	ldr	r2, [pc, #16]	; (80022c4 <HAL_TIM_PeriodElapsedCallback+0x20>)
+ 80022b2:	4293      	cmp	r3, r2
+ 80022b4:	d101      	bne.n	80022ba <HAL_TIM_PeriodElapsedCallback+0x16>
+    HAL_IncTick();
+ 80022b6:	f002 fc33 	bl	8004b20 <HAL_IncTick>
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+ 80022ba:	bf00      	nop
+ 80022bc:	3708      	adds	r7, #8
+ 80022be:	46bd      	mov	sp, r7
+ 80022c0:	bd80      	pop	{r7, pc}
+ 80022c2:	bf00      	nop
+ 80022c4:	40001000 	.word	0x40001000
+
+080022c8 <Error_Handler>:
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+ 80022c8:	b480      	push	{r7}
+ 80022ca:	af00      	add	r7, sp, #0
+  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_irq(void)
+{
+  __ASM volatile ("cpsid i" : : : "memory");
+ 80022cc:	b672      	cpsid	i
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+ 80022ce:	e7fe      	b.n	80022ce <Error_Handler+0x6>
+
+080022d0 <I2Cx_MspInit>:
+  * @brief  Initializes I2C MSP.
+  * @param  i2c_handler : I2C handler
+  * @retval None
+  */
+static void I2Cx_MspInit(I2C_HandleTypeDef *i2c_handler)
+{
+ 80022d0:	b580      	push	{r7, lr}
+ 80022d2:	b08c      	sub	sp, #48	; 0x30
+ 80022d4:	af00      	add	r7, sp, #0
+ 80022d6:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef  gpio_init_structure;
+  
+  if (i2c_handler == (I2C_HandleTypeDef*)(&hI2cAudioHandler))
+ 80022d8:	687b      	ldr	r3, [r7, #4]
+ 80022da:	4a51      	ldr	r2, [pc, #324]	; (8002420 <I2Cx_MspInit+0x150>)
+ 80022dc:	4293      	cmp	r3, r2
+ 80022de:	d14d      	bne.n	800237c <I2Cx_MspInit+0xac>
+  {
+    /* AUDIO and LCD I2C MSP init */
+
+    /*** Configure the GPIOs ***/
+    /* Enable GPIO clock */
+    DISCOVERY_AUDIO_I2Cx_SCL_SDA_GPIO_CLK_ENABLE();
+ 80022e0:	4b50      	ldr	r3, [pc, #320]	; (8002424 <I2Cx_MspInit+0x154>)
+ 80022e2:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80022e4:	4a4f      	ldr	r2, [pc, #316]	; (8002424 <I2Cx_MspInit+0x154>)
+ 80022e6:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 80022ea:	6313      	str	r3, [r2, #48]	; 0x30
+ 80022ec:	4b4d      	ldr	r3, [pc, #308]	; (8002424 <I2Cx_MspInit+0x154>)
+ 80022ee:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80022f0:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 80022f4:	61bb      	str	r3, [r7, #24]
+ 80022f6:	69bb      	ldr	r3, [r7, #24]
+
+    /* Configure I2C Tx as alternate function */
+    gpio_init_structure.Pin = DISCOVERY_AUDIO_I2Cx_SCL_PIN;
+ 80022f8:	2380      	movs	r3, #128	; 0x80
+ 80022fa:	61fb      	str	r3, [r7, #28]
+    gpio_init_structure.Mode = GPIO_MODE_AF_OD;
+ 80022fc:	2312      	movs	r3, #18
+ 80022fe:	623b      	str	r3, [r7, #32]
+    gpio_init_structure.Pull = GPIO_NOPULL;
+ 8002300:	2300      	movs	r3, #0
+ 8002302:	627b      	str	r3, [r7, #36]	; 0x24
+    gpio_init_structure.Speed = GPIO_SPEED_FAST;
+ 8002304:	2302      	movs	r3, #2
+ 8002306:	62bb      	str	r3, [r7, #40]	; 0x28
+    gpio_init_structure.Alternate = DISCOVERY_AUDIO_I2Cx_SCL_SDA_AF;
+ 8002308:	2304      	movs	r3, #4
+ 800230a:	62fb      	str	r3, [r7, #44]	; 0x2c
+    HAL_GPIO_Init(DISCOVERY_AUDIO_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
+ 800230c:	f107 031c 	add.w	r3, r7, #28
+ 8002310:	4619      	mov	r1, r3
+ 8002312:	4845      	ldr	r0, [pc, #276]	; (8002428 <I2Cx_MspInit+0x158>)
+ 8002314:	f005 f888 	bl	8007428 <HAL_GPIO_Init>
+
+    /* Configure I2C Rx as alternate function */
+    gpio_init_structure.Pin = DISCOVERY_AUDIO_I2Cx_SDA_PIN;
+ 8002318:	f44f 7380 	mov.w	r3, #256	; 0x100
+ 800231c:	61fb      	str	r3, [r7, #28]
+    HAL_GPIO_Init(DISCOVERY_AUDIO_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
+ 800231e:	f107 031c 	add.w	r3, r7, #28
+ 8002322:	4619      	mov	r1, r3
+ 8002324:	4840      	ldr	r0, [pc, #256]	; (8002428 <I2Cx_MspInit+0x158>)
+ 8002326:	f005 f87f 	bl	8007428 <HAL_GPIO_Init>
+
+    /*** Configure the I2C peripheral ***/
+    /* Enable I2C clock */
+    DISCOVERY_AUDIO_I2Cx_CLK_ENABLE();
+ 800232a:	4b3e      	ldr	r3, [pc, #248]	; (8002424 <I2Cx_MspInit+0x154>)
+ 800232c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800232e:	4a3d      	ldr	r2, [pc, #244]	; (8002424 <I2Cx_MspInit+0x154>)
+ 8002330:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
+ 8002334:	6413      	str	r3, [r2, #64]	; 0x40
+ 8002336:	4b3b      	ldr	r3, [pc, #236]	; (8002424 <I2Cx_MspInit+0x154>)
+ 8002338:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800233a:	f403 0300 	and.w	r3, r3, #8388608	; 0x800000
+ 800233e:	617b      	str	r3, [r7, #20]
+ 8002340:	697b      	ldr	r3, [r7, #20]
+
+    /* Force the I2C peripheral clock reset */
+    DISCOVERY_AUDIO_I2Cx_FORCE_RESET();
+ 8002342:	4b38      	ldr	r3, [pc, #224]	; (8002424 <I2Cx_MspInit+0x154>)
+ 8002344:	6a1b      	ldr	r3, [r3, #32]
+ 8002346:	4a37      	ldr	r2, [pc, #220]	; (8002424 <I2Cx_MspInit+0x154>)
+ 8002348:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
+ 800234c:	6213      	str	r3, [r2, #32]
+
+    /* Release the I2C peripheral clock reset */
+    DISCOVERY_AUDIO_I2Cx_RELEASE_RESET();
+ 800234e:	4b35      	ldr	r3, [pc, #212]	; (8002424 <I2Cx_MspInit+0x154>)
+ 8002350:	6a1b      	ldr	r3, [r3, #32]
+ 8002352:	4a34      	ldr	r2, [pc, #208]	; (8002424 <I2Cx_MspInit+0x154>)
+ 8002354:	f423 0300 	bic.w	r3, r3, #8388608	; 0x800000
+ 8002358:	6213      	str	r3, [r2, #32]
+
+    /* Enable and set I2Cx Interrupt to a lower priority */
+    HAL_NVIC_SetPriority(DISCOVERY_AUDIO_I2Cx_EV_IRQn, 0x0F, 0);
+ 800235a:	2200      	movs	r2, #0
+ 800235c:	210f      	movs	r1, #15
+ 800235e:	2048      	movs	r0, #72	; 0x48
+ 8002360:	f003 f8b2 	bl	80054c8 <HAL_NVIC_SetPriority>
+    HAL_NVIC_EnableIRQ(DISCOVERY_AUDIO_I2Cx_EV_IRQn);
+ 8002364:	2048      	movs	r0, #72	; 0x48
+ 8002366:	f003 f8cb 	bl	8005500 <HAL_NVIC_EnableIRQ>
+
+    /* Enable and set I2Cx Interrupt to a lower priority */
+    HAL_NVIC_SetPriority(DISCOVERY_AUDIO_I2Cx_ER_IRQn, 0x0F, 0);
+ 800236a:	2200      	movs	r2, #0
+ 800236c:	210f      	movs	r1, #15
+ 800236e:	2049      	movs	r0, #73	; 0x49
+ 8002370:	f003 f8aa 	bl	80054c8 <HAL_NVIC_SetPriority>
+    HAL_NVIC_EnableIRQ(DISCOVERY_AUDIO_I2Cx_ER_IRQn);
+ 8002374:	2049      	movs	r0, #73	; 0x49
+ 8002376:	f003 f8c3 	bl	8005500 <HAL_NVIC_EnableIRQ>
+
+    /* Enable and set I2Cx Interrupt to a lower priority */
+    HAL_NVIC_SetPriority(DISCOVERY_EXT_I2Cx_ER_IRQn, 0x0F, 0);
+    HAL_NVIC_EnableIRQ(DISCOVERY_EXT_I2Cx_ER_IRQn);
+  }
+}
+ 800237a:	e04d      	b.n	8002418 <I2Cx_MspInit+0x148>
+    DISCOVERY_EXT_I2Cx_SCL_SDA_GPIO_CLK_ENABLE();
+ 800237c:	4b29      	ldr	r3, [pc, #164]	; (8002424 <I2Cx_MspInit+0x154>)
+ 800237e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8002380:	4a28      	ldr	r2, [pc, #160]	; (8002424 <I2Cx_MspInit+0x154>)
+ 8002382:	f043 0302 	orr.w	r3, r3, #2
+ 8002386:	6313      	str	r3, [r2, #48]	; 0x30
+ 8002388:	4b26      	ldr	r3, [pc, #152]	; (8002424 <I2Cx_MspInit+0x154>)
+ 800238a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800238c:	f003 0302 	and.w	r3, r3, #2
+ 8002390:	613b      	str	r3, [r7, #16]
+ 8002392:	693b      	ldr	r3, [r7, #16]
+    gpio_init_structure.Pin = DISCOVERY_EXT_I2Cx_SCL_PIN;
+ 8002394:	f44f 7380 	mov.w	r3, #256	; 0x100
+ 8002398:	61fb      	str	r3, [r7, #28]
+    gpio_init_structure.Mode = GPIO_MODE_AF_OD;
+ 800239a:	2312      	movs	r3, #18
+ 800239c:	623b      	str	r3, [r7, #32]
+    gpio_init_structure.Pull = GPIO_NOPULL;
+ 800239e:	2300      	movs	r3, #0
+ 80023a0:	627b      	str	r3, [r7, #36]	; 0x24
+    gpio_init_structure.Speed = GPIO_SPEED_FAST;
+ 80023a2:	2302      	movs	r3, #2
+ 80023a4:	62bb      	str	r3, [r7, #40]	; 0x28
+    gpio_init_structure.Alternate = DISCOVERY_EXT_I2Cx_SCL_SDA_AF;
+ 80023a6:	2304      	movs	r3, #4
+ 80023a8:	62fb      	str	r3, [r7, #44]	; 0x2c
+    HAL_GPIO_Init(DISCOVERY_EXT_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
+ 80023aa:	f107 031c 	add.w	r3, r7, #28
+ 80023ae:	4619      	mov	r1, r3
+ 80023b0:	481e      	ldr	r0, [pc, #120]	; (800242c <I2Cx_MspInit+0x15c>)
+ 80023b2:	f005 f839 	bl	8007428 <HAL_GPIO_Init>
+    gpio_init_structure.Pin = DISCOVERY_EXT_I2Cx_SDA_PIN;
+ 80023b6:	f44f 7300 	mov.w	r3, #512	; 0x200
+ 80023ba:	61fb      	str	r3, [r7, #28]
+    HAL_GPIO_Init(DISCOVERY_EXT_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
+ 80023bc:	f107 031c 	add.w	r3, r7, #28
+ 80023c0:	4619      	mov	r1, r3
+ 80023c2:	481a      	ldr	r0, [pc, #104]	; (800242c <I2Cx_MspInit+0x15c>)
+ 80023c4:	f005 f830 	bl	8007428 <HAL_GPIO_Init>
+    DISCOVERY_EXT_I2Cx_CLK_ENABLE();
+ 80023c8:	4b16      	ldr	r3, [pc, #88]	; (8002424 <I2Cx_MspInit+0x154>)
+ 80023ca:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 80023cc:	4a15      	ldr	r2, [pc, #84]	; (8002424 <I2Cx_MspInit+0x154>)
+ 80023ce:	f443 1300 	orr.w	r3, r3, #2097152	; 0x200000
+ 80023d2:	6413      	str	r3, [r2, #64]	; 0x40
+ 80023d4:	4b13      	ldr	r3, [pc, #76]	; (8002424 <I2Cx_MspInit+0x154>)
+ 80023d6:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 80023d8:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
+ 80023dc:	60fb      	str	r3, [r7, #12]
+ 80023de:	68fb      	ldr	r3, [r7, #12]
+    DISCOVERY_EXT_I2Cx_FORCE_RESET();
+ 80023e0:	4b10      	ldr	r3, [pc, #64]	; (8002424 <I2Cx_MspInit+0x154>)
+ 80023e2:	6a1b      	ldr	r3, [r3, #32]
+ 80023e4:	4a0f      	ldr	r2, [pc, #60]	; (8002424 <I2Cx_MspInit+0x154>)
+ 80023e6:	f443 1300 	orr.w	r3, r3, #2097152	; 0x200000
+ 80023ea:	6213      	str	r3, [r2, #32]
+    DISCOVERY_EXT_I2Cx_RELEASE_RESET();
+ 80023ec:	4b0d      	ldr	r3, [pc, #52]	; (8002424 <I2Cx_MspInit+0x154>)
+ 80023ee:	6a1b      	ldr	r3, [r3, #32]
+ 80023f0:	4a0c      	ldr	r2, [pc, #48]	; (8002424 <I2Cx_MspInit+0x154>)
+ 80023f2:	f423 1300 	bic.w	r3, r3, #2097152	; 0x200000
+ 80023f6:	6213      	str	r3, [r2, #32]
+    HAL_NVIC_SetPriority(DISCOVERY_EXT_I2Cx_EV_IRQn, 0x0F, 0);
+ 80023f8:	2200      	movs	r2, #0
+ 80023fa:	210f      	movs	r1, #15
+ 80023fc:	201f      	movs	r0, #31
+ 80023fe:	f003 f863 	bl	80054c8 <HAL_NVIC_SetPriority>
+    HAL_NVIC_EnableIRQ(DISCOVERY_EXT_I2Cx_EV_IRQn);
+ 8002402:	201f      	movs	r0, #31
+ 8002404:	f003 f87c 	bl	8005500 <HAL_NVIC_EnableIRQ>
+    HAL_NVIC_SetPriority(DISCOVERY_EXT_I2Cx_ER_IRQn, 0x0F, 0);
+ 8002408:	2200      	movs	r2, #0
+ 800240a:	210f      	movs	r1, #15
+ 800240c:	2020      	movs	r0, #32
+ 800240e:	f003 f85b 	bl	80054c8 <HAL_NVIC_SetPriority>
+    HAL_NVIC_EnableIRQ(DISCOVERY_EXT_I2Cx_ER_IRQn);
+ 8002412:	2020      	movs	r0, #32
+ 8002414:	f003 f874 	bl	8005500 <HAL_NVIC_EnableIRQ>
+}
+ 8002418:	bf00      	nop
+ 800241a:	3730      	adds	r7, #48	; 0x30
+ 800241c:	46bd      	mov	sp, r7
+ 800241e:	bd80      	pop	{r7, pc}
+ 8002420:	2000037c 	.word	0x2000037c
+ 8002424:	40023800 	.word	0x40023800
+ 8002428:	40021c00 	.word	0x40021c00
+ 800242c:	40020400 	.word	0x40020400
+
+08002430 <I2Cx_Init>:
+  * @brief  Initializes I2C HAL.
+  * @param  i2c_handler : I2C handler
+  * @retval None
+  */
+static void I2Cx_Init(I2C_HandleTypeDef *i2c_handler)
+{
+ 8002430:	b580      	push	{r7, lr}
+ 8002432:	b082      	sub	sp, #8
+ 8002434:	af00      	add	r7, sp, #0
+ 8002436:	6078      	str	r0, [r7, #4]
+  if(HAL_I2C_GetState(i2c_handler) == HAL_I2C_STATE_RESET)
+ 8002438:	6878      	ldr	r0, [r7, #4]
+ 800243a:	f005 fdc9 	bl	8007fd0 <HAL_I2C_GetState>
+ 800243e:	4603      	mov	r3, r0
+ 8002440:	2b00      	cmp	r3, #0
+ 8002442:	d125      	bne.n	8002490 <I2Cx_Init+0x60>
+  {
+    if (i2c_handler == (I2C_HandleTypeDef*)(&hI2cAudioHandler))
+ 8002444:	687b      	ldr	r3, [r7, #4]
+ 8002446:	4a14      	ldr	r2, [pc, #80]	; (8002498 <I2Cx_Init+0x68>)
+ 8002448:	4293      	cmp	r3, r2
+ 800244a:	d103      	bne.n	8002454 <I2Cx_Init+0x24>
+    {
+      /* Audio and LCD I2C configuration */
+      i2c_handler->Instance = DISCOVERY_AUDIO_I2Cx;
+ 800244c:	687b      	ldr	r3, [r7, #4]
+ 800244e:	4a13      	ldr	r2, [pc, #76]	; (800249c <I2Cx_Init+0x6c>)
+ 8002450:	601a      	str	r2, [r3, #0]
+ 8002452:	e002      	b.n	800245a <I2Cx_Init+0x2a>
+    }
+    else
+    {
+      /* External, camera and Arduino connector  I2C configuration */
+      i2c_handler->Instance = DISCOVERY_EXT_I2Cx;
+ 8002454:	687b      	ldr	r3, [r7, #4]
+ 8002456:	4a12      	ldr	r2, [pc, #72]	; (80024a0 <I2Cx_Init+0x70>)
+ 8002458:	601a      	str	r2, [r3, #0]
+    }
+    i2c_handler->Init.Timing           = DISCOVERY_I2Cx_TIMING;
+ 800245a:	687b      	ldr	r3, [r7, #4]
+ 800245c:	4a11      	ldr	r2, [pc, #68]	; (80024a4 <I2Cx_Init+0x74>)
+ 800245e:	605a      	str	r2, [r3, #4]
+    i2c_handler->Init.OwnAddress1      = 0;
+ 8002460:	687b      	ldr	r3, [r7, #4]
+ 8002462:	2200      	movs	r2, #0
+ 8002464:	609a      	str	r2, [r3, #8]
+    i2c_handler->Init.AddressingMode   = I2C_ADDRESSINGMODE_7BIT;
+ 8002466:	687b      	ldr	r3, [r7, #4]
+ 8002468:	2201      	movs	r2, #1
+ 800246a:	60da      	str	r2, [r3, #12]
+    i2c_handler->Init.DualAddressMode  = I2C_DUALADDRESS_DISABLE;
+ 800246c:	687b      	ldr	r3, [r7, #4]
+ 800246e:	2200      	movs	r2, #0
+ 8002470:	611a      	str	r2, [r3, #16]
+    i2c_handler->Init.OwnAddress2      = 0;
+ 8002472:	687b      	ldr	r3, [r7, #4]
+ 8002474:	2200      	movs	r2, #0
+ 8002476:	615a      	str	r2, [r3, #20]
+    i2c_handler->Init.GeneralCallMode  = I2C_GENERALCALL_DISABLE;
+ 8002478:	687b      	ldr	r3, [r7, #4]
+ 800247a:	2200      	movs	r2, #0
+ 800247c:	61da      	str	r2, [r3, #28]
+    i2c_handler->Init.NoStretchMode    = I2C_NOSTRETCH_DISABLE;
+ 800247e:	687b      	ldr	r3, [r7, #4]
+ 8002480:	2200      	movs	r2, #0
+ 8002482:	621a      	str	r2, [r3, #32]
+
+    /* Init the I2C */
+    I2Cx_MspInit(i2c_handler);
+ 8002484:	6878      	ldr	r0, [r7, #4]
+ 8002486:	f7ff ff23 	bl	80022d0 <I2Cx_MspInit>
+    HAL_I2C_Init(i2c_handler);
+ 800248a:	6878      	ldr	r0, [r7, #4]
+ 800248c:	f005 fab2 	bl	80079f4 <HAL_I2C_Init>
+  }
+}
+ 8002490:	bf00      	nop
+ 8002492:	3708      	adds	r7, #8
+ 8002494:	46bd      	mov	sp, r7
+ 8002496:	bd80      	pop	{r7, pc}
+ 8002498:	2000037c 	.word	0x2000037c
+ 800249c:	40005c00 	.word	0x40005c00
+ 80024a0:	40005400 	.word	0x40005400
+ 80024a4:	40912732 	.word	0x40912732
+
+080024a8 <I2Cx_ReadMultiple>:
+                                           uint8_t Addr,
+                                           uint16_t Reg,
+                                           uint16_t MemAddress,
+                                           uint8_t *Buffer,
+                                           uint16_t Length)
+{
+ 80024a8:	b580      	push	{r7, lr}
+ 80024aa:	b08a      	sub	sp, #40	; 0x28
+ 80024ac:	af04      	add	r7, sp, #16
+ 80024ae:	60f8      	str	r0, [r7, #12]
+ 80024b0:	4608      	mov	r0, r1
+ 80024b2:	4611      	mov	r1, r2
+ 80024b4:	461a      	mov	r2, r3
+ 80024b6:	4603      	mov	r3, r0
+ 80024b8:	72fb      	strb	r3, [r7, #11]
+ 80024ba:	460b      	mov	r3, r1
+ 80024bc:	813b      	strh	r3, [r7, #8]
+ 80024be:	4613      	mov	r3, r2
+ 80024c0:	80fb      	strh	r3, [r7, #6]
+  HAL_StatusTypeDef status = HAL_OK;
+ 80024c2:	2300      	movs	r3, #0
+ 80024c4:	75fb      	strb	r3, [r7, #23]
+
+  status = HAL_I2C_Mem_Read(i2c_handler, Addr, (uint16_t)Reg, MemAddress, Buffer, Length, 1000);
+ 80024c6:	7afb      	ldrb	r3, [r7, #11]
+ 80024c8:	b299      	uxth	r1, r3
+ 80024ca:	88f8      	ldrh	r0, [r7, #6]
+ 80024cc:	893a      	ldrh	r2, [r7, #8]
+ 80024ce:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
+ 80024d2:	9302      	str	r3, [sp, #8]
+ 80024d4:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
+ 80024d6:	9301      	str	r3, [sp, #4]
+ 80024d8:	6a3b      	ldr	r3, [r7, #32]
+ 80024da:	9300      	str	r3, [sp, #0]
+ 80024dc:	4603      	mov	r3, r0
+ 80024de:	68f8      	ldr	r0, [r7, #12]
+ 80024e0:	f005 fc5c 	bl	8007d9c <HAL_I2C_Mem_Read>
+ 80024e4:	4603      	mov	r3, r0
+ 80024e6:	75fb      	strb	r3, [r7, #23]
+
+  /* Check the communication status */
+  if(status != HAL_OK)
+ 80024e8:	7dfb      	ldrb	r3, [r7, #23]
+ 80024ea:	2b00      	cmp	r3, #0
+ 80024ec:	d004      	beq.n	80024f8 <I2Cx_ReadMultiple+0x50>
+  {
+    /* I2C error occurred */
+    I2Cx_Error(i2c_handler, Addr);
+ 80024ee:	7afb      	ldrb	r3, [r7, #11]
+ 80024f0:	4619      	mov	r1, r3
+ 80024f2:	68f8      	ldr	r0, [r7, #12]
+ 80024f4:	f000 f832 	bl	800255c <I2Cx_Error>
+  }
+  return status;    
+ 80024f8:	7dfb      	ldrb	r3, [r7, #23]
+}
+ 80024fa:	4618      	mov	r0, r3
+ 80024fc:	3718      	adds	r7, #24
+ 80024fe:	46bd      	mov	sp, r7
+ 8002500:	bd80      	pop	{r7, pc}
+
+08002502 <I2Cx_WriteMultiple>:
+                                            uint8_t Addr,
+                                            uint16_t Reg,
+                                            uint16_t MemAddress,
+                                            uint8_t *Buffer,
+                                            uint16_t Length)
+{
+ 8002502:	b580      	push	{r7, lr}
+ 8002504:	b08a      	sub	sp, #40	; 0x28
+ 8002506:	af04      	add	r7, sp, #16
+ 8002508:	60f8      	str	r0, [r7, #12]
+ 800250a:	4608      	mov	r0, r1
+ 800250c:	4611      	mov	r1, r2
+ 800250e:	461a      	mov	r2, r3
+ 8002510:	4603      	mov	r3, r0
+ 8002512:	72fb      	strb	r3, [r7, #11]
+ 8002514:	460b      	mov	r3, r1
+ 8002516:	813b      	strh	r3, [r7, #8]
+ 8002518:	4613      	mov	r3, r2
+ 800251a:	80fb      	strh	r3, [r7, #6]
+  HAL_StatusTypeDef status = HAL_OK;
+ 800251c:	2300      	movs	r3, #0
+ 800251e:	75fb      	strb	r3, [r7, #23]
+  
+  status = HAL_I2C_Mem_Write(i2c_handler, Addr, (uint16_t)Reg, MemAddress, Buffer, Length, 1000);
+ 8002520:	7afb      	ldrb	r3, [r7, #11]
+ 8002522:	b299      	uxth	r1, r3
+ 8002524:	88f8      	ldrh	r0, [r7, #6]
+ 8002526:	893a      	ldrh	r2, [r7, #8]
+ 8002528:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
+ 800252c:	9302      	str	r3, [sp, #8]
+ 800252e:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
+ 8002530:	9301      	str	r3, [sp, #4]
+ 8002532:	6a3b      	ldr	r3, [r7, #32]
+ 8002534:	9300      	str	r3, [sp, #0]
+ 8002536:	4603      	mov	r3, r0
+ 8002538:	68f8      	ldr	r0, [r7, #12]
+ 800253a:	f005 fb1b 	bl	8007b74 <HAL_I2C_Mem_Write>
+ 800253e:	4603      	mov	r3, r0
+ 8002540:	75fb      	strb	r3, [r7, #23]
+  
+  /* Check the communication status */
+  if(status != HAL_OK)
+ 8002542:	7dfb      	ldrb	r3, [r7, #23]
+ 8002544:	2b00      	cmp	r3, #0
+ 8002546:	d004      	beq.n	8002552 <I2Cx_WriteMultiple+0x50>
+  {
+    /* Re-Initiaize the I2C Bus */
+    I2Cx_Error(i2c_handler, Addr);
+ 8002548:	7afb      	ldrb	r3, [r7, #11]
+ 800254a:	4619      	mov	r1, r3
+ 800254c:	68f8      	ldr	r0, [r7, #12]
+ 800254e:	f000 f805 	bl	800255c <I2Cx_Error>
+  }
+  return status;
+ 8002552:	7dfb      	ldrb	r3, [r7, #23]
+}
+ 8002554:	4618      	mov	r0, r3
+ 8002556:	3718      	adds	r7, #24
+ 8002558:	46bd      	mov	sp, r7
+ 800255a:	bd80      	pop	{r7, pc}
+
+0800255c <I2Cx_Error>:
+  * @param  i2c_handler : I2C handler
+  * @param  Addr: I2C Address
+  * @retval None
+  */
+static void I2Cx_Error(I2C_HandleTypeDef *i2c_handler, uint8_t Addr)
+{
+ 800255c:	b580      	push	{r7, lr}
+ 800255e:	b082      	sub	sp, #8
+ 8002560:	af00      	add	r7, sp, #0
+ 8002562:	6078      	str	r0, [r7, #4]
+ 8002564:	460b      	mov	r3, r1
+ 8002566:	70fb      	strb	r3, [r7, #3]
+  /* De-initialize the I2C communication bus */
+  HAL_I2C_DeInit(i2c_handler);
+ 8002568:	6878      	ldr	r0, [r7, #4]
+ 800256a:	f005 fad3 	bl	8007b14 <HAL_I2C_DeInit>
+  
+  /* Re-Initialize the I2C communication bus */
+  I2Cx_Init(i2c_handler);
+ 800256e:	6878      	ldr	r0, [r7, #4]
+ 8002570:	f7ff ff5e 	bl	8002430 <I2Cx_Init>
+}
+ 8002574:	bf00      	nop
+ 8002576:	3708      	adds	r7, #8
+ 8002578:	46bd      	mov	sp, r7
+ 800257a:	bd80      	pop	{r7, pc}
+
+0800257c <TS_IO_Init>:
+/**
+  * @brief  Initializes Touchscreen low level.
+  * @retval None
+  */
+void TS_IO_Init(void)
+{
+ 800257c:	b580      	push	{r7, lr}
+ 800257e:	af00      	add	r7, sp, #0
+  I2Cx_Init(&hI2cAudioHandler);
+ 8002580:	4802      	ldr	r0, [pc, #8]	; (800258c <TS_IO_Init+0x10>)
+ 8002582:	f7ff ff55 	bl	8002430 <I2Cx_Init>
+}
+ 8002586:	bf00      	nop
+ 8002588:	bd80      	pop	{r7, pc}
+ 800258a:	bf00      	nop
+ 800258c:	2000037c 	.word	0x2000037c
+
+08002590 <TS_IO_Write>:
+  * @param  Reg: Reg address
+  * @param  Value: Data to be written
+  * @retval None
+  */
+void TS_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
+{
+ 8002590:	b580      	push	{r7, lr}
+ 8002592:	b084      	sub	sp, #16
+ 8002594:	af02      	add	r7, sp, #8
+ 8002596:	4603      	mov	r3, r0
+ 8002598:	71fb      	strb	r3, [r7, #7]
+ 800259a:	460b      	mov	r3, r1
+ 800259c:	71bb      	strb	r3, [r7, #6]
+ 800259e:	4613      	mov	r3, r2
+ 80025a0:	717b      	strb	r3, [r7, #5]
+  I2Cx_WriteMultiple(&hI2cAudioHandler, Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT,(uint8_t*)&Value, 1);
+ 80025a2:	79bb      	ldrb	r3, [r7, #6]
+ 80025a4:	b29a      	uxth	r2, r3
+ 80025a6:	79f9      	ldrb	r1, [r7, #7]
+ 80025a8:	2301      	movs	r3, #1
+ 80025aa:	9301      	str	r3, [sp, #4]
+ 80025ac:	1d7b      	adds	r3, r7, #5
+ 80025ae:	9300      	str	r3, [sp, #0]
+ 80025b0:	2301      	movs	r3, #1
+ 80025b2:	4803      	ldr	r0, [pc, #12]	; (80025c0 <TS_IO_Write+0x30>)
+ 80025b4:	f7ff ffa5 	bl	8002502 <I2Cx_WriteMultiple>
+}
+ 80025b8:	bf00      	nop
+ 80025ba:	3708      	adds	r7, #8
+ 80025bc:	46bd      	mov	sp, r7
+ 80025be:	bd80      	pop	{r7, pc}
+ 80025c0:	2000037c 	.word	0x2000037c
+
+080025c4 <TS_IO_Read>:
+  * @param  Addr: I2C address
+  * @param  Reg: Reg address
+  * @retval Data to be read
+  */
+uint8_t TS_IO_Read(uint8_t Addr, uint8_t Reg)
+{
+ 80025c4:	b580      	push	{r7, lr}
+ 80025c6:	b086      	sub	sp, #24
+ 80025c8:	af02      	add	r7, sp, #8
+ 80025ca:	4603      	mov	r3, r0
+ 80025cc:	460a      	mov	r2, r1
+ 80025ce:	71fb      	strb	r3, [r7, #7]
+ 80025d0:	4613      	mov	r3, r2
+ 80025d2:	71bb      	strb	r3, [r7, #6]
+  uint8_t read_value = 0;
+ 80025d4:	2300      	movs	r3, #0
+ 80025d6:	73fb      	strb	r3, [r7, #15]
+
+  I2Cx_ReadMultiple(&hI2cAudioHandler, Addr, Reg, I2C_MEMADD_SIZE_8BIT, (uint8_t*)&read_value, 1);
+ 80025d8:	79bb      	ldrb	r3, [r7, #6]
+ 80025da:	b29a      	uxth	r2, r3
+ 80025dc:	79f9      	ldrb	r1, [r7, #7]
+ 80025de:	2301      	movs	r3, #1
+ 80025e0:	9301      	str	r3, [sp, #4]
+ 80025e2:	f107 030f 	add.w	r3, r7, #15
+ 80025e6:	9300      	str	r3, [sp, #0]
+ 80025e8:	2301      	movs	r3, #1
+ 80025ea:	4804      	ldr	r0, [pc, #16]	; (80025fc <TS_IO_Read+0x38>)
+ 80025ec:	f7ff ff5c 	bl	80024a8 <I2Cx_ReadMultiple>
+
+  return read_value;
+ 80025f0:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 80025f2:	4618      	mov	r0, r3
+ 80025f4:	3710      	adds	r7, #16
+ 80025f6:	46bd      	mov	sp, r7
+ 80025f8:	bd80      	pop	{r7, pc}
+ 80025fa:	bf00      	nop
+ 80025fc:	2000037c 	.word	0x2000037c
+
+08002600 <TS_IO_Delay>:
+  * @brief  TS delay
+  * @param  Delay: Delay in ms
+  * @retval None
+  */
+void TS_IO_Delay(uint32_t Delay)
+{
+ 8002600:	b580      	push	{r7, lr}
+ 8002602:	b082      	sub	sp, #8
+ 8002604:	af00      	add	r7, sp, #0
+ 8002606:	6078      	str	r0, [r7, #4]
+  HAL_Delay(Delay);
+ 8002608:	6878      	ldr	r0, [r7, #4]
+ 800260a:	f002 faa9 	bl	8004b60 <HAL_Delay>
+}
+ 800260e:	bf00      	nop
+ 8002610:	3708      	adds	r7, #8
+ 8002612:	46bd      	mov	sp, r7
+ 8002614:	bd80      	pop	{r7, pc}
+	...
+
+08002618 <BSP_LCD_Init>:
+/**
+  * @brief  Initializes the LCD.
+  * @retval LCD state
+  */
+uint8_t BSP_LCD_Init(void)
+{    
+ 8002618:	b580      	push	{r7, lr}
+ 800261a:	af00      	add	r7, sp, #0
+  /* Select the used LCD */
+
+  /* The RK043FN48H LCD 480x272 is selected */
+  /* Timing Configuration */
+  hLtdcHandler.Init.HorizontalSync = (RK043FN48H_HSYNC - 1);
+ 800261c:	4b31      	ldr	r3, [pc, #196]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 800261e:	2228      	movs	r2, #40	; 0x28
+ 8002620:	615a      	str	r2, [r3, #20]
+  hLtdcHandler.Init.VerticalSync = (RK043FN48H_VSYNC - 1);
+ 8002622:	4b30      	ldr	r3, [pc, #192]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 8002624:	2209      	movs	r2, #9
+ 8002626:	619a      	str	r2, [r3, #24]
+  hLtdcHandler.Init.AccumulatedHBP = (RK043FN48H_HSYNC + RK043FN48H_HBP - 1);
+ 8002628:	4b2e      	ldr	r3, [pc, #184]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 800262a:	2235      	movs	r2, #53	; 0x35
+ 800262c:	61da      	str	r2, [r3, #28]
+  hLtdcHandler.Init.AccumulatedVBP = (RK043FN48H_VSYNC + RK043FN48H_VBP - 1);
+ 800262e:	4b2d      	ldr	r3, [pc, #180]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 8002630:	220b      	movs	r2, #11
+ 8002632:	621a      	str	r2, [r3, #32]
+  hLtdcHandler.Init.AccumulatedActiveH = (RK043FN48H_HEIGHT + RK043FN48H_VSYNC + RK043FN48H_VBP - 1);
+ 8002634:	4b2b      	ldr	r3, [pc, #172]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 8002636:	f240 121b 	movw	r2, #283	; 0x11b
+ 800263a:	629a      	str	r2, [r3, #40]	; 0x28
+  hLtdcHandler.Init.AccumulatedActiveW = (RK043FN48H_WIDTH + RK043FN48H_HSYNC + RK043FN48H_HBP - 1);
+ 800263c:	4b29      	ldr	r3, [pc, #164]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 800263e:	f240 2215 	movw	r2, #533	; 0x215
+ 8002642:	625a      	str	r2, [r3, #36]	; 0x24
+  hLtdcHandler.Init.TotalHeigh = (RK043FN48H_HEIGHT + RK043FN48H_VSYNC + RK043FN48H_VBP + RK043FN48H_VFP - 1);
+ 8002644:	4b27      	ldr	r3, [pc, #156]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 8002646:	f240 121d 	movw	r2, #285	; 0x11d
+ 800264a:	631a      	str	r2, [r3, #48]	; 0x30
+  hLtdcHandler.Init.TotalWidth = (RK043FN48H_WIDTH + RK043FN48H_HSYNC + RK043FN48H_HBP + RK043FN48H_HFP - 1);
+ 800264c:	4b25      	ldr	r3, [pc, #148]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 800264e:	f240 2235 	movw	r2, #565	; 0x235
+ 8002652:	62da      	str	r2, [r3, #44]	; 0x2c
+  
+  /* LCD clock configuration */
+  BSP_LCD_ClockConfig(&hLtdcHandler, NULL);
+ 8002654:	2100      	movs	r1, #0
+ 8002656:	4823      	ldr	r0, [pc, #140]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 8002658:	f000 fe38 	bl	80032cc <BSP_LCD_ClockConfig>
+
+  /* Initialize the LCD pixel width and pixel height */
+  hLtdcHandler.LayerCfg->ImageWidth  = RK043FN48H_WIDTH;
+ 800265c:	4b21      	ldr	r3, [pc, #132]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 800265e:	f44f 72f0 	mov.w	r2, #480	; 0x1e0
+ 8002662:	661a      	str	r2, [r3, #96]	; 0x60
+  hLtdcHandler.LayerCfg->ImageHeight = RK043FN48H_HEIGHT;
+ 8002664:	4b1f      	ldr	r3, [pc, #124]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 8002666:	f44f 7288 	mov.w	r2, #272	; 0x110
+ 800266a:	665a      	str	r2, [r3, #100]	; 0x64
+
+  /* Background value */
+  hLtdcHandler.Init.Backcolor.Blue = 0;
+ 800266c:	4b1d      	ldr	r3, [pc, #116]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 800266e:	2200      	movs	r2, #0
+ 8002670:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
+  hLtdcHandler.Init.Backcolor.Green = 0;
+ 8002674:	4b1b      	ldr	r3, [pc, #108]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 8002676:	2200      	movs	r2, #0
+ 8002678:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
+  hLtdcHandler.Init.Backcolor.Red = 0;
+ 800267c:	4b19      	ldr	r3, [pc, #100]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 800267e:	2200      	movs	r2, #0
+ 8002680:	f883 2036 	strb.w	r2, [r3, #54]	; 0x36
+  
+  /* Polarity */
+  hLtdcHandler.Init.HSPolarity = LTDC_HSPOLARITY_AL;
+ 8002684:	4b17      	ldr	r3, [pc, #92]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 8002686:	2200      	movs	r2, #0
+ 8002688:	605a      	str	r2, [r3, #4]
+  hLtdcHandler.Init.VSPolarity = LTDC_VSPOLARITY_AL; 
+ 800268a:	4b16      	ldr	r3, [pc, #88]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 800268c:	2200      	movs	r2, #0
+ 800268e:	609a      	str	r2, [r3, #8]
+  hLtdcHandler.Init.DEPolarity = LTDC_DEPOLARITY_AL;  
+ 8002690:	4b14      	ldr	r3, [pc, #80]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 8002692:	2200      	movs	r2, #0
+ 8002694:	60da      	str	r2, [r3, #12]
+  hLtdcHandler.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+ 8002696:	4b13      	ldr	r3, [pc, #76]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 8002698:	2200      	movs	r2, #0
+ 800269a:	611a      	str	r2, [r3, #16]
+  hLtdcHandler.Instance = LTDC;
+ 800269c:	4b11      	ldr	r3, [pc, #68]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 800269e:	4a12      	ldr	r2, [pc, #72]	; (80026e8 <BSP_LCD_Init+0xd0>)
+ 80026a0:	601a      	str	r2, [r3, #0]
+
+  if(HAL_LTDC_GetState(&hLtdcHandler) == HAL_LTDC_STATE_RESET)
+ 80026a2:	4810      	ldr	r0, [pc, #64]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 80026a4:	f006 f926 	bl	80088f4 <HAL_LTDC_GetState>
+ 80026a8:	4603      	mov	r3, r0
+ 80026aa:	2b00      	cmp	r3, #0
+ 80026ac:	d103      	bne.n	80026b6 <BSP_LCD_Init+0x9e>
+  {
+    /* Initialize the LCD Msp: this __weak function can be rewritten by the application */
+    BSP_LCD_MspInit(&hLtdcHandler, NULL);
+ 80026ae:	2100      	movs	r1, #0
+ 80026b0:	480c      	ldr	r0, [pc, #48]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 80026b2:	f000 fd31 	bl	8003118 <BSP_LCD_MspInit>
+  }
+  HAL_LTDC_Init(&hLtdcHandler);
+ 80026b6:	480b      	ldr	r0, [pc, #44]	; (80026e4 <BSP_LCD_Init+0xcc>)
+ 80026b8:	f005 ff4c 	bl	8008554 <HAL_LTDC_Init>
+
+  /* Assert display enable LCD_DISP pin */
+  HAL_GPIO_WritePin(LCD_DISP_GPIO_PORT, LCD_DISP_PIN, GPIO_PIN_SET);
+ 80026bc:	2201      	movs	r2, #1
+ 80026be:	f44f 5180 	mov.w	r1, #4096	; 0x1000
+ 80026c2:	480a      	ldr	r0, [pc, #40]	; (80026ec <BSP_LCD_Init+0xd4>)
+ 80026c4:	f005 f97c 	bl	80079c0 <HAL_GPIO_WritePin>
+
+  /* Assert backlight LCD_BL_CTRL pin */
+  HAL_GPIO_WritePin(LCD_BL_CTRL_GPIO_PORT, LCD_BL_CTRL_PIN, GPIO_PIN_SET);
+ 80026c8:	2201      	movs	r2, #1
+ 80026ca:	2108      	movs	r1, #8
+ 80026cc:	4808      	ldr	r0, [pc, #32]	; (80026f0 <BSP_LCD_Init+0xd8>)
+ 80026ce:	f005 f977 	bl	80079c0 <HAL_GPIO_WritePin>
+
+#if !defined(DATA_IN_ExtSDRAM)
+  /* Initialize the SDRAM */
+  BSP_SDRAM_Init();
+ 80026d2:	f000 ff1b 	bl	800350c <BSP_SDRAM_Init>
+#endif
+    
+  /* Initialize the font */
+  BSP_LCD_SetFont(&LCD_DEFAULT_FONT);
+ 80026d6:	4807      	ldr	r0, [pc, #28]	; (80026f4 <BSP_LCD_Init+0xdc>)
+ 80026d8:	f000 f8d8 	bl	800288c <BSP_LCD_SetFont>
+  
+  return LCD_OK;
+ 80026dc:	2300      	movs	r3, #0
+}
+ 80026de:	4618      	mov	r0, r3
+ 80026e0:	bd80      	pop	{r7, pc}
+ 80026e2:	bf00      	nop
+ 80026e4:	20008e5c 	.word	0x20008e5c
+ 80026e8:	40016800 	.word	0x40016800
+ 80026ec:	40022000 	.word	0x40022000
+ 80026f0:	40022800 	.word	0x40022800
+ 80026f4:	2000003c 	.word	0x2000003c
+
+080026f8 <BSP_LCD_GetXSize>:
+/**
+  * @brief  Gets the LCD X size.
+  * @retval Used LCD X size
+  */
+uint32_t BSP_LCD_GetXSize(void)
+{
+ 80026f8:	b480      	push	{r7}
+ 80026fa:	af00      	add	r7, sp, #0
+  return hLtdcHandler.LayerCfg[ActiveLayer].ImageWidth;
+ 80026fc:	4b06      	ldr	r3, [pc, #24]	; (8002718 <BSP_LCD_GetXSize+0x20>)
+ 80026fe:	681b      	ldr	r3, [r3, #0]
+ 8002700:	4a06      	ldr	r2, [pc, #24]	; (800271c <BSP_LCD_GetXSize+0x24>)
+ 8002702:	2134      	movs	r1, #52	; 0x34
+ 8002704:	fb01 f303 	mul.w	r3, r1, r3
+ 8002708:	4413      	add	r3, r2
+ 800270a:	3360      	adds	r3, #96	; 0x60
+ 800270c:	681b      	ldr	r3, [r3, #0]
+}
+ 800270e:	4618      	mov	r0, r3
+ 8002710:	46bd      	mov	sp, r7
+ 8002712:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002716:	4770      	bx	lr
+ 8002718:	20000408 	.word	0x20000408
+ 800271c:	20008e5c 	.word	0x20008e5c
+
+08002720 <BSP_LCD_GetYSize>:
+/**
+  * @brief  Gets the LCD Y size.
+  * @retval Used LCD Y size
+  */
+uint32_t BSP_LCD_GetYSize(void)
+{
+ 8002720:	b480      	push	{r7}
+ 8002722:	af00      	add	r7, sp, #0
+  return hLtdcHandler.LayerCfg[ActiveLayer].ImageHeight;
+ 8002724:	4b06      	ldr	r3, [pc, #24]	; (8002740 <BSP_LCD_GetYSize+0x20>)
+ 8002726:	681b      	ldr	r3, [r3, #0]
+ 8002728:	4a06      	ldr	r2, [pc, #24]	; (8002744 <BSP_LCD_GetYSize+0x24>)
+ 800272a:	2134      	movs	r1, #52	; 0x34
+ 800272c:	fb01 f303 	mul.w	r3, r1, r3
+ 8002730:	4413      	add	r3, r2
+ 8002732:	3364      	adds	r3, #100	; 0x64
+ 8002734:	681b      	ldr	r3, [r3, #0]
+}
+ 8002736:	4618      	mov	r0, r3
+ 8002738:	46bd      	mov	sp, r7
+ 800273a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800273e:	4770      	bx	lr
+ 8002740:	20000408 	.word	0x20000408
+ 8002744:	20008e5c 	.word	0x20008e5c
+
+08002748 <BSP_LCD_LayerDefaultInit>:
+  * @param  LayerIndex: Layer foreground or background
+  * @param  FB_Address: Layer frame buffer
+  * @retval None
+  */
+void BSP_LCD_LayerDefaultInit(uint16_t LayerIndex, uint32_t FB_Address)
+{     
+ 8002748:	b580      	push	{r7, lr}
+ 800274a:	b090      	sub	sp, #64	; 0x40
+ 800274c:	af00      	add	r7, sp, #0
+ 800274e:	4603      	mov	r3, r0
+ 8002750:	6039      	str	r1, [r7, #0]
+ 8002752:	80fb      	strh	r3, [r7, #6]
+  LCD_LayerCfgTypeDef  layer_cfg;
+
+  /* Layer Init */
+  layer_cfg.WindowX0 = 0;
+ 8002754:	2300      	movs	r3, #0
+ 8002756:	60fb      	str	r3, [r7, #12]
+  layer_cfg.WindowX1 = BSP_LCD_GetXSize();
+ 8002758:	f7ff ffce 	bl	80026f8 <BSP_LCD_GetXSize>
+ 800275c:	4603      	mov	r3, r0
+ 800275e:	613b      	str	r3, [r7, #16]
+  layer_cfg.WindowY0 = 0;
+ 8002760:	2300      	movs	r3, #0
+ 8002762:	617b      	str	r3, [r7, #20]
+  layer_cfg.WindowY1 = BSP_LCD_GetYSize(); 
+ 8002764:	f7ff ffdc 	bl	8002720 <BSP_LCD_GetYSize>
+ 8002768:	4603      	mov	r3, r0
+ 800276a:	61bb      	str	r3, [r7, #24]
+  layer_cfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
+ 800276c:	2300      	movs	r3, #0
+ 800276e:	61fb      	str	r3, [r7, #28]
+  layer_cfg.FBStartAdress = FB_Address;
+ 8002770:	683b      	ldr	r3, [r7, #0]
+ 8002772:	633b      	str	r3, [r7, #48]	; 0x30
+  layer_cfg.Alpha = 255;
+ 8002774:	23ff      	movs	r3, #255	; 0xff
+ 8002776:	623b      	str	r3, [r7, #32]
+  layer_cfg.Alpha0 = 0;
+ 8002778:	2300      	movs	r3, #0
+ 800277a:	627b      	str	r3, [r7, #36]	; 0x24
+  layer_cfg.Backcolor.Blue = 0;
+ 800277c:	2300      	movs	r3, #0
+ 800277e:	f887 303c 	strb.w	r3, [r7, #60]	; 0x3c
+  layer_cfg.Backcolor.Green = 0;
+ 8002782:	2300      	movs	r3, #0
+ 8002784:	f887 303d 	strb.w	r3, [r7, #61]	; 0x3d
+  layer_cfg.Backcolor.Red = 0;
+ 8002788:	2300      	movs	r3, #0
+ 800278a:	f887 303e 	strb.w	r3, [r7, #62]	; 0x3e
+  layer_cfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
+ 800278e:	f44f 63c0 	mov.w	r3, #1536	; 0x600
+ 8002792:	62bb      	str	r3, [r7, #40]	; 0x28
+  layer_cfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
+ 8002794:	2307      	movs	r3, #7
+ 8002796:	62fb      	str	r3, [r7, #44]	; 0x2c
+  layer_cfg.ImageWidth = BSP_LCD_GetXSize();
+ 8002798:	f7ff ffae 	bl	80026f8 <BSP_LCD_GetXSize>
+ 800279c:	4603      	mov	r3, r0
+ 800279e:	637b      	str	r3, [r7, #52]	; 0x34
+  layer_cfg.ImageHeight = BSP_LCD_GetYSize();
+ 80027a0:	f7ff ffbe 	bl	8002720 <BSP_LCD_GetYSize>
+ 80027a4:	4603      	mov	r3, r0
+ 80027a6:	63bb      	str	r3, [r7, #56]	; 0x38
+  
+  HAL_LTDC_ConfigLayer(&hLtdcHandler, &layer_cfg, LayerIndex); 
+ 80027a8:	88fa      	ldrh	r2, [r7, #6]
+ 80027aa:	f107 030c 	add.w	r3, r7, #12
+ 80027ae:	4619      	mov	r1, r3
+ 80027b0:	4812      	ldr	r0, [pc, #72]	; (80027fc <BSP_LCD_LayerDefaultInit+0xb4>)
+ 80027b2:	f006 f861 	bl	8008878 <HAL_LTDC_ConfigLayer>
+
+  DrawProp[LayerIndex].BackColor = LCD_COLOR_WHITE;
+ 80027b6:	88fa      	ldrh	r2, [r7, #6]
+ 80027b8:	4911      	ldr	r1, [pc, #68]	; (8002800 <BSP_LCD_LayerDefaultInit+0xb8>)
+ 80027ba:	4613      	mov	r3, r2
+ 80027bc:	005b      	lsls	r3, r3, #1
+ 80027be:	4413      	add	r3, r2
+ 80027c0:	009b      	lsls	r3, r3, #2
+ 80027c2:	440b      	add	r3, r1
+ 80027c4:	3304      	adds	r3, #4
+ 80027c6:	f04f 32ff 	mov.w	r2, #4294967295
+ 80027ca:	601a      	str	r2, [r3, #0]
+  DrawProp[LayerIndex].pFont     = &Font24;
+ 80027cc:	88fa      	ldrh	r2, [r7, #6]
+ 80027ce:	490c      	ldr	r1, [pc, #48]	; (8002800 <BSP_LCD_LayerDefaultInit+0xb8>)
+ 80027d0:	4613      	mov	r3, r2
+ 80027d2:	005b      	lsls	r3, r3, #1
+ 80027d4:	4413      	add	r3, r2
+ 80027d6:	009b      	lsls	r3, r3, #2
+ 80027d8:	440b      	add	r3, r1
+ 80027da:	3308      	adds	r3, #8
+ 80027dc:	4a09      	ldr	r2, [pc, #36]	; (8002804 <BSP_LCD_LayerDefaultInit+0xbc>)
+ 80027de:	601a      	str	r2, [r3, #0]
+  DrawProp[LayerIndex].TextColor = LCD_COLOR_BLACK; 
+ 80027e0:	88fa      	ldrh	r2, [r7, #6]
+ 80027e2:	4907      	ldr	r1, [pc, #28]	; (8002800 <BSP_LCD_LayerDefaultInit+0xb8>)
+ 80027e4:	4613      	mov	r3, r2
+ 80027e6:	005b      	lsls	r3, r3, #1
+ 80027e8:	4413      	add	r3, r2
+ 80027ea:	009b      	lsls	r3, r3, #2
+ 80027ec:	440b      	add	r3, r1
+ 80027ee:	f04f 427f 	mov.w	r2, #4278190080	; 0xff000000
+ 80027f2:	601a      	str	r2, [r3, #0]
+}
+ 80027f4:	bf00      	nop
+ 80027f6:	3740      	adds	r7, #64	; 0x40
+ 80027f8:	46bd      	mov	sp, r7
+ 80027fa:	bd80      	pop	{r7, pc}
+ 80027fc:	20008e5c 	.word	0x20008e5c
+ 8002800:	2000040c 	.word	0x2000040c
+ 8002804:	2000003c 	.word	0x2000003c
+
+08002808 <BSP_LCD_SelectLayer>:
+  * @brief  Selects the LCD Layer.
+  * @param  LayerIndex: Layer foreground or background
+  * @retval None
+  */
+void BSP_LCD_SelectLayer(uint32_t LayerIndex)
+{
+ 8002808:	b480      	push	{r7}
+ 800280a:	b083      	sub	sp, #12
+ 800280c:	af00      	add	r7, sp, #0
+ 800280e:	6078      	str	r0, [r7, #4]
+  ActiveLayer = LayerIndex;
+ 8002810:	4a04      	ldr	r2, [pc, #16]	; (8002824 <BSP_LCD_SelectLayer+0x1c>)
+ 8002812:	687b      	ldr	r3, [r7, #4]
+ 8002814:	6013      	str	r3, [r2, #0]
+} 
+ 8002816:	bf00      	nop
+ 8002818:	370c      	adds	r7, #12
+ 800281a:	46bd      	mov	sp, r7
+ 800281c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002820:	4770      	bx	lr
+ 8002822:	bf00      	nop
+ 8002824:	20000408 	.word	0x20000408
+
+08002828 <BSP_LCD_SetTextColor>:
+  * @brief  Sets the LCD text color.
+  * @param  Color: Text color code ARGB(8-8-8-8)
+  * @retval None
+  */
+void BSP_LCD_SetTextColor(uint32_t Color)
+{
+ 8002828:	b480      	push	{r7}
+ 800282a:	b083      	sub	sp, #12
+ 800282c:	af00      	add	r7, sp, #0
+ 800282e:	6078      	str	r0, [r7, #4]
+  DrawProp[ActiveLayer].TextColor = Color;
+ 8002830:	4b07      	ldr	r3, [pc, #28]	; (8002850 <BSP_LCD_SetTextColor+0x28>)
+ 8002832:	681a      	ldr	r2, [r3, #0]
+ 8002834:	4907      	ldr	r1, [pc, #28]	; (8002854 <BSP_LCD_SetTextColor+0x2c>)
+ 8002836:	4613      	mov	r3, r2
+ 8002838:	005b      	lsls	r3, r3, #1
+ 800283a:	4413      	add	r3, r2
+ 800283c:	009b      	lsls	r3, r3, #2
+ 800283e:	440b      	add	r3, r1
+ 8002840:	687a      	ldr	r2, [r7, #4]
+ 8002842:	601a      	str	r2, [r3, #0]
+}
+ 8002844:	bf00      	nop
+ 8002846:	370c      	adds	r7, #12
+ 8002848:	46bd      	mov	sp, r7
+ 800284a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800284e:	4770      	bx	lr
+ 8002850:	20000408 	.word	0x20000408
+ 8002854:	2000040c 	.word	0x2000040c
+
+08002858 <BSP_LCD_SetBackColor>:
+  * @brief  Sets the LCD background color.
+  * @param  Color: Layer background color code ARGB(8-8-8-8)
+  * @retval None
+  */
+void BSP_LCD_SetBackColor(uint32_t Color)
+{
+ 8002858:	b480      	push	{r7}
+ 800285a:	b083      	sub	sp, #12
+ 800285c:	af00      	add	r7, sp, #0
+ 800285e:	6078      	str	r0, [r7, #4]
+  DrawProp[ActiveLayer].BackColor = Color;
+ 8002860:	4b08      	ldr	r3, [pc, #32]	; (8002884 <BSP_LCD_SetBackColor+0x2c>)
+ 8002862:	681a      	ldr	r2, [r3, #0]
+ 8002864:	4908      	ldr	r1, [pc, #32]	; (8002888 <BSP_LCD_SetBackColor+0x30>)
+ 8002866:	4613      	mov	r3, r2
+ 8002868:	005b      	lsls	r3, r3, #1
+ 800286a:	4413      	add	r3, r2
+ 800286c:	009b      	lsls	r3, r3, #2
+ 800286e:	440b      	add	r3, r1
+ 8002870:	3304      	adds	r3, #4
+ 8002872:	687a      	ldr	r2, [r7, #4]
+ 8002874:	601a      	str	r2, [r3, #0]
+}
+ 8002876:	bf00      	nop
+ 8002878:	370c      	adds	r7, #12
+ 800287a:	46bd      	mov	sp, r7
+ 800287c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002880:	4770      	bx	lr
+ 8002882:	bf00      	nop
+ 8002884:	20000408 	.word	0x20000408
+ 8002888:	2000040c 	.word	0x2000040c
+
+0800288c <BSP_LCD_SetFont>:
+  * @brief  Sets the LCD text font.
+  * @param  fonts: Layer font to be used
+  * @retval None
+  */
+void BSP_LCD_SetFont(sFONT *fonts)
+{
+ 800288c:	b480      	push	{r7}
+ 800288e:	b083      	sub	sp, #12
+ 8002890:	af00      	add	r7, sp, #0
+ 8002892:	6078      	str	r0, [r7, #4]
+  DrawProp[ActiveLayer].pFont = fonts;
+ 8002894:	4b08      	ldr	r3, [pc, #32]	; (80028b8 <BSP_LCD_SetFont+0x2c>)
+ 8002896:	681a      	ldr	r2, [r3, #0]
+ 8002898:	4908      	ldr	r1, [pc, #32]	; (80028bc <BSP_LCD_SetFont+0x30>)
+ 800289a:	4613      	mov	r3, r2
+ 800289c:	005b      	lsls	r3, r3, #1
+ 800289e:	4413      	add	r3, r2
+ 80028a0:	009b      	lsls	r3, r3, #2
+ 80028a2:	440b      	add	r3, r1
+ 80028a4:	3308      	adds	r3, #8
+ 80028a6:	687a      	ldr	r2, [r7, #4]
+ 80028a8:	601a      	str	r2, [r3, #0]
+}
+ 80028aa:	bf00      	nop
+ 80028ac:	370c      	adds	r7, #12
+ 80028ae:	46bd      	mov	sp, r7
+ 80028b0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80028b4:	4770      	bx	lr
+ 80028b6:	bf00      	nop
+ 80028b8:	20000408 	.word	0x20000408
+ 80028bc:	2000040c 	.word	0x2000040c
+
+080028c0 <BSP_LCD_GetFont>:
+/**
+  * @brief  Gets the LCD text font.
+  * @retval Used layer font
+  */
+sFONT *BSP_LCD_GetFont(void)
+{
+ 80028c0:	b480      	push	{r7}
+ 80028c2:	af00      	add	r7, sp, #0
+  return DrawProp[ActiveLayer].pFont;
+ 80028c4:	4b07      	ldr	r3, [pc, #28]	; (80028e4 <BSP_LCD_GetFont+0x24>)
+ 80028c6:	681a      	ldr	r2, [r3, #0]
+ 80028c8:	4907      	ldr	r1, [pc, #28]	; (80028e8 <BSP_LCD_GetFont+0x28>)
+ 80028ca:	4613      	mov	r3, r2
+ 80028cc:	005b      	lsls	r3, r3, #1
+ 80028ce:	4413      	add	r3, r2
+ 80028d0:	009b      	lsls	r3, r3, #2
+ 80028d2:	440b      	add	r3, r1
+ 80028d4:	3308      	adds	r3, #8
+ 80028d6:	681b      	ldr	r3, [r3, #0]
+}
+ 80028d8:	4618      	mov	r0, r3
+ 80028da:	46bd      	mov	sp, r7
+ 80028dc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80028e0:	4770      	bx	lr
+ 80028e2:	bf00      	nop
+ 80028e4:	20000408 	.word	0x20000408
+ 80028e8:	2000040c 	.word	0x2000040c
+
+080028ec <BSP_LCD_Clear>:
+  * @brief  Clears the hole LCD.
+  * @param  Color: Color of the background
+  * @retval None
+  */
+void BSP_LCD_Clear(uint32_t Color)
+{ 
+ 80028ec:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 80028ee:	b085      	sub	sp, #20
+ 80028f0:	af02      	add	r7, sp, #8
+ 80028f2:	6078      	str	r0, [r7, #4]
+  /* Clear the LCD */ 
+  LL_FillBuffer(ActiveLayer, (uint32_t *)(hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress), BSP_LCD_GetXSize(), BSP_LCD_GetYSize(), 0, Color);
+ 80028f4:	4b0f      	ldr	r3, [pc, #60]	; (8002934 <BSP_LCD_Clear+0x48>)
+ 80028f6:	681c      	ldr	r4, [r3, #0]
+ 80028f8:	4b0e      	ldr	r3, [pc, #56]	; (8002934 <BSP_LCD_Clear+0x48>)
+ 80028fa:	681b      	ldr	r3, [r3, #0]
+ 80028fc:	4a0e      	ldr	r2, [pc, #56]	; (8002938 <BSP_LCD_Clear+0x4c>)
+ 80028fe:	2134      	movs	r1, #52	; 0x34
+ 8002900:	fb01 f303 	mul.w	r3, r1, r3
+ 8002904:	4413      	add	r3, r2
+ 8002906:	335c      	adds	r3, #92	; 0x5c
+ 8002908:	681b      	ldr	r3, [r3, #0]
+ 800290a:	461d      	mov	r5, r3
+ 800290c:	f7ff fef4 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8002910:	4606      	mov	r6, r0
+ 8002912:	f7ff ff05 	bl	8002720 <BSP_LCD_GetYSize>
+ 8002916:	4602      	mov	r2, r0
+ 8002918:	687b      	ldr	r3, [r7, #4]
+ 800291a:	9301      	str	r3, [sp, #4]
+ 800291c:	2300      	movs	r3, #0
+ 800291e:	9300      	str	r3, [sp, #0]
+ 8002920:	4613      	mov	r3, r2
+ 8002922:	4632      	mov	r2, r6
+ 8002924:	4629      	mov	r1, r5
+ 8002926:	4620      	mov	r0, r4
+ 8002928:	f000 fda4 	bl	8003474 <LL_FillBuffer>
+}
+ 800292c:	bf00      	nop
+ 800292e:	370c      	adds	r7, #12
+ 8002930:	46bd      	mov	sp, r7
+ 8002932:	bdf0      	pop	{r4, r5, r6, r7, pc}
+ 8002934:	20000408 	.word	0x20000408
+ 8002938:	20008e5c 	.word	0x20008e5c
+
+0800293c <BSP_LCD_DisplayChar>:
+  * @param  Ascii: Character ascii code
+  *           This parameter must be a number between Min_Data = 0x20 and Max_Data = 0x7E 
+  * @retval None
+  */
+void BSP_LCD_DisplayChar(uint16_t Xpos, uint16_t Ypos, uint8_t Ascii)
+{
+ 800293c:	b590      	push	{r4, r7, lr}
+ 800293e:	b083      	sub	sp, #12
+ 8002940:	af00      	add	r7, sp, #0
+ 8002942:	4603      	mov	r3, r0
+ 8002944:	80fb      	strh	r3, [r7, #6]
+ 8002946:	460b      	mov	r3, r1
+ 8002948:	80bb      	strh	r3, [r7, #4]
+ 800294a:	4613      	mov	r3, r2
+ 800294c:	70fb      	strb	r3, [r7, #3]
+  DrawChar(Xpos, Ypos, &DrawProp[ActiveLayer].pFont->table[(Ascii-' ') *\
+ 800294e:	4b1b      	ldr	r3, [pc, #108]	; (80029bc <BSP_LCD_DisplayChar+0x80>)
+ 8002950:	681a      	ldr	r2, [r3, #0]
+ 8002952:	491b      	ldr	r1, [pc, #108]	; (80029c0 <BSP_LCD_DisplayChar+0x84>)
+ 8002954:	4613      	mov	r3, r2
+ 8002956:	005b      	lsls	r3, r3, #1
+ 8002958:	4413      	add	r3, r2
+ 800295a:	009b      	lsls	r3, r3, #2
+ 800295c:	440b      	add	r3, r1
+ 800295e:	3308      	adds	r3, #8
+ 8002960:	681b      	ldr	r3, [r3, #0]
+ 8002962:	6819      	ldr	r1, [r3, #0]
+ 8002964:	78fb      	ldrb	r3, [r7, #3]
+ 8002966:	f1a3 0020 	sub.w	r0, r3, #32
+    DrawProp[ActiveLayer].pFont->Height * ((DrawProp[ActiveLayer].pFont->Width + 7) / 8)]);
+ 800296a:	4b14      	ldr	r3, [pc, #80]	; (80029bc <BSP_LCD_DisplayChar+0x80>)
+ 800296c:	681a      	ldr	r2, [r3, #0]
+ 800296e:	4c14      	ldr	r4, [pc, #80]	; (80029c0 <BSP_LCD_DisplayChar+0x84>)
+ 8002970:	4613      	mov	r3, r2
+ 8002972:	005b      	lsls	r3, r3, #1
+ 8002974:	4413      	add	r3, r2
+ 8002976:	009b      	lsls	r3, r3, #2
+ 8002978:	4423      	add	r3, r4
+ 800297a:	3308      	adds	r3, #8
+ 800297c:	681b      	ldr	r3, [r3, #0]
+ 800297e:	88db      	ldrh	r3, [r3, #6]
+  DrawChar(Xpos, Ypos, &DrawProp[ActiveLayer].pFont->table[(Ascii-' ') *\
+ 8002980:	fb03 f000 	mul.w	r0, r3, r0
+    DrawProp[ActiveLayer].pFont->Height * ((DrawProp[ActiveLayer].pFont->Width + 7) / 8)]);
+ 8002984:	4b0d      	ldr	r3, [pc, #52]	; (80029bc <BSP_LCD_DisplayChar+0x80>)
+ 8002986:	681a      	ldr	r2, [r3, #0]
+ 8002988:	4c0d      	ldr	r4, [pc, #52]	; (80029c0 <BSP_LCD_DisplayChar+0x84>)
+ 800298a:	4613      	mov	r3, r2
+ 800298c:	005b      	lsls	r3, r3, #1
+ 800298e:	4413      	add	r3, r2
+ 8002990:	009b      	lsls	r3, r3, #2
+ 8002992:	4423      	add	r3, r4
+ 8002994:	3308      	adds	r3, #8
+ 8002996:	681b      	ldr	r3, [r3, #0]
+ 8002998:	889b      	ldrh	r3, [r3, #4]
+ 800299a:	3307      	adds	r3, #7
+ 800299c:	2b00      	cmp	r3, #0
+ 800299e:	da00      	bge.n	80029a2 <BSP_LCD_DisplayChar+0x66>
+ 80029a0:	3307      	adds	r3, #7
+ 80029a2:	10db      	asrs	r3, r3, #3
+ 80029a4:	fb03 f300 	mul.w	r3, r3, r0
+  DrawChar(Xpos, Ypos, &DrawProp[ActiveLayer].pFont->table[(Ascii-' ') *\
+ 80029a8:	18ca      	adds	r2, r1, r3
+ 80029aa:	88b9      	ldrh	r1, [r7, #4]
+ 80029ac:	88fb      	ldrh	r3, [r7, #6]
+ 80029ae:	4618      	mov	r0, r3
+ 80029b0:	f000 fca8 	bl	8003304 <DrawChar>
+}
+ 80029b4:	bf00      	nop
+ 80029b6:	370c      	adds	r7, #12
+ 80029b8:	46bd      	mov	sp, r7
+ 80029ba:	bd90      	pop	{r4, r7, pc}
+ 80029bc:	20000408 	.word	0x20000408
+ 80029c0:	2000040c 	.word	0x2000040c
+
+080029c4 <BSP_LCD_DisplayStringAt>:
+  *            @arg  RIGHT_MODE
+  *            @arg  LEFT_MODE   
+  * @retval None
+  */
+void BSP_LCD_DisplayStringAt(uint16_t Xpos, uint16_t Ypos, uint8_t *Text, Text_AlignModeTypdef Mode)
+{
+ 80029c4:	b5b0      	push	{r4, r5, r7, lr}
+ 80029c6:	b088      	sub	sp, #32
+ 80029c8:	af00      	add	r7, sp, #0
+ 80029ca:	60ba      	str	r2, [r7, #8]
+ 80029cc:	461a      	mov	r2, r3
+ 80029ce:	4603      	mov	r3, r0
+ 80029d0:	81fb      	strh	r3, [r7, #14]
+ 80029d2:	460b      	mov	r3, r1
+ 80029d4:	81bb      	strh	r3, [r7, #12]
+ 80029d6:	4613      	mov	r3, r2
+ 80029d8:	71fb      	strb	r3, [r7, #7]
+  uint16_t ref_column = 1, i = 0;
+ 80029da:	2301      	movs	r3, #1
+ 80029dc:	83fb      	strh	r3, [r7, #30]
+ 80029de:	2300      	movs	r3, #0
+ 80029e0:	83bb      	strh	r3, [r7, #28]
+  uint32_t size = 0, xsize = 0; 
+ 80029e2:	2300      	movs	r3, #0
+ 80029e4:	61bb      	str	r3, [r7, #24]
+ 80029e6:	2300      	movs	r3, #0
+ 80029e8:	613b      	str	r3, [r7, #16]
+  uint8_t  *ptr = Text;
+ 80029ea:	68bb      	ldr	r3, [r7, #8]
+ 80029ec:	617b      	str	r3, [r7, #20]
+  
+  /* Get the text size */
+  while (*ptr++) size ++ ;
+ 80029ee:	e002      	b.n	80029f6 <BSP_LCD_DisplayStringAt+0x32>
+ 80029f0:	69bb      	ldr	r3, [r7, #24]
+ 80029f2:	3301      	adds	r3, #1
+ 80029f4:	61bb      	str	r3, [r7, #24]
+ 80029f6:	697b      	ldr	r3, [r7, #20]
+ 80029f8:	1c5a      	adds	r2, r3, #1
+ 80029fa:	617a      	str	r2, [r7, #20]
+ 80029fc:	781b      	ldrb	r3, [r3, #0]
+ 80029fe:	2b00      	cmp	r3, #0
+ 8002a00:	d1f6      	bne.n	80029f0 <BSP_LCD_DisplayStringAt+0x2c>
+  
+  /* Characters number per line */
+  xsize = (BSP_LCD_GetXSize()/DrawProp[ActiveLayer].pFont->Width);
+ 8002a02:	f7ff fe79 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8002a06:	4b4f      	ldr	r3, [pc, #316]	; (8002b44 <BSP_LCD_DisplayStringAt+0x180>)
+ 8002a08:	681a      	ldr	r2, [r3, #0]
+ 8002a0a:	494f      	ldr	r1, [pc, #316]	; (8002b48 <BSP_LCD_DisplayStringAt+0x184>)
+ 8002a0c:	4613      	mov	r3, r2
+ 8002a0e:	005b      	lsls	r3, r3, #1
+ 8002a10:	4413      	add	r3, r2
+ 8002a12:	009b      	lsls	r3, r3, #2
+ 8002a14:	440b      	add	r3, r1
+ 8002a16:	3308      	adds	r3, #8
+ 8002a18:	681b      	ldr	r3, [r3, #0]
+ 8002a1a:	889b      	ldrh	r3, [r3, #4]
+ 8002a1c:	fbb0 f3f3 	udiv	r3, r0, r3
+ 8002a20:	613b      	str	r3, [r7, #16]
+  
+  switch (Mode)
+ 8002a22:	79fb      	ldrb	r3, [r7, #7]
+ 8002a24:	2b02      	cmp	r3, #2
+ 8002a26:	d01c      	beq.n	8002a62 <BSP_LCD_DisplayStringAt+0x9e>
+ 8002a28:	2b03      	cmp	r3, #3
+ 8002a2a:	d017      	beq.n	8002a5c <BSP_LCD_DisplayStringAt+0x98>
+ 8002a2c:	2b01      	cmp	r3, #1
+ 8002a2e:	d12e      	bne.n	8002a8e <BSP_LCD_DisplayStringAt+0xca>
+  {
+  case CENTER_MODE:
+    {
+      ref_column = Xpos + ((xsize - size)* DrawProp[ActiveLayer].pFont->Width) / 2;
+ 8002a30:	693a      	ldr	r2, [r7, #16]
+ 8002a32:	69bb      	ldr	r3, [r7, #24]
+ 8002a34:	1ad1      	subs	r1, r2, r3
+ 8002a36:	4b43      	ldr	r3, [pc, #268]	; (8002b44 <BSP_LCD_DisplayStringAt+0x180>)
+ 8002a38:	681a      	ldr	r2, [r3, #0]
+ 8002a3a:	4843      	ldr	r0, [pc, #268]	; (8002b48 <BSP_LCD_DisplayStringAt+0x184>)
+ 8002a3c:	4613      	mov	r3, r2
+ 8002a3e:	005b      	lsls	r3, r3, #1
+ 8002a40:	4413      	add	r3, r2
+ 8002a42:	009b      	lsls	r3, r3, #2
+ 8002a44:	4403      	add	r3, r0
+ 8002a46:	3308      	adds	r3, #8
+ 8002a48:	681b      	ldr	r3, [r3, #0]
+ 8002a4a:	889b      	ldrh	r3, [r3, #4]
+ 8002a4c:	fb03 f301 	mul.w	r3, r3, r1
+ 8002a50:	085b      	lsrs	r3, r3, #1
+ 8002a52:	b29a      	uxth	r2, r3
+ 8002a54:	89fb      	ldrh	r3, [r7, #14]
+ 8002a56:	4413      	add	r3, r2
+ 8002a58:	83fb      	strh	r3, [r7, #30]
+      break;
+ 8002a5a:	e01b      	b.n	8002a94 <BSP_LCD_DisplayStringAt+0xd0>
+    }
+  case LEFT_MODE:
+    {
+      ref_column = Xpos;
+ 8002a5c:	89fb      	ldrh	r3, [r7, #14]
+ 8002a5e:	83fb      	strh	r3, [r7, #30]
+      break;
+ 8002a60:	e018      	b.n	8002a94 <BSP_LCD_DisplayStringAt+0xd0>
+    }
+  case RIGHT_MODE:
+    {
+      ref_column = - Xpos + ((xsize - size)*DrawProp[ActiveLayer].pFont->Width);
+ 8002a62:	693a      	ldr	r2, [r7, #16]
+ 8002a64:	69bb      	ldr	r3, [r7, #24]
+ 8002a66:	1ad3      	subs	r3, r2, r3
+ 8002a68:	b299      	uxth	r1, r3
+ 8002a6a:	4b36      	ldr	r3, [pc, #216]	; (8002b44 <BSP_LCD_DisplayStringAt+0x180>)
+ 8002a6c:	681a      	ldr	r2, [r3, #0]
+ 8002a6e:	4836      	ldr	r0, [pc, #216]	; (8002b48 <BSP_LCD_DisplayStringAt+0x184>)
+ 8002a70:	4613      	mov	r3, r2
+ 8002a72:	005b      	lsls	r3, r3, #1
+ 8002a74:	4413      	add	r3, r2
+ 8002a76:	009b      	lsls	r3, r3, #2
+ 8002a78:	4403      	add	r3, r0
+ 8002a7a:	3308      	adds	r3, #8
+ 8002a7c:	681b      	ldr	r3, [r3, #0]
+ 8002a7e:	889b      	ldrh	r3, [r3, #4]
+ 8002a80:	fb11 f303 	smulbb	r3, r1, r3
+ 8002a84:	b29a      	uxth	r2, r3
+ 8002a86:	89fb      	ldrh	r3, [r7, #14]
+ 8002a88:	1ad3      	subs	r3, r2, r3
+ 8002a8a:	83fb      	strh	r3, [r7, #30]
+      break;
+ 8002a8c:	e002      	b.n	8002a94 <BSP_LCD_DisplayStringAt+0xd0>
+    }    
+  default:
+    {
+      ref_column = Xpos;
+ 8002a8e:	89fb      	ldrh	r3, [r7, #14]
+ 8002a90:	83fb      	strh	r3, [r7, #30]
+      break;
+ 8002a92:	bf00      	nop
+    }
+  }
+  
+  /* Check that the Start column is located in the screen */
+  if ((ref_column < 1) || (ref_column >= 0x8000))
+ 8002a94:	8bfb      	ldrh	r3, [r7, #30]
+ 8002a96:	2b00      	cmp	r3, #0
+ 8002a98:	d003      	beq.n	8002aa2 <BSP_LCD_DisplayStringAt+0xde>
+ 8002a9a:	f9b7 301e 	ldrsh.w	r3, [r7, #30]
+ 8002a9e:	2b00      	cmp	r3, #0
+ 8002aa0:	da1d      	bge.n	8002ade <BSP_LCD_DisplayStringAt+0x11a>
+  {
+    ref_column = 1;
+ 8002aa2:	2301      	movs	r3, #1
+ 8002aa4:	83fb      	strh	r3, [r7, #30]
+  }
+
+  /* Send the string character by character on LCD */
+  while ((*Text != 0) & (((BSP_LCD_GetXSize() - (i*DrawProp[ActiveLayer].pFont->Width)) & 0xFFFF) >= DrawProp[ActiveLayer].pFont->Width))
+ 8002aa6:	e01a      	b.n	8002ade <BSP_LCD_DisplayStringAt+0x11a>
+  {
+    /* Display one character on LCD */
+    BSP_LCD_DisplayChar(ref_column, Ypos, *Text);
+ 8002aa8:	68bb      	ldr	r3, [r7, #8]
+ 8002aaa:	781a      	ldrb	r2, [r3, #0]
+ 8002aac:	89b9      	ldrh	r1, [r7, #12]
+ 8002aae:	8bfb      	ldrh	r3, [r7, #30]
+ 8002ab0:	4618      	mov	r0, r3
+ 8002ab2:	f7ff ff43 	bl	800293c <BSP_LCD_DisplayChar>
+    /* Decrement the column position by 16 */
+    ref_column += DrawProp[ActiveLayer].pFont->Width;
+ 8002ab6:	4b23      	ldr	r3, [pc, #140]	; (8002b44 <BSP_LCD_DisplayStringAt+0x180>)
+ 8002ab8:	681a      	ldr	r2, [r3, #0]
+ 8002aba:	4923      	ldr	r1, [pc, #140]	; (8002b48 <BSP_LCD_DisplayStringAt+0x184>)
+ 8002abc:	4613      	mov	r3, r2
+ 8002abe:	005b      	lsls	r3, r3, #1
+ 8002ac0:	4413      	add	r3, r2
+ 8002ac2:	009b      	lsls	r3, r3, #2
+ 8002ac4:	440b      	add	r3, r1
+ 8002ac6:	3308      	adds	r3, #8
+ 8002ac8:	681b      	ldr	r3, [r3, #0]
+ 8002aca:	889a      	ldrh	r2, [r3, #4]
+ 8002acc:	8bfb      	ldrh	r3, [r7, #30]
+ 8002ace:	4413      	add	r3, r2
+ 8002ad0:	83fb      	strh	r3, [r7, #30]
+    /* Point on the next character */
+    Text++;
+ 8002ad2:	68bb      	ldr	r3, [r7, #8]
+ 8002ad4:	3301      	adds	r3, #1
+ 8002ad6:	60bb      	str	r3, [r7, #8]
+    i++;
+ 8002ad8:	8bbb      	ldrh	r3, [r7, #28]
+ 8002ada:	3301      	adds	r3, #1
+ 8002adc:	83bb      	strh	r3, [r7, #28]
+  while ((*Text != 0) & (((BSP_LCD_GetXSize() - (i*DrawProp[ActiveLayer].pFont->Width)) & 0xFFFF) >= DrawProp[ActiveLayer].pFont->Width))
+ 8002ade:	68bb      	ldr	r3, [r7, #8]
+ 8002ae0:	781b      	ldrb	r3, [r3, #0]
+ 8002ae2:	2b00      	cmp	r3, #0
+ 8002ae4:	bf14      	ite	ne
+ 8002ae6:	2301      	movne	r3, #1
+ 8002ae8:	2300      	moveq	r3, #0
+ 8002aea:	b2dc      	uxtb	r4, r3
+ 8002aec:	f7ff fe04 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8002af0:	4605      	mov	r5, r0
+ 8002af2:	8bb9      	ldrh	r1, [r7, #28]
+ 8002af4:	4b13      	ldr	r3, [pc, #76]	; (8002b44 <BSP_LCD_DisplayStringAt+0x180>)
+ 8002af6:	681a      	ldr	r2, [r3, #0]
+ 8002af8:	4813      	ldr	r0, [pc, #76]	; (8002b48 <BSP_LCD_DisplayStringAt+0x184>)
+ 8002afa:	4613      	mov	r3, r2
+ 8002afc:	005b      	lsls	r3, r3, #1
+ 8002afe:	4413      	add	r3, r2
+ 8002b00:	009b      	lsls	r3, r3, #2
+ 8002b02:	4403      	add	r3, r0
+ 8002b04:	3308      	adds	r3, #8
+ 8002b06:	681b      	ldr	r3, [r3, #0]
+ 8002b08:	889b      	ldrh	r3, [r3, #4]
+ 8002b0a:	fb03 f301 	mul.w	r3, r3, r1
+ 8002b0e:	1aeb      	subs	r3, r5, r3
+ 8002b10:	b299      	uxth	r1, r3
+ 8002b12:	4b0c      	ldr	r3, [pc, #48]	; (8002b44 <BSP_LCD_DisplayStringAt+0x180>)
+ 8002b14:	681a      	ldr	r2, [r3, #0]
+ 8002b16:	480c      	ldr	r0, [pc, #48]	; (8002b48 <BSP_LCD_DisplayStringAt+0x184>)
+ 8002b18:	4613      	mov	r3, r2
+ 8002b1a:	005b      	lsls	r3, r3, #1
+ 8002b1c:	4413      	add	r3, r2
+ 8002b1e:	009b      	lsls	r3, r3, #2
+ 8002b20:	4403      	add	r3, r0
+ 8002b22:	3308      	adds	r3, #8
+ 8002b24:	681b      	ldr	r3, [r3, #0]
+ 8002b26:	889b      	ldrh	r3, [r3, #4]
+ 8002b28:	4299      	cmp	r1, r3
+ 8002b2a:	bf2c      	ite	cs
+ 8002b2c:	2301      	movcs	r3, #1
+ 8002b2e:	2300      	movcc	r3, #0
+ 8002b30:	b2db      	uxtb	r3, r3
+ 8002b32:	4023      	ands	r3, r4
+ 8002b34:	b2db      	uxtb	r3, r3
+ 8002b36:	2b00      	cmp	r3, #0
+ 8002b38:	d1b6      	bne.n	8002aa8 <BSP_LCD_DisplayStringAt+0xe4>
+  }  
+}
+ 8002b3a:	bf00      	nop
+ 8002b3c:	3720      	adds	r7, #32
+ 8002b3e:	46bd      	mov	sp, r7
+ 8002b40:	bdb0      	pop	{r4, r5, r7, pc}
+ 8002b42:	bf00      	nop
+ 8002b44:	20000408 	.word	0x20000408
+ 8002b48:	2000040c 	.word	0x2000040c
+
+08002b4c <BSP_LCD_DisplayStringAtLine>:
+  * @param  Line: Line where to display the character shape
+  * @param  ptr: Pointer to string to display on LCD
+  * @retval None
+  */
+void BSP_LCD_DisplayStringAtLine(uint16_t Line, uint8_t *ptr)
+{  
+ 8002b4c:	b580      	push	{r7, lr}
+ 8002b4e:	b082      	sub	sp, #8
+ 8002b50:	af00      	add	r7, sp, #0
+ 8002b52:	4603      	mov	r3, r0
+ 8002b54:	6039      	str	r1, [r7, #0]
+ 8002b56:	80fb      	strh	r3, [r7, #6]
+  BSP_LCD_DisplayStringAt(0, LINE(Line), ptr, LEFT_MODE);
+ 8002b58:	f7ff feb2 	bl	80028c0 <BSP_LCD_GetFont>
+ 8002b5c:	4603      	mov	r3, r0
+ 8002b5e:	88db      	ldrh	r3, [r3, #6]
+ 8002b60:	88fa      	ldrh	r2, [r7, #6]
+ 8002b62:	fb12 f303 	smulbb	r3, r2, r3
+ 8002b66:	b299      	uxth	r1, r3
+ 8002b68:	2303      	movs	r3, #3
+ 8002b6a:	683a      	ldr	r2, [r7, #0]
+ 8002b6c:	2000      	movs	r0, #0
+ 8002b6e:	f7ff ff29 	bl	80029c4 <BSP_LCD_DisplayStringAt>
+}
+ 8002b72:	bf00      	nop
+ 8002b74:	3708      	adds	r7, #8
+ 8002b76:	46bd      	mov	sp, r7
+ 8002b78:	bd80      	pop	{r7, pc}
+	...
+
+08002b7c <BSP_LCD_DrawHLine>:
+  * @param  Ypos: Y position
+  * @param  Length: Line length
+  * @retval None
+  */
+void BSP_LCD_DrawHLine(uint16_t Xpos, uint16_t Ypos, uint16_t Length)
+{
+ 8002b7c:	b5b0      	push	{r4, r5, r7, lr}
+ 8002b7e:	b086      	sub	sp, #24
+ 8002b80:	af02      	add	r7, sp, #8
+ 8002b82:	4603      	mov	r3, r0
+ 8002b84:	80fb      	strh	r3, [r7, #6]
+ 8002b86:	460b      	mov	r3, r1
+ 8002b88:	80bb      	strh	r3, [r7, #4]
+ 8002b8a:	4613      	mov	r3, r2
+ 8002b8c:	807b      	strh	r3, [r7, #2]
+  uint32_t  Xaddress = 0;
+ 8002b8e:	2300      	movs	r3, #0
+ 8002b90:	60fb      	str	r3, [r7, #12]
+  
+  /* Get the line address */
+  if(hLtdcHandler.LayerCfg[ActiveLayer].PixelFormat == LTDC_PIXEL_FORMAT_RGB565)
+ 8002b92:	4b26      	ldr	r3, [pc, #152]	; (8002c2c <BSP_LCD_DrawHLine+0xb0>)
+ 8002b94:	681b      	ldr	r3, [r3, #0]
+ 8002b96:	4a26      	ldr	r2, [pc, #152]	; (8002c30 <BSP_LCD_DrawHLine+0xb4>)
+ 8002b98:	2134      	movs	r1, #52	; 0x34
+ 8002b9a:	fb01 f303 	mul.w	r3, r1, r3
+ 8002b9e:	4413      	add	r3, r2
+ 8002ba0:	3348      	adds	r3, #72	; 0x48
+ 8002ba2:	681b      	ldr	r3, [r3, #0]
+ 8002ba4:	2b02      	cmp	r3, #2
+ 8002ba6:	d114      	bne.n	8002bd2 <BSP_LCD_DrawHLine+0x56>
+  { /* RGB565 format */
+    Xaddress = (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress) + 2*(BSP_LCD_GetXSize()*Ypos + Xpos);
+ 8002ba8:	4b20      	ldr	r3, [pc, #128]	; (8002c2c <BSP_LCD_DrawHLine+0xb0>)
+ 8002baa:	681b      	ldr	r3, [r3, #0]
+ 8002bac:	4a20      	ldr	r2, [pc, #128]	; (8002c30 <BSP_LCD_DrawHLine+0xb4>)
+ 8002bae:	2134      	movs	r1, #52	; 0x34
+ 8002bb0:	fb01 f303 	mul.w	r3, r1, r3
+ 8002bb4:	4413      	add	r3, r2
+ 8002bb6:	335c      	adds	r3, #92	; 0x5c
+ 8002bb8:	681c      	ldr	r4, [r3, #0]
+ 8002bba:	f7ff fd9d 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8002bbe:	4602      	mov	r2, r0
+ 8002bc0:	88bb      	ldrh	r3, [r7, #4]
+ 8002bc2:	fb03 f202 	mul.w	r2, r3, r2
+ 8002bc6:	88fb      	ldrh	r3, [r7, #6]
+ 8002bc8:	4413      	add	r3, r2
+ 8002bca:	005b      	lsls	r3, r3, #1
+ 8002bcc:	4423      	add	r3, r4
+ 8002bce:	60fb      	str	r3, [r7, #12]
+ 8002bd0:	e013      	b.n	8002bfa <BSP_LCD_DrawHLine+0x7e>
+  }
+  else
+  { /* ARGB8888 format */
+    Xaddress = (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress) + 4*(BSP_LCD_GetXSize()*Ypos + Xpos);
+ 8002bd2:	4b16      	ldr	r3, [pc, #88]	; (8002c2c <BSP_LCD_DrawHLine+0xb0>)
+ 8002bd4:	681b      	ldr	r3, [r3, #0]
+ 8002bd6:	4a16      	ldr	r2, [pc, #88]	; (8002c30 <BSP_LCD_DrawHLine+0xb4>)
+ 8002bd8:	2134      	movs	r1, #52	; 0x34
+ 8002bda:	fb01 f303 	mul.w	r3, r1, r3
+ 8002bde:	4413      	add	r3, r2
+ 8002be0:	335c      	adds	r3, #92	; 0x5c
+ 8002be2:	681c      	ldr	r4, [r3, #0]
+ 8002be4:	f7ff fd88 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8002be8:	4602      	mov	r2, r0
+ 8002bea:	88bb      	ldrh	r3, [r7, #4]
+ 8002bec:	fb03 f202 	mul.w	r2, r3, r2
+ 8002bf0:	88fb      	ldrh	r3, [r7, #6]
+ 8002bf2:	4413      	add	r3, r2
+ 8002bf4:	009b      	lsls	r3, r3, #2
+ 8002bf6:	4423      	add	r3, r4
+ 8002bf8:	60fb      	str	r3, [r7, #12]
+  }
+  
+  /* Write line */
+  LL_FillBuffer(ActiveLayer, (uint32_t *)Xaddress, Length, 1, 0, DrawProp[ActiveLayer].TextColor);
+ 8002bfa:	4b0c      	ldr	r3, [pc, #48]	; (8002c2c <BSP_LCD_DrawHLine+0xb0>)
+ 8002bfc:	6818      	ldr	r0, [r3, #0]
+ 8002bfe:	68fc      	ldr	r4, [r7, #12]
+ 8002c00:	887d      	ldrh	r5, [r7, #2]
+ 8002c02:	4b0a      	ldr	r3, [pc, #40]	; (8002c2c <BSP_LCD_DrawHLine+0xb0>)
+ 8002c04:	681a      	ldr	r2, [r3, #0]
+ 8002c06:	490b      	ldr	r1, [pc, #44]	; (8002c34 <BSP_LCD_DrawHLine+0xb8>)
+ 8002c08:	4613      	mov	r3, r2
+ 8002c0a:	005b      	lsls	r3, r3, #1
+ 8002c0c:	4413      	add	r3, r2
+ 8002c0e:	009b      	lsls	r3, r3, #2
+ 8002c10:	440b      	add	r3, r1
+ 8002c12:	681b      	ldr	r3, [r3, #0]
+ 8002c14:	9301      	str	r3, [sp, #4]
+ 8002c16:	2300      	movs	r3, #0
+ 8002c18:	9300      	str	r3, [sp, #0]
+ 8002c1a:	2301      	movs	r3, #1
+ 8002c1c:	462a      	mov	r2, r5
+ 8002c1e:	4621      	mov	r1, r4
+ 8002c20:	f000 fc28 	bl	8003474 <LL_FillBuffer>
+}
+ 8002c24:	bf00      	nop
+ 8002c26:	3710      	adds	r7, #16
+ 8002c28:	46bd      	mov	sp, r7
+ 8002c2a:	bdb0      	pop	{r4, r5, r7, pc}
+ 8002c2c:	20000408 	.word	0x20000408
+ 8002c30:	20008e5c 	.word	0x20008e5c
+ 8002c34:	2000040c 	.word	0x2000040c
+
+08002c38 <BSP_LCD_DrawCircle>:
+  * @param  Ypos: Y position
+  * @param  Radius: Circle radius
+  * @retval None
+  */
+void BSP_LCD_DrawCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius)
+{
+ 8002c38:	b590      	push	{r4, r7, lr}
+ 8002c3a:	b087      	sub	sp, #28
+ 8002c3c:	af00      	add	r7, sp, #0
+ 8002c3e:	4603      	mov	r3, r0
+ 8002c40:	80fb      	strh	r3, [r7, #6]
+ 8002c42:	460b      	mov	r3, r1
+ 8002c44:	80bb      	strh	r3, [r7, #4]
+ 8002c46:	4613      	mov	r3, r2
+ 8002c48:	807b      	strh	r3, [r7, #2]
+  int32_t   decision;    /* Decision Variable */ 
+  uint32_t  current_x;   /* Current X Value */
+  uint32_t  current_y;   /* Current Y Value */
+  
+  decision = 3 - (Radius << 1);
+ 8002c4a:	887b      	ldrh	r3, [r7, #2]
+ 8002c4c:	005b      	lsls	r3, r3, #1
+ 8002c4e:	f1c3 0303 	rsb	r3, r3, #3
+ 8002c52:	617b      	str	r3, [r7, #20]
+  current_x = 0;
+ 8002c54:	2300      	movs	r3, #0
+ 8002c56:	613b      	str	r3, [r7, #16]
+  current_y = Radius;
+ 8002c58:	887b      	ldrh	r3, [r7, #2]
+ 8002c5a:	60fb      	str	r3, [r7, #12]
+  
+  while (current_x <= current_y)
+ 8002c5c:	e0cf      	b.n	8002dfe <BSP_LCD_DrawCircle+0x1c6>
+  {
+    BSP_LCD_DrawPixel((Xpos + current_x), (Ypos - current_y), DrawProp[ActiveLayer].TextColor);
+ 8002c5e:	693b      	ldr	r3, [r7, #16]
+ 8002c60:	b29a      	uxth	r2, r3
+ 8002c62:	88fb      	ldrh	r3, [r7, #6]
+ 8002c64:	4413      	add	r3, r2
+ 8002c66:	b298      	uxth	r0, r3
+ 8002c68:	68fb      	ldr	r3, [r7, #12]
+ 8002c6a:	b29b      	uxth	r3, r3
+ 8002c6c:	88ba      	ldrh	r2, [r7, #4]
+ 8002c6e:	1ad3      	subs	r3, r2, r3
+ 8002c70:	b29c      	uxth	r4, r3
+ 8002c72:	4b67      	ldr	r3, [pc, #412]	; (8002e10 <BSP_LCD_DrawCircle+0x1d8>)
+ 8002c74:	681a      	ldr	r2, [r3, #0]
+ 8002c76:	4967      	ldr	r1, [pc, #412]	; (8002e14 <BSP_LCD_DrawCircle+0x1dc>)
+ 8002c78:	4613      	mov	r3, r2
+ 8002c7a:	005b      	lsls	r3, r3, #1
+ 8002c7c:	4413      	add	r3, r2
+ 8002c7e:	009b      	lsls	r3, r3, #2
+ 8002c80:	440b      	add	r3, r1
+ 8002c82:	681b      	ldr	r3, [r3, #0]
+ 8002c84:	461a      	mov	r2, r3
+ 8002c86:	4621      	mov	r1, r4
+ 8002c88:	f000 f8c6 	bl	8002e18 <BSP_LCD_DrawPixel>
+    
+    BSP_LCD_DrawPixel((Xpos - current_x), (Ypos - current_y), DrawProp[ActiveLayer].TextColor);
+ 8002c8c:	693b      	ldr	r3, [r7, #16]
+ 8002c8e:	b29b      	uxth	r3, r3
+ 8002c90:	88fa      	ldrh	r2, [r7, #6]
+ 8002c92:	1ad3      	subs	r3, r2, r3
+ 8002c94:	b298      	uxth	r0, r3
+ 8002c96:	68fb      	ldr	r3, [r7, #12]
+ 8002c98:	b29b      	uxth	r3, r3
+ 8002c9a:	88ba      	ldrh	r2, [r7, #4]
+ 8002c9c:	1ad3      	subs	r3, r2, r3
+ 8002c9e:	b29c      	uxth	r4, r3
+ 8002ca0:	4b5b      	ldr	r3, [pc, #364]	; (8002e10 <BSP_LCD_DrawCircle+0x1d8>)
+ 8002ca2:	681a      	ldr	r2, [r3, #0]
+ 8002ca4:	495b      	ldr	r1, [pc, #364]	; (8002e14 <BSP_LCD_DrawCircle+0x1dc>)
+ 8002ca6:	4613      	mov	r3, r2
+ 8002ca8:	005b      	lsls	r3, r3, #1
+ 8002caa:	4413      	add	r3, r2
+ 8002cac:	009b      	lsls	r3, r3, #2
+ 8002cae:	440b      	add	r3, r1
+ 8002cb0:	681b      	ldr	r3, [r3, #0]
+ 8002cb2:	461a      	mov	r2, r3
+ 8002cb4:	4621      	mov	r1, r4
+ 8002cb6:	f000 f8af 	bl	8002e18 <BSP_LCD_DrawPixel>
+    
+    BSP_LCD_DrawPixel((Xpos + current_y), (Ypos - current_x), DrawProp[ActiveLayer].TextColor);
+ 8002cba:	68fb      	ldr	r3, [r7, #12]
+ 8002cbc:	b29a      	uxth	r2, r3
+ 8002cbe:	88fb      	ldrh	r3, [r7, #6]
+ 8002cc0:	4413      	add	r3, r2
+ 8002cc2:	b298      	uxth	r0, r3
+ 8002cc4:	693b      	ldr	r3, [r7, #16]
+ 8002cc6:	b29b      	uxth	r3, r3
+ 8002cc8:	88ba      	ldrh	r2, [r7, #4]
+ 8002cca:	1ad3      	subs	r3, r2, r3
+ 8002ccc:	b29c      	uxth	r4, r3
+ 8002cce:	4b50      	ldr	r3, [pc, #320]	; (8002e10 <BSP_LCD_DrawCircle+0x1d8>)
+ 8002cd0:	681a      	ldr	r2, [r3, #0]
+ 8002cd2:	4950      	ldr	r1, [pc, #320]	; (8002e14 <BSP_LCD_DrawCircle+0x1dc>)
+ 8002cd4:	4613      	mov	r3, r2
+ 8002cd6:	005b      	lsls	r3, r3, #1
+ 8002cd8:	4413      	add	r3, r2
+ 8002cda:	009b      	lsls	r3, r3, #2
+ 8002cdc:	440b      	add	r3, r1
+ 8002cde:	681b      	ldr	r3, [r3, #0]
+ 8002ce0:	461a      	mov	r2, r3
+ 8002ce2:	4621      	mov	r1, r4
+ 8002ce4:	f000 f898 	bl	8002e18 <BSP_LCD_DrawPixel>
+    
+    BSP_LCD_DrawPixel((Xpos - current_y), (Ypos - current_x), DrawProp[ActiveLayer].TextColor);
+ 8002ce8:	68fb      	ldr	r3, [r7, #12]
+ 8002cea:	b29b      	uxth	r3, r3
+ 8002cec:	88fa      	ldrh	r2, [r7, #6]
+ 8002cee:	1ad3      	subs	r3, r2, r3
+ 8002cf0:	b298      	uxth	r0, r3
+ 8002cf2:	693b      	ldr	r3, [r7, #16]
+ 8002cf4:	b29b      	uxth	r3, r3
+ 8002cf6:	88ba      	ldrh	r2, [r7, #4]
+ 8002cf8:	1ad3      	subs	r3, r2, r3
+ 8002cfa:	b29c      	uxth	r4, r3
+ 8002cfc:	4b44      	ldr	r3, [pc, #272]	; (8002e10 <BSP_LCD_DrawCircle+0x1d8>)
+ 8002cfe:	681a      	ldr	r2, [r3, #0]
+ 8002d00:	4944      	ldr	r1, [pc, #272]	; (8002e14 <BSP_LCD_DrawCircle+0x1dc>)
+ 8002d02:	4613      	mov	r3, r2
+ 8002d04:	005b      	lsls	r3, r3, #1
+ 8002d06:	4413      	add	r3, r2
+ 8002d08:	009b      	lsls	r3, r3, #2
+ 8002d0a:	440b      	add	r3, r1
+ 8002d0c:	681b      	ldr	r3, [r3, #0]
+ 8002d0e:	461a      	mov	r2, r3
+ 8002d10:	4621      	mov	r1, r4
+ 8002d12:	f000 f881 	bl	8002e18 <BSP_LCD_DrawPixel>
+    
+    BSP_LCD_DrawPixel((Xpos + current_x), (Ypos + current_y), DrawProp[ActiveLayer].TextColor);
+ 8002d16:	693b      	ldr	r3, [r7, #16]
+ 8002d18:	b29a      	uxth	r2, r3
+ 8002d1a:	88fb      	ldrh	r3, [r7, #6]
+ 8002d1c:	4413      	add	r3, r2
+ 8002d1e:	b298      	uxth	r0, r3
+ 8002d20:	68fb      	ldr	r3, [r7, #12]
+ 8002d22:	b29a      	uxth	r2, r3
+ 8002d24:	88bb      	ldrh	r3, [r7, #4]
+ 8002d26:	4413      	add	r3, r2
+ 8002d28:	b29c      	uxth	r4, r3
+ 8002d2a:	4b39      	ldr	r3, [pc, #228]	; (8002e10 <BSP_LCD_DrawCircle+0x1d8>)
+ 8002d2c:	681a      	ldr	r2, [r3, #0]
+ 8002d2e:	4939      	ldr	r1, [pc, #228]	; (8002e14 <BSP_LCD_DrawCircle+0x1dc>)
+ 8002d30:	4613      	mov	r3, r2
+ 8002d32:	005b      	lsls	r3, r3, #1
+ 8002d34:	4413      	add	r3, r2
+ 8002d36:	009b      	lsls	r3, r3, #2
+ 8002d38:	440b      	add	r3, r1
+ 8002d3a:	681b      	ldr	r3, [r3, #0]
+ 8002d3c:	461a      	mov	r2, r3
+ 8002d3e:	4621      	mov	r1, r4
+ 8002d40:	f000 f86a 	bl	8002e18 <BSP_LCD_DrawPixel>
+    
+    BSP_LCD_DrawPixel((Xpos - current_x), (Ypos + current_y), DrawProp[ActiveLayer].TextColor);
+ 8002d44:	693b      	ldr	r3, [r7, #16]
+ 8002d46:	b29b      	uxth	r3, r3
+ 8002d48:	88fa      	ldrh	r2, [r7, #6]
+ 8002d4a:	1ad3      	subs	r3, r2, r3
+ 8002d4c:	b298      	uxth	r0, r3
+ 8002d4e:	68fb      	ldr	r3, [r7, #12]
+ 8002d50:	b29a      	uxth	r2, r3
+ 8002d52:	88bb      	ldrh	r3, [r7, #4]
+ 8002d54:	4413      	add	r3, r2
+ 8002d56:	b29c      	uxth	r4, r3
+ 8002d58:	4b2d      	ldr	r3, [pc, #180]	; (8002e10 <BSP_LCD_DrawCircle+0x1d8>)
+ 8002d5a:	681a      	ldr	r2, [r3, #0]
+ 8002d5c:	492d      	ldr	r1, [pc, #180]	; (8002e14 <BSP_LCD_DrawCircle+0x1dc>)
+ 8002d5e:	4613      	mov	r3, r2
+ 8002d60:	005b      	lsls	r3, r3, #1
+ 8002d62:	4413      	add	r3, r2
+ 8002d64:	009b      	lsls	r3, r3, #2
+ 8002d66:	440b      	add	r3, r1
+ 8002d68:	681b      	ldr	r3, [r3, #0]
+ 8002d6a:	461a      	mov	r2, r3
+ 8002d6c:	4621      	mov	r1, r4
+ 8002d6e:	f000 f853 	bl	8002e18 <BSP_LCD_DrawPixel>
+    
+    BSP_LCD_DrawPixel((Xpos + current_y), (Ypos + current_x), DrawProp[ActiveLayer].TextColor);
+ 8002d72:	68fb      	ldr	r3, [r7, #12]
+ 8002d74:	b29a      	uxth	r2, r3
+ 8002d76:	88fb      	ldrh	r3, [r7, #6]
+ 8002d78:	4413      	add	r3, r2
+ 8002d7a:	b298      	uxth	r0, r3
+ 8002d7c:	693b      	ldr	r3, [r7, #16]
+ 8002d7e:	b29a      	uxth	r2, r3
+ 8002d80:	88bb      	ldrh	r3, [r7, #4]
+ 8002d82:	4413      	add	r3, r2
+ 8002d84:	b29c      	uxth	r4, r3
+ 8002d86:	4b22      	ldr	r3, [pc, #136]	; (8002e10 <BSP_LCD_DrawCircle+0x1d8>)
+ 8002d88:	681a      	ldr	r2, [r3, #0]
+ 8002d8a:	4922      	ldr	r1, [pc, #136]	; (8002e14 <BSP_LCD_DrawCircle+0x1dc>)
+ 8002d8c:	4613      	mov	r3, r2
+ 8002d8e:	005b      	lsls	r3, r3, #1
+ 8002d90:	4413      	add	r3, r2
+ 8002d92:	009b      	lsls	r3, r3, #2
+ 8002d94:	440b      	add	r3, r1
+ 8002d96:	681b      	ldr	r3, [r3, #0]
+ 8002d98:	461a      	mov	r2, r3
+ 8002d9a:	4621      	mov	r1, r4
+ 8002d9c:	f000 f83c 	bl	8002e18 <BSP_LCD_DrawPixel>
+    
+    BSP_LCD_DrawPixel((Xpos - current_y), (Ypos + current_x), DrawProp[ActiveLayer].TextColor);
+ 8002da0:	68fb      	ldr	r3, [r7, #12]
+ 8002da2:	b29b      	uxth	r3, r3
+ 8002da4:	88fa      	ldrh	r2, [r7, #6]
+ 8002da6:	1ad3      	subs	r3, r2, r3
+ 8002da8:	b298      	uxth	r0, r3
+ 8002daa:	693b      	ldr	r3, [r7, #16]
+ 8002dac:	b29a      	uxth	r2, r3
+ 8002dae:	88bb      	ldrh	r3, [r7, #4]
+ 8002db0:	4413      	add	r3, r2
+ 8002db2:	b29c      	uxth	r4, r3
+ 8002db4:	4b16      	ldr	r3, [pc, #88]	; (8002e10 <BSP_LCD_DrawCircle+0x1d8>)
+ 8002db6:	681a      	ldr	r2, [r3, #0]
+ 8002db8:	4916      	ldr	r1, [pc, #88]	; (8002e14 <BSP_LCD_DrawCircle+0x1dc>)
+ 8002dba:	4613      	mov	r3, r2
+ 8002dbc:	005b      	lsls	r3, r3, #1
+ 8002dbe:	4413      	add	r3, r2
+ 8002dc0:	009b      	lsls	r3, r3, #2
+ 8002dc2:	440b      	add	r3, r1
+ 8002dc4:	681b      	ldr	r3, [r3, #0]
+ 8002dc6:	461a      	mov	r2, r3
+ 8002dc8:	4621      	mov	r1, r4
+ 8002dca:	f000 f825 	bl	8002e18 <BSP_LCD_DrawPixel>
+    
+    if (decision < 0)
+ 8002dce:	697b      	ldr	r3, [r7, #20]
+ 8002dd0:	2b00      	cmp	r3, #0
+ 8002dd2:	da06      	bge.n	8002de2 <BSP_LCD_DrawCircle+0x1aa>
+    { 
+      decision += (current_x << 2) + 6;
+ 8002dd4:	693b      	ldr	r3, [r7, #16]
+ 8002dd6:	009a      	lsls	r2, r3, #2
+ 8002dd8:	697b      	ldr	r3, [r7, #20]
+ 8002dda:	4413      	add	r3, r2
+ 8002ddc:	3306      	adds	r3, #6
+ 8002dde:	617b      	str	r3, [r7, #20]
+ 8002de0:	e00a      	b.n	8002df8 <BSP_LCD_DrawCircle+0x1c0>
+    }
+    else
+    {
+      decision += ((current_x - current_y) << 2) + 10;
+ 8002de2:	693a      	ldr	r2, [r7, #16]
+ 8002de4:	68fb      	ldr	r3, [r7, #12]
+ 8002de6:	1ad3      	subs	r3, r2, r3
+ 8002de8:	009a      	lsls	r2, r3, #2
+ 8002dea:	697b      	ldr	r3, [r7, #20]
+ 8002dec:	4413      	add	r3, r2
+ 8002dee:	330a      	adds	r3, #10
+ 8002df0:	617b      	str	r3, [r7, #20]
+      current_y--;
+ 8002df2:	68fb      	ldr	r3, [r7, #12]
+ 8002df4:	3b01      	subs	r3, #1
+ 8002df6:	60fb      	str	r3, [r7, #12]
+    }
+    current_x++;
+ 8002df8:	693b      	ldr	r3, [r7, #16]
+ 8002dfa:	3301      	adds	r3, #1
+ 8002dfc:	613b      	str	r3, [r7, #16]
+  while (current_x <= current_y)
+ 8002dfe:	693a      	ldr	r2, [r7, #16]
+ 8002e00:	68fb      	ldr	r3, [r7, #12]
+ 8002e02:	429a      	cmp	r2, r3
+ 8002e04:	f67f af2b 	bls.w	8002c5e <BSP_LCD_DrawCircle+0x26>
+  } 
+}
+ 8002e08:	bf00      	nop
+ 8002e0a:	371c      	adds	r7, #28
+ 8002e0c:	46bd      	mov	sp, r7
+ 8002e0e:	bd90      	pop	{r4, r7, pc}
+ 8002e10:	20000408 	.word	0x20000408
+ 8002e14:	2000040c 	.word	0x2000040c
+
+08002e18 <BSP_LCD_DrawPixel>:
+  * @param  Ypos: Y position
+  * @param  RGB_Code: Pixel color in ARGB mode (8-8-8-8)
+  * @retval None
+  */
+void BSP_LCD_DrawPixel(uint16_t Xpos, uint16_t Ypos, uint32_t RGB_Code)
+{
+ 8002e18:	b5b0      	push	{r4, r5, r7, lr}
+ 8002e1a:	b082      	sub	sp, #8
+ 8002e1c:	af00      	add	r7, sp, #0
+ 8002e1e:	4603      	mov	r3, r0
+ 8002e20:	603a      	str	r2, [r7, #0]
+ 8002e22:	80fb      	strh	r3, [r7, #6]
+ 8002e24:	460b      	mov	r3, r1
+ 8002e26:	80bb      	strh	r3, [r7, #4]
+  /* Write data value to all SDRAM memory */
+  if(hLtdcHandler.LayerCfg[ActiveLayer].PixelFormat == LTDC_PIXEL_FORMAT_RGB565)
+ 8002e28:	4b1d      	ldr	r3, [pc, #116]	; (8002ea0 <BSP_LCD_DrawPixel+0x88>)
+ 8002e2a:	681b      	ldr	r3, [r3, #0]
+ 8002e2c:	4a1d      	ldr	r2, [pc, #116]	; (8002ea4 <BSP_LCD_DrawPixel+0x8c>)
+ 8002e2e:	2134      	movs	r1, #52	; 0x34
+ 8002e30:	fb01 f303 	mul.w	r3, r1, r3
+ 8002e34:	4413      	add	r3, r2
+ 8002e36:	3348      	adds	r3, #72	; 0x48
+ 8002e38:	681b      	ldr	r3, [r3, #0]
+ 8002e3a:	2b02      	cmp	r3, #2
+ 8002e3c:	d116      	bne.n	8002e6c <BSP_LCD_DrawPixel+0x54>
+  { /* RGB565 format */
+    *(__IO uint16_t*) (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress + (2*(Ypos*BSP_LCD_GetXSize() + Xpos))) = (uint16_t)RGB_Code;
+ 8002e3e:	4b18      	ldr	r3, [pc, #96]	; (8002ea0 <BSP_LCD_DrawPixel+0x88>)
+ 8002e40:	681b      	ldr	r3, [r3, #0]
+ 8002e42:	4a18      	ldr	r2, [pc, #96]	; (8002ea4 <BSP_LCD_DrawPixel+0x8c>)
+ 8002e44:	2134      	movs	r1, #52	; 0x34
+ 8002e46:	fb01 f303 	mul.w	r3, r1, r3
+ 8002e4a:	4413      	add	r3, r2
+ 8002e4c:	335c      	adds	r3, #92	; 0x5c
+ 8002e4e:	681c      	ldr	r4, [r3, #0]
+ 8002e50:	88bd      	ldrh	r5, [r7, #4]
+ 8002e52:	f7ff fc51 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8002e56:	4603      	mov	r3, r0
+ 8002e58:	fb03 f205 	mul.w	r2, r3, r5
+ 8002e5c:	88fb      	ldrh	r3, [r7, #6]
+ 8002e5e:	4413      	add	r3, r2
+ 8002e60:	005b      	lsls	r3, r3, #1
+ 8002e62:	4423      	add	r3, r4
+ 8002e64:	683a      	ldr	r2, [r7, #0]
+ 8002e66:	b292      	uxth	r2, r2
+ 8002e68:	801a      	strh	r2, [r3, #0]
+  }
+  else
+  { /* ARGB8888 format */
+    *(__IO uint32_t*) (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress + (4*(Ypos*BSP_LCD_GetXSize() + Xpos))) = RGB_Code;
+  }
+}
+ 8002e6a:	e015      	b.n	8002e98 <BSP_LCD_DrawPixel+0x80>
+    *(__IO uint32_t*) (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress + (4*(Ypos*BSP_LCD_GetXSize() + Xpos))) = RGB_Code;
+ 8002e6c:	4b0c      	ldr	r3, [pc, #48]	; (8002ea0 <BSP_LCD_DrawPixel+0x88>)
+ 8002e6e:	681b      	ldr	r3, [r3, #0]
+ 8002e70:	4a0c      	ldr	r2, [pc, #48]	; (8002ea4 <BSP_LCD_DrawPixel+0x8c>)
+ 8002e72:	2134      	movs	r1, #52	; 0x34
+ 8002e74:	fb01 f303 	mul.w	r3, r1, r3
+ 8002e78:	4413      	add	r3, r2
+ 8002e7a:	335c      	adds	r3, #92	; 0x5c
+ 8002e7c:	681c      	ldr	r4, [r3, #0]
+ 8002e7e:	88bd      	ldrh	r5, [r7, #4]
+ 8002e80:	f7ff fc3a 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8002e84:	4603      	mov	r3, r0
+ 8002e86:	fb03 f205 	mul.w	r2, r3, r5
+ 8002e8a:	88fb      	ldrh	r3, [r7, #6]
+ 8002e8c:	4413      	add	r3, r2
+ 8002e8e:	009b      	lsls	r3, r3, #2
+ 8002e90:	4423      	add	r3, r4
+ 8002e92:	461a      	mov	r2, r3
+ 8002e94:	683b      	ldr	r3, [r7, #0]
+ 8002e96:	6013      	str	r3, [r2, #0]
+}
+ 8002e98:	bf00      	nop
+ 8002e9a:	3708      	adds	r7, #8
+ 8002e9c:	46bd      	mov	sp, r7
+ 8002e9e:	bdb0      	pop	{r4, r5, r7, pc}
+ 8002ea0:	20000408 	.word	0x20000408
+ 8002ea4:	20008e5c 	.word	0x20008e5c
+
+08002ea8 <BSP_LCD_FillRect>:
+  * @param  Width: Rectangle width  
+  * @param  Height: Rectangle height
+  * @retval None
+  */
+void BSP_LCD_FillRect(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height)
+{
+ 8002ea8:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
+ 8002eac:	b086      	sub	sp, #24
+ 8002eae:	af02      	add	r7, sp, #8
+ 8002eb0:	4604      	mov	r4, r0
+ 8002eb2:	4608      	mov	r0, r1
+ 8002eb4:	4611      	mov	r1, r2
+ 8002eb6:	461a      	mov	r2, r3
+ 8002eb8:	4623      	mov	r3, r4
+ 8002eba:	80fb      	strh	r3, [r7, #6]
+ 8002ebc:	4603      	mov	r3, r0
+ 8002ebe:	80bb      	strh	r3, [r7, #4]
+ 8002ec0:	460b      	mov	r3, r1
+ 8002ec2:	807b      	strh	r3, [r7, #2]
+ 8002ec4:	4613      	mov	r3, r2
+ 8002ec6:	803b      	strh	r3, [r7, #0]
+  uint32_t  x_address = 0;
+ 8002ec8:	2300      	movs	r3, #0
+ 8002eca:	60fb      	str	r3, [r7, #12]
+  
+  /* Set the text color */
+  BSP_LCD_SetTextColor(DrawProp[ActiveLayer].TextColor);
+ 8002ecc:	4b30      	ldr	r3, [pc, #192]	; (8002f90 <BSP_LCD_FillRect+0xe8>)
+ 8002ece:	681a      	ldr	r2, [r3, #0]
+ 8002ed0:	4930      	ldr	r1, [pc, #192]	; (8002f94 <BSP_LCD_FillRect+0xec>)
+ 8002ed2:	4613      	mov	r3, r2
+ 8002ed4:	005b      	lsls	r3, r3, #1
+ 8002ed6:	4413      	add	r3, r2
+ 8002ed8:	009b      	lsls	r3, r3, #2
+ 8002eda:	440b      	add	r3, r1
+ 8002edc:	681b      	ldr	r3, [r3, #0]
+ 8002ede:	4618      	mov	r0, r3
+ 8002ee0:	f7ff fca2 	bl	8002828 <BSP_LCD_SetTextColor>
+  
+  /* Get the rectangle start address */
+  if(hLtdcHandler.LayerCfg[ActiveLayer].PixelFormat == LTDC_PIXEL_FORMAT_RGB565)
+ 8002ee4:	4b2a      	ldr	r3, [pc, #168]	; (8002f90 <BSP_LCD_FillRect+0xe8>)
+ 8002ee6:	681b      	ldr	r3, [r3, #0]
+ 8002ee8:	4a2b      	ldr	r2, [pc, #172]	; (8002f98 <BSP_LCD_FillRect+0xf0>)
+ 8002eea:	2134      	movs	r1, #52	; 0x34
+ 8002eec:	fb01 f303 	mul.w	r3, r1, r3
+ 8002ef0:	4413      	add	r3, r2
+ 8002ef2:	3348      	adds	r3, #72	; 0x48
+ 8002ef4:	681b      	ldr	r3, [r3, #0]
+ 8002ef6:	2b02      	cmp	r3, #2
+ 8002ef8:	d114      	bne.n	8002f24 <BSP_LCD_FillRect+0x7c>
+  { /* RGB565 format */
+    x_address = (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress) + 2*(BSP_LCD_GetXSize()*Ypos + Xpos);
+ 8002efa:	4b25      	ldr	r3, [pc, #148]	; (8002f90 <BSP_LCD_FillRect+0xe8>)
+ 8002efc:	681b      	ldr	r3, [r3, #0]
+ 8002efe:	4a26      	ldr	r2, [pc, #152]	; (8002f98 <BSP_LCD_FillRect+0xf0>)
+ 8002f00:	2134      	movs	r1, #52	; 0x34
+ 8002f02:	fb01 f303 	mul.w	r3, r1, r3
+ 8002f06:	4413      	add	r3, r2
+ 8002f08:	335c      	adds	r3, #92	; 0x5c
+ 8002f0a:	681c      	ldr	r4, [r3, #0]
+ 8002f0c:	f7ff fbf4 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8002f10:	4602      	mov	r2, r0
+ 8002f12:	88bb      	ldrh	r3, [r7, #4]
+ 8002f14:	fb03 f202 	mul.w	r2, r3, r2
+ 8002f18:	88fb      	ldrh	r3, [r7, #6]
+ 8002f1a:	4413      	add	r3, r2
+ 8002f1c:	005b      	lsls	r3, r3, #1
+ 8002f1e:	4423      	add	r3, r4
+ 8002f20:	60fb      	str	r3, [r7, #12]
+ 8002f22:	e013      	b.n	8002f4c <BSP_LCD_FillRect+0xa4>
+  }
+  else
+  { /* ARGB8888 format */
+    x_address = (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress) + 4*(BSP_LCD_GetXSize()*Ypos + Xpos);
+ 8002f24:	4b1a      	ldr	r3, [pc, #104]	; (8002f90 <BSP_LCD_FillRect+0xe8>)
+ 8002f26:	681b      	ldr	r3, [r3, #0]
+ 8002f28:	4a1b      	ldr	r2, [pc, #108]	; (8002f98 <BSP_LCD_FillRect+0xf0>)
+ 8002f2a:	2134      	movs	r1, #52	; 0x34
+ 8002f2c:	fb01 f303 	mul.w	r3, r1, r3
+ 8002f30:	4413      	add	r3, r2
+ 8002f32:	335c      	adds	r3, #92	; 0x5c
+ 8002f34:	681c      	ldr	r4, [r3, #0]
+ 8002f36:	f7ff fbdf 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8002f3a:	4602      	mov	r2, r0
+ 8002f3c:	88bb      	ldrh	r3, [r7, #4]
+ 8002f3e:	fb03 f202 	mul.w	r2, r3, r2
+ 8002f42:	88fb      	ldrh	r3, [r7, #6]
+ 8002f44:	4413      	add	r3, r2
+ 8002f46:	009b      	lsls	r3, r3, #2
+ 8002f48:	4423      	add	r3, r4
+ 8002f4a:	60fb      	str	r3, [r7, #12]
+  }
+  /* Fill the rectangle */
+  LL_FillBuffer(ActiveLayer, (uint32_t *)x_address, Width, Height, (BSP_LCD_GetXSize() - Width), DrawProp[ActiveLayer].TextColor);
+ 8002f4c:	4b10      	ldr	r3, [pc, #64]	; (8002f90 <BSP_LCD_FillRect+0xe8>)
+ 8002f4e:	681c      	ldr	r4, [r3, #0]
+ 8002f50:	68fd      	ldr	r5, [r7, #12]
+ 8002f52:	887e      	ldrh	r6, [r7, #2]
+ 8002f54:	f8b7 8000 	ldrh.w	r8, [r7]
+ 8002f58:	f7ff fbce 	bl	80026f8 <BSP_LCD_GetXSize>
+ 8002f5c:	4602      	mov	r2, r0
+ 8002f5e:	887b      	ldrh	r3, [r7, #2]
+ 8002f60:	1ad1      	subs	r1, r2, r3
+ 8002f62:	4b0b      	ldr	r3, [pc, #44]	; (8002f90 <BSP_LCD_FillRect+0xe8>)
+ 8002f64:	681a      	ldr	r2, [r3, #0]
+ 8002f66:	480b      	ldr	r0, [pc, #44]	; (8002f94 <BSP_LCD_FillRect+0xec>)
+ 8002f68:	4613      	mov	r3, r2
+ 8002f6a:	005b      	lsls	r3, r3, #1
+ 8002f6c:	4413      	add	r3, r2
+ 8002f6e:	009b      	lsls	r3, r3, #2
+ 8002f70:	4403      	add	r3, r0
+ 8002f72:	681b      	ldr	r3, [r3, #0]
+ 8002f74:	9301      	str	r3, [sp, #4]
+ 8002f76:	9100      	str	r1, [sp, #0]
+ 8002f78:	4643      	mov	r3, r8
+ 8002f7a:	4632      	mov	r2, r6
+ 8002f7c:	4629      	mov	r1, r5
+ 8002f7e:	4620      	mov	r0, r4
+ 8002f80:	f000 fa78 	bl	8003474 <LL_FillBuffer>
+}
+ 8002f84:	bf00      	nop
+ 8002f86:	3710      	adds	r7, #16
+ 8002f88:	46bd      	mov	sp, r7
+ 8002f8a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
+ 8002f8e:	bf00      	nop
+ 8002f90:	20000408 	.word	0x20000408
+ 8002f94:	2000040c 	.word	0x2000040c
+ 8002f98:	20008e5c 	.word	0x20008e5c
+
+08002f9c <BSP_LCD_FillCircle>:
+  * @param  Ypos: Y position
+  * @param  Radius: Circle radius
+  * @retval None
+  */
+void BSP_LCD_FillCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius)
+{
+ 8002f9c:	b580      	push	{r7, lr}
+ 8002f9e:	b086      	sub	sp, #24
+ 8002fa0:	af00      	add	r7, sp, #0
+ 8002fa2:	4603      	mov	r3, r0
+ 8002fa4:	80fb      	strh	r3, [r7, #6]
+ 8002fa6:	460b      	mov	r3, r1
+ 8002fa8:	80bb      	strh	r3, [r7, #4]
+ 8002faa:	4613      	mov	r3, r2
+ 8002fac:	807b      	strh	r3, [r7, #2]
+  int32_t  decision;     /* Decision Variable */ 
+  uint32_t  current_x;   /* Current X Value */
+  uint32_t  current_y;   /* Current Y Value */
+  
+  decision = 3 - (Radius << 1);
+ 8002fae:	887b      	ldrh	r3, [r7, #2]
+ 8002fb0:	005b      	lsls	r3, r3, #1
+ 8002fb2:	f1c3 0303 	rsb	r3, r3, #3
+ 8002fb6:	617b      	str	r3, [r7, #20]
+  
+  current_x = 0;
+ 8002fb8:	2300      	movs	r3, #0
+ 8002fba:	613b      	str	r3, [r7, #16]
+  current_y = Radius;
+ 8002fbc:	887b      	ldrh	r3, [r7, #2]
+ 8002fbe:	60fb      	str	r3, [r7, #12]
+  
+  BSP_LCD_SetTextColor(DrawProp[ActiveLayer].TextColor);
+ 8002fc0:	4b44      	ldr	r3, [pc, #272]	; (80030d4 <BSP_LCD_FillCircle+0x138>)
+ 8002fc2:	681a      	ldr	r2, [r3, #0]
+ 8002fc4:	4944      	ldr	r1, [pc, #272]	; (80030d8 <BSP_LCD_FillCircle+0x13c>)
+ 8002fc6:	4613      	mov	r3, r2
+ 8002fc8:	005b      	lsls	r3, r3, #1
+ 8002fca:	4413      	add	r3, r2
+ 8002fcc:	009b      	lsls	r3, r3, #2
+ 8002fce:	440b      	add	r3, r1
+ 8002fd0:	681b      	ldr	r3, [r3, #0]
+ 8002fd2:	4618      	mov	r0, r3
+ 8002fd4:	f7ff fc28 	bl	8002828 <BSP_LCD_SetTextColor>
+  
+  while (current_x <= current_y)
+ 8002fd8:	e061      	b.n	800309e <BSP_LCD_FillCircle+0x102>
+  {
+    if(current_y > 0) 
+ 8002fda:	68fb      	ldr	r3, [r7, #12]
+ 8002fdc:	2b00      	cmp	r3, #0
+ 8002fde:	d021      	beq.n	8003024 <BSP_LCD_FillCircle+0x88>
+    {
+      BSP_LCD_DrawHLine(Xpos - current_y, Ypos + current_x, 2*current_y);
+ 8002fe0:	68fb      	ldr	r3, [r7, #12]
+ 8002fe2:	b29b      	uxth	r3, r3
+ 8002fe4:	88fa      	ldrh	r2, [r7, #6]
+ 8002fe6:	1ad3      	subs	r3, r2, r3
+ 8002fe8:	b298      	uxth	r0, r3
+ 8002fea:	693b      	ldr	r3, [r7, #16]
+ 8002fec:	b29a      	uxth	r2, r3
+ 8002fee:	88bb      	ldrh	r3, [r7, #4]
+ 8002ff0:	4413      	add	r3, r2
+ 8002ff2:	b299      	uxth	r1, r3
+ 8002ff4:	68fb      	ldr	r3, [r7, #12]
+ 8002ff6:	b29b      	uxth	r3, r3
+ 8002ff8:	005b      	lsls	r3, r3, #1
+ 8002ffa:	b29b      	uxth	r3, r3
+ 8002ffc:	461a      	mov	r2, r3
+ 8002ffe:	f7ff fdbd 	bl	8002b7c <BSP_LCD_DrawHLine>
+      BSP_LCD_DrawHLine(Xpos - current_y, Ypos - current_x, 2*current_y);
+ 8003002:	68fb      	ldr	r3, [r7, #12]
+ 8003004:	b29b      	uxth	r3, r3
+ 8003006:	88fa      	ldrh	r2, [r7, #6]
+ 8003008:	1ad3      	subs	r3, r2, r3
+ 800300a:	b298      	uxth	r0, r3
+ 800300c:	693b      	ldr	r3, [r7, #16]
+ 800300e:	b29b      	uxth	r3, r3
+ 8003010:	88ba      	ldrh	r2, [r7, #4]
+ 8003012:	1ad3      	subs	r3, r2, r3
+ 8003014:	b299      	uxth	r1, r3
+ 8003016:	68fb      	ldr	r3, [r7, #12]
+ 8003018:	b29b      	uxth	r3, r3
+ 800301a:	005b      	lsls	r3, r3, #1
+ 800301c:	b29b      	uxth	r3, r3
+ 800301e:	461a      	mov	r2, r3
+ 8003020:	f7ff fdac 	bl	8002b7c <BSP_LCD_DrawHLine>
+    }
+    
+    if(current_x > 0) 
+ 8003024:	693b      	ldr	r3, [r7, #16]
+ 8003026:	2b00      	cmp	r3, #0
+ 8003028:	d021      	beq.n	800306e <BSP_LCD_FillCircle+0xd2>
+    {
+      BSP_LCD_DrawHLine(Xpos - current_x, Ypos - current_y, 2*current_x);
+ 800302a:	693b      	ldr	r3, [r7, #16]
+ 800302c:	b29b      	uxth	r3, r3
+ 800302e:	88fa      	ldrh	r2, [r7, #6]
+ 8003030:	1ad3      	subs	r3, r2, r3
+ 8003032:	b298      	uxth	r0, r3
+ 8003034:	68fb      	ldr	r3, [r7, #12]
+ 8003036:	b29b      	uxth	r3, r3
+ 8003038:	88ba      	ldrh	r2, [r7, #4]
+ 800303a:	1ad3      	subs	r3, r2, r3
+ 800303c:	b299      	uxth	r1, r3
+ 800303e:	693b      	ldr	r3, [r7, #16]
+ 8003040:	b29b      	uxth	r3, r3
+ 8003042:	005b      	lsls	r3, r3, #1
+ 8003044:	b29b      	uxth	r3, r3
+ 8003046:	461a      	mov	r2, r3
+ 8003048:	f7ff fd98 	bl	8002b7c <BSP_LCD_DrawHLine>
+      BSP_LCD_DrawHLine(Xpos - current_x, Ypos + current_y, 2*current_x);
+ 800304c:	693b      	ldr	r3, [r7, #16]
+ 800304e:	b29b      	uxth	r3, r3
+ 8003050:	88fa      	ldrh	r2, [r7, #6]
+ 8003052:	1ad3      	subs	r3, r2, r3
+ 8003054:	b298      	uxth	r0, r3
+ 8003056:	68fb      	ldr	r3, [r7, #12]
+ 8003058:	b29a      	uxth	r2, r3
+ 800305a:	88bb      	ldrh	r3, [r7, #4]
+ 800305c:	4413      	add	r3, r2
+ 800305e:	b299      	uxth	r1, r3
+ 8003060:	693b      	ldr	r3, [r7, #16]
+ 8003062:	b29b      	uxth	r3, r3
+ 8003064:	005b      	lsls	r3, r3, #1
+ 8003066:	b29b      	uxth	r3, r3
+ 8003068:	461a      	mov	r2, r3
+ 800306a:	f7ff fd87 	bl	8002b7c <BSP_LCD_DrawHLine>
+    }
+    if (decision < 0)
+ 800306e:	697b      	ldr	r3, [r7, #20]
+ 8003070:	2b00      	cmp	r3, #0
+ 8003072:	da06      	bge.n	8003082 <BSP_LCD_FillCircle+0xe6>
+    { 
+      decision += (current_x << 2) + 6;
+ 8003074:	693b      	ldr	r3, [r7, #16]
+ 8003076:	009a      	lsls	r2, r3, #2
+ 8003078:	697b      	ldr	r3, [r7, #20]
+ 800307a:	4413      	add	r3, r2
+ 800307c:	3306      	adds	r3, #6
+ 800307e:	617b      	str	r3, [r7, #20]
+ 8003080:	e00a      	b.n	8003098 <BSP_LCD_FillCircle+0xfc>
+    }
+    else
+    {
+      decision += ((current_x - current_y) << 2) + 10;
+ 8003082:	693a      	ldr	r2, [r7, #16]
+ 8003084:	68fb      	ldr	r3, [r7, #12]
+ 8003086:	1ad3      	subs	r3, r2, r3
+ 8003088:	009a      	lsls	r2, r3, #2
+ 800308a:	697b      	ldr	r3, [r7, #20]
+ 800308c:	4413      	add	r3, r2
+ 800308e:	330a      	adds	r3, #10
+ 8003090:	617b      	str	r3, [r7, #20]
+      current_y--;
+ 8003092:	68fb      	ldr	r3, [r7, #12]
+ 8003094:	3b01      	subs	r3, #1
+ 8003096:	60fb      	str	r3, [r7, #12]
+    }
+    current_x++;
+ 8003098:	693b      	ldr	r3, [r7, #16]
+ 800309a:	3301      	adds	r3, #1
+ 800309c:	613b      	str	r3, [r7, #16]
+  while (current_x <= current_y)
+ 800309e:	693a      	ldr	r2, [r7, #16]
+ 80030a0:	68fb      	ldr	r3, [r7, #12]
+ 80030a2:	429a      	cmp	r2, r3
+ 80030a4:	d999      	bls.n	8002fda <BSP_LCD_FillCircle+0x3e>
+  }
+  
+  BSP_LCD_SetTextColor(DrawProp[ActiveLayer].TextColor);
+ 80030a6:	4b0b      	ldr	r3, [pc, #44]	; (80030d4 <BSP_LCD_FillCircle+0x138>)
+ 80030a8:	681a      	ldr	r2, [r3, #0]
+ 80030aa:	490b      	ldr	r1, [pc, #44]	; (80030d8 <BSP_LCD_FillCircle+0x13c>)
+ 80030ac:	4613      	mov	r3, r2
+ 80030ae:	005b      	lsls	r3, r3, #1
+ 80030b0:	4413      	add	r3, r2
+ 80030b2:	009b      	lsls	r3, r3, #2
+ 80030b4:	440b      	add	r3, r1
+ 80030b6:	681b      	ldr	r3, [r3, #0]
+ 80030b8:	4618      	mov	r0, r3
+ 80030ba:	f7ff fbb5 	bl	8002828 <BSP_LCD_SetTextColor>
+  BSP_LCD_DrawCircle(Xpos, Ypos, Radius);
+ 80030be:	887a      	ldrh	r2, [r7, #2]
+ 80030c0:	88b9      	ldrh	r1, [r7, #4]
+ 80030c2:	88fb      	ldrh	r3, [r7, #6]
+ 80030c4:	4618      	mov	r0, r3
+ 80030c6:	f7ff fdb7 	bl	8002c38 <BSP_LCD_DrawCircle>
+}
+ 80030ca:	bf00      	nop
+ 80030cc:	3718      	adds	r7, #24
+ 80030ce:	46bd      	mov	sp, r7
+ 80030d0:	bd80      	pop	{r7, pc}
+ 80030d2:	bf00      	nop
+ 80030d4:	20000408 	.word	0x20000408
+ 80030d8:	2000040c 	.word	0x2000040c
+
+080030dc <BSP_LCD_DisplayOn>:
+/**
+  * @brief  Enables the display.
+  * @retval None
+  */
+void BSP_LCD_DisplayOn(void)
+{
+ 80030dc:	b580      	push	{r7, lr}
+ 80030de:	af00      	add	r7, sp, #0
+  /* Display On */
+  __HAL_LTDC_ENABLE(&hLtdcHandler);
+ 80030e0:	4b0a      	ldr	r3, [pc, #40]	; (800310c <BSP_LCD_DisplayOn+0x30>)
+ 80030e2:	681b      	ldr	r3, [r3, #0]
+ 80030e4:	699a      	ldr	r2, [r3, #24]
+ 80030e6:	4b09      	ldr	r3, [pc, #36]	; (800310c <BSP_LCD_DisplayOn+0x30>)
+ 80030e8:	681b      	ldr	r3, [r3, #0]
+ 80030ea:	f042 0201 	orr.w	r2, r2, #1
+ 80030ee:	619a      	str	r2, [r3, #24]
+  HAL_GPIO_WritePin(LCD_DISP_GPIO_PORT, LCD_DISP_PIN, GPIO_PIN_SET);        /* Assert LCD_DISP pin */
+ 80030f0:	2201      	movs	r2, #1
+ 80030f2:	f44f 5180 	mov.w	r1, #4096	; 0x1000
+ 80030f6:	4806      	ldr	r0, [pc, #24]	; (8003110 <BSP_LCD_DisplayOn+0x34>)
+ 80030f8:	f004 fc62 	bl	80079c0 <HAL_GPIO_WritePin>
+  HAL_GPIO_WritePin(LCD_BL_CTRL_GPIO_PORT, LCD_BL_CTRL_PIN, GPIO_PIN_SET);  /* Assert LCD_BL_CTRL pin */
+ 80030fc:	2201      	movs	r2, #1
+ 80030fe:	2108      	movs	r1, #8
+ 8003100:	4804      	ldr	r0, [pc, #16]	; (8003114 <BSP_LCD_DisplayOn+0x38>)
+ 8003102:	f004 fc5d 	bl	80079c0 <HAL_GPIO_WritePin>
+}
+ 8003106:	bf00      	nop
+ 8003108:	bd80      	pop	{r7, pc}
+ 800310a:	bf00      	nop
+ 800310c:	20008e5c 	.word	0x20008e5c
+ 8003110:	40022000 	.word	0x40022000
+ 8003114:	40022800 	.word	0x40022800
+
+08003118 <BSP_LCD_MspInit>:
+  * @param  hltdc: LTDC handle
+  * @param  Params
+  * @retval None
+  */
+__weak void BSP_LCD_MspInit(LTDC_HandleTypeDef *hltdc, void *Params)
+{
+ 8003118:	b580      	push	{r7, lr}
+ 800311a:	b090      	sub	sp, #64	; 0x40
+ 800311c:	af00      	add	r7, sp, #0
+ 800311e:	6078      	str	r0, [r7, #4]
+ 8003120:	6039      	str	r1, [r7, #0]
+  GPIO_InitTypeDef gpio_init_structure;
+  
+  /* Enable the LTDC and DMA2D clocks */
+  __HAL_RCC_LTDC_CLK_ENABLE();
+ 8003122:	4b64      	ldr	r3, [pc, #400]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003124:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8003126:	4a63      	ldr	r2, [pc, #396]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003128:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
+ 800312c:	6453      	str	r3, [r2, #68]	; 0x44
+ 800312e:	4b61      	ldr	r3, [pc, #388]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003130:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8003132:	f003 6380 	and.w	r3, r3, #67108864	; 0x4000000
+ 8003136:	62bb      	str	r3, [r7, #40]	; 0x28
+ 8003138:	6abb      	ldr	r3, [r7, #40]	; 0x28
+  __HAL_RCC_DMA2D_CLK_ENABLE();
+ 800313a:	4b5e      	ldr	r3, [pc, #376]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 800313c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800313e:	4a5d      	ldr	r2, [pc, #372]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003140:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
+ 8003144:	6313      	str	r3, [r2, #48]	; 0x30
+ 8003146:	4b5b      	ldr	r3, [pc, #364]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003148:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800314a:	f403 0300 	and.w	r3, r3, #8388608	; 0x800000
+ 800314e:	627b      	str	r3, [r7, #36]	; 0x24
+ 8003150:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+  
+  /* Enable GPIOs clock */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+ 8003152:	4b58      	ldr	r3, [pc, #352]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003154:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003156:	4a57      	ldr	r2, [pc, #348]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003158:	f043 0310 	orr.w	r3, r3, #16
+ 800315c:	6313      	str	r3, [r2, #48]	; 0x30
+ 800315e:	4b55      	ldr	r3, [pc, #340]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003160:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003162:	f003 0310 	and.w	r3, r3, #16
+ 8003166:	623b      	str	r3, [r7, #32]
+ 8003168:	6a3b      	ldr	r3, [r7, #32]
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+ 800316a:	4b52      	ldr	r3, [pc, #328]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 800316c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800316e:	4a51      	ldr	r2, [pc, #324]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003170:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 8003174:	6313      	str	r3, [r2, #48]	; 0x30
+ 8003176:	4b4f      	ldr	r3, [pc, #316]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003178:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800317a:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800317e:	61fb      	str	r3, [r7, #28]
+ 8003180:	69fb      	ldr	r3, [r7, #28]
+  __HAL_RCC_GPIOI_CLK_ENABLE();
+ 8003182:	4b4c      	ldr	r3, [pc, #304]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003184:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003186:	4a4b      	ldr	r2, [pc, #300]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003188:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 800318c:	6313      	str	r3, [r2, #48]	; 0x30
+ 800318e:	4b49      	ldr	r3, [pc, #292]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 8003190:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003192:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 8003196:	61bb      	str	r3, [r7, #24]
+ 8003198:	69bb      	ldr	r3, [r7, #24]
+  __HAL_RCC_GPIOJ_CLK_ENABLE();
+ 800319a:	4b46      	ldr	r3, [pc, #280]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 800319c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800319e:	4a45      	ldr	r2, [pc, #276]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 80031a0:	f443 7300 	orr.w	r3, r3, #512	; 0x200
+ 80031a4:	6313      	str	r3, [r2, #48]	; 0x30
+ 80031a6:	4b43      	ldr	r3, [pc, #268]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 80031a8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80031aa:	f403 7300 	and.w	r3, r3, #512	; 0x200
+ 80031ae:	617b      	str	r3, [r7, #20]
+ 80031b0:	697b      	ldr	r3, [r7, #20]
+  __HAL_RCC_GPIOK_CLK_ENABLE();
+ 80031b2:	4b40      	ldr	r3, [pc, #256]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 80031b4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80031b6:	4a3f      	ldr	r2, [pc, #252]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 80031b8:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
+ 80031bc:	6313      	str	r3, [r2, #48]	; 0x30
+ 80031be:	4b3d      	ldr	r3, [pc, #244]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 80031c0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80031c2:	f403 6380 	and.w	r3, r3, #1024	; 0x400
+ 80031c6:	613b      	str	r3, [r7, #16]
+ 80031c8:	693b      	ldr	r3, [r7, #16]
+  LCD_DISP_GPIO_CLK_ENABLE();
+ 80031ca:	4b3a      	ldr	r3, [pc, #232]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 80031cc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80031ce:	4a39      	ldr	r2, [pc, #228]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 80031d0:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 80031d4:	6313      	str	r3, [r2, #48]	; 0x30
+ 80031d6:	4b37      	ldr	r3, [pc, #220]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 80031d8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80031da:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 80031de:	60fb      	str	r3, [r7, #12]
+ 80031e0:	68fb      	ldr	r3, [r7, #12]
+  LCD_BL_CTRL_GPIO_CLK_ENABLE();
+ 80031e2:	4b34      	ldr	r3, [pc, #208]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 80031e4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80031e6:	4a33      	ldr	r2, [pc, #204]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 80031e8:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
+ 80031ec:	6313      	str	r3, [r2, #48]	; 0x30
+ 80031ee:	4b31      	ldr	r3, [pc, #196]	; (80032b4 <BSP_LCD_MspInit+0x19c>)
+ 80031f0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80031f2:	f403 6380 	and.w	r3, r3, #1024	; 0x400
+ 80031f6:	60bb      	str	r3, [r7, #8]
+ 80031f8:	68bb      	ldr	r3, [r7, #8]
+
+  /*** LTDC Pins configuration ***/
+  /* GPIOE configuration */
+  gpio_init_structure.Pin       = GPIO_PIN_4;
+ 80031fa:	2310      	movs	r3, #16
+ 80031fc:	62fb      	str	r3, [r7, #44]	; 0x2c
+  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
+ 80031fe:	2302      	movs	r3, #2
+ 8003200:	633b      	str	r3, [r7, #48]	; 0x30
+  gpio_init_structure.Pull      = GPIO_NOPULL;
+ 8003202:	2300      	movs	r3, #0
+ 8003204:	637b      	str	r3, [r7, #52]	; 0x34
+  gpio_init_structure.Speed     = GPIO_SPEED_FAST;
+ 8003206:	2302      	movs	r3, #2
+ 8003208:	63bb      	str	r3, [r7, #56]	; 0x38
+  gpio_init_structure.Alternate = GPIO_AF14_LTDC;  
+ 800320a:	230e      	movs	r3, #14
+ 800320c:	63fb      	str	r3, [r7, #60]	; 0x3c
+  HAL_GPIO_Init(GPIOE, &gpio_init_structure);
+ 800320e:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8003212:	4619      	mov	r1, r3
+ 8003214:	4828      	ldr	r0, [pc, #160]	; (80032b8 <BSP_LCD_MspInit+0x1a0>)
+ 8003216:	f004 f907 	bl	8007428 <HAL_GPIO_Init>
+
+  /* GPIOG configuration */
+  gpio_init_structure.Pin       = GPIO_PIN_12;
+ 800321a:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 800321e:	62fb      	str	r3, [r7, #44]	; 0x2c
+  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
+ 8003220:	2302      	movs	r3, #2
+ 8003222:	633b      	str	r3, [r7, #48]	; 0x30
+  gpio_init_structure.Alternate = GPIO_AF9_LTDC;
+ 8003224:	2309      	movs	r3, #9
+ 8003226:	63fb      	str	r3, [r7, #60]	; 0x3c
+  HAL_GPIO_Init(GPIOG, &gpio_init_structure);
+ 8003228:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 800322c:	4619      	mov	r1, r3
+ 800322e:	4823      	ldr	r0, [pc, #140]	; (80032bc <BSP_LCD_MspInit+0x1a4>)
+ 8003230:	f004 f8fa 	bl	8007428 <HAL_GPIO_Init>
+
+  /* GPIOI LTDC alternate configuration */
+  gpio_init_structure.Pin       = GPIO_PIN_9 | GPIO_PIN_10 | \
+ 8003234:	f44f 4366 	mov.w	r3, #58880	; 0xe600
+ 8003238:	62fb      	str	r3, [r7, #44]	; 0x2c
+                                  GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
+  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
+ 800323a:	2302      	movs	r3, #2
+ 800323c:	633b      	str	r3, [r7, #48]	; 0x30
+  gpio_init_structure.Alternate = GPIO_AF14_LTDC;
+ 800323e:	230e      	movs	r3, #14
+ 8003240:	63fb      	str	r3, [r7, #60]	; 0x3c
+  HAL_GPIO_Init(GPIOI, &gpio_init_structure);
+ 8003242:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8003246:	4619      	mov	r1, r3
+ 8003248:	481d      	ldr	r0, [pc, #116]	; (80032c0 <BSP_LCD_MspInit+0x1a8>)
+ 800324a:	f004 f8ed 	bl	8007428 <HAL_GPIO_Init>
+
+  /* GPIOJ configuration */  
+  gpio_init_structure.Pin       = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | \
+ 800324e:	f64e 73ff 	movw	r3, #61439	; 0xefff
+ 8003252:	62fb      	str	r3, [r7, #44]	; 0x2c
+                                  GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | \
+                                  GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | \
+                                  GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
+  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
+ 8003254:	2302      	movs	r3, #2
+ 8003256:	633b      	str	r3, [r7, #48]	; 0x30
+  gpio_init_structure.Alternate = GPIO_AF14_LTDC;
+ 8003258:	230e      	movs	r3, #14
+ 800325a:	63fb      	str	r3, [r7, #60]	; 0x3c
+  HAL_GPIO_Init(GPIOJ, &gpio_init_structure);  
+ 800325c:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8003260:	4619      	mov	r1, r3
+ 8003262:	4818      	ldr	r0, [pc, #96]	; (80032c4 <BSP_LCD_MspInit+0x1ac>)
+ 8003264:	f004 f8e0 	bl	8007428 <HAL_GPIO_Init>
+
+  /* GPIOK configuration */  
+  gpio_init_structure.Pin       = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_4 | \
+ 8003268:	23f7      	movs	r3, #247	; 0xf7
+ 800326a:	62fb      	str	r3, [r7, #44]	; 0x2c
+                                  GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
+  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
+ 800326c:	2302      	movs	r3, #2
+ 800326e:	633b      	str	r3, [r7, #48]	; 0x30
+  gpio_init_structure.Alternate = GPIO_AF14_LTDC;
+ 8003270:	230e      	movs	r3, #14
+ 8003272:	63fb      	str	r3, [r7, #60]	; 0x3c
+  HAL_GPIO_Init(GPIOK, &gpio_init_structure);
+ 8003274:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 8003278:	4619      	mov	r1, r3
+ 800327a:	4813      	ldr	r0, [pc, #76]	; (80032c8 <BSP_LCD_MspInit+0x1b0>)
+ 800327c:	f004 f8d4 	bl	8007428 <HAL_GPIO_Init>
+
+  /* LCD_DISP GPIO configuration */
+  gpio_init_structure.Pin       = LCD_DISP_PIN;     /* LCD_DISP pin has to be manually controlled */
+ 8003280:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 8003284:	62fb      	str	r3, [r7, #44]	; 0x2c
+  gpio_init_structure.Mode      = GPIO_MODE_OUTPUT_PP;
+ 8003286:	2301      	movs	r3, #1
+ 8003288:	633b      	str	r3, [r7, #48]	; 0x30
+  HAL_GPIO_Init(LCD_DISP_GPIO_PORT, &gpio_init_structure);
+ 800328a:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 800328e:	4619      	mov	r1, r3
+ 8003290:	480b      	ldr	r0, [pc, #44]	; (80032c0 <BSP_LCD_MspInit+0x1a8>)
+ 8003292:	f004 f8c9 	bl	8007428 <HAL_GPIO_Init>
+
+  /* LCD_BL_CTRL GPIO configuration */
+  gpio_init_structure.Pin       = LCD_BL_CTRL_PIN;  /* LCD_BL_CTRL pin has to be manually controlled */
+ 8003296:	2308      	movs	r3, #8
+ 8003298:	62fb      	str	r3, [r7, #44]	; 0x2c
+  gpio_init_structure.Mode      = GPIO_MODE_OUTPUT_PP;
+ 800329a:	2301      	movs	r3, #1
+ 800329c:	633b      	str	r3, [r7, #48]	; 0x30
+  HAL_GPIO_Init(LCD_BL_CTRL_GPIO_PORT, &gpio_init_structure);
+ 800329e:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 80032a2:	4619      	mov	r1, r3
+ 80032a4:	4808      	ldr	r0, [pc, #32]	; (80032c8 <BSP_LCD_MspInit+0x1b0>)
+ 80032a6:	f004 f8bf 	bl	8007428 <HAL_GPIO_Init>
+}
+ 80032aa:	bf00      	nop
+ 80032ac:	3740      	adds	r7, #64	; 0x40
+ 80032ae:	46bd      	mov	sp, r7
+ 80032b0:	bd80      	pop	{r7, pc}
+ 80032b2:	bf00      	nop
+ 80032b4:	40023800 	.word	0x40023800
+ 80032b8:	40021000 	.word	0x40021000
+ 80032bc:	40021800 	.word	0x40021800
+ 80032c0:	40022000 	.word	0x40022000
+ 80032c4:	40022400 	.word	0x40022400
+ 80032c8:	40022800 	.word	0x40022800
+
+080032cc <BSP_LCD_ClockConfig>:
+  * @note   This API is called by BSP_LCD_Init()
+  *         Being __weak it can be overwritten by the application
+  * @retval None
+  */
+__weak void BSP_LCD_ClockConfig(LTDC_HandleTypeDef *hltdc, void *Params)
+{
+ 80032cc:	b580      	push	{r7, lr}
+ 80032ce:	b082      	sub	sp, #8
+ 80032d0:	af00      	add	r7, sp, #0
+ 80032d2:	6078      	str	r0, [r7, #4]
+ 80032d4:	6039      	str	r1, [r7, #0]
+  /* RK043FN48H LCD clock configuration */
+  /* PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz */
+  /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 192 Mhz */
+  /* PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 192/5 = 38.4 Mhz */
+  /* LTDC clock frequency = PLLLCDCLK / LTDC_PLLSAI_DIVR_4 = 38.4/4 = 9.6Mhz */
+  periph_clk_init_struct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
+ 80032d6:	4b0a      	ldr	r3, [pc, #40]	; (8003300 <BSP_LCD_ClockConfig+0x34>)
+ 80032d8:	2208      	movs	r2, #8
+ 80032da:	601a      	str	r2, [r3, #0]
+  periph_clk_init_struct.PLLSAI.PLLSAIN = 192;
+ 80032dc:	4b08      	ldr	r3, [pc, #32]	; (8003300 <BSP_LCD_ClockConfig+0x34>)
+ 80032de:	22c0      	movs	r2, #192	; 0xc0
+ 80032e0:	615a      	str	r2, [r3, #20]
+  periph_clk_init_struct.PLLSAI.PLLSAIR = RK043FN48H_FREQUENCY_DIVIDER;
+ 80032e2:	4b07      	ldr	r3, [pc, #28]	; (8003300 <BSP_LCD_ClockConfig+0x34>)
+ 80032e4:	2205      	movs	r2, #5
+ 80032e6:	61da      	str	r2, [r3, #28]
+  periph_clk_init_struct.PLLSAIDivR = RCC_PLLSAIDIVR_4;
+ 80032e8:	4b05      	ldr	r3, [pc, #20]	; (8003300 <BSP_LCD_ClockConfig+0x34>)
+ 80032ea:	f44f 3280 	mov.w	r2, #65536	; 0x10000
+ 80032ee:	62da      	str	r2, [r3, #44]	; 0x2c
+  HAL_RCCEx_PeriphCLKConfig(&periph_clk_init_struct);
+ 80032f0:	4803      	ldr	r0, [pc, #12]	; (8003300 <BSP_LCD_ClockConfig+0x34>)
+ 80032f2:	f006 f9af 	bl	8009654 <HAL_RCCEx_PeriphCLKConfig>
+}
+ 80032f6:	bf00      	nop
+ 80032f8:	3708      	adds	r7, #8
+ 80032fa:	46bd      	mov	sp, r7
+ 80032fc:	bd80      	pop	{r7, pc}
+ 80032fe:	bf00      	nop
+ 8003300:	20000424 	.word	0x20000424
+
+08003304 <DrawChar>:
+  * @param  Ypos: Start column address
+  * @param  c: Pointer to the character data
+  * @retval None
+  */
+static void DrawChar(uint16_t Xpos, uint16_t Ypos, const uint8_t *c)
+{
+ 8003304:	b580      	push	{r7, lr}
+ 8003306:	b088      	sub	sp, #32
+ 8003308:	af00      	add	r7, sp, #0
+ 800330a:	4603      	mov	r3, r0
+ 800330c:	603a      	str	r2, [r7, #0]
+ 800330e:	80fb      	strh	r3, [r7, #6]
+ 8003310:	460b      	mov	r3, r1
+ 8003312:	80bb      	strh	r3, [r7, #4]
+  uint32_t i = 0, j = 0;
+ 8003314:	2300      	movs	r3, #0
+ 8003316:	61fb      	str	r3, [r7, #28]
+ 8003318:	2300      	movs	r3, #0
+ 800331a:	61bb      	str	r3, [r7, #24]
+  uint16_t height, width;
+  uint8_t  offset;
+  uint8_t  *pchar;
+  uint32_t line;
+  
+  height = DrawProp[ActiveLayer].pFont->Height;
+ 800331c:	4b53      	ldr	r3, [pc, #332]	; (800346c <DrawChar+0x168>)
+ 800331e:	681a      	ldr	r2, [r3, #0]
+ 8003320:	4953      	ldr	r1, [pc, #332]	; (8003470 <DrawChar+0x16c>)
+ 8003322:	4613      	mov	r3, r2
+ 8003324:	005b      	lsls	r3, r3, #1
+ 8003326:	4413      	add	r3, r2
+ 8003328:	009b      	lsls	r3, r3, #2
+ 800332a:	440b      	add	r3, r1
+ 800332c:	3308      	adds	r3, #8
+ 800332e:	681b      	ldr	r3, [r3, #0]
+ 8003330:	88db      	ldrh	r3, [r3, #6]
+ 8003332:	827b      	strh	r3, [r7, #18]
+  width  = DrawProp[ActiveLayer].pFont->Width;
+ 8003334:	4b4d      	ldr	r3, [pc, #308]	; (800346c <DrawChar+0x168>)
+ 8003336:	681a      	ldr	r2, [r3, #0]
+ 8003338:	494d      	ldr	r1, [pc, #308]	; (8003470 <DrawChar+0x16c>)
+ 800333a:	4613      	mov	r3, r2
+ 800333c:	005b      	lsls	r3, r3, #1
+ 800333e:	4413      	add	r3, r2
+ 8003340:	009b      	lsls	r3, r3, #2
+ 8003342:	440b      	add	r3, r1
+ 8003344:	3308      	adds	r3, #8
+ 8003346:	681b      	ldr	r3, [r3, #0]
+ 8003348:	889b      	ldrh	r3, [r3, #4]
+ 800334a:	823b      	strh	r3, [r7, #16]
+  
+  offset =  8 *((width + 7)/8) -  width ;
+ 800334c:	8a3b      	ldrh	r3, [r7, #16]
+ 800334e:	3307      	adds	r3, #7
+ 8003350:	2b00      	cmp	r3, #0
+ 8003352:	da00      	bge.n	8003356 <DrawChar+0x52>
+ 8003354:	3307      	adds	r3, #7
+ 8003356:	10db      	asrs	r3, r3, #3
+ 8003358:	b2db      	uxtb	r3, r3
+ 800335a:	00db      	lsls	r3, r3, #3
+ 800335c:	b2da      	uxtb	r2, r3
+ 800335e:	8a3b      	ldrh	r3, [r7, #16]
+ 8003360:	b2db      	uxtb	r3, r3
+ 8003362:	1ad3      	subs	r3, r2, r3
+ 8003364:	73fb      	strb	r3, [r7, #15]
+  
+  for(i = 0; i < height; i++)
+ 8003366:	2300      	movs	r3, #0
+ 8003368:	61fb      	str	r3, [r7, #28]
+ 800336a:	e076      	b.n	800345a <DrawChar+0x156>
+  {
+    pchar = ((uint8_t *)c + (width + 7)/8 * i);
+ 800336c:	8a3b      	ldrh	r3, [r7, #16]
+ 800336e:	3307      	adds	r3, #7
+ 8003370:	2b00      	cmp	r3, #0
+ 8003372:	da00      	bge.n	8003376 <DrawChar+0x72>
+ 8003374:	3307      	adds	r3, #7
+ 8003376:	10db      	asrs	r3, r3, #3
+ 8003378:	461a      	mov	r2, r3
+ 800337a:	69fb      	ldr	r3, [r7, #28]
+ 800337c:	fb03 f302 	mul.w	r3, r3, r2
+ 8003380:	683a      	ldr	r2, [r7, #0]
+ 8003382:	4413      	add	r3, r2
+ 8003384:	60bb      	str	r3, [r7, #8]
+    
+    switch(((width + 7)/8))
+ 8003386:	8a3b      	ldrh	r3, [r7, #16]
+ 8003388:	3307      	adds	r3, #7
+ 800338a:	2b00      	cmp	r3, #0
+ 800338c:	da00      	bge.n	8003390 <DrawChar+0x8c>
+ 800338e:	3307      	adds	r3, #7
+ 8003390:	10db      	asrs	r3, r3, #3
+ 8003392:	2b01      	cmp	r3, #1
+ 8003394:	d002      	beq.n	800339c <DrawChar+0x98>
+ 8003396:	2b02      	cmp	r3, #2
+ 8003398:	d004      	beq.n	80033a4 <DrawChar+0xa0>
+ 800339a:	e00c      	b.n	80033b6 <DrawChar+0xb2>
+    {
+      
+    case 1:
+      line =  pchar[0];      
+ 800339c:	68bb      	ldr	r3, [r7, #8]
+ 800339e:	781b      	ldrb	r3, [r3, #0]
+ 80033a0:	617b      	str	r3, [r7, #20]
+      break;
+ 80033a2:	e016      	b.n	80033d2 <DrawChar+0xce>
+      
+    case 2:
+      line =  (pchar[0]<< 8) | pchar[1];      
+ 80033a4:	68bb      	ldr	r3, [r7, #8]
+ 80033a6:	781b      	ldrb	r3, [r3, #0]
+ 80033a8:	021b      	lsls	r3, r3, #8
+ 80033aa:	68ba      	ldr	r2, [r7, #8]
+ 80033ac:	3201      	adds	r2, #1
+ 80033ae:	7812      	ldrb	r2, [r2, #0]
+ 80033b0:	4313      	orrs	r3, r2
+ 80033b2:	617b      	str	r3, [r7, #20]
+      break;
+ 80033b4:	e00d      	b.n	80033d2 <DrawChar+0xce>
+      
+    case 3:
+    default:
+      line =  (pchar[0]<< 16) | (pchar[1]<< 8) | pchar[2];      
+ 80033b6:	68bb      	ldr	r3, [r7, #8]
+ 80033b8:	781b      	ldrb	r3, [r3, #0]
+ 80033ba:	041a      	lsls	r2, r3, #16
+ 80033bc:	68bb      	ldr	r3, [r7, #8]
+ 80033be:	3301      	adds	r3, #1
+ 80033c0:	781b      	ldrb	r3, [r3, #0]
+ 80033c2:	021b      	lsls	r3, r3, #8
+ 80033c4:	4313      	orrs	r3, r2
+ 80033c6:	68ba      	ldr	r2, [r7, #8]
+ 80033c8:	3202      	adds	r2, #2
+ 80033ca:	7812      	ldrb	r2, [r2, #0]
+ 80033cc:	4313      	orrs	r3, r2
+ 80033ce:	617b      	str	r3, [r7, #20]
+      break;
+ 80033d0:	bf00      	nop
+    } 
+    
+    for (j = 0; j < width; j++)
+ 80033d2:	2300      	movs	r3, #0
+ 80033d4:	61bb      	str	r3, [r7, #24]
+ 80033d6:	e036      	b.n	8003446 <DrawChar+0x142>
+    {
+      if(line & (1 << (width- j + offset- 1))) 
+ 80033d8:	8a3a      	ldrh	r2, [r7, #16]
+ 80033da:	69bb      	ldr	r3, [r7, #24]
+ 80033dc:	1ad2      	subs	r2, r2, r3
+ 80033de:	7bfb      	ldrb	r3, [r7, #15]
+ 80033e0:	4413      	add	r3, r2
+ 80033e2:	3b01      	subs	r3, #1
+ 80033e4:	2201      	movs	r2, #1
+ 80033e6:	fa02 f303 	lsl.w	r3, r2, r3
+ 80033ea:	461a      	mov	r2, r3
+ 80033ec:	697b      	ldr	r3, [r7, #20]
+ 80033ee:	4013      	ands	r3, r2
+ 80033f0:	2b00      	cmp	r3, #0
+ 80033f2:	d012      	beq.n	800341a <DrawChar+0x116>
+      {
+        BSP_LCD_DrawPixel((Xpos + j), Ypos, DrawProp[ActiveLayer].TextColor);
+ 80033f4:	69bb      	ldr	r3, [r7, #24]
+ 80033f6:	b29a      	uxth	r2, r3
+ 80033f8:	88fb      	ldrh	r3, [r7, #6]
+ 80033fa:	4413      	add	r3, r2
+ 80033fc:	b298      	uxth	r0, r3
+ 80033fe:	4b1b      	ldr	r3, [pc, #108]	; (800346c <DrawChar+0x168>)
+ 8003400:	681a      	ldr	r2, [r3, #0]
+ 8003402:	491b      	ldr	r1, [pc, #108]	; (8003470 <DrawChar+0x16c>)
+ 8003404:	4613      	mov	r3, r2
+ 8003406:	005b      	lsls	r3, r3, #1
+ 8003408:	4413      	add	r3, r2
+ 800340a:	009b      	lsls	r3, r3, #2
+ 800340c:	440b      	add	r3, r1
+ 800340e:	681a      	ldr	r2, [r3, #0]
+ 8003410:	88bb      	ldrh	r3, [r7, #4]
+ 8003412:	4619      	mov	r1, r3
+ 8003414:	f7ff fd00 	bl	8002e18 <BSP_LCD_DrawPixel>
+ 8003418:	e012      	b.n	8003440 <DrawChar+0x13c>
+      }
+      else
+      {
+        BSP_LCD_DrawPixel((Xpos + j), Ypos, DrawProp[ActiveLayer].BackColor);
+ 800341a:	69bb      	ldr	r3, [r7, #24]
+ 800341c:	b29a      	uxth	r2, r3
+ 800341e:	88fb      	ldrh	r3, [r7, #6]
+ 8003420:	4413      	add	r3, r2
+ 8003422:	b298      	uxth	r0, r3
+ 8003424:	4b11      	ldr	r3, [pc, #68]	; (800346c <DrawChar+0x168>)
+ 8003426:	681a      	ldr	r2, [r3, #0]
+ 8003428:	4911      	ldr	r1, [pc, #68]	; (8003470 <DrawChar+0x16c>)
+ 800342a:	4613      	mov	r3, r2
+ 800342c:	005b      	lsls	r3, r3, #1
+ 800342e:	4413      	add	r3, r2
+ 8003430:	009b      	lsls	r3, r3, #2
+ 8003432:	440b      	add	r3, r1
+ 8003434:	3304      	adds	r3, #4
+ 8003436:	681a      	ldr	r2, [r3, #0]
+ 8003438:	88bb      	ldrh	r3, [r7, #4]
+ 800343a:	4619      	mov	r1, r3
+ 800343c:	f7ff fcec 	bl	8002e18 <BSP_LCD_DrawPixel>
+    for (j = 0; j < width; j++)
+ 8003440:	69bb      	ldr	r3, [r7, #24]
+ 8003442:	3301      	adds	r3, #1
+ 8003444:	61bb      	str	r3, [r7, #24]
+ 8003446:	8a3b      	ldrh	r3, [r7, #16]
+ 8003448:	69ba      	ldr	r2, [r7, #24]
+ 800344a:	429a      	cmp	r2, r3
+ 800344c:	d3c4      	bcc.n	80033d8 <DrawChar+0xd4>
+      } 
+    }
+    Ypos++;
+ 800344e:	88bb      	ldrh	r3, [r7, #4]
+ 8003450:	3301      	adds	r3, #1
+ 8003452:	80bb      	strh	r3, [r7, #4]
+  for(i = 0; i < height; i++)
+ 8003454:	69fb      	ldr	r3, [r7, #28]
+ 8003456:	3301      	adds	r3, #1
+ 8003458:	61fb      	str	r3, [r7, #28]
+ 800345a:	8a7b      	ldrh	r3, [r7, #18]
+ 800345c:	69fa      	ldr	r2, [r7, #28]
+ 800345e:	429a      	cmp	r2, r3
+ 8003460:	d384      	bcc.n	800336c <DrawChar+0x68>
+  }
+}
+ 8003462:	bf00      	nop
+ 8003464:	3720      	adds	r7, #32
+ 8003466:	46bd      	mov	sp, r7
+ 8003468:	bd80      	pop	{r7, pc}
+ 800346a:	bf00      	nop
+ 800346c:	20000408 	.word	0x20000408
+ 8003470:	2000040c 	.word	0x2000040c
+
+08003474 <LL_FillBuffer>:
+  * @param  OffLine: Offset
+  * @param  ColorIndex: Color index
+  * @retval None
+  */
+static void LL_FillBuffer(uint32_t LayerIndex, void *pDst, uint32_t xSize, uint32_t ySize, uint32_t OffLine, uint32_t ColorIndex) 
+{
+ 8003474:	b580      	push	{r7, lr}
+ 8003476:	b086      	sub	sp, #24
+ 8003478:	af02      	add	r7, sp, #8
+ 800347a:	60f8      	str	r0, [r7, #12]
+ 800347c:	60b9      	str	r1, [r7, #8]
+ 800347e:	607a      	str	r2, [r7, #4]
+ 8003480:	603b      	str	r3, [r7, #0]
+  /* Register to memory mode with ARGB8888 as color Mode */ 
+  hDma2dHandler.Init.Mode         = DMA2D_R2M;
+ 8003482:	4b1e      	ldr	r3, [pc, #120]	; (80034fc <LL_FillBuffer+0x88>)
+ 8003484:	f44f 3240 	mov.w	r2, #196608	; 0x30000
+ 8003488:	605a      	str	r2, [r3, #4]
+  if(hLtdcHandler.LayerCfg[ActiveLayer].PixelFormat == LTDC_PIXEL_FORMAT_RGB565)
+ 800348a:	4b1d      	ldr	r3, [pc, #116]	; (8003500 <LL_FillBuffer+0x8c>)
+ 800348c:	681b      	ldr	r3, [r3, #0]
+ 800348e:	4a1d      	ldr	r2, [pc, #116]	; (8003504 <LL_FillBuffer+0x90>)
+ 8003490:	2134      	movs	r1, #52	; 0x34
+ 8003492:	fb01 f303 	mul.w	r3, r1, r3
+ 8003496:	4413      	add	r3, r2
+ 8003498:	3348      	adds	r3, #72	; 0x48
+ 800349a:	681b      	ldr	r3, [r3, #0]
+ 800349c:	2b02      	cmp	r3, #2
+ 800349e:	d103      	bne.n	80034a8 <LL_FillBuffer+0x34>
+  { /* RGB565 format */ 
+    hDma2dHandler.Init.ColorMode    = DMA2D_RGB565;
+ 80034a0:	4b16      	ldr	r3, [pc, #88]	; (80034fc <LL_FillBuffer+0x88>)
+ 80034a2:	2202      	movs	r2, #2
+ 80034a4:	609a      	str	r2, [r3, #8]
+ 80034a6:	e002      	b.n	80034ae <LL_FillBuffer+0x3a>
+  }
+  else
+  { /* ARGB8888 format */
+    hDma2dHandler.Init.ColorMode    = DMA2D_ARGB8888;
+ 80034a8:	4b14      	ldr	r3, [pc, #80]	; (80034fc <LL_FillBuffer+0x88>)
+ 80034aa:	2200      	movs	r2, #0
+ 80034ac:	609a      	str	r2, [r3, #8]
+  }
+  hDma2dHandler.Init.OutputOffset = OffLine;      
+ 80034ae:	4a13      	ldr	r2, [pc, #76]	; (80034fc <LL_FillBuffer+0x88>)
+ 80034b0:	69bb      	ldr	r3, [r7, #24]
+ 80034b2:	60d3      	str	r3, [r2, #12]
+  
+  hDma2dHandler.Instance = DMA2D;
+ 80034b4:	4b11      	ldr	r3, [pc, #68]	; (80034fc <LL_FillBuffer+0x88>)
+ 80034b6:	4a14      	ldr	r2, [pc, #80]	; (8003508 <LL_FillBuffer+0x94>)
+ 80034b8:	601a      	str	r2, [r3, #0]
+  
+  /* DMA2D Initialization */
+  if(HAL_DMA2D_Init(&hDma2dHandler) == HAL_OK) 
+ 80034ba:	4810      	ldr	r0, [pc, #64]	; (80034fc <LL_FillBuffer+0x88>)
+ 80034bc:	f002 fba2 	bl	8005c04 <HAL_DMA2D_Init>
+ 80034c0:	4603      	mov	r3, r0
+ 80034c2:	2b00      	cmp	r3, #0
+ 80034c4:	d115      	bne.n	80034f2 <LL_FillBuffer+0x7e>
+  {
+    if(HAL_DMA2D_ConfigLayer(&hDma2dHandler, LayerIndex) == HAL_OK) 
+ 80034c6:	68f9      	ldr	r1, [r7, #12]
+ 80034c8:	480c      	ldr	r0, [pc, #48]	; (80034fc <LL_FillBuffer+0x88>)
+ 80034ca:	f002 fcf9 	bl	8005ec0 <HAL_DMA2D_ConfigLayer>
+ 80034ce:	4603      	mov	r3, r0
+ 80034d0:	2b00      	cmp	r3, #0
+ 80034d2:	d10e      	bne.n	80034f2 <LL_FillBuffer+0x7e>
+    {
+      if (HAL_DMA2D_Start(&hDma2dHandler, ColorIndex, (uint32_t)pDst, xSize, ySize) == HAL_OK)
+ 80034d4:	68ba      	ldr	r2, [r7, #8]
+ 80034d6:	683b      	ldr	r3, [r7, #0]
+ 80034d8:	9300      	str	r3, [sp, #0]
+ 80034da:	687b      	ldr	r3, [r7, #4]
+ 80034dc:	69f9      	ldr	r1, [r7, #28]
+ 80034de:	4807      	ldr	r0, [pc, #28]	; (80034fc <LL_FillBuffer+0x88>)
+ 80034e0:	f002 fbda 	bl	8005c98 <HAL_DMA2D_Start>
+ 80034e4:	4603      	mov	r3, r0
+ 80034e6:	2b00      	cmp	r3, #0
+ 80034e8:	d103      	bne.n	80034f2 <LL_FillBuffer+0x7e>
+      {
+        /* Polling For DMA transfer */  
+        HAL_DMA2D_PollForTransfer(&hDma2dHandler, 10);
+ 80034ea:	210a      	movs	r1, #10
+ 80034ec:	4803      	ldr	r0, [pc, #12]	; (80034fc <LL_FillBuffer+0x88>)
+ 80034ee:	f002 fbfe 	bl	8005cee <HAL_DMA2D_PollForTransfer>
+      }
+    }
+  } 
+}
+ 80034f2:	bf00      	nop
+ 80034f4:	3710      	adds	r7, #16
+ 80034f6:	46bd      	mov	sp, r7
+ 80034f8:	bd80      	pop	{r7, pc}
+ 80034fa:	bf00      	nop
+ 80034fc:	200003c8 	.word	0x200003c8
+ 8003500:	20000408 	.word	0x20000408
+ 8003504:	20008e5c 	.word	0x20008e5c
+ 8003508:	4002b000 	.word	0x4002b000
+
+0800350c <BSP_SDRAM_Init>:
+/**
+  * @brief  Initializes the SDRAM device.
+  * @retval SDRAM status
+  */
+uint8_t BSP_SDRAM_Init(void)
+{ 
+ 800350c:	b580      	push	{r7, lr}
+ 800350e:	af00      	add	r7, sp, #0
+  static uint8_t sdramstatus = SDRAM_ERROR;
+  /* SDRAM device configuration */
+  sdramHandle.Instance = FMC_SDRAM_DEVICE;
+ 8003510:	4b29      	ldr	r3, [pc, #164]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 8003512:	4a2a      	ldr	r2, [pc, #168]	; (80035bc <BSP_SDRAM_Init+0xb0>)
+ 8003514:	601a      	str	r2, [r3, #0]
+    
+  /* Timing configuration for 100Mhz as SD clock frequency (System clock is up to 200Mhz) */
+  Timing.LoadToActiveDelay    = 2;
+ 8003516:	4b2a      	ldr	r3, [pc, #168]	; (80035c0 <BSP_SDRAM_Init+0xb4>)
+ 8003518:	2202      	movs	r2, #2
+ 800351a:	601a      	str	r2, [r3, #0]
+  Timing.ExitSelfRefreshDelay = 7;
+ 800351c:	4b28      	ldr	r3, [pc, #160]	; (80035c0 <BSP_SDRAM_Init+0xb4>)
+ 800351e:	2207      	movs	r2, #7
+ 8003520:	605a      	str	r2, [r3, #4]
+  Timing.SelfRefreshTime      = 4;
+ 8003522:	4b27      	ldr	r3, [pc, #156]	; (80035c0 <BSP_SDRAM_Init+0xb4>)
+ 8003524:	2204      	movs	r2, #4
+ 8003526:	609a      	str	r2, [r3, #8]
+  Timing.RowCycleDelay        = 7;
+ 8003528:	4b25      	ldr	r3, [pc, #148]	; (80035c0 <BSP_SDRAM_Init+0xb4>)
+ 800352a:	2207      	movs	r2, #7
+ 800352c:	60da      	str	r2, [r3, #12]
+  Timing.WriteRecoveryTime    = 2;
+ 800352e:	4b24      	ldr	r3, [pc, #144]	; (80035c0 <BSP_SDRAM_Init+0xb4>)
+ 8003530:	2202      	movs	r2, #2
+ 8003532:	611a      	str	r2, [r3, #16]
+  Timing.RPDelay              = 2;
+ 8003534:	4b22      	ldr	r3, [pc, #136]	; (80035c0 <BSP_SDRAM_Init+0xb4>)
+ 8003536:	2202      	movs	r2, #2
+ 8003538:	615a      	str	r2, [r3, #20]
+  Timing.RCDDelay             = 2;
+ 800353a:	4b21      	ldr	r3, [pc, #132]	; (80035c0 <BSP_SDRAM_Init+0xb4>)
+ 800353c:	2202      	movs	r2, #2
+ 800353e:	619a      	str	r2, [r3, #24]
+  
+  sdramHandle.Init.SDBank             = FMC_SDRAM_BANK1;
+ 8003540:	4b1d      	ldr	r3, [pc, #116]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 8003542:	2200      	movs	r2, #0
+ 8003544:	605a      	str	r2, [r3, #4]
+  sdramHandle.Init.ColumnBitsNumber   = FMC_SDRAM_COLUMN_BITS_NUM_8;
+ 8003546:	4b1c      	ldr	r3, [pc, #112]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 8003548:	2200      	movs	r2, #0
+ 800354a:	609a      	str	r2, [r3, #8]
+  sdramHandle.Init.RowBitsNumber      = FMC_SDRAM_ROW_BITS_NUM_12;
+ 800354c:	4b1a      	ldr	r3, [pc, #104]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 800354e:	2204      	movs	r2, #4
+ 8003550:	60da      	str	r2, [r3, #12]
+  sdramHandle.Init.MemoryDataWidth    = SDRAM_MEMORY_WIDTH;
+ 8003552:	4b19      	ldr	r3, [pc, #100]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 8003554:	2210      	movs	r2, #16
+ 8003556:	611a      	str	r2, [r3, #16]
+  sdramHandle.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
+ 8003558:	4b17      	ldr	r3, [pc, #92]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 800355a:	2240      	movs	r2, #64	; 0x40
+ 800355c:	615a      	str	r2, [r3, #20]
+  sdramHandle.Init.CASLatency         = FMC_SDRAM_CAS_LATENCY_2;
+ 800355e:	4b16      	ldr	r3, [pc, #88]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 8003560:	f44f 7280 	mov.w	r2, #256	; 0x100
+ 8003564:	619a      	str	r2, [r3, #24]
+  sdramHandle.Init.WriteProtection    = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
+ 8003566:	4b14      	ldr	r3, [pc, #80]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 8003568:	2200      	movs	r2, #0
+ 800356a:	61da      	str	r2, [r3, #28]
+  sdramHandle.Init.SDClockPeriod      = SDCLOCK_PERIOD;
+ 800356c:	4b12      	ldr	r3, [pc, #72]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 800356e:	f44f 6200 	mov.w	r2, #2048	; 0x800
+ 8003572:	621a      	str	r2, [r3, #32]
+  sdramHandle.Init.ReadBurst          = FMC_SDRAM_RBURST_ENABLE;
+ 8003574:	4b10      	ldr	r3, [pc, #64]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 8003576:	f44f 5280 	mov.w	r2, #4096	; 0x1000
+ 800357a:	625a      	str	r2, [r3, #36]	; 0x24
+  sdramHandle.Init.ReadPipeDelay      = FMC_SDRAM_RPIPE_DELAY_0;
+ 800357c:	4b0e      	ldr	r3, [pc, #56]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 800357e:	2200      	movs	r2, #0
+ 8003580:	629a      	str	r2, [r3, #40]	; 0x28
+  
+  /* SDRAM controller initialization */
+
+  BSP_SDRAM_MspInit(&sdramHandle, NULL); /* __weak function can be rewritten by the application */
+ 8003582:	2100      	movs	r1, #0
+ 8003584:	480c      	ldr	r0, [pc, #48]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 8003586:	f000 f87f 	bl	8003688 <BSP_SDRAM_MspInit>
+
+  if(HAL_SDRAM_Init(&sdramHandle, &Timing) != HAL_OK)
+ 800358a:	490d      	ldr	r1, [pc, #52]	; (80035c0 <BSP_SDRAM_Init+0xb4>)
+ 800358c:	480a      	ldr	r0, [pc, #40]	; (80035b8 <BSP_SDRAM_Init+0xac>)
+ 800358e:	f007 f83b 	bl	800a608 <HAL_SDRAM_Init>
+ 8003592:	4603      	mov	r3, r0
+ 8003594:	2b00      	cmp	r3, #0
+ 8003596:	d003      	beq.n	80035a0 <BSP_SDRAM_Init+0x94>
+  {
+    sdramstatus = SDRAM_ERROR;
+ 8003598:	4b0a      	ldr	r3, [pc, #40]	; (80035c4 <BSP_SDRAM_Init+0xb8>)
+ 800359a:	2201      	movs	r2, #1
+ 800359c:	701a      	strb	r2, [r3, #0]
+ 800359e:	e002      	b.n	80035a6 <BSP_SDRAM_Init+0x9a>
+  }
+  else
+  {
+    sdramstatus = SDRAM_OK;
+ 80035a0:	4b08      	ldr	r3, [pc, #32]	; (80035c4 <BSP_SDRAM_Init+0xb8>)
+ 80035a2:	2200      	movs	r2, #0
+ 80035a4:	701a      	strb	r2, [r3, #0]
+  }
+  
+  /* SDRAM initialization sequence */
+  BSP_SDRAM_Initialization_sequence(REFRESH_COUNT);
+ 80035a6:	f240 6003 	movw	r0, #1539	; 0x603
+ 80035aa:	f000 f80d 	bl	80035c8 <BSP_SDRAM_Initialization_sequence>
+  
+  return sdramstatus;
+ 80035ae:	4b05      	ldr	r3, [pc, #20]	; (80035c4 <BSP_SDRAM_Init+0xb8>)
+ 80035b0:	781b      	ldrb	r3, [r3, #0]
+}
+ 80035b2:	4618      	mov	r0, r3
+ 80035b4:	bd80      	pop	{r7, pc}
+ 80035b6:	bf00      	nop
+ 80035b8:	20008f04 	.word	0x20008f04
+ 80035bc:	a0000140 	.word	0xa0000140
+ 80035c0:	200004a8 	.word	0x200004a8
+ 80035c4:	2000004c 	.word	0x2000004c
+
+080035c8 <BSP_SDRAM_Initialization_sequence>:
+  * @brief  Programs the SDRAM device.
+  * @param  RefreshCount: SDRAM refresh counter value 
+  * @retval None
+  */
+void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount)
+{
+ 80035c8:	b580      	push	{r7, lr}
+ 80035ca:	b084      	sub	sp, #16
+ 80035cc:	af00      	add	r7, sp, #0
+ 80035ce:	6078      	str	r0, [r7, #4]
+  __IO uint32_t tmpmrd = 0;
+ 80035d0:	2300      	movs	r3, #0
+ 80035d2:	60fb      	str	r3, [r7, #12]
+  
+  /* Step 1: Configure a clock configuration enable command */
+  Command.CommandMode            = FMC_SDRAM_CMD_CLK_ENABLE;
+ 80035d4:	4b2a      	ldr	r3, [pc, #168]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 80035d6:	2201      	movs	r2, #1
+ 80035d8:	601a      	str	r2, [r3, #0]
+  Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
+ 80035da:	4b29      	ldr	r3, [pc, #164]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 80035dc:	2210      	movs	r2, #16
+ 80035de:	605a      	str	r2, [r3, #4]
+  Command.AutoRefreshNumber      = 1;
+ 80035e0:	4b27      	ldr	r3, [pc, #156]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 80035e2:	2201      	movs	r2, #1
+ 80035e4:	609a      	str	r2, [r3, #8]
+  Command.ModeRegisterDefinition = 0;
+ 80035e6:	4b26      	ldr	r3, [pc, #152]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 80035e8:	2200      	movs	r2, #0
+ 80035ea:	60da      	str	r2, [r3, #12]
+
+  /* Send the command */
+  HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
+ 80035ec:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 80035f0:	4923      	ldr	r1, [pc, #140]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 80035f2:	4824      	ldr	r0, [pc, #144]	; (8003684 <BSP_SDRAM_Initialization_sequence+0xbc>)
+ 80035f4:	f007 f83c 	bl	800a670 <HAL_SDRAM_SendCommand>
+
+  /* Step 2: Insert 100 us minimum delay */ 
+  /* Inserted delay is equal to 1 ms due to systick time base unit (ms) */
+  HAL_Delay(1);
+ 80035f8:	2001      	movs	r0, #1
+ 80035fa:	f001 fab1 	bl	8004b60 <HAL_Delay>
+    
+  /* Step 3: Configure a PALL (precharge all) command */ 
+  Command.CommandMode            = FMC_SDRAM_CMD_PALL;
+ 80035fe:	4b20      	ldr	r3, [pc, #128]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 8003600:	2202      	movs	r2, #2
+ 8003602:	601a      	str	r2, [r3, #0]
+  Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
+ 8003604:	4b1e      	ldr	r3, [pc, #120]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 8003606:	2210      	movs	r2, #16
+ 8003608:	605a      	str	r2, [r3, #4]
+  Command.AutoRefreshNumber      = 1;
+ 800360a:	4b1d      	ldr	r3, [pc, #116]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 800360c:	2201      	movs	r2, #1
+ 800360e:	609a      	str	r2, [r3, #8]
+  Command.ModeRegisterDefinition = 0;
+ 8003610:	4b1b      	ldr	r3, [pc, #108]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 8003612:	2200      	movs	r2, #0
+ 8003614:	60da      	str	r2, [r3, #12]
+
+  /* Send the command */
+  HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);  
+ 8003616:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 800361a:	4919      	ldr	r1, [pc, #100]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 800361c:	4819      	ldr	r0, [pc, #100]	; (8003684 <BSP_SDRAM_Initialization_sequence+0xbc>)
+ 800361e:	f007 f827 	bl	800a670 <HAL_SDRAM_SendCommand>
+  
+  /* Step 4: Configure an Auto Refresh command */ 
+  Command.CommandMode            = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
+ 8003622:	4b17      	ldr	r3, [pc, #92]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 8003624:	2203      	movs	r2, #3
+ 8003626:	601a      	str	r2, [r3, #0]
+  Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
+ 8003628:	4b15      	ldr	r3, [pc, #84]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 800362a:	2210      	movs	r2, #16
+ 800362c:	605a      	str	r2, [r3, #4]
+  Command.AutoRefreshNumber      = 8;
+ 800362e:	4b14      	ldr	r3, [pc, #80]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 8003630:	2208      	movs	r2, #8
+ 8003632:	609a      	str	r2, [r3, #8]
+  Command.ModeRegisterDefinition = 0;
+ 8003634:	4b12      	ldr	r3, [pc, #72]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 8003636:	2200      	movs	r2, #0
+ 8003638:	60da      	str	r2, [r3, #12]
+
+  /* Send the command */
+  HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
+ 800363a:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 800363e:	4910      	ldr	r1, [pc, #64]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 8003640:	4810      	ldr	r0, [pc, #64]	; (8003684 <BSP_SDRAM_Initialization_sequence+0xbc>)
+ 8003642:	f007 f815 	bl	800a670 <HAL_SDRAM_SendCommand>
+  
+  /* Step 5: Program the external memory mode register */
+  tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1          |\
+ 8003646:	f44f 7308 	mov.w	r3, #544	; 0x220
+ 800364a:	60fb      	str	r3, [r7, #12]
+                     SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL   |\
+                     SDRAM_MODEREG_CAS_LATENCY_2           |\
+                     SDRAM_MODEREG_OPERATING_MODE_STANDARD |\
+                     SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
+  
+  Command.CommandMode            = FMC_SDRAM_CMD_LOAD_MODE;
+ 800364c:	4b0c      	ldr	r3, [pc, #48]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 800364e:	2204      	movs	r2, #4
+ 8003650:	601a      	str	r2, [r3, #0]
+  Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
+ 8003652:	4b0b      	ldr	r3, [pc, #44]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 8003654:	2210      	movs	r2, #16
+ 8003656:	605a      	str	r2, [r3, #4]
+  Command.AutoRefreshNumber      = 1;
+ 8003658:	4b09      	ldr	r3, [pc, #36]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 800365a:	2201      	movs	r2, #1
+ 800365c:	609a      	str	r2, [r3, #8]
+  Command.ModeRegisterDefinition = tmpmrd;
+ 800365e:	68fb      	ldr	r3, [r7, #12]
+ 8003660:	4a07      	ldr	r2, [pc, #28]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 8003662:	60d3      	str	r3, [r2, #12]
+
+  /* Send the command */
+  HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
+ 8003664:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8003668:	4905      	ldr	r1, [pc, #20]	; (8003680 <BSP_SDRAM_Initialization_sequence+0xb8>)
+ 800366a:	4806      	ldr	r0, [pc, #24]	; (8003684 <BSP_SDRAM_Initialization_sequence+0xbc>)
+ 800366c:	f007 f800 	bl	800a670 <HAL_SDRAM_SendCommand>
+  
+  /* Step 6: Set the refresh rate counter */
+  /* Set the device refresh rate */
+  HAL_SDRAM_ProgramRefreshRate(&sdramHandle, RefreshCount); 
+ 8003670:	6879      	ldr	r1, [r7, #4]
+ 8003672:	4804      	ldr	r0, [pc, #16]	; (8003684 <BSP_SDRAM_Initialization_sequence+0xbc>)
+ 8003674:	f007 f827 	bl	800a6c6 <HAL_SDRAM_ProgramRefreshRate>
+}
+ 8003678:	bf00      	nop
+ 800367a:	3710      	adds	r7, #16
+ 800367c:	46bd      	mov	sp, r7
+ 800367e:	bd80      	pop	{r7, pc}
+ 8003680:	200004c4 	.word	0x200004c4
+ 8003684:	20008f04 	.word	0x20008f04
+
+08003688 <BSP_SDRAM_MspInit>:
+  * @param  hsdram: SDRAM handle
+  * @param  Params
+  * @retval None
+  */
+__weak void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef  *hsdram, void *Params)
+{  
+ 8003688:	b580      	push	{r7, lr}
+ 800368a:	b090      	sub	sp, #64	; 0x40
+ 800368c:	af00      	add	r7, sp, #0
+ 800368e:	6078      	str	r0, [r7, #4]
+ 8003690:	6039      	str	r1, [r7, #0]
+  static DMA_HandleTypeDef dma_handle;
+  GPIO_InitTypeDef gpio_init_structure;
+  
+  /* Enable FMC clock */
+  __HAL_RCC_FMC_CLK_ENABLE();
+ 8003692:	4b70      	ldr	r3, [pc, #448]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 8003694:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8003696:	4a6f      	ldr	r2, [pc, #444]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 8003698:	f043 0301 	orr.w	r3, r3, #1
+ 800369c:	6393      	str	r3, [r2, #56]	; 0x38
+ 800369e:	4b6d      	ldr	r3, [pc, #436]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036a0:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 80036a2:	f003 0301 	and.w	r3, r3, #1
+ 80036a6:	62bb      	str	r3, [r7, #40]	; 0x28
+ 80036a8:	6abb      	ldr	r3, [r7, #40]	; 0x28
+  
+  /* Enable chosen DMAx clock */
+  __DMAx_CLK_ENABLE();
+ 80036aa:	4b6a      	ldr	r3, [pc, #424]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036ac:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80036ae:	4a69      	ldr	r2, [pc, #420]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036b0:	f443 0380 	orr.w	r3, r3, #4194304	; 0x400000
+ 80036b4:	6313      	str	r3, [r2, #48]	; 0x30
+ 80036b6:	4b67      	ldr	r3, [pc, #412]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036b8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80036ba:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
+ 80036be:	627b      	str	r3, [r7, #36]	; 0x24
+ 80036c0:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+
+  /* Enable GPIOs clock */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+ 80036c2:	4b64      	ldr	r3, [pc, #400]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036c4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80036c6:	4a63      	ldr	r2, [pc, #396]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036c8:	f043 0304 	orr.w	r3, r3, #4
+ 80036cc:	6313      	str	r3, [r2, #48]	; 0x30
+ 80036ce:	4b61      	ldr	r3, [pc, #388]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036d0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80036d2:	f003 0304 	and.w	r3, r3, #4
+ 80036d6:	623b      	str	r3, [r7, #32]
+ 80036d8:	6a3b      	ldr	r3, [r7, #32]
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+ 80036da:	4b5e      	ldr	r3, [pc, #376]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036dc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80036de:	4a5d      	ldr	r2, [pc, #372]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036e0:	f043 0308 	orr.w	r3, r3, #8
+ 80036e4:	6313      	str	r3, [r2, #48]	; 0x30
+ 80036e6:	4b5b      	ldr	r3, [pc, #364]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036e8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80036ea:	f003 0308 	and.w	r3, r3, #8
+ 80036ee:	61fb      	str	r3, [r7, #28]
+ 80036f0:	69fb      	ldr	r3, [r7, #28]
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+ 80036f2:	4b58      	ldr	r3, [pc, #352]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036f4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80036f6:	4a57      	ldr	r2, [pc, #348]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 80036f8:	f043 0310 	orr.w	r3, r3, #16
+ 80036fc:	6313      	str	r3, [r2, #48]	; 0x30
+ 80036fe:	4b55      	ldr	r3, [pc, #340]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 8003700:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003702:	f003 0310 	and.w	r3, r3, #16
+ 8003706:	61bb      	str	r3, [r7, #24]
+ 8003708:	69bb      	ldr	r3, [r7, #24]
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+ 800370a:	4b52      	ldr	r3, [pc, #328]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 800370c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800370e:	4a51      	ldr	r2, [pc, #324]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 8003710:	f043 0320 	orr.w	r3, r3, #32
+ 8003714:	6313      	str	r3, [r2, #48]	; 0x30
+ 8003716:	4b4f      	ldr	r3, [pc, #316]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 8003718:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800371a:	f003 0320 	and.w	r3, r3, #32
+ 800371e:	617b      	str	r3, [r7, #20]
+ 8003720:	697b      	ldr	r3, [r7, #20]
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+ 8003722:	4b4c      	ldr	r3, [pc, #304]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 8003724:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003726:	4a4b      	ldr	r2, [pc, #300]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 8003728:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 800372c:	6313      	str	r3, [r2, #48]	; 0x30
+ 800372e:	4b49      	ldr	r3, [pc, #292]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 8003730:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003732:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 8003736:	613b      	str	r3, [r7, #16]
+ 8003738:	693b      	ldr	r3, [r7, #16]
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+ 800373a:	4b46      	ldr	r3, [pc, #280]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 800373c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800373e:	4a45      	ldr	r2, [pc, #276]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 8003740:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 8003744:	6313      	str	r3, [r2, #48]	; 0x30
+ 8003746:	4b43      	ldr	r3, [pc, #268]	; (8003854 <BSP_SDRAM_MspInit+0x1cc>)
+ 8003748:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800374a:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 800374e:	60fb      	str	r3, [r7, #12]
+ 8003750:	68fb      	ldr	r3, [r7, #12]
+  
+  /* Common GPIO configuration */
+  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
+ 8003752:	2302      	movs	r3, #2
+ 8003754:	633b      	str	r3, [r7, #48]	; 0x30
+  gpio_init_structure.Pull      = GPIO_PULLUP;
+ 8003756:	2301      	movs	r3, #1
+ 8003758:	637b      	str	r3, [r7, #52]	; 0x34
+  gpio_init_structure.Speed     = GPIO_SPEED_FAST;
+ 800375a:	2302      	movs	r3, #2
+ 800375c:	63bb      	str	r3, [r7, #56]	; 0x38
+  gpio_init_structure.Alternate = GPIO_AF12_FMC;
+ 800375e:	230c      	movs	r3, #12
+ 8003760:	63fb      	str	r3, [r7, #60]	; 0x3c
+  
+  /* GPIOC configuration */
+  gpio_init_structure.Pin   = GPIO_PIN_3;
+ 8003762:	2308      	movs	r3, #8
+ 8003764:	62fb      	str	r3, [r7, #44]	; 0x2c
+  HAL_GPIO_Init(GPIOC, &gpio_init_structure);
+ 8003766:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 800376a:	4619      	mov	r1, r3
+ 800376c:	483a      	ldr	r0, [pc, #232]	; (8003858 <BSP_SDRAM_MspInit+0x1d0>)
+ 800376e:	f003 fe5b 	bl	8007428 <HAL_GPIO_Init>
+
+  /* GPIOD configuration */
+  gpio_init_structure.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8 | GPIO_PIN_9 |
+ 8003772:	f24c 7303 	movw	r3, #50947	; 0xc703
+ 8003776:	62fb      	str	r3, [r7, #44]	; 0x2c
+                              GPIO_PIN_10 | GPIO_PIN_14 | GPIO_PIN_15;
+  HAL_GPIO_Init(GPIOD, &gpio_init_structure);
+ 8003778:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 800377c:	4619      	mov	r1, r3
+ 800377e:	4837      	ldr	r0, [pc, #220]	; (800385c <BSP_SDRAM_MspInit+0x1d4>)
+ 8003780:	f003 fe52 	bl	8007428 <HAL_GPIO_Init>
+
+  /* GPIOE configuration */  
+  gpio_init_structure.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7| GPIO_PIN_8 | GPIO_PIN_9 |\
+ 8003784:	f64f 7383 	movw	r3, #65411	; 0xff83
+ 8003788:	62fb      	str	r3, [r7, #44]	; 0x2c
+                              GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
+                              GPIO_PIN_15;
+  HAL_GPIO_Init(GPIOE, &gpio_init_structure);
+ 800378a:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 800378e:	4619      	mov	r1, r3
+ 8003790:	4833      	ldr	r0, [pc, #204]	; (8003860 <BSP_SDRAM_MspInit+0x1d8>)
+ 8003792:	f003 fe49 	bl	8007428 <HAL_GPIO_Init>
+  
+  /* GPIOF configuration */  
+  gpio_init_structure.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
+ 8003796:	f64f 033f 	movw	r3, #63551	; 0xf83f
+ 800379a:	62fb      	str	r3, [r7, #44]	; 0x2c
+                              GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
+                              GPIO_PIN_15;
+  HAL_GPIO_Init(GPIOF, &gpio_init_structure);
+ 800379c:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 80037a0:	4619      	mov	r1, r3
+ 80037a2:	4830      	ldr	r0, [pc, #192]	; (8003864 <BSP_SDRAM_MspInit+0x1dc>)
+ 80037a4:	f003 fe40 	bl	8007428 <HAL_GPIO_Init>
+  
+  /* GPIOG configuration */  
+  gpio_init_structure.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4| GPIO_PIN_5 | GPIO_PIN_8 |\
+ 80037a8:	f248 1333 	movw	r3, #33075	; 0x8133
+ 80037ac:	62fb      	str	r3, [r7, #44]	; 0x2c
+                              GPIO_PIN_15;
+  HAL_GPIO_Init(GPIOG, &gpio_init_structure);
+ 80037ae:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 80037b2:	4619      	mov	r1, r3
+ 80037b4:	482c      	ldr	r0, [pc, #176]	; (8003868 <BSP_SDRAM_MspInit+0x1e0>)
+ 80037b6:	f003 fe37 	bl	8007428 <HAL_GPIO_Init>
+
+  /* GPIOH configuration */  
+  gpio_init_structure.Pin   = GPIO_PIN_3 | GPIO_PIN_5;
+ 80037ba:	2328      	movs	r3, #40	; 0x28
+ 80037bc:	62fb      	str	r3, [r7, #44]	; 0x2c
+  HAL_GPIO_Init(GPIOH, &gpio_init_structure); 
+ 80037be:	f107 032c 	add.w	r3, r7, #44	; 0x2c
+ 80037c2:	4619      	mov	r1, r3
+ 80037c4:	4829      	ldr	r0, [pc, #164]	; (800386c <BSP_SDRAM_MspInit+0x1e4>)
+ 80037c6:	f003 fe2f 	bl	8007428 <HAL_GPIO_Init>
+  
+  /* Configure common DMA parameters */
+  dma_handle.Init.Channel             = SDRAM_DMAx_CHANNEL;
+ 80037ca:	4b29      	ldr	r3, [pc, #164]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 80037cc:	2200      	movs	r2, #0
+ 80037ce:	605a      	str	r2, [r3, #4]
+  dma_handle.Init.Direction           = DMA_MEMORY_TO_MEMORY;
+ 80037d0:	4b27      	ldr	r3, [pc, #156]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 80037d2:	2280      	movs	r2, #128	; 0x80
+ 80037d4:	609a      	str	r2, [r3, #8]
+  dma_handle.Init.PeriphInc           = DMA_PINC_ENABLE;
+ 80037d6:	4b26      	ldr	r3, [pc, #152]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 80037d8:	f44f 7200 	mov.w	r2, #512	; 0x200
+ 80037dc:	60da      	str	r2, [r3, #12]
+  dma_handle.Init.MemInc              = DMA_MINC_ENABLE;
+ 80037de:	4b24      	ldr	r3, [pc, #144]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 80037e0:	f44f 6280 	mov.w	r2, #1024	; 0x400
+ 80037e4:	611a      	str	r2, [r3, #16]
+  dma_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+ 80037e6:	4b22      	ldr	r3, [pc, #136]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 80037e8:	f44f 5280 	mov.w	r2, #4096	; 0x1000
+ 80037ec:	615a      	str	r2, [r3, #20]
+  dma_handle.Init.MemDataAlignment    = DMA_MDATAALIGN_WORD;
+ 80037ee:	4b20      	ldr	r3, [pc, #128]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 80037f0:	f44f 4280 	mov.w	r2, #16384	; 0x4000
+ 80037f4:	619a      	str	r2, [r3, #24]
+  dma_handle.Init.Mode                = DMA_NORMAL;
+ 80037f6:	4b1e      	ldr	r3, [pc, #120]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 80037f8:	2200      	movs	r2, #0
+ 80037fa:	61da      	str	r2, [r3, #28]
+  dma_handle.Init.Priority            = DMA_PRIORITY_HIGH;
+ 80037fc:	4b1c      	ldr	r3, [pc, #112]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 80037fe:	f44f 3200 	mov.w	r2, #131072	; 0x20000
+ 8003802:	621a      	str	r2, [r3, #32]
+  dma_handle.Init.FIFOMode            = DMA_FIFOMODE_DISABLE;         
+ 8003804:	4b1a      	ldr	r3, [pc, #104]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 8003806:	2200      	movs	r2, #0
+ 8003808:	625a      	str	r2, [r3, #36]	; 0x24
+  dma_handle.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
+ 800380a:	4b19      	ldr	r3, [pc, #100]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 800380c:	2203      	movs	r2, #3
+ 800380e:	629a      	str	r2, [r3, #40]	; 0x28
+  dma_handle.Init.MemBurst            = DMA_MBURST_SINGLE;
+ 8003810:	4b17      	ldr	r3, [pc, #92]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 8003812:	2200      	movs	r2, #0
+ 8003814:	62da      	str	r2, [r3, #44]	; 0x2c
+  dma_handle.Init.PeriphBurst         = DMA_PBURST_SINGLE; 
+ 8003816:	4b16      	ldr	r3, [pc, #88]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 8003818:	2200      	movs	r2, #0
+ 800381a:	631a      	str	r2, [r3, #48]	; 0x30
+  
+  dma_handle.Instance = SDRAM_DMAx_STREAM;
+ 800381c:	4b14      	ldr	r3, [pc, #80]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 800381e:	4a15      	ldr	r2, [pc, #84]	; (8003874 <BSP_SDRAM_MspInit+0x1ec>)
+ 8003820:	601a      	str	r2, [r3, #0]
+  
+   /* Associate the DMA handle */
+  __HAL_LINKDMA(hsdram, hdma, dma_handle);
+ 8003822:	687b      	ldr	r3, [r7, #4]
+ 8003824:	4a12      	ldr	r2, [pc, #72]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 8003826:	631a      	str	r2, [r3, #48]	; 0x30
+ 8003828:	4a11      	ldr	r2, [pc, #68]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 800382a:	687b      	ldr	r3, [r7, #4]
+ 800382c:	6393      	str	r3, [r2, #56]	; 0x38
+  
+  /* Deinitialize the stream for new transfer */
+  HAL_DMA_DeInit(&dma_handle);
+ 800382e:	4810      	ldr	r0, [pc, #64]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 8003830:	f002 f8da 	bl	80059e8 <HAL_DMA_DeInit>
+  
+  /* Configure the DMA stream */
+  HAL_DMA_Init(&dma_handle); 
+ 8003834:	480e      	ldr	r0, [pc, #56]	; (8003870 <BSP_SDRAM_MspInit+0x1e8>)
+ 8003836:	f002 f829 	bl	800588c <HAL_DMA_Init>
+  
+  /* NVIC configuration for DMA transfer complete interrupt */
+  HAL_NVIC_SetPriority(SDRAM_DMAx_IRQn, 0x0F, 0);
+ 800383a:	2200      	movs	r2, #0
+ 800383c:	210f      	movs	r1, #15
+ 800383e:	2038      	movs	r0, #56	; 0x38
+ 8003840:	f001 fe42 	bl	80054c8 <HAL_NVIC_SetPriority>
+  HAL_NVIC_EnableIRQ(SDRAM_DMAx_IRQn);
+ 8003844:	2038      	movs	r0, #56	; 0x38
+ 8003846:	f001 fe5b 	bl	8005500 <HAL_NVIC_EnableIRQ>
+}
+ 800384a:	bf00      	nop
+ 800384c:	3740      	adds	r7, #64	; 0x40
+ 800384e:	46bd      	mov	sp, r7
+ 8003850:	bd80      	pop	{r7, pc}
+ 8003852:	bf00      	nop
+ 8003854:	40023800 	.word	0x40023800
+ 8003858:	40020800 	.word	0x40020800
+ 800385c:	40020c00 	.word	0x40020c00
+ 8003860:	40021000 	.word	0x40021000
+ 8003864:	40021400 	.word	0x40021400
+ 8003868:	40021800 	.word	0x40021800
+ 800386c:	40021c00 	.word	0x40021c00
+ 8003870:	200004d4 	.word	0x200004d4
+ 8003874:	40026410 	.word	0x40026410
+
+08003878 <BSP_TS_Init>:
+  * @param  ts_SizeX: Maximum X size of the TS area on LCD
+  * @param  ts_SizeY: Maximum Y size of the TS area on LCD
+  * @retval TS_OK if all initializations are OK. Other value if error.
+  */
+uint8_t BSP_TS_Init(uint16_t ts_SizeX, uint16_t ts_SizeY)
+{
+ 8003878:	b580      	push	{r7, lr}
+ 800387a:	b084      	sub	sp, #16
+ 800387c:	af00      	add	r7, sp, #0
+ 800387e:	4603      	mov	r3, r0
+ 8003880:	460a      	mov	r2, r1
+ 8003882:	80fb      	strh	r3, [r7, #6]
+ 8003884:	4613      	mov	r3, r2
+ 8003886:	80bb      	strh	r3, [r7, #4]
+  uint8_t status = TS_OK;
+ 8003888:	2300      	movs	r3, #0
+ 800388a:	73fb      	strb	r3, [r7, #15]
+  tsXBoundary = ts_SizeX;
+ 800388c:	4a14      	ldr	r2, [pc, #80]	; (80038e0 <BSP_TS_Init+0x68>)
+ 800388e:	88fb      	ldrh	r3, [r7, #6]
+ 8003890:	8013      	strh	r3, [r2, #0]
+  tsYBoundary = ts_SizeY;
+ 8003892:	4a14      	ldr	r2, [pc, #80]	; (80038e4 <BSP_TS_Init+0x6c>)
+ 8003894:	88bb      	ldrh	r3, [r7, #4]
+ 8003896:	8013      	strh	r3, [r2, #0]
+  
+  /* Read ID and verify if the touch screen driver is ready */
+  ft5336_ts_drv.Init(TS_I2C_ADDRESS);
+ 8003898:	4b13      	ldr	r3, [pc, #76]	; (80038e8 <BSP_TS_Init+0x70>)
+ 800389a:	681b      	ldr	r3, [r3, #0]
+ 800389c:	2070      	movs	r0, #112	; 0x70
+ 800389e:	4798      	blx	r3
+  if(ft5336_ts_drv.ReadID(TS_I2C_ADDRESS) == FT5336_ID_VALUE)
+ 80038a0:	4b11      	ldr	r3, [pc, #68]	; (80038e8 <BSP_TS_Init+0x70>)
+ 80038a2:	685b      	ldr	r3, [r3, #4]
+ 80038a4:	2070      	movs	r0, #112	; 0x70
+ 80038a6:	4798      	blx	r3
+ 80038a8:	4603      	mov	r3, r0
+ 80038aa:	2b51      	cmp	r3, #81	; 0x51
+ 80038ac:	d111      	bne.n	80038d2 <BSP_TS_Init+0x5a>
+  { 
+    /* Initialize the TS driver structure */
+    tsDriver = &ft5336_ts_drv;
+ 80038ae:	4b0f      	ldr	r3, [pc, #60]	; (80038ec <BSP_TS_Init+0x74>)
+ 80038b0:	4a0d      	ldr	r2, [pc, #52]	; (80038e8 <BSP_TS_Init+0x70>)
+ 80038b2:	601a      	str	r2, [r3, #0]
+    I2cAddress = TS_I2C_ADDRESS;
+ 80038b4:	4b0e      	ldr	r3, [pc, #56]	; (80038f0 <BSP_TS_Init+0x78>)
+ 80038b6:	2270      	movs	r2, #112	; 0x70
+ 80038b8:	701a      	strb	r2, [r3, #0]
+    tsOrientation = TS_SWAP_XY;
+ 80038ba:	4b0e      	ldr	r3, [pc, #56]	; (80038f4 <BSP_TS_Init+0x7c>)
+ 80038bc:	2208      	movs	r2, #8
+ 80038be:	701a      	strb	r2, [r3, #0]
+
+    /* Initialize the TS driver */
+    tsDriver->Start(I2cAddress);
+ 80038c0:	4b0a      	ldr	r3, [pc, #40]	; (80038ec <BSP_TS_Init+0x74>)
+ 80038c2:	681b      	ldr	r3, [r3, #0]
+ 80038c4:	68db      	ldr	r3, [r3, #12]
+ 80038c6:	4a0a      	ldr	r2, [pc, #40]	; (80038f0 <BSP_TS_Init+0x78>)
+ 80038c8:	7812      	ldrb	r2, [r2, #0]
+ 80038ca:	b292      	uxth	r2, r2
+ 80038cc:	4610      	mov	r0, r2
+ 80038ce:	4798      	blx	r3
+ 80038d0:	e001      	b.n	80038d6 <BSP_TS_Init+0x5e>
+  }
+  else
+  {
+    status = TS_DEVICE_NOT_FOUND;
+ 80038d2:	2303      	movs	r3, #3
+ 80038d4:	73fb      	strb	r3, [r7, #15]
+  }
+
+  return status;
+ 80038d6:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 80038d8:	4618      	mov	r0, r3
+ 80038da:	3710      	adds	r7, #16
+ 80038dc:	46bd      	mov	sp, r7
+ 80038de:	bd80      	pop	{r7, pc}
+ 80038e0:	20000538 	.word	0x20000538
+ 80038e4:	2000053a 	.word	0x2000053a
+ 80038e8:	20000000 	.word	0x20000000
+ 80038ec:	20000534 	.word	0x20000534
+ 80038f0:	2000053d 	.word	0x2000053d
+ 80038f4:	2000053c 	.word	0x2000053c
+
+080038f8 <BSP_TS_GetState>:
+  * @brief  Returns status and positions of the touch screen.
+  * @param  TS_State: Pointer to touch screen current state structure
+  * @retval TS_OK if all initializations are OK. Other value if error.
+  */
+uint8_t BSP_TS_GetState(TS_StateTypeDef *TS_State)
+{
+ 80038f8:	b590      	push	{r4, r7, lr}
+ 80038fa:	b097      	sub	sp, #92	; 0x5c
+ 80038fc:	af02      	add	r7, sp, #8
+ 80038fe:	6078      	str	r0, [r7, #4]
+  static uint32_t _x[TS_MAX_NB_TOUCH] = {0, 0};
+  static uint32_t _y[TS_MAX_NB_TOUCH] = {0, 0};
+  uint8_t ts_status = TS_OK;
+ 8003900:	2300      	movs	r3, #0
+ 8003902:	f887 304f 	strb.w	r3, [r7, #79]	; 0x4f
+  uint16_t brute_y[TS_MAX_NB_TOUCH];
+  uint16_t x_diff;
+  uint16_t y_diff;
+  uint32_t index;
+#if (TS_MULTI_TOUCH_SUPPORTED == 1)
+  uint32_t weight = 0;
+ 8003906:	2300      	movs	r3, #0
+ 8003908:	613b      	str	r3, [r7, #16]
+  uint32_t area = 0;
+ 800390a:	2300      	movs	r3, #0
+ 800390c:	60fb      	str	r3, [r7, #12]
+  uint32_t event = 0;
+ 800390e:	2300      	movs	r3, #0
+ 8003910:	60bb      	str	r3, [r7, #8]
+#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
+
+  /* Check and update the number of touches active detected */
+  TS_State->touchDetected = tsDriver->DetectTouch(I2cAddress);
+ 8003912:	4b97      	ldr	r3, [pc, #604]	; (8003b70 <BSP_TS_GetState+0x278>)
+ 8003914:	681b      	ldr	r3, [r3, #0]
+ 8003916:	691b      	ldr	r3, [r3, #16]
+ 8003918:	4a96      	ldr	r2, [pc, #600]	; (8003b74 <BSP_TS_GetState+0x27c>)
+ 800391a:	7812      	ldrb	r2, [r2, #0]
+ 800391c:	b292      	uxth	r2, r2
+ 800391e:	4610      	mov	r0, r2
+ 8003920:	4798      	blx	r3
+ 8003922:	4603      	mov	r3, r0
+ 8003924:	461a      	mov	r2, r3
+ 8003926:	687b      	ldr	r3, [r7, #4]
+ 8003928:	701a      	strb	r2, [r3, #0]
+  
+  if(TS_State->touchDetected)
+ 800392a:	687b      	ldr	r3, [r7, #4]
+ 800392c:	781b      	ldrb	r3, [r3, #0]
+ 800392e:	2b00      	cmp	r3, #0
+ 8003930:	f000 81a8 	beq.w	8003c84 <BSP_TS_GetState+0x38c>
+  {
+    for(index=0; index < TS_State->touchDetected; index++)
+ 8003934:	2300      	movs	r3, #0
+ 8003936:	64bb      	str	r3, [r7, #72]	; 0x48
+ 8003938:	e197      	b.n	8003c6a <BSP_TS_GetState+0x372>
+    {
+      /* Get each touch coordinates */
+      tsDriver->GetXY(I2cAddress, &(brute_x[index]), &(brute_y[index]));
+ 800393a:	4b8d      	ldr	r3, [pc, #564]	; (8003b70 <BSP_TS_GetState+0x278>)
+ 800393c:	681b      	ldr	r3, [r3, #0]
+ 800393e:	695b      	ldr	r3, [r3, #20]
+ 8003940:	4a8c      	ldr	r2, [pc, #560]	; (8003b74 <BSP_TS_GetState+0x27c>)
+ 8003942:	7812      	ldrb	r2, [r2, #0]
+ 8003944:	b290      	uxth	r0, r2
+ 8003946:	f107 0120 	add.w	r1, r7, #32
+ 800394a:	6cba      	ldr	r2, [r7, #72]	; 0x48
+ 800394c:	0052      	lsls	r2, r2, #1
+ 800394e:	188c      	adds	r4, r1, r2
+ 8003950:	f107 0114 	add.w	r1, r7, #20
+ 8003954:	6cba      	ldr	r2, [r7, #72]	; 0x48
+ 8003956:	0052      	lsls	r2, r2, #1
+ 8003958:	440a      	add	r2, r1
+ 800395a:	4621      	mov	r1, r4
+ 800395c:	4798      	blx	r3
+
+      if(tsOrientation == TS_SWAP_NONE)
+ 800395e:	4b86      	ldr	r3, [pc, #536]	; (8003b78 <BSP_TS_GetState+0x280>)
+ 8003960:	781b      	ldrb	r3, [r3, #0]
+ 8003962:	2b01      	cmp	r3, #1
+ 8003964:	d11b      	bne.n	800399e <BSP_TS_GetState+0xa6>
+      {
+        x[index] = brute_x[index];
+ 8003966:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003968:	005b      	lsls	r3, r3, #1
+ 800396a:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 800396e:	4413      	add	r3, r2
+ 8003970:	f833 2c30 	ldrh.w	r2, [r3, #-48]
+ 8003974:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003976:	005b      	lsls	r3, r3, #1
+ 8003978:	f107 0150 	add.w	r1, r7, #80	; 0x50
+ 800397c:	440b      	add	r3, r1
+ 800397e:	f823 2c18 	strh.w	r2, [r3, #-24]
+        y[index] = brute_y[index];
+ 8003982:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003984:	005b      	lsls	r3, r3, #1
+ 8003986:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 800398a:	4413      	add	r3, r2
+ 800398c:	f833 2c3c 	ldrh.w	r2, [r3, #-60]
+ 8003990:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003992:	005b      	lsls	r3, r3, #1
+ 8003994:	f107 0150 	add.w	r1, r7, #80	; 0x50
+ 8003998:	440b      	add	r3, r1
+ 800399a:	f823 2c24 	strh.w	r2, [r3, #-36]
+      }
+
+      if(tsOrientation & TS_SWAP_X)
+ 800399e:	4b76      	ldr	r3, [pc, #472]	; (8003b78 <BSP_TS_GetState+0x280>)
+ 80039a0:	781b      	ldrb	r3, [r3, #0]
+ 80039a2:	f003 0302 	and.w	r3, r3, #2
+ 80039a6:	2b00      	cmp	r3, #0
+ 80039a8:	d010      	beq.n	80039cc <BSP_TS_GetState+0xd4>
+      {
+        x[index] = 4096 - brute_x[index];
+ 80039aa:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 80039ac:	005b      	lsls	r3, r3, #1
+ 80039ae:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 80039b2:	4413      	add	r3, r2
+ 80039b4:	f833 3c30 	ldrh.w	r3, [r3, #-48]
+ 80039b8:	f5c3 5380 	rsb	r3, r3, #4096	; 0x1000
+ 80039bc:	b29a      	uxth	r2, r3
+ 80039be:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 80039c0:	005b      	lsls	r3, r3, #1
+ 80039c2:	f107 0150 	add.w	r1, r7, #80	; 0x50
+ 80039c6:	440b      	add	r3, r1
+ 80039c8:	f823 2c18 	strh.w	r2, [r3, #-24]
+      }
+
+      if(tsOrientation & TS_SWAP_Y)
+ 80039cc:	4b6a      	ldr	r3, [pc, #424]	; (8003b78 <BSP_TS_GetState+0x280>)
+ 80039ce:	781b      	ldrb	r3, [r3, #0]
+ 80039d0:	f003 0304 	and.w	r3, r3, #4
+ 80039d4:	2b00      	cmp	r3, #0
+ 80039d6:	d010      	beq.n	80039fa <BSP_TS_GetState+0x102>
+      {
+        y[index] = 4096 - brute_y[index];
+ 80039d8:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 80039da:	005b      	lsls	r3, r3, #1
+ 80039dc:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 80039e0:	4413      	add	r3, r2
+ 80039e2:	f833 3c3c 	ldrh.w	r3, [r3, #-60]
+ 80039e6:	f5c3 5380 	rsb	r3, r3, #4096	; 0x1000
+ 80039ea:	b29a      	uxth	r2, r3
+ 80039ec:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 80039ee:	005b      	lsls	r3, r3, #1
+ 80039f0:	f107 0150 	add.w	r1, r7, #80	; 0x50
+ 80039f4:	440b      	add	r3, r1
+ 80039f6:	f823 2c24 	strh.w	r2, [r3, #-36]
+      }
+
+      if(tsOrientation & TS_SWAP_XY)
+ 80039fa:	4b5f      	ldr	r3, [pc, #380]	; (8003b78 <BSP_TS_GetState+0x280>)
+ 80039fc:	781b      	ldrb	r3, [r3, #0]
+ 80039fe:	f003 0308 	and.w	r3, r3, #8
+ 8003a02:	2b00      	cmp	r3, #0
+ 8003a04:	d01b      	beq.n	8003a3e <BSP_TS_GetState+0x146>
+      {
+        y[index] = brute_x[index];
+ 8003a06:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003a08:	005b      	lsls	r3, r3, #1
+ 8003a0a:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 8003a0e:	4413      	add	r3, r2
+ 8003a10:	f833 2c30 	ldrh.w	r2, [r3, #-48]
+ 8003a14:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003a16:	005b      	lsls	r3, r3, #1
+ 8003a18:	f107 0150 	add.w	r1, r7, #80	; 0x50
+ 8003a1c:	440b      	add	r3, r1
+ 8003a1e:	f823 2c24 	strh.w	r2, [r3, #-36]
+        x[index] = brute_y[index];
+ 8003a22:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003a24:	005b      	lsls	r3, r3, #1
+ 8003a26:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 8003a2a:	4413      	add	r3, r2
+ 8003a2c:	f833 2c3c 	ldrh.w	r2, [r3, #-60]
+ 8003a30:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003a32:	005b      	lsls	r3, r3, #1
+ 8003a34:	f107 0150 	add.w	r1, r7, #80	; 0x50
+ 8003a38:	440b      	add	r3, r1
+ 8003a3a:	f823 2c18 	strh.w	r2, [r3, #-24]
+      }
+
+      x_diff = x[index] > _x[index]? (x[index] - _x[index]): (_x[index] - x[index]);
+ 8003a3e:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003a40:	005b      	lsls	r3, r3, #1
+ 8003a42:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 8003a46:	4413      	add	r3, r2
+ 8003a48:	f833 3c18 	ldrh.w	r3, [r3, #-24]
+ 8003a4c:	4619      	mov	r1, r3
+ 8003a4e:	4a4b      	ldr	r2, [pc, #300]	; (8003b7c <BSP_TS_GetState+0x284>)
+ 8003a50:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003a52:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8003a56:	4299      	cmp	r1, r3
+ 8003a58:	d90e      	bls.n	8003a78 <BSP_TS_GetState+0x180>
+ 8003a5a:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003a5c:	005b      	lsls	r3, r3, #1
+ 8003a5e:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 8003a62:	4413      	add	r3, r2
+ 8003a64:	f833 2c18 	ldrh.w	r2, [r3, #-24]
+ 8003a68:	4944      	ldr	r1, [pc, #272]	; (8003b7c <BSP_TS_GetState+0x284>)
+ 8003a6a:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003a6c:	f851 3023 	ldr.w	r3, [r1, r3, lsl #2]
+ 8003a70:	b29b      	uxth	r3, r3
+ 8003a72:	1ad3      	subs	r3, r2, r3
+ 8003a74:	b29b      	uxth	r3, r3
+ 8003a76:	e00d      	b.n	8003a94 <BSP_TS_GetState+0x19c>
+ 8003a78:	4a40      	ldr	r2, [pc, #256]	; (8003b7c <BSP_TS_GetState+0x284>)
+ 8003a7a:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003a7c:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8003a80:	b29a      	uxth	r2, r3
+ 8003a82:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003a84:	005b      	lsls	r3, r3, #1
+ 8003a86:	f107 0150 	add.w	r1, r7, #80	; 0x50
+ 8003a8a:	440b      	add	r3, r1
+ 8003a8c:	f833 3c18 	ldrh.w	r3, [r3, #-24]
+ 8003a90:	1ad3      	subs	r3, r2, r3
+ 8003a92:	b29b      	uxth	r3, r3
+ 8003a94:	f8a7 3046 	strh.w	r3, [r7, #70]	; 0x46
+      y_diff = y[index] > _y[index]? (y[index] - _y[index]): (_y[index] - y[index]);
+ 8003a98:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003a9a:	005b      	lsls	r3, r3, #1
+ 8003a9c:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 8003aa0:	4413      	add	r3, r2
+ 8003aa2:	f833 3c24 	ldrh.w	r3, [r3, #-36]
+ 8003aa6:	4619      	mov	r1, r3
+ 8003aa8:	4a35      	ldr	r2, [pc, #212]	; (8003b80 <BSP_TS_GetState+0x288>)
+ 8003aaa:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003aac:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8003ab0:	4299      	cmp	r1, r3
+ 8003ab2:	d90e      	bls.n	8003ad2 <BSP_TS_GetState+0x1da>
+ 8003ab4:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003ab6:	005b      	lsls	r3, r3, #1
+ 8003ab8:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 8003abc:	4413      	add	r3, r2
+ 8003abe:	f833 2c24 	ldrh.w	r2, [r3, #-36]
+ 8003ac2:	492f      	ldr	r1, [pc, #188]	; (8003b80 <BSP_TS_GetState+0x288>)
+ 8003ac4:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003ac6:	f851 3023 	ldr.w	r3, [r1, r3, lsl #2]
+ 8003aca:	b29b      	uxth	r3, r3
+ 8003acc:	1ad3      	subs	r3, r2, r3
+ 8003ace:	b29b      	uxth	r3, r3
+ 8003ad0:	e00d      	b.n	8003aee <BSP_TS_GetState+0x1f6>
+ 8003ad2:	4a2b      	ldr	r2, [pc, #172]	; (8003b80 <BSP_TS_GetState+0x288>)
+ 8003ad4:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003ad6:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8003ada:	b29a      	uxth	r2, r3
+ 8003adc:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003ade:	005b      	lsls	r3, r3, #1
+ 8003ae0:	f107 0150 	add.w	r1, r7, #80	; 0x50
+ 8003ae4:	440b      	add	r3, r1
+ 8003ae6:	f833 3c24 	ldrh.w	r3, [r3, #-36]
+ 8003aea:	1ad3      	subs	r3, r2, r3
+ 8003aec:	b29b      	uxth	r3, r3
+ 8003aee:	f8a7 3044 	strh.w	r3, [r7, #68]	; 0x44
+
+      if ((x_diff + y_diff) > 5)
+ 8003af2:	f8b7 2046 	ldrh.w	r2, [r7, #70]	; 0x46
+ 8003af6:	f8b7 3044 	ldrh.w	r3, [r7, #68]	; 0x44
+ 8003afa:	4413      	add	r3, r2
+ 8003afc:	2b05      	cmp	r3, #5
+ 8003afe:	dd17      	ble.n	8003b30 <BSP_TS_GetState+0x238>
+      {
+        _x[index] = x[index];
+ 8003b00:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003b02:	005b      	lsls	r3, r3, #1
+ 8003b04:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 8003b08:	4413      	add	r3, r2
+ 8003b0a:	f833 3c18 	ldrh.w	r3, [r3, #-24]
+ 8003b0e:	4619      	mov	r1, r3
+ 8003b10:	4a1a      	ldr	r2, [pc, #104]	; (8003b7c <BSP_TS_GetState+0x284>)
+ 8003b12:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003b14:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
+        _y[index] = y[index];
+ 8003b18:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003b1a:	005b      	lsls	r3, r3, #1
+ 8003b1c:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 8003b20:	4413      	add	r3, r2
+ 8003b22:	f833 3c24 	ldrh.w	r3, [r3, #-36]
+ 8003b26:	4619      	mov	r1, r3
+ 8003b28:	4a15      	ldr	r2, [pc, #84]	; (8003b80 <BSP_TS_GetState+0x288>)
+ 8003b2a:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003b2c:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
+      }
+
+      if(I2cAddress == FT5336_I2C_SLAVE_ADDRESS)
+ 8003b30:	4b10      	ldr	r3, [pc, #64]	; (8003b74 <BSP_TS_GetState+0x27c>)
+ 8003b32:	781b      	ldrb	r3, [r3, #0]
+ 8003b34:	2b70      	cmp	r3, #112	; 0x70
+ 8003b36:	d125      	bne.n	8003b84 <BSP_TS_GetState+0x28c>
+      {
+        TS_State->touchX[index] = x[index];
+ 8003b38:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003b3a:	005b      	lsls	r3, r3, #1
+ 8003b3c:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 8003b40:	4413      	add	r3, r2
+ 8003b42:	f833 1c18 	ldrh.w	r1, [r3, #-24]
+ 8003b46:	687a      	ldr	r2, [r7, #4]
+ 8003b48:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003b4a:	005b      	lsls	r3, r3, #1
+ 8003b4c:	4413      	add	r3, r2
+ 8003b4e:	460a      	mov	r2, r1
+ 8003b50:	805a      	strh	r2, [r3, #2]
+        TS_State->touchY[index] = y[index];
+ 8003b52:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003b54:	005b      	lsls	r3, r3, #1
+ 8003b56:	f107 0250 	add.w	r2, r7, #80	; 0x50
+ 8003b5a:	4413      	add	r3, r2
+ 8003b5c:	f833 1c24 	ldrh.w	r1, [r3, #-36]
+ 8003b60:	687a      	ldr	r2, [r7, #4]
+ 8003b62:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003b64:	3304      	adds	r3, #4
+ 8003b66:	005b      	lsls	r3, r3, #1
+ 8003b68:	4413      	add	r3, r2
+ 8003b6a:	460a      	mov	r2, r1
+ 8003b6c:	809a      	strh	r2, [r3, #4]
+ 8003b6e:	e02c      	b.n	8003bca <BSP_TS_GetState+0x2d2>
+ 8003b70:	20000534 	.word	0x20000534
+ 8003b74:	2000053d 	.word	0x2000053d
+ 8003b78:	2000053c 	.word	0x2000053c
+ 8003b7c:	20000540 	.word	0x20000540
+ 8003b80:	20000554 	.word	0x20000554
+      }
+      else
+      {
+        /* 2^12 = 4096 : indexes are expressed on a dynamic of 4096 */
+        TS_State->touchX[index] = (tsXBoundary * _x[index]) >> 12;
+ 8003b84:	4b42      	ldr	r3, [pc, #264]	; (8003c90 <BSP_TS_GetState+0x398>)
+ 8003b86:	881b      	ldrh	r3, [r3, #0]
+ 8003b88:	4619      	mov	r1, r3
+ 8003b8a:	4a42      	ldr	r2, [pc, #264]	; (8003c94 <BSP_TS_GetState+0x39c>)
+ 8003b8c:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003b8e:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8003b92:	fb03 f301 	mul.w	r3, r3, r1
+ 8003b96:	0b1b      	lsrs	r3, r3, #12
+ 8003b98:	b299      	uxth	r1, r3
+ 8003b9a:	687a      	ldr	r2, [r7, #4]
+ 8003b9c:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003b9e:	005b      	lsls	r3, r3, #1
+ 8003ba0:	4413      	add	r3, r2
+ 8003ba2:	460a      	mov	r2, r1
+ 8003ba4:	805a      	strh	r2, [r3, #2]
+        TS_State->touchY[index] = (tsYBoundary * _y[index]) >> 12;
+ 8003ba6:	4b3c      	ldr	r3, [pc, #240]	; (8003c98 <BSP_TS_GetState+0x3a0>)
+ 8003ba8:	881b      	ldrh	r3, [r3, #0]
+ 8003baa:	4619      	mov	r1, r3
+ 8003bac:	4a3b      	ldr	r2, [pc, #236]	; (8003c9c <BSP_TS_GetState+0x3a4>)
+ 8003bae:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003bb0:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8003bb4:	fb03 f301 	mul.w	r3, r3, r1
+ 8003bb8:	0b1b      	lsrs	r3, r3, #12
+ 8003bba:	b299      	uxth	r1, r3
+ 8003bbc:	687a      	ldr	r2, [r7, #4]
+ 8003bbe:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003bc0:	3304      	adds	r3, #4
+ 8003bc2:	005b      	lsls	r3, r3, #1
+ 8003bc4:	4413      	add	r3, r2
+ 8003bc6:	460a      	mov	r2, r1
+ 8003bc8:	809a      	strh	r2, [r3, #4]
+      }
+
+#if (TS_MULTI_TOUCH_SUPPORTED == 1)
+
+      /* Get touch info related to the current touch */
+      ft5336_TS_GetTouchInfo(I2cAddress, index, &weight, &area, &event);
+ 8003bca:	4b35      	ldr	r3, [pc, #212]	; (8003ca0 <BSP_TS_GetState+0x3a8>)
+ 8003bcc:	781b      	ldrb	r3, [r3, #0]
+ 8003bce:	b298      	uxth	r0, r3
+ 8003bd0:	f107 010c 	add.w	r1, r7, #12
+ 8003bd4:	f107 0210 	add.w	r2, r7, #16
+ 8003bd8:	f107 0308 	add.w	r3, r7, #8
+ 8003bdc:	9300      	str	r3, [sp, #0]
+ 8003bde:	460b      	mov	r3, r1
+ 8003be0:	6cb9      	ldr	r1, [r7, #72]	; 0x48
+ 8003be2:	f7fc fee3 	bl	80009ac <ft5336_TS_GetTouchInfo>
+
+      /* Update TS_State structure */
+      TS_State->touchWeight[index] = weight;
+ 8003be6:	693b      	ldr	r3, [r7, #16]
+ 8003be8:	b2d9      	uxtb	r1, r3
+ 8003bea:	687a      	ldr	r2, [r7, #4]
+ 8003bec:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003bee:	4413      	add	r3, r2
+ 8003bf0:	3316      	adds	r3, #22
+ 8003bf2:	460a      	mov	r2, r1
+ 8003bf4:	701a      	strb	r2, [r3, #0]
+      TS_State->touchArea[index]   = area;
+ 8003bf6:	68fb      	ldr	r3, [r7, #12]
+ 8003bf8:	b2d9      	uxtb	r1, r3
+ 8003bfa:	687a      	ldr	r2, [r7, #4]
+ 8003bfc:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003bfe:	4413      	add	r3, r2
+ 8003c00:	3320      	adds	r3, #32
+ 8003c02:	460a      	mov	r2, r1
+ 8003c04:	701a      	strb	r2, [r3, #0]
+
+      /* Remap touch event */
+      switch(event)
+ 8003c06:	68bb      	ldr	r3, [r7, #8]
+ 8003c08:	2b03      	cmp	r3, #3
+ 8003c0a:	d827      	bhi.n	8003c5c <BSP_TS_GetState+0x364>
+ 8003c0c:	a201      	add	r2, pc, #4	; (adr r2, 8003c14 <BSP_TS_GetState+0x31c>)
+ 8003c0e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 8003c12:	bf00      	nop
+ 8003c14:	08003c25 	.word	0x08003c25
+ 8003c18:	08003c33 	.word	0x08003c33
+ 8003c1c:	08003c41 	.word	0x08003c41
+ 8003c20:	08003c4f 	.word	0x08003c4f
+      {
+        case FT5336_TOUCH_EVT_FLAG_PRESS_DOWN	:
+          TS_State->touchEventId[index] = TOUCH_EVENT_PRESS_DOWN;
+ 8003c24:	687a      	ldr	r2, [r7, #4]
+ 8003c26:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003c28:	4413      	add	r3, r2
+ 8003c2a:	331b      	adds	r3, #27
+ 8003c2c:	2201      	movs	r2, #1
+ 8003c2e:	701a      	strb	r2, [r3, #0]
+          break;
+ 8003c30:	e018      	b.n	8003c64 <BSP_TS_GetState+0x36c>
+        case FT5336_TOUCH_EVT_FLAG_LIFT_UP :
+          TS_State->touchEventId[index] = TOUCH_EVENT_LIFT_UP;
+ 8003c32:	687a      	ldr	r2, [r7, #4]
+ 8003c34:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003c36:	4413      	add	r3, r2
+ 8003c38:	331b      	adds	r3, #27
+ 8003c3a:	2202      	movs	r2, #2
+ 8003c3c:	701a      	strb	r2, [r3, #0]
+          break;
+ 8003c3e:	e011      	b.n	8003c64 <BSP_TS_GetState+0x36c>
+        case FT5336_TOUCH_EVT_FLAG_CONTACT :
+          TS_State->touchEventId[index] = TOUCH_EVENT_CONTACT;
+ 8003c40:	687a      	ldr	r2, [r7, #4]
+ 8003c42:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003c44:	4413      	add	r3, r2
+ 8003c46:	331b      	adds	r3, #27
+ 8003c48:	2203      	movs	r2, #3
+ 8003c4a:	701a      	strb	r2, [r3, #0]
+          break;
+ 8003c4c:	e00a      	b.n	8003c64 <BSP_TS_GetState+0x36c>
+        case FT5336_TOUCH_EVT_FLAG_NO_EVENT :
+          TS_State->touchEventId[index] = TOUCH_EVENT_NO_EVT;
+ 8003c4e:	687a      	ldr	r2, [r7, #4]
+ 8003c50:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003c52:	4413      	add	r3, r2
+ 8003c54:	331b      	adds	r3, #27
+ 8003c56:	2200      	movs	r2, #0
+ 8003c58:	701a      	strb	r2, [r3, #0]
+          break;
+ 8003c5a:	e003      	b.n	8003c64 <BSP_TS_GetState+0x36c>
+        default :
+          ts_status = TS_ERROR;
+ 8003c5c:	2301      	movs	r3, #1
+ 8003c5e:	f887 304f 	strb.w	r3, [r7, #79]	; 0x4f
+          break;
+ 8003c62:	bf00      	nop
+    for(index=0; index < TS_State->touchDetected; index++)
+ 8003c64:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003c66:	3301      	adds	r3, #1
+ 8003c68:	64bb      	str	r3, [r7, #72]	; 0x48
+ 8003c6a:	687b      	ldr	r3, [r7, #4]
+ 8003c6c:	781b      	ldrb	r3, [r3, #0]
+ 8003c6e:	461a      	mov	r2, r3
+ 8003c70:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003c72:	4293      	cmp	r3, r2
+ 8003c74:	f4ff ae61 	bcc.w	800393a <BSP_TS_GetState+0x42>
+
+    } /* of for(index=0; index < TS_State->touchDetected; index++) */
+
+#if (TS_MULTI_TOUCH_SUPPORTED == 1)
+    /* Get gesture Id */
+    ts_status = BSP_TS_Get_GestureId(TS_State);
+ 8003c78:	6878      	ldr	r0, [r7, #4]
+ 8003c7a:	f000 f813 	bl	8003ca4 <BSP_TS_Get_GestureId>
+ 8003c7e:	4603      	mov	r3, r0
+ 8003c80:	f887 304f 	strb.w	r3, [r7, #79]	; 0x4f
+#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
+
+  } /* end of if(TS_State->touchDetected != 0) */
+
+  return (ts_status);
+ 8003c84:	f897 304f 	ldrb.w	r3, [r7, #79]	; 0x4f
+}
+ 8003c88:	4618      	mov	r0, r3
+ 8003c8a:	3754      	adds	r7, #84	; 0x54
+ 8003c8c:	46bd      	mov	sp, r7
+ 8003c8e:	bd90      	pop	{r4, r7, pc}
+ 8003c90:	20000538 	.word	0x20000538
+ 8003c94:	20000540 	.word	0x20000540
+ 8003c98:	2000053a 	.word	0x2000053a
+ 8003c9c:	20000554 	.word	0x20000554
+ 8003ca0:	2000053d 	.word	0x2000053d
+
+08003ca4 <BSP_TS_Get_GestureId>:
+  * @brief  Update gesture Id following a touch detected.
+  * @param  TS_State: Pointer to touch screen current state structure
+  * @retval TS_OK if all initializations are OK. Other value if error.
+  */
+uint8_t BSP_TS_Get_GestureId(TS_StateTypeDef *TS_State)
+{
+ 8003ca4:	b580      	push	{r7, lr}
+ 8003ca6:	b084      	sub	sp, #16
+ 8003ca8:	af00      	add	r7, sp, #0
+ 8003caa:	6078      	str	r0, [r7, #4]
+  uint32_t gestureId = 0;
+ 8003cac:	2300      	movs	r3, #0
+ 8003cae:	60bb      	str	r3, [r7, #8]
+  uint8_t  ts_status = TS_OK;
+ 8003cb0:	2300      	movs	r3, #0
+ 8003cb2:	73fb      	strb	r3, [r7, #15]
+
+  /* Get gesture Id */
+  ft5336_TS_GetGestureID(I2cAddress, &gestureId);
+ 8003cb4:	4b1f      	ldr	r3, [pc, #124]	; (8003d34 <BSP_TS_Get_GestureId+0x90>)
+ 8003cb6:	781b      	ldrb	r3, [r3, #0]
+ 8003cb8:	b29b      	uxth	r3, r3
+ 8003cba:	f107 0208 	add.w	r2, r7, #8
+ 8003cbe:	4611      	mov	r1, r2
+ 8003cc0:	4618      	mov	r0, r3
+ 8003cc2:	f7fc fe5a 	bl	800097a <ft5336_TS_GetGestureID>
+
+  /* Remap gesture Id to a TS_GestureIdTypeDef value */
+  switch(gestureId)
+ 8003cc6:	68bb      	ldr	r3, [r7, #8]
+ 8003cc8:	2b18      	cmp	r3, #24
+ 8003cca:	d01b      	beq.n	8003d04 <BSP_TS_Get_GestureId+0x60>
+ 8003ccc:	2b18      	cmp	r3, #24
+ 8003cce:	d806      	bhi.n	8003cde <BSP_TS_Get_GestureId+0x3a>
+ 8003cd0:	2b10      	cmp	r3, #16
+ 8003cd2:	d00f      	beq.n	8003cf4 <BSP_TS_Get_GestureId+0x50>
+ 8003cd4:	2b14      	cmp	r3, #20
+ 8003cd6:	d011      	beq.n	8003cfc <BSP_TS_Get_GestureId+0x58>
+ 8003cd8:	2b00      	cmp	r3, #0
+ 8003cda:	d007      	beq.n	8003cec <BSP_TS_Get_GestureId+0x48>
+ 8003cdc:	e022      	b.n	8003d24 <BSP_TS_Get_GestureId+0x80>
+ 8003cde:	2b40      	cmp	r3, #64	; 0x40
+ 8003ce0:	d018      	beq.n	8003d14 <BSP_TS_Get_GestureId+0x70>
+ 8003ce2:	2b49      	cmp	r3, #73	; 0x49
+ 8003ce4:	d01a      	beq.n	8003d1c <BSP_TS_Get_GestureId+0x78>
+ 8003ce6:	2b1c      	cmp	r3, #28
+ 8003ce8:	d010      	beq.n	8003d0c <BSP_TS_Get_GestureId+0x68>
+ 8003cea:	e01b      	b.n	8003d24 <BSP_TS_Get_GestureId+0x80>
+  {
+    case FT5336_GEST_ID_NO_GESTURE :
+      TS_State->gestureId = GEST_ID_NO_GESTURE;
+ 8003cec:	687b      	ldr	r3, [r7, #4]
+ 8003cee:	2200      	movs	r2, #0
+ 8003cf0:	629a      	str	r2, [r3, #40]	; 0x28
+      break;
+ 8003cf2:	e01a      	b.n	8003d2a <BSP_TS_Get_GestureId+0x86>
+    case FT5336_GEST_ID_MOVE_UP :
+      TS_State->gestureId = GEST_ID_MOVE_UP;
+ 8003cf4:	687b      	ldr	r3, [r7, #4]
+ 8003cf6:	2201      	movs	r2, #1
+ 8003cf8:	629a      	str	r2, [r3, #40]	; 0x28
+      break;
+ 8003cfa:	e016      	b.n	8003d2a <BSP_TS_Get_GestureId+0x86>
+    case FT5336_GEST_ID_MOVE_RIGHT :
+      TS_State->gestureId = GEST_ID_MOVE_RIGHT;
+ 8003cfc:	687b      	ldr	r3, [r7, #4]
+ 8003cfe:	2202      	movs	r2, #2
+ 8003d00:	629a      	str	r2, [r3, #40]	; 0x28
+      break;
+ 8003d02:	e012      	b.n	8003d2a <BSP_TS_Get_GestureId+0x86>
+    case FT5336_GEST_ID_MOVE_DOWN :
+      TS_State->gestureId = GEST_ID_MOVE_DOWN;
+ 8003d04:	687b      	ldr	r3, [r7, #4]
+ 8003d06:	2203      	movs	r2, #3
+ 8003d08:	629a      	str	r2, [r3, #40]	; 0x28
+      break;
+ 8003d0a:	e00e      	b.n	8003d2a <BSP_TS_Get_GestureId+0x86>
+    case FT5336_GEST_ID_MOVE_LEFT :
+      TS_State->gestureId = GEST_ID_MOVE_LEFT;
+ 8003d0c:	687b      	ldr	r3, [r7, #4]
+ 8003d0e:	2204      	movs	r2, #4
+ 8003d10:	629a      	str	r2, [r3, #40]	; 0x28
+      break;
+ 8003d12:	e00a      	b.n	8003d2a <BSP_TS_Get_GestureId+0x86>
+    case FT5336_GEST_ID_ZOOM_IN :
+      TS_State->gestureId = GEST_ID_ZOOM_IN;
+ 8003d14:	687b      	ldr	r3, [r7, #4]
+ 8003d16:	2205      	movs	r2, #5
+ 8003d18:	629a      	str	r2, [r3, #40]	; 0x28
+      break;
+ 8003d1a:	e006      	b.n	8003d2a <BSP_TS_Get_GestureId+0x86>
+    case FT5336_GEST_ID_ZOOM_OUT :
+      TS_State->gestureId = GEST_ID_ZOOM_OUT;
+ 8003d1c:	687b      	ldr	r3, [r7, #4]
+ 8003d1e:	2206      	movs	r2, #6
+ 8003d20:	629a      	str	r2, [r3, #40]	; 0x28
+      break;
+ 8003d22:	e002      	b.n	8003d2a <BSP_TS_Get_GestureId+0x86>
+    default :
+      ts_status = TS_ERROR;
+ 8003d24:	2301      	movs	r3, #1
+ 8003d26:	73fb      	strb	r3, [r7, #15]
+      break;
+ 8003d28:	bf00      	nop
+  } /* of switch(gestureId) */
+
+  return(ts_status);
+ 8003d2a:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 8003d2c:	4618      	mov	r0, r3
+ 8003d2e:	3710      	adds	r7, #16
+ 8003d30:	46bd      	mov	sp, r7
+ 8003d32:	bd80      	pop	{r7, pc}
+ 8003d34:	2000053d 	.word	0x2000053d
+
+08003d38 <HAL_MspInit>:
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+                                        /**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+ 8003d38:	b580      	push	{r7, lr}
+ 8003d3a:	b082      	sub	sp, #8
+ 8003d3c:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_PWR_CLK_ENABLE();
+ 8003d3e:	4b11      	ldr	r3, [pc, #68]	; (8003d84 <HAL_MspInit+0x4c>)
+ 8003d40:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8003d42:	4a10      	ldr	r2, [pc, #64]	; (8003d84 <HAL_MspInit+0x4c>)
+ 8003d44:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
+ 8003d48:	6413      	str	r3, [r2, #64]	; 0x40
+ 8003d4a:	4b0e      	ldr	r3, [pc, #56]	; (8003d84 <HAL_MspInit+0x4c>)
+ 8003d4c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8003d4e:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
+ 8003d52:	607b      	str	r3, [r7, #4]
+ 8003d54:	687b      	ldr	r3, [r7, #4]
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 8003d56:	4b0b      	ldr	r3, [pc, #44]	; (8003d84 <HAL_MspInit+0x4c>)
+ 8003d58:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8003d5a:	4a0a      	ldr	r2, [pc, #40]	; (8003d84 <HAL_MspInit+0x4c>)
+ 8003d5c:	f443 4380 	orr.w	r3, r3, #16384	; 0x4000
+ 8003d60:	6453      	str	r3, [r2, #68]	; 0x44
+ 8003d62:	4b08      	ldr	r3, [pc, #32]	; (8003d84 <HAL_MspInit+0x4c>)
+ 8003d64:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8003d66:	f403 4380 	and.w	r3, r3, #16384	; 0x4000
+ 8003d6a:	603b      	str	r3, [r7, #0]
+ 8003d6c:	683b      	ldr	r3, [r7, #0]
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+ 8003d6e:	2200      	movs	r2, #0
+ 8003d70:	210f      	movs	r1, #15
+ 8003d72:	f06f 0001 	mvn.w	r0, #1
+ 8003d76:	f001 fba7 	bl	80054c8 <HAL_NVIC_SetPriority>
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+ 8003d7a:	bf00      	nop
+ 8003d7c:	3708      	adds	r7, #8
+ 8003d7e:	46bd      	mov	sp, r7
+ 8003d80:	bd80      	pop	{r7, pc}
+ 8003d82:	bf00      	nop
+ 8003d84:	40023800 	.word	0x40023800
+
+08003d88 <HAL_ADC_MspInit>:
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+ 8003d88:	b580      	push	{r7, lr}
+ 8003d8a:	b08c      	sub	sp, #48	; 0x30
+ 8003d8c:	af00      	add	r7, sp, #0
+ 8003d8e:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8003d90:	f107 031c 	add.w	r3, r7, #28
+ 8003d94:	2200      	movs	r2, #0
+ 8003d96:	601a      	str	r2, [r3, #0]
+ 8003d98:	605a      	str	r2, [r3, #4]
+ 8003d9a:	609a      	str	r2, [r3, #8]
+ 8003d9c:	60da      	str	r2, [r3, #12]
+ 8003d9e:	611a      	str	r2, [r3, #16]
+  if(hadc->Instance==ADC1)
+ 8003da0:	687b      	ldr	r3, [r7, #4]
+ 8003da2:	681b      	ldr	r3, [r3, #0]
+ 8003da4:	4a2a      	ldr	r2, [pc, #168]	; (8003e50 <HAL_ADC_MspInit+0xc8>)
+ 8003da6:	4293      	cmp	r3, r2
+ 8003da8:	d124      	bne.n	8003df4 <HAL_ADC_MspInit+0x6c>
+  {
+  /* USER CODE BEGIN ADC1_MspInit 0 */
+
+  /* USER CODE END ADC1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_ADC1_CLK_ENABLE();
+ 8003daa:	4b2a      	ldr	r3, [pc, #168]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003dac:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8003dae:	4a29      	ldr	r2, [pc, #164]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003db0:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 8003db4:	6453      	str	r3, [r2, #68]	; 0x44
+ 8003db6:	4b27      	ldr	r3, [pc, #156]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003db8:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8003dba:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 8003dbe:	61bb      	str	r3, [r7, #24]
+ 8003dc0:	69bb      	ldr	r3, [r7, #24]
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+ 8003dc2:	4b24      	ldr	r3, [pc, #144]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003dc4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003dc6:	4a23      	ldr	r2, [pc, #140]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003dc8:	f043 0301 	orr.w	r3, r3, #1
+ 8003dcc:	6313      	str	r3, [r2, #48]	; 0x30
+ 8003dce:	4b21      	ldr	r3, [pc, #132]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003dd0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003dd2:	f003 0301 	and.w	r3, r3, #1
+ 8003dd6:	617b      	str	r3, [r7, #20]
+ 8003dd8:	697b      	ldr	r3, [r7, #20]
+    /**ADC1 GPIO Configuration
+    PA0/WKUP     ------> ADC1_IN0
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+ 8003dda:	2301      	movs	r3, #1
+ 8003ddc:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ 8003dde:	2303      	movs	r3, #3
+ 8003de0:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8003de2:	2300      	movs	r3, #0
+ 8003de4:	627b      	str	r3, [r7, #36]	; 0x24
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 8003de6:	f107 031c 	add.w	r3, r7, #28
+ 8003dea:	4619      	mov	r1, r3
+ 8003dec:	481a      	ldr	r0, [pc, #104]	; (8003e58 <HAL_ADC_MspInit+0xd0>)
+ 8003dee:	f003 fb1b 	bl	8007428 <HAL_GPIO_Init>
+  /* USER CODE BEGIN ADC3_MspInit 1 */
+
+  /* USER CODE END ADC3_MspInit 1 */
+  }
+
+}
+ 8003df2:	e029      	b.n	8003e48 <HAL_ADC_MspInit+0xc0>
+  else if(hadc->Instance==ADC3)
+ 8003df4:	687b      	ldr	r3, [r7, #4]
+ 8003df6:	681b      	ldr	r3, [r3, #0]
+ 8003df8:	4a18      	ldr	r2, [pc, #96]	; (8003e5c <HAL_ADC_MspInit+0xd4>)
+ 8003dfa:	4293      	cmp	r3, r2
+ 8003dfc:	d124      	bne.n	8003e48 <HAL_ADC_MspInit+0xc0>
+    __HAL_RCC_ADC3_CLK_ENABLE();
+ 8003dfe:	4b15      	ldr	r3, [pc, #84]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003e00:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8003e02:	4a14      	ldr	r2, [pc, #80]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003e04:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
+ 8003e08:	6453      	str	r3, [r2, #68]	; 0x44
+ 8003e0a:	4b12      	ldr	r3, [pc, #72]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003e0c:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8003e0e:	f403 6380 	and.w	r3, r3, #1024	; 0x400
+ 8003e12:	613b      	str	r3, [r7, #16]
+ 8003e14:	693b      	ldr	r3, [r7, #16]
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+ 8003e16:	4b0f      	ldr	r3, [pc, #60]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003e18:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003e1a:	4a0e      	ldr	r2, [pc, #56]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003e1c:	f043 0320 	orr.w	r3, r3, #32
+ 8003e20:	6313      	str	r3, [r2, #48]	; 0x30
+ 8003e22:	4b0c      	ldr	r3, [pc, #48]	; (8003e54 <HAL_ADC_MspInit+0xcc>)
+ 8003e24:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003e26:	f003 0320 	and.w	r3, r3, #32
+ 8003e2a:	60fb      	str	r3, [r7, #12]
+ 8003e2c:	68fb      	ldr	r3, [r7, #12]
+    GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_9|GPIO_PIN_8;
+ 8003e2e:	f44f 63e0 	mov.w	r3, #1792	; 0x700
+ 8003e32:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ 8003e34:	2303      	movs	r3, #3
+ 8003e36:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8003e38:	2300      	movs	r3, #0
+ 8003e3a:	627b      	str	r3, [r7, #36]	; 0x24
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 8003e3c:	f107 031c 	add.w	r3, r7, #28
+ 8003e40:	4619      	mov	r1, r3
+ 8003e42:	4807      	ldr	r0, [pc, #28]	; (8003e60 <HAL_ADC_MspInit+0xd8>)
+ 8003e44:	f003 faf0 	bl	8007428 <HAL_GPIO_Init>
+}
+ 8003e48:	bf00      	nop
+ 8003e4a:	3730      	adds	r7, #48	; 0x30
+ 8003e4c:	46bd      	mov	sp, r7
+ 8003e4e:	bd80      	pop	{r7, pc}
+ 8003e50:	40012000 	.word	0x40012000
+ 8003e54:	40023800 	.word	0x40023800
+ 8003e58:	40020000 	.word	0x40020000
+ 8003e5c:	40012200 	.word	0x40012200
+ 8003e60:	40021400 	.word	0x40021400
+
+08003e64 <HAL_CRC_MspInit>:
+* This function configures the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
+{
+ 8003e64:	b480      	push	{r7}
+ 8003e66:	b085      	sub	sp, #20
+ 8003e68:	af00      	add	r7, sp, #0
+ 8003e6a:	6078      	str	r0, [r7, #4]
+  if(hcrc->Instance==CRC)
+ 8003e6c:	687b      	ldr	r3, [r7, #4]
+ 8003e6e:	681b      	ldr	r3, [r3, #0]
+ 8003e70:	4a0a      	ldr	r2, [pc, #40]	; (8003e9c <HAL_CRC_MspInit+0x38>)
+ 8003e72:	4293      	cmp	r3, r2
+ 8003e74:	d10b      	bne.n	8003e8e <HAL_CRC_MspInit+0x2a>
+  {
+  /* USER CODE BEGIN CRC_MspInit 0 */
+
+  /* USER CODE END CRC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_CRC_CLK_ENABLE();
+ 8003e76:	4b0a      	ldr	r3, [pc, #40]	; (8003ea0 <HAL_CRC_MspInit+0x3c>)
+ 8003e78:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003e7a:	4a09      	ldr	r2, [pc, #36]	; (8003ea0 <HAL_CRC_MspInit+0x3c>)
+ 8003e7c:	f443 5380 	orr.w	r3, r3, #4096	; 0x1000
+ 8003e80:	6313      	str	r3, [r2, #48]	; 0x30
+ 8003e82:	4b07      	ldr	r3, [pc, #28]	; (8003ea0 <HAL_CRC_MspInit+0x3c>)
+ 8003e84:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003e86:	f403 5380 	and.w	r3, r3, #4096	; 0x1000
+ 8003e8a:	60fb      	str	r3, [r7, #12]
+ 8003e8c:	68fb      	ldr	r3, [r7, #12]
+  /* USER CODE BEGIN CRC_MspInit 1 */
+
+  /* USER CODE END CRC_MspInit 1 */
+  }
+
+}
+ 8003e8e:	bf00      	nop
+ 8003e90:	3714      	adds	r7, #20
+ 8003e92:	46bd      	mov	sp, r7
+ 8003e94:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8003e98:	4770      	bx	lr
+ 8003e9a:	bf00      	nop
+ 8003e9c:	40023000 	.word	0x40023000
+ 8003ea0:	40023800 	.word	0x40023800
+
+08003ea4 <HAL_DAC_MspInit>:
+* This function configures the hardware resources used in this example
+* @param hdac: DAC handle pointer
+* @retval None
+*/
+void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
+{
+ 8003ea4:	b580      	push	{r7, lr}
+ 8003ea6:	b08a      	sub	sp, #40	; 0x28
+ 8003ea8:	af00      	add	r7, sp, #0
+ 8003eaa:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8003eac:	f107 0314 	add.w	r3, r7, #20
+ 8003eb0:	2200      	movs	r2, #0
+ 8003eb2:	601a      	str	r2, [r3, #0]
+ 8003eb4:	605a      	str	r2, [r3, #4]
+ 8003eb6:	609a      	str	r2, [r3, #8]
+ 8003eb8:	60da      	str	r2, [r3, #12]
+ 8003eba:	611a      	str	r2, [r3, #16]
+  if(hdac->Instance==DAC)
+ 8003ebc:	687b      	ldr	r3, [r7, #4]
+ 8003ebe:	681b      	ldr	r3, [r3, #0]
+ 8003ec0:	4a19      	ldr	r2, [pc, #100]	; (8003f28 <HAL_DAC_MspInit+0x84>)
+ 8003ec2:	4293      	cmp	r3, r2
+ 8003ec4:	d12b      	bne.n	8003f1e <HAL_DAC_MspInit+0x7a>
+  {
+  /* USER CODE BEGIN DAC_MspInit 0 */
+
+  /* USER CODE END DAC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DAC_CLK_ENABLE();
+ 8003ec6:	4b19      	ldr	r3, [pc, #100]	; (8003f2c <HAL_DAC_MspInit+0x88>)
+ 8003ec8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8003eca:	4a18      	ldr	r2, [pc, #96]	; (8003f2c <HAL_DAC_MspInit+0x88>)
+ 8003ecc:	f043 5300 	orr.w	r3, r3, #536870912	; 0x20000000
+ 8003ed0:	6413      	str	r3, [r2, #64]	; 0x40
+ 8003ed2:	4b16      	ldr	r3, [pc, #88]	; (8003f2c <HAL_DAC_MspInit+0x88>)
+ 8003ed4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8003ed6:	f003 5300 	and.w	r3, r3, #536870912	; 0x20000000
+ 8003eda:	613b      	str	r3, [r7, #16]
+ 8003edc:	693b      	ldr	r3, [r7, #16]
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+ 8003ede:	4b13      	ldr	r3, [pc, #76]	; (8003f2c <HAL_DAC_MspInit+0x88>)
+ 8003ee0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003ee2:	4a12      	ldr	r2, [pc, #72]	; (8003f2c <HAL_DAC_MspInit+0x88>)
+ 8003ee4:	f043 0301 	orr.w	r3, r3, #1
+ 8003ee8:	6313      	str	r3, [r2, #48]	; 0x30
+ 8003eea:	4b10      	ldr	r3, [pc, #64]	; (8003f2c <HAL_DAC_MspInit+0x88>)
+ 8003eec:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003eee:	f003 0301 	and.w	r3, r3, #1
+ 8003ef2:	60fb      	str	r3, [r7, #12]
+ 8003ef4:	68fb      	ldr	r3, [r7, #12]
+    /**DAC GPIO Configuration
+    PA4     ------> DAC_OUT1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_4;
+ 8003ef6:	2310      	movs	r3, #16
+ 8003ef8:	617b      	str	r3, [r7, #20]
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ 8003efa:	2303      	movs	r3, #3
+ 8003efc:	61bb      	str	r3, [r7, #24]
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8003efe:	2300      	movs	r3, #0
+ 8003f00:	61fb      	str	r3, [r7, #28]
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 8003f02:	f107 0314 	add.w	r3, r7, #20
+ 8003f06:	4619      	mov	r1, r3
+ 8003f08:	4809      	ldr	r0, [pc, #36]	; (8003f30 <HAL_DAC_MspInit+0x8c>)
+ 8003f0a:	f003 fa8d 	bl	8007428 <HAL_GPIO_Init>
+
+    /* DAC interrupt Init */
+    HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 0, 0);
+ 8003f0e:	2200      	movs	r2, #0
+ 8003f10:	2100      	movs	r1, #0
+ 8003f12:	2036      	movs	r0, #54	; 0x36
+ 8003f14:	f001 fad8 	bl	80054c8 <HAL_NVIC_SetPriority>
+    HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ 8003f18:	2036      	movs	r0, #54	; 0x36
+ 8003f1a:	f001 faf1 	bl	8005500 <HAL_NVIC_EnableIRQ>
+  /* USER CODE BEGIN DAC_MspInit 1 */
+
+  /* USER CODE END DAC_MspInit 1 */
+  }
+
+}
+ 8003f1e:	bf00      	nop
+ 8003f20:	3728      	adds	r7, #40	; 0x28
+ 8003f22:	46bd      	mov	sp, r7
+ 8003f24:	bd80      	pop	{r7, pc}
+ 8003f26:	bf00      	nop
+ 8003f28:	40007400 	.word	0x40007400
+ 8003f2c:	40023800 	.word	0x40023800
+ 8003f30:	40020000 	.word	0x40020000
+
+08003f34 <HAL_DMA2D_MspInit>:
+* This function configures the hardware resources used in this example
+* @param hdma2d: DMA2D handle pointer
+* @retval None
+*/
+void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
+{
+ 8003f34:	b480      	push	{r7}
+ 8003f36:	b085      	sub	sp, #20
+ 8003f38:	af00      	add	r7, sp, #0
+ 8003f3a:	6078      	str	r0, [r7, #4]
+  if(hdma2d->Instance==DMA2D)
+ 8003f3c:	687b      	ldr	r3, [r7, #4]
+ 8003f3e:	681b      	ldr	r3, [r3, #0]
+ 8003f40:	4a0a      	ldr	r2, [pc, #40]	; (8003f6c <HAL_DMA2D_MspInit+0x38>)
+ 8003f42:	4293      	cmp	r3, r2
+ 8003f44:	d10b      	bne.n	8003f5e <HAL_DMA2D_MspInit+0x2a>
+  {
+  /* USER CODE BEGIN DMA2D_MspInit 0 */
+
+  /* USER CODE END DMA2D_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DMA2D_CLK_ENABLE();
+ 8003f46:	4b0a      	ldr	r3, [pc, #40]	; (8003f70 <HAL_DMA2D_MspInit+0x3c>)
+ 8003f48:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003f4a:	4a09      	ldr	r2, [pc, #36]	; (8003f70 <HAL_DMA2D_MspInit+0x3c>)
+ 8003f4c:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
+ 8003f50:	6313      	str	r3, [r2, #48]	; 0x30
+ 8003f52:	4b07      	ldr	r3, [pc, #28]	; (8003f70 <HAL_DMA2D_MspInit+0x3c>)
+ 8003f54:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003f56:	f403 0300 	and.w	r3, r3, #8388608	; 0x800000
+ 8003f5a:	60fb      	str	r3, [r7, #12]
+ 8003f5c:	68fb      	ldr	r3, [r7, #12]
+  /* USER CODE BEGIN DMA2D_MspInit 1 */
+
+  /* USER CODE END DMA2D_MspInit 1 */
+  }
+
+}
+ 8003f5e:	bf00      	nop
+ 8003f60:	3714      	adds	r7, #20
+ 8003f62:	46bd      	mov	sp, r7
+ 8003f64:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8003f68:	4770      	bx	lr
+ 8003f6a:	bf00      	nop
+ 8003f6c:	4002b000 	.word	0x4002b000
+ 8003f70:	40023800 	.word	0x40023800
+
+08003f74 <HAL_I2C_MspInit>:
+* This function configures the hardware resources used in this example
+* @param hi2c: I2C handle pointer
+* @retval None
+*/
+void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
+{
+ 8003f74:	b580      	push	{r7, lr}
+ 8003f76:	b08c      	sub	sp, #48	; 0x30
+ 8003f78:	af00      	add	r7, sp, #0
+ 8003f7a:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8003f7c:	f107 031c 	add.w	r3, r7, #28
+ 8003f80:	2200      	movs	r2, #0
+ 8003f82:	601a      	str	r2, [r3, #0]
+ 8003f84:	605a      	str	r2, [r3, #4]
+ 8003f86:	609a      	str	r2, [r3, #8]
+ 8003f88:	60da      	str	r2, [r3, #12]
+ 8003f8a:	611a      	str	r2, [r3, #16]
+  if(hi2c->Instance==I2C1)
+ 8003f8c:	687b      	ldr	r3, [r7, #4]
+ 8003f8e:	681b      	ldr	r3, [r3, #0]
+ 8003f90:	4a2f      	ldr	r2, [pc, #188]	; (8004050 <HAL_I2C_MspInit+0xdc>)
+ 8003f92:	4293      	cmp	r3, r2
+ 8003f94:	d129      	bne.n	8003fea <HAL_I2C_MspInit+0x76>
+  {
+  /* USER CODE BEGIN I2C1_MspInit 0 */
+
+  /* USER CODE END I2C1_MspInit 0 */
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+ 8003f96:	4b2f      	ldr	r3, [pc, #188]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 8003f98:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003f9a:	4a2e      	ldr	r2, [pc, #184]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 8003f9c:	f043 0302 	orr.w	r3, r3, #2
+ 8003fa0:	6313      	str	r3, [r2, #48]	; 0x30
+ 8003fa2:	4b2c      	ldr	r3, [pc, #176]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 8003fa4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003fa6:	f003 0302 	and.w	r3, r3, #2
+ 8003faa:	61bb      	str	r3, [r7, #24]
+ 8003fac:	69bb      	ldr	r3, [r7, #24]
+    /**I2C1 GPIO Configuration
+    PB8     ------> I2C1_SCL
+    PB9     ------> I2C1_SDA
+    */
+    GPIO_InitStruct.Pin = ARDUINO_SCL_D15_Pin|ARDUINO_SDA_D14_Pin;
+ 8003fae:	f44f 7340 	mov.w	r3, #768	; 0x300
+ 8003fb2:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+ 8003fb4:	2312      	movs	r3, #18
+ 8003fb6:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+ 8003fb8:	2301      	movs	r3, #1
+ 8003fba:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8003fbc:	2300      	movs	r3, #0
+ 8003fbe:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
+ 8003fc0:	2304      	movs	r3, #4
+ 8003fc2:	62fb      	str	r3, [r7, #44]	; 0x2c
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 8003fc4:	f107 031c 	add.w	r3, r7, #28
+ 8003fc8:	4619      	mov	r1, r3
+ 8003fca:	4823      	ldr	r0, [pc, #140]	; (8004058 <HAL_I2C_MspInit+0xe4>)
+ 8003fcc:	f003 fa2c 	bl	8007428 <HAL_GPIO_Init>
+
+    /* Peripheral clock enable */
+    __HAL_RCC_I2C1_CLK_ENABLE();
+ 8003fd0:	4b20      	ldr	r3, [pc, #128]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 8003fd2:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8003fd4:	4a1f      	ldr	r2, [pc, #124]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 8003fd6:	f443 1300 	orr.w	r3, r3, #2097152	; 0x200000
+ 8003fda:	6413      	str	r3, [r2, #64]	; 0x40
+ 8003fdc:	4b1d      	ldr	r3, [pc, #116]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 8003fde:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8003fe0:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
+ 8003fe4:	617b      	str	r3, [r7, #20]
+ 8003fe6:	697b      	ldr	r3, [r7, #20]
+  /* USER CODE BEGIN I2C3_MspInit 1 */
+
+  /* USER CODE END I2C3_MspInit 1 */
+  }
+
+}
+ 8003fe8:	e02d      	b.n	8004046 <HAL_I2C_MspInit+0xd2>
+  else if(hi2c->Instance==I2C3)
+ 8003fea:	687b      	ldr	r3, [r7, #4]
+ 8003fec:	681b      	ldr	r3, [r3, #0]
+ 8003fee:	4a1b      	ldr	r2, [pc, #108]	; (800405c <HAL_I2C_MspInit+0xe8>)
+ 8003ff0:	4293      	cmp	r3, r2
+ 8003ff2:	d128      	bne.n	8004046 <HAL_I2C_MspInit+0xd2>
+    __HAL_RCC_GPIOH_CLK_ENABLE();
+ 8003ff4:	4b17      	ldr	r3, [pc, #92]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 8003ff6:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8003ff8:	4a16      	ldr	r2, [pc, #88]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 8003ffa:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 8003ffe:	6313      	str	r3, [r2, #48]	; 0x30
+ 8004000:	4b14      	ldr	r3, [pc, #80]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 8004002:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004004:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 8004008:	613b      	str	r3, [r7, #16]
+ 800400a:	693b      	ldr	r3, [r7, #16]
+    GPIO_InitStruct.Pin = LCD_SCL_Pin|LCD_SDA_Pin;
+ 800400c:	f44f 73c0 	mov.w	r3, #384	; 0x180
+ 8004010:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+ 8004012:	2312      	movs	r3, #18
+ 8004014:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+ 8004016:	2301      	movs	r3, #1
+ 8004018:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 800401a:	2303      	movs	r3, #3
+ 800401c:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
+ 800401e:	2304      	movs	r3, #4
+ 8004020:	62fb      	str	r3, [r7, #44]	; 0x2c
+    HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
+ 8004022:	f107 031c 	add.w	r3, r7, #28
+ 8004026:	4619      	mov	r1, r3
+ 8004028:	480d      	ldr	r0, [pc, #52]	; (8004060 <HAL_I2C_MspInit+0xec>)
+ 800402a:	f003 f9fd 	bl	8007428 <HAL_GPIO_Init>
+    __HAL_RCC_I2C3_CLK_ENABLE();
+ 800402e:	4b09      	ldr	r3, [pc, #36]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 8004030:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004032:	4a08      	ldr	r2, [pc, #32]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 8004034:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
+ 8004038:	6413      	str	r3, [r2, #64]	; 0x40
+ 800403a:	4b06      	ldr	r3, [pc, #24]	; (8004054 <HAL_I2C_MspInit+0xe0>)
+ 800403c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800403e:	f403 0300 	and.w	r3, r3, #8388608	; 0x800000
+ 8004042:	60fb      	str	r3, [r7, #12]
+ 8004044:	68fb      	ldr	r3, [r7, #12]
+}
+ 8004046:	bf00      	nop
+ 8004048:	3730      	adds	r7, #48	; 0x30
+ 800404a:	46bd      	mov	sp, r7
+ 800404c:	bd80      	pop	{r7, pc}
+ 800404e:	bf00      	nop
+ 8004050:	40005400 	.word	0x40005400
+ 8004054:	40023800 	.word	0x40023800
+ 8004058:	40020400 	.word	0x40020400
+ 800405c:	40005c00 	.word	0x40005c00
+ 8004060:	40021c00 	.word	0x40021c00
+
+08004064 <HAL_I2C_MspDeInit>:
+* This function freeze the hardware resources used in this example
+* @param hi2c: I2C handle pointer
+* @retval None
+*/
+void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
+{
+ 8004064:	b580      	push	{r7, lr}
+ 8004066:	b082      	sub	sp, #8
+ 8004068:	af00      	add	r7, sp, #0
+ 800406a:	6078      	str	r0, [r7, #4]
+  if(hi2c->Instance==I2C1)
+ 800406c:	687b      	ldr	r3, [r7, #4]
+ 800406e:	681b      	ldr	r3, [r3, #0]
+ 8004070:	4a15      	ldr	r2, [pc, #84]	; (80040c8 <HAL_I2C_MspDeInit+0x64>)
+ 8004072:	4293      	cmp	r3, r2
+ 8004074:	d110      	bne.n	8004098 <HAL_I2C_MspDeInit+0x34>
+  {
+  /* USER CODE BEGIN I2C1_MspDeInit 0 */
+
+  /* USER CODE END I2C1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_I2C1_CLK_DISABLE();
+ 8004076:	4b15      	ldr	r3, [pc, #84]	; (80040cc <HAL_I2C_MspDeInit+0x68>)
+ 8004078:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800407a:	4a14      	ldr	r2, [pc, #80]	; (80040cc <HAL_I2C_MspDeInit+0x68>)
+ 800407c:	f423 1300 	bic.w	r3, r3, #2097152	; 0x200000
+ 8004080:	6413      	str	r3, [r2, #64]	; 0x40
+
+    /**I2C1 GPIO Configuration
+    PB8     ------> I2C1_SCL
+    PB9     ------> I2C1_SDA
+    */
+    HAL_GPIO_DeInit(ARDUINO_SCL_D15_GPIO_Port, ARDUINO_SCL_D15_Pin);
+ 8004082:	f44f 7180 	mov.w	r1, #256	; 0x100
+ 8004086:	4812      	ldr	r0, [pc, #72]	; (80040d0 <HAL_I2C_MspDeInit+0x6c>)
+ 8004088:	f003 fb78 	bl	800777c <HAL_GPIO_DeInit>
+
+    HAL_GPIO_DeInit(ARDUINO_SDA_D14_GPIO_Port, ARDUINO_SDA_D14_Pin);
+ 800408c:	f44f 7100 	mov.w	r1, #512	; 0x200
+ 8004090:	480f      	ldr	r0, [pc, #60]	; (80040d0 <HAL_I2C_MspDeInit+0x6c>)
+ 8004092:	f003 fb73 	bl	800777c <HAL_GPIO_DeInit>
+  /* USER CODE BEGIN I2C3_MspDeInit 1 */
+
+  /* USER CODE END I2C3_MspDeInit 1 */
+  }
+
+}
+ 8004096:	e013      	b.n	80040c0 <HAL_I2C_MspDeInit+0x5c>
+  else if(hi2c->Instance==I2C3)
+ 8004098:	687b      	ldr	r3, [r7, #4]
+ 800409a:	681b      	ldr	r3, [r3, #0]
+ 800409c:	4a0d      	ldr	r2, [pc, #52]	; (80040d4 <HAL_I2C_MspDeInit+0x70>)
+ 800409e:	4293      	cmp	r3, r2
+ 80040a0:	d10e      	bne.n	80040c0 <HAL_I2C_MspDeInit+0x5c>
+    __HAL_RCC_I2C3_CLK_DISABLE();
+ 80040a2:	4b0a      	ldr	r3, [pc, #40]	; (80040cc <HAL_I2C_MspDeInit+0x68>)
+ 80040a4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 80040a6:	4a09      	ldr	r2, [pc, #36]	; (80040cc <HAL_I2C_MspDeInit+0x68>)
+ 80040a8:	f423 0300 	bic.w	r3, r3, #8388608	; 0x800000
+ 80040ac:	6413      	str	r3, [r2, #64]	; 0x40
+    HAL_GPIO_DeInit(LCD_SCL_GPIO_Port, LCD_SCL_Pin);
+ 80040ae:	2180      	movs	r1, #128	; 0x80
+ 80040b0:	4809      	ldr	r0, [pc, #36]	; (80040d8 <HAL_I2C_MspDeInit+0x74>)
+ 80040b2:	f003 fb63 	bl	800777c <HAL_GPIO_DeInit>
+    HAL_GPIO_DeInit(LCD_SDA_GPIO_Port, LCD_SDA_Pin);
+ 80040b6:	f44f 7180 	mov.w	r1, #256	; 0x100
+ 80040ba:	4807      	ldr	r0, [pc, #28]	; (80040d8 <HAL_I2C_MspDeInit+0x74>)
+ 80040bc:	f003 fb5e 	bl	800777c <HAL_GPIO_DeInit>
+}
+ 80040c0:	bf00      	nop
+ 80040c2:	3708      	adds	r7, #8
+ 80040c4:	46bd      	mov	sp, r7
+ 80040c6:	bd80      	pop	{r7, pc}
+ 80040c8:	40005400 	.word	0x40005400
+ 80040cc:	40023800 	.word	0x40023800
+ 80040d0:	40020400 	.word	0x40020400
+ 80040d4:	40005c00 	.word	0x40005c00
+ 80040d8:	40021c00 	.word	0x40021c00
+
+080040dc <HAL_LTDC_MspInit>:
+* This function configures the hardware resources used in this example
+* @param hltdc: LTDC handle pointer
+* @retval None
+*/
+void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
+{
+ 80040dc:	b580      	push	{r7, lr}
+ 80040de:	b08e      	sub	sp, #56	; 0x38
+ 80040e0:	af00      	add	r7, sp, #0
+ 80040e2:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 80040e4:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 80040e8:	2200      	movs	r2, #0
+ 80040ea:	601a      	str	r2, [r3, #0]
+ 80040ec:	605a      	str	r2, [r3, #4]
+ 80040ee:	609a      	str	r2, [r3, #8]
+ 80040f0:	60da      	str	r2, [r3, #12]
+ 80040f2:	611a      	str	r2, [r3, #16]
+  if(hltdc->Instance==LTDC)
+ 80040f4:	687b      	ldr	r3, [r7, #4]
+ 80040f6:	681b      	ldr	r3, [r3, #0]
+ 80040f8:	4a55      	ldr	r2, [pc, #340]	; (8004250 <HAL_LTDC_MspInit+0x174>)
+ 80040fa:	4293      	cmp	r3, r2
+ 80040fc:	f040 80a3 	bne.w	8004246 <HAL_LTDC_MspInit+0x16a>
+  {
+  /* USER CODE BEGIN LTDC_MspInit 0 */
+
+  /* USER CODE END LTDC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_LTDC_CLK_ENABLE();
+ 8004100:	4b54      	ldr	r3, [pc, #336]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 8004102:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8004104:	4a53      	ldr	r2, [pc, #332]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 8004106:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
+ 800410a:	6453      	str	r3, [r2, #68]	; 0x44
+ 800410c:	4b51      	ldr	r3, [pc, #324]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 800410e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8004110:	f003 6380 	and.w	r3, r3, #67108864	; 0x4000000
+ 8004114:	623b      	str	r3, [r7, #32]
+ 8004116:	6a3b      	ldr	r3, [r7, #32]
+
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+ 8004118:	4b4e      	ldr	r3, [pc, #312]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 800411a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800411c:	4a4d      	ldr	r2, [pc, #308]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 800411e:	f043 0310 	orr.w	r3, r3, #16
+ 8004122:	6313      	str	r3, [r2, #48]	; 0x30
+ 8004124:	4b4b      	ldr	r3, [pc, #300]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 8004126:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004128:	f003 0310 	and.w	r3, r3, #16
+ 800412c:	61fb      	str	r3, [r7, #28]
+ 800412e:	69fb      	ldr	r3, [r7, #28]
+    __HAL_RCC_GPIOJ_CLK_ENABLE();
+ 8004130:	4b48      	ldr	r3, [pc, #288]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 8004132:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004134:	4a47      	ldr	r2, [pc, #284]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 8004136:	f443 7300 	orr.w	r3, r3, #512	; 0x200
+ 800413a:	6313      	str	r3, [r2, #48]	; 0x30
+ 800413c:	4b45      	ldr	r3, [pc, #276]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 800413e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004140:	f403 7300 	and.w	r3, r3, #512	; 0x200
+ 8004144:	61bb      	str	r3, [r7, #24]
+ 8004146:	69bb      	ldr	r3, [r7, #24]
+    __HAL_RCC_GPIOK_CLK_ENABLE();
+ 8004148:	4b42      	ldr	r3, [pc, #264]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 800414a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800414c:	4a41      	ldr	r2, [pc, #260]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 800414e:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
+ 8004152:	6313      	str	r3, [r2, #48]	; 0x30
+ 8004154:	4b3f      	ldr	r3, [pc, #252]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 8004156:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004158:	f403 6380 	and.w	r3, r3, #1024	; 0x400
+ 800415c:	617b      	str	r3, [r7, #20]
+ 800415e:	697b      	ldr	r3, [r7, #20]
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+ 8004160:	4b3c      	ldr	r3, [pc, #240]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 8004162:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004164:	4a3b      	ldr	r2, [pc, #236]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 8004166:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 800416a:	6313      	str	r3, [r2, #48]	; 0x30
+ 800416c:	4b39      	ldr	r3, [pc, #228]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 800416e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004170:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 8004174:	613b      	str	r3, [r7, #16]
+ 8004176:	693b      	ldr	r3, [r7, #16]
+    __HAL_RCC_GPIOI_CLK_ENABLE();
+ 8004178:	4b36      	ldr	r3, [pc, #216]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 800417a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800417c:	4a35      	ldr	r2, [pc, #212]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 800417e:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 8004182:	6313      	str	r3, [r2, #48]	; 0x30
+ 8004184:	4b33      	ldr	r3, [pc, #204]	; (8004254 <HAL_LTDC_MspInit+0x178>)
+ 8004186:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004188:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 800418c:	60fb      	str	r3, [r7, #12]
+ 800418e:	68fb      	ldr	r3, [r7, #12]
+    PJ3     ------> LTDC_R4
+    PJ2     ------> LTDC_R3
+    PJ0     ------> LTDC_R1
+    PJ1     ------> LTDC_R2
+    */
+    GPIO_InitStruct.Pin = LCD_B0_Pin;
+ 8004190:	2310      	movs	r3, #16
+ 8004192:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8004194:	2302      	movs	r3, #2
+ 8004196:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8004198:	2300      	movs	r3, #0
+ 800419a:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 800419c:	2300      	movs	r3, #0
+ 800419e:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+ 80041a0:	230e      	movs	r3, #14
+ 80041a2:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(LCD_B0_GPIO_Port, &GPIO_InitStruct);
+ 80041a4:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 80041a8:	4619      	mov	r1, r3
+ 80041aa:	482b      	ldr	r0, [pc, #172]	; (8004258 <HAL_LTDC_MspInit+0x17c>)
+ 80041ac:	f003 f93c 	bl	8007428 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = LCD_B1_Pin|LCD_B2_Pin|LCD_B3_Pin|LCD_G4_Pin
+ 80041b0:	f64e 73ff 	movw	r3, #61439	; 0xefff
+ 80041b4:	627b      	str	r3, [r7, #36]	; 0x24
+                          |LCD_G1_Pin|LCD_G3_Pin|LCD_G0_Pin|LCD_G2_Pin
+                          |LCD_R7_Pin|LCD_R5_Pin|LCD_R6_Pin|LCD_R4_Pin
+                          |LCD_R3_Pin|LCD_R1_Pin|LCD_R2_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80041b6:	2302      	movs	r3, #2
+ 80041b8:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80041ba:	2300      	movs	r3, #0
+ 80041bc:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 80041be:	2300      	movs	r3, #0
+ 80041c0:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+ 80041c2:	230e      	movs	r3, #14
+ 80041c4:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(GPIOJ, &GPIO_InitStruct);
+ 80041c6:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 80041ca:	4619      	mov	r1, r3
+ 80041cc:	4823      	ldr	r0, [pc, #140]	; (800425c <HAL_LTDC_MspInit+0x180>)
+ 80041ce:	f003 f92b 	bl	8007428 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = LCD_DE_Pin|LCD_B7_Pin|LCD_B6_Pin|LCD_B5_Pin
+ 80041d2:	23f7      	movs	r3, #247	; 0xf7
+ 80041d4:	627b      	str	r3, [r7, #36]	; 0x24
+                          |LCD_G6_Pin|LCD_G7_Pin|LCD_G5_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80041d6:	2302      	movs	r3, #2
+ 80041d8:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80041da:	2300      	movs	r3, #0
+ 80041dc:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 80041de:	2300      	movs	r3, #0
+ 80041e0:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+ 80041e2:	230e      	movs	r3, #14
+ 80041e4:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(GPIOK, &GPIO_InitStruct);
+ 80041e6:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 80041ea:	4619      	mov	r1, r3
+ 80041ec:	481c      	ldr	r0, [pc, #112]	; (8004260 <HAL_LTDC_MspInit+0x184>)
+ 80041ee:	f003 f91b 	bl	8007428 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = LCD_B4_Pin;
+ 80041f2:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 80041f6:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80041f8:	2302      	movs	r3, #2
+ 80041fa:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80041fc:	2300      	movs	r3, #0
+ 80041fe:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8004200:	2300      	movs	r3, #0
+ 8004202:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
+ 8004204:	2309      	movs	r3, #9
+ 8004206:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(LCD_B4_GPIO_Port, &GPIO_InitStruct);
+ 8004208:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 800420c:	4619      	mov	r1, r3
+ 800420e:	4815      	ldr	r0, [pc, #84]	; (8004264 <HAL_LTDC_MspInit+0x188>)
+ 8004210:	f003 f90a 	bl	8007428 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = LCD_HSYNC_Pin|LCD_VSYNC_Pin|LCD_R0_Pin|LCD_CLK_Pin;
+ 8004214:	f44f 4346 	mov.w	r3, #50688	; 0xc600
+ 8004218:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 800421a:	2302      	movs	r3, #2
+ 800421c:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800421e:	2300      	movs	r3, #0
+ 8004220:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8004222:	2300      	movs	r3, #0
+ 8004224:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+ 8004226:	230e      	movs	r3, #14
+ 8004228:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
+ 800422a:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 800422e:	4619      	mov	r1, r3
+ 8004230:	480d      	ldr	r0, [pc, #52]	; (8004268 <HAL_LTDC_MspInit+0x18c>)
+ 8004232:	f003 f8f9 	bl	8007428 <HAL_GPIO_Init>
+
+    /* LTDC interrupt Init */
+    HAL_NVIC_SetPriority(LTDC_IRQn, 5, 0);
+ 8004236:	2200      	movs	r2, #0
+ 8004238:	2105      	movs	r1, #5
+ 800423a:	2058      	movs	r0, #88	; 0x58
+ 800423c:	f001 f944 	bl	80054c8 <HAL_NVIC_SetPriority>
+    HAL_NVIC_EnableIRQ(LTDC_IRQn);
+ 8004240:	2058      	movs	r0, #88	; 0x58
+ 8004242:	f001 f95d 	bl	8005500 <HAL_NVIC_EnableIRQ>
+  /* USER CODE BEGIN LTDC_MspInit 1 */
+
+  /* USER CODE END LTDC_MspInit 1 */
+  }
+
+}
+ 8004246:	bf00      	nop
+ 8004248:	3738      	adds	r7, #56	; 0x38
+ 800424a:	46bd      	mov	sp, r7
+ 800424c:	bd80      	pop	{r7, pc}
+ 800424e:	bf00      	nop
+ 8004250:	40016800 	.word	0x40016800
+ 8004254:	40023800 	.word	0x40023800
+ 8004258:	40021000 	.word	0x40021000
+ 800425c:	40022400 	.word	0x40022400
+ 8004260:	40022800 	.word	0x40022800
+ 8004264:	40021800 	.word	0x40021800
+ 8004268:	40022000 	.word	0x40022000
+
+0800426c <HAL_RNG_MspInit>:
+* This function configures the hardware resources used in this example
+* @param hrng: RNG handle pointer
+* @retval None
+*/
+void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
+{
+ 800426c:	b480      	push	{r7}
+ 800426e:	b085      	sub	sp, #20
+ 8004270:	af00      	add	r7, sp, #0
+ 8004272:	6078      	str	r0, [r7, #4]
+  if(hrng->Instance==RNG)
+ 8004274:	687b      	ldr	r3, [r7, #4]
+ 8004276:	681b      	ldr	r3, [r3, #0]
+ 8004278:	4a0a      	ldr	r2, [pc, #40]	; (80042a4 <HAL_RNG_MspInit+0x38>)
+ 800427a:	4293      	cmp	r3, r2
+ 800427c:	d10b      	bne.n	8004296 <HAL_RNG_MspInit+0x2a>
+  {
+  /* USER CODE BEGIN RNG_MspInit 0 */
+
+  /* USER CODE END RNG_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_RNG_CLK_ENABLE();
+ 800427e:	4b0a      	ldr	r3, [pc, #40]	; (80042a8 <HAL_RNG_MspInit+0x3c>)
+ 8004280:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8004282:	4a09      	ldr	r2, [pc, #36]	; (80042a8 <HAL_RNG_MspInit+0x3c>)
+ 8004284:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 8004288:	6353      	str	r3, [r2, #52]	; 0x34
+ 800428a:	4b07      	ldr	r3, [pc, #28]	; (80042a8 <HAL_RNG_MspInit+0x3c>)
+ 800428c:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 800428e:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 8004292:	60fb      	str	r3, [r7, #12]
+ 8004294:	68fb      	ldr	r3, [r7, #12]
+  /* USER CODE BEGIN RNG_MspInit 1 */
+
+  /* USER CODE END RNG_MspInit 1 */
+  }
+
+}
+ 8004296:	bf00      	nop
+ 8004298:	3714      	adds	r7, #20
+ 800429a:	46bd      	mov	sp, r7
+ 800429c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80042a0:	4770      	bx	lr
+ 80042a2:	bf00      	nop
+ 80042a4:	50060800 	.word	0x50060800
+ 80042a8:	40023800 	.word	0x40023800
+
+080042ac <HAL_RTC_MspInit>:
+* This function configures the hardware resources used in this example
+* @param hrtc: RTC handle pointer
+* @retval None
+*/
+void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
+{
+ 80042ac:	b480      	push	{r7}
+ 80042ae:	b083      	sub	sp, #12
+ 80042b0:	af00      	add	r7, sp, #0
+ 80042b2:	6078      	str	r0, [r7, #4]
+  if(hrtc->Instance==RTC)
+ 80042b4:	687b      	ldr	r3, [r7, #4]
+ 80042b6:	681b      	ldr	r3, [r3, #0]
+ 80042b8:	4a07      	ldr	r2, [pc, #28]	; (80042d8 <HAL_RTC_MspInit+0x2c>)
+ 80042ba:	4293      	cmp	r3, r2
+ 80042bc:	d105      	bne.n	80042ca <HAL_RTC_MspInit+0x1e>
+  {
+  /* USER CODE BEGIN RTC_MspInit 0 */
+
+  /* USER CODE END RTC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_RTC_ENABLE();
+ 80042be:	4b07      	ldr	r3, [pc, #28]	; (80042dc <HAL_RTC_MspInit+0x30>)
+ 80042c0:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80042c2:	4a06      	ldr	r2, [pc, #24]	; (80042dc <HAL_RTC_MspInit+0x30>)
+ 80042c4:	f443 4300 	orr.w	r3, r3, #32768	; 0x8000
+ 80042c8:	6713      	str	r3, [r2, #112]	; 0x70
+  /* USER CODE BEGIN RTC_MspInit 1 */
+
+  /* USER CODE END RTC_MspInit 1 */
+  }
+
+}
+ 80042ca:	bf00      	nop
+ 80042cc:	370c      	adds	r7, #12
+ 80042ce:	46bd      	mov	sp, r7
+ 80042d0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80042d4:	4770      	bx	lr
+ 80042d6:	bf00      	nop
+ 80042d8:	40002800 	.word	0x40002800
+ 80042dc:	40023800 	.word	0x40023800
+
+080042e0 <HAL_SPI_MspInit>:
+* This function configures the hardware resources used in this example
+* @param hspi: SPI handle pointer
+* @retval None
+*/
+void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
+{
+ 80042e0:	b580      	push	{r7, lr}
+ 80042e2:	b08a      	sub	sp, #40	; 0x28
+ 80042e4:	af00      	add	r7, sp, #0
+ 80042e6:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 80042e8:	f107 0314 	add.w	r3, r7, #20
+ 80042ec:	2200      	movs	r2, #0
+ 80042ee:	601a      	str	r2, [r3, #0]
+ 80042f0:	605a      	str	r2, [r3, #4]
+ 80042f2:	609a      	str	r2, [r3, #8]
+ 80042f4:	60da      	str	r2, [r3, #12]
+ 80042f6:	611a      	str	r2, [r3, #16]
+  if(hspi->Instance==SPI2)
+ 80042f8:	687b      	ldr	r3, [r7, #4]
+ 80042fa:	681b      	ldr	r3, [r3, #0]
+ 80042fc:	4a2d      	ldr	r2, [pc, #180]	; (80043b4 <HAL_SPI_MspInit+0xd4>)
+ 80042fe:	4293      	cmp	r3, r2
+ 8004300:	d154      	bne.n	80043ac <HAL_SPI_MspInit+0xcc>
+  {
+  /* USER CODE BEGIN SPI2_MspInit 0 */
+
+  /* USER CODE END SPI2_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_SPI2_CLK_ENABLE();
+ 8004302:	4b2d      	ldr	r3, [pc, #180]	; (80043b8 <HAL_SPI_MspInit+0xd8>)
+ 8004304:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004306:	4a2c      	ldr	r2, [pc, #176]	; (80043b8 <HAL_SPI_MspInit+0xd8>)
+ 8004308:	f443 4380 	orr.w	r3, r3, #16384	; 0x4000
+ 800430c:	6413      	str	r3, [r2, #64]	; 0x40
+ 800430e:	4b2a      	ldr	r3, [pc, #168]	; (80043b8 <HAL_SPI_MspInit+0xd8>)
+ 8004310:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004312:	f403 4380 	and.w	r3, r3, #16384	; 0x4000
+ 8004316:	613b      	str	r3, [r7, #16]
+ 8004318:	693b      	ldr	r3, [r7, #16]
+
+    __HAL_RCC_GPIOI_CLK_ENABLE();
+ 800431a:	4b27      	ldr	r3, [pc, #156]	; (80043b8 <HAL_SPI_MspInit+0xd8>)
+ 800431c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800431e:	4a26      	ldr	r2, [pc, #152]	; (80043b8 <HAL_SPI_MspInit+0xd8>)
+ 8004320:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 8004324:	6313      	str	r3, [r2, #48]	; 0x30
+ 8004326:	4b24      	ldr	r3, [pc, #144]	; (80043b8 <HAL_SPI_MspInit+0xd8>)
+ 8004328:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800432a:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 800432e:	60fb      	str	r3, [r7, #12]
+ 8004330:	68fb      	ldr	r3, [r7, #12]
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+ 8004332:	4b21      	ldr	r3, [pc, #132]	; (80043b8 <HAL_SPI_MspInit+0xd8>)
+ 8004334:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004336:	4a20      	ldr	r2, [pc, #128]	; (80043b8 <HAL_SPI_MspInit+0xd8>)
+ 8004338:	f043 0302 	orr.w	r3, r3, #2
+ 800433c:	6313      	str	r3, [r2, #48]	; 0x30
+ 800433e:	4b1e      	ldr	r3, [pc, #120]	; (80043b8 <HAL_SPI_MspInit+0xd8>)
+ 8004340:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004342:	f003 0302 	and.w	r3, r3, #2
+ 8004346:	60bb      	str	r3, [r7, #8]
+ 8004348:	68bb      	ldr	r3, [r7, #8]
+    PI1     ------> SPI2_SCK
+    PI0     ------> SPI2_NSS
+    PB14     ------> SPI2_MISO
+    PB15     ------> SPI2_MOSI
+    */
+    GPIO_InitStruct.Pin = ARDUINO_SCK_D13_Pin;
+ 800434a:	2302      	movs	r3, #2
+ 800434c:	617b      	str	r3, [r7, #20]
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 800434e:	2302      	movs	r3, #2
+ 8004350:	61bb      	str	r3, [r7, #24]
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8004352:	2300      	movs	r3, #0
+ 8004354:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8004356:	2300      	movs	r3, #0
+ 8004358:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
+ 800435a:	2305      	movs	r3, #5
+ 800435c:	627b      	str	r3, [r7, #36]	; 0x24
+    HAL_GPIO_Init(ARDUINO_SCK_D13_GPIO_Port, &GPIO_InitStruct);
+ 800435e:	f107 0314 	add.w	r3, r7, #20
+ 8004362:	4619      	mov	r1, r3
+ 8004364:	4815      	ldr	r0, [pc, #84]	; (80043bc <HAL_SPI_MspInit+0xdc>)
+ 8004366:	f003 f85f 	bl	8007428 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+ 800436a:	2301      	movs	r3, #1
+ 800436c:	617b      	str	r3, [r7, #20]
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 800436e:	2302      	movs	r3, #2
+ 8004370:	61bb      	str	r3, [r7, #24]
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8004372:	2300      	movs	r3, #0
+ 8004374:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8004376:	2303      	movs	r3, #3
+ 8004378:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
+ 800437a:	2305      	movs	r3, #5
+ 800437c:	627b      	str	r3, [r7, #36]	; 0x24
+    HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
+ 800437e:	f107 0314 	add.w	r3, r7, #20
+ 8004382:	4619      	mov	r1, r3
+ 8004384:	480d      	ldr	r0, [pc, #52]	; (80043bc <HAL_SPI_MspInit+0xdc>)
+ 8004386:	f003 f84f 	bl	8007428 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
+ 800438a:	f44f 4340 	mov.w	r3, #49152	; 0xc000
+ 800438e:	617b      	str	r3, [r7, #20]
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8004390:	2302      	movs	r3, #2
+ 8004392:	61bb      	str	r3, [r7, #24]
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8004394:	2300      	movs	r3, #0
+ 8004396:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8004398:	2303      	movs	r3, #3
+ 800439a:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
+ 800439c:	2305      	movs	r3, #5
+ 800439e:	627b      	str	r3, [r7, #36]	; 0x24
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 80043a0:	f107 0314 	add.w	r3, r7, #20
+ 80043a4:	4619      	mov	r1, r3
+ 80043a6:	4806      	ldr	r0, [pc, #24]	; (80043c0 <HAL_SPI_MspInit+0xe0>)
+ 80043a8:	f003 f83e 	bl	8007428 <HAL_GPIO_Init>
+  /* USER CODE BEGIN SPI2_MspInit 1 */
+
+  /* USER CODE END SPI2_MspInit 1 */
+  }
+
+}
+ 80043ac:	bf00      	nop
+ 80043ae:	3728      	adds	r7, #40	; 0x28
+ 80043b0:	46bd      	mov	sp, r7
+ 80043b2:	bd80      	pop	{r7, pc}
+ 80043b4:	40003800 	.word	0x40003800
+ 80043b8:	40023800 	.word	0x40023800
+ 80043bc:	40022000 	.word	0x40022000
+ 80043c0:	40020400 	.word	0x40020400
+
+080043c4 <HAL_TIM_Base_MspInit>:
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+ 80043c4:	b480      	push	{r7}
+ 80043c6:	b089      	sub	sp, #36	; 0x24
+ 80043c8:	af00      	add	r7, sp, #0
+ 80043ca:	6078      	str	r0, [r7, #4]
+  if(htim_base->Instance==TIM1)
+ 80043cc:	687b      	ldr	r3, [r7, #4]
+ 80043ce:	681b      	ldr	r3, [r3, #0]
+ 80043d0:	4a2e      	ldr	r2, [pc, #184]	; (800448c <HAL_TIM_Base_MspInit+0xc8>)
+ 80043d2:	4293      	cmp	r3, r2
+ 80043d4:	d10c      	bne.n	80043f0 <HAL_TIM_Base_MspInit+0x2c>
+  {
+  /* USER CODE BEGIN TIM1_MspInit 0 */
+
+  /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+ 80043d6:	4b2e      	ldr	r3, [pc, #184]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 80043d8:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 80043da:	4a2d      	ldr	r2, [pc, #180]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 80043dc:	f043 0301 	orr.w	r3, r3, #1
+ 80043e0:	6453      	str	r3, [r2, #68]	; 0x44
+ 80043e2:	4b2b      	ldr	r3, [pc, #172]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 80043e4:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 80043e6:	f003 0301 	and.w	r3, r3, #1
+ 80043ea:	61fb      	str	r3, [r7, #28]
+ 80043ec:	69fb      	ldr	r3, [r7, #28]
+  /* USER CODE BEGIN TIM8_MspInit 1 */
+
+  /* USER CODE END TIM8_MspInit 1 */
+  }
+
+}
+ 80043ee:	e046      	b.n	800447e <HAL_TIM_Base_MspInit+0xba>
+  else if(htim_base->Instance==TIM2)
+ 80043f0:	687b      	ldr	r3, [r7, #4]
+ 80043f2:	681b      	ldr	r3, [r3, #0]
+ 80043f4:	f1b3 4f80 	cmp.w	r3, #1073741824	; 0x40000000
+ 80043f8:	d10c      	bne.n	8004414 <HAL_TIM_Base_MspInit+0x50>
+    __HAL_RCC_TIM2_CLK_ENABLE();
+ 80043fa:	4b25      	ldr	r3, [pc, #148]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 80043fc:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 80043fe:	4a24      	ldr	r2, [pc, #144]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 8004400:	f043 0301 	orr.w	r3, r3, #1
+ 8004404:	6413      	str	r3, [r2, #64]	; 0x40
+ 8004406:	4b22      	ldr	r3, [pc, #136]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 8004408:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800440a:	f003 0301 	and.w	r3, r3, #1
+ 800440e:	61bb      	str	r3, [r7, #24]
+ 8004410:	69bb      	ldr	r3, [r7, #24]
+}
+ 8004412:	e034      	b.n	800447e <HAL_TIM_Base_MspInit+0xba>
+  else if(htim_base->Instance==TIM3)
+ 8004414:	687b      	ldr	r3, [r7, #4]
+ 8004416:	681b      	ldr	r3, [r3, #0]
+ 8004418:	4a1e      	ldr	r2, [pc, #120]	; (8004494 <HAL_TIM_Base_MspInit+0xd0>)
+ 800441a:	4293      	cmp	r3, r2
+ 800441c:	d10c      	bne.n	8004438 <HAL_TIM_Base_MspInit+0x74>
+    __HAL_RCC_TIM3_CLK_ENABLE();
+ 800441e:	4b1c      	ldr	r3, [pc, #112]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 8004420:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004422:	4a1b      	ldr	r2, [pc, #108]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 8004424:	f043 0302 	orr.w	r3, r3, #2
+ 8004428:	6413      	str	r3, [r2, #64]	; 0x40
+ 800442a:	4b19      	ldr	r3, [pc, #100]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 800442c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800442e:	f003 0302 	and.w	r3, r3, #2
+ 8004432:	617b      	str	r3, [r7, #20]
+ 8004434:	697b      	ldr	r3, [r7, #20]
+}
+ 8004436:	e022      	b.n	800447e <HAL_TIM_Base_MspInit+0xba>
+  else if(htim_base->Instance==TIM5)
+ 8004438:	687b      	ldr	r3, [r7, #4]
+ 800443a:	681b      	ldr	r3, [r3, #0]
+ 800443c:	4a16      	ldr	r2, [pc, #88]	; (8004498 <HAL_TIM_Base_MspInit+0xd4>)
+ 800443e:	4293      	cmp	r3, r2
+ 8004440:	d10c      	bne.n	800445c <HAL_TIM_Base_MspInit+0x98>
+    __HAL_RCC_TIM5_CLK_ENABLE();
+ 8004442:	4b13      	ldr	r3, [pc, #76]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 8004444:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004446:	4a12      	ldr	r2, [pc, #72]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 8004448:	f043 0308 	orr.w	r3, r3, #8
+ 800444c:	6413      	str	r3, [r2, #64]	; 0x40
+ 800444e:	4b10      	ldr	r3, [pc, #64]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 8004450:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004452:	f003 0308 	and.w	r3, r3, #8
+ 8004456:	613b      	str	r3, [r7, #16]
+ 8004458:	693b      	ldr	r3, [r7, #16]
+}
+ 800445a:	e010      	b.n	800447e <HAL_TIM_Base_MspInit+0xba>
+  else if(htim_base->Instance==TIM8)
+ 800445c:	687b      	ldr	r3, [r7, #4]
+ 800445e:	681b      	ldr	r3, [r3, #0]
+ 8004460:	4a0e      	ldr	r2, [pc, #56]	; (800449c <HAL_TIM_Base_MspInit+0xd8>)
+ 8004462:	4293      	cmp	r3, r2
+ 8004464:	d10b      	bne.n	800447e <HAL_TIM_Base_MspInit+0xba>
+    __HAL_RCC_TIM8_CLK_ENABLE();
+ 8004466:	4b0a      	ldr	r3, [pc, #40]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 8004468:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 800446a:	4a09      	ldr	r2, [pc, #36]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 800446c:	f043 0302 	orr.w	r3, r3, #2
+ 8004470:	6453      	str	r3, [r2, #68]	; 0x44
+ 8004472:	4b07      	ldr	r3, [pc, #28]	; (8004490 <HAL_TIM_Base_MspInit+0xcc>)
+ 8004474:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8004476:	f003 0302 	and.w	r3, r3, #2
+ 800447a:	60fb      	str	r3, [r7, #12]
+ 800447c:	68fb      	ldr	r3, [r7, #12]
+}
+ 800447e:	bf00      	nop
+ 8004480:	3724      	adds	r7, #36	; 0x24
+ 8004482:	46bd      	mov	sp, r7
+ 8004484:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8004488:	4770      	bx	lr
+ 800448a:	bf00      	nop
+ 800448c:	40010000 	.word	0x40010000
+ 8004490:	40023800 	.word	0x40023800
+ 8004494:	40000400 	.word	0x40000400
+ 8004498:	40000c00 	.word	0x40000c00
+ 800449c:	40010400 	.word	0x40010400
+
+080044a0 <HAL_TIM_MspPostInit>:
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
+{
+ 80044a0:	b580      	push	{r7, lr}
+ 80044a2:	b08a      	sub	sp, #40	; 0x28
+ 80044a4:	af00      	add	r7, sp, #0
+ 80044a6:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 80044a8:	f107 0314 	add.w	r3, r7, #20
+ 80044ac:	2200      	movs	r2, #0
+ 80044ae:	601a      	str	r2, [r3, #0]
+ 80044b0:	605a      	str	r2, [r3, #4]
+ 80044b2:	609a      	str	r2, [r3, #8]
+ 80044b4:	60da      	str	r2, [r3, #12]
+ 80044b6:	611a      	str	r2, [r3, #16]
+  if(htim->Instance==TIM3)
+ 80044b8:	687b      	ldr	r3, [r7, #4]
+ 80044ba:	681b      	ldr	r3, [r3, #0]
+ 80044bc:	4a22      	ldr	r2, [pc, #136]	; (8004548 <HAL_TIM_MspPostInit+0xa8>)
+ 80044be:	4293      	cmp	r3, r2
+ 80044c0:	d11c      	bne.n	80044fc <HAL_TIM_MspPostInit+0x5c>
+  {
+  /* USER CODE BEGIN TIM3_MspPostInit 0 */
+
+  /* USER CODE END TIM3_MspPostInit 0 */
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+ 80044c2:	4b22      	ldr	r3, [pc, #136]	; (800454c <HAL_TIM_MspPostInit+0xac>)
+ 80044c4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80044c6:	4a21      	ldr	r2, [pc, #132]	; (800454c <HAL_TIM_MspPostInit+0xac>)
+ 80044c8:	f043 0302 	orr.w	r3, r3, #2
+ 80044cc:	6313      	str	r3, [r2, #48]	; 0x30
+ 80044ce:	4b1f      	ldr	r3, [pc, #124]	; (800454c <HAL_TIM_MspPostInit+0xac>)
+ 80044d0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80044d2:	f003 0302 	and.w	r3, r3, #2
+ 80044d6:	613b      	str	r3, [r7, #16]
+ 80044d8:	693b      	ldr	r3, [r7, #16]
+    /**TIM3 GPIO Configuration
+    PB4     ------> TIM3_CH1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_4;
+ 80044da:	2310      	movs	r3, #16
+ 80044dc:	617b      	str	r3, [r7, #20]
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80044de:	2302      	movs	r3, #2
+ 80044e0:	61bb      	str	r3, [r7, #24]
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80044e2:	2300      	movs	r3, #0
+ 80044e4:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 80044e6:	2300      	movs	r3, #0
+ 80044e8:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
+ 80044ea:	2302      	movs	r3, #2
+ 80044ec:	627b      	str	r3, [r7, #36]	; 0x24
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 80044ee:	f107 0314 	add.w	r3, r7, #20
+ 80044f2:	4619      	mov	r1, r3
+ 80044f4:	4816      	ldr	r0, [pc, #88]	; (8004550 <HAL_TIM_MspPostInit+0xb0>)
+ 80044f6:	f002 ff97 	bl	8007428 <HAL_GPIO_Init>
+  /* USER CODE BEGIN TIM8_MspPostInit 1 */
+
+  /* USER CODE END TIM8_MspPostInit 1 */
+  }
+
+}
+ 80044fa:	e020      	b.n	800453e <HAL_TIM_MspPostInit+0x9e>
+  else if(htim->Instance==TIM8)
+ 80044fc:	687b      	ldr	r3, [r7, #4]
+ 80044fe:	681b      	ldr	r3, [r3, #0]
+ 8004500:	4a14      	ldr	r2, [pc, #80]	; (8004554 <HAL_TIM_MspPostInit+0xb4>)
+ 8004502:	4293      	cmp	r3, r2
+ 8004504:	d11b      	bne.n	800453e <HAL_TIM_MspPostInit+0x9e>
+    __HAL_RCC_GPIOI_CLK_ENABLE();
+ 8004506:	4b11      	ldr	r3, [pc, #68]	; (800454c <HAL_TIM_MspPostInit+0xac>)
+ 8004508:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800450a:	4a10      	ldr	r2, [pc, #64]	; (800454c <HAL_TIM_MspPostInit+0xac>)
+ 800450c:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 8004510:	6313      	str	r3, [r2, #48]	; 0x30
+ 8004512:	4b0e      	ldr	r3, [pc, #56]	; (800454c <HAL_TIM_MspPostInit+0xac>)
+ 8004514:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004516:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 800451a:	60fb      	str	r3, [r7, #12]
+ 800451c:	68fb      	ldr	r3, [r7, #12]
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+ 800451e:	2304      	movs	r3, #4
+ 8004520:	617b      	str	r3, [r7, #20]
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8004522:	2302      	movs	r3, #2
+ 8004524:	61bb      	str	r3, [r7, #24]
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8004526:	2300      	movs	r3, #0
+ 8004528:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 800452a:	2300      	movs	r3, #0
+ 800452c:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Alternate = GPIO_AF3_TIM8;
+ 800452e:	2303      	movs	r3, #3
+ 8004530:	627b      	str	r3, [r7, #36]	; 0x24
+    HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
+ 8004532:	f107 0314 	add.w	r3, r7, #20
+ 8004536:	4619      	mov	r1, r3
+ 8004538:	4807      	ldr	r0, [pc, #28]	; (8004558 <HAL_TIM_MspPostInit+0xb8>)
+ 800453a:	f002 ff75 	bl	8007428 <HAL_GPIO_Init>
+}
+ 800453e:	bf00      	nop
+ 8004540:	3728      	adds	r7, #40	; 0x28
+ 8004542:	46bd      	mov	sp, r7
+ 8004544:	bd80      	pop	{r7, pc}
+ 8004546:	bf00      	nop
+ 8004548:	40000400 	.word	0x40000400
+ 800454c:	40023800 	.word	0x40023800
+ 8004550:	40020400 	.word	0x40020400
+ 8004554:	40010400 	.word	0x40010400
+ 8004558:	40022000 	.word	0x40022000
+
+0800455c <HAL_UART_MspInit>:
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+ 800455c:	b580      	push	{r7, lr}
+ 800455e:	b08e      	sub	sp, #56	; 0x38
+ 8004560:	af00      	add	r7, sp, #0
+ 8004562:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8004564:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 8004568:	2200      	movs	r2, #0
+ 800456a:	601a      	str	r2, [r3, #0]
+ 800456c:	605a      	str	r2, [r3, #4]
+ 800456e:	609a      	str	r2, [r3, #8]
+ 8004570:	60da      	str	r2, [r3, #12]
+ 8004572:	611a      	str	r2, [r3, #16]
+  if(huart->Instance==UART7)
+ 8004574:	687b      	ldr	r3, [r7, #4]
+ 8004576:	681b      	ldr	r3, [r3, #0]
+ 8004578:	4a53      	ldr	r2, [pc, #332]	; (80046c8 <HAL_UART_MspInit+0x16c>)
+ 800457a:	4293      	cmp	r3, r2
+ 800457c:	d128      	bne.n	80045d0 <HAL_UART_MspInit+0x74>
+  {
+  /* USER CODE BEGIN UART7_MspInit 0 */
+
+  /* USER CODE END UART7_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_UART7_CLK_ENABLE();
+ 800457e:	4b53      	ldr	r3, [pc, #332]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 8004580:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004582:	4a52      	ldr	r2, [pc, #328]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 8004584:	f043 4380 	orr.w	r3, r3, #1073741824	; 0x40000000
+ 8004588:	6413      	str	r3, [r2, #64]	; 0x40
+ 800458a:	4b50      	ldr	r3, [pc, #320]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 800458c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800458e:	f003 4380 	and.w	r3, r3, #1073741824	; 0x40000000
+ 8004592:	623b      	str	r3, [r7, #32]
+ 8004594:	6a3b      	ldr	r3, [r7, #32]
+
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+ 8004596:	4b4d      	ldr	r3, [pc, #308]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 8004598:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800459a:	4a4c      	ldr	r2, [pc, #304]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 800459c:	f043 0320 	orr.w	r3, r3, #32
+ 80045a0:	6313      	str	r3, [r2, #48]	; 0x30
+ 80045a2:	4b4a      	ldr	r3, [pc, #296]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 80045a4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80045a6:	f003 0320 	and.w	r3, r3, #32
+ 80045aa:	61fb      	str	r3, [r7, #28]
+ 80045ac:	69fb      	ldr	r3, [r7, #28]
+    /**UART7 GPIO Configuration
+    PF7     ------> UART7_TX
+    PF6     ------> UART7_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6;
+ 80045ae:	23c0      	movs	r3, #192	; 0xc0
+ 80045b0:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80045b2:	2302      	movs	r3, #2
+ 80045b4:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80045b6:	2300      	movs	r3, #0
+ 80045b8:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 80045ba:	2303      	movs	r3, #3
+ 80045bc:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF8_UART7;
+ 80045be:	2308      	movs	r3, #8
+ 80045c0:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 80045c2:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 80045c6:	4619      	mov	r1, r3
+ 80045c8:	4841      	ldr	r0, [pc, #260]	; (80046d0 <HAL_UART_MspInit+0x174>)
+ 80045ca:	f002 ff2d 	bl	8007428 <HAL_GPIO_Init>
+  /* USER CODE BEGIN USART6_MspInit 1 */
+
+  /* USER CODE END USART6_MspInit 1 */
+  }
+
+}
+ 80045ce:	e077      	b.n	80046c0 <HAL_UART_MspInit+0x164>
+  else if(huart->Instance==USART1)
+ 80045d0:	687b      	ldr	r3, [r7, #4]
+ 80045d2:	681b      	ldr	r3, [r3, #0]
+ 80045d4:	4a3f      	ldr	r2, [pc, #252]	; (80046d4 <HAL_UART_MspInit+0x178>)
+ 80045d6:	4293      	cmp	r3, r2
+ 80045d8:	d145      	bne.n	8004666 <HAL_UART_MspInit+0x10a>
+    __HAL_RCC_USART1_CLK_ENABLE();
+ 80045da:	4b3c      	ldr	r3, [pc, #240]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 80045dc:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 80045de:	4a3b      	ldr	r2, [pc, #236]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 80045e0:	f043 0310 	orr.w	r3, r3, #16
+ 80045e4:	6453      	str	r3, [r2, #68]	; 0x44
+ 80045e6:	4b39      	ldr	r3, [pc, #228]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 80045e8:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 80045ea:	f003 0310 	and.w	r3, r3, #16
+ 80045ee:	61bb      	str	r3, [r7, #24]
+ 80045f0:	69bb      	ldr	r3, [r7, #24]
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+ 80045f2:	4b36      	ldr	r3, [pc, #216]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 80045f4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80045f6:	4a35      	ldr	r2, [pc, #212]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 80045f8:	f043 0302 	orr.w	r3, r3, #2
+ 80045fc:	6313      	str	r3, [r2, #48]	; 0x30
+ 80045fe:	4b33      	ldr	r3, [pc, #204]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 8004600:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004602:	f003 0302 	and.w	r3, r3, #2
+ 8004606:	617b      	str	r3, [r7, #20]
+ 8004608:	697b      	ldr	r3, [r7, #20]
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+ 800460a:	4b30      	ldr	r3, [pc, #192]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 800460c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800460e:	4a2f      	ldr	r2, [pc, #188]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 8004610:	f043 0301 	orr.w	r3, r3, #1
+ 8004614:	6313      	str	r3, [r2, #48]	; 0x30
+ 8004616:	4b2d      	ldr	r3, [pc, #180]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 8004618:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800461a:	f003 0301 	and.w	r3, r3, #1
+ 800461e:	613b      	str	r3, [r7, #16]
+ 8004620:	693b      	ldr	r3, [r7, #16]
+    GPIO_InitStruct.Pin = VCP_RX_Pin;
+ 8004622:	2380      	movs	r3, #128	; 0x80
+ 8004624:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8004626:	2302      	movs	r3, #2
+ 8004628:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800462a:	2300      	movs	r3, #0
+ 800462c:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 800462e:	2300      	movs	r3, #0
+ 8004630:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+ 8004632:	2307      	movs	r3, #7
+ 8004634:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(VCP_RX_GPIO_Port, &GPIO_InitStruct);
+ 8004636:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 800463a:	4619      	mov	r1, r3
+ 800463c:	4826      	ldr	r0, [pc, #152]	; (80046d8 <HAL_UART_MspInit+0x17c>)
+ 800463e:	f002 fef3 	bl	8007428 <HAL_GPIO_Init>
+    GPIO_InitStruct.Pin = VCP_TX_Pin;
+ 8004642:	f44f 7300 	mov.w	r3, #512	; 0x200
+ 8004646:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8004648:	2302      	movs	r3, #2
+ 800464a:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800464c:	2300      	movs	r3, #0
+ 800464e:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8004650:	2300      	movs	r3, #0
+ 8004652:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+ 8004654:	2307      	movs	r3, #7
+ 8004656:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(VCP_TX_GPIO_Port, &GPIO_InitStruct);
+ 8004658:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 800465c:	4619      	mov	r1, r3
+ 800465e:	481f      	ldr	r0, [pc, #124]	; (80046dc <HAL_UART_MspInit+0x180>)
+ 8004660:	f002 fee2 	bl	8007428 <HAL_GPIO_Init>
+}
+ 8004664:	e02c      	b.n	80046c0 <HAL_UART_MspInit+0x164>
+  else if(huart->Instance==USART6)
+ 8004666:	687b      	ldr	r3, [r7, #4]
+ 8004668:	681b      	ldr	r3, [r3, #0]
+ 800466a:	4a1d      	ldr	r2, [pc, #116]	; (80046e0 <HAL_UART_MspInit+0x184>)
+ 800466c:	4293      	cmp	r3, r2
+ 800466e:	d127      	bne.n	80046c0 <HAL_UART_MspInit+0x164>
+    __HAL_RCC_USART6_CLK_ENABLE();
+ 8004670:	4b16      	ldr	r3, [pc, #88]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 8004672:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8004674:	4a15      	ldr	r2, [pc, #84]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 8004676:	f043 0320 	orr.w	r3, r3, #32
+ 800467a:	6453      	str	r3, [r2, #68]	; 0x44
+ 800467c:	4b13      	ldr	r3, [pc, #76]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 800467e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8004680:	f003 0320 	and.w	r3, r3, #32
+ 8004684:	60fb      	str	r3, [r7, #12]
+ 8004686:	68fb      	ldr	r3, [r7, #12]
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+ 8004688:	4b10      	ldr	r3, [pc, #64]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 800468a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800468c:	4a0f      	ldr	r2, [pc, #60]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 800468e:	f043 0304 	orr.w	r3, r3, #4
+ 8004692:	6313      	str	r3, [r2, #48]	; 0x30
+ 8004694:	4b0d      	ldr	r3, [pc, #52]	; (80046cc <HAL_UART_MspInit+0x170>)
+ 8004696:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8004698:	f003 0304 	and.w	r3, r3, #4
+ 800469c:	60bb      	str	r3, [r7, #8]
+ 800469e:	68bb      	ldr	r3, [r7, #8]
+    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6;
+ 80046a0:	23c0      	movs	r3, #192	; 0xc0
+ 80046a2:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80046a4:	2302      	movs	r3, #2
+ 80046a6:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80046a8:	2300      	movs	r3, #0
+ 80046aa:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 80046ac:	2303      	movs	r3, #3
+ 80046ae:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF8_USART6;
+ 80046b0:	2308      	movs	r3, #8
+ 80046b2:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ 80046b4:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 80046b8:	4619      	mov	r1, r3
+ 80046ba:	480a      	ldr	r0, [pc, #40]	; (80046e4 <HAL_UART_MspInit+0x188>)
+ 80046bc:	f002 feb4 	bl	8007428 <HAL_GPIO_Init>
+}
+ 80046c0:	bf00      	nop
+ 80046c2:	3738      	adds	r7, #56	; 0x38
+ 80046c4:	46bd      	mov	sp, r7
+ 80046c6:	bd80      	pop	{r7, pc}
+ 80046c8:	40007800 	.word	0x40007800
+ 80046cc:	40023800 	.word	0x40023800
+ 80046d0:	40021400 	.word	0x40021400
+ 80046d4:	40011000 	.word	0x40011000
+ 80046d8:	40020400 	.word	0x40020400
+ 80046dc:	40020000 	.word	0x40020000
+ 80046e0:	40011400 	.word	0x40011400
+ 80046e4:	40020800 	.word	0x40020800
+
+080046e8 <HAL_FMC_MspInit>:
+
+}
+
+static uint32_t FMC_Initialized = 0;
+
+static void HAL_FMC_MspInit(void){
+ 80046e8:	b580      	push	{r7, lr}
+ 80046ea:	b086      	sub	sp, #24
+ 80046ec:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN FMC_MspInit 0 */
+
+  /* USER CODE END FMC_MspInit 0 */
+  GPIO_InitTypeDef GPIO_InitStruct ={0};
+ 80046ee:	1d3b      	adds	r3, r7, #4
+ 80046f0:	2200      	movs	r2, #0
+ 80046f2:	601a      	str	r2, [r3, #0]
+ 80046f4:	605a      	str	r2, [r3, #4]
+ 80046f6:	609a      	str	r2, [r3, #8]
+ 80046f8:	60da      	str	r2, [r3, #12]
+ 80046fa:	611a      	str	r2, [r3, #16]
+  if (FMC_Initialized) {
+ 80046fc:	4b3a      	ldr	r3, [pc, #232]	; (80047e8 <HAL_FMC_MspInit+0x100>)
+ 80046fe:	681b      	ldr	r3, [r3, #0]
+ 8004700:	2b00      	cmp	r3, #0
+ 8004702:	d16d      	bne.n	80047e0 <HAL_FMC_MspInit+0xf8>
+    return;
+  }
+  FMC_Initialized = 1;
+ 8004704:	4b38      	ldr	r3, [pc, #224]	; (80047e8 <HAL_FMC_MspInit+0x100>)
+ 8004706:	2201      	movs	r2, #1
+ 8004708:	601a      	str	r2, [r3, #0]
+
+  /* Peripheral clock enable */
+  __HAL_RCC_FMC_CLK_ENABLE();
+ 800470a:	4b38      	ldr	r3, [pc, #224]	; (80047ec <HAL_FMC_MspInit+0x104>)
+ 800470c:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800470e:	4a37      	ldr	r2, [pc, #220]	; (80047ec <HAL_FMC_MspInit+0x104>)
+ 8004710:	f043 0301 	orr.w	r3, r3, #1
+ 8004714:	6393      	str	r3, [r2, #56]	; 0x38
+ 8004716:	4b35      	ldr	r3, [pc, #212]	; (80047ec <HAL_FMC_MspInit+0x104>)
+ 8004718:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800471a:	f003 0301 	and.w	r3, r3, #1
+ 800471e:	603b      	str	r3, [r7, #0]
+ 8004720:	683b      	ldr	r3, [r7, #0]
+  PE10   ------> FMC_D7
+  PE12   ------> FMC_D9
+  PE15   ------> FMC_D12
+  PE13   ------> FMC_D10
+  */
+  GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_0|GPIO_PIN_8|GPIO_PIN_9
+ 8004722:	f64f 7383 	movw	r3, #65411	; 0xff83
+ 8004726:	607b      	str	r3, [r7, #4]
+                          |GPIO_PIN_11|GPIO_PIN_14|GPIO_PIN_7|GPIO_PIN_10
+                          |GPIO_PIN_12|GPIO_PIN_15|GPIO_PIN_13;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8004728:	2302      	movs	r3, #2
+ 800472a:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800472c:	2300      	movs	r3, #0
+ 800472e:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8004730:	2303      	movs	r3, #3
+ 8004732:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 8004734:	230c      	movs	r3, #12
+ 8004736:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 8004738:	1d3b      	adds	r3, r7, #4
+ 800473a:	4619      	mov	r1, r3
+ 800473c:	482c      	ldr	r0, [pc, #176]	; (80047f0 <HAL_FMC_MspInit+0x108>)
+ 800473e:	f002 fe73 	bl	8007428 <HAL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = GPIO_PIN_15|GPIO_PIN_8|GPIO_PIN_1|GPIO_PIN_0
+ 8004742:	f248 1333 	movw	r3, #33075	; 0x8133
+ 8004746:	607b      	str	r3, [r7, #4]
+                          |GPIO_PIN_5|GPIO_PIN_4;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8004748:	2302      	movs	r3, #2
+ 800474a:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800474c:	2300      	movs	r3, #0
+ 800474e:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8004750:	2303      	movs	r3, #3
+ 8004752:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 8004754:	230c      	movs	r3, #12
+ 8004756:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 8004758:	1d3b      	adds	r3, r7, #4
+ 800475a:	4619      	mov	r1, r3
+ 800475c:	4825      	ldr	r0, [pc, #148]	; (80047f4 <HAL_FMC_MspInit+0x10c>)
+ 800475e:	f002 fe63 	bl	8007428 <HAL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_15|GPIO_PIN_10
+ 8004762:	f24c 7303 	movw	r3, #50947	; 0xc703
+ 8004766:	607b      	str	r3, [r7, #4]
+                          |GPIO_PIN_14|GPIO_PIN_9|GPIO_PIN_8;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8004768:	2302      	movs	r3, #2
+ 800476a:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800476c:	2300      	movs	r3, #0
+ 800476e:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8004770:	2303      	movs	r3, #3
+ 8004772:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 8004774:	230c      	movs	r3, #12
+ 8004776:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 8004778:	1d3b      	adds	r3, r7, #4
+ 800477a:	4619      	mov	r1, r3
+ 800477c:	481e      	ldr	r0, [pc, #120]	; (80047f8 <HAL_FMC_MspInit+0x110>)
+ 800477e:	f002 fe53 	bl	8007428 <HAL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
+ 8004782:	f64f 033f 	movw	r3, #63551	; 0xf83f
+ 8004786:	607b      	str	r3, [r7, #4]
+                          |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_15
+                          |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_11;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8004788:	2302      	movs	r3, #2
+ 800478a:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800478c:	2300      	movs	r3, #0
+ 800478e:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8004790:	2303      	movs	r3, #3
+ 8004792:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 8004794:	230c      	movs	r3, #12
+ 8004796:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 8004798:	1d3b      	adds	r3, r7, #4
+ 800479a:	4619      	mov	r1, r3
+ 800479c:	4817      	ldr	r0, [pc, #92]	; (80047fc <HAL_FMC_MspInit+0x114>)
+ 800479e:	f002 fe43 	bl	8007428 <HAL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_3;
+ 80047a2:	2328      	movs	r3, #40	; 0x28
+ 80047a4:	607b      	str	r3, [r7, #4]
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80047a6:	2302      	movs	r3, #2
+ 80047a8:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80047aa:	2300      	movs	r3, #0
+ 80047ac:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 80047ae:	2303      	movs	r3, #3
+ 80047b0:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 80047b2:	230c      	movs	r3, #12
+ 80047b4:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
+ 80047b6:	1d3b      	adds	r3, r7, #4
+ 80047b8:	4619      	mov	r1, r3
+ 80047ba:	4811      	ldr	r0, [pc, #68]	; (8004800 <HAL_FMC_MspInit+0x118>)
+ 80047bc:	f002 fe34 	bl	8007428 <HAL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = GPIO_PIN_3;
+ 80047c0:	2308      	movs	r3, #8
+ 80047c2:	607b      	str	r3, [r7, #4]
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80047c4:	2302      	movs	r3, #2
+ 80047c6:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80047c8:	2300      	movs	r3, #0
+ 80047ca:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 80047cc:	2303      	movs	r3, #3
+ 80047ce:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 80047d0:	230c      	movs	r3, #12
+ 80047d2:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ 80047d4:	1d3b      	adds	r3, r7, #4
+ 80047d6:	4619      	mov	r1, r3
+ 80047d8:	480a      	ldr	r0, [pc, #40]	; (8004804 <HAL_FMC_MspInit+0x11c>)
+ 80047da:	f002 fe25 	bl	8007428 <HAL_GPIO_Init>
+ 80047de:	e000      	b.n	80047e2 <HAL_FMC_MspInit+0xfa>
+    return;
+ 80047e0:	bf00      	nop
+
+  /* USER CODE BEGIN FMC_MspInit 1 */
+
+  /* USER CODE END FMC_MspInit 1 */
+}
+ 80047e2:	3718      	adds	r7, #24
+ 80047e4:	46bd      	mov	sp, r7
+ 80047e6:	bd80      	pop	{r7, pc}
+ 80047e8:	20000568 	.word	0x20000568
+ 80047ec:	40023800 	.word	0x40023800
+ 80047f0:	40021000 	.word	0x40021000
+ 80047f4:	40021800 	.word	0x40021800
+ 80047f8:	40020c00 	.word	0x40020c00
+ 80047fc:	40021400 	.word	0x40021400
+ 8004800:	40021c00 	.word	0x40021c00
+ 8004804:	40020800 	.word	0x40020800
+
+08004808 <HAL_SDRAM_MspInit>:
+
+void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){
+ 8004808:	b580      	push	{r7, lr}
+ 800480a:	b082      	sub	sp, #8
+ 800480c:	af00      	add	r7, sp, #0
+ 800480e:	6078      	str	r0, [r7, #4]
+  /* USER CODE BEGIN SDRAM_MspInit 0 */
+
+  /* USER CODE END SDRAM_MspInit 0 */
+  HAL_FMC_MspInit();
+ 8004810:	f7ff ff6a 	bl	80046e8 <HAL_FMC_MspInit>
+  /* USER CODE BEGIN SDRAM_MspInit 1 */
+
+  /* USER CODE END SDRAM_MspInit 1 */
+}
+ 8004814:	bf00      	nop
+ 8004816:	3708      	adds	r7, #8
+ 8004818:	46bd      	mov	sp, r7
+ 800481a:	bd80      	pop	{r7, pc}
+
+0800481c <HAL_InitTick>:
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ 800481c:	b580      	push	{r7, lr}
+ 800481e:	b08c      	sub	sp, #48	; 0x30
+ 8004820:	af00      	add	r7, sp, #0
+ 8004822:	6078      	str	r0, [r7, #4]
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock = 0;
+ 8004824:	2300      	movs	r3, #0
+ 8004826:	62fb      	str	r3, [r7, #44]	; 0x2c
+  uint32_t              uwPrescalerValue = 0;
+ 8004828:	2300      	movs	r3, #0
+ 800482a:	62bb      	str	r3, [r7, #40]	; 0x28
+  uint32_t              pFLatency;
+  /*Configure the TIM6 IRQ priority */
+  HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0);
+ 800482c:	2200      	movs	r2, #0
+ 800482e:	6879      	ldr	r1, [r7, #4]
+ 8004830:	2036      	movs	r0, #54	; 0x36
+ 8004832:	f000 fe49 	bl	80054c8 <HAL_NVIC_SetPriority>
+
+  /* Enable the TIM6 global Interrupt */
+  HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ 8004836:	2036      	movs	r0, #54	; 0x36
+ 8004838:	f000 fe62 	bl	8005500 <HAL_NVIC_EnableIRQ>
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+ 800483c:	4b1f      	ldr	r3, [pc, #124]	; (80048bc <HAL_InitTick+0xa0>)
+ 800483e:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004840:	4a1e      	ldr	r2, [pc, #120]	; (80048bc <HAL_InitTick+0xa0>)
+ 8004842:	f043 0310 	orr.w	r3, r3, #16
+ 8004846:	6413      	str	r3, [r2, #64]	; 0x40
+ 8004848:	4b1c      	ldr	r3, [pc, #112]	; (80048bc <HAL_InitTick+0xa0>)
+ 800484a:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800484c:	f003 0310 	and.w	r3, r3, #16
+ 8004850:	60fb      	str	r3, [r7, #12]
+ 8004852:	68fb      	ldr	r3, [r7, #12]
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+ 8004854:	f107 0210 	add.w	r2, r7, #16
+ 8004858:	f107 0314 	add.w	r3, r7, #20
+ 800485c:	4611      	mov	r1, r2
+ 800485e:	4618      	mov	r0, r3
+ 8004860:	f004 fec6 	bl	80095f0 <HAL_RCC_GetClockConfig>
+
+  /* Compute TIM6 clock */
+  uwTimclock = 2*HAL_RCC_GetPCLK1Freq();
+ 8004864:	f004 fe9c 	bl	80095a0 <HAL_RCC_GetPCLK1Freq>
+ 8004868:	4603      	mov	r3, r0
+ 800486a:	005b      	lsls	r3, r3, #1
+ 800486c:	62fb      	str	r3, [r7, #44]	; 0x2c
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+ 800486e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8004870:	4a13      	ldr	r2, [pc, #76]	; (80048c0 <HAL_InitTick+0xa4>)
+ 8004872:	fba2 2303 	umull	r2, r3, r2, r3
+ 8004876:	0c9b      	lsrs	r3, r3, #18
+ 8004878:	3b01      	subs	r3, #1
+ 800487a:	62bb      	str	r3, [r7, #40]	; 0x28
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+ 800487c:	4b11      	ldr	r3, [pc, #68]	; (80048c4 <HAL_InitTick+0xa8>)
+ 800487e:	4a12      	ldr	r2, [pc, #72]	; (80048c8 <HAL_InitTick+0xac>)
+ 8004880:	601a      	str	r2, [r3, #0]
+  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+ 8004882:	4b10      	ldr	r3, [pc, #64]	; (80048c4 <HAL_InitTick+0xa8>)
+ 8004884:	f240 32e7 	movw	r2, #999	; 0x3e7
+ 8004888:	60da      	str	r2, [r3, #12]
+  htim6.Init.Prescaler = uwPrescalerValue;
+ 800488a:	4a0e      	ldr	r2, [pc, #56]	; (80048c4 <HAL_InitTick+0xa8>)
+ 800488c:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800488e:	6053      	str	r3, [r2, #4]
+  htim6.Init.ClockDivision = 0;
+ 8004890:	4b0c      	ldr	r3, [pc, #48]	; (80048c4 <HAL_InitTick+0xa8>)
+ 8004892:	2200      	movs	r2, #0
+ 8004894:	611a      	str	r2, [r3, #16]
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 8004896:	4b0b      	ldr	r3, [pc, #44]	; (80048c4 <HAL_InitTick+0xa8>)
+ 8004898:	2200      	movs	r2, #0
+ 800489a:	609a      	str	r2, [r3, #8]
+  if(HAL_TIM_Base_Init(&htim6) == HAL_OK)
+ 800489c:	4809      	ldr	r0, [pc, #36]	; (80048c4 <HAL_InitTick+0xa8>)
+ 800489e:	f005 ffc4 	bl	800a82a <HAL_TIM_Base_Init>
+ 80048a2:	4603      	mov	r3, r0
+ 80048a4:	2b00      	cmp	r3, #0
+ 80048a6:	d104      	bne.n	80048b2 <HAL_InitTick+0x96>
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    return HAL_TIM_Base_Start_IT(&htim6);
+ 80048a8:	4806      	ldr	r0, [pc, #24]	; (80048c4 <HAL_InitTick+0xa8>)
+ 80048aa:	f005 ffe9 	bl	800a880 <HAL_TIM_Base_Start_IT>
+ 80048ae:	4603      	mov	r3, r0
+ 80048b0:	e000      	b.n	80048b4 <HAL_InitTick+0x98>
+  }
+
+  /* Return function status */
+  return HAL_ERROR;
+ 80048b2:	2301      	movs	r3, #1
+}
+ 80048b4:	4618      	mov	r0, r3
+ 80048b6:	3730      	adds	r7, #48	; 0x30
+ 80048b8:	46bd      	mov	sp, r7
+ 80048ba:	bd80      	pop	{r7, pc}
+ 80048bc:	40023800 	.word	0x40023800
+ 80048c0:	431bde83 	.word	0x431bde83
+ 80048c4:	20008f38 	.word	0x20008f38
+ 80048c8:	40001000 	.word	0x40001000
+
+080048cc <NMI_Handler>:
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+ 80048cc:	b480      	push	{r7}
+ 80048ce:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  while (1)
+ 80048d0:	e7fe      	b.n	80048d0 <NMI_Handler+0x4>
+
+080048d2 <HardFault_Handler>:
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+ 80048d2:	b480      	push	{r7}
+ 80048d4:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+ 80048d6:	e7fe      	b.n	80048d6 <HardFault_Handler+0x4>
+
+080048d8 <MemManage_Handler>:
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+ 80048d8:	b480      	push	{r7}
+ 80048da:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+ 80048dc:	e7fe      	b.n	80048dc <MemManage_Handler+0x4>
+
+080048de <BusFault_Handler>:
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+ 80048de:	b480      	push	{r7}
+ 80048e0:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+ 80048e2:	e7fe      	b.n	80048e2 <BusFault_Handler+0x4>
+
+080048e4 <UsageFault_Handler>:
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+ 80048e4:	b480      	push	{r7}
+ 80048e6:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+ 80048e8:	e7fe      	b.n	80048e8 <UsageFault_Handler+0x4>
+
+080048ea <DebugMon_Handler>:
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+ 80048ea:	b480      	push	{r7}
+ 80048ec:	af00      	add	r7, sp, #0
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+ 80048ee:	bf00      	nop
+ 80048f0:	46bd      	mov	sp, r7
+ 80048f2:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80048f6:	4770      	bx	lr
+
+080048f8 <TIM6_DAC_IRQHandler>:
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+ 80048f8:	b580      	push	{r7, lr}
+ 80048fa:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_DAC_IRQHandler(&hdac);
+ 80048fc:	4803      	ldr	r0, [pc, #12]	; (800490c <TIM6_DAC_IRQHandler+0x14>)
+ 80048fe:	f000 ff19 	bl	8005734 <HAL_DAC_IRQHandler>
+  HAL_TIM_IRQHandler(&htim6);
+ 8004902:	4803      	ldr	r0, [pc, #12]	; (8004910 <TIM6_DAC_IRQHandler+0x18>)
+ 8004904:	f006 f81b 	bl	800a93e <HAL_TIM_IRQHandler>
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+ 8004908:	bf00      	nop
+ 800490a:	bd80      	pop	{r7, pc}
+ 800490c:	20008c94 	.word	0x20008c94
+ 8004910:	20008f38 	.word	0x20008f38
+
+08004914 <ETH_IRQHandler>:
+
+/**
+  * @brief This function handles Ethernet global interrupt.
+  */
+void ETH_IRQHandler(void)
+{
+ 8004914:	b580      	push	{r7, lr}
+ 8004916:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN ETH_IRQn 0 */
+
+  /* USER CODE END ETH_IRQn 0 */
+  HAL_ETH_IRQHandler(&heth);
+ 8004918:	4802      	ldr	r0, [pc, #8]	; (8004924 <ETH_IRQHandler+0x10>)
+ 800491a:	f001 ffe3 	bl	80068e4 <HAL_ETH_IRQHandler>
+  /* USER CODE BEGIN ETH_IRQn 1 */
+
+  /* USER CODE END ETH_IRQn 1 */
+}
+ 800491e:	bf00      	nop
+ 8004920:	bd80      	pop	{r7, pc}
+ 8004922:	bf00      	nop
+ 8004924:	2000a898 	.word	0x2000a898
+
+08004928 <LTDC_IRQHandler>:
+
+/**
+  * @brief This function handles LTDC global interrupt.
+  */
+void LTDC_IRQHandler(void)
+{
+ 8004928:	b580      	push	{r7, lr}
+ 800492a:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN LTDC_IRQn 0 */
+
+  /* USER CODE END LTDC_IRQn 0 */
+  HAL_LTDC_IRQHandler(&hltdc);
+ 800492c:	4802      	ldr	r0, [pc, #8]	; (8004938 <LTDC_IRQHandler+0x10>)
+ 800492e:	f003 fee1 	bl	80086f4 <HAL_LTDC_IRQHandler>
+  /* USER CODE BEGIN LTDC_IRQn 1 */
+
+  /* USER CODE END LTDC_IRQn 1 */
+}
+ 8004932:	bf00      	nop
+ 8004934:	bd80      	pop	{r7, pc}
+ 8004936:	bf00      	nop
+ 8004938:	20008ad0 	.word	0x20008ad0
+
+0800493c <_read>:
+	_kill(status, -1);
+	while (1) {}		/* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ 800493c:	b580      	push	{r7, lr}
+ 800493e:	b086      	sub	sp, #24
+ 8004940:	af00      	add	r7, sp, #0
+ 8004942:	60f8      	str	r0, [r7, #12]
+ 8004944:	60b9      	str	r1, [r7, #8]
+ 8004946:	607a      	str	r2, [r7, #4]
+	int DataIdx;
+
+	for (DataIdx = 0; DataIdx < len; DataIdx++)
+ 8004948:	2300      	movs	r3, #0
+ 800494a:	617b      	str	r3, [r7, #20]
+ 800494c:	e00a      	b.n	8004964 <_read+0x28>
+	{
+		*ptr++ = __io_getchar();
+ 800494e:	f3af 8000 	nop.w
+ 8004952:	4601      	mov	r1, r0
+ 8004954:	68bb      	ldr	r3, [r7, #8]
+ 8004956:	1c5a      	adds	r2, r3, #1
+ 8004958:	60ba      	str	r2, [r7, #8]
+ 800495a:	b2ca      	uxtb	r2, r1
+ 800495c:	701a      	strb	r2, [r3, #0]
+	for (DataIdx = 0; DataIdx < len; DataIdx++)
+ 800495e:	697b      	ldr	r3, [r7, #20]
+ 8004960:	3301      	adds	r3, #1
+ 8004962:	617b      	str	r3, [r7, #20]
+ 8004964:	697a      	ldr	r2, [r7, #20]
+ 8004966:	687b      	ldr	r3, [r7, #4]
+ 8004968:	429a      	cmp	r2, r3
+ 800496a:	dbf0      	blt.n	800494e <_read+0x12>
+	}
+
+return len;
+ 800496c:	687b      	ldr	r3, [r7, #4]
+}
+ 800496e:	4618      	mov	r0, r3
+ 8004970:	3718      	adds	r7, #24
+ 8004972:	46bd      	mov	sp, r7
+ 8004974:	bd80      	pop	{r7, pc}
+
+08004976 <_write>:
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ 8004976:	b580      	push	{r7, lr}
+ 8004978:	b086      	sub	sp, #24
+ 800497a:	af00      	add	r7, sp, #0
+ 800497c:	60f8      	str	r0, [r7, #12]
+ 800497e:	60b9      	str	r1, [r7, #8]
+ 8004980:	607a      	str	r2, [r7, #4]
+	int DataIdx;
+
+	for (DataIdx = 0; DataIdx < len; DataIdx++)
+ 8004982:	2300      	movs	r3, #0
+ 8004984:	617b      	str	r3, [r7, #20]
+ 8004986:	e009      	b.n	800499c <_write+0x26>
+	{
+		__io_putchar(*ptr++);
+ 8004988:	68bb      	ldr	r3, [r7, #8]
+ 800498a:	1c5a      	adds	r2, r3, #1
+ 800498c:	60ba      	str	r2, [r7, #8]
+ 800498e:	781b      	ldrb	r3, [r3, #0]
+ 8004990:	4618      	mov	r0, r3
+ 8004992:	f3af 8000 	nop.w
+	for (DataIdx = 0; DataIdx < len; DataIdx++)
+ 8004996:	697b      	ldr	r3, [r7, #20]
+ 8004998:	3301      	adds	r3, #1
+ 800499a:	617b      	str	r3, [r7, #20]
+ 800499c:	697a      	ldr	r2, [r7, #20]
+ 800499e:	687b      	ldr	r3, [r7, #4]
+ 80049a0:	429a      	cmp	r2, r3
+ 80049a2:	dbf1      	blt.n	8004988 <_write+0x12>
+	}
+	return len;
+ 80049a4:	687b      	ldr	r3, [r7, #4]
+}
+ 80049a6:	4618      	mov	r0, r3
+ 80049a8:	3718      	adds	r7, #24
+ 80049aa:	46bd      	mov	sp, r7
+ 80049ac:	bd80      	pop	{r7, pc}
+
+080049ae <_close>:
+
+int _close(int file)
+{
+ 80049ae:	b480      	push	{r7}
+ 80049b0:	b083      	sub	sp, #12
+ 80049b2:	af00      	add	r7, sp, #0
+ 80049b4:	6078      	str	r0, [r7, #4]
+	return -1;
+ 80049b6:	f04f 33ff 	mov.w	r3, #4294967295
+}
+ 80049ba:	4618      	mov	r0, r3
+ 80049bc:	370c      	adds	r7, #12
+ 80049be:	46bd      	mov	sp, r7
+ 80049c0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80049c4:	4770      	bx	lr
+
+080049c6 <_fstat>:
+
+
+int _fstat(int file, struct stat *st)
+{
+ 80049c6:	b480      	push	{r7}
+ 80049c8:	b083      	sub	sp, #12
+ 80049ca:	af00      	add	r7, sp, #0
+ 80049cc:	6078      	str	r0, [r7, #4]
+ 80049ce:	6039      	str	r1, [r7, #0]
+	st->st_mode = S_IFCHR;
+ 80049d0:	683b      	ldr	r3, [r7, #0]
+ 80049d2:	f44f 5200 	mov.w	r2, #8192	; 0x2000
+ 80049d6:	605a      	str	r2, [r3, #4]
+	return 0;
+ 80049d8:	2300      	movs	r3, #0
+}
+ 80049da:	4618      	mov	r0, r3
+ 80049dc:	370c      	adds	r7, #12
+ 80049de:	46bd      	mov	sp, r7
+ 80049e0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80049e4:	4770      	bx	lr
+
+080049e6 <_isatty>:
+
+int _isatty(int file)
+{
+ 80049e6:	b480      	push	{r7}
+ 80049e8:	b083      	sub	sp, #12
+ 80049ea:	af00      	add	r7, sp, #0
+ 80049ec:	6078      	str	r0, [r7, #4]
+	return 1;
+ 80049ee:	2301      	movs	r3, #1
+}
+ 80049f0:	4618      	mov	r0, r3
+ 80049f2:	370c      	adds	r7, #12
+ 80049f4:	46bd      	mov	sp, r7
+ 80049f6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80049fa:	4770      	bx	lr
+
+080049fc <_lseek>:
+
+int _lseek(int file, int ptr, int dir)
+{
+ 80049fc:	b480      	push	{r7}
+ 80049fe:	b085      	sub	sp, #20
+ 8004a00:	af00      	add	r7, sp, #0
+ 8004a02:	60f8      	str	r0, [r7, #12]
+ 8004a04:	60b9      	str	r1, [r7, #8]
+ 8004a06:	607a      	str	r2, [r7, #4]
+	return 0;
+ 8004a08:	2300      	movs	r3, #0
+}
+ 8004a0a:	4618      	mov	r0, r3
+ 8004a0c:	3714      	adds	r7, #20
+ 8004a0e:	46bd      	mov	sp, r7
+ 8004a10:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8004a14:	4770      	bx	lr
+	...
+
+08004a18 <_sbrk>:
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ 8004a18:	b480      	push	{r7}
+ 8004a1a:	b087      	sub	sp, #28
+ 8004a1c:	af00      	add	r7, sp, #0
+ 8004a1e:	6078      	str	r0, [r7, #4]
+  extern uint8_t _end; /* Symbol defined in the linker script */
+  extern uint8_t _estack; /* Symbol defined in the linker script */
+  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ 8004a20:	4a14      	ldr	r2, [pc, #80]	; (8004a74 <_sbrk+0x5c>)
+ 8004a22:	4b15      	ldr	r3, [pc, #84]	; (8004a78 <_sbrk+0x60>)
+ 8004a24:	1ad3      	subs	r3, r2, r3
+ 8004a26:	617b      	str	r3, [r7, #20]
+  const uint8_t *max_heap = (uint8_t *)stack_limit;
+ 8004a28:	697b      	ldr	r3, [r7, #20]
+ 8004a2a:	613b      	str	r3, [r7, #16]
+  uint8_t *prev_heap_end;
+
+  /* Initialize heap end at first call */
+  if (NULL == __sbrk_heap_end)
+ 8004a2c:	4b13      	ldr	r3, [pc, #76]	; (8004a7c <_sbrk+0x64>)
+ 8004a2e:	681b      	ldr	r3, [r3, #0]
+ 8004a30:	2b00      	cmp	r3, #0
+ 8004a32:	d102      	bne.n	8004a3a <_sbrk+0x22>
+  {
+    __sbrk_heap_end = &_end;
+ 8004a34:	4b11      	ldr	r3, [pc, #68]	; (8004a7c <_sbrk+0x64>)
+ 8004a36:	4a12      	ldr	r2, [pc, #72]	; (8004a80 <_sbrk+0x68>)
+ 8004a38:	601a      	str	r2, [r3, #0]
+  }
+
+  /* Protect heap from growing into the reserved MSP stack */
+  if (__sbrk_heap_end + incr > max_heap)
+ 8004a3a:	4b10      	ldr	r3, [pc, #64]	; (8004a7c <_sbrk+0x64>)
+ 8004a3c:	681a      	ldr	r2, [r3, #0]
+ 8004a3e:	687b      	ldr	r3, [r7, #4]
+ 8004a40:	4413      	add	r3, r2
+ 8004a42:	693a      	ldr	r2, [r7, #16]
+ 8004a44:	429a      	cmp	r2, r3
+ 8004a46:	d205      	bcs.n	8004a54 <_sbrk+0x3c>
+  {
+    errno = ENOMEM;
+ 8004a48:	4b0e      	ldr	r3, [pc, #56]	; (8004a84 <_sbrk+0x6c>)
+ 8004a4a:	220c      	movs	r2, #12
+ 8004a4c:	601a      	str	r2, [r3, #0]
+    return (void *)-1;
+ 8004a4e:	f04f 33ff 	mov.w	r3, #4294967295
+ 8004a52:	e009      	b.n	8004a68 <_sbrk+0x50>
+  }
+
+  prev_heap_end = __sbrk_heap_end;
+ 8004a54:	4b09      	ldr	r3, [pc, #36]	; (8004a7c <_sbrk+0x64>)
+ 8004a56:	681b      	ldr	r3, [r3, #0]
+ 8004a58:	60fb      	str	r3, [r7, #12]
+  __sbrk_heap_end += incr;
+ 8004a5a:	4b08      	ldr	r3, [pc, #32]	; (8004a7c <_sbrk+0x64>)
+ 8004a5c:	681a      	ldr	r2, [r3, #0]
+ 8004a5e:	687b      	ldr	r3, [r7, #4]
+ 8004a60:	4413      	add	r3, r2
+ 8004a62:	4a06      	ldr	r2, [pc, #24]	; (8004a7c <_sbrk+0x64>)
+ 8004a64:	6013      	str	r3, [r2, #0]
+
+  return (void *)prev_heap_end;
+ 8004a66:	68fb      	ldr	r3, [r7, #12]
+}
+ 8004a68:	4618      	mov	r0, r3
+ 8004a6a:	371c      	adds	r7, #28
+ 8004a6c:	46bd      	mov	sp, r7
+ 8004a6e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8004a72:	4770      	bx	lr
+ 8004a74:	20050000 	.word	0x20050000
+ 8004a78:	00000400 	.word	0x00000400
+ 8004a7c:	2000056c 	.word	0x2000056c
+ 8004a80:	2000f838 	.word	0x2000f838
+ 8004a84:	2000f82c 	.word	0x2000f82c
+
+08004a88 <SystemInit>:
+  *         SystemFrequency variable.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+ 8004a88:	b480      	push	{r7}
+ 8004a8a:	af00      	add	r7, sp, #0
+  /* FPU settings ------------------------------------------------------------*/
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+ 8004a8c:	4b08      	ldr	r3, [pc, #32]	; (8004ab0 <SystemInit+0x28>)
+ 8004a8e:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 8004a92:	4a07      	ldr	r2, [pc, #28]	; (8004ab0 <SystemInit+0x28>)
+ 8004a94:	f443 0370 	orr.w	r3, r3, #15728640	; 0xf00000
+ 8004a98:	f8c2 3088 	str.w	r3, [r2, #136]	; 0x88
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+ 8004a9c:	4b04      	ldr	r3, [pc, #16]	; (8004ab0 <SystemInit+0x28>)
+ 8004a9e:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
+ 8004aa2:	609a      	str	r2, [r3, #8]
+#endif
+}
+ 8004aa4:	bf00      	nop
+ 8004aa6:	46bd      	mov	sp, r7
+ 8004aa8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8004aac:	4770      	bx	lr
+ 8004aae:	bf00      	nop
+ 8004ab0:	e000ed00 	.word	0xe000ed00
+
+08004ab4 <Reset_Handler>:
+
+    .section  .text.Reset_Handler
+  .weak  Reset_Handler
+  .type  Reset_Handler, %function
+Reset_Handler:  
+  ldr   sp, =_estack      /* set stack pointer */
+ 8004ab4:	f8df d034 	ldr.w	sp, [pc, #52]	; 8004aec <LoopFillZerobss+0x14>
+
+/* Copy the data segment initializers from flash to SRAM */  
+  movs  r1, #0
+ 8004ab8:	2100      	movs	r1, #0
+  b  LoopCopyDataInit
+ 8004aba:	e003      	b.n	8004ac4 <LoopCopyDataInit>
+
+08004abc <CopyDataInit>:
+
+CopyDataInit:
+  ldr  r3, =_sidata
+ 8004abc:	4b0c      	ldr	r3, [pc, #48]	; (8004af0 <LoopFillZerobss+0x18>)
+  ldr  r3, [r3, r1]
+ 8004abe:	585b      	ldr	r3, [r3, r1]
+  str  r3, [r0, r1]
+ 8004ac0:	5043      	str	r3, [r0, r1]
+  adds  r1, r1, #4
+ 8004ac2:	3104      	adds	r1, #4
+
+08004ac4 <LoopCopyDataInit>:
+    
+LoopCopyDataInit:
+  ldr  r0, =_sdata
+ 8004ac4:	480b      	ldr	r0, [pc, #44]	; (8004af4 <LoopFillZerobss+0x1c>)
+  ldr  r3, =_edata
+ 8004ac6:	4b0c      	ldr	r3, [pc, #48]	; (8004af8 <LoopFillZerobss+0x20>)
+  adds  r2, r0, r1
+ 8004ac8:	1842      	adds	r2, r0, r1
+  cmp  r2, r3
+ 8004aca:	429a      	cmp	r2, r3
+  bcc  CopyDataInit
+ 8004acc:	d3f6      	bcc.n	8004abc <CopyDataInit>
+  ldr  r2, =_sbss
+ 8004ace:	4a0b      	ldr	r2, [pc, #44]	; (8004afc <LoopFillZerobss+0x24>)
+  b  LoopFillZerobss
+ 8004ad0:	e002      	b.n	8004ad8 <LoopFillZerobss>
+
+08004ad2 <FillZerobss>:
+/* Zero fill the bss segment. */  
+FillZerobss:
+  movs  r3, #0
+ 8004ad2:	2300      	movs	r3, #0
+  str  r3, [r2], #4
+ 8004ad4:	f842 3b04 	str.w	r3, [r2], #4
+
+08004ad8 <LoopFillZerobss>:
+    
+LoopFillZerobss:
+  ldr  r3, = _ebss
+ 8004ad8:	4b09      	ldr	r3, [pc, #36]	; (8004b00 <LoopFillZerobss+0x28>)
+  cmp  r2, r3
+ 8004ada:	429a      	cmp	r2, r3
+  bcc  FillZerobss
+ 8004adc:	d3f9      	bcc.n	8004ad2 <FillZerobss>
+
+/* Call the clock system initialization function.*/
+  bl  SystemInit   
+ 8004ade:	f7ff ffd3 	bl	8004a88 <SystemInit>
+/* Call static constructors */
+    bl __libc_init_array
+ 8004ae2:	f017 fc29 	bl	801c338 <__libc_init_array>
+/* Call the application's entry point.*/
+  bl  main
+ 8004ae6:	f7fc f839 	bl	8000b5c <main>
+  bx  lr    
+ 8004aea:	4770      	bx	lr
+  ldr   sp, =_estack      /* set stack pointer */
+ 8004aec:	20050000 	.word	0x20050000
+  ldr  r3, =_sidata
+ 8004af0:	08022660 	.word	0x08022660
+  ldr  r0, =_sdata
+ 8004af4:	20000000 	.word	0x20000000
+  ldr  r3, =_edata
+ 8004af8:	200000d4 	.word	0x200000d4
+  ldr  r2, =_sbss
+ 8004afc:	200000d4 	.word	0x200000d4
+  ldr  r3, = _ebss
+ 8004b00:	2000f834 	.word	0x2000f834
+
+08004b04 <ADC_IRQHandler>:
+ * @retval None       
+*/
+    .section  .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+  b  Infinite_Loop
+ 8004b04:	e7fe      	b.n	8004b04 <ADC_IRQHandler>
+
+08004b06 <HAL_Init>:
+  *         need to ensure that the SysTick time base is always set to 1 millisecond
+  *         to have correct HAL operation.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_Init(void)
+{
+ 8004b06:	b580      	push	{r7, lr}
+ 8004b08:	af00      	add	r7, sp, #0
+#if (PREFETCH_ENABLE != 0U)
+  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
+#endif /* PREFETCH_ENABLE */
+
+  /* Set Interrupt Group Priority */
+  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
+ 8004b0a:	2003      	movs	r0, #3
+ 8004b0c:	f000 fcd1 	bl	80054b2 <HAL_NVIC_SetPriorityGrouping>
+
+  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
+  HAL_InitTick(TICK_INT_PRIORITY);
+ 8004b10:	2000      	movs	r0, #0
+ 8004b12:	f7ff fe83 	bl	800481c <HAL_InitTick>
+  
+  /* Init the low level hardware */
+  HAL_MspInit();
+ 8004b16:	f7ff f90f 	bl	8003d38 <HAL_MspInit>
+  
+  /* Return function status */
+  return HAL_OK;
+ 8004b1a:	2300      	movs	r3, #0
+}
+ 8004b1c:	4618      	mov	r0, r3
+ 8004b1e:	bd80      	pop	{r7, pc}
+
+08004b20 <HAL_IncTick>:
+ * @note This function is declared as __weak to be overwritten in case of other 
+  *      implementations in user file.
+  * @retval None
+  */
+__weak void HAL_IncTick(void)
+{
+ 8004b20:	b480      	push	{r7}
+ 8004b22:	af00      	add	r7, sp, #0
+  uwTick += uwTickFreq;
+ 8004b24:	4b06      	ldr	r3, [pc, #24]	; (8004b40 <HAL_IncTick+0x20>)
+ 8004b26:	781b      	ldrb	r3, [r3, #0]
+ 8004b28:	461a      	mov	r2, r3
+ 8004b2a:	4b06      	ldr	r3, [pc, #24]	; (8004b44 <HAL_IncTick+0x24>)
+ 8004b2c:	681b      	ldr	r3, [r3, #0]
+ 8004b2e:	4413      	add	r3, r2
+ 8004b30:	4a04      	ldr	r2, [pc, #16]	; (8004b44 <HAL_IncTick+0x24>)
+ 8004b32:	6013      	str	r3, [r2, #0]
+}
+ 8004b34:	bf00      	nop
+ 8004b36:	46bd      	mov	sp, r7
+ 8004b38:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8004b3c:	4770      	bx	lr
+ 8004b3e:	bf00      	nop
+ 8004b40:	20000058 	.word	0x20000058
+ 8004b44:	20008f78 	.word	0x20008f78
+
+08004b48 <HAL_GetTick>:
+  * @note This function is declared as __weak to be overwritten in case of other 
+  *       implementations in user file.
+  * @retval tick value
+  */
+__weak uint32_t HAL_GetTick(void)
+{
+ 8004b48:	b480      	push	{r7}
+ 8004b4a:	af00      	add	r7, sp, #0
+  return uwTick;
+ 8004b4c:	4b03      	ldr	r3, [pc, #12]	; (8004b5c <HAL_GetTick+0x14>)
+ 8004b4e:	681b      	ldr	r3, [r3, #0]
+}
+ 8004b50:	4618      	mov	r0, r3
+ 8004b52:	46bd      	mov	sp, r7
+ 8004b54:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8004b58:	4770      	bx	lr
+ 8004b5a:	bf00      	nop
+ 8004b5c:	20008f78 	.word	0x20008f78
+
+08004b60 <HAL_Delay>:
+  *       implementations in user file.
+  * @param Delay  specifies the delay time length, in milliseconds.
+  * @retval None
+  */
+__weak void HAL_Delay(uint32_t Delay)
+{
+ 8004b60:	b580      	push	{r7, lr}
+ 8004b62:	b084      	sub	sp, #16
+ 8004b64:	af00      	add	r7, sp, #0
+ 8004b66:	6078      	str	r0, [r7, #4]
+  uint32_t tickstart = HAL_GetTick();
+ 8004b68:	f7ff ffee 	bl	8004b48 <HAL_GetTick>
+ 8004b6c:	60b8      	str	r0, [r7, #8]
+  uint32_t wait = Delay;
+ 8004b6e:	687b      	ldr	r3, [r7, #4]
+ 8004b70:	60fb      	str	r3, [r7, #12]
+
+  /* Add a freq to guarantee minimum wait */
+  if (wait < HAL_MAX_DELAY)
+ 8004b72:	68fb      	ldr	r3, [r7, #12]
+ 8004b74:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 8004b78:	d005      	beq.n	8004b86 <HAL_Delay+0x26>
+  {
+    wait += (uint32_t)(uwTickFreq);
+ 8004b7a:	4b09      	ldr	r3, [pc, #36]	; (8004ba0 <HAL_Delay+0x40>)
+ 8004b7c:	781b      	ldrb	r3, [r3, #0]
+ 8004b7e:	461a      	mov	r2, r3
+ 8004b80:	68fb      	ldr	r3, [r7, #12]
+ 8004b82:	4413      	add	r3, r2
+ 8004b84:	60fb      	str	r3, [r7, #12]
+  }
+
+  while ((HAL_GetTick() - tickstart) < wait)
+ 8004b86:	bf00      	nop
+ 8004b88:	f7ff ffde 	bl	8004b48 <HAL_GetTick>
+ 8004b8c:	4602      	mov	r2, r0
+ 8004b8e:	68bb      	ldr	r3, [r7, #8]
+ 8004b90:	1ad3      	subs	r3, r2, r3
+ 8004b92:	68fa      	ldr	r2, [r7, #12]
+ 8004b94:	429a      	cmp	r2, r3
+ 8004b96:	d8f7      	bhi.n	8004b88 <HAL_Delay+0x28>
+  {
+  }
+}
+ 8004b98:	bf00      	nop
+ 8004b9a:	3710      	adds	r7, #16
+ 8004b9c:	46bd      	mov	sp, r7
+ 8004b9e:	bd80      	pop	{r7, pc}
+ 8004ba0:	20000058 	.word	0x20000058
+
+08004ba4 <HAL_ADC_Init>:
+  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
+  *         the configuration information for the specified ADC.  
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
+{
+ 8004ba4:	b580      	push	{r7, lr}
+ 8004ba6:	b084      	sub	sp, #16
+ 8004ba8:	af00      	add	r7, sp, #0
+ 8004baa:	6078      	str	r0, [r7, #4]
+  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 8004bac:	2300      	movs	r3, #0
+ 8004bae:	73fb      	strb	r3, [r7, #15]
+  
+  /* Check ADC handle */
+  if(hadc == NULL)
+ 8004bb0:	687b      	ldr	r3, [r7, #4]
+ 8004bb2:	2b00      	cmp	r3, #0
+ 8004bb4:	d101      	bne.n	8004bba <HAL_ADC_Init+0x16>
+  {
+    return HAL_ERROR;
+ 8004bb6:	2301      	movs	r3, #1
+ 8004bb8:	e031      	b.n	8004c1e <HAL_ADC_Init+0x7a>
+  if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
+  {
+    assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
+  }
+
+  if(hadc->State == HAL_ADC_STATE_RESET)
+ 8004bba:	687b      	ldr	r3, [r7, #4]
+ 8004bbc:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004bbe:	2b00      	cmp	r3, #0
+ 8004bc0:	d109      	bne.n	8004bd6 <HAL_ADC_Init+0x32>
+
+    /* Init the low level hardware */
+    hadc->MspInitCallback(hadc);
+#else
+    /* Init the low level hardware */
+    HAL_ADC_MspInit(hadc);
+ 8004bc2:	6878      	ldr	r0, [r7, #4]
+ 8004bc4:	f7ff f8e0 	bl	8003d88 <HAL_ADC_MspInit>
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+
+    /* Initialize ADC error code */
+    ADC_CLEAR_ERRORCODE(hadc);
+ 8004bc8:	687b      	ldr	r3, [r7, #4]
+ 8004bca:	2200      	movs	r2, #0
+ 8004bcc:	645a      	str	r2, [r3, #68]	; 0x44
+    
+    /* Allocate lock resource and initialize it */
+    hadc->Lock = HAL_UNLOCKED;
+ 8004bce:	687b      	ldr	r3, [r7, #4]
+ 8004bd0:	2200      	movs	r2, #0
+ 8004bd2:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+  }
+  
+  /* Configuration of ADC parameters if previous preliminary actions are      */ 
+  /* correctly completed.                                                     */
+  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
+ 8004bd6:	687b      	ldr	r3, [r7, #4]
+ 8004bd8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004bda:	f003 0310 	and.w	r3, r3, #16
+ 8004bde:	2b00      	cmp	r3, #0
+ 8004be0:	d116      	bne.n	8004c10 <HAL_ADC_Init+0x6c>
+  {
+    /* Set ADC state */
+    ADC_STATE_CLR_SET(hadc->State,
+ 8004be2:	687b      	ldr	r3, [r7, #4]
+ 8004be4:	6c1a      	ldr	r2, [r3, #64]	; 0x40
+ 8004be6:	4b10      	ldr	r3, [pc, #64]	; (8004c28 <HAL_ADC_Init+0x84>)
+ 8004be8:	4013      	ands	r3, r2
+ 8004bea:	f043 0202 	orr.w	r2, r3, #2
+ 8004bee:	687b      	ldr	r3, [r7, #4]
+ 8004bf0:	641a      	str	r2, [r3, #64]	; 0x40
+                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
+                      HAL_ADC_STATE_BUSY_INTERNAL);
+    
+    /* Set ADC parameters */
+    ADC_Init(hadc);
+ 8004bf2:	6878      	ldr	r0, [r7, #4]
+ 8004bf4:	f000 fab6 	bl	8005164 <ADC_Init>
+    
+    /* Set ADC error code to none */
+    ADC_CLEAR_ERRORCODE(hadc);
+ 8004bf8:	687b      	ldr	r3, [r7, #4]
+ 8004bfa:	2200      	movs	r2, #0
+ 8004bfc:	645a      	str	r2, [r3, #68]	; 0x44
+    
+    /* Set the ADC state */
+    ADC_STATE_CLR_SET(hadc->State,
+ 8004bfe:	687b      	ldr	r3, [r7, #4]
+ 8004c00:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004c02:	f023 0303 	bic.w	r3, r3, #3
+ 8004c06:	f043 0201 	orr.w	r2, r3, #1
+ 8004c0a:	687b      	ldr	r3, [r7, #4]
+ 8004c0c:	641a      	str	r2, [r3, #64]	; 0x40
+ 8004c0e:	e001      	b.n	8004c14 <HAL_ADC_Init+0x70>
+                      HAL_ADC_STATE_BUSY_INTERNAL,
+                      HAL_ADC_STATE_READY);
+  }
+  else
+  {
+    tmp_hal_status = HAL_ERROR;
+ 8004c10:	2301      	movs	r3, #1
+ 8004c12:	73fb      	strb	r3, [r7, #15]
+  }
+  
+  /* Release Lock */
+  __HAL_UNLOCK(hadc);
+ 8004c14:	687b      	ldr	r3, [r7, #4]
+ 8004c16:	2200      	movs	r2, #0
+ 8004c18:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  /* Return function status */
+  return tmp_hal_status;
+ 8004c1c:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 8004c1e:	4618      	mov	r0, r3
+ 8004c20:	3710      	adds	r7, #16
+ 8004c22:	46bd      	mov	sp, r7
+ 8004c24:	bd80      	pop	{r7, pc}
+ 8004c26:	bf00      	nop
+ 8004c28:	ffffeefd 	.word	0xffffeefd
+
+08004c2c <HAL_ADC_Start>:
+  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
+  *         the configuration information for the specified ADC.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
+{
+ 8004c2c:	b480      	push	{r7}
+ 8004c2e:	b085      	sub	sp, #20
+ 8004c30:	af00      	add	r7, sp, #0
+ 8004c32:	6078      	str	r0, [r7, #4]
+  __IO uint32_t counter = 0;
+ 8004c34:	2300      	movs	r3, #0
+ 8004c36:	60fb      	str	r3, [r7, #12]
+  /* Check the parameters */
+  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
+  assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); 
+  
+  /* Process locked */
+  __HAL_LOCK(hadc);
+ 8004c38:	687b      	ldr	r3, [r7, #4]
+ 8004c3a:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
+ 8004c3e:	2b01      	cmp	r3, #1
+ 8004c40:	d101      	bne.n	8004c46 <HAL_ADC_Start+0x1a>
+ 8004c42:	2302      	movs	r3, #2
+ 8004c44:	e0a0      	b.n	8004d88 <HAL_ADC_Start+0x15c>
+ 8004c46:	687b      	ldr	r3, [r7, #4]
+ 8004c48:	2201      	movs	r2, #1
+ 8004c4a:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+  
+  /* Enable the ADC peripheral */
+  /* Check if ADC peripheral is disabled in order to enable it and wait during 
+  Tstab time the ADC's stabilization */
+  if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
+ 8004c4e:	687b      	ldr	r3, [r7, #4]
+ 8004c50:	681b      	ldr	r3, [r3, #0]
+ 8004c52:	689b      	ldr	r3, [r3, #8]
+ 8004c54:	f003 0301 	and.w	r3, r3, #1
+ 8004c58:	2b01      	cmp	r3, #1
+ 8004c5a:	d018      	beq.n	8004c8e <HAL_ADC_Start+0x62>
+  {  
+    /* Enable the Peripheral */
+    __HAL_ADC_ENABLE(hadc);
+ 8004c5c:	687b      	ldr	r3, [r7, #4]
+ 8004c5e:	681b      	ldr	r3, [r3, #0]
+ 8004c60:	689a      	ldr	r2, [r3, #8]
+ 8004c62:	687b      	ldr	r3, [r7, #4]
+ 8004c64:	681b      	ldr	r3, [r3, #0]
+ 8004c66:	f042 0201 	orr.w	r2, r2, #1
+ 8004c6a:	609a      	str	r2, [r3, #8]
+    
+    /* Delay for ADC stabilization time */
+    /* Compute number of CPU cycles to wait for */
+    counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
+ 8004c6c:	4b49      	ldr	r3, [pc, #292]	; (8004d94 <HAL_ADC_Start+0x168>)
+ 8004c6e:	681b      	ldr	r3, [r3, #0]
+ 8004c70:	4a49      	ldr	r2, [pc, #292]	; (8004d98 <HAL_ADC_Start+0x16c>)
+ 8004c72:	fba2 2303 	umull	r2, r3, r2, r3
+ 8004c76:	0c9a      	lsrs	r2, r3, #18
+ 8004c78:	4613      	mov	r3, r2
+ 8004c7a:	005b      	lsls	r3, r3, #1
+ 8004c7c:	4413      	add	r3, r2
+ 8004c7e:	60fb      	str	r3, [r7, #12]
+    while(counter != 0)
+ 8004c80:	e002      	b.n	8004c88 <HAL_ADC_Start+0x5c>
+    {
+      counter--;
+ 8004c82:	68fb      	ldr	r3, [r7, #12]
+ 8004c84:	3b01      	subs	r3, #1
+ 8004c86:	60fb      	str	r3, [r7, #12]
+    while(counter != 0)
+ 8004c88:	68fb      	ldr	r3, [r7, #12]
+ 8004c8a:	2b00      	cmp	r3, #0
+ 8004c8c:	d1f9      	bne.n	8004c82 <HAL_ADC_Start+0x56>
+    }
+  }
+  
+  /* Start conversion if ADC is effectively enabled */
+  if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
+ 8004c8e:	687b      	ldr	r3, [r7, #4]
+ 8004c90:	681b      	ldr	r3, [r3, #0]
+ 8004c92:	689b      	ldr	r3, [r3, #8]
+ 8004c94:	f003 0301 	and.w	r3, r3, #1
+ 8004c98:	2b01      	cmp	r3, #1
+ 8004c9a:	d174      	bne.n	8004d86 <HAL_ADC_Start+0x15a>
+  {
+    /* Set ADC state                                                          */
+    /* - Clear state bitfield related to regular group conversion results     */
+    /* - Set state bitfield related to regular group operation                */
+    ADC_STATE_CLR_SET(hadc->State,
+ 8004c9c:	687b      	ldr	r3, [r7, #4]
+ 8004c9e:	6c1a      	ldr	r2, [r3, #64]	; 0x40
+ 8004ca0:	4b3e      	ldr	r3, [pc, #248]	; (8004d9c <HAL_ADC_Start+0x170>)
+ 8004ca2:	4013      	ands	r3, r2
+ 8004ca4:	f443 7280 	orr.w	r2, r3, #256	; 0x100
+ 8004ca8:	687b      	ldr	r3, [r7, #4]
+ 8004caa:	641a      	str	r2, [r3, #64]	; 0x40
+                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
+                      HAL_ADC_STATE_REG_BUSY);
+    
+    /* If conversions on group regular are also triggering group injected,    */
+    /* update ADC state.                                                      */
+    if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
+ 8004cac:	687b      	ldr	r3, [r7, #4]
+ 8004cae:	681b      	ldr	r3, [r3, #0]
+ 8004cb0:	685b      	ldr	r3, [r3, #4]
+ 8004cb2:	f403 6380 	and.w	r3, r3, #1024	; 0x400
+ 8004cb6:	2b00      	cmp	r3, #0
+ 8004cb8:	d007      	beq.n	8004cca <HAL_ADC_Start+0x9e>
+    {
+      ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
+ 8004cba:	687b      	ldr	r3, [r7, #4]
+ 8004cbc:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004cbe:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
+ 8004cc2:	f443 5280 	orr.w	r2, r3, #4096	; 0x1000
+ 8004cc6:	687b      	ldr	r3, [r7, #4]
+ 8004cc8:	641a      	str	r2, [r3, #64]	; 0x40
+    }
+    
+    /* State machine update: Check if an injected conversion is ongoing */
+    if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
+ 8004cca:	687b      	ldr	r3, [r7, #4]
+ 8004ccc:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004cce:	f403 5380 	and.w	r3, r3, #4096	; 0x1000
+ 8004cd2:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
+ 8004cd6:	d106      	bne.n	8004ce6 <HAL_ADC_Start+0xba>
+    {
+      /* Reset ADC error code fields related to conversions on group regular */
+      CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));         
+ 8004cd8:	687b      	ldr	r3, [r7, #4]
+ 8004cda:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8004cdc:	f023 0206 	bic.w	r2, r3, #6
+ 8004ce0:	687b      	ldr	r3, [r7, #4]
+ 8004ce2:	645a      	str	r2, [r3, #68]	; 0x44
+ 8004ce4:	e002      	b.n	8004cec <HAL_ADC_Start+0xc0>
+    }
+    else
+    {
+      /* Reset ADC all error code fields */
+      ADC_CLEAR_ERRORCODE(hadc);
+ 8004ce6:	687b      	ldr	r3, [r7, #4]
+ 8004ce8:	2200      	movs	r2, #0
+ 8004cea:	645a      	str	r2, [r3, #68]	; 0x44
+    }
+    
+    /* Process unlocked */
+    /* Unlock before starting ADC conversions: in case of potential           */
+    /* interruption, to let the process to ADC IRQ Handler.                   */
+    __HAL_UNLOCK(hadc);
+ 8004cec:	687b      	ldr	r3, [r7, #4]
+ 8004cee:	2200      	movs	r2, #0
+ 8004cf0:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+    
+    /* Clear regular group conversion flag and overrun flag */
+    /* (To ensure of no unknown state from potential previous ADC operations) */
+    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC | ADC_FLAG_OVR);
+ 8004cf4:	687b      	ldr	r3, [r7, #4]
+ 8004cf6:	681b      	ldr	r3, [r3, #0]
+ 8004cf8:	f06f 0222 	mvn.w	r2, #34	; 0x22
+ 8004cfc:	601a      	str	r2, [r3, #0]
+    
+    /* Check if Multimode enabled */
+    if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
+ 8004cfe:	4b28      	ldr	r3, [pc, #160]	; (8004da0 <HAL_ADC_Start+0x174>)
+ 8004d00:	685b      	ldr	r3, [r3, #4]
+ 8004d02:	f003 031f 	and.w	r3, r3, #31
+ 8004d06:	2b00      	cmp	r3, #0
+ 8004d08:	d10f      	bne.n	8004d2a <HAL_ADC_Start+0xfe>
+    {
+      /* if no external trigger present enable software conversion of regular channels */
+      if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET) 
+ 8004d0a:	687b      	ldr	r3, [r7, #4]
+ 8004d0c:	681b      	ldr	r3, [r3, #0]
+ 8004d0e:	689b      	ldr	r3, [r3, #8]
+ 8004d10:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
+ 8004d14:	2b00      	cmp	r3, #0
+ 8004d16:	d136      	bne.n	8004d86 <HAL_ADC_Start+0x15a>
+      {
+        /* Enable the selected ADC software conversion for regular group */
+        hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
+ 8004d18:	687b      	ldr	r3, [r7, #4]
+ 8004d1a:	681b      	ldr	r3, [r3, #0]
+ 8004d1c:	689a      	ldr	r2, [r3, #8]
+ 8004d1e:	687b      	ldr	r3, [r7, #4]
+ 8004d20:	681b      	ldr	r3, [r3, #0]
+ 8004d22:	f042 4280 	orr.w	r2, r2, #1073741824	; 0x40000000
+ 8004d26:	609a      	str	r2, [r3, #8]
+ 8004d28:	e02d      	b.n	8004d86 <HAL_ADC_Start+0x15a>
+      }
+    }
+    else
+    {
+      /* if instance of handle correspond to ADC1 and  no external trigger present enable software conversion of regular channels */
+      if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
+ 8004d2a:	687b      	ldr	r3, [r7, #4]
+ 8004d2c:	681b      	ldr	r3, [r3, #0]
+ 8004d2e:	4a1d      	ldr	r2, [pc, #116]	; (8004da4 <HAL_ADC_Start+0x178>)
+ 8004d30:	4293      	cmp	r3, r2
+ 8004d32:	d10e      	bne.n	8004d52 <HAL_ADC_Start+0x126>
+ 8004d34:	687b      	ldr	r3, [r7, #4]
+ 8004d36:	681b      	ldr	r3, [r3, #0]
+ 8004d38:	689b      	ldr	r3, [r3, #8]
+ 8004d3a:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
+ 8004d3e:	2b00      	cmp	r3, #0
+ 8004d40:	d107      	bne.n	8004d52 <HAL_ADC_Start+0x126>
+      {
+        /* Enable the selected ADC software conversion for regular group */
+          hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
+ 8004d42:	687b      	ldr	r3, [r7, #4]
+ 8004d44:	681b      	ldr	r3, [r3, #0]
+ 8004d46:	689a      	ldr	r2, [r3, #8]
+ 8004d48:	687b      	ldr	r3, [r7, #4]
+ 8004d4a:	681b      	ldr	r3, [r3, #0]
+ 8004d4c:	f042 4280 	orr.w	r2, r2, #1073741824	; 0x40000000
+ 8004d50:	609a      	str	r2, [r3, #8]
+      }
+
+      /* if dual mode is selected, ADC3 works independently. */
+      /* check if the mode selected is not triple */
+      if( HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI_4) )
+ 8004d52:	4b13      	ldr	r3, [pc, #76]	; (8004da0 <HAL_ADC_Start+0x174>)
+ 8004d54:	685b      	ldr	r3, [r3, #4]
+ 8004d56:	f003 0310 	and.w	r3, r3, #16
+ 8004d5a:	2b00      	cmp	r3, #0
+ 8004d5c:	d113      	bne.n	8004d86 <HAL_ADC_Start+0x15a>
+      {
+        /* if instance of handle correspond to ADC3 and no external trigger present enable software conversion of regular channels */
+        if((hadc->Instance == ADC3) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
+ 8004d5e:	687b      	ldr	r3, [r7, #4]
+ 8004d60:	681b      	ldr	r3, [r3, #0]
+ 8004d62:	4a11      	ldr	r2, [pc, #68]	; (8004da8 <HAL_ADC_Start+0x17c>)
+ 8004d64:	4293      	cmp	r3, r2
+ 8004d66:	d10e      	bne.n	8004d86 <HAL_ADC_Start+0x15a>
+ 8004d68:	687b      	ldr	r3, [r7, #4]
+ 8004d6a:	681b      	ldr	r3, [r3, #0]
+ 8004d6c:	689b      	ldr	r3, [r3, #8]
+ 8004d6e:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
+ 8004d72:	2b00      	cmp	r3, #0
+ 8004d74:	d107      	bne.n	8004d86 <HAL_ADC_Start+0x15a>
+        {
+          /* Enable the selected ADC software conversion for regular group */
+          hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
+ 8004d76:	687b      	ldr	r3, [r7, #4]
+ 8004d78:	681b      	ldr	r3, [r3, #0]
+ 8004d7a:	689a      	ldr	r2, [r3, #8]
+ 8004d7c:	687b      	ldr	r3, [r7, #4]
+ 8004d7e:	681b      	ldr	r3, [r3, #0]
+ 8004d80:	f042 4280 	orr.w	r2, r2, #1073741824	; 0x40000000
+ 8004d84:	609a      	str	r2, [r3, #8]
+      }
+    }
+  }
+  
+  /* Return function status */
+  return HAL_OK;
+ 8004d86:	2300      	movs	r3, #0
+}
+ 8004d88:	4618      	mov	r0, r3
+ 8004d8a:	3714      	adds	r7, #20
+ 8004d8c:	46bd      	mov	sp, r7
+ 8004d8e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8004d92:	4770      	bx	lr
+ 8004d94:	20000050 	.word	0x20000050
+ 8004d98:	431bde83 	.word	0x431bde83
+ 8004d9c:	fffff8fe 	.word	0xfffff8fe
+ 8004da0:	40012300 	.word	0x40012300
+ 8004da4:	40012000 	.word	0x40012000
+ 8004da8:	40012200 	.word	0x40012200
+
+08004dac <HAL_ADC_PollForConversion>:
+  *         the configuration information for the specified ADC.
+  * @param  Timeout Timeout value in millisecond.  
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
+{
+ 8004dac:	b580      	push	{r7, lr}
+ 8004dae:	b084      	sub	sp, #16
+ 8004db0:	af00      	add	r7, sp, #0
+ 8004db2:	6078      	str	r0, [r7, #4]
+ 8004db4:	6039      	str	r1, [r7, #0]
+  uint32_t tickstart = 0;
+ 8004db6:	2300      	movs	r3, #0
+ 8004db8:	60fb      	str	r3, [r7, #12]
+  /* each conversion:                                                       */
+  /* Particular case is ADC configured in DMA mode and ADC sequencer with   */
+  /* several ranks and polling for end of each conversion.                  */
+  /* For code simplicity sake, this particular case is generalized to       */
+  /* ADC configured in DMA mode and polling for end of each conversion.     */
+  if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
+ 8004dba:	687b      	ldr	r3, [r7, #4]
+ 8004dbc:	681b      	ldr	r3, [r3, #0]
+ 8004dbe:	689b      	ldr	r3, [r3, #8]
+ 8004dc0:	f403 6380 	and.w	r3, r3, #1024	; 0x400
+ 8004dc4:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
+ 8004dc8:	d113      	bne.n	8004df2 <HAL_ADC_PollForConversion+0x46>
+      HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA)    )
+ 8004dca:	687b      	ldr	r3, [r7, #4]
+ 8004dcc:	681b      	ldr	r3, [r3, #0]
+ 8004dce:	689b      	ldr	r3, [r3, #8]
+ 8004dd0:	f403 7380 	and.w	r3, r3, #256	; 0x100
+  if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
+ 8004dd4:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
+ 8004dd8:	d10b      	bne.n	8004df2 <HAL_ADC_PollForConversion+0x46>
+  {
+    /* Update ADC state machine to error */
+    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
+ 8004dda:	687b      	ldr	r3, [r7, #4]
+ 8004ddc:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004dde:	f043 0220 	orr.w	r2, r3, #32
+ 8004de2:	687b      	ldr	r3, [r7, #4]
+ 8004de4:	641a      	str	r2, [r3, #64]	; 0x40
+    
+    /* Process unlocked */
+    __HAL_UNLOCK(hadc);
+ 8004de6:	687b      	ldr	r3, [r7, #4]
+ 8004de8:	2200      	movs	r2, #0
+ 8004dea:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+    
+    return HAL_ERROR;
+ 8004dee:	2301      	movs	r3, #1
+ 8004df0:	e05c      	b.n	8004eac <HAL_ADC_PollForConversion+0x100>
+  }
+ 
+  /* Get tick */ 
+  tickstart = HAL_GetTick();
+ 8004df2:	f7ff fea9 	bl	8004b48 <HAL_GetTick>
+ 8004df6:	60f8      	str	r0, [r7, #12]
+
+  /* Check End of conversion flag */
+  while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
+ 8004df8:	e01a      	b.n	8004e30 <HAL_ADC_PollForConversion+0x84>
+  {
+    /* Check if timeout is disabled (set to infinite wait) */
+    if(Timeout != HAL_MAX_DELAY)
+ 8004dfa:	683b      	ldr	r3, [r7, #0]
+ 8004dfc:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 8004e00:	d016      	beq.n	8004e30 <HAL_ADC_PollForConversion+0x84>
+    {
+      if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
+ 8004e02:	683b      	ldr	r3, [r7, #0]
+ 8004e04:	2b00      	cmp	r3, #0
+ 8004e06:	d007      	beq.n	8004e18 <HAL_ADC_PollForConversion+0x6c>
+ 8004e08:	f7ff fe9e 	bl	8004b48 <HAL_GetTick>
+ 8004e0c:	4602      	mov	r2, r0
+ 8004e0e:	68fb      	ldr	r3, [r7, #12]
+ 8004e10:	1ad3      	subs	r3, r2, r3
+ 8004e12:	683a      	ldr	r2, [r7, #0]
+ 8004e14:	429a      	cmp	r2, r3
+ 8004e16:	d20b      	bcs.n	8004e30 <HAL_ADC_PollForConversion+0x84>
+      {
+        /* Update ADC state machine to timeout */
+        SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
+ 8004e18:	687b      	ldr	r3, [r7, #4]
+ 8004e1a:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004e1c:	f043 0204 	orr.w	r2, r3, #4
+ 8004e20:	687b      	ldr	r3, [r7, #4]
+ 8004e22:	641a      	str	r2, [r3, #64]	; 0x40
+        
+        /* Process unlocked */
+        __HAL_UNLOCK(hadc);
+ 8004e24:	687b      	ldr	r3, [r7, #4]
+ 8004e26:	2200      	movs	r2, #0
+ 8004e28:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+        
+        return HAL_TIMEOUT;
+ 8004e2c:	2303      	movs	r3, #3
+ 8004e2e:	e03d      	b.n	8004eac <HAL_ADC_PollForConversion+0x100>
+  while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
+ 8004e30:	687b      	ldr	r3, [r7, #4]
+ 8004e32:	681b      	ldr	r3, [r3, #0]
+ 8004e34:	681b      	ldr	r3, [r3, #0]
+ 8004e36:	f003 0302 	and.w	r3, r3, #2
+ 8004e3a:	2b02      	cmp	r3, #2
+ 8004e3c:	d1dd      	bne.n	8004dfa <HAL_ADC_PollForConversion+0x4e>
+      }
+    }
+  }
+  
+  /* Clear regular group conversion flag */
+  __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
+ 8004e3e:	687b      	ldr	r3, [r7, #4]
+ 8004e40:	681b      	ldr	r3, [r3, #0]
+ 8004e42:	f06f 0212 	mvn.w	r2, #18
+ 8004e46:	601a      	str	r2, [r3, #0]
+  
+  /* Update ADC state machine */
+  SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
+ 8004e48:	687b      	ldr	r3, [r7, #4]
+ 8004e4a:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004e4c:	f443 7200 	orr.w	r2, r3, #512	; 0x200
+ 8004e50:	687b      	ldr	r3, [r7, #4]
+ 8004e52:	641a      	str	r2, [r3, #64]	; 0x40
+  /* by external trigger, continuous mode or scan sequence on going.          */
+  /* Note: On STM32F7, there is no independent flag of end of sequence.       */
+  /*       The test of scan sequence on going is done either with scan        */
+  /*       sequence disabled or with end of conversion flag set to            */
+  /*       of end of sequence.                                                */
+  if(ADC_IS_SOFTWARE_START_REGULAR(hadc)                   &&
+ 8004e54:	687b      	ldr	r3, [r7, #4]
+ 8004e56:	681b      	ldr	r3, [r3, #0]
+ 8004e58:	689b      	ldr	r3, [r3, #8]
+ 8004e5a:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
+ 8004e5e:	2b00      	cmp	r3, #0
+ 8004e60:	d123      	bne.n	8004eaa <HAL_ADC_PollForConversion+0xfe>
+     (hadc->Init.ContinuousConvMode == DISABLE)            &&
+ 8004e62:	687b      	ldr	r3, [r7, #4]
+ 8004e64:	699b      	ldr	r3, [r3, #24]
+  if(ADC_IS_SOFTWARE_START_REGULAR(hadc)                   &&
+ 8004e66:	2b00      	cmp	r3, #0
+ 8004e68:	d11f      	bne.n	8004eaa <HAL_ADC_PollForConversion+0xfe>
+     (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
+ 8004e6a:	687b      	ldr	r3, [r7, #4]
+ 8004e6c:	681b      	ldr	r3, [r3, #0]
+ 8004e6e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8004e70:	f403 0370 	and.w	r3, r3, #15728640	; 0xf00000
+     (hadc->Init.ContinuousConvMode == DISABLE)            &&
+ 8004e74:	2b00      	cmp	r3, #0
+ 8004e76:	d006      	beq.n	8004e86 <HAL_ADC_PollForConversion+0xda>
+      HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)  )   )
+ 8004e78:	687b      	ldr	r3, [r7, #4]
+ 8004e7a:	681b      	ldr	r3, [r3, #0]
+ 8004e7c:	689b      	ldr	r3, [r3, #8]
+ 8004e7e:	f403 6380 	and.w	r3, r3, #1024	; 0x400
+     (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
+ 8004e82:	2b00      	cmp	r3, #0
+ 8004e84:	d111      	bne.n	8004eaa <HAL_ADC_PollForConversion+0xfe>
+  {
+    /* Set ADC state */
+    CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);   
+ 8004e86:	687b      	ldr	r3, [r7, #4]
+ 8004e88:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004e8a:	f423 7280 	bic.w	r2, r3, #256	; 0x100
+ 8004e8e:	687b      	ldr	r3, [r7, #4]
+ 8004e90:	641a      	str	r2, [r3, #64]	; 0x40
+    
+    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
+ 8004e92:	687b      	ldr	r3, [r7, #4]
+ 8004e94:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004e96:	f403 5380 	and.w	r3, r3, #4096	; 0x1000
+ 8004e9a:	2b00      	cmp	r3, #0
+ 8004e9c:	d105      	bne.n	8004eaa <HAL_ADC_PollForConversion+0xfe>
+    { 
+      SET_BIT(hadc->State, HAL_ADC_STATE_READY);
+ 8004e9e:	687b      	ldr	r3, [r7, #4]
+ 8004ea0:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004ea2:	f043 0201 	orr.w	r2, r3, #1
+ 8004ea6:	687b      	ldr	r3, [r7, #4]
+ 8004ea8:	641a      	str	r2, [r3, #64]	; 0x40
+    }
+  }
+  
+  /* Return ADC state */
+  return HAL_OK;
+ 8004eaa:	2300      	movs	r3, #0
+}
+ 8004eac:	4618      	mov	r0, r3
+ 8004eae:	3710      	adds	r7, #16
+ 8004eb0:	46bd      	mov	sp, r7
+ 8004eb2:	bd80      	pop	{r7, pc}
+
+08004eb4 <HAL_ADC_GetValue>:
+  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
+  *         the configuration information for the specified ADC.
+  * @retval Converted value
+  */
+uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
+{       
+ 8004eb4:	b480      	push	{r7}
+ 8004eb6:	b083      	sub	sp, #12
+ 8004eb8:	af00      	add	r7, sp, #0
+ 8004eba:	6078      	str	r0, [r7, #4]
+  /* Return the selected ADC converted value */ 
+  return hadc->Instance->DR;
+ 8004ebc:	687b      	ldr	r3, [r7, #4]
+ 8004ebe:	681b      	ldr	r3, [r3, #0]
+ 8004ec0:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+}
+ 8004ec2:	4618      	mov	r0, r3
+ 8004ec4:	370c      	adds	r7, #12
+ 8004ec6:	46bd      	mov	sp, r7
+ 8004ec8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8004ecc:	4770      	bx	lr
+	...
+
+08004ed0 <HAL_ADC_ConfigChannel>:
+  *         the configuration information for the specified ADC.
+  * @param  sConfig ADC configuration structure. 
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
+{
+ 8004ed0:	b480      	push	{r7}
+ 8004ed2:	b085      	sub	sp, #20
+ 8004ed4:	af00      	add	r7, sp, #0
+ 8004ed6:	6078      	str	r0, [r7, #4]
+ 8004ed8:	6039      	str	r1, [r7, #0]
+  __IO uint32_t counter = 0;
+ 8004eda:	2300      	movs	r3, #0
+ 8004edc:	60fb      	str	r3, [r7, #12]
+  assert_param(IS_ADC_CHANNEL(sConfig->Channel));
+  assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
+  assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
+  
+  /* Process locked */
+  __HAL_LOCK(hadc);
+ 8004ede:	687b      	ldr	r3, [r7, #4]
+ 8004ee0:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
+ 8004ee4:	2b01      	cmp	r3, #1
+ 8004ee6:	d101      	bne.n	8004eec <HAL_ADC_ConfigChannel+0x1c>
+ 8004ee8:	2302      	movs	r3, #2
+ 8004eea:	e12a      	b.n	8005142 <HAL_ADC_ConfigChannel+0x272>
+ 8004eec:	687b      	ldr	r3, [r7, #4]
+ 8004eee:	2201      	movs	r2, #1
+ 8004ef0:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+  
+  /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
+  if ((sConfig->Channel > ADC_CHANNEL_9) && (sConfig->Channel != ADC_INTERNAL_NONE))
+ 8004ef4:	683b      	ldr	r3, [r7, #0]
+ 8004ef6:	681b      	ldr	r3, [r3, #0]
+ 8004ef8:	2b09      	cmp	r3, #9
+ 8004efa:	d93a      	bls.n	8004f72 <HAL_ADC_ConfigChannel+0xa2>
+ 8004efc:	683b      	ldr	r3, [r7, #0]
+ 8004efe:	681b      	ldr	r3, [r3, #0]
+ 8004f00:	f1b3 4f00 	cmp.w	r3, #2147483648	; 0x80000000
+ 8004f04:	d035      	beq.n	8004f72 <HAL_ADC_ConfigChannel+0xa2>
+  {
+    /* Clear the old sample time */
+    hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
+ 8004f06:	687b      	ldr	r3, [r7, #4]
+ 8004f08:	681b      	ldr	r3, [r3, #0]
+ 8004f0a:	68d9      	ldr	r1, [r3, #12]
+ 8004f0c:	683b      	ldr	r3, [r7, #0]
+ 8004f0e:	681b      	ldr	r3, [r3, #0]
+ 8004f10:	b29b      	uxth	r3, r3
+ 8004f12:	461a      	mov	r2, r3
+ 8004f14:	4613      	mov	r3, r2
+ 8004f16:	005b      	lsls	r3, r3, #1
+ 8004f18:	4413      	add	r3, r2
+ 8004f1a:	3b1e      	subs	r3, #30
+ 8004f1c:	2207      	movs	r2, #7
+ 8004f1e:	fa02 f303 	lsl.w	r3, r2, r3
+ 8004f22:	43da      	mvns	r2, r3
+ 8004f24:	687b      	ldr	r3, [r7, #4]
+ 8004f26:	681b      	ldr	r3, [r3, #0]
+ 8004f28:	400a      	ands	r2, r1
+ 8004f2a:	60da      	str	r2, [r3, #12]
+
+    if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
+ 8004f2c:	683b      	ldr	r3, [r7, #0]
+ 8004f2e:	681b      	ldr	r3, [r3, #0]
+ 8004f30:	4a87      	ldr	r2, [pc, #540]	; (8005150 <HAL_ADC_ConfigChannel+0x280>)
+ 8004f32:	4293      	cmp	r3, r2
+ 8004f34:	d10a      	bne.n	8004f4c <HAL_ADC_ConfigChannel+0x7c>
+    {
+      /* Set the new sample time */
+      hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, ADC_CHANNEL_18);
+ 8004f36:	687b      	ldr	r3, [r7, #4]
+ 8004f38:	681b      	ldr	r3, [r3, #0]
+ 8004f3a:	68d9      	ldr	r1, [r3, #12]
+ 8004f3c:	683b      	ldr	r3, [r7, #0]
+ 8004f3e:	689b      	ldr	r3, [r3, #8]
+ 8004f40:	061a      	lsls	r2, r3, #24
+ 8004f42:	687b      	ldr	r3, [r7, #4]
+ 8004f44:	681b      	ldr	r3, [r3, #0]
+ 8004f46:	430a      	orrs	r2, r1
+ 8004f48:	60da      	str	r2, [r3, #12]
+    if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
+ 8004f4a:	e035      	b.n	8004fb8 <HAL_ADC_ConfigChannel+0xe8>
+    }
+    else
+    {
+      /* Set the new sample time */
+      hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
+ 8004f4c:	687b      	ldr	r3, [r7, #4]
+ 8004f4e:	681b      	ldr	r3, [r3, #0]
+ 8004f50:	68d9      	ldr	r1, [r3, #12]
+ 8004f52:	683b      	ldr	r3, [r7, #0]
+ 8004f54:	689a      	ldr	r2, [r3, #8]
+ 8004f56:	683b      	ldr	r3, [r7, #0]
+ 8004f58:	681b      	ldr	r3, [r3, #0]
+ 8004f5a:	b29b      	uxth	r3, r3
+ 8004f5c:	4618      	mov	r0, r3
+ 8004f5e:	4603      	mov	r3, r0
+ 8004f60:	005b      	lsls	r3, r3, #1
+ 8004f62:	4403      	add	r3, r0
+ 8004f64:	3b1e      	subs	r3, #30
+ 8004f66:	409a      	lsls	r2, r3
+ 8004f68:	687b      	ldr	r3, [r7, #4]
+ 8004f6a:	681b      	ldr	r3, [r3, #0]
+ 8004f6c:	430a      	orrs	r2, r1
+ 8004f6e:	60da      	str	r2, [r3, #12]
+    if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
+ 8004f70:	e022      	b.n	8004fb8 <HAL_ADC_ConfigChannel+0xe8>
+    }
+  }
+  else /* ADC_Channel include in ADC_Channel_[0..9] */
+  {
+    /* Clear the old sample time */
+    hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
+ 8004f72:	687b      	ldr	r3, [r7, #4]
+ 8004f74:	681b      	ldr	r3, [r3, #0]
+ 8004f76:	6919      	ldr	r1, [r3, #16]
+ 8004f78:	683b      	ldr	r3, [r7, #0]
+ 8004f7a:	681b      	ldr	r3, [r3, #0]
+ 8004f7c:	b29b      	uxth	r3, r3
+ 8004f7e:	461a      	mov	r2, r3
+ 8004f80:	4613      	mov	r3, r2
+ 8004f82:	005b      	lsls	r3, r3, #1
+ 8004f84:	4413      	add	r3, r2
+ 8004f86:	2207      	movs	r2, #7
+ 8004f88:	fa02 f303 	lsl.w	r3, r2, r3
+ 8004f8c:	43da      	mvns	r2, r3
+ 8004f8e:	687b      	ldr	r3, [r7, #4]
+ 8004f90:	681b      	ldr	r3, [r3, #0]
+ 8004f92:	400a      	ands	r2, r1
+ 8004f94:	611a      	str	r2, [r3, #16]
+    
+    /* Set the new sample time */
+    hadc->Instance->SMPR2 |= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
+ 8004f96:	687b      	ldr	r3, [r7, #4]
+ 8004f98:	681b      	ldr	r3, [r3, #0]
+ 8004f9a:	6919      	ldr	r1, [r3, #16]
+ 8004f9c:	683b      	ldr	r3, [r7, #0]
+ 8004f9e:	689a      	ldr	r2, [r3, #8]
+ 8004fa0:	683b      	ldr	r3, [r7, #0]
+ 8004fa2:	681b      	ldr	r3, [r3, #0]
+ 8004fa4:	b29b      	uxth	r3, r3
+ 8004fa6:	4618      	mov	r0, r3
+ 8004fa8:	4603      	mov	r3, r0
+ 8004faa:	005b      	lsls	r3, r3, #1
+ 8004fac:	4403      	add	r3, r0
+ 8004fae:	409a      	lsls	r2, r3
+ 8004fb0:	687b      	ldr	r3, [r7, #4]
+ 8004fb2:	681b      	ldr	r3, [r3, #0]
+ 8004fb4:	430a      	orrs	r2, r1
+ 8004fb6:	611a      	str	r2, [r3, #16]
+  }
+  
+  /* For Rank 1 to 6 */
+  if (sConfig->Rank < 7)
+ 8004fb8:	683b      	ldr	r3, [r7, #0]
+ 8004fba:	685b      	ldr	r3, [r3, #4]
+ 8004fbc:	2b06      	cmp	r3, #6
+ 8004fbe:	d824      	bhi.n	800500a <HAL_ADC_ConfigChannel+0x13a>
+  {
+    /* Clear the old SQx bits for the selected rank */
+    hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
+ 8004fc0:	687b      	ldr	r3, [r7, #4]
+ 8004fc2:	681b      	ldr	r3, [r3, #0]
+ 8004fc4:	6b59      	ldr	r1, [r3, #52]	; 0x34
+ 8004fc6:	683b      	ldr	r3, [r7, #0]
+ 8004fc8:	685a      	ldr	r2, [r3, #4]
+ 8004fca:	4613      	mov	r3, r2
+ 8004fcc:	009b      	lsls	r3, r3, #2
+ 8004fce:	4413      	add	r3, r2
+ 8004fd0:	3b05      	subs	r3, #5
+ 8004fd2:	221f      	movs	r2, #31
+ 8004fd4:	fa02 f303 	lsl.w	r3, r2, r3
+ 8004fd8:	43da      	mvns	r2, r3
+ 8004fda:	687b      	ldr	r3, [r7, #4]
+ 8004fdc:	681b      	ldr	r3, [r3, #0]
+ 8004fde:	400a      	ands	r2, r1
+ 8004fe0:	635a      	str	r2, [r3, #52]	; 0x34
+    
+    /* Set the SQx bits for the selected rank */
+    hadc->Instance->SQR3 |= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
+ 8004fe2:	687b      	ldr	r3, [r7, #4]
+ 8004fe4:	681b      	ldr	r3, [r3, #0]
+ 8004fe6:	6b59      	ldr	r1, [r3, #52]	; 0x34
+ 8004fe8:	683b      	ldr	r3, [r7, #0]
+ 8004fea:	681b      	ldr	r3, [r3, #0]
+ 8004fec:	b29b      	uxth	r3, r3
+ 8004fee:	4618      	mov	r0, r3
+ 8004ff0:	683b      	ldr	r3, [r7, #0]
+ 8004ff2:	685a      	ldr	r2, [r3, #4]
+ 8004ff4:	4613      	mov	r3, r2
+ 8004ff6:	009b      	lsls	r3, r3, #2
+ 8004ff8:	4413      	add	r3, r2
+ 8004ffa:	3b05      	subs	r3, #5
+ 8004ffc:	fa00 f203 	lsl.w	r2, r0, r3
+ 8005000:	687b      	ldr	r3, [r7, #4]
+ 8005002:	681b      	ldr	r3, [r3, #0]
+ 8005004:	430a      	orrs	r2, r1
+ 8005006:	635a      	str	r2, [r3, #52]	; 0x34
+ 8005008:	e04c      	b.n	80050a4 <HAL_ADC_ConfigChannel+0x1d4>
+  }
+  /* For Rank 7 to 12 */
+  else if (sConfig->Rank < 13)
+ 800500a:	683b      	ldr	r3, [r7, #0]
+ 800500c:	685b      	ldr	r3, [r3, #4]
+ 800500e:	2b0c      	cmp	r3, #12
+ 8005010:	d824      	bhi.n	800505c <HAL_ADC_ConfigChannel+0x18c>
+  {
+    /* Clear the old SQx bits for the selected rank */
+    hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
+ 8005012:	687b      	ldr	r3, [r7, #4]
+ 8005014:	681b      	ldr	r3, [r3, #0]
+ 8005016:	6b19      	ldr	r1, [r3, #48]	; 0x30
+ 8005018:	683b      	ldr	r3, [r7, #0]
+ 800501a:	685a      	ldr	r2, [r3, #4]
+ 800501c:	4613      	mov	r3, r2
+ 800501e:	009b      	lsls	r3, r3, #2
+ 8005020:	4413      	add	r3, r2
+ 8005022:	3b23      	subs	r3, #35	; 0x23
+ 8005024:	221f      	movs	r2, #31
+ 8005026:	fa02 f303 	lsl.w	r3, r2, r3
+ 800502a:	43da      	mvns	r2, r3
+ 800502c:	687b      	ldr	r3, [r7, #4]
+ 800502e:	681b      	ldr	r3, [r3, #0]
+ 8005030:	400a      	ands	r2, r1
+ 8005032:	631a      	str	r2, [r3, #48]	; 0x30
+    
+    /* Set the SQx bits for the selected rank */
+    hadc->Instance->SQR2 |= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
+ 8005034:	687b      	ldr	r3, [r7, #4]
+ 8005036:	681b      	ldr	r3, [r3, #0]
+ 8005038:	6b19      	ldr	r1, [r3, #48]	; 0x30
+ 800503a:	683b      	ldr	r3, [r7, #0]
+ 800503c:	681b      	ldr	r3, [r3, #0]
+ 800503e:	b29b      	uxth	r3, r3
+ 8005040:	4618      	mov	r0, r3
+ 8005042:	683b      	ldr	r3, [r7, #0]
+ 8005044:	685a      	ldr	r2, [r3, #4]
+ 8005046:	4613      	mov	r3, r2
+ 8005048:	009b      	lsls	r3, r3, #2
+ 800504a:	4413      	add	r3, r2
+ 800504c:	3b23      	subs	r3, #35	; 0x23
+ 800504e:	fa00 f203 	lsl.w	r2, r0, r3
+ 8005052:	687b      	ldr	r3, [r7, #4]
+ 8005054:	681b      	ldr	r3, [r3, #0]
+ 8005056:	430a      	orrs	r2, r1
+ 8005058:	631a      	str	r2, [r3, #48]	; 0x30
+ 800505a:	e023      	b.n	80050a4 <HAL_ADC_ConfigChannel+0x1d4>
+  }
+  /* For Rank 13 to 16 */
+  else
+  {
+    /* Clear the old SQx bits for the selected rank */
+    hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
+ 800505c:	687b      	ldr	r3, [r7, #4]
+ 800505e:	681b      	ldr	r3, [r3, #0]
+ 8005060:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
+ 8005062:	683b      	ldr	r3, [r7, #0]
+ 8005064:	685a      	ldr	r2, [r3, #4]
+ 8005066:	4613      	mov	r3, r2
+ 8005068:	009b      	lsls	r3, r3, #2
+ 800506a:	4413      	add	r3, r2
+ 800506c:	3b41      	subs	r3, #65	; 0x41
+ 800506e:	221f      	movs	r2, #31
+ 8005070:	fa02 f303 	lsl.w	r3, r2, r3
+ 8005074:	43da      	mvns	r2, r3
+ 8005076:	687b      	ldr	r3, [r7, #4]
+ 8005078:	681b      	ldr	r3, [r3, #0]
+ 800507a:	400a      	ands	r2, r1
+ 800507c:	62da      	str	r2, [r3, #44]	; 0x2c
+    
+    /* Set the SQx bits for the selected rank */
+    hadc->Instance->SQR1 |= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
+ 800507e:	687b      	ldr	r3, [r7, #4]
+ 8005080:	681b      	ldr	r3, [r3, #0]
+ 8005082:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
+ 8005084:	683b      	ldr	r3, [r7, #0]
+ 8005086:	681b      	ldr	r3, [r3, #0]
+ 8005088:	b29b      	uxth	r3, r3
+ 800508a:	4618      	mov	r0, r3
+ 800508c:	683b      	ldr	r3, [r7, #0]
+ 800508e:	685a      	ldr	r2, [r3, #4]
+ 8005090:	4613      	mov	r3, r2
+ 8005092:	009b      	lsls	r3, r3, #2
+ 8005094:	4413      	add	r3, r2
+ 8005096:	3b41      	subs	r3, #65	; 0x41
+ 8005098:	fa00 f203 	lsl.w	r2, r0, r3
+ 800509c:	687b      	ldr	r3, [r7, #4]
+ 800509e:	681b      	ldr	r3, [r3, #0]
+ 80050a0:	430a      	orrs	r2, r1
+ 80050a2:	62da      	str	r2, [r3, #44]	; 0x2c
+  }
+  
+  /* if no internal channel selected */
+  if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_INTERNAL_NONE))
+ 80050a4:	687b      	ldr	r3, [r7, #4]
+ 80050a6:	681b      	ldr	r3, [r3, #0]
+ 80050a8:	4a2a      	ldr	r2, [pc, #168]	; (8005154 <HAL_ADC_ConfigChannel+0x284>)
+ 80050aa:	4293      	cmp	r3, r2
+ 80050ac:	d10a      	bne.n	80050c4 <HAL_ADC_ConfigChannel+0x1f4>
+ 80050ae:	683b      	ldr	r3, [r7, #0]
+ 80050b0:	681b      	ldr	r3, [r3, #0]
+ 80050b2:	f1b3 4f00 	cmp.w	r3, #2147483648	; 0x80000000
+ 80050b6:	d105      	bne.n	80050c4 <HAL_ADC_ConfigChannel+0x1f4>
+  {
+    /* Disable the VBAT & TSVREFE channel*/
+    ADC->CCR &= ~(ADC_CCR_VBATE | ADC_CCR_TSVREFE);
+ 80050b8:	4b27      	ldr	r3, [pc, #156]	; (8005158 <HAL_ADC_ConfigChannel+0x288>)
+ 80050ba:	685b      	ldr	r3, [r3, #4]
+ 80050bc:	4a26      	ldr	r2, [pc, #152]	; (8005158 <HAL_ADC_ConfigChannel+0x288>)
+ 80050be:	f423 0340 	bic.w	r3, r3, #12582912	; 0xc00000
+ 80050c2:	6053      	str	r3, [r2, #4]
+  }
+
+  /* if ADC1 Channel_18 is selected enable VBAT Channel */
+  if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT))
+ 80050c4:	687b      	ldr	r3, [r7, #4]
+ 80050c6:	681b      	ldr	r3, [r3, #0]
+ 80050c8:	4a22      	ldr	r2, [pc, #136]	; (8005154 <HAL_ADC_ConfigChannel+0x284>)
+ 80050ca:	4293      	cmp	r3, r2
+ 80050cc:	d109      	bne.n	80050e2 <HAL_ADC_ConfigChannel+0x212>
+ 80050ce:	683b      	ldr	r3, [r7, #0]
+ 80050d0:	681b      	ldr	r3, [r3, #0]
+ 80050d2:	2b12      	cmp	r3, #18
+ 80050d4:	d105      	bne.n	80050e2 <HAL_ADC_ConfigChannel+0x212>
+  {
+    /* Enable the VBAT channel*/
+    ADC->CCR |= ADC_CCR_VBATE;
+ 80050d6:	4b20      	ldr	r3, [pc, #128]	; (8005158 <HAL_ADC_ConfigChannel+0x288>)
+ 80050d8:	685b      	ldr	r3, [r3, #4]
+ 80050da:	4a1f      	ldr	r2, [pc, #124]	; (8005158 <HAL_ADC_ConfigChannel+0x288>)
+ 80050dc:	f443 0380 	orr.w	r3, r3, #4194304	; 0x400000
+ 80050e0:	6053      	str	r3, [r2, #4]
+  }
+  
+  /* if ADC1 Channel_18 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
+  if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT)))
+ 80050e2:	687b      	ldr	r3, [r7, #4]
+ 80050e4:	681b      	ldr	r3, [r3, #0]
+ 80050e6:	4a1b      	ldr	r2, [pc, #108]	; (8005154 <HAL_ADC_ConfigChannel+0x284>)
+ 80050e8:	4293      	cmp	r3, r2
+ 80050ea:	d125      	bne.n	8005138 <HAL_ADC_ConfigChannel+0x268>
+ 80050ec:	683b      	ldr	r3, [r7, #0]
+ 80050ee:	681b      	ldr	r3, [r3, #0]
+ 80050f0:	4a17      	ldr	r2, [pc, #92]	; (8005150 <HAL_ADC_ConfigChannel+0x280>)
+ 80050f2:	4293      	cmp	r3, r2
+ 80050f4:	d003      	beq.n	80050fe <HAL_ADC_ConfigChannel+0x22e>
+ 80050f6:	683b      	ldr	r3, [r7, #0]
+ 80050f8:	681b      	ldr	r3, [r3, #0]
+ 80050fa:	2b11      	cmp	r3, #17
+ 80050fc:	d11c      	bne.n	8005138 <HAL_ADC_ConfigChannel+0x268>
+  {
+    /* Enable the TSVREFE channel*/
+    ADC->CCR |= ADC_CCR_TSVREFE;
+ 80050fe:	4b16      	ldr	r3, [pc, #88]	; (8005158 <HAL_ADC_ConfigChannel+0x288>)
+ 8005100:	685b      	ldr	r3, [r3, #4]
+ 8005102:	4a15      	ldr	r2, [pc, #84]	; (8005158 <HAL_ADC_ConfigChannel+0x288>)
+ 8005104:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
+ 8005108:	6053      	str	r3, [r2, #4]
+
+    if(sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
+ 800510a:	683b      	ldr	r3, [r7, #0]
+ 800510c:	681b      	ldr	r3, [r3, #0]
+ 800510e:	4a10      	ldr	r2, [pc, #64]	; (8005150 <HAL_ADC_ConfigChannel+0x280>)
+ 8005110:	4293      	cmp	r3, r2
+ 8005112:	d111      	bne.n	8005138 <HAL_ADC_ConfigChannel+0x268>
+    {
+      /* Delay for temperature sensor stabilization time */
+      /* Compute number of CPU cycles to wait for */
+      counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
+ 8005114:	4b11      	ldr	r3, [pc, #68]	; (800515c <HAL_ADC_ConfigChannel+0x28c>)
+ 8005116:	681b      	ldr	r3, [r3, #0]
+ 8005118:	4a11      	ldr	r2, [pc, #68]	; (8005160 <HAL_ADC_ConfigChannel+0x290>)
+ 800511a:	fba2 2303 	umull	r2, r3, r2, r3
+ 800511e:	0c9a      	lsrs	r2, r3, #18
+ 8005120:	4613      	mov	r3, r2
+ 8005122:	009b      	lsls	r3, r3, #2
+ 8005124:	4413      	add	r3, r2
+ 8005126:	005b      	lsls	r3, r3, #1
+ 8005128:	60fb      	str	r3, [r7, #12]
+      while(counter != 0)
+ 800512a:	e002      	b.n	8005132 <HAL_ADC_ConfigChannel+0x262>
+      {
+        counter--;
+ 800512c:	68fb      	ldr	r3, [r7, #12]
+ 800512e:	3b01      	subs	r3, #1
+ 8005130:	60fb      	str	r3, [r7, #12]
+      while(counter != 0)
+ 8005132:	68fb      	ldr	r3, [r7, #12]
+ 8005134:	2b00      	cmp	r3, #0
+ 8005136:	d1f9      	bne.n	800512c <HAL_ADC_ConfigChannel+0x25c>
+      }
+    }
+  }
+  
+  /* Process unlocked */
+  __HAL_UNLOCK(hadc);
+ 8005138:	687b      	ldr	r3, [r7, #4]
+ 800513a:	2200      	movs	r2, #0
+ 800513c:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+  
+  /* Return function status */
+  return HAL_OK;
+ 8005140:	2300      	movs	r3, #0
+}
+ 8005142:	4618      	mov	r0, r3
+ 8005144:	3714      	adds	r7, #20
+ 8005146:	46bd      	mov	sp, r7
+ 8005148:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800514c:	4770      	bx	lr
+ 800514e:	bf00      	nop
+ 8005150:	10000012 	.word	0x10000012
+ 8005154:	40012000 	.word	0x40012000
+ 8005158:	40012300 	.word	0x40012300
+ 800515c:	20000050 	.word	0x20000050
+ 8005160:	431bde83 	.word	0x431bde83
+
+08005164 <ADC_Init>:
+  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
+  *         the configuration information for the specified ADC.  
+  * @retval None
+  */
+static void ADC_Init(ADC_HandleTypeDef* hadc)
+{
+ 8005164:	b480      	push	{r7}
+ 8005166:	b083      	sub	sp, #12
+ 8005168:	af00      	add	r7, sp, #0
+ 800516a:	6078      	str	r0, [r7, #4]
+  /* Set ADC parameters */
+  /* Set the ADC clock prescaler */
+  ADC->CCR &= ~(ADC_CCR_ADCPRE);
+ 800516c:	4b78      	ldr	r3, [pc, #480]	; (8005350 <ADC_Init+0x1ec>)
+ 800516e:	685b      	ldr	r3, [r3, #4]
+ 8005170:	4a77      	ldr	r2, [pc, #476]	; (8005350 <ADC_Init+0x1ec>)
+ 8005172:	f423 3340 	bic.w	r3, r3, #196608	; 0x30000
+ 8005176:	6053      	str	r3, [r2, #4]
+  ADC->CCR |=  hadc->Init.ClockPrescaler;
+ 8005178:	4b75      	ldr	r3, [pc, #468]	; (8005350 <ADC_Init+0x1ec>)
+ 800517a:	685a      	ldr	r2, [r3, #4]
+ 800517c:	687b      	ldr	r3, [r7, #4]
+ 800517e:	685b      	ldr	r3, [r3, #4]
+ 8005180:	4973      	ldr	r1, [pc, #460]	; (8005350 <ADC_Init+0x1ec>)
+ 8005182:	4313      	orrs	r3, r2
+ 8005184:	604b      	str	r3, [r1, #4]
+  
+  /* Set ADC scan mode */
+  hadc->Instance->CR1 &= ~(ADC_CR1_SCAN);
+ 8005186:	687b      	ldr	r3, [r7, #4]
+ 8005188:	681b      	ldr	r3, [r3, #0]
+ 800518a:	685a      	ldr	r2, [r3, #4]
+ 800518c:	687b      	ldr	r3, [r7, #4]
+ 800518e:	681b      	ldr	r3, [r3, #0]
+ 8005190:	f422 7280 	bic.w	r2, r2, #256	; 0x100
+ 8005194:	605a      	str	r2, [r3, #4]
+  hadc->Instance->CR1 |=  ADC_CR1_SCANCONV(hadc->Init.ScanConvMode);
+ 8005196:	687b      	ldr	r3, [r7, #4]
+ 8005198:	681b      	ldr	r3, [r3, #0]
+ 800519a:	6859      	ldr	r1, [r3, #4]
+ 800519c:	687b      	ldr	r3, [r7, #4]
+ 800519e:	691b      	ldr	r3, [r3, #16]
+ 80051a0:	021a      	lsls	r2, r3, #8
+ 80051a2:	687b      	ldr	r3, [r7, #4]
+ 80051a4:	681b      	ldr	r3, [r3, #0]
+ 80051a6:	430a      	orrs	r2, r1
+ 80051a8:	605a      	str	r2, [r3, #4]
+  
+  /* Set ADC resolution */
+  hadc->Instance->CR1 &= ~(ADC_CR1_RES);
+ 80051aa:	687b      	ldr	r3, [r7, #4]
+ 80051ac:	681b      	ldr	r3, [r3, #0]
+ 80051ae:	685a      	ldr	r2, [r3, #4]
+ 80051b0:	687b      	ldr	r3, [r7, #4]
+ 80051b2:	681b      	ldr	r3, [r3, #0]
+ 80051b4:	f022 7240 	bic.w	r2, r2, #50331648	; 0x3000000
+ 80051b8:	605a      	str	r2, [r3, #4]
+  hadc->Instance->CR1 |=  hadc->Init.Resolution;
+ 80051ba:	687b      	ldr	r3, [r7, #4]
+ 80051bc:	681b      	ldr	r3, [r3, #0]
+ 80051be:	6859      	ldr	r1, [r3, #4]
+ 80051c0:	687b      	ldr	r3, [r7, #4]
+ 80051c2:	689a      	ldr	r2, [r3, #8]
+ 80051c4:	687b      	ldr	r3, [r7, #4]
+ 80051c6:	681b      	ldr	r3, [r3, #0]
+ 80051c8:	430a      	orrs	r2, r1
+ 80051ca:	605a      	str	r2, [r3, #4]
+  
+  /* Set ADC data alignment */
+  hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN);
+ 80051cc:	687b      	ldr	r3, [r7, #4]
+ 80051ce:	681b      	ldr	r3, [r3, #0]
+ 80051d0:	689a      	ldr	r2, [r3, #8]
+ 80051d2:	687b      	ldr	r3, [r7, #4]
+ 80051d4:	681b      	ldr	r3, [r3, #0]
+ 80051d6:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
+ 80051da:	609a      	str	r2, [r3, #8]
+  hadc->Instance->CR2 |= hadc->Init.DataAlign;
+ 80051dc:	687b      	ldr	r3, [r7, #4]
+ 80051de:	681b      	ldr	r3, [r3, #0]
+ 80051e0:	6899      	ldr	r1, [r3, #8]
+ 80051e2:	687b      	ldr	r3, [r7, #4]
+ 80051e4:	68da      	ldr	r2, [r3, #12]
+ 80051e6:	687b      	ldr	r3, [r7, #4]
+ 80051e8:	681b      	ldr	r3, [r3, #0]
+ 80051ea:	430a      	orrs	r2, r1
+ 80051ec:	609a      	str	r2, [r3, #8]
+  /* Enable external trigger if trigger selection is different of software  */
+  /* start.                                                                 */
+  /* Note: This configuration keeps the hardware feature of parameter       */
+  /*       ExternalTrigConvEdge "trigger edge none" equivalent to           */
+  /*       software start.                                                  */
+  if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
+ 80051ee:	687b      	ldr	r3, [r7, #4]
+ 80051f0:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 80051f2:	4a58      	ldr	r2, [pc, #352]	; (8005354 <ADC_Init+0x1f0>)
+ 80051f4:	4293      	cmp	r3, r2
+ 80051f6:	d022      	beq.n	800523e <ADC_Init+0xda>
+  {
+    /* Select external trigger to start conversion */
+    hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
+ 80051f8:	687b      	ldr	r3, [r7, #4]
+ 80051fa:	681b      	ldr	r3, [r3, #0]
+ 80051fc:	689a      	ldr	r2, [r3, #8]
+ 80051fe:	687b      	ldr	r3, [r7, #4]
+ 8005200:	681b      	ldr	r3, [r3, #0]
+ 8005202:	f022 6270 	bic.w	r2, r2, #251658240	; 0xf000000
+ 8005206:	609a      	str	r2, [r3, #8]
+    hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv;
+ 8005208:	687b      	ldr	r3, [r7, #4]
+ 800520a:	681b      	ldr	r3, [r3, #0]
+ 800520c:	6899      	ldr	r1, [r3, #8]
+ 800520e:	687b      	ldr	r3, [r7, #4]
+ 8005210:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 8005212:	687b      	ldr	r3, [r7, #4]
+ 8005214:	681b      	ldr	r3, [r3, #0]
+ 8005216:	430a      	orrs	r2, r1
+ 8005218:	609a      	str	r2, [r3, #8]
+    
+    /* Select external trigger polarity */
+    hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
+ 800521a:	687b      	ldr	r3, [r7, #4]
+ 800521c:	681b      	ldr	r3, [r3, #0]
+ 800521e:	689a      	ldr	r2, [r3, #8]
+ 8005220:	687b      	ldr	r3, [r7, #4]
+ 8005222:	681b      	ldr	r3, [r3, #0]
+ 8005224:	f022 5240 	bic.w	r2, r2, #805306368	; 0x30000000
+ 8005228:	609a      	str	r2, [r3, #8]
+    hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge;
+ 800522a:	687b      	ldr	r3, [r7, #4]
+ 800522c:	681b      	ldr	r3, [r3, #0]
+ 800522e:	6899      	ldr	r1, [r3, #8]
+ 8005230:	687b      	ldr	r3, [r7, #4]
+ 8005232:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8005234:	687b      	ldr	r3, [r7, #4]
+ 8005236:	681b      	ldr	r3, [r3, #0]
+ 8005238:	430a      	orrs	r2, r1
+ 800523a:	609a      	str	r2, [r3, #8]
+ 800523c:	e00f      	b.n	800525e <ADC_Init+0xfa>
+  }
+  else
+  {
+    /* Reset the external trigger */
+    hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
+ 800523e:	687b      	ldr	r3, [r7, #4]
+ 8005240:	681b      	ldr	r3, [r3, #0]
+ 8005242:	689a      	ldr	r2, [r3, #8]
+ 8005244:	687b      	ldr	r3, [r7, #4]
+ 8005246:	681b      	ldr	r3, [r3, #0]
+ 8005248:	f022 6270 	bic.w	r2, r2, #251658240	; 0xf000000
+ 800524c:	609a      	str	r2, [r3, #8]
+    hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
+ 800524e:	687b      	ldr	r3, [r7, #4]
+ 8005250:	681b      	ldr	r3, [r3, #0]
+ 8005252:	689a      	ldr	r2, [r3, #8]
+ 8005254:	687b      	ldr	r3, [r7, #4]
+ 8005256:	681b      	ldr	r3, [r3, #0]
+ 8005258:	f022 5240 	bic.w	r2, r2, #805306368	; 0x30000000
+ 800525c:	609a      	str	r2, [r3, #8]
+  }
+  
+  /* Enable or disable ADC continuous conversion mode */
+  hadc->Instance->CR2 &= ~(ADC_CR2_CONT);
+ 800525e:	687b      	ldr	r3, [r7, #4]
+ 8005260:	681b      	ldr	r3, [r3, #0]
+ 8005262:	689a      	ldr	r2, [r3, #8]
+ 8005264:	687b      	ldr	r3, [r7, #4]
+ 8005266:	681b      	ldr	r3, [r3, #0]
+ 8005268:	f022 0202 	bic.w	r2, r2, #2
+ 800526c:	609a      	str	r2, [r3, #8]
+  hadc->Instance->CR2 |= ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode);
+ 800526e:	687b      	ldr	r3, [r7, #4]
+ 8005270:	681b      	ldr	r3, [r3, #0]
+ 8005272:	6899      	ldr	r1, [r3, #8]
+ 8005274:	687b      	ldr	r3, [r7, #4]
+ 8005276:	699b      	ldr	r3, [r3, #24]
+ 8005278:	005a      	lsls	r2, r3, #1
+ 800527a:	687b      	ldr	r3, [r7, #4]
+ 800527c:	681b      	ldr	r3, [r3, #0]
+ 800527e:	430a      	orrs	r2, r1
+ 8005280:	609a      	str	r2, [r3, #8]
+  
+  if(hadc->Init.DiscontinuousConvMode != DISABLE)
+ 8005282:	687b      	ldr	r3, [r7, #4]
+ 8005284:	f893 3020 	ldrb.w	r3, [r3, #32]
+ 8005288:	2b00      	cmp	r3, #0
+ 800528a:	d01b      	beq.n	80052c4 <ADC_Init+0x160>
+  {
+    assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion));
+  
+    /* Enable the selected ADC regular discontinuous mode */
+    hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN;
+ 800528c:	687b      	ldr	r3, [r7, #4]
+ 800528e:	681b      	ldr	r3, [r3, #0]
+ 8005290:	685a      	ldr	r2, [r3, #4]
+ 8005292:	687b      	ldr	r3, [r7, #4]
+ 8005294:	681b      	ldr	r3, [r3, #0]
+ 8005296:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
+ 800529a:	605a      	str	r2, [r3, #4]
+    
+    /* Set the number of channels to be converted in discontinuous mode */
+    hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM);
+ 800529c:	687b      	ldr	r3, [r7, #4]
+ 800529e:	681b      	ldr	r3, [r3, #0]
+ 80052a0:	685a      	ldr	r2, [r3, #4]
+ 80052a2:	687b      	ldr	r3, [r7, #4]
+ 80052a4:	681b      	ldr	r3, [r3, #0]
+ 80052a6:	f422 4260 	bic.w	r2, r2, #57344	; 0xe000
+ 80052aa:	605a      	str	r2, [r3, #4]
+    hadc->Instance->CR1 |=  ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion);
+ 80052ac:	687b      	ldr	r3, [r7, #4]
+ 80052ae:	681b      	ldr	r3, [r3, #0]
+ 80052b0:	6859      	ldr	r1, [r3, #4]
+ 80052b2:	687b      	ldr	r3, [r7, #4]
+ 80052b4:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80052b6:	3b01      	subs	r3, #1
+ 80052b8:	035a      	lsls	r2, r3, #13
+ 80052ba:	687b      	ldr	r3, [r7, #4]
+ 80052bc:	681b      	ldr	r3, [r3, #0]
+ 80052be:	430a      	orrs	r2, r1
+ 80052c0:	605a      	str	r2, [r3, #4]
+ 80052c2:	e007      	b.n	80052d4 <ADC_Init+0x170>
+  }
+  else
+  {
+    /* Disable the selected ADC regular discontinuous mode */
+    hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN);
+ 80052c4:	687b      	ldr	r3, [r7, #4]
+ 80052c6:	681b      	ldr	r3, [r3, #0]
+ 80052c8:	685a      	ldr	r2, [r3, #4]
+ 80052ca:	687b      	ldr	r3, [r7, #4]
+ 80052cc:	681b      	ldr	r3, [r3, #0]
+ 80052ce:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
+ 80052d2:	605a      	str	r2, [r3, #4]
+  }
+  
+  /* Set ADC number of conversion */
+  hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
+ 80052d4:	687b      	ldr	r3, [r7, #4]
+ 80052d6:	681b      	ldr	r3, [r3, #0]
+ 80052d8:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 80052da:	687b      	ldr	r3, [r7, #4]
+ 80052dc:	681b      	ldr	r3, [r3, #0]
+ 80052de:	f422 0270 	bic.w	r2, r2, #15728640	; 0xf00000
+ 80052e2:	62da      	str	r2, [r3, #44]	; 0x2c
+  hadc->Instance->SQR1 |=  ADC_SQR1(hadc->Init.NbrOfConversion);
+ 80052e4:	687b      	ldr	r3, [r7, #4]
+ 80052e6:	681b      	ldr	r3, [r3, #0]
+ 80052e8:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
+ 80052ea:	687b      	ldr	r3, [r7, #4]
+ 80052ec:	69db      	ldr	r3, [r3, #28]
+ 80052ee:	3b01      	subs	r3, #1
+ 80052f0:	051a      	lsls	r2, r3, #20
+ 80052f2:	687b      	ldr	r3, [r7, #4]
+ 80052f4:	681b      	ldr	r3, [r3, #0]
+ 80052f6:	430a      	orrs	r2, r1
+ 80052f8:	62da      	str	r2, [r3, #44]	; 0x2c
+  
+  /* Enable or disable ADC DMA continuous request */
+  hadc->Instance->CR2 &= ~(ADC_CR2_DDS);
+ 80052fa:	687b      	ldr	r3, [r7, #4]
+ 80052fc:	681b      	ldr	r3, [r3, #0]
+ 80052fe:	689a      	ldr	r2, [r3, #8]
+ 8005300:	687b      	ldr	r3, [r7, #4]
+ 8005302:	681b      	ldr	r3, [r3, #0]
+ 8005304:	f422 7200 	bic.w	r2, r2, #512	; 0x200
+ 8005308:	609a      	str	r2, [r3, #8]
+  hadc->Instance->CR2 |= ADC_CR2_DMAContReq((uint32_t)hadc->Init.DMAContinuousRequests);
+ 800530a:	687b      	ldr	r3, [r7, #4]
+ 800530c:	681b      	ldr	r3, [r3, #0]
+ 800530e:	6899      	ldr	r1, [r3, #8]
+ 8005310:	687b      	ldr	r3, [r7, #4]
+ 8005312:	f893 3030 	ldrb.w	r3, [r3, #48]	; 0x30
+ 8005316:	025a      	lsls	r2, r3, #9
+ 8005318:	687b      	ldr	r3, [r7, #4]
+ 800531a:	681b      	ldr	r3, [r3, #0]
+ 800531c:	430a      	orrs	r2, r1
+ 800531e:	609a      	str	r2, [r3, #8]
+  
+  /* Enable or disable ADC end of conversion selection */
+  hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
+ 8005320:	687b      	ldr	r3, [r7, #4]
+ 8005322:	681b      	ldr	r3, [r3, #0]
+ 8005324:	689a      	ldr	r2, [r3, #8]
+ 8005326:	687b      	ldr	r3, [r7, #4]
+ 8005328:	681b      	ldr	r3, [r3, #0]
+ 800532a:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
+ 800532e:	609a      	str	r2, [r3, #8]
+  hadc->Instance->CR2 |= ADC_CR2_EOCSelection(hadc->Init.EOCSelection);
+ 8005330:	687b      	ldr	r3, [r7, #4]
+ 8005332:	681b      	ldr	r3, [r3, #0]
+ 8005334:	6899      	ldr	r1, [r3, #8]
+ 8005336:	687b      	ldr	r3, [r7, #4]
+ 8005338:	695b      	ldr	r3, [r3, #20]
+ 800533a:	029a      	lsls	r2, r3, #10
+ 800533c:	687b      	ldr	r3, [r7, #4]
+ 800533e:	681b      	ldr	r3, [r3, #0]
+ 8005340:	430a      	orrs	r2, r1
+ 8005342:	609a      	str	r2, [r3, #8]
+}
+ 8005344:	bf00      	nop
+ 8005346:	370c      	adds	r7, #12
+ 8005348:	46bd      	mov	sp, r7
+ 800534a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800534e:	4770      	bx	lr
+ 8005350:	40012300 	.word	0x40012300
+ 8005354:	0f000001 	.word	0x0f000001
+
+08005358 <__NVIC_SetPriorityGrouping>:
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 8005358:	b480      	push	{r7}
+ 800535a:	b085      	sub	sp, #20
+ 800535c:	af00      	add	r7, sp, #0
+ 800535e:	6078      	str	r0, [r7, #4]
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+ 8005360:	687b      	ldr	r3, [r7, #4]
+ 8005362:	f003 0307 	and.w	r3, r3, #7
+ 8005366:	60fb      	str	r3, [r7, #12]
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+ 8005368:	4b0b      	ldr	r3, [pc, #44]	; (8005398 <__NVIC_SetPriorityGrouping+0x40>)
+ 800536a:	68db      	ldr	r3, [r3, #12]
+ 800536c:	60bb      	str	r3, [r7, #8]
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+ 800536e:	68ba      	ldr	r2, [r7, #8]
+ 8005370:	f64f 03ff 	movw	r3, #63743	; 0xf8ff
+ 8005374:	4013      	ands	r3, r2
+ 8005376:	60bb      	str	r3, [r7, #8]
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+ 8005378:	68fb      	ldr	r3, [r7, #12]
+ 800537a:	021a      	lsls	r2, r3, #8
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ 800537c:	68bb      	ldr	r3, [r7, #8]
+ 800537e:	431a      	orrs	r2, r3
+  reg_value  =  (reg_value                                   |
+ 8005380:	4b06      	ldr	r3, [pc, #24]	; (800539c <__NVIC_SetPriorityGrouping+0x44>)
+ 8005382:	4313      	orrs	r3, r2
+ 8005384:	60bb      	str	r3, [r7, #8]
+  SCB->AIRCR =  reg_value;
+ 8005386:	4a04      	ldr	r2, [pc, #16]	; (8005398 <__NVIC_SetPriorityGrouping+0x40>)
+ 8005388:	68bb      	ldr	r3, [r7, #8]
+ 800538a:	60d3      	str	r3, [r2, #12]
+}
+ 800538c:	bf00      	nop
+ 800538e:	3714      	adds	r7, #20
+ 8005390:	46bd      	mov	sp, r7
+ 8005392:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005396:	4770      	bx	lr
+ 8005398:	e000ed00 	.word	0xe000ed00
+ 800539c:	05fa0000 	.word	0x05fa0000
+
+080053a0 <__NVIC_GetPriorityGrouping>:
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+ 80053a0:	b480      	push	{r7}
+ 80053a2:	af00      	add	r7, sp, #0
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+ 80053a4:	4b04      	ldr	r3, [pc, #16]	; (80053b8 <__NVIC_GetPriorityGrouping+0x18>)
+ 80053a6:	68db      	ldr	r3, [r3, #12]
+ 80053a8:	0a1b      	lsrs	r3, r3, #8
+ 80053aa:	f003 0307 	and.w	r3, r3, #7
+}
+ 80053ae:	4618      	mov	r0, r3
+ 80053b0:	46bd      	mov	sp, r7
+ 80053b2:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80053b6:	4770      	bx	lr
+ 80053b8:	e000ed00 	.word	0xe000ed00
+
+080053bc <__NVIC_EnableIRQ>:
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 80053bc:	b480      	push	{r7}
+ 80053be:	b083      	sub	sp, #12
+ 80053c0:	af00      	add	r7, sp, #0
+ 80053c2:	4603      	mov	r3, r0
+ 80053c4:	71fb      	strb	r3, [r7, #7]
+  if ((int32_t)(IRQn) >= 0)
+ 80053c6:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 80053ca:	2b00      	cmp	r3, #0
+ 80053cc:	db0b      	blt.n	80053e6 <__NVIC_EnableIRQ+0x2a>
+  {
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ 80053ce:	79fb      	ldrb	r3, [r7, #7]
+ 80053d0:	f003 021f 	and.w	r2, r3, #31
+ 80053d4:	4907      	ldr	r1, [pc, #28]	; (80053f4 <__NVIC_EnableIRQ+0x38>)
+ 80053d6:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 80053da:	095b      	lsrs	r3, r3, #5
+ 80053dc:	2001      	movs	r0, #1
+ 80053de:	fa00 f202 	lsl.w	r2, r0, r2
+ 80053e2:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
+  }
+}
+ 80053e6:	bf00      	nop
+ 80053e8:	370c      	adds	r7, #12
+ 80053ea:	46bd      	mov	sp, r7
+ 80053ec:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80053f0:	4770      	bx	lr
+ 80053f2:	bf00      	nop
+ 80053f4:	e000e100 	.word	0xe000e100
+
+080053f8 <__NVIC_SetPriority>:
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ 80053f8:	b480      	push	{r7}
+ 80053fa:	b083      	sub	sp, #12
+ 80053fc:	af00      	add	r7, sp, #0
+ 80053fe:	4603      	mov	r3, r0
+ 8005400:	6039      	str	r1, [r7, #0]
+ 8005402:	71fb      	strb	r3, [r7, #7]
+  if ((int32_t)(IRQn) >= 0)
+ 8005404:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8005408:	2b00      	cmp	r3, #0
+ 800540a:	db0a      	blt.n	8005422 <__NVIC_SetPriority+0x2a>
+  {
+    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 800540c:	683b      	ldr	r3, [r7, #0]
+ 800540e:	b2da      	uxtb	r2, r3
+ 8005410:	490c      	ldr	r1, [pc, #48]	; (8005444 <__NVIC_SetPriority+0x4c>)
+ 8005412:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8005416:	0112      	lsls	r2, r2, #4
+ 8005418:	b2d2      	uxtb	r2, r2
+ 800541a:	440b      	add	r3, r1
+ 800541c:	f883 2300 	strb.w	r2, [r3, #768]	; 0x300
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+ 8005420:	e00a      	b.n	8005438 <__NVIC_SetPriority+0x40>
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 8005422:	683b      	ldr	r3, [r7, #0]
+ 8005424:	b2da      	uxtb	r2, r3
+ 8005426:	4908      	ldr	r1, [pc, #32]	; (8005448 <__NVIC_SetPriority+0x50>)
+ 8005428:	79fb      	ldrb	r3, [r7, #7]
+ 800542a:	f003 030f 	and.w	r3, r3, #15
+ 800542e:	3b04      	subs	r3, #4
+ 8005430:	0112      	lsls	r2, r2, #4
+ 8005432:	b2d2      	uxtb	r2, r2
+ 8005434:	440b      	add	r3, r1
+ 8005436:	761a      	strb	r2, [r3, #24]
+}
+ 8005438:	bf00      	nop
+ 800543a:	370c      	adds	r7, #12
+ 800543c:	46bd      	mov	sp, r7
+ 800543e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005442:	4770      	bx	lr
+ 8005444:	e000e100 	.word	0xe000e100
+ 8005448:	e000ed00 	.word	0xe000ed00
+
+0800544c <NVIC_EncodePriority>:
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ 800544c:	b480      	push	{r7}
+ 800544e:	b089      	sub	sp, #36	; 0x24
+ 8005450:	af00      	add	r7, sp, #0
+ 8005452:	60f8      	str	r0, [r7, #12]
+ 8005454:	60b9      	str	r1, [r7, #8]
+ 8005456:	607a      	str	r2, [r7, #4]
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+ 8005458:	68fb      	ldr	r3, [r7, #12]
+ 800545a:	f003 0307 	and.w	r3, r3, #7
+ 800545e:	61fb      	str	r3, [r7, #28]
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ 8005460:	69fb      	ldr	r3, [r7, #28]
+ 8005462:	f1c3 0307 	rsb	r3, r3, #7
+ 8005466:	2b04      	cmp	r3, #4
+ 8005468:	bf28      	it	cs
+ 800546a:	2304      	movcs	r3, #4
+ 800546c:	61bb      	str	r3, [r7, #24]
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+ 800546e:	69fb      	ldr	r3, [r7, #28]
+ 8005470:	3304      	adds	r3, #4
+ 8005472:	2b06      	cmp	r3, #6
+ 8005474:	d902      	bls.n	800547c <NVIC_EncodePriority+0x30>
+ 8005476:	69fb      	ldr	r3, [r7, #28]
+ 8005478:	3b03      	subs	r3, #3
+ 800547a:	e000      	b.n	800547e <NVIC_EncodePriority+0x32>
+ 800547c:	2300      	movs	r3, #0
+ 800547e:	617b      	str	r3, [r7, #20]
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 8005480:	f04f 32ff 	mov.w	r2, #4294967295
+ 8005484:	69bb      	ldr	r3, [r7, #24]
+ 8005486:	fa02 f303 	lsl.w	r3, r2, r3
+ 800548a:	43da      	mvns	r2, r3
+ 800548c:	68bb      	ldr	r3, [r7, #8]
+ 800548e:	401a      	ands	r2, r3
+ 8005490:	697b      	ldr	r3, [r7, #20]
+ 8005492:	409a      	lsls	r2, r3
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+ 8005494:	f04f 31ff 	mov.w	r1, #4294967295
+ 8005498:	697b      	ldr	r3, [r7, #20]
+ 800549a:	fa01 f303 	lsl.w	r3, r1, r3
+ 800549e:	43d9      	mvns	r1, r3
+ 80054a0:	687b      	ldr	r3, [r7, #4]
+ 80054a2:	400b      	ands	r3, r1
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 80054a4:	4313      	orrs	r3, r2
+         );
+}
+ 80054a6:	4618      	mov	r0, r3
+ 80054a8:	3724      	adds	r7, #36	; 0x24
+ 80054aa:	46bd      	mov	sp, r7
+ 80054ac:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80054b0:	4770      	bx	lr
+
+080054b2 <HAL_NVIC_SetPriorityGrouping>:
+  * @note   When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. 
+  *         The pending IRQ priority will be managed only by the subpriority. 
+  * @retval None
+  */
+void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 80054b2:	b580      	push	{r7, lr}
+ 80054b4:	b082      	sub	sp, #8
+ 80054b6:	af00      	add	r7, sp, #0
+ 80054b8:	6078      	str	r0, [r7, #4]
+  /* Check the parameters */
+  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
+  
+  /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
+  NVIC_SetPriorityGrouping(PriorityGroup);
+ 80054ba:	6878      	ldr	r0, [r7, #4]
+ 80054bc:	f7ff ff4c 	bl	8005358 <__NVIC_SetPriorityGrouping>
+}
+ 80054c0:	bf00      	nop
+ 80054c2:	3708      	adds	r7, #8
+ 80054c4:	46bd      	mov	sp, r7
+ 80054c6:	bd80      	pop	{r7, pc}
+
+080054c8 <HAL_NVIC_SetPriority>:
+  *         This parameter can be a value between 0 and 15
+  *         A lower priority value indicates a higher priority.          
+  * @retval None
+  */
+void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
+{ 
+ 80054c8:	b580      	push	{r7, lr}
+ 80054ca:	b086      	sub	sp, #24
+ 80054cc:	af00      	add	r7, sp, #0
+ 80054ce:	4603      	mov	r3, r0
+ 80054d0:	60b9      	str	r1, [r7, #8]
+ 80054d2:	607a      	str	r2, [r7, #4]
+ 80054d4:	73fb      	strb	r3, [r7, #15]
+  uint32_t prioritygroup = 0x00;
+ 80054d6:	2300      	movs	r3, #0
+ 80054d8:	617b      	str	r3, [r7, #20]
+  
+  /* Check the parameters */
+  assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
+  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
+  
+  prioritygroup = NVIC_GetPriorityGrouping();
+ 80054da:	f7ff ff61 	bl	80053a0 <__NVIC_GetPriorityGrouping>
+ 80054de:	6178      	str	r0, [r7, #20]
+  
+  NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
+ 80054e0:	687a      	ldr	r2, [r7, #4]
+ 80054e2:	68b9      	ldr	r1, [r7, #8]
+ 80054e4:	6978      	ldr	r0, [r7, #20]
+ 80054e6:	f7ff ffb1 	bl	800544c <NVIC_EncodePriority>
+ 80054ea:	4602      	mov	r2, r0
+ 80054ec:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 80054f0:	4611      	mov	r1, r2
+ 80054f2:	4618      	mov	r0, r3
+ 80054f4:	f7ff ff80 	bl	80053f8 <__NVIC_SetPriority>
+}
+ 80054f8:	bf00      	nop
+ 80054fa:	3718      	adds	r7, #24
+ 80054fc:	46bd      	mov	sp, r7
+ 80054fe:	bd80      	pop	{r7, pc}
+
+08005500 <HAL_NVIC_EnableIRQ>:
+  *         This parameter can be an enumerator of IRQn_Type enumeration
+  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
+  * @retval None
+  */
+void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 8005500:	b580      	push	{r7, lr}
+ 8005502:	b082      	sub	sp, #8
+ 8005504:	af00      	add	r7, sp, #0
+ 8005506:	4603      	mov	r3, r0
+ 8005508:	71fb      	strb	r3, [r7, #7]
+  /* Check the parameters */
+  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
+  
+  /* Enable interrupt */
+  NVIC_EnableIRQ(IRQn);
+ 800550a:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 800550e:	4618      	mov	r0, r3
+ 8005510:	f7ff ff54 	bl	80053bc <__NVIC_EnableIRQ>
+}
+ 8005514:	bf00      	nop
+ 8005516:	3708      	adds	r7, #8
+ 8005518:	46bd      	mov	sp, r7
+ 800551a:	bd80      	pop	{r7, pc}
+
+0800551c <HAL_CRC_Init>:
+  *         parameters in the CRC_InitTypeDef and create the associated handle.
+  * @param  hcrc CRC handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
+{
+ 800551c:	b580      	push	{r7, lr}
+ 800551e:	b082      	sub	sp, #8
+ 8005520:	af00      	add	r7, sp, #0
+ 8005522:	6078      	str	r0, [r7, #4]
+  /* Check the CRC handle allocation */
+  if (hcrc == NULL)
+ 8005524:	687b      	ldr	r3, [r7, #4]
+ 8005526:	2b00      	cmp	r3, #0
+ 8005528:	d101      	bne.n	800552e <HAL_CRC_Init+0x12>
+  {
+    return HAL_ERROR;
+ 800552a:	2301      	movs	r3, #1
+ 800552c:	e054      	b.n	80055d8 <HAL_CRC_Init+0xbc>
+  }
+
+  /* Check the parameters */
+  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
+
+  if (hcrc->State == HAL_CRC_STATE_RESET)
+ 800552e:	687b      	ldr	r3, [r7, #4]
+ 8005530:	7f5b      	ldrb	r3, [r3, #29]
+ 8005532:	b2db      	uxtb	r3, r3
+ 8005534:	2b00      	cmp	r3, #0
+ 8005536:	d105      	bne.n	8005544 <HAL_CRC_Init+0x28>
+  {
+    /* Allocate lock resource and initialize it */
+    hcrc->Lock = HAL_UNLOCKED;
+ 8005538:	687b      	ldr	r3, [r7, #4]
+ 800553a:	2200      	movs	r2, #0
+ 800553c:	771a      	strb	r2, [r3, #28]
+    /* Init the low level hardware */
+    HAL_CRC_MspInit(hcrc);
+ 800553e:	6878      	ldr	r0, [r7, #4]
+ 8005540:	f7fe fc90 	bl	8003e64 <HAL_CRC_MspInit>
+  }
+
+  hcrc->State = HAL_CRC_STATE_BUSY;
+ 8005544:	687b      	ldr	r3, [r7, #4]
+ 8005546:	2202      	movs	r2, #2
+ 8005548:	775a      	strb	r2, [r3, #29]
+
+  /* check whether or not non-default generating polynomial has been
+   * picked up by user */
+  assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse));
+  if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE)
+ 800554a:	687b      	ldr	r3, [r7, #4]
+ 800554c:	791b      	ldrb	r3, [r3, #4]
+ 800554e:	2b00      	cmp	r3, #0
+ 8005550:	d10c      	bne.n	800556c <HAL_CRC_Init+0x50>
+  {
+    /* initialize peripheral with default generating polynomial */
+    WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY);
+ 8005552:	687b      	ldr	r3, [r7, #4]
+ 8005554:	681b      	ldr	r3, [r3, #0]
+ 8005556:	4a22      	ldr	r2, [pc, #136]	; (80055e0 <HAL_CRC_Init+0xc4>)
+ 8005558:	615a      	str	r2, [r3, #20]
+    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B);
+ 800555a:	687b      	ldr	r3, [r7, #4]
+ 800555c:	681b      	ldr	r3, [r3, #0]
+ 800555e:	689a      	ldr	r2, [r3, #8]
+ 8005560:	687b      	ldr	r3, [r7, #4]
+ 8005562:	681b      	ldr	r3, [r3, #0]
+ 8005564:	f022 0218 	bic.w	r2, r2, #24
+ 8005568:	609a      	str	r2, [r3, #8]
+ 800556a:	e00c      	b.n	8005586 <HAL_CRC_Init+0x6a>
+  }
+  else
+  {
+    /* initialize CRC peripheral with generating polynomial defined by user */
+    if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK)
+ 800556c:	687b      	ldr	r3, [r7, #4]
+ 800556e:	6899      	ldr	r1, [r3, #8]
+ 8005570:	687b      	ldr	r3, [r7, #4]
+ 8005572:	68db      	ldr	r3, [r3, #12]
+ 8005574:	461a      	mov	r2, r3
+ 8005576:	6878      	ldr	r0, [r7, #4]
+ 8005578:	f000 f834 	bl	80055e4 <HAL_CRCEx_Polynomial_Set>
+ 800557c:	4603      	mov	r3, r0
+ 800557e:	2b00      	cmp	r3, #0
+ 8005580:	d001      	beq.n	8005586 <HAL_CRC_Init+0x6a>
+    {
+      return HAL_ERROR;
+ 8005582:	2301      	movs	r3, #1
+ 8005584:	e028      	b.n	80055d8 <HAL_CRC_Init+0xbc>
+  }
+
+  /* check whether or not non-default CRC initial value has been
+   * picked up by user */
+  assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse));
+  if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE)
+ 8005586:	687b      	ldr	r3, [r7, #4]
+ 8005588:	795b      	ldrb	r3, [r3, #5]
+ 800558a:	2b00      	cmp	r3, #0
+ 800558c:	d105      	bne.n	800559a <HAL_CRC_Init+0x7e>
+  {
+    WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE);
+ 800558e:	687b      	ldr	r3, [r7, #4]
+ 8005590:	681b      	ldr	r3, [r3, #0]
+ 8005592:	f04f 32ff 	mov.w	r2, #4294967295
+ 8005596:	611a      	str	r2, [r3, #16]
+ 8005598:	e004      	b.n	80055a4 <HAL_CRC_Init+0x88>
+  }
+  else
+  {
+    WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue);
+ 800559a:	687b      	ldr	r3, [r7, #4]
+ 800559c:	681b      	ldr	r3, [r3, #0]
+ 800559e:	687a      	ldr	r2, [r7, #4]
+ 80055a0:	6912      	ldr	r2, [r2, #16]
+ 80055a2:	611a      	str	r2, [r3, #16]
+  }
+
+
+  /* set input data inversion mode */
+  assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode));
+  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode);
+ 80055a4:	687b      	ldr	r3, [r7, #4]
+ 80055a6:	681b      	ldr	r3, [r3, #0]
+ 80055a8:	689b      	ldr	r3, [r3, #8]
+ 80055aa:	f023 0160 	bic.w	r1, r3, #96	; 0x60
+ 80055ae:	687b      	ldr	r3, [r7, #4]
+ 80055b0:	695a      	ldr	r2, [r3, #20]
+ 80055b2:	687b      	ldr	r3, [r7, #4]
+ 80055b4:	681b      	ldr	r3, [r3, #0]
+ 80055b6:	430a      	orrs	r2, r1
+ 80055b8:	609a      	str	r2, [r3, #8]
+
+  /* set output data inversion mode */
+  assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode));
+  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode);
+ 80055ba:	687b      	ldr	r3, [r7, #4]
+ 80055bc:	681b      	ldr	r3, [r3, #0]
+ 80055be:	689b      	ldr	r3, [r3, #8]
+ 80055c0:	f023 0180 	bic.w	r1, r3, #128	; 0x80
+ 80055c4:	687b      	ldr	r3, [r7, #4]
+ 80055c6:	699a      	ldr	r2, [r3, #24]
+ 80055c8:	687b      	ldr	r3, [r7, #4]
+ 80055ca:	681b      	ldr	r3, [r3, #0]
+ 80055cc:	430a      	orrs	r2, r1
+ 80055ce:	609a      	str	r2, [r3, #8]
+  /* makes sure the input data format (bytes, halfwords or words stream)
+   * is properly specified by user */
+  assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat));
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_READY;
+ 80055d0:	687b      	ldr	r3, [r7, #4]
+ 80055d2:	2201      	movs	r2, #1
+ 80055d4:	775a      	strb	r2, [r3, #29]
+
+  /* Return function status */
+  return HAL_OK;
+ 80055d6:	2300      	movs	r3, #0
+}
+ 80055d8:	4618      	mov	r0, r3
+ 80055da:	3708      	adds	r7, #8
+ 80055dc:	46bd      	mov	sp, r7
+ 80055de:	bd80      	pop	{r7, pc}
+ 80055e0:	04c11db7 	.word	0x04c11db7
+
+080055e4 <HAL_CRCEx_Polynomial_Set>:
+  *          @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16)
+  *          @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32)
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength)
+{
+ 80055e4:	b480      	push	{r7}
+ 80055e6:	b087      	sub	sp, #28
+ 80055e8:	af00      	add	r7, sp, #0
+ 80055ea:	60f8      	str	r0, [r7, #12]
+ 80055ec:	60b9      	str	r1, [r7, #8]
+ 80055ee:	607a      	str	r2, [r7, #4]
+  HAL_StatusTypeDef status = HAL_OK;
+ 80055f0:	2300      	movs	r3, #0
+ 80055f2:	75fb      	strb	r3, [r7, #23]
+  uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */
+ 80055f4:	231f      	movs	r3, #31
+ 80055f6:	613b      	str	r3, [r7, #16]
+   * definition. HAL_ERROR is reported if Pol degree is
+   * larger than that indicated by PolyLength.
+   * Look for MSB position: msb will contain the degree of
+   *  the second to the largest polynomial member. E.g., for
+   *  X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */
+  while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U))
+ 80055f8:	bf00      	nop
+ 80055fa:	693b      	ldr	r3, [r7, #16]
+ 80055fc:	1e5a      	subs	r2, r3, #1
+ 80055fe:	613a      	str	r2, [r7, #16]
+ 8005600:	2b00      	cmp	r3, #0
+ 8005602:	d009      	beq.n	8005618 <HAL_CRCEx_Polynomial_Set+0x34>
+ 8005604:	693b      	ldr	r3, [r7, #16]
+ 8005606:	f003 031f 	and.w	r3, r3, #31
+ 800560a:	68ba      	ldr	r2, [r7, #8]
+ 800560c:	fa22 f303 	lsr.w	r3, r2, r3
+ 8005610:	f003 0301 	and.w	r3, r3, #1
+ 8005614:	2b00      	cmp	r3, #0
+ 8005616:	d0f0      	beq.n	80055fa <HAL_CRCEx_Polynomial_Set+0x16>
+  {
+  }
+
+  switch (PolyLength)
+ 8005618:	687b      	ldr	r3, [r7, #4]
+ 800561a:	2b18      	cmp	r3, #24
+ 800561c:	d846      	bhi.n	80056ac <HAL_CRCEx_Polynomial_Set+0xc8>
+ 800561e:	a201      	add	r2, pc, #4	; (adr r2, 8005624 <HAL_CRCEx_Polynomial_Set+0x40>)
+ 8005620:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 8005624:	080056b3 	.word	0x080056b3
+ 8005628:	080056ad 	.word	0x080056ad
+ 800562c:	080056ad 	.word	0x080056ad
+ 8005630:	080056ad 	.word	0x080056ad
+ 8005634:	080056ad 	.word	0x080056ad
+ 8005638:	080056ad 	.word	0x080056ad
+ 800563c:	080056ad 	.word	0x080056ad
+ 8005640:	080056ad 	.word	0x080056ad
+ 8005644:	080056a1 	.word	0x080056a1
+ 8005648:	080056ad 	.word	0x080056ad
+ 800564c:	080056ad 	.word	0x080056ad
+ 8005650:	080056ad 	.word	0x080056ad
+ 8005654:	080056ad 	.word	0x080056ad
+ 8005658:	080056ad 	.word	0x080056ad
+ 800565c:	080056ad 	.word	0x080056ad
+ 8005660:	080056ad 	.word	0x080056ad
+ 8005664:	08005695 	.word	0x08005695
+ 8005668:	080056ad 	.word	0x080056ad
+ 800566c:	080056ad 	.word	0x080056ad
+ 8005670:	080056ad 	.word	0x080056ad
+ 8005674:	080056ad 	.word	0x080056ad
+ 8005678:	080056ad 	.word	0x080056ad
+ 800567c:	080056ad 	.word	0x080056ad
+ 8005680:	080056ad 	.word	0x080056ad
+ 8005684:	08005689 	.word	0x08005689
+  {
+    case CRC_POLYLENGTH_7B:
+      if (msb >= HAL_CRC_LENGTH_7B)
+ 8005688:	693b      	ldr	r3, [r7, #16]
+ 800568a:	2b06      	cmp	r3, #6
+ 800568c:	d913      	bls.n	80056b6 <HAL_CRCEx_Polynomial_Set+0xd2>
+      {
+        status =   HAL_ERROR;
+ 800568e:	2301      	movs	r3, #1
+ 8005690:	75fb      	strb	r3, [r7, #23]
+      }
+      break;
+ 8005692:	e010      	b.n	80056b6 <HAL_CRCEx_Polynomial_Set+0xd2>
+    case CRC_POLYLENGTH_8B:
+      if (msb >= HAL_CRC_LENGTH_8B)
+ 8005694:	693b      	ldr	r3, [r7, #16]
+ 8005696:	2b07      	cmp	r3, #7
+ 8005698:	d90f      	bls.n	80056ba <HAL_CRCEx_Polynomial_Set+0xd6>
+      {
+        status =   HAL_ERROR;
+ 800569a:	2301      	movs	r3, #1
+ 800569c:	75fb      	strb	r3, [r7, #23]
+      }
+      break;
+ 800569e:	e00c      	b.n	80056ba <HAL_CRCEx_Polynomial_Set+0xd6>
+    case CRC_POLYLENGTH_16B:
+      if (msb >= HAL_CRC_LENGTH_16B)
+ 80056a0:	693b      	ldr	r3, [r7, #16]
+ 80056a2:	2b0f      	cmp	r3, #15
+ 80056a4:	d90b      	bls.n	80056be <HAL_CRCEx_Polynomial_Set+0xda>
+      {
+        status =   HAL_ERROR;
+ 80056a6:	2301      	movs	r3, #1
+ 80056a8:	75fb      	strb	r3, [r7, #23]
+      }
+      break;
+ 80056aa:	e008      	b.n	80056be <HAL_CRCEx_Polynomial_Set+0xda>
+
+    case CRC_POLYLENGTH_32B:
+      /* no polynomial definition vs. polynomial length issue possible */
+      break;
+    default:
+      status =  HAL_ERROR;
+ 80056ac:	2301      	movs	r3, #1
+ 80056ae:	75fb      	strb	r3, [r7, #23]
+      break;
+ 80056b0:	e006      	b.n	80056c0 <HAL_CRCEx_Polynomial_Set+0xdc>
+      break;
+ 80056b2:	bf00      	nop
+ 80056b4:	e004      	b.n	80056c0 <HAL_CRCEx_Polynomial_Set+0xdc>
+      break;
+ 80056b6:	bf00      	nop
+ 80056b8:	e002      	b.n	80056c0 <HAL_CRCEx_Polynomial_Set+0xdc>
+      break;
+ 80056ba:	bf00      	nop
+ 80056bc:	e000      	b.n	80056c0 <HAL_CRCEx_Polynomial_Set+0xdc>
+      break;
+ 80056be:	bf00      	nop
+  }
+  if (status == HAL_OK)
+ 80056c0:	7dfb      	ldrb	r3, [r7, #23]
+ 80056c2:	2b00      	cmp	r3, #0
+ 80056c4:	d10d      	bne.n	80056e2 <HAL_CRCEx_Polynomial_Set+0xfe>
+  {
+    /* set generating polynomial */
+    WRITE_REG(hcrc->Instance->POL, Pol);
+ 80056c6:	68fb      	ldr	r3, [r7, #12]
+ 80056c8:	681b      	ldr	r3, [r3, #0]
+ 80056ca:	68ba      	ldr	r2, [r7, #8]
+ 80056cc:	615a      	str	r2, [r3, #20]
+
+    /* set generating polynomial size */
+    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength);
+ 80056ce:	68fb      	ldr	r3, [r7, #12]
+ 80056d0:	681b      	ldr	r3, [r3, #0]
+ 80056d2:	689b      	ldr	r3, [r3, #8]
+ 80056d4:	f023 0118 	bic.w	r1, r3, #24
+ 80056d8:	68fb      	ldr	r3, [r7, #12]
+ 80056da:	681b      	ldr	r3, [r3, #0]
+ 80056dc:	687a      	ldr	r2, [r7, #4]
+ 80056de:	430a      	orrs	r2, r1
+ 80056e0:	609a      	str	r2, [r3, #8]
+  }
+  /* Return function status */
+  return status;
+ 80056e2:	7dfb      	ldrb	r3, [r7, #23]
+}
+ 80056e4:	4618      	mov	r0, r3
+ 80056e6:	371c      	adds	r7, #28
+ 80056e8:	46bd      	mov	sp, r7
+ 80056ea:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80056ee:	4770      	bx	lr
+
+080056f0 <HAL_DAC_Init>:
+  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
+  *         the configuration information for the specified DAC.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
+{ 
+ 80056f0:	b580      	push	{r7, lr}
+ 80056f2:	b082      	sub	sp, #8
+ 80056f4:	af00      	add	r7, sp, #0
+ 80056f6:	6078      	str	r0, [r7, #4]
+  /* Check DAC handle */
+  if(hdac == NULL)
+ 80056f8:	687b      	ldr	r3, [r7, #4]
+ 80056fa:	2b00      	cmp	r3, #0
+ 80056fc:	d101      	bne.n	8005702 <HAL_DAC_Init+0x12>
+  {
+     return HAL_ERROR;
+ 80056fe:	2301      	movs	r3, #1
+ 8005700:	e014      	b.n	800572c <HAL_DAC_Init+0x3c>
+  }
+  /* Check the parameters */
+  assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
+  
+  if(hdac->State == HAL_DAC_STATE_RESET)
+ 8005702:	687b      	ldr	r3, [r7, #4]
+ 8005704:	791b      	ldrb	r3, [r3, #4]
+ 8005706:	b2db      	uxtb	r3, r3
+ 8005708:	2b00      	cmp	r3, #0
+ 800570a:	d105      	bne.n	8005718 <HAL_DAC_Init+0x28>
+    {
+      hdac->MspInitCallback               = HAL_DAC_MspInit;
+    }
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
+    /* Allocate lock resource and initialize it */
+    hdac->Lock = HAL_UNLOCKED; 
+ 800570c:	687b      	ldr	r3, [r7, #4]
+ 800570e:	2200      	movs	r2, #0
+ 8005710:	715a      	strb	r2, [r3, #5]
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+    /* Init the low level hardware */
+    hdac->MspInitCallback(hdac);
+#else
+    /* Init the low level hardware */
+    HAL_DAC_MspInit(hdac);
+ 8005712:	6878      	ldr	r0, [r7, #4]
+ 8005714:	f7fe fbc6 	bl	8003ea4 <HAL_DAC_MspInit>
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
+  }
+  
+  /* Initialize the DAC state*/
+  hdac->State = HAL_DAC_STATE_BUSY;
+ 8005718:	687b      	ldr	r3, [r7, #4]
+ 800571a:	2202      	movs	r2, #2
+ 800571c:	711a      	strb	r2, [r3, #4]
+  
+  /* Set DAC error code to none */
+  hdac->ErrorCode = HAL_DAC_ERROR_NONE;
+ 800571e:	687b      	ldr	r3, [r7, #4]
+ 8005720:	2200      	movs	r2, #0
+ 8005722:	611a      	str	r2, [r3, #16]
+  
+  /* Initialize the DAC state*/
+  hdac->State = HAL_DAC_STATE_READY;
+ 8005724:	687b      	ldr	r3, [r7, #4]
+ 8005726:	2201      	movs	r2, #1
+ 8005728:	711a      	strb	r2, [r3, #4]
+  
+  /* Return function status */
+  return HAL_OK;
+ 800572a:	2300      	movs	r3, #0
+}
+ 800572c:	4618      	mov	r0, r3
+ 800572e:	3708      	adds	r7, #8
+ 8005730:	46bd      	mov	sp, r7
+ 8005732:	bd80      	pop	{r7, pc}
+
+08005734 <HAL_DAC_IRQHandler>:
+  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
+  *         the configuration information for the specified DAC.
+  * @retval None
+  */
+void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
+{
+ 8005734:	b580      	push	{r7, lr}
+ 8005736:	b082      	sub	sp, #8
+ 8005738:	af00      	add	r7, sp, #0
+ 800573a:	6078      	str	r0, [r7, #4]
+  /* Check underrun channel 1 flag */
+  if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
+ 800573c:	687b      	ldr	r3, [r7, #4]
+ 800573e:	681b      	ldr	r3, [r3, #0]
+ 8005740:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8005742:	f403 5300 	and.w	r3, r3, #8192	; 0x2000
+ 8005746:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
+ 800574a:	d118      	bne.n	800577e <HAL_DAC_IRQHandler+0x4a>
+  {
+    /* Change DAC state to error state */
+    hdac->State = HAL_DAC_STATE_ERROR;
+ 800574c:	687b      	ldr	r3, [r7, #4]
+ 800574e:	2204      	movs	r2, #4
+ 8005750:	711a      	strb	r2, [r3, #4]
+    
+    /* Set DAC error code to channel1 DMA underrun error */
+    hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
+ 8005752:	687b      	ldr	r3, [r7, #4]
+ 8005754:	691b      	ldr	r3, [r3, #16]
+ 8005756:	f043 0201 	orr.w	r2, r3, #1
+ 800575a:	687b      	ldr	r3, [r7, #4]
+ 800575c:	611a      	str	r2, [r3, #16]
+    
+    /* Clear the underrun flag */
+    __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
+ 800575e:	687b      	ldr	r3, [r7, #4]
+ 8005760:	681b      	ldr	r3, [r3, #0]
+ 8005762:	f44f 5200 	mov.w	r2, #8192	; 0x2000
+ 8005766:	635a      	str	r2, [r3, #52]	; 0x34
+    
+    /* Disable the selected DAC channel1 DMA request */
+    hdac->Instance->CR &= ~DAC_CR_DMAEN1;
+ 8005768:	687b      	ldr	r3, [r7, #4]
+ 800576a:	681b      	ldr	r3, [r3, #0]
+ 800576c:	681a      	ldr	r2, [r3, #0]
+ 800576e:	687b      	ldr	r3, [r7, #4]
+ 8005770:	681b      	ldr	r3, [r3, #0]
+ 8005772:	f422 5280 	bic.w	r2, r2, #4096	; 0x1000
+ 8005776:	601a      	str	r2, [r3, #0]
+    
+    /* Error callback */ 
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+      hdac->DMAUnderrunCallbackCh1(hdac);
+#else
+    HAL_DAC_DMAUnderrunCallbackCh1(hdac);
+ 8005778:	6878      	ldr	r0, [r7, #4]
+ 800577a:	f000 f825 	bl	80057c8 <HAL_DAC_DMAUnderrunCallbackCh1>
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
+  }
+  /* Check underrun channel 2 flag */
+  if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
+ 800577e:	687b      	ldr	r3, [r7, #4]
+ 8005780:	681b      	ldr	r3, [r3, #0]
+ 8005782:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8005784:	f003 5300 	and.w	r3, r3, #536870912	; 0x20000000
+ 8005788:	f1b3 5f00 	cmp.w	r3, #536870912	; 0x20000000
+ 800578c:	d118      	bne.n	80057c0 <HAL_DAC_IRQHandler+0x8c>
+  {
+    /* Change DAC state to error state */
+    hdac->State = HAL_DAC_STATE_ERROR;
+ 800578e:	687b      	ldr	r3, [r7, #4]
+ 8005790:	2204      	movs	r2, #4
+ 8005792:	711a      	strb	r2, [r3, #4]
+    
+    /* Set DAC error code to channel2 DMA underrun error */
+    hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
+ 8005794:	687b      	ldr	r3, [r7, #4]
+ 8005796:	691b      	ldr	r3, [r3, #16]
+ 8005798:	f043 0202 	orr.w	r2, r3, #2
+ 800579c:	687b      	ldr	r3, [r7, #4]
+ 800579e:	611a      	str	r2, [r3, #16]
+    
+    /* Clear the underrun flag */
+    __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
+ 80057a0:	687b      	ldr	r3, [r7, #4]
+ 80057a2:	681b      	ldr	r3, [r3, #0]
+ 80057a4:	f04f 5200 	mov.w	r2, #536870912	; 0x20000000
+ 80057a8:	635a      	str	r2, [r3, #52]	; 0x34
+    
+    /* Disable the selected DAC channel1 DMA request */
+    hdac->Instance->CR &= ~DAC_CR_DMAEN2;
+ 80057aa:	687b      	ldr	r3, [r7, #4]
+ 80057ac:	681b      	ldr	r3, [r3, #0]
+ 80057ae:	681a      	ldr	r2, [r3, #0]
+ 80057b0:	687b      	ldr	r3, [r7, #4]
+ 80057b2:	681b      	ldr	r3, [r3, #0]
+ 80057b4:	f022 5280 	bic.w	r2, r2, #268435456	; 0x10000000
+ 80057b8:	601a      	str	r2, [r3, #0]
+    
+    /* Error callback */ 
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+      hdac->DMAUnderrunCallbackCh2(hdac);
+#else
+    HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
+ 80057ba:	6878      	ldr	r0, [r7, #4]
+ 80057bc:	f000 f85b 	bl	8005876 <HAL_DACEx_DMAUnderrunCallbackCh2>
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
+  }
+}
+ 80057c0:	bf00      	nop
+ 80057c2:	3708      	adds	r7, #8
+ 80057c4:	46bd      	mov	sp, r7
+ 80057c6:	bd80      	pop	{r7, pc}
+
+080057c8 <HAL_DAC_DMAUnderrunCallbackCh1>:
+  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
+  *         the configuration information for the specified DAC.
+  * @retval None
+  */
+__weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
+{
+ 80057c8:	b480      	push	{r7}
+ 80057ca:	b083      	sub	sp, #12
+ 80057cc:	af00      	add	r7, sp, #0
+ 80057ce:	6078      	str	r0, [r7, #4]
+  UNUSED(hdac);
+ 
+  /* NOTE : This function Should not be modified, when the callback is needed,
+            the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
+   */
+}
+ 80057d0:	bf00      	nop
+ 80057d2:	370c      	adds	r7, #12
+ 80057d4:	46bd      	mov	sp, r7
+ 80057d6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80057da:	4770      	bx	lr
+
+080057dc <HAL_DAC_ConfigChannel>:
+  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
+  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
+{
+ 80057dc:	b480      	push	{r7}
+ 80057de:	b087      	sub	sp, #28
+ 80057e0:	af00      	add	r7, sp, #0
+ 80057e2:	60f8      	str	r0, [r7, #12]
+ 80057e4:	60b9      	str	r1, [r7, #8]
+ 80057e6:	607a      	str	r2, [r7, #4]
+  uint32_t tmpreg1 = 0, tmpreg2 = 0;
+ 80057e8:	2300      	movs	r3, #0
+ 80057ea:	617b      	str	r3, [r7, #20]
+ 80057ec:	2300      	movs	r3, #0
+ 80057ee:	613b      	str	r3, [r7, #16]
+  assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
+  assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
+  assert_param(IS_DAC_CHANNEL(Channel));
+  
+  /* Process locked */
+  __HAL_LOCK(hdac);
+ 80057f0:	68fb      	ldr	r3, [r7, #12]
+ 80057f2:	795b      	ldrb	r3, [r3, #5]
+ 80057f4:	2b01      	cmp	r3, #1
+ 80057f6:	d101      	bne.n	80057fc <HAL_DAC_ConfigChannel+0x20>
+ 80057f8:	2302      	movs	r3, #2
+ 80057fa:	e036      	b.n	800586a <HAL_DAC_ConfigChannel+0x8e>
+ 80057fc:	68fb      	ldr	r3, [r7, #12]
+ 80057fe:	2201      	movs	r2, #1
+ 8005800:	715a      	strb	r2, [r3, #5]
+  
+  /* Change DAC state */
+  hdac->State = HAL_DAC_STATE_BUSY;
+ 8005802:	68fb      	ldr	r3, [r7, #12]
+ 8005804:	2202      	movs	r2, #2
+ 8005806:	711a      	strb	r2, [r3, #4]
+  
+  /* Get the DAC CR value */
+  tmpreg1 = hdac->Instance->CR;
+ 8005808:	68fb      	ldr	r3, [r7, #12]
+ 800580a:	681b      	ldr	r3, [r3, #0]
+ 800580c:	681b      	ldr	r3, [r3, #0]
+ 800580e:	617b      	str	r3, [r7, #20]
+  /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
+  tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
+ 8005810:	f640 72fe 	movw	r2, #4094	; 0xffe
+ 8005814:	687b      	ldr	r3, [r7, #4]
+ 8005816:	fa02 f303 	lsl.w	r3, r2, r3
+ 800581a:	43db      	mvns	r3, r3
+ 800581c:	697a      	ldr	r2, [r7, #20]
+ 800581e:	4013      	ands	r3, r2
+ 8005820:	617b      	str	r3, [r7, #20]
+  /* Configure for the selected DAC channel: buffer output, trigger */
+  /* Set TSELx and TENx bits according to DAC_Trigger value */
+  /* Set BOFFx bit according to DAC_OutputBuffer value */   
+  tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
+ 8005822:	68bb      	ldr	r3, [r7, #8]
+ 8005824:	681a      	ldr	r2, [r3, #0]
+ 8005826:	68bb      	ldr	r3, [r7, #8]
+ 8005828:	685b      	ldr	r3, [r3, #4]
+ 800582a:	4313      	orrs	r3, r2
+ 800582c:	613b      	str	r3, [r7, #16]
+  /* Calculate CR register value depending on DAC_Channel */
+  tmpreg1 |= tmpreg2 << Channel;
+ 800582e:	693a      	ldr	r2, [r7, #16]
+ 8005830:	687b      	ldr	r3, [r7, #4]
+ 8005832:	fa02 f303 	lsl.w	r3, r2, r3
+ 8005836:	697a      	ldr	r2, [r7, #20]
+ 8005838:	4313      	orrs	r3, r2
+ 800583a:	617b      	str	r3, [r7, #20]
+  /* Write to DAC CR */
+  hdac->Instance->CR = tmpreg1;
+ 800583c:	68fb      	ldr	r3, [r7, #12]
+ 800583e:	681b      	ldr	r3, [r3, #0]
+ 8005840:	697a      	ldr	r2, [r7, #20]
+ 8005842:	601a      	str	r2, [r3, #0]
+  /* Disable wave generation */
+  hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
+ 8005844:	68fb      	ldr	r3, [r7, #12]
+ 8005846:	681b      	ldr	r3, [r3, #0]
+ 8005848:	6819      	ldr	r1, [r3, #0]
+ 800584a:	22c0      	movs	r2, #192	; 0xc0
+ 800584c:	687b      	ldr	r3, [r7, #4]
+ 800584e:	fa02 f303 	lsl.w	r3, r2, r3
+ 8005852:	43da      	mvns	r2, r3
+ 8005854:	68fb      	ldr	r3, [r7, #12]
+ 8005856:	681b      	ldr	r3, [r3, #0]
+ 8005858:	400a      	ands	r2, r1
+ 800585a:	601a      	str	r2, [r3, #0]
+  
+  /* Change DAC state */
+  hdac->State = HAL_DAC_STATE_READY;
+ 800585c:	68fb      	ldr	r3, [r7, #12]
+ 800585e:	2201      	movs	r2, #1
+ 8005860:	711a      	strb	r2, [r3, #4]
+  
+  /* Process unlocked */
+  __HAL_UNLOCK(hdac);
+ 8005862:	68fb      	ldr	r3, [r7, #12]
+ 8005864:	2200      	movs	r2, #0
+ 8005866:	715a      	strb	r2, [r3, #5]
+  
+  /* Return function status */
+  return HAL_OK;
+ 8005868:	2300      	movs	r3, #0
+}
+ 800586a:	4618      	mov	r0, r3
+ 800586c:	371c      	adds	r7, #28
+ 800586e:	46bd      	mov	sp, r7
+ 8005870:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005874:	4770      	bx	lr
+
+08005876 <HAL_DACEx_DMAUnderrunCallbackCh2>:
+  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
+  *         the configuration information for the specified DAC.
+  * @retval None
+  */
+__weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
+{
+ 8005876:	b480      	push	{r7}
+ 8005878:	b083      	sub	sp, #12
+ 800587a:	af00      	add	r7, sp, #0
+ 800587c:	6078      	str	r0, [r7, #4]
+  UNUSED(hdac);
+ 
+  /* NOTE : This function Should not be modified, when the callback is needed,
+            the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
+   */
+}
+ 800587e:	bf00      	nop
+ 8005880:	370c      	adds	r7, #12
+ 8005882:	46bd      	mov	sp, r7
+ 8005884:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005888:	4770      	bx	lr
+	...
+
+0800588c <HAL_DMA_Init>:
+  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
+  *               the configuration information for the specified DMA Stream.  
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
+{
+ 800588c:	b580      	push	{r7, lr}
+ 800588e:	b086      	sub	sp, #24
+ 8005890:	af00      	add	r7, sp, #0
+ 8005892:	6078      	str	r0, [r7, #4]
+  uint32_t tmp = 0U;
+ 8005894:	2300      	movs	r3, #0
+ 8005896:	617b      	str	r3, [r7, #20]
+  uint32_t tickstart = HAL_GetTick();
+ 8005898:	f7ff f956 	bl	8004b48 <HAL_GetTick>
+ 800589c:	6138      	str	r0, [r7, #16]
+  DMA_Base_Registers *regs;
+
+  /* Check the DMA peripheral state */
+  if(hdma == NULL)
+ 800589e:	687b      	ldr	r3, [r7, #4]
+ 80058a0:	2b00      	cmp	r3, #0
+ 80058a2:	d101      	bne.n	80058a8 <HAL_DMA_Init+0x1c>
+  {
+    return HAL_ERROR;
+ 80058a4:	2301      	movs	r3, #1
+ 80058a6:	e099      	b.n	80059dc <HAL_DMA_Init+0x150>
+    assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
+    assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
+  }
+  
+  /* Allocate lock resource */
+  __HAL_UNLOCK(hdma);
+ 80058a8:	687b      	ldr	r3, [r7, #4]
+ 80058aa:	2200      	movs	r2, #0
+ 80058ac:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
+
+  /* Change DMA peripheral state */
+  hdma->State = HAL_DMA_STATE_BUSY;
+ 80058b0:	687b      	ldr	r3, [r7, #4]
+ 80058b2:	2202      	movs	r2, #2
+ 80058b4:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
+  
+  /* Disable the peripheral */
+  __HAL_DMA_DISABLE(hdma);
+ 80058b8:	687b      	ldr	r3, [r7, #4]
+ 80058ba:	681b      	ldr	r3, [r3, #0]
+ 80058bc:	681a      	ldr	r2, [r3, #0]
+ 80058be:	687b      	ldr	r3, [r7, #4]
+ 80058c0:	681b      	ldr	r3, [r3, #0]
+ 80058c2:	f022 0201 	bic.w	r2, r2, #1
+ 80058c6:	601a      	str	r2, [r3, #0]
+  
+  /* Check if the DMA Stream is effectively disabled */
+  while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
+ 80058c8:	e00f      	b.n	80058ea <HAL_DMA_Init+0x5e>
+  {
+    /* Check for the Timeout */
+    if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
+ 80058ca:	f7ff f93d 	bl	8004b48 <HAL_GetTick>
+ 80058ce:	4602      	mov	r2, r0
+ 80058d0:	693b      	ldr	r3, [r7, #16]
+ 80058d2:	1ad3      	subs	r3, r2, r3
+ 80058d4:	2b05      	cmp	r3, #5
+ 80058d6:	d908      	bls.n	80058ea <HAL_DMA_Init+0x5e>
+    {
+      /* Update error code */
+      hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
+ 80058d8:	687b      	ldr	r3, [r7, #4]
+ 80058da:	2220      	movs	r2, #32
+ 80058dc:	655a      	str	r2, [r3, #84]	; 0x54
+      
+      /* Change the DMA state */
+      hdma->State = HAL_DMA_STATE_TIMEOUT;
+ 80058de:	687b      	ldr	r3, [r7, #4]
+ 80058e0:	2203      	movs	r2, #3
+ 80058e2:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
+      
+      return HAL_TIMEOUT;
+ 80058e6:	2303      	movs	r3, #3
+ 80058e8:	e078      	b.n	80059dc <HAL_DMA_Init+0x150>
+  while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
+ 80058ea:	687b      	ldr	r3, [r7, #4]
+ 80058ec:	681b      	ldr	r3, [r3, #0]
+ 80058ee:	681b      	ldr	r3, [r3, #0]
+ 80058f0:	f003 0301 	and.w	r3, r3, #1
+ 80058f4:	2b00      	cmp	r3, #0
+ 80058f6:	d1e8      	bne.n	80058ca <HAL_DMA_Init+0x3e>
+    }
+  }
+  
+  /* Get the CR register value */
+  tmp = hdma->Instance->CR;
+ 80058f8:	687b      	ldr	r3, [r7, #4]
+ 80058fa:	681b      	ldr	r3, [r3, #0]
+ 80058fc:	681b      	ldr	r3, [r3, #0]
+ 80058fe:	617b      	str	r3, [r7, #20]
+
+  /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
+  tmp &= ((uint32_t)~(DMA_SxCR_CHSEL | DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
+ 8005900:	697a      	ldr	r2, [r7, #20]
+ 8005902:	4b38      	ldr	r3, [pc, #224]	; (80059e4 <HAL_DMA_Init+0x158>)
+ 8005904:	4013      	ands	r3, r2
+ 8005906:	617b      	str	r3, [r7, #20]
+                      DMA_SxCR_PL    | DMA_SxCR_MSIZE  | DMA_SxCR_PSIZE  | \
+                      DMA_SxCR_MINC  | DMA_SxCR_PINC   | DMA_SxCR_CIRC   | \
+                      DMA_SxCR_DIR   | DMA_SxCR_CT     | DMA_SxCR_DBM));
+
+  /* Prepare the DMA Stream configuration */
+  tmp |=  hdma->Init.Channel             | hdma->Init.Direction        |
+ 8005908:	687b      	ldr	r3, [r7, #4]
+ 800590a:	685a      	ldr	r2, [r3, #4]
+ 800590c:	687b      	ldr	r3, [r7, #4]
+ 800590e:	689b      	ldr	r3, [r3, #8]
+ 8005910:	431a      	orrs	r2, r3
+          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
+ 8005912:	687b      	ldr	r3, [r7, #4]
+ 8005914:	68db      	ldr	r3, [r3, #12]
+  tmp |=  hdma->Init.Channel             | hdma->Init.Direction        |
+ 8005916:	431a      	orrs	r2, r3
+          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
+ 8005918:	687b      	ldr	r3, [r7, #4]
+ 800591a:	691b      	ldr	r3, [r3, #16]
+ 800591c:	431a      	orrs	r2, r3
+          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
+ 800591e:	687b      	ldr	r3, [r7, #4]
+ 8005920:	695b      	ldr	r3, [r3, #20]
+          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
+ 8005922:	431a      	orrs	r2, r3
+          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
+ 8005924:	687b      	ldr	r3, [r7, #4]
+ 8005926:	699b      	ldr	r3, [r3, #24]
+ 8005928:	431a      	orrs	r2, r3
+          hdma->Init.Mode                | hdma->Init.Priority;
+ 800592a:	687b      	ldr	r3, [r7, #4]
+ 800592c:	69db      	ldr	r3, [r3, #28]
+          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
+ 800592e:	431a      	orrs	r2, r3
+          hdma->Init.Mode                | hdma->Init.Priority;
+ 8005930:	687b      	ldr	r3, [r7, #4]
+ 8005932:	6a1b      	ldr	r3, [r3, #32]
+ 8005934:	4313      	orrs	r3, r2
+  tmp |=  hdma->Init.Channel             | hdma->Init.Direction        |
+ 8005936:	697a      	ldr	r2, [r7, #20]
+ 8005938:	4313      	orrs	r3, r2
+ 800593a:	617b      	str	r3, [r7, #20]
+
+  /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
+  if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
+ 800593c:	687b      	ldr	r3, [r7, #4]
+ 800593e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8005940:	2b04      	cmp	r3, #4
+ 8005942:	d107      	bne.n	8005954 <HAL_DMA_Init+0xc8>
+  {
+    /* Get memory burst and peripheral burst */
+    tmp |=  hdma->Init.MemBurst | hdma->Init.PeriphBurst;
+ 8005944:	687b      	ldr	r3, [r7, #4]
+ 8005946:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8005948:	687b      	ldr	r3, [r7, #4]
+ 800594a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800594c:	4313      	orrs	r3, r2
+ 800594e:	697a      	ldr	r2, [r7, #20]
+ 8005950:	4313      	orrs	r3, r2
+ 8005952:	617b      	str	r3, [r7, #20]
+  }
+  
+  /* Write to DMA Stream CR register */
+  hdma->Instance->CR = tmp;  
+ 8005954:	687b      	ldr	r3, [r7, #4]
+ 8005956:	681b      	ldr	r3, [r3, #0]
+ 8005958:	697a      	ldr	r2, [r7, #20]
+ 800595a:	601a      	str	r2, [r3, #0]
+
+  /* Get the FCR register value */
+  tmp = hdma->Instance->FCR;
+ 800595c:	687b      	ldr	r3, [r7, #4]
+ 800595e:	681b      	ldr	r3, [r3, #0]
+ 8005960:	695b      	ldr	r3, [r3, #20]
+ 8005962:	617b      	str	r3, [r7, #20]
+
+  /* Clear Direct mode and FIFO threshold bits */
+  tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
+ 8005964:	697b      	ldr	r3, [r7, #20]
+ 8005966:	f023 0307 	bic.w	r3, r3, #7
+ 800596a:	617b      	str	r3, [r7, #20]
+
+  /* Prepare the DMA Stream FIFO configuration */
+  tmp |= hdma->Init.FIFOMode;
+ 800596c:	687b      	ldr	r3, [r7, #4]
+ 800596e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8005970:	697a      	ldr	r2, [r7, #20]
+ 8005972:	4313      	orrs	r3, r2
+ 8005974:	617b      	str	r3, [r7, #20]
+
+  /* The FIFO threshold is not used when the FIFO mode is disabled */
+  if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
+ 8005976:	687b      	ldr	r3, [r7, #4]
+ 8005978:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800597a:	2b04      	cmp	r3, #4
+ 800597c:	d117      	bne.n	80059ae <HAL_DMA_Init+0x122>
+  {
+    /* Get the FIFO threshold */
+    tmp |= hdma->Init.FIFOThreshold;
+ 800597e:	687b      	ldr	r3, [r7, #4]
+ 8005980:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 8005982:	697a      	ldr	r2, [r7, #20]
+ 8005984:	4313      	orrs	r3, r2
+ 8005986:	617b      	str	r3, [r7, #20]
+    
+    /* Check compatibility between FIFO threshold level and size of the memory burst */
+    /* for INCR4, INCR8, INCR16 bursts */
+    if (hdma->Init.MemBurst != DMA_MBURST_SINGLE)
+ 8005988:	687b      	ldr	r3, [r7, #4]
+ 800598a:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800598c:	2b00      	cmp	r3, #0
+ 800598e:	d00e      	beq.n	80059ae <HAL_DMA_Init+0x122>
+    {
+      if (DMA_CheckFifoParam(hdma) != HAL_OK)
+ 8005990:	6878      	ldr	r0, [r7, #4]
+ 8005992:	f000 f8bd 	bl	8005b10 <DMA_CheckFifoParam>
+ 8005996:	4603      	mov	r3, r0
+ 8005998:	2b00      	cmp	r3, #0
+ 800599a:	d008      	beq.n	80059ae <HAL_DMA_Init+0x122>
+      {
+        /* Update error code */
+        hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
+ 800599c:	687b      	ldr	r3, [r7, #4]
+ 800599e:	2240      	movs	r2, #64	; 0x40
+ 80059a0:	655a      	str	r2, [r3, #84]	; 0x54
+        
+        /* Change the DMA state */
+        hdma->State = HAL_DMA_STATE_READY;
+ 80059a2:	687b      	ldr	r3, [r7, #4]
+ 80059a4:	2201      	movs	r2, #1
+ 80059a6:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
+        
+        return HAL_ERROR; 
+ 80059aa:	2301      	movs	r3, #1
+ 80059ac:	e016      	b.n	80059dc <HAL_DMA_Init+0x150>
+      }
+    }
+  }
+  
+  /* Write to DMA Stream FCR */
+  hdma->Instance->FCR = tmp;
+ 80059ae:	687b      	ldr	r3, [r7, #4]
+ 80059b0:	681b      	ldr	r3, [r3, #0]
+ 80059b2:	697a      	ldr	r2, [r7, #20]
+ 80059b4:	615a      	str	r2, [r3, #20]
+
+  /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
+     DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
+  regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
+ 80059b6:	6878      	ldr	r0, [r7, #4]
+ 80059b8:	f000 f874 	bl	8005aa4 <DMA_CalcBaseAndBitshift>
+ 80059bc:	4603      	mov	r3, r0
+ 80059be:	60fb      	str	r3, [r7, #12]
+  
+  /* Clear all interrupt flags */
+  regs->IFCR = 0x3FU << hdma->StreamIndex;
+ 80059c0:	687b      	ldr	r3, [r7, #4]
+ 80059c2:	6ddb      	ldr	r3, [r3, #92]	; 0x5c
+ 80059c4:	223f      	movs	r2, #63	; 0x3f
+ 80059c6:	409a      	lsls	r2, r3
+ 80059c8:	68fb      	ldr	r3, [r7, #12]
+ 80059ca:	609a      	str	r2, [r3, #8]
+
+  /* Initialize the error code */
+  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
+ 80059cc:	687b      	ldr	r3, [r7, #4]
+ 80059ce:	2200      	movs	r2, #0
+ 80059d0:	655a      	str	r2, [r3, #84]	; 0x54
+                                                                                     
+  /* Initialize the DMA state */
+  hdma->State = HAL_DMA_STATE_READY;
+ 80059d2:	687b      	ldr	r3, [r7, #4]
+ 80059d4:	2201      	movs	r2, #1
+ 80059d6:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
+
+  return HAL_OK;
+ 80059da:	2300      	movs	r3, #0
+}
+ 80059dc:	4618      	mov	r0, r3
+ 80059de:	3718      	adds	r7, #24
+ 80059e0:	46bd      	mov	sp, r7
+ 80059e2:	bd80      	pop	{r7, pc}
+ 80059e4:	f010803f 	.word	0xf010803f
+
+080059e8 <HAL_DMA_DeInit>:
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
+  *               the configuration information for the specified DMA Stream.  
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
+{
+ 80059e8:	b580      	push	{r7, lr}
+ 80059ea:	b084      	sub	sp, #16
+ 80059ec:	af00      	add	r7, sp, #0
+ 80059ee:	6078      	str	r0, [r7, #4]
+  DMA_Base_Registers *regs;
+
+  /* Check the DMA peripheral state */
+  if(hdma == NULL)
+ 80059f0:	687b      	ldr	r3, [r7, #4]
+ 80059f2:	2b00      	cmp	r3, #0
+ 80059f4:	d101      	bne.n	80059fa <HAL_DMA_DeInit+0x12>
+  {
+    return HAL_ERROR;
+ 80059f6:	2301      	movs	r3, #1
+ 80059f8:	e050      	b.n	8005a9c <HAL_DMA_DeInit+0xb4>
+  }
+  
+  /* Check the DMA peripheral state */
+  if(hdma->State == HAL_DMA_STATE_BUSY)
+ 80059fa:	687b      	ldr	r3, [r7, #4]
+ 80059fc:	f893 3035 	ldrb.w	r3, [r3, #53]	; 0x35
+ 8005a00:	b2db      	uxtb	r3, r3
+ 8005a02:	2b02      	cmp	r3, #2
+ 8005a04:	d101      	bne.n	8005a0a <HAL_DMA_DeInit+0x22>
+  {
+    /* Return error status */
+    return HAL_BUSY;
+ 8005a06:	2302      	movs	r3, #2
+ 8005a08:	e048      	b.n	8005a9c <HAL_DMA_DeInit+0xb4>
+
+  /* Check the parameters */
+  assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
+
+  /* Disable the selected DMA Streamx */
+  __HAL_DMA_DISABLE(hdma);
+ 8005a0a:	687b      	ldr	r3, [r7, #4]
+ 8005a0c:	681b      	ldr	r3, [r3, #0]
+ 8005a0e:	681a      	ldr	r2, [r3, #0]
+ 8005a10:	687b      	ldr	r3, [r7, #4]
+ 8005a12:	681b      	ldr	r3, [r3, #0]
+ 8005a14:	f022 0201 	bic.w	r2, r2, #1
+ 8005a18:	601a      	str	r2, [r3, #0]
+
+  /* Reset DMA Streamx control register */
+  hdma->Instance->CR   = 0U;
+ 8005a1a:	687b      	ldr	r3, [r7, #4]
+ 8005a1c:	681b      	ldr	r3, [r3, #0]
+ 8005a1e:	2200      	movs	r2, #0
+ 8005a20:	601a      	str	r2, [r3, #0]
+
+  /* Reset DMA Streamx number of data to transfer register */
+  hdma->Instance->NDTR = 0U;
+ 8005a22:	687b      	ldr	r3, [r7, #4]
+ 8005a24:	681b      	ldr	r3, [r3, #0]
+ 8005a26:	2200      	movs	r2, #0
+ 8005a28:	605a      	str	r2, [r3, #4]
+
+  /* Reset DMA Streamx peripheral address register */
+  hdma->Instance->PAR  = 0U;
+ 8005a2a:	687b      	ldr	r3, [r7, #4]
+ 8005a2c:	681b      	ldr	r3, [r3, #0]
+ 8005a2e:	2200      	movs	r2, #0
+ 8005a30:	609a      	str	r2, [r3, #8]
+
+  /* Reset DMA Streamx memory 0 address register */
+  hdma->Instance->M0AR = 0U;
+ 8005a32:	687b      	ldr	r3, [r7, #4]
+ 8005a34:	681b      	ldr	r3, [r3, #0]
+ 8005a36:	2200      	movs	r2, #0
+ 8005a38:	60da      	str	r2, [r3, #12]
+  
+  /* Reset DMA Streamx memory 1 address register */
+  hdma->Instance->M1AR = 0U;
+ 8005a3a:	687b      	ldr	r3, [r7, #4]
+ 8005a3c:	681b      	ldr	r3, [r3, #0]
+ 8005a3e:	2200      	movs	r2, #0
+ 8005a40:	611a      	str	r2, [r3, #16]
+  
+  /* Reset DMA Streamx FIFO control register */
+  hdma->Instance->FCR  = (uint32_t)0x00000021U;
+ 8005a42:	687b      	ldr	r3, [r7, #4]
+ 8005a44:	681b      	ldr	r3, [r3, #0]
+ 8005a46:	2221      	movs	r2, #33	; 0x21
+ 8005a48:	615a      	str	r2, [r3, #20]
+  
+  /* Get DMA steam Base Address */  
+  regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
+ 8005a4a:	6878      	ldr	r0, [r7, #4]
+ 8005a4c:	f000 f82a 	bl	8005aa4 <DMA_CalcBaseAndBitshift>
+ 8005a50:	4603      	mov	r3, r0
+ 8005a52:	60fb      	str	r3, [r7, #12]
+  
+  /* Clear all interrupt flags at correct offset within the register */
+  regs->IFCR = 0x3FU << hdma->StreamIndex;
+ 8005a54:	687b      	ldr	r3, [r7, #4]
+ 8005a56:	6ddb      	ldr	r3, [r3, #92]	; 0x5c
+ 8005a58:	223f      	movs	r2, #63	; 0x3f
+ 8005a5a:	409a      	lsls	r2, r3
+ 8005a5c:	68fb      	ldr	r3, [r7, #12]
+ 8005a5e:	609a      	str	r2, [r3, #8]
+  
+  /* Clean all callbacks */
+  hdma->XferCpltCallback = NULL;
+ 8005a60:	687b      	ldr	r3, [r7, #4]
+ 8005a62:	2200      	movs	r2, #0
+ 8005a64:	63da      	str	r2, [r3, #60]	; 0x3c
+  hdma->XferHalfCpltCallback = NULL;
+ 8005a66:	687b      	ldr	r3, [r7, #4]
+ 8005a68:	2200      	movs	r2, #0
+ 8005a6a:	641a      	str	r2, [r3, #64]	; 0x40
+  hdma->XferM1CpltCallback = NULL;
+ 8005a6c:	687b      	ldr	r3, [r7, #4]
+ 8005a6e:	2200      	movs	r2, #0
+ 8005a70:	645a      	str	r2, [r3, #68]	; 0x44
+  hdma->XferM1HalfCpltCallback = NULL;
+ 8005a72:	687b      	ldr	r3, [r7, #4]
+ 8005a74:	2200      	movs	r2, #0
+ 8005a76:	649a      	str	r2, [r3, #72]	; 0x48
+  hdma->XferErrorCallback = NULL;
+ 8005a78:	687b      	ldr	r3, [r7, #4]
+ 8005a7a:	2200      	movs	r2, #0
+ 8005a7c:	64da      	str	r2, [r3, #76]	; 0x4c
+  hdma->XferAbortCallback = NULL;  
+ 8005a7e:	687b      	ldr	r3, [r7, #4]
+ 8005a80:	2200      	movs	r2, #0
+ 8005a82:	651a      	str	r2, [r3, #80]	; 0x50
+
+  /* Reset the error code */
+  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
+ 8005a84:	687b      	ldr	r3, [r7, #4]
+ 8005a86:	2200      	movs	r2, #0
+ 8005a88:	655a      	str	r2, [r3, #84]	; 0x54
+
+  /* Reset the DMA state */
+  hdma->State = HAL_DMA_STATE_RESET;
+ 8005a8a:	687b      	ldr	r3, [r7, #4]
+ 8005a8c:	2200      	movs	r2, #0
+ 8005a8e:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
+
+  /* Release Lock */
+  __HAL_UNLOCK(hdma);
+ 8005a92:	687b      	ldr	r3, [r7, #4]
+ 8005a94:	2200      	movs	r2, #0
+ 8005a96:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
+
+  return HAL_OK;
+ 8005a9a:	2300      	movs	r3, #0
+}
+ 8005a9c:	4618      	mov	r0, r3
+ 8005a9e:	3710      	adds	r7, #16
+ 8005aa0:	46bd      	mov	sp, r7
+ 8005aa2:	bd80      	pop	{r7, pc}
+
+08005aa4 <DMA_CalcBaseAndBitshift>:
+  * @param  hdma       pointer to a DMA_HandleTypeDef structure that contains
+  *                     the configuration information for the specified DMA Stream. 
+  * @retval Stream base address
+  */
+static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
+{
+ 8005aa4:	b480      	push	{r7}
+ 8005aa6:	b085      	sub	sp, #20
+ 8005aa8:	af00      	add	r7, sp, #0
+ 8005aaa:	6078      	str	r0, [r7, #4]
+  uint32_t stream_number = (((uint32_t)hdma->Instance & 0xFFU) - 16U) / 24U;
+ 8005aac:	687b      	ldr	r3, [r7, #4]
+ 8005aae:	681b      	ldr	r3, [r3, #0]
+ 8005ab0:	b2db      	uxtb	r3, r3
+ 8005ab2:	3b10      	subs	r3, #16
+ 8005ab4:	4a13      	ldr	r2, [pc, #76]	; (8005b04 <DMA_CalcBaseAndBitshift+0x60>)
+ 8005ab6:	fba2 2303 	umull	r2, r3, r2, r3
+ 8005aba:	091b      	lsrs	r3, r3, #4
+ 8005abc:	60fb      	str	r3, [r7, #12]
+  
+  /* lookup table for necessary bitshift of flags within status registers */
+  static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
+  hdma->StreamIndex = flagBitshiftOffset[stream_number];
+ 8005abe:	4a12      	ldr	r2, [pc, #72]	; (8005b08 <DMA_CalcBaseAndBitshift+0x64>)
+ 8005ac0:	68fb      	ldr	r3, [r7, #12]
+ 8005ac2:	4413      	add	r3, r2
+ 8005ac4:	781b      	ldrb	r3, [r3, #0]
+ 8005ac6:	461a      	mov	r2, r3
+ 8005ac8:	687b      	ldr	r3, [r7, #4]
+ 8005aca:	65da      	str	r2, [r3, #92]	; 0x5c
+  
+  if (stream_number > 3U)
+ 8005acc:	68fb      	ldr	r3, [r7, #12]
+ 8005ace:	2b03      	cmp	r3, #3
+ 8005ad0:	d908      	bls.n	8005ae4 <DMA_CalcBaseAndBitshift+0x40>
+  {
+    /* return pointer to HISR and HIFCR */
+    hdma->StreamBaseAddress = (((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)) + 4U);
+ 8005ad2:	687b      	ldr	r3, [r7, #4]
+ 8005ad4:	681b      	ldr	r3, [r3, #0]
+ 8005ad6:	461a      	mov	r2, r3
+ 8005ad8:	4b0c      	ldr	r3, [pc, #48]	; (8005b0c <DMA_CalcBaseAndBitshift+0x68>)
+ 8005ada:	4013      	ands	r3, r2
+ 8005adc:	1d1a      	adds	r2, r3, #4
+ 8005ade:	687b      	ldr	r3, [r7, #4]
+ 8005ae0:	659a      	str	r2, [r3, #88]	; 0x58
+ 8005ae2:	e006      	b.n	8005af2 <DMA_CalcBaseAndBitshift+0x4e>
+  }
+  else
+  {
+    /* return pointer to LISR and LIFCR */
+    hdma->StreamBaseAddress = ((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU));
+ 8005ae4:	687b      	ldr	r3, [r7, #4]
+ 8005ae6:	681b      	ldr	r3, [r3, #0]
+ 8005ae8:	461a      	mov	r2, r3
+ 8005aea:	4b08      	ldr	r3, [pc, #32]	; (8005b0c <DMA_CalcBaseAndBitshift+0x68>)
+ 8005aec:	4013      	ands	r3, r2
+ 8005aee:	687a      	ldr	r2, [r7, #4]
+ 8005af0:	6593      	str	r3, [r2, #88]	; 0x58
+  }
+  
+  return hdma->StreamBaseAddress;
+ 8005af2:	687b      	ldr	r3, [r7, #4]
+ 8005af4:	6d9b      	ldr	r3, [r3, #88]	; 0x58
+}
+ 8005af6:	4618      	mov	r0, r3
+ 8005af8:	3714      	adds	r7, #20
+ 8005afa:	46bd      	mov	sp, r7
+ 8005afc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005b00:	4770      	bx	lr
+ 8005b02:	bf00      	nop
+ 8005b04:	aaaaaaab 	.word	0xaaaaaaab
+ 8005b08:	08022470 	.word	0x08022470
+ 8005b0c:	fffffc00 	.word	0xfffffc00
+
+08005b10 <DMA_CheckFifoParam>:
+  * @param  hdma       pointer to a DMA_HandleTypeDef structure that contains
+  *                     the configuration information for the specified DMA Stream. 
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
+{
+ 8005b10:	b480      	push	{r7}
+ 8005b12:	b085      	sub	sp, #20
+ 8005b14:	af00      	add	r7, sp, #0
+ 8005b16:	6078      	str	r0, [r7, #4]
+  HAL_StatusTypeDef status = HAL_OK;
+ 8005b18:	2300      	movs	r3, #0
+ 8005b1a:	73fb      	strb	r3, [r7, #15]
+  uint32_t tmp = hdma->Init.FIFOThreshold;
+ 8005b1c:	687b      	ldr	r3, [r7, #4]
+ 8005b1e:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 8005b20:	60bb      	str	r3, [r7, #8]
+  
+  /* Memory Data size equal to Byte */
+  if(hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
+ 8005b22:	687b      	ldr	r3, [r7, #4]
+ 8005b24:	699b      	ldr	r3, [r3, #24]
+ 8005b26:	2b00      	cmp	r3, #0
+ 8005b28:	d11f      	bne.n	8005b6a <DMA_CheckFifoParam+0x5a>
+  {
+    switch (tmp)
+ 8005b2a:	68bb      	ldr	r3, [r7, #8]
+ 8005b2c:	2b03      	cmp	r3, #3
+ 8005b2e:	d855      	bhi.n	8005bdc <DMA_CheckFifoParam+0xcc>
+ 8005b30:	a201      	add	r2, pc, #4	; (adr r2, 8005b38 <DMA_CheckFifoParam+0x28>)
+ 8005b32:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 8005b36:	bf00      	nop
+ 8005b38:	08005b49 	.word	0x08005b49
+ 8005b3c:	08005b5b 	.word	0x08005b5b
+ 8005b40:	08005b49 	.word	0x08005b49
+ 8005b44:	08005bdd 	.word	0x08005bdd
+    {
+    case DMA_FIFO_THRESHOLD_1QUARTERFULL:
+    case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
+      if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
+ 8005b48:	687b      	ldr	r3, [r7, #4]
+ 8005b4a:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8005b4c:	f003 7380 	and.w	r3, r3, #16777216	; 0x1000000
+ 8005b50:	2b00      	cmp	r3, #0
+ 8005b52:	d045      	beq.n	8005be0 <DMA_CheckFifoParam+0xd0>
+      {
+        status = HAL_ERROR;
+ 8005b54:	2301      	movs	r3, #1
+ 8005b56:	73fb      	strb	r3, [r7, #15]
+      }
+      break;
+ 8005b58:	e042      	b.n	8005be0 <DMA_CheckFifoParam+0xd0>
+    case DMA_FIFO_THRESHOLD_HALFFULL:
+      if (hdma->Init.MemBurst == DMA_MBURST_INC16)
+ 8005b5a:	687b      	ldr	r3, [r7, #4]
+ 8005b5c:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8005b5e:	f1b3 7fc0 	cmp.w	r3, #25165824	; 0x1800000
+ 8005b62:	d13f      	bne.n	8005be4 <DMA_CheckFifoParam+0xd4>
+      {
+        status = HAL_ERROR;
+ 8005b64:	2301      	movs	r3, #1
+ 8005b66:	73fb      	strb	r3, [r7, #15]
+      }
+      break;
+ 8005b68:	e03c      	b.n	8005be4 <DMA_CheckFifoParam+0xd4>
+      break;
+    }
+  }
+  
+  /* Memory Data size equal to Half-Word */
+  else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
+ 8005b6a:	687b      	ldr	r3, [r7, #4]
+ 8005b6c:	699b      	ldr	r3, [r3, #24]
+ 8005b6e:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
+ 8005b72:	d121      	bne.n	8005bb8 <DMA_CheckFifoParam+0xa8>
+  {
+    switch (tmp)
+ 8005b74:	68bb      	ldr	r3, [r7, #8]
+ 8005b76:	2b03      	cmp	r3, #3
+ 8005b78:	d836      	bhi.n	8005be8 <DMA_CheckFifoParam+0xd8>
+ 8005b7a:	a201      	add	r2, pc, #4	; (adr r2, 8005b80 <DMA_CheckFifoParam+0x70>)
+ 8005b7c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 8005b80:	08005b91 	.word	0x08005b91
+ 8005b84:	08005b97 	.word	0x08005b97
+ 8005b88:	08005b91 	.word	0x08005b91
+ 8005b8c:	08005ba9 	.word	0x08005ba9
+    {
+    case DMA_FIFO_THRESHOLD_1QUARTERFULL:
+    case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
+      status = HAL_ERROR;
+ 8005b90:	2301      	movs	r3, #1
+ 8005b92:	73fb      	strb	r3, [r7, #15]
+      break;
+ 8005b94:	e02f      	b.n	8005bf6 <DMA_CheckFifoParam+0xe6>
+    case DMA_FIFO_THRESHOLD_HALFFULL:
+      if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
+ 8005b96:	687b      	ldr	r3, [r7, #4]
+ 8005b98:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8005b9a:	f003 7380 	and.w	r3, r3, #16777216	; 0x1000000
+ 8005b9e:	2b00      	cmp	r3, #0
+ 8005ba0:	d024      	beq.n	8005bec <DMA_CheckFifoParam+0xdc>
+      {
+        status = HAL_ERROR;
+ 8005ba2:	2301      	movs	r3, #1
+ 8005ba4:	73fb      	strb	r3, [r7, #15]
+      }
+      break;
+ 8005ba6:	e021      	b.n	8005bec <DMA_CheckFifoParam+0xdc>
+    case DMA_FIFO_THRESHOLD_FULL:
+      if (hdma->Init.MemBurst == DMA_MBURST_INC16)
+ 8005ba8:	687b      	ldr	r3, [r7, #4]
+ 8005baa:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8005bac:	f1b3 7fc0 	cmp.w	r3, #25165824	; 0x1800000
+ 8005bb0:	d11e      	bne.n	8005bf0 <DMA_CheckFifoParam+0xe0>
+      {
+        status = HAL_ERROR;
+ 8005bb2:	2301      	movs	r3, #1
+ 8005bb4:	73fb      	strb	r3, [r7, #15]
+      }
+      break;   
+ 8005bb6:	e01b      	b.n	8005bf0 <DMA_CheckFifoParam+0xe0>
+  }
+  
+  /* Memory Data size equal to Word */
+  else
+  {
+    switch (tmp)
+ 8005bb8:	68bb      	ldr	r3, [r7, #8]
+ 8005bba:	2b02      	cmp	r3, #2
+ 8005bbc:	d902      	bls.n	8005bc4 <DMA_CheckFifoParam+0xb4>
+ 8005bbe:	2b03      	cmp	r3, #3
+ 8005bc0:	d003      	beq.n	8005bca <DMA_CheckFifoParam+0xba>
+      {
+        status = HAL_ERROR;
+      }
+      break;
+    default:
+      break;
+ 8005bc2:	e018      	b.n	8005bf6 <DMA_CheckFifoParam+0xe6>
+      status = HAL_ERROR;
+ 8005bc4:	2301      	movs	r3, #1
+ 8005bc6:	73fb      	strb	r3, [r7, #15]
+      break;
+ 8005bc8:	e015      	b.n	8005bf6 <DMA_CheckFifoParam+0xe6>
+      if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
+ 8005bca:	687b      	ldr	r3, [r7, #4]
+ 8005bcc:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8005bce:	f003 7380 	and.w	r3, r3, #16777216	; 0x1000000
+ 8005bd2:	2b00      	cmp	r3, #0
+ 8005bd4:	d00e      	beq.n	8005bf4 <DMA_CheckFifoParam+0xe4>
+        status = HAL_ERROR;
+ 8005bd6:	2301      	movs	r3, #1
+ 8005bd8:	73fb      	strb	r3, [r7, #15]
+      break;
+ 8005bda:	e00b      	b.n	8005bf4 <DMA_CheckFifoParam+0xe4>
+      break;
+ 8005bdc:	bf00      	nop
+ 8005bde:	e00a      	b.n	8005bf6 <DMA_CheckFifoParam+0xe6>
+      break;
+ 8005be0:	bf00      	nop
+ 8005be2:	e008      	b.n	8005bf6 <DMA_CheckFifoParam+0xe6>
+      break;
+ 8005be4:	bf00      	nop
+ 8005be6:	e006      	b.n	8005bf6 <DMA_CheckFifoParam+0xe6>
+      break;
+ 8005be8:	bf00      	nop
+ 8005bea:	e004      	b.n	8005bf6 <DMA_CheckFifoParam+0xe6>
+      break;
+ 8005bec:	bf00      	nop
+ 8005bee:	e002      	b.n	8005bf6 <DMA_CheckFifoParam+0xe6>
+      break;   
+ 8005bf0:	bf00      	nop
+ 8005bf2:	e000      	b.n	8005bf6 <DMA_CheckFifoParam+0xe6>
+      break;
+ 8005bf4:	bf00      	nop
+    }
+  } 
+  
+  return status; 
+ 8005bf6:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 8005bf8:	4618      	mov	r0, r3
+ 8005bfa:	3714      	adds	r7, #20
+ 8005bfc:	46bd      	mov	sp, r7
+ 8005bfe:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005c02:	4770      	bx	lr
+
+08005c04 <HAL_DMA2D_Init>:
+  * @param  hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
+  *                 the configuration information for the DMA2D.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
+{
+ 8005c04:	b580      	push	{r7, lr}
+ 8005c06:	b082      	sub	sp, #8
+ 8005c08:	af00      	add	r7, sp, #0
+ 8005c0a:	6078      	str	r0, [r7, #4]
+  /* Check the DMA2D peripheral state */
+  if(hdma2d == NULL)
+ 8005c0c:	687b      	ldr	r3, [r7, #4]
+ 8005c0e:	2b00      	cmp	r3, #0
+ 8005c10:	d101      	bne.n	8005c16 <HAL_DMA2D_Init+0x12>
+  {
+     return HAL_ERROR;
+ 8005c12:	2301      	movs	r3, #1
+ 8005c14:	e039      	b.n	8005c8a <HAL_DMA2D_Init+0x86>
+
+    /* Init the low level hardware */
+    hdma2d->MspInitCallback(hdma2d);
+  }
+#else
+  if(hdma2d->State == HAL_DMA2D_STATE_RESET)
+ 8005c16:	687b      	ldr	r3, [r7, #4]
+ 8005c18:	f893 3039 	ldrb.w	r3, [r3, #57]	; 0x39
+ 8005c1c:	b2db      	uxtb	r3, r3
+ 8005c1e:	2b00      	cmp	r3, #0
+ 8005c20:	d106      	bne.n	8005c30 <HAL_DMA2D_Init+0x2c>
+  {
+    /* Allocate lock resource and initialize it */
+    hdma2d->Lock = HAL_UNLOCKED;
+ 8005c22:	687b      	ldr	r3, [r7, #4]
+ 8005c24:	2200      	movs	r2, #0
+ 8005c26:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
+    /* Init the low level hardware */
+    HAL_DMA2D_MspInit(hdma2d);
+ 8005c2a:	6878      	ldr	r0, [r7, #4]
+ 8005c2c:	f7fe f982 	bl	8003f34 <HAL_DMA2D_MspInit>
+  }
+#endif /* (USE_HAL_DMA2D_REGISTER_CALLBACKS) */
+
+  /* Change DMA2D peripheral state */
+  hdma2d->State = HAL_DMA2D_STATE_BUSY;
+ 8005c30:	687b      	ldr	r3, [r7, #4]
+ 8005c32:	2202      	movs	r2, #2
+ 8005c34:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
+
+  /* DMA2D CR register configuration -------------------------------------------*/
+  MODIFY_REG(hdma2d->Instance->CR, DMA2D_CR_MODE, hdma2d->Init.Mode);
+ 8005c38:	687b      	ldr	r3, [r7, #4]
+ 8005c3a:	681b      	ldr	r3, [r3, #0]
+ 8005c3c:	681b      	ldr	r3, [r3, #0]
+ 8005c3e:	f423 3140 	bic.w	r1, r3, #196608	; 0x30000
+ 8005c42:	687b      	ldr	r3, [r7, #4]
+ 8005c44:	685a      	ldr	r2, [r3, #4]
+ 8005c46:	687b      	ldr	r3, [r7, #4]
+ 8005c48:	681b      	ldr	r3, [r3, #0]
+ 8005c4a:	430a      	orrs	r2, r1
+ 8005c4c:	601a      	str	r2, [r3, #0]
+
+  /* DMA2D OPFCCR register configuration ---------------------------------------*/
+  MODIFY_REG(hdma2d->Instance->OPFCCR, DMA2D_OPFCCR_CM, hdma2d->Init.ColorMode);
+ 8005c4e:	687b      	ldr	r3, [r7, #4]
+ 8005c50:	681b      	ldr	r3, [r3, #0]
+ 8005c52:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8005c54:	f023 0107 	bic.w	r1, r3, #7
+ 8005c58:	687b      	ldr	r3, [r7, #4]
+ 8005c5a:	689a      	ldr	r2, [r3, #8]
+ 8005c5c:	687b      	ldr	r3, [r7, #4]
+ 8005c5e:	681b      	ldr	r3, [r3, #0]
+ 8005c60:	430a      	orrs	r2, r1
+ 8005c62:	635a      	str	r2, [r3, #52]	; 0x34
+
+  /* DMA2D OOR register configuration ------------------------------------------*/
+  MODIFY_REG(hdma2d->Instance->OOR, DMA2D_OOR_LO, hdma2d->Init.OutputOffset);
+ 8005c64:	687b      	ldr	r3, [r7, #4]
+ 8005c66:	681b      	ldr	r3, [r3, #0]
+ 8005c68:	6c1a      	ldr	r2, [r3, #64]	; 0x40
+ 8005c6a:	4b0a      	ldr	r3, [pc, #40]	; (8005c94 <HAL_DMA2D_Init+0x90>)
+ 8005c6c:	4013      	ands	r3, r2
+ 8005c6e:	687a      	ldr	r2, [r7, #4]
+ 8005c70:	68d1      	ldr	r1, [r2, #12]
+ 8005c72:	687a      	ldr	r2, [r7, #4]
+ 8005c74:	6812      	ldr	r2, [r2, #0]
+ 8005c76:	430b      	orrs	r3, r1
+ 8005c78:	6413      	str	r3, [r2, #64]	; 0x40
+  MODIFY_REG(hdma2d->Instance->OPFCCR,(DMA2D_OPFCCR_AI|DMA2D_OPFCCR_RBS), ((hdma2d->Init.AlphaInverted << DMA2D_OPFCCR_AI_Pos) | (hdma2d->Init.RedBlueSwap << DMA2D_OPFCCR_RBS_Pos)));
+#endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
+
+
+  /* Update error code */
+  hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
+ 8005c7a:	687b      	ldr	r3, [r7, #4]
+ 8005c7c:	2200      	movs	r2, #0
+ 8005c7e:	63da      	str	r2, [r3, #60]	; 0x3c
+
+  /* Initialize the DMA2D state*/
+  hdma2d->State  = HAL_DMA2D_STATE_READY;
+ 8005c80:	687b      	ldr	r3, [r7, #4]
+ 8005c82:	2201      	movs	r2, #1
+ 8005c84:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
+
+  return HAL_OK;
+ 8005c88:	2300      	movs	r3, #0
+}
+ 8005c8a:	4618      	mov	r0, r3
+ 8005c8c:	3708      	adds	r7, #8
+ 8005c8e:	46bd      	mov	sp, r7
+ 8005c90:	bd80      	pop	{r7, pc}
+ 8005c92:	bf00      	nop
+ 8005c94:	ffffc000 	.word	0xffffc000
+
+08005c98 <HAL_DMA2D_Start>:
+  * @param  Width      The width of data to be transferred from source to destination (expressed in number of pixels per line).
+  * @param  Height     The height of data to be transferred from source to destination (expressed in number of lines).
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width,  uint32_t Height)
+{
+ 8005c98:	b580      	push	{r7, lr}
+ 8005c9a:	b086      	sub	sp, #24
+ 8005c9c:	af02      	add	r7, sp, #8
+ 8005c9e:	60f8      	str	r0, [r7, #12]
+ 8005ca0:	60b9      	str	r1, [r7, #8]
+ 8005ca2:	607a      	str	r2, [r7, #4]
+ 8005ca4:	603b      	str	r3, [r7, #0]
+  /* Check the parameters */
+  assert_param(IS_DMA2D_LINE(Height));
+  assert_param(IS_DMA2D_PIXEL(Width));
+
+  /* Process locked */
+  __HAL_LOCK(hdma2d);
+ 8005ca6:	68fb      	ldr	r3, [r7, #12]
+ 8005ca8:	f893 3038 	ldrb.w	r3, [r3, #56]	; 0x38
+ 8005cac:	2b01      	cmp	r3, #1
+ 8005cae:	d101      	bne.n	8005cb4 <HAL_DMA2D_Start+0x1c>
+ 8005cb0:	2302      	movs	r3, #2
+ 8005cb2:	e018      	b.n	8005ce6 <HAL_DMA2D_Start+0x4e>
+ 8005cb4:	68fb      	ldr	r3, [r7, #12]
+ 8005cb6:	2201      	movs	r2, #1
+ 8005cb8:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
+
+  /* Change DMA2D peripheral state */
+  hdma2d->State = HAL_DMA2D_STATE_BUSY;
+ 8005cbc:	68fb      	ldr	r3, [r7, #12]
+ 8005cbe:	2202      	movs	r2, #2
+ 8005cc0:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
+
+  /* Configure the source, destination address and the data size */
+  DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
+ 8005cc4:	69bb      	ldr	r3, [r7, #24]
+ 8005cc6:	9300      	str	r3, [sp, #0]
+ 8005cc8:	683b      	ldr	r3, [r7, #0]
+ 8005cca:	687a      	ldr	r2, [r7, #4]
+ 8005ccc:	68b9      	ldr	r1, [r7, #8]
+ 8005cce:	68f8      	ldr	r0, [r7, #12]
+ 8005cd0:	f000 f988 	bl	8005fe4 <DMA2D_SetConfig>
+
+  /* Enable the Peripheral */
+  __HAL_DMA2D_ENABLE(hdma2d);
+ 8005cd4:	68fb      	ldr	r3, [r7, #12]
+ 8005cd6:	681b      	ldr	r3, [r3, #0]
+ 8005cd8:	681a      	ldr	r2, [r3, #0]
+ 8005cda:	68fb      	ldr	r3, [r7, #12]
+ 8005cdc:	681b      	ldr	r3, [r3, #0]
+ 8005cde:	f042 0201 	orr.w	r2, r2, #1
+ 8005ce2:	601a      	str	r2, [r3, #0]
+
+  return HAL_OK;
+ 8005ce4:	2300      	movs	r3, #0
+}
+ 8005ce6:	4618      	mov	r0, r3
+ 8005ce8:	3710      	adds	r7, #16
+ 8005cea:	46bd      	mov	sp, r7
+ 8005cec:	bd80      	pop	{r7, pc}
+
+08005cee <HAL_DMA2D_PollForTransfer>:
+  *                 the configuration information for the DMA2D.
+  * @param  Timeout Timeout duration
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
+{
+ 8005cee:	b580      	push	{r7, lr}
+ 8005cf0:	b086      	sub	sp, #24
+ 8005cf2:	af00      	add	r7, sp, #0
+ 8005cf4:	6078      	str	r0, [r7, #4]
+ 8005cf6:	6039      	str	r1, [r7, #0]
+  uint32_t tickstart;
+  uint32_t layer_start;
+  __IO uint32_t isrflags = 0x0U;
+ 8005cf8:	2300      	movs	r3, #0
+ 8005cfa:	60fb      	str	r3, [r7, #12]
+
+  /* Polling for DMA2D transfer */
+  if((hdma2d->Instance->CR & DMA2D_CR_START) != 0U)
+ 8005cfc:	687b      	ldr	r3, [r7, #4]
+ 8005cfe:	681b      	ldr	r3, [r3, #0]
+ 8005d00:	681b      	ldr	r3, [r3, #0]
+ 8005d02:	f003 0301 	and.w	r3, r3, #1
+ 8005d06:	2b00      	cmp	r3, #0
+ 8005d08:	d056      	beq.n	8005db8 <HAL_DMA2D_PollForTransfer+0xca>
+  {
+   /* Get tick */
+   tickstart = HAL_GetTick();
+ 8005d0a:	f7fe ff1d 	bl	8004b48 <HAL_GetTick>
+ 8005d0e:	6178      	str	r0, [r7, #20]
+
+    while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == 0U)
+ 8005d10:	e04b      	b.n	8005daa <HAL_DMA2D_PollForTransfer+0xbc>
+    {
+      isrflags = READ_REG(hdma2d->Instance->ISR);
+ 8005d12:	687b      	ldr	r3, [r7, #4]
+ 8005d14:	681b      	ldr	r3, [r3, #0]
+ 8005d16:	685b      	ldr	r3, [r3, #4]
+ 8005d18:	60fb      	str	r3, [r7, #12]
+      if ((isrflags & (DMA2D_FLAG_CE|DMA2D_FLAG_TE)) != 0U)
+ 8005d1a:	68fb      	ldr	r3, [r7, #12]
+ 8005d1c:	f003 0321 	and.w	r3, r3, #33	; 0x21
+ 8005d20:	2b00      	cmp	r3, #0
+ 8005d22:	d023      	beq.n	8005d6c <HAL_DMA2D_PollForTransfer+0x7e>
+      {
+        if ((isrflags & DMA2D_FLAG_CE) != 0U)
+ 8005d24:	68fb      	ldr	r3, [r7, #12]
+ 8005d26:	f003 0320 	and.w	r3, r3, #32
+ 8005d2a:	2b00      	cmp	r3, #0
+ 8005d2c:	d005      	beq.n	8005d3a <HAL_DMA2D_PollForTransfer+0x4c>
+        {
+          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
+ 8005d2e:	687b      	ldr	r3, [r7, #4]
+ 8005d30:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 8005d32:	f043 0202 	orr.w	r2, r3, #2
+ 8005d36:	687b      	ldr	r3, [r7, #4]
+ 8005d38:	63da      	str	r2, [r3, #60]	; 0x3c
+        }
+        if ((isrflags & DMA2D_FLAG_TE) != 0U)
+ 8005d3a:	68fb      	ldr	r3, [r7, #12]
+ 8005d3c:	f003 0301 	and.w	r3, r3, #1
+ 8005d40:	2b00      	cmp	r3, #0
+ 8005d42:	d005      	beq.n	8005d50 <HAL_DMA2D_PollForTransfer+0x62>
+        {
+          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
+ 8005d44:	687b      	ldr	r3, [r7, #4]
+ 8005d46:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 8005d48:	f043 0201 	orr.w	r2, r3, #1
+ 8005d4c:	687b      	ldr	r3, [r7, #4]
+ 8005d4e:	63da      	str	r2, [r3, #60]	; 0x3c
+        }
+        /* Clear the transfer and configuration error flags */
+        __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE | DMA2D_FLAG_TE);
+ 8005d50:	687b      	ldr	r3, [r7, #4]
+ 8005d52:	681b      	ldr	r3, [r3, #0]
+ 8005d54:	2221      	movs	r2, #33	; 0x21
+ 8005d56:	609a      	str	r2, [r3, #8]
+
+        /* Change DMA2D state */
+        hdma2d->State = HAL_DMA2D_STATE_ERROR;
+ 8005d58:	687b      	ldr	r3, [r7, #4]
+ 8005d5a:	2204      	movs	r2, #4
+ 8005d5c:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
+
+        /* Process unlocked */
+        __HAL_UNLOCK(hdma2d);
+ 8005d60:	687b      	ldr	r3, [r7, #4]
+ 8005d62:	2200      	movs	r2, #0
+ 8005d64:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
+
+        return HAL_ERROR;
+ 8005d68:	2301      	movs	r3, #1
+ 8005d6a:	e0a5      	b.n	8005eb8 <HAL_DMA2D_PollForTransfer+0x1ca>
+      }
+      /* Check for the Timeout */
+      if(Timeout != HAL_MAX_DELAY)
+ 8005d6c:	683b      	ldr	r3, [r7, #0]
+ 8005d6e:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 8005d72:	d01a      	beq.n	8005daa <HAL_DMA2D_PollForTransfer+0xbc>
+      {
+        if(((HAL_GetTick() - tickstart ) > Timeout)||(Timeout == 0U))
+ 8005d74:	f7fe fee8 	bl	8004b48 <HAL_GetTick>
+ 8005d78:	4602      	mov	r2, r0
+ 8005d7a:	697b      	ldr	r3, [r7, #20]
+ 8005d7c:	1ad3      	subs	r3, r2, r3
+ 8005d7e:	683a      	ldr	r2, [r7, #0]
+ 8005d80:	429a      	cmp	r2, r3
+ 8005d82:	d302      	bcc.n	8005d8a <HAL_DMA2D_PollForTransfer+0x9c>
+ 8005d84:	683b      	ldr	r3, [r7, #0]
+ 8005d86:	2b00      	cmp	r3, #0
+ 8005d88:	d10f      	bne.n	8005daa <HAL_DMA2D_PollForTransfer+0xbc>
+        {
+          /* Update error code */
+          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
+ 8005d8a:	687b      	ldr	r3, [r7, #4]
+ 8005d8c:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 8005d8e:	f043 0220 	orr.w	r2, r3, #32
+ 8005d92:	687b      	ldr	r3, [r7, #4]
+ 8005d94:	63da      	str	r2, [r3, #60]	; 0x3c
+
+          /* Change the DMA2D state */
+          hdma2d->State = HAL_DMA2D_STATE_TIMEOUT;
+ 8005d96:	687b      	ldr	r3, [r7, #4]
+ 8005d98:	2203      	movs	r2, #3
+ 8005d9a:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
+
+          /* Process unlocked */
+          __HAL_UNLOCK(hdma2d);
+ 8005d9e:	687b      	ldr	r3, [r7, #4]
+ 8005da0:	2200      	movs	r2, #0
+ 8005da2:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
+
+          return HAL_TIMEOUT;
+ 8005da6:	2303      	movs	r3, #3
+ 8005da8:	e086      	b.n	8005eb8 <HAL_DMA2D_PollForTransfer+0x1ca>
+    while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == 0U)
+ 8005daa:	687b      	ldr	r3, [r7, #4]
+ 8005dac:	681b      	ldr	r3, [r3, #0]
+ 8005dae:	685b      	ldr	r3, [r3, #4]
+ 8005db0:	f003 0302 	and.w	r3, r3, #2
+ 8005db4:	2b00      	cmp	r3, #0
+ 8005db6:	d0ac      	beq.n	8005d12 <HAL_DMA2D_PollForTransfer+0x24>
+        }
+      }
+    }
+  }
+  /* Polling for CLUT loading (foreground or background) */
+  layer_start = hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START;
+ 8005db8:	687b      	ldr	r3, [r7, #4]
+ 8005dba:	681b      	ldr	r3, [r3, #0]
+ 8005dbc:	69db      	ldr	r3, [r3, #28]
+ 8005dbe:	f003 0320 	and.w	r3, r3, #32
+ 8005dc2:	613b      	str	r3, [r7, #16]
+  layer_start |= hdma2d->Instance->BGPFCCR & DMA2D_BGPFCCR_START;
+ 8005dc4:	687b      	ldr	r3, [r7, #4]
+ 8005dc6:	681b      	ldr	r3, [r3, #0]
+ 8005dc8:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8005dca:	f003 0320 	and.w	r3, r3, #32
+ 8005dce:	693a      	ldr	r2, [r7, #16]
+ 8005dd0:	4313      	orrs	r3, r2
+ 8005dd2:	613b      	str	r3, [r7, #16]
+  if (layer_start != 0U)
+ 8005dd4:	693b      	ldr	r3, [r7, #16]
+ 8005dd6:	2b00      	cmp	r3, #0
+ 8005dd8:	d061      	beq.n	8005e9e <HAL_DMA2D_PollForTransfer+0x1b0>
+  {
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 8005dda:	f7fe feb5 	bl	8004b48 <HAL_GetTick>
+ 8005dde:	6178      	str	r0, [r7, #20]
+
+    while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == 0U)
+ 8005de0:	e056      	b.n	8005e90 <HAL_DMA2D_PollForTransfer+0x1a2>
+    {
+      isrflags = READ_REG(hdma2d->Instance->ISR);
+ 8005de2:	687b      	ldr	r3, [r7, #4]
+ 8005de4:	681b      	ldr	r3, [r3, #0]
+ 8005de6:	685b      	ldr	r3, [r3, #4]
+ 8005de8:	60fb      	str	r3, [r7, #12]
+      if ((isrflags & (DMA2D_FLAG_CAE|DMA2D_FLAG_CE|DMA2D_FLAG_TE)) != 0U)
+ 8005dea:	68fb      	ldr	r3, [r7, #12]
+ 8005dec:	f003 0329 	and.w	r3, r3, #41	; 0x29
+ 8005df0:	2b00      	cmp	r3, #0
+ 8005df2:	d02e      	beq.n	8005e52 <HAL_DMA2D_PollForTransfer+0x164>
+      {
+        if ((isrflags & DMA2D_FLAG_CAE) != 0U)
+ 8005df4:	68fb      	ldr	r3, [r7, #12]
+ 8005df6:	f003 0308 	and.w	r3, r3, #8
+ 8005dfa:	2b00      	cmp	r3, #0
+ 8005dfc:	d005      	beq.n	8005e0a <HAL_DMA2D_PollForTransfer+0x11c>
+        {
+          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CAE;
+ 8005dfe:	687b      	ldr	r3, [r7, #4]
+ 8005e00:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 8005e02:	f043 0204 	orr.w	r2, r3, #4
+ 8005e06:	687b      	ldr	r3, [r7, #4]
+ 8005e08:	63da      	str	r2, [r3, #60]	; 0x3c
+        }
+        if ((isrflags & DMA2D_FLAG_CE) != 0U)
+ 8005e0a:	68fb      	ldr	r3, [r7, #12]
+ 8005e0c:	f003 0320 	and.w	r3, r3, #32
+ 8005e10:	2b00      	cmp	r3, #0
+ 8005e12:	d005      	beq.n	8005e20 <HAL_DMA2D_PollForTransfer+0x132>
+        {
+          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
+ 8005e14:	687b      	ldr	r3, [r7, #4]
+ 8005e16:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 8005e18:	f043 0202 	orr.w	r2, r3, #2
+ 8005e1c:	687b      	ldr	r3, [r7, #4]
+ 8005e1e:	63da      	str	r2, [r3, #60]	; 0x3c
+        }
+        if ((isrflags & DMA2D_FLAG_TE) != 0U)
+ 8005e20:	68fb      	ldr	r3, [r7, #12]
+ 8005e22:	f003 0301 	and.w	r3, r3, #1
+ 8005e26:	2b00      	cmp	r3, #0
+ 8005e28:	d005      	beq.n	8005e36 <HAL_DMA2D_PollForTransfer+0x148>
+        {
+          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
+ 8005e2a:	687b      	ldr	r3, [r7, #4]
+ 8005e2c:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 8005e2e:	f043 0201 	orr.w	r2, r3, #1
+ 8005e32:	687b      	ldr	r3, [r7, #4]
+ 8005e34:	63da      	str	r2, [r3, #60]	; 0x3c
+        }
+        /* Clear the CLUT Access Error, Configuration Error and Transfer Error flags */
+        __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE | DMA2D_FLAG_CE | DMA2D_FLAG_TE);
+ 8005e36:	687b      	ldr	r3, [r7, #4]
+ 8005e38:	681b      	ldr	r3, [r3, #0]
+ 8005e3a:	2229      	movs	r2, #41	; 0x29
+ 8005e3c:	609a      	str	r2, [r3, #8]
+
+        /* Change DMA2D state */
+        hdma2d->State= HAL_DMA2D_STATE_ERROR;
+ 8005e3e:	687b      	ldr	r3, [r7, #4]
+ 8005e40:	2204      	movs	r2, #4
+ 8005e42:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
+
+        /* Process unlocked */
+        __HAL_UNLOCK(hdma2d);
+ 8005e46:	687b      	ldr	r3, [r7, #4]
+ 8005e48:	2200      	movs	r2, #0
+ 8005e4a:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
+
+        return HAL_ERROR;
+ 8005e4e:	2301      	movs	r3, #1
+ 8005e50:	e032      	b.n	8005eb8 <HAL_DMA2D_PollForTransfer+0x1ca>
+      }
+      /* Check for the Timeout */
+      if(Timeout != HAL_MAX_DELAY)
+ 8005e52:	683b      	ldr	r3, [r7, #0]
+ 8005e54:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 8005e58:	d01a      	beq.n	8005e90 <HAL_DMA2D_PollForTransfer+0x1a2>
+      {
+        if(((HAL_GetTick() - tickstart ) > Timeout)||(Timeout == 0U))
+ 8005e5a:	f7fe fe75 	bl	8004b48 <HAL_GetTick>
+ 8005e5e:	4602      	mov	r2, r0
+ 8005e60:	697b      	ldr	r3, [r7, #20]
+ 8005e62:	1ad3      	subs	r3, r2, r3
+ 8005e64:	683a      	ldr	r2, [r7, #0]
+ 8005e66:	429a      	cmp	r2, r3
+ 8005e68:	d302      	bcc.n	8005e70 <HAL_DMA2D_PollForTransfer+0x182>
+ 8005e6a:	683b      	ldr	r3, [r7, #0]
+ 8005e6c:	2b00      	cmp	r3, #0
+ 8005e6e:	d10f      	bne.n	8005e90 <HAL_DMA2D_PollForTransfer+0x1a2>
+        {
+          /* Update error code */
+          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
+ 8005e70:	687b      	ldr	r3, [r7, #4]
+ 8005e72:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 8005e74:	f043 0220 	orr.w	r2, r3, #32
+ 8005e78:	687b      	ldr	r3, [r7, #4]
+ 8005e7a:	63da      	str	r2, [r3, #60]	; 0x3c
+
+          /* Change the DMA2D state */
+          hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
+ 8005e7c:	687b      	ldr	r3, [r7, #4]
+ 8005e7e:	2203      	movs	r2, #3
+ 8005e80:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
+
+          /* Process unlocked */
+          __HAL_UNLOCK(hdma2d);
+ 8005e84:	687b      	ldr	r3, [r7, #4]
+ 8005e86:	2200      	movs	r2, #0
+ 8005e88:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
+
+          return HAL_TIMEOUT;
+ 8005e8c:	2303      	movs	r3, #3
+ 8005e8e:	e013      	b.n	8005eb8 <HAL_DMA2D_PollForTransfer+0x1ca>
+    while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == 0U)
+ 8005e90:	687b      	ldr	r3, [r7, #4]
+ 8005e92:	681b      	ldr	r3, [r3, #0]
+ 8005e94:	685b      	ldr	r3, [r3, #4]
+ 8005e96:	f003 0310 	and.w	r3, r3, #16
+ 8005e9a:	2b00      	cmp	r3, #0
+ 8005e9c:	d0a1      	beq.n	8005de2 <HAL_DMA2D_PollForTransfer+0xf4>
+      }
+    }
+  }
+
+  /* Clear the transfer complete and CLUT loading flags */
+  __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC|DMA2D_FLAG_CTC);
+ 8005e9e:	687b      	ldr	r3, [r7, #4]
+ 8005ea0:	681b      	ldr	r3, [r3, #0]
+ 8005ea2:	2212      	movs	r2, #18
+ 8005ea4:	609a      	str	r2, [r3, #8]
+
+  /* Change DMA2D state */
+  hdma2d->State = HAL_DMA2D_STATE_READY;
+ 8005ea6:	687b      	ldr	r3, [r7, #4]
+ 8005ea8:	2201      	movs	r2, #1
+ 8005eaa:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
+
+  /* Process unlocked */
+  __HAL_UNLOCK(hdma2d);
+ 8005eae:	687b      	ldr	r3, [r7, #4]
+ 8005eb0:	2200      	movs	r2, #0
+ 8005eb2:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
+
+  return HAL_OK;
+ 8005eb6:	2300      	movs	r3, #0
+}
+ 8005eb8:	4618      	mov	r0, r3
+ 8005eba:	3718      	adds	r7, #24
+ 8005ebc:	46bd      	mov	sp, r7
+ 8005ebe:	bd80      	pop	{r7, pc}
+
+08005ec0 <HAL_DMA2D_ConfigLayer>:
+  *                   This parameter can be one of the following values:
+  *                   DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
+{
+ 8005ec0:	b480      	push	{r7}
+ 8005ec2:	b087      	sub	sp, #28
+ 8005ec4:	af00      	add	r7, sp, #0
+ 8005ec6:	6078      	str	r0, [r7, #4]
+ 8005ec8:	6039      	str	r1, [r7, #0]
+  uint32_t regMask, regValue;
+
+  /* Check the parameters */
+  assert_param(IS_DMA2D_LAYER(LayerIdx));
+  assert_param(IS_DMA2D_OFFSET(hdma2d->LayerCfg[LayerIdx].InputOffset));
+  if(hdma2d->Init.Mode != DMA2D_R2M)
+ 8005eca:	687b      	ldr	r3, [r7, #4]
+ 8005ecc:	685b      	ldr	r3, [r3, #4]
+ 8005ece:	f5b3 3f40 	cmp.w	r3, #196608	; 0x30000
+  assert_param(IS_DMA2D_ALPHA_INVERTED(hdma2d->LayerCfg[LayerIdx].AlphaInverted));
+  assert_param(IS_DMA2D_RB_SWAP(hdma2d->LayerCfg[LayerIdx].RedBlueSwap));
+#endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
+
+  /* Process locked */
+  __HAL_LOCK(hdma2d);
+ 8005ed2:	687b      	ldr	r3, [r7, #4]
+ 8005ed4:	f893 3038 	ldrb.w	r3, [r3, #56]	; 0x38
+ 8005ed8:	2b01      	cmp	r3, #1
+ 8005eda:	d101      	bne.n	8005ee0 <HAL_DMA2D_ConfigLayer+0x20>
+ 8005edc:	2302      	movs	r3, #2
+ 8005ede:	e079      	b.n	8005fd4 <HAL_DMA2D_ConfigLayer+0x114>
+ 8005ee0:	687b      	ldr	r3, [r7, #4]
+ 8005ee2:	2201      	movs	r2, #1
+ 8005ee4:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
+
+  /* Change DMA2D peripheral state */
+  hdma2d->State = HAL_DMA2D_STATE_BUSY;
+ 8005ee8:	687b      	ldr	r3, [r7, #4]
+ 8005eea:	2202      	movs	r2, #2
+ 8005eec:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
+
+  pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
+ 8005ef0:	683b      	ldr	r3, [r7, #0]
+ 8005ef2:	011b      	lsls	r3, r3, #4
+ 8005ef4:	3318      	adds	r3, #24
+ 8005ef6:	687a      	ldr	r2, [r7, #4]
+ 8005ef8:	4413      	add	r3, r2
+ 8005efa:	613b      	str	r3, [r7, #16]
+#if defined (DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
+  regValue = pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << DMA2D_BGPFCCR_AM_Pos) |\
+             (pLayerCfg->AlphaInverted << DMA2D_BGPFCCR_AI_Pos) | (pLayerCfg->RedBlueSwap << DMA2D_BGPFCCR_RBS_Pos);
+  regMask  = (DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA | DMA2D_BGPFCCR_AI | DMA2D_BGPFCCR_RBS);
+#else
+  regValue = pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << DMA2D_BGPFCCR_AM_Pos);
+ 8005efc:	693b      	ldr	r3, [r7, #16]
+ 8005efe:	685a      	ldr	r2, [r3, #4]
+ 8005f00:	693b      	ldr	r3, [r7, #16]
+ 8005f02:	689b      	ldr	r3, [r3, #8]
+ 8005f04:	041b      	lsls	r3, r3, #16
+ 8005f06:	4313      	orrs	r3, r2
+ 8005f08:	617b      	str	r3, [r7, #20]
+  regMask  = DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA;
+ 8005f0a:	4b35      	ldr	r3, [pc, #212]	; (8005fe0 <HAL_DMA2D_ConfigLayer+0x120>)
+ 8005f0c:	60fb      	str	r3, [r7, #12]
+#endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
+
+
+  if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
+ 8005f0e:	693b      	ldr	r3, [r7, #16]
+ 8005f10:	685b      	ldr	r3, [r3, #4]
+ 8005f12:	2b0a      	cmp	r3, #10
+ 8005f14:	d003      	beq.n	8005f1e <HAL_DMA2D_ConfigLayer+0x5e>
+ 8005f16:	693b      	ldr	r3, [r7, #16]
+ 8005f18:	685b      	ldr	r3, [r3, #4]
+ 8005f1a:	2b09      	cmp	r3, #9
+ 8005f1c:	d107      	bne.n	8005f2e <HAL_DMA2D_ConfigLayer+0x6e>
+  {
+    regValue |= (pLayerCfg->InputAlpha & DMA2D_BGPFCCR_ALPHA);
+ 8005f1e:	693b      	ldr	r3, [r7, #16]
+ 8005f20:	68db      	ldr	r3, [r3, #12]
+ 8005f22:	f003 437f 	and.w	r3, r3, #4278190080	; 0xff000000
+ 8005f26:	697a      	ldr	r2, [r7, #20]
+ 8005f28:	4313      	orrs	r3, r2
+ 8005f2a:	617b      	str	r3, [r7, #20]
+ 8005f2c:	e005      	b.n	8005f3a <HAL_DMA2D_ConfigLayer+0x7a>
+  }
+  else
+  {
+    regValue |=  (pLayerCfg->InputAlpha << DMA2D_BGPFCCR_ALPHA_Pos);
+ 8005f2e:	693b      	ldr	r3, [r7, #16]
+ 8005f30:	68db      	ldr	r3, [r3, #12]
+ 8005f32:	061b      	lsls	r3, r3, #24
+ 8005f34:	697a      	ldr	r2, [r7, #20]
+ 8005f36:	4313      	orrs	r3, r2
+ 8005f38:	617b      	str	r3, [r7, #20]
+  }
+
+  /* Configure the background DMA2D layer */
+  if(LayerIdx == DMA2D_BACKGROUND_LAYER)
+ 8005f3a:	683b      	ldr	r3, [r7, #0]
+ 8005f3c:	2b00      	cmp	r3, #0
+ 8005f3e:	d120      	bne.n	8005f82 <HAL_DMA2D_ConfigLayer+0xc2>
+  {
+    /* Write DMA2D BGPFCCR register */
+    MODIFY_REG(hdma2d->Instance->BGPFCCR, regMask, regValue);
+ 8005f40:	687b      	ldr	r3, [r7, #4]
+ 8005f42:	681b      	ldr	r3, [r3, #0]
+ 8005f44:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 8005f46:	68fb      	ldr	r3, [r7, #12]
+ 8005f48:	43db      	mvns	r3, r3
+ 8005f4a:	ea02 0103 	and.w	r1, r2, r3
+ 8005f4e:	687b      	ldr	r3, [r7, #4]
+ 8005f50:	681b      	ldr	r3, [r3, #0]
+ 8005f52:	697a      	ldr	r2, [r7, #20]
+ 8005f54:	430a      	orrs	r2, r1
+ 8005f56:	625a      	str	r2, [r3, #36]	; 0x24
+
+    /* DMA2D BGOR register configuration -------------------------------------*/
+    WRITE_REG(hdma2d->Instance->BGOR, pLayerCfg->InputOffset);
+ 8005f58:	687b      	ldr	r3, [r7, #4]
+ 8005f5a:	681b      	ldr	r3, [r3, #0]
+ 8005f5c:	693a      	ldr	r2, [r7, #16]
+ 8005f5e:	6812      	ldr	r2, [r2, #0]
+ 8005f60:	619a      	str	r2, [r3, #24]
+
+    /* DMA2D BGCOLR register configuration -------------------------------------*/
+    if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
+ 8005f62:	693b      	ldr	r3, [r7, #16]
+ 8005f64:	685b      	ldr	r3, [r3, #4]
+ 8005f66:	2b0a      	cmp	r3, #10
+ 8005f68:	d003      	beq.n	8005f72 <HAL_DMA2D_ConfigLayer+0xb2>
+ 8005f6a:	693b      	ldr	r3, [r7, #16]
+ 8005f6c:	685b      	ldr	r3, [r3, #4]
+ 8005f6e:	2b09      	cmp	r3, #9
+ 8005f70:	d127      	bne.n	8005fc2 <HAL_DMA2D_ConfigLayer+0x102>
+    {
+      WRITE_REG(hdma2d->Instance->BGCOLR, pLayerCfg->InputAlpha & (DMA2D_BGCOLR_BLUE|DMA2D_BGCOLR_GREEN|DMA2D_BGCOLR_RED));
+ 8005f72:	693b      	ldr	r3, [r7, #16]
+ 8005f74:	68da      	ldr	r2, [r3, #12]
+ 8005f76:	687b      	ldr	r3, [r7, #4]
+ 8005f78:	681b      	ldr	r3, [r3, #0]
+ 8005f7a:	f022 427f 	bic.w	r2, r2, #4278190080	; 0xff000000
+ 8005f7e:	629a      	str	r2, [r3, #40]	; 0x28
+ 8005f80:	e01f      	b.n	8005fc2 <HAL_DMA2D_ConfigLayer+0x102>
+  else
+  {
+
+
+     /* Write DMA2D FGPFCCR register */
+    MODIFY_REG(hdma2d->Instance->FGPFCCR, regMask, regValue);
+ 8005f82:	687b      	ldr	r3, [r7, #4]
+ 8005f84:	681b      	ldr	r3, [r3, #0]
+ 8005f86:	69da      	ldr	r2, [r3, #28]
+ 8005f88:	68fb      	ldr	r3, [r7, #12]
+ 8005f8a:	43db      	mvns	r3, r3
+ 8005f8c:	ea02 0103 	and.w	r1, r2, r3
+ 8005f90:	687b      	ldr	r3, [r7, #4]
+ 8005f92:	681b      	ldr	r3, [r3, #0]
+ 8005f94:	697a      	ldr	r2, [r7, #20]
+ 8005f96:	430a      	orrs	r2, r1
+ 8005f98:	61da      	str	r2, [r3, #28]
+
+    /* DMA2D FGOR register configuration -------------------------------------*/
+    WRITE_REG(hdma2d->Instance->FGOR, pLayerCfg->InputOffset);
+ 8005f9a:	687b      	ldr	r3, [r7, #4]
+ 8005f9c:	681b      	ldr	r3, [r3, #0]
+ 8005f9e:	693a      	ldr	r2, [r7, #16]
+ 8005fa0:	6812      	ldr	r2, [r2, #0]
+ 8005fa2:	611a      	str	r2, [r3, #16]
+
+    /* DMA2D FGCOLR register configuration -------------------------------------*/
+    if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
+ 8005fa4:	693b      	ldr	r3, [r7, #16]
+ 8005fa6:	685b      	ldr	r3, [r3, #4]
+ 8005fa8:	2b0a      	cmp	r3, #10
+ 8005faa:	d003      	beq.n	8005fb4 <HAL_DMA2D_ConfigLayer+0xf4>
+ 8005fac:	693b      	ldr	r3, [r7, #16]
+ 8005fae:	685b      	ldr	r3, [r3, #4]
+ 8005fb0:	2b09      	cmp	r3, #9
+ 8005fb2:	d106      	bne.n	8005fc2 <HAL_DMA2D_ConfigLayer+0x102>
+    {
+      WRITE_REG(hdma2d->Instance->FGCOLR, pLayerCfg->InputAlpha & (DMA2D_FGCOLR_BLUE|DMA2D_FGCOLR_GREEN|DMA2D_FGCOLR_RED));
+ 8005fb4:	693b      	ldr	r3, [r7, #16]
+ 8005fb6:	68da      	ldr	r2, [r3, #12]
+ 8005fb8:	687b      	ldr	r3, [r7, #4]
+ 8005fba:	681b      	ldr	r3, [r3, #0]
+ 8005fbc:	f022 427f 	bic.w	r2, r2, #4278190080	; 0xff000000
+ 8005fc0:	621a      	str	r2, [r3, #32]
+    }
+  }
+  /* Initialize the DMA2D state*/
+  hdma2d->State = HAL_DMA2D_STATE_READY;
+ 8005fc2:	687b      	ldr	r3, [r7, #4]
+ 8005fc4:	2201      	movs	r2, #1
+ 8005fc6:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
+
+  /* Process unlocked */
+  __HAL_UNLOCK(hdma2d);
+ 8005fca:	687b      	ldr	r3, [r7, #4]
+ 8005fcc:	2200      	movs	r2, #0
+ 8005fce:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
+
+  return HAL_OK;
+ 8005fd2:	2300      	movs	r3, #0
+}
+ 8005fd4:	4618      	mov	r0, r3
+ 8005fd6:	371c      	adds	r7, #28
+ 8005fd8:	46bd      	mov	sp, r7
+ 8005fda:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005fde:	4770      	bx	lr
+ 8005fe0:	ff03000f 	.word	0xff03000f
+
+08005fe4 <DMA2D_SetConfig>:
+  * @param  Width      The width of data to be transferred from source to destination.
+  * @param  Height     The height of data to be transferred from source to destination.
+  * @retval HAL status
+  */
+static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
+{
+ 8005fe4:	b480      	push	{r7}
+ 8005fe6:	b08b      	sub	sp, #44	; 0x2c
+ 8005fe8:	af00      	add	r7, sp, #0
+ 8005fea:	60f8      	str	r0, [r7, #12]
+ 8005fec:	60b9      	str	r1, [r7, #8]
+ 8005fee:	607a      	str	r2, [r7, #4]
+ 8005ff0:	603b      	str	r3, [r7, #0]
+  uint32_t tmp2;
+  uint32_t tmp3;
+  uint32_t tmp4;
+
+  /* Configure DMA2D data size */
+  MODIFY_REG(hdma2d->Instance->NLR, (DMA2D_NLR_NL|DMA2D_NLR_PL), (Height| (Width << DMA2D_NLR_PL_Pos)));
+ 8005ff2:	68fb      	ldr	r3, [r7, #12]
+ 8005ff4:	681b      	ldr	r3, [r3, #0]
+ 8005ff6:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8005ff8:	f003 4140 	and.w	r1, r3, #3221225472	; 0xc0000000
+ 8005ffc:	683b      	ldr	r3, [r7, #0]
+ 8005ffe:	041a      	lsls	r2, r3, #16
+ 8006000:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 8006002:	431a      	orrs	r2, r3
+ 8006004:	68fb      	ldr	r3, [r7, #12]
+ 8006006:	681b      	ldr	r3, [r3, #0]
+ 8006008:	430a      	orrs	r2, r1
+ 800600a:	645a      	str	r2, [r3, #68]	; 0x44
+
+  /* Configure DMA2D destination address */
+  WRITE_REG(hdma2d->Instance->OMAR, DstAddress);
+ 800600c:	68fb      	ldr	r3, [r7, #12]
+ 800600e:	681b      	ldr	r3, [r3, #0]
+ 8006010:	687a      	ldr	r2, [r7, #4]
+ 8006012:	63da      	str	r2, [r3, #60]	; 0x3c
+
+  /* Register to memory DMA2D mode selected */
+  if (hdma2d->Init.Mode == DMA2D_R2M)
+ 8006014:	68fb      	ldr	r3, [r7, #12]
+ 8006016:	685b      	ldr	r3, [r3, #4]
+ 8006018:	f5b3 3f40 	cmp.w	r3, #196608	; 0x30000
+ 800601c:	d174      	bne.n	8006108 <DMA2D_SetConfig+0x124>
+  {
+    tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
+ 800601e:	68bb      	ldr	r3, [r7, #8]
+ 8006020:	f003 437f 	and.w	r3, r3, #4278190080	; 0xff000000
+ 8006024:	623b      	str	r3, [r7, #32]
+    tmp2 = pdata & DMA2D_OCOLR_RED_1;
+ 8006026:	68bb      	ldr	r3, [r7, #8]
+ 8006028:	f403 037f 	and.w	r3, r3, #16711680	; 0xff0000
+ 800602c:	61fb      	str	r3, [r7, #28]
+    tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
+ 800602e:	68bb      	ldr	r3, [r7, #8]
+ 8006030:	f403 437f 	and.w	r3, r3, #65280	; 0xff00
+ 8006034:	61bb      	str	r3, [r7, #24]
+    tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
+ 8006036:	68bb      	ldr	r3, [r7, #8]
+ 8006038:	b2db      	uxtb	r3, r3
+ 800603a:	617b      	str	r3, [r7, #20]
+
+    /* Prepare the value to be written to the OCOLR register according to the color mode */
+    if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_ARGB8888)
+ 800603c:	68fb      	ldr	r3, [r7, #12]
+ 800603e:	689b      	ldr	r3, [r3, #8]
+ 8006040:	2b00      	cmp	r3, #0
+ 8006042:	d108      	bne.n	8006056 <DMA2D_SetConfig+0x72>
+    {
+      tmp = (tmp3 | tmp2 | tmp1| tmp4);
+ 8006044:	69ba      	ldr	r2, [r7, #24]
+ 8006046:	69fb      	ldr	r3, [r7, #28]
+ 8006048:	431a      	orrs	r2, r3
+ 800604a:	6a3b      	ldr	r3, [r7, #32]
+ 800604c:	4313      	orrs	r3, r2
+ 800604e:	697a      	ldr	r2, [r7, #20]
+ 8006050:	4313      	orrs	r3, r2
+ 8006052:	627b      	str	r3, [r7, #36]	; 0x24
+ 8006054:	e053      	b.n	80060fe <DMA2D_SetConfig+0x11a>
+    }
+    else if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_RGB888)
+ 8006056:	68fb      	ldr	r3, [r7, #12]
+ 8006058:	689b      	ldr	r3, [r3, #8]
+ 800605a:	2b01      	cmp	r3, #1
+ 800605c:	d106      	bne.n	800606c <DMA2D_SetConfig+0x88>
+    {
+      tmp = (tmp3 | tmp2 | tmp4);
+ 800605e:	69ba      	ldr	r2, [r7, #24]
+ 8006060:	69fb      	ldr	r3, [r7, #28]
+ 8006062:	4313      	orrs	r3, r2
+ 8006064:	697a      	ldr	r2, [r7, #20]
+ 8006066:	4313      	orrs	r3, r2
+ 8006068:	627b      	str	r3, [r7, #36]	; 0x24
+ 800606a:	e048      	b.n	80060fe <DMA2D_SetConfig+0x11a>
+    }
+    else if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_RGB565)
+ 800606c:	68fb      	ldr	r3, [r7, #12]
+ 800606e:	689b      	ldr	r3, [r3, #8]
+ 8006070:	2b02      	cmp	r3, #2
+ 8006072:	d111      	bne.n	8006098 <DMA2D_SetConfig+0xb4>
+    {
+      tmp2 = (tmp2 >> 19U);
+ 8006074:	69fb      	ldr	r3, [r7, #28]
+ 8006076:	0cdb      	lsrs	r3, r3, #19
+ 8006078:	61fb      	str	r3, [r7, #28]
+      tmp3 = (tmp3 >> 10U);
+ 800607a:	69bb      	ldr	r3, [r7, #24]
+ 800607c:	0a9b      	lsrs	r3, r3, #10
+ 800607e:	61bb      	str	r3, [r7, #24]
+      tmp4 = (tmp4 >> 3U );
+ 8006080:	697b      	ldr	r3, [r7, #20]
+ 8006082:	08db      	lsrs	r3, r3, #3
+ 8006084:	617b      	str	r3, [r7, #20]
+      tmp  = ((tmp3 << 5U) | (tmp2 << 11U) | tmp4);
+ 8006086:	69bb      	ldr	r3, [r7, #24]
+ 8006088:	015a      	lsls	r2, r3, #5
+ 800608a:	69fb      	ldr	r3, [r7, #28]
+ 800608c:	02db      	lsls	r3, r3, #11
+ 800608e:	4313      	orrs	r3, r2
+ 8006090:	697a      	ldr	r2, [r7, #20]
+ 8006092:	4313      	orrs	r3, r2
+ 8006094:	627b      	str	r3, [r7, #36]	; 0x24
+ 8006096:	e032      	b.n	80060fe <DMA2D_SetConfig+0x11a>
+    }
+    else if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_ARGB1555)
+ 8006098:	68fb      	ldr	r3, [r7, #12]
+ 800609a:	689b      	ldr	r3, [r3, #8]
+ 800609c:	2b03      	cmp	r3, #3
+ 800609e:	d117      	bne.n	80060d0 <DMA2D_SetConfig+0xec>
+    {
+      tmp1 = (tmp1 >> 31U);
+ 80060a0:	6a3b      	ldr	r3, [r7, #32]
+ 80060a2:	0fdb      	lsrs	r3, r3, #31
+ 80060a4:	623b      	str	r3, [r7, #32]
+      tmp2 = (tmp2 >> 19U);
+ 80060a6:	69fb      	ldr	r3, [r7, #28]
+ 80060a8:	0cdb      	lsrs	r3, r3, #19
+ 80060aa:	61fb      	str	r3, [r7, #28]
+      tmp3 = (tmp3 >> 11U);
+ 80060ac:	69bb      	ldr	r3, [r7, #24]
+ 80060ae:	0adb      	lsrs	r3, r3, #11
+ 80060b0:	61bb      	str	r3, [r7, #24]
+      tmp4 = (tmp4 >> 3U );
+ 80060b2:	697b      	ldr	r3, [r7, #20]
+ 80060b4:	08db      	lsrs	r3, r3, #3
+ 80060b6:	617b      	str	r3, [r7, #20]
+      tmp  = ((tmp3 << 5U) | (tmp2 << 10U) | (tmp1 << 15U) | tmp4);
+ 80060b8:	69bb      	ldr	r3, [r7, #24]
+ 80060ba:	015a      	lsls	r2, r3, #5
+ 80060bc:	69fb      	ldr	r3, [r7, #28]
+ 80060be:	029b      	lsls	r3, r3, #10
+ 80060c0:	431a      	orrs	r2, r3
+ 80060c2:	6a3b      	ldr	r3, [r7, #32]
+ 80060c4:	03db      	lsls	r3, r3, #15
+ 80060c6:	4313      	orrs	r3, r2
+ 80060c8:	697a      	ldr	r2, [r7, #20]
+ 80060ca:	4313      	orrs	r3, r2
+ 80060cc:	627b      	str	r3, [r7, #36]	; 0x24
+ 80060ce:	e016      	b.n	80060fe <DMA2D_SetConfig+0x11a>
+    }
+    else /* Dhdma2d->Init.ColorMode = DMA2D_OUTPUT_ARGB4444 */
+    {
+      tmp1 = (tmp1 >> 28U);
+ 80060d0:	6a3b      	ldr	r3, [r7, #32]
+ 80060d2:	0f1b      	lsrs	r3, r3, #28
+ 80060d4:	623b      	str	r3, [r7, #32]
+      tmp2 = (tmp2 >> 20U);
+ 80060d6:	69fb      	ldr	r3, [r7, #28]
+ 80060d8:	0d1b      	lsrs	r3, r3, #20
+ 80060da:	61fb      	str	r3, [r7, #28]
+      tmp3 = (tmp3 >> 12U);
+ 80060dc:	69bb      	ldr	r3, [r7, #24]
+ 80060de:	0b1b      	lsrs	r3, r3, #12
+ 80060e0:	61bb      	str	r3, [r7, #24]
+      tmp4 = (tmp4 >> 4U );
+ 80060e2:	697b      	ldr	r3, [r7, #20]
+ 80060e4:	091b      	lsrs	r3, r3, #4
+ 80060e6:	617b      	str	r3, [r7, #20]
+      tmp  = ((tmp3 << 4U) | (tmp2 << 8U) | (tmp1 << 12U) | tmp4);
+ 80060e8:	69bb      	ldr	r3, [r7, #24]
+ 80060ea:	011a      	lsls	r2, r3, #4
+ 80060ec:	69fb      	ldr	r3, [r7, #28]
+ 80060ee:	021b      	lsls	r3, r3, #8
+ 80060f0:	431a      	orrs	r2, r3
+ 80060f2:	6a3b      	ldr	r3, [r7, #32]
+ 80060f4:	031b      	lsls	r3, r3, #12
+ 80060f6:	4313      	orrs	r3, r2
+ 80060f8:	697a      	ldr	r2, [r7, #20]
+ 80060fa:	4313      	orrs	r3, r2
+ 80060fc:	627b      	str	r3, [r7, #36]	; 0x24
+    }
+    /* Write to DMA2D OCOLR register */
+    WRITE_REG(hdma2d->Instance->OCOLR, tmp);
+ 80060fe:	68fb      	ldr	r3, [r7, #12]
+ 8006100:	681b      	ldr	r3, [r3, #0]
+ 8006102:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 8006104:	639a      	str	r2, [r3, #56]	; 0x38
+  else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
+  {
+    /* Configure DMA2D source address */
+    WRITE_REG(hdma2d->Instance->FGMAR, pdata);
+  }
+}
+ 8006106:	e003      	b.n	8006110 <DMA2D_SetConfig+0x12c>
+    WRITE_REG(hdma2d->Instance->FGMAR, pdata);
+ 8006108:	68fb      	ldr	r3, [r7, #12]
+ 800610a:	681b      	ldr	r3, [r3, #0]
+ 800610c:	68ba      	ldr	r2, [r7, #8]
+ 800610e:	60da      	str	r2, [r3, #12]
+}
+ 8006110:	bf00      	nop
+ 8006112:	372c      	adds	r7, #44	; 0x2c
+ 8006114:	46bd      	mov	sp, r7
+ 8006116:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800611a:	4770      	bx	lr
+
+0800611c <HAL_ETH_Init>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
+{
+ 800611c:	b580      	push	{r7, lr}
+ 800611e:	b088      	sub	sp, #32
+ 8006120:	af00      	add	r7, sp, #0
+ 8006122:	6078      	str	r0, [r7, #4]
+  uint32_t tempreg = 0, phyreg = 0;
+ 8006124:	2300      	movs	r3, #0
+ 8006126:	61fb      	str	r3, [r7, #28]
+ 8006128:	2300      	movs	r3, #0
+ 800612a:	60fb      	str	r3, [r7, #12]
+  uint32_t hclk = 60000000;
+ 800612c:	4ba9      	ldr	r3, [pc, #676]	; (80063d4 <HAL_ETH_Init+0x2b8>)
+ 800612e:	61bb      	str	r3, [r7, #24]
+  uint32_t tickstart = 0;
+ 8006130:	2300      	movs	r3, #0
+ 8006132:	617b      	str	r3, [r7, #20]
+  uint32_t err = ETH_SUCCESS;
+ 8006134:	2300      	movs	r3, #0
+ 8006136:	613b      	str	r3, [r7, #16]
+  
+  /* Check the ETH peripheral state */
+  if(heth == NULL)
+ 8006138:	687b      	ldr	r3, [r7, #4]
+ 800613a:	2b00      	cmp	r3, #0
+ 800613c:	d101      	bne.n	8006142 <HAL_ETH_Init+0x26>
+  {
+    return HAL_ERROR;
+ 800613e:	2301      	movs	r3, #1
+ 8006140:	e183      	b.n	800644a <HAL_ETH_Init+0x32e>
+  assert_param(IS_ETH_AUTONEGOTIATION(heth->Init.AutoNegotiation));
+  assert_param(IS_ETH_RX_MODE(heth->Init.RxMode));
+  assert_param(IS_ETH_CHECKSUM_MODE(heth->Init.ChecksumMode));
+  assert_param(IS_ETH_MEDIA_INTERFACE(heth->Init.MediaInterface));  
+  
+  if(heth->State == HAL_ETH_STATE_RESET)
+ 8006142:	687b      	ldr	r3, [r7, #4]
+ 8006144:	f893 3044 	ldrb.w	r3, [r3, #68]	; 0x44
+ 8006148:	b2db      	uxtb	r3, r3
+ 800614a:	2b00      	cmp	r3, #0
+ 800614c:	d106      	bne.n	800615c <HAL_ETH_Init+0x40>
+  {
+    /* Allocate lock resource and initialize it */
+    heth->Lock = HAL_UNLOCKED;
+ 800614e:	687b      	ldr	r3, [r7, #4]
+ 8006150:	2200      	movs	r2, #0
+ 8006152:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+    }
+    heth->MspInitCallback(heth);
+
+#else
+    /* Init the low level hardware : GPIO, CLOCK, NVIC. */
+    HAL_ETH_MspInit(heth);
+ 8006156:	6878      	ldr	r0, [r7, #4]
+ 8006158:	f006 fa70 	bl	800c63c <HAL_ETH_MspInit>
+#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
+  }
+  
+  /* Enable SYSCFG Clock */
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 800615c:	4b9e      	ldr	r3, [pc, #632]	; (80063d8 <HAL_ETH_Init+0x2bc>)
+ 800615e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8006160:	4a9d      	ldr	r2, [pc, #628]	; (80063d8 <HAL_ETH_Init+0x2bc>)
+ 8006162:	f443 4380 	orr.w	r3, r3, #16384	; 0x4000
+ 8006166:	6453      	str	r3, [r2, #68]	; 0x44
+ 8006168:	4b9b      	ldr	r3, [pc, #620]	; (80063d8 <HAL_ETH_Init+0x2bc>)
+ 800616a:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 800616c:	f403 4380 	and.w	r3, r3, #16384	; 0x4000
+ 8006170:	60bb      	str	r3, [r7, #8]
+ 8006172:	68bb      	ldr	r3, [r7, #8]
+  
+  /* Select MII or RMII Mode*/
+  SYSCFG->PMC &= ~(SYSCFG_PMC_MII_RMII_SEL);
+ 8006174:	4b99      	ldr	r3, [pc, #612]	; (80063dc <HAL_ETH_Init+0x2c0>)
+ 8006176:	685b      	ldr	r3, [r3, #4]
+ 8006178:	4a98      	ldr	r2, [pc, #608]	; (80063dc <HAL_ETH_Init+0x2c0>)
+ 800617a:	f423 0300 	bic.w	r3, r3, #8388608	; 0x800000
+ 800617e:	6053      	str	r3, [r2, #4]
+  SYSCFG->PMC |= (uint32_t)heth->Init.MediaInterface;
+ 8006180:	4b96      	ldr	r3, [pc, #600]	; (80063dc <HAL_ETH_Init+0x2c0>)
+ 8006182:	685a      	ldr	r2, [r3, #4]
+ 8006184:	687b      	ldr	r3, [r7, #4]
+ 8006186:	6a1b      	ldr	r3, [r3, #32]
+ 8006188:	4994      	ldr	r1, [pc, #592]	; (80063dc <HAL_ETH_Init+0x2c0>)
+ 800618a:	4313      	orrs	r3, r2
+ 800618c:	604b      	str	r3, [r1, #4]
+  
+  /* Ethernet Software reset */
+  /* Set the SWR bit: resets all MAC subsystem internal registers and logic */
+  /* After reset all the registers holds their respective reset values */
+  (heth->Instance)->DMABMR |= ETH_DMABMR_SR;
+ 800618e:	687b      	ldr	r3, [r7, #4]
+ 8006190:	681b      	ldr	r3, [r3, #0]
+ 8006192:	f503 5380 	add.w	r3, r3, #4096	; 0x1000
+ 8006196:	681a      	ldr	r2, [r3, #0]
+ 8006198:	687b      	ldr	r3, [r7, #4]
+ 800619a:	681b      	ldr	r3, [r3, #0]
+ 800619c:	f042 0201 	orr.w	r2, r2, #1
+ 80061a0:	f503 5380 	add.w	r3, r3, #4096	; 0x1000
+ 80061a4:	601a      	str	r2, [r3, #0]
+  
+  /* Get tick */
+  tickstart = HAL_GetTick();
+ 80061a6:	f7fe fccf 	bl	8004b48 <HAL_GetTick>
+ 80061aa:	6178      	str	r0, [r7, #20]
+  
+  /* Wait for software reset */
+  while (((heth->Instance)->DMABMR & ETH_DMABMR_SR) != (uint32_t)RESET)
+ 80061ac:	e011      	b.n	80061d2 <HAL_ETH_Init+0xb6>
+  {
+    /* Check for the Timeout */
+    if((HAL_GetTick() - tickstart ) > ETH_TIMEOUT_SWRESET)
+ 80061ae:	f7fe fccb 	bl	8004b48 <HAL_GetTick>
+ 80061b2:	4602      	mov	r2, r0
+ 80061b4:	697b      	ldr	r3, [r7, #20]
+ 80061b6:	1ad3      	subs	r3, r2, r3
+ 80061b8:	f5b3 7ffa 	cmp.w	r3, #500	; 0x1f4
+ 80061bc:	d909      	bls.n	80061d2 <HAL_ETH_Init+0xb6>
+    {     
+      heth->State= HAL_ETH_STATE_TIMEOUT;
+ 80061be:	687b      	ldr	r3, [r7, #4]
+ 80061c0:	2203      	movs	r2, #3
+ 80061c2:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+      /* Process Unlocked */
+      __HAL_UNLOCK(heth);
+ 80061c6:	687b      	ldr	r3, [r7, #4]
+ 80061c8:	2200      	movs	r2, #0
+ 80061ca:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+    
+      /* Note: The SWR is not performed if the ETH_RX_CLK or the ETH_TX_CLK are  
+         not available, please check your external PHY or the IO configuration */
+               
+      return HAL_TIMEOUT;
+ 80061ce:	2303      	movs	r3, #3
+ 80061d0:	e13b      	b.n	800644a <HAL_ETH_Init+0x32e>
+  while (((heth->Instance)->DMABMR & ETH_DMABMR_SR) != (uint32_t)RESET)
+ 80061d2:	687b      	ldr	r3, [r7, #4]
+ 80061d4:	681b      	ldr	r3, [r3, #0]
+ 80061d6:	f503 5380 	add.w	r3, r3, #4096	; 0x1000
+ 80061da:	681b      	ldr	r3, [r3, #0]
+ 80061dc:	f003 0301 	and.w	r3, r3, #1
+ 80061e0:	2b00      	cmp	r3, #0
+ 80061e2:	d1e4      	bne.n	80061ae <HAL_ETH_Init+0x92>
+    }
+  }
+  
+  /*-------------------------------- MAC Initialization ----------------------*/
+  /* Get the ETHERNET MACMIIAR value */
+  tempreg = (heth->Instance)->MACMIIAR;
+ 80061e4:	687b      	ldr	r3, [r7, #4]
+ 80061e6:	681b      	ldr	r3, [r3, #0]
+ 80061e8:	691b      	ldr	r3, [r3, #16]
+ 80061ea:	61fb      	str	r3, [r7, #28]
+  /* Clear CSR Clock Range CR[2:0] bits */
+  tempreg &= ETH_MACMIIAR_CR_MASK;
+ 80061ec:	69fb      	ldr	r3, [r7, #28]
+ 80061ee:	f023 031c 	bic.w	r3, r3, #28
+ 80061f2:	61fb      	str	r3, [r7, #28]
+  
+  /* Get hclk frequency value */
+  hclk = HAL_RCC_GetHCLKFreq();
+ 80061f4:	f003 f9c8 	bl	8009588 <HAL_RCC_GetHCLKFreq>
+ 80061f8:	61b8      	str	r0, [r7, #24]
+  
+  /* Set CR bits depending on hclk value */
+  if((hclk >= 20000000)&&(hclk < 35000000))
+ 80061fa:	69bb      	ldr	r3, [r7, #24]
+ 80061fc:	4a78      	ldr	r2, [pc, #480]	; (80063e0 <HAL_ETH_Init+0x2c4>)
+ 80061fe:	4293      	cmp	r3, r2
+ 8006200:	d908      	bls.n	8006214 <HAL_ETH_Init+0xf8>
+ 8006202:	69bb      	ldr	r3, [r7, #24]
+ 8006204:	4a77      	ldr	r2, [pc, #476]	; (80063e4 <HAL_ETH_Init+0x2c8>)
+ 8006206:	4293      	cmp	r3, r2
+ 8006208:	d804      	bhi.n	8006214 <HAL_ETH_Init+0xf8>
+  {
+    /* CSR Clock Range between 20-35 MHz */
+    tempreg |= (uint32_t)ETH_MACMIIAR_CR_Div16;
+ 800620a:	69fb      	ldr	r3, [r7, #28]
+ 800620c:	f043 0308 	orr.w	r3, r3, #8
+ 8006210:	61fb      	str	r3, [r7, #28]
+ 8006212:	e027      	b.n	8006264 <HAL_ETH_Init+0x148>
+  }
+  else if((hclk >= 35000000)&&(hclk < 60000000))
+ 8006214:	69bb      	ldr	r3, [r7, #24]
+ 8006216:	4a73      	ldr	r2, [pc, #460]	; (80063e4 <HAL_ETH_Init+0x2c8>)
+ 8006218:	4293      	cmp	r3, r2
+ 800621a:	d908      	bls.n	800622e <HAL_ETH_Init+0x112>
+ 800621c:	69bb      	ldr	r3, [r7, #24]
+ 800621e:	4a72      	ldr	r2, [pc, #456]	; (80063e8 <HAL_ETH_Init+0x2cc>)
+ 8006220:	4293      	cmp	r3, r2
+ 8006222:	d804      	bhi.n	800622e <HAL_ETH_Init+0x112>
+  {
+    /* CSR Clock Range between 35-60 MHz */ 
+    tempreg |= (uint32_t)ETH_MACMIIAR_CR_Div26;
+ 8006224:	69fb      	ldr	r3, [r7, #28]
+ 8006226:	f043 030c 	orr.w	r3, r3, #12
+ 800622a:	61fb      	str	r3, [r7, #28]
+ 800622c:	e01a      	b.n	8006264 <HAL_ETH_Init+0x148>
+  }  
+  else if((hclk >= 60000000)&&(hclk < 100000000))
+ 800622e:	69bb      	ldr	r3, [r7, #24]
+ 8006230:	4a6d      	ldr	r2, [pc, #436]	; (80063e8 <HAL_ETH_Init+0x2cc>)
+ 8006232:	4293      	cmp	r3, r2
+ 8006234:	d903      	bls.n	800623e <HAL_ETH_Init+0x122>
+ 8006236:	69bb      	ldr	r3, [r7, #24]
+ 8006238:	4a6c      	ldr	r2, [pc, #432]	; (80063ec <HAL_ETH_Init+0x2d0>)
+ 800623a:	4293      	cmp	r3, r2
+ 800623c:	d911      	bls.n	8006262 <HAL_ETH_Init+0x146>
+  {
+    /* CSR Clock Range between 60-100 MHz */ 
+    tempreg |= (uint32_t)ETH_MACMIIAR_CR_Div42;
+  }  
+  else if((hclk >= 100000000)&&(hclk < 150000000))
+ 800623e:	69bb      	ldr	r3, [r7, #24]
+ 8006240:	4a6a      	ldr	r2, [pc, #424]	; (80063ec <HAL_ETH_Init+0x2d0>)
+ 8006242:	4293      	cmp	r3, r2
+ 8006244:	d908      	bls.n	8006258 <HAL_ETH_Init+0x13c>
+ 8006246:	69bb      	ldr	r3, [r7, #24]
+ 8006248:	4a69      	ldr	r2, [pc, #420]	; (80063f0 <HAL_ETH_Init+0x2d4>)
+ 800624a:	4293      	cmp	r3, r2
+ 800624c:	d804      	bhi.n	8006258 <HAL_ETH_Init+0x13c>
+  {
+    /* CSR Clock Range between 100-150 MHz */ 
+    tempreg |= (uint32_t)ETH_MACMIIAR_CR_Div62;
+ 800624e:	69fb      	ldr	r3, [r7, #28]
+ 8006250:	f043 0304 	orr.w	r3, r3, #4
+ 8006254:	61fb      	str	r3, [r7, #28]
+ 8006256:	e005      	b.n	8006264 <HAL_ETH_Init+0x148>
+  }
+  else /* ((hclk >= 150000000)&&(hclk <= 216000000)) */
+  {
+    /* CSR Clock Range between 150-216 MHz */ 
+    tempreg |= (uint32_t)ETH_MACMIIAR_CR_Div102;    
+ 8006258:	69fb      	ldr	r3, [r7, #28]
+ 800625a:	f043 0310 	orr.w	r3, r3, #16
+ 800625e:	61fb      	str	r3, [r7, #28]
+ 8006260:	e000      	b.n	8006264 <HAL_ETH_Init+0x148>
+    tempreg |= (uint32_t)ETH_MACMIIAR_CR_Div42;
+ 8006262:	bf00      	nop
+  }
+  
+  /* Write to ETHERNET MAC MIIAR: Configure the ETHERNET CSR Clock Range */
+  (heth->Instance)->MACMIIAR = (uint32_t)tempreg;
+ 8006264:	687b      	ldr	r3, [r7, #4]
+ 8006266:	681b      	ldr	r3, [r3, #0]
+ 8006268:	69fa      	ldr	r2, [r7, #28]
+ 800626a:	611a      	str	r2, [r3, #16]
+  
+  /*-------------------- PHY initialization and configuration ----------------*/
+  /* Put the PHY in reset mode */
+  if((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_RESET)) != HAL_OK)
+ 800626c:	f44f 4200 	mov.w	r2, #32768	; 0x8000
+ 8006270:	2100      	movs	r1, #0
+ 8006272:	6878      	ldr	r0, [r7, #4]
+ 8006274:	f000 fc19 	bl	8006aaa <HAL_ETH_WritePHYRegister>
+ 8006278:	4603      	mov	r3, r0
+ 800627a:	2b00      	cmp	r3, #0
+ 800627c:	d00b      	beq.n	8006296 <HAL_ETH_Init+0x17a>
+  {
+    /* In case of write timeout */
+    err = ETH_ERROR;
+ 800627e:	2301      	movs	r3, #1
+ 8006280:	613b      	str	r3, [r7, #16]
+    
+    /* Config MAC and DMA */
+    ETH_MACDMAConfig(heth, err);
+ 8006282:	6939      	ldr	r1, [r7, #16]
+ 8006284:	6878      	ldr	r0, [r7, #4]
+ 8006286:	f000 fdcf 	bl	8006e28 <ETH_MACDMAConfig>
+    
+    /* Set the ETH peripheral state to READY */
+    heth->State = HAL_ETH_STATE_READY;
+ 800628a:	687b      	ldr	r3, [r7, #4]
+ 800628c:	2201      	movs	r2, #1
+ 800628e:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+    
+    /* Return HAL_ERROR */
+    return HAL_ERROR;
+ 8006292:	2301      	movs	r3, #1
+ 8006294:	e0d9      	b.n	800644a <HAL_ETH_Init+0x32e>
+  }
+  
+  /* Delay to assure PHY reset */
+  HAL_Delay(PHY_RESET_DELAY);
+ 8006296:	20ff      	movs	r0, #255	; 0xff
+ 8006298:	f7fe fc62 	bl	8004b60 <HAL_Delay>
+  
+  if((heth->Init).AutoNegotiation != ETH_AUTONEGOTIATION_DISABLE)
+ 800629c:	687b      	ldr	r3, [r7, #4]
+ 800629e:	685b      	ldr	r3, [r3, #4]
+ 80062a0:	2b00      	cmp	r3, #0
+ 80062a2:	f000 80a7 	beq.w	80063f4 <HAL_ETH_Init+0x2d8>
+  {
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 80062a6:	f7fe fc4f 	bl	8004b48 <HAL_GetTick>
+ 80062aa:	6178      	str	r0, [r7, #20]
+    
+    /* We wait for linked status */
+    do
+    {
+      HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg);
+ 80062ac:	f107 030c 	add.w	r3, r7, #12
+ 80062b0:	461a      	mov	r2, r3
+ 80062b2:	2101      	movs	r1, #1
+ 80062b4:	6878      	ldr	r0, [r7, #4]
+ 80062b6:	f000 fb90 	bl	80069da <HAL_ETH_ReadPHYRegister>
+      
+      /* Check for the Timeout */
+      if((HAL_GetTick() - tickstart ) > ETH_TIMEOUT_LINKED_STATE)
+ 80062ba:	f7fe fc45 	bl	8004b48 <HAL_GetTick>
+ 80062be:	4602      	mov	r2, r0
+ 80062c0:	697b      	ldr	r3, [r7, #20]
+ 80062c2:	1ad3      	subs	r3, r2, r3
+ 80062c4:	f241 3288 	movw	r2, #5000	; 0x1388
+ 80062c8:	4293      	cmp	r3, r2
+ 80062ca:	d90f      	bls.n	80062ec <HAL_ETH_Init+0x1d0>
+      {
+        /* In case of write timeout */
+        err = ETH_ERROR;
+ 80062cc:	2301      	movs	r3, #1
+ 80062ce:	613b      	str	r3, [r7, #16]
+      
+        /* Config MAC and DMA */
+        ETH_MACDMAConfig(heth, err);
+ 80062d0:	6939      	ldr	r1, [r7, #16]
+ 80062d2:	6878      	ldr	r0, [r7, #4]
+ 80062d4:	f000 fda8 	bl	8006e28 <ETH_MACDMAConfig>
+        
+        heth->State= HAL_ETH_STATE_READY;
+ 80062d8:	687b      	ldr	r3, [r7, #4]
+ 80062da:	2201      	movs	r2, #1
+ 80062dc:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+        /* Process Unlocked */
+        __HAL_UNLOCK(heth);
+ 80062e0:	687b      	ldr	r3, [r7, #4]
+ 80062e2:	2200      	movs	r2, #0
+ 80062e4:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+    
+        return HAL_TIMEOUT;
+ 80062e8:	2303      	movs	r3, #3
+ 80062ea:	e0ae      	b.n	800644a <HAL_ETH_Init+0x32e>
+      }
+    } while (((phyreg & PHY_LINKED_STATUS) != PHY_LINKED_STATUS));
+ 80062ec:	68fb      	ldr	r3, [r7, #12]
+ 80062ee:	f003 0304 	and.w	r3, r3, #4
+ 80062f2:	2b00      	cmp	r3, #0
+ 80062f4:	d0da      	beq.n	80062ac <HAL_ETH_Init+0x190>
+
+    
+    /* Enable Auto-Negotiation */
+    if((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_AUTONEGOTIATION)) != HAL_OK)
+ 80062f6:	f44f 5280 	mov.w	r2, #4096	; 0x1000
+ 80062fa:	2100      	movs	r1, #0
+ 80062fc:	6878      	ldr	r0, [r7, #4]
+ 80062fe:	f000 fbd4 	bl	8006aaa <HAL_ETH_WritePHYRegister>
+ 8006302:	4603      	mov	r3, r0
+ 8006304:	2b00      	cmp	r3, #0
+ 8006306:	d00b      	beq.n	8006320 <HAL_ETH_Init+0x204>
+    {
+      /* In case of write timeout */
+      err = ETH_ERROR;
+ 8006308:	2301      	movs	r3, #1
+ 800630a:	613b      	str	r3, [r7, #16]
+      
+      /* Config MAC and DMA */
+      ETH_MACDMAConfig(heth, err);
+ 800630c:	6939      	ldr	r1, [r7, #16]
+ 800630e:	6878      	ldr	r0, [r7, #4]
+ 8006310:	f000 fd8a 	bl	8006e28 <ETH_MACDMAConfig>
+      
+      /* Set the ETH peripheral state to READY */
+      heth->State = HAL_ETH_STATE_READY;
+ 8006314:	687b      	ldr	r3, [r7, #4]
+ 8006316:	2201      	movs	r2, #1
+ 8006318:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+      
+      /* Return HAL_ERROR */
+      return HAL_ERROR;   
+ 800631c:	2301      	movs	r3, #1
+ 800631e:	e094      	b.n	800644a <HAL_ETH_Init+0x32e>
+    }
+    
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 8006320:	f7fe fc12 	bl	8004b48 <HAL_GetTick>
+ 8006324:	6178      	str	r0, [r7, #20]
+    
+    /* Wait until the auto-negotiation will be completed */
+    do
+    {
+      HAL_ETH_ReadPHYRegister(heth, PHY_BSR, &phyreg);
+ 8006326:	f107 030c 	add.w	r3, r7, #12
+ 800632a:	461a      	mov	r2, r3
+ 800632c:	2101      	movs	r1, #1
+ 800632e:	6878      	ldr	r0, [r7, #4]
+ 8006330:	f000 fb53 	bl	80069da <HAL_ETH_ReadPHYRegister>
+      
+      /* Check for the Timeout */
+      if((HAL_GetTick() - tickstart ) > ETH_TIMEOUT_AUTONEGO_COMPLETED)
+ 8006334:	f7fe fc08 	bl	8004b48 <HAL_GetTick>
+ 8006338:	4602      	mov	r2, r0
+ 800633a:	697b      	ldr	r3, [r7, #20]
+ 800633c:	1ad3      	subs	r3, r2, r3
+ 800633e:	f241 3288 	movw	r2, #5000	; 0x1388
+ 8006342:	4293      	cmp	r3, r2
+ 8006344:	d90f      	bls.n	8006366 <HAL_ETH_Init+0x24a>
+      {
+        /* In case of write timeout */
+        err = ETH_ERROR;
+ 8006346:	2301      	movs	r3, #1
+ 8006348:	613b      	str	r3, [r7, #16]
+      
+        /* Config MAC and DMA */
+        ETH_MACDMAConfig(heth, err);
+ 800634a:	6939      	ldr	r1, [r7, #16]
+ 800634c:	6878      	ldr	r0, [r7, #4]
+ 800634e:	f000 fd6b 	bl	8006e28 <ETH_MACDMAConfig>
+        
+        heth->State= HAL_ETH_STATE_READY;
+ 8006352:	687b      	ldr	r3, [r7, #4]
+ 8006354:	2201      	movs	r2, #1
+ 8006356:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+        /* Process Unlocked */
+        __HAL_UNLOCK(heth);
+ 800635a:	687b      	ldr	r3, [r7, #4]
+ 800635c:	2200      	movs	r2, #0
+ 800635e:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+    
+        return HAL_TIMEOUT;
+ 8006362:	2303      	movs	r3, #3
+ 8006364:	e071      	b.n	800644a <HAL_ETH_Init+0x32e>
+      }
+      
+    } while (((phyreg & PHY_AUTONEGO_COMPLETE) != PHY_AUTONEGO_COMPLETE));
+ 8006366:	68fb      	ldr	r3, [r7, #12]
+ 8006368:	f003 0320 	and.w	r3, r3, #32
+ 800636c:	2b00      	cmp	r3, #0
+ 800636e:	d0da      	beq.n	8006326 <HAL_ETH_Init+0x20a>
+    
+    /* Read the result of the auto-negotiation */
+    if((HAL_ETH_ReadPHYRegister(heth, PHY_SR, &phyreg)) != HAL_OK)
+ 8006370:	f107 030c 	add.w	r3, r7, #12
+ 8006374:	461a      	mov	r2, r3
+ 8006376:	211f      	movs	r1, #31
+ 8006378:	6878      	ldr	r0, [r7, #4]
+ 800637a:	f000 fb2e 	bl	80069da <HAL_ETH_ReadPHYRegister>
+ 800637e:	4603      	mov	r3, r0
+ 8006380:	2b00      	cmp	r3, #0
+ 8006382:	d00b      	beq.n	800639c <HAL_ETH_Init+0x280>
+    {
+      /* In case of write timeout */
+      err = ETH_ERROR;
+ 8006384:	2301      	movs	r3, #1
+ 8006386:	613b      	str	r3, [r7, #16]
+      
+      /* Config MAC and DMA */
+      ETH_MACDMAConfig(heth, err);
+ 8006388:	6939      	ldr	r1, [r7, #16]
+ 800638a:	6878      	ldr	r0, [r7, #4]
+ 800638c:	f000 fd4c 	bl	8006e28 <ETH_MACDMAConfig>
+      
+      /* Set the ETH peripheral state to READY */
+      heth->State = HAL_ETH_STATE_READY;
+ 8006390:	687b      	ldr	r3, [r7, #4]
+ 8006392:	2201      	movs	r2, #1
+ 8006394:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+      
+      /* Return HAL_ERROR */
+      return HAL_ERROR;   
+ 8006398:	2301      	movs	r3, #1
+ 800639a:	e056      	b.n	800644a <HAL_ETH_Init+0x32e>
+    }
+    
+    /* Configure the MAC with the Duplex Mode fixed by the auto-negotiation process */
+    if((phyreg & PHY_DUPLEX_STATUS) != (uint32_t)RESET)
+ 800639c:	68fb      	ldr	r3, [r7, #12]
+ 800639e:	f003 0310 	and.w	r3, r3, #16
+ 80063a2:	2b00      	cmp	r3, #0
+ 80063a4:	d004      	beq.n	80063b0 <HAL_ETH_Init+0x294>
+    {
+      /* Set Ethernet duplex mode to Full-duplex following the auto-negotiation */
+      (heth->Init).DuplexMode = ETH_MODE_FULLDUPLEX;  
+ 80063a6:	687b      	ldr	r3, [r7, #4]
+ 80063a8:	f44f 6200 	mov.w	r2, #2048	; 0x800
+ 80063ac:	60da      	str	r2, [r3, #12]
+ 80063ae:	e002      	b.n	80063b6 <HAL_ETH_Init+0x29a>
+    }
+    else
+    {
+      /* Set Ethernet duplex mode to Half-duplex following the auto-negotiation */
+      (heth->Init).DuplexMode = ETH_MODE_HALFDUPLEX;           
+ 80063b0:	687b      	ldr	r3, [r7, #4]
+ 80063b2:	2200      	movs	r2, #0
+ 80063b4:	60da      	str	r2, [r3, #12]
+    }
+    /* Configure the MAC with the speed fixed by the auto-negotiation process */
+    if((phyreg & PHY_SPEED_STATUS) == PHY_SPEED_STATUS)
+ 80063b6:	68fb      	ldr	r3, [r7, #12]
+ 80063b8:	f003 0304 	and.w	r3, r3, #4
+ 80063bc:	2b00      	cmp	r3, #0
+ 80063be:	d003      	beq.n	80063c8 <HAL_ETH_Init+0x2ac>
+    {  
+      /* Set Ethernet speed to 10M following the auto-negotiation */
+      (heth->Init).Speed = ETH_SPEED_10M; 
+ 80063c0:	687b      	ldr	r3, [r7, #4]
+ 80063c2:	2200      	movs	r2, #0
+ 80063c4:	609a      	str	r2, [r3, #8]
+ 80063c6:	e037      	b.n	8006438 <HAL_ETH_Init+0x31c>
+    }
+    else
+    {   
+      /* Set Ethernet speed to 100M following the auto-negotiation */ 
+      (heth->Init).Speed = ETH_SPEED_100M;
+ 80063c8:	687b      	ldr	r3, [r7, #4]
+ 80063ca:	f44f 4280 	mov.w	r2, #16384	; 0x4000
+ 80063ce:	609a      	str	r2, [r3, #8]
+ 80063d0:	e032      	b.n	8006438 <HAL_ETH_Init+0x31c>
+ 80063d2:	bf00      	nop
+ 80063d4:	03938700 	.word	0x03938700
+ 80063d8:	40023800 	.word	0x40023800
+ 80063dc:	40013800 	.word	0x40013800
+ 80063e0:	01312cff 	.word	0x01312cff
+ 80063e4:	02160ebf 	.word	0x02160ebf
+ 80063e8:	039386ff 	.word	0x039386ff
+ 80063ec:	05f5e0ff 	.word	0x05f5e0ff
+ 80063f0:	08f0d17f 	.word	0x08f0d17f
+    /* Check parameters */
+    assert_param(IS_ETH_SPEED(heth->Init.Speed));
+    assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode));
+    
+    /* Set MAC Speed and Duplex Mode */
+    if(HAL_ETH_WritePHYRegister(heth, PHY_BCR, ((uint16_t)((heth->Init).DuplexMode >> 3) |
+ 80063f4:	687b      	ldr	r3, [r7, #4]
+ 80063f6:	68db      	ldr	r3, [r3, #12]
+ 80063f8:	08db      	lsrs	r3, r3, #3
+ 80063fa:	b29a      	uxth	r2, r3
+                                                (uint16_t)((heth->Init).Speed >> 1))) != HAL_OK)
+ 80063fc:	687b      	ldr	r3, [r7, #4]
+ 80063fe:	689b      	ldr	r3, [r3, #8]
+ 8006400:	085b      	lsrs	r3, r3, #1
+ 8006402:	b29b      	uxth	r3, r3
+    if(HAL_ETH_WritePHYRegister(heth, PHY_BCR, ((uint16_t)((heth->Init).DuplexMode >> 3) |
+ 8006404:	4313      	orrs	r3, r2
+ 8006406:	b29b      	uxth	r3, r3
+ 8006408:	461a      	mov	r2, r3
+ 800640a:	2100      	movs	r1, #0
+ 800640c:	6878      	ldr	r0, [r7, #4]
+ 800640e:	f000 fb4c 	bl	8006aaa <HAL_ETH_WritePHYRegister>
+ 8006412:	4603      	mov	r3, r0
+ 8006414:	2b00      	cmp	r3, #0
+ 8006416:	d00b      	beq.n	8006430 <HAL_ETH_Init+0x314>
+    {
+      /* In case of write timeout */
+      err = ETH_ERROR;
+ 8006418:	2301      	movs	r3, #1
+ 800641a:	613b      	str	r3, [r7, #16]
+      
+      /* Config MAC and DMA */
+      ETH_MACDMAConfig(heth, err);
+ 800641c:	6939      	ldr	r1, [r7, #16]
+ 800641e:	6878      	ldr	r0, [r7, #4]
+ 8006420:	f000 fd02 	bl	8006e28 <ETH_MACDMAConfig>
+      
+      /* Set the ETH peripheral state to READY */
+      heth->State = HAL_ETH_STATE_READY;
+ 8006424:	687b      	ldr	r3, [r7, #4]
+ 8006426:	2201      	movs	r2, #1
+ 8006428:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+      
+      /* Return HAL_ERROR */
+      return HAL_ERROR;
+ 800642c:	2301      	movs	r3, #1
+ 800642e:	e00c      	b.n	800644a <HAL_ETH_Init+0x32e>
+    }  
+    
+    /* Delay to assure PHY configuration */
+    HAL_Delay(PHY_CONFIG_DELAY);
+ 8006430:	f640 70ff 	movw	r0, #4095	; 0xfff
+ 8006434:	f7fe fb94 	bl	8004b60 <HAL_Delay>
+  }
+  
+  /* Config MAC and DMA */
+  ETH_MACDMAConfig(heth, err);
+ 8006438:	6939      	ldr	r1, [r7, #16]
+ 800643a:	6878      	ldr	r0, [r7, #4]
+ 800643c:	f000 fcf4 	bl	8006e28 <ETH_MACDMAConfig>
+  
+  /* Set ETH HAL State to Ready */
+  heth->State= HAL_ETH_STATE_READY;
+ 8006440:	687b      	ldr	r3, [r7, #4]
+ 8006442:	2201      	movs	r2, #1
+ 8006444:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Return function status */
+  return HAL_OK;
+ 8006448:	2300      	movs	r3, #0
+}
+ 800644a:	4618      	mov	r0, r3
+ 800644c:	3720      	adds	r7, #32
+ 800644e:	46bd      	mov	sp, r7
+ 8006450:	bd80      	pop	{r7, pc}
+ 8006452:	bf00      	nop
+
+08006454 <HAL_ETH_DMATxDescListInit>:
+  * @param  TxBuff Pointer to the first TxBuffer list
+  * @param  TxBuffCount Number of the used Tx desc in the list
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ETH_DMATxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMATxDescTab, uint8_t *TxBuff, uint32_t TxBuffCount)
+{
+ 8006454:	b480      	push	{r7}
+ 8006456:	b087      	sub	sp, #28
+ 8006458:	af00      	add	r7, sp, #0
+ 800645a:	60f8      	str	r0, [r7, #12]
+ 800645c:	60b9      	str	r1, [r7, #8]
+ 800645e:	607a      	str	r2, [r7, #4]
+ 8006460:	603b      	str	r3, [r7, #0]
+  uint32_t i = 0;
+ 8006462:	2300      	movs	r3, #0
+ 8006464:	617b      	str	r3, [r7, #20]
+  ETH_DMADescTypeDef *dmatxdesc;
+  
+  /* Process Locked */
+  __HAL_LOCK(heth);
+ 8006466:	68fb      	ldr	r3, [r7, #12]
+ 8006468:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 800646c:	2b01      	cmp	r3, #1
+ 800646e:	d101      	bne.n	8006474 <HAL_ETH_DMATxDescListInit+0x20>
+ 8006470:	2302      	movs	r3, #2
+ 8006472:	e052      	b.n	800651a <HAL_ETH_DMATxDescListInit+0xc6>
+ 8006474:	68fb      	ldr	r3, [r7, #12]
+ 8006476:	2201      	movs	r2, #1
+ 8006478:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Set the ETH peripheral state to BUSY */
+  heth->State = HAL_ETH_STATE_BUSY;
+ 800647c:	68fb      	ldr	r3, [r7, #12]
+ 800647e:	2202      	movs	r2, #2
+ 8006480:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Set the DMATxDescToSet pointer with the first one of the DMATxDescTab list */
+  heth->TxDesc = DMATxDescTab;
+ 8006484:	68fb      	ldr	r3, [r7, #12]
+ 8006486:	68ba      	ldr	r2, [r7, #8]
+ 8006488:	62da      	str	r2, [r3, #44]	; 0x2c
+  
+  /* Fill each DMATxDesc descriptor with the right values */   
+  for(i=0; i < TxBuffCount; i++)
+ 800648a:	2300      	movs	r3, #0
+ 800648c:	617b      	str	r3, [r7, #20]
+ 800648e:	e030      	b.n	80064f2 <HAL_ETH_DMATxDescListInit+0x9e>
+  {
+    /* Get the pointer on the ith member of the Tx Desc list */
+    dmatxdesc = DMATxDescTab + i;
+ 8006490:	697b      	ldr	r3, [r7, #20]
+ 8006492:	015b      	lsls	r3, r3, #5
+ 8006494:	68ba      	ldr	r2, [r7, #8]
+ 8006496:	4413      	add	r3, r2
+ 8006498:	613b      	str	r3, [r7, #16]
+    
+    /* Set Second Address Chained bit */
+    dmatxdesc->Status = ETH_DMATXDESC_TCH;  
+ 800649a:	693b      	ldr	r3, [r7, #16]
+ 800649c:	f44f 1280 	mov.w	r2, #1048576	; 0x100000
+ 80064a0:	601a      	str	r2, [r3, #0]
+    
+    /* Set Buffer1 address pointer */
+    dmatxdesc->Buffer1Addr = (uint32_t)(&TxBuff[i*ETH_TX_BUF_SIZE]);
+ 80064a2:	697b      	ldr	r3, [r7, #20]
+ 80064a4:	f240 52f4 	movw	r2, #1524	; 0x5f4
+ 80064a8:	fb02 f303 	mul.w	r3, r2, r3
+ 80064ac:	687a      	ldr	r2, [r7, #4]
+ 80064ae:	4413      	add	r3, r2
+ 80064b0:	461a      	mov	r2, r3
+ 80064b2:	693b      	ldr	r3, [r7, #16]
+ 80064b4:	609a      	str	r2, [r3, #8]
+    
+    if ((heth->Init).ChecksumMode == ETH_CHECKSUM_BY_HARDWARE)
+ 80064b6:	68fb      	ldr	r3, [r7, #12]
+ 80064b8:	69db      	ldr	r3, [r3, #28]
+ 80064ba:	2b00      	cmp	r3, #0
+ 80064bc:	d105      	bne.n	80064ca <HAL_ETH_DMATxDescListInit+0x76>
+    {
+      /* Set the DMA Tx descriptors checksum insertion */
+      dmatxdesc->Status |= ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL;
+ 80064be:	693b      	ldr	r3, [r7, #16]
+ 80064c0:	681b      	ldr	r3, [r3, #0]
+ 80064c2:	f443 0240 	orr.w	r2, r3, #12582912	; 0xc00000
+ 80064c6:	693b      	ldr	r3, [r7, #16]
+ 80064c8:	601a      	str	r2, [r3, #0]
+    }
+    
+    /* Initialize the next descriptor with the Next Descriptor Polling Enable */
+    if(i < (TxBuffCount-1))
+ 80064ca:	683b      	ldr	r3, [r7, #0]
+ 80064cc:	3b01      	subs	r3, #1
+ 80064ce:	697a      	ldr	r2, [r7, #20]
+ 80064d0:	429a      	cmp	r2, r3
+ 80064d2:	d208      	bcs.n	80064e6 <HAL_ETH_DMATxDescListInit+0x92>
+    {
+      /* Set next descriptor address register with next descriptor base address */
+      dmatxdesc->Buffer2NextDescAddr = (uint32_t)(DMATxDescTab+i+1);
+ 80064d4:	697b      	ldr	r3, [r7, #20]
+ 80064d6:	3301      	adds	r3, #1
+ 80064d8:	015b      	lsls	r3, r3, #5
+ 80064da:	68ba      	ldr	r2, [r7, #8]
+ 80064dc:	4413      	add	r3, r2
+ 80064de:	461a      	mov	r2, r3
+ 80064e0:	693b      	ldr	r3, [r7, #16]
+ 80064e2:	60da      	str	r2, [r3, #12]
+ 80064e4:	e002      	b.n	80064ec <HAL_ETH_DMATxDescListInit+0x98>
+    }
+    else
+    {
+      /* For last descriptor, set next descriptor address register equal to the first descriptor base address */ 
+      dmatxdesc->Buffer2NextDescAddr = (uint32_t) DMATxDescTab;  
+ 80064e6:	68ba      	ldr	r2, [r7, #8]
+ 80064e8:	693b      	ldr	r3, [r7, #16]
+ 80064ea:	60da      	str	r2, [r3, #12]
+  for(i=0; i < TxBuffCount; i++)
+ 80064ec:	697b      	ldr	r3, [r7, #20]
+ 80064ee:	3301      	adds	r3, #1
+ 80064f0:	617b      	str	r3, [r7, #20]
+ 80064f2:	697a      	ldr	r2, [r7, #20]
+ 80064f4:	683b      	ldr	r3, [r7, #0]
+ 80064f6:	429a      	cmp	r2, r3
+ 80064f8:	d3ca      	bcc.n	8006490 <HAL_ETH_DMATxDescListInit+0x3c>
+    }
+  }
+  
+  /* Set Transmit Descriptor List Address Register */
+  (heth->Instance)->DMATDLAR = (uint32_t) DMATxDescTab;
+ 80064fa:	68fb      	ldr	r3, [r7, #12]
+ 80064fc:	6819      	ldr	r1, [r3, #0]
+ 80064fe:	68ba      	ldr	r2, [r7, #8]
+ 8006500:	f241 0310 	movw	r3, #4112	; 0x1010
+ 8006504:	440b      	add	r3, r1
+ 8006506:	601a      	str	r2, [r3, #0]
+  
+  /* Set ETH HAL State to Ready */
+  heth->State= HAL_ETH_STATE_READY;
+ 8006508:	68fb      	ldr	r3, [r7, #12]
+ 800650a:	2201      	movs	r2, #1
+ 800650c:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Process Unlocked */
+  __HAL_UNLOCK(heth);
+ 8006510:	68fb      	ldr	r3, [r7, #12]
+ 8006512:	2200      	movs	r2, #0
+ 8006514:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Return function status */
+  return HAL_OK;
+ 8006518:	2300      	movs	r3, #0
+}
+ 800651a:	4618      	mov	r0, r3
+ 800651c:	371c      	adds	r7, #28
+ 800651e:	46bd      	mov	sp, r7
+ 8006520:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006524:	4770      	bx	lr
+
+08006526 <HAL_ETH_DMARxDescListInit>:
+  * @param  RxBuff Pointer to the first RxBuffer list
+  * @param  RxBuffCount Number of the used Rx desc in the list
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ETH_DMARxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMARxDescTab, uint8_t *RxBuff, uint32_t RxBuffCount)
+{
+ 8006526:	b480      	push	{r7}
+ 8006528:	b087      	sub	sp, #28
+ 800652a:	af00      	add	r7, sp, #0
+ 800652c:	60f8      	str	r0, [r7, #12]
+ 800652e:	60b9      	str	r1, [r7, #8]
+ 8006530:	607a      	str	r2, [r7, #4]
+ 8006532:	603b      	str	r3, [r7, #0]
+  uint32_t i = 0;
+ 8006534:	2300      	movs	r3, #0
+ 8006536:	617b      	str	r3, [r7, #20]
+  ETH_DMADescTypeDef *DMARxDesc;
+  
+  /* Process Locked */
+  __HAL_LOCK(heth);
+ 8006538:	68fb      	ldr	r3, [r7, #12]
+ 800653a:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 800653e:	2b01      	cmp	r3, #1
+ 8006540:	d101      	bne.n	8006546 <HAL_ETH_DMARxDescListInit+0x20>
+ 8006542:	2302      	movs	r3, #2
+ 8006544:	e056      	b.n	80065f4 <HAL_ETH_DMARxDescListInit+0xce>
+ 8006546:	68fb      	ldr	r3, [r7, #12]
+ 8006548:	2201      	movs	r2, #1
+ 800654a:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Set the ETH peripheral state to BUSY */
+  heth->State = HAL_ETH_STATE_BUSY;
+ 800654e:	68fb      	ldr	r3, [r7, #12]
+ 8006550:	2202      	movs	r2, #2
+ 8006552:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Set the Ethernet RxDesc pointer with the first one of the DMARxDescTab list */
+  heth->RxDesc = DMARxDescTab; 
+ 8006556:	68fb      	ldr	r3, [r7, #12]
+ 8006558:	68ba      	ldr	r2, [r7, #8]
+ 800655a:	629a      	str	r2, [r3, #40]	; 0x28
+  
+  /* Fill each DMARxDesc descriptor with the right values */
+  for(i=0; i < RxBuffCount; i++)
+ 800655c:	2300      	movs	r3, #0
+ 800655e:	617b      	str	r3, [r7, #20]
+ 8006560:	e034      	b.n	80065cc <HAL_ETH_DMARxDescListInit+0xa6>
+  {
+    /* Get the pointer on the ith member of the Rx Desc list */
+    DMARxDesc = DMARxDescTab+i;
+ 8006562:	697b      	ldr	r3, [r7, #20]
+ 8006564:	015b      	lsls	r3, r3, #5
+ 8006566:	68ba      	ldr	r2, [r7, #8]
+ 8006568:	4413      	add	r3, r2
+ 800656a:	613b      	str	r3, [r7, #16]
+    
+    /* Set Own bit of the Rx descriptor Status */
+    DMARxDesc->Status = ETH_DMARXDESC_OWN;
+ 800656c:	693b      	ldr	r3, [r7, #16]
+ 800656e:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
+ 8006572:	601a      	str	r2, [r3, #0]
+    
+    /* Set Buffer1 size and Second Address Chained bit */
+    DMARxDesc->ControlBufferSize = ETH_DMARXDESC_RCH | ETH_RX_BUF_SIZE;  
+ 8006574:	693b      	ldr	r3, [r7, #16]
+ 8006576:	f244 52f4 	movw	r2, #17908	; 0x45f4
+ 800657a:	605a      	str	r2, [r3, #4]
+    
+    /* Set Buffer1 address pointer */
+    DMARxDesc->Buffer1Addr = (uint32_t)(&RxBuff[i*ETH_RX_BUF_SIZE]);
+ 800657c:	697b      	ldr	r3, [r7, #20]
+ 800657e:	f240 52f4 	movw	r2, #1524	; 0x5f4
+ 8006582:	fb02 f303 	mul.w	r3, r2, r3
+ 8006586:	687a      	ldr	r2, [r7, #4]
+ 8006588:	4413      	add	r3, r2
+ 800658a:	461a      	mov	r2, r3
+ 800658c:	693b      	ldr	r3, [r7, #16]
+ 800658e:	609a      	str	r2, [r3, #8]
+    
+    if((heth->Init).RxMode == ETH_RXINTERRUPT_MODE)
+ 8006590:	68fb      	ldr	r3, [r7, #12]
+ 8006592:	699b      	ldr	r3, [r3, #24]
+ 8006594:	2b01      	cmp	r3, #1
+ 8006596:	d105      	bne.n	80065a4 <HAL_ETH_DMARxDescListInit+0x7e>
+    {
+      /* Enable Ethernet DMA Rx Descriptor interrupt */
+      DMARxDesc->ControlBufferSize &= ~ETH_DMARXDESC_DIC;
+ 8006598:	693b      	ldr	r3, [r7, #16]
+ 800659a:	685b      	ldr	r3, [r3, #4]
+ 800659c:	f023 4200 	bic.w	r2, r3, #2147483648	; 0x80000000
+ 80065a0:	693b      	ldr	r3, [r7, #16]
+ 80065a2:	605a      	str	r2, [r3, #4]
+    }
+    
+    /* Initialize the next descriptor with the Next Descriptor Polling Enable */
+    if(i < (RxBuffCount-1))
+ 80065a4:	683b      	ldr	r3, [r7, #0]
+ 80065a6:	3b01      	subs	r3, #1
+ 80065a8:	697a      	ldr	r2, [r7, #20]
+ 80065aa:	429a      	cmp	r2, r3
+ 80065ac:	d208      	bcs.n	80065c0 <HAL_ETH_DMARxDescListInit+0x9a>
+    {
+      /* Set next descriptor address register with next descriptor base address */
+      DMARxDesc->Buffer2NextDescAddr = (uint32_t)(DMARxDescTab+i+1); 
+ 80065ae:	697b      	ldr	r3, [r7, #20]
+ 80065b0:	3301      	adds	r3, #1
+ 80065b2:	015b      	lsls	r3, r3, #5
+ 80065b4:	68ba      	ldr	r2, [r7, #8]
+ 80065b6:	4413      	add	r3, r2
+ 80065b8:	461a      	mov	r2, r3
+ 80065ba:	693b      	ldr	r3, [r7, #16]
+ 80065bc:	60da      	str	r2, [r3, #12]
+ 80065be:	e002      	b.n	80065c6 <HAL_ETH_DMARxDescListInit+0xa0>
+    }
+    else
+    {
+      /* For last descriptor, set next descriptor address register equal to the first descriptor base address */ 
+      DMARxDesc->Buffer2NextDescAddr = (uint32_t)(DMARxDescTab); 
+ 80065c0:	68ba      	ldr	r2, [r7, #8]
+ 80065c2:	693b      	ldr	r3, [r7, #16]
+ 80065c4:	60da      	str	r2, [r3, #12]
+  for(i=0; i < RxBuffCount; i++)
+ 80065c6:	697b      	ldr	r3, [r7, #20]
+ 80065c8:	3301      	adds	r3, #1
+ 80065ca:	617b      	str	r3, [r7, #20]
+ 80065cc:	697a      	ldr	r2, [r7, #20]
+ 80065ce:	683b      	ldr	r3, [r7, #0]
+ 80065d0:	429a      	cmp	r2, r3
+ 80065d2:	d3c6      	bcc.n	8006562 <HAL_ETH_DMARxDescListInit+0x3c>
+    }
+  }
+  
+  /* Set Receive Descriptor List Address Register */
+  (heth->Instance)->DMARDLAR = (uint32_t) DMARxDescTab;
+ 80065d4:	68fb      	ldr	r3, [r7, #12]
+ 80065d6:	6819      	ldr	r1, [r3, #0]
+ 80065d8:	68ba      	ldr	r2, [r7, #8]
+ 80065da:	f241 030c 	movw	r3, #4108	; 0x100c
+ 80065de:	440b      	add	r3, r1
+ 80065e0:	601a      	str	r2, [r3, #0]
+  
+  /* Set ETH HAL State to Ready */
+  heth->State= HAL_ETH_STATE_READY;
+ 80065e2:	68fb      	ldr	r3, [r7, #12]
+ 80065e4:	2201      	movs	r2, #1
+ 80065e6:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Process Unlocked */
+  __HAL_UNLOCK(heth);
+ 80065ea:	68fb      	ldr	r3, [r7, #12]
+ 80065ec:	2200      	movs	r2, #0
+ 80065ee:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Return function status */
+  return HAL_OK;
+ 80065f2:	2300      	movs	r3, #0
+}
+ 80065f4:	4618      	mov	r0, r3
+ 80065f6:	371c      	adds	r7, #28
+ 80065f8:	46bd      	mov	sp, r7
+ 80065fa:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80065fe:	4770      	bx	lr
+
+08006600 <HAL_ETH_TransmitFrame>:
+  *         the configuration information for ETHERNET module
+  * @param  FrameLength Amount of data to be sent
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameLength)
+{
+ 8006600:	b480      	push	{r7}
+ 8006602:	b087      	sub	sp, #28
+ 8006604:	af00      	add	r7, sp, #0
+ 8006606:	6078      	str	r0, [r7, #4]
+ 8006608:	6039      	str	r1, [r7, #0]
+  uint32_t bufcount = 0, size = 0, i = 0;
+ 800660a:	2300      	movs	r3, #0
+ 800660c:	617b      	str	r3, [r7, #20]
+ 800660e:	2300      	movs	r3, #0
+ 8006610:	60fb      	str	r3, [r7, #12]
+ 8006612:	2300      	movs	r3, #0
+ 8006614:	613b      	str	r3, [r7, #16]
+  
+  /* Process Locked */
+  __HAL_LOCK(heth);
+ 8006616:	687b      	ldr	r3, [r7, #4]
+ 8006618:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 800661c:	2b01      	cmp	r3, #1
+ 800661e:	d101      	bne.n	8006624 <HAL_ETH_TransmitFrame+0x24>
+ 8006620:	2302      	movs	r3, #2
+ 8006622:	e0cd      	b.n	80067c0 <HAL_ETH_TransmitFrame+0x1c0>
+ 8006624:	687b      	ldr	r3, [r7, #4]
+ 8006626:	2201      	movs	r2, #1
+ 8006628:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Set the ETH peripheral state to BUSY */
+  heth->State = HAL_ETH_STATE_BUSY;
+ 800662c:	687b      	ldr	r3, [r7, #4]
+ 800662e:	2202      	movs	r2, #2
+ 8006630:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  if (FrameLength == 0) 
+ 8006634:	683b      	ldr	r3, [r7, #0]
+ 8006636:	2b00      	cmp	r3, #0
+ 8006638:	d109      	bne.n	800664e <HAL_ETH_TransmitFrame+0x4e>
+  {
+    /* Set ETH HAL state to READY */
+    heth->State = HAL_ETH_STATE_READY;
+ 800663a:	687b      	ldr	r3, [r7, #4]
+ 800663c:	2201      	movs	r2, #1
+ 800663e:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+    
+    /* Process Unlocked */
+    __HAL_UNLOCK(heth);
+ 8006642:	687b      	ldr	r3, [r7, #4]
+ 8006644:	2200      	movs	r2, #0
+ 8006646:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+    
+    return  HAL_ERROR;                                    
+ 800664a:	2301      	movs	r3, #1
+ 800664c:	e0b8      	b.n	80067c0 <HAL_ETH_TransmitFrame+0x1c0>
+  }  
+  
+  /* Check if the descriptor is owned by the ETHERNET DMA (when set) or CPU (when reset) */
+  if(((heth->TxDesc)->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET)
+ 800664e:	687b      	ldr	r3, [r7, #4]
+ 8006650:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8006652:	681b      	ldr	r3, [r3, #0]
+ 8006654:	2b00      	cmp	r3, #0
+ 8006656:	da09      	bge.n	800666c <HAL_ETH_TransmitFrame+0x6c>
+  {  
+    /* OWN bit set */
+    heth->State = HAL_ETH_STATE_BUSY_TX;
+ 8006658:	687b      	ldr	r3, [r7, #4]
+ 800665a:	2212      	movs	r2, #18
+ 800665c:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+    
+    /* Process Unlocked */
+    __HAL_UNLOCK(heth);
+ 8006660:	687b      	ldr	r3, [r7, #4]
+ 8006662:	2200      	movs	r2, #0
+ 8006664:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+    
+    return HAL_ERROR;
+ 8006668:	2301      	movs	r3, #1
+ 800666a:	e0a9      	b.n	80067c0 <HAL_ETH_TransmitFrame+0x1c0>
+  }
+  
+  /* Get the number of needed Tx buffers for the current frame */
+  if (FrameLength > ETH_TX_BUF_SIZE)
+ 800666c:	683b      	ldr	r3, [r7, #0]
+ 800666e:	f240 52f4 	movw	r2, #1524	; 0x5f4
+ 8006672:	4293      	cmp	r3, r2
+ 8006674:	d915      	bls.n	80066a2 <HAL_ETH_TransmitFrame+0xa2>
+  {
+    bufcount = FrameLength/ETH_TX_BUF_SIZE;
+ 8006676:	683b      	ldr	r3, [r7, #0]
+ 8006678:	4a54      	ldr	r2, [pc, #336]	; (80067cc <HAL_ETH_TransmitFrame+0x1cc>)
+ 800667a:	fba2 2303 	umull	r2, r3, r2, r3
+ 800667e:	0a9b      	lsrs	r3, r3, #10
+ 8006680:	617b      	str	r3, [r7, #20]
+    if (FrameLength % ETH_TX_BUF_SIZE) 
+ 8006682:	683a      	ldr	r2, [r7, #0]
+ 8006684:	4b51      	ldr	r3, [pc, #324]	; (80067cc <HAL_ETH_TransmitFrame+0x1cc>)
+ 8006686:	fba3 1302 	umull	r1, r3, r3, r2
+ 800668a:	0a9b      	lsrs	r3, r3, #10
+ 800668c:	f240 51f4 	movw	r1, #1524	; 0x5f4
+ 8006690:	fb01 f303 	mul.w	r3, r1, r3
+ 8006694:	1ad3      	subs	r3, r2, r3
+ 8006696:	2b00      	cmp	r3, #0
+ 8006698:	d005      	beq.n	80066a6 <HAL_ETH_TransmitFrame+0xa6>
+    {
+      bufcount++;
+ 800669a:	697b      	ldr	r3, [r7, #20]
+ 800669c:	3301      	adds	r3, #1
+ 800669e:	617b      	str	r3, [r7, #20]
+ 80066a0:	e001      	b.n	80066a6 <HAL_ETH_TransmitFrame+0xa6>
+    }
+  }
+  else 
+  {  
+    bufcount = 1;
+ 80066a2:	2301      	movs	r3, #1
+ 80066a4:	617b      	str	r3, [r7, #20]
+  }
+  if (bufcount == 1)
+ 80066a6:	697b      	ldr	r3, [r7, #20]
+ 80066a8:	2b01      	cmp	r3, #1
+ 80066aa:	d11c      	bne.n	80066e6 <HAL_ETH_TransmitFrame+0xe6>
+  {
+    /* Set LAST and FIRST segment */
+    heth->TxDesc->Status |=ETH_DMATXDESC_FS|ETH_DMATXDESC_LS;
+ 80066ac:	687b      	ldr	r3, [r7, #4]
+ 80066ae:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80066b0:	681a      	ldr	r2, [r3, #0]
+ 80066b2:	687b      	ldr	r3, [r7, #4]
+ 80066b4:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80066b6:	f042 5240 	orr.w	r2, r2, #805306368	; 0x30000000
+ 80066ba:	601a      	str	r2, [r3, #0]
+    /* Set frame size */
+    heth->TxDesc->ControlBufferSize = (FrameLength & ETH_DMATXDESC_TBS1);
+ 80066bc:	687b      	ldr	r3, [r7, #4]
+ 80066be:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80066c0:	683a      	ldr	r2, [r7, #0]
+ 80066c2:	f3c2 020c 	ubfx	r2, r2, #0, #13
+ 80066c6:	605a      	str	r2, [r3, #4]
+    /* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */
+    heth->TxDesc->Status |= ETH_DMATXDESC_OWN;
+ 80066c8:	687b      	ldr	r3, [r7, #4]
+ 80066ca:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80066cc:	681a      	ldr	r2, [r3, #0]
+ 80066ce:	687b      	ldr	r3, [r7, #4]
+ 80066d0:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80066d2:	f042 4200 	orr.w	r2, r2, #2147483648	; 0x80000000
+ 80066d6:	601a      	str	r2, [r3, #0]
+    /* Point to next descriptor */
+    heth->TxDesc= (ETH_DMADescTypeDef *)(heth->TxDesc->Buffer2NextDescAddr);
+ 80066d8:	687b      	ldr	r3, [r7, #4]
+ 80066da:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80066dc:	68db      	ldr	r3, [r3, #12]
+ 80066de:	461a      	mov	r2, r3
+ 80066e0:	687b      	ldr	r3, [r7, #4]
+ 80066e2:	62da      	str	r2, [r3, #44]	; 0x2c
+ 80066e4:	e04b      	b.n	800677e <HAL_ETH_TransmitFrame+0x17e>
+  }
+  else
+  {
+    for (i=0; i< bufcount; i++)
+ 80066e6:	2300      	movs	r3, #0
+ 80066e8:	613b      	str	r3, [r7, #16]
+ 80066ea:	e044      	b.n	8006776 <HAL_ETH_TransmitFrame+0x176>
+    {
+      /* Clear FIRST and LAST segment bits */
+      heth->TxDesc->Status &= ~(ETH_DMATXDESC_FS | ETH_DMATXDESC_LS);
+ 80066ec:	687b      	ldr	r3, [r7, #4]
+ 80066ee:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80066f0:	681a      	ldr	r2, [r3, #0]
+ 80066f2:	687b      	ldr	r3, [r7, #4]
+ 80066f4:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80066f6:	f022 5240 	bic.w	r2, r2, #805306368	; 0x30000000
+ 80066fa:	601a      	str	r2, [r3, #0]
+      
+      if (i == 0) 
+ 80066fc:	693b      	ldr	r3, [r7, #16]
+ 80066fe:	2b00      	cmp	r3, #0
+ 8006700:	d107      	bne.n	8006712 <HAL_ETH_TransmitFrame+0x112>
+      {
+        /* Setting the first segment bit */
+        heth->TxDesc->Status |= ETH_DMATXDESC_FS;  
+ 8006702:	687b      	ldr	r3, [r7, #4]
+ 8006704:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8006706:	681a      	ldr	r2, [r3, #0]
+ 8006708:	687b      	ldr	r3, [r7, #4]
+ 800670a:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800670c:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
+ 8006710:	601a      	str	r2, [r3, #0]
+      }
+      
+      /* Program size */
+      heth->TxDesc->ControlBufferSize = (ETH_TX_BUF_SIZE & ETH_DMATXDESC_TBS1);
+ 8006712:	687b      	ldr	r3, [r7, #4]
+ 8006714:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8006716:	f240 52f4 	movw	r2, #1524	; 0x5f4
+ 800671a:	605a      	str	r2, [r3, #4]
+      
+      if (i == (bufcount-1))
+ 800671c:	697b      	ldr	r3, [r7, #20]
+ 800671e:	3b01      	subs	r3, #1
+ 8006720:	693a      	ldr	r2, [r7, #16]
+ 8006722:	429a      	cmp	r2, r3
+ 8006724:	d116      	bne.n	8006754 <HAL_ETH_TransmitFrame+0x154>
+      {
+        /* Setting the last segment bit */
+        heth->TxDesc->Status |= ETH_DMATXDESC_LS;
+ 8006726:	687b      	ldr	r3, [r7, #4]
+ 8006728:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800672a:	681a      	ldr	r2, [r3, #0]
+ 800672c:	687b      	ldr	r3, [r7, #4]
+ 800672e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8006730:	f042 5200 	orr.w	r2, r2, #536870912	; 0x20000000
+ 8006734:	601a      	str	r2, [r3, #0]
+        size = FrameLength - (bufcount-1)*ETH_TX_BUF_SIZE;
+ 8006736:	697b      	ldr	r3, [r7, #20]
+ 8006738:	4a25      	ldr	r2, [pc, #148]	; (80067d0 <HAL_ETH_TransmitFrame+0x1d0>)
+ 800673a:	fb02 f203 	mul.w	r2, r2, r3
+ 800673e:	683b      	ldr	r3, [r7, #0]
+ 8006740:	4413      	add	r3, r2
+ 8006742:	f203 53f4 	addw	r3, r3, #1524	; 0x5f4
+ 8006746:	60fb      	str	r3, [r7, #12]
+        heth->TxDesc->ControlBufferSize = (size & ETH_DMATXDESC_TBS1);
+ 8006748:	687b      	ldr	r3, [r7, #4]
+ 800674a:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800674c:	68fa      	ldr	r2, [r7, #12]
+ 800674e:	f3c2 020c 	ubfx	r2, r2, #0, #13
+ 8006752:	605a      	str	r2, [r3, #4]
+      }
+      
+      /* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */
+      heth->TxDesc->Status |= ETH_DMATXDESC_OWN;
+ 8006754:	687b      	ldr	r3, [r7, #4]
+ 8006756:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8006758:	681a      	ldr	r2, [r3, #0]
+ 800675a:	687b      	ldr	r3, [r7, #4]
+ 800675c:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800675e:	f042 4200 	orr.w	r2, r2, #2147483648	; 0x80000000
+ 8006762:	601a      	str	r2, [r3, #0]
+      /* point to next descriptor */
+      heth->TxDesc = (ETH_DMADescTypeDef *)(heth->TxDesc->Buffer2NextDescAddr);
+ 8006764:	687b      	ldr	r3, [r7, #4]
+ 8006766:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8006768:	68db      	ldr	r3, [r3, #12]
+ 800676a:	461a      	mov	r2, r3
+ 800676c:	687b      	ldr	r3, [r7, #4]
+ 800676e:	62da      	str	r2, [r3, #44]	; 0x2c
+    for (i=0; i< bufcount; i++)
+ 8006770:	693b      	ldr	r3, [r7, #16]
+ 8006772:	3301      	adds	r3, #1
+ 8006774:	613b      	str	r3, [r7, #16]
+ 8006776:	693a      	ldr	r2, [r7, #16]
+ 8006778:	697b      	ldr	r3, [r7, #20]
+ 800677a:	429a      	cmp	r2, r3
+ 800677c:	d3b6      	bcc.n	80066ec <HAL_ETH_TransmitFrame+0xec>
+    }
+  }
+  
+  /* When Tx Buffer unavailable flag is set: clear it and resume transmission */
+  if (((heth->Instance)->DMASR & ETH_DMASR_TBUS) != (uint32_t)RESET)
+ 800677e:	687b      	ldr	r3, [r7, #4]
+ 8006780:	681a      	ldr	r2, [r3, #0]
+ 8006782:	f241 0314 	movw	r3, #4116	; 0x1014
+ 8006786:	4413      	add	r3, r2
+ 8006788:	681b      	ldr	r3, [r3, #0]
+ 800678a:	f003 0304 	and.w	r3, r3, #4
+ 800678e:	2b00      	cmp	r3, #0
+ 8006790:	d00d      	beq.n	80067ae <HAL_ETH_TransmitFrame+0x1ae>
+  {
+    /* Clear TBUS ETHERNET DMA flag */
+    (heth->Instance)->DMASR = ETH_DMASR_TBUS;
+ 8006792:	687b      	ldr	r3, [r7, #4]
+ 8006794:	681a      	ldr	r2, [r3, #0]
+ 8006796:	f241 0314 	movw	r3, #4116	; 0x1014
+ 800679a:	4413      	add	r3, r2
+ 800679c:	2204      	movs	r2, #4
+ 800679e:	601a      	str	r2, [r3, #0]
+    /* Resume DMA transmission*/
+    (heth->Instance)->DMATPDR = 0;
+ 80067a0:	687b      	ldr	r3, [r7, #4]
+ 80067a2:	681a      	ldr	r2, [r3, #0]
+ 80067a4:	f241 0304 	movw	r3, #4100	; 0x1004
+ 80067a8:	4413      	add	r3, r2
+ 80067aa:	2200      	movs	r2, #0
+ 80067ac:	601a      	str	r2, [r3, #0]
+  }
+  
+  /* Set ETH HAL State to Ready */
+  heth->State = HAL_ETH_STATE_READY;
+ 80067ae:	687b      	ldr	r3, [r7, #4]
+ 80067b0:	2201      	movs	r2, #1
+ 80067b2:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Process Unlocked */
+  __HAL_UNLOCK(heth);
+ 80067b6:	687b      	ldr	r3, [r7, #4]
+ 80067b8:	2200      	movs	r2, #0
+ 80067ba:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Return function status */
+  return HAL_OK;
+ 80067be:	2300      	movs	r3, #0
+}
+ 80067c0:	4618      	mov	r0, r3
+ 80067c2:	371c      	adds	r7, #28
+ 80067c4:	46bd      	mov	sp, r7
+ 80067c6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80067ca:	4770      	bx	lr
+ 80067cc:	ac02b00b 	.word	0xac02b00b
+ 80067d0:	fffffa0c 	.word	0xfffffa0c
+
+080067d4 <HAL_ETH_GetReceivedFrame_IT>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth)
+{
+ 80067d4:	b480      	push	{r7}
+ 80067d6:	b085      	sub	sp, #20
+ 80067d8:	af00      	add	r7, sp, #0
+ 80067da:	6078      	str	r0, [r7, #4]
+  uint32_t descriptorscancounter = 0;
+ 80067dc:	2300      	movs	r3, #0
+ 80067de:	60fb      	str	r3, [r7, #12]
+  
+  /* Process Locked */
+  __HAL_LOCK(heth);
+ 80067e0:	687b      	ldr	r3, [r7, #4]
+ 80067e2:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 80067e6:	2b01      	cmp	r3, #1
+ 80067e8:	d101      	bne.n	80067ee <HAL_ETH_GetReceivedFrame_IT+0x1a>
+ 80067ea:	2302      	movs	r3, #2
+ 80067ec:	e074      	b.n	80068d8 <HAL_ETH_GetReceivedFrame_IT+0x104>
+ 80067ee:	687b      	ldr	r3, [r7, #4]
+ 80067f0:	2201      	movs	r2, #1
+ 80067f2:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Set ETH HAL State to BUSY */
+  heth->State = HAL_ETH_STATE_BUSY;
+ 80067f6:	687b      	ldr	r3, [r7, #4]
+ 80067f8:	2202      	movs	r2, #2
+ 80067fa:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Scan descriptors owned by CPU */
+  while (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET) && (descriptorscancounter < ETH_RXBUFNB))
+ 80067fe:	e05a      	b.n	80068b6 <HAL_ETH_GetReceivedFrame_IT+0xe2>
+  {
+    /* Just for security */
+    descriptorscancounter++;
+ 8006800:	68fb      	ldr	r3, [r7, #12]
+ 8006802:	3301      	adds	r3, #1
+ 8006804:	60fb      	str	r3, [r7, #12]
+    
+    /* Check if first segment in frame */
+    /* ((heth->RxDesc->Status & ETH_DMARXDESC_FS) != (uint32_t)RESET) && ((heth->RxDesc->Status & ETH_DMARXDESC_LS) == (uint32_t)RESET)) */  
+    if((heth->RxDesc->Status & (ETH_DMARXDESC_FS | ETH_DMARXDESC_LS)) == (uint32_t)ETH_DMARXDESC_FS)
+ 8006806:	687b      	ldr	r3, [r7, #4]
+ 8006808:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 800680a:	681b      	ldr	r3, [r3, #0]
+ 800680c:	f403 7340 	and.w	r3, r3, #768	; 0x300
+ 8006810:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
+ 8006814:	d10d      	bne.n	8006832 <HAL_ETH_GetReceivedFrame_IT+0x5e>
+    { 
+      heth->RxFrameInfos.FSRxDesc = heth->RxDesc;
+ 8006816:	687b      	ldr	r3, [r7, #4]
+ 8006818:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 800681a:	687b      	ldr	r3, [r7, #4]
+ 800681c:	631a      	str	r2, [r3, #48]	; 0x30
+      heth->RxFrameInfos.SegCount = 1;   
+ 800681e:	687b      	ldr	r3, [r7, #4]
+ 8006820:	2201      	movs	r2, #1
+ 8006822:	639a      	str	r2, [r3, #56]	; 0x38
+      /* Point to next descriptor */
+      heth->RxDesc = (ETH_DMADescTypeDef*) (heth->RxDesc->Buffer2NextDescAddr);
+ 8006824:	687b      	ldr	r3, [r7, #4]
+ 8006826:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 8006828:	68db      	ldr	r3, [r3, #12]
+ 800682a:	461a      	mov	r2, r3
+ 800682c:	687b      	ldr	r3, [r7, #4]
+ 800682e:	629a      	str	r2, [r3, #40]	; 0x28
+ 8006830:	e041      	b.n	80068b6 <HAL_ETH_GetReceivedFrame_IT+0xe2>
+    }
+    /* Check if intermediate segment */
+    /* ((heth->RxDesc->Status & ETH_DMARXDESC_LS) == (uint32_t)RESET)&& ((heth->RxDesc->Status & ETH_DMARXDESC_FS) == (uint32_t)RESET)) */
+    else if ((heth->RxDesc->Status & (ETH_DMARXDESC_LS | ETH_DMARXDESC_FS)) == (uint32_t)RESET)
+ 8006832:	687b      	ldr	r3, [r7, #4]
+ 8006834:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 8006836:	681b      	ldr	r3, [r3, #0]
+ 8006838:	f403 7340 	and.w	r3, r3, #768	; 0x300
+ 800683c:	2b00      	cmp	r3, #0
+ 800683e:	d10b      	bne.n	8006858 <HAL_ETH_GetReceivedFrame_IT+0x84>
+    {
+      /* Increment segment count */
+      (heth->RxFrameInfos.SegCount)++;
+ 8006840:	687b      	ldr	r3, [r7, #4]
+ 8006842:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8006844:	1c5a      	adds	r2, r3, #1
+ 8006846:	687b      	ldr	r3, [r7, #4]
+ 8006848:	639a      	str	r2, [r3, #56]	; 0x38
+      /* Point to next descriptor */
+      heth->RxDesc = (ETH_DMADescTypeDef*)(heth->RxDesc->Buffer2NextDescAddr);
+ 800684a:	687b      	ldr	r3, [r7, #4]
+ 800684c:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 800684e:	68db      	ldr	r3, [r3, #12]
+ 8006850:	461a      	mov	r2, r3
+ 8006852:	687b      	ldr	r3, [r7, #4]
+ 8006854:	629a      	str	r2, [r3, #40]	; 0x28
+ 8006856:	e02e      	b.n	80068b6 <HAL_ETH_GetReceivedFrame_IT+0xe2>
+    }
+    /* Should be last segment */
+    else
+    { 
+      /* Last segment */
+      heth->RxFrameInfos.LSRxDesc = heth->RxDesc;
+ 8006858:	687b      	ldr	r3, [r7, #4]
+ 800685a:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 800685c:	687b      	ldr	r3, [r7, #4]
+ 800685e:	635a      	str	r2, [r3, #52]	; 0x34
+      
+      /* Increment segment count */
+      (heth->RxFrameInfos.SegCount)++;
+ 8006860:	687b      	ldr	r3, [r7, #4]
+ 8006862:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8006864:	1c5a      	adds	r2, r3, #1
+ 8006866:	687b      	ldr	r3, [r7, #4]
+ 8006868:	639a      	str	r2, [r3, #56]	; 0x38
+      
+      /* Check if last segment is first segment: one segment contains the frame */
+      if ((heth->RxFrameInfos.SegCount) == 1)
+ 800686a:	687b      	ldr	r3, [r7, #4]
+ 800686c:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800686e:	2b01      	cmp	r3, #1
+ 8006870:	d103      	bne.n	800687a <HAL_ETH_GetReceivedFrame_IT+0xa6>
+      {
+        heth->RxFrameInfos.FSRxDesc = heth->RxDesc;
+ 8006872:	687b      	ldr	r3, [r7, #4]
+ 8006874:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 8006876:	687b      	ldr	r3, [r7, #4]
+ 8006878:	631a      	str	r2, [r3, #48]	; 0x30
+      }
+      
+      /* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */
+      heth->RxFrameInfos.length = (((heth->RxDesc)->Status & ETH_DMARXDESC_FL) >> ETH_DMARXDESC_FRAMELENGTHSHIFT) - 4;
+ 800687a:	687b      	ldr	r3, [r7, #4]
+ 800687c:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 800687e:	681b      	ldr	r3, [r3, #0]
+ 8006880:	0c1b      	lsrs	r3, r3, #16
+ 8006882:	f3c3 030d 	ubfx	r3, r3, #0, #14
+ 8006886:	1f1a      	subs	r2, r3, #4
+ 8006888:	687b      	ldr	r3, [r7, #4]
+ 800688a:	63da      	str	r2, [r3, #60]	; 0x3c
+      
+      /* Get the address of the buffer start address */ 
+      heth->RxFrameInfos.buffer =((heth->RxFrameInfos).FSRxDesc)->Buffer1Addr;
+ 800688c:	687b      	ldr	r3, [r7, #4]
+ 800688e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8006890:	689a      	ldr	r2, [r3, #8]
+ 8006892:	687b      	ldr	r3, [r7, #4]
+ 8006894:	641a      	str	r2, [r3, #64]	; 0x40
+      
+      /* Point to next descriptor */      
+      heth->RxDesc = (ETH_DMADescTypeDef*) (heth->RxDesc->Buffer2NextDescAddr);
+ 8006896:	687b      	ldr	r3, [r7, #4]
+ 8006898:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 800689a:	68db      	ldr	r3, [r3, #12]
+ 800689c:	461a      	mov	r2, r3
+ 800689e:	687b      	ldr	r3, [r7, #4]
+ 80068a0:	629a      	str	r2, [r3, #40]	; 0x28
+      
+      /* Set HAL State to Ready */
+      heth->State = HAL_ETH_STATE_READY;
+ 80068a2:	687b      	ldr	r3, [r7, #4]
+ 80068a4:	2201      	movs	r2, #1
+ 80068a6:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+      
+      /* Process Unlocked */
+      __HAL_UNLOCK(heth);
+ 80068aa:	687b      	ldr	r3, [r7, #4]
+ 80068ac:	2200      	movs	r2, #0
+ 80068ae:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+      /* Return function status */
+      return HAL_OK;
+ 80068b2:	2300      	movs	r3, #0
+ 80068b4:	e010      	b.n	80068d8 <HAL_ETH_GetReceivedFrame_IT+0x104>
+  while (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET) && (descriptorscancounter < ETH_RXBUFNB))
+ 80068b6:	687b      	ldr	r3, [r7, #4]
+ 80068b8:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 80068ba:	681b      	ldr	r3, [r3, #0]
+ 80068bc:	2b00      	cmp	r3, #0
+ 80068be:	db02      	blt.n	80068c6 <HAL_ETH_GetReceivedFrame_IT+0xf2>
+ 80068c0:	68fb      	ldr	r3, [r7, #12]
+ 80068c2:	2b03      	cmp	r3, #3
+ 80068c4:	d99c      	bls.n	8006800 <HAL_ETH_GetReceivedFrame_IT+0x2c>
+    }
+  }
+
+  /* Set HAL State to Ready */
+  heth->State = HAL_ETH_STATE_READY;
+ 80068c6:	687b      	ldr	r3, [r7, #4]
+ 80068c8:	2201      	movs	r2, #1
+ 80068ca:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Process Unlocked */
+  __HAL_UNLOCK(heth);
+ 80068ce:	687b      	ldr	r3, [r7, #4]
+ 80068d0:	2200      	movs	r2, #0
+ 80068d2:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Return function status */
+  return HAL_ERROR;
+ 80068d6:	2301      	movs	r3, #1
+}
+ 80068d8:	4618      	mov	r0, r3
+ 80068da:	3714      	adds	r7, #20
+ 80068dc:	46bd      	mov	sp, r7
+ 80068de:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80068e2:	4770      	bx	lr
+
+080068e4 <HAL_ETH_IRQHandler>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module
+  * @retval HAL status
+  */
+void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth)
+{
+ 80068e4:	b580      	push	{r7, lr}
+ 80068e6:	b082      	sub	sp, #8
+ 80068e8:	af00      	add	r7, sp, #0
+ 80068ea:	6078      	str	r0, [r7, #4]
+  /* Frame received */
+  if (__HAL_ETH_DMA_GET_FLAG(heth, ETH_DMA_FLAG_R)) 
+ 80068ec:	687b      	ldr	r3, [r7, #4]
+ 80068ee:	681a      	ldr	r2, [r3, #0]
+ 80068f0:	f241 0314 	movw	r3, #4116	; 0x1014
+ 80068f4:	4413      	add	r3, r2
+ 80068f6:	681b      	ldr	r3, [r3, #0]
+ 80068f8:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 80068fc:	2b40      	cmp	r3, #64	; 0x40
+ 80068fe:	d112      	bne.n	8006926 <HAL_ETH_IRQHandler+0x42>
+#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
+    /*Call registered Receive complete callback*/
+    heth->RxCpltCallback(heth);
+#else
+    /* Receive complete callback */
+    HAL_ETH_RxCpltCallback(heth);
+ 8006900:	6878      	ldr	r0, [r7, #4]
+ 8006902:	f005 ff3d 	bl	800c780 <HAL_ETH_RxCpltCallback>
+#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
+    
+     /* Clear the Eth DMA Rx IT pending bits */
+    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_IT_R);
+ 8006906:	687b      	ldr	r3, [r7, #4]
+ 8006908:	681a      	ldr	r2, [r3, #0]
+ 800690a:	f241 0314 	movw	r3, #4116	; 0x1014
+ 800690e:	4413      	add	r3, r2
+ 8006910:	2240      	movs	r2, #64	; 0x40
+ 8006912:	601a      	str	r2, [r3, #0]
+
+    /* Set HAL State to Ready */
+    heth->State = HAL_ETH_STATE_READY;
+ 8006914:	687b      	ldr	r3, [r7, #4]
+ 8006916:	2201      	movs	r2, #1
+ 8006918:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+    
+    /* Process Unlocked */
+    __HAL_UNLOCK(heth);
+ 800691c:	687b      	ldr	r3, [r7, #4]
+ 800691e:	2200      	movs	r2, #0
+ 8006920:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+ 8006924:	e01b      	b.n	800695e <HAL_ETH_IRQHandler+0x7a>
+
+  }
+  /* Frame transmitted */
+  else if (__HAL_ETH_DMA_GET_FLAG(heth, ETH_DMA_FLAG_T)) 
+ 8006926:	687b      	ldr	r3, [r7, #4]
+ 8006928:	681a      	ldr	r2, [r3, #0]
+ 800692a:	f241 0314 	movw	r3, #4116	; 0x1014
+ 800692e:	4413      	add	r3, r2
+ 8006930:	681b      	ldr	r3, [r3, #0]
+ 8006932:	f003 0301 	and.w	r3, r3, #1
+ 8006936:	2b01      	cmp	r3, #1
+ 8006938:	d111      	bne.n	800695e <HAL_ETH_IRQHandler+0x7a>
+#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
+    /*  Call resgistered Transfer complete callback*/
+    heth->TxCpltCallback(heth);
+#else
+    /* Transfer complete callback */
+    HAL_ETH_TxCpltCallback(heth);
+ 800693a:	6878      	ldr	r0, [r7, #4]
+ 800693c:	f000 f839 	bl	80069b2 <HAL_ETH_TxCpltCallback>
+#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
+    
+    /* Clear the Eth DMA Tx IT pending bits */
+    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_IT_T);
+ 8006940:	687b      	ldr	r3, [r7, #4]
+ 8006942:	681a      	ldr	r2, [r3, #0]
+ 8006944:	f241 0314 	movw	r3, #4116	; 0x1014
+ 8006948:	4413      	add	r3, r2
+ 800694a:	2201      	movs	r2, #1
+ 800694c:	601a      	str	r2, [r3, #0]
+
+    /* Set HAL State to Ready */
+    heth->State = HAL_ETH_STATE_READY;
+ 800694e:	687b      	ldr	r3, [r7, #4]
+ 8006950:	2201      	movs	r2, #1
+ 8006952:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+    
+    /* Process Unlocked */
+    __HAL_UNLOCK(heth);
+ 8006956:	687b      	ldr	r3, [r7, #4]
+ 8006958:	2200      	movs	r2, #0
+ 800695a:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  }
+  
+  /* Clear the interrupt flags */
+  __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_IT_NIS);
+ 800695e:	687b      	ldr	r3, [r7, #4]
+ 8006960:	681a      	ldr	r2, [r3, #0]
+ 8006962:	f241 0314 	movw	r3, #4116	; 0x1014
+ 8006966:	4413      	add	r3, r2
+ 8006968:	f44f 3280 	mov.w	r2, #65536	; 0x10000
+ 800696c:	601a      	str	r2, [r3, #0]
+  
+  /* ETH DMA Error */
+  if(__HAL_ETH_DMA_GET_FLAG(heth, ETH_DMA_FLAG_AIS))
+ 800696e:	687b      	ldr	r3, [r7, #4]
+ 8006970:	681a      	ldr	r2, [r3, #0]
+ 8006972:	f241 0314 	movw	r3, #4116	; 0x1014
+ 8006976:	4413      	add	r3, r2
+ 8006978:	681b      	ldr	r3, [r3, #0]
+ 800697a:	f403 4300 	and.w	r3, r3, #32768	; 0x8000
+ 800697e:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
+ 8006982:	d112      	bne.n	80069aa <HAL_ETH_IRQHandler+0xc6>
+  {
+#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
+    heth->DMAErrorCallback(heth);
+#else
+    /* Ethernet Error callback */
+    HAL_ETH_ErrorCallback(heth);
+ 8006984:	6878      	ldr	r0, [r7, #4]
+ 8006986:	f000 f81e 	bl	80069c6 <HAL_ETH_ErrorCallback>
+#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
+
+    /* Clear the interrupt flags */
+    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMA_FLAG_AIS);
+ 800698a:	687b      	ldr	r3, [r7, #4]
+ 800698c:	681a      	ldr	r2, [r3, #0]
+ 800698e:	f241 0314 	movw	r3, #4116	; 0x1014
+ 8006992:	4413      	add	r3, r2
+ 8006994:	f44f 4200 	mov.w	r2, #32768	; 0x8000
+ 8006998:	601a      	str	r2, [r3, #0]
+  
+    /* Set HAL State to Ready */
+    heth->State = HAL_ETH_STATE_READY;
+ 800699a:	687b      	ldr	r3, [r7, #4]
+ 800699c:	2201      	movs	r2, #1
+ 800699e:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+    
+    /* Process Unlocked */
+    __HAL_UNLOCK(heth);
+ 80069a2:	687b      	ldr	r3, [r7, #4]
+ 80069a4:	2200      	movs	r2, #0
+ 80069a6:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  }
+}
+ 80069aa:	bf00      	nop
+ 80069ac:	3708      	adds	r7, #8
+ 80069ae:	46bd      	mov	sp, r7
+ 80069b0:	bd80      	pop	{r7, pc}
+
+080069b2 <HAL_ETH_TxCpltCallback>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module
+  * @retval None
+  */
+__weak void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth)
+{
+ 80069b2:	b480      	push	{r7}
+ 80069b4:	b083      	sub	sp, #12
+ 80069b6:	af00      	add	r7, sp, #0
+ 80069b8:	6078      	str	r0, [r7, #4]
+  UNUSED(heth);
+ 
+  /* NOTE : This function Should not be modified, when the callback is needed,
+  the HAL_ETH_TxCpltCallback could be implemented in the user file
+  */ 
+}
+ 80069ba:	bf00      	nop
+ 80069bc:	370c      	adds	r7, #12
+ 80069be:	46bd      	mov	sp, r7
+ 80069c0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80069c4:	4770      	bx	lr
+
+080069c6 <HAL_ETH_ErrorCallback>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module
+  * @retval None
+  */
+__weak void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
+{
+ 80069c6:	b480      	push	{r7}
+ 80069c8:	b083      	sub	sp, #12
+ 80069ca:	af00      	add	r7, sp, #0
+ 80069cc:	6078      	str	r0, [r7, #4]
+  UNUSED(heth);
+ 
+  /* NOTE : This function Should not be modified, when the callback is needed,
+  the HAL_ETH_ErrorCallback could be implemented in the user file
+  */ 
+}
+ 80069ce:	bf00      	nop
+ 80069d0:	370c      	adds	r7, #12
+ 80069d2:	46bd      	mov	sp, r7
+ 80069d4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80069d8:	4770      	bx	lr
+
+080069da <HAL_ETH_ReadPHYRegister>:
+  *                   More PHY register could be read depending on the used PHY
+  * @param RegValue PHY register value                  
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t *RegValue)
+{
+ 80069da:	b580      	push	{r7, lr}
+ 80069dc:	b086      	sub	sp, #24
+ 80069de:	af00      	add	r7, sp, #0
+ 80069e0:	60f8      	str	r0, [r7, #12]
+ 80069e2:	460b      	mov	r3, r1
+ 80069e4:	607a      	str	r2, [r7, #4]
+ 80069e6:	817b      	strh	r3, [r7, #10]
+  uint32_t tmpreg = 0;     
+ 80069e8:	2300      	movs	r3, #0
+ 80069ea:	617b      	str	r3, [r7, #20]
+  uint32_t tickstart = 0;
+ 80069ec:	2300      	movs	r3, #0
+ 80069ee:	613b      	str	r3, [r7, #16]
+  
+  /* Check parameters */
+  assert_param(IS_ETH_PHY_ADDRESS(heth->Init.PhyAddress));
+  
+  /* Check the ETH peripheral state */
+  if(heth->State == HAL_ETH_STATE_BUSY_RD)
+ 80069f0:	68fb      	ldr	r3, [r7, #12]
+ 80069f2:	f893 3044 	ldrb.w	r3, [r3, #68]	; 0x44
+ 80069f6:	b2db      	uxtb	r3, r3
+ 80069f8:	2b82      	cmp	r3, #130	; 0x82
+ 80069fa:	d101      	bne.n	8006a00 <HAL_ETH_ReadPHYRegister+0x26>
+  {
+    return HAL_BUSY;
+ 80069fc:	2302      	movs	r3, #2
+ 80069fe:	e050      	b.n	8006aa2 <HAL_ETH_ReadPHYRegister+0xc8>
+  }
+  /* Set ETH HAL State to BUSY_RD */
+  heth->State = HAL_ETH_STATE_BUSY_RD;
+ 8006a00:	68fb      	ldr	r3, [r7, #12]
+ 8006a02:	2282      	movs	r2, #130	; 0x82
+ 8006a04:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Get the ETHERNET MACMIIAR value */
+  tmpreg = heth->Instance->MACMIIAR;
+ 8006a08:	68fb      	ldr	r3, [r7, #12]
+ 8006a0a:	681b      	ldr	r3, [r3, #0]
+ 8006a0c:	691b      	ldr	r3, [r3, #16]
+ 8006a0e:	617b      	str	r3, [r7, #20]
+  
+  /* Keep only the CSR Clock Range CR[2:0] bits value */
+  tmpreg &= ~ETH_MACMIIAR_CR_MASK;
+ 8006a10:	697b      	ldr	r3, [r7, #20]
+ 8006a12:	f003 031c 	and.w	r3, r3, #28
+ 8006a16:	617b      	str	r3, [r7, #20]
+  
+  /* Prepare the MII address register value */
+  tmpreg |=(((uint32_t)heth->Init.PhyAddress << 11) & ETH_MACMIIAR_PA); /* Set the PHY device address   */
+ 8006a18:	68fb      	ldr	r3, [r7, #12]
+ 8006a1a:	8a1b      	ldrh	r3, [r3, #16]
+ 8006a1c:	02db      	lsls	r3, r3, #11
+ 8006a1e:	b29b      	uxth	r3, r3
+ 8006a20:	697a      	ldr	r2, [r7, #20]
+ 8006a22:	4313      	orrs	r3, r2
+ 8006a24:	617b      	str	r3, [r7, #20]
+  tmpreg |=(((uint32_t)PHYReg<<6) & ETH_MACMIIAR_MR);                   /* Set the PHY register address */
+ 8006a26:	897b      	ldrh	r3, [r7, #10]
+ 8006a28:	019b      	lsls	r3, r3, #6
+ 8006a2a:	f403 63f8 	and.w	r3, r3, #1984	; 0x7c0
+ 8006a2e:	697a      	ldr	r2, [r7, #20]
+ 8006a30:	4313      	orrs	r3, r2
+ 8006a32:	617b      	str	r3, [r7, #20]
+  tmpreg &= ~ETH_MACMIIAR_MW;                                           /* Set the read mode            */
+ 8006a34:	697b      	ldr	r3, [r7, #20]
+ 8006a36:	f023 0302 	bic.w	r3, r3, #2
+ 8006a3a:	617b      	str	r3, [r7, #20]
+  tmpreg |= ETH_MACMIIAR_MB;                                            /* Set the MII Busy bit         */
+ 8006a3c:	697b      	ldr	r3, [r7, #20]
+ 8006a3e:	f043 0301 	orr.w	r3, r3, #1
+ 8006a42:	617b      	str	r3, [r7, #20]
+  
+  /* Write the result value into the MII Address register */
+  heth->Instance->MACMIIAR = tmpreg;
+ 8006a44:	68fb      	ldr	r3, [r7, #12]
+ 8006a46:	681b      	ldr	r3, [r3, #0]
+ 8006a48:	697a      	ldr	r2, [r7, #20]
+ 8006a4a:	611a      	str	r2, [r3, #16]
+  
+  /* Get tick */
+  tickstart = HAL_GetTick();
+ 8006a4c:	f7fe f87c 	bl	8004b48 <HAL_GetTick>
+ 8006a50:	6138      	str	r0, [r7, #16]
+  
+  /* Check for the Busy flag */
+  while((tmpreg & ETH_MACMIIAR_MB) == ETH_MACMIIAR_MB)
+ 8006a52:	e015      	b.n	8006a80 <HAL_ETH_ReadPHYRegister+0xa6>
+  {
+    /* Check for the Timeout */
+    if((HAL_GetTick() - tickstart ) > PHY_READ_TO)
+ 8006a54:	f7fe f878 	bl	8004b48 <HAL_GetTick>
+ 8006a58:	4602      	mov	r2, r0
+ 8006a5a:	693b      	ldr	r3, [r7, #16]
+ 8006a5c:	1ad3      	subs	r3, r2, r3
+ 8006a5e:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 8006a62:	d309      	bcc.n	8006a78 <HAL_ETH_ReadPHYRegister+0x9e>
+    {
+      heth->State= HAL_ETH_STATE_READY;
+ 8006a64:	68fb      	ldr	r3, [r7, #12]
+ 8006a66:	2201      	movs	r2, #1
+ 8006a68:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+      /* Process Unlocked */
+      __HAL_UNLOCK(heth);
+ 8006a6c:	68fb      	ldr	r3, [r7, #12]
+ 8006a6e:	2200      	movs	r2, #0
+ 8006a70:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+    
+      return HAL_TIMEOUT;
+ 8006a74:	2303      	movs	r3, #3
+ 8006a76:	e014      	b.n	8006aa2 <HAL_ETH_ReadPHYRegister+0xc8>
+    }
+    
+    tmpreg = heth->Instance->MACMIIAR;
+ 8006a78:	68fb      	ldr	r3, [r7, #12]
+ 8006a7a:	681b      	ldr	r3, [r3, #0]
+ 8006a7c:	691b      	ldr	r3, [r3, #16]
+ 8006a7e:	617b      	str	r3, [r7, #20]
+  while((tmpreg & ETH_MACMIIAR_MB) == ETH_MACMIIAR_MB)
+ 8006a80:	697b      	ldr	r3, [r7, #20]
+ 8006a82:	f003 0301 	and.w	r3, r3, #1
+ 8006a86:	2b00      	cmp	r3, #0
+ 8006a88:	d1e4      	bne.n	8006a54 <HAL_ETH_ReadPHYRegister+0x7a>
+  }
+  
+  /* Get MACMIIDR value */
+  *RegValue = (uint16_t)(heth->Instance->MACMIIDR);
+ 8006a8a:	68fb      	ldr	r3, [r7, #12]
+ 8006a8c:	681b      	ldr	r3, [r3, #0]
+ 8006a8e:	695b      	ldr	r3, [r3, #20]
+ 8006a90:	b29b      	uxth	r3, r3
+ 8006a92:	461a      	mov	r2, r3
+ 8006a94:	687b      	ldr	r3, [r7, #4]
+ 8006a96:	601a      	str	r2, [r3, #0]
+  
+  /* Set ETH HAL State to READY */
+  heth->State = HAL_ETH_STATE_READY;
+ 8006a98:	68fb      	ldr	r3, [r7, #12]
+ 8006a9a:	2201      	movs	r2, #1
+ 8006a9c:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Return function status */
+  return HAL_OK;
+ 8006aa0:	2300      	movs	r3, #0
+}
+ 8006aa2:	4618      	mov	r0, r3
+ 8006aa4:	3718      	adds	r7, #24
+ 8006aa6:	46bd      	mov	sp, r7
+ 8006aa8:	bd80      	pop	{r7, pc}
+
+08006aaa <HAL_ETH_WritePHYRegister>:
+  *             More PHY register could be written depending on the used PHY
+  * @param  RegValue the value to write
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t RegValue)
+{
+ 8006aaa:	b580      	push	{r7, lr}
+ 8006aac:	b086      	sub	sp, #24
+ 8006aae:	af00      	add	r7, sp, #0
+ 8006ab0:	60f8      	str	r0, [r7, #12]
+ 8006ab2:	460b      	mov	r3, r1
+ 8006ab4:	607a      	str	r2, [r7, #4]
+ 8006ab6:	817b      	strh	r3, [r7, #10]
+  uint32_t tmpreg = 0;
+ 8006ab8:	2300      	movs	r3, #0
+ 8006aba:	617b      	str	r3, [r7, #20]
+  uint32_t tickstart = 0;
+ 8006abc:	2300      	movs	r3, #0
+ 8006abe:	613b      	str	r3, [r7, #16]
+  
+  /* Check parameters */
+  assert_param(IS_ETH_PHY_ADDRESS(heth->Init.PhyAddress));
+  
+  /* Check the ETH peripheral state */
+  if(heth->State == HAL_ETH_STATE_BUSY_WR)
+ 8006ac0:	68fb      	ldr	r3, [r7, #12]
+ 8006ac2:	f893 3044 	ldrb.w	r3, [r3, #68]	; 0x44
+ 8006ac6:	b2db      	uxtb	r3, r3
+ 8006ac8:	2b42      	cmp	r3, #66	; 0x42
+ 8006aca:	d101      	bne.n	8006ad0 <HAL_ETH_WritePHYRegister+0x26>
+  {
+    return HAL_BUSY;
+ 8006acc:	2302      	movs	r3, #2
+ 8006ace:	e04e      	b.n	8006b6e <HAL_ETH_WritePHYRegister+0xc4>
+  }
+  /* Set ETH HAL State to BUSY_WR */
+  heth->State = HAL_ETH_STATE_BUSY_WR;
+ 8006ad0:	68fb      	ldr	r3, [r7, #12]
+ 8006ad2:	2242      	movs	r2, #66	; 0x42
+ 8006ad4:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Get the ETHERNET MACMIIAR value */
+  tmpreg = heth->Instance->MACMIIAR;
+ 8006ad8:	68fb      	ldr	r3, [r7, #12]
+ 8006ada:	681b      	ldr	r3, [r3, #0]
+ 8006adc:	691b      	ldr	r3, [r3, #16]
+ 8006ade:	617b      	str	r3, [r7, #20]
+  
+  /* Keep only the CSR Clock Range CR[2:0] bits value */
+  tmpreg &= ~ETH_MACMIIAR_CR_MASK;
+ 8006ae0:	697b      	ldr	r3, [r7, #20]
+ 8006ae2:	f003 031c 	and.w	r3, r3, #28
+ 8006ae6:	617b      	str	r3, [r7, #20]
+  
+  /* Prepare the MII register address value */
+  tmpreg |=(((uint32_t)heth->Init.PhyAddress<<11) & ETH_MACMIIAR_PA); /* Set the PHY device address */
+ 8006ae8:	68fb      	ldr	r3, [r7, #12]
+ 8006aea:	8a1b      	ldrh	r3, [r3, #16]
+ 8006aec:	02db      	lsls	r3, r3, #11
+ 8006aee:	b29b      	uxth	r3, r3
+ 8006af0:	697a      	ldr	r2, [r7, #20]
+ 8006af2:	4313      	orrs	r3, r2
+ 8006af4:	617b      	str	r3, [r7, #20]
+  tmpreg |=(((uint32_t)PHYReg<<6) & ETH_MACMIIAR_MR);                 /* Set the PHY register address */
+ 8006af6:	897b      	ldrh	r3, [r7, #10]
+ 8006af8:	019b      	lsls	r3, r3, #6
+ 8006afa:	f403 63f8 	and.w	r3, r3, #1984	; 0x7c0
+ 8006afe:	697a      	ldr	r2, [r7, #20]
+ 8006b00:	4313      	orrs	r3, r2
+ 8006b02:	617b      	str	r3, [r7, #20]
+  tmpreg |= ETH_MACMIIAR_MW;                                          /* Set the write mode */
+ 8006b04:	697b      	ldr	r3, [r7, #20]
+ 8006b06:	f043 0302 	orr.w	r3, r3, #2
+ 8006b0a:	617b      	str	r3, [r7, #20]
+  tmpreg |= ETH_MACMIIAR_MB;                                          /* Set the MII Busy bit */
+ 8006b0c:	697b      	ldr	r3, [r7, #20]
+ 8006b0e:	f043 0301 	orr.w	r3, r3, #1
+ 8006b12:	617b      	str	r3, [r7, #20]
+  
+  /* Give the value to the MII data register */
+  heth->Instance->MACMIIDR = (uint16_t)RegValue;
+ 8006b14:	687b      	ldr	r3, [r7, #4]
+ 8006b16:	b29a      	uxth	r2, r3
+ 8006b18:	68fb      	ldr	r3, [r7, #12]
+ 8006b1a:	681b      	ldr	r3, [r3, #0]
+ 8006b1c:	615a      	str	r2, [r3, #20]
+  
+  /* Write the result value into the MII Address register */
+  heth->Instance->MACMIIAR = tmpreg;
+ 8006b1e:	68fb      	ldr	r3, [r7, #12]
+ 8006b20:	681b      	ldr	r3, [r3, #0]
+ 8006b22:	697a      	ldr	r2, [r7, #20]
+ 8006b24:	611a      	str	r2, [r3, #16]
+  
+  /* Get tick */
+  tickstart = HAL_GetTick();
+ 8006b26:	f7fe f80f 	bl	8004b48 <HAL_GetTick>
+ 8006b2a:	6138      	str	r0, [r7, #16]
+  
+  /* Check for the Busy flag */
+  while((tmpreg & ETH_MACMIIAR_MB) == ETH_MACMIIAR_MB)
+ 8006b2c:	e015      	b.n	8006b5a <HAL_ETH_WritePHYRegister+0xb0>
+  {
+    /* Check for the Timeout */
+    if((HAL_GetTick() - tickstart ) > PHY_WRITE_TO)
+ 8006b2e:	f7fe f80b 	bl	8004b48 <HAL_GetTick>
+ 8006b32:	4602      	mov	r2, r0
+ 8006b34:	693b      	ldr	r3, [r7, #16]
+ 8006b36:	1ad3      	subs	r3, r2, r3
+ 8006b38:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 8006b3c:	d309      	bcc.n	8006b52 <HAL_ETH_WritePHYRegister+0xa8>
+    {
+      heth->State= HAL_ETH_STATE_READY;
+ 8006b3e:	68fb      	ldr	r3, [r7, #12]
+ 8006b40:	2201      	movs	r2, #1
+ 8006b42:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+      /* Process Unlocked */
+      __HAL_UNLOCK(heth);
+ 8006b46:	68fb      	ldr	r3, [r7, #12]
+ 8006b48:	2200      	movs	r2, #0
+ 8006b4a:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+    
+      return HAL_TIMEOUT;
+ 8006b4e:	2303      	movs	r3, #3
+ 8006b50:	e00d      	b.n	8006b6e <HAL_ETH_WritePHYRegister+0xc4>
+    }
+    
+    tmpreg = heth->Instance->MACMIIAR;
+ 8006b52:	68fb      	ldr	r3, [r7, #12]
+ 8006b54:	681b      	ldr	r3, [r3, #0]
+ 8006b56:	691b      	ldr	r3, [r3, #16]
+ 8006b58:	617b      	str	r3, [r7, #20]
+  while((tmpreg & ETH_MACMIIAR_MB) == ETH_MACMIIAR_MB)
+ 8006b5a:	697b      	ldr	r3, [r7, #20]
+ 8006b5c:	f003 0301 	and.w	r3, r3, #1
+ 8006b60:	2b00      	cmp	r3, #0
+ 8006b62:	d1e4      	bne.n	8006b2e <HAL_ETH_WritePHYRegister+0x84>
+  }
+  
+  /* Set ETH HAL State to READY */
+  heth->State = HAL_ETH_STATE_READY;
+ 8006b64:	68fb      	ldr	r3, [r7, #12]
+ 8006b66:	2201      	movs	r2, #1
+ 8006b68:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Return function status */
+  return HAL_OK; 
+ 8006b6c:	2300      	movs	r3, #0
+}
+ 8006b6e:	4618      	mov	r0, r3
+ 8006b70:	3718      	adds	r7, #24
+ 8006b72:	46bd      	mov	sp, r7
+ 8006b74:	bd80      	pop	{r7, pc}
+
+08006b76 <HAL_ETH_Start>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth)
+{  
+ 8006b76:	b580      	push	{r7, lr}
+ 8006b78:	b082      	sub	sp, #8
+ 8006b7a:	af00      	add	r7, sp, #0
+ 8006b7c:	6078      	str	r0, [r7, #4]
+  /* Process Locked */
+  __HAL_LOCK(heth);
+ 8006b7e:	687b      	ldr	r3, [r7, #4]
+ 8006b80:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 8006b84:	2b01      	cmp	r3, #1
+ 8006b86:	d101      	bne.n	8006b8c <HAL_ETH_Start+0x16>
+ 8006b88:	2302      	movs	r3, #2
+ 8006b8a:	e01f      	b.n	8006bcc <HAL_ETH_Start+0x56>
+ 8006b8c:	687b      	ldr	r3, [r7, #4]
+ 8006b8e:	2201      	movs	r2, #1
+ 8006b90:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Set the ETH peripheral state to BUSY */
+  heth->State = HAL_ETH_STATE_BUSY;
+ 8006b94:	687b      	ldr	r3, [r7, #4]
+ 8006b96:	2202      	movs	r2, #2
+ 8006b98:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Enable transmit state machine of the MAC for transmission on the MII */
+  ETH_MACTransmissionEnable(heth);
+ 8006b9c:	6878      	ldr	r0, [r7, #4]
+ 8006b9e:	f000 fb45 	bl	800722c <ETH_MACTransmissionEnable>
+  
+  /* Enable receive state machine of the MAC for reception from the MII */
+  ETH_MACReceptionEnable(heth);
+ 8006ba2:	6878      	ldr	r0, [r7, #4]
+ 8006ba4:	f000 fb7c 	bl	80072a0 <ETH_MACReceptionEnable>
+  
+  /* Flush Transmit FIFO */
+  ETH_FlushTransmitFIFO(heth);
+ 8006ba8:	6878      	ldr	r0, [r7, #4]
+ 8006baa:	f000 fc13 	bl	80073d4 <ETH_FlushTransmitFIFO>
+  
+  /* Start DMA transmission */
+  ETH_DMATransmissionEnable(heth);
+ 8006bae:	6878      	ldr	r0, [r7, #4]
+ 8006bb0:	f000 fbb0 	bl	8007314 <ETH_DMATransmissionEnable>
+  
+  /* Start DMA reception */
+  ETH_DMAReceptionEnable(heth);
+ 8006bb4:	6878      	ldr	r0, [r7, #4]
+ 8006bb6:	f000 fbdd 	bl	8007374 <ETH_DMAReceptionEnable>
+  
+  /* Set the ETH state to READY*/
+  heth->State= HAL_ETH_STATE_READY;
+ 8006bba:	687b      	ldr	r3, [r7, #4]
+ 8006bbc:	2201      	movs	r2, #1
+ 8006bbe:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Process Unlocked */
+  __HAL_UNLOCK(heth);
+ 8006bc2:	687b      	ldr	r3, [r7, #4]
+ 8006bc4:	2200      	movs	r2, #0
+ 8006bc6:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Return function status */
+  return HAL_OK;
+ 8006bca:	2300      	movs	r3, #0
+}
+ 8006bcc:	4618      	mov	r0, r3
+ 8006bce:	3708      	adds	r7, #8
+ 8006bd0:	46bd      	mov	sp, r7
+ 8006bd2:	bd80      	pop	{r7, pc}
+
+08006bd4 <HAL_ETH_Stop>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth)
+{  
+ 8006bd4:	b580      	push	{r7, lr}
+ 8006bd6:	b082      	sub	sp, #8
+ 8006bd8:	af00      	add	r7, sp, #0
+ 8006bda:	6078      	str	r0, [r7, #4]
+  /* Process Locked */
+  __HAL_LOCK(heth);
+ 8006bdc:	687b      	ldr	r3, [r7, #4]
+ 8006bde:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 8006be2:	2b01      	cmp	r3, #1
+ 8006be4:	d101      	bne.n	8006bea <HAL_ETH_Stop+0x16>
+ 8006be6:	2302      	movs	r3, #2
+ 8006be8:	e01f      	b.n	8006c2a <HAL_ETH_Stop+0x56>
+ 8006bea:	687b      	ldr	r3, [r7, #4]
+ 8006bec:	2201      	movs	r2, #1
+ 8006bee:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Set the ETH peripheral state to BUSY */
+  heth->State = HAL_ETH_STATE_BUSY;
+ 8006bf2:	687b      	ldr	r3, [r7, #4]
+ 8006bf4:	2202      	movs	r2, #2
+ 8006bf6:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Stop DMA transmission */
+  ETH_DMATransmissionDisable(heth);
+ 8006bfa:	6878      	ldr	r0, [r7, #4]
+ 8006bfc:	f000 fba2 	bl	8007344 <ETH_DMATransmissionDisable>
+  
+  /* Stop DMA reception */
+  ETH_DMAReceptionDisable(heth);
+ 8006c00:	6878      	ldr	r0, [r7, #4]
+ 8006c02:	f000 fbcf 	bl	80073a4 <ETH_DMAReceptionDisable>
+  
+  /* Disable receive state machine of the MAC for reception from the MII */
+  ETH_MACReceptionDisable(heth);
+ 8006c06:	6878      	ldr	r0, [r7, #4]
+ 8006c08:	f000 fb67 	bl	80072da <ETH_MACReceptionDisable>
+  
+  /* Flush Transmit FIFO */
+  ETH_FlushTransmitFIFO(heth);
+ 8006c0c:	6878      	ldr	r0, [r7, #4]
+ 8006c0e:	f000 fbe1 	bl	80073d4 <ETH_FlushTransmitFIFO>
+  
+  /* Disable transmit state machine of the MAC for transmission on the MII */
+  ETH_MACTransmissionDisable(heth);
+ 8006c12:	6878      	ldr	r0, [r7, #4]
+ 8006c14:	f000 fb27 	bl	8007266 <ETH_MACTransmissionDisable>
+  
+  /* Set the ETH state*/
+  heth->State = HAL_ETH_STATE_READY;
+ 8006c18:	687b      	ldr	r3, [r7, #4]
+ 8006c1a:	2201      	movs	r2, #1
+ 8006c1c:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Process Unlocked */
+  __HAL_UNLOCK(heth);
+ 8006c20:	687b      	ldr	r3, [r7, #4]
+ 8006c22:	2200      	movs	r2, #0
+ 8006c24:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Return function status */
+  return HAL_OK;
+ 8006c28:	2300      	movs	r3, #0
+}
+ 8006c2a:	4618      	mov	r0, r3
+ 8006c2c:	3708      	adds	r7, #8
+ 8006c2e:	46bd      	mov	sp, r7
+ 8006c30:	bd80      	pop	{r7, pc}
+	...
+
+08006c34 <HAL_ETH_ConfigMAC>:
+  *         the configuration information for ETHERNET module
+  * @param  macconf MAC Configuration structure  
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef *macconf)
+{
+ 8006c34:	b580      	push	{r7, lr}
+ 8006c36:	b084      	sub	sp, #16
+ 8006c38:	af00      	add	r7, sp, #0
+ 8006c3a:	6078      	str	r0, [r7, #4]
+ 8006c3c:	6039      	str	r1, [r7, #0]
+  uint32_t tmpreg = 0;
+ 8006c3e:	2300      	movs	r3, #0
+ 8006c40:	60fb      	str	r3, [r7, #12]
+  
+  /* Process Locked */
+  __HAL_LOCK(heth);
+ 8006c42:	687b      	ldr	r3, [r7, #4]
+ 8006c44:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 8006c48:	2b01      	cmp	r3, #1
+ 8006c4a:	d101      	bne.n	8006c50 <HAL_ETH_ConfigMAC+0x1c>
+ 8006c4c:	2302      	movs	r3, #2
+ 8006c4e:	e0e4      	b.n	8006e1a <HAL_ETH_ConfigMAC+0x1e6>
+ 8006c50:	687b      	ldr	r3, [r7, #4]
+ 8006c52:	2201      	movs	r2, #1
+ 8006c54:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Set the ETH peripheral state to BUSY */
+  heth->State= HAL_ETH_STATE_BUSY;
+ 8006c58:	687b      	ldr	r3, [r7, #4]
+ 8006c5a:	2202      	movs	r2, #2
+ 8006c5c:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  assert_param(IS_ETH_SPEED(heth->Init.Speed));
+  assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode)); 
+  
+  if (macconf != NULL)
+ 8006c60:	683b      	ldr	r3, [r7, #0]
+ 8006c62:	2b00      	cmp	r3, #0
+ 8006c64:	f000 80b1 	beq.w	8006dca <HAL_ETH_ConfigMAC+0x196>
+    assert_param(IS_ETH_VLAN_TAG_COMPARISON(macconf->VLANTagComparison));
+    assert_param(IS_ETH_VLAN_TAG_IDENTIFIER(macconf->VLANTagIdentifier));
+    
+    /*------------------------ ETHERNET MACCR Configuration --------------------*/
+    /* Get the ETHERNET MACCR value */
+    tmpreg = (heth->Instance)->MACCR;
+ 8006c68:	687b      	ldr	r3, [r7, #4]
+ 8006c6a:	681b      	ldr	r3, [r3, #0]
+ 8006c6c:	681b      	ldr	r3, [r3, #0]
+ 8006c6e:	60fb      	str	r3, [r7, #12]
+    /* Clear WD, PCE, PS, TE and RE bits */
+    tmpreg &= ETH_MACCR_CLEAR_MASK;
+ 8006c70:	68fa      	ldr	r2, [r7, #12]
+ 8006c72:	4b6c      	ldr	r3, [pc, #432]	; (8006e24 <HAL_ETH_ConfigMAC+0x1f0>)
+ 8006c74:	4013      	ands	r3, r2
+ 8006c76:	60fb      	str	r3, [r7, #12]
+    
+    tmpreg |= (uint32_t)(macconf->Watchdog | 
+ 8006c78:	683b      	ldr	r3, [r7, #0]
+ 8006c7a:	681a      	ldr	r2, [r3, #0]
+                         macconf->Jabber | 
+ 8006c7c:	683b      	ldr	r3, [r7, #0]
+ 8006c7e:	685b      	ldr	r3, [r3, #4]
+    tmpreg |= (uint32_t)(macconf->Watchdog | 
+ 8006c80:	431a      	orrs	r2, r3
+                         macconf->InterFrameGap |
+ 8006c82:	683b      	ldr	r3, [r7, #0]
+ 8006c84:	689b      	ldr	r3, [r3, #8]
+                         macconf->Jabber | 
+ 8006c86:	431a      	orrs	r2, r3
+                         macconf->CarrierSense |
+ 8006c88:	683b      	ldr	r3, [r7, #0]
+ 8006c8a:	68db      	ldr	r3, [r3, #12]
+                         macconf->InterFrameGap |
+ 8006c8c:	431a      	orrs	r2, r3
+                         (heth->Init).Speed | 
+ 8006c8e:	687b      	ldr	r3, [r7, #4]
+ 8006c90:	689b      	ldr	r3, [r3, #8]
+                         macconf->CarrierSense |
+ 8006c92:	431a      	orrs	r2, r3
+                         macconf->ReceiveOwn |
+ 8006c94:	683b      	ldr	r3, [r7, #0]
+ 8006c96:	691b      	ldr	r3, [r3, #16]
+                         (heth->Init).Speed | 
+ 8006c98:	431a      	orrs	r2, r3
+                         macconf->LoopbackMode |
+ 8006c9a:	683b      	ldr	r3, [r7, #0]
+ 8006c9c:	695b      	ldr	r3, [r3, #20]
+                         macconf->ReceiveOwn |
+ 8006c9e:	431a      	orrs	r2, r3
+                         (heth->Init).DuplexMode | 
+ 8006ca0:	687b      	ldr	r3, [r7, #4]
+ 8006ca2:	68db      	ldr	r3, [r3, #12]
+                         macconf->LoopbackMode |
+ 8006ca4:	431a      	orrs	r2, r3
+                         macconf->ChecksumOffload |    
+ 8006ca6:	683b      	ldr	r3, [r7, #0]
+ 8006ca8:	699b      	ldr	r3, [r3, #24]
+                         (heth->Init).DuplexMode | 
+ 8006caa:	431a      	orrs	r2, r3
+                         macconf->RetryTransmission | 
+ 8006cac:	683b      	ldr	r3, [r7, #0]
+ 8006cae:	69db      	ldr	r3, [r3, #28]
+                         macconf->ChecksumOffload |    
+ 8006cb0:	431a      	orrs	r2, r3
+                         macconf->AutomaticPadCRCStrip | 
+ 8006cb2:	683b      	ldr	r3, [r7, #0]
+ 8006cb4:	6a1b      	ldr	r3, [r3, #32]
+                         macconf->RetryTransmission | 
+ 8006cb6:	431a      	orrs	r2, r3
+                         macconf->BackOffLimit | 
+ 8006cb8:	683b      	ldr	r3, [r7, #0]
+ 8006cba:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+                         macconf->AutomaticPadCRCStrip | 
+ 8006cbc:	431a      	orrs	r2, r3
+                         macconf->DeferralCheck);
+ 8006cbe:	683b      	ldr	r3, [r7, #0]
+ 8006cc0:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+                         macconf->BackOffLimit | 
+ 8006cc2:	4313      	orrs	r3, r2
+    tmpreg |= (uint32_t)(macconf->Watchdog | 
+ 8006cc4:	68fa      	ldr	r2, [r7, #12]
+ 8006cc6:	4313      	orrs	r3, r2
+ 8006cc8:	60fb      	str	r3, [r7, #12]
+    
+    /* Write to ETHERNET MACCR */
+    (heth->Instance)->MACCR = (uint32_t)tmpreg;
+ 8006cca:	687b      	ldr	r3, [r7, #4]
+ 8006ccc:	681b      	ldr	r3, [r3, #0]
+ 8006cce:	68fa      	ldr	r2, [r7, #12]
+ 8006cd0:	601a      	str	r2, [r3, #0]
+    
+    /* Wait until the write operation will be taken into account :
+    at least four TX_CLK/RX_CLK clock cycles */
+    tmpreg = (heth->Instance)->MACCR;
+ 8006cd2:	687b      	ldr	r3, [r7, #4]
+ 8006cd4:	681b      	ldr	r3, [r3, #0]
+ 8006cd6:	681b      	ldr	r3, [r3, #0]
+ 8006cd8:	60fb      	str	r3, [r7, #12]
+    HAL_Delay(ETH_REG_WRITE_DELAY);
+ 8006cda:	2001      	movs	r0, #1
+ 8006cdc:	f7fd ff40 	bl	8004b60 <HAL_Delay>
+    (heth->Instance)->MACCR = tmpreg; 
+ 8006ce0:	687b      	ldr	r3, [r7, #4]
+ 8006ce2:	681b      	ldr	r3, [r3, #0]
+ 8006ce4:	68fa      	ldr	r2, [r7, #12]
+ 8006ce6:	601a      	str	r2, [r3, #0]
+    
+    /*----------------------- ETHERNET MACFFR Configuration --------------------*/ 
+    /* Write to ETHERNET MACFFR */  
+    (heth->Instance)->MACFFR = (uint32_t)(macconf->ReceiveAll | 
+ 8006ce8:	683b      	ldr	r3, [r7, #0]
+ 8006cea:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+                                          macconf->SourceAddrFilter |
+ 8006cec:	683b      	ldr	r3, [r7, #0]
+ 8006cee:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+    (heth->Instance)->MACFFR = (uint32_t)(macconf->ReceiveAll | 
+ 8006cf0:	431a      	orrs	r2, r3
+                                          macconf->PassControlFrames |
+ 8006cf2:	683b      	ldr	r3, [r7, #0]
+ 8006cf4:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+                                          macconf->SourceAddrFilter |
+ 8006cf6:	431a      	orrs	r2, r3
+                                          macconf->BroadcastFramesReception | 
+ 8006cf8:	683b      	ldr	r3, [r7, #0]
+ 8006cfa:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+                                          macconf->PassControlFrames |
+ 8006cfc:	431a      	orrs	r2, r3
+                                          macconf->DestinationAddrFilter |
+ 8006cfe:	683b      	ldr	r3, [r7, #0]
+ 8006d00:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+                                          macconf->BroadcastFramesReception | 
+ 8006d02:	431a      	orrs	r2, r3
+                                          macconf->PromiscuousMode |
+ 8006d04:	683b      	ldr	r3, [r7, #0]
+ 8006d06:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+                                          macconf->DestinationAddrFilter |
+ 8006d08:	431a      	orrs	r2, r3
+                                          macconf->MulticastFramesFilter |
+ 8006d0a:	683b      	ldr	r3, [r7, #0]
+ 8006d0c:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+                                          macconf->PromiscuousMode |
+ 8006d0e:	ea42 0103 	orr.w	r1, r2, r3
+                                          macconf->UnicastFramesFilter);
+ 8006d12:	683b      	ldr	r3, [r7, #0]
+ 8006d14:	6c9a      	ldr	r2, [r3, #72]	; 0x48
+    (heth->Instance)->MACFFR = (uint32_t)(macconf->ReceiveAll | 
+ 8006d16:	687b      	ldr	r3, [r7, #4]
+ 8006d18:	681b      	ldr	r3, [r3, #0]
+                                          macconf->MulticastFramesFilter |
+ 8006d1a:	430a      	orrs	r2, r1
+    (heth->Instance)->MACFFR = (uint32_t)(macconf->ReceiveAll | 
+ 8006d1c:	605a      	str	r2, [r3, #4]
+     
+     /* Wait until the write operation will be taken into account :
+     at least four TX_CLK/RX_CLK clock cycles */
+     tmpreg = (heth->Instance)->MACFFR;
+ 8006d1e:	687b      	ldr	r3, [r7, #4]
+ 8006d20:	681b      	ldr	r3, [r3, #0]
+ 8006d22:	685b      	ldr	r3, [r3, #4]
+ 8006d24:	60fb      	str	r3, [r7, #12]
+     HAL_Delay(ETH_REG_WRITE_DELAY);
+ 8006d26:	2001      	movs	r0, #1
+ 8006d28:	f7fd ff1a 	bl	8004b60 <HAL_Delay>
+     (heth->Instance)->MACFFR = tmpreg;
+ 8006d2c:	687b      	ldr	r3, [r7, #4]
+ 8006d2e:	681b      	ldr	r3, [r3, #0]
+ 8006d30:	68fa      	ldr	r2, [r7, #12]
+ 8006d32:	605a      	str	r2, [r3, #4]
+     
+     /*--------------- ETHERNET MACHTHR and MACHTLR Configuration ---------------*/
+     /* Write to ETHERNET MACHTHR */
+     (heth->Instance)->MACHTHR = (uint32_t)macconf->HashTableHigh;
+ 8006d34:	687b      	ldr	r3, [r7, #4]
+ 8006d36:	681b      	ldr	r3, [r3, #0]
+ 8006d38:	683a      	ldr	r2, [r7, #0]
+ 8006d3a:	6cd2      	ldr	r2, [r2, #76]	; 0x4c
+ 8006d3c:	609a      	str	r2, [r3, #8]
+     
+     /* Write to ETHERNET MACHTLR */
+     (heth->Instance)->MACHTLR = (uint32_t)macconf->HashTableLow;
+ 8006d3e:	687b      	ldr	r3, [r7, #4]
+ 8006d40:	681b      	ldr	r3, [r3, #0]
+ 8006d42:	683a      	ldr	r2, [r7, #0]
+ 8006d44:	6d12      	ldr	r2, [r2, #80]	; 0x50
+ 8006d46:	60da      	str	r2, [r3, #12]
+     /*----------------------- ETHERNET MACFCR Configuration --------------------*/
+     
+     /* Get the ETHERNET MACFCR value */  
+     tmpreg = (heth->Instance)->MACFCR;
+ 8006d48:	687b      	ldr	r3, [r7, #4]
+ 8006d4a:	681b      	ldr	r3, [r3, #0]
+ 8006d4c:	699b      	ldr	r3, [r3, #24]
+ 8006d4e:	60fb      	str	r3, [r7, #12]
+     /* Clear xx bits */
+     tmpreg &= ETH_MACFCR_CLEAR_MASK;
+ 8006d50:	68fa      	ldr	r2, [r7, #12]
+ 8006d52:	f64f 7341 	movw	r3, #65345	; 0xff41
+ 8006d56:	4013      	ands	r3, r2
+ 8006d58:	60fb      	str	r3, [r7, #12]
+     
+     tmpreg |= (uint32_t)((macconf->PauseTime << 16) | 
+ 8006d5a:	683b      	ldr	r3, [r7, #0]
+ 8006d5c:	6d5b      	ldr	r3, [r3, #84]	; 0x54
+ 8006d5e:	041a      	lsls	r2, r3, #16
+                          macconf->ZeroQuantaPause |
+ 8006d60:	683b      	ldr	r3, [r7, #0]
+ 8006d62:	6d9b      	ldr	r3, [r3, #88]	; 0x58
+     tmpreg |= (uint32_t)((macconf->PauseTime << 16) | 
+ 8006d64:	431a      	orrs	r2, r3
+                          macconf->PauseLowThreshold |
+ 8006d66:	683b      	ldr	r3, [r7, #0]
+ 8006d68:	6ddb      	ldr	r3, [r3, #92]	; 0x5c
+                          macconf->ZeroQuantaPause |
+ 8006d6a:	431a      	orrs	r2, r3
+                          macconf->UnicastPauseFrameDetect | 
+ 8006d6c:	683b      	ldr	r3, [r7, #0]
+ 8006d6e:	6e1b      	ldr	r3, [r3, #96]	; 0x60
+                          macconf->PauseLowThreshold |
+ 8006d70:	431a      	orrs	r2, r3
+                          macconf->ReceiveFlowControl |
+ 8006d72:	683b      	ldr	r3, [r7, #0]
+ 8006d74:	6e5b      	ldr	r3, [r3, #100]	; 0x64
+                          macconf->UnicastPauseFrameDetect | 
+ 8006d76:	431a      	orrs	r2, r3
+                          macconf->TransmitFlowControl); 
+ 8006d78:	683b      	ldr	r3, [r7, #0]
+ 8006d7a:	6e9b      	ldr	r3, [r3, #104]	; 0x68
+                          macconf->ReceiveFlowControl |
+ 8006d7c:	4313      	orrs	r3, r2
+     tmpreg |= (uint32_t)((macconf->PauseTime << 16) | 
+ 8006d7e:	68fa      	ldr	r2, [r7, #12]
+ 8006d80:	4313      	orrs	r3, r2
+ 8006d82:	60fb      	str	r3, [r7, #12]
+     
+     /* Write to ETHERNET MACFCR */
+     (heth->Instance)->MACFCR = (uint32_t)tmpreg;
+ 8006d84:	687b      	ldr	r3, [r7, #4]
+ 8006d86:	681b      	ldr	r3, [r3, #0]
+ 8006d88:	68fa      	ldr	r2, [r7, #12]
+ 8006d8a:	619a      	str	r2, [r3, #24]
+     
+     /* Wait until the write operation will be taken into account :
+     at least four TX_CLK/RX_CLK clock cycles */
+     tmpreg = (heth->Instance)->MACFCR;
+ 8006d8c:	687b      	ldr	r3, [r7, #4]
+ 8006d8e:	681b      	ldr	r3, [r3, #0]
+ 8006d90:	699b      	ldr	r3, [r3, #24]
+ 8006d92:	60fb      	str	r3, [r7, #12]
+     HAL_Delay(ETH_REG_WRITE_DELAY);
+ 8006d94:	2001      	movs	r0, #1
+ 8006d96:	f7fd fee3 	bl	8004b60 <HAL_Delay>
+     (heth->Instance)->MACFCR = tmpreg;
+ 8006d9a:	687b      	ldr	r3, [r7, #4]
+ 8006d9c:	681b      	ldr	r3, [r3, #0]
+ 8006d9e:	68fa      	ldr	r2, [r7, #12]
+ 8006da0:	619a      	str	r2, [r3, #24]
+     
+     /*----------------------- ETHERNET MACVLANTR Configuration -----------------*/
+     (heth->Instance)->MACVLANTR = (uint32_t)(macconf->VLANTagComparison | 
+ 8006da2:	683b      	ldr	r3, [r7, #0]
+ 8006da4:	6ed9      	ldr	r1, [r3, #108]	; 0x6c
+                                              macconf->VLANTagIdentifier);
+ 8006da6:	683b      	ldr	r3, [r7, #0]
+ 8006da8:	6f1a      	ldr	r2, [r3, #112]	; 0x70
+     (heth->Instance)->MACVLANTR = (uint32_t)(macconf->VLANTagComparison | 
+ 8006daa:	687b      	ldr	r3, [r7, #4]
+ 8006dac:	681b      	ldr	r3, [r3, #0]
+ 8006dae:	430a      	orrs	r2, r1
+ 8006db0:	61da      	str	r2, [r3, #28]
+      
+      /* Wait until the write operation will be taken into account :
+      at least four TX_CLK/RX_CLK clock cycles */
+      tmpreg = (heth->Instance)->MACVLANTR;
+ 8006db2:	687b      	ldr	r3, [r7, #4]
+ 8006db4:	681b      	ldr	r3, [r3, #0]
+ 8006db6:	69db      	ldr	r3, [r3, #28]
+ 8006db8:	60fb      	str	r3, [r7, #12]
+      HAL_Delay(ETH_REG_WRITE_DELAY);
+ 8006dba:	2001      	movs	r0, #1
+ 8006dbc:	f7fd fed0 	bl	8004b60 <HAL_Delay>
+      (heth->Instance)->MACVLANTR = tmpreg;
+ 8006dc0:	687b      	ldr	r3, [r7, #4]
+ 8006dc2:	681b      	ldr	r3, [r3, #0]
+ 8006dc4:	68fa      	ldr	r2, [r7, #12]
+ 8006dc6:	61da      	str	r2, [r3, #28]
+ 8006dc8:	e01e      	b.n	8006e08 <HAL_ETH_ConfigMAC+0x1d4>
+  }
+  else /* macconf == NULL : here we just configure Speed and Duplex mode */
+  {
+    /*------------------------ ETHERNET MACCR Configuration --------------------*/
+    /* Get the ETHERNET MACCR value */
+    tmpreg = (heth->Instance)->MACCR;
+ 8006dca:	687b      	ldr	r3, [r7, #4]
+ 8006dcc:	681b      	ldr	r3, [r3, #0]
+ 8006dce:	681b      	ldr	r3, [r3, #0]
+ 8006dd0:	60fb      	str	r3, [r7, #12]
+    
+    /* Clear FES and DM bits */
+    tmpreg &= ~((uint32_t)0x00004800);
+ 8006dd2:	68fb      	ldr	r3, [r7, #12]
+ 8006dd4:	f423 4390 	bic.w	r3, r3, #18432	; 0x4800
+ 8006dd8:	60fb      	str	r3, [r7, #12]
+    
+    tmpreg |= (uint32_t)(heth->Init.Speed | heth->Init.DuplexMode);
+ 8006dda:	687b      	ldr	r3, [r7, #4]
+ 8006ddc:	689a      	ldr	r2, [r3, #8]
+ 8006dde:	687b      	ldr	r3, [r7, #4]
+ 8006de0:	68db      	ldr	r3, [r3, #12]
+ 8006de2:	4313      	orrs	r3, r2
+ 8006de4:	68fa      	ldr	r2, [r7, #12]
+ 8006de6:	4313      	orrs	r3, r2
+ 8006de8:	60fb      	str	r3, [r7, #12]
+    
+    /* Write to ETHERNET MACCR */
+    (heth->Instance)->MACCR = (uint32_t)tmpreg;
+ 8006dea:	687b      	ldr	r3, [r7, #4]
+ 8006dec:	681b      	ldr	r3, [r3, #0]
+ 8006dee:	68fa      	ldr	r2, [r7, #12]
+ 8006df0:	601a      	str	r2, [r3, #0]
+    
+    /* Wait until the write operation will be taken into account:
+    at least four TX_CLK/RX_CLK clock cycles */
+    tmpreg = (heth->Instance)->MACCR;
+ 8006df2:	687b      	ldr	r3, [r7, #4]
+ 8006df4:	681b      	ldr	r3, [r3, #0]
+ 8006df6:	681b      	ldr	r3, [r3, #0]
+ 8006df8:	60fb      	str	r3, [r7, #12]
+    HAL_Delay(ETH_REG_WRITE_DELAY);
+ 8006dfa:	2001      	movs	r0, #1
+ 8006dfc:	f7fd feb0 	bl	8004b60 <HAL_Delay>
+    (heth->Instance)->MACCR = tmpreg;
+ 8006e00:	687b      	ldr	r3, [r7, #4]
+ 8006e02:	681b      	ldr	r3, [r3, #0]
+ 8006e04:	68fa      	ldr	r2, [r7, #12]
+ 8006e06:	601a      	str	r2, [r3, #0]
+  }
+  
+  /* Set the ETH state to Ready */
+  heth->State= HAL_ETH_STATE_READY;
+ 8006e08:	687b      	ldr	r3, [r7, #4]
+ 8006e0a:	2201      	movs	r2, #1
+ 8006e0c:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+  
+  /* Process Unlocked */
+  __HAL_UNLOCK(heth);
+ 8006e10:	687b      	ldr	r3, [r7, #4]
+ 8006e12:	2200      	movs	r2, #0
+ 8006e14:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+  
+  /* Return function status */
+  return HAL_OK;  
+ 8006e18:	2300      	movs	r3, #0
+}
+ 8006e1a:	4618      	mov	r0, r3
+ 8006e1c:	3710      	adds	r7, #16
+ 8006e1e:	46bd      	mov	sp, r7
+ 8006e20:	bd80      	pop	{r7, pc}
+ 8006e22:	bf00      	nop
+ 8006e24:	ff20810f 	.word	0xff20810f
+
+08006e28 <ETH_MACDMAConfig>:
+  *         the configuration information for ETHERNET module
+  * @param  err Ethernet Init error
+  * @retval HAL status
+  */
+static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth, uint32_t err)
+{
+ 8006e28:	b580      	push	{r7, lr}
+ 8006e2a:	b0b0      	sub	sp, #192	; 0xc0
+ 8006e2c:	af00      	add	r7, sp, #0
+ 8006e2e:	6078      	str	r0, [r7, #4]
+ 8006e30:	6039      	str	r1, [r7, #0]
+  ETH_MACInitTypeDef macinit;
+  ETH_DMAInitTypeDef dmainit;
+  uint32_t tmpreg = 0;
+ 8006e32:	2300      	movs	r3, #0
+ 8006e34:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+  
+  if (err != ETH_SUCCESS) /* Auto-negotiation failed */
+ 8006e38:	683b      	ldr	r3, [r7, #0]
+ 8006e3a:	2b00      	cmp	r3, #0
+ 8006e3c:	d007      	beq.n	8006e4e <ETH_MACDMAConfig+0x26>
+  {
+    /* Set Ethernet duplex mode to Full-duplex */
+    (heth->Init).DuplexMode = ETH_MODE_FULLDUPLEX;
+ 8006e3e:	687b      	ldr	r3, [r7, #4]
+ 8006e40:	f44f 6200 	mov.w	r2, #2048	; 0x800
+ 8006e44:	60da      	str	r2, [r3, #12]
+    
+    /* Set Ethernet speed to 100M */
+    (heth->Init).Speed = ETH_SPEED_100M;
+ 8006e46:	687b      	ldr	r3, [r7, #4]
+ 8006e48:	f44f 4280 	mov.w	r2, #16384	; 0x4000
+ 8006e4c:	609a      	str	r2, [r3, #8]
+  }
+  
+  /* Ethernet MAC default initialization **************************************/
+  macinit.Watchdog = ETH_WATCHDOG_ENABLE;
+ 8006e4e:	2300      	movs	r3, #0
+ 8006e50:	64bb      	str	r3, [r7, #72]	; 0x48
+  macinit.Jabber = ETH_JABBER_ENABLE;
+ 8006e52:	2300      	movs	r3, #0
+ 8006e54:	64fb      	str	r3, [r7, #76]	; 0x4c
+  macinit.InterFrameGap = ETH_INTERFRAMEGAP_96BIT;
+ 8006e56:	2300      	movs	r3, #0
+ 8006e58:	653b      	str	r3, [r7, #80]	; 0x50
+  macinit.CarrierSense = ETH_CARRIERSENCE_ENABLE;
+ 8006e5a:	2300      	movs	r3, #0
+ 8006e5c:	657b      	str	r3, [r7, #84]	; 0x54
+  macinit.ReceiveOwn = ETH_RECEIVEOWN_ENABLE;
+ 8006e5e:	2300      	movs	r3, #0
+ 8006e60:	65bb      	str	r3, [r7, #88]	; 0x58
+  macinit.LoopbackMode = ETH_LOOPBACKMODE_DISABLE;
+ 8006e62:	2300      	movs	r3, #0
+ 8006e64:	65fb      	str	r3, [r7, #92]	; 0x5c
+  if(heth->Init.ChecksumMode == ETH_CHECKSUM_BY_HARDWARE)
+ 8006e66:	687b      	ldr	r3, [r7, #4]
+ 8006e68:	69db      	ldr	r3, [r3, #28]
+ 8006e6a:	2b00      	cmp	r3, #0
+ 8006e6c:	d103      	bne.n	8006e76 <ETH_MACDMAConfig+0x4e>
+  {
+    macinit.ChecksumOffload = ETH_CHECKSUMOFFLAOD_ENABLE;
+ 8006e6e:	f44f 6380 	mov.w	r3, #1024	; 0x400
+ 8006e72:	663b      	str	r3, [r7, #96]	; 0x60
+ 8006e74:	e001      	b.n	8006e7a <ETH_MACDMAConfig+0x52>
+  }
+  else
+  {
+    macinit.ChecksumOffload = ETH_CHECKSUMOFFLAOD_DISABLE;
+ 8006e76:	2300      	movs	r3, #0
+ 8006e78:	663b      	str	r3, [r7, #96]	; 0x60
+  }
+  macinit.RetryTransmission = ETH_RETRYTRANSMISSION_DISABLE;
+ 8006e7a:	f44f 7300 	mov.w	r3, #512	; 0x200
+ 8006e7e:	667b      	str	r3, [r7, #100]	; 0x64
+  macinit.AutomaticPadCRCStrip = ETH_AUTOMATICPADCRCSTRIP_DISABLE;
+ 8006e80:	2300      	movs	r3, #0
+ 8006e82:	66bb      	str	r3, [r7, #104]	; 0x68
+  macinit.BackOffLimit = ETH_BACKOFFLIMIT_10;
+ 8006e84:	2300      	movs	r3, #0
+ 8006e86:	66fb      	str	r3, [r7, #108]	; 0x6c
+  macinit.DeferralCheck = ETH_DEFFERRALCHECK_DISABLE;
+ 8006e88:	2300      	movs	r3, #0
+ 8006e8a:	673b      	str	r3, [r7, #112]	; 0x70
+  macinit.ReceiveAll = ETH_RECEIVEAll_DISABLE;
+ 8006e8c:	2300      	movs	r3, #0
+ 8006e8e:	677b      	str	r3, [r7, #116]	; 0x74
+  macinit.SourceAddrFilter = ETH_SOURCEADDRFILTER_DISABLE;
+ 8006e90:	2300      	movs	r3, #0
+ 8006e92:	67bb      	str	r3, [r7, #120]	; 0x78
+  macinit.PassControlFrames = ETH_PASSCONTROLFRAMES_BLOCKALL;
+ 8006e94:	2340      	movs	r3, #64	; 0x40
+ 8006e96:	67fb      	str	r3, [r7, #124]	; 0x7c
+  macinit.BroadcastFramesReception = ETH_BROADCASTFRAMESRECEPTION_ENABLE;
+ 8006e98:	2300      	movs	r3, #0
+ 8006e9a:	f8c7 3080 	str.w	r3, [r7, #128]	; 0x80
+  macinit.DestinationAddrFilter = ETH_DESTINATIONADDRFILTER_NORMAL;
+ 8006e9e:	2300      	movs	r3, #0
+ 8006ea0:	f8c7 3084 	str.w	r3, [r7, #132]	; 0x84
+  macinit.PromiscuousMode = ETH_PROMISCUOUS_MODE_DISABLE;
+ 8006ea4:	2300      	movs	r3, #0
+ 8006ea6:	f8c7 3088 	str.w	r3, [r7, #136]	; 0x88
+  macinit.MulticastFramesFilter = ETH_MULTICASTFRAMESFILTER_PERFECT;
+ 8006eaa:	2300      	movs	r3, #0
+ 8006eac:	f8c7 308c 	str.w	r3, [r7, #140]	; 0x8c
+  macinit.UnicastFramesFilter = ETH_UNICASTFRAMESFILTER_PERFECT;
+ 8006eb0:	2300      	movs	r3, #0
+ 8006eb2:	f8c7 3090 	str.w	r3, [r7, #144]	; 0x90
+  macinit.HashTableHigh = 0x0;
+ 8006eb6:	2300      	movs	r3, #0
+ 8006eb8:	f8c7 3094 	str.w	r3, [r7, #148]	; 0x94
+  macinit.HashTableLow = 0x0;
+ 8006ebc:	2300      	movs	r3, #0
+ 8006ebe:	f8c7 3098 	str.w	r3, [r7, #152]	; 0x98
+  macinit.PauseTime = 0x0;
+ 8006ec2:	2300      	movs	r3, #0
+ 8006ec4:	f8c7 309c 	str.w	r3, [r7, #156]	; 0x9c
+  macinit.ZeroQuantaPause = ETH_ZEROQUANTAPAUSE_DISABLE;
+ 8006ec8:	2380      	movs	r3, #128	; 0x80
+ 8006eca:	f8c7 30a0 	str.w	r3, [r7, #160]	; 0xa0
+  macinit.PauseLowThreshold = ETH_PAUSELOWTHRESHOLD_MINUS4;
+ 8006ece:	2300      	movs	r3, #0
+ 8006ed0:	f8c7 30a4 	str.w	r3, [r7, #164]	; 0xa4
+  macinit.UnicastPauseFrameDetect = ETH_UNICASTPAUSEFRAMEDETECT_DISABLE;
+ 8006ed4:	2300      	movs	r3, #0
+ 8006ed6:	f8c7 30a8 	str.w	r3, [r7, #168]	; 0xa8
+  macinit.ReceiveFlowControl = ETH_RECEIVEFLOWCONTROL_DISABLE;
+ 8006eda:	2300      	movs	r3, #0
+ 8006edc:	f8c7 30ac 	str.w	r3, [r7, #172]	; 0xac
+  macinit.TransmitFlowControl = ETH_TRANSMITFLOWCONTROL_DISABLE;
+ 8006ee0:	2300      	movs	r3, #0
+ 8006ee2:	f8c7 30b0 	str.w	r3, [r7, #176]	; 0xb0
+  macinit.VLANTagComparison = ETH_VLANTAGCOMPARISON_16BIT;
+ 8006ee6:	2300      	movs	r3, #0
+ 8006ee8:	f8c7 30b4 	str.w	r3, [r7, #180]	; 0xb4
+  macinit.VLANTagIdentifier = 0x0;
+ 8006eec:	2300      	movs	r3, #0
+ 8006eee:	f8c7 30b8 	str.w	r3, [r7, #184]	; 0xb8
+  
+  /*------------------------ ETHERNET MACCR Configuration --------------------*/
+  /* Get the ETHERNET MACCR value */
+  tmpreg = (heth->Instance)->MACCR;
+ 8006ef2:	687b      	ldr	r3, [r7, #4]
+ 8006ef4:	681b      	ldr	r3, [r3, #0]
+ 8006ef6:	681b      	ldr	r3, [r3, #0]
+ 8006ef8:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+  /* Clear WD, PCE, PS, TE and RE bits */
+  tmpreg &= ETH_MACCR_CLEAR_MASK;
+ 8006efc:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 8006f00:	4bab      	ldr	r3, [pc, #684]	; (80071b0 <ETH_MACDMAConfig+0x388>)
+ 8006f02:	4013      	ands	r3, r2
+ 8006f04:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+  /* Set the IPCO bit according to ETH ChecksumOffload value */
+  /* Set the DR bit according to ETH RetryTransmission value */
+  /* Set the ACS bit according to ETH AutomaticPadCRCStrip value */
+  /* Set the BL bit according to ETH BackOffLimit value */
+  /* Set the DC bit according to ETH DeferralCheck value */
+  tmpreg |= (uint32_t)(macinit.Watchdog | 
+ 8006f08:	6cba      	ldr	r2, [r7, #72]	; 0x48
+                       macinit.Jabber | 
+ 8006f0a:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
+  tmpreg |= (uint32_t)(macinit.Watchdog | 
+ 8006f0c:	431a      	orrs	r2, r3
+                       macinit.InterFrameGap |
+ 8006f0e:	6d3b      	ldr	r3, [r7, #80]	; 0x50
+                       macinit.Jabber | 
+ 8006f10:	431a      	orrs	r2, r3
+                       macinit.CarrierSense |
+ 8006f12:	6d7b      	ldr	r3, [r7, #84]	; 0x54
+                       macinit.InterFrameGap |
+ 8006f14:	431a      	orrs	r2, r3
+                       (heth->Init).Speed | 
+ 8006f16:	687b      	ldr	r3, [r7, #4]
+ 8006f18:	689b      	ldr	r3, [r3, #8]
+                       macinit.CarrierSense |
+ 8006f1a:	431a      	orrs	r2, r3
+                       macinit.ReceiveOwn |
+ 8006f1c:	6dbb      	ldr	r3, [r7, #88]	; 0x58
+                       (heth->Init).Speed | 
+ 8006f1e:	431a      	orrs	r2, r3
+                       macinit.LoopbackMode |
+ 8006f20:	6dfb      	ldr	r3, [r7, #92]	; 0x5c
+                       macinit.ReceiveOwn |
+ 8006f22:	431a      	orrs	r2, r3
+                       (heth->Init).DuplexMode | 
+ 8006f24:	687b      	ldr	r3, [r7, #4]
+ 8006f26:	68db      	ldr	r3, [r3, #12]
+                       macinit.LoopbackMode |
+ 8006f28:	431a      	orrs	r2, r3
+                       macinit.ChecksumOffload |    
+ 8006f2a:	6e3b      	ldr	r3, [r7, #96]	; 0x60
+                       (heth->Init).DuplexMode | 
+ 8006f2c:	431a      	orrs	r2, r3
+                       macinit.RetryTransmission | 
+ 8006f2e:	6e7b      	ldr	r3, [r7, #100]	; 0x64
+                       macinit.ChecksumOffload |    
+ 8006f30:	431a      	orrs	r2, r3
+                       macinit.AutomaticPadCRCStrip | 
+ 8006f32:	6ebb      	ldr	r3, [r7, #104]	; 0x68
+                       macinit.RetryTransmission | 
+ 8006f34:	431a      	orrs	r2, r3
+                       macinit.BackOffLimit | 
+ 8006f36:	6efb      	ldr	r3, [r7, #108]	; 0x6c
+                       macinit.AutomaticPadCRCStrip | 
+ 8006f38:	431a      	orrs	r2, r3
+                       macinit.DeferralCheck);
+ 8006f3a:	6f3b      	ldr	r3, [r7, #112]	; 0x70
+                       macinit.BackOffLimit | 
+ 8006f3c:	4313      	orrs	r3, r2
+  tmpreg |= (uint32_t)(macinit.Watchdog | 
+ 8006f3e:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 8006f42:	4313      	orrs	r3, r2
+ 8006f44:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+  
+  /* Write to ETHERNET MACCR */
+  (heth->Instance)->MACCR = (uint32_t)tmpreg;
+ 8006f48:	687b      	ldr	r3, [r7, #4]
+ 8006f4a:	681b      	ldr	r3, [r3, #0]
+ 8006f4c:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 8006f50:	601a      	str	r2, [r3, #0]
+  
+  /* Wait until the write operation will be taken into account:
+     at least four TX_CLK/RX_CLK clock cycles */
+  tmpreg = (heth->Instance)->MACCR;
+ 8006f52:	687b      	ldr	r3, [r7, #4]
+ 8006f54:	681b      	ldr	r3, [r3, #0]
+ 8006f56:	681b      	ldr	r3, [r3, #0]
+ 8006f58:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+  HAL_Delay(ETH_REG_WRITE_DELAY);
+ 8006f5c:	2001      	movs	r0, #1
+ 8006f5e:	f7fd fdff 	bl	8004b60 <HAL_Delay>
+  (heth->Instance)->MACCR = tmpreg; 
+ 8006f62:	687b      	ldr	r3, [r7, #4]
+ 8006f64:	681b      	ldr	r3, [r3, #0]
+ 8006f66:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 8006f6a:	601a      	str	r2, [r3, #0]
+  /* Set the DAIF bit according to ETH DestinationAddrFilter value */
+  /* Set the PR bit according to ETH PromiscuousMode value */
+  /* Set the PM, HMC and HPF bits according to ETH MulticastFramesFilter value */
+  /* Set the HUC and HPF bits according to ETH UnicastFramesFilter value */
+  /* Write to ETHERNET MACFFR */  
+  (heth->Instance)->MACFFR = (uint32_t)(macinit.ReceiveAll | 
+ 8006f6c:	6f7a      	ldr	r2, [r7, #116]	; 0x74
+                                        macinit.SourceAddrFilter |
+ 8006f6e:	6fbb      	ldr	r3, [r7, #120]	; 0x78
+  (heth->Instance)->MACFFR = (uint32_t)(macinit.ReceiveAll | 
+ 8006f70:	431a      	orrs	r2, r3
+                                        macinit.PassControlFrames |
+ 8006f72:	6ffb      	ldr	r3, [r7, #124]	; 0x7c
+                                        macinit.SourceAddrFilter |
+ 8006f74:	431a      	orrs	r2, r3
+                                        macinit.BroadcastFramesReception | 
+ 8006f76:	f8d7 3080 	ldr.w	r3, [r7, #128]	; 0x80
+                                        macinit.PassControlFrames |
+ 8006f7a:	431a      	orrs	r2, r3
+                                        macinit.DestinationAddrFilter |
+ 8006f7c:	f8d7 3084 	ldr.w	r3, [r7, #132]	; 0x84
+                                        macinit.BroadcastFramesReception | 
+ 8006f80:	431a      	orrs	r2, r3
+                                        macinit.PromiscuousMode |
+ 8006f82:	f8d7 3088 	ldr.w	r3, [r7, #136]	; 0x88
+                                        macinit.DestinationAddrFilter |
+ 8006f86:	431a      	orrs	r2, r3
+                                        macinit.MulticastFramesFilter |
+ 8006f88:	f8d7 308c 	ldr.w	r3, [r7, #140]	; 0x8c
+                                        macinit.PromiscuousMode |
+ 8006f8c:	ea42 0103 	orr.w	r1, r2, r3
+                                        macinit.UnicastFramesFilter);
+ 8006f90:	f8d7 2090 	ldr.w	r2, [r7, #144]	; 0x90
+  (heth->Instance)->MACFFR = (uint32_t)(macinit.ReceiveAll | 
+ 8006f94:	687b      	ldr	r3, [r7, #4]
+ 8006f96:	681b      	ldr	r3, [r3, #0]
+                                        macinit.MulticastFramesFilter |
+ 8006f98:	430a      	orrs	r2, r1
+  (heth->Instance)->MACFFR = (uint32_t)(macinit.ReceiveAll | 
+ 8006f9a:	605a      	str	r2, [r3, #4]
+   
+   /* Wait until the write operation will be taken into account:
+      at least four TX_CLK/RX_CLK clock cycles */
+   tmpreg = (heth->Instance)->MACFFR;
+ 8006f9c:	687b      	ldr	r3, [r7, #4]
+ 8006f9e:	681b      	ldr	r3, [r3, #0]
+ 8006fa0:	685b      	ldr	r3, [r3, #4]
+ 8006fa2:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+   HAL_Delay(ETH_REG_WRITE_DELAY);
+ 8006fa6:	2001      	movs	r0, #1
+ 8006fa8:	f7fd fdda 	bl	8004b60 <HAL_Delay>
+   (heth->Instance)->MACFFR = tmpreg;
+ 8006fac:	687b      	ldr	r3, [r7, #4]
+ 8006fae:	681b      	ldr	r3, [r3, #0]
+ 8006fb0:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 8006fb4:	605a      	str	r2, [r3, #4]
+   
+   /*--------------- ETHERNET MACHTHR and MACHTLR Configuration --------------*/
+   /* Write to ETHERNET MACHTHR */
+   (heth->Instance)->MACHTHR = (uint32_t)macinit.HashTableHigh;
+ 8006fb6:	687b      	ldr	r3, [r7, #4]
+ 8006fb8:	681b      	ldr	r3, [r3, #0]
+ 8006fba:	f8d7 2094 	ldr.w	r2, [r7, #148]	; 0x94
+ 8006fbe:	609a      	str	r2, [r3, #8]
+   
+   /* Write to ETHERNET MACHTLR */
+   (heth->Instance)->MACHTLR = (uint32_t)macinit.HashTableLow;
+ 8006fc0:	687b      	ldr	r3, [r7, #4]
+ 8006fc2:	681b      	ldr	r3, [r3, #0]
+ 8006fc4:	f8d7 2098 	ldr.w	r2, [r7, #152]	; 0x98
+ 8006fc8:	60da      	str	r2, [r3, #12]
+   /*----------------------- ETHERNET MACFCR Configuration -------------------*/
+   
+   /* Get the ETHERNET MACFCR value */  
+   tmpreg = (heth->Instance)->MACFCR;
+ 8006fca:	687b      	ldr	r3, [r7, #4]
+ 8006fcc:	681b      	ldr	r3, [r3, #0]
+ 8006fce:	699b      	ldr	r3, [r3, #24]
+ 8006fd0:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+   /* Clear xx bits */
+   tmpreg &= ETH_MACFCR_CLEAR_MASK;
+ 8006fd4:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 8006fd8:	f64f 7341 	movw	r3, #65345	; 0xff41
+ 8006fdc:	4013      	ands	r3, r2
+ 8006fde:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+   /* Set the DZPQ bit according to ETH ZeroQuantaPause value */
+   /* Set the PLT bit according to ETH PauseLowThreshold value */
+   /* Set the UP bit according to ETH UnicastPauseFrameDetect value */
+   /* Set the RFE bit according to ETH ReceiveFlowControl value */
+   /* Set the TFE bit according to ETH TransmitFlowControl value */ 
+   tmpreg |= (uint32_t)((macinit.PauseTime << 16) | 
+ 8006fe2:	f8d7 309c 	ldr.w	r3, [r7, #156]	; 0x9c
+ 8006fe6:	041a      	lsls	r2, r3, #16
+                        macinit.ZeroQuantaPause |
+ 8006fe8:	f8d7 30a0 	ldr.w	r3, [r7, #160]	; 0xa0
+   tmpreg |= (uint32_t)((macinit.PauseTime << 16) | 
+ 8006fec:	431a      	orrs	r2, r3
+                        macinit.PauseLowThreshold |
+ 8006fee:	f8d7 30a4 	ldr.w	r3, [r7, #164]	; 0xa4
+                        macinit.ZeroQuantaPause |
+ 8006ff2:	431a      	orrs	r2, r3
+                        macinit.UnicastPauseFrameDetect | 
+ 8006ff4:	f8d7 30a8 	ldr.w	r3, [r7, #168]	; 0xa8
+                        macinit.PauseLowThreshold |
+ 8006ff8:	431a      	orrs	r2, r3
+                        macinit.ReceiveFlowControl |
+ 8006ffa:	f8d7 30ac 	ldr.w	r3, [r7, #172]	; 0xac
+                        macinit.UnicastPauseFrameDetect | 
+ 8006ffe:	431a      	orrs	r2, r3
+                        macinit.TransmitFlowControl); 
+ 8007000:	f8d7 30b0 	ldr.w	r3, [r7, #176]	; 0xb0
+                        macinit.ReceiveFlowControl |
+ 8007004:	4313      	orrs	r3, r2
+   tmpreg |= (uint32_t)((macinit.PauseTime << 16) | 
+ 8007006:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 800700a:	4313      	orrs	r3, r2
+ 800700c:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+   
+   /* Write to ETHERNET MACFCR */
+   (heth->Instance)->MACFCR = (uint32_t)tmpreg;
+ 8007010:	687b      	ldr	r3, [r7, #4]
+ 8007012:	681b      	ldr	r3, [r3, #0]
+ 8007014:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 8007018:	619a      	str	r2, [r3, #24]
+   
+   /* Wait until the write operation will be taken into account:
+   at least four TX_CLK/RX_CLK clock cycles */
+   tmpreg = (heth->Instance)->MACFCR;
+ 800701a:	687b      	ldr	r3, [r7, #4]
+ 800701c:	681b      	ldr	r3, [r3, #0]
+ 800701e:	699b      	ldr	r3, [r3, #24]
+ 8007020:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+   HAL_Delay(ETH_REG_WRITE_DELAY);
+ 8007024:	2001      	movs	r0, #1
+ 8007026:	f7fd fd9b 	bl	8004b60 <HAL_Delay>
+   (heth->Instance)->MACFCR = tmpreg;
+ 800702a:	687b      	ldr	r3, [r7, #4]
+ 800702c:	681b      	ldr	r3, [r3, #0]
+ 800702e:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 8007032:	619a      	str	r2, [r3, #24]
+   
+   /*----------------------- ETHERNET MACVLANTR Configuration ----------------*/
+   /* Set the ETV bit according to ETH VLANTagComparison value */
+   /* Set the VL bit according to ETH VLANTagIdentifier value */  
+   (heth->Instance)->MACVLANTR = (uint32_t)(macinit.VLANTagComparison | 
+ 8007034:	f8d7 10b4 	ldr.w	r1, [r7, #180]	; 0xb4
+                                            macinit.VLANTagIdentifier);
+ 8007038:	f8d7 20b8 	ldr.w	r2, [r7, #184]	; 0xb8
+   (heth->Instance)->MACVLANTR = (uint32_t)(macinit.VLANTagComparison | 
+ 800703c:	687b      	ldr	r3, [r7, #4]
+ 800703e:	681b      	ldr	r3, [r3, #0]
+ 8007040:	430a      	orrs	r2, r1
+ 8007042:	61da      	str	r2, [r3, #28]
+    
+    /* Wait until the write operation will be taken into account:
+       at least four TX_CLK/RX_CLK clock cycles */
+    tmpreg = (heth->Instance)->MACVLANTR;
+ 8007044:	687b      	ldr	r3, [r7, #4]
+ 8007046:	681b      	ldr	r3, [r3, #0]
+ 8007048:	69db      	ldr	r3, [r3, #28]
+ 800704a:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+    HAL_Delay(ETH_REG_WRITE_DELAY);
+ 800704e:	2001      	movs	r0, #1
+ 8007050:	f7fd fd86 	bl	8004b60 <HAL_Delay>
+    (heth->Instance)->MACVLANTR = tmpreg;
+ 8007054:	687b      	ldr	r3, [r7, #4]
+ 8007056:	681b      	ldr	r3, [r3, #0]
+ 8007058:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 800705c:	61da      	str	r2, [r3, #28]
+    
+    /* Ethernet DMA default initialization ************************************/
+    dmainit.DropTCPIPChecksumErrorFrame = ETH_DROPTCPIPCHECKSUMERRORFRAME_ENABLE;
+ 800705e:	2300      	movs	r3, #0
+ 8007060:	60bb      	str	r3, [r7, #8]
+    dmainit.ReceiveStoreForward = ETH_RECEIVESTOREFORWARD_ENABLE;
+ 8007062:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
+ 8007066:	60fb      	str	r3, [r7, #12]
+    dmainit.FlushReceivedFrame = ETH_FLUSHRECEIVEDFRAME_ENABLE;
+ 8007068:	2300      	movs	r3, #0
+ 800706a:	613b      	str	r3, [r7, #16]
+    dmainit.TransmitStoreForward = ETH_TRANSMITSTOREFORWARD_ENABLE;  
+ 800706c:	f44f 1300 	mov.w	r3, #2097152	; 0x200000
+ 8007070:	617b      	str	r3, [r7, #20]
+    dmainit.TransmitThresholdControl = ETH_TRANSMITTHRESHOLDCONTROL_64BYTES;
+ 8007072:	2300      	movs	r3, #0
+ 8007074:	61bb      	str	r3, [r7, #24]
+    dmainit.ForwardErrorFrames = ETH_FORWARDERRORFRAMES_DISABLE;
+ 8007076:	2300      	movs	r3, #0
+ 8007078:	61fb      	str	r3, [r7, #28]
+    dmainit.ForwardUndersizedGoodFrames = ETH_FORWARDUNDERSIZEDGOODFRAMES_DISABLE;
+ 800707a:	2300      	movs	r3, #0
+ 800707c:	623b      	str	r3, [r7, #32]
+    dmainit.ReceiveThresholdControl = ETH_RECEIVEDTHRESHOLDCONTROL_64BYTES;
+ 800707e:	2300      	movs	r3, #0
+ 8007080:	627b      	str	r3, [r7, #36]	; 0x24
+    dmainit.SecondFrameOperate = ETH_SECONDFRAMEOPERARTE_ENABLE;
+ 8007082:	2304      	movs	r3, #4
+ 8007084:	62bb      	str	r3, [r7, #40]	; 0x28
+    dmainit.AddressAlignedBeats = ETH_ADDRESSALIGNEDBEATS_ENABLE;
+ 8007086:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
+ 800708a:	62fb      	str	r3, [r7, #44]	; 0x2c
+    dmainit.FixedBurst = ETH_FIXEDBURST_ENABLE;
+ 800708c:	f44f 3380 	mov.w	r3, #65536	; 0x10000
+ 8007090:	633b      	str	r3, [r7, #48]	; 0x30
+    dmainit.RxDMABurstLength = ETH_RXDMABURSTLENGTH_32BEAT;
+ 8007092:	f44f 0380 	mov.w	r3, #4194304	; 0x400000
+ 8007096:	637b      	str	r3, [r7, #52]	; 0x34
+    dmainit.TxDMABurstLength = ETH_TXDMABURSTLENGTH_32BEAT;
+ 8007098:	f44f 5300 	mov.w	r3, #8192	; 0x2000
+ 800709c:	63bb      	str	r3, [r7, #56]	; 0x38
+    dmainit.EnhancedDescriptorFormat = ETH_DMAENHANCEDDESCRIPTOR_ENABLE;
+ 800709e:	2380      	movs	r3, #128	; 0x80
+ 80070a0:	63fb      	str	r3, [r7, #60]	; 0x3c
+    dmainit.DescriptorSkipLength = 0x0;
+ 80070a2:	2300      	movs	r3, #0
+ 80070a4:	643b      	str	r3, [r7, #64]	; 0x40
+    dmainit.DMAArbitration = ETH_DMAARBITRATION_ROUNDROBIN_RXTX_1_1;
+ 80070a6:	2300      	movs	r3, #0
+ 80070a8:	647b      	str	r3, [r7, #68]	; 0x44
+    
+    /* Get the ETHERNET DMAOMR value */
+    tmpreg = (heth->Instance)->DMAOMR;
+ 80070aa:	687b      	ldr	r3, [r7, #4]
+ 80070ac:	681a      	ldr	r2, [r3, #0]
+ 80070ae:	f241 0318 	movw	r3, #4120	; 0x1018
+ 80070b2:	4413      	add	r3, r2
+ 80070b4:	681b      	ldr	r3, [r3, #0]
+ 80070b6:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+    /* Clear xx bits */
+    tmpreg &= ETH_DMAOMR_CLEAR_MASK;
+ 80070ba:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 80070be:	4b3d      	ldr	r3, [pc, #244]	; (80071b4 <ETH_MACDMAConfig+0x38c>)
+ 80070c0:	4013      	ands	r3, r2
+ 80070c2:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+    /* Set the TTC bit according to ETH TransmitThresholdControl value */
+    /* Set the FEF bit according to ETH ForwardErrorFrames value */
+    /* Set the FUF bit according to ETH ForwardUndersizedGoodFrames value */
+    /* Set the RTC bit according to ETH ReceiveThresholdControl value */
+    /* Set the OSF bit according to ETH SecondFrameOperate value */
+    tmpreg |= (uint32_t)(dmainit.DropTCPIPChecksumErrorFrame | 
+ 80070c6:	68ba      	ldr	r2, [r7, #8]
+                         dmainit.ReceiveStoreForward |
+ 80070c8:	68fb      	ldr	r3, [r7, #12]
+    tmpreg |= (uint32_t)(dmainit.DropTCPIPChecksumErrorFrame | 
+ 80070ca:	431a      	orrs	r2, r3
+                         dmainit.FlushReceivedFrame |
+ 80070cc:	693b      	ldr	r3, [r7, #16]
+                         dmainit.ReceiveStoreForward |
+ 80070ce:	431a      	orrs	r2, r3
+                         dmainit.TransmitStoreForward | 
+ 80070d0:	697b      	ldr	r3, [r7, #20]
+                         dmainit.FlushReceivedFrame |
+ 80070d2:	431a      	orrs	r2, r3
+                         dmainit.TransmitThresholdControl |
+ 80070d4:	69bb      	ldr	r3, [r7, #24]
+                         dmainit.TransmitStoreForward | 
+ 80070d6:	431a      	orrs	r2, r3
+                         dmainit.ForwardErrorFrames |
+ 80070d8:	69fb      	ldr	r3, [r7, #28]
+                         dmainit.TransmitThresholdControl |
+ 80070da:	431a      	orrs	r2, r3
+                         dmainit.ForwardUndersizedGoodFrames |
+ 80070dc:	6a3b      	ldr	r3, [r7, #32]
+                         dmainit.ForwardErrorFrames |
+ 80070de:	431a      	orrs	r2, r3
+                         dmainit.ReceiveThresholdControl |
+ 80070e0:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+                         dmainit.ForwardUndersizedGoodFrames |
+ 80070e2:	431a      	orrs	r2, r3
+                         dmainit.SecondFrameOperate);
+ 80070e4:	6abb      	ldr	r3, [r7, #40]	; 0x28
+                         dmainit.ReceiveThresholdControl |
+ 80070e6:	4313      	orrs	r3, r2
+    tmpreg |= (uint32_t)(dmainit.DropTCPIPChecksumErrorFrame | 
+ 80070e8:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 80070ec:	4313      	orrs	r3, r2
+ 80070ee:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+    
+    /* Write to ETHERNET DMAOMR */
+    (heth->Instance)->DMAOMR = (uint32_t)tmpreg;
+ 80070f2:	687b      	ldr	r3, [r7, #4]
+ 80070f4:	681a      	ldr	r2, [r3, #0]
+ 80070f6:	f241 0318 	movw	r3, #4120	; 0x1018
+ 80070fa:	4413      	add	r3, r2
+ 80070fc:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 8007100:	601a      	str	r2, [r3, #0]
+    
+    /* Wait until the write operation will be taken into account:
+       at least four TX_CLK/RX_CLK clock cycles */
+    tmpreg = (heth->Instance)->DMAOMR;
+ 8007102:	687b      	ldr	r3, [r7, #4]
+ 8007104:	681a      	ldr	r2, [r3, #0]
+ 8007106:	f241 0318 	movw	r3, #4120	; 0x1018
+ 800710a:	4413      	add	r3, r2
+ 800710c:	681b      	ldr	r3, [r3, #0]
+ 800710e:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+    HAL_Delay(ETH_REG_WRITE_DELAY);
+ 8007112:	2001      	movs	r0, #1
+ 8007114:	f7fd fd24 	bl	8004b60 <HAL_Delay>
+    (heth->Instance)->DMAOMR = tmpreg;
+ 8007118:	687b      	ldr	r3, [r7, #4]
+ 800711a:	681a      	ldr	r2, [r3, #0]
+ 800711c:	f241 0318 	movw	r3, #4120	; 0x1018
+ 8007120:	4413      	add	r3, r2
+ 8007122:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 8007126:	601a      	str	r2, [r3, #0]
+    /* Set the RPBL and 4*PBL bits according to ETH RxDMABurstLength value */
+    /* Set the PBL and 4*PBL bits according to ETH TxDMABurstLength value */
+    /* Set the Enhanced DMA descriptors bit according to ETH EnhancedDescriptorFormat value*/
+    /* Set the DSL bit according to ETH DesciptorSkipLength value */
+    /* Set the PR and DA bits according to ETH DMAArbitration value */
+    (heth->Instance)->DMABMR = (uint32_t)(dmainit.AddressAlignedBeats | 
+ 8007128:	6afa      	ldr	r2, [r7, #44]	; 0x2c
+                                          dmainit.FixedBurst |
+ 800712a:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+    (heth->Instance)->DMABMR = (uint32_t)(dmainit.AddressAlignedBeats | 
+ 800712c:	431a      	orrs	r2, r3
+                                          dmainit.RxDMABurstLength |    /* !! if 4xPBL is selected for Tx or Rx it is applied for the other */
+ 800712e:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+                                          dmainit.FixedBurst |
+ 8007130:	431a      	orrs	r2, r3
+                                          dmainit.TxDMABurstLength |
+ 8007132:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+                                          dmainit.RxDMABurstLength |    /* !! if 4xPBL is selected for Tx or Rx it is applied for the other */
+ 8007134:	431a      	orrs	r2, r3
+                                          dmainit.EnhancedDescriptorFormat |
+ 8007136:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+                                          dmainit.TxDMABurstLength |
+ 8007138:	431a      	orrs	r2, r3
+                                          (dmainit.DescriptorSkipLength << 2) |
+ 800713a:	6c3b      	ldr	r3, [r7, #64]	; 0x40
+ 800713c:	009b      	lsls	r3, r3, #2
+                                          dmainit.EnhancedDescriptorFormat |
+ 800713e:	431a      	orrs	r2, r3
+                                          dmainit.DMAArbitration |
+ 8007140:	6c7b      	ldr	r3, [r7, #68]	; 0x44
+                                          (dmainit.DescriptorSkipLength << 2) |
+ 8007142:	431a      	orrs	r2, r3
+    (heth->Instance)->DMABMR = (uint32_t)(dmainit.AddressAlignedBeats | 
+ 8007144:	687b      	ldr	r3, [r7, #4]
+ 8007146:	681b      	ldr	r3, [r3, #0]
+ 8007148:	f442 0200 	orr.w	r2, r2, #8388608	; 0x800000
+ 800714c:	f503 5380 	add.w	r3, r3, #4096	; 0x1000
+ 8007150:	601a      	str	r2, [r3, #0]
+                                          ETH_DMABMR_USP); /* Enable use of separate PBL for Rx and Tx */
+     
+     /* Wait until the write operation will be taken into account:
+        at least four TX_CLK/RX_CLK clock cycles */
+     tmpreg = (heth->Instance)->DMABMR;
+ 8007152:	687b      	ldr	r3, [r7, #4]
+ 8007154:	681b      	ldr	r3, [r3, #0]
+ 8007156:	f503 5380 	add.w	r3, r3, #4096	; 0x1000
+ 800715a:	681b      	ldr	r3, [r3, #0]
+ 800715c:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
+     HAL_Delay(ETH_REG_WRITE_DELAY);
+ 8007160:	2001      	movs	r0, #1
+ 8007162:	f7fd fcfd 	bl	8004b60 <HAL_Delay>
+     (heth->Instance)->DMABMR = tmpreg;
+ 8007166:	687b      	ldr	r3, [r7, #4]
+ 8007168:	681b      	ldr	r3, [r3, #0]
+ 800716a:	f503 5380 	add.w	r3, r3, #4096	; 0x1000
+ 800716e:	f8d7 20bc 	ldr.w	r2, [r7, #188]	; 0xbc
+ 8007172:	601a      	str	r2, [r3, #0]
+
+     if((heth->Init).RxMode == ETH_RXINTERRUPT_MODE)
+ 8007174:	687b      	ldr	r3, [r7, #4]
+ 8007176:	699b      	ldr	r3, [r3, #24]
+ 8007178:	2b01      	cmp	r3, #1
+ 800717a:	d10d      	bne.n	8007198 <ETH_MACDMAConfig+0x370>
+     {
+       /* Enable the Ethernet Rx Interrupt */
+       __HAL_ETH_DMA_ENABLE_IT((heth), ETH_DMA_IT_NIS | ETH_DMA_IT_R);
+ 800717c:	687b      	ldr	r3, [r7, #4]
+ 800717e:	681a      	ldr	r2, [r3, #0]
+ 8007180:	f241 031c 	movw	r3, #4124	; 0x101c
+ 8007184:	4413      	add	r3, r2
+ 8007186:	681b      	ldr	r3, [r3, #0]
+ 8007188:	687a      	ldr	r2, [r7, #4]
+ 800718a:	6811      	ldr	r1, [r2, #0]
+ 800718c:	4a0a      	ldr	r2, [pc, #40]	; (80071b8 <ETH_MACDMAConfig+0x390>)
+ 800718e:	431a      	orrs	r2, r3
+ 8007190:	f241 031c 	movw	r3, #4124	; 0x101c
+ 8007194:	440b      	add	r3, r1
+ 8007196:	601a      	str	r2, [r3, #0]
+     }
+
+     /* Initialize MAC address in ethernet MAC */ 
+     ETH_MACAddressConfig(heth, ETH_MAC_ADDRESS0, heth->Init.MACAddr);
+ 8007198:	687b      	ldr	r3, [r7, #4]
+ 800719a:	695b      	ldr	r3, [r3, #20]
+ 800719c:	461a      	mov	r2, r3
+ 800719e:	2100      	movs	r1, #0
+ 80071a0:	6878      	ldr	r0, [r7, #4]
+ 80071a2:	f000 f80b 	bl	80071bc <ETH_MACAddressConfig>
+}
+ 80071a6:	bf00      	nop
+ 80071a8:	37c0      	adds	r7, #192	; 0xc0
+ 80071aa:	46bd      	mov	sp, r7
+ 80071ac:	bd80      	pop	{r7, pc}
+ 80071ae:	bf00      	nop
+ 80071b0:	ff20810f 	.word	0xff20810f
+ 80071b4:	f8de3f23 	.word	0xf8de3f23
+ 80071b8:	00010040 	.word	0x00010040
+
+080071bc <ETH_MACAddressConfig>:
+  *             @arg ETH_MAC_Address3: MAC Address3
+  * @param  Addr Pointer to MAC address buffer data (6 bytes)
+  * @retval HAL status
+  */
+static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint8_t *Addr)
+{
+ 80071bc:	b480      	push	{r7}
+ 80071be:	b087      	sub	sp, #28
+ 80071c0:	af00      	add	r7, sp, #0
+ 80071c2:	60f8      	str	r0, [r7, #12]
+ 80071c4:	60b9      	str	r1, [r7, #8]
+ 80071c6:	607a      	str	r2, [r7, #4]
+  
+  /* Check the parameters */
+  assert_param(IS_ETH_MAC_ADDRESS0123(MacAddr));
+  
+  /* Calculate the selected MAC address high register */
+  tmpreg = ((uint32_t)Addr[5] << 8) | (uint32_t)Addr[4];
+ 80071c8:	687b      	ldr	r3, [r7, #4]
+ 80071ca:	3305      	adds	r3, #5
+ 80071cc:	781b      	ldrb	r3, [r3, #0]
+ 80071ce:	021b      	lsls	r3, r3, #8
+ 80071d0:	687a      	ldr	r2, [r7, #4]
+ 80071d2:	3204      	adds	r2, #4
+ 80071d4:	7812      	ldrb	r2, [r2, #0]
+ 80071d6:	4313      	orrs	r3, r2
+ 80071d8:	617b      	str	r3, [r7, #20]
+  /* Load the selected MAC address high register */
+  (*(__IO uint32_t *)((uint32_t)(ETH_MAC_ADDR_HBASE + MacAddr))) = tmpreg;
+ 80071da:	68ba      	ldr	r2, [r7, #8]
+ 80071dc:	4b11      	ldr	r3, [pc, #68]	; (8007224 <ETH_MACAddressConfig+0x68>)
+ 80071de:	4413      	add	r3, r2
+ 80071e0:	461a      	mov	r2, r3
+ 80071e2:	697b      	ldr	r3, [r7, #20]
+ 80071e4:	6013      	str	r3, [r2, #0]
+  /* Calculate the selected MAC address low register */
+  tmpreg = ((uint32_t)Addr[3] << 24) | ((uint32_t)Addr[2] << 16) | ((uint32_t)Addr[1] << 8) | Addr[0];
+ 80071e6:	687b      	ldr	r3, [r7, #4]
+ 80071e8:	3303      	adds	r3, #3
+ 80071ea:	781b      	ldrb	r3, [r3, #0]
+ 80071ec:	061a      	lsls	r2, r3, #24
+ 80071ee:	687b      	ldr	r3, [r7, #4]
+ 80071f0:	3302      	adds	r3, #2
+ 80071f2:	781b      	ldrb	r3, [r3, #0]
+ 80071f4:	041b      	lsls	r3, r3, #16
+ 80071f6:	431a      	orrs	r2, r3
+ 80071f8:	687b      	ldr	r3, [r7, #4]
+ 80071fa:	3301      	adds	r3, #1
+ 80071fc:	781b      	ldrb	r3, [r3, #0]
+ 80071fe:	021b      	lsls	r3, r3, #8
+ 8007200:	4313      	orrs	r3, r2
+ 8007202:	687a      	ldr	r2, [r7, #4]
+ 8007204:	7812      	ldrb	r2, [r2, #0]
+ 8007206:	4313      	orrs	r3, r2
+ 8007208:	617b      	str	r3, [r7, #20]
+  
+  /* Load the selected MAC address low register */
+  (*(__IO uint32_t *)((uint32_t)(ETH_MAC_ADDR_LBASE + MacAddr))) = tmpreg;
+ 800720a:	68ba      	ldr	r2, [r7, #8]
+ 800720c:	4b06      	ldr	r3, [pc, #24]	; (8007228 <ETH_MACAddressConfig+0x6c>)
+ 800720e:	4413      	add	r3, r2
+ 8007210:	461a      	mov	r2, r3
+ 8007212:	697b      	ldr	r3, [r7, #20]
+ 8007214:	6013      	str	r3, [r2, #0]
+}
+ 8007216:	bf00      	nop
+ 8007218:	371c      	adds	r7, #28
+ 800721a:	46bd      	mov	sp, r7
+ 800721c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8007220:	4770      	bx	lr
+ 8007222:	bf00      	nop
+ 8007224:	40028040 	.word	0x40028040
+ 8007228:	40028044 	.word	0x40028044
+
+0800722c <ETH_MACTransmissionEnable>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module  
+  * @retval None
+  */
+static void ETH_MACTransmissionEnable(ETH_HandleTypeDef *heth)
+{ 
+ 800722c:	b580      	push	{r7, lr}
+ 800722e:	b084      	sub	sp, #16
+ 8007230:	af00      	add	r7, sp, #0
+ 8007232:	6078      	str	r0, [r7, #4]
+  __IO uint32_t tmpreg = 0;
+ 8007234:	2300      	movs	r3, #0
+ 8007236:	60fb      	str	r3, [r7, #12]
+  
+  /* Enable the MAC transmission */
+  (heth->Instance)->MACCR |= ETH_MACCR_TE;
+ 8007238:	687b      	ldr	r3, [r7, #4]
+ 800723a:	681b      	ldr	r3, [r3, #0]
+ 800723c:	681a      	ldr	r2, [r3, #0]
+ 800723e:	687b      	ldr	r3, [r7, #4]
+ 8007240:	681b      	ldr	r3, [r3, #0]
+ 8007242:	f042 0208 	orr.w	r2, r2, #8
+ 8007246:	601a      	str	r2, [r3, #0]
+  
+  /* Wait until the write operation will be taken into account:
+     at least four TX_CLK/RX_CLK clock cycles */
+  tmpreg = (heth->Instance)->MACCR;
+ 8007248:	687b      	ldr	r3, [r7, #4]
+ 800724a:	681b      	ldr	r3, [r3, #0]
+ 800724c:	681b      	ldr	r3, [r3, #0]
+ 800724e:	60fb      	str	r3, [r7, #12]
+  HAL_Delay(ETH_REG_WRITE_DELAY);
+ 8007250:	2001      	movs	r0, #1
+ 8007252:	f7fd fc85 	bl	8004b60 <HAL_Delay>
+  (heth->Instance)->MACCR = tmpreg;
+ 8007256:	687b      	ldr	r3, [r7, #4]
+ 8007258:	681b      	ldr	r3, [r3, #0]
+ 800725a:	68fa      	ldr	r2, [r7, #12]
+ 800725c:	601a      	str	r2, [r3, #0]
+}
+ 800725e:	bf00      	nop
+ 8007260:	3710      	adds	r7, #16
+ 8007262:	46bd      	mov	sp, r7
+ 8007264:	bd80      	pop	{r7, pc}
+
+08007266 <ETH_MACTransmissionDisable>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module  
+  * @retval None
+  */
+static void ETH_MACTransmissionDisable(ETH_HandleTypeDef *heth)
+{ 
+ 8007266:	b580      	push	{r7, lr}
+ 8007268:	b084      	sub	sp, #16
+ 800726a:	af00      	add	r7, sp, #0
+ 800726c:	6078      	str	r0, [r7, #4]
+  __IO uint32_t tmpreg = 0;
+ 800726e:	2300      	movs	r3, #0
+ 8007270:	60fb      	str	r3, [r7, #12]
+  
+  /* Disable the MAC transmission */
+  (heth->Instance)->MACCR &= ~ETH_MACCR_TE;
+ 8007272:	687b      	ldr	r3, [r7, #4]
+ 8007274:	681b      	ldr	r3, [r3, #0]
+ 8007276:	681a      	ldr	r2, [r3, #0]
+ 8007278:	687b      	ldr	r3, [r7, #4]
+ 800727a:	681b      	ldr	r3, [r3, #0]
+ 800727c:	f022 0208 	bic.w	r2, r2, #8
+ 8007280:	601a      	str	r2, [r3, #0]
+  
+  /* Wait until the write operation will be taken into account:
+     at least four TX_CLK/RX_CLK clock cycles */
+  tmpreg = (heth->Instance)->MACCR;
+ 8007282:	687b      	ldr	r3, [r7, #4]
+ 8007284:	681b      	ldr	r3, [r3, #0]
+ 8007286:	681b      	ldr	r3, [r3, #0]
+ 8007288:	60fb      	str	r3, [r7, #12]
+  HAL_Delay(ETH_REG_WRITE_DELAY);
+ 800728a:	2001      	movs	r0, #1
+ 800728c:	f7fd fc68 	bl	8004b60 <HAL_Delay>
+  (heth->Instance)->MACCR = tmpreg;
+ 8007290:	687b      	ldr	r3, [r7, #4]
+ 8007292:	681b      	ldr	r3, [r3, #0]
+ 8007294:	68fa      	ldr	r2, [r7, #12]
+ 8007296:	601a      	str	r2, [r3, #0]
+}
+ 8007298:	bf00      	nop
+ 800729a:	3710      	adds	r7, #16
+ 800729c:	46bd      	mov	sp, r7
+ 800729e:	bd80      	pop	{r7, pc}
+
+080072a0 <ETH_MACReceptionEnable>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module   
+  * @retval None
+  */
+static void ETH_MACReceptionEnable(ETH_HandleTypeDef *heth)
+{ 
+ 80072a0:	b580      	push	{r7, lr}
+ 80072a2:	b084      	sub	sp, #16
+ 80072a4:	af00      	add	r7, sp, #0
+ 80072a6:	6078      	str	r0, [r7, #4]
+  __IO uint32_t tmpreg = 0;
+ 80072a8:	2300      	movs	r3, #0
+ 80072aa:	60fb      	str	r3, [r7, #12]
+  
+  /* Enable the MAC reception */
+  (heth->Instance)->MACCR |= ETH_MACCR_RE;
+ 80072ac:	687b      	ldr	r3, [r7, #4]
+ 80072ae:	681b      	ldr	r3, [r3, #0]
+ 80072b0:	681a      	ldr	r2, [r3, #0]
+ 80072b2:	687b      	ldr	r3, [r7, #4]
+ 80072b4:	681b      	ldr	r3, [r3, #0]
+ 80072b6:	f042 0204 	orr.w	r2, r2, #4
+ 80072ba:	601a      	str	r2, [r3, #0]
+  
+  /* Wait until the write operation will be taken into account:
+     at least four TX_CLK/RX_CLK clock cycles */
+  tmpreg = (heth->Instance)->MACCR;
+ 80072bc:	687b      	ldr	r3, [r7, #4]
+ 80072be:	681b      	ldr	r3, [r3, #0]
+ 80072c0:	681b      	ldr	r3, [r3, #0]
+ 80072c2:	60fb      	str	r3, [r7, #12]
+  HAL_Delay(ETH_REG_WRITE_DELAY);
+ 80072c4:	2001      	movs	r0, #1
+ 80072c6:	f7fd fc4b 	bl	8004b60 <HAL_Delay>
+  (heth->Instance)->MACCR = tmpreg;
+ 80072ca:	687b      	ldr	r3, [r7, #4]
+ 80072cc:	681b      	ldr	r3, [r3, #0]
+ 80072ce:	68fa      	ldr	r2, [r7, #12]
+ 80072d0:	601a      	str	r2, [r3, #0]
+}
+ 80072d2:	bf00      	nop
+ 80072d4:	3710      	adds	r7, #16
+ 80072d6:	46bd      	mov	sp, r7
+ 80072d8:	bd80      	pop	{r7, pc}
+
+080072da <ETH_MACReceptionDisable>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module   
+  * @retval None
+  */
+static void ETH_MACReceptionDisable(ETH_HandleTypeDef *heth)
+{ 
+ 80072da:	b580      	push	{r7, lr}
+ 80072dc:	b084      	sub	sp, #16
+ 80072de:	af00      	add	r7, sp, #0
+ 80072e0:	6078      	str	r0, [r7, #4]
+  __IO uint32_t tmpreg = 0;
+ 80072e2:	2300      	movs	r3, #0
+ 80072e4:	60fb      	str	r3, [r7, #12]
+  
+  /* Disable the MAC reception */
+  (heth->Instance)->MACCR &= ~ETH_MACCR_RE; 
+ 80072e6:	687b      	ldr	r3, [r7, #4]
+ 80072e8:	681b      	ldr	r3, [r3, #0]
+ 80072ea:	681a      	ldr	r2, [r3, #0]
+ 80072ec:	687b      	ldr	r3, [r7, #4]
+ 80072ee:	681b      	ldr	r3, [r3, #0]
+ 80072f0:	f022 0204 	bic.w	r2, r2, #4
+ 80072f4:	601a      	str	r2, [r3, #0]
+  
+  /* Wait until the write operation will be taken into account:
+     at least four TX_CLK/RX_CLK clock cycles */
+  tmpreg = (heth->Instance)->MACCR;
+ 80072f6:	687b      	ldr	r3, [r7, #4]
+ 80072f8:	681b      	ldr	r3, [r3, #0]
+ 80072fa:	681b      	ldr	r3, [r3, #0]
+ 80072fc:	60fb      	str	r3, [r7, #12]
+  HAL_Delay(ETH_REG_WRITE_DELAY);
+ 80072fe:	2001      	movs	r0, #1
+ 8007300:	f7fd fc2e 	bl	8004b60 <HAL_Delay>
+  (heth->Instance)->MACCR = tmpreg;
+ 8007304:	687b      	ldr	r3, [r7, #4]
+ 8007306:	681b      	ldr	r3, [r3, #0]
+ 8007308:	68fa      	ldr	r2, [r7, #12]
+ 800730a:	601a      	str	r2, [r3, #0]
+}
+ 800730c:	bf00      	nop
+ 800730e:	3710      	adds	r7, #16
+ 8007310:	46bd      	mov	sp, r7
+ 8007312:	bd80      	pop	{r7, pc}
+
+08007314 <ETH_DMATransmissionEnable>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module   
+  * @retval None
+  */
+static void ETH_DMATransmissionEnable(ETH_HandleTypeDef *heth)
+{
+ 8007314:	b480      	push	{r7}
+ 8007316:	b083      	sub	sp, #12
+ 8007318:	af00      	add	r7, sp, #0
+ 800731a:	6078      	str	r0, [r7, #4]
+  /* Enable the DMA transmission */
+  (heth->Instance)->DMAOMR |= ETH_DMAOMR_ST;  
+ 800731c:	687b      	ldr	r3, [r7, #4]
+ 800731e:	681a      	ldr	r2, [r3, #0]
+ 8007320:	f241 0318 	movw	r3, #4120	; 0x1018
+ 8007324:	4413      	add	r3, r2
+ 8007326:	681b      	ldr	r3, [r3, #0]
+ 8007328:	687a      	ldr	r2, [r7, #4]
+ 800732a:	6811      	ldr	r1, [r2, #0]
+ 800732c:	f443 5200 	orr.w	r2, r3, #8192	; 0x2000
+ 8007330:	f241 0318 	movw	r3, #4120	; 0x1018
+ 8007334:	440b      	add	r3, r1
+ 8007336:	601a      	str	r2, [r3, #0]
+}
+ 8007338:	bf00      	nop
+ 800733a:	370c      	adds	r7, #12
+ 800733c:	46bd      	mov	sp, r7
+ 800733e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8007342:	4770      	bx	lr
+
+08007344 <ETH_DMATransmissionDisable>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module   
+  * @retval None
+  */
+static void ETH_DMATransmissionDisable(ETH_HandleTypeDef *heth)
+{ 
+ 8007344:	b480      	push	{r7}
+ 8007346:	b083      	sub	sp, #12
+ 8007348:	af00      	add	r7, sp, #0
+ 800734a:	6078      	str	r0, [r7, #4]
+  /* Disable the DMA transmission */
+  (heth->Instance)->DMAOMR &= ~ETH_DMAOMR_ST;
+ 800734c:	687b      	ldr	r3, [r7, #4]
+ 800734e:	681a      	ldr	r2, [r3, #0]
+ 8007350:	f241 0318 	movw	r3, #4120	; 0x1018
+ 8007354:	4413      	add	r3, r2
+ 8007356:	681b      	ldr	r3, [r3, #0]
+ 8007358:	687a      	ldr	r2, [r7, #4]
+ 800735a:	6811      	ldr	r1, [r2, #0]
+ 800735c:	f423 5200 	bic.w	r2, r3, #8192	; 0x2000
+ 8007360:	f241 0318 	movw	r3, #4120	; 0x1018
+ 8007364:	440b      	add	r3, r1
+ 8007366:	601a      	str	r2, [r3, #0]
+}
+ 8007368:	bf00      	nop
+ 800736a:	370c      	adds	r7, #12
+ 800736c:	46bd      	mov	sp, r7
+ 800736e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8007372:	4770      	bx	lr
+
+08007374 <ETH_DMAReceptionEnable>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module 
+  * @retval None
+  */
+static void ETH_DMAReceptionEnable(ETH_HandleTypeDef *heth)
+{  
+ 8007374:	b480      	push	{r7}
+ 8007376:	b083      	sub	sp, #12
+ 8007378:	af00      	add	r7, sp, #0
+ 800737a:	6078      	str	r0, [r7, #4]
+  /* Enable the DMA reception */
+  (heth->Instance)->DMAOMR |= ETH_DMAOMR_SR;  
+ 800737c:	687b      	ldr	r3, [r7, #4]
+ 800737e:	681a      	ldr	r2, [r3, #0]
+ 8007380:	f241 0318 	movw	r3, #4120	; 0x1018
+ 8007384:	4413      	add	r3, r2
+ 8007386:	681b      	ldr	r3, [r3, #0]
+ 8007388:	687a      	ldr	r2, [r7, #4]
+ 800738a:	6811      	ldr	r1, [r2, #0]
+ 800738c:	f043 0202 	orr.w	r2, r3, #2
+ 8007390:	f241 0318 	movw	r3, #4120	; 0x1018
+ 8007394:	440b      	add	r3, r1
+ 8007396:	601a      	str	r2, [r3, #0]
+}
+ 8007398:	bf00      	nop
+ 800739a:	370c      	adds	r7, #12
+ 800739c:	46bd      	mov	sp, r7
+ 800739e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80073a2:	4770      	bx	lr
+
+080073a4 <ETH_DMAReceptionDisable>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module 
+  * @retval None
+  */
+static void ETH_DMAReceptionDisable(ETH_HandleTypeDef *heth)
+{ 
+ 80073a4:	b480      	push	{r7}
+ 80073a6:	b083      	sub	sp, #12
+ 80073a8:	af00      	add	r7, sp, #0
+ 80073aa:	6078      	str	r0, [r7, #4]
+  /* Disable the DMA reception */
+  (heth->Instance)->DMAOMR &= ~ETH_DMAOMR_SR;
+ 80073ac:	687b      	ldr	r3, [r7, #4]
+ 80073ae:	681a      	ldr	r2, [r3, #0]
+ 80073b0:	f241 0318 	movw	r3, #4120	; 0x1018
+ 80073b4:	4413      	add	r3, r2
+ 80073b6:	681b      	ldr	r3, [r3, #0]
+ 80073b8:	687a      	ldr	r2, [r7, #4]
+ 80073ba:	6811      	ldr	r1, [r2, #0]
+ 80073bc:	f023 0202 	bic.w	r2, r3, #2
+ 80073c0:	f241 0318 	movw	r3, #4120	; 0x1018
+ 80073c4:	440b      	add	r3, r1
+ 80073c6:	601a      	str	r2, [r3, #0]
+}
+ 80073c8:	bf00      	nop
+ 80073ca:	370c      	adds	r7, #12
+ 80073cc:	46bd      	mov	sp, r7
+ 80073ce:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80073d2:	4770      	bx	lr
+
+080073d4 <ETH_FlushTransmitFIFO>:
+  * @param  heth pointer to a ETH_HandleTypeDef structure that contains
+  *         the configuration information for ETHERNET module
+  * @retval None
+  */
+static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth)
+{
+ 80073d4:	b580      	push	{r7, lr}
+ 80073d6:	b084      	sub	sp, #16
+ 80073d8:	af00      	add	r7, sp, #0
+ 80073da:	6078      	str	r0, [r7, #4]
+  __IO uint32_t tmpreg = 0;
+ 80073dc:	2300      	movs	r3, #0
+ 80073de:	60fb      	str	r3, [r7, #12]
+  
+  /* Set the Flush Transmit FIFO bit */
+  (heth->Instance)->DMAOMR |= ETH_DMAOMR_FTF;
+ 80073e0:	687b      	ldr	r3, [r7, #4]
+ 80073e2:	681a      	ldr	r2, [r3, #0]
+ 80073e4:	f241 0318 	movw	r3, #4120	; 0x1018
+ 80073e8:	4413      	add	r3, r2
+ 80073ea:	681b      	ldr	r3, [r3, #0]
+ 80073ec:	687a      	ldr	r2, [r7, #4]
+ 80073ee:	6811      	ldr	r1, [r2, #0]
+ 80073f0:	f443 1280 	orr.w	r2, r3, #1048576	; 0x100000
+ 80073f4:	f241 0318 	movw	r3, #4120	; 0x1018
+ 80073f8:	440b      	add	r3, r1
+ 80073fa:	601a      	str	r2, [r3, #0]
+  
+  /* Wait until the write operation will be taken into account:
+     at least four TX_CLK/RX_CLK clock cycles */
+  tmpreg = (heth->Instance)->DMAOMR;
+ 80073fc:	687b      	ldr	r3, [r7, #4]
+ 80073fe:	681a      	ldr	r2, [r3, #0]
+ 8007400:	f241 0318 	movw	r3, #4120	; 0x1018
+ 8007404:	4413      	add	r3, r2
+ 8007406:	681b      	ldr	r3, [r3, #0]
+ 8007408:	60fb      	str	r3, [r7, #12]
+  HAL_Delay(ETH_REG_WRITE_DELAY);
+ 800740a:	2001      	movs	r0, #1
+ 800740c:	f7fd fba8 	bl	8004b60 <HAL_Delay>
+  (heth->Instance)->DMAOMR = tmpreg;
+ 8007410:	687b      	ldr	r3, [r7, #4]
+ 8007412:	6819      	ldr	r1, [r3, #0]
+ 8007414:	68fa      	ldr	r2, [r7, #12]
+ 8007416:	f241 0318 	movw	r3, #4120	; 0x1018
+ 800741a:	440b      	add	r3, r1
+ 800741c:	601a      	str	r2, [r3, #0]
+}
+ 800741e:	bf00      	nop
+ 8007420:	3710      	adds	r7, #16
+ 8007422:	46bd      	mov	sp, r7
+ 8007424:	bd80      	pop	{r7, pc}
+	...
+
+08007428 <HAL_GPIO_Init>:
+  * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
+  *         the configuration information for the specified GPIO peripheral.
+  * @retval None
+  */
+void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
+{
+ 8007428:	b480      	push	{r7}
+ 800742a:	b089      	sub	sp, #36	; 0x24
+ 800742c:	af00      	add	r7, sp, #0
+ 800742e:	6078      	str	r0, [r7, #4]
+ 8007430:	6039      	str	r1, [r7, #0]
+  uint32_t position = 0x00;
+ 8007432:	2300      	movs	r3, #0
+ 8007434:	61fb      	str	r3, [r7, #28]
+  uint32_t ioposition = 0x00;
+ 8007436:	2300      	movs	r3, #0
+ 8007438:	617b      	str	r3, [r7, #20]
+  uint32_t iocurrent = 0x00;
+ 800743a:	2300      	movs	r3, #0
+ 800743c:	613b      	str	r3, [r7, #16]
+  uint32_t temp = 0x00;
+ 800743e:	2300      	movs	r3, #0
+ 8007440:	61bb      	str	r3, [r7, #24]
+  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
+  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
+  assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
+
+  /* Configure the port pins */
+  for(position = 0; position < GPIO_NUMBER; position++)
+ 8007442:	2300      	movs	r3, #0
+ 8007444:	61fb      	str	r3, [r7, #28]
+ 8007446:	e175      	b.n	8007734 <HAL_GPIO_Init+0x30c>
+  {
+    /* Get the IO position */
+    ioposition = ((uint32_t)0x01) << position;
+ 8007448:	2201      	movs	r2, #1
+ 800744a:	69fb      	ldr	r3, [r7, #28]
+ 800744c:	fa02 f303 	lsl.w	r3, r2, r3
+ 8007450:	617b      	str	r3, [r7, #20]
+    /* Get the current IO position */
+    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
+ 8007452:	683b      	ldr	r3, [r7, #0]
+ 8007454:	681b      	ldr	r3, [r3, #0]
+ 8007456:	697a      	ldr	r2, [r7, #20]
+ 8007458:	4013      	ands	r3, r2
+ 800745a:	613b      	str	r3, [r7, #16]
+
+    if(iocurrent == ioposition)
+ 800745c:	693a      	ldr	r2, [r7, #16]
+ 800745e:	697b      	ldr	r3, [r7, #20]
+ 8007460:	429a      	cmp	r2, r3
+ 8007462:	f040 8164 	bne.w	800772e <HAL_GPIO_Init+0x306>
+    {
+      /*--------------------- GPIO Mode Configuration ------------------------*/
+      /* In case of Output or Alternate function mode selection */
+      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
+ 8007466:	683b      	ldr	r3, [r7, #0]
+ 8007468:	685b      	ldr	r3, [r3, #4]
+ 800746a:	2b01      	cmp	r3, #1
+ 800746c:	d00b      	beq.n	8007486 <HAL_GPIO_Init+0x5e>
+ 800746e:	683b      	ldr	r3, [r7, #0]
+ 8007470:	685b      	ldr	r3, [r3, #4]
+ 8007472:	2b02      	cmp	r3, #2
+ 8007474:	d007      	beq.n	8007486 <HAL_GPIO_Init+0x5e>
+         (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
+ 8007476:	683b      	ldr	r3, [r7, #0]
+ 8007478:	685b      	ldr	r3, [r3, #4]
+      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
+ 800747a:	2b11      	cmp	r3, #17
+ 800747c:	d003      	beq.n	8007486 <HAL_GPIO_Init+0x5e>
+         (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
+ 800747e:	683b      	ldr	r3, [r7, #0]
+ 8007480:	685b      	ldr	r3, [r3, #4]
+ 8007482:	2b12      	cmp	r3, #18
+ 8007484:	d130      	bne.n	80074e8 <HAL_GPIO_Init+0xc0>
+      {
+        /* Check the Speed parameter */
+        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
+        /* Configure the IO Speed */
+        temp = GPIOx->OSPEEDR; 
+ 8007486:	687b      	ldr	r3, [r7, #4]
+ 8007488:	689b      	ldr	r3, [r3, #8]
+ 800748a:	61bb      	str	r3, [r7, #24]
+        temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
+ 800748c:	69fb      	ldr	r3, [r7, #28]
+ 800748e:	005b      	lsls	r3, r3, #1
+ 8007490:	2203      	movs	r2, #3
+ 8007492:	fa02 f303 	lsl.w	r3, r2, r3
+ 8007496:	43db      	mvns	r3, r3
+ 8007498:	69ba      	ldr	r2, [r7, #24]
+ 800749a:	4013      	ands	r3, r2
+ 800749c:	61bb      	str	r3, [r7, #24]
+        temp |= (GPIO_Init->Speed << (position * 2));
+ 800749e:	683b      	ldr	r3, [r7, #0]
+ 80074a0:	68da      	ldr	r2, [r3, #12]
+ 80074a2:	69fb      	ldr	r3, [r7, #28]
+ 80074a4:	005b      	lsls	r3, r3, #1
+ 80074a6:	fa02 f303 	lsl.w	r3, r2, r3
+ 80074aa:	69ba      	ldr	r2, [r7, #24]
+ 80074ac:	4313      	orrs	r3, r2
+ 80074ae:	61bb      	str	r3, [r7, #24]
+        GPIOx->OSPEEDR = temp;
+ 80074b0:	687b      	ldr	r3, [r7, #4]
+ 80074b2:	69ba      	ldr	r2, [r7, #24]
+ 80074b4:	609a      	str	r2, [r3, #8]
+
+        /* Configure the IO Output Type */
+        temp = GPIOx->OTYPER;
+ 80074b6:	687b      	ldr	r3, [r7, #4]
+ 80074b8:	685b      	ldr	r3, [r3, #4]
+ 80074ba:	61bb      	str	r3, [r7, #24]
+        temp &= ~(GPIO_OTYPER_OT_0 << position) ;
+ 80074bc:	2201      	movs	r2, #1
+ 80074be:	69fb      	ldr	r3, [r7, #28]
+ 80074c0:	fa02 f303 	lsl.w	r3, r2, r3
+ 80074c4:	43db      	mvns	r3, r3
+ 80074c6:	69ba      	ldr	r2, [r7, #24]
+ 80074c8:	4013      	ands	r3, r2
+ 80074ca:	61bb      	str	r3, [r7, #24]
+        temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
+ 80074cc:	683b      	ldr	r3, [r7, #0]
+ 80074ce:	685b      	ldr	r3, [r3, #4]
+ 80074d0:	091b      	lsrs	r3, r3, #4
+ 80074d2:	f003 0201 	and.w	r2, r3, #1
+ 80074d6:	69fb      	ldr	r3, [r7, #28]
+ 80074d8:	fa02 f303 	lsl.w	r3, r2, r3
+ 80074dc:	69ba      	ldr	r2, [r7, #24]
+ 80074de:	4313      	orrs	r3, r2
+ 80074e0:	61bb      	str	r3, [r7, #24]
+        GPIOx->OTYPER = temp;
+ 80074e2:	687b      	ldr	r3, [r7, #4]
+ 80074e4:	69ba      	ldr	r2, [r7, #24]
+ 80074e6:	605a      	str	r2, [r3, #4]
+      }
+
+      /* Activate the Pull-up or Pull down resistor for the current IO */
+      temp = GPIOx->PUPDR;
+ 80074e8:	687b      	ldr	r3, [r7, #4]
+ 80074ea:	68db      	ldr	r3, [r3, #12]
+ 80074ec:	61bb      	str	r3, [r7, #24]
+      temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
+ 80074ee:	69fb      	ldr	r3, [r7, #28]
+ 80074f0:	005b      	lsls	r3, r3, #1
+ 80074f2:	2203      	movs	r2, #3
+ 80074f4:	fa02 f303 	lsl.w	r3, r2, r3
+ 80074f8:	43db      	mvns	r3, r3
+ 80074fa:	69ba      	ldr	r2, [r7, #24]
+ 80074fc:	4013      	ands	r3, r2
+ 80074fe:	61bb      	str	r3, [r7, #24]
+      temp |= ((GPIO_Init->Pull) << (position * 2));
+ 8007500:	683b      	ldr	r3, [r7, #0]
+ 8007502:	689a      	ldr	r2, [r3, #8]
+ 8007504:	69fb      	ldr	r3, [r7, #28]
+ 8007506:	005b      	lsls	r3, r3, #1
+ 8007508:	fa02 f303 	lsl.w	r3, r2, r3
+ 800750c:	69ba      	ldr	r2, [r7, #24]
+ 800750e:	4313      	orrs	r3, r2
+ 8007510:	61bb      	str	r3, [r7, #24]
+      GPIOx->PUPDR = temp;
+ 8007512:	687b      	ldr	r3, [r7, #4]
+ 8007514:	69ba      	ldr	r2, [r7, #24]
+ 8007516:	60da      	str	r2, [r3, #12]
+
+      /* In case of Alternate function mode selection */
+      if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
+ 8007518:	683b      	ldr	r3, [r7, #0]
+ 800751a:	685b      	ldr	r3, [r3, #4]
+ 800751c:	2b02      	cmp	r3, #2
+ 800751e:	d003      	beq.n	8007528 <HAL_GPIO_Init+0x100>
+ 8007520:	683b      	ldr	r3, [r7, #0]
+ 8007522:	685b      	ldr	r3, [r3, #4]
+ 8007524:	2b12      	cmp	r3, #18
+ 8007526:	d123      	bne.n	8007570 <HAL_GPIO_Init+0x148>
+      {
+        /* Check the Alternate function parameter */
+        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
+
+        /* Configure Alternate function mapped with the current IO */
+        temp = GPIOx->AFR[position >> 3];
+ 8007528:	69fb      	ldr	r3, [r7, #28]
+ 800752a:	08da      	lsrs	r2, r3, #3
+ 800752c:	687b      	ldr	r3, [r7, #4]
+ 800752e:	3208      	adds	r2, #8
+ 8007530:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
+ 8007534:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
+ 8007536:	69fb      	ldr	r3, [r7, #28]
+ 8007538:	f003 0307 	and.w	r3, r3, #7
+ 800753c:	009b      	lsls	r3, r3, #2
+ 800753e:	220f      	movs	r2, #15
+ 8007540:	fa02 f303 	lsl.w	r3, r2, r3
+ 8007544:	43db      	mvns	r3, r3
+ 8007546:	69ba      	ldr	r2, [r7, #24]
+ 8007548:	4013      	ands	r3, r2
+ 800754a:	61bb      	str	r3, [r7, #24]
+        temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4));
+ 800754c:	683b      	ldr	r3, [r7, #0]
+ 800754e:	691a      	ldr	r2, [r3, #16]
+ 8007550:	69fb      	ldr	r3, [r7, #28]
+ 8007552:	f003 0307 	and.w	r3, r3, #7
+ 8007556:	009b      	lsls	r3, r3, #2
+ 8007558:	fa02 f303 	lsl.w	r3, r2, r3
+ 800755c:	69ba      	ldr	r2, [r7, #24]
+ 800755e:	4313      	orrs	r3, r2
+ 8007560:	61bb      	str	r3, [r7, #24]
+        GPIOx->AFR[position >> 3] = temp;
+ 8007562:	69fb      	ldr	r3, [r7, #28]
+ 8007564:	08da      	lsrs	r2, r3, #3
+ 8007566:	687b      	ldr	r3, [r7, #4]
+ 8007568:	3208      	adds	r2, #8
+ 800756a:	69b9      	ldr	r1, [r7, #24]
+ 800756c:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
+      }
+      
+      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
+      temp = GPIOx->MODER;
+ 8007570:	687b      	ldr	r3, [r7, #4]
+ 8007572:	681b      	ldr	r3, [r3, #0]
+ 8007574:	61bb      	str	r3, [r7, #24]
+      temp &= ~(GPIO_MODER_MODER0 << (position * 2));
+ 8007576:	69fb      	ldr	r3, [r7, #28]
+ 8007578:	005b      	lsls	r3, r3, #1
+ 800757a:	2203      	movs	r2, #3
+ 800757c:	fa02 f303 	lsl.w	r3, r2, r3
+ 8007580:	43db      	mvns	r3, r3
+ 8007582:	69ba      	ldr	r2, [r7, #24]
+ 8007584:	4013      	ands	r3, r2
+ 8007586:	61bb      	str	r3, [r7, #24]
+      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2));
+ 8007588:	683b      	ldr	r3, [r7, #0]
+ 800758a:	685b      	ldr	r3, [r3, #4]
+ 800758c:	f003 0203 	and.w	r2, r3, #3
+ 8007590:	69fb      	ldr	r3, [r7, #28]
+ 8007592:	005b      	lsls	r3, r3, #1
+ 8007594:	fa02 f303 	lsl.w	r3, r2, r3
+ 8007598:	69ba      	ldr	r2, [r7, #24]
+ 800759a:	4313      	orrs	r3, r2
+ 800759c:	61bb      	str	r3, [r7, #24]
+      GPIOx->MODER = temp;
+ 800759e:	687b      	ldr	r3, [r7, #4]
+ 80075a0:	69ba      	ldr	r2, [r7, #24]
+ 80075a2:	601a      	str	r2, [r3, #0]
+
+      /*--------------------- EXTI Mode Configuration ------------------------*/
+      /* Configure the External Interrupt or event for the current IO */
+      if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
+ 80075a4:	683b      	ldr	r3, [r7, #0]
+ 80075a6:	685b      	ldr	r3, [r3, #4]
+ 80075a8:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
+ 80075ac:	2b00      	cmp	r3, #0
+ 80075ae:	f000 80be 	beq.w	800772e <HAL_GPIO_Init+0x306>
+      {
+        /* Enable SYSCFG Clock */
+        __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 80075b2:	4b65      	ldr	r3, [pc, #404]	; (8007748 <HAL_GPIO_Init+0x320>)
+ 80075b4:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 80075b6:	4a64      	ldr	r2, [pc, #400]	; (8007748 <HAL_GPIO_Init+0x320>)
+ 80075b8:	f443 4380 	orr.w	r3, r3, #16384	; 0x4000
+ 80075bc:	6453      	str	r3, [r2, #68]	; 0x44
+ 80075be:	4b62      	ldr	r3, [pc, #392]	; (8007748 <HAL_GPIO_Init+0x320>)
+ 80075c0:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 80075c2:	f403 4380 	and.w	r3, r3, #16384	; 0x4000
+ 80075c6:	60fb      	str	r3, [r7, #12]
+ 80075c8:	68fb      	ldr	r3, [r7, #12]
+
+        temp = SYSCFG->EXTICR[position >> 2];
+ 80075ca:	4a60      	ldr	r2, [pc, #384]	; (800774c <HAL_GPIO_Init+0x324>)
+ 80075cc:	69fb      	ldr	r3, [r7, #28]
+ 80075ce:	089b      	lsrs	r3, r3, #2
+ 80075d0:	3302      	adds	r3, #2
+ 80075d2:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 80075d6:	61bb      	str	r3, [r7, #24]
+        temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03)));
+ 80075d8:	69fb      	ldr	r3, [r7, #28]
+ 80075da:	f003 0303 	and.w	r3, r3, #3
+ 80075de:	009b      	lsls	r3, r3, #2
+ 80075e0:	220f      	movs	r2, #15
+ 80075e2:	fa02 f303 	lsl.w	r3, r2, r3
+ 80075e6:	43db      	mvns	r3, r3
+ 80075e8:	69ba      	ldr	r2, [r7, #24]
+ 80075ea:	4013      	ands	r3, r2
+ 80075ec:	61bb      	str	r3, [r7, #24]
+        temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
+ 80075ee:	687b      	ldr	r3, [r7, #4]
+ 80075f0:	4a57      	ldr	r2, [pc, #348]	; (8007750 <HAL_GPIO_Init+0x328>)
+ 80075f2:	4293      	cmp	r3, r2
+ 80075f4:	d037      	beq.n	8007666 <HAL_GPIO_Init+0x23e>
+ 80075f6:	687b      	ldr	r3, [r7, #4]
+ 80075f8:	4a56      	ldr	r2, [pc, #344]	; (8007754 <HAL_GPIO_Init+0x32c>)
+ 80075fa:	4293      	cmp	r3, r2
+ 80075fc:	d031      	beq.n	8007662 <HAL_GPIO_Init+0x23a>
+ 80075fe:	687b      	ldr	r3, [r7, #4]
+ 8007600:	4a55      	ldr	r2, [pc, #340]	; (8007758 <HAL_GPIO_Init+0x330>)
+ 8007602:	4293      	cmp	r3, r2
+ 8007604:	d02b      	beq.n	800765e <HAL_GPIO_Init+0x236>
+ 8007606:	687b      	ldr	r3, [r7, #4]
+ 8007608:	4a54      	ldr	r2, [pc, #336]	; (800775c <HAL_GPIO_Init+0x334>)
+ 800760a:	4293      	cmp	r3, r2
+ 800760c:	d025      	beq.n	800765a <HAL_GPIO_Init+0x232>
+ 800760e:	687b      	ldr	r3, [r7, #4]
+ 8007610:	4a53      	ldr	r2, [pc, #332]	; (8007760 <HAL_GPIO_Init+0x338>)
+ 8007612:	4293      	cmp	r3, r2
+ 8007614:	d01f      	beq.n	8007656 <HAL_GPIO_Init+0x22e>
+ 8007616:	687b      	ldr	r3, [r7, #4]
+ 8007618:	4a52      	ldr	r2, [pc, #328]	; (8007764 <HAL_GPIO_Init+0x33c>)
+ 800761a:	4293      	cmp	r3, r2
+ 800761c:	d019      	beq.n	8007652 <HAL_GPIO_Init+0x22a>
+ 800761e:	687b      	ldr	r3, [r7, #4]
+ 8007620:	4a51      	ldr	r2, [pc, #324]	; (8007768 <HAL_GPIO_Init+0x340>)
+ 8007622:	4293      	cmp	r3, r2
+ 8007624:	d013      	beq.n	800764e <HAL_GPIO_Init+0x226>
+ 8007626:	687b      	ldr	r3, [r7, #4]
+ 8007628:	4a50      	ldr	r2, [pc, #320]	; (800776c <HAL_GPIO_Init+0x344>)
+ 800762a:	4293      	cmp	r3, r2
+ 800762c:	d00d      	beq.n	800764a <HAL_GPIO_Init+0x222>
+ 800762e:	687b      	ldr	r3, [r7, #4]
+ 8007630:	4a4f      	ldr	r2, [pc, #316]	; (8007770 <HAL_GPIO_Init+0x348>)
+ 8007632:	4293      	cmp	r3, r2
+ 8007634:	d007      	beq.n	8007646 <HAL_GPIO_Init+0x21e>
+ 8007636:	687b      	ldr	r3, [r7, #4]
+ 8007638:	4a4e      	ldr	r2, [pc, #312]	; (8007774 <HAL_GPIO_Init+0x34c>)
+ 800763a:	4293      	cmp	r3, r2
+ 800763c:	d101      	bne.n	8007642 <HAL_GPIO_Init+0x21a>
+ 800763e:	2309      	movs	r3, #9
+ 8007640:	e012      	b.n	8007668 <HAL_GPIO_Init+0x240>
+ 8007642:	230a      	movs	r3, #10
+ 8007644:	e010      	b.n	8007668 <HAL_GPIO_Init+0x240>
+ 8007646:	2308      	movs	r3, #8
+ 8007648:	e00e      	b.n	8007668 <HAL_GPIO_Init+0x240>
+ 800764a:	2307      	movs	r3, #7
+ 800764c:	e00c      	b.n	8007668 <HAL_GPIO_Init+0x240>
+ 800764e:	2306      	movs	r3, #6
+ 8007650:	e00a      	b.n	8007668 <HAL_GPIO_Init+0x240>
+ 8007652:	2305      	movs	r3, #5
+ 8007654:	e008      	b.n	8007668 <HAL_GPIO_Init+0x240>
+ 8007656:	2304      	movs	r3, #4
+ 8007658:	e006      	b.n	8007668 <HAL_GPIO_Init+0x240>
+ 800765a:	2303      	movs	r3, #3
+ 800765c:	e004      	b.n	8007668 <HAL_GPIO_Init+0x240>
+ 800765e:	2302      	movs	r3, #2
+ 8007660:	e002      	b.n	8007668 <HAL_GPIO_Init+0x240>
+ 8007662:	2301      	movs	r3, #1
+ 8007664:	e000      	b.n	8007668 <HAL_GPIO_Init+0x240>
+ 8007666:	2300      	movs	r3, #0
+ 8007668:	69fa      	ldr	r2, [r7, #28]
+ 800766a:	f002 0203 	and.w	r2, r2, #3
+ 800766e:	0092      	lsls	r2, r2, #2
+ 8007670:	4093      	lsls	r3, r2
+ 8007672:	69ba      	ldr	r2, [r7, #24]
+ 8007674:	4313      	orrs	r3, r2
+ 8007676:	61bb      	str	r3, [r7, #24]
+        SYSCFG->EXTICR[position >> 2] = temp;
+ 8007678:	4934      	ldr	r1, [pc, #208]	; (800774c <HAL_GPIO_Init+0x324>)
+ 800767a:	69fb      	ldr	r3, [r7, #28]
+ 800767c:	089b      	lsrs	r3, r3, #2
+ 800767e:	3302      	adds	r3, #2
+ 8007680:	69ba      	ldr	r2, [r7, #24]
+ 8007682:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
+
+        /* Clear EXTI line configuration */
+        temp = EXTI->IMR;
+ 8007686:	4b3c      	ldr	r3, [pc, #240]	; (8007778 <HAL_GPIO_Init+0x350>)
+ 8007688:	681b      	ldr	r3, [r3, #0]
+ 800768a:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 800768c:	693b      	ldr	r3, [r7, #16]
+ 800768e:	43db      	mvns	r3, r3
+ 8007690:	69ba      	ldr	r2, [r7, #24]
+ 8007692:	4013      	ands	r3, r2
+ 8007694:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
+ 8007696:	683b      	ldr	r3, [r7, #0]
+ 8007698:	685b      	ldr	r3, [r3, #4]
+ 800769a:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
+ 800769e:	2b00      	cmp	r3, #0
+ 80076a0:	d003      	beq.n	80076aa <HAL_GPIO_Init+0x282>
+        {
+          temp |= iocurrent;
+ 80076a2:	69ba      	ldr	r2, [r7, #24]
+ 80076a4:	693b      	ldr	r3, [r7, #16]
+ 80076a6:	4313      	orrs	r3, r2
+ 80076a8:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->IMR = temp;
+ 80076aa:	4a33      	ldr	r2, [pc, #204]	; (8007778 <HAL_GPIO_Init+0x350>)
+ 80076ac:	69bb      	ldr	r3, [r7, #24]
+ 80076ae:	6013      	str	r3, [r2, #0]
+
+        temp = EXTI->EMR;
+ 80076b0:	4b31      	ldr	r3, [pc, #196]	; (8007778 <HAL_GPIO_Init+0x350>)
+ 80076b2:	685b      	ldr	r3, [r3, #4]
+ 80076b4:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 80076b6:	693b      	ldr	r3, [r7, #16]
+ 80076b8:	43db      	mvns	r3, r3
+ 80076ba:	69ba      	ldr	r2, [r7, #24]
+ 80076bc:	4013      	ands	r3, r2
+ 80076be:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
+ 80076c0:	683b      	ldr	r3, [r7, #0]
+ 80076c2:	685b      	ldr	r3, [r3, #4]
+ 80076c4:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 80076c8:	2b00      	cmp	r3, #0
+ 80076ca:	d003      	beq.n	80076d4 <HAL_GPIO_Init+0x2ac>
+        {
+          temp |= iocurrent;
+ 80076cc:	69ba      	ldr	r2, [r7, #24]
+ 80076ce:	693b      	ldr	r3, [r7, #16]
+ 80076d0:	4313      	orrs	r3, r2
+ 80076d2:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->EMR = temp;
+ 80076d4:	4a28      	ldr	r2, [pc, #160]	; (8007778 <HAL_GPIO_Init+0x350>)
+ 80076d6:	69bb      	ldr	r3, [r7, #24]
+ 80076d8:	6053      	str	r3, [r2, #4]
+
+        /* Clear Rising Falling edge configuration */
+        temp = EXTI->RTSR;
+ 80076da:	4b27      	ldr	r3, [pc, #156]	; (8007778 <HAL_GPIO_Init+0x350>)
+ 80076dc:	689b      	ldr	r3, [r3, #8]
+ 80076de:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 80076e0:	693b      	ldr	r3, [r7, #16]
+ 80076e2:	43db      	mvns	r3, r3
+ 80076e4:	69ba      	ldr	r2, [r7, #24]
+ 80076e6:	4013      	ands	r3, r2
+ 80076e8:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
+ 80076ea:	683b      	ldr	r3, [r7, #0]
+ 80076ec:	685b      	ldr	r3, [r3, #4]
+ 80076ee:	f403 1380 	and.w	r3, r3, #1048576	; 0x100000
+ 80076f2:	2b00      	cmp	r3, #0
+ 80076f4:	d003      	beq.n	80076fe <HAL_GPIO_Init+0x2d6>
+        {
+          temp |= iocurrent;
+ 80076f6:	69ba      	ldr	r2, [r7, #24]
+ 80076f8:	693b      	ldr	r3, [r7, #16]
+ 80076fa:	4313      	orrs	r3, r2
+ 80076fc:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->RTSR = temp;
+ 80076fe:	4a1e      	ldr	r2, [pc, #120]	; (8007778 <HAL_GPIO_Init+0x350>)
+ 8007700:	69bb      	ldr	r3, [r7, #24]
+ 8007702:	6093      	str	r3, [r2, #8]
+
+        temp = EXTI->FTSR;
+ 8007704:	4b1c      	ldr	r3, [pc, #112]	; (8007778 <HAL_GPIO_Init+0x350>)
+ 8007706:	68db      	ldr	r3, [r3, #12]
+ 8007708:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 800770a:	693b      	ldr	r3, [r7, #16]
+ 800770c:	43db      	mvns	r3, r3
+ 800770e:	69ba      	ldr	r2, [r7, #24]
+ 8007710:	4013      	ands	r3, r2
+ 8007712:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
+ 8007714:	683b      	ldr	r3, [r7, #0]
+ 8007716:	685b      	ldr	r3, [r3, #4]
+ 8007718:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
+ 800771c:	2b00      	cmp	r3, #0
+ 800771e:	d003      	beq.n	8007728 <HAL_GPIO_Init+0x300>
+        {
+          temp |= iocurrent;
+ 8007720:	69ba      	ldr	r2, [r7, #24]
+ 8007722:	693b      	ldr	r3, [r7, #16]
+ 8007724:	4313      	orrs	r3, r2
+ 8007726:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->FTSR = temp;
+ 8007728:	4a13      	ldr	r2, [pc, #76]	; (8007778 <HAL_GPIO_Init+0x350>)
+ 800772a:	69bb      	ldr	r3, [r7, #24]
+ 800772c:	60d3      	str	r3, [r2, #12]
+  for(position = 0; position < GPIO_NUMBER; position++)
+ 800772e:	69fb      	ldr	r3, [r7, #28]
+ 8007730:	3301      	adds	r3, #1
+ 8007732:	61fb      	str	r3, [r7, #28]
+ 8007734:	69fb      	ldr	r3, [r7, #28]
+ 8007736:	2b0f      	cmp	r3, #15
+ 8007738:	f67f ae86 	bls.w	8007448 <HAL_GPIO_Init+0x20>
+      }
+    }
+  }
+}
+ 800773c:	bf00      	nop
+ 800773e:	3724      	adds	r7, #36	; 0x24
+ 8007740:	46bd      	mov	sp, r7
+ 8007742:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8007746:	4770      	bx	lr
+ 8007748:	40023800 	.word	0x40023800
+ 800774c:	40013800 	.word	0x40013800
+ 8007750:	40020000 	.word	0x40020000
+ 8007754:	40020400 	.word	0x40020400
+ 8007758:	40020800 	.word	0x40020800
+ 800775c:	40020c00 	.word	0x40020c00
+ 8007760:	40021000 	.word	0x40021000
+ 8007764:	40021400 	.word	0x40021400
+ 8007768:	40021800 	.word	0x40021800
+ 800776c:	40021c00 	.word	0x40021c00
+ 8007770:	40022000 	.word	0x40022000
+ 8007774:	40022400 	.word	0x40022400
+ 8007778:	40013c00 	.word	0x40013c00
+
+0800777c <HAL_GPIO_DeInit>:
+  * @param  GPIO_Pin specifies the port bit to be written.
+  *          This parameter can be one of GPIO_PIN_x where x can be (0..15).
+  * @retval None
+  */
+void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
+{
+ 800777c:	b480      	push	{r7}
+ 800777e:	b087      	sub	sp, #28
+ 8007780:	af00      	add	r7, sp, #0
+ 8007782:	6078      	str	r0, [r7, #4]
+ 8007784:	6039      	str	r1, [r7, #0]
+  uint32_t position;
+  uint32_t ioposition = 0x00;
+ 8007786:	2300      	movs	r3, #0
+ 8007788:	613b      	str	r3, [r7, #16]
+  uint32_t iocurrent = 0x00;
+ 800778a:	2300      	movs	r3, #0
+ 800778c:	60fb      	str	r3, [r7, #12]
+  uint32_t tmp = 0x00;
+ 800778e:	2300      	movs	r3, #0
+ 8007790:	60bb      	str	r3, [r7, #8]
+
+  /* Check the parameters */
+  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
+
+  /* Configure the port pins */
+  for(position = 0; position < GPIO_NUMBER; position++)
+ 8007792:	2300      	movs	r3, #0
+ 8007794:	617b      	str	r3, [r7, #20]
+ 8007796:	e0d9      	b.n	800794c <HAL_GPIO_DeInit+0x1d0>
+  {
+    /* Get the IO position */
+    ioposition = ((uint32_t)0x01) << position;
+ 8007798:	2201      	movs	r2, #1
+ 800779a:	697b      	ldr	r3, [r7, #20]
+ 800779c:	fa02 f303 	lsl.w	r3, r2, r3
+ 80077a0:	613b      	str	r3, [r7, #16]
+    /* Get the current IO position */
+    iocurrent = (GPIO_Pin) & ioposition;
+ 80077a2:	683a      	ldr	r2, [r7, #0]
+ 80077a4:	693b      	ldr	r3, [r7, #16]
+ 80077a6:	4013      	ands	r3, r2
+ 80077a8:	60fb      	str	r3, [r7, #12]
+
+    if(iocurrent == ioposition)
+ 80077aa:	68fa      	ldr	r2, [r7, #12]
+ 80077ac:	693b      	ldr	r3, [r7, #16]
+ 80077ae:	429a      	cmp	r2, r3
+ 80077b0:	f040 80c9 	bne.w	8007946 <HAL_GPIO_DeInit+0x1ca>
+    {
+      /*------------------------- EXTI Mode Configuration --------------------*/
+      tmp = SYSCFG->EXTICR[position >> 2];
+ 80077b4:	4a6a      	ldr	r2, [pc, #424]	; (8007960 <HAL_GPIO_DeInit+0x1e4>)
+ 80077b6:	697b      	ldr	r3, [r7, #20]
+ 80077b8:	089b      	lsrs	r3, r3, #2
+ 80077ba:	3302      	adds	r3, #2
+ 80077bc:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 80077c0:	60bb      	str	r3, [r7, #8]
+      tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03)));
+ 80077c2:	697b      	ldr	r3, [r7, #20]
+ 80077c4:	f003 0303 	and.w	r3, r3, #3
+ 80077c8:	009b      	lsls	r3, r3, #2
+ 80077ca:	220f      	movs	r2, #15
+ 80077cc:	fa02 f303 	lsl.w	r3, r2, r3
+ 80077d0:	68ba      	ldr	r2, [r7, #8]
+ 80077d2:	4013      	ands	r3, r2
+ 80077d4:	60bb      	str	r3, [r7, #8]
+      if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))))
+ 80077d6:	687b      	ldr	r3, [r7, #4]
+ 80077d8:	4a62      	ldr	r2, [pc, #392]	; (8007964 <HAL_GPIO_DeInit+0x1e8>)
+ 80077da:	4293      	cmp	r3, r2
+ 80077dc:	d037      	beq.n	800784e <HAL_GPIO_DeInit+0xd2>
+ 80077de:	687b      	ldr	r3, [r7, #4]
+ 80077e0:	4a61      	ldr	r2, [pc, #388]	; (8007968 <HAL_GPIO_DeInit+0x1ec>)
+ 80077e2:	4293      	cmp	r3, r2
+ 80077e4:	d031      	beq.n	800784a <HAL_GPIO_DeInit+0xce>
+ 80077e6:	687b      	ldr	r3, [r7, #4]
+ 80077e8:	4a60      	ldr	r2, [pc, #384]	; (800796c <HAL_GPIO_DeInit+0x1f0>)
+ 80077ea:	4293      	cmp	r3, r2
+ 80077ec:	d02b      	beq.n	8007846 <HAL_GPIO_DeInit+0xca>
+ 80077ee:	687b      	ldr	r3, [r7, #4]
+ 80077f0:	4a5f      	ldr	r2, [pc, #380]	; (8007970 <HAL_GPIO_DeInit+0x1f4>)
+ 80077f2:	4293      	cmp	r3, r2
+ 80077f4:	d025      	beq.n	8007842 <HAL_GPIO_DeInit+0xc6>
+ 80077f6:	687b      	ldr	r3, [r7, #4]
+ 80077f8:	4a5e      	ldr	r2, [pc, #376]	; (8007974 <HAL_GPIO_DeInit+0x1f8>)
+ 80077fa:	4293      	cmp	r3, r2
+ 80077fc:	d01f      	beq.n	800783e <HAL_GPIO_DeInit+0xc2>
+ 80077fe:	687b      	ldr	r3, [r7, #4]
+ 8007800:	4a5d      	ldr	r2, [pc, #372]	; (8007978 <HAL_GPIO_DeInit+0x1fc>)
+ 8007802:	4293      	cmp	r3, r2
+ 8007804:	d019      	beq.n	800783a <HAL_GPIO_DeInit+0xbe>
+ 8007806:	687b      	ldr	r3, [r7, #4]
+ 8007808:	4a5c      	ldr	r2, [pc, #368]	; (800797c <HAL_GPIO_DeInit+0x200>)
+ 800780a:	4293      	cmp	r3, r2
+ 800780c:	d013      	beq.n	8007836 <HAL_GPIO_DeInit+0xba>
+ 800780e:	687b      	ldr	r3, [r7, #4]
+ 8007810:	4a5b      	ldr	r2, [pc, #364]	; (8007980 <HAL_GPIO_DeInit+0x204>)
+ 8007812:	4293      	cmp	r3, r2
+ 8007814:	d00d      	beq.n	8007832 <HAL_GPIO_DeInit+0xb6>
+ 8007816:	687b      	ldr	r3, [r7, #4]
+ 8007818:	4a5a      	ldr	r2, [pc, #360]	; (8007984 <HAL_GPIO_DeInit+0x208>)
+ 800781a:	4293      	cmp	r3, r2
+ 800781c:	d007      	beq.n	800782e <HAL_GPIO_DeInit+0xb2>
+ 800781e:	687b      	ldr	r3, [r7, #4]
+ 8007820:	4a59      	ldr	r2, [pc, #356]	; (8007988 <HAL_GPIO_DeInit+0x20c>)
+ 8007822:	4293      	cmp	r3, r2
+ 8007824:	d101      	bne.n	800782a <HAL_GPIO_DeInit+0xae>
+ 8007826:	2309      	movs	r3, #9
+ 8007828:	e012      	b.n	8007850 <HAL_GPIO_DeInit+0xd4>
+ 800782a:	230a      	movs	r3, #10
+ 800782c:	e010      	b.n	8007850 <HAL_GPIO_DeInit+0xd4>
+ 800782e:	2308      	movs	r3, #8
+ 8007830:	e00e      	b.n	8007850 <HAL_GPIO_DeInit+0xd4>
+ 8007832:	2307      	movs	r3, #7
+ 8007834:	e00c      	b.n	8007850 <HAL_GPIO_DeInit+0xd4>
+ 8007836:	2306      	movs	r3, #6
+ 8007838:	e00a      	b.n	8007850 <HAL_GPIO_DeInit+0xd4>
+ 800783a:	2305      	movs	r3, #5
+ 800783c:	e008      	b.n	8007850 <HAL_GPIO_DeInit+0xd4>
+ 800783e:	2304      	movs	r3, #4
+ 8007840:	e006      	b.n	8007850 <HAL_GPIO_DeInit+0xd4>
+ 8007842:	2303      	movs	r3, #3
+ 8007844:	e004      	b.n	8007850 <HAL_GPIO_DeInit+0xd4>
+ 8007846:	2302      	movs	r3, #2
+ 8007848:	e002      	b.n	8007850 <HAL_GPIO_DeInit+0xd4>
+ 800784a:	2301      	movs	r3, #1
+ 800784c:	e000      	b.n	8007850 <HAL_GPIO_DeInit+0xd4>
+ 800784e:	2300      	movs	r3, #0
+ 8007850:	697a      	ldr	r2, [r7, #20]
+ 8007852:	f002 0203 	and.w	r2, r2, #3
+ 8007856:	0092      	lsls	r2, r2, #2
+ 8007858:	4093      	lsls	r3, r2
+ 800785a:	68ba      	ldr	r2, [r7, #8]
+ 800785c:	429a      	cmp	r2, r3
+ 800785e:	d132      	bne.n	80078c6 <HAL_GPIO_DeInit+0x14a>
+      {
+        /* Clear EXTI line configuration */
+        EXTI->IMR &= ~((uint32_t)iocurrent);
+ 8007860:	4b4a      	ldr	r3, [pc, #296]	; (800798c <HAL_GPIO_DeInit+0x210>)
+ 8007862:	681a      	ldr	r2, [r3, #0]
+ 8007864:	68fb      	ldr	r3, [r7, #12]
+ 8007866:	43db      	mvns	r3, r3
+ 8007868:	4948      	ldr	r1, [pc, #288]	; (800798c <HAL_GPIO_DeInit+0x210>)
+ 800786a:	4013      	ands	r3, r2
+ 800786c:	600b      	str	r3, [r1, #0]
+        EXTI->EMR &= ~((uint32_t)iocurrent);
+ 800786e:	4b47      	ldr	r3, [pc, #284]	; (800798c <HAL_GPIO_DeInit+0x210>)
+ 8007870:	685a      	ldr	r2, [r3, #4]
+ 8007872:	68fb      	ldr	r3, [r7, #12]
+ 8007874:	43db      	mvns	r3, r3
+ 8007876:	4945      	ldr	r1, [pc, #276]	; (800798c <HAL_GPIO_DeInit+0x210>)
+ 8007878:	4013      	ands	r3, r2
+ 800787a:	604b      	str	r3, [r1, #4]
+
+        /* Clear Rising Falling edge configuration */
+        EXTI->RTSR &= ~((uint32_t)iocurrent);
+ 800787c:	4b43      	ldr	r3, [pc, #268]	; (800798c <HAL_GPIO_DeInit+0x210>)
+ 800787e:	689a      	ldr	r2, [r3, #8]
+ 8007880:	68fb      	ldr	r3, [r7, #12]
+ 8007882:	43db      	mvns	r3, r3
+ 8007884:	4941      	ldr	r1, [pc, #260]	; (800798c <HAL_GPIO_DeInit+0x210>)
+ 8007886:	4013      	ands	r3, r2
+ 8007888:	608b      	str	r3, [r1, #8]
+        EXTI->FTSR &= ~((uint32_t)iocurrent);
+ 800788a:	4b40      	ldr	r3, [pc, #256]	; (800798c <HAL_GPIO_DeInit+0x210>)
+ 800788c:	68da      	ldr	r2, [r3, #12]
+ 800788e:	68fb      	ldr	r3, [r7, #12]
+ 8007890:	43db      	mvns	r3, r3
+ 8007892:	493e      	ldr	r1, [pc, #248]	; (800798c <HAL_GPIO_DeInit+0x210>)
+ 8007894:	4013      	ands	r3, r2
+ 8007896:	60cb      	str	r3, [r1, #12]
+
+        /* Configure the External Interrupt or event for the current IO */
+        tmp = ((uint32_t)0x0F) << (4 * (position & 0x03));
+ 8007898:	697b      	ldr	r3, [r7, #20]
+ 800789a:	f003 0303 	and.w	r3, r3, #3
+ 800789e:	009b      	lsls	r3, r3, #2
+ 80078a0:	220f      	movs	r2, #15
+ 80078a2:	fa02 f303 	lsl.w	r3, r2, r3
+ 80078a6:	60bb      	str	r3, [r7, #8]
+        SYSCFG->EXTICR[position >> 2] &= ~tmp;
+ 80078a8:	4a2d      	ldr	r2, [pc, #180]	; (8007960 <HAL_GPIO_DeInit+0x1e4>)
+ 80078aa:	697b      	ldr	r3, [r7, #20]
+ 80078ac:	089b      	lsrs	r3, r3, #2
+ 80078ae:	3302      	adds	r3, #2
+ 80078b0:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
+ 80078b4:	68bb      	ldr	r3, [r7, #8]
+ 80078b6:	43da      	mvns	r2, r3
+ 80078b8:	4829      	ldr	r0, [pc, #164]	; (8007960 <HAL_GPIO_DeInit+0x1e4>)
+ 80078ba:	697b      	ldr	r3, [r7, #20]
+ 80078bc:	089b      	lsrs	r3, r3, #2
+ 80078be:	400a      	ands	r2, r1
+ 80078c0:	3302      	adds	r3, #2
+ 80078c2:	f840 2023 	str.w	r2, [r0, r3, lsl #2]
+      }
+      /*------------------------- GPIO Mode Configuration --------------------*/
+      /* Configure IO Direction in Input Floating Mode */
+      GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2));
+ 80078c6:	687b      	ldr	r3, [r7, #4]
+ 80078c8:	681a      	ldr	r2, [r3, #0]
+ 80078ca:	697b      	ldr	r3, [r7, #20]
+ 80078cc:	005b      	lsls	r3, r3, #1
+ 80078ce:	2103      	movs	r1, #3
+ 80078d0:	fa01 f303 	lsl.w	r3, r1, r3
+ 80078d4:	43db      	mvns	r3, r3
+ 80078d6:	401a      	ands	r2, r3
+ 80078d8:	687b      	ldr	r3, [r7, #4]
+ 80078da:	601a      	str	r2, [r3, #0]
+
+      /* Configure the default Alternate Function in current IO */
+      GPIOx->AFR[position >> 3] &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
+ 80078dc:	697b      	ldr	r3, [r7, #20]
+ 80078de:	08da      	lsrs	r2, r3, #3
+ 80078e0:	687b      	ldr	r3, [r7, #4]
+ 80078e2:	3208      	adds	r2, #8
+ 80078e4:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
+ 80078e8:	697b      	ldr	r3, [r7, #20]
+ 80078ea:	f003 0307 	and.w	r3, r3, #7
+ 80078ee:	009b      	lsls	r3, r3, #2
+ 80078f0:	220f      	movs	r2, #15
+ 80078f2:	fa02 f303 	lsl.w	r3, r2, r3
+ 80078f6:	43db      	mvns	r3, r3
+ 80078f8:	697a      	ldr	r2, [r7, #20]
+ 80078fa:	08d2      	lsrs	r2, r2, #3
+ 80078fc:	4019      	ands	r1, r3
+ 80078fe:	687b      	ldr	r3, [r7, #4]
+ 8007900:	3208      	adds	r2, #8
+ 8007902:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
+
+      /* Deactivate the Pull-up and Pull-down resistor for the current IO */
+      GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
+ 8007906:	687b      	ldr	r3, [r7, #4]
+ 8007908:	68da      	ldr	r2, [r3, #12]
+ 800790a:	697b      	ldr	r3, [r7, #20]
+ 800790c:	005b      	lsls	r3, r3, #1
+ 800790e:	2103      	movs	r1, #3
+ 8007910:	fa01 f303 	lsl.w	r3, r1, r3
+ 8007914:	43db      	mvns	r3, r3
+ 8007916:	401a      	ands	r2, r3
+ 8007918:	687b      	ldr	r3, [r7, #4]
+ 800791a:	60da      	str	r2, [r3, #12]
+
+      /* Configure the default value IO Output Type */
+      GPIOx->OTYPER  &= ~(GPIO_OTYPER_OT_0 << position) ;
+ 800791c:	687b      	ldr	r3, [r7, #4]
+ 800791e:	685a      	ldr	r2, [r3, #4]
+ 8007920:	2101      	movs	r1, #1
+ 8007922:	697b      	ldr	r3, [r7, #20]
+ 8007924:	fa01 f303 	lsl.w	r3, r1, r3
+ 8007928:	43db      	mvns	r3, r3
+ 800792a:	401a      	ands	r2, r3
+ 800792c:	687b      	ldr	r3, [r7, #4]
+ 800792e:	605a      	str	r2, [r3, #4]
+
+      /* Configure the default value for IO Speed */
+      GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
+ 8007930:	687b      	ldr	r3, [r7, #4]
+ 8007932:	689a      	ldr	r2, [r3, #8]
+ 8007934:	697b      	ldr	r3, [r7, #20]
+ 8007936:	005b      	lsls	r3, r3, #1
+ 8007938:	2103      	movs	r1, #3
+ 800793a:	fa01 f303 	lsl.w	r3, r1, r3
+ 800793e:	43db      	mvns	r3, r3
+ 8007940:	401a      	ands	r2, r3
+ 8007942:	687b      	ldr	r3, [r7, #4]
+ 8007944:	609a      	str	r2, [r3, #8]
+  for(position = 0; position < GPIO_NUMBER; position++)
+ 8007946:	697b      	ldr	r3, [r7, #20]
+ 8007948:	3301      	adds	r3, #1
+ 800794a:	617b      	str	r3, [r7, #20]
+ 800794c:	697b      	ldr	r3, [r7, #20]
+ 800794e:	2b0f      	cmp	r3, #15
+ 8007950:	f67f af22 	bls.w	8007798 <HAL_GPIO_DeInit+0x1c>
+    }
+  }
+}
+ 8007954:	bf00      	nop
+ 8007956:	371c      	adds	r7, #28
+ 8007958:	46bd      	mov	sp, r7
+ 800795a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800795e:	4770      	bx	lr
+ 8007960:	40013800 	.word	0x40013800
+ 8007964:	40020000 	.word	0x40020000
+ 8007968:	40020400 	.word	0x40020400
+ 800796c:	40020800 	.word	0x40020800
+ 8007970:	40020c00 	.word	0x40020c00
+ 8007974:	40021000 	.word	0x40021000
+ 8007978:	40021400 	.word	0x40021400
+ 800797c:	40021800 	.word	0x40021800
+ 8007980:	40021c00 	.word	0x40021c00
+ 8007984:	40022000 	.word	0x40022000
+ 8007988:	40022400 	.word	0x40022400
+ 800798c:	40013c00 	.word	0x40013c00
+
+08007990 <HAL_GPIO_ReadPin>:
+  * @param  GPIO_Pin specifies the port bit to read.
+  *         This parameter can be GPIO_PIN_x where x can be (0..15).
+  * @retval The input port pin value.
+  */
+GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
+{
+ 8007990:	b480      	push	{r7}
+ 8007992:	b085      	sub	sp, #20
+ 8007994:	af00      	add	r7, sp, #0
+ 8007996:	6078      	str	r0, [r7, #4]
+ 8007998:	460b      	mov	r3, r1
+ 800799a:	807b      	strh	r3, [r7, #2]
+  GPIO_PinState bitstatus;
+
+  /* Check the parameters */
+  assert_param(IS_GPIO_PIN(GPIO_Pin));
+
+  if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
+ 800799c:	687b      	ldr	r3, [r7, #4]
+ 800799e:	691a      	ldr	r2, [r3, #16]
+ 80079a0:	887b      	ldrh	r3, [r7, #2]
+ 80079a2:	4013      	ands	r3, r2
+ 80079a4:	2b00      	cmp	r3, #0
+ 80079a6:	d002      	beq.n	80079ae <HAL_GPIO_ReadPin+0x1e>
+  {
+    bitstatus = GPIO_PIN_SET;
+ 80079a8:	2301      	movs	r3, #1
+ 80079aa:	73fb      	strb	r3, [r7, #15]
+ 80079ac:	e001      	b.n	80079b2 <HAL_GPIO_ReadPin+0x22>
+  }
+  else
+  {
+    bitstatus = GPIO_PIN_RESET;
+ 80079ae:	2300      	movs	r3, #0
+ 80079b0:	73fb      	strb	r3, [r7, #15]
+  }
+  return bitstatus;
+ 80079b2:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 80079b4:	4618      	mov	r0, r3
+ 80079b6:	3714      	adds	r7, #20
+ 80079b8:	46bd      	mov	sp, r7
+ 80079ba:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80079be:	4770      	bx	lr
+
+080079c0 <HAL_GPIO_WritePin>:
+  *            @arg GPIO_PIN_RESET: to clear the port pin
+  *            @arg GPIO_PIN_SET: to set the port pin
+  * @retval None
+  */
+void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
+{
+ 80079c0:	b480      	push	{r7}
+ 80079c2:	b083      	sub	sp, #12
+ 80079c4:	af00      	add	r7, sp, #0
+ 80079c6:	6078      	str	r0, [r7, #4]
+ 80079c8:	460b      	mov	r3, r1
+ 80079ca:	807b      	strh	r3, [r7, #2]
+ 80079cc:	4613      	mov	r3, r2
+ 80079ce:	707b      	strb	r3, [r7, #1]
+  /* Check the parameters */
+  assert_param(IS_GPIO_PIN(GPIO_Pin));
+  assert_param(IS_GPIO_PIN_ACTION(PinState));
+
+  if(PinState != GPIO_PIN_RESET)
+ 80079d0:	787b      	ldrb	r3, [r7, #1]
+ 80079d2:	2b00      	cmp	r3, #0
+ 80079d4:	d003      	beq.n	80079de <HAL_GPIO_WritePin+0x1e>
+  {
+    GPIOx->BSRR = GPIO_Pin;
+ 80079d6:	887a      	ldrh	r2, [r7, #2]
+ 80079d8:	687b      	ldr	r3, [r7, #4]
+ 80079da:	619a      	str	r2, [r3, #24]
+  }
+  else
+  {
+    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16;
+  }
+}
+ 80079dc:	e003      	b.n	80079e6 <HAL_GPIO_WritePin+0x26>
+    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16;
+ 80079de:	887b      	ldrh	r3, [r7, #2]
+ 80079e0:	041a      	lsls	r2, r3, #16
+ 80079e2:	687b      	ldr	r3, [r7, #4]
+ 80079e4:	619a      	str	r2, [r3, #24]
+}
+ 80079e6:	bf00      	nop
+ 80079e8:	370c      	adds	r7, #12
+ 80079ea:	46bd      	mov	sp, r7
+ 80079ec:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80079f0:	4770      	bx	lr
+	...
+
+080079f4 <HAL_I2C_Init>:
+  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
+  *                the configuration information for the specified I2C.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
+{
+ 80079f4:	b580      	push	{r7, lr}
+ 80079f6:	b082      	sub	sp, #8
+ 80079f8:	af00      	add	r7, sp, #0
+ 80079fa:	6078      	str	r0, [r7, #4]
+  /* Check the I2C handle allocation */
+  if (hi2c == NULL)
+ 80079fc:	687b      	ldr	r3, [r7, #4]
+ 80079fe:	2b00      	cmp	r3, #0
+ 8007a00:	d101      	bne.n	8007a06 <HAL_I2C_Init+0x12>
+  {
+    return HAL_ERROR;
+ 8007a02:	2301      	movs	r3, #1
+ 8007a04:	e07f      	b.n	8007b06 <HAL_I2C_Init+0x112>
+  assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
+  assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks));
+  assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
+  assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
+
+  if (hi2c->State == HAL_I2C_STATE_RESET)
+ 8007a06:	687b      	ldr	r3, [r7, #4]
+ 8007a08:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
+ 8007a0c:	b2db      	uxtb	r3, r3
+ 8007a0e:	2b00      	cmp	r3, #0
+ 8007a10:	d106      	bne.n	8007a20 <HAL_I2C_Init+0x2c>
+  {
+    /* Allocate lock resource and initialize it */
+    hi2c->Lock = HAL_UNLOCKED;
+ 8007a12:	687b      	ldr	r3, [r7, #4]
+ 8007a14:	2200      	movs	r2, #0
+ 8007a16:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+    /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
+    hi2c->MspInitCallback(hi2c);
+#else
+    /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
+    HAL_I2C_MspInit(hi2c);
+ 8007a1a:	6878      	ldr	r0, [r7, #4]
+ 8007a1c:	f7fc faaa 	bl	8003f74 <HAL_I2C_MspInit>
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
+  }
+
+  hi2c->State = HAL_I2C_STATE_BUSY;
+ 8007a20:	687b      	ldr	r3, [r7, #4]
+ 8007a22:	2224      	movs	r2, #36	; 0x24
+ 8007a24:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+
+  /* Disable the selected I2C peripheral */
+  __HAL_I2C_DISABLE(hi2c);
+ 8007a28:	687b      	ldr	r3, [r7, #4]
+ 8007a2a:	681b      	ldr	r3, [r3, #0]
+ 8007a2c:	681a      	ldr	r2, [r3, #0]
+ 8007a2e:	687b      	ldr	r3, [r7, #4]
+ 8007a30:	681b      	ldr	r3, [r3, #0]
+ 8007a32:	f022 0201 	bic.w	r2, r2, #1
+ 8007a36:	601a      	str	r2, [r3, #0]
+
+  /*---------------------------- I2Cx TIMINGR Configuration ------------------*/
+  /* Configure I2Cx: Frequency range */
+  hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
+ 8007a38:	687b      	ldr	r3, [r7, #4]
+ 8007a3a:	685a      	ldr	r2, [r3, #4]
+ 8007a3c:	687b      	ldr	r3, [r7, #4]
+ 8007a3e:	681b      	ldr	r3, [r3, #0]
+ 8007a40:	f022 6270 	bic.w	r2, r2, #251658240	; 0xf000000
+ 8007a44:	611a      	str	r2, [r3, #16]
+
+  /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
+  /* Disable Own Address1 before set the Own Address1 configuration */
+  hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
+ 8007a46:	687b      	ldr	r3, [r7, #4]
+ 8007a48:	681b      	ldr	r3, [r3, #0]
+ 8007a4a:	689a      	ldr	r2, [r3, #8]
+ 8007a4c:	687b      	ldr	r3, [r7, #4]
+ 8007a4e:	681b      	ldr	r3, [r3, #0]
+ 8007a50:	f422 4200 	bic.w	r2, r2, #32768	; 0x8000
+ 8007a54:	609a      	str	r2, [r3, #8]
+
+  /* Configure I2Cx: Own Address1 and ack own address1 mode */
+  if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
+ 8007a56:	687b      	ldr	r3, [r7, #4]
+ 8007a58:	68db      	ldr	r3, [r3, #12]
+ 8007a5a:	2b01      	cmp	r3, #1
+ 8007a5c:	d107      	bne.n	8007a6e <HAL_I2C_Init+0x7a>
+  {
+    hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
+ 8007a5e:	687b      	ldr	r3, [r7, #4]
+ 8007a60:	689a      	ldr	r2, [r3, #8]
+ 8007a62:	687b      	ldr	r3, [r7, #4]
+ 8007a64:	681b      	ldr	r3, [r3, #0]
+ 8007a66:	f442 4200 	orr.w	r2, r2, #32768	; 0x8000
+ 8007a6a:	609a      	str	r2, [r3, #8]
+ 8007a6c:	e006      	b.n	8007a7c <HAL_I2C_Init+0x88>
+  }
+  else /* I2C_ADDRESSINGMODE_10BIT */
+  {
+    hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);
+ 8007a6e:	687b      	ldr	r3, [r7, #4]
+ 8007a70:	689a      	ldr	r2, [r3, #8]
+ 8007a72:	687b      	ldr	r3, [r7, #4]
+ 8007a74:	681b      	ldr	r3, [r3, #0]
+ 8007a76:	f442 4204 	orr.w	r2, r2, #33792	; 0x8400
+ 8007a7a:	609a      	str	r2, [r3, #8]
+  }
+
+  /*---------------------------- I2Cx CR2 Configuration ----------------------*/
+  /* Configure I2Cx: Addressing Master mode */
+  if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
+ 8007a7c:	687b      	ldr	r3, [r7, #4]
+ 8007a7e:	68db      	ldr	r3, [r3, #12]
+ 8007a80:	2b02      	cmp	r3, #2
+ 8007a82:	d104      	bne.n	8007a8e <HAL_I2C_Init+0x9a>
+  {
+    hi2c->Instance->CR2 = (I2C_CR2_ADD10);
+ 8007a84:	687b      	ldr	r3, [r7, #4]
+ 8007a86:	681b      	ldr	r3, [r3, #0]
+ 8007a88:	f44f 6200 	mov.w	r2, #2048	; 0x800
+ 8007a8c:	605a      	str	r2, [r3, #4]
+  }
+  /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
+  hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
+ 8007a8e:	687b      	ldr	r3, [r7, #4]
+ 8007a90:	681b      	ldr	r3, [r3, #0]
+ 8007a92:	6859      	ldr	r1, [r3, #4]
+ 8007a94:	687b      	ldr	r3, [r7, #4]
+ 8007a96:	681a      	ldr	r2, [r3, #0]
+ 8007a98:	4b1d      	ldr	r3, [pc, #116]	; (8007b10 <HAL_I2C_Init+0x11c>)
+ 8007a9a:	430b      	orrs	r3, r1
+ 8007a9c:	6053      	str	r3, [r2, #4]
+
+  /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
+  /* Disable Own Address2 before set the Own Address2 configuration */
+  hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE;
+ 8007a9e:	687b      	ldr	r3, [r7, #4]
+ 8007aa0:	681b      	ldr	r3, [r3, #0]
+ 8007aa2:	68da      	ldr	r2, [r3, #12]
+ 8007aa4:	687b      	ldr	r3, [r7, #4]
+ 8007aa6:	681b      	ldr	r3, [r3, #0]
+ 8007aa8:	f422 4200 	bic.w	r2, r2, #32768	; 0x8000
+ 8007aac:	60da      	str	r2, [r3, #12]
+
+  /* Configure I2Cx: Dual mode and Own Address2 */
+  hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8));
+ 8007aae:	687b      	ldr	r3, [r7, #4]
+ 8007ab0:	691a      	ldr	r2, [r3, #16]
+ 8007ab2:	687b      	ldr	r3, [r7, #4]
+ 8007ab4:	695b      	ldr	r3, [r3, #20]
+ 8007ab6:	ea42 0103 	orr.w	r1, r2, r3
+ 8007aba:	687b      	ldr	r3, [r7, #4]
+ 8007abc:	699b      	ldr	r3, [r3, #24]
+ 8007abe:	021a      	lsls	r2, r3, #8
+ 8007ac0:	687b      	ldr	r3, [r7, #4]
+ 8007ac2:	681b      	ldr	r3, [r3, #0]
+ 8007ac4:	430a      	orrs	r2, r1
+ 8007ac6:	60da      	str	r2, [r3, #12]
+
+  /*---------------------------- I2Cx CR1 Configuration ----------------------*/
+  /* Configure I2Cx: Generalcall and NoStretch mode */
+  hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
+ 8007ac8:	687b      	ldr	r3, [r7, #4]
+ 8007aca:	69d9      	ldr	r1, [r3, #28]
+ 8007acc:	687b      	ldr	r3, [r7, #4]
+ 8007ace:	6a1a      	ldr	r2, [r3, #32]
+ 8007ad0:	687b      	ldr	r3, [r7, #4]
+ 8007ad2:	681b      	ldr	r3, [r3, #0]
+ 8007ad4:	430a      	orrs	r2, r1
+ 8007ad6:	601a      	str	r2, [r3, #0]
+
+  /* Enable the selected I2C peripheral */
+  __HAL_I2C_ENABLE(hi2c);
+ 8007ad8:	687b      	ldr	r3, [r7, #4]
+ 8007ada:	681b      	ldr	r3, [r3, #0]
+ 8007adc:	681a      	ldr	r2, [r3, #0]
+ 8007ade:	687b      	ldr	r3, [r7, #4]
+ 8007ae0:	681b      	ldr	r3, [r3, #0]
+ 8007ae2:	f042 0201 	orr.w	r2, r2, #1
+ 8007ae6:	601a      	str	r2, [r3, #0]
+
+  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+ 8007ae8:	687b      	ldr	r3, [r7, #4]
+ 8007aea:	2200      	movs	r2, #0
+ 8007aec:	645a      	str	r2, [r3, #68]	; 0x44
+  hi2c->State = HAL_I2C_STATE_READY;
+ 8007aee:	687b      	ldr	r3, [r7, #4]
+ 8007af0:	2220      	movs	r2, #32
+ 8007af2:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+  hi2c->PreviousState = I2C_STATE_NONE;
+ 8007af6:	687b      	ldr	r3, [r7, #4]
+ 8007af8:	2200      	movs	r2, #0
+ 8007afa:	631a      	str	r2, [r3, #48]	; 0x30
+  hi2c->Mode = HAL_I2C_MODE_NONE;
+ 8007afc:	687b      	ldr	r3, [r7, #4]
+ 8007afe:	2200      	movs	r2, #0
+ 8007b00:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+
+  return HAL_OK;
+ 8007b04:	2300      	movs	r3, #0
+}
+ 8007b06:	4618      	mov	r0, r3
+ 8007b08:	3708      	adds	r7, #8
+ 8007b0a:	46bd      	mov	sp, r7
+ 8007b0c:	bd80      	pop	{r7, pc}
+ 8007b0e:	bf00      	nop
+ 8007b10:	02008000 	.word	0x02008000
+
+08007b14 <HAL_I2C_DeInit>:
+  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
+  *                the configuration information for the specified I2C.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
+{
+ 8007b14:	b580      	push	{r7, lr}
+ 8007b16:	b082      	sub	sp, #8
+ 8007b18:	af00      	add	r7, sp, #0
+ 8007b1a:	6078      	str	r0, [r7, #4]
+  /* Check the I2C handle allocation */
+  if (hi2c == NULL)
+ 8007b1c:	687b      	ldr	r3, [r7, #4]
+ 8007b1e:	2b00      	cmp	r3, #0
+ 8007b20:	d101      	bne.n	8007b26 <HAL_I2C_DeInit+0x12>
+  {
+    return HAL_ERROR;
+ 8007b22:	2301      	movs	r3, #1
+ 8007b24:	e021      	b.n	8007b6a <HAL_I2C_DeInit+0x56>
+  }
+
+  /* Check the parameters */
+  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
+
+  hi2c->State = HAL_I2C_STATE_BUSY;
+ 8007b26:	687b      	ldr	r3, [r7, #4]
+ 8007b28:	2224      	movs	r2, #36	; 0x24
+ 8007b2a:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+
+  /* Disable the I2C Peripheral Clock */
+  __HAL_I2C_DISABLE(hi2c);
+ 8007b2e:	687b      	ldr	r3, [r7, #4]
+ 8007b30:	681b      	ldr	r3, [r3, #0]
+ 8007b32:	681a      	ldr	r2, [r3, #0]
+ 8007b34:	687b      	ldr	r3, [r7, #4]
+ 8007b36:	681b      	ldr	r3, [r3, #0]
+ 8007b38:	f022 0201 	bic.w	r2, r2, #1
+ 8007b3c:	601a      	str	r2, [r3, #0]
+
+  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
+  hi2c->MspDeInitCallback(hi2c);
+#else
+  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
+  HAL_I2C_MspDeInit(hi2c);
+ 8007b3e:	6878      	ldr	r0, [r7, #4]
+ 8007b40:	f7fc fa90 	bl	8004064 <HAL_I2C_MspDeInit>
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
+
+  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+ 8007b44:	687b      	ldr	r3, [r7, #4]
+ 8007b46:	2200      	movs	r2, #0
+ 8007b48:	645a      	str	r2, [r3, #68]	; 0x44
+  hi2c->State = HAL_I2C_STATE_RESET;
+ 8007b4a:	687b      	ldr	r3, [r7, #4]
+ 8007b4c:	2200      	movs	r2, #0
+ 8007b4e:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+  hi2c->PreviousState = I2C_STATE_NONE;
+ 8007b52:	687b      	ldr	r3, [r7, #4]
+ 8007b54:	2200      	movs	r2, #0
+ 8007b56:	631a      	str	r2, [r3, #48]	; 0x30
+  hi2c->Mode = HAL_I2C_MODE_NONE;
+ 8007b58:	687b      	ldr	r3, [r7, #4]
+ 8007b5a:	2200      	movs	r2, #0
+ 8007b5c:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+
+  /* Release Lock */
+  __HAL_UNLOCK(hi2c);
+ 8007b60:	687b      	ldr	r3, [r7, #4]
+ 8007b62:	2200      	movs	r2, #0
+ 8007b64:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+  return HAL_OK;
+ 8007b68:	2300      	movs	r3, #0
+}
+ 8007b6a:	4618      	mov	r0, r3
+ 8007b6c:	3708      	adds	r7, #8
+ 8007b6e:	46bd      	mov	sp, r7
+ 8007b70:	bd80      	pop	{r7, pc}
+	...
+
+08007b74 <HAL_I2C_Mem_Write>:
+  * @param  Size Amount of data to be sent
+  * @param  Timeout Timeout duration
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
+{
+ 8007b74:	b580      	push	{r7, lr}
+ 8007b76:	b088      	sub	sp, #32
+ 8007b78:	af02      	add	r7, sp, #8
+ 8007b7a:	60f8      	str	r0, [r7, #12]
+ 8007b7c:	4608      	mov	r0, r1
+ 8007b7e:	4611      	mov	r1, r2
+ 8007b80:	461a      	mov	r2, r3
+ 8007b82:	4603      	mov	r3, r0
+ 8007b84:	817b      	strh	r3, [r7, #10]
+ 8007b86:	460b      	mov	r3, r1
+ 8007b88:	813b      	strh	r3, [r7, #8]
+ 8007b8a:	4613      	mov	r3, r2
+ 8007b8c:	80fb      	strh	r3, [r7, #6]
+  uint32_t tickstart;
+
+  /* Check the parameters */
+  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
+
+  if (hi2c->State == HAL_I2C_STATE_READY)
+ 8007b8e:	68fb      	ldr	r3, [r7, #12]
+ 8007b90:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
+ 8007b94:	b2db      	uxtb	r3, r3
+ 8007b96:	2b20      	cmp	r3, #32
+ 8007b98:	f040 80f9 	bne.w	8007d8e <HAL_I2C_Mem_Write+0x21a>
+  {
+    if ((pData == NULL) || (Size == 0U))
+ 8007b9c:	6a3b      	ldr	r3, [r7, #32]
+ 8007b9e:	2b00      	cmp	r3, #0
+ 8007ba0:	d002      	beq.n	8007ba8 <HAL_I2C_Mem_Write+0x34>
+ 8007ba2:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
+ 8007ba4:	2b00      	cmp	r3, #0
+ 8007ba6:	d105      	bne.n	8007bb4 <HAL_I2C_Mem_Write+0x40>
+    {
+      hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;
+ 8007ba8:	68fb      	ldr	r3, [r7, #12]
+ 8007baa:	f44f 7200 	mov.w	r2, #512	; 0x200
+ 8007bae:	645a      	str	r2, [r3, #68]	; 0x44
+      return  HAL_ERROR;
+ 8007bb0:	2301      	movs	r3, #1
+ 8007bb2:	e0ed      	b.n	8007d90 <HAL_I2C_Mem_Write+0x21c>
+    }
+
+    /* Process Locked */
+    __HAL_LOCK(hi2c);
+ 8007bb4:	68fb      	ldr	r3, [r7, #12]
+ 8007bb6:	f893 3040 	ldrb.w	r3, [r3, #64]	; 0x40
+ 8007bba:	2b01      	cmp	r3, #1
+ 8007bbc:	d101      	bne.n	8007bc2 <HAL_I2C_Mem_Write+0x4e>
+ 8007bbe:	2302      	movs	r3, #2
+ 8007bc0:	e0e6      	b.n	8007d90 <HAL_I2C_Mem_Write+0x21c>
+ 8007bc2:	68fb      	ldr	r3, [r7, #12]
+ 8007bc4:	2201      	movs	r2, #1
+ 8007bc6:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+    /* Init tickstart for timeout management*/
+    tickstart = HAL_GetTick();
+ 8007bca:	f7fc ffbd 	bl	8004b48 <HAL_GetTick>
+ 8007bce:	6178      	str	r0, [r7, #20]
+
+    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
+ 8007bd0:	697b      	ldr	r3, [r7, #20]
+ 8007bd2:	9300      	str	r3, [sp, #0]
+ 8007bd4:	2319      	movs	r3, #25
+ 8007bd6:	2201      	movs	r2, #1
+ 8007bd8:	f44f 4100 	mov.w	r1, #32768	; 0x8000
+ 8007bdc:	68f8      	ldr	r0, [r7, #12]
+ 8007bde:	f000 fad1 	bl	8008184 <I2C_WaitOnFlagUntilTimeout>
+ 8007be2:	4603      	mov	r3, r0
+ 8007be4:	2b00      	cmp	r3, #0
+ 8007be6:	d001      	beq.n	8007bec <HAL_I2C_Mem_Write+0x78>
+    {
+      return HAL_ERROR;
+ 8007be8:	2301      	movs	r3, #1
+ 8007bea:	e0d1      	b.n	8007d90 <HAL_I2C_Mem_Write+0x21c>
+    }
+
+    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
+ 8007bec:	68fb      	ldr	r3, [r7, #12]
+ 8007bee:	2221      	movs	r2, #33	; 0x21
+ 8007bf0:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+    hi2c->Mode      = HAL_I2C_MODE_MEM;
+ 8007bf4:	68fb      	ldr	r3, [r7, #12]
+ 8007bf6:	2240      	movs	r2, #64	; 0x40
+ 8007bf8:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+ 8007bfc:	68fb      	ldr	r3, [r7, #12]
+ 8007bfe:	2200      	movs	r2, #0
+ 8007c00:	645a      	str	r2, [r3, #68]	; 0x44
+
+    /* Prepare transfer parameters */
+    hi2c->pBuffPtr  = pData;
+ 8007c02:	68fb      	ldr	r3, [r7, #12]
+ 8007c04:	6a3a      	ldr	r2, [r7, #32]
+ 8007c06:	625a      	str	r2, [r3, #36]	; 0x24
+    hi2c->XferCount = Size;
+ 8007c08:	68fb      	ldr	r3, [r7, #12]
+ 8007c0a:	8cba      	ldrh	r2, [r7, #36]	; 0x24
+ 8007c0c:	855a      	strh	r2, [r3, #42]	; 0x2a
+    hi2c->XferISR   = NULL;
+ 8007c0e:	68fb      	ldr	r3, [r7, #12]
+ 8007c10:	2200      	movs	r2, #0
+ 8007c12:	635a      	str	r2, [r3, #52]	; 0x34
+
+    /* Send Slave Address and Memory Address */
+    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
+ 8007c14:	88f8      	ldrh	r0, [r7, #6]
+ 8007c16:	893a      	ldrh	r2, [r7, #8]
+ 8007c18:	8979      	ldrh	r1, [r7, #10]
+ 8007c1a:	697b      	ldr	r3, [r7, #20]
+ 8007c1c:	9301      	str	r3, [sp, #4]
+ 8007c1e:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8007c20:	9300      	str	r3, [sp, #0]
+ 8007c22:	4603      	mov	r3, r0
+ 8007c24:	68f8      	ldr	r0, [r7, #12]
+ 8007c26:	f000 f9e1 	bl	8007fec <I2C_RequestMemoryWrite>
+ 8007c2a:	4603      	mov	r3, r0
+ 8007c2c:	2b00      	cmp	r3, #0
+ 8007c2e:	d005      	beq.n	8007c3c <HAL_I2C_Mem_Write+0xc8>
+    {
+      /* Process Unlocked */
+      __HAL_UNLOCK(hi2c);
+ 8007c30:	68fb      	ldr	r3, [r7, #12]
+ 8007c32:	2200      	movs	r2, #0
+ 8007c34:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+      return HAL_ERROR;
+ 8007c38:	2301      	movs	r3, #1
+ 8007c3a:	e0a9      	b.n	8007d90 <HAL_I2C_Mem_Write+0x21c>
+    }
+
+    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
+    if (hi2c->XferCount > MAX_NBYTE_SIZE)
+ 8007c3c:	68fb      	ldr	r3, [r7, #12]
+ 8007c3e:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007c40:	b29b      	uxth	r3, r3
+ 8007c42:	2bff      	cmp	r3, #255	; 0xff
+ 8007c44:	d90e      	bls.n	8007c64 <HAL_I2C_Mem_Write+0xf0>
+    {
+      hi2c->XferSize = MAX_NBYTE_SIZE;
+ 8007c46:	68fb      	ldr	r3, [r7, #12]
+ 8007c48:	22ff      	movs	r2, #255	; 0xff
+ 8007c4a:	851a      	strh	r2, [r3, #40]	; 0x28
+      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
+ 8007c4c:	68fb      	ldr	r3, [r7, #12]
+ 8007c4e:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007c50:	b2da      	uxtb	r2, r3
+ 8007c52:	8979      	ldrh	r1, [r7, #10]
+ 8007c54:	2300      	movs	r3, #0
+ 8007c56:	9300      	str	r3, [sp, #0]
+ 8007c58:	f04f 7380 	mov.w	r3, #16777216	; 0x1000000
+ 8007c5c:	68f8      	ldr	r0, [r7, #12]
+ 8007c5e:	f000 fbb3 	bl	80083c8 <I2C_TransferConfig>
+ 8007c62:	e00f      	b.n	8007c84 <HAL_I2C_Mem_Write+0x110>
+    }
+    else
+    {
+      hi2c->XferSize = hi2c->XferCount;
+ 8007c64:	68fb      	ldr	r3, [r7, #12]
+ 8007c66:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007c68:	b29a      	uxth	r2, r3
+ 8007c6a:	68fb      	ldr	r3, [r7, #12]
+ 8007c6c:	851a      	strh	r2, [r3, #40]	; 0x28
+      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
+ 8007c6e:	68fb      	ldr	r3, [r7, #12]
+ 8007c70:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007c72:	b2da      	uxtb	r2, r3
+ 8007c74:	8979      	ldrh	r1, [r7, #10]
+ 8007c76:	2300      	movs	r3, #0
+ 8007c78:	9300      	str	r3, [sp, #0]
+ 8007c7a:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
+ 8007c7e:	68f8      	ldr	r0, [r7, #12]
+ 8007c80:	f000 fba2 	bl	80083c8 <I2C_TransferConfig>
+    }
+
+    do
+    {
+      /* Wait until TXIS flag is set */
+      if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ 8007c84:	697a      	ldr	r2, [r7, #20]
+ 8007c86:	6ab9      	ldr	r1, [r7, #40]	; 0x28
+ 8007c88:	68f8      	ldr	r0, [r7, #12]
+ 8007c8a:	f000 fabb 	bl	8008204 <I2C_WaitOnTXISFlagUntilTimeout>
+ 8007c8e:	4603      	mov	r3, r0
+ 8007c90:	2b00      	cmp	r3, #0
+ 8007c92:	d001      	beq.n	8007c98 <HAL_I2C_Mem_Write+0x124>
+      {
+        return HAL_ERROR;
+ 8007c94:	2301      	movs	r3, #1
+ 8007c96:	e07b      	b.n	8007d90 <HAL_I2C_Mem_Write+0x21c>
+      }
+
+      /* Write data to TXDR */
+      hi2c->Instance->TXDR = *hi2c->pBuffPtr;
+ 8007c98:	68fb      	ldr	r3, [r7, #12]
+ 8007c9a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8007c9c:	781a      	ldrb	r2, [r3, #0]
+ 8007c9e:	68fb      	ldr	r3, [r7, #12]
+ 8007ca0:	681b      	ldr	r3, [r3, #0]
+ 8007ca2:	629a      	str	r2, [r3, #40]	; 0x28
+
+      /* Increment Buffer pointer */
+      hi2c->pBuffPtr++;
+ 8007ca4:	68fb      	ldr	r3, [r7, #12]
+ 8007ca6:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8007ca8:	1c5a      	adds	r2, r3, #1
+ 8007caa:	68fb      	ldr	r3, [r7, #12]
+ 8007cac:	625a      	str	r2, [r3, #36]	; 0x24
+
+      hi2c->XferCount--;
+ 8007cae:	68fb      	ldr	r3, [r7, #12]
+ 8007cb0:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007cb2:	b29b      	uxth	r3, r3
+ 8007cb4:	3b01      	subs	r3, #1
+ 8007cb6:	b29a      	uxth	r2, r3
+ 8007cb8:	68fb      	ldr	r3, [r7, #12]
+ 8007cba:	855a      	strh	r2, [r3, #42]	; 0x2a
+      hi2c->XferSize--;
+ 8007cbc:	68fb      	ldr	r3, [r7, #12]
+ 8007cbe:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007cc0:	3b01      	subs	r3, #1
+ 8007cc2:	b29a      	uxth	r2, r3
+ 8007cc4:	68fb      	ldr	r3, [r7, #12]
+ 8007cc6:	851a      	strh	r2, [r3, #40]	; 0x28
+
+      if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))
+ 8007cc8:	68fb      	ldr	r3, [r7, #12]
+ 8007cca:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007ccc:	b29b      	uxth	r3, r3
+ 8007cce:	2b00      	cmp	r3, #0
+ 8007cd0:	d034      	beq.n	8007d3c <HAL_I2C_Mem_Write+0x1c8>
+ 8007cd2:	68fb      	ldr	r3, [r7, #12]
+ 8007cd4:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007cd6:	2b00      	cmp	r3, #0
+ 8007cd8:	d130      	bne.n	8007d3c <HAL_I2C_Mem_Write+0x1c8>
+      {
+        /* Wait until TCR flag is set */
+        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
+ 8007cda:	697b      	ldr	r3, [r7, #20]
+ 8007cdc:	9300      	str	r3, [sp, #0]
+ 8007cde:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8007ce0:	2200      	movs	r2, #0
+ 8007ce2:	2180      	movs	r1, #128	; 0x80
+ 8007ce4:	68f8      	ldr	r0, [r7, #12]
+ 8007ce6:	f000 fa4d 	bl	8008184 <I2C_WaitOnFlagUntilTimeout>
+ 8007cea:	4603      	mov	r3, r0
+ 8007cec:	2b00      	cmp	r3, #0
+ 8007cee:	d001      	beq.n	8007cf4 <HAL_I2C_Mem_Write+0x180>
+        {
+          return HAL_ERROR;
+ 8007cf0:	2301      	movs	r3, #1
+ 8007cf2:	e04d      	b.n	8007d90 <HAL_I2C_Mem_Write+0x21c>
+        }
+
+        if (hi2c->XferCount > MAX_NBYTE_SIZE)
+ 8007cf4:	68fb      	ldr	r3, [r7, #12]
+ 8007cf6:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007cf8:	b29b      	uxth	r3, r3
+ 8007cfa:	2bff      	cmp	r3, #255	; 0xff
+ 8007cfc:	d90e      	bls.n	8007d1c <HAL_I2C_Mem_Write+0x1a8>
+        {
+          hi2c->XferSize = MAX_NBYTE_SIZE;
+ 8007cfe:	68fb      	ldr	r3, [r7, #12]
+ 8007d00:	22ff      	movs	r2, #255	; 0xff
+ 8007d02:	851a      	strh	r2, [r3, #40]	; 0x28
+          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
+ 8007d04:	68fb      	ldr	r3, [r7, #12]
+ 8007d06:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007d08:	b2da      	uxtb	r2, r3
+ 8007d0a:	8979      	ldrh	r1, [r7, #10]
+ 8007d0c:	2300      	movs	r3, #0
+ 8007d0e:	9300      	str	r3, [sp, #0]
+ 8007d10:	f04f 7380 	mov.w	r3, #16777216	; 0x1000000
+ 8007d14:	68f8      	ldr	r0, [r7, #12]
+ 8007d16:	f000 fb57 	bl	80083c8 <I2C_TransferConfig>
+ 8007d1a:	e00f      	b.n	8007d3c <HAL_I2C_Mem_Write+0x1c8>
+        }
+        else
+        {
+          hi2c->XferSize = hi2c->XferCount;
+ 8007d1c:	68fb      	ldr	r3, [r7, #12]
+ 8007d1e:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007d20:	b29a      	uxth	r2, r3
+ 8007d22:	68fb      	ldr	r3, [r7, #12]
+ 8007d24:	851a      	strh	r2, [r3, #40]	; 0x28
+          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
+ 8007d26:	68fb      	ldr	r3, [r7, #12]
+ 8007d28:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007d2a:	b2da      	uxtb	r2, r3
+ 8007d2c:	8979      	ldrh	r1, [r7, #10]
+ 8007d2e:	2300      	movs	r3, #0
+ 8007d30:	9300      	str	r3, [sp, #0]
+ 8007d32:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
+ 8007d36:	68f8      	ldr	r0, [r7, #12]
+ 8007d38:	f000 fb46 	bl	80083c8 <I2C_TransferConfig>
+        }
+      }
+
+    }
+    while (hi2c->XferCount > 0U);
+ 8007d3c:	68fb      	ldr	r3, [r7, #12]
+ 8007d3e:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007d40:	b29b      	uxth	r3, r3
+ 8007d42:	2b00      	cmp	r3, #0
+ 8007d44:	d19e      	bne.n	8007c84 <HAL_I2C_Mem_Write+0x110>
+
+    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
+    /* Wait until STOPF flag is reset */
+    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ 8007d46:	697a      	ldr	r2, [r7, #20]
+ 8007d48:	6ab9      	ldr	r1, [r7, #40]	; 0x28
+ 8007d4a:	68f8      	ldr	r0, [r7, #12]
+ 8007d4c:	f000 fa9a 	bl	8008284 <I2C_WaitOnSTOPFlagUntilTimeout>
+ 8007d50:	4603      	mov	r3, r0
+ 8007d52:	2b00      	cmp	r3, #0
+ 8007d54:	d001      	beq.n	8007d5a <HAL_I2C_Mem_Write+0x1e6>
+    {
+      return HAL_ERROR;
+ 8007d56:	2301      	movs	r3, #1
+ 8007d58:	e01a      	b.n	8007d90 <HAL_I2C_Mem_Write+0x21c>
+    }
+
+    /* Clear STOP Flag */
+    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+ 8007d5a:	68fb      	ldr	r3, [r7, #12]
+ 8007d5c:	681b      	ldr	r3, [r3, #0]
+ 8007d5e:	2220      	movs	r2, #32
+ 8007d60:	61da      	str	r2, [r3, #28]
+
+    /* Clear Configuration Register 2 */
+    I2C_RESET_CR2(hi2c);
+ 8007d62:	68fb      	ldr	r3, [r7, #12]
+ 8007d64:	681b      	ldr	r3, [r3, #0]
+ 8007d66:	6859      	ldr	r1, [r3, #4]
+ 8007d68:	68fb      	ldr	r3, [r7, #12]
+ 8007d6a:	681a      	ldr	r2, [r3, #0]
+ 8007d6c:	4b0a      	ldr	r3, [pc, #40]	; (8007d98 <HAL_I2C_Mem_Write+0x224>)
+ 8007d6e:	400b      	ands	r3, r1
+ 8007d70:	6053      	str	r3, [r2, #4]
+
+    hi2c->State = HAL_I2C_STATE_READY;
+ 8007d72:	68fb      	ldr	r3, [r7, #12]
+ 8007d74:	2220      	movs	r2, #32
+ 8007d76:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+    hi2c->Mode  = HAL_I2C_MODE_NONE;
+ 8007d7a:	68fb      	ldr	r3, [r7, #12]
+ 8007d7c:	2200      	movs	r2, #0
+ 8007d7e:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hi2c);
+ 8007d82:	68fb      	ldr	r3, [r7, #12]
+ 8007d84:	2200      	movs	r2, #0
+ 8007d86:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+    return HAL_OK;
+ 8007d8a:	2300      	movs	r3, #0
+ 8007d8c:	e000      	b.n	8007d90 <HAL_I2C_Mem_Write+0x21c>
+  }
+  else
+  {
+    return HAL_BUSY;
+ 8007d8e:	2302      	movs	r3, #2
+  }
+}
+ 8007d90:	4618      	mov	r0, r3
+ 8007d92:	3718      	adds	r7, #24
+ 8007d94:	46bd      	mov	sp, r7
+ 8007d96:	bd80      	pop	{r7, pc}
+ 8007d98:	fe00e800 	.word	0xfe00e800
+
+08007d9c <HAL_I2C_Mem_Read>:
+  * @param  Size Amount of data to be sent
+  * @param  Timeout Timeout duration
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
+{
+ 8007d9c:	b580      	push	{r7, lr}
+ 8007d9e:	b088      	sub	sp, #32
+ 8007da0:	af02      	add	r7, sp, #8
+ 8007da2:	60f8      	str	r0, [r7, #12]
+ 8007da4:	4608      	mov	r0, r1
+ 8007da6:	4611      	mov	r1, r2
+ 8007da8:	461a      	mov	r2, r3
+ 8007daa:	4603      	mov	r3, r0
+ 8007dac:	817b      	strh	r3, [r7, #10]
+ 8007dae:	460b      	mov	r3, r1
+ 8007db0:	813b      	strh	r3, [r7, #8]
+ 8007db2:	4613      	mov	r3, r2
+ 8007db4:	80fb      	strh	r3, [r7, #6]
+  uint32_t tickstart;
+
+  /* Check the parameters */
+  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
+
+  if (hi2c->State == HAL_I2C_STATE_READY)
+ 8007db6:	68fb      	ldr	r3, [r7, #12]
+ 8007db8:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
+ 8007dbc:	b2db      	uxtb	r3, r3
+ 8007dbe:	2b20      	cmp	r3, #32
+ 8007dc0:	f040 80fd 	bne.w	8007fbe <HAL_I2C_Mem_Read+0x222>
+  {
+    if ((pData == NULL) || (Size == 0U))
+ 8007dc4:	6a3b      	ldr	r3, [r7, #32]
+ 8007dc6:	2b00      	cmp	r3, #0
+ 8007dc8:	d002      	beq.n	8007dd0 <HAL_I2C_Mem_Read+0x34>
+ 8007dca:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
+ 8007dcc:	2b00      	cmp	r3, #0
+ 8007dce:	d105      	bne.n	8007ddc <HAL_I2C_Mem_Read+0x40>
+    {
+      hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;
+ 8007dd0:	68fb      	ldr	r3, [r7, #12]
+ 8007dd2:	f44f 7200 	mov.w	r2, #512	; 0x200
+ 8007dd6:	645a      	str	r2, [r3, #68]	; 0x44
+      return  HAL_ERROR;
+ 8007dd8:	2301      	movs	r3, #1
+ 8007dda:	e0f1      	b.n	8007fc0 <HAL_I2C_Mem_Read+0x224>
+    }
+
+    /* Process Locked */
+    __HAL_LOCK(hi2c);
+ 8007ddc:	68fb      	ldr	r3, [r7, #12]
+ 8007dde:	f893 3040 	ldrb.w	r3, [r3, #64]	; 0x40
+ 8007de2:	2b01      	cmp	r3, #1
+ 8007de4:	d101      	bne.n	8007dea <HAL_I2C_Mem_Read+0x4e>
+ 8007de6:	2302      	movs	r3, #2
+ 8007de8:	e0ea      	b.n	8007fc0 <HAL_I2C_Mem_Read+0x224>
+ 8007dea:	68fb      	ldr	r3, [r7, #12]
+ 8007dec:	2201      	movs	r2, #1
+ 8007dee:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+    /* Init tickstart for timeout management*/
+    tickstart = HAL_GetTick();
+ 8007df2:	f7fc fea9 	bl	8004b48 <HAL_GetTick>
+ 8007df6:	6178      	str	r0, [r7, #20]
+
+    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
+ 8007df8:	697b      	ldr	r3, [r7, #20]
+ 8007dfa:	9300      	str	r3, [sp, #0]
+ 8007dfc:	2319      	movs	r3, #25
+ 8007dfe:	2201      	movs	r2, #1
+ 8007e00:	f44f 4100 	mov.w	r1, #32768	; 0x8000
+ 8007e04:	68f8      	ldr	r0, [r7, #12]
+ 8007e06:	f000 f9bd 	bl	8008184 <I2C_WaitOnFlagUntilTimeout>
+ 8007e0a:	4603      	mov	r3, r0
+ 8007e0c:	2b00      	cmp	r3, #0
+ 8007e0e:	d001      	beq.n	8007e14 <HAL_I2C_Mem_Read+0x78>
+    {
+      return HAL_ERROR;
+ 8007e10:	2301      	movs	r3, #1
+ 8007e12:	e0d5      	b.n	8007fc0 <HAL_I2C_Mem_Read+0x224>
+    }
+
+    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
+ 8007e14:	68fb      	ldr	r3, [r7, #12]
+ 8007e16:	2222      	movs	r2, #34	; 0x22
+ 8007e18:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+    hi2c->Mode      = HAL_I2C_MODE_MEM;
+ 8007e1c:	68fb      	ldr	r3, [r7, #12]
+ 8007e1e:	2240      	movs	r2, #64	; 0x40
+ 8007e20:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+ 8007e24:	68fb      	ldr	r3, [r7, #12]
+ 8007e26:	2200      	movs	r2, #0
+ 8007e28:	645a      	str	r2, [r3, #68]	; 0x44
+
+    /* Prepare transfer parameters */
+    hi2c->pBuffPtr  = pData;
+ 8007e2a:	68fb      	ldr	r3, [r7, #12]
+ 8007e2c:	6a3a      	ldr	r2, [r7, #32]
+ 8007e2e:	625a      	str	r2, [r3, #36]	; 0x24
+    hi2c->XferCount = Size;
+ 8007e30:	68fb      	ldr	r3, [r7, #12]
+ 8007e32:	8cba      	ldrh	r2, [r7, #36]	; 0x24
+ 8007e34:	855a      	strh	r2, [r3, #42]	; 0x2a
+    hi2c->XferISR   = NULL;
+ 8007e36:	68fb      	ldr	r3, [r7, #12]
+ 8007e38:	2200      	movs	r2, #0
+ 8007e3a:	635a      	str	r2, [r3, #52]	; 0x34
+
+    /* Send Slave Address and Memory Address */
+    if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
+ 8007e3c:	88f8      	ldrh	r0, [r7, #6]
+ 8007e3e:	893a      	ldrh	r2, [r7, #8]
+ 8007e40:	8979      	ldrh	r1, [r7, #10]
+ 8007e42:	697b      	ldr	r3, [r7, #20]
+ 8007e44:	9301      	str	r3, [sp, #4]
+ 8007e46:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8007e48:	9300      	str	r3, [sp, #0]
+ 8007e4a:	4603      	mov	r3, r0
+ 8007e4c:	68f8      	ldr	r0, [r7, #12]
+ 8007e4e:	f000 f921 	bl	8008094 <I2C_RequestMemoryRead>
+ 8007e52:	4603      	mov	r3, r0
+ 8007e54:	2b00      	cmp	r3, #0
+ 8007e56:	d005      	beq.n	8007e64 <HAL_I2C_Mem_Read+0xc8>
+    {
+      /* Process Unlocked */
+      __HAL_UNLOCK(hi2c);
+ 8007e58:	68fb      	ldr	r3, [r7, #12]
+ 8007e5a:	2200      	movs	r2, #0
+ 8007e5c:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+      return HAL_ERROR;
+ 8007e60:	2301      	movs	r3, #1
+ 8007e62:	e0ad      	b.n	8007fc0 <HAL_I2C_Mem_Read+0x224>
+    }
+
+    /* Send Slave Address */
+    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
+    if (hi2c->XferCount > MAX_NBYTE_SIZE)
+ 8007e64:	68fb      	ldr	r3, [r7, #12]
+ 8007e66:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007e68:	b29b      	uxth	r3, r3
+ 8007e6a:	2bff      	cmp	r3, #255	; 0xff
+ 8007e6c:	d90e      	bls.n	8007e8c <HAL_I2C_Mem_Read+0xf0>
+    {
+      hi2c->XferSize = MAX_NBYTE_SIZE;
+ 8007e6e:	68fb      	ldr	r3, [r7, #12]
+ 8007e70:	22ff      	movs	r2, #255	; 0xff
+ 8007e72:	851a      	strh	r2, [r3, #40]	; 0x28
+      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
+ 8007e74:	68fb      	ldr	r3, [r7, #12]
+ 8007e76:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007e78:	b2da      	uxtb	r2, r3
+ 8007e7a:	8979      	ldrh	r1, [r7, #10]
+ 8007e7c:	4b52      	ldr	r3, [pc, #328]	; (8007fc8 <HAL_I2C_Mem_Read+0x22c>)
+ 8007e7e:	9300      	str	r3, [sp, #0]
+ 8007e80:	f04f 7380 	mov.w	r3, #16777216	; 0x1000000
+ 8007e84:	68f8      	ldr	r0, [r7, #12]
+ 8007e86:	f000 fa9f 	bl	80083c8 <I2C_TransferConfig>
+ 8007e8a:	e00f      	b.n	8007eac <HAL_I2C_Mem_Read+0x110>
+    }
+    else
+    {
+      hi2c->XferSize = hi2c->XferCount;
+ 8007e8c:	68fb      	ldr	r3, [r7, #12]
+ 8007e8e:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007e90:	b29a      	uxth	r2, r3
+ 8007e92:	68fb      	ldr	r3, [r7, #12]
+ 8007e94:	851a      	strh	r2, [r3, #40]	; 0x28
+      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
+ 8007e96:	68fb      	ldr	r3, [r7, #12]
+ 8007e98:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007e9a:	b2da      	uxtb	r2, r3
+ 8007e9c:	8979      	ldrh	r1, [r7, #10]
+ 8007e9e:	4b4a      	ldr	r3, [pc, #296]	; (8007fc8 <HAL_I2C_Mem_Read+0x22c>)
+ 8007ea0:	9300      	str	r3, [sp, #0]
+ 8007ea2:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
+ 8007ea6:	68f8      	ldr	r0, [r7, #12]
+ 8007ea8:	f000 fa8e 	bl	80083c8 <I2C_TransferConfig>
+    }
+
+    do
+    {
+      /* Wait until RXNE flag is set */
+      if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
+ 8007eac:	697b      	ldr	r3, [r7, #20]
+ 8007eae:	9300      	str	r3, [sp, #0]
+ 8007eb0:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8007eb2:	2200      	movs	r2, #0
+ 8007eb4:	2104      	movs	r1, #4
+ 8007eb6:	68f8      	ldr	r0, [r7, #12]
+ 8007eb8:	f000 f964 	bl	8008184 <I2C_WaitOnFlagUntilTimeout>
+ 8007ebc:	4603      	mov	r3, r0
+ 8007ebe:	2b00      	cmp	r3, #0
+ 8007ec0:	d001      	beq.n	8007ec6 <HAL_I2C_Mem_Read+0x12a>
+      {
+        return HAL_ERROR;
+ 8007ec2:	2301      	movs	r3, #1
+ 8007ec4:	e07c      	b.n	8007fc0 <HAL_I2C_Mem_Read+0x224>
+      }
+
+      /* Read data from RXDR */
+      *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;
+ 8007ec6:	68fb      	ldr	r3, [r7, #12]
+ 8007ec8:	681b      	ldr	r3, [r3, #0]
+ 8007eca:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 8007ecc:	68fb      	ldr	r3, [r7, #12]
+ 8007ece:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8007ed0:	b2d2      	uxtb	r2, r2
+ 8007ed2:	701a      	strb	r2, [r3, #0]
+
+      /* Increment Buffer pointer */
+      hi2c->pBuffPtr++;
+ 8007ed4:	68fb      	ldr	r3, [r7, #12]
+ 8007ed6:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8007ed8:	1c5a      	adds	r2, r3, #1
+ 8007eda:	68fb      	ldr	r3, [r7, #12]
+ 8007edc:	625a      	str	r2, [r3, #36]	; 0x24
+
+      hi2c->XferSize--;
+ 8007ede:	68fb      	ldr	r3, [r7, #12]
+ 8007ee0:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007ee2:	3b01      	subs	r3, #1
+ 8007ee4:	b29a      	uxth	r2, r3
+ 8007ee6:	68fb      	ldr	r3, [r7, #12]
+ 8007ee8:	851a      	strh	r2, [r3, #40]	; 0x28
+      hi2c->XferCount--;
+ 8007eea:	68fb      	ldr	r3, [r7, #12]
+ 8007eec:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007eee:	b29b      	uxth	r3, r3
+ 8007ef0:	3b01      	subs	r3, #1
+ 8007ef2:	b29a      	uxth	r2, r3
+ 8007ef4:	68fb      	ldr	r3, [r7, #12]
+ 8007ef6:	855a      	strh	r2, [r3, #42]	; 0x2a
+
+      if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))
+ 8007ef8:	68fb      	ldr	r3, [r7, #12]
+ 8007efa:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007efc:	b29b      	uxth	r3, r3
+ 8007efe:	2b00      	cmp	r3, #0
+ 8007f00:	d034      	beq.n	8007f6c <HAL_I2C_Mem_Read+0x1d0>
+ 8007f02:	68fb      	ldr	r3, [r7, #12]
+ 8007f04:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007f06:	2b00      	cmp	r3, #0
+ 8007f08:	d130      	bne.n	8007f6c <HAL_I2C_Mem_Read+0x1d0>
+      {
+        /* Wait until TCR flag is set */
+        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
+ 8007f0a:	697b      	ldr	r3, [r7, #20]
+ 8007f0c:	9300      	str	r3, [sp, #0]
+ 8007f0e:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8007f10:	2200      	movs	r2, #0
+ 8007f12:	2180      	movs	r1, #128	; 0x80
+ 8007f14:	68f8      	ldr	r0, [r7, #12]
+ 8007f16:	f000 f935 	bl	8008184 <I2C_WaitOnFlagUntilTimeout>
+ 8007f1a:	4603      	mov	r3, r0
+ 8007f1c:	2b00      	cmp	r3, #0
+ 8007f1e:	d001      	beq.n	8007f24 <HAL_I2C_Mem_Read+0x188>
+        {
+          return HAL_ERROR;
+ 8007f20:	2301      	movs	r3, #1
+ 8007f22:	e04d      	b.n	8007fc0 <HAL_I2C_Mem_Read+0x224>
+        }
+
+        if (hi2c->XferCount > MAX_NBYTE_SIZE)
+ 8007f24:	68fb      	ldr	r3, [r7, #12]
+ 8007f26:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007f28:	b29b      	uxth	r3, r3
+ 8007f2a:	2bff      	cmp	r3, #255	; 0xff
+ 8007f2c:	d90e      	bls.n	8007f4c <HAL_I2C_Mem_Read+0x1b0>
+        {
+          hi2c->XferSize = MAX_NBYTE_SIZE;
+ 8007f2e:	68fb      	ldr	r3, [r7, #12]
+ 8007f30:	22ff      	movs	r2, #255	; 0xff
+ 8007f32:	851a      	strh	r2, [r3, #40]	; 0x28
+          I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
+ 8007f34:	68fb      	ldr	r3, [r7, #12]
+ 8007f36:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007f38:	b2da      	uxtb	r2, r3
+ 8007f3a:	8979      	ldrh	r1, [r7, #10]
+ 8007f3c:	2300      	movs	r3, #0
+ 8007f3e:	9300      	str	r3, [sp, #0]
+ 8007f40:	f04f 7380 	mov.w	r3, #16777216	; 0x1000000
+ 8007f44:	68f8      	ldr	r0, [r7, #12]
+ 8007f46:	f000 fa3f 	bl	80083c8 <I2C_TransferConfig>
+ 8007f4a:	e00f      	b.n	8007f6c <HAL_I2C_Mem_Read+0x1d0>
+        }
+        else
+        {
+          hi2c->XferSize = hi2c->XferCount;
+ 8007f4c:	68fb      	ldr	r3, [r7, #12]
+ 8007f4e:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007f50:	b29a      	uxth	r2, r3
+ 8007f52:	68fb      	ldr	r3, [r7, #12]
+ 8007f54:	851a      	strh	r2, [r3, #40]	; 0x28
+          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
+ 8007f56:	68fb      	ldr	r3, [r7, #12]
+ 8007f58:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8007f5a:	b2da      	uxtb	r2, r3
+ 8007f5c:	8979      	ldrh	r1, [r7, #10]
+ 8007f5e:	2300      	movs	r3, #0
+ 8007f60:	9300      	str	r3, [sp, #0]
+ 8007f62:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
+ 8007f66:	68f8      	ldr	r0, [r7, #12]
+ 8007f68:	f000 fa2e 	bl	80083c8 <I2C_TransferConfig>
+        }
+      }
+    }
+    while (hi2c->XferCount > 0U);
+ 8007f6c:	68fb      	ldr	r3, [r7, #12]
+ 8007f6e:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8007f70:	b29b      	uxth	r3, r3
+ 8007f72:	2b00      	cmp	r3, #0
+ 8007f74:	d19a      	bne.n	8007eac <HAL_I2C_Mem_Read+0x110>
+
+    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
+    /* Wait until STOPF flag is reset */
+    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
+ 8007f76:	697a      	ldr	r2, [r7, #20]
+ 8007f78:	6ab9      	ldr	r1, [r7, #40]	; 0x28
+ 8007f7a:	68f8      	ldr	r0, [r7, #12]
+ 8007f7c:	f000 f982 	bl	8008284 <I2C_WaitOnSTOPFlagUntilTimeout>
+ 8007f80:	4603      	mov	r3, r0
+ 8007f82:	2b00      	cmp	r3, #0
+ 8007f84:	d001      	beq.n	8007f8a <HAL_I2C_Mem_Read+0x1ee>
+    {
+      return HAL_ERROR;
+ 8007f86:	2301      	movs	r3, #1
+ 8007f88:	e01a      	b.n	8007fc0 <HAL_I2C_Mem_Read+0x224>
+    }
+
+    /* Clear STOP Flag */
+    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+ 8007f8a:	68fb      	ldr	r3, [r7, #12]
+ 8007f8c:	681b      	ldr	r3, [r3, #0]
+ 8007f8e:	2220      	movs	r2, #32
+ 8007f90:	61da      	str	r2, [r3, #28]
+
+    /* Clear Configuration Register 2 */
+    I2C_RESET_CR2(hi2c);
+ 8007f92:	68fb      	ldr	r3, [r7, #12]
+ 8007f94:	681b      	ldr	r3, [r3, #0]
+ 8007f96:	6859      	ldr	r1, [r3, #4]
+ 8007f98:	68fb      	ldr	r3, [r7, #12]
+ 8007f9a:	681a      	ldr	r2, [r3, #0]
+ 8007f9c:	4b0b      	ldr	r3, [pc, #44]	; (8007fcc <HAL_I2C_Mem_Read+0x230>)
+ 8007f9e:	400b      	ands	r3, r1
+ 8007fa0:	6053      	str	r3, [r2, #4]
+
+    hi2c->State = HAL_I2C_STATE_READY;
+ 8007fa2:	68fb      	ldr	r3, [r7, #12]
+ 8007fa4:	2220      	movs	r2, #32
+ 8007fa6:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+    hi2c->Mode  = HAL_I2C_MODE_NONE;
+ 8007faa:	68fb      	ldr	r3, [r7, #12]
+ 8007fac:	2200      	movs	r2, #0
+ 8007fae:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hi2c);
+ 8007fb2:	68fb      	ldr	r3, [r7, #12]
+ 8007fb4:	2200      	movs	r2, #0
+ 8007fb6:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+    return HAL_OK;
+ 8007fba:	2300      	movs	r3, #0
+ 8007fbc:	e000      	b.n	8007fc0 <HAL_I2C_Mem_Read+0x224>
+  }
+  else
+  {
+    return HAL_BUSY;
+ 8007fbe:	2302      	movs	r3, #2
+  }
+}
+ 8007fc0:	4618      	mov	r0, r3
+ 8007fc2:	3718      	adds	r7, #24
+ 8007fc4:	46bd      	mov	sp, r7
+ 8007fc6:	bd80      	pop	{r7, pc}
+ 8007fc8:	80002400 	.word	0x80002400
+ 8007fcc:	fe00e800 	.word	0xfe00e800
+
+08007fd0 <HAL_I2C_GetState>:
+  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
+  *                the configuration information for the specified I2C.
+  * @retval HAL state
+  */
+HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
+{
+ 8007fd0:	b480      	push	{r7}
+ 8007fd2:	b083      	sub	sp, #12
+ 8007fd4:	af00      	add	r7, sp, #0
+ 8007fd6:	6078      	str	r0, [r7, #4]
+  /* Return I2C handle state */
+  return hi2c->State;
+ 8007fd8:	687b      	ldr	r3, [r7, #4]
+ 8007fda:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
+ 8007fde:	b2db      	uxtb	r3, r3
+}
+ 8007fe0:	4618      	mov	r0, r3
+ 8007fe2:	370c      	adds	r7, #12
+ 8007fe4:	46bd      	mov	sp, r7
+ 8007fe6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8007fea:	4770      	bx	lr
+
+08007fec <I2C_RequestMemoryWrite>:
+  * @param  Timeout Timeout duration
+  * @param  Tickstart Tick start value
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
+{
+ 8007fec:	b580      	push	{r7, lr}
+ 8007fee:	b086      	sub	sp, #24
+ 8007ff0:	af02      	add	r7, sp, #8
+ 8007ff2:	60f8      	str	r0, [r7, #12]
+ 8007ff4:	4608      	mov	r0, r1
+ 8007ff6:	4611      	mov	r1, r2
+ 8007ff8:	461a      	mov	r2, r3
+ 8007ffa:	4603      	mov	r3, r0
+ 8007ffc:	817b      	strh	r3, [r7, #10]
+ 8007ffe:	460b      	mov	r3, r1
+ 8008000:	813b      	strh	r3, [r7, #8]
+ 8008002:	4613      	mov	r3, r2
+ 8008004:	80fb      	strh	r3, [r7, #6]
+  I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
+ 8008006:	88fb      	ldrh	r3, [r7, #6]
+ 8008008:	b2da      	uxtb	r2, r3
+ 800800a:	8979      	ldrh	r1, [r7, #10]
+ 800800c:	4b20      	ldr	r3, [pc, #128]	; (8008090 <I2C_RequestMemoryWrite+0xa4>)
+ 800800e:	9300      	str	r3, [sp, #0]
+ 8008010:	f04f 7380 	mov.w	r3, #16777216	; 0x1000000
+ 8008014:	68f8      	ldr	r0, [r7, #12]
+ 8008016:	f000 f9d7 	bl	80083c8 <I2C_TransferConfig>
+
+  /* Wait until TXIS flag is set */
+  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
+ 800801a:	69fa      	ldr	r2, [r7, #28]
+ 800801c:	69b9      	ldr	r1, [r7, #24]
+ 800801e:	68f8      	ldr	r0, [r7, #12]
+ 8008020:	f000 f8f0 	bl	8008204 <I2C_WaitOnTXISFlagUntilTimeout>
+ 8008024:	4603      	mov	r3, r0
+ 8008026:	2b00      	cmp	r3, #0
+ 8008028:	d001      	beq.n	800802e <I2C_RequestMemoryWrite+0x42>
+  {
+    return HAL_ERROR;
+ 800802a:	2301      	movs	r3, #1
+ 800802c:	e02c      	b.n	8008088 <I2C_RequestMemoryWrite+0x9c>
+  }
+
+  /* If Memory address size is 8Bit */
+  if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
+ 800802e:	88fb      	ldrh	r3, [r7, #6]
+ 8008030:	2b01      	cmp	r3, #1
+ 8008032:	d105      	bne.n	8008040 <I2C_RequestMemoryWrite+0x54>
+  {
+    /* Send Memory Address */
+    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
+ 8008034:	893b      	ldrh	r3, [r7, #8]
+ 8008036:	b2da      	uxtb	r2, r3
+ 8008038:	68fb      	ldr	r3, [r7, #12]
+ 800803a:	681b      	ldr	r3, [r3, #0]
+ 800803c:	629a      	str	r2, [r3, #40]	; 0x28
+ 800803e:	e015      	b.n	800806c <I2C_RequestMemoryWrite+0x80>
+  }
+  /* If Memory address size is 16Bit */
+  else
+  {
+    /* Send MSB of Memory Address */
+    hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
+ 8008040:	893b      	ldrh	r3, [r7, #8]
+ 8008042:	0a1b      	lsrs	r3, r3, #8
+ 8008044:	b29b      	uxth	r3, r3
+ 8008046:	b2da      	uxtb	r2, r3
+ 8008048:	68fb      	ldr	r3, [r7, #12]
+ 800804a:	681b      	ldr	r3, [r3, #0]
+ 800804c:	629a      	str	r2, [r3, #40]	; 0x28
+
+    /* Wait until TXIS flag is set */
+    if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
+ 800804e:	69fa      	ldr	r2, [r7, #28]
+ 8008050:	69b9      	ldr	r1, [r7, #24]
+ 8008052:	68f8      	ldr	r0, [r7, #12]
+ 8008054:	f000 f8d6 	bl	8008204 <I2C_WaitOnTXISFlagUntilTimeout>
+ 8008058:	4603      	mov	r3, r0
+ 800805a:	2b00      	cmp	r3, #0
+ 800805c:	d001      	beq.n	8008062 <I2C_RequestMemoryWrite+0x76>
+    {
+      return HAL_ERROR;
+ 800805e:	2301      	movs	r3, #1
+ 8008060:	e012      	b.n	8008088 <I2C_RequestMemoryWrite+0x9c>
+    }
+
+    /* Send LSB of Memory Address */
+    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
+ 8008062:	893b      	ldrh	r3, [r7, #8]
+ 8008064:	b2da      	uxtb	r2, r3
+ 8008066:	68fb      	ldr	r3, [r7, #12]
+ 8008068:	681b      	ldr	r3, [r3, #0]
+ 800806a:	629a      	str	r2, [r3, #40]	; 0x28
+  }
+
+  /* Wait until TCR flag is set */
+  if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK)
+ 800806c:	69fb      	ldr	r3, [r7, #28]
+ 800806e:	9300      	str	r3, [sp, #0]
+ 8008070:	69bb      	ldr	r3, [r7, #24]
+ 8008072:	2200      	movs	r2, #0
+ 8008074:	2180      	movs	r1, #128	; 0x80
+ 8008076:	68f8      	ldr	r0, [r7, #12]
+ 8008078:	f000 f884 	bl	8008184 <I2C_WaitOnFlagUntilTimeout>
+ 800807c:	4603      	mov	r3, r0
+ 800807e:	2b00      	cmp	r3, #0
+ 8008080:	d001      	beq.n	8008086 <I2C_RequestMemoryWrite+0x9a>
+  {
+    return HAL_ERROR;
+ 8008082:	2301      	movs	r3, #1
+ 8008084:	e000      	b.n	8008088 <I2C_RequestMemoryWrite+0x9c>
+  }
+
+  return HAL_OK;
+ 8008086:	2300      	movs	r3, #0
+}
+ 8008088:	4618      	mov	r0, r3
+ 800808a:	3710      	adds	r7, #16
+ 800808c:	46bd      	mov	sp, r7
+ 800808e:	bd80      	pop	{r7, pc}
+ 8008090:	80002000 	.word	0x80002000
+
+08008094 <I2C_RequestMemoryRead>:
+  * @param  Timeout Timeout duration
+  * @param  Tickstart Tick start value
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
+{
+ 8008094:	b580      	push	{r7, lr}
+ 8008096:	b086      	sub	sp, #24
+ 8008098:	af02      	add	r7, sp, #8
+ 800809a:	60f8      	str	r0, [r7, #12]
+ 800809c:	4608      	mov	r0, r1
+ 800809e:	4611      	mov	r1, r2
+ 80080a0:	461a      	mov	r2, r3
+ 80080a2:	4603      	mov	r3, r0
+ 80080a4:	817b      	strh	r3, [r7, #10]
+ 80080a6:	460b      	mov	r3, r1
+ 80080a8:	813b      	strh	r3, [r7, #8]
+ 80080aa:	4613      	mov	r3, r2
+ 80080ac:	80fb      	strh	r3, [r7, #6]
+  I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
+ 80080ae:	88fb      	ldrh	r3, [r7, #6]
+ 80080b0:	b2da      	uxtb	r2, r3
+ 80080b2:	8979      	ldrh	r1, [r7, #10]
+ 80080b4:	4b20      	ldr	r3, [pc, #128]	; (8008138 <I2C_RequestMemoryRead+0xa4>)
+ 80080b6:	9300      	str	r3, [sp, #0]
+ 80080b8:	2300      	movs	r3, #0
+ 80080ba:	68f8      	ldr	r0, [r7, #12]
+ 80080bc:	f000 f984 	bl	80083c8 <I2C_TransferConfig>
+
+  /* Wait until TXIS flag is set */
+  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
+ 80080c0:	69fa      	ldr	r2, [r7, #28]
+ 80080c2:	69b9      	ldr	r1, [r7, #24]
+ 80080c4:	68f8      	ldr	r0, [r7, #12]
+ 80080c6:	f000 f89d 	bl	8008204 <I2C_WaitOnTXISFlagUntilTimeout>
+ 80080ca:	4603      	mov	r3, r0
+ 80080cc:	2b00      	cmp	r3, #0
+ 80080ce:	d001      	beq.n	80080d4 <I2C_RequestMemoryRead+0x40>
+  {
+    return HAL_ERROR;
+ 80080d0:	2301      	movs	r3, #1
+ 80080d2:	e02c      	b.n	800812e <I2C_RequestMemoryRead+0x9a>
+  }
+
+  /* If Memory address size is 8Bit */
+  if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
+ 80080d4:	88fb      	ldrh	r3, [r7, #6]
+ 80080d6:	2b01      	cmp	r3, #1
+ 80080d8:	d105      	bne.n	80080e6 <I2C_RequestMemoryRead+0x52>
+  {
+    /* Send Memory Address */
+    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
+ 80080da:	893b      	ldrh	r3, [r7, #8]
+ 80080dc:	b2da      	uxtb	r2, r3
+ 80080de:	68fb      	ldr	r3, [r7, #12]
+ 80080e0:	681b      	ldr	r3, [r3, #0]
+ 80080e2:	629a      	str	r2, [r3, #40]	; 0x28
+ 80080e4:	e015      	b.n	8008112 <I2C_RequestMemoryRead+0x7e>
+  }
+  /* If Memory address size is 16Bit */
+  else
+  {
+    /* Send MSB of Memory Address */
+    hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
+ 80080e6:	893b      	ldrh	r3, [r7, #8]
+ 80080e8:	0a1b      	lsrs	r3, r3, #8
+ 80080ea:	b29b      	uxth	r3, r3
+ 80080ec:	b2da      	uxtb	r2, r3
+ 80080ee:	68fb      	ldr	r3, [r7, #12]
+ 80080f0:	681b      	ldr	r3, [r3, #0]
+ 80080f2:	629a      	str	r2, [r3, #40]	; 0x28
+
+    /* Wait until TXIS flag is set */
+    if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
+ 80080f4:	69fa      	ldr	r2, [r7, #28]
+ 80080f6:	69b9      	ldr	r1, [r7, #24]
+ 80080f8:	68f8      	ldr	r0, [r7, #12]
+ 80080fa:	f000 f883 	bl	8008204 <I2C_WaitOnTXISFlagUntilTimeout>
+ 80080fe:	4603      	mov	r3, r0
+ 8008100:	2b00      	cmp	r3, #0
+ 8008102:	d001      	beq.n	8008108 <I2C_RequestMemoryRead+0x74>
+    {
+      return HAL_ERROR;
+ 8008104:	2301      	movs	r3, #1
+ 8008106:	e012      	b.n	800812e <I2C_RequestMemoryRead+0x9a>
+    }
+
+    /* Send LSB of Memory Address */
+    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
+ 8008108:	893b      	ldrh	r3, [r7, #8]
+ 800810a:	b2da      	uxtb	r2, r3
+ 800810c:	68fb      	ldr	r3, [r7, #12]
+ 800810e:	681b      	ldr	r3, [r3, #0]
+ 8008110:	629a      	str	r2, [r3, #40]	; 0x28
+  }
+
+  /* Wait until TC flag is set */
+  if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK)
+ 8008112:	69fb      	ldr	r3, [r7, #28]
+ 8008114:	9300      	str	r3, [sp, #0]
+ 8008116:	69bb      	ldr	r3, [r7, #24]
+ 8008118:	2200      	movs	r2, #0
+ 800811a:	2140      	movs	r1, #64	; 0x40
+ 800811c:	68f8      	ldr	r0, [r7, #12]
+ 800811e:	f000 f831 	bl	8008184 <I2C_WaitOnFlagUntilTimeout>
+ 8008122:	4603      	mov	r3, r0
+ 8008124:	2b00      	cmp	r3, #0
+ 8008126:	d001      	beq.n	800812c <I2C_RequestMemoryRead+0x98>
+  {
+    return HAL_ERROR;
+ 8008128:	2301      	movs	r3, #1
+ 800812a:	e000      	b.n	800812e <I2C_RequestMemoryRead+0x9a>
+  }
+
+  return HAL_OK;
+ 800812c:	2300      	movs	r3, #0
+}
+ 800812e:	4618      	mov	r0, r3
+ 8008130:	3710      	adds	r7, #16
+ 8008132:	46bd      	mov	sp, r7
+ 8008134:	bd80      	pop	{r7, pc}
+ 8008136:	bf00      	nop
+ 8008138:	80002000 	.word	0x80002000
+
+0800813c <I2C_Flush_TXDR>:
+  * @brief  I2C Tx data register flush process.
+  * @param  hi2c I2C handle.
+  * @retval None
+  */
+static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c)
+{
+ 800813c:	b480      	push	{r7}
+ 800813e:	b083      	sub	sp, #12
+ 8008140:	af00      	add	r7, sp, #0
+ 8008142:	6078      	str	r0, [r7, #4]
+  /* If a pending TXIS flag is set */
+  /* Write a dummy data in TXDR to clear it */
+  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET)
+ 8008144:	687b      	ldr	r3, [r7, #4]
+ 8008146:	681b      	ldr	r3, [r3, #0]
+ 8008148:	699b      	ldr	r3, [r3, #24]
+ 800814a:	f003 0302 	and.w	r3, r3, #2
+ 800814e:	2b02      	cmp	r3, #2
+ 8008150:	d103      	bne.n	800815a <I2C_Flush_TXDR+0x1e>
+  {
+    hi2c->Instance->TXDR = 0x00U;
+ 8008152:	687b      	ldr	r3, [r7, #4]
+ 8008154:	681b      	ldr	r3, [r3, #0]
+ 8008156:	2200      	movs	r2, #0
+ 8008158:	629a      	str	r2, [r3, #40]	; 0x28
+  }
+
+  /* Flush TX register if not empty */
+  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
+ 800815a:	687b      	ldr	r3, [r7, #4]
+ 800815c:	681b      	ldr	r3, [r3, #0]
+ 800815e:	699b      	ldr	r3, [r3, #24]
+ 8008160:	f003 0301 	and.w	r3, r3, #1
+ 8008164:	2b01      	cmp	r3, #1
+ 8008166:	d007      	beq.n	8008178 <I2C_Flush_TXDR+0x3c>
+  {
+    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE);
+ 8008168:	687b      	ldr	r3, [r7, #4]
+ 800816a:	681b      	ldr	r3, [r3, #0]
+ 800816c:	699a      	ldr	r2, [r3, #24]
+ 800816e:	687b      	ldr	r3, [r7, #4]
+ 8008170:	681b      	ldr	r3, [r3, #0]
+ 8008172:	f042 0201 	orr.w	r2, r2, #1
+ 8008176:	619a      	str	r2, [r3, #24]
+  }
+}
+ 8008178:	bf00      	nop
+ 800817a:	370c      	adds	r7, #12
+ 800817c:	46bd      	mov	sp, r7
+ 800817e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8008182:	4770      	bx	lr
+
+08008184 <I2C_WaitOnFlagUntilTimeout>:
+  * @param  Timeout Timeout duration
+  * @param  Tickstart Tick start value
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
+{
+ 8008184:	b580      	push	{r7, lr}
+ 8008186:	b084      	sub	sp, #16
+ 8008188:	af00      	add	r7, sp, #0
+ 800818a:	60f8      	str	r0, [r7, #12]
+ 800818c:	60b9      	str	r1, [r7, #8]
+ 800818e:	603b      	str	r3, [r7, #0]
+ 8008190:	4613      	mov	r3, r2
+ 8008192:	71fb      	strb	r3, [r7, #7]
+  while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
+ 8008194:	e022      	b.n	80081dc <I2C_WaitOnFlagUntilTimeout+0x58>
+  {
+    /* Check for the Timeout */
+    if (Timeout != HAL_MAX_DELAY)
+ 8008196:	683b      	ldr	r3, [r7, #0]
+ 8008198:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800819c:	d01e      	beq.n	80081dc <I2C_WaitOnFlagUntilTimeout+0x58>
+    {
+      if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
+ 800819e:	f7fc fcd3 	bl	8004b48 <HAL_GetTick>
+ 80081a2:	4602      	mov	r2, r0
+ 80081a4:	69bb      	ldr	r3, [r7, #24]
+ 80081a6:	1ad3      	subs	r3, r2, r3
+ 80081a8:	683a      	ldr	r2, [r7, #0]
+ 80081aa:	429a      	cmp	r2, r3
+ 80081ac:	d302      	bcc.n	80081b4 <I2C_WaitOnFlagUntilTimeout+0x30>
+ 80081ae:	683b      	ldr	r3, [r7, #0]
+ 80081b0:	2b00      	cmp	r3, #0
+ 80081b2:	d113      	bne.n	80081dc <I2C_WaitOnFlagUntilTimeout+0x58>
+      {
+        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+ 80081b4:	68fb      	ldr	r3, [r7, #12]
+ 80081b6:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 80081b8:	f043 0220 	orr.w	r2, r3, #32
+ 80081bc:	68fb      	ldr	r3, [r7, #12]
+ 80081be:	645a      	str	r2, [r3, #68]	; 0x44
+        hi2c->State = HAL_I2C_STATE_READY;
+ 80081c0:	68fb      	ldr	r3, [r7, #12]
+ 80081c2:	2220      	movs	r2, #32
+ 80081c4:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+        hi2c->Mode = HAL_I2C_MODE_NONE;
+ 80081c8:	68fb      	ldr	r3, [r7, #12]
+ 80081ca:	2200      	movs	r2, #0
+ 80081cc:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+
+        /* Process Unlocked */
+        __HAL_UNLOCK(hi2c);
+ 80081d0:	68fb      	ldr	r3, [r7, #12]
+ 80081d2:	2200      	movs	r2, #0
+ 80081d4:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+        return HAL_ERROR;
+ 80081d8:	2301      	movs	r3, #1
+ 80081da:	e00f      	b.n	80081fc <I2C_WaitOnFlagUntilTimeout+0x78>
+  while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
+ 80081dc:	68fb      	ldr	r3, [r7, #12]
+ 80081de:	681b      	ldr	r3, [r3, #0]
+ 80081e0:	699a      	ldr	r2, [r3, #24]
+ 80081e2:	68bb      	ldr	r3, [r7, #8]
+ 80081e4:	4013      	ands	r3, r2
+ 80081e6:	68ba      	ldr	r2, [r7, #8]
+ 80081e8:	429a      	cmp	r2, r3
+ 80081ea:	bf0c      	ite	eq
+ 80081ec:	2301      	moveq	r3, #1
+ 80081ee:	2300      	movne	r3, #0
+ 80081f0:	b2db      	uxtb	r3, r3
+ 80081f2:	461a      	mov	r2, r3
+ 80081f4:	79fb      	ldrb	r3, [r7, #7]
+ 80081f6:	429a      	cmp	r2, r3
+ 80081f8:	d0cd      	beq.n	8008196 <I2C_WaitOnFlagUntilTimeout+0x12>
+      }
+    }
+  }
+  return HAL_OK;
+ 80081fa:	2300      	movs	r3, #0
+}
+ 80081fc:	4618      	mov	r0, r3
+ 80081fe:	3710      	adds	r7, #16
+ 8008200:	46bd      	mov	sp, r7
+ 8008202:	bd80      	pop	{r7, pc}
+
+08008204 <I2C_WaitOnTXISFlagUntilTimeout>:
+  * @param  Timeout Timeout duration
+  * @param  Tickstart Tick start value
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
+{
+ 8008204:	b580      	push	{r7, lr}
+ 8008206:	b084      	sub	sp, #16
+ 8008208:	af00      	add	r7, sp, #0
+ 800820a:	60f8      	str	r0, [r7, #12]
+ 800820c:	60b9      	str	r1, [r7, #8]
+ 800820e:	607a      	str	r2, [r7, #4]
+  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
+ 8008210:	e02c      	b.n	800826c <I2C_WaitOnTXISFlagUntilTimeout+0x68>
+  {
+    /* Check if a NACK is detected */
+    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
+ 8008212:	687a      	ldr	r2, [r7, #4]
+ 8008214:	68b9      	ldr	r1, [r7, #8]
+ 8008216:	68f8      	ldr	r0, [r7, #12]
+ 8008218:	f000 f870 	bl	80082fc <I2C_IsAcknowledgeFailed>
+ 800821c:	4603      	mov	r3, r0
+ 800821e:	2b00      	cmp	r3, #0
+ 8008220:	d001      	beq.n	8008226 <I2C_WaitOnTXISFlagUntilTimeout+0x22>
+    {
+      return HAL_ERROR;
+ 8008222:	2301      	movs	r3, #1
+ 8008224:	e02a      	b.n	800827c <I2C_WaitOnTXISFlagUntilTimeout+0x78>
+    }
+
+    /* Check for the Timeout */
+    if (Timeout != HAL_MAX_DELAY)
+ 8008226:	68bb      	ldr	r3, [r7, #8]
+ 8008228:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800822c:	d01e      	beq.n	800826c <I2C_WaitOnTXISFlagUntilTimeout+0x68>
+    {
+      if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
+ 800822e:	f7fc fc8b 	bl	8004b48 <HAL_GetTick>
+ 8008232:	4602      	mov	r2, r0
+ 8008234:	687b      	ldr	r3, [r7, #4]
+ 8008236:	1ad3      	subs	r3, r2, r3
+ 8008238:	68ba      	ldr	r2, [r7, #8]
+ 800823a:	429a      	cmp	r2, r3
+ 800823c:	d302      	bcc.n	8008244 <I2C_WaitOnTXISFlagUntilTimeout+0x40>
+ 800823e:	68bb      	ldr	r3, [r7, #8]
+ 8008240:	2b00      	cmp	r3, #0
+ 8008242:	d113      	bne.n	800826c <I2C_WaitOnTXISFlagUntilTimeout+0x68>
+      {
+        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+ 8008244:	68fb      	ldr	r3, [r7, #12]
+ 8008246:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8008248:	f043 0220 	orr.w	r2, r3, #32
+ 800824c:	68fb      	ldr	r3, [r7, #12]
+ 800824e:	645a      	str	r2, [r3, #68]	; 0x44
+        hi2c->State = HAL_I2C_STATE_READY;
+ 8008250:	68fb      	ldr	r3, [r7, #12]
+ 8008252:	2220      	movs	r2, #32
+ 8008254:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+        hi2c->Mode = HAL_I2C_MODE_NONE;
+ 8008258:	68fb      	ldr	r3, [r7, #12]
+ 800825a:	2200      	movs	r2, #0
+ 800825c:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+
+        /* Process Unlocked */
+        __HAL_UNLOCK(hi2c);
+ 8008260:	68fb      	ldr	r3, [r7, #12]
+ 8008262:	2200      	movs	r2, #0
+ 8008264:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+        return HAL_ERROR;
+ 8008268:	2301      	movs	r3, #1
+ 800826a:	e007      	b.n	800827c <I2C_WaitOnTXISFlagUntilTimeout+0x78>
+  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
+ 800826c:	68fb      	ldr	r3, [r7, #12]
+ 800826e:	681b      	ldr	r3, [r3, #0]
+ 8008270:	699b      	ldr	r3, [r3, #24]
+ 8008272:	f003 0302 	and.w	r3, r3, #2
+ 8008276:	2b02      	cmp	r3, #2
+ 8008278:	d1cb      	bne.n	8008212 <I2C_WaitOnTXISFlagUntilTimeout+0xe>
+      }
+    }
+  }
+  return HAL_OK;
+ 800827a:	2300      	movs	r3, #0
+}
+ 800827c:	4618      	mov	r0, r3
+ 800827e:	3710      	adds	r7, #16
+ 8008280:	46bd      	mov	sp, r7
+ 8008282:	bd80      	pop	{r7, pc}
+
+08008284 <I2C_WaitOnSTOPFlagUntilTimeout>:
+  * @param  Timeout Timeout duration
+  * @param  Tickstart Tick start value
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
+{
+ 8008284:	b580      	push	{r7, lr}
+ 8008286:	b084      	sub	sp, #16
+ 8008288:	af00      	add	r7, sp, #0
+ 800828a:	60f8      	str	r0, [r7, #12]
+ 800828c:	60b9      	str	r1, [r7, #8]
+ 800828e:	607a      	str	r2, [r7, #4]
+  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
+ 8008290:	e028      	b.n	80082e4 <I2C_WaitOnSTOPFlagUntilTimeout+0x60>
+  {
+    /* Check if a NACK is detected */
+    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
+ 8008292:	687a      	ldr	r2, [r7, #4]
+ 8008294:	68b9      	ldr	r1, [r7, #8]
+ 8008296:	68f8      	ldr	r0, [r7, #12]
+ 8008298:	f000 f830 	bl	80082fc <I2C_IsAcknowledgeFailed>
+ 800829c:	4603      	mov	r3, r0
+ 800829e:	2b00      	cmp	r3, #0
+ 80082a0:	d001      	beq.n	80082a6 <I2C_WaitOnSTOPFlagUntilTimeout+0x22>
+    {
+      return HAL_ERROR;
+ 80082a2:	2301      	movs	r3, #1
+ 80082a4:	e026      	b.n	80082f4 <I2C_WaitOnSTOPFlagUntilTimeout+0x70>
+    }
+
+    /* Check for the Timeout */
+    if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
+ 80082a6:	f7fc fc4f 	bl	8004b48 <HAL_GetTick>
+ 80082aa:	4602      	mov	r2, r0
+ 80082ac:	687b      	ldr	r3, [r7, #4]
+ 80082ae:	1ad3      	subs	r3, r2, r3
+ 80082b0:	68ba      	ldr	r2, [r7, #8]
+ 80082b2:	429a      	cmp	r2, r3
+ 80082b4:	d302      	bcc.n	80082bc <I2C_WaitOnSTOPFlagUntilTimeout+0x38>
+ 80082b6:	68bb      	ldr	r3, [r7, #8]
+ 80082b8:	2b00      	cmp	r3, #0
+ 80082ba:	d113      	bne.n	80082e4 <I2C_WaitOnSTOPFlagUntilTimeout+0x60>
+    {
+      hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+ 80082bc:	68fb      	ldr	r3, [r7, #12]
+ 80082be:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 80082c0:	f043 0220 	orr.w	r2, r3, #32
+ 80082c4:	68fb      	ldr	r3, [r7, #12]
+ 80082c6:	645a      	str	r2, [r3, #68]	; 0x44
+      hi2c->State = HAL_I2C_STATE_READY;
+ 80082c8:	68fb      	ldr	r3, [r7, #12]
+ 80082ca:	2220      	movs	r2, #32
+ 80082cc:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+      hi2c->Mode = HAL_I2C_MODE_NONE;
+ 80082d0:	68fb      	ldr	r3, [r7, #12]
+ 80082d2:	2200      	movs	r2, #0
+ 80082d4:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+
+      /* Process Unlocked */
+      __HAL_UNLOCK(hi2c);
+ 80082d8:	68fb      	ldr	r3, [r7, #12]
+ 80082da:	2200      	movs	r2, #0
+ 80082dc:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+      return HAL_ERROR;
+ 80082e0:	2301      	movs	r3, #1
+ 80082e2:	e007      	b.n	80082f4 <I2C_WaitOnSTOPFlagUntilTimeout+0x70>
+  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
+ 80082e4:	68fb      	ldr	r3, [r7, #12]
+ 80082e6:	681b      	ldr	r3, [r3, #0]
+ 80082e8:	699b      	ldr	r3, [r3, #24]
+ 80082ea:	f003 0320 	and.w	r3, r3, #32
+ 80082ee:	2b20      	cmp	r3, #32
+ 80082f0:	d1cf      	bne.n	8008292 <I2C_WaitOnSTOPFlagUntilTimeout+0xe>
+    }
+  }
+  return HAL_OK;
+ 80082f2:	2300      	movs	r3, #0
+}
+ 80082f4:	4618      	mov	r0, r3
+ 80082f6:	3710      	adds	r7, #16
+ 80082f8:	46bd      	mov	sp, r7
+ 80082fa:	bd80      	pop	{r7, pc}
+
+080082fc <I2C_IsAcknowledgeFailed>:
+  * @param  Timeout Timeout duration
+  * @param  Tickstart Tick start value
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
+{
+ 80082fc:	b580      	push	{r7, lr}
+ 80082fe:	b084      	sub	sp, #16
+ 8008300:	af00      	add	r7, sp, #0
+ 8008302:	60f8      	str	r0, [r7, #12]
+ 8008304:	60b9      	str	r1, [r7, #8]
+ 8008306:	607a      	str	r2, [r7, #4]
+  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
+ 8008308:	68fb      	ldr	r3, [r7, #12]
+ 800830a:	681b      	ldr	r3, [r3, #0]
+ 800830c:	699b      	ldr	r3, [r3, #24]
+ 800830e:	f003 0310 	and.w	r3, r3, #16
+ 8008312:	2b10      	cmp	r3, #16
+ 8008314:	d151      	bne.n	80083ba <I2C_IsAcknowledgeFailed+0xbe>
+  {
+    /* Wait until STOP Flag is reset */
+    /* AutoEnd should be initiate after AF */
+    while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
+ 8008316:	e022      	b.n	800835e <I2C_IsAcknowledgeFailed+0x62>
+    {
+      /* Check for the Timeout */
+      if (Timeout != HAL_MAX_DELAY)
+ 8008318:	68bb      	ldr	r3, [r7, #8]
+ 800831a:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800831e:	d01e      	beq.n	800835e <I2C_IsAcknowledgeFailed+0x62>
+      {
+        if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
+ 8008320:	f7fc fc12 	bl	8004b48 <HAL_GetTick>
+ 8008324:	4602      	mov	r2, r0
+ 8008326:	687b      	ldr	r3, [r7, #4]
+ 8008328:	1ad3      	subs	r3, r2, r3
+ 800832a:	68ba      	ldr	r2, [r7, #8]
+ 800832c:	429a      	cmp	r2, r3
+ 800832e:	d302      	bcc.n	8008336 <I2C_IsAcknowledgeFailed+0x3a>
+ 8008330:	68bb      	ldr	r3, [r7, #8]
+ 8008332:	2b00      	cmp	r3, #0
+ 8008334:	d113      	bne.n	800835e <I2C_IsAcknowledgeFailed+0x62>
+        {
+          hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
+ 8008336:	68fb      	ldr	r3, [r7, #12]
+ 8008338:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 800833a:	f043 0220 	orr.w	r2, r3, #32
+ 800833e:	68fb      	ldr	r3, [r7, #12]
+ 8008340:	645a      	str	r2, [r3, #68]	; 0x44
+          hi2c->State = HAL_I2C_STATE_READY;
+ 8008342:	68fb      	ldr	r3, [r7, #12]
+ 8008344:	2220      	movs	r2, #32
+ 8008346:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+          hi2c->Mode = HAL_I2C_MODE_NONE;
+ 800834a:	68fb      	ldr	r3, [r7, #12]
+ 800834c:	2200      	movs	r2, #0
+ 800834e:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+
+          /* Process Unlocked */
+          __HAL_UNLOCK(hi2c);
+ 8008352:	68fb      	ldr	r3, [r7, #12]
+ 8008354:	2200      	movs	r2, #0
+ 8008356:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+          return HAL_ERROR;
+ 800835a:	2301      	movs	r3, #1
+ 800835c:	e02e      	b.n	80083bc <I2C_IsAcknowledgeFailed+0xc0>
+    while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
+ 800835e:	68fb      	ldr	r3, [r7, #12]
+ 8008360:	681b      	ldr	r3, [r3, #0]
+ 8008362:	699b      	ldr	r3, [r3, #24]
+ 8008364:	f003 0320 	and.w	r3, r3, #32
+ 8008368:	2b20      	cmp	r3, #32
+ 800836a:	d1d5      	bne.n	8008318 <I2C_IsAcknowledgeFailed+0x1c>
+        }
+      }
+    }
+
+    /* Clear NACKF Flag */
+    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
+ 800836c:	68fb      	ldr	r3, [r7, #12]
+ 800836e:	681b      	ldr	r3, [r3, #0]
+ 8008370:	2210      	movs	r2, #16
+ 8008372:	61da      	str	r2, [r3, #28]
+
+    /* Clear STOP Flag */
+    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
+ 8008374:	68fb      	ldr	r3, [r7, #12]
+ 8008376:	681b      	ldr	r3, [r3, #0]
+ 8008378:	2220      	movs	r2, #32
+ 800837a:	61da      	str	r2, [r3, #28]
+
+    /* Flush TX register */
+    I2C_Flush_TXDR(hi2c);
+ 800837c:	68f8      	ldr	r0, [r7, #12]
+ 800837e:	f7ff fedd 	bl	800813c <I2C_Flush_TXDR>
+
+    /* Clear Configuration Register 2 */
+    I2C_RESET_CR2(hi2c);
+ 8008382:	68fb      	ldr	r3, [r7, #12]
+ 8008384:	681b      	ldr	r3, [r3, #0]
+ 8008386:	6859      	ldr	r1, [r3, #4]
+ 8008388:	68fb      	ldr	r3, [r7, #12]
+ 800838a:	681a      	ldr	r2, [r3, #0]
+ 800838c:	4b0d      	ldr	r3, [pc, #52]	; (80083c4 <I2C_IsAcknowledgeFailed+0xc8>)
+ 800838e:	400b      	ands	r3, r1
+ 8008390:	6053      	str	r3, [r2, #4]
+
+    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
+ 8008392:	68fb      	ldr	r3, [r7, #12]
+ 8008394:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8008396:	f043 0204 	orr.w	r2, r3, #4
+ 800839a:	68fb      	ldr	r3, [r7, #12]
+ 800839c:	645a      	str	r2, [r3, #68]	; 0x44
+    hi2c->State = HAL_I2C_STATE_READY;
+ 800839e:	68fb      	ldr	r3, [r7, #12]
+ 80083a0:	2220      	movs	r2, #32
+ 80083a2:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+    hi2c->Mode = HAL_I2C_MODE_NONE;
+ 80083a6:	68fb      	ldr	r3, [r7, #12]
+ 80083a8:	2200      	movs	r2, #0
+ 80083aa:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hi2c);
+ 80083ae:	68fb      	ldr	r3, [r7, #12]
+ 80083b0:	2200      	movs	r2, #0
+ 80083b2:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+    return HAL_ERROR;
+ 80083b6:	2301      	movs	r3, #1
+ 80083b8:	e000      	b.n	80083bc <I2C_IsAcknowledgeFailed+0xc0>
+  }
+  return HAL_OK;
+ 80083ba:	2300      	movs	r3, #0
+}
+ 80083bc:	4618      	mov	r0, r3
+ 80083be:	3710      	adds	r7, #16
+ 80083c0:	46bd      	mov	sp, r7
+ 80083c2:	bd80      	pop	{r7, pc}
+ 80083c4:	fe00e800 	.word	0xfe00e800
+
+080083c8 <I2C_TransferConfig>:
+  *     @arg @ref I2C_GENERATE_START_READ Generate Restart for read request.
+  *     @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request.
+  * @retval None
+  */
+static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
+{
+ 80083c8:	b480      	push	{r7}
+ 80083ca:	b085      	sub	sp, #20
+ 80083cc:	af00      	add	r7, sp, #0
+ 80083ce:	60f8      	str	r0, [r7, #12]
+ 80083d0:	607b      	str	r3, [r7, #4]
+ 80083d2:	460b      	mov	r3, r1
+ 80083d4:	817b      	strh	r3, [r7, #10]
+ 80083d6:	4613      	mov	r3, r2
+ 80083d8:	727b      	strb	r3, [r7, #9]
+  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
+  assert_param(IS_TRANSFER_MODE(Mode));
+  assert_param(IS_TRANSFER_REQUEST(Request));
+
+  /* update CR2 register */
+  MODIFY_REG(hi2c->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP)), \
+ 80083da:	68fb      	ldr	r3, [r7, #12]
+ 80083dc:	681b      	ldr	r3, [r3, #0]
+ 80083de:	685a      	ldr	r2, [r3, #4]
+ 80083e0:	69bb      	ldr	r3, [r7, #24]
+ 80083e2:	0d5b      	lsrs	r3, r3, #21
+ 80083e4:	f403 6180 	and.w	r1, r3, #1024	; 0x400
+ 80083e8:	4b0d      	ldr	r3, [pc, #52]	; (8008420 <I2C_TransferConfig+0x58>)
+ 80083ea:	430b      	orrs	r3, r1
+ 80083ec:	43db      	mvns	r3, r3
+ 80083ee:	ea02 0103 	and.w	r1, r2, r3
+ 80083f2:	897b      	ldrh	r3, [r7, #10]
+ 80083f4:	f3c3 0209 	ubfx	r2, r3, #0, #10
+ 80083f8:	7a7b      	ldrb	r3, [r7, #9]
+ 80083fa:	041b      	lsls	r3, r3, #16
+ 80083fc:	f403 037f 	and.w	r3, r3, #16711680	; 0xff0000
+ 8008400:	431a      	orrs	r2, r3
+ 8008402:	687b      	ldr	r3, [r7, #4]
+ 8008404:	431a      	orrs	r2, r3
+ 8008406:	69bb      	ldr	r3, [r7, #24]
+ 8008408:	431a      	orrs	r2, r3
+ 800840a:	68fb      	ldr	r3, [r7, #12]
+ 800840c:	681b      	ldr	r3, [r3, #0]
+ 800840e:	430a      	orrs	r2, r1
+ 8008410:	605a      	str	r2, [r3, #4]
+             (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request));
+}
+ 8008412:	bf00      	nop
+ 8008414:	3714      	adds	r7, #20
+ 8008416:	46bd      	mov	sp, r7
+ 8008418:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800841c:	4770      	bx	lr
+ 800841e:	bf00      	nop
+ 8008420:	03ff63ff 	.word	0x03ff63ff
+
+08008424 <HAL_I2CEx_ConfigAnalogFilter>:
+  *                the configuration information for the specified I2Cx peripheral.
+  * @param  AnalogFilter New state of the Analog filter.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
+{
+ 8008424:	b480      	push	{r7}
+ 8008426:	b083      	sub	sp, #12
+ 8008428:	af00      	add	r7, sp, #0
+ 800842a:	6078      	str	r0, [r7, #4]
+ 800842c:	6039      	str	r1, [r7, #0]
+  /* Check the parameters */
+  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
+  assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
+
+  if (hi2c->State == HAL_I2C_STATE_READY)
+ 800842e:	687b      	ldr	r3, [r7, #4]
+ 8008430:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
+ 8008434:	b2db      	uxtb	r3, r3
+ 8008436:	2b20      	cmp	r3, #32
+ 8008438:	d138      	bne.n	80084ac <HAL_I2CEx_ConfigAnalogFilter+0x88>
+  {
+    /* Process Locked */
+    __HAL_LOCK(hi2c);
+ 800843a:	687b      	ldr	r3, [r7, #4]
+ 800843c:	f893 3040 	ldrb.w	r3, [r3, #64]	; 0x40
+ 8008440:	2b01      	cmp	r3, #1
+ 8008442:	d101      	bne.n	8008448 <HAL_I2CEx_ConfigAnalogFilter+0x24>
+ 8008444:	2302      	movs	r3, #2
+ 8008446:	e032      	b.n	80084ae <HAL_I2CEx_ConfigAnalogFilter+0x8a>
+ 8008448:	687b      	ldr	r3, [r7, #4]
+ 800844a:	2201      	movs	r2, #1
+ 800844c:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+    hi2c->State = HAL_I2C_STATE_BUSY;
+ 8008450:	687b      	ldr	r3, [r7, #4]
+ 8008452:	2224      	movs	r2, #36	; 0x24
+ 8008454:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+
+    /* Disable the selected I2C peripheral */
+    __HAL_I2C_DISABLE(hi2c);
+ 8008458:	687b      	ldr	r3, [r7, #4]
+ 800845a:	681b      	ldr	r3, [r3, #0]
+ 800845c:	681a      	ldr	r2, [r3, #0]
+ 800845e:	687b      	ldr	r3, [r7, #4]
+ 8008460:	681b      	ldr	r3, [r3, #0]
+ 8008462:	f022 0201 	bic.w	r2, r2, #1
+ 8008466:	601a      	str	r2, [r3, #0]
+
+    /* Reset I2Cx ANOFF bit */
+    hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
+ 8008468:	687b      	ldr	r3, [r7, #4]
+ 800846a:	681b      	ldr	r3, [r3, #0]
+ 800846c:	681a      	ldr	r2, [r3, #0]
+ 800846e:	687b      	ldr	r3, [r7, #4]
+ 8008470:	681b      	ldr	r3, [r3, #0]
+ 8008472:	f422 5280 	bic.w	r2, r2, #4096	; 0x1000
+ 8008476:	601a      	str	r2, [r3, #0]
+
+    /* Set analog filter bit*/
+    hi2c->Instance->CR1 |= AnalogFilter;
+ 8008478:	687b      	ldr	r3, [r7, #4]
+ 800847a:	681b      	ldr	r3, [r3, #0]
+ 800847c:	6819      	ldr	r1, [r3, #0]
+ 800847e:	687b      	ldr	r3, [r7, #4]
+ 8008480:	681b      	ldr	r3, [r3, #0]
+ 8008482:	683a      	ldr	r2, [r7, #0]
+ 8008484:	430a      	orrs	r2, r1
+ 8008486:	601a      	str	r2, [r3, #0]
+
+    __HAL_I2C_ENABLE(hi2c);
+ 8008488:	687b      	ldr	r3, [r7, #4]
+ 800848a:	681b      	ldr	r3, [r3, #0]
+ 800848c:	681a      	ldr	r2, [r3, #0]
+ 800848e:	687b      	ldr	r3, [r7, #4]
+ 8008490:	681b      	ldr	r3, [r3, #0]
+ 8008492:	f042 0201 	orr.w	r2, r2, #1
+ 8008496:	601a      	str	r2, [r3, #0]
+
+    hi2c->State = HAL_I2C_STATE_READY;
+ 8008498:	687b      	ldr	r3, [r7, #4]
+ 800849a:	2220      	movs	r2, #32
+ 800849c:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hi2c);
+ 80084a0:	687b      	ldr	r3, [r7, #4]
+ 80084a2:	2200      	movs	r2, #0
+ 80084a4:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+    return HAL_OK;
+ 80084a8:	2300      	movs	r3, #0
+ 80084aa:	e000      	b.n	80084ae <HAL_I2CEx_ConfigAnalogFilter+0x8a>
+  }
+  else
+  {
+    return HAL_BUSY;
+ 80084ac:	2302      	movs	r3, #2
+  }
+}
+ 80084ae:	4618      	mov	r0, r3
+ 80084b0:	370c      	adds	r7, #12
+ 80084b2:	46bd      	mov	sp, r7
+ 80084b4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80084b8:	4770      	bx	lr
+
+080084ba <HAL_I2CEx_ConfigDigitalFilter>:
+  *                the configuration information for the specified I2Cx peripheral.
+  * @param  DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
+{
+ 80084ba:	b480      	push	{r7}
+ 80084bc:	b085      	sub	sp, #20
+ 80084be:	af00      	add	r7, sp, #0
+ 80084c0:	6078      	str	r0, [r7, #4]
+ 80084c2:	6039      	str	r1, [r7, #0]
+
+  /* Check the parameters */
+  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
+  assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
+
+  if (hi2c->State == HAL_I2C_STATE_READY)
+ 80084c4:	687b      	ldr	r3, [r7, #4]
+ 80084c6:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
+ 80084ca:	b2db      	uxtb	r3, r3
+ 80084cc:	2b20      	cmp	r3, #32
+ 80084ce:	d139      	bne.n	8008544 <HAL_I2CEx_ConfigDigitalFilter+0x8a>
+  {
+    /* Process Locked */
+    __HAL_LOCK(hi2c);
+ 80084d0:	687b      	ldr	r3, [r7, #4]
+ 80084d2:	f893 3040 	ldrb.w	r3, [r3, #64]	; 0x40
+ 80084d6:	2b01      	cmp	r3, #1
+ 80084d8:	d101      	bne.n	80084de <HAL_I2CEx_ConfigDigitalFilter+0x24>
+ 80084da:	2302      	movs	r3, #2
+ 80084dc:	e033      	b.n	8008546 <HAL_I2CEx_ConfigDigitalFilter+0x8c>
+ 80084de:	687b      	ldr	r3, [r7, #4]
+ 80084e0:	2201      	movs	r2, #1
+ 80084e2:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+    hi2c->State = HAL_I2C_STATE_BUSY;
+ 80084e6:	687b      	ldr	r3, [r7, #4]
+ 80084e8:	2224      	movs	r2, #36	; 0x24
+ 80084ea:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+
+    /* Disable the selected I2C peripheral */
+    __HAL_I2C_DISABLE(hi2c);
+ 80084ee:	687b      	ldr	r3, [r7, #4]
+ 80084f0:	681b      	ldr	r3, [r3, #0]
+ 80084f2:	681a      	ldr	r2, [r3, #0]
+ 80084f4:	687b      	ldr	r3, [r7, #4]
+ 80084f6:	681b      	ldr	r3, [r3, #0]
+ 80084f8:	f022 0201 	bic.w	r2, r2, #1
+ 80084fc:	601a      	str	r2, [r3, #0]
+
+    /* Get the old register value */
+    tmpreg = hi2c->Instance->CR1;
+ 80084fe:	687b      	ldr	r3, [r7, #4]
+ 8008500:	681b      	ldr	r3, [r3, #0]
+ 8008502:	681b      	ldr	r3, [r3, #0]
+ 8008504:	60fb      	str	r3, [r7, #12]
+
+    /* Reset I2Cx DNF bits [11:8] */
+    tmpreg &= ~(I2C_CR1_DNF);
+ 8008506:	68fb      	ldr	r3, [r7, #12]
+ 8008508:	f423 6370 	bic.w	r3, r3, #3840	; 0xf00
+ 800850c:	60fb      	str	r3, [r7, #12]
+
+    /* Set I2Cx DNF coefficient */
+    tmpreg |= DigitalFilter << 8U;
+ 800850e:	683b      	ldr	r3, [r7, #0]
+ 8008510:	021b      	lsls	r3, r3, #8
+ 8008512:	68fa      	ldr	r2, [r7, #12]
+ 8008514:	4313      	orrs	r3, r2
+ 8008516:	60fb      	str	r3, [r7, #12]
+
+    /* Store the new register value */
+    hi2c->Instance->CR1 = tmpreg;
+ 8008518:	687b      	ldr	r3, [r7, #4]
+ 800851a:	681b      	ldr	r3, [r3, #0]
+ 800851c:	68fa      	ldr	r2, [r7, #12]
+ 800851e:	601a      	str	r2, [r3, #0]
+
+    __HAL_I2C_ENABLE(hi2c);
+ 8008520:	687b      	ldr	r3, [r7, #4]
+ 8008522:	681b      	ldr	r3, [r3, #0]
+ 8008524:	681a      	ldr	r2, [r3, #0]
+ 8008526:	687b      	ldr	r3, [r7, #4]
+ 8008528:	681b      	ldr	r3, [r3, #0]
+ 800852a:	f042 0201 	orr.w	r2, r2, #1
+ 800852e:	601a      	str	r2, [r3, #0]
+
+    hi2c->State = HAL_I2C_STATE_READY;
+ 8008530:	687b      	ldr	r3, [r7, #4]
+ 8008532:	2220      	movs	r2, #32
+ 8008534:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hi2c);
+ 8008538:	687b      	ldr	r3, [r7, #4]
+ 800853a:	2200      	movs	r2, #0
+ 800853c:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
+
+    return HAL_OK;
+ 8008540:	2300      	movs	r3, #0
+ 8008542:	e000      	b.n	8008546 <HAL_I2CEx_ConfigDigitalFilter+0x8c>
+  }
+  else
+  {
+    return HAL_BUSY;
+ 8008544:	2302      	movs	r3, #2
+  }
+}
+ 8008546:	4618      	mov	r0, r3
+ 8008548:	3714      	adds	r7, #20
+ 800854a:	46bd      	mov	sp, r7
+ 800854c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8008550:	4770      	bx	lr
+	...
+
+08008554 <HAL_LTDC_Init>:
+  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
+  *                the configuration information for the LTDC.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_LTDC_Init(LTDC_HandleTypeDef *hltdc)
+{
+ 8008554:	b580      	push	{r7, lr}
+ 8008556:	b084      	sub	sp, #16
+ 8008558:	af00      	add	r7, sp, #0
+ 800855a:	6078      	str	r0, [r7, #4]
+  uint32_t tmp, tmp1;
+
+  /* Check the LTDC peripheral state */
+  if (hltdc == NULL)
+ 800855c:	687b      	ldr	r3, [r7, #4]
+ 800855e:	2b00      	cmp	r3, #0
+ 8008560:	d101      	bne.n	8008566 <HAL_LTDC_Init+0x12>
+  {
+    return HAL_ERROR;
+ 8008562:	2301      	movs	r3, #1
+ 8008564:	e0bf      	b.n	80086e6 <HAL_LTDC_Init+0x192>
+    }
+    /* Init the low level hardware */
+    hltdc->MspInitCallback(hltdc);
+  }
+#else
+  if (hltdc->State == HAL_LTDC_STATE_RESET)
+ 8008566:	687b      	ldr	r3, [r7, #4]
+ 8008568:	f893 30a1 	ldrb.w	r3, [r3, #161]	; 0xa1
+ 800856c:	b2db      	uxtb	r3, r3
+ 800856e:	2b00      	cmp	r3, #0
+ 8008570:	d106      	bne.n	8008580 <HAL_LTDC_Init+0x2c>
+  {
+    /* Allocate lock resource and initialize it */
+    hltdc->Lock = HAL_UNLOCKED;
+ 8008572:	687b      	ldr	r3, [r7, #4]
+ 8008574:	2200      	movs	r2, #0
+ 8008576:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
+    /* Init the low level hardware */
+    HAL_LTDC_MspInit(hltdc);
+ 800857a:	6878      	ldr	r0, [r7, #4]
+ 800857c:	f7fb fdae 	bl	80040dc <HAL_LTDC_MspInit>
+  }
+#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
+
+  /* Change LTDC peripheral state */
+  hltdc->State = HAL_LTDC_STATE_BUSY;
+ 8008580:	687b      	ldr	r3, [r7, #4]
+ 8008582:	2202      	movs	r2, #2
+ 8008584:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
+
+  /* Configure the HS, VS, DE and PC polarity */
+  hltdc->Instance->GCR &= ~(LTDC_GCR_HSPOL | LTDC_GCR_VSPOL | LTDC_GCR_DEPOL | LTDC_GCR_PCPOL);
+ 8008588:	687b      	ldr	r3, [r7, #4]
+ 800858a:	681b      	ldr	r3, [r3, #0]
+ 800858c:	699a      	ldr	r2, [r3, #24]
+ 800858e:	687b      	ldr	r3, [r7, #4]
+ 8008590:	681b      	ldr	r3, [r3, #0]
+ 8008592:	f022 4270 	bic.w	r2, r2, #4026531840	; 0xf0000000
+ 8008596:	619a      	str	r2, [r3, #24]
+  hltdc->Instance->GCR |= (uint32_t)(hltdc->Init.HSPolarity | hltdc->Init.VSPolarity | \
+ 8008598:	687b      	ldr	r3, [r7, #4]
+ 800859a:	681b      	ldr	r3, [r3, #0]
+ 800859c:	6999      	ldr	r1, [r3, #24]
+ 800859e:	687b      	ldr	r3, [r7, #4]
+ 80085a0:	685a      	ldr	r2, [r3, #4]
+ 80085a2:	687b      	ldr	r3, [r7, #4]
+ 80085a4:	689b      	ldr	r3, [r3, #8]
+ 80085a6:	431a      	orrs	r2, r3
+                                     hltdc->Init.DEPolarity | hltdc->Init.PCPolarity);
+ 80085a8:	687b      	ldr	r3, [r7, #4]
+ 80085aa:	68db      	ldr	r3, [r3, #12]
+  hltdc->Instance->GCR |= (uint32_t)(hltdc->Init.HSPolarity | hltdc->Init.VSPolarity | \
+ 80085ac:	431a      	orrs	r2, r3
+                                     hltdc->Init.DEPolarity | hltdc->Init.PCPolarity);
+ 80085ae:	687b      	ldr	r3, [r7, #4]
+ 80085b0:	691b      	ldr	r3, [r3, #16]
+ 80085b2:	431a      	orrs	r2, r3
+  hltdc->Instance->GCR |= (uint32_t)(hltdc->Init.HSPolarity | hltdc->Init.VSPolarity | \
+ 80085b4:	687b      	ldr	r3, [r7, #4]
+ 80085b6:	681b      	ldr	r3, [r3, #0]
+ 80085b8:	430a      	orrs	r2, r1
+ 80085ba:	619a      	str	r2, [r3, #24]
+
+  /* Set Synchronization size */
+  hltdc->Instance->SSCR &= ~(LTDC_SSCR_VSH | LTDC_SSCR_HSW);
+ 80085bc:	687b      	ldr	r3, [r7, #4]
+ 80085be:	681b      	ldr	r3, [r3, #0]
+ 80085c0:	6899      	ldr	r1, [r3, #8]
+ 80085c2:	687b      	ldr	r3, [r7, #4]
+ 80085c4:	681a      	ldr	r2, [r3, #0]
+ 80085c6:	4b4a      	ldr	r3, [pc, #296]	; (80086f0 <HAL_LTDC_Init+0x19c>)
+ 80085c8:	400b      	ands	r3, r1
+ 80085ca:	6093      	str	r3, [r2, #8]
+  tmp = (hltdc->Init.HorizontalSync << 16U);
+ 80085cc:	687b      	ldr	r3, [r7, #4]
+ 80085ce:	695b      	ldr	r3, [r3, #20]
+ 80085d0:	041b      	lsls	r3, r3, #16
+ 80085d2:	60fb      	str	r3, [r7, #12]
+  hltdc->Instance->SSCR |= (tmp | hltdc->Init.VerticalSync);
+ 80085d4:	687b      	ldr	r3, [r7, #4]
+ 80085d6:	681b      	ldr	r3, [r3, #0]
+ 80085d8:	6899      	ldr	r1, [r3, #8]
+ 80085da:	687b      	ldr	r3, [r7, #4]
+ 80085dc:	699a      	ldr	r2, [r3, #24]
+ 80085de:	68fb      	ldr	r3, [r7, #12]
+ 80085e0:	431a      	orrs	r2, r3
+ 80085e2:	687b      	ldr	r3, [r7, #4]
+ 80085e4:	681b      	ldr	r3, [r3, #0]
+ 80085e6:	430a      	orrs	r2, r1
+ 80085e8:	609a      	str	r2, [r3, #8]
+
+  /* Set Accumulated Back porch */
+  hltdc->Instance->BPCR &= ~(LTDC_BPCR_AVBP | LTDC_BPCR_AHBP);
+ 80085ea:	687b      	ldr	r3, [r7, #4]
+ 80085ec:	681b      	ldr	r3, [r3, #0]
+ 80085ee:	68d9      	ldr	r1, [r3, #12]
+ 80085f0:	687b      	ldr	r3, [r7, #4]
+ 80085f2:	681a      	ldr	r2, [r3, #0]
+ 80085f4:	4b3e      	ldr	r3, [pc, #248]	; (80086f0 <HAL_LTDC_Init+0x19c>)
+ 80085f6:	400b      	ands	r3, r1
+ 80085f8:	60d3      	str	r3, [r2, #12]
+  tmp = (hltdc->Init.AccumulatedHBP << 16U);
+ 80085fa:	687b      	ldr	r3, [r7, #4]
+ 80085fc:	69db      	ldr	r3, [r3, #28]
+ 80085fe:	041b      	lsls	r3, r3, #16
+ 8008600:	60fb      	str	r3, [r7, #12]
+  hltdc->Instance->BPCR |= (tmp | hltdc->Init.AccumulatedVBP);
+ 8008602:	687b      	ldr	r3, [r7, #4]
+ 8008604:	681b      	ldr	r3, [r3, #0]
+ 8008606:	68d9      	ldr	r1, [r3, #12]
+ 8008608:	687b      	ldr	r3, [r7, #4]
+ 800860a:	6a1a      	ldr	r2, [r3, #32]
+ 800860c:	68fb      	ldr	r3, [r7, #12]
+ 800860e:	431a      	orrs	r2, r3
+ 8008610:	687b      	ldr	r3, [r7, #4]
+ 8008612:	681b      	ldr	r3, [r3, #0]
+ 8008614:	430a      	orrs	r2, r1
+ 8008616:	60da      	str	r2, [r3, #12]
+
+  /* Set Accumulated Active Width */
+  hltdc->Instance->AWCR &= ~(LTDC_AWCR_AAH | LTDC_AWCR_AAW);
+ 8008618:	687b      	ldr	r3, [r7, #4]
+ 800861a:	681b      	ldr	r3, [r3, #0]
+ 800861c:	6919      	ldr	r1, [r3, #16]
+ 800861e:	687b      	ldr	r3, [r7, #4]
+ 8008620:	681a      	ldr	r2, [r3, #0]
+ 8008622:	4b33      	ldr	r3, [pc, #204]	; (80086f0 <HAL_LTDC_Init+0x19c>)
+ 8008624:	400b      	ands	r3, r1
+ 8008626:	6113      	str	r3, [r2, #16]
+  tmp = (hltdc->Init.AccumulatedActiveW << 16U);
+ 8008628:	687b      	ldr	r3, [r7, #4]
+ 800862a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800862c:	041b      	lsls	r3, r3, #16
+ 800862e:	60fb      	str	r3, [r7, #12]
+  hltdc->Instance->AWCR |= (tmp | hltdc->Init.AccumulatedActiveH);
+ 8008630:	687b      	ldr	r3, [r7, #4]
+ 8008632:	681b      	ldr	r3, [r3, #0]
+ 8008634:	6919      	ldr	r1, [r3, #16]
+ 8008636:	687b      	ldr	r3, [r7, #4]
+ 8008638:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 800863a:	68fb      	ldr	r3, [r7, #12]
+ 800863c:	431a      	orrs	r2, r3
+ 800863e:	687b      	ldr	r3, [r7, #4]
+ 8008640:	681b      	ldr	r3, [r3, #0]
+ 8008642:	430a      	orrs	r2, r1
+ 8008644:	611a      	str	r2, [r3, #16]
+
+  /* Set Total Width */
+  hltdc->Instance->TWCR &= ~(LTDC_TWCR_TOTALH | LTDC_TWCR_TOTALW);
+ 8008646:	687b      	ldr	r3, [r7, #4]
+ 8008648:	681b      	ldr	r3, [r3, #0]
+ 800864a:	6959      	ldr	r1, [r3, #20]
+ 800864c:	687b      	ldr	r3, [r7, #4]
+ 800864e:	681a      	ldr	r2, [r3, #0]
+ 8008650:	4b27      	ldr	r3, [pc, #156]	; (80086f0 <HAL_LTDC_Init+0x19c>)
+ 8008652:	400b      	ands	r3, r1
+ 8008654:	6153      	str	r3, [r2, #20]
+  tmp = (hltdc->Init.TotalWidth << 16U);
+ 8008656:	687b      	ldr	r3, [r7, #4]
+ 8008658:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800865a:	041b      	lsls	r3, r3, #16
+ 800865c:	60fb      	str	r3, [r7, #12]
+  hltdc->Instance->TWCR |= (tmp | hltdc->Init.TotalHeigh);
+ 800865e:	687b      	ldr	r3, [r7, #4]
+ 8008660:	681b      	ldr	r3, [r3, #0]
+ 8008662:	6959      	ldr	r1, [r3, #20]
+ 8008664:	687b      	ldr	r3, [r7, #4]
+ 8008666:	6b1a      	ldr	r2, [r3, #48]	; 0x30
+ 8008668:	68fb      	ldr	r3, [r7, #12]
+ 800866a:	431a      	orrs	r2, r3
+ 800866c:	687b      	ldr	r3, [r7, #4]
+ 800866e:	681b      	ldr	r3, [r3, #0]
+ 8008670:	430a      	orrs	r2, r1
+ 8008672:	615a      	str	r2, [r3, #20]
+
+  /* Set the background color value */
+  tmp = ((uint32_t)(hltdc->Init.Backcolor.Green) << 8U);
+ 8008674:	687b      	ldr	r3, [r7, #4]
+ 8008676:	f893 3035 	ldrb.w	r3, [r3, #53]	; 0x35
+ 800867a:	021b      	lsls	r3, r3, #8
+ 800867c:	60fb      	str	r3, [r7, #12]
+  tmp1 = ((uint32_t)(hltdc->Init.Backcolor.Red) << 16U);
+ 800867e:	687b      	ldr	r3, [r7, #4]
+ 8008680:	f893 3036 	ldrb.w	r3, [r3, #54]	; 0x36
+ 8008684:	041b      	lsls	r3, r3, #16
+ 8008686:	60bb      	str	r3, [r7, #8]
+  hltdc->Instance->BCCR &= ~(LTDC_BCCR_BCBLUE | LTDC_BCCR_BCGREEN | LTDC_BCCR_BCRED);
+ 8008688:	687b      	ldr	r3, [r7, #4]
+ 800868a:	681b      	ldr	r3, [r3, #0]
+ 800868c:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800868e:	687b      	ldr	r3, [r7, #4]
+ 8008690:	681b      	ldr	r3, [r3, #0]
+ 8008692:	f002 427f 	and.w	r2, r2, #4278190080	; 0xff000000
+ 8008696:	62da      	str	r2, [r3, #44]	; 0x2c
+  hltdc->Instance->BCCR |= (tmp1 | tmp | hltdc->Init.Backcolor.Blue);
+ 8008698:	687b      	ldr	r3, [r7, #4]
+ 800869a:	681b      	ldr	r3, [r3, #0]
+ 800869c:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
+ 800869e:	68ba      	ldr	r2, [r7, #8]
+ 80086a0:	68fb      	ldr	r3, [r7, #12]
+ 80086a2:	4313      	orrs	r3, r2
+ 80086a4:	687a      	ldr	r2, [r7, #4]
+ 80086a6:	f892 2034 	ldrb.w	r2, [r2, #52]	; 0x34
+ 80086aa:	431a      	orrs	r2, r3
+ 80086ac:	687b      	ldr	r3, [r7, #4]
+ 80086ae:	681b      	ldr	r3, [r3, #0]
+ 80086b0:	430a      	orrs	r2, r1
+ 80086b2:	62da      	str	r2, [r3, #44]	; 0x2c
+
+  /* Enable the Transfer Error and FIFO underrun interrupts */
+  __HAL_LTDC_ENABLE_IT(hltdc, LTDC_IT_TE | LTDC_IT_FU);
+ 80086b4:	687b      	ldr	r3, [r7, #4]
+ 80086b6:	681b      	ldr	r3, [r3, #0]
+ 80086b8:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 80086ba:	687b      	ldr	r3, [r7, #4]
+ 80086bc:	681b      	ldr	r3, [r3, #0]
+ 80086be:	f042 0206 	orr.w	r2, r2, #6
+ 80086c2:	635a      	str	r2, [r3, #52]	; 0x34
+
+  /* Enable LTDC by setting LTDCEN bit */
+  __HAL_LTDC_ENABLE(hltdc);
+ 80086c4:	687b      	ldr	r3, [r7, #4]
+ 80086c6:	681b      	ldr	r3, [r3, #0]
+ 80086c8:	699a      	ldr	r2, [r3, #24]
+ 80086ca:	687b      	ldr	r3, [r7, #4]
+ 80086cc:	681b      	ldr	r3, [r3, #0]
+ 80086ce:	f042 0201 	orr.w	r2, r2, #1
+ 80086d2:	619a      	str	r2, [r3, #24]
+
+  /* Initialize the error code */
+  hltdc->ErrorCode = HAL_LTDC_ERROR_NONE;
+ 80086d4:	687b      	ldr	r3, [r7, #4]
+ 80086d6:	2200      	movs	r2, #0
+ 80086d8:	f8c3 20a4 	str.w	r2, [r3, #164]	; 0xa4
+
+  /* Initialize the LTDC state*/
+  hltdc->State = HAL_LTDC_STATE_READY;
+ 80086dc:	687b      	ldr	r3, [r7, #4]
+ 80086de:	2201      	movs	r2, #1
+ 80086e0:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
+
+  return HAL_OK;
+ 80086e4:	2300      	movs	r3, #0
+}
+ 80086e6:	4618      	mov	r0, r3
+ 80086e8:	3710      	adds	r7, #16
+ 80086ea:	46bd      	mov	sp, r7
+ 80086ec:	bd80      	pop	{r7, pc}
+ 80086ee:	bf00      	nop
+ 80086f0:	f000f800 	.word	0xf000f800
+
+080086f4 <HAL_LTDC_IRQHandler>:
+  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
+  *                the configuration information for the LTDC.
+  * @retval HAL status
+  */
+void HAL_LTDC_IRQHandler(LTDC_HandleTypeDef *hltdc)
+{
+ 80086f4:	b580      	push	{r7, lr}
+ 80086f6:	b084      	sub	sp, #16
+ 80086f8:	af00      	add	r7, sp, #0
+ 80086fa:	6078      	str	r0, [r7, #4]
+  uint32_t isrflags  = READ_REG(hltdc->Instance->ISR);
+ 80086fc:	687b      	ldr	r3, [r7, #4]
+ 80086fe:	681b      	ldr	r3, [r3, #0]
+ 8008700:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8008702:	60fb      	str	r3, [r7, #12]
+  uint32_t itsources = READ_REG(hltdc->Instance->IER);
+ 8008704:	687b      	ldr	r3, [r7, #4]
+ 8008706:	681b      	ldr	r3, [r3, #0]
+ 8008708:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 800870a:	60bb      	str	r3, [r7, #8]
+
+  /* Transfer Error Interrupt management ***************************************/
+  if (((isrflags & LTDC_ISR_TERRIF) != 0U) && ((itsources & LTDC_IER_TERRIE) != 0U))
+ 800870c:	68fb      	ldr	r3, [r7, #12]
+ 800870e:	f003 0304 	and.w	r3, r3, #4
+ 8008712:	2b00      	cmp	r3, #0
+ 8008714:	d023      	beq.n	800875e <HAL_LTDC_IRQHandler+0x6a>
+ 8008716:	68bb      	ldr	r3, [r7, #8]
+ 8008718:	f003 0304 	and.w	r3, r3, #4
+ 800871c:	2b00      	cmp	r3, #0
+ 800871e:	d01e      	beq.n	800875e <HAL_LTDC_IRQHandler+0x6a>
+  {
+    /* Disable the transfer Error interrupt */
+    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_TE);
+ 8008720:	687b      	ldr	r3, [r7, #4]
+ 8008722:	681b      	ldr	r3, [r3, #0]
+ 8008724:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 8008726:	687b      	ldr	r3, [r7, #4]
+ 8008728:	681b      	ldr	r3, [r3, #0]
+ 800872a:	f022 0204 	bic.w	r2, r2, #4
+ 800872e:	635a      	str	r2, [r3, #52]	; 0x34
+
+    /* Clear the transfer error flag */
+    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_TE);
+ 8008730:	687b      	ldr	r3, [r7, #4]
+ 8008732:	681b      	ldr	r3, [r3, #0]
+ 8008734:	2204      	movs	r2, #4
+ 8008736:	63da      	str	r2, [r3, #60]	; 0x3c
+
+    /* Update error code */
+    hltdc->ErrorCode |= HAL_LTDC_ERROR_TE;
+ 8008738:	687b      	ldr	r3, [r7, #4]
+ 800873a:	f8d3 30a4 	ldr.w	r3, [r3, #164]	; 0xa4
+ 800873e:	f043 0201 	orr.w	r2, r3, #1
+ 8008742:	687b      	ldr	r3, [r7, #4]
+ 8008744:	f8c3 20a4 	str.w	r2, [r3, #164]	; 0xa4
+
+    /* Change LTDC state */
+    hltdc->State = HAL_LTDC_STATE_ERROR;
+ 8008748:	687b      	ldr	r3, [r7, #4]
+ 800874a:	2204      	movs	r2, #4
+ 800874c:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
+
+    /* Process unlocked */
+    __HAL_UNLOCK(hltdc);
+ 8008750:	687b      	ldr	r3, [r7, #4]
+ 8008752:	2200      	movs	r2, #0
+ 8008754:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
+#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
+    /*Call registered error callback*/
+    hltdc->ErrorCallback(hltdc);
+#else
+    /* Call legacy error callback*/
+    HAL_LTDC_ErrorCallback(hltdc);
+ 8008758:	6878      	ldr	r0, [r7, #4]
+ 800875a:	f000 f86f 	bl	800883c <HAL_LTDC_ErrorCallback>
+#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
+  }
+
+  /* FIFO underrun Interrupt management ***************************************/
+  if (((isrflags & LTDC_ISR_FUIF) != 0U) && ((itsources & LTDC_IER_FUIE) != 0U))
+ 800875e:	68fb      	ldr	r3, [r7, #12]
+ 8008760:	f003 0302 	and.w	r3, r3, #2
+ 8008764:	2b00      	cmp	r3, #0
+ 8008766:	d023      	beq.n	80087b0 <HAL_LTDC_IRQHandler+0xbc>
+ 8008768:	68bb      	ldr	r3, [r7, #8]
+ 800876a:	f003 0302 	and.w	r3, r3, #2
+ 800876e:	2b00      	cmp	r3, #0
+ 8008770:	d01e      	beq.n	80087b0 <HAL_LTDC_IRQHandler+0xbc>
+  {
+    /* Disable the FIFO underrun interrupt */
+    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_FU);
+ 8008772:	687b      	ldr	r3, [r7, #4]
+ 8008774:	681b      	ldr	r3, [r3, #0]
+ 8008776:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 8008778:	687b      	ldr	r3, [r7, #4]
+ 800877a:	681b      	ldr	r3, [r3, #0]
+ 800877c:	f022 0202 	bic.w	r2, r2, #2
+ 8008780:	635a      	str	r2, [r3, #52]	; 0x34
+
+    /* Clear the FIFO underrun flag */
+    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_FU);
+ 8008782:	687b      	ldr	r3, [r7, #4]
+ 8008784:	681b      	ldr	r3, [r3, #0]
+ 8008786:	2202      	movs	r2, #2
+ 8008788:	63da      	str	r2, [r3, #60]	; 0x3c
+
+    /* Update error code */
+    hltdc->ErrorCode |= HAL_LTDC_ERROR_FU;
+ 800878a:	687b      	ldr	r3, [r7, #4]
+ 800878c:	f8d3 30a4 	ldr.w	r3, [r3, #164]	; 0xa4
+ 8008790:	f043 0202 	orr.w	r2, r3, #2
+ 8008794:	687b      	ldr	r3, [r7, #4]
+ 8008796:	f8c3 20a4 	str.w	r2, [r3, #164]	; 0xa4
+
+    /* Change LTDC state */
+    hltdc->State = HAL_LTDC_STATE_ERROR;
+ 800879a:	687b      	ldr	r3, [r7, #4]
+ 800879c:	2204      	movs	r2, #4
+ 800879e:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
+
+    /* Process unlocked */
+    __HAL_UNLOCK(hltdc);
+ 80087a2:	687b      	ldr	r3, [r7, #4]
+ 80087a4:	2200      	movs	r2, #0
+ 80087a6:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
+#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
+    /*Call registered error callback*/
+    hltdc->ErrorCallback(hltdc);
+#else
+    /* Call legacy error callback*/
+    HAL_LTDC_ErrorCallback(hltdc);
+ 80087aa:	6878      	ldr	r0, [r7, #4]
+ 80087ac:	f000 f846 	bl	800883c <HAL_LTDC_ErrorCallback>
+#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
+  }
+
+  /* Line Interrupt management ************************************************/
+  if (((isrflags & LTDC_ISR_LIF) != 0U) && ((itsources & LTDC_IER_LIE) != 0U))
+ 80087b0:	68fb      	ldr	r3, [r7, #12]
+ 80087b2:	f003 0301 	and.w	r3, r3, #1
+ 80087b6:	2b00      	cmp	r3, #0
+ 80087b8:	d01b      	beq.n	80087f2 <HAL_LTDC_IRQHandler+0xfe>
+ 80087ba:	68bb      	ldr	r3, [r7, #8]
+ 80087bc:	f003 0301 	and.w	r3, r3, #1
+ 80087c0:	2b00      	cmp	r3, #0
+ 80087c2:	d016      	beq.n	80087f2 <HAL_LTDC_IRQHandler+0xfe>
+  {
+    /* Disable the Line interrupt */
+    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_LI);
+ 80087c4:	687b      	ldr	r3, [r7, #4]
+ 80087c6:	681b      	ldr	r3, [r3, #0]
+ 80087c8:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 80087ca:	687b      	ldr	r3, [r7, #4]
+ 80087cc:	681b      	ldr	r3, [r3, #0]
+ 80087ce:	f022 0201 	bic.w	r2, r2, #1
+ 80087d2:	635a      	str	r2, [r3, #52]	; 0x34
+
+    /* Clear the Line interrupt flag */
+    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_LI);
+ 80087d4:	687b      	ldr	r3, [r7, #4]
+ 80087d6:	681b      	ldr	r3, [r3, #0]
+ 80087d8:	2201      	movs	r2, #1
+ 80087da:	63da      	str	r2, [r3, #60]	; 0x3c
+
+    /* Change LTDC state */
+    hltdc->State = HAL_LTDC_STATE_READY;
+ 80087dc:	687b      	ldr	r3, [r7, #4]
+ 80087de:	2201      	movs	r2, #1
+ 80087e0:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
+
+    /* Process unlocked */
+    __HAL_UNLOCK(hltdc);
+ 80087e4:	687b      	ldr	r3, [r7, #4]
+ 80087e6:	2200      	movs	r2, #0
+ 80087e8:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
+#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
+    /*Call registered Line Event callback */
+    hltdc->LineEventCallback(hltdc);
+#else
+    /*Call Legacy Line Event callback */
+    HAL_LTDC_LineEventCallback(hltdc);
+ 80087ec:	6878      	ldr	r0, [r7, #4]
+ 80087ee:	f000 f82f 	bl	8008850 <HAL_LTDC_LineEventCallback>
+#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
+  }
+
+  /* Register reload Interrupt management ***************************************/
+  if (((isrflags & LTDC_ISR_RRIF) != 0U) && ((itsources & LTDC_IER_RRIE) != 0U))
+ 80087f2:	68fb      	ldr	r3, [r7, #12]
+ 80087f4:	f003 0308 	and.w	r3, r3, #8
+ 80087f8:	2b00      	cmp	r3, #0
+ 80087fa:	d01b      	beq.n	8008834 <HAL_LTDC_IRQHandler+0x140>
+ 80087fc:	68bb      	ldr	r3, [r7, #8]
+ 80087fe:	f003 0308 	and.w	r3, r3, #8
+ 8008802:	2b00      	cmp	r3, #0
+ 8008804:	d016      	beq.n	8008834 <HAL_LTDC_IRQHandler+0x140>
+  {
+    /* Disable the register reload interrupt */
+    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_RR);
+ 8008806:	687b      	ldr	r3, [r7, #4]
+ 8008808:	681b      	ldr	r3, [r3, #0]
+ 800880a:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 800880c:	687b      	ldr	r3, [r7, #4]
+ 800880e:	681b      	ldr	r3, [r3, #0]
+ 8008810:	f022 0208 	bic.w	r2, r2, #8
+ 8008814:	635a      	str	r2, [r3, #52]	; 0x34
+
+    /* Clear the register reload flag */
+    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_RR);
+ 8008816:	687b      	ldr	r3, [r7, #4]
+ 8008818:	681b      	ldr	r3, [r3, #0]
+ 800881a:	2208      	movs	r2, #8
+ 800881c:	63da      	str	r2, [r3, #60]	; 0x3c
+
+    /* Change LTDC state */
+    hltdc->State = HAL_LTDC_STATE_READY;
+ 800881e:	687b      	ldr	r3, [r7, #4]
+ 8008820:	2201      	movs	r2, #1
+ 8008822:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
+
+    /* Process unlocked */
+    __HAL_UNLOCK(hltdc);
+ 8008826:	687b      	ldr	r3, [r7, #4]
+ 8008828:	2200      	movs	r2, #0
+ 800882a:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
+#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
+    /*Call registered reload Event callback */
+    hltdc->ReloadEventCallback(hltdc);
+#else
+    /*Call Legacy Reload Event callback */
+    HAL_LTDC_ReloadEventCallback(hltdc);
+ 800882e:	6878      	ldr	r0, [r7, #4]
+ 8008830:	f000 f818 	bl	8008864 <HAL_LTDC_ReloadEventCallback>
+#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
+  }
+}
+ 8008834:	bf00      	nop
+ 8008836:	3710      	adds	r7, #16
+ 8008838:	46bd      	mov	sp, r7
+ 800883a:	bd80      	pop	{r7, pc}
+
+0800883c <HAL_LTDC_ErrorCallback>:
+  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
+  *                the configuration information for the LTDC.
+  * @retval None
+  */
+__weak void HAL_LTDC_ErrorCallback(LTDC_HandleTypeDef *hltdc)
+{
+ 800883c:	b480      	push	{r7}
+ 800883e:	b083      	sub	sp, #12
+ 8008840:	af00      	add	r7, sp, #0
+ 8008842:	6078      	str	r0, [r7, #4]
+  UNUSED(hltdc);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_LTDC_ErrorCallback could be implemented in the user file
+   */
+}
+ 8008844:	bf00      	nop
+ 8008846:	370c      	adds	r7, #12
+ 8008848:	46bd      	mov	sp, r7
+ 800884a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800884e:	4770      	bx	lr
+
+08008850 <HAL_LTDC_LineEventCallback>:
+  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
+  *                the configuration information for the LTDC.
+  * @retval None
+  */
+__weak void HAL_LTDC_LineEventCallback(LTDC_HandleTypeDef *hltdc)
+{
+ 8008850:	b480      	push	{r7}
+ 8008852:	b083      	sub	sp, #12
+ 8008854:	af00      	add	r7, sp, #0
+ 8008856:	6078      	str	r0, [r7, #4]
+  UNUSED(hltdc);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_LTDC_LineEventCallback could be implemented in the user file
+   */
+}
+ 8008858:	bf00      	nop
+ 800885a:	370c      	adds	r7, #12
+ 800885c:	46bd      	mov	sp, r7
+ 800885e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8008862:	4770      	bx	lr
+
+08008864 <HAL_LTDC_ReloadEventCallback>:
+  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
+  *                the configuration information for the LTDC.
+  * @retval None
+  */
+__weak void HAL_LTDC_ReloadEventCallback(LTDC_HandleTypeDef *hltdc)
+{
+ 8008864:	b480      	push	{r7}
+ 8008866:	b083      	sub	sp, #12
+ 8008868:	af00      	add	r7, sp, #0
+ 800886a:	6078      	str	r0, [r7, #4]
+  UNUSED(hltdc);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_LTDC_ReloadEvenCallback could be implemented in the user file
+   */
+}
+ 800886c:	bf00      	nop
+ 800886e:	370c      	adds	r7, #12
+ 8008870:	46bd      	mov	sp, r7
+ 8008872:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8008876:	4770      	bx	lr
+
+08008878 <HAL_LTDC_ConfigLayer>:
+  *                    This parameter can be one of the following values:
+  *                    LTDC_LAYER_1 (0) or LTDC_LAYER_2 (1)
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_LTDC_ConfigLayer(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgTypeDef *pLayerCfg, uint32_t LayerIdx)
+{
+ 8008878:	b5b0      	push	{r4, r5, r7, lr}
+ 800887a:	b084      	sub	sp, #16
+ 800887c:	af00      	add	r7, sp, #0
+ 800887e:	60f8      	str	r0, [r7, #12]
+ 8008880:	60b9      	str	r1, [r7, #8]
+ 8008882:	607a      	str	r2, [r7, #4]
+  assert_param(IS_LTDC_BLENDING_FACTOR2(pLayerCfg->BlendingFactor2));
+  assert_param(IS_LTDC_CFBLL(pLayerCfg->ImageWidth));
+  assert_param(IS_LTDC_CFBLNBR(pLayerCfg->ImageHeight));
+
+  /* Process locked */
+  __HAL_LOCK(hltdc);
+ 8008884:	68fb      	ldr	r3, [r7, #12]
+ 8008886:	f893 30a0 	ldrb.w	r3, [r3, #160]	; 0xa0
+ 800888a:	2b01      	cmp	r3, #1
+ 800888c:	d101      	bne.n	8008892 <HAL_LTDC_ConfigLayer+0x1a>
+ 800888e:	2302      	movs	r3, #2
+ 8008890:	e02c      	b.n	80088ec <HAL_LTDC_ConfigLayer+0x74>
+ 8008892:	68fb      	ldr	r3, [r7, #12]
+ 8008894:	2201      	movs	r2, #1
+ 8008896:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
+
+  /* Change LTDC peripheral state */
+  hltdc->State = HAL_LTDC_STATE_BUSY;
+ 800889a:	68fb      	ldr	r3, [r7, #12]
+ 800889c:	2202      	movs	r2, #2
+ 800889e:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
+
+  /* Copy new layer configuration into handle structure */
+  hltdc->LayerCfg[LayerIdx] = *pLayerCfg;
+ 80088a2:	68fa      	ldr	r2, [r7, #12]
+ 80088a4:	687b      	ldr	r3, [r7, #4]
+ 80088a6:	2134      	movs	r1, #52	; 0x34
+ 80088a8:	fb01 f303 	mul.w	r3, r1, r3
+ 80088ac:	4413      	add	r3, r2
+ 80088ae:	f103 0238 	add.w	r2, r3, #56	; 0x38
+ 80088b2:	68bb      	ldr	r3, [r7, #8]
+ 80088b4:	4614      	mov	r4, r2
+ 80088b6:	461d      	mov	r5, r3
+ 80088b8:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 80088ba:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 80088bc:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 80088be:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 80088c0:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 80088c2:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 80088c4:	682b      	ldr	r3, [r5, #0]
+ 80088c6:	6023      	str	r3, [r4, #0]
+
+  /* Configure the LTDC Layer */
+  LTDC_SetConfig(hltdc, pLayerCfg, LayerIdx);
+ 80088c8:	687a      	ldr	r2, [r7, #4]
+ 80088ca:	68b9      	ldr	r1, [r7, #8]
+ 80088cc:	68f8      	ldr	r0, [r7, #12]
+ 80088ce:	f000 f81f 	bl	8008910 <LTDC_SetConfig>
+
+  /* Set the Immediate Reload type */
+  hltdc->Instance->SRCR = LTDC_SRCR_IMR;
+ 80088d2:	68fb      	ldr	r3, [r7, #12]
+ 80088d4:	681b      	ldr	r3, [r3, #0]
+ 80088d6:	2201      	movs	r2, #1
+ 80088d8:	625a      	str	r2, [r3, #36]	; 0x24
+
+  /* Initialize the LTDC state*/
+  hltdc->State  = HAL_LTDC_STATE_READY;
+ 80088da:	68fb      	ldr	r3, [r7, #12]
+ 80088dc:	2201      	movs	r2, #1
+ 80088de:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
+
+  /* Process unlocked */
+  __HAL_UNLOCK(hltdc);
+ 80088e2:	68fb      	ldr	r3, [r7, #12]
+ 80088e4:	2200      	movs	r2, #0
+ 80088e6:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
+
+  return HAL_OK;
+ 80088ea:	2300      	movs	r3, #0
+}
+ 80088ec:	4618      	mov	r0, r3
+ 80088ee:	3710      	adds	r7, #16
+ 80088f0:	46bd      	mov	sp, r7
+ 80088f2:	bdb0      	pop	{r4, r5, r7, pc}
+
+080088f4 <HAL_LTDC_GetState>:
+  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
+  *                the configuration information for the LTDC.
+  * @retval HAL state
+  */
+HAL_LTDC_StateTypeDef HAL_LTDC_GetState(LTDC_HandleTypeDef *hltdc)
+{
+ 80088f4:	b480      	push	{r7}
+ 80088f6:	b083      	sub	sp, #12
+ 80088f8:	af00      	add	r7, sp, #0
+ 80088fa:	6078      	str	r0, [r7, #4]
+  return hltdc->State;
+ 80088fc:	687b      	ldr	r3, [r7, #4]
+ 80088fe:	f893 30a1 	ldrb.w	r3, [r3, #161]	; 0xa1
+ 8008902:	b2db      	uxtb	r3, r3
+}
+ 8008904:	4618      	mov	r0, r3
+ 8008906:	370c      	adds	r7, #12
+ 8008908:	46bd      	mov	sp, r7
+ 800890a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800890e:	4770      	bx	lr
+
+08008910 <LTDC_SetConfig>:
+  * @param  LayerIdx  LTDC Layer index.
+  *                   This parameter can be one of the following values: LTDC_LAYER_1 (0) or LTDC_LAYER_2 (1)
+  * @retval None
+  */
+static void LTDC_SetConfig(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgTypeDef *pLayerCfg, uint32_t LayerIdx)
+{
+ 8008910:	b480      	push	{r7}
+ 8008912:	b089      	sub	sp, #36	; 0x24
+ 8008914:	af00      	add	r7, sp, #0
+ 8008916:	60f8      	str	r0, [r7, #12]
+ 8008918:	60b9      	str	r1, [r7, #8]
+ 800891a:	607a      	str	r2, [r7, #4]
+  uint32_t tmp;
+  uint32_t tmp1;
+  uint32_t tmp2;
+
+  /* Configure the horizontal start and stop position */
+  tmp = ((pLayerCfg->WindowX1 + ((hltdc->Instance->BPCR & LTDC_BPCR_AHBP) >> 16U)) << 16U);
+ 800891c:	68bb      	ldr	r3, [r7, #8]
+ 800891e:	685a      	ldr	r2, [r3, #4]
+ 8008920:	68fb      	ldr	r3, [r7, #12]
+ 8008922:	681b      	ldr	r3, [r3, #0]
+ 8008924:	68db      	ldr	r3, [r3, #12]
+ 8008926:	0c1b      	lsrs	r3, r3, #16
+ 8008928:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 800892c:	4413      	add	r3, r2
+ 800892e:	041b      	lsls	r3, r3, #16
+ 8008930:	61fb      	str	r3, [r7, #28]
+  LTDC_LAYER(hltdc, LayerIdx)->WHPCR &= ~(LTDC_LxWHPCR_WHSTPOS | LTDC_LxWHPCR_WHSPPOS);
+ 8008932:	68fb      	ldr	r3, [r7, #12]
+ 8008934:	681b      	ldr	r3, [r3, #0]
+ 8008936:	461a      	mov	r2, r3
+ 8008938:	687b      	ldr	r3, [r7, #4]
+ 800893a:	01db      	lsls	r3, r3, #7
+ 800893c:	4413      	add	r3, r2
+ 800893e:	3384      	adds	r3, #132	; 0x84
+ 8008940:	685b      	ldr	r3, [r3, #4]
+ 8008942:	68fa      	ldr	r2, [r7, #12]
+ 8008944:	6812      	ldr	r2, [r2, #0]
+ 8008946:	4611      	mov	r1, r2
+ 8008948:	687a      	ldr	r2, [r7, #4]
+ 800894a:	01d2      	lsls	r2, r2, #7
+ 800894c:	440a      	add	r2, r1
+ 800894e:	3284      	adds	r2, #132	; 0x84
+ 8008950:	f403 4370 	and.w	r3, r3, #61440	; 0xf000
+ 8008954:	6053      	str	r3, [r2, #4]
+  LTDC_LAYER(hltdc, LayerIdx)->WHPCR = ((pLayerCfg->WindowX0 + ((hltdc->Instance->BPCR & LTDC_BPCR_AHBP) >> 16U) + 1U) | tmp);
+ 8008956:	68bb      	ldr	r3, [r7, #8]
+ 8008958:	681a      	ldr	r2, [r3, #0]
+ 800895a:	68fb      	ldr	r3, [r7, #12]
+ 800895c:	681b      	ldr	r3, [r3, #0]
+ 800895e:	68db      	ldr	r3, [r3, #12]
+ 8008960:	0c1b      	lsrs	r3, r3, #16
+ 8008962:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 8008966:	4413      	add	r3, r2
+ 8008968:	1c5a      	adds	r2, r3, #1
+ 800896a:	68fb      	ldr	r3, [r7, #12]
+ 800896c:	681b      	ldr	r3, [r3, #0]
+ 800896e:	4619      	mov	r1, r3
+ 8008970:	687b      	ldr	r3, [r7, #4]
+ 8008972:	01db      	lsls	r3, r3, #7
+ 8008974:	440b      	add	r3, r1
+ 8008976:	3384      	adds	r3, #132	; 0x84
+ 8008978:	4619      	mov	r1, r3
+ 800897a:	69fb      	ldr	r3, [r7, #28]
+ 800897c:	4313      	orrs	r3, r2
+ 800897e:	604b      	str	r3, [r1, #4]
+
+  /* Configure the vertical start and stop position */
+  tmp = ((pLayerCfg->WindowY1 + (hltdc->Instance->BPCR & LTDC_BPCR_AVBP)) << 16U);
+ 8008980:	68bb      	ldr	r3, [r7, #8]
+ 8008982:	68da      	ldr	r2, [r3, #12]
+ 8008984:	68fb      	ldr	r3, [r7, #12]
+ 8008986:	681b      	ldr	r3, [r3, #0]
+ 8008988:	68db      	ldr	r3, [r3, #12]
+ 800898a:	f3c3 030a 	ubfx	r3, r3, #0, #11
+ 800898e:	4413      	add	r3, r2
+ 8008990:	041b      	lsls	r3, r3, #16
+ 8008992:	61fb      	str	r3, [r7, #28]
+  LTDC_LAYER(hltdc, LayerIdx)->WVPCR &= ~(LTDC_LxWVPCR_WVSTPOS | LTDC_LxWVPCR_WVSPPOS);
+ 8008994:	68fb      	ldr	r3, [r7, #12]
+ 8008996:	681b      	ldr	r3, [r3, #0]
+ 8008998:	461a      	mov	r2, r3
+ 800899a:	687b      	ldr	r3, [r7, #4]
+ 800899c:	01db      	lsls	r3, r3, #7
+ 800899e:	4413      	add	r3, r2
+ 80089a0:	3384      	adds	r3, #132	; 0x84
+ 80089a2:	689b      	ldr	r3, [r3, #8]
+ 80089a4:	68fa      	ldr	r2, [r7, #12]
+ 80089a6:	6812      	ldr	r2, [r2, #0]
+ 80089a8:	4611      	mov	r1, r2
+ 80089aa:	687a      	ldr	r2, [r7, #4]
+ 80089ac:	01d2      	lsls	r2, r2, #7
+ 80089ae:	440a      	add	r2, r1
+ 80089b0:	3284      	adds	r2, #132	; 0x84
+ 80089b2:	f403 4370 	and.w	r3, r3, #61440	; 0xf000
+ 80089b6:	6093      	str	r3, [r2, #8]
+  LTDC_LAYER(hltdc, LayerIdx)->WVPCR  = ((pLayerCfg->WindowY0 + (hltdc->Instance->BPCR & LTDC_BPCR_AVBP) + 1U) | tmp);
+ 80089b8:	68bb      	ldr	r3, [r7, #8]
+ 80089ba:	689a      	ldr	r2, [r3, #8]
+ 80089bc:	68fb      	ldr	r3, [r7, #12]
+ 80089be:	681b      	ldr	r3, [r3, #0]
+ 80089c0:	68db      	ldr	r3, [r3, #12]
+ 80089c2:	f3c3 030a 	ubfx	r3, r3, #0, #11
+ 80089c6:	4413      	add	r3, r2
+ 80089c8:	1c5a      	adds	r2, r3, #1
+ 80089ca:	68fb      	ldr	r3, [r7, #12]
+ 80089cc:	681b      	ldr	r3, [r3, #0]
+ 80089ce:	4619      	mov	r1, r3
+ 80089d0:	687b      	ldr	r3, [r7, #4]
+ 80089d2:	01db      	lsls	r3, r3, #7
+ 80089d4:	440b      	add	r3, r1
+ 80089d6:	3384      	adds	r3, #132	; 0x84
+ 80089d8:	4619      	mov	r1, r3
+ 80089da:	69fb      	ldr	r3, [r7, #28]
+ 80089dc:	4313      	orrs	r3, r2
+ 80089de:	608b      	str	r3, [r1, #8]
+
+  /* Specifies the pixel format */
+  LTDC_LAYER(hltdc, LayerIdx)->PFCR &= ~(LTDC_LxPFCR_PF);
+ 80089e0:	68fb      	ldr	r3, [r7, #12]
+ 80089e2:	681b      	ldr	r3, [r3, #0]
+ 80089e4:	461a      	mov	r2, r3
+ 80089e6:	687b      	ldr	r3, [r7, #4]
+ 80089e8:	01db      	lsls	r3, r3, #7
+ 80089ea:	4413      	add	r3, r2
+ 80089ec:	3384      	adds	r3, #132	; 0x84
+ 80089ee:	691b      	ldr	r3, [r3, #16]
+ 80089f0:	68fa      	ldr	r2, [r7, #12]
+ 80089f2:	6812      	ldr	r2, [r2, #0]
+ 80089f4:	4611      	mov	r1, r2
+ 80089f6:	687a      	ldr	r2, [r7, #4]
+ 80089f8:	01d2      	lsls	r2, r2, #7
+ 80089fa:	440a      	add	r2, r1
+ 80089fc:	3284      	adds	r2, #132	; 0x84
+ 80089fe:	f023 0307 	bic.w	r3, r3, #7
+ 8008a02:	6113      	str	r3, [r2, #16]
+  LTDC_LAYER(hltdc, LayerIdx)->PFCR = (pLayerCfg->PixelFormat);
+ 8008a04:	68fb      	ldr	r3, [r7, #12]
+ 8008a06:	681b      	ldr	r3, [r3, #0]
+ 8008a08:	461a      	mov	r2, r3
+ 8008a0a:	687b      	ldr	r3, [r7, #4]
+ 8008a0c:	01db      	lsls	r3, r3, #7
+ 8008a0e:	4413      	add	r3, r2
+ 8008a10:	3384      	adds	r3, #132	; 0x84
+ 8008a12:	461a      	mov	r2, r3
+ 8008a14:	68bb      	ldr	r3, [r7, #8]
+ 8008a16:	691b      	ldr	r3, [r3, #16]
+ 8008a18:	6113      	str	r3, [r2, #16]
+
+  /* Configure the default color values */
+  tmp = ((uint32_t)(pLayerCfg->Backcolor.Green) << 8U);
+ 8008a1a:	68bb      	ldr	r3, [r7, #8]
+ 8008a1c:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 8008a20:	021b      	lsls	r3, r3, #8
+ 8008a22:	61fb      	str	r3, [r7, #28]
+  tmp1 = ((uint32_t)(pLayerCfg->Backcolor.Red) << 16U);
+ 8008a24:	68bb      	ldr	r3, [r7, #8]
+ 8008a26:	f893 3032 	ldrb.w	r3, [r3, #50]	; 0x32
+ 8008a2a:	041b      	lsls	r3, r3, #16
+ 8008a2c:	61bb      	str	r3, [r7, #24]
+  tmp2 = (pLayerCfg->Alpha0 << 24U);
+ 8008a2e:	68bb      	ldr	r3, [r7, #8]
+ 8008a30:	699b      	ldr	r3, [r3, #24]
+ 8008a32:	061b      	lsls	r3, r3, #24
+ 8008a34:	617b      	str	r3, [r7, #20]
+  LTDC_LAYER(hltdc, LayerIdx)->DCCR &= ~(LTDC_LxDCCR_DCBLUE | LTDC_LxDCCR_DCGREEN | LTDC_LxDCCR_DCRED | LTDC_LxDCCR_DCALPHA);
+ 8008a36:	68fb      	ldr	r3, [r7, #12]
+ 8008a38:	681b      	ldr	r3, [r3, #0]
+ 8008a3a:	461a      	mov	r2, r3
+ 8008a3c:	687b      	ldr	r3, [r7, #4]
+ 8008a3e:	01db      	lsls	r3, r3, #7
+ 8008a40:	4413      	add	r3, r2
+ 8008a42:	3384      	adds	r3, #132	; 0x84
+ 8008a44:	699b      	ldr	r3, [r3, #24]
+ 8008a46:	68fb      	ldr	r3, [r7, #12]
+ 8008a48:	681b      	ldr	r3, [r3, #0]
+ 8008a4a:	461a      	mov	r2, r3
+ 8008a4c:	687b      	ldr	r3, [r7, #4]
+ 8008a4e:	01db      	lsls	r3, r3, #7
+ 8008a50:	4413      	add	r3, r2
+ 8008a52:	3384      	adds	r3, #132	; 0x84
+ 8008a54:	461a      	mov	r2, r3
+ 8008a56:	2300      	movs	r3, #0
+ 8008a58:	6193      	str	r3, [r2, #24]
+  LTDC_LAYER(hltdc, LayerIdx)->DCCR = (pLayerCfg->Backcolor.Blue | tmp | tmp1 | tmp2);
+ 8008a5a:	68bb      	ldr	r3, [r7, #8]
+ 8008a5c:	f893 3030 	ldrb.w	r3, [r3, #48]	; 0x30
+ 8008a60:	461a      	mov	r2, r3
+ 8008a62:	69fb      	ldr	r3, [r7, #28]
+ 8008a64:	431a      	orrs	r2, r3
+ 8008a66:	69bb      	ldr	r3, [r7, #24]
+ 8008a68:	431a      	orrs	r2, r3
+ 8008a6a:	68fb      	ldr	r3, [r7, #12]
+ 8008a6c:	681b      	ldr	r3, [r3, #0]
+ 8008a6e:	4619      	mov	r1, r3
+ 8008a70:	687b      	ldr	r3, [r7, #4]
+ 8008a72:	01db      	lsls	r3, r3, #7
+ 8008a74:	440b      	add	r3, r1
+ 8008a76:	3384      	adds	r3, #132	; 0x84
+ 8008a78:	4619      	mov	r1, r3
+ 8008a7a:	697b      	ldr	r3, [r7, #20]
+ 8008a7c:	4313      	orrs	r3, r2
+ 8008a7e:	618b      	str	r3, [r1, #24]
+
+  /* Specifies the constant alpha value */
+  LTDC_LAYER(hltdc, LayerIdx)->CACR &= ~(LTDC_LxCACR_CONSTA);
+ 8008a80:	68fb      	ldr	r3, [r7, #12]
+ 8008a82:	681b      	ldr	r3, [r3, #0]
+ 8008a84:	461a      	mov	r2, r3
+ 8008a86:	687b      	ldr	r3, [r7, #4]
+ 8008a88:	01db      	lsls	r3, r3, #7
+ 8008a8a:	4413      	add	r3, r2
+ 8008a8c:	3384      	adds	r3, #132	; 0x84
+ 8008a8e:	695b      	ldr	r3, [r3, #20]
+ 8008a90:	68fa      	ldr	r2, [r7, #12]
+ 8008a92:	6812      	ldr	r2, [r2, #0]
+ 8008a94:	4611      	mov	r1, r2
+ 8008a96:	687a      	ldr	r2, [r7, #4]
+ 8008a98:	01d2      	lsls	r2, r2, #7
+ 8008a9a:	440a      	add	r2, r1
+ 8008a9c:	3284      	adds	r2, #132	; 0x84
+ 8008a9e:	f023 03ff 	bic.w	r3, r3, #255	; 0xff
+ 8008aa2:	6153      	str	r3, [r2, #20]
+  LTDC_LAYER(hltdc, LayerIdx)->CACR = (pLayerCfg->Alpha);
+ 8008aa4:	68fb      	ldr	r3, [r7, #12]
+ 8008aa6:	681b      	ldr	r3, [r3, #0]
+ 8008aa8:	461a      	mov	r2, r3
+ 8008aaa:	687b      	ldr	r3, [r7, #4]
+ 8008aac:	01db      	lsls	r3, r3, #7
+ 8008aae:	4413      	add	r3, r2
+ 8008ab0:	3384      	adds	r3, #132	; 0x84
+ 8008ab2:	461a      	mov	r2, r3
+ 8008ab4:	68bb      	ldr	r3, [r7, #8]
+ 8008ab6:	695b      	ldr	r3, [r3, #20]
+ 8008ab8:	6153      	str	r3, [r2, #20]
+
+  /* Specifies the blending factors */
+  LTDC_LAYER(hltdc, LayerIdx)->BFCR &= ~(LTDC_LxBFCR_BF2 | LTDC_LxBFCR_BF1);
+ 8008aba:	68fb      	ldr	r3, [r7, #12]
+ 8008abc:	681b      	ldr	r3, [r3, #0]
+ 8008abe:	461a      	mov	r2, r3
+ 8008ac0:	687b      	ldr	r3, [r7, #4]
+ 8008ac2:	01db      	lsls	r3, r3, #7
+ 8008ac4:	4413      	add	r3, r2
+ 8008ac6:	3384      	adds	r3, #132	; 0x84
+ 8008ac8:	69da      	ldr	r2, [r3, #28]
+ 8008aca:	68fb      	ldr	r3, [r7, #12]
+ 8008acc:	681b      	ldr	r3, [r3, #0]
+ 8008ace:	4619      	mov	r1, r3
+ 8008ad0:	687b      	ldr	r3, [r7, #4]
+ 8008ad2:	01db      	lsls	r3, r3, #7
+ 8008ad4:	440b      	add	r3, r1
+ 8008ad6:	3384      	adds	r3, #132	; 0x84
+ 8008ad8:	4619      	mov	r1, r3
+ 8008ada:	4b58      	ldr	r3, [pc, #352]	; (8008c3c <LTDC_SetConfig+0x32c>)
+ 8008adc:	4013      	ands	r3, r2
+ 8008ade:	61cb      	str	r3, [r1, #28]
+  LTDC_LAYER(hltdc, LayerIdx)->BFCR = (pLayerCfg->BlendingFactor1 | pLayerCfg->BlendingFactor2);
+ 8008ae0:	68bb      	ldr	r3, [r7, #8]
+ 8008ae2:	69da      	ldr	r2, [r3, #28]
+ 8008ae4:	68bb      	ldr	r3, [r7, #8]
+ 8008ae6:	6a1b      	ldr	r3, [r3, #32]
+ 8008ae8:	68f9      	ldr	r1, [r7, #12]
+ 8008aea:	6809      	ldr	r1, [r1, #0]
+ 8008aec:	4608      	mov	r0, r1
+ 8008aee:	6879      	ldr	r1, [r7, #4]
+ 8008af0:	01c9      	lsls	r1, r1, #7
+ 8008af2:	4401      	add	r1, r0
+ 8008af4:	3184      	adds	r1, #132	; 0x84
+ 8008af6:	4313      	orrs	r3, r2
+ 8008af8:	61cb      	str	r3, [r1, #28]
+
+  /* Configure the color frame buffer start address */
+  LTDC_LAYER(hltdc, LayerIdx)->CFBAR &= ~(LTDC_LxCFBAR_CFBADD);
+ 8008afa:	68fb      	ldr	r3, [r7, #12]
+ 8008afc:	681b      	ldr	r3, [r3, #0]
+ 8008afe:	461a      	mov	r2, r3
+ 8008b00:	687b      	ldr	r3, [r7, #4]
+ 8008b02:	01db      	lsls	r3, r3, #7
+ 8008b04:	4413      	add	r3, r2
+ 8008b06:	3384      	adds	r3, #132	; 0x84
+ 8008b08:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 8008b0a:	68fb      	ldr	r3, [r7, #12]
+ 8008b0c:	681b      	ldr	r3, [r3, #0]
+ 8008b0e:	461a      	mov	r2, r3
+ 8008b10:	687b      	ldr	r3, [r7, #4]
+ 8008b12:	01db      	lsls	r3, r3, #7
+ 8008b14:	4413      	add	r3, r2
+ 8008b16:	3384      	adds	r3, #132	; 0x84
+ 8008b18:	461a      	mov	r2, r3
+ 8008b1a:	2300      	movs	r3, #0
+ 8008b1c:	6293      	str	r3, [r2, #40]	; 0x28
+  LTDC_LAYER(hltdc, LayerIdx)->CFBAR = (pLayerCfg->FBStartAdress);
+ 8008b1e:	68fb      	ldr	r3, [r7, #12]
+ 8008b20:	681b      	ldr	r3, [r3, #0]
+ 8008b22:	461a      	mov	r2, r3
+ 8008b24:	687b      	ldr	r3, [r7, #4]
+ 8008b26:	01db      	lsls	r3, r3, #7
+ 8008b28:	4413      	add	r3, r2
+ 8008b2a:	3384      	adds	r3, #132	; 0x84
+ 8008b2c:	461a      	mov	r2, r3
+ 8008b2e:	68bb      	ldr	r3, [r7, #8]
+ 8008b30:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8008b32:	6293      	str	r3, [r2, #40]	; 0x28
+
+  if (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB8888)
+ 8008b34:	68bb      	ldr	r3, [r7, #8]
+ 8008b36:	691b      	ldr	r3, [r3, #16]
+ 8008b38:	2b00      	cmp	r3, #0
+ 8008b3a:	d102      	bne.n	8008b42 <LTDC_SetConfig+0x232>
+  {
+    tmp = 4U;
+ 8008b3c:	2304      	movs	r3, #4
+ 8008b3e:	61fb      	str	r3, [r7, #28]
+ 8008b40:	e01b      	b.n	8008b7a <LTDC_SetConfig+0x26a>
+  }
+  else if (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_RGB888)
+ 8008b42:	68bb      	ldr	r3, [r7, #8]
+ 8008b44:	691b      	ldr	r3, [r3, #16]
+ 8008b46:	2b01      	cmp	r3, #1
+ 8008b48:	d102      	bne.n	8008b50 <LTDC_SetConfig+0x240>
+  {
+    tmp = 3U;
+ 8008b4a:	2303      	movs	r3, #3
+ 8008b4c:	61fb      	str	r3, [r7, #28]
+ 8008b4e:	e014      	b.n	8008b7a <LTDC_SetConfig+0x26a>
+  }
+  else if ((pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB4444) || \
+ 8008b50:	68bb      	ldr	r3, [r7, #8]
+ 8008b52:	691b      	ldr	r3, [r3, #16]
+ 8008b54:	2b04      	cmp	r3, #4
+ 8008b56:	d00b      	beq.n	8008b70 <LTDC_SetConfig+0x260>
+           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_RGB565)   || \
+ 8008b58:	68bb      	ldr	r3, [r7, #8]
+ 8008b5a:	691b      	ldr	r3, [r3, #16]
+  else if ((pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB4444) || \
+ 8008b5c:	2b02      	cmp	r3, #2
+ 8008b5e:	d007      	beq.n	8008b70 <LTDC_SetConfig+0x260>
+           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB1555) || \
+ 8008b60:	68bb      	ldr	r3, [r7, #8]
+ 8008b62:	691b      	ldr	r3, [r3, #16]
+           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_RGB565)   || \
+ 8008b64:	2b03      	cmp	r3, #3
+ 8008b66:	d003      	beq.n	8008b70 <LTDC_SetConfig+0x260>
+           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_AL88))
+ 8008b68:	68bb      	ldr	r3, [r7, #8]
+ 8008b6a:	691b      	ldr	r3, [r3, #16]
+           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB1555) || \
+ 8008b6c:	2b07      	cmp	r3, #7
+ 8008b6e:	d102      	bne.n	8008b76 <LTDC_SetConfig+0x266>
+  {
+    tmp = 2U;
+ 8008b70:	2302      	movs	r3, #2
+ 8008b72:	61fb      	str	r3, [r7, #28]
+ 8008b74:	e001      	b.n	8008b7a <LTDC_SetConfig+0x26a>
+  }
+  else
+  {
+    tmp = 1U;
+ 8008b76:	2301      	movs	r3, #1
+ 8008b78:	61fb      	str	r3, [r7, #28]
+  }
+
+  /* Configure the color frame buffer pitch in byte */
+  LTDC_LAYER(hltdc, LayerIdx)->CFBLR  &= ~(LTDC_LxCFBLR_CFBLL | LTDC_LxCFBLR_CFBP);
+ 8008b7a:	68fb      	ldr	r3, [r7, #12]
+ 8008b7c:	681b      	ldr	r3, [r3, #0]
+ 8008b7e:	461a      	mov	r2, r3
+ 8008b80:	687b      	ldr	r3, [r7, #4]
+ 8008b82:	01db      	lsls	r3, r3, #7
+ 8008b84:	4413      	add	r3, r2
+ 8008b86:	3384      	adds	r3, #132	; 0x84
+ 8008b88:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8008b8a:	68fa      	ldr	r2, [r7, #12]
+ 8008b8c:	6812      	ldr	r2, [r2, #0]
+ 8008b8e:	4611      	mov	r1, r2
+ 8008b90:	687a      	ldr	r2, [r7, #4]
+ 8008b92:	01d2      	lsls	r2, r2, #7
+ 8008b94:	440a      	add	r2, r1
+ 8008b96:	3284      	adds	r2, #132	; 0x84
+ 8008b98:	f003 23e0 	and.w	r3, r3, #3758153728	; 0xe000e000
+ 8008b9c:	62d3      	str	r3, [r2, #44]	; 0x2c
+  LTDC_LAYER(hltdc, LayerIdx)->CFBLR  = (((pLayerCfg->ImageWidth * tmp) << 16U) | (((pLayerCfg->WindowX1 - pLayerCfg->WindowX0) * tmp)  + 3U));
+ 8008b9e:	68bb      	ldr	r3, [r7, #8]
+ 8008ba0:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 8008ba2:	69fa      	ldr	r2, [r7, #28]
+ 8008ba4:	fb02 f303 	mul.w	r3, r2, r3
+ 8008ba8:	041a      	lsls	r2, r3, #16
+ 8008baa:	68bb      	ldr	r3, [r7, #8]
+ 8008bac:	6859      	ldr	r1, [r3, #4]
+ 8008bae:	68bb      	ldr	r3, [r7, #8]
+ 8008bb0:	681b      	ldr	r3, [r3, #0]
+ 8008bb2:	1acb      	subs	r3, r1, r3
+ 8008bb4:	69f9      	ldr	r1, [r7, #28]
+ 8008bb6:	fb01 f303 	mul.w	r3, r1, r3
+ 8008bba:	3303      	adds	r3, #3
+ 8008bbc:	68f9      	ldr	r1, [r7, #12]
+ 8008bbe:	6809      	ldr	r1, [r1, #0]
+ 8008bc0:	4608      	mov	r0, r1
+ 8008bc2:	6879      	ldr	r1, [r7, #4]
+ 8008bc4:	01c9      	lsls	r1, r1, #7
+ 8008bc6:	4401      	add	r1, r0
+ 8008bc8:	3184      	adds	r1, #132	; 0x84
+ 8008bca:	4313      	orrs	r3, r2
+ 8008bcc:	62cb      	str	r3, [r1, #44]	; 0x2c
+  /* Configure the frame buffer line number */
+  LTDC_LAYER(hltdc, LayerIdx)->CFBLNR  &= ~(LTDC_LxCFBLNR_CFBLNBR);
+ 8008bce:	68fb      	ldr	r3, [r7, #12]
+ 8008bd0:	681b      	ldr	r3, [r3, #0]
+ 8008bd2:	461a      	mov	r2, r3
+ 8008bd4:	687b      	ldr	r3, [r7, #4]
+ 8008bd6:	01db      	lsls	r3, r3, #7
+ 8008bd8:	4413      	add	r3, r2
+ 8008bda:	3384      	adds	r3, #132	; 0x84
+ 8008bdc:	6b1a      	ldr	r2, [r3, #48]	; 0x30
+ 8008bde:	68fb      	ldr	r3, [r7, #12]
+ 8008be0:	681b      	ldr	r3, [r3, #0]
+ 8008be2:	4619      	mov	r1, r3
+ 8008be4:	687b      	ldr	r3, [r7, #4]
+ 8008be6:	01db      	lsls	r3, r3, #7
+ 8008be8:	440b      	add	r3, r1
+ 8008bea:	3384      	adds	r3, #132	; 0x84
+ 8008bec:	4619      	mov	r1, r3
+ 8008bee:	4b14      	ldr	r3, [pc, #80]	; (8008c40 <LTDC_SetConfig+0x330>)
+ 8008bf0:	4013      	ands	r3, r2
+ 8008bf2:	630b      	str	r3, [r1, #48]	; 0x30
+  LTDC_LAYER(hltdc, LayerIdx)->CFBLNR  = (pLayerCfg->ImageHeight);
+ 8008bf4:	68fb      	ldr	r3, [r7, #12]
+ 8008bf6:	681b      	ldr	r3, [r3, #0]
+ 8008bf8:	461a      	mov	r2, r3
+ 8008bfa:	687b      	ldr	r3, [r7, #4]
+ 8008bfc:	01db      	lsls	r3, r3, #7
+ 8008bfe:	4413      	add	r3, r2
+ 8008c00:	3384      	adds	r3, #132	; 0x84
+ 8008c02:	461a      	mov	r2, r3
+ 8008c04:	68bb      	ldr	r3, [r7, #8]
+ 8008c06:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8008c08:	6313      	str	r3, [r2, #48]	; 0x30
+
+  /* Enable LTDC_Layer by setting LEN bit */
+  LTDC_LAYER(hltdc, LayerIdx)->CR |= (uint32_t)LTDC_LxCR_LEN;
+ 8008c0a:	68fb      	ldr	r3, [r7, #12]
+ 8008c0c:	681b      	ldr	r3, [r3, #0]
+ 8008c0e:	461a      	mov	r2, r3
+ 8008c10:	687b      	ldr	r3, [r7, #4]
+ 8008c12:	01db      	lsls	r3, r3, #7
+ 8008c14:	4413      	add	r3, r2
+ 8008c16:	3384      	adds	r3, #132	; 0x84
+ 8008c18:	681b      	ldr	r3, [r3, #0]
+ 8008c1a:	68fa      	ldr	r2, [r7, #12]
+ 8008c1c:	6812      	ldr	r2, [r2, #0]
+ 8008c1e:	4611      	mov	r1, r2
+ 8008c20:	687a      	ldr	r2, [r7, #4]
+ 8008c22:	01d2      	lsls	r2, r2, #7
+ 8008c24:	440a      	add	r2, r1
+ 8008c26:	3284      	adds	r2, #132	; 0x84
+ 8008c28:	f043 0301 	orr.w	r3, r3, #1
+ 8008c2c:	6013      	str	r3, [r2, #0]
+}
+ 8008c2e:	bf00      	nop
+ 8008c30:	3724      	adds	r7, #36	; 0x24
+ 8008c32:	46bd      	mov	sp, r7
+ 8008c34:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8008c38:	4770      	bx	lr
+ 8008c3a:	bf00      	nop
+ 8008c3c:	fffff8f8 	.word	0xfffff8f8
+ 8008c40:	fffff800 	.word	0xfffff800
+
+08008c44 <HAL_PWR_EnableBkUpAccess>:
+  * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the 
+  *         Backup Domain Access should be kept enabled.
+  * @retval None
+  */
+void HAL_PWR_EnableBkUpAccess(void)
+{
+ 8008c44:	b480      	push	{r7}
+ 8008c46:	af00      	add	r7, sp, #0
+  /* Enable access to RTC and backup registers */
+  SET_BIT(PWR->CR1, PWR_CR1_DBP);
+ 8008c48:	4b05      	ldr	r3, [pc, #20]	; (8008c60 <HAL_PWR_EnableBkUpAccess+0x1c>)
+ 8008c4a:	681b      	ldr	r3, [r3, #0]
+ 8008c4c:	4a04      	ldr	r2, [pc, #16]	; (8008c60 <HAL_PWR_EnableBkUpAccess+0x1c>)
+ 8008c4e:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 8008c52:	6013      	str	r3, [r2, #0]
+}
+ 8008c54:	bf00      	nop
+ 8008c56:	46bd      	mov	sp, r7
+ 8008c58:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8008c5c:	4770      	bx	lr
+ 8008c5e:	bf00      	nop
+ 8008c60:	40007000 	.word	0x40007000
+
+08008c64 <HAL_PWREx_EnableOverDrive>:
+  *         During the Over-drive switch activation, no peripheral clocks should be enabled.   
+  *         The peripheral clocks must be enabled once the Over-drive mode is activated.   
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void)
+{
+ 8008c64:	b580      	push	{r7, lr}
+ 8008c66:	b082      	sub	sp, #8
+ 8008c68:	af00      	add	r7, sp, #0
+  uint32_t tickstart = 0;
+ 8008c6a:	2300      	movs	r3, #0
+ 8008c6c:	607b      	str	r3, [r7, #4]
+
+  __HAL_RCC_PWR_CLK_ENABLE();
+ 8008c6e:	4b23      	ldr	r3, [pc, #140]	; (8008cfc <HAL_PWREx_EnableOverDrive+0x98>)
+ 8008c70:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8008c72:	4a22      	ldr	r2, [pc, #136]	; (8008cfc <HAL_PWREx_EnableOverDrive+0x98>)
+ 8008c74:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
+ 8008c78:	6413      	str	r3, [r2, #64]	; 0x40
+ 8008c7a:	4b20      	ldr	r3, [pc, #128]	; (8008cfc <HAL_PWREx_EnableOverDrive+0x98>)
+ 8008c7c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8008c7e:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
+ 8008c82:	603b      	str	r3, [r7, #0]
+ 8008c84:	683b      	ldr	r3, [r7, #0]
+  
+  /* Enable the Over-drive to extend the clock frequency to 216 MHz */
+  __HAL_PWR_OVERDRIVE_ENABLE();
+ 8008c86:	4b1e      	ldr	r3, [pc, #120]	; (8008d00 <HAL_PWREx_EnableOverDrive+0x9c>)
+ 8008c88:	681b      	ldr	r3, [r3, #0]
+ 8008c8a:	4a1d      	ldr	r2, [pc, #116]	; (8008d00 <HAL_PWREx_EnableOverDrive+0x9c>)
+ 8008c8c:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
+ 8008c90:	6013      	str	r3, [r2, #0]
+
+  /* Get tick */
+  tickstart = HAL_GetTick();
+ 8008c92:	f7fb ff59 	bl	8004b48 <HAL_GetTick>
+ 8008c96:	6078      	str	r0, [r7, #4]
+
+  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
+ 8008c98:	e009      	b.n	8008cae <HAL_PWREx_EnableOverDrive+0x4a>
+  {
+    if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
+ 8008c9a:	f7fb ff55 	bl	8004b48 <HAL_GetTick>
+ 8008c9e:	4602      	mov	r2, r0
+ 8008ca0:	687b      	ldr	r3, [r7, #4]
+ 8008ca2:	1ad3      	subs	r3, r2, r3
+ 8008ca4:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
+ 8008ca8:	d901      	bls.n	8008cae <HAL_PWREx_EnableOverDrive+0x4a>
+    {
+      return HAL_TIMEOUT;
+ 8008caa:	2303      	movs	r3, #3
+ 8008cac:	e022      	b.n	8008cf4 <HAL_PWREx_EnableOverDrive+0x90>
+  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
+ 8008cae:	4b14      	ldr	r3, [pc, #80]	; (8008d00 <HAL_PWREx_EnableOverDrive+0x9c>)
+ 8008cb0:	685b      	ldr	r3, [r3, #4]
+ 8008cb2:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
+ 8008cb6:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 8008cba:	d1ee      	bne.n	8008c9a <HAL_PWREx_EnableOverDrive+0x36>
+    }
+  }
+  
+  /* Enable the Over-drive switch */
+  __HAL_PWR_OVERDRIVESWITCHING_ENABLE();
+ 8008cbc:	4b10      	ldr	r3, [pc, #64]	; (8008d00 <HAL_PWREx_EnableOverDrive+0x9c>)
+ 8008cbe:	681b      	ldr	r3, [r3, #0]
+ 8008cc0:	4a0f      	ldr	r2, [pc, #60]	; (8008d00 <HAL_PWREx_EnableOverDrive+0x9c>)
+ 8008cc2:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
+ 8008cc6:	6013      	str	r3, [r2, #0]
+
+  /* Get tick */
+  tickstart = HAL_GetTick();
+ 8008cc8:	f7fb ff3e 	bl	8004b48 <HAL_GetTick>
+ 8008ccc:	6078      	str	r0, [r7, #4]
+
+  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
+ 8008cce:	e009      	b.n	8008ce4 <HAL_PWREx_EnableOverDrive+0x80>
+  {
+    if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
+ 8008cd0:	f7fb ff3a 	bl	8004b48 <HAL_GetTick>
+ 8008cd4:	4602      	mov	r2, r0
+ 8008cd6:	687b      	ldr	r3, [r7, #4]
+ 8008cd8:	1ad3      	subs	r3, r2, r3
+ 8008cda:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
+ 8008cde:	d901      	bls.n	8008ce4 <HAL_PWREx_EnableOverDrive+0x80>
+    {
+      return HAL_TIMEOUT;
+ 8008ce0:	2303      	movs	r3, #3
+ 8008ce2:	e007      	b.n	8008cf4 <HAL_PWREx_EnableOverDrive+0x90>
+  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
+ 8008ce4:	4b06      	ldr	r3, [pc, #24]	; (8008d00 <HAL_PWREx_EnableOverDrive+0x9c>)
+ 8008ce6:	685b      	ldr	r3, [r3, #4]
+ 8008ce8:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 8008cec:	f5b3 3f00 	cmp.w	r3, #131072	; 0x20000
+ 8008cf0:	d1ee      	bne.n	8008cd0 <HAL_PWREx_EnableOverDrive+0x6c>
+    }
+  } 
+  return HAL_OK;
+ 8008cf2:	2300      	movs	r3, #0
+}
+ 8008cf4:	4618      	mov	r0, r3
+ 8008cf6:	3708      	adds	r7, #8
+ 8008cf8:	46bd      	mov	sp, r7
+ 8008cfa:	bd80      	pop	{r7, pc}
+ 8008cfc:	40023800 	.word	0x40023800
+ 8008d00:	40007000 	.word	0x40007000
+
+08008d04 <HAL_RCC_OscConfig>:
+  *         supported by this function. User should request a transition to HSE Off
+  *         first and then HSE On or HSE Bypass.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
+{
+ 8008d04:	b580      	push	{r7, lr}
+ 8008d06:	b086      	sub	sp, #24
+ 8008d08:	af00      	add	r7, sp, #0
+ 8008d0a:	6078      	str	r0, [r7, #4]
+  uint32_t tickstart;
+  uint32_t pll_config;
+  FlagStatus pwrclkchanged = RESET;
+ 8008d0c:	2300      	movs	r3, #0
+ 8008d0e:	75fb      	strb	r3, [r7, #23]
+
+  /* Check Null pointer */
+  if (RCC_OscInitStruct == NULL)
+ 8008d10:	687b      	ldr	r3, [r7, #4]
+ 8008d12:	2b00      	cmp	r3, #0
+ 8008d14:	d101      	bne.n	8008d1a <HAL_RCC_OscConfig+0x16>
+  {
+    return HAL_ERROR;
+ 8008d16:	2301      	movs	r3, #1
+ 8008d18:	e291      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+
+  /* Check the parameters */
+  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
+
+  /*------------------------------- HSE Configuration ------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
+ 8008d1a:	687b      	ldr	r3, [r7, #4]
+ 8008d1c:	681b      	ldr	r3, [r3, #0]
+ 8008d1e:	f003 0301 	and.w	r3, r3, #1
+ 8008d22:	2b00      	cmp	r3, #0
+ 8008d24:	f000 8087 	beq.w	8008e36 <HAL_RCC_OscConfig+0x132>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
+    /* When the HSE is used as system clock or clock source for PLL, It can not be disabled */
+    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
+ 8008d28:	4b96      	ldr	r3, [pc, #600]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008d2a:	689b      	ldr	r3, [r3, #8]
+ 8008d2c:	f003 030c 	and.w	r3, r3, #12
+ 8008d30:	2b04      	cmp	r3, #4
+ 8008d32:	d00c      	beq.n	8008d4e <HAL_RCC_OscConfig+0x4a>
+        || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
+ 8008d34:	4b93      	ldr	r3, [pc, #588]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008d36:	689b      	ldr	r3, [r3, #8]
+ 8008d38:	f003 030c 	and.w	r3, r3, #12
+ 8008d3c:	2b08      	cmp	r3, #8
+ 8008d3e:	d112      	bne.n	8008d66 <HAL_RCC_OscConfig+0x62>
+ 8008d40:	4b90      	ldr	r3, [pc, #576]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008d42:	685b      	ldr	r3, [r3, #4]
+ 8008d44:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
+ 8008d48:	f5b3 0f80 	cmp.w	r3, #4194304	; 0x400000
+ 8008d4c:	d10b      	bne.n	8008d66 <HAL_RCC_OscConfig+0x62>
+    {
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 8008d4e:	4b8d      	ldr	r3, [pc, #564]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008d50:	681b      	ldr	r3, [r3, #0]
+ 8008d52:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 8008d56:	2b00      	cmp	r3, #0
+ 8008d58:	d06c      	beq.n	8008e34 <HAL_RCC_OscConfig+0x130>
+ 8008d5a:	687b      	ldr	r3, [r7, #4]
+ 8008d5c:	685b      	ldr	r3, [r3, #4]
+ 8008d5e:	2b00      	cmp	r3, #0
+ 8008d60:	d168      	bne.n	8008e34 <HAL_RCC_OscConfig+0x130>
+      {
+        return HAL_ERROR;
+ 8008d62:	2301      	movs	r3, #1
+ 8008d64:	e26b      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+      }
+    }
+    else
+    {
+      /* Set the new HSE configuration ---------------------------------------*/
+      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
+ 8008d66:	687b      	ldr	r3, [r7, #4]
+ 8008d68:	685b      	ldr	r3, [r3, #4]
+ 8008d6a:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 8008d6e:	d106      	bne.n	8008d7e <HAL_RCC_OscConfig+0x7a>
+ 8008d70:	4b84      	ldr	r3, [pc, #528]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008d72:	681b      	ldr	r3, [r3, #0]
+ 8008d74:	4a83      	ldr	r2, [pc, #524]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008d76:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
+ 8008d7a:	6013      	str	r3, [r2, #0]
+ 8008d7c:	e02e      	b.n	8008ddc <HAL_RCC_OscConfig+0xd8>
+ 8008d7e:	687b      	ldr	r3, [r7, #4]
+ 8008d80:	685b      	ldr	r3, [r3, #4]
+ 8008d82:	2b00      	cmp	r3, #0
+ 8008d84:	d10c      	bne.n	8008da0 <HAL_RCC_OscConfig+0x9c>
+ 8008d86:	4b7f      	ldr	r3, [pc, #508]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008d88:	681b      	ldr	r3, [r3, #0]
+ 8008d8a:	4a7e      	ldr	r2, [pc, #504]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008d8c:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
+ 8008d90:	6013      	str	r3, [r2, #0]
+ 8008d92:	4b7c      	ldr	r3, [pc, #496]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008d94:	681b      	ldr	r3, [r3, #0]
+ 8008d96:	4a7b      	ldr	r2, [pc, #492]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008d98:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
+ 8008d9c:	6013      	str	r3, [r2, #0]
+ 8008d9e:	e01d      	b.n	8008ddc <HAL_RCC_OscConfig+0xd8>
+ 8008da0:	687b      	ldr	r3, [r7, #4]
+ 8008da2:	685b      	ldr	r3, [r3, #4]
+ 8008da4:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
+ 8008da8:	d10c      	bne.n	8008dc4 <HAL_RCC_OscConfig+0xc0>
+ 8008daa:	4b76      	ldr	r3, [pc, #472]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008dac:	681b      	ldr	r3, [r3, #0]
+ 8008dae:	4a75      	ldr	r2, [pc, #468]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008db0:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
+ 8008db4:	6013      	str	r3, [r2, #0]
+ 8008db6:	4b73      	ldr	r3, [pc, #460]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008db8:	681b      	ldr	r3, [r3, #0]
+ 8008dba:	4a72      	ldr	r2, [pc, #456]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008dbc:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
+ 8008dc0:	6013      	str	r3, [r2, #0]
+ 8008dc2:	e00b      	b.n	8008ddc <HAL_RCC_OscConfig+0xd8>
+ 8008dc4:	4b6f      	ldr	r3, [pc, #444]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008dc6:	681b      	ldr	r3, [r3, #0]
+ 8008dc8:	4a6e      	ldr	r2, [pc, #440]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008dca:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
+ 8008dce:	6013      	str	r3, [r2, #0]
+ 8008dd0:	4b6c      	ldr	r3, [pc, #432]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008dd2:	681b      	ldr	r3, [r3, #0]
+ 8008dd4:	4a6b      	ldr	r2, [pc, #428]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008dd6:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
+ 8008dda:	6013      	str	r3, [r2, #0]
+
+      /* Check the HSE State */
+      if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
+ 8008ddc:	687b      	ldr	r3, [r7, #4]
+ 8008dde:	685b      	ldr	r3, [r3, #4]
+ 8008de0:	2b00      	cmp	r3, #0
+ 8008de2:	d013      	beq.n	8008e0c <HAL_RCC_OscConfig+0x108>
+      {
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 8008de4:	f7fb feb0 	bl	8004b48 <HAL_GetTick>
+ 8008de8:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSE is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 8008dea:	e008      	b.n	8008dfe <HAL_RCC_OscConfig+0xfa>
+        {
+          if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
+ 8008dec:	f7fb feac 	bl	8004b48 <HAL_GetTick>
+ 8008df0:	4602      	mov	r2, r0
+ 8008df2:	693b      	ldr	r3, [r7, #16]
+ 8008df4:	1ad3      	subs	r3, r2, r3
+ 8008df6:	2b64      	cmp	r3, #100	; 0x64
+ 8008df8:	d901      	bls.n	8008dfe <HAL_RCC_OscConfig+0xfa>
+          {
+            return HAL_TIMEOUT;
+ 8008dfa:	2303      	movs	r3, #3
+ 8008dfc:	e21f      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 8008dfe:	4b61      	ldr	r3, [pc, #388]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008e00:	681b      	ldr	r3, [r3, #0]
+ 8008e02:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 8008e06:	2b00      	cmp	r3, #0
+ 8008e08:	d0f0      	beq.n	8008dec <HAL_RCC_OscConfig+0xe8>
+ 8008e0a:	e014      	b.n	8008e36 <HAL_RCC_OscConfig+0x132>
+        }
+      }
+      else
+      {
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 8008e0c:	f7fb fe9c 	bl	8004b48 <HAL_GetTick>
+ 8008e10:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSE is bypassed or disabled */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
+ 8008e12:	e008      	b.n	8008e26 <HAL_RCC_OscConfig+0x122>
+        {
+          if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
+ 8008e14:	f7fb fe98 	bl	8004b48 <HAL_GetTick>
+ 8008e18:	4602      	mov	r2, r0
+ 8008e1a:	693b      	ldr	r3, [r7, #16]
+ 8008e1c:	1ad3      	subs	r3, r2, r3
+ 8008e1e:	2b64      	cmp	r3, #100	; 0x64
+ 8008e20:	d901      	bls.n	8008e26 <HAL_RCC_OscConfig+0x122>
+          {
+            return HAL_TIMEOUT;
+ 8008e22:	2303      	movs	r3, #3
+ 8008e24:	e20b      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
+ 8008e26:	4b57      	ldr	r3, [pc, #348]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008e28:	681b      	ldr	r3, [r3, #0]
+ 8008e2a:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 8008e2e:	2b00      	cmp	r3, #0
+ 8008e30:	d1f0      	bne.n	8008e14 <HAL_RCC_OscConfig+0x110>
+ 8008e32:	e000      	b.n	8008e36 <HAL_RCC_OscConfig+0x132>
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 8008e34:	bf00      	nop
+        }
+      }
+    }
+  }
+  /*----------------------------- HSI Configuration --------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
+ 8008e36:	687b      	ldr	r3, [r7, #4]
+ 8008e38:	681b      	ldr	r3, [r3, #0]
+ 8008e3a:	f003 0302 	and.w	r3, r3, #2
+ 8008e3e:	2b00      	cmp	r3, #0
+ 8008e40:	d069      	beq.n	8008f16 <HAL_RCC_OscConfig+0x212>
+    /* Check the parameters */
+    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
+    assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
+
+    /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
+    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
+ 8008e42:	4b50      	ldr	r3, [pc, #320]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008e44:	689b      	ldr	r3, [r3, #8]
+ 8008e46:	f003 030c 	and.w	r3, r3, #12
+ 8008e4a:	2b00      	cmp	r3, #0
+ 8008e4c:	d00b      	beq.n	8008e66 <HAL_RCC_OscConfig+0x162>
+        || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
+ 8008e4e:	4b4d      	ldr	r3, [pc, #308]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008e50:	689b      	ldr	r3, [r3, #8]
+ 8008e52:	f003 030c 	and.w	r3, r3, #12
+ 8008e56:	2b08      	cmp	r3, #8
+ 8008e58:	d11c      	bne.n	8008e94 <HAL_RCC_OscConfig+0x190>
+ 8008e5a:	4b4a      	ldr	r3, [pc, #296]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008e5c:	685b      	ldr	r3, [r3, #4]
+ 8008e5e:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
+ 8008e62:	2b00      	cmp	r3, #0
+ 8008e64:	d116      	bne.n	8008e94 <HAL_RCC_OscConfig+0x190>
+    {
+      /* When HSI is used as system clock it will not disabled */
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+ 8008e66:	4b47      	ldr	r3, [pc, #284]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008e68:	681b      	ldr	r3, [r3, #0]
+ 8008e6a:	f003 0302 	and.w	r3, r3, #2
+ 8008e6e:	2b00      	cmp	r3, #0
+ 8008e70:	d005      	beq.n	8008e7e <HAL_RCC_OscConfig+0x17a>
+ 8008e72:	687b      	ldr	r3, [r7, #4]
+ 8008e74:	68db      	ldr	r3, [r3, #12]
+ 8008e76:	2b01      	cmp	r3, #1
+ 8008e78:	d001      	beq.n	8008e7e <HAL_RCC_OscConfig+0x17a>
+      {
+        return HAL_ERROR;
+ 8008e7a:	2301      	movs	r3, #1
+ 8008e7c:	e1df      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+      }
+      /* Otherwise, just the calibration is allowed */
+      else
+      {
+        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
+        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
+ 8008e7e:	4b41      	ldr	r3, [pc, #260]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008e80:	681b      	ldr	r3, [r3, #0]
+ 8008e82:	f023 02f8 	bic.w	r2, r3, #248	; 0xf8
+ 8008e86:	687b      	ldr	r3, [r7, #4]
+ 8008e88:	691b      	ldr	r3, [r3, #16]
+ 8008e8a:	00db      	lsls	r3, r3, #3
+ 8008e8c:	493d      	ldr	r1, [pc, #244]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008e8e:	4313      	orrs	r3, r2
+ 8008e90:	600b      	str	r3, [r1, #0]
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+ 8008e92:	e040      	b.n	8008f16 <HAL_RCC_OscConfig+0x212>
+      }
+    }
+    else
+    {
+      /* Check the HSI State */
+      if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
+ 8008e94:	687b      	ldr	r3, [r7, #4]
+ 8008e96:	68db      	ldr	r3, [r3, #12]
+ 8008e98:	2b00      	cmp	r3, #0
+ 8008e9a:	d023      	beq.n	8008ee4 <HAL_RCC_OscConfig+0x1e0>
+      {
+        /* Enable the Internal High Speed oscillator (HSI). */
+        __HAL_RCC_HSI_ENABLE();
+ 8008e9c:	4b39      	ldr	r3, [pc, #228]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008e9e:	681b      	ldr	r3, [r3, #0]
+ 8008ea0:	4a38      	ldr	r2, [pc, #224]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008ea2:	f043 0301 	orr.w	r3, r3, #1
+ 8008ea6:	6013      	str	r3, [r2, #0]
+
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 8008ea8:	f7fb fe4e 	bl	8004b48 <HAL_GetTick>
+ 8008eac:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSI is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 8008eae:	e008      	b.n	8008ec2 <HAL_RCC_OscConfig+0x1be>
+        {
+          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
+ 8008eb0:	f7fb fe4a 	bl	8004b48 <HAL_GetTick>
+ 8008eb4:	4602      	mov	r2, r0
+ 8008eb6:	693b      	ldr	r3, [r7, #16]
+ 8008eb8:	1ad3      	subs	r3, r2, r3
+ 8008eba:	2b02      	cmp	r3, #2
+ 8008ebc:	d901      	bls.n	8008ec2 <HAL_RCC_OscConfig+0x1be>
+          {
+            return HAL_TIMEOUT;
+ 8008ebe:	2303      	movs	r3, #3
+ 8008ec0:	e1bd      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 8008ec2:	4b30      	ldr	r3, [pc, #192]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008ec4:	681b      	ldr	r3, [r3, #0]
+ 8008ec6:	f003 0302 	and.w	r3, r3, #2
+ 8008eca:	2b00      	cmp	r3, #0
+ 8008ecc:	d0f0      	beq.n	8008eb0 <HAL_RCC_OscConfig+0x1ac>
+          }
+        }
+
+        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
+        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
+ 8008ece:	4b2d      	ldr	r3, [pc, #180]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008ed0:	681b      	ldr	r3, [r3, #0]
+ 8008ed2:	f023 02f8 	bic.w	r2, r3, #248	; 0xf8
+ 8008ed6:	687b      	ldr	r3, [r7, #4]
+ 8008ed8:	691b      	ldr	r3, [r3, #16]
+ 8008eda:	00db      	lsls	r3, r3, #3
+ 8008edc:	4929      	ldr	r1, [pc, #164]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008ede:	4313      	orrs	r3, r2
+ 8008ee0:	600b      	str	r3, [r1, #0]
+ 8008ee2:	e018      	b.n	8008f16 <HAL_RCC_OscConfig+0x212>
+      }
+      else
+      {
+        /* Disable the Internal High Speed oscillator (HSI). */
+        __HAL_RCC_HSI_DISABLE();
+ 8008ee4:	4b27      	ldr	r3, [pc, #156]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008ee6:	681b      	ldr	r3, [r3, #0]
+ 8008ee8:	4a26      	ldr	r2, [pc, #152]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008eea:	f023 0301 	bic.w	r3, r3, #1
+ 8008eee:	6013      	str	r3, [r2, #0]
+
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 8008ef0:	f7fb fe2a 	bl	8004b48 <HAL_GetTick>
+ 8008ef4:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSI is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+ 8008ef6:	e008      	b.n	8008f0a <HAL_RCC_OscConfig+0x206>
+        {
+          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
+ 8008ef8:	f7fb fe26 	bl	8004b48 <HAL_GetTick>
+ 8008efc:	4602      	mov	r2, r0
+ 8008efe:	693b      	ldr	r3, [r7, #16]
+ 8008f00:	1ad3      	subs	r3, r2, r3
+ 8008f02:	2b02      	cmp	r3, #2
+ 8008f04:	d901      	bls.n	8008f0a <HAL_RCC_OscConfig+0x206>
+          {
+            return HAL_TIMEOUT;
+ 8008f06:	2303      	movs	r3, #3
+ 8008f08:	e199      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+ 8008f0a:	4b1e      	ldr	r3, [pc, #120]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008f0c:	681b      	ldr	r3, [r3, #0]
+ 8008f0e:	f003 0302 	and.w	r3, r3, #2
+ 8008f12:	2b00      	cmp	r3, #0
+ 8008f14:	d1f0      	bne.n	8008ef8 <HAL_RCC_OscConfig+0x1f4>
+        }
+      }
+    }
+  }
+  /*------------------------------ LSI Configuration -------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
+ 8008f16:	687b      	ldr	r3, [r7, #4]
+ 8008f18:	681b      	ldr	r3, [r3, #0]
+ 8008f1a:	f003 0308 	and.w	r3, r3, #8
+ 8008f1e:	2b00      	cmp	r3, #0
+ 8008f20:	d038      	beq.n	8008f94 <HAL_RCC_OscConfig+0x290>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
+
+    /* Check the LSI State */
+    if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
+ 8008f22:	687b      	ldr	r3, [r7, #4]
+ 8008f24:	695b      	ldr	r3, [r3, #20]
+ 8008f26:	2b00      	cmp	r3, #0
+ 8008f28:	d019      	beq.n	8008f5e <HAL_RCC_OscConfig+0x25a>
+    {
+      /* Enable the Internal Low Speed oscillator (LSI). */
+      __HAL_RCC_LSI_ENABLE();
+ 8008f2a:	4b16      	ldr	r3, [pc, #88]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008f2c:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8008f2e:	4a15      	ldr	r2, [pc, #84]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008f30:	f043 0301 	orr.w	r3, r3, #1
+ 8008f34:	6753      	str	r3, [r2, #116]	; 0x74
+
+      /* Get Start Tick*/
+      tickstart = HAL_GetTick();
+ 8008f36:	f7fb fe07 	bl	8004b48 <HAL_GetTick>
+ 8008f3a:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSI is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
+ 8008f3c:	e008      	b.n	8008f50 <HAL_RCC_OscConfig+0x24c>
+      {
+        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
+ 8008f3e:	f7fb fe03 	bl	8004b48 <HAL_GetTick>
+ 8008f42:	4602      	mov	r2, r0
+ 8008f44:	693b      	ldr	r3, [r7, #16]
+ 8008f46:	1ad3      	subs	r3, r2, r3
+ 8008f48:	2b02      	cmp	r3, #2
+ 8008f4a:	d901      	bls.n	8008f50 <HAL_RCC_OscConfig+0x24c>
+        {
+          return HAL_TIMEOUT;
+ 8008f4c:	2303      	movs	r3, #3
+ 8008f4e:	e176      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
+ 8008f50:	4b0c      	ldr	r3, [pc, #48]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008f52:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8008f54:	f003 0302 	and.w	r3, r3, #2
+ 8008f58:	2b00      	cmp	r3, #0
+ 8008f5a:	d0f0      	beq.n	8008f3e <HAL_RCC_OscConfig+0x23a>
+ 8008f5c:	e01a      	b.n	8008f94 <HAL_RCC_OscConfig+0x290>
+      }
+    }
+    else
+    {
+      /* Disable the Internal Low Speed oscillator (LSI). */
+      __HAL_RCC_LSI_DISABLE();
+ 8008f5e:	4b09      	ldr	r3, [pc, #36]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008f60:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8008f62:	4a08      	ldr	r2, [pc, #32]	; (8008f84 <HAL_RCC_OscConfig+0x280>)
+ 8008f64:	f023 0301 	bic.w	r3, r3, #1
+ 8008f68:	6753      	str	r3, [r2, #116]	; 0x74
+
+      /* Get Start Tick*/
+      tickstart = HAL_GetTick();
+ 8008f6a:	f7fb fded 	bl	8004b48 <HAL_GetTick>
+ 8008f6e:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSI is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
+ 8008f70:	e00a      	b.n	8008f88 <HAL_RCC_OscConfig+0x284>
+      {
+        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
+ 8008f72:	f7fb fde9 	bl	8004b48 <HAL_GetTick>
+ 8008f76:	4602      	mov	r2, r0
+ 8008f78:	693b      	ldr	r3, [r7, #16]
+ 8008f7a:	1ad3      	subs	r3, r2, r3
+ 8008f7c:	2b02      	cmp	r3, #2
+ 8008f7e:	d903      	bls.n	8008f88 <HAL_RCC_OscConfig+0x284>
+        {
+          return HAL_TIMEOUT;
+ 8008f80:	2303      	movs	r3, #3
+ 8008f82:	e15c      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+ 8008f84:	40023800 	.word	0x40023800
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
+ 8008f88:	4b91      	ldr	r3, [pc, #580]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8008f8a:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8008f8c:	f003 0302 	and.w	r3, r3, #2
+ 8008f90:	2b00      	cmp	r3, #0
+ 8008f92:	d1ee      	bne.n	8008f72 <HAL_RCC_OscConfig+0x26e>
+        }
+      }
+    }
+  }
+  /*------------------------------ LSE Configuration -------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
+ 8008f94:	687b      	ldr	r3, [r7, #4]
+ 8008f96:	681b      	ldr	r3, [r3, #0]
+ 8008f98:	f003 0304 	and.w	r3, r3, #4
+ 8008f9c:	2b00      	cmp	r3, #0
+ 8008f9e:	f000 80a4 	beq.w	80090ea <HAL_RCC_OscConfig+0x3e6>
+    /* Check the parameters */
+    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
+
+    /* Update LSE configuration in Backup Domain control register    */
+    /* Requires to enable write access to Backup Domain of necessary */
+    if (__HAL_RCC_PWR_IS_CLK_DISABLED())
+ 8008fa2:	4b8b      	ldr	r3, [pc, #556]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8008fa4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8008fa6:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
+ 8008faa:	2b00      	cmp	r3, #0
+ 8008fac:	d10d      	bne.n	8008fca <HAL_RCC_OscConfig+0x2c6>
+    {
+      /* Enable Power Clock*/
+      __HAL_RCC_PWR_CLK_ENABLE();
+ 8008fae:	4b88      	ldr	r3, [pc, #544]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8008fb0:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8008fb2:	4a87      	ldr	r2, [pc, #540]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8008fb4:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
+ 8008fb8:	6413      	str	r3, [r2, #64]	; 0x40
+ 8008fba:	4b85      	ldr	r3, [pc, #532]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8008fbc:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8008fbe:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
+ 8008fc2:	60bb      	str	r3, [r7, #8]
+ 8008fc4:	68bb      	ldr	r3, [r7, #8]
+      pwrclkchanged = SET;
+ 8008fc6:	2301      	movs	r3, #1
+ 8008fc8:	75fb      	strb	r3, [r7, #23]
+    }
+
+    if (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
+ 8008fca:	4b82      	ldr	r3, [pc, #520]	; (80091d4 <HAL_RCC_OscConfig+0x4d0>)
+ 8008fcc:	681b      	ldr	r3, [r3, #0]
+ 8008fce:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 8008fd2:	2b00      	cmp	r3, #0
+ 8008fd4:	d118      	bne.n	8009008 <HAL_RCC_OscConfig+0x304>
+    {
+      /* Enable write access to Backup domain */
+      PWR->CR1 |= PWR_CR1_DBP;
+ 8008fd6:	4b7f      	ldr	r3, [pc, #508]	; (80091d4 <HAL_RCC_OscConfig+0x4d0>)
+ 8008fd8:	681b      	ldr	r3, [r3, #0]
+ 8008fda:	4a7e      	ldr	r2, [pc, #504]	; (80091d4 <HAL_RCC_OscConfig+0x4d0>)
+ 8008fdc:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 8008fe0:	6013      	str	r3, [r2, #0]
+
+      /* Wait for Backup domain Write protection disable */
+      tickstart = HAL_GetTick();
+ 8008fe2:	f7fb fdb1 	bl	8004b48 <HAL_GetTick>
+ 8008fe6:	6138      	str	r0, [r7, #16]
+
+      while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
+ 8008fe8:	e008      	b.n	8008ffc <HAL_RCC_OscConfig+0x2f8>
+      {
+        if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
+ 8008fea:	f7fb fdad 	bl	8004b48 <HAL_GetTick>
+ 8008fee:	4602      	mov	r2, r0
+ 8008ff0:	693b      	ldr	r3, [r7, #16]
+ 8008ff2:	1ad3      	subs	r3, r2, r3
+ 8008ff4:	2b64      	cmp	r3, #100	; 0x64
+ 8008ff6:	d901      	bls.n	8008ffc <HAL_RCC_OscConfig+0x2f8>
+        {
+          return HAL_TIMEOUT;
+ 8008ff8:	2303      	movs	r3, #3
+ 8008ffa:	e120      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+      while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
+ 8008ffc:	4b75      	ldr	r3, [pc, #468]	; (80091d4 <HAL_RCC_OscConfig+0x4d0>)
+ 8008ffe:	681b      	ldr	r3, [r3, #0]
+ 8009000:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 8009004:	2b00      	cmp	r3, #0
+ 8009006:	d0f0      	beq.n	8008fea <HAL_RCC_OscConfig+0x2e6>
+        }
+      }
+    }
+
+    /* Set the new LSE configuration -----------------------------------------*/
+    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
+ 8009008:	687b      	ldr	r3, [r7, #4]
+ 800900a:	689b      	ldr	r3, [r3, #8]
+ 800900c:	2b01      	cmp	r3, #1
+ 800900e:	d106      	bne.n	800901e <HAL_RCC_OscConfig+0x31a>
+ 8009010:	4b6f      	ldr	r3, [pc, #444]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009012:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8009014:	4a6e      	ldr	r2, [pc, #440]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009016:	f043 0301 	orr.w	r3, r3, #1
+ 800901a:	6713      	str	r3, [r2, #112]	; 0x70
+ 800901c:	e02d      	b.n	800907a <HAL_RCC_OscConfig+0x376>
+ 800901e:	687b      	ldr	r3, [r7, #4]
+ 8009020:	689b      	ldr	r3, [r3, #8]
+ 8009022:	2b00      	cmp	r3, #0
+ 8009024:	d10c      	bne.n	8009040 <HAL_RCC_OscConfig+0x33c>
+ 8009026:	4b6a      	ldr	r3, [pc, #424]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009028:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 800902a:	4a69      	ldr	r2, [pc, #420]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 800902c:	f023 0301 	bic.w	r3, r3, #1
+ 8009030:	6713      	str	r3, [r2, #112]	; 0x70
+ 8009032:	4b67      	ldr	r3, [pc, #412]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009034:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8009036:	4a66      	ldr	r2, [pc, #408]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009038:	f023 0304 	bic.w	r3, r3, #4
+ 800903c:	6713      	str	r3, [r2, #112]	; 0x70
+ 800903e:	e01c      	b.n	800907a <HAL_RCC_OscConfig+0x376>
+ 8009040:	687b      	ldr	r3, [r7, #4]
+ 8009042:	689b      	ldr	r3, [r3, #8]
+ 8009044:	2b05      	cmp	r3, #5
+ 8009046:	d10c      	bne.n	8009062 <HAL_RCC_OscConfig+0x35e>
+ 8009048:	4b61      	ldr	r3, [pc, #388]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 800904a:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 800904c:	4a60      	ldr	r2, [pc, #384]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 800904e:	f043 0304 	orr.w	r3, r3, #4
+ 8009052:	6713      	str	r3, [r2, #112]	; 0x70
+ 8009054:	4b5e      	ldr	r3, [pc, #376]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009056:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8009058:	4a5d      	ldr	r2, [pc, #372]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 800905a:	f043 0301 	orr.w	r3, r3, #1
+ 800905e:	6713      	str	r3, [r2, #112]	; 0x70
+ 8009060:	e00b      	b.n	800907a <HAL_RCC_OscConfig+0x376>
+ 8009062:	4b5b      	ldr	r3, [pc, #364]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009064:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8009066:	4a5a      	ldr	r2, [pc, #360]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009068:	f023 0301 	bic.w	r3, r3, #1
+ 800906c:	6713      	str	r3, [r2, #112]	; 0x70
+ 800906e:	4b58      	ldr	r3, [pc, #352]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009070:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8009072:	4a57      	ldr	r2, [pc, #348]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009074:	f023 0304 	bic.w	r3, r3, #4
+ 8009078:	6713      	str	r3, [r2, #112]	; 0x70
+    /* Check the LSE State */
+    if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
+ 800907a:	687b      	ldr	r3, [r7, #4]
+ 800907c:	689b      	ldr	r3, [r3, #8]
+ 800907e:	2b00      	cmp	r3, #0
+ 8009080:	d015      	beq.n	80090ae <HAL_RCC_OscConfig+0x3aa>
+    {
+      /* Get Start Tick*/
+      tickstart = HAL_GetTick();
+ 8009082:	f7fb fd61 	bl	8004b48 <HAL_GetTick>
+ 8009086:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSE is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 8009088:	e00a      	b.n	80090a0 <HAL_RCC_OscConfig+0x39c>
+      {
+        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
+ 800908a:	f7fb fd5d 	bl	8004b48 <HAL_GetTick>
+ 800908e:	4602      	mov	r2, r0
+ 8009090:	693b      	ldr	r3, [r7, #16]
+ 8009092:	1ad3      	subs	r3, r2, r3
+ 8009094:	f241 3288 	movw	r2, #5000	; 0x1388
+ 8009098:	4293      	cmp	r3, r2
+ 800909a:	d901      	bls.n	80090a0 <HAL_RCC_OscConfig+0x39c>
+        {
+          return HAL_TIMEOUT;
+ 800909c:	2303      	movs	r3, #3
+ 800909e:	e0ce      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 80090a0:	4b4b      	ldr	r3, [pc, #300]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 80090a2:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80090a4:	f003 0302 	and.w	r3, r3, #2
+ 80090a8:	2b00      	cmp	r3, #0
+ 80090aa:	d0ee      	beq.n	800908a <HAL_RCC_OscConfig+0x386>
+ 80090ac:	e014      	b.n	80090d8 <HAL_RCC_OscConfig+0x3d4>
+      }
+    }
+    else
+    {
+      /* Get Start Tick*/
+      tickstart = HAL_GetTick();
+ 80090ae:	f7fb fd4b 	bl	8004b48 <HAL_GetTick>
+ 80090b2:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSE is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
+ 80090b4:	e00a      	b.n	80090cc <HAL_RCC_OscConfig+0x3c8>
+      {
+        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
+ 80090b6:	f7fb fd47 	bl	8004b48 <HAL_GetTick>
+ 80090ba:	4602      	mov	r2, r0
+ 80090bc:	693b      	ldr	r3, [r7, #16]
+ 80090be:	1ad3      	subs	r3, r2, r3
+ 80090c0:	f241 3288 	movw	r2, #5000	; 0x1388
+ 80090c4:	4293      	cmp	r3, r2
+ 80090c6:	d901      	bls.n	80090cc <HAL_RCC_OscConfig+0x3c8>
+        {
+          return HAL_TIMEOUT;
+ 80090c8:	2303      	movs	r3, #3
+ 80090ca:	e0b8      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
+ 80090cc:	4b40      	ldr	r3, [pc, #256]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 80090ce:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80090d0:	f003 0302 	and.w	r3, r3, #2
+ 80090d4:	2b00      	cmp	r3, #0
+ 80090d6:	d1ee      	bne.n	80090b6 <HAL_RCC_OscConfig+0x3b2>
+        }
+      }
+    }
+
+    /* Restore clock configuration if changed */
+    if (pwrclkchanged == SET)
+ 80090d8:	7dfb      	ldrb	r3, [r7, #23]
+ 80090da:	2b01      	cmp	r3, #1
+ 80090dc:	d105      	bne.n	80090ea <HAL_RCC_OscConfig+0x3e6>
+    {
+      __HAL_RCC_PWR_CLK_DISABLE();
+ 80090de:	4b3c      	ldr	r3, [pc, #240]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 80090e0:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 80090e2:	4a3b      	ldr	r2, [pc, #236]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 80090e4:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
+ 80090e8:	6413      	str	r3, [r2, #64]	; 0x40
+    }
+  }
+  /*-------------------------------- PLL Configuration -----------------------*/
+  /* Check the parameters */
+  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
+  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
+ 80090ea:	687b      	ldr	r3, [r7, #4]
+ 80090ec:	699b      	ldr	r3, [r3, #24]
+ 80090ee:	2b00      	cmp	r3, #0
+ 80090f0:	f000 80a4 	beq.w	800923c <HAL_RCC_OscConfig+0x538>
+  {
+    /* Check if the PLL is used as system clock or not */
+    if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
+ 80090f4:	4b36      	ldr	r3, [pc, #216]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 80090f6:	689b      	ldr	r3, [r3, #8]
+ 80090f8:	f003 030c 	and.w	r3, r3, #12
+ 80090fc:	2b08      	cmp	r3, #8
+ 80090fe:	d06b      	beq.n	80091d8 <HAL_RCC_OscConfig+0x4d4>
+    {
+      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
+ 8009100:	687b      	ldr	r3, [r7, #4]
+ 8009102:	699b      	ldr	r3, [r3, #24]
+ 8009104:	2b02      	cmp	r3, #2
+ 8009106:	d149      	bne.n	800919c <HAL_RCC_OscConfig+0x498>
+#if defined (RCC_PLLCFGR_PLLR)
+        assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
+#endif
+
+        /* Disable the main PLL. */
+        __HAL_RCC_PLL_DISABLE();
+ 8009108:	4b31      	ldr	r3, [pc, #196]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 800910a:	681b      	ldr	r3, [r3, #0]
+ 800910c:	4a30      	ldr	r2, [pc, #192]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 800910e:	f023 7380 	bic.w	r3, r3, #16777216	; 0x1000000
+ 8009112:	6013      	str	r3, [r2, #0]
+
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 8009114:	f7fb fd18 	bl	8004b48 <HAL_GetTick>
+ 8009118:	6138      	str	r0, [r7, #16]
+
+        /* Wait till PLL is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 800911a:	e008      	b.n	800912e <HAL_RCC_OscConfig+0x42a>
+        {
+          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
+ 800911c:	f7fb fd14 	bl	8004b48 <HAL_GetTick>
+ 8009120:	4602      	mov	r2, r0
+ 8009122:	693b      	ldr	r3, [r7, #16]
+ 8009124:	1ad3      	subs	r3, r2, r3
+ 8009126:	2b02      	cmp	r3, #2
+ 8009128:	d901      	bls.n	800912e <HAL_RCC_OscConfig+0x42a>
+          {
+            return HAL_TIMEOUT;
+ 800912a:	2303      	movs	r3, #3
+ 800912c:	e087      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 800912e:	4b28      	ldr	r3, [pc, #160]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009130:	681b      	ldr	r3, [r3, #0]
+ 8009132:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
+ 8009136:	2b00      	cmp	r3, #0
+ 8009138:	d1f0      	bne.n	800911c <HAL_RCC_OscConfig+0x418>
+                             RCC_OscInitStruct->PLL.PLLN,
+                             RCC_OscInitStruct->PLL.PLLP,
+                             RCC_OscInitStruct->PLL.PLLQ,
+                             RCC_OscInitStruct->PLL.PLLR);
+#else
+        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
+ 800913a:	687b      	ldr	r3, [r7, #4]
+ 800913c:	69da      	ldr	r2, [r3, #28]
+ 800913e:	687b      	ldr	r3, [r7, #4]
+ 8009140:	6a1b      	ldr	r3, [r3, #32]
+ 8009142:	431a      	orrs	r2, r3
+ 8009144:	687b      	ldr	r3, [r7, #4]
+ 8009146:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8009148:	019b      	lsls	r3, r3, #6
+ 800914a:	431a      	orrs	r2, r3
+ 800914c:	687b      	ldr	r3, [r7, #4]
+ 800914e:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 8009150:	085b      	lsrs	r3, r3, #1
+ 8009152:	3b01      	subs	r3, #1
+ 8009154:	041b      	lsls	r3, r3, #16
+ 8009156:	431a      	orrs	r2, r3
+ 8009158:	687b      	ldr	r3, [r7, #4]
+ 800915a:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800915c:	061b      	lsls	r3, r3, #24
+ 800915e:	4313      	orrs	r3, r2
+ 8009160:	4a1b      	ldr	r2, [pc, #108]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009162:	f043 5300 	orr.w	r3, r3, #536870912	; 0x20000000
+ 8009166:	6053      	str	r3, [r2, #4]
+                             RCC_OscInitStruct->PLL.PLLP,
+                             RCC_OscInitStruct->PLL.PLLQ);
+#endif
+
+        /* Enable the main PLL. */
+        __HAL_RCC_PLL_ENABLE();
+ 8009168:	4b19      	ldr	r3, [pc, #100]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 800916a:	681b      	ldr	r3, [r3, #0]
+ 800916c:	4a18      	ldr	r2, [pc, #96]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 800916e:	f043 7380 	orr.w	r3, r3, #16777216	; 0x1000000
+ 8009172:	6013      	str	r3, [r2, #0]
+
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 8009174:	f7fb fce8 	bl	8004b48 <HAL_GetTick>
+ 8009178:	6138      	str	r0, [r7, #16]
+
+        /* Wait till PLL is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 800917a:	e008      	b.n	800918e <HAL_RCC_OscConfig+0x48a>
+        {
+          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
+ 800917c:	f7fb fce4 	bl	8004b48 <HAL_GetTick>
+ 8009180:	4602      	mov	r2, r0
+ 8009182:	693b      	ldr	r3, [r7, #16]
+ 8009184:	1ad3      	subs	r3, r2, r3
+ 8009186:	2b02      	cmp	r3, #2
+ 8009188:	d901      	bls.n	800918e <HAL_RCC_OscConfig+0x48a>
+          {
+            return HAL_TIMEOUT;
+ 800918a:	2303      	movs	r3, #3
+ 800918c:	e057      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 800918e:	4b10      	ldr	r3, [pc, #64]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 8009190:	681b      	ldr	r3, [r3, #0]
+ 8009192:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
+ 8009196:	2b00      	cmp	r3, #0
+ 8009198:	d0f0      	beq.n	800917c <HAL_RCC_OscConfig+0x478>
+ 800919a:	e04f      	b.n	800923c <HAL_RCC_OscConfig+0x538>
+        }
+      }
+      else
+      {
+        /* Disable the main PLL. */
+        __HAL_RCC_PLL_DISABLE();
+ 800919c:	4b0c      	ldr	r3, [pc, #48]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 800919e:	681b      	ldr	r3, [r3, #0]
+ 80091a0:	4a0b      	ldr	r2, [pc, #44]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 80091a2:	f023 7380 	bic.w	r3, r3, #16777216	; 0x1000000
+ 80091a6:	6013      	str	r3, [r2, #0]
+
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 80091a8:	f7fb fcce 	bl	8004b48 <HAL_GetTick>
+ 80091ac:	6138      	str	r0, [r7, #16]
+
+        /* Wait till PLL is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 80091ae:	e008      	b.n	80091c2 <HAL_RCC_OscConfig+0x4be>
+        {
+          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
+ 80091b0:	f7fb fcca 	bl	8004b48 <HAL_GetTick>
+ 80091b4:	4602      	mov	r2, r0
+ 80091b6:	693b      	ldr	r3, [r7, #16]
+ 80091b8:	1ad3      	subs	r3, r2, r3
+ 80091ba:	2b02      	cmp	r3, #2
+ 80091bc:	d901      	bls.n	80091c2 <HAL_RCC_OscConfig+0x4be>
+          {
+            return HAL_TIMEOUT;
+ 80091be:	2303      	movs	r3, #3
+ 80091c0:	e03d      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 80091c2:	4b03      	ldr	r3, [pc, #12]	; (80091d0 <HAL_RCC_OscConfig+0x4cc>)
+ 80091c4:	681b      	ldr	r3, [r3, #0]
+ 80091c6:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
+ 80091ca:	2b00      	cmp	r3, #0
+ 80091cc:	d1f0      	bne.n	80091b0 <HAL_RCC_OscConfig+0x4ac>
+ 80091ce:	e035      	b.n	800923c <HAL_RCC_OscConfig+0x538>
+ 80091d0:	40023800 	.word	0x40023800
+ 80091d4:	40007000 	.word	0x40007000
+      }
+    }
+    else
+    {
+      /* Do not return HAL_ERROR if request repeats the current configuration */
+      pll_config = RCC->PLLCFGR;
+ 80091d8:	4b1b      	ldr	r3, [pc, #108]	; (8009248 <HAL_RCC_OscConfig+0x544>)
+ 80091da:	685b      	ldr	r3, [r3, #4]
+ 80091dc:	60fb      	str	r3, [r7, #12]
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) ||
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((((RCC_OscInitStruct->PLL.PLLP) >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos)) ||
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) ||
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos)))
+#else
+      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
+ 80091de:	687b      	ldr	r3, [r7, #4]
+ 80091e0:	699b      	ldr	r3, [r3, #24]
+ 80091e2:	2b01      	cmp	r3, #1
+ 80091e4:	d028      	beq.n	8009238 <HAL_RCC_OscConfig+0x534>
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
+ 80091e6:	68fb      	ldr	r3, [r7, #12]
+ 80091e8:	f403 0280 	and.w	r2, r3, #4194304	; 0x400000
+ 80091ec:	687b      	ldr	r3, [r7, #4]
+ 80091ee:	69db      	ldr	r3, [r3, #28]
+      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
+ 80091f0:	429a      	cmp	r2, r3
+ 80091f2:	d121      	bne.n	8009238 <HAL_RCC_OscConfig+0x534>
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
+ 80091f4:	68fb      	ldr	r3, [r7, #12]
+ 80091f6:	f003 023f 	and.w	r2, r3, #63	; 0x3f
+ 80091fa:	687b      	ldr	r3, [r7, #4]
+ 80091fc:	6a1b      	ldr	r3, [r3, #32]
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
+ 80091fe:	429a      	cmp	r2, r3
+ 8009200:	d11a      	bne.n	8009238 <HAL_RCC_OscConfig+0x534>
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) ||
+ 8009202:	68fa      	ldr	r2, [r7, #12]
+ 8009204:	f647 73c0 	movw	r3, #32704	; 0x7fc0
+ 8009208:	4013      	ands	r3, r2
+ 800920a:	687a      	ldr	r2, [r7, #4]
+ 800920c:	6a52      	ldr	r2, [r2, #36]	; 0x24
+ 800920e:	0192      	lsls	r2, r2, #6
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
+ 8009210:	4293      	cmp	r3, r2
+ 8009212:	d111      	bne.n	8009238 <HAL_RCC_OscConfig+0x534>
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((((RCC_OscInitStruct->PLL.PLLP) >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos)) ||
+ 8009214:	68fb      	ldr	r3, [r7, #12]
+ 8009216:	f403 3240 	and.w	r2, r3, #196608	; 0x30000
+ 800921a:	687b      	ldr	r3, [r7, #4]
+ 800921c:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 800921e:	085b      	lsrs	r3, r3, #1
+ 8009220:	3b01      	subs	r3, #1
+ 8009222:	041b      	lsls	r3, r3, #16
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) ||
+ 8009224:	429a      	cmp	r2, r3
+ 8009226:	d107      	bne.n	8009238 <HAL_RCC_OscConfig+0x534>
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)))
+ 8009228:	68fb      	ldr	r3, [r7, #12]
+ 800922a:	f003 6270 	and.w	r2, r3, #251658240	; 0xf000000
+ 800922e:	687b      	ldr	r3, [r7, #4]
+ 8009230:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8009232:	061b      	lsls	r3, r3, #24
+          (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((((RCC_OscInitStruct->PLL.PLLP) >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos)) ||
+ 8009234:	429a      	cmp	r2, r3
+ 8009236:	d001      	beq.n	800923c <HAL_RCC_OscConfig+0x538>
+#endif
+      {
+        return HAL_ERROR;
+ 8009238:	2301      	movs	r3, #1
+ 800923a:	e000      	b.n	800923e <HAL_RCC_OscConfig+0x53a>
+      }
+    }
+  }
+  return HAL_OK;
+ 800923c:	2300      	movs	r3, #0
+}
+ 800923e:	4618      	mov	r0, r3
+ 8009240:	3718      	adds	r7, #24
+ 8009242:	46bd      	mov	sp, r7
+ 8009244:	bd80      	pop	{r7, pc}
+ 8009246:	bf00      	nop
+ 8009248:	40023800 	.word	0x40023800
+
+0800924c <HAL_RCC_ClockConfig>:
+  *         HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
+  *         (for more details refer to section above "Initialization/de-initialization functions")
+  * @retval None
+  */
+HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
+{
+ 800924c:	b580      	push	{r7, lr}
+ 800924e:	b084      	sub	sp, #16
+ 8009250:	af00      	add	r7, sp, #0
+ 8009252:	6078      	str	r0, [r7, #4]
+ 8009254:	6039      	str	r1, [r7, #0]
+  uint32_t tickstart = 0;
+ 8009256:	2300      	movs	r3, #0
+ 8009258:	60fb      	str	r3, [r7, #12]
+
+  /* Check Null pointer */
+  if (RCC_ClkInitStruct == NULL)
+ 800925a:	687b      	ldr	r3, [r7, #4]
+ 800925c:	2b00      	cmp	r3, #0
+ 800925e:	d101      	bne.n	8009264 <HAL_RCC_ClockConfig+0x18>
+  {
+    return HAL_ERROR;
+ 8009260:	2301      	movs	r3, #1
+ 8009262:	e0d0      	b.n	8009406 <HAL_RCC_ClockConfig+0x1ba>
+  /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
+     must be correctly programmed according to the frequency of the CPU clock
+     (HCLK) and the supply voltage of the device. */
+
+  /* Increasing the CPU frequency */
+  if (FLatency > __HAL_FLASH_GET_LATENCY())
+ 8009264:	4b6a      	ldr	r3, [pc, #424]	; (8009410 <HAL_RCC_ClockConfig+0x1c4>)
+ 8009266:	681b      	ldr	r3, [r3, #0]
+ 8009268:	f003 030f 	and.w	r3, r3, #15
+ 800926c:	683a      	ldr	r2, [r7, #0]
+ 800926e:	429a      	cmp	r2, r3
+ 8009270:	d910      	bls.n	8009294 <HAL_RCC_ClockConfig+0x48>
+  {
+    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
+    __HAL_FLASH_SET_LATENCY(FLatency);
+ 8009272:	4b67      	ldr	r3, [pc, #412]	; (8009410 <HAL_RCC_ClockConfig+0x1c4>)
+ 8009274:	681b      	ldr	r3, [r3, #0]
+ 8009276:	f023 020f 	bic.w	r2, r3, #15
+ 800927a:	4965      	ldr	r1, [pc, #404]	; (8009410 <HAL_RCC_ClockConfig+0x1c4>)
+ 800927c:	683b      	ldr	r3, [r7, #0]
+ 800927e:	4313      	orrs	r3, r2
+ 8009280:	600b      	str	r3, [r1, #0]
+
+    /* Check that the new number of wait states is taken into account to access the Flash
+    memory by reading the FLASH_ACR register */
+    if (__HAL_FLASH_GET_LATENCY() != FLatency)
+ 8009282:	4b63      	ldr	r3, [pc, #396]	; (8009410 <HAL_RCC_ClockConfig+0x1c4>)
+ 8009284:	681b      	ldr	r3, [r3, #0]
+ 8009286:	f003 030f 	and.w	r3, r3, #15
+ 800928a:	683a      	ldr	r2, [r7, #0]
+ 800928c:	429a      	cmp	r2, r3
+ 800928e:	d001      	beq.n	8009294 <HAL_RCC_ClockConfig+0x48>
+    {
+      return HAL_ERROR;
+ 8009290:	2301      	movs	r3, #1
+ 8009292:	e0b8      	b.n	8009406 <HAL_RCC_ClockConfig+0x1ba>
+    }
+  }
+
+  /*-------------------------- HCLK Configuration --------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
+ 8009294:	687b      	ldr	r3, [r7, #4]
+ 8009296:	681b      	ldr	r3, [r3, #0]
+ 8009298:	f003 0302 	and.w	r3, r3, #2
+ 800929c:	2b00      	cmp	r3, #0
+ 800929e:	d020      	beq.n	80092e2 <HAL_RCC_ClockConfig+0x96>
+  {
+    /* Set the highest APBx dividers in order to ensure that we do not go through
+       a non-spec phase whatever we decrease or increase HCLK. */
+    if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
+ 80092a0:	687b      	ldr	r3, [r7, #4]
+ 80092a2:	681b      	ldr	r3, [r3, #0]
+ 80092a4:	f003 0304 	and.w	r3, r3, #4
+ 80092a8:	2b00      	cmp	r3, #0
+ 80092aa:	d005      	beq.n	80092b8 <HAL_RCC_ClockConfig+0x6c>
+    {
+      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
+ 80092ac:	4b59      	ldr	r3, [pc, #356]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80092ae:	689b      	ldr	r3, [r3, #8]
+ 80092b0:	4a58      	ldr	r2, [pc, #352]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80092b2:	f443 53e0 	orr.w	r3, r3, #7168	; 0x1c00
+ 80092b6:	6093      	str	r3, [r2, #8]
+    }
+
+    if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
+ 80092b8:	687b      	ldr	r3, [r7, #4]
+ 80092ba:	681b      	ldr	r3, [r3, #0]
+ 80092bc:	f003 0308 	and.w	r3, r3, #8
+ 80092c0:	2b00      	cmp	r3, #0
+ 80092c2:	d005      	beq.n	80092d0 <HAL_RCC_ClockConfig+0x84>
+    {
+      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
+ 80092c4:	4b53      	ldr	r3, [pc, #332]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80092c6:	689b      	ldr	r3, [r3, #8]
+ 80092c8:	4a52      	ldr	r2, [pc, #328]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80092ca:	f443 4360 	orr.w	r3, r3, #57344	; 0xe000
+ 80092ce:	6093      	str	r3, [r2, #8]
+    }
+
+    /* Set the new HCLK clock divider */
+    assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
+    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
+ 80092d0:	4b50      	ldr	r3, [pc, #320]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80092d2:	689b      	ldr	r3, [r3, #8]
+ 80092d4:	f023 02f0 	bic.w	r2, r3, #240	; 0xf0
+ 80092d8:	687b      	ldr	r3, [r7, #4]
+ 80092da:	689b      	ldr	r3, [r3, #8]
+ 80092dc:	494d      	ldr	r1, [pc, #308]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80092de:	4313      	orrs	r3, r2
+ 80092e0:	608b      	str	r3, [r1, #8]
+  }
+
+  /*------------------------- SYSCLK Configuration ---------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
+ 80092e2:	687b      	ldr	r3, [r7, #4]
+ 80092e4:	681b      	ldr	r3, [r3, #0]
+ 80092e6:	f003 0301 	and.w	r3, r3, #1
+ 80092ea:	2b00      	cmp	r3, #0
+ 80092ec:	d040      	beq.n	8009370 <HAL_RCC_ClockConfig+0x124>
+  {
+    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
+
+    /* HSE is selected as System Clock Source */
+    if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
+ 80092ee:	687b      	ldr	r3, [r7, #4]
+ 80092f0:	685b      	ldr	r3, [r3, #4]
+ 80092f2:	2b01      	cmp	r3, #1
+ 80092f4:	d107      	bne.n	8009306 <HAL_RCC_ClockConfig+0xba>
+    {
+      /* Check the HSE ready flag */
+      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 80092f6:	4b47      	ldr	r3, [pc, #284]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80092f8:	681b      	ldr	r3, [r3, #0]
+ 80092fa:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 80092fe:	2b00      	cmp	r3, #0
+ 8009300:	d115      	bne.n	800932e <HAL_RCC_ClockConfig+0xe2>
+      {
+        return HAL_ERROR;
+ 8009302:	2301      	movs	r3, #1
+ 8009304:	e07f      	b.n	8009406 <HAL_RCC_ClockConfig+0x1ba>
+      }
+    }
+    /* PLL is selected as System Clock Source */
+    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
+ 8009306:	687b      	ldr	r3, [r7, #4]
+ 8009308:	685b      	ldr	r3, [r3, #4]
+ 800930a:	2b02      	cmp	r3, #2
+ 800930c:	d107      	bne.n	800931e <HAL_RCC_ClockConfig+0xd2>
+    {
+      /* Check the PLL ready flag */
+      if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 800930e:	4b41      	ldr	r3, [pc, #260]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 8009310:	681b      	ldr	r3, [r3, #0]
+ 8009312:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
+ 8009316:	2b00      	cmp	r3, #0
+ 8009318:	d109      	bne.n	800932e <HAL_RCC_ClockConfig+0xe2>
+      {
+        return HAL_ERROR;
+ 800931a:	2301      	movs	r3, #1
+ 800931c:	e073      	b.n	8009406 <HAL_RCC_ClockConfig+0x1ba>
+    }
+    /* HSI is selected as System Clock Source */
+    else
+    {
+      /* Check the HSI ready flag */
+      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 800931e:	4b3d      	ldr	r3, [pc, #244]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 8009320:	681b      	ldr	r3, [r3, #0]
+ 8009322:	f003 0302 	and.w	r3, r3, #2
+ 8009326:	2b00      	cmp	r3, #0
+ 8009328:	d101      	bne.n	800932e <HAL_RCC_ClockConfig+0xe2>
+      {
+        return HAL_ERROR;
+ 800932a:	2301      	movs	r3, #1
+ 800932c:	e06b      	b.n	8009406 <HAL_RCC_ClockConfig+0x1ba>
+      }
+    }
+
+    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
+ 800932e:	4b39      	ldr	r3, [pc, #228]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 8009330:	689b      	ldr	r3, [r3, #8]
+ 8009332:	f023 0203 	bic.w	r2, r3, #3
+ 8009336:	687b      	ldr	r3, [r7, #4]
+ 8009338:	685b      	ldr	r3, [r3, #4]
+ 800933a:	4936      	ldr	r1, [pc, #216]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 800933c:	4313      	orrs	r3, r2
+ 800933e:	608b      	str	r3, [r1, #8]
+
+    /* Get Start Tick*/
+    tickstart = HAL_GetTick();
+ 8009340:	f7fb fc02 	bl	8004b48 <HAL_GetTick>
+ 8009344:	60f8      	str	r0, [r7, #12]
+
+    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
+ 8009346:	e00a      	b.n	800935e <HAL_RCC_ClockConfig+0x112>
+    {
+      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
+ 8009348:	f7fb fbfe 	bl	8004b48 <HAL_GetTick>
+ 800934c:	4602      	mov	r2, r0
+ 800934e:	68fb      	ldr	r3, [r7, #12]
+ 8009350:	1ad3      	subs	r3, r2, r3
+ 8009352:	f241 3288 	movw	r2, #5000	; 0x1388
+ 8009356:	4293      	cmp	r3, r2
+ 8009358:	d901      	bls.n	800935e <HAL_RCC_ClockConfig+0x112>
+      {
+        return HAL_TIMEOUT;
+ 800935a:	2303      	movs	r3, #3
+ 800935c:	e053      	b.n	8009406 <HAL_RCC_ClockConfig+0x1ba>
+    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
+ 800935e:	4b2d      	ldr	r3, [pc, #180]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 8009360:	689b      	ldr	r3, [r3, #8]
+ 8009362:	f003 020c 	and.w	r2, r3, #12
+ 8009366:	687b      	ldr	r3, [r7, #4]
+ 8009368:	685b      	ldr	r3, [r3, #4]
+ 800936a:	009b      	lsls	r3, r3, #2
+ 800936c:	429a      	cmp	r2, r3
+ 800936e:	d1eb      	bne.n	8009348 <HAL_RCC_ClockConfig+0xfc>
+      }
+    }
+  }
+
+  /* Decreasing the number of wait states because of lower CPU frequency */
+  if (FLatency < __HAL_FLASH_GET_LATENCY())
+ 8009370:	4b27      	ldr	r3, [pc, #156]	; (8009410 <HAL_RCC_ClockConfig+0x1c4>)
+ 8009372:	681b      	ldr	r3, [r3, #0]
+ 8009374:	f003 030f 	and.w	r3, r3, #15
+ 8009378:	683a      	ldr	r2, [r7, #0]
+ 800937a:	429a      	cmp	r2, r3
+ 800937c:	d210      	bcs.n	80093a0 <HAL_RCC_ClockConfig+0x154>
+  {
+    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
+    __HAL_FLASH_SET_LATENCY(FLatency);
+ 800937e:	4b24      	ldr	r3, [pc, #144]	; (8009410 <HAL_RCC_ClockConfig+0x1c4>)
+ 8009380:	681b      	ldr	r3, [r3, #0]
+ 8009382:	f023 020f 	bic.w	r2, r3, #15
+ 8009386:	4922      	ldr	r1, [pc, #136]	; (8009410 <HAL_RCC_ClockConfig+0x1c4>)
+ 8009388:	683b      	ldr	r3, [r7, #0]
+ 800938a:	4313      	orrs	r3, r2
+ 800938c:	600b      	str	r3, [r1, #0]
+
+    /* Check that the new number of wait states is taken into account to access the Flash
+    memory by reading the FLASH_ACR register */
+    if (__HAL_FLASH_GET_LATENCY() != FLatency)
+ 800938e:	4b20      	ldr	r3, [pc, #128]	; (8009410 <HAL_RCC_ClockConfig+0x1c4>)
+ 8009390:	681b      	ldr	r3, [r3, #0]
+ 8009392:	f003 030f 	and.w	r3, r3, #15
+ 8009396:	683a      	ldr	r2, [r7, #0]
+ 8009398:	429a      	cmp	r2, r3
+ 800939a:	d001      	beq.n	80093a0 <HAL_RCC_ClockConfig+0x154>
+    {
+      return HAL_ERROR;
+ 800939c:	2301      	movs	r3, #1
+ 800939e:	e032      	b.n	8009406 <HAL_RCC_ClockConfig+0x1ba>
+    }
+  }
+
+  /*-------------------------- PCLK1 Configuration ---------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
+ 80093a0:	687b      	ldr	r3, [r7, #4]
+ 80093a2:	681b      	ldr	r3, [r3, #0]
+ 80093a4:	f003 0304 	and.w	r3, r3, #4
+ 80093a8:	2b00      	cmp	r3, #0
+ 80093aa:	d008      	beq.n	80093be <HAL_RCC_ClockConfig+0x172>
+  {
+    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
+    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
+ 80093ac:	4b19      	ldr	r3, [pc, #100]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80093ae:	689b      	ldr	r3, [r3, #8]
+ 80093b0:	f423 52e0 	bic.w	r2, r3, #7168	; 0x1c00
+ 80093b4:	687b      	ldr	r3, [r7, #4]
+ 80093b6:	68db      	ldr	r3, [r3, #12]
+ 80093b8:	4916      	ldr	r1, [pc, #88]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80093ba:	4313      	orrs	r3, r2
+ 80093bc:	608b      	str	r3, [r1, #8]
+  }
+
+  /*-------------------------- PCLK2 Configuration ---------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
+ 80093be:	687b      	ldr	r3, [r7, #4]
+ 80093c0:	681b      	ldr	r3, [r3, #0]
+ 80093c2:	f003 0308 	and.w	r3, r3, #8
+ 80093c6:	2b00      	cmp	r3, #0
+ 80093c8:	d009      	beq.n	80093de <HAL_RCC_ClockConfig+0x192>
+  {
+    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
+    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
+ 80093ca:	4b12      	ldr	r3, [pc, #72]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80093cc:	689b      	ldr	r3, [r3, #8]
+ 80093ce:	f423 4260 	bic.w	r2, r3, #57344	; 0xe000
+ 80093d2:	687b      	ldr	r3, [r7, #4]
+ 80093d4:	691b      	ldr	r3, [r3, #16]
+ 80093d6:	00db      	lsls	r3, r3, #3
+ 80093d8:	490e      	ldr	r1, [pc, #56]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80093da:	4313      	orrs	r3, r2
+ 80093dc:	608b      	str	r3, [r1, #8]
+  }
+
+  /* Update the SystemCoreClock global variable */
+  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
+ 80093de:	f000 f821 	bl	8009424 <HAL_RCC_GetSysClockFreq>
+ 80093e2:	4601      	mov	r1, r0
+ 80093e4:	4b0b      	ldr	r3, [pc, #44]	; (8009414 <HAL_RCC_ClockConfig+0x1c8>)
+ 80093e6:	689b      	ldr	r3, [r3, #8]
+ 80093e8:	091b      	lsrs	r3, r3, #4
+ 80093ea:	f003 030f 	and.w	r3, r3, #15
+ 80093ee:	4a0a      	ldr	r2, [pc, #40]	; (8009418 <HAL_RCC_ClockConfig+0x1cc>)
+ 80093f0:	5cd3      	ldrb	r3, [r2, r3]
+ 80093f2:	fa21 f303 	lsr.w	r3, r1, r3
+ 80093f6:	4a09      	ldr	r2, [pc, #36]	; (800941c <HAL_RCC_ClockConfig+0x1d0>)
+ 80093f8:	6013      	str	r3, [r2, #0]
+
+  /* Configure the source of time base considering new system clocks settings*/
+  HAL_InitTick(uwTickPrio);
+ 80093fa:	4b09      	ldr	r3, [pc, #36]	; (8009420 <HAL_RCC_ClockConfig+0x1d4>)
+ 80093fc:	681b      	ldr	r3, [r3, #0]
+ 80093fe:	4618      	mov	r0, r3
+ 8009400:	f7fb fa0c 	bl	800481c <HAL_InitTick>
+
+  return HAL_OK;
+ 8009404:	2300      	movs	r3, #0
+}
+ 8009406:	4618      	mov	r0, r3
+ 8009408:	3710      	adds	r7, #16
+ 800940a:	46bd      	mov	sp, r7
+ 800940c:	bd80      	pop	{r7, pc}
+ 800940e:	bf00      	nop
+ 8009410:	40023c00 	.word	0x40023c00
+ 8009414:	40023800 	.word	0x40023800
+ 8009418:	08022458 	.word	0x08022458
+ 800941c:	20000050 	.word	0x20000050
+ 8009420:	20000054 	.word	0x20000054
+
+08009424 <HAL_RCC_GetSysClockFreq>:
+  *
+  *
+  * @retval SYSCLK frequency
+  */
+uint32_t HAL_RCC_GetSysClockFreq(void)
+{
+ 8009424:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 8009426:	b085      	sub	sp, #20
+ 8009428:	af00      	add	r7, sp, #0
+  uint32_t pllm = 0, pllvco = 0, pllp = 0;
+ 800942a:	2300      	movs	r3, #0
+ 800942c:	607b      	str	r3, [r7, #4]
+ 800942e:	2300      	movs	r3, #0
+ 8009430:	60fb      	str	r3, [r7, #12]
+ 8009432:	2300      	movs	r3, #0
+ 8009434:	603b      	str	r3, [r7, #0]
+  uint32_t sysclockfreq = 0;
+ 8009436:	2300      	movs	r3, #0
+ 8009438:	60bb      	str	r3, [r7, #8]
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+ 800943a:	4b50      	ldr	r3, [pc, #320]	; (800957c <HAL_RCC_GetSysClockFreq+0x158>)
+ 800943c:	689b      	ldr	r3, [r3, #8]
+ 800943e:	f003 030c 	and.w	r3, r3, #12
+ 8009442:	2b04      	cmp	r3, #4
+ 8009444:	d007      	beq.n	8009456 <HAL_RCC_GetSysClockFreq+0x32>
+ 8009446:	2b08      	cmp	r3, #8
+ 8009448:	d008      	beq.n	800945c <HAL_RCC_GetSysClockFreq+0x38>
+ 800944a:	2b00      	cmp	r3, #0
+ 800944c:	f040 808d 	bne.w	800956a <HAL_RCC_GetSysClockFreq+0x146>
+  {
+    case RCC_SYSCLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
+    {
+      sysclockfreq = HSI_VALUE;
+ 8009450:	4b4b      	ldr	r3, [pc, #300]	; (8009580 <HAL_RCC_GetSysClockFreq+0x15c>)
+ 8009452:	60bb      	str	r3, [r7, #8]
+      break;
+ 8009454:	e08c      	b.n	8009570 <HAL_RCC_GetSysClockFreq+0x14c>
+    }
+    case RCC_SYSCLKSOURCE_STATUS_HSE:  /* HSE used as system clock  source */
+    {
+      sysclockfreq = HSE_VALUE;
+ 8009456:	4b4b      	ldr	r3, [pc, #300]	; (8009584 <HAL_RCC_GetSysClockFreq+0x160>)
+ 8009458:	60bb      	str	r3, [r7, #8]
+      break;
+ 800945a:	e089      	b.n	8009570 <HAL_RCC_GetSysClockFreq+0x14c>
+    }
+    case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock  source */
+    {
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+      SYSCLK = PLL_VCO / PLLP */
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ 800945c:	4b47      	ldr	r3, [pc, #284]	; (800957c <HAL_RCC_GetSysClockFreq+0x158>)
+ 800945e:	685b      	ldr	r3, [r3, #4]
+ 8009460:	f003 033f 	and.w	r3, r3, #63	; 0x3f
+ 8009464:	607b      	str	r3, [r7, #4]
+      if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLCFGR_PLLSRC_HSI)
+ 8009466:	4b45      	ldr	r3, [pc, #276]	; (800957c <HAL_RCC_GetSysClockFreq+0x158>)
+ 8009468:	685b      	ldr	r3, [r3, #4]
+ 800946a:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
+ 800946e:	2b00      	cmp	r3, #0
+ 8009470:	d023      	beq.n	80094ba <HAL_RCC_GetSysClockFreq+0x96>
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
+ 8009472:	4b42      	ldr	r3, [pc, #264]	; (800957c <HAL_RCC_GetSysClockFreq+0x158>)
+ 8009474:	685b      	ldr	r3, [r3, #4]
+ 8009476:	099b      	lsrs	r3, r3, #6
+ 8009478:	f04f 0400 	mov.w	r4, #0
+ 800947c:	f240 11ff 	movw	r1, #511	; 0x1ff
+ 8009480:	f04f 0200 	mov.w	r2, #0
+ 8009484:	ea03 0501 	and.w	r5, r3, r1
+ 8009488:	ea04 0602 	and.w	r6, r4, r2
+ 800948c:	4a3d      	ldr	r2, [pc, #244]	; (8009584 <HAL_RCC_GetSysClockFreq+0x160>)
+ 800948e:	fb02 f106 	mul.w	r1, r2, r6
+ 8009492:	2200      	movs	r2, #0
+ 8009494:	fb02 f205 	mul.w	r2, r2, r5
+ 8009498:	440a      	add	r2, r1
+ 800949a:	493a      	ldr	r1, [pc, #232]	; (8009584 <HAL_RCC_GetSysClockFreq+0x160>)
+ 800949c:	fba5 0101 	umull	r0, r1, r5, r1
+ 80094a0:	1853      	adds	r3, r2, r1
+ 80094a2:	4619      	mov	r1, r3
+ 80094a4:	687b      	ldr	r3, [r7, #4]
+ 80094a6:	f04f 0400 	mov.w	r4, #0
+ 80094aa:	461a      	mov	r2, r3
+ 80094ac:	4623      	mov	r3, r4
+ 80094ae:	f7f6 feff 	bl	80002b0 <__aeabi_uldivmod>
+ 80094b2:	4603      	mov	r3, r0
+ 80094b4:	460c      	mov	r4, r1
+ 80094b6:	60fb      	str	r3, [r7, #12]
+ 80094b8:	e049      	b.n	800954e <HAL_RCC_GetSysClockFreq+0x12a>
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
+ 80094ba:	4b30      	ldr	r3, [pc, #192]	; (800957c <HAL_RCC_GetSysClockFreq+0x158>)
+ 80094bc:	685b      	ldr	r3, [r3, #4]
+ 80094be:	099b      	lsrs	r3, r3, #6
+ 80094c0:	f04f 0400 	mov.w	r4, #0
+ 80094c4:	f240 11ff 	movw	r1, #511	; 0x1ff
+ 80094c8:	f04f 0200 	mov.w	r2, #0
+ 80094cc:	ea03 0501 	and.w	r5, r3, r1
+ 80094d0:	ea04 0602 	and.w	r6, r4, r2
+ 80094d4:	4629      	mov	r1, r5
+ 80094d6:	4632      	mov	r2, r6
+ 80094d8:	f04f 0300 	mov.w	r3, #0
+ 80094dc:	f04f 0400 	mov.w	r4, #0
+ 80094e0:	0154      	lsls	r4, r2, #5
+ 80094e2:	ea44 64d1 	orr.w	r4, r4, r1, lsr #27
+ 80094e6:	014b      	lsls	r3, r1, #5
+ 80094e8:	4619      	mov	r1, r3
+ 80094ea:	4622      	mov	r2, r4
+ 80094ec:	1b49      	subs	r1, r1, r5
+ 80094ee:	eb62 0206 	sbc.w	r2, r2, r6
+ 80094f2:	f04f 0300 	mov.w	r3, #0
+ 80094f6:	f04f 0400 	mov.w	r4, #0
+ 80094fa:	0194      	lsls	r4, r2, #6
+ 80094fc:	ea44 6491 	orr.w	r4, r4, r1, lsr #26
+ 8009500:	018b      	lsls	r3, r1, #6
+ 8009502:	1a5b      	subs	r3, r3, r1
+ 8009504:	eb64 0402 	sbc.w	r4, r4, r2
+ 8009508:	f04f 0100 	mov.w	r1, #0
+ 800950c:	f04f 0200 	mov.w	r2, #0
+ 8009510:	00e2      	lsls	r2, r4, #3
+ 8009512:	ea42 7253 	orr.w	r2, r2, r3, lsr #29
+ 8009516:	00d9      	lsls	r1, r3, #3
+ 8009518:	460b      	mov	r3, r1
+ 800951a:	4614      	mov	r4, r2
+ 800951c:	195b      	adds	r3, r3, r5
+ 800951e:	eb44 0406 	adc.w	r4, r4, r6
+ 8009522:	f04f 0100 	mov.w	r1, #0
+ 8009526:	f04f 0200 	mov.w	r2, #0
+ 800952a:	02a2      	lsls	r2, r4, #10
+ 800952c:	ea42 5293 	orr.w	r2, r2, r3, lsr #22
+ 8009530:	0299      	lsls	r1, r3, #10
+ 8009532:	460b      	mov	r3, r1
+ 8009534:	4614      	mov	r4, r2
+ 8009536:	4618      	mov	r0, r3
+ 8009538:	4621      	mov	r1, r4
+ 800953a:	687b      	ldr	r3, [r7, #4]
+ 800953c:	f04f 0400 	mov.w	r4, #0
+ 8009540:	461a      	mov	r2, r3
+ 8009542:	4623      	mov	r3, r4
+ 8009544:	f7f6 feb4 	bl	80002b0 <__aeabi_uldivmod>
+ 8009548:	4603      	mov	r3, r0
+ 800954a:	460c      	mov	r4, r1
+ 800954c:	60fb      	str	r3, [r7, #12]
+      }
+      pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1) * 2);
+ 800954e:	4b0b      	ldr	r3, [pc, #44]	; (800957c <HAL_RCC_GetSysClockFreq+0x158>)
+ 8009550:	685b      	ldr	r3, [r3, #4]
+ 8009552:	0c1b      	lsrs	r3, r3, #16
+ 8009554:	f003 0303 	and.w	r3, r3, #3
+ 8009558:	3301      	adds	r3, #1
+ 800955a:	005b      	lsls	r3, r3, #1
+ 800955c:	603b      	str	r3, [r7, #0]
+
+      sysclockfreq = pllvco / pllp;
+ 800955e:	68fa      	ldr	r2, [r7, #12]
+ 8009560:	683b      	ldr	r3, [r7, #0]
+ 8009562:	fbb2 f3f3 	udiv	r3, r2, r3
+ 8009566:	60bb      	str	r3, [r7, #8]
+      break;
+ 8009568:	e002      	b.n	8009570 <HAL_RCC_GetSysClockFreq+0x14c>
+    }
+    default:
+    {
+      sysclockfreq = HSI_VALUE;
+ 800956a:	4b05      	ldr	r3, [pc, #20]	; (8009580 <HAL_RCC_GetSysClockFreq+0x15c>)
+ 800956c:	60bb      	str	r3, [r7, #8]
+      break;
+ 800956e:	bf00      	nop
+    }
+  }
+  return sysclockfreq;
+ 8009570:	68bb      	ldr	r3, [r7, #8]
+}
+ 8009572:	4618      	mov	r0, r3
+ 8009574:	3714      	adds	r7, #20
+ 8009576:	46bd      	mov	sp, r7
+ 8009578:	bdf0      	pop	{r4, r5, r6, r7, pc}
+ 800957a:	bf00      	nop
+ 800957c:	40023800 	.word	0x40023800
+ 8009580:	00f42400 	.word	0x00f42400
+ 8009584:	017d7840 	.word	0x017d7840
+
+08009588 <HAL_RCC_GetHCLKFreq>:
+  *         right HCLK value. Otherwise, any configuration based on this function will be incorrect.
+  * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency.
+  * @retval HCLK frequency
+  */
+uint32_t HAL_RCC_GetHCLKFreq(void)
+{
+ 8009588:	b480      	push	{r7}
+ 800958a:	af00      	add	r7, sp, #0
+  return SystemCoreClock;
+ 800958c:	4b03      	ldr	r3, [pc, #12]	; (800959c <HAL_RCC_GetHCLKFreq+0x14>)
+ 800958e:	681b      	ldr	r3, [r3, #0]
+}
+ 8009590:	4618      	mov	r0, r3
+ 8009592:	46bd      	mov	sp, r7
+ 8009594:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8009598:	4770      	bx	lr
+ 800959a:	bf00      	nop
+ 800959c:	20000050 	.word	0x20000050
+
+080095a0 <HAL_RCC_GetPCLK1Freq>:
+  * @note   Each time PCLK1 changes, this function must be called to update the
+  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
+  * @retval PCLK1 frequency
+  */
+uint32_t HAL_RCC_GetPCLK1Freq(void)
+{
+ 80095a0:	b580      	push	{r7, lr}
+ 80095a2:	af00      	add	r7, sp, #0
+  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
+  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
+ 80095a4:	f7ff fff0 	bl	8009588 <HAL_RCC_GetHCLKFreq>
+ 80095a8:	4601      	mov	r1, r0
+ 80095aa:	4b05      	ldr	r3, [pc, #20]	; (80095c0 <HAL_RCC_GetPCLK1Freq+0x20>)
+ 80095ac:	689b      	ldr	r3, [r3, #8]
+ 80095ae:	0a9b      	lsrs	r3, r3, #10
+ 80095b0:	f003 0307 	and.w	r3, r3, #7
+ 80095b4:	4a03      	ldr	r2, [pc, #12]	; (80095c4 <HAL_RCC_GetPCLK1Freq+0x24>)
+ 80095b6:	5cd3      	ldrb	r3, [r2, r3]
+ 80095b8:	fa21 f303 	lsr.w	r3, r1, r3
+}
+ 80095bc:	4618      	mov	r0, r3
+ 80095be:	bd80      	pop	{r7, pc}
+ 80095c0:	40023800 	.word	0x40023800
+ 80095c4:	08022468 	.word	0x08022468
+
+080095c8 <HAL_RCC_GetPCLK2Freq>:
+  * @note   Each time PCLK2 changes, this function must be called to update the
+  *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
+  * @retval PCLK2 frequency
+  */
+uint32_t HAL_RCC_GetPCLK2Freq(void)
+{
+ 80095c8:	b580      	push	{r7, lr}
+ 80095ca:	af00      	add	r7, sp, #0
+  /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
+  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
+ 80095cc:	f7ff ffdc 	bl	8009588 <HAL_RCC_GetHCLKFreq>
+ 80095d0:	4601      	mov	r1, r0
+ 80095d2:	4b05      	ldr	r3, [pc, #20]	; (80095e8 <HAL_RCC_GetPCLK2Freq+0x20>)
+ 80095d4:	689b      	ldr	r3, [r3, #8]
+ 80095d6:	0b5b      	lsrs	r3, r3, #13
+ 80095d8:	f003 0307 	and.w	r3, r3, #7
+ 80095dc:	4a03      	ldr	r2, [pc, #12]	; (80095ec <HAL_RCC_GetPCLK2Freq+0x24>)
+ 80095de:	5cd3      	ldrb	r3, [r2, r3]
+ 80095e0:	fa21 f303 	lsr.w	r3, r1, r3
+}
+ 80095e4:	4618      	mov	r0, r3
+ 80095e6:	bd80      	pop	{r7, pc}
+ 80095e8:	40023800 	.word	0x40023800
+ 80095ec:	08022468 	.word	0x08022468
+
+080095f0 <HAL_RCC_GetClockConfig>:
+  * will be configured.
+  * @param  pFLatency Pointer on the Flash Latency.
+  * @retval None
+  */
+void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
+{
+ 80095f0:	b480      	push	{r7}
+ 80095f2:	b083      	sub	sp, #12
+ 80095f4:	af00      	add	r7, sp, #0
+ 80095f6:	6078      	str	r0, [r7, #4]
+ 80095f8:	6039      	str	r1, [r7, #0]
+  /* Set all possible values for the Clock type parameter --------------------*/
+  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ 80095fa:	687b      	ldr	r3, [r7, #4]
+ 80095fc:	220f      	movs	r2, #15
+ 80095fe:	601a      	str	r2, [r3, #0]
+
+  /* Get the SYSCLK configuration --------------------------------------------*/
+  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
+ 8009600:	4b12      	ldr	r3, [pc, #72]	; (800964c <HAL_RCC_GetClockConfig+0x5c>)
+ 8009602:	689b      	ldr	r3, [r3, #8]
+ 8009604:	f003 0203 	and.w	r2, r3, #3
+ 8009608:	687b      	ldr	r3, [r7, #4]
+ 800960a:	605a      	str	r2, [r3, #4]
+
+  /* Get the HCLK configuration ----------------------------------------------*/
+  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
+ 800960c:	4b0f      	ldr	r3, [pc, #60]	; (800964c <HAL_RCC_GetClockConfig+0x5c>)
+ 800960e:	689b      	ldr	r3, [r3, #8]
+ 8009610:	f003 02f0 	and.w	r2, r3, #240	; 0xf0
+ 8009614:	687b      	ldr	r3, [r7, #4]
+ 8009616:	609a      	str	r2, [r3, #8]
+
+  /* Get the APB1 configuration ----------------------------------------------*/
+  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
+ 8009618:	4b0c      	ldr	r3, [pc, #48]	; (800964c <HAL_RCC_GetClockConfig+0x5c>)
+ 800961a:	689b      	ldr	r3, [r3, #8]
+ 800961c:	f403 52e0 	and.w	r2, r3, #7168	; 0x1c00
+ 8009620:	687b      	ldr	r3, [r7, #4]
+ 8009622:	60da      	str	r2, [r3, #12]
+
+  /* Get the APB2 configuration ----------------------------------------------*/
+  RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
+ 8009624:	4b09      	ldr	r3, [pc, #36]	; (800964c <HAL_RCC_GetClockConfig+0x5c>)
+ 8009626:	689b      	ldr	r3, [r3, #8]
+ 8009628:	08db      	lsrs	r3, r3, #3
+ 800962a:	f403 52e0 	and.w	r2, r3, #7168	; 0x1c00
+ 800962e:	687b      	ldr	r3, [r7, #4]
+ 8009630:	611a      	str	r2, [r3, #16]
+
+  /* Get the Flash Wait State (Latency) configuration ------------------------*/
+  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
+ 8009632:	4b07      	ldr	r3, [pc, #28]	; (8009650 <HAL_RCC_GetClockConfig+0x60>)
+ 8009634:	681b      	ldr	r3, [r3, #0]
+ 8009636:	f003 020f 	and.w	r2, r3, #15
+ 800963a:	683b      	ldr	r3, [r7, #0]
+ 800963c:	601a      	str	r2, [r3, #0]
+}
+ 800963e:	bf00      	nop
+ 8009640:	370c      	adds	r7, #12
+ 8009642:	46bd      	mov	sp, r7
+ 8009644:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8009648:	4770      	bx	lr
+ 800964a:	bf00      	nop
+ 800964c:	40023800 	.word	0x40023800
+ 8009650:	40023c00 	.word	0x40023c00
+
+08009654 <HAL_RCCEx_PeriphCLKConfig>:
+  *         the backup registers) are set to their reset values.
+  *
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
+{
+ 8009654:	b580      	push	{r7, lr}
+ 8009656:	b088      	sub	sp, #32
+ 8009658:	af00      	add	r7, sp, #0
+ 800965a:	6078      	str	r0, [r7, #4]
+  uint32_t tickstart = 0;
+ 800965c:	2300      	movs	r3, #0
+ 800965e:	617b      	str	r3, [r7, #20]
+  uint32_t tmpreg0 = 0;
+ 8009660:	2300      	movs	r3, #0
+ 8009662:	613b      	str	r3, [r7, #16]
+  uint32_t tmpreg1 = 0;
+ 8009664:	2300      	movs	r3, #0
+ 8009666:	60fb      	str	r3, [r7, #12]
+  uint32_t plli2sused = 0;
+ 8009668:	2300      	movs	r3, #0
+ 800966a:	61fb      	str	r3, [r7, #28]
+  uint32_t pllsaiused = 0;
+ 800966c:	2300      	movs	r3, #0
+ 800966e:	61bb      	str	r3, [r7, #24]
+
+  /* Check the parameters */
+  assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
+
+  /*----------------------------------- I2S configuration ----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S))
+ 8009670:	687b      	ldr	r3, [r7, #4]
+ 8009672:	681b      	ldr	r3, [r3, #0]
+ 8009674:	f003 0301 	and.w	r3, r3, #1
+ 8009678:	2b00      	cmp	r3, #0
+ 800967a:	d012      	beq.n	80096a2 <HAL_RCCEx_PeriphCLKConfig+0x4e>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection));
+
+    /* Configure I2S Clock source */
+    __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection);
+ 800967c:	4b69      	ldr	r3, [pc, #420]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 800967e:	689b      	ldr	r3, [r3, #8]
+ 8009680:	4a68      	ldr	r2, [pc, #416]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8009682:	f423 0300 	bic.w	r3, r3, #8388608	; 0x800000
+ 8009686:	6093      	str	r3, [r2, #8]
+ 8009688:	4b66      	ldr	r3, [pc, #408]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 800968a:	689a      	ldr	r2, [r3, #8]
+ 800968c:	687b      	ldr	r3, [r7, #4]
+ 800968e:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8009690:	4964      	ldr	r1, [pc, #400]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8009692:	4313      	orrs	r3, r2
+ 8009694:	608b      	str	r3, [r1, #8]
+
+    /* Enable the PLLI2S when it's used as clock source for I2S */
+    if(PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)
+ 8009696:	687b      	ldr	r3, [r7, #4]
+ 8009698:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 800969a:	2b00      	cmp	r3, #0
+ 800969c:	d101      	bne.n	80096a2 <HAL_RCCEx_PeriphCLKConfig+0x4e>
+    {
+      plli2sused = 1;
+ 800969e:	2301      	movs	r3, #1
+ 80096a0:	61fb      	str	r3, [r7, #28]
+    }
+  }
+
+  /*------------------------------------ SAI1 configuration --------------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1))
+ 80096a2:	687b      	ldr	r3, [r7, #4]
+ 80096a4:	681b      	ldr	r3, [r3, #0]
+ 80096a6:	f403 2300 	and.w	r3, r3, #524288	; 0x80000
+ 80096aa:	2b00      	cmp	r3, #0
+ 80096ac:	d017      	beq.n	80096de <HAL_RCCEx_PeriphCLKConfig+0x8a>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection));
+
+    /* Configure SAI1 Clock source */
+    __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
+ 80096ae:	4b5d      	ldr	r3, [pc, #372]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80096b0:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
+ 80096b4:	f423 1240 	bic.w	r2, r3, #3145728	; 0x300000
+ 80096b8:	687b      	ldr	r3, [r7, #4]
+ 80096ba:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 80096bc:	4959      	ldr	r1, [pc, #356]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80096be:	4313      	orrs	r3, r2
+ 80096c0:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
+    /* Enable the PLLI2S when it's used as clock source for SAI */
+    if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)
+ 80096c4:	687b      	ldr	r3, [r7, #4]
+ 80096c6:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 80096c8:	f5b3 1f80 	cmp.w	r3, #1048576	; 0x100000
+ 80096cc:	d101      	bne.n	80096d2 <HAL_RCCEx_PeriphCLKConfig+0x7e>
+    {
+      plli2sused = 1;
+ 80096ce:	2301      	movs	r3, #1
+ 80096d0:	61fb      	str	r3, [r7, #28]
+    }
+    /* Enable the PLLSAI when it's used as clock source for SAI */
+    if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)
+ 80096d2:	687b      	ldr	r3, [r7, #4]
+ 80096d4:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 80096d6:	2b00      	cmp	r3, #0
+ 80096d8:	d101      	bne.n	80096de <HAL_RCCEx_PeriphCLKConfig+0x8a>
+    {
+      pllsaiused = 1;
+ 80096da:	2301      	movs	r3, #1
+ 80096dc:	61bb      	str	r3, [r7, #24]
+    }
+  }
+
+  /*------------------------------------ SAI2 configuration --------------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2))
+ 80096de:	687b      	ldr	r3, [r7, #4]
+ 80096e0:	681b      	ldr	r3, [r3, #0]
+ 80096e2:	f403 1380 	and.w	r3, r3, #1048576	; 0x100000
+ 80096e6:	2b00      	cmp	r3, #0
+ 80096e8:	d017      	beq.n	800971a <HAL_RCCEx_PeriphCLKConfig+0xc6>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection));
+
+    /* Configure SAI2 Clock source */
+    __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection);
+ 80096ea:	4b4e      	ldr	r3, [pc, #312]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80096ec:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
+ 80096f0:	f423 0240 	bic.w	r2, r3, #12582912	; 0xc00000
+ 80096f4:	687b      	ldr	r3, [r7, #4]
+ 80096f6:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 80096f8:	494a      	ldr	r1, [pc, #296]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80096fa:	4313      	orrs	r3, r2
+ 80096fc:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
+
+    /* Enable the PLLI2S when it's used as clock source for SAI */
+    if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)
+ 8009700:	687b      	ldr	r3, [r7, #4]
+ 8009702:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8009704:	f5b3 0f80 	cmp.w	r3, #4194304	; 0x400000
+ 8009708:	d101      	bne.n	800970e <HAL_RCCEx_PeriphCLKConfig+0xba>
+    {
+      plli2sused = 1;
+ 800970a:	2301      	movs	r3, #1
+ 800970c:	61fb      	str	r3, [r7, #28]
+    }
+    /* Enable the PLLSAI when it's used as clock source for SAI */
+    if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)
+ 800970e:	687b      	ldr	r3, [r7, #4]
+ 8009710:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8009712:	2b00      	cmp	r3, #0
+ 8009714:	d101      	bne.n	800971a <HAL_RCCEx_PeriphCLKConfig+0xc6>
+    {
+      pllsaiused = 1;
+ 8009716:	2301      	movs	r3, #1
+ 8009718:	61bb      	str	r3, [r7, #24]
+    }
+  }
+
+  /*-------------------------------------- SPDIF-RX Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
+ 800971a:	687b      	ldr	r3, [r7, #4]
+ 800971c:	681b      	ldr	r3, [r3, #0]
+ 800971e:	f003 7380 	and.w	r3, r3, #16777216	; 0x1000000
+ 8009722:	2b00      	cmp	r3, #0
+ 8009724:	d001      	beq.n	800972a <HAL_RCCEx_PeriphCLKConfig+0xd6>
+  {
+      plli2sused = 1;
+ 8009726:	2301      	movs	r3, #1
+ 8009728:	61fb      	str	r3, [r7, #28]
+  }
+
+  /*------------------------------------ RTC configuration --------------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
+ 800972a:	687b      	ldr	r3, [r7, #4]
+ 800972c:	681b      	ldr	r3, [r3, #0]
+ 800972e:	f003 0320 	and.w	r3, r3, #32
+ 8009732:	2b00      	cmp	r3, #0
+ 8009734:	f000 808b 	beq.w	800984e <HAL_RCCEx_PeriphCLKConfig+0x1fa>
+  {
+    /* Check for RTC Parameters used to output RTCCLK */
+    assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
+
+    /* Enable Power Clock*/
+    __HAL_RCC_PWR_CLK_ENABLE();
+ 8009738:	4b3a      	ldr	r3, [pc, #232]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 800973a:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800973c:	4a39      	ldr	r2, [pc, #228]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 800973e:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
+ 8009742:	6413      	str	r3, [r2, #64]	; 0x40
+ 8009744:	4b37      	ldr	r3, [pc, #220]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8009746:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8009748:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
+ 800974c:	60bb      	str	r3, [r7, #8]
+ 800974e:	68bb      	ldr	r3, [r7, #8]
+
+    /* Enable write access to Backup domain */
+    PWR->CR1 |= PWR_CR1_DBP;
+ 8009750:	4b35      	ldr	r3, [pc, #212]	; (8009828 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
+ 8009752:	681b      	ldr	r3, [r3, #0]
+ 8009754:	4a34      	ldr	r2, [pc, #208]	; (8009828 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
+ 8009756:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 800975a:	6013      	str	r3, [r2, #0]
+
+    /* Get Start Tick*/
+    tickstart = HAL_GetTick();
+ 800975c:	f7fb f9f4 	bl	8004b48 <HAL_GetTick>
+ 8009760:	6178      	str	r0, [r7, #20]
+
+    /* Wait for Backup domain Write protection disable */
+    while((PWR->CR1 & PWR_CR1_DBP) == RESET)
+ 8009762:	e008      	b.n	8009776 <HAL_RCCEx_PeriphCLKConfig+0x122>
+    {
+      if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
+ 8009764:	f7fb f9f0 	bl	8004b48 <HAL_GetTick>
+ 8009768:	4602      	mov	r2, r0
+ 800976a:	697b      	ldr	r3, [r7, #20]
+ 800976c:	1ad3      	subs	r3, r2, r3
+ 800976e:	2b64      	cmp	r3, #100	; 0x64
+ 8009770:	d901      	bls.n	8009776 <HAL_RCCEx_PeriphCLKConfig+0x122>
+      {
+        return HAL_TIMEOUT;
+ 8009772:	2303      	movs	r3, #3
+ 8009774:	e355      	b.n	8009e22 <HAL_RCCEx_PeriphCLKConfig+0x7ce>
+    while((PWR->CR1 & PWR_CR1_DBP) == RESET)
+ 8009776:	4b2c      	ldr	r3, [pc, #176]	; (8009828 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
+ 8009778:	681b      	ldr	r3, [r3, #0]
+ 800977a:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 800977e:	2b00      	cmp	r3, #0
+ 8009780:	d0f0      	beq.n	8009764 <HAL_RCCEx_PeriphCLKConfig+0x110>
+      }
+    }
+
+    /* Reset the Backup domain only if the RTC Clock source selection is modified */
+    tmpreg0 = (RCC->BDCR & RCC_BDCR_RTCSEL);
+ 8009782:	4b28      	ldr	r3, [pc, #160]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 8009784:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8009786:	f403 7340 	and.w	r3, r3, #768	; 0x300
+ 800978a:	613b      	str	r3, [r7, #16]
+
+    if((tmpreg0 != 0x00000000U) && (tmpreg0 != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
+ 800978c:	693b      	ldr	r3, [r7, #16]
+ 800978e:	2b00      	cmp	r3, #0
+ 8009790:	d035      	beq.n	80097fe <HAL_RCCEx_PeriphCLKConfig+0x1aa>
+ 8009792:	687b      	ldr	r3, [r7, #4]
+ 8009794:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8009796:	f403 7340 	and.w	r3, r3, #768	; 0x300
+ 800979a:	693a      	ldr	r2, [r7, #16]
+ 800979c:	429a      	cmp	r2, r3
+ 800979e:	d02e      	beq.n	80097fe <HAL_RCCEx_PeriphCLKConfig+0x1aa>
+    {
+      /* Store the content of BDCR register before the reset of Backup Domain */
+      tmpreg0 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
+ 80097a0:	4b20      	ldr	r3, [pc, #128]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80097a2:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80097a4:	f423 7340 	bic.w	r3, r3, #768	; 0x300
+ 80097a8:	613b      	str	r3, [r7, #16]
+
+      /* RTC Clock selection can be changed only if the Backup Domain is reset */
+      __HAL_RCC_BACKUPRESET_FORCE();
+ 80097aa:	4b1e      	ldr	r3, [pc, #120]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80097ac:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80097ae:	4a1d      	ldr	r2, [pc, #116]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80097b0:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
+ 80097b4:	6713      	str	r3, [r2, #112]	; 0x70
+      __HAL_RCC_BACKUPRESET_RELEASE();
+ 80097b6:	4b1b      	ldr	r3, [pc, #108]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80097b8:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80097ba:	4a1a      	ldr	r2, [pc, #104]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80097bc:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
+ 80097c0:	6713      	str	r3, [r2, #112]	; 0x70
+
+      /* Restore the Content of BDCR register */
+      RCC->BDCR = tmpreg0;
+ 80097c2:	4a18      	ldr	r2, [pc, #96]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80097c4:	693b      	ldr	r3, [r7, #16]
+ 80097c6:	6713      	str	r3, [r2, #112]	; 0x70
+
+      /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
+      if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
+ 80097c8:	4b16      	ldr	r3, [pc, #88]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80097ca:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80097cc:	f003 0301 	and.w	r3, r3, #1
+ 80097d0:	2b01      	cmp	r3, #1
+ 80097d2:	d114      	bne.n	80097fe <HAL_RCCEx_PeriphCLKConfig+0x1aa>
+      {
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 80097d4:	f7fb f9b8 	bl	8004b48 <HAL_GetTick>
+ 80097d8:	6178      	str	r0, [r7, #20]
+
+        /* Wait till LSE is ready */
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 80097da:	e00a      	b.n	80097f2 <HAL_RCCEx_PeriphCLKConfig+0x19e>
+        {
+          if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
+ 80097dc:	f7fb f9b4 	bl	8004b48 <HAL_GetTick>
+ 80097e0:	4602      	mov	r2, r0
+ 80097e2:	697b      	ldr	r3, [r7, #20]
+ 80097e4:	1ad3      	subs	r3, r2, r3
+ 80097e6:	f241 3288 	movw	r2, #5000	; 0x1388
+ 80097ea:	4293      	cmp	r3, r2
+ 80097ec:	d901      	bls.n	80097f2 <HAL_RCCEx_PeriphCLKConfig+0x19e>
+          {
+            return HAL_TIMEOUT;
+ 80097ee:	2303      	movs	r3, #3
+ 80097f0:	e317      	b.n	8009e22 <HAL_RCCEx_PeriphCLKConfig+0x7ce>
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 80097f2:	4b0c      	ldr	r3, [pc, #48]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 80097f4:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80097f6:	f003 0302 	and.w	r3, r3, #2
+ 80097fa:	2b00      	cmp	r3, #0
+ 80097fc:	d0ee      	beq.n	80097dc <HAL_RCCEx_PeriphCLKConfig+0x188>
+          }
+        }
+      }
+    }
+    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
+ 80097fe:	687b      	ldr	r3, [r7, #4]
+ 8009800:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8009802:	f403 7340 	and.w	r3, r3, #768	; 0x300
+ 8009806:	f5b3 7f40 	cmp.w	r3, #768	; 0x300
+ 800980a:	d111      	bne.n	8009830 <HAL_RCCEx_PeriphCLKConfig+0x1dc>
+ 800980c:	4b05      	ldr	r3, [pc, #20]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 800980e:	689b      	ldr	r3, [r3, #8]
+ 8009810:	f423 12f8 	bic.w	r2, r3, #2031616	; 0x1f0000
+ 8009814:	687b      	ldr	r3, [r7, #4]
+ 8009816:	6b19      	ldr	r1, [r3, #48]	; 0x30
+ 8009818:	4b04      	ldr	r3, [pc, #16]	; (800982c <HAL_RCCEx_PeriphCLKConfig+0x1d8>)
+ 800981a:	400b      	ands	r3, r1
+ 800981c:	4901      	ldr	r1, [pc, #4]	; (8009824 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
+ 800981e:	4313      	orrs	r3, r2
+ 8009820:	608b      	str	r3, [r1, #8]
+ 8009822:	e00b      	b.n	800983c <HAL_RCCEx_PeriphCLKConfig+0x1e8>
+ 8009824:	40023800 	.word	0x40023800
+ 8009828:	40007000 	.word	0x40007000
+ 800982c:	0ffffcff 	.word	0x0ffffcff
+ 8009830:	4bb0      	ldr	r3, [pc, #704]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009832:	689b      	ldr	r3, [r3, #8]
+ 8009834:	4aaf      	ldr	r2, [pc, #700]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009836:	f423 13f8 	bic.w	r3, r3, #2031616	; 0x1f0000
+ 800983a:	6093      	str	r3, [r2, #8]
+ 800983c:	4bad      	ldr	r3, [pc, #692]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 800983e:	6f1a      	ldr	r2, [r3, #112]	; 0x70
+ 8009840:	687b      	ldr	r3, [r7, #4]
+ 8009842:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8009844:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 8009848:	49aa      	ldr	r1, [pc, #680]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 800984a:	4313      	orrs	r3, r2
+ 800984c:	670b      	str	r3, [r1, #112]	; 0x70
+  }
+
+  /*------------------------------------ TIM configuration --------------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
+ 800984e:	687b      	ldr	r3, [r7, #4]
+ 8009850:	681b      	ldr	r3, [r3, #0]
+ 8009852:	f003 0310 	and.w	r3, r3, #16
+ 8009856:	2b00      	cmp	r3, #0
+ 8009858:	d010      	beq.n	800987c <HAL_RCCEx_PeriphCLKConfig+0x228>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));
+
+    /* Configure Timer Prescaler */
+    __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
+ 800985a:	4ba6      	ldr	r3, [pc, #664]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 800985c:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
+ 8009860:	4aa4      	ldr	r2, [pc, #656]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009862:	f023 7380 	bic.w	r3, r3, #16777216	; 0x1000000
+ 8009866:	f8c2 308c 	str.w	r3, [r2, #140]	; 0x8c
+ 800986a:	4ba2      	ldr	r3, [pc, #648]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 800986c:	f8d3 208c 	ldr.w	r2, [r3, #140]	; 0x8c
+ 8009870:	687b      	ldr	r3, [r7, #4]
+ 8009872:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8009874:	499f      	ldr	r1, [pc, #636]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009876:	4313      	orrs	r3, r2
+ 8009878:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
+  }
+
+  /*-------------------------------------- I2C1 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
+ 800987c:	687b      	ldr	r3, [r7, #4]
+ 800987e:	681b      	ldr	r3, [r3, #0]
+ 8009880:	f403 4380 	and.w	r3, r3, #16384	; 0x4000
+ 8009884:	2b00      	cmp	r3, #0
+ 8009886:	d00a      	beq.n	800989e <HAL_RCCEx_PeriphCLKConfig+0x24a>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
+
+    /* Configure the I2C1 clock source */
+    __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
+ 8009888:	4b9a      	ldr	r3, [pc, #616]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 800988a:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800988e:	f423 3240 	bic.w	r2, r3, #196608	; 0x30000
+ 8009892:	687b      	ldr	r3, [r7, #4]
+ 8009894:	6e5b      	ldr	r3, [r3, #100]	; 0x64
+ 8009896:	4997      	ldr	r1, [pc, #604]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009898:	4313      	orrs	r3, r2
+ 800989a:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- I2C2 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
+ 800989e:	687b      	ldr	r3, [r7, #4]
+ 80098a0:	681b      	ldr	r3, [r3, #0]
+ 80098a2:	f403 4300 	and.w	r3, r3, #32768	; 0x8000
+ 80098a6:	2b00      	cmp	r3, #0
+ 80098a8:	d00a      	beq.n	80098c0 <HAL_RCCEx_PeriphCLKConfig+0x26c>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
+
+    /* Configure the I2C2 clock source */
+    __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
+ 80098aa:	4b92      	ldr	r3, [pc, #584]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 80098ac:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 80098b0:	f423 2240 	bic.w	r2, r3, #786432	; 0xc0000
+ 80098b4:	687b      	ldr	r3, [r7, #4]
+ 80098b6:	6e9b      	ldr	r3, [r3, #104]	; 0x68
+ 80098b8:	498e      	ldr	r1, [pc, #568]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 80098ba:	4313      	orrs	r3, r2
+ 80098bc:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- I2C3 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
+ 80098c0:	687b      	ldr	r3, [r7, #4]
+ 80098c2:	681b      	ldr	r3, [r3, #0]
+ 80098c4:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
+ 80098c8:	2b00      	cmp	r3, #0
+ 80098ca:	d00a      	beq.n	80098e2 <HAL_RCCEx_PeriphCLKConfig+0x28e>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
+
+    /* Configure the I2C3 clock source */
+    __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
+ 80098cc:	4b89      	ldr	r3, [pc, #548]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 80098ce:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 80098d2:	f423 1240 	bic.w	r2, r3, #3145728	; 0x300000
+ 80098d6:	687b      	ldr	r3, [r7, #4]
+ 80098d8:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 80098da:	4986      	ldr	r1, [pc, #536]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 80098dc:	4313      	orrs	r3, r2
+ 80098de:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- I2C4 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
+ 80098e2:	687b      	ldr	r3, [r7, #4]
+ 80098e4:	681b      	ldr	r3, [r3, #0]
+ 80098e6:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 80098ea:	2b00      	cmp	r3, #0
+ 80098ec:	d00a      	beq.n	8009904 <HAL_RCCEx_PeriphCLKConfig+0x2b0>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));
+
+    /* Configure the I2C4 clock source */
+    __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
+ 80098ee:	4b81      	ldr	r3, [pc, #516]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 80098f0:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 80098f4:	f423 0240 	bic.w	r2, r3, #12582912	; 0xc00000
+ 80098f8:	687b      	ldr	r3, [r7, #4]
+ 80098fa:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80098fc:	497d      	ldr	r1, [pc, #500]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 80098fe:	4313      	orrs	r3, r2
+ 8009900:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- USART1 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
+ 8009904:	687b      	ldr	r3, [r7, #4]
+ 8009906:	681b      	ldr	r3, [r3, #0]
+ 8009908:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800990c:	2b00      	cmp	r3, #0
+ 800990e:	d00a      	beq.n	8009926 <HAL_RCCEx_PeriphCLKConfig+0x2d2>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
+
+    /* Configure the USART1 clock source */
+    __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
+ 8009910:	4b78      	ldr	r3, [pc, #480]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009912:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8009916:	f023 0203 	bic.w	r2, r3, #3
+ 800991a:	687b      	ldr	r3, [r7, #4]
+ 800991c:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 800991e:	4975      	ldr	r1, [pc, #468]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009920:	4313      	orrs	r3, r2
+ 8009922:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- USART2 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
+ 8009926:	687b      	ldr	r3, [r7, #4]
+ 8009928:	681b      	ldr	r3, [r3, #0]
+ 800992a:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 800992e:	2b00      	cmp	r3, #0
+ 8009930:	d00a      	beq.n	8009948 <HAL_RCCEx_PeriphCLKConfig+0x2f4>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
+
+    /* Configure the USART2 clock source */
+    __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
+ 8009932:	4b70      	ldr	r3, [pc, #448]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009934:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8009938:	f023 020c 	bic.w	r2, r3, #12
+ 800993c:	687b      	ldr	r3, [r7, #4]
+ 800993e:	6c9b      	ldr	r3, [r3, #72]	; 0x48
+ 8009940:	496c      	ldr	r1, [pc, #432]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009942:	4313      	orrs	r3, r2
+ 8009944:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- USART3 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
+ 8009948:	687b      	ldr	r3, [r7, #4]
+ 800994a:	681b      	ldr	r3, [r3, #0]
+ 800994c:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 8009950:	2b00      	cmp	r3, #0
+ 8009952:	d00a      	beq.n	800996a <HAL_RCCEx_PeriphCLKConfig+0x316>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
+
+    /* Configure the USART3 clock source */
+    __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
+ 8009954:	4b67      	ldr	r3, [pc, #412]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009956:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800995a:	f023 0230 	bic.w	r2, r3, #48	; 0x30
+ 800995e:	687b      	ldr	r3, [r7, #4]
+ 8009960:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8009962:	4964      	ldr	r1, [pc, #400]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009964:	4313      	orrs	r3, r2
+ 8009966:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- UART4 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4)
+ 800996a:	687b      	ldr	r3, [r7, #4]
+ 800996c:	681b      	ldr	r3, [r3, #0]
+ 800996e:	f403 7300 	and.w	r3, r3, #512	; 0x200
+ 8009972:	2b00      	cmp	r3, #0
+ 8009974:	d00a      	beq.n	800998c <HAL_RCCEx_PeriphCLKConfig+0x338>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection));
+
+    /* Configure the UART4 clock source */
+    __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
+ 8009976:	4b5f      	ldr	r3, [pc, #380]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009978:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800997c:	f023 02c0 	bic.w	r2, r3, #192	; 0xc0
+ 8009980:	687b      	ldr	r3, [r7, #4]
+ 8009982:	6d1b      	ldr	r3, [r3, #80]	; 0x50
+ 8009984:	495b      	ldr	r1, [pc, #364]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009986:	4313      	orrs	r3, r2
+ 8009988:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- UART5 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
+ 800998c:	687b      	ldr	r3, [r7, #4]
+ 800998e:	681b      	ldr	r3, [r3, #0]
+ 8009990:	f403 6380 	and.w	r3, r3, #1024	; 0x400
+ 8009994:	2b00      	cmp	r3, #0
+ 8009996:	d00a      	beq.n	80099ae <HAL_RCCEx_PeriphCLKConfig+0x35a>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection));
+
+    /* Configure the UART5 clock source */
+    __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection);
+ 8009998:	4b56      	ldr	r3, [pc, #344]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 800999a:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800999e:	f423 7240 	bic.w	r2, r3, #768	; 0x300
+ 80099a2:	687b      	ldr	r3, [r7, #4]
+ 80099a4:	6d5b      	ldr	r3, [r3, #84]	; 0x54
+ 80099a6:	4953      	ldr	r1, [pc, #332]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 80099a8:	4313      	orrs	r3, r2
+ 80099aa:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- USART6 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART6) == RCC_PERIPHCLK_USART6)
+ 80099ae:	687b      	ldr	r3, [r7, #4]
+ 80099b0:	681b      	ldr	r3, [r3, #0]
+ 80099b2:	f403 6300 	and.w	r3, r3, #2048	; 0x800
+ 80099b6:	2b00      	cmp	r3, #0
+ 80099b8:	d00a      	beq.n	80099d0 <HAL_RCCEx_PeriphCLKConfig+0x37c>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_USART6CLKSOURCE(PeriphClkInit->Usart6ClockSelection));
+
+    /* Configure the USART6 clock source */
+    __HAL_RCC_USART6_CONFIG(PeriphClkInit->Usart6ClockSelection);
+ 80099ba:	4b4e      	ldr	r3, [pc, #312]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 80099bc:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 80099c0:	f423 6240 	bic.w	r2, r3, #3072	; 0xc00
+ 80099c4:	687b      	ldr	r3, [r7, #4]
+ 80099c6:	6d9b      	ldr	r3, [r3, #88]	; 0x58
+ 80099c8:	494a      	ldr	r1, [pc, #296]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 80099ca:	4313      	orrs	r3, r2
+ 80099cc:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- UART7 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART7) == RCC_PERIPHCLK_UART7)
+ 80099d0:	687b      	ldr	r3, [r7, #4]
+ 80099d2:	681b      	ldr	r3, [r3, #0]
+ 80099d4:	f403 5380 	and.w	r3, r3, #4096	; 0x1000
+ 80099d8:	2b00      	cmp	r3, #0
+ 80099da:	d00a      	beq.n	80099f2 <HAL_RCCEx_PeriphCLKConfig+0x39e>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection));
+
+    /* Configure the UART7 clock source */
+    __HAL_RCC_UART7_CONFIG(PeriphClkInit->Uart7ClockSelection);
+ 80099dc:	4b45      	ldr	r3, [pc, #276]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 80099de:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 80099e2:	f423 5240 	bic.w	r2, r3, #12288	; 0x3000
+ 80099e6:	687b      	ldr	r3, [r7, #4]
+ 80099e8:	6ddb      	ldr	r3, [r3, #92]	; 0x5c
+ 80099ea:	4942      	ldr	r1, [pc, #264]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 80099ec:	4313      	orrs	r3, r2
+ 80099ee:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- UART8 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART8) == RCC_PERIPHCLK_UART8)
+ 80099f2:	687b      	ldr	r3, [r7, #4]
+ 80099f4:	681b      	ldr	r3, [r3, #0]
+ 80099f6:	f403 5300 	and.w	r3, r3, #8192	; 0x2000
+ 80099fa:	2b00      	cmp	r3, #0
+ 80099fc:	d00a      	beq.n	8009a14 <HAL_RCCEx_PeriphCLKConfig+0x3c0>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_UART8CLKSOURCE(PeriphClkInit->Uart8ClockSelection));
+
+    /* Configure the UART8 clock source */
+    __HAL_RCC_UART8_CONFIG(PeriphClkInit->Uart8ClockSelection);
+ 80099fe:	4b3d      	ldr	r3, [pc, #244]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009a00:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8009a04:	f423 4240 	bic.w	r2, r3, #49152	; 0xc000
+ 8009a08:	687b      	ldr	r3, [r7, #4]
+ 8009a0a:	6e1b      	ldr	r3, [r3, #96]	; 0x60
+ 8009a0c:	4939      	ldr	r1, [pc, #228]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009a0e:	4313      	orrs	r3, r2
+ 8009a10:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*--------------------------------------- CEC Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
+ 8009a14:	687b      	ldr	r3, [r7, #4]
+ 8009a16:	681b      	ldr	r3, [r3, #0]
+ 8009a18:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
+ 8009a1c:	2b00      	cmp	r3, #0
+ 8009a1e:	d00a      	beq.n	8009a36 <HAL_RCCEx_PeriphCLKConfig+0x3e2>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
+
+    /* Configure the CEC clock source */
+    __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
+ 8009a20:	4b34      	ldr	r3, [pc, #208]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009a22:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8009a26:	f023 6280 	bic.w	r2, r3, #67108864	; 0x4000000
+ 8009a2a:	687b      	ldr	r3, [r7, #4]
+ 8009a2c:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 8009a2e:	4931      	ldr	r1, [pc, #196]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009a30:	4313      	orrs	r3, r2
+ 8009a32:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+
+  /*-------------------------------------- CK48 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
+ 8009a36:	687b      	ldr	r3, [r7, #4]
+ 8009a38:	681b      	ldr	r3, [r3, #0]
+ 8009a3a:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
+ 8009a3e:	2b00      	cmp	r3, #0
+ 8009a40:	d011      	beq.n	8009a66 <HAL_RCCEx_PeriphCLKConfig+0x412>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_CLK48SOURCE(PeriphClkInit->Clk48ClockSelection));
+
+    /* Configure the CLK48 source */
+    __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
+ 8009a42:	4b2c      	ldr	r3, [pc, #176]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009a44:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8009a48:	f023 6200 	bic.w	r2, r3, #134217728	; 0x8000000
+ 8009a4c:	687b      	ldr	r3, [r7, #4]
+ 8009a4e:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
+ 8009a50:	4928      	ldr	r1, [pc, #160]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009a52:	4313      	orrs	r3, r2
+ 8009a54:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+
+    /* Enable the PLLSAI when it's used as clock source for CK48 */
+    if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP)
+ 8009a58:	687b      	ldr	r3, [r7, #4]
+ 8009a5a:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
+ 8009a5c:	f1b3 6f00 	cmp.w	r3, #134217728	; 0x8000000
+ 8009a60:	d101      	bne.n	8009a66 <HAL_RCCEx_PeriphCLKConfig+0x412>
+    {
+      pllsaiused = 1;
+ 8009a62:	2301      	movs	r3, #1
+ 8009a64:	61bb      	str	r3, [r7, #24]
+    }
+  }
+
+  /*-------------------------------------- LTDC Configuration -----------------------------------*/
+#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC)
+ 8009a66:	687b      	ldr	r3, [r7, #4]
+ 8009a68:	681b      	ldr	r3, [r3, #0]
+ 8009a6a:	f003 0308 	and.w	r3, r3, #8
+ 8009a6e:	2b00      	cmp	r3, #0
+ 8009a70:	d001      	beq.n	8009a76 <HAL_RCCEx_PeriphCLKConfig+0x422>
+  {
+    pllsaiused = 1;
+ 8009a72:	2301      	movs	r3, #1
+ 8009a74:	61bb      	str	r3, [r7, #24]
+  }
+#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */
+
+  /*-------------------------------------- LPTIM1 Configuration -----------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
+ 8009a76:	687b      	ldr	r3, [r7, #4]
+ 8009a78:	681b      	ldr	r3, [r3, #0]
+ 8009a7a:	f403 2380 	and.w	r3, r3, #262144	; 0x40000
+ 8009a7e:	2b00      	cmp	r3, #0
+ 8009a80:	d00a      	beq.n	8009a98 <HAL_RCCEx_PeriphCLKConfig+0x444>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection));
+
+    /* Configure the LTPIM1 clock source */
+    __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
+ 8009a82:	4b1c      	ldr	r3, [pc, #112]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009a84:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8009a88:	f023 7240 	bic.w	r2, r3, #50331648	; 0x3000000
+ 8009a8c:	687b      	ldr	r3, [r7, #4]
+ 8009a8e:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8009a90:	4918      	ldr	r1, [pc, #96]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009a92:	4313      	orrs	r3, r2
+ 8009a94:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+   }
+
+  /*------------------------------------- SDMMC1 Configuration ------------------------------------*/
+  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)
+ 8009a98:	687b      	ldr	r3, [r7, #4]
+ 8009a9a:	681b      	ldr	r3, [r3, #0]
+ 8009a9c:	f403 0300 	and.w	r3, r3, #8388608	; 0x800000
+ 8009aa0:	2b00      	cmp	r3, #0
+ 8009aa2:	d00b      	beq.n	8009abc <HAL_RCCEx_PeriphCLKConfig+0x468>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection));
+
+    /* Configure the SDMMC1 clock source */
+    __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection);
+ 8009aa4:	4b13      	ldr	r3, [pc, #76]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009aa6:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8009aaa:	f023 5280 	bic.w	r2, r3, #268435456	; 0x10000000
+ 8009aae:	687b      	ldr	r3, [r7, #4]
+ 8009ab0:	f8d3 3080 	ldr.w	r3, [r3, #128]	; 0x80
+ 8009ab4:	490f      	ldr	r1, [pc, #60]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009ab6:	4313      	orrs	r3, r2
+ 8009ab8:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
+  }
+#endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
+
+  /*-------------------------------------- PLLI2S Configuration ---------------------------------*/
+  /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S or SPDIF-RX */
+  if((plli2sused == 1) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
+ 8009abc:	69fb      	ldr	r3, [r7, #28]
+ 8009abe:	2b01      	cmp	r3, #1
+ 8009ac0:	d005      	beq.n	8009ace <HAL_RCCEx_PeriphCLKConfig+0x47a>
+ 8009ac2:	687b      	ldr	r3, [r7, #4]
+ 8009ac4:	681b      	ldr	r3, [r3, #0]
+ 8009ac6:	f1b3 7f00 	cmp.w	r3, #33554432	; 0x2000000
+ 8009aca:	f040 80d8 	bne.w	8009c7e <HAL_RCCEx_PeriphCLKConfig+0x62a>
+  {
+    /* Disable the PLLI2S */
+    __HAL_RCC_PLLI2S_DISABLE();
+ 8009ace:	4b09      	ldr	r3, [pc, #36]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009ad0:	681b      	ldr	r3, [r3, #0]
+ 8009ad2:	4a08      	ldr	r2, [pc, #32]	; (8009af4 <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
+ 8009ad4:	f023 6380 	bic.w	r3, r3, #67108864	; 0x4000000
+ 8009ad8:	6013      	str	r3, [r2, #0]
+
+    /* Get Start Tick*/
+    tickstart = HAL_GetTick();
+ 8009ada:	f7fb f835 	bl	8004b48 <HAL_GetTick>
+ 8009ade:	6178      	str	r0, [r7, #20]
+
+    /* Wait till PLLI2S is disabled */
+    while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  != RESET)
+ 8009ae0:	e00a      	b.n	8009af8 <HAL_RCCEx_PeriphCLKConfig+0x4a4>
+    {
+      if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
+ 8009ae2:	f7fb f831 	bl	8004b48 <HAL_GetTick>
+ 8009ae6:	4602      	mov	r2, r0
+ 8009ae8:	697b      	ldr	r3, [r7, #20]
+ 8009aea:	1ad3      	subs	r3, r2, r3
+ 8009aec:	2b64      	cmp	r3, #100	; 0x64
+ 8009aee:	d903      	bls.n	8009af8 <HAL_RCCEx_PeriphCLKConfig+0x4a4>
+      {
+        /* return in case of Timeout detected */
+        return HAL_TIMEOUT;
+ 8009af0:	2303      	movs	r3, #3
+ 8009af2:	e196      	b.n	8009e22 <HAL_RCCEx_PeriphCLKConfig+0x7ce>
+ 8009af4:	40023800 	.word	0x40023800
+    while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  != RESET)
+ 8009af8:	4b6c      	ldr	r3, [pc, #432]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009afa:	681b      	ldr	r3, [r3, #0]
+ 8009afc:	f003 6300 	and.w	r3, r3, #134217728	; 0x8000000
+ 8009b00:	2b00      	cmp	r3, #0
+ 8009b02:	d1ee      	bne.n	8009ae2 <HAL_RCCEx_PeriphCLKConfig+0x48e>
+
+    /* check for common PLLI2S Parameters */
+    assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
+
+    /*----------------- In Case of PLLI2S is selected as source clock for I2S -------------------*/
+    if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)))
+ 8009b04:	687b      	ldr	r3, [r7, #4]
+ 8009b06:	681b      	ldr	r3, [r3, #0]
+ 8009b08:	f003 0301 	and.w	r3, r3, #1
+ 8009b0c:	2b00      	cmp	r3, #0
+ 8009b0e:	d021      	beq.n	8009b54 <HAL_RCCEx_PeriphCLKConfig+0x500>
+ 8009b10:	687b      	ldr	r3, [r7, #4]
+ 8009b12:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8009b14:	2b00      	cmp	r3, #0
+ 8009b16:	d11d      	bne.n	8009b54 <HAL_RCCEx_PeriphCLKConfig+0x500>
+    {
+      /* check for Parameters */
+      assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
+
+      /* Read PLLI2SP and PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */
+      tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
+ 8009b18:	4b64      	ldr	r3, [pc, #400]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009b1a:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
+ 8009b1e:	0c1b      	lsrs	r3, r3, #16
+ 8009b20:	f003 0303 	and.w	r3, r3, #3
+ 8009b24:	613b      	str	r3, [r7, #16]
+      tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
+ 8009b26:	4b61      	ldr	r3, [pc, #388]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009b28:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
+ 8009b2c:	0e1b      	lsrs	r3, r3, #24
+ 8009b2e:	f003 030f 	and.w	r3, r3, #15
+ 8009b32:	60fb      	str	r3, [r7, #12]
+      /* Configure the PLLI2S division factors */
+      /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
+      /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
+      __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , tmpreg0, tmpreg1, PeriphClkInit->PLLI2S.PLLI2SR);
+ 8009b34:	687b      	ldr	r3, [r7, #4]
+ 8009b36:	685b      	ldr	r3, [r3, #4]
+ 8009b38:	019a      	lsls	r2, r3, #6
+ 8009b3a:	693b      	ldr	r3, [r7, #16]
+ 8009b3c:	041b      	lsls	r3, r3, #16
+ 8009b3e:	431a      	orrs	r2, r3
+ 8009b40:	68fb      	ldr	r3, [r7, #12]
+ 8009b42:	061b      	lsls	r3, r3, #24
+ 8009b44:	431a      	orrs	r2, r3
+ 8009b46:	687b      	ldr	r3, [r7, #4]
+ 8009b48:	689b      	ldr	r3, [r3, #8]
+ 8009b4a:	071b      	lsls	r3, r3, #28
+ 8009b4c:	4957      	ldr	r1, [pc, #348]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009b4e:	4313      	orrs	r3, r2
+ 8009b50:	f8c1 3084 	str.w	r3, [r1, #132]	; 0x84
+    }
+
+    /*----------------- In Case of PLLI2S is selected as source clock for SAI -------------------*/
+    if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
+ 8009b54:	687b      	ldr	r3, [r7, #4]
+ 8009b56:	681b      	ldr	r3, [r3, #0]
+ 8009b58:	f403 2300 	and.w	r3, r3, #524288	; 0x80000
+ 8009b5c:	2b00      	cmp	r3, #0
+ 8009b5e:	d004      	beq.n	8009b6a <HAL_RCCEx_PeriphCLKConfig+0x516>
+ 8009b60:	687b      	ldr	r3, [r7, #4]
+ 8009b62:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 8009b64:	f5b3 1f80 	cmp.w	r3, #1048576	; 0x100000
+ 8009b68:	d00a      	beq.n	8009b80 <HAL_RCCEx_PeriphCLKConfig+0x52c>
+       ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
+ 8009b6a:	687b      	ldr	r3, [r7, #4]
+ 8009b6c:	681b      	ldr	r3, [r3, #0]
+ 8009b6e:	f403 1380 	and.w	r3, r3, #1048576	; 0x100000
+    if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
+ 8009b72:	2b00      	cmp	r3, #0
+ 8009b74:	d02e      	beq.n	8009bd4 <HAL_RCCEx_PeriphCLKConfig+0x580>
+       ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
+ 8009b76:	687b      	ldr	r3, [r7, #4]
+ 8009b78:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8009b7a:	f5b3 0f80 	cmp.w	r3, #4194304	; 0x400000
+ 8009b7e:	d129      	bne.n	8009bd4 <HAL_RCCEx_PeriphCLKConfig+0x580>
+      assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
+      /* Check for PLLI2S/DIVQ parameters */
+      assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
+
+      /* Read PLLI2SP and PLLI2SR values from PLLI2SCFGR register (this value is not needed for SAI configuration) */
+      tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
+ 8009b80:	4b4a      	ldr	r3, [pc, #296]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009b82:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
+ 8009b86:	0c1b      	lsrs	r3, r3, #16
+ 8009b88:	f003 0303 	and.w	r3, r3, #3
+ 8009b8c:	613b      	str	r3, [r7, #16]
+      tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
+ 8009b8e:	4b47      	ldr	r3, [pc, #284]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009b90:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
+ 8009b94:	0f1b      	lsrs	r3, r3, #28
+ 8009b96:	f003 0307 	and.w	r3, r3, #7
+ 8009b9a:	60fb      	str	r3, [r7, #12]
+      /* Configure the PLLI2S division factors */
+      /* PLLI2S_VCO Input  = PLL_SOURCE/PLLM */
+      /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
+      /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
+      __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, tmpreg0, PeriphClkInit->PLLI2S.PLLI2SQ, tmpreg1);
+ 8009b9c:	687b      	ldr	r3, [r7, #4]
+ 8009b9e:	685b      	ldr	r3, [r3, #4]
+ 8009ba0:	019a      	lsls	r2, r3, #6
+ 8009ba2:	693b      	ldr	r3, [r7, #16]
+ 8009ba4:	041b      	lsls	r3, r3, #16
+ 8009ba6:	431a      	orrs	r2, r3
+ 8009ba8:	687b      	ldr	r3, [r7, #4]
+ 8009baa:	68db      	ldr	r3, [r3, #12]
+ 8009bac:	061b      	lsls	r3, r3, #24
+ 8009bae:	431a      	orrs	r2, r3
+ 8009bb0:	68fb      	ldr	r3, [r7, #12]
+ 8009bb2:	071b      	lsls	r3, r3, #28
+ 8009bb4:	493d      	ldr	r1, [pc, #244]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009bb6:	4313      	orrs	r3, r2
+ 8009bb8:	f8c1 3084 	str.w	r3, [r1, #132]	; 0x84
+
+      /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
+      __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
+ 8009bbc:	4b3b      	ldr	r3, [pc, #236]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009bbe:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
+ 8009bc2:	f023 021f 	bic.w	r2, r3, #31
+ 8009bc6:	687b      	ldr	r3, [r7, #4]
+ 8009bc8:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8009bca:	3b01      	subs	r3, #1
+ 8009bcc:	4937      	ldr	r1, [pc, #220]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009bce:	4313      	orrs	r3, r2
+ 8009bd0:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
+    }
+
+    /*----------------- In Case of PLLI2S is selected as source clock for SPDIF-RX -------------------*/
+    if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
+ 8009bd4:	687b      	ldr	r3, [r7, #4]
+ 8009bd6:	681b      	ldr	r3, [r3, #0]
+ 8009bd8:	f003 7380 	and.w	r3, r3, #16777216	; 0x1000000
+ 8009bdc:	2b00      	cmp	r3, #0
+ 8009bde:	d01d      	beq.n	8009c1c <HAL_RCCEx_PeriphCLKConfig+0x5c8>
+    {
+      /* check for Parameters */
+      assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
+
+     /* Read PLLI2SR value from PLLI2SCFGR register (this value is not needed for SPDIF-RX configuration) */
+      tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
+ 8009be0:	4b32      	ldr	r3, [pc, #200]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009be2:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
+ 8009be6:	0e1b      	lsrs	r3, r3, #24
+ 8009be8:	f003 030f 	and.w	r3, r3, #15
+ 8009bec:	613b      	str	r3, [r7, #16]
+      tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
+ 8009bee:	4b2f      	ldr	r3, [pc, #188]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009bf0:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
+ 8009bf4:	0f1b      	lsrs	r3, r3, #28
+ 8009bf6:	f003 0307 	and.w	r3, r3, #7
+ 8009bfa:	60fb      	str	r3, [r7, #12]
+      /* Configure the PLLI2S division factors */
+      /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
+      /* SPDIFCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
+      __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, tmpreg0, tmpreg1);
+ 8009bfc:	687b      	ldr	r3, [r7, #4]
+ 8009bfe:	685b      	ldr	r3, [r3, #4]
+ 8009c00:	019a      	lsls	r2, r3, #6
+ 8009c02:	687b      	ldr	r3, [r7, #4]
+ 8009c04:	691b      	ldr	r3, [r3, #16]
+ 8009c06:	041b      	lsls	r3, r3, #16
+ 8009c08:	431a      	orrs	r2, r3
+ 8009c0a:	693b      	ldr	r3, [r7, #16]
+ 8009c0c:	061b      	lsls	r3, r3, #24
+ 8009c0e:	431a      	orrs	r2, r3
+ 8009c10:	68fb      	ldr	r3, [r7, #12]
+ 8009c12:	071b      	lsls	r3, r3, #28
+ 8009c14:	4925      	ldr	r1, [pc, #148]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009c16:	4313      	orrs	r3, r2
+ 8009c18:	f8c1 3084 	str.w	r3, [r1, #132]	; 0x84
+    }
+
+    /*----------------- In Case of PLLI2S is just selected  -----------------*/
+    if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
+ 8009c1c:	687b      	ldr	r3, [r7, #4]
+ 8009c1e:	681b      	ldr	r3, [r3, #0]
+ 8009c20:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
+ 8009c24:	2b00      	cmp	r3, #0
+ 8009c26:	d011      	beq.n	8009c4c <HAL_RCCEx_PeriphCLKConfig+0x5f8>
+      assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
+
+      /* Configure the PLLI2S division factors */
+      /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLI2SM) */
+      /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
+      __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
+ 8009c28:	687b      	ldr	r3, [r7, #4]
+ 8009c2a:	685b      	ldr	r3, [r3, #4]
+ 8009c2c:	019a      	lsls	r2, r3, #6
+ 8009c2e:	687b      	ldr	r3, [r7, #4]
+ 8009c30:	691b      	ldr	r3, [r3, #16]
+ 8009c32:	041b      	lsls	r3, r3, #16
+ 8009c34:	431a      	orrs	r2, r3
+ 8009c36:	687b      	ldr	r3, [r7, #4]
+ 8009c38:	68db      	ldr	r3, [r3, #12]
+ 8009c3a:	061b      	lsls	r3, r3, #24
+ 8009c3c:	431a      	orrs	r2, r3
+ 8009c3e:	687b      	ldr	r3, [r7, #4]
+ 8009c40:	689b      	ldr	r3, [r3, #8]
+ 8009c42:	071b      	lsls	r3, r3, #28
+ 8009c44:	4919      	ldr	r1, [pc, #100]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009c46:	4313      	orrs	r3, r2
+ 8009c48:	f8c1 3084 	str.w	r3, [r1, #132]	; 0x84
+    }
+
+    /* Enable the PLLI2S */
+    __HAL_RCC_PLLI2S_ENABLE();
+ 8009c4c:	4b17      	ldr	r3, [pc, #92]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009c4e:	681b      	ldr	r3, [r3, #0]
+ 8009c50:	4a16      	ldr	r2, [pc, #88]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009c52:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
+ 8009c56:	6013      	str	r3, [r2, #0]
+
+    /* Get Start Tick*/
+    tickstart = HAL_GetTick();
+ 8009c58:	f7fa ff76 	bl	8004b48 <HAL_GetTick>
+ 8009c5c:	6178      	str	r0, [r7, #20]
+
+    /* Wait till PLLI2S is ready */
+    while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  == RESET)
+ 8009c5e:	e008      	b.n	8009c72 <HAL_RCCEx_PeriphCLKConfig+0x61e>
+    {
+      if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
+ 8009c60:	f7fa ff72 	bl	8004b48 <HAL_GetTick>
+ 8009c64:	4602      	mov	r2, r0
+ 8009c66:	697b      	ldr	r3, [r7, #20]
+ 8009c68:	1ad3      	subs	r3, r2, r3
+ 8009c6a:	2b64      	cmp	r3, #100	; 0x64
+ 8009c6c:	d901      	bls.n	8009c72 <HAL_RCCEx_PeriphCLKConfig+0x61e>
+      {
+        /* return in case of Timeout detected */
+        return HAL_TIMEOUT;
+ 8009c6e:	2303      	movs	r3, #3
+ 8009c70:	e0d7      	b.n	8009e22 <HAL_RCCEx_PeriphCLKConfig+0x7ce>
+    while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  == RESET)
+ 8009c72:	4b0e      	ldr	r3, [pc, #56]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009c74:	681b      	ldr	r3, [r3, #0]
+ 8009c76:	f003 6300 	and.w	r3, r3, #134217728	; 0x8000000
+ 8009c7a:	2b00      	cmp	r3, #0
+ 8009c7c:	d0f0      	beq.n	8009c60 <HAL_RCCEx_PeriphCLKConfig+0x60c>
+    }
+  }
+
+  /*-------------------------------------- PLLSAI Configuration ---------------------------------*/
+  /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, LTDC or CK48 */
+  if(pllsaiused == 1)
+ 8009c7e:	69bb      	ldr	r3, [r7, #24]
+ 8009c80:	2b01      	cmp	r3, #1
+ 8009c82:	f040 80cd 	bne.w	8009e20 <HAL_RCCEx_PeriphCLKConfig+0x7cc>
+  {
+    /* Disable PLLSAI Clock */
+    __HAL_RCC_PLLSAI_DISABLE();
+ 8009c86:	4b09      	ldr	r3, [pc, #36]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009c88:	681b      	ldr	r3, [r3, #0]
+ 8009c8a:	4a08      	ldr	r2, [pc, #32]	; (8009cac <HAL_RCCEx_PeriphCLKConfig+0x658>)
+ 8009c8c:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
+ 8009c90:	6013      	str	r3, [r2, #0]
+
+    /* Get Start Tick*/
+    tickstart = HAL_GetTick();
+ 8009c92:	f7fa ff59 	bl	8004b48 <HAL_GetTick>
+ 8009c96:	6178      	str	r0, [r7, #20]
+
+    /* Wait till PLLSAI is disabled */
+    while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
+ 8009c98:	e00a      	b.n	8009cb0 <HAL_RCCEx_PeriphCLKConfig+0x65c>
+    {
+      if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
+ 8009c9a:	f7fa ff55 	bl	8004b48 <HAL_GetTick>
+ 8009c9e:	4602      	mov	r2, r0
+ 8009ca0:	697b      	ldr	r3, [r7, #20]
+ 8009ca2:	1ad3      	subs	r3, r2, r3
+ 8009ca4:	2b64      	cmp	r3, #100	; 0x64
+ 8009ca6:	d903      	bls.n	8009cb0 <HAL_RCCEx_PeriphCLKConfig+0x65c>
+      {
+        /* return in case of Timeout detected */
+        return HAL_TIMEOUT;
+ 8009ca8:	2303      	movs	r3, #3
+ 8009caa:	e0ba      	b.n	8009e22 <HAL_RCCEx_PeriphCLKConfig+0x7ce>
+ 8009cac:	40023800 	.word	0x40023800
+    while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
+ 8009cb0:	4b5e      	ldr	r3, [pc, #376]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009cb2:	681b      	ldr	r3, [r3, #0]
+ 8009cb4:	f003 5300 	and.w	r3, r3, #536870912	; 0x20000000
+ 8009cb8:	f1b3 5f00 	cmp.w	r3, #536870912	; 0x20000000
+ 8009cbc:	d0ed      	beq.n	8009c9a <HAL_RCCEx_PeriphCLKConfig+0x646>
+
+    /* Check the PLLSAI division factors */
+    assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
+
+    /*----------------- In Case of PLLSAI is selected as source clock for SAI -------------------*/
+    if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
+ 8009cbe:	687b      	ldr	r3, [r7, #4]
+ 8009cc0:	681b      	ldr	r3, [r3, #0]
+ 8009cc2:	f403 2300 	and.w	r3, r3, #524288	; 0x80000
+ 8009cc6:	2b00      	cmp	r3, #0
+ 8009cc8:	d003      	beq.n	8009cd2 <HAL_RCCEx_PeriphCLKConfig+0x67e>
+ 8009cca:	687b      	ldr	r3, [r7, #4]
+ 8009ccc:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 8009cce:	2b00      	cmp	r3, #0
+ 8009cd0:	d009      	beq.n	8009ce6 <HAL_RCCEx_PeriphCLKConfig+0x692>
+       ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
+ 8009cd2:	687b      	ldr	r3, [r7, #4]
+ 8009cd4:	681b      	ldr	r3, [r3, #0]
+ 8009cd6:	f403 1380 	and.w	r3, r3, #1048576	; 0x100000
+    if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
+ 8009cda:	2b00      	cmp	r3, #0
+ 8009cdc:	d02e      	beq.n	8009d3c <HAL_RCCEx_PeriphCLKConfig+0x6e8>
+       ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
+ 8009cde:	687b      	ldr	r3, [r7, #4]
+ 8009ce0:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8009ce2:	2b00      	cmp	r3, #0
+ 8009ce4:	d12a      	bne.n	8009d3c <HAL_RCCEx_PeriphCLKConfig+0x6e8>
+      assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
+      /* check for PLLSAI/DIVQ Parameter */
+      assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
+
+      /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */
+      tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
+ 8009ce6:	4b51      	ldr	r3, [pc, #324]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009ce8:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 8009cec:	0c1b      	lsrs	r3, r3, #16
+ 8009cee:	f003 0303 	and.w	r3, r3, #3
+ 8009cf2:	613b      	str	r3, [r7, #16]
+      tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
+ 8009cf4:	4b4d      	ldr	r3, [pc, #308]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009cf6:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 8009cfa:	0f1b      	lsrs	r3, r3, #28
+ 8009cfc:	f003 0307 	and.w	r3, r3, #7
+ 8009d00:	60fb      	str	r3, [r7, #12]
+      /* PLLSAI_VCO Input  = PLL_SOURCE/PLLM */
+      /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
+      /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
+      __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg0, PeriphClkInit->PLLSAI.PLLSAIQ, tmpreg1);
+ 8009d02:	687b      	ldr	r3, [r7, #4]
+ 8009d04:	695b      	ldr	r3, [r3, #20]
+ 8009d06:	019a      	lsls	r2, r3, #6
+ 8009d08:	693b      	ldr	r3, [r7, #16]
+ 8009d0a:	041b      	lsls	r3, r3, #16
+ 8009d0c:	431a      	orrs	r2, r3
+ 8009d0e:	687b      	ldr	r3, [r7, #4]
+ 8009d10:	699b      	ldr	r3, [r3, #24]
+ 8009d12:	061b      	lsls	r3, r3, #24
+ 8009d14:	431a      	orrs	r2, r3
+ 8009d16:	68fb      	ldr	r3, [r7, #12]
+ 8009d18:	071b      	lsls	r3, r3, #28
+ 8009d1a:	4944      	ldr	r1, [pc, #272]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009d1c:	4313      	orrs	r3, r2
+ 8009d1e:	f8c1 3088 	str.w	r3, [r1, #136]	; 0x88
+
+      /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
+      __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
+ 8009d22:	4b42      	ldr	r3, [pc, #264]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009d24:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
+ 8009d28:	f423 52f8 	bic.w	r2, r3, #7936	; 0x1f00
+ 8009d2c:	687b      	ldr	r3, [r7, #4]
+ 8009d2e:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 8009d30:	3b01      	subs	r3, #1
+ 8009d32:	021b      	lsls	r3, r3, #8
+ 8009d34:	493d      	ldr	r1, [pc, #244]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009d36:	4313      	orrs	r3, r2
+ 8009d38:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
+    }
+
+    /*----------------- In Case of PLLSAI is selected as source clock for CLK48 -------------------*/
+    /* In Case of PLLI2S is selected as source clock for CK48 */
+    if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP))
+ 8009d3c:	687b      	ldr	r3, [r7, #4]
+ 8009d3e:	681b      	ldr	r3, [r3, #0]
+ 8009d40:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
+ 8009d44:	2b00      	cmp	r3, #0
+ 8009d46:	d022      	beq.n	8009d8e <HAL_RCCEx_PeriphCLKConfig+0x73a>
+ 8009d48:	687b      	ldr	r3, [r7, #4]
+ 8009d4a:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
+ 8009d4c:	f1b3 6f00 	cmp.w	r3, #134217728	; 0x8000000
+ 8009d50:	d11d      	bne.n	8009d8e <HAL_RCCEx_PeriphCLKConfig+0x73a>
+    {
+      /* check for Parameters */
+      assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP));
+      /* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48 configuration) */
+      tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
+ 8009d52:	4b36      	ldr	r3, [pc, #216]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009d54:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 8009d58:	0e1b      	lsrs	r3, r3, #24
+ 8009d5a:	f003 030f 	and.w	r3, r3, #15
+ 8009d5e:	613b      	str	r3, [r7, #16]
+      tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
+ 8009d60:	4b32      	ldr	r3, [pc, #200]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009d62:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 8009d66:	0f1b      	lsrs	r3, r3, #28
+ 8009d68:	f003 0307 	and.w	r3, r3, #7
+ 8009d6c:	60fb      	str	r3, [r7, #12]
+
+      /* Configure the PLLSAI division factors */
+      /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */
+      /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */
+      __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0, tmpreg1);
+ 8009d6e:	687b      	ldr	r3, [r7, #4]
+ 8009d70:	695b      	ldr	r3, [r3, #20]
+ 8009d72:	019a      	lsls	r2, r3, #6
+ 8009d74:	687b      	ldr	r3, [r7, #4]
+ 8009d76:	6a1b      	ldr	r3, [r3, #32]
+ 8009d78:	041b      	lsls	r3, r3, #16
+ 8009d7a:	431a      	orrs	r2, r3
+ 8009d7c:	693b      	ldr	r3, [r7, #16]
+ 8009d7e:	061b      	lsls	r3, r3, #24
+ 8009d80:	431a      	orrs	r2, r3
+ 8009d82:	68fb      	ldr	r3, [r7, #12]
+ 8009d84:	071b      	lsls	r3, r3, #28
+ 8009d86:	4929      	ldr	r1, [pc, #164]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009d88:	4313      	orrs	r3, r2
+ 8009d8a:	f8c1 3088 	str.w	r3, [r1, #136]	; 0x88
+    }
+
+#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
+    /*---------------------------- LTDC configuration -------------------------------*/
+    if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC))
+ 8009d8e:	687b      	ldr	r3, [r7, #4]
+ 8009d90:	681b      	ldr	r3, [r3, #0]
+ 8009d92:	f003 0308 	and.w	r3, r3, #8
+ 8009d96:	2b00      	cmp	r3, #0
+ 8009d98:	d028      	beq.n	8009dec <HAL_RCCEx_PeriphCLKConfig+0x798>
+    {
+      assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR));
+      assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR));
+
+      /* Read PLLSAIP and PLLSAIQ value from PLLSAICFGR register (these value are not needed for LTDC configuration) */
+      tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
+ 8009d9a:	4b24      	ldr	r3, [pc, #144]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009d9c:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 8009da0:	0e1b      	lsrs	r3, r3, #24
+ 8009da2:	f003 030f 	and.w	r3, r3, #15
+ 8009da6:	613b      	str	r3, [r7, #16]
+      tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
+ 8009da8:	4b20      	ldr	r3, [pc, #128]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009daa:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 8009dae:	0c1b      	lsrs	r3, r3, #16
+ 8009db0:	f003 0303 	and.w	r3, r3, #3
+ 8009db4:	60fb      	str	r3, [r7, #12]
+
+      /* PLLSAI_VCO Input  = PLL_SOURCE/PLLM */
+      /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
+      /* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */
+      __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg1, tmpreg0, PeriphClkInit->PLLSAI.PLLSAIR);
+ 8009db6:	687b      	ldr	r3, [r7, #4]
+ 8009db8:	695b      	ldr	r3, [r3, #20]
+ 8009dba:	019a      	lsls	r2, r3, #6
+ 8009dbc:	68fb      	ldr	r3, [r7, #12]
+ 8009dbe:	041b      	lsls	r3, r3, #16
+ 8009dc0:	431a      	orrs	r2, r3
+ 8009dc2:	693b      	ldr	r3, [r7, #16]
+ 8009dc4:	061b      	lsls	r3, r3, #24
+ 8009dc6:	431a      	orrs	r2, r3
+ 8009dc8:	687b      	ldr	r3, [r7, #4]
+ 8009dca:	69db      	ldr	r3, [r3, #28]
+ 8009dcc:	071b      	lsls	r3, r3, #28
+ 8009dce:	4917      	ldr	r1, [pc, #92]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009dd0:	4313      	orrs	r3, r2
+ 8009dd2:	f8c1 3088 	str.w	r3, [r1, #136]	; 0x88
+
+      /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */
+      __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR);
+ 8009dd6:	4b15      	ldr	r3, [pc, #84]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009dd8:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
+ 8009ddc:	f423 3240 	bic.w	r2, r3, #196608	; 0x30000
+ 8009de0:	687b      	ldr	r3, [r7, #4]
+ 8009de2:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8009de4:	4911      	ldr	r1, [pc, #68]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009de6:	4313      	orrs	r3, r2
+ 8009de8:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
+    }
+#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx  */
+
+    /* Enable PLLSAI Clock */
+    __HAL_RCC_PLLSAI_ENABLE();
+ 8009dec:	4b0f      	ldr	r3, [pc, #60]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009dee:	681b      	ldr	r3, [r3, #0]
+ 8009df0:	4a0e      	ldr	r2, [pc, #56]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009df2:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
+ 8009df6:	6013      	str	r3, [r2, #0]
+
+    /* Get Start Tick*/
+    tickstart = HAL_GetTick();
+ 8009df8:	f7fa fea6 	bl	8004b48 <HAL_GetTick>
+ 8009dfc:	6178      	str	r0, [r7, #20]
+
+    /* Wait till PLLSAI is ready */
+    while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
+ 8009dfe:	e008      	b.n	8009e12 <HAL_RCCEx_PeriphCLKConfig+0x7be>
+    {
+      if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
+ 8009e00:	f7fa fea2 	bl	8004b48 <HAL_GetTick>
+ 8009e04:	4602      	mov	r2, r0
+ 8009e06:	697b      	ldr	r3, [r7, #20]
+ 8009e08:	1ad3      	subs	r3, r2, r3
+ 8009e0a:	2b64      	cmp	r3, #100	; 0x64
+ 8009e0c:	d901      	bls.n	8009e12 <HAL_RCCEx_PeriphCLKConfig+0x7be>
+      {
+        /* return in case of Timeout detected */
+        return HAL_TIMEOUT;
+ 8009e0e:	2303      	movs	r3, #3
+ 8009e10:	e007      	b.n	8009e22 <HAL_RCCEx_PeriphCLKConfig+0x7ce>
+    while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
+ 8009e12:	4b06      	ldr	r3, [pc, #24]	; (8009e2c <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
+ 8009e14:	681b      	ldr	r3, [r3, #0]
+ 8009e16:	f003 5300 	and.w	r3, r3, #536870912	; 0x20000000
+ 8009e1a:	f1b3 5f00 	cmp.w	r3, #536870912	; 0x20000000
+ 8009e1e:	d1ef      	bne.n	8009e00 <HAL_RCCEx_PeriphCLKConfig+0x7ac>
+      }
+    }
+  }
+  return HAL_OK;
+ 8009e20:	2300      	movs	r3, #0
+}
+ 8009e22:	4618      	mov	r0, r3
+ 8009e24:	3720      	adds	r7, #32
+ 8009e26:	46bd      	mov	sp, r7
+ 8009e28:	bd80      	pop	{r7, pc}
+ 8009e2a:	bf00      	nop
+ 8009e2c:	40023800 	.word	0x40023800
+
+08009e30 <HAL_RNG_Init>:
+  * @param  hrng pointer to a RNG_HandleTypeDef structure that contains
+  *                the configuration information for RNG.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
+{
+ 8009e30:	b580      	push	{r7, lr}
+ 8009e32:	b082      	sub	sp, #8
+ 8009e34:	af00      	add	r7, sp, #0
+ 8009e36:	6078      	str	r0, [r7, #4]
+  /* Check the RNG handle allocation */
+  if (hrng == NULL)
+ 8009e38:	687b      	ldr	r3, [r7, #4]
+ 8009e3a:	2b00      	cmp	r3, #0
+ 8009e3c:	d101      	bne.n	8009e42 <HAL_RNG_Init+0x12>
+  {
+    return HAL_ERROR;
+ 8009e3e:	2301      	movs	r3, #1
+ 8009e40:	e01c      	b.n	8009e7c <HAL_RNG_Init+0x4c>
+
+    /* Init the low level hardware */
+    hrng->MspInitCallback(hrng);
+  }
+#else
+  if (hrng->State == HAL_RNG_STATE_RESET)
+ 8009e42:	687b      	ldr	r3, [r7, #4]
+ 8009e44:	795b      	ldrb	r3, [r3, #5]
+ 8009e46:	b2db      	uxtb	r3, r3
+ 8009e48:	2b00      	cmp	r3, #0
+ 8009e4a:	d105      	bne.n	8009e58 <HAL_RNG_Init+0x28>
+  {
+    /* Allocate lock resource and initialize it */
+    hrng->Lock = HAL_UNLOCKED;
+ 8009e4c:	687b      	ldr	r3, [r7, #4]
+ 8009e4e:	2200      	movs	r2, #0
+ 8009e50:	711a      	strb	r2, [r3, #4]
+
+    /* Init the low level hardware */
+    HAL_RNG_MspInit(hrng);
+ 8009e52:	6878      	ldr	r0, [r7, #4]
+ 8009e54:	f7fa fa0a 	bl	800426c <HAL_RNG_MspInit>
+  }
+#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
+
+  /* Change RNG peripheral state */
+  hrng->State = HAL_RNG_STATE_BUSY;
+ 8009e58:	687b      	ldr	r3, [r7, #4]
+ 8009e5a:	2202      	movs	r2, #2
+ 8009e5c:	715a      	strb	r2, [r3, #5]
+
+
+  /* Enable the RNG Peripheral */
+  __HAL_RNG_ENABLE(hrng);
+ 8009e5e:	687b      	ldr	r3, [r7, #4]
+ 8009e60:	681b      	ldr	r3, [r3, #0]
+ 8009e62:	681a      	ldr	r2, [r3, #0]
+ 8009e64:	687b      	ldr	r3, [r7, #4]
+ 8009e66:	681b      	ldr	r3, [r3, #0]
+ 8009e68:	f042 0204 	orr.w	r2, r2, #4
+ 8009e6c:	601a      	str	r2, [r3, #0]
+
+  /* Initialize the RNG state */
+  hrng->State = HAL_RNG_STATE_READY;
+ 8009e6e:	687b      	ldr	r3, [r7, #4]
+ 8009e70:	2201      	movs	r2, #1
+ 8009e72:	715a      	strb	r2, [r3, #5]
+
+  /* Initialise the error code */
+  hrng->ErrorCode = HAL_RNG_ERROR_NONE;
+ 8009e74:	687b      	ldr	r3, [r7, #4]
+ 8009e76:	2200      	movs	r2, #0
+ 8009e78:	609a      	str	r2, [r3, #8]
+
+  /* Return function status */
+  return HAL_OK;
+ 8009e7a:	2300      	movs	r3, #0
+}
+ 8009e7c:	4618      	mov	r0, r3
+ 8009e7e:	3708      	adds	r7, #8
+ 8009e80:	46bd      	mov	sp, r7
+ 8009e82:	bd80      	pop	{r7, pc}
+
+08009e84 <HAL_RTC_Init>:
+  * @param  hrtc pointer to a RTC_HandleTypeDef structure that contains
+  *                the configuration information for RTC.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
+{
+ 8009e84:	b580      	push	{r7, lr}
+ 8009e86:	b082      	sub	sp, #8
+ 8009e88:	af00      	add	r7, sp, #0
+ 8009e8a:	6078      	str	r0, [r7, #4]
+  /* Check the RTC peripheral state */
+  if(hrtc == NULL)
+ 8009e8c:	687b      	ldr	r3, [r7, #4]
+ 8009e8e:	2b00      	cmp	r3, #0
+ 8009e90:	d101      	bne.n	8009e96 <HAL_RTC_Init+0x12>
+  {
+     return HAL_ERROR;
+ 8009e92:	2301      	movs	r3, #1
+ 8009e94:	e06b      	b.n	8009f6e <HAL_RTC_Init+0xea>
+    {
+      hrtc->MspDeInitCallback = HAL_RTC_MspDeInit;
+    }
+  }
+#else
+  if(hrtc->State == HAL_RTC_STATE_RESET)
+ 8009e96:	687b      	ldr	r3, [r7, #4]
+ 8009e98:	7f5b      	ldrb	r3, [r3, #29]
+ 8009e9a:	b2db      	uxtb	r3, r3
+ 8009e9c:	2b00      	cmp	r3, #0
+ 8009e9e:	d105      	bne.n	8009eac <HAL_RTC_Init+0x28>
+  {
+    /* Allocate lock resource and initialize it */
+    hrtc->Lock = HAL_UNLOCKED;
+ 8009ea0:	687b      	ldr	r3, [r7, #4]
+ 8009ea2:	2200      	movs	r2, #0
+ 8009ea4:	771a      	strb	r2, [r3, #28]
+
+    /* Initialize RTC MSP */
+    HAL_RTC_MspInit(hrtc);
+ 8009ea6:	6878      	ldr	r0, [r7, #4]
+ 8009ea8:	f7fa fa00 	bl	80042ac <HAL_RTC_MspInit>
+  }
+#endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */
+
+  /* Set RTC state */
+  hrtc->State = HAL_RTC_STATE_BUSY;
+ 8009eac:	687b      	ldr	r3, [r7, #4]
+ 8009eae:	2202      	movs	r2, #2
+ 8009eb0:	775a      	strb	r2, [r3, #29]
+
+  /* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+ 8009eb2:	687b      	ldr	r3, [r7, #4]
+ 8009eb4:	681b      	ldr	r3, [r3, #0]
+ 8009eb6:	22ca      	movs	r2, #202	; 0xca
+ 8009eb8:	625a      	str	r2, [r3, #36]	; 0x24
+ 8009eba:	687b      	ldr	r3, [r7, #4]
+ 8009ebc:	681b      	ldr	r3, [r3, #0]
+ 8009ebe:	2253      	movs	r2, #83	; 0x53
+ 8009ec0:	625a      	str	r2, [r3, #36]	; 0x24
+
+  /* Set Initialization mode */
+  if(RTC_EnterInitMode(hrtc) != HAL_OK)
+ 8009ec2:	6878      	ldr	r0, [r7, #4]
+ 8009ec4:	f000 fb00 	bl	800a4c8 <RTC_EnterInitMode>
+ 8009ec8:	4603      	mov	r3, r0
+ 8009eca:	2b00      	cmp	r3, #0
+ 8009ecc:	d008      	beq.n	8009ee0 <HAL_RTC_Init+0x5c>
+  {
+    /* Enable the write protection for RTC registers */
+    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 8009ece:	687b      	ldr	r3, [r7, #4]
+ 8009ed0:	681b      	ldr	r3, [r3, #0]
+ 8009ed2:	22ff      	movs	r2, #255	; 0xff
+ 8009ed4:	625a      	str	r2, [r3, #36]	; 0x24
+
+    /* Set RTC state */
+    hrtc->State = HAL_RTC_STATE_ERROR;
+ 8009ed6:	687b      	ldr	r3, [r7, #4]
+ 8009ed8:	2204      	movs	r2, #4
+ 8009eda:	775a      	strb	r2, [r3, #29]
+
+    return HAL_ERROR;
+ 8009edc:	2301      	movs	r3, #1
+ 8009ede:	e046      	b.n	8009f6e <HAL_RTC_Init+0xea>
+  }
+  else
+  {
+    /* Clear RTC_CR FMT, OSEL and POL Bits */
+    hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL));
+ 8009ee0:	687b      	ldr	r3, [r7, #4]
+ 8009ee2:	681b      	ldr	r3, [r3, #0]
+ 8009ee4:	6899      	ldr	r1, [r3, #8]
+ 8009ee6:	687b      	ldr	r3, [r7, #4]
+ 8009ee8:	681a      	ldr	r2, [r3, #0]
+ 8009eea:	4b23      	ldr	r3, [pc, #140]	; (8009f78 <HAL_RTC_Init+0xf4>)
+ 8009eec:	400b      	ands	r3, r1
+ 8009eee:	6093      	str	r3, [r2, #8]
+    /* Set RTC_CR register */
+    hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity);
+ 8009ef0:	687b      	ldr	r3, [r7, #4]
+ 8009ef2:	681b      	ldr	r3, [r3, #0]
+ 8009ef4:	6899      	ldr	r1, [r3, #8]
+ 8009ef6:	687b      	ldr	r3, [r7, #4]
+ 8009ef8:	685a      	ldr	r2, [r3, #4]
+ 8009efa:	687b      	ldr	r3, [r7, #4]
+ 8009efc:	691b      	ldr	r3, [r3, #16]
+ 8009efe:	431a      	orrs	r2, r3
+ 8009f00:	687b      	ldr	r3, [r7, #4]
+ 8009f02:	695b      	ldr	r3, [r3, #20]
+ 8009f04:	431a      	orrs	r2, r3
+ 8009f06:	687b      	ldr	r3, [r7, #4]
+ 8009f08:	681b      	ldr	r3, [r3, #0]
+ 8009f0a:	430a      	orrs	r2, r1
+ 8009f0c:	609a      	str	r2, [r3, #8]
+
+    /* Configure the RTC PRER */
+    hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv);
+ 8009f0e:	687b      	ldr	r3, [r7, #4]
+ 8009f10:	681b      	ldr	r3, [r3, #0]
+ 8009f12:	687a      	ldr	r2, [r7, #4]
+ 8009f14:	68d2      	ldr	r2, [r2, #12]
+ 8009f16:	611a      	str	r2, [r3, #16]
+    hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16);
+ 8009f18:	687b      	ldr	r3, [r7, #4]
+ 8009f1a:	681b      	ldr	r3, [r3, #0]
+ 8009f1c:	6919      	ldr	r1, [r3, #16]
+ 8009f1e:	687b      	ldr	r3, [r7, #4]
+ 8009f20:	689b      	ldr	r3, [r3, #8]
+ 8009f22:	041a      	lsls	r2, r3, #16
+ 8009f24:	687b      	ldr	r3, [r7, #4]
+ 8009f26:	681b      	ldr	r3, [r3, #0]
+ 8009f28:	430a      	orrs	r2, r1
+ 8009f2a:	611a      	str	r2, [r3, #16]
+
+    /* Exit Initialization mode */
+    hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
+ 8009f2c:	687b      	ldr	r3, [r7, #4]
+ 8009f2e:	681b      	ldr	r3, [r3, #0]
+ 8009f30:	68da      	ldr	r2, [r3, #12]
+ 8009f32:	687b      	ldr	r3, [r7, #4]
+ 8009f34:	681b      	ldr	r3, [r3, #0]
+ 8009f36:	f022 0280 	bic.w	r2, r2, #128	; 0x80
+ 8009f3a:	60da      	str	r2, [r3, #12]
+
+    hrtc->Instance->OR &= (uint32_t)~RTC_OR_ALARMTYPE;
+ 8009f3c:	687b      	ldr	r3, [r7, #4]
+ 8009f3e:	681b      	ldr	r3, [r3, #0]
+ 8009f40:	6cda      	ldr	r2, [r3, #76]	; 0x4c
+ 8009f42:	687b      	ldr	r3, [r7, #4]
+ 8009f44:	681b      	ldr	r3, [r3, #0]
+ 8009f46:	f022 0208 	bic.w	r2, r2, #8
+ 8009f4a:	64da      	str	r2, [r3, #76]	; 0x4c
+    hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType);
+ 8009f4c:	687b      	ldr	r3, [r7, #4]
+ 8009f4e:	681b      	ldr	r3, [r3, #0]
+ 8009f50:	6cd9      	ldr	r1, [r3, #76]	; 0x4c
+ 8009f52:	687b      	ldr	r3, [r7, #4]
+ 8009f54:	699a      	ldr	r2, [r3, #24]
+ 8009f56:	687b      	ldr	r3, [r7, #4]
+ 8009f58:	681b      	ldr	r3, [r3, #0]
+ 8009f5a:	430a      	orrs	r2, r1
+ 8009f5c:	64da      	str	r2, [r3, #76]	; 0x4c
+
+    /* Enable the write protection for RTC registers */
+    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 8009f5e:	687b      	ldr	r3, [r7, #4]
+ 8009f60:	681b      	ldr	r3, [r3, #0]
+ 8009f62:	22ff      	movs	r2, #255	; 0xff
+ 8009f64:	625a      	str	r2, [r3, #36]	; 0x24
+
+    /* Set RTC state */
+    hrtc->State = HAL_RTC_STATE_READY;
+ 8009f66:	687b      	ldr	r3, [r7, #4]
+ 8009f68:	2201      	movs	r2, #1
+ 8009f6a:	775a      	strb	r2, [r3, #29]
+
+    return HAL_OK;
+ 8009f6c:	2300      	movs	r3, #0
+  }
+}
+ 8009f6e:	4618      	mov	r0, r3
+ 8009f70:	3708      	adds	r7, #8
+ 8009f72:	46bd      	mov	sp, r7
+ 8009f74:	bd80      	pop	{r7, pc}
+ 8009f76:	bf00      	nop
+ 8009f78:	ff8fffbf 	.word	0xff8fffbf
+
+08009f7c <HAL_RTC_SetTime>:
+  *            @arg FORMAT_BIN: Binary data format
+  *            @arg FORMAT_BCD: BCD data format
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
+{
+ 8009f7c:	b590      	push	{r4, r7, lr}
+ 8009f7e:	b087      	sub	sp, #28
+ 8009f80:	af00      	add	r7, sp, #0
+ 8009f82:	60f8      	str	r0, [r7, #12]
+ 8009f84:	60b9      	str	r1, [r7, #8]
+ 8009f86:	607a      	str	r2, [r7, #4]
+  uint32_t tmpreg = 0;
+ 8009f88:	2300      	movs	r3, #0
+ 8009f8a:	617b      	str	r3, [r7, #20]
+  assert_param(IS_RTC_FORMAT(Format));
+  assert_param(IS_RTC_DAYLIGHT_SAVING(sTime->DayLightSaving));
+  assert_param(IS_RTC_STORE_OPERATION(sTime->StoreOperation));
+
+  /* Process Locked */
+  __HAL_LOCK(hrtc);
+ 8009f8c:	68fb      	ldr	r3, [r7, #12]
+ 8009f8e:	7f1b      	ldrb	r3, [r3, #28]
+ 8009f90:	2b01      	cmp	r3, #1
+ 8009f92:	d101      	bne.n	8009f98 <HAL_RTC_SetTime+0x1c>
+ 8009f94:	2302      	movs	r3, #2
+ 8009f96:	e0a8      	b.n	800a0ea <HAL_RTC_SetTime+0x16e>
+ 8009f98:	68fb      	ldr	r3, [r7, #12]
+ 8009f9a:	2201      	movs	r2, #1
+ 8009f9c:	771a      	strb	r2, [r3, #28]
+
+  hrtc->State = HAL_RTC_STATE_BUSY;
+ 8009f9e:	68fb      	ldr	r3, [r7, #12]
+ 8009fa0:	2202      	movs	r2, #2
+ 8009fa2:	775a      	strb	r2, [r3, #29]
+
+  if(Format == RTC_FORMAT_BIN)
+ 8009fa4:	687b      	ldr	r3, [r7, #4]
+ 8009fa6:	2b00      	cmp	r3, #0
+ 8009fa8:	d126      	bne.n	8009ff8 <HAL_RTC_SetTime+0x7c>
+  {
+    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ 8009faa:	68fb      	ldr	r3, [r7, #12]
+ 8009fac:	681b      	ldr	r3, [r3, #0]
+ 8009fae:	689b      	ldr	r3, [r3, #8]
+ 8009fb0:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 8009fb4:	2b00      	cmp	r3, #0
+ 8009fb6:	d102      	bne.n	8009fbe <HAL_RTC_SetTime+0x42>
+      assert_param(IS_RTC_HOUR12(sTime->Hours));
+      assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
+    }
+    else
+    {
+      sTime->TimeFormat = 0x00;
+ 8009fb8:	68bb      	ldr	r3, [r7, #8]
+ 8009fba:	2200      	movs	r2, #0
+ 8009fbc:	731a      	strb	r2, [r3, #12]
+      assert_param(IS_RTC_HOUR24(sTime->Hours));
+    }
+    assert_param(IS_RTC_MINUTES(sTime->Minutes));
+    assert_param(IS_RTC_SECONDS(sTime->Seconds));
+
+    tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16) | \
+ 8009fbe:	68bb      	ldr	r3, [r7, #8]
+ 8009fc0:	781b      	ldrb	r3, [r3, #0]
+ 8009fc2:	4618      	mov	r0, r3
+ 8009fc4:	f000 faac 	bl	800a520 <RTC_ByteToBcd2>
+ 8009fc8:	4603      	mov	r3, r0
+ 8009fca:	041c      	lsls	r4, r3, #16
+                        ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8) | \
+ 8009fcc:	68bb      	ldr	r3, [r7, #8]
+ 8009fce:	785b      	ldrb	r3, [r3, #1]
+ 8009fd0:	4618      	mov	r0, r3
+ 8009fd2:	f000 faa5 	bl	800a520 <RTC_ByteToBcd2>
+ 8009fd6:	4603      	mov	r3, r0
+ 8009fd8:	021b      	lsls	r3, r3, #8
+    tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16) | \
+ 8009fda:	431c      	orrs	r4, r3
+                        ((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \
+ 8009fdc:	68bb      	ldr	r3, [r7, #8]
+ 8009fde:	789b      	ldrb	r3, [r3, #2]
+ 8009fe0:	4618      	mov	r0, r3
+ 8009fe2:	f000 fa9d 	bl	800a520 <RTC_ByteToBcd2>
+ 8009fe6:	4603      	mov	r3, r0
+                        ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8) | \
+ 8009fe8:	ea44 0203 	orr.w	r2, r4, r3
+                        (((uint32_t)sTime->TimeFormat) << 16));
+ 8009fec:	68bb      	ldr	r3, [r7, #8]
+ 8009fee:	7b1b      	ldrb	r3, [r3, #12]
+ 8009ff0:	041b      	lsls	r3, r3, #16
+    tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16) | \
+ 8009ff2:	4313      	orrs	r3, r2
+ 8009ff4:	617b      	str	r3, [r7, #20]
+ 8009ff6:	e018      	b.n	800a02a <HAL_RTC_SetTime+0xae>
+  }
+  else
+  {
+    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ 8009ff8:	68fb      	ldr	r3, [r7, #12]
+ 8009ffa:	681b      	ldr	r3, [r3, #0]
+ 8009ffc:	689b      	ldr	r3, [r3, #8]
+ 8009ffe:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800a002:	2b00      	cmp	r3, #0
+ 800a004:	d102      	bne.n	800a00c <HAL_RTC_SetTime+0x90>
+      assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sTime->Hours)));
+      assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
+    }
+    else
+    {
+      sTime->TimeFormat = 0x00;
+ 800a006:	68bb      	ldr	r3, [r7, #8]
+ 800a008:	2200      	movs	r2, #0
+ 800a00a:	731a      	strb	r2, [r3, #12]
+      assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours)));
+    }
+    assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes)));
+    assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds)));
+    tmpreg = (((uint32_t)(sTime->Hours) << 16) | \
+ 800a00c:	68bb      	ldr	r3, [r7, #8]
+ 800a00e:	781b      	ldrb	r3, [r3, #0]
+ 800a010:	041a      	lsls	r2, r3, #16
+              ((uint32_t)(sTime->Minutes) << 8) | \
+ 800a012:	68bb      	ldr	r3, [r7, #8]
+ 800a014:	785b      	ldrb	r3, [r3, #1]
+ 800a016:	021b      	lsls	r3, r3, #8
+    tmpreg = (((uint32_t)(sTime->Hours) << 16) | \
+ 800a018:	4313      	orrs	r3, r2
+              ((uint32_t)sTime->Seconds) | \
+ 800a01a:	68ba      	ldr	r2, [r7, #8]
+ 800a01c:	7892      	ldrb	r2, [r2, #2]
+              ((uint32_t)(sTime->Minutes) << 8) | \
+ 800a01e:	431a      	orrs	r2, r3
+              ((uint32_t)(sTime->TimeFormat) << 16));
+ 800a020:	68bb      	ldr	r3, [r7, #8]
+ 800a022:	7b1b      	ldrb	r3, [r3, #12]
+ 800a024:	041b      	lsls	r3, r3, #16
+    tmpreg = (((uint32_t)(sTime->Hours) << 16) | \
+ 800a026:	4313      	orrs	r3, r2
+ 800a028:	617b      	str	r3, [r7, #20]
+  }
+
+  /* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+ 800a02a:	68fb      	ldr	r3, [r7, #12]
+ 800a02c:	681b      	ldr	r3, [r3, #0]
+ 800a02e:	22ca      	movs	r2, #202	; 0xca
+ 800a030:	625a      	str	r2, [r3, #36]	; 0x24
+ 800a032:	68fb      	ldr	r3, [r7, #12]
+ 800a034:	681b      	ldr	r3, [r3, #0]
+ 800a036:	2253      	movs	r2, #83	; 0x53
+ 800a038:	625a      	str	r2, [r3, #36]	; 0x24
+
+  /* Set Initialization mode */
+  if(RTC_EnterInitMode(hrtc) != HAL_OK)
+ 800a03a:	68f8      	ldr	r0, [r7, #12]
+ 800a03c:	f000 fa44 	bl	800a4c8 <RTC_EnterInitMode>
+ 800a040:	4603      	mov	r3, r0
+ 800a042:	2b00      	cmp	r3, #0
+ 800a044:	d00b      	beq.n	800a05e <HAL_RTC_SetTime+0xe2>
+  {
+    /* Enable the write protection for RTC registers */
+    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 800a046:	68fb      	ldr	r3, [r7, #12]
+ 800a048:	681b      	ldr	r3, [r3, #0]
+ 800a04a:	22ff      	movs	r2, #255	; 0xff
+ 800a04c:	625a      	str	r2, [r3, #36]	; 0x24
+
+    /* Set RTC state */
+    hrtc->State = HAL_RTC_STATE_ERROR;
+ 800a04e:	68fb      	ldr	r3, [r7, #12]
+ 800a050:	2204      	movs	r2, #4
+ 800a052:	775a      	strb	r2, [r3, #29]
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hrtc);
+ 800a054:	68fb      	ldr	r3, [r7, #12]
+ 800a056:	2200      	movs	r2, #0
+ 800a058:	771a      	strb	r2, [r3, #28]
+
+    return HAL_ERROR;
+ 800a05a:	2301      	movs	r3, #1
+ 800a05c:	e045      	b.n	800a0ea <HAL_RTC_SetTime+0x16e>
+  }
+  else
+  {
+    /* Set the RTC_TR register */
+    hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
+ 800a05e:	68fb      	ldr	r3, [r7, #12]
+ 800a060:	681a      	ldr	r2, [r3, #0]
+ 800a062:	6979      	ldr	r1, [r7, #20]
+ 800a064:	4b23      	ldr	r3, [pc, #140]	; (800a0f4 <HAL_RTC_SetTime+0x178>)
+ 800a066:	400b      	ands	r3, r1
+ 800a068:	6013      	str	r3, [r2, #0]
+
+    /* Clear the bits to be configured */
+    hrtc->Instance->CR &= (uint32_t)~RTC_CR_BKP;
+ 800a06a:	68fb      	ldr	r3, [r7, #12]
+ 800a06c:	681b      	ldr	r3, [r3, #0]
+ 800a06e:	689a      	ldr	r2, [r3, #8]
+ 800a070:	68fb      	ldr	r3, [r7, #12]
+ 800a072:	681b      	ldr	r3, [r3, #0]
+ 800a074:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
+ 800a078:	609a      	str	r2, [r3, #8]
+
+    /* Configure the RTC_CR register */
+    hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation);
+ 800a07a:	68fb      	ldr	r3, [r7, #12]
+ 800a07c:	681b      	ldr	r3, [r3, #0]
+ 800a07e:	6899      	ldr	r1, [r3, #8]
+ 800a080:	68bb      	ldr	r3, [r7, #8]
+ 800a082:	691a      	ldr	r2, [r3, #16]
+ 800a084:	68bb      	ldr	r3, [r7, #8]
+ 800a086:	695b      	ldr	r3, [r3, #20]
+ 800a088:	431a      	orrs	r2, r3
+ 800a08a:	68fb      	ldr	r3, [r7, #12]
+ 800a08c:	681b      	ldr	r3, [r3, #0]
+ 800a08e:	430a      	orrs	r2, r1
+ 800a090:	609a      	str	r2, [r3, #8]
+
+    /* Exit Initialization mode */
+    hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
+ 800a092:	68fb      	ldr	r3, [r7, #12]
+ 800a094:	681b      	ldr	r3, [r3, #0]
+ 800a096:	68da      	ldr	r2, [r3, #12]
+ 800a098:	68fb      	ldr	r3, [r7, #12]
+ 800a09a:	681b      	ldr	r3, [r3, #0]
+ 800a09c:	f022 0280 	bic.w	r2, r2, #128	; 0x80
+ 800a0a0:	60da      	str	r2, [r3, #12]
+
+    /* If  CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
+    if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
+ 800a0a2:	68fb      	ldr	r3, [r7, #12]
+ 800a0a4:	681b      	ldr	r3, [r3, #0]
+ 800a0a6:	689b      	ldr	r3, [r3, #8]
+ 800a0a8:	f003 0320 	and.w	r3, r3, #32
+ 800a0ac:	2b00      	cmp	r3, #0
+ 800a0ae:	d111      	bne.n	800a0d4 <HAL_RTC_SetTime+0x158>
+    {
+      if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
+ 800a0b0:	68f8      	ldr	r0, [r7, #12]
+ 800a0b2:	f000 f9e1 	bl	800a478 <HAL_RTC_WaitForSynchro>
+ 800a0b6:	4603      	mov	r3, r0
+ 800a0b8:	2b00      	cmp	r3, #0
+ 800a0ba:	d00b      	beq.n	800a0d4 <HAL_RTC_SetTime+0x158>
+      {
+        /* Enable the write protection for RTC registers */
+        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 800a0bc:	68fb      	ldr	r3, [r7, #12]
+ 800a0be:	681b      	ldr	r3, [r3, #0]
+ 800a0c0:	22ff      	movs	r2, #255	; 0xff
+ 800a0c2:	625a      	str	r2, [r3, #36]	; 0x24
+
+        hrtc->State = HAL_RTC_STATE_ERROR;
+ 800a0c4:	68fb      	ldr	r3, [r7, #12]
+ 800a0c6:	2204      	movs	r2, #4
+ 800a0c8:	775a      	strb	r2, [r3, #29]
+
+        /* Process Unlocked */
+        __HAL_UNLOCK(hrtc);
+ 800a0ca:	68fb      	ldr	r3, [r7, #12]
+ 800a0cc:	2200      	movs	r2, #0
+ 800a0ce:	771a      	strb	r2, [r3, #28]
+
+        return HAL_ERROR;
+ 800a0d0:	2301      	movs	r3, #1
+ 800a0d2:	e00a      	b.n	800a0ea <HAL_RTC_SetTime+0x16e>
+      }
+    }
+
+    /* Enable the write protection for RTC registers */
+    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 800a0d4:	68fb      	ldr	r3, [r7, #12]
+ 800a0d6:	681b      	ldr	r3, [r3, #0]
+ 800a0d8:	22ff      	movs	r2, #255	; 0xff
+ 800a0da:	625a      	str	r2, [r3, #36]	; 0x24
+
+   hrtc->State = HAL_RTC_STATE_READY;
+ 800a0dc:	68fb      	ldr	r3, [r7, #12]
+ 800a0de:	2201      	movs	r2, #1
+ 800a0e0:	775a      	strb	r2, [r3, #29]
+
+   __HAL_UNLOCK(hrtc);
+ 800a0e2:	68fb      	ldr	r3, [r7, #12]
+ 800a0e4:	2200      	movs	r2, #0
+ 800a0e6:	771a      	strb	r2, [r3, #28]
+
+   return HAL_OK;
+ 800a0e8:	2300      	movs	r3, #0
+  }
+}
+ 800a0ea:	4618      	mov	r0, r3
+ 800a0ec:	371c      	adds	r7, #28
+ 800a0ee:	46bd      	mov	sp, r7
+ 800a0f0:	bd90      	pop	{r4, r7, pc}
+ 800a0f2:	bf00      	nop
+ 800a0f4:	007f7f7f 	.word	0x007f7f7f
+
+0800a0f8 <HAL_RTC_SetDate>:
+  *            @arg RTC_FORMAT_BIN: Binary data format
+  *            @arg RTC_FORMAT_BCD: BCD data format
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
+{
+ 800a0f8:	b590      	push	{r4, r7, lr}
+ 800a0fa:	b087      	sub	sp, #28
+ 800a0fc:	af00      	add	r7, sp, #0
+ 800a0fe:	60f8      	str	r0, [r7, #12]
+ 800a100:	60b9      	str	r1, [r7, #8]
+ 800a102:	607a      	str	r2, [r7, #4]
+  uint32_t datetmpreg = 0;
+ 800a104:	2300      	movs	r3, #0
+ 800a106:	617b      	str	r3, [r7, #20]
+
+ /* Check the parameters */
+  assert_param(IS_RTC_FORMAT(Format));
+
+ /* Process Locked */
+ __HAL_LOCK(hrtc);
+ 800a108:	68fb      	ldr	r3, [r7, #12]
+ 800a10a:	7f1b      	ldrb	r3, [r3, #28]
+ 800a10c:	2b01      	cmp	r3, #1
+ 800a10e:	d101      	bne.n	800a114 <HAL_RTC_SetDate+0x1c>
+ 800a110:	2302      	movs	r3, #2
+ 800a112:	e092      	b.n	800a23a <HAL_RTC_SetDate+0x142>
+ 800a114:	68fb      	ldr	r3, [r7, #12]
+ 800a116:	2201      	movs	r2, #1
+ 800a118:	771a      	strb	r2, [r3, #28]
+
+  hrtc->State = HAL_RTC_STATE_BUSY;
+ 800a11a:	68fb      	ldr	r3, [r7, #12]
+ 800a11c:	2202      	movs	r2, #2
+ 800a11e:	775a      	strb	r2, [r3, #29]
+
+  if((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U))
+ 800a120:	687b      	ldr	r3, [r7, #4]
+ 800a122:	2b00      	cmp	r3, #0
+ 800a124:	d10e      	bne.n	800a144 <HAL_RTC_SetDate+0x4c>
+ 800a126:	68bb      	ldr	r3, [r7, #8]
+ 800a128:	785b      	ldrb	r3, [r3, #1]
+ 800a12a:	f003 0310 	and.w	r3, r3, #16
+ 800a12e:	2b00      	cmp	r3, #0
+ 800a130:	d008      	beq.n	800a144 <HAL_RTC_SetDate+0x4c>
+  {
+    sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU);
+ 800a132:	68bb      	ldr	r3, [r7, #8]
+ 800a134:	785b      	ldrb	r3, [r3, #1]
+ 800a136:	f023 0310 	bic.w	r3, r3, #16
+ 800a13a:	b2db      	uxtb	r3, r3
+ 800a13c:	330a      	adds	r3, #10
+ 800a13e:	b2da      	uxtb	r2, r3
+ 800a140:	68bb      	ldr	r3, [r7, #8]
+ 800a142:	705a      	strb	r2, [r3, #1]
+  }
+
+  assert_param(IS_RTC_WEEKDAY(sDate->WeekDay));
+
+  if(Format == RTC_FORMAT_BIN)
+ 800a144:	687b      	ldr	r3, [r7, #4]
+ 800a146:	2b00      	cmp	r3, #0
+ 800a148:	d11c      	bne.n	800a184 <HAL_RTC_SetDate+0x8c>
+  {
+    assert_param(IS_RTC_YEAR(sDate->Year));
+    assert_param(IS_RTC_MONTH(sDate->Month));
+    assert_param(IS_RTC_DATE(sDate->Date));
+
+   datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16) | \
+ 800a14a:	68bb      	ldr	r3, [r7, #8]
+ 800a14c:	78db      	ldrb	r3, [r3, #3]
+ 800a14e:	4618      	mov	r0, r3
+ 800a150:	f000 f9e6 	bl	800a520 <RTC_ByteToBcd2>
+ 800a154:	4603      	mov	r3, r0
+ 800a156:	041c      	lsls	r4, r3, #16
+                 ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8) | \
+ 800a158:	68bb      	ldr	r3, [r7, #8]
+ 800a15a:	785b      	ldrb	r3, [r3, #1]
+ 800a15c:	4618      	mov	r0, r3
+ 800a15e:	f000 f9df 	bl	800a520 <RTC_ByteToBcd2>
+ 800a162:	4603      	mov	r3, r0
+ 800a164:	021b      	lsls	r3, r3, #8
+   datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16) | \
+ 800a166:	431c      	orrs	r4, r3
+                 ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \
+ 800a168:	68bb      	ldr	r3, [r7, #8]
+ 800a16a:	789b      	ldrb	r3, [r3, #2]
+ 800a16c:	4618      	mov	r0, r3
+ 800a16e:	f000 f9d7 	bl	800a520 <RTC_ByteToBcd2>
+ 800a172:	4603      	mov	r3, r0
+                 ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8) | \
+ 800a174:	ea44 0203 	orr.w	r2, r4, r3
+                 ((uint32_t)sDate->WeekDay << 13));
+ 800a178:	68bb      	ldr	r3, [r7, #8]
+ 800a17a:	781b      	ldrb	r3, [r3, #0]
+ 800a17c:	035b      	lsls	r3, r3, #13
+   datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16) | \
+ 800a17e:	4313      	orrs	r3, r2
+ 800a180:	617b      	str	r3, [r7, #20]
+ 800a182:	e00e      	b.n	800a1a2 <HAL_RTC_SetDate+0xaa>
+  {
+    assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year)));
+    assert_param(IS_RTC_MONTH(RTC_Bcd2ToByte(sDate->Month)));
+    assert_param(IS_RTC_DATE(RTC_Bcd2ToByte(sDate->Date)));
+
+    datetmpreg = ((((uint32_t)sDate->Year) << 16) | \
+ 800a184:	68bb      	ldr	r3, [r7, #8]
+ 800a186:	78db      	ldrb	r3, [r3, #3]
+ 800a188:	041a      	lsls	r2, r3, #16
+                  (((uint32_t)sDate->Month) << 8) | \
+ 800a18a:	68bb      	ldr	r3, [r7, #8]
+ 800a18c:	785b      	ldrb	r3, [r3, #1]
+ 800a18e:	021b      	lsls	r3, r3, #8
+    datetmpreg = ((((uint32_t)sDate->Year) << 16) | \
+ 800a190:	4313      	orrs	r3, r2
+                  ((uint32_t)sDate->Date) | \
+ 800a192:	68ba      	ldr	r2, [r7, #8]
+ 800a194:	7892      	ldrb	r2, [r2, #2]
+                  (((uint32_t)sDate->Month) << 8) | \
+ 800a196:	431a      	orrs	r2, r3
+                  (((uint32_t)sDate->WeekDay) << 13));
+ 800a198:	68bb      	ldr	r3, [r7, #8]
+ 800a19a:	781b      	ldrb	r3, [r3, #0]
+ 800a19c:	035b      	lsls	r3, r3, #13
+    datetmpreg = ((((uint32_t)sDate->Year) << 16) | \
+ 800a19e:	4313      	orrs	r3, r2
+ 800a1a0:	617b      	str	r3, [r7, #20]
+  }
+
+  /* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+ 800a1a2:	68fb      	ldr	r3, [r7, #12]
+ 800a1a4:	681b      	ldr	r3, [r3, #0]
+ 800a1a6:	22ca      	movs	r2, #202	; 0xca
+ 800a1a8:	625a      	str	r2, [r3, #36]	; 0x24
+ 800a1aa:	68fb      	ldr	r3, [r7, #12]
+ 800a1ac:	681b      	ldr	r3, [r3, #0]
+ 800a1ae:	2253      	movs	r2, #83	; 0x53
+ 800a1b0:	625a      	str	r2, [r3, #36]	; 0x24
+
+  /* Set Initialization mode */
+  if(RTC_EnterInitMode(hrtc) != HAL_OK)
+ 800a1b2:	68f8      	ldr	r0, [r7, #12]
+ 800a1b4:	f000 f988 	bl	800a4c8 <RTC_EnterInitMode>
+ 800a1b8:	4603      	mov	r3, r0
+ 800a1ba:	2b00      	cmp	r3, #0
+ 800a1bc:	d00b      	beq.n	800a1d6 <HAL_RTC_SetDate+0xde>
+  {
+    /* Enable the write protection for RTC registers */
+    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 800a1be:	68fb      	ldr	r3, [r7, #12]
+ 800a1c0:	681b      	ldr	r3, [r3, #0]
+ 800a1c2:	22ff      	movs	r2, #255	; 0xff
+ 800a1c4:	625a      	str	r2, [r3, #36]	; 0x24
+
+    /* Set RTC state*/
+    hrtc->State = HAL_RTC_STATE_ERROR;
+ 800a1c6:	68fb      	ldr	r3, [r7, #12]
+ 800a1c8:	2204      	movs	r2, #4
+ 800a1ca:	775a      	strb	r2, [r3, #29]
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hrtc);
+ 800a1cc:	68fb      	ldr	r3, [r7, #12]
+ 800a1ce:	2200      	movs	r2, #0
+ 800a1d0:	771a      	strb	r2, [r3, #28]
+
+    return HAL_ERROR;
+ 800a1d2:	2301      	movs	r3, #1
+ 800a1d4:	e031      	b.n	800a23a <HAL_RTC_SetDate+0x142>
+  }
+  else
+  {
+    /* Set the RTC_DR register */
+    hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK);
+ 800a1d6:	68fb      	ldr	r3, [r7, #12]
+ 800a1d8:	681a      	ldr	r2, [r3, #0]
+ 800a1da:	6979      	ldr	r1, [r7, #20]
+ 800a1dc:	4b19      	ldr	r3, [pc, #100]	; (800a244 <HAL_RTC_SetDate+0x14c>)
+ 800a1de:	400b      	ands	r3, r1
+ 800a1e0:	6053      	str	r3, [r2, #4]
+
+    /* Exit Initialization mode */
+    hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
+ 800a1e2:	68fb      	ldr	r3, [r7, #12]
+ 800a1e4:	681b      	ldr	r3, [r3, #0]
+ 800a1e6:	68da      	ldr	r2, [r3, #12]
+ 800a1e8:	68fb      	ldr	r3, [r7, #12]
+ 800a1ea:	681b      	ldr	r3, [r3, #0]
+ 800a1ec:	f022 0280 	bic.w	r2, r2, #128	; 0x80
+ 800a1f0:	60da      	str	r2, [r3, #12]
+
+    /* If  CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
+    if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
+ 800a1f2:	68fb      	ldr	r3, [r7, #12]
+ 800a1f4:	681b      	ldr	r3, [r3, #0]
+ 800a1f6:	689b      	ldr	r3, [r3, #8]
+ 800a1f8:	f003 0320 	and.w	r3, r3, #32
+ 800a1fc:	2b00      	cmp	r3, #0
+ 800a1fe:	d111      	bne.n	800a224 <HAL_RTC_SetDate+0x12c>
+    {
+      if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
+ 800a200:	68f8      	ldr	r0, [r7, #12]
+ 800a202:	f000 f939 	bl	800a478 <HAL_RTC_WaitForSynchro>
+ 800a206:	4603      	mov	r3, r0
+ 800a208:	2b00      	cmp	r3, #0
+ 800a20a:	d00b      	beq.n	800a224 <HAL_RTC_SetDate+0x12c>
+      {
+        /* Enable the write protection for RTC registers */
+        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 800a20c:	68fb      	ldr	r3, [r7, #12]
+ 800a20e:	681b      	ldr	r3, [r3, #0]
+ 800a210:	22ff      	movs	r2, #255	; 0xff
+ 800a212:	625a      	str	r2, [r3, #36]	; 0x24
+
+        hrtc->State = HAL_RTC_STATE_ERROR;
+ 800a214:	68fb      	ldr	r3, [r7, #12]
+ 800a216:	2204      	movs	r2, #4
+ 800a218:	775a      	strb	r2, [r3, #29]
+
+        /* Process Unlocked */
+        __HAL_UNLOCK(hrtc);
+ 800a21a:	68fb      	ldr	r3, [r7, #12]
+ 800a21c:	2200      	movs	r2, #0
+ 800a21e:	771a      	strb	r2, [r3, #28]
+
+        return HAL_ERROR;
+ 800a220:	2301      	movs	r3, #1
+ 800a222:	e00a      	b.n	800a23a <HAL_RTC_SetDate+0x142>
+      }
+    }
+
+    /* Enable the write protection for RTC registers */
+    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 800a224:	68fb      	ldr	r3, [r7, #12]
+ 800a226:	681b      	ldr	r3, [r3, #0]
+ 800a228:	22ff      	movs	r2, #255	; 0xff
+ 800a22a:	625a      	str	r2, [r3, #36]	; 0x24
+
+    hrtc->State = HAL_RTC_STATE_READY ;
+ 800a22c:	68fb      	ldr	r3, [r7, #12]
+ 800a22e:	2201      	movs	r2, #1
+ 800a230:	775a      	strb	r2, [r3, #29]
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hrtc);
+ 800a232:	68fb      	ldr	r3, [r7, #12]
+ 800a234:	2200      	movs	r2, #0
+ 800a236:	771a      	strb	r2, [r3, #28]
+
+    return HAL_OK;
+ 800a238:	2300      	movs	r3, #0
+  }
+}
+ 800a23a:	4618      	mov	r0, r3
+ 800a23c:	371c      	adds	r7, #28
+ 800a23e:	46bd      	mov	sp, r7
+ 800a240:	bd90      	pop	{r4, r7, pc}
+ 800a242:	bf00      	nop
+ 800a244:	00ffff3f 	.word	0x00ffff3f
+
+0800a248 <HAL_RTC_SetAlarm>:
+  *             @arg FORMAT_BIN: Binary data format
+  *             @arg FORMAT_BCD: BCD data format
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
+{
+ 800a248:	b590      	push	{r4, r7, lr}
+ 800a24a:	b089      	sub	sp, #36	; 0x24
+ 800a24c:	af00      	add	r7, sp, #0
+ 800a24e:	60f8      	str	r0, [r7, #12]
+ 800a250:	60b9      	str	r1, [r7, #8]
+ 800a252:	607a      	str	r2, [r7, #4]
+  uint32_t tickstart = 0;
+ 800a254:	2300      	movs	r3, #0
+ 800a256:	61bb      	str	r3, [r7, #24]
+  uint32_t tmpreg = 0, subsecondtmpreg = 0;
+ 800a258:	2300      	movs	r3, #0
+ 800a25a:	61fb      	str	r3, [r7, #28]
+ 800a25c:	2300      	movs	r3, #0
+ 800a25e:	617b      	str	r3, [r7, #20]
+  assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
+  assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
+  assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
+
+  /* Process Locked */
+  __HAL_LOCK(hrtc);
+ 800a260:	68fb      	ldr	r3, [r7, #12]
+ 800a262:	7f1b      	ldrb	r3, [r3, #28]
+ 800a264:	2b01      	cmp	r3, #1
+ 800a266:	d101      	bne.n	800a26c <HAL_RTC_SetAlarm+0x24>
+ 800a268:	2302      	movs	r3, #2
+ 800a26a:	e101      	b.n	800a470 <HAL_RTC_SetAlarm+0x228>
+ 800a26c:	68fb      	ldr	r3, [r7, #12]
+ 800a26e:	2201      	movs	r2, #1
+ 800a270:	771a      	strb	r2, [r3, #28]
+
+  hrtc->State = HAL_RTC_STATE_BUSY;
+ 800a272:	68fb      	ldr	r3, [r7, #12]
+ 800a274:	2202      	movs	r2, #2
+ 800a276:	775a      	strb	r2, [r3, #29]
+
+  if(Format == RTC_FORMAT_BIN)
+ 800a278:	687b      	ldr	r3, [r7, #4]
+ 800a27a:	2b00      	cmp	r3, #0
+ 800a27c:	d137      	bne.n	800a2ee <HAL_RTC_SetAlarm+0xa6>
+  {
+    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ 800a27e:	68fb      	ldr	r3, [r7, #12]
+ 800a280:	681b      	ldr	r3, [r3, #0]
+ 800a282:	689b      	ldr	r3, [r3, #8]
+ 800a284:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800a288:	2b00      	cmp	r3, #0
+ 800a28a:	d102      	bne.n	800a292 <HAL_RTC_SetAlarm+0x4a>
+      assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
+      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
+    }
+    else
+    {
+      sAlarm->AlarmTime.TimeFormat = 0x00;
+ 800a28c:	68bb      	ldr	r3, [r7, #8]
+ 800a28e:	2200      	movs	r2, #0
+ 800a290:	731a      	strb	r2, [r3, #12]
+    else
+    {
+      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
+    }
+
+    tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16) | \
+ 800a292:	68bb      	ldr	r3, [r7, #8]
+ 800a294:	781b      	ldrb	r3, [r3, #0]
+ 800a296:	4618      	mov	r0, r3
+ 800a298:	f000 f942 	bl	800a520 <RTC_ByteToBcd2>
+ 800a29c:	4603      	mov	r3, r0
+ 800a29e:	041c      	lsls	r4, r3, #16
+              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8) | \
+ 800a2a0:	68bb      	ldr	r3, [r7, #8]
+ 800a2a2:	785b      	ldrb	r3, [r3, #1]
+ 800a2a4:	4618      	mov	r0, r3
+ 800a2a6:	f000 f93b 	bl	800a520 <RTC_ByteToBcd2>
+ 800a2aa:	4603      	mov	r3, r0
+ 800a2ac:	021b      	lsls	r3, r3, #8
+    tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16) | \
+ 800a2ae:	431c      	orrs	r4, r3
+              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
+ 800a2b0:	68bb      	ldr	r3, [r7, #8]
+ 800a2b2:	789b      	ldrb	r3, [r3, #2]
+ 800a2b4:	4618      	mov	r0, r3
+ 800a2b6:	f000 f933 	bl	800a520 <RTC_ByteToBcd2>
+ 800a2ba:	4603      	mov	r3, r0
+              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8) | \
+ 800a2bc:	ea44 0203 	orr.w	r2, r4, r3
+              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \
+ 800a2c0:	68bb      	ldr	r3, [r7, #8]
+ 800a2c2:	7b1b      	ldrb	r3, [r3, #12]
+ 800a2c4:	041b      	lsls	r3, r3, #16
+              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
+ 800a2c6:	ea42 0403 	orr.w	r4, r2, r3
+              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24) | \
+ 800a2ca:	68bb      	ldr	r3, [r7, #8]
+ 800a2cc:	f893 3024 	ldrb.w	r3, [r3, #36]	; 0x24
+ 800a2d0:	4618      	mov	r0, r3
+ 800a2d2:	f000 f925 	bl	800a520 <RTC_ByteToBcd2>
+ 800a2d6:	4603      	mov	r3, r0
+ 800a2d8:	061b      	lsls	r3, r3, #24
+              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \
+ 800a2da:	ea44 0203 	orr.w	r2, r4, r3
+              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
+ 800a2de:	68bb      	ldr	r3, [r7, #8]
+ 800a2e0:	6a1b      	ldr	r3, [r3, #32]
+              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24) | \
+ 800a2e2:	431a      	orrs	r2, r3
+              ((uint32_t)sAlarm->AlarmMask));
+ 800a2e4:	68bb      	ldr	r3, [r7, #8]
+ 800a2e6:	699b      	ldr	r3, [r3, #24]
+    tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16) | \
+ 800a2e8:	4313      	orrs	r3, r2
+ 800a2ea:	61fb      	str	r3, [r7, #28]
+ 800a2ec:	e023      	b.n	800a336 <HAL_RTC_SetAlarm+0xee>
+  }
+  else
+  {
+    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ 800a2ee:	68fb      	ldr	r3, [r7, #12]
+ 800a2f0:	681b      	ldr	r3, [r3, #0]
+ 800a2f2:	689b      	ldr	r3, [r3, #8]
+ 800a2f4:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800a2f8:	2b00      	cmp	r3, #0
+ 800a2fa:	d102      	bne.n	800a302 <HAL_RTC_SetAlarm+0xba>
+      assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
+      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
+    }
+    else
+    {
+      sAlarm->AlarmTime.TimeFormat = 0x00;
+ 800a2fc:	68bb      	ldr	r3, [r7, #8]
+ 800a2fe:	2200      	movs	r2, #0
+ 800a300:	731a      	strb	r2, [r3, #12]
+    else
+    {
+      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay)));
+    }
+
+    tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16) | \
+ 800a302:	68bb      	ldr	r3, [r7, #8]
+ 800a304:	781b      	ldrb	r3, [r3, #0]
+ 800a306:	041a      	lsls	r2, r3, #16
+              ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8) | \
+ 800a308:	68bb      	ldr	r3, [r7, #8]
+ 800a30a:	785b      	ldrb	r3, [r3, #1]
+ 800a30c:	021b      	lsls	r3, r3, #8
+    tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16) | \
+ 800a30e:	4313      	orrs	r3, r2
+              ((uint32_t) sAlarm->AlarmTime.Seconds) | \
+ 800a310:	68ba      	ldr	r2, [r7, #8]
+ 800a312:	7892      	ldrb	r2, [r2, #2]
+              ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8) | \
+ 800a314:	431a      	orrs	r2, r3
+              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \
+ 800a316:	68bb      	ldr	r3, [r7, #8]
+ 800a318:	7b1b      	ldrb	r3, [r3, #12]
+ 800a31a:	041b      	lsls	r3, r3, #16
+              ((uint32_t) sAlarm->AlarmTime.Seconds) | \
+ 800a31c:	431a      	orrs	r2, r3
+              ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24) | \
+ 800a31e:	68bb      	ldr	r3, [r7, #8]
+ 800a320:	f893 3024 	ldrb.w	r3, [r3, #36]	; 0x24
+ 800a324:	061b      	lsls	r3, r3, #24
+              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \
+ 800a326:	431a      	orrs	r2, r3
+              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
+ 800a328:	68bb      	ldr	r3, [r7, #8]
+ 800a32a:	6a1b      	ldr	r3, [r3, #32]
+              ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24) | \
+ 800a32c:	431a      	orrs	r2, r3
+              ((uint32_t)sAlarm->AlarmMask));
+ 800a32e:	68bb      	ldr	r3, [r7, #8]
+ 800a330:	699b      	ldr	r3, [r3, #24]
+    tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16) | \
+ 800a332:	4313      	orrs	r3, r2
+ 800a334:	61fb      	str	r3, [r7, #28]
+  }
+
+  /* Configure the Alarm A or Alarm B Sub Second registers */
+  subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask));
+ 800a336:	68bb      	ldr	r3, [r7, #8]
+ 800a338:	685a      	ldr	r2, [r3, #4]
+ 800a33a:	68bb      	ldr	r3, [r7, #8]
+ 800a33c:	69db      	ldr	r3, [r3, #28]
+ 800a33e:	4313      	orrs	r3, r2
+ 800a340:	617b      	str	r3, [r7, #20]
+
+  /* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+ 800a342:	68fb      	ldr	r3, [r7, #12]
+ 800a344:	681b      	ldr	r3, [r3, #0]
+ 800a346:	22ca      	movs	r2, #202	; 0xca
+ 800a348:	625a      	str	r2, [r3, #36]	; 0x24
+ 800a34a:	68fb      	ldr	r3, [r7, #12]
+ 800a34c:	681b      	ldr	r3, [r3, #0]
+ 800a34e:	2253      	movs	r2, #83	; 0x53
+ 800a350:	625a      	str	r2, [r3, #36]	; 0x24
+
+  /* Configure the Alarm register */
+  if(sAlarm->Alarm == RTC_ALARM_A)
+ 800a352:	68bb      	ldr	r3, [r7, #8]
+ 800a354:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 800a356:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
+ 800a35a:	d13f      	bne.n	800a3dc <HAL_RTC_SetAlarm+0x194>
+  {
+    /* Disable the Alarm A interrupt */
+    __HAL_RTC_ALARMA_DISABLE(hrtc);
+ 800a35c:	68fb      	ldr	r3, [r7, #12]
+ 800a35e:	681b      	ldr	r3, [r3, #0]
+ 800a360:	689a      	ldr	r2, [r3, #8]
+ 800a362:	68fb      	ldr	r3, [r7, #12]
+ 800a364:	681b      	ldr	r3, [r3, #0]
+ 800a366:	f422 7280 	bic.w	r2, r2, #256	; 0x100
+ 800a36a:	609a      	str	r2, [r3, #8]
+
+    /* In case of interrupt mode is used, the interrupt source must disabled */
+    __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
+ 800a36c:	68fb      	ldr	r3, [r7, #12]
+ 800a36e:	681b      	ldr	r3, [r3, #0]
+ 800a370:	689a      	ldr	r2, [r3, #8]
+ 800a372:	68fb      	ldr	r3, [r7, #12]
+ 800a374:	681b      	ldr	r3, [r3, #0]
+ 800a376:	f422 5280 	bic.w	r2, r2, #4096	; 0x1000
+ 800a37a:	609a      	str	r2, [r3, #8]
+
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 800a37c:	f7fa fbe4 	bl	8004b48 <HAL_GetTick>
+ 800a380:	61b8      	str	r0, [r7, #24]
+
+    /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
+    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
+ 800a382:	e013      	b.n	800a3ac <HAL_RTC_SetAlarm+0x164>
+    {
+      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
+ 800a384:	f7fa fbe0 	bl	8004b48 <HAL_GetTick>
+ 800a388:	4602      	mov	r2, r0
+ 800a38a:	69bb      	ldr	r3, [r7, #24]
+ 800a38c:	1ad3      	subs	r3, r2, r3
+ 800a38e:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
+ 800a392:	d90b      	bls.n	800a3ac <HAL_RTC_SetAlarm+0x164>
+      {
+        /* Enable the write protection for RTC registers */
+        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 800a394:	68fb      	ldr	r3, [r7, #12]
+ 800a396:	681b      	ldr	r3, [r3, #0]
+ 800a398:	22ff      	movs	r2, #255	; 0xff
+ 800a39a:	625a      	str	r2, [r3, #36]	; 0x24
+
+        hrtc->State = HAL_RTC_STATE_TIMEOUT;
+ 800a39c:	68fb      	ldr	r3, [r7, #12]
+ 800a39e:	2203      	movs	r2, #3
+ 800a3a0:	775a      	strb	r2, [r3, #29]
+
+        /* Process Unlocked */
+        __HAL_UNLOCK(hrtc);
+ 800a3a2:	68fb      	ldr	r3, [r7, #12]
+ 800a3a4:	2200      	movs	r2, #0
+ 800a3a6:	771a      	strb	r2, [r3, #28]
+
+        return HAL_TIMEOUT;
+ 800a3a8:	2303      	movs	r3, #3
+ 800a3aa:	e061      	b.n	800a470 <HAL_RTC_SetAlarm+0x228>
+    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
+ 800a3ac:	68fb      	ldr	r3, [r7, #12]
+ 800a3ae:	681b      	ldr	r3, [r3, #0]
+ 800a3b0:	68db      	ldr	r3, [r3, #12]
+ 800a3b2:	f003 0301 	and.w	r3, r3, #1
+ 800a3b6:	2b00      	cmp	r3, #0
+ 800a3b8:	d0e4      	beq.n	800a384 <HAL_RTC_SetAlarm+0x13c>
+      }
+    }
+
+    hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
+ 800a3ba:	68fb      	ldr	r3, [r7, #12]
+ 800a3bc:	681b      	ldr	r3, [r3, #0]
+ 800a3be:	69fa      	ldr	r2, [r7, #28]
+ 800a3c0:	61da      	str	r2, [r3, #28]
+    /* Configure the Alarm A Sub Second register */
+    hrtc->Instance->ALRMASSR = subsecondtmpreg;
+ 800a3c2:	68fb      	ldr	r3, [r7, #12]
+ 800a3c4:	681b      	ldr	r3, [r3, #0]
+ 800a3c6:	697a      	ldr	r2, [r7, #20]
+ 800a3c8:	645a      	str	r2, [r3, #68]	; 0x44
+    /* Configure the Alarm state: Enable Alarm */
+    __HAL_RTC_ALARMA_ENABLE(hrtc);
+ 800a3ca:	68fb      	ldr	r3, [r7, #12]
+ 800a3cc:	681b      	ldr	r3, [r3, #0]
+ 800a3ce:	689a      	ldr	r2, [r3, #8]
+ 800a3d0:	68fb      	ldr	r3, [r7, #12]
+ 800a3d2:	681b      	ldr	r3, [r3, #0]
+ 800a3d4:	f442 7280 	orr.w	r2, r2, #256	; 0x100
+ 800a3d8:	609a      	str	r2, [r3, #8]
+ 800a3da:	e03e      	b.n	800a45a <HAL_RTC_SetAlarm+0x212>
+  }
+  else
+  {
+    /* Disable the Alarm B interrupt */
+    __HAL_RTC_ALARMB_DISABLE(hrtc);
+ 800a3dc:	68fb      	ldr	r3, [r7, #12]
+ 800a3de:	681b      	ldr	r3, [r3, #0]
+ 800a3e0:	689a      	ldr	r2, [r3, #8]
+ 800a3e2:	68fb      	ldr	r3, [r7, #12]
+ 800a3e4:	681b      	ldr	r3, [r3, #0]
+ 800a3e6:	f422 7200 	bic.w	r2, r2, #512	; 0x200
+ 800a3ea:	609a      	str	r2, [r3, #8]
+
+    /* In case of interrupt mode is used, the interrupt source must disabled */
+    __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB);
+ 800a3ec:	68fb      	ldr	r3, [r7, #12]
+ 800a3ee:	681b      	ldr	r3, [r3, #0]
+ 800a3f0:	689a      	ldr	r2, [r3, #8]
+ 800a3f2:	68fb      	ldr	r3, [r7, #12]
+ 800a3f4:	681b      	ldr	r3, [r3, #0]
+ 800a3f6:	f422 5200 	bic.w	r2, r2, #8192	; 0x2000
+ 800a3fa:	609a      	str	r2, [r3, #8]
+
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 800a3fc:	f7fa fba4 	bl	8004b48 <HAL_GetTick>
+ 800a400:	61b8      	str	r0, [r7, #24]
+
+    /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
+    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
+ 800a402:	e013      	b.n	800a42c <HAL_RTC_SetAlarm+0x1e4>
+    {
+      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
+ 800a404:	f7fa fba0 	bl	8004b48 <HAL_GetTick>
+ 800a408:	4602      	mov	r2, r0
+ 800a40a:	69bb      	ldr	r3, [r7, #24]
+ 800a40c:	1ad3      	subs	r3, r2, r3
+ 800a40e:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
+ 800a412:	d90b      	bls.n	800a42c <HAL_RTC_SetAlarm+0x1e4>
+      {
+        /* Enable the write protection for RTC registers */
+        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 800a414:	68fb      	ldr	r3, [r7, #12]
+ 800a416:	681b      	ldr	r3, [r3, #0]
+ 800a418:	22ff      	movs	r2, #255	; 0xff
+ 800a41a:	625a      	str	r2, [r3, #36]	; 0x24
+
+        hrtc->State = HAL_RTC_STATE_TIMEOUT;
+ 800a41c:	68fb      	ldr	r3, [r7, #12]
+ 800a41e:	2203      	movs	r2, #3
+ 800a420:	775a      	strb	r2, [r3, #29]
+
+        /* Process Unlocked */
+        __HAL_UNLOCK(hrtc);
+ 800a422:	68fb      	ldr	r3, [r7, #12]
+ 800a424:	2200      	movs	r2, #0
+ 800a426:	771a      	strb	r2, [r3, #28]
+
+        return HAL_TIMEOUT;
+ 800a428:	2303      	movs	r3, #3
+ 800a42a:	e021      	b.n	800a470 <HAL_RTC_SetAlarm+0x228>
+    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
+ 800a42c:	68fb      	ldr	r3, [r7, #12]
+ 800a42e:	681b      	ldr	r3, [r3, #0]
+ 800a430:	68db      	ldr	r3, [r3, #12]
+ 800a432:	f003 0302 	and.w	r3, r3, #2
+ 800a436:	2b00      	cmp	r3, #0
+ 800a438:	d0e4      	beq.n	800a404 <HAL_RTC_SetAlarm+0x1bc>
+      }
+    }
+
+    hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
+ 800a43a:	68fb      	ldr	r3, [r7, #12]
+ 800a43c:	681b      	ldr	r3, [r3, #0]
+ 800a43e:	69fa      	ldr	r2, [r7, #28]
+ 800a440:	621a      	str	r2, [r3, #32]
+    /* Configure the Alarm B Sub Second register */
+    hrtc->Instance->ALRMBSSR = subsecondtmpreg;
+ 800a442:	68fb      	ldr	r3, [r7, #12]
+ 800a444:	681b      	ldr	r3, [r3, #0]
+ 800a446:	697a      	ldr	r2, [r7, #20]
+ 800a448:	649a      	str	r2, [r3, #72]	; 0x48
+    /* Configure the Alarm state: Enable Alarm */
+    __HAL_RTC_ALARMB_ENABLE(hrtc);
+ 800a44a:	68fb      	ldr	r3, [r7, #12]
+ 800a44c:	681b      	ldr	r3, [r3, #0]
+ 800a44e:	689a      	ldr	r2, [r3, #8]
+ 800a450:	68fb      	ldr	r3, [r7, #12]
+ 800a452:	681b      	ldr	r3, [r3, #0]
+ 800a454:	f442 7200 	orr.w	r2, r2, #512	; 0x200
+ 800a458:	609a      	str	r2, [r3, #8]
+  }
+
+  /* Enable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 800a45a:	68fb      	ldr	r3, [r7, #12]
+ 800a45c:	681b      	ldr	r3, [r3, #0]
+ 800a45e:	22ff      	movs	r2, #255	; 0xff
+ 800a460:	625a      	str	r2, [r3, #36]	; 0x24
+
+  /* Change RTC state */
+  hrtc->State = HAL_RTC_STATE_READY;
+ 800a462:	68fb      	ldr	r3, [r7, #12]
+ 800a464:	2201      	movs	r2, #1
+ 800a466:	775a      	strb	r2, [r3, #29]
+
+  /* Process Unlocked */
+  __HAL_UNLOCK(hrtc);
+ 800a468:	68fb      	ldr	r3, [r7, #12]
+ 800a46a:	2200      	movs	r2, #0
+ 800a46c:	771a      	strb	r2, [r3, #28]
+
+  return HAL_OK;
+ 800a46e:	2300      	movs	r3, #0
+}
+ 800a470:	4618      	mov	r0, r3
+ 800a472:	3724      	adds	r7, #36	; 0x24
+ 800a474:	46bd      	mov	sp, r7
+ 800a476:	bd90      	pop	{r4, r7, pc}
+
+0800a478 <HAL_RTC_WaitForSynchro>:
+  * @param  hrtc pointer to a RTC_HandleTypeDef structure that contains
+  *                the configuration information for RTC.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc)
+{
+ 800a478:	b580      	push	{r7, lr}
+ 800a47a:	b084      	sub	sp, #16
+ 800a47c:	af00      	add	r7, sp, #0
+ 800a47e:	6078      	str	r0, [r7, #4]
+  uint32_t tickstart = 0;
+ 800a480:	2300      	movs	r3, #0
+ 800a482:	60fb      	str	r3, [r7, #12]
+
+  /* Clear RSF flag */
+  hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK;
+ 800a484:	687b      	ldr	r3, [r7, #4]
+ 800a486:	681b      	ldr	r3, [r3, #0]
+ 800a488:	68da      	ldr	r2, [r3, #12]
+ 800a48a:	687b      	ldr	r3, [r7, #4]
+ 800a48c:	681b      	ldr	r3, [r3, #0]
+ 800a48e:	f022 02a0 	bic.w	r2, r2, #160	; 0xa0
+ 800a492:	60da      	str	r2, [r3, #12]
+
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 800a494:	f7fa fb58 	bl	8004b48 <HAL_GetTick>
+ 800a498:	60f8      	str	r0, [r7, #12]
+
+  /* Wait the registers to be synchronised */
+  while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET)
+ 800a49a:	e009      	b.n	800a4b0 <HAL_RTC_WaitForSynchro+0x38>
+  {
+    if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
+ 800a49c:	f7fa fb54 	bl	8004b48 <HAL_GetTick>
+ 800a4a0:	4602      	mov	r2, r0
+ 800a4a2:	68fb      	ldr	r3, [r7, #12]
+ 800a4a4:	1ad3      	subs	r3, r2, r3
+ 800a4a6:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
+ 800a4aa:	d901      	bls.n	800a4b0 <HAL_RTC_WaitForSynchro+0x38>
+    {
+      return HAL_TIMEOUT;
+ 800a4ac:	2303      	movs	r3, #3
+ 800a4ae:	e007      	b.n	800a4c0 <HAL_RTC_WaitForSynchro+0x48>
+  while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET)
+ 800a4b0:	687b      	ldr	r3, [r7, #4]
+ 800a4b2:	681b      	ldr	r3, [r3, #0]
+ 800a4b4:	68db      	ldr	r3, [r3, #12]
+ 800a4b6:	f003 0320 	and.w	r3, r3, #32
+ 800a4ba:	2b00      	cmp	r3, #0
+ 800a4bc:	d0ee      	beq.n	800a49c <HAL_RTC_WaitForSynchro+0x24>
+    }
+  }
+
+  return HAL_OK;
+ 800a4be:	2300      	movs	r3, #0
+}
+ 800a4c0:	4618      	mov	r0, r3
+ 800a4c2:	3710      	adds	r7, #16
+ 800a4c4:	46bd      	mov	sp, r7
+ 800a4c6:	bd80      	pop	{r7, pc}
+
+0800a4c8 <RTC_EnterInitMode>:
+  * @param  hrtc pointer to a RTC_HandleTypeDef structure that contains
+  *                the configuration information for RTC.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc)
+{
+ 800a4c8:	b580      	push	{r7, lr}
+ 800a4ca:	b084      	sub	sp, #16
+ 800a4cc:	af00      	add	r7, sp, #0
+ 800a4ce:	6078      	str	r0, [r7, #4]
+  uint32_t tickstart = 0;
+ 800a4d0:	2300      	movs	r3, #0
+ 800a4d2:	60fb      	str	r3, [r7, #12]
+
+  /* Check if the Initialization mode is set */
+  if((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
+ 800a4d4:	687b      	ldr	r3, [r7, #4]
+ 800a4d6:	681b      	ldr	r3, [r3, #0]
+ 800a4d8:	68db      	ldr	r3, [r3, #12]
+ 800a4da:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800a4de:	2b00      	cmp	r3, #0
+ 800a4e0:	d119      	bne.n	800a516 <RTC_EnterInitMode+0x4e>
+  {
+    /* Set the Initialization mode */
+    hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK;
+ 800a4e2:	687b      	ldr	r3, [r7, #4]
+ 800a4e4:	681b      	ldr	r3, [r3, #0]
+ 800a4e6:	f04f 32ff 	mov.w	r2, #4294967295
+ 800a4ea:	60da      	str	r2, [r3, #12]
+
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 800a4ec:	f7fa fb2c 	bl	8004b48 <HAL_GetTick>
+ 800a4f0:	60f8      	str	r0, [r7, #12]
+
+    /* Wait till RTC is in INIT state and if Time out is reached exit */
+    while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
+ 800a4f2:	e009      	b.n	800a508 <RTC_EnterInitMode+0x40>
+    {
+      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
+ 800a4f4:	f7fa fb28 	bl	8004b48 <HAL_GetTick>
+ 800a4f8:	4602      	mov	r2, r0
+ 800a4fa:	68fb      	ldr	r3, [r7, #12]
+ 800a4fc:	1ad3      	subs	r3, r2, r3
+ 800a4fe:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
+ 800a502:	d901      	bls.n	800a508 <RTC_EnterInitMode+0x40>
+      {
+        return HAL_TIMEOUT;
+ 800a504:	2303      	movs	r3, #3
+ 800a506:	e007      	b.n	800a518 <RTC_EnterInitMode+0x50>
+    while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
+ 800a508:	687b      	ldr	r3, [r7, #4]
+ 800a50a:	681b      	ldr	r3, [r3, #0]
+ 800a50c:	68db      	ldr	r3, [r3, #12]
+ 800a50e:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800a512:	2b00      	cmp	r3, #0
+ 800a514:	d0ee      	beq.n	800a4f4 <RTC_EnterInitMode+0x2c>
+      }
+    }
+  }
+
+  return HAL_OK;
+ 800a516:	2300      	movs	r3, #0
+}
+ 800a518:	4618      	mov	r0, r3
+ 800a51a:	3710      	adds	r7, #16
+ 800a51c:	46bd      	mov	sp, r7
+ 800a51e:	bd80      	pop	{r7, pc}
+
+0800a520 <RTC_ByteToBcd2>:
+  * @brief  Converts a 2 digit decimal to BCD format.
+  * @param  Value Byte to be converted
+  * @retval Converted byte
+  */
+uint8_t RTC_ByteToBcd2(uint8_t Value)
+{
+ 800a520:	b480      	push	{r7}
+ 800a522:	b085      	sub	sp, #20
+ 800a524:	af00      	add	r7, sp, #0
+ 800a526:	4603      	mov	r3, r0
+ 800a528:	71fb      	strb	r3, [r7, #7]
+  uint32_t bcdhigh = 0;
+ 800a52a:	2300      	movs	r3, #0
+ 800a52c:	60fb      	str	r3, [r7, #12]
+
+  while(Value >= 10)
+ 800a52e:	e005      	b.n	800a53c <RTC_ByteToBcd2+0x1c>
+  {
+    bcdhigh++;
+ 800a530:	68fb      	ldr	r3, [r7, #12]
+ 800a532:	3301      	adds	r3, #1
+ 800a534:	60fb      	str	r3, [r7, #12]
+    Value -= 10;
+ 800a536:	79fb      	ldrb	r3, [r7, #7]
+ 800a538:	3b0a      	subs	r3, #10
+ 800a53a:	71fb      	strb	r3, [r7, #7]
+  while(Value >= 10)
+ 800a53c:	79fb      	ldrb	r3, [r7, #7]
+ 800a53e:	2b09      	cmp	r3, #9
+ 800a540:	d8f6      	bhi.n	800a530 <RTC_ByteToBcd2+0x10>
+  }
+
+  return  ((uint8_t)(bcdhigh << 4) | Value);
+ 800a542:	68fb      	ldr	r3, [r7, #12]
+ 800a544:	b2db      	uxtb	r3, r3
+ 800a546:	011b      	lsls	r3, r3, #4
+ 800a548:	b2da      	uxtb	r2, r3
+ 800a54a:	79fb      	ldrb	r3, [r7, #7]
+ 800a54c:	4313      	orrs	r3, r2
+ 800a54e:	b2db      	uxtb	r3, r3
+}
+ 800a550:	4618      	mov	r0, r3
+ 800a552:	3714      	adds	r7, #20
+ 800a554:	46bd      	mov	sp, r7
+ 800a556:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800a55a:	4770      	bx	lr
+
+0800a55c <HAL_RTCEx_SetTimeStamp>:
+  *             @arg RTC_TIMESTAMPPIN_PI8: PI8 is selected as RTC TimeStamp Pin.
+  *             @arg RTC_TIMESTAMPPIN_PC1: PC1 is selected as RTC TimeStamp Pin.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
+{
+ 800a55c:	b480      	push	{r7}
+ 800a55e:	b087      	sub	sp, #28
+ 800a560:	af00      	add	r7, sp, #0
+ 800a562:	60f8      	str	r0, [r7, #12]
+ 800a564:	60b9      	str	r1, [r7, #8]
+ 800a566:	607a      	str	r2, [r7, #4]
+  uint32_t tmpreg = 0;
+ 800a568:	2300      	movs	r3, #0
+ 800a56a:	617b      	str	r3, [r7, #20]
+  /* Check the parameters */
+  assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
+  assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
+
+  /* Process Locked */
+  __HAL_LOCK(hrtc);
+ 800a56c:	68fb      	ldr	r3, [r7, #12]
+ 800a56e:	7f1b      	ldrb	r3, [r3, #28]
+ 800a570:	2b01      	cmp	r3, #1
+ 800a572:	d101      	bne.n	800a578 <HAL_RTCEx_SetTimeStamp+0x1c>
+ 800a574:	2302      	movs	r3, #2
+ 800a576:	e03e      	b.n	800a5f6 <HAL_RTCEx_SetTimeStamp+0x9a>
+ 800a578:	68fb      	ldr	r3, [r7, #12]
+ 800a57a:	2201      	movs	r2, #1
+ 800a57c:	771a      	strb	r2, [r3, #28]
+
+  hrtc->State = HAL_RTC_STATE_BUSY;
+ 800a57e:	68fb      	ldr	r3, [r7, #12]
+ 800a580:	2202      	movs	r2, #2
+ 800a582:	775a      	strb	r2, [r3, #29]
+
+  /* Get the RTC_CR register and clear the bits to be configured */
+  tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
+ 800a584:	68fb      	ldr	r3, [r7, #12]
+ 800a586:	681b      	ldr	r3, [r3, #0]
+ 800a588:	689a      	ldr	r2, [r3, #8]
+ 800a58a:	4b1e      	ldr	r3, [pc, #120]	; (800a604 <HAL_RTCEx_SetTimeStamp+0xa8>)
+ 800a58c:	4013      	ands	r3, r2
+ 800a58e:	617b      	str	r3, [r7, #20]
+
+  tmpreg|= TimeStampEdge;
+ 800a590:	697a      	ldr	r2, [r7, #20]
+ 800a592:	68bb      	ldr	r3, [r7, #8]
+ 800a594:	4313      	orrs	r3, r2
+ 800a596:	617b      	str	r3, [r7, #20]
+
+  /* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
+ 800a598:	68fb      	ldr	r3, [r7, #12]
+ 800a59a:	681b      	ldr	r3, [r3, #0]
+ 800a59c:	22ca      	movs	r2, #202	; 0xca
+ 800a59e:	625a      	str	r2, [r3, #36]	; 0x24
+ 800a5a0:	68fb      	ldr	r3, [r7, #12]
+ 800a5a2:	681b      	ldr	r3, [r3, #0]
+ 800a5a4:	2253      	movs	r2, #83	; 0x53
+ 800a5a6:	625a      	str	r2, [r3, #36]	; 0x24
+
+  hrtc->Instance->OR &= (uint32_t)~RTC_OR_TSINSEL;
+ 800a5a8:	68fb      	ldr	r3, [r7, #12]
+ 800a5aa:	681b      	ldr	r3, [r3, #0]
+ 800a5ac:	6cda      	ldr	r2, [r3, #76]	; 0x4c
+ 800a5ae:	68fb      	ldr	r3, [r7, #12]
+ 800a5b0:	681b      	ldr	r3, [r3, #0]
+ 800a5b2:	f022 0206 	bic.w	r2, r2, #6
+ 800a5b6:	64da      	str	r2, [r3, #76]	; 0x4c
+  hrtc->Instance->OR |= (uint32_t)(RTC_TimeStampPin);
+ 800a5b8:	68fb      	ldr	r3, [r7, #12]
+ 800a5ba:	681b      	ldr	r3, [r3, #0]
+ 800a5bc:	6cd9      	ldr	r1, [r3, #76]	; 0x4c
+ 800a5be:	68fb      	ldr	r3, [r7, #12]
+ 800a5c0:	681b      	ldr	r3, [r3, #0]
+ 800a5c2:	687a      	ldr	r2, [r7, #4]
+ 800a5c4:	430a      	orrs	r2, r1
+ 800a5c6:	64da      	str	r2, [r3, #76]	; 0x4c
+
+  /* Configure the Time Stamp TSEDGE and Enable bits */
+  hrtc->Instance->CR = (uint32_t)tmpreg;
+ 800a5c8:	68fb      	ldr	r3, [r7, #12]
+ 800a5ca:	681b      	ldr	r3, [r3, #0]
+ 800a5cc:	697a      	ldr	r2, [r7, #20]
+ 800a5ce:	609a      	str	r2, [r3, #8]
+
+  __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
+ 800a5d0:	68fb      	ldr	r3, [r7, #12]
+ 800a5d2:	681b      	ldr	r3, [r3, #0]
+ 800a5d4:	689a      	ldr	r2, [r3, #8]
+ 800a5d6:	68fb      	ldr	r3, [r7, #12]
+ 800a5d8:	681b      	ldr	r3, [r3, #0]
+ 800a5da:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
+ 800a5de:	609a      	str	r2, [r3, #8]
+
+  /* Enable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
+ 800a5e0:	68fb      	ldr	r3, [r7, #12]
+ 800a5e2:	681b      	ldr	r3, [r3, #0]
+ 800a5e4:	22ff      	movs	r2, #255	; 0xff
+ 800a5e6:	625a      	str	r2, [r3, #36]	; 0x24
+
+  /* Change RTC state */
+  hrtc->State = HAL_RTC_STATE_READY;
+ 800a5e8:	68fb      	ldr	r3, [r7, #12]
+ 800a5ea:	2201      	movs	r2, #1
+ 800a5ec:	775a      	strb	r2, [r3, #29]
+
+  /* Process Unlocked */
+  __HAL_UNLOCK(hrtc);
+ 800a5ee:	68fb      	ldr	r3, [r7, #12]
+ 800a5f0:	2200      	movs	r2, #0
+ 800a5f2:	771a      	strb	r2, [r3, #28]
+
+  return HAL_OK;
+ 800a5f4:	2300      	movs	r3, #0
+}
+ 800a5f6:	4618      	mov	r0, r3
+ 800a5f8:	371c      	adds	r7, #28
+ 800a5fa:	46bd      	mov	sp, r7
+ 800a5fc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800a600:	4770      	bx	lr
+ 800a602:	bf00      	nop
+ 800a604:	fffff7f7 	.word	0xfffff7f7
+
+0800a608 <HAL_SDRAM_Init>:
+  *                the configuration information for SDRAM module.
+  * @param  Timing Pointer to SDRAM control timing structure 
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
+{   
+ 800a608:	b580      	push	{r7, lr}
+ 800a60a:	b082      	sub	sp, #8
+ 800a60c:	af00      	add	r7, sp, #0
+ 800a60e:	6078      	str	r0, [r7, #4]
+ 800a610:	6039      	str	r1, [r7, #0]
+  /* Check the SDRAM handle parameter */
+  if(hsdram == NULL)
+ 800a612:	687b      	ldr	r3, [r7, #4]
+ 800a614:	2b00      	cmp	r3, #0
+ 800a616:	d101      	bne.n	800a61c <HAL_SDRAM_Init+0x14>
+  {
+    return HAL_ERROR;
+ 800a618:	2301      	movs	r3, #1
+ 800a61a:	e025      	b.n	800a668 <HAL_SDRAM_Init+0x60>
+  }
+  
+  if(hsdram->State == HAL_SDRAM_STATE_RESET)
+ 800a61c:	687b      	ldr	r3, [r7, #4]
+ 800a61e:	f893 302c 	ldrb.w	r3, [r3, #44]	; 0x2c
+ 800a622:	b2db      	uxtb	r3, r3
+ 800a624:	2b00      	cmp	r3, #0
+ 800a626:	d106      	bne.n	800a636 <HAL_SDRAM_Init+0x2e>
+  {  
+    /* Allocate lock resource and initialize it */
+    hsdram->Lock = HAL_UNLOCKED;
+ 800a628:	687b      	ldr	r3, [r7, #4]
+ 800a62a:	2200      	movs	r2, #0
+ 800a62c:	f883 202d 	strb.w	r2, [r3, #45]	; 0x2d
+
+    /* Init the low level hardware */
+    hsdram->MspInitCallback(hsdram);
+#else
+    /* Initialize the low level hardware (MSP) */
+    HAL_SDRAM_MspInit(hsdram);
+ 800a630:	6878      	ldr	r0, [r7, #4]
+ 800a632:	f7fa f8e9 	bl	8004808 <HAL_SDRAM_MspInit>
+#endif
+  }
+  
+  /* Initialize the SDRAM controller state */
+  hsdram->State = HAL_SDRAM_STATE_BUSY;
+ 800a636:	687b      	ldr	r3, [r7, #4]
+ 800a638:	2202      	movs	r2, #2
+ 800a63a:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
+  
+  /* Initialize SDRAM control Interface */
+  FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
+ 800a63e:	687b      	ldr	r3, [r7, #4]
+ 800a640:	681a      	ldr	r2, [r3, #0]
+ 800a642:	687b      	ldr	r3, [r7, #4]
+ 800a644:	3304      	adds	r3, #4
+ 800a646:	4619      	mov	r1, r3
+ 800a648:	4610      	mov	r0, r2
+ 800a64a:	f001 fe61 	bl	800c310 <FMC_SDRAM_Init>
+  
+  /* Initialize SDRAM timing Interface */
+  FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank); 
+ 800a64e:	687b      	ldr	r3, [r7, #4]
+ 800a650:	6818      	ldr	r0, [r3, #0]
+ 800a652:	687b      	ldr	r3, [r7, #4]
+ 800a654:	685b      	ldr	r3, [r3, #4]
+ 800a656:	461a      	mov	r2, r3
+ 800a658:	6839      	ldr	r1, [r7, #0]
+ 800a65a:	f001 fecb 	bl	800c3f4 <FMC_SDRAM_Timing_Init>
+  
+  /* Update the SDRAM controller state */
+  hsdram->State = HAL_SDRAM_STATE_READY;
+ 800a65e:	687b      	ldr	r3, [r7, #4]
+ 800a660:	2201      	movs	r2, #1
+ 800a662:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
+  
+  return HAL_OK;
+ 800a666:	2300      	movs	r3, #0
+}
+ 800a668:	4618      	mov	r0, r3
+ 800a66a:	3708      	adds	r7, #8
+ 800a66c:	46bd      	mov	sp, r7
+ 800a66e:	bd80      	pop	{r7, pc}
+
+0800a670 <HAL_SDRAM_SendCommand>:
+  * @param  Command SDRAM command structure
+  * @param  Timeout Timeout duration
+  * @retval HAL status
+  */  
+HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
+{
+ 800a670:	b580      	push	{r7, lr}
+ 800a672:	b084      	sub	sp, #16
+ 800a674:	af00      	add	r7, sp, #0
+ 800a676:	60f8      	str	r0, [r7, #12]
+ 800a678:	60b9      	str	r1, [r7, #8]
+ 800a67a:	607a      	str	r2, [r7, #4]
+  /* Check the SDRAM controller state */
+  if(hsdram->State == HAL_SDRAM_STATE_BUSY)
+ 800a67c:	68fb      	ldr	r3, [r7, #12]
+ 800a67e:	f893 302c 	ldrb.w	r3, [r3, #44]	; 0x2c
+ 800a682:	b2db      	uxtb	r3, r3
+ 800a684:	2b02      	cmp	r3, #2
+ 800a686:	d101      	bne.n	800a68c <HAL_SDRAM_SendCommand+0x1c>
+  {
+    return HAL_BUSY;
+ 800a688:	2302      	movs	r3, #2
+ 800a68a:	e018      	b.n	800a6be <HAL_SDRAM_SendCommand+0x4e>
+  }
+  
+  /* Update the SDRAM state */
+  hsdram->State = HAL_SDRAM_STATE_BUSY;
+ 800a68c:	68fb      	ldr	r3, [r7, #12]
+ 800a68e:	2202      	movs	r2, #2
+ 800a690:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
+  
+  /* Send SDRAM command */
+  FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout);
+ 800a694:	68fb      	ldr	r3, [r7, #12]
+ 800a696:	681b      	ldr	r3, [r3, #0]
+ 800a698:	687a      	ldr	r2, [r7, #4]
+ 800a69a:	68b9      	ldr	r1, [r7, #8]
+ 800a69c:	4618      	mov	r0, r3
+ 800a69e:	f001 ff29 	bl	800c4f4 <FMC_SDRAM_SendCommand>
+  
+  /* Update the SDRAM controller state state */
+  if(Command->CommandMode == FMC_SDRAM_CMD_PALL)
+ 800a6a2:	68bb      	ldr	r3, [r7, #8]
+ 800a6a4:	681b      	ldr	r3, [r3, #0]
+ 800a6a6:	2b02      	cmp	r3, #2
+ 800a6a8:	d104      	bne.n	800a6b4 <HAL_SDRAM_SendCommand+0x44>
+  {
+    hsdram->State = HAL_SDRAM_STATE_PRECHARGED;
+ 800a6aa:	68fb      	ldr	r3, [r7, #12]
+ 800a6ac:	2205      	movs	r2, #5
+ 800a6ae:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
+ 800a6b2:	e003      	b.n	800a6bc <HAL_SDRAM_SendCommand+0x4c>
+  }
+  else
+  {
+    hsdram->State = HAL_SDRAM_STATE_READY;
+ 800a6b4:	68fb      	ldr	r3, [r7, #12]
+ 800a6b6:	2201      	movs	r2, #1
+ 800a6b8:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
+  }
+  
+  return HAL_OK;  
+ 800a6bc:	2300      	movs	r3, #0
+}
+ 800a6be:	4618      	mov	r0, r3
+ 800a6c0:	3710      	adds	r7, #16
+ 800a6c2:	46bd      	mov	sp, r7
+ 800a6c4:	bd80      	pop	{r7, pc}
+
+0800a6c6 <HAL_SDRAM_ProgramRefreshRate>:
+  *                the configuration information for SDRAM module.  
+  * @param  RefreshRate The SDRAM refresh rate value       
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
+{
+ 800a6c6:	b580      	push	{r7, lr}
+ 800a6c8:	b082      	sub	sp, #8
+ 800a6ca:	af00      	add	r7, sp, #0
+ 800a6cc:	6078      	str	r0, [r7, #4]
+ 800a6ce:	6039      	str	r1, [r7, #0]
+  /* Check the SDRAM controller state */
+  if(hsdram->State == HAL_SDRAM_STATE_BUSY)
+ 800a6d0:	687b      	ldr	r3, [r7, #4]
+ 800a6d2:	f893 302c 	ldrb.w	r3, [r3, #44]	; 0x2c
+ 800a6d6:	b2db      	uxtb	r3, r3
+ 800a6d8:	2b02      	cmp	r3, #2
+ 800a6da:	d101      	bne.n	800a6e0 <HAL_SDRAM_ProgramRefreshRate+0x1a>
+  {
+    return HAL_BUSY;
+ 800a6dc:	2302      	movs	r3, #2
+ 800a6de:	e00e      	b.n	800a6fe <HAL_SDRAM_ProgramRefreshRate+0x38>
+  } 
+  
+  /* Update the SDRAM state */
+  hsdram->State = HAL_SDRAM_STATE_BUSY;
+ 800a6e0:	687b      	ldr	r3, [r7, #4]
+ 800a6e2:	2202      	movs	r2, #2
+ 800a6e4:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
+  
+  /* Program the refresh rate */
+  FMC_SDRAM_ProgramRefreshRate(hsdram->Instance ,RefreshRate);
+ 800a6e8:	687b      	ldr	r3, [r7, #4]
+ 800a6ea:	681b      	ldr	r3, [r3, #0]
+ 800a6ec:	6839      	ldr	r1, [r7, #0]
+ 800a6ee:	4618      	mov	r0, r3
+ 800a6f0:	f001 ff21 	bl	800c536 <FMC_SDRAM_ProgramRefreshRate>
+  
+  /* Update the SDRAM state */
+  hsdram->State = HAL_SDRAM_STATE_READY;
+ 800a6f4:	687b      	ldr	r3, [r7, #4]
+ 800a6f6:	2201      	movs	r2, #1
+ 800a6f8:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
+  
+  return HAL_OK;   
+ 800a6fc:	2300      	movs	r3, #0
+}
+ 800a6fe:	4618      	mov	r0, r3
+ 800a700:	3708      	adds	r7, #8
+ 800a702:	46bd      	mov	sp, r7
+ 800a704:	bd80      	pop	{r7, pc}
+
+0800a706 <HAL_SPI_Init>:
+  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
+  *               the configuration information for SPI module.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
+{
+ 800a706:	b580      	push	{r7, lr}
+ 800a708:	b084      	sub	sp, #16
+ 800a70a:	af00      	add	r7, sp, #0
+ 800a70c:	6078      	str	r0, [r7, #4]
+  uint32_t frxth;
+
+  /* Check the SPI handle allocation */
+  if (hspi == NULL)
+ 800a70e:	687b      	ldr	r3, [r7, #4]
+ 800a710:	2b00      	cmp	r3, #0
+ 800a712:	d101      	bne.n	800a718 <HAL_SPI_Init+0x12>
+  {
+    return HAL_ERROR;
+ 800a714:	2301      	movs	r3, #1
+ 800a716:	e084      	b.n	800a822 <HAL_SPI_Init+0x11c>
+  {
+    assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
+    assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength));
+  }
+#else
+  hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+ 800a718:	687b      	ldr	r3, [r7, #4]
+ 800a71a:	2200      	movs	r2, #0
+ 800a71c:	629a      	str	r2, [r3, #40]	; 0x28
+#endif /* USE_SPI_CRC */
+
+  if (hspi->State == HAL_SPI_STATE_RESET)
+ 800a71e:	687b      	ldr	r3, [r7, #4]
+ 800a720:	f893 305d 	ldrb.w	r3, [r3, #93]	; 0x5d
+ 800a724:	b2db      	uxtb	r3, r3
+ 800a726:	2b00      	cmp	r3, #0
+ 800a728:	d106      	bne.n	800a738 <HAL_SPI_Init+0x32>
+  {
+    /* Allocate lock resource and initialize it */
+    hspi->Lock = HAL_UNLOCKED;
+ 800a72a:	687b      	ldr	r3, [r7, #4]
+ 800a72c:	2200      	movs	r2, #0
+ 800a72e:	f883 205c 	strb.w	r2, [r3, #92]	; 0x5c
+
+    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
+    hspi->MspInitCallback(hspi);
+#else
+    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
+    HAL_SPI_MspInit(hspi);
+ 800a732:	6878      	ldr	r0, [r7, #4]
+ 800a734:	f7f9 fdd4 	bl	80042e0 <HAL_SPI_MspInit>
+#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
+  }
+
+  hspi->State = HAL_SPI_STATE_BUSY;
+ 800a738:	687b      	ldr	r3, [r7, #4]
+ 800a73a:	2202      	movs	r2, #2
+ 800a73c:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
+
+  /* Disable the selected SPI peripheral */
+  __HAL_SPI_DISABLE(hspi);
+ 800a740:	687b      	ldr	r3, [r7, #4]
+ 800a742:	681b      	ldr	r3, [r3, #0]
+ 800a744:	681a      	ldr	r2, [r3, #0]
+ 800a746:	687b      	ldr	r3, [r7, #4]
+ 800a748:	681b      	ldr	r3, [r3, #0]
+ 800a74a:	f022 0240 	bic.w	r2, r2, #64	; 0x40
+ 800a74e:	601a      	str	r2, [r3, #0]
+
+  /* Align by default the rs fifo threshold on the data size */
+  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
+ 800a750:	687b      	ldr	r3, [r7, #4]
+ 800a752:	68db      	ldr	r3, [r3, #12]
+ 800a754:	f5b3 6fe0 	cmp.w	r3, #1792	; 0x700
+ 800a758:	d902      	bls.n	800a760 <HAL_SPI_Init+0x5a>
+  {
+    frxth = SPI_RXFIFO_THRESHOLD_HF;
+ 800a75a:	2300      	movs	r3, #0
+ 800a75c:	60fb      	str	r3, [r7, #12]
+ 800a75e:	e002      	b.n	800a766 <HAL_SPI_Init+0x60>
+  }
+  else
+  {
+    frxth = SPI_RXFIFO_THRESHOLD_QF;
+ 800a760:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 800a764:	60fb      	str	r3, [r7, #12]
+  }
+
+  /* CRC calculation is valid only for 16Bit and 8 Bit */
+  if ((hspi->Init.DataSize != SPI_DATASIZE_16BIT) && (hspi->Init.DataSize != SPI_DATASIZE_8BIT))
+ 800a766:	687b      	ldr	r3, [r7, #4]
+ 800a768:	68db      	ldr	r3, [r3, #12]
+ 800a76a:	f5b3 6f70 	cmp.w	r3, #3840	; 0xf00
+ 800a76e:	d007      	beq.n	800a780 <HAL_SPI_Init+0x7a>
+ 800a770:	687b      	ldr	r3, [r7, #4]
+ 800a772:	68db      	ldr	r3, [r3, #12]
+ 800a774:	f5b3 6fe0 	cmp.w	r3, #1792	; 0x700
+ 800a778:	d002      	beq.n	800a780 <HAL_SPI_Init+0x7a>
+  {
+    /* CRC must be disabled */
+    hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+ 800a77a:	687b      	ldr	r3, [r7, #4]
+ 800a77c:	2200      	movs	r2, #0
+ 800a77e:	629a      	str	r2, [r3, #40]	; 0x28
+  }
+
+  /* Align the CRC Length on the data size */
+  if (hspi->Init.CRCLength == SPI_CRC_LENGTH_DATASIZE)
+ 800a780:	687b      	ldr	r3, [r7, #4]
+ 800a782:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800a784:	2b00      	cmp	r3, #0
+ 800a786:	d10b      	bne.n	800a7a0 <HAL_SPI_Init+0x9a>
+  {
+    /* CRC Length aligned on the data size : value set by default */
+    if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
+ 800a788:	687b      	ldr	r3, [r7, #4]
+ 800a78a:	68db      	ldr	r3, [r3, #12]
+ 800a78c:	f5b3 6fe0 	cmp.w	r3, #1792	; 0x700
+ 800a790:	d903      	bls.n	800a79a <HAL_SPI_Init+0x94>
+    {
+      hspi->Init.CRCLength = SPI_CRC_LENGTH_16BIT;
+ 800a792:	687b      	ldr	r3, [r7, #4]
+ 800a794:	2202      	movs	r2, #2
+ 800a796:	631a      	str	r2, [r3, #48]	; 0x30
+ 800a798:	e002      	b.n	800a7a0 <HAL_SPI_Init+0x9a>
+    }
+    else
+    {
+      hspi->Init.CRCLength = SPI_CRC_LENGTH_8BIT;
+ 800a79a:	687b      	ldr	r3, [r7, #4]
+ 800a79c:	2201      	movs	r2, #1
+ 800a79e:	631a      	str	r2, [r3, #48]	; 0x30
+  }
+
+  /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
+  /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management,
+  Communication speed, First bit and CRC calculation state */
+  WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction |
+ 800a7a0:	687b      	ldr	r3, [r7, #4]
+ 800a7a2:	685a      	ldr	r2, [r3, #4]
+ 800a7a4:	687b      	ldr	r3, [r7, #4]
+ 800a7a6:	689b      	ldr	r3, [r3, #8]
+ 800a7a8:	431a      	orrs	r2, r3
+ 800a7aa:	687b      	ldr	r3, [r7, #4]
+ 800a7ac:	691b      	ldr	r3, [r3, #16]
+ 800a7ae:	431a      	orrs	r2, r3
+ 800a7b0:	687b      	ldr	r3, [r7, #4]
+ 800a7b2:	695b      	ldr	r3, [r3, #20]
+ 800a7b4:	431a      	orrs	r2, r3
+ 800a7b6:	687b      	ldr	r3, [r7, #4]
+ 800a7b8:	699b      	ldr	r3, [r3, #24]
+ 800a7ba:	f403 7300 	and.w	r3, r3, #512	; 0x200
+ 800a7be:	431a      	orrs	r2, r3
+ 800a7c0:	687b      	ldr	r3, [r7, #4]
+ 800a7c2:	69db      	ldr	r3, [r3, #28]
+ 800a7c4:	431a      	orrs	r2, r3
+ 800a7c6:	687b      	ldr	r3, [r7, #4]
+ 800a7c8:	6a1b      	ldr	r3, [r3, #32]
+ 800a7ca:	ea42 0103 	orr.w	r1, r2, r3
+ 800a7ce:	687b      	ldr	r3, [r7, #4]
+ 800a7d0:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 800a7d2:	687b      	ldr	r3, [r7, #4]
+ 800a7d4:	681b      	ldr	r3, [r3, #0]
+ 800a7d6:	430a      	orrs	r2, r1
+ 800a7d8:	601a      	str	r2, [r3, #0]
+    hspi->Instance->CR1 |= SPI_CR1_CRCL;
+  }
+#endif /* USE_SPI_CRC */
+
+  /* Configure : NSS management, TI Mode, NSS Pulse, Data size and Rx Fifo threshold */
+  WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode |
+ 800a7da:	687b      	ldr	r3, [r7, #4]
+ 800a7dc:	699b      	ldr	r3, [r3, #24]
+ 800a7de:	0c1b      	lsrs	r3, r3, #16
+ 800a7e0:	f003 0204 	and.w	r2, r3, #4
+ 800a7e4:	687b      	ldr	r3, [r7, #4]
+ 800a7e6:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800a7e8:	431a      	orrs	r2, r3
+ 800a7ea:	687b      	ldr	r3, [r7, #4]
+ 800a7ec:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 800a7ee:	431a      	orrs	r2, r3
+ 800a7f0:	687b      	ldr	r3, [r7, #4]
+ 800a7f2:	68db      	ldr	r3, [r3, #12]
+ 800a7f4:	ea42 0103 	orr.w	r1, r2, r3
+ 800a7f8:	687b      	ldr	r3, [r7, #4]
+ 800a7fa:	681b      	ldr	r3, [r3, #0]
+ 800a7fc:	68fa      	ldr	r2, [r7, #12]
+ 800a7fe:	430a      	orrs	r2, r1
+ 800a800:	605a      	str	r2, [r3, #4]
+  }
+#endif /* USE_SPI_CRC */
+
+#if defined(SPI_I2SCFGR_I2SMOD)
+  /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
+  CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
+ 800a802:	687b      	ldr	r3, [r7, #4]
+ 800a804:	681b      	ldr	r3, [r3, #0]
+ 800a806:	69da      	ldr	r2, [r3, #28]
+ 800a808:	687b      	ldr	r3, [r7, #4]
+ 800a80a:	681b      	ldr	r3, [r3, #0]
+ 800a80c:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
+ 800a810:	61da      	str	r2, [r3, #28]
+#endif /* SPI_I2SCFGR_I2SMOD */
+
+  hspi->ErrorCode = HAL_SPI_ERROR_NONE;
+ 800a812:	687b      	ldr	r3, [r7, #4]
+ 800a814:	2200      	movs	r2, #0
+ 800a816:	661a      	str	r2, [r3, #96]	; 0x60
+  hspi->State     = HAL_SPI_STATE_READY;
+ 800a818:	687b      	ldr	r3, [r7, #4]
+ 800a81a:	2201      	movs	r2, #1
+ 800a81c:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
+
+  return HAL_OK;
+ 800a820:	2300      	movs	r3, #0
+}
+ 800a822:	4618      	mov	r0, r3
+ 800a824:	3710      	adds	r7, #16
+ 800a826:	46bd      	mov	sp, r7
+ 800a828:	bd80      	pop	{r7, pc}
+
+0800a82a <HAL_TIM_Base_Init>:
+  *         Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
+  * @param  htim TIM Base handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
+{
+ 800a82a:	b580      	push	{r7, lr}
+ 800a82c:	b082      	sub	sp, #8
+ 800a82e:	af00      	add	r7, sp, #0
+ 800a830:	6078      	str	r0, [r7, #4]
+  /* Check the TIM handle allocation */
+  if (htim == NULL)
+ 800a832:	687b      	ldr	r3, [r7, #4]
+ 800a834:	2b00      	cmp	r3, #0
+ 800a836:	d101      	bne.n	800a83c <HAL_TIM_Base_Init+0x12>
+  {
+    return HAL_ERROR;
+ 800a838:	2301      	movs	r3, #1
+ 800a83a:	e01d      	b.n	800a878 <HAL_TIM_Base_Init+0x4e>
+  assert_param(IS_TIM_INSTANCE(htim->Instance));
+  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
+  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
+
+  if (htim->State == HAL_TIM_STATE_RESET)
+ 800a83c:	687b      	ldr	r3, [r7, #4]
+ 800a83e:	f893 303d 	ldrb.w	r3, [r3, #61]	; 0x3d
+ 800a842:	b2db      	uxtb	r3, r3
+ 800a844:	2b00      	cmp	r3, #0
+ 800a846:	d106      	bne.n	800a856 <HAL_TIM_Base_Init+0x2c>
+  {
+    /* Allocate lock resource and initialize it */
+    htim->Lock = HAL_UNLOCKED;
+ 800a848:	687b      	ldr	r3, [r7, #4]
+ 800a84a:	2200      	movs	r2, #0
+ 800a84c:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+    }
+    /* Init the low level hardware : GPIO, CLOCK, NVIC */
+    htim->Base_MspInitCallback(htim);
+#else
+    /* Init the low level hardware : GPIO, CLOCK, NVIC */
+    HAL_TIM_Base_MspInit(htim);
+ 800a850:	6878      	ldr	r0, [r7, #4]
+ 800a852:	f7f9 fdb7 	bl	80043c4 <HAL_TIM_Base_MspInit>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+  }
+
+  /* Set the TIM state */
+  htim->State = HAL_TIM_STATE_BUSY;
+ 800a856:	687b      	ldr	r3, [r7, #4]
+ 800a858:	2202      	movs	r2, #2
+ 800a85a:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  /* Set the Time Base configuration */
+  TIM_Base_SetConfig(htim->Instance, &htim->Init);
+ 800a85e:	687b      	ldr	r3, [r7, #4]
+ 800a860:	681a      	ldr	r2, [r3, #0]
+ 800a862:	687b      	ldr	r3, [r7, #4]
+ 800a864:	3304      	adds	r3, #4
+ 800a866:	4619      	mov	r1, r3
+ 800a868:	4610      	mov	r0, r2
+ 800a86a:	f000 fbc3 	bl	800aff4 <TIM_Base_SetConfig>
+
+  /* Initialize the TIM state*/
+  htim->State = HAL_TIM_STATE_READY;
+ 800a86e:	687b      	ldr	r3, [r7, #4]
+ 800a870:	2201      	movs	r2, #1
+ 800a872:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  return HAL_OK;
+ 800a876:	2300      	movs	r3, #0
+}
+ 800a878:	4618      	mov	r0, r3
+ 800a87a:	3708      	adds	r7, #8
+ 800a87c:	46bd      	mov	sp, r7
+ 800a87e:	bd80      	pop	{r7, pc}
+
+0800a880 <HAL_TIM_Base_Start_IT>:
+  * @brief  Starts the TIM Base generation in interrupt mode.
+  * @param  htim TIM Base handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
+{
+ 800a880:	b480      	push	{r7}
+ 800a882:	b085      	sub	sp, #20
+ 800a884:	af00      	add	r7, sp, #0
+ 800a886:	6078      	str	r0, [r7, #4]
+
+  /* Check the parameters */
+  assert_param(IS_TIM_INSTANCE(htim->Instance));
+
+  /* Enable the TIM Update interrupt */
+  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
+ 800a888:	687b      	ldr	r3, [r7, #4]
+ 800a88a:	681b      	ldr	r3, [r3, #0]
+ 800a88c:	68da      	ldr	r2, [r3, #12]
+ 800a88e:	687b      	ldr	r3, [r7, #4]
+ 800a890:	681b      	ldr	r3, [r3, #0]
+ 800a892:	f042 0201 	orr.w	r2, r2, #1
+ 800a896:	60da      	str	r2, [r3, #12]
+
+  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ 800a898:	687b      	ldr	r3, [r7, #4]
+ 800a89a:	681b      	ldr	r3, [r3, #0]
+ 800a89c:	689a      	ldr	r2, [r3, #8]
+ 800a89e:	4b0c      	ldr	r3, [pc, #48]	; (800a8d0 <HAL_TIM_Base_Start_IT+0x50>)
+ 800a8a0:	4013      	ands	r3, r2
+ 800a8a2:	60fb      	str	r3, [r7, #12]
+  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ 800a8a4:	68fb      	ldr	r3, [r7, #12]
+ 800a8a6:	2b06      	cmp	r3, #6
+ 800a8a8:	d00b      	beq.n	800a8c2 <HAL_TIM_Base_Start_IT+0x42>
+ 800a8aa:	68fb      	ldr	r3, [r7, #12]
+ 800a8ac:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 800a8b0:	d007      	beq.n	800a8c2 <HAL_TIM_Base_Start_IT+0x42>
+  {
+    __HAL_TIM_ENABLE(htim);
+ 800a8b2:	687b      	ldr	r3, [r7, #4]
+ 800a8b4:	681b      	ldr	r3, [r3, #0]
+ 800a8b6:	681a      	ldr	r2, [r3, #0]
+ 800a8b8:	687b      	ldr	r3, [r7, #4]
+ 800a8ba:	681b      	ldr	r3, [r3, #0]
+ 800a8bc:	f042 0201 	orr.w	r2, r2, #1
+ 800a8c0:	601a      	str	r2, [r3, #0]
+  }
+
+  /* Return function status */
+  return HAL_OK;
+ 800a8c2:	2300      	movs	r3, #0
+}
+ 800a8c4:	4618      	mov	r0, r3
+ 800a8c6:	3714      	adds	r7, #20
+ 800a8c8:	46bd      	mov	sp, r7
+ 800a8ca:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800a8ce:	4770      	bx	lr
+ 800a8d0:	00010007 	.word	0x00010007
+
+0800a8d4 <HAL_TIM_PWM_Init>:
+  *         Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
+  * @param  htim TIM PWM handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
+{
+ 800a8d4:	b580      	push	{r7, lr}
+ 800a8d6:	b082      	sub	sp, #8
+ 800a8d8:	af00      	add	r7, sp, #0
+ 800a8da:	6078      	str	r0, [r7, #4]
+  /* Check the TIM handle allocation */
+  if (htim == NULL)
+ 800a8dc:	687b      	ldr	r3, [r7, #4]
+ 800a8de:	2b00      	cmp	r3, #0
+ 800a8e0:	d101      	bne.n	800a8e6 <HAL_TIM_PWM_Init+0x12>
+  {
+    return HAL_ERROR;
+ 800a8e2:	2301      	movs	r3, #1
+ 800a8e4:	e01d      	b.n	800a922 <HAL_TIM_PWM_Init+0x4e>
+  assert_param(IS_TIM_INSTANCE(htim->Instance));
+  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
+  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
+
+  if (htim->State == HAL_TIM_STATE_RESET)
+ 800a8e6:	687b      	ldr	r3, [r7, #4]
+ 800a8e8:	f893 303d 	ldrb.w	r3, [r3, #61]	; 0x3d
+ 800a8ec:	b2db      	uxtb	r3, r3
+ 800a8ee:	2b00      	cmp	r3, #0
+ 800a8f0:	d106      	bne.n	800a900 <HAL_TIM_PWM_Init+0x2c>
+  {
+    /* Allocate lock resource and initialize it */
+    htim->Lock = HAL_UNLOCKED;
+ 800a8f2:	687b      	ldr	r3, [r7, #4]
+ 800a8f4:	2200      	movs	r2, #0
+ 800a8f6:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+    }
+    /* Init the low level hardware : GPIO, CLOCK, NVIC */
+    htim->PWM_MspInitCallback(htim);
+#else
+    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
+    HAL_TIM_PWM_MspInit(htim);
+ 800a8fa:	6878      	ldr	r0, [r7, #4]
+ 800a8fc:	f000 f815 	bl	800a92a <HAL_TIM_PWM_MspInit>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+  }
+
+  /* Set the TIM state */
+  htim->State = HAL_TIM_STATE_BUSY;
+ 800a900:	687b      	ldr	r3, [r7, #4]
+ 800a902:	2202      	movs	r2, #2
+ 800a904:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  /* Init the base time for the PWM */
+  TIM_Base_SetConfig(htim->Instance, &htim->Init);
+ 800a908:	687b      	ldr	r3, [r7, #4]
+ 800a90a:	681a      	ldr	r2, [r3, #0]
+ 800a90c:	687b      	ldr	r3, [r7, #4]
+ 800a90e:	3304      	adds	r3, #4
+ 800a910:	4619      	mov	r1, r3
+ 800a912:	4610      	mov	r0, r2
+ 800a914:	f000 fb6e 	bl	800aff4 <TIM_Base_SetConfig>
+
+  /* Initialize the TIM state*/
+  htim->State = HAL_TIM_STATE_READY;
+ 800a918:	687b      	ldr	r3, [r7, #4]
+ 800a91a:	2201      	movs	r2, #1
+ 800a91c:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  return HAL_OK;
+ 800a920:	2300      	movs	r3, #0
+}
+ 800a922:	4618      	mov	r0, r3
+ 800a924:	3708      	adds	r7, #8
+ 800a926:	46bd      	mov	sp, r7
+ 800a928:	bd80      	pop	{r7, pc}
+
+0800a92a <HAL_TIM_PWM_MspInit>:
+  * @brief  Initializes the TIM PWM MSP.
+  * @param  htim TIM PWM handle
+  * @retval None
+  */
+__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
+{
+ 800a92a:	b480      	push	{r7}
+ 800a92c:	b083      	sub	sp, #12
+ 800a92e:	af00      	add	r7, sp, #0
+ 800a930:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_PWM_MspInit could be implemented in the user file
+   */
+}
+ 800a932:	bf00      	nop
+ 800a934:	370c      	adds	r7, #12
+ 800a936:	46bd      	mov	sp, r7
+ 800a938:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800a93c:	4770      	bx	lr
+
+0800a93e <HAL_TIM_IRQHandler>:
+  * @brief  This function handles TIM interrupts requests.
+  * @param  htim TIM  handle
+  * @retval None
+  */
+void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
+{
+ 800a93e:	b580      	push	{r7, lr}
+ 800a940:	b082      	sub	sp, #8
+ 800a942:	af00      	add	r7, sp, #0
+ 800a944:	6078      	str	r0, [r7, #4]
+  /* Capture compare 1 event */
+  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
+ 800a946:	687b      	ldr	r3, [r7, #4]
+ 800a948:	681b      	ldr	r3, [r3, #0]
+ 800a94a:	691b      	ldr	r3, [r3, #16]
+ 800a94c:	f003 0302 	and.w	r3, r3, #2
+ 800a950:	2b02      	cmp	r3, #2
+ 800a952:	d122      	bne.n	800a99a <HAL_TIM_IRQHandler+0x5c>
+  {
+    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
+ 800a954:	687b      	ldr	r3, [r7, #4]
+ 800a956:	681b      	ldr	r3, [r3, #0]
+ 800a958:	68db      	ldr	r3, [r3, #12]
+ 800a95a:	f003 0302 	and.w	r3, r3, #2
+ 800a95e:	2b02      	cmp	r3, #2
+ 800a960:	d11b      	bne.n	800a99a <HAL_TIM_IRQHandler+0x5c>
+    {
+      {
+        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
+ 800a962:	687b      	ldr	r3, [r7, #4]
+ 800a964:	681b      	ldr	r3, [r3, #0]
+ 800a966:	f06f 0202 	mvn.w	r2, #2
+ 800a96a:	611a      	str	r2, [r3, #16]
+        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
+ 800a96c:	687b      	ldr	r3, [r7, #4]
+ 800a96e:	2201      	movs	r2, #1
+ 800a970:	771a      	strb	r2, [r3, #28]
+
+        /* Input capture event */
+        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
+ 800a972:	687b      	ldr	r3, [r7, #4]
+ 800a974:	681b      	ldr	r3, [r3, #0]
+ 800a976:	699b      	ldr	r3, [r3, #24]
+ 800a978:	f003 0303 	and.w	r3, r3, #3
+ 800a97c:	2b00      	cmp	r3, #0
+ 800a97e:	d003      	beq.n	800a988 <HAL_TIM_IRQHandler+0x4a>
+        {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+          htim->IC_CaptureCallback(htim);
+#else
+          HAL_TIM_IC_CaptureCallback(htim);
+ 800a980:	6878      	ldr	r0, [r7, #4]
+ 800a982:	f000 fb19 	bl	800afb8 <HAL_TIM_IC_CaptureCallback>
+ 800a986:	e005      	b.n	800a994 <HAL_TIM_IRQHandler+0x56>
+        {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+          htim->OC_DelayElapsedCallback(htim);
+          htim->PWM_PulseFinishedCallback(htim);
+#else
+          HAL_TIM_OC_DelayElapsedCallback(htim);
+ 800a988:	6878      	ldr	r0, [r7, #4]
+ 800a98a:	f000 fb0b 	bl	800afa4 <HAL_TIM_OC_DelayElapsedCallback>
+          HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 800a98e:	6878      	ldr	r0, [r7, #4]
+ 800a990:	f000 fb1c 	bl	800afcc <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+        }
+        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 800a994:	687b      	ldr	r3, [r7, #4]
+ 800a996:	2200      	movs	r2, #0
+ 800a998:	771a      	strb	r2, [r3, #28]
+      }
+    }
+  }
+  /* Capture compare 2 event */
+  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
+ 800a99a:	687b      	ldr	r3, [r7, #4]
+ 800a99c:	681b      	ldr	r3, [r3, #0]
+ 800a99e:	691b      	ldr	r3, [r3, #16]
+ 800a9a0:	f003 0304 	and.w	r3, r3, #4
+ 800a9a4:	2b04      	cmp	r3, #4
+ 800a9a6:	d122      	bne.n	800a9ee <HAL_TIM_IRQHandler+0xb0>
+  {
+    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
+ 800a9a8:	687b      	ldr	r3, [r7, #4]
+ 800a9aa:	681b      	ldr	r3, [r3, #0]
+ 800a9ac:	68db      	ldr	r3, [r3, #12]
+ 800a9ae:	f003 0304 	and.w	r3, r3, #4
+ 800a9b2:	2b04      	cmp	r3, #4
+ 800a9b4:	d11b      	bne.n	800a9ee <HAL_TIM_IRQHandler+0xb0>
+    {
+      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
+ 800a9b6:	687b      	ldr	r3, [r7, #4]
+ 800a9b8:	681b      	ldr	r3, [r3, #0]
+ 800a9ba:	f06f 0204 	mvn.w	r2, #4
+ 800a9be:	611a      	str	r2, [r3, #16]
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
+ 800a9c0:	687b      	ldr	r3, [r7, #4]
+ 800a9c2:	2202      	movs	r2, #2
+ 800a9c4:	771a      	strb	r2, [r3, #28]
+      /* Input capture event */
+      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
+ 800a9c6:	687b      	ldr	r3, [r7, #4]
+ 800a9c8:	681b      	ldr	r3, [r3, #0]
+ 800a9ca:	699b      	ldr	r3, [r3, #24]
+ 800a9cc:	f403 7340 	and.w	r3, r3, #768	; 0x300
+ 800a9d0:	2b00      	cmp	r3, #0
+ 800a9d2:	d003      	beq.n	800a9dc <HAL_TIM_IRQHandler+0x9e>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->IC_CaptureCallback(htim);
+#else
+        HAL_TIM_IC_CaptureCallback(htim);
+ 800a9d4:	6878      	ldr	r0, [r7, #4]
+ 800a9d6:	f000 faef 	bl	800afb8 <HAL_TIM_IC_CaptureCallback>
+ 800a9da:	e005      	b.n	800a9e8 <HAL_TIM_IRQHandler+0xaa>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->OC_DelayElapsedCallback(htim);
+        htim->PWM_PulseFinishedCallback(htim);
+#else
+        HAL_TIM_OC_DelayElapsedCallback(htim);
+ 800a9dc:	6878      	ldr	r0, [r7, #4]
+ 800a9de:	f000 fae1 	bl	800afa4 <HAL_TIM_OC_DelayElapsedCallback>
+        HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 800a9e2:	6878      	ldr	r0, [r7, #4]
+ 800a9e4:	f000 faf2 	bl	800afcc <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+      }
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 800a9e8:	687b      	ldr	r3, [r7, #4]
+ 800a9ea:	2200      	movs	r2, #0
+ 800a9ec:	771a      	strb	r2, [r3, #28]
+    }
+  }
+  /* Capture compare 3 event */
+  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
+ 800a9ee:	687b      	ldr	r3, [r7, #4]
+ 800a9f0:	681b      	ldr	r3, [r3, #0]
+ 800a9f2:	691b      	ldr	r3, [r3, #16]
+ 800a9f4:	f003 0308 	and.w	r3, r3, #8
+ 800a9f8:	2b08      	cmp	r3, #8
+ 800a9fa:	d122      	bne.n	800aa42 <HAL_TIM_IRQHandler+0x104>
+  {
+    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
+ 800a9fc:	687b      	ldr	r3, [r7, #4]
+ 800a9fe:	681b      	ldr	r3, [r3, #0]
+ 800aa00:	68db      	ldr	r3, [r3, #12]
+ 800aa02:	f003 0308 	and.w	r3, r3, #8
+ 800aa06:	2b08      	cmp	r3, #8
+ 800aa08:	d11b      	bne.n	800aa42 <HAL_TIM_IRQHandler+0x104>
+    {
+      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
+ 800aa0a:	687b      	ldr	r3, [r7, #4]
+ 800aa0c:	681b      	ldr	r3, [r3, #0]
+ 800aa0e:	f06f 0208 	mvn.w	r2, #8
+ 800aa12:	611a      	str	r2, [r3, #16]
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
+ 800aa14:	687b      	ldr	r3, [r7, #4]
+ 800aa16:	2204      	movs	r2, #4
+ 800aa18:	771a      	strb	r2, [r3, #28]
+      /* Input capture event */
+      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
+ 800aa1a:	687b      	ldr	r3, [r7, #4]
+ 800aa1c:	681b      	ldr	r3, [r3, #0]
+ 800aa1e:	69db      	ldr	r3, [r3, #28]
+ 800aa20:	f003 0303 	and.w	r3, r3, #3
+ 800aa24:	2b00      	cmp	r3, #0
+ 800aa26:	d003      	beq.n	800aa30 <HAL_TIM_IRQHandler+0xf2>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->IC_CaptureCallback(htim);
+#else
+        HAL_TIM_IC_CaptureCallback(htim);
+ 800aa28:	6878      	ldr	r0, [r7, #4]
+ 800aa2a:	f000 fac5 	bl	800afb8 <HAL_TIM_IC_CaptureCallback>
+ 800aa2e:	e005      	b.n	800aa3c <HAL_TIM_IRQHandler+0xfe>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->OC_DelayElapsedCallback(htim);
+        htim->PWM_PulseFinishedCallback(htim);
+#else
+        HAL_TIM_OC_DelayElapsedCallback(htim);
+ 800aa30:	6878      	ldr	r0, [r7, #4]
+ 800aa32:	f000 fab7 	bl	800afa4 <HAL_TIM_OC_DelayElapsedCallback>
+        HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 800aa36:	6878      	ldr	r0, [r7, #4]
+ 800aa38:	f000 fac8 	bl	800afcc <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+      }
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 800aa3c:	687b      	ldr	r3, [r7, #4]
+ 800aa3e:	2200      	movs	r2, #0
+ 800aa40:	771a      	strb	r2, [r3, #28]
+    }
+  }
+  /* Capture compare 4 event */
+  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
+ 800aa42:	687b      	ldr	r3, [r7, #4]
+ 800aa44:	681b      	ldr	r3, [r3, #0]
+ 800aa46:	691b      	ldr	r3, [r3, #16]
+ 800aa48:	f003 0310 	and.w	r3, r3, #16
+ 800aa4c:	2b10      	cmp	r3, #16
+ 800aa4e:	d122      	bne.n	800aa96 <HAL_TIM_IRQHandler+0x158>
+  {
+    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
+ 800aa50:	687b      	ldr	r3, [r7, #4]
+ 800aa52:	681b      	ldr	r3, [r3, #0]
+ 800aa54:	68db      	ldr	r3, [r3, #12]
+ 800aa56:	f003 0310 	and.w	r3, r3, #16
+ 800aa5a:	2b10      	cmp	r3, #16
+ 800aa5c:	d11b      	bne.n	800aa96 <HAL_TIM_IRQHandler+0x158>
+    {
+      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
+ 800aa5e:	687b      	ldr	r3, [r7, #4]
+ 800aa60:	681b      	ldr	r3, [r3, #0]
+ 800aa62:	f06f 0210 	mvn.w	r2, #16
+ 800aa66:	611a      	str	r2, [r3, #16]
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
+ 800aa68:	687b      	ldr	r3, [r7, #4]
+ 800aa6a:	2208      	movs	r2, #8
+ 800aa6c:	771a      	strb	r2, [r3, #28]
+      /* Input capture event */
+      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
+ 800aa6e:	687b      	ldr	r3, [r7, #4]
+ 800aa70:	681b      	ldr	r3, [r3, #0]
+ 800aa72:	69db      	ldr	r3, [r3, #28]
+ 800aa74:	f403 7340 	and.w	r3, r3, #768	; 0x300
+ 800aa78:	2b00      	cmp	r3, #0
+ 800aa7a:	d003      	beq.n	800aa84 <HAL_TIM_IRQHandler+0x146>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->IC_CaptureCallback(htim);
+#else
+        HAL_TIM_IC_CaptureCallback(htim);
+ 800aa7c:	6878      	ldr	r0, [r7, #4]
+ 800aa7e:	f000 fa9b 	bl	800afb8 <HAL_TIM_IC_CaptureCallback>
+ 800aa82:	e005      	b.n	800aa90 <HAL_TIM_IRQHandler+0x152>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->OC_DelayElapsedCallback(htim);
+        htim->PWM_PulseFinishedCallback(htim);
+#else
+        HAL_TIM_OC_DelayElapsedCallback(htim);
+ 800aa84:	6878      	ldr	r0, [r7, #4]
+ 800aa86:	f000 fa8d 	bl	800afa4 <HAL_TIM_OC_DelayElapsedCallback>
+        HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 800aa8a:	6878      	ldr	r0, [r7, #4]
+ 800aa8c:	f000 fa9e 	bl	800afcc <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+      }
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 800aa90:	687b      	ldr	r3, [r7, #4]
+ 800aa92:	2200      	movs	r2, #0
+ 800aa94:	771a      	strb	r2, [r3, #28]
+    }
+  }
+  /* TIM Update event */
+  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
+ 800aa96:	687b      	ldr	r3, [r7, #4]
+ 800aa98:	681b      	ldr	r3, [r3, #0]
+ 800aa9a:	691b      	ldr	r3, [r3, #16]
+ 800aa9c:	f003 0301 	and.w	r3, r3, #1
+ 800aaa0:	2b01      	cmp	r3, #1
+ 800aaa2:	d10e      	bne.n	800aac2 <HAL_TIM_IRQHandler+0x184>
+  {
+    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
+ 800aaa4:	687b      	ldr	r3, [r7, #4]
+ 800aaa6:	681b      	ldr	r3, [r3, #0]
+ 800aaa8:	68db      	ldr	r3, [r3, #12]
+ 800aaaa:	f003 0301 	and.w	r3, r3, #1
+ 800aaae:	2b01      	cmp	r3, #1
+ 800aab0:	d107      	bne.n	800aac2 <HAL_TIM_IRQHandler+0x184>
+    {
+      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
+ 800aab2:	687b      	ldr	r3, [r7, #4]
+ 800aab4:	681b      	ldr	r3, [r3, #0]
+ 800aab6:	f06f 0201 	mvn.w	r2, #1
+ 800aaba:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->PeriodElapsedCallback(htim);
+#else
+      HAL_TIM_PeriodElapsedCallback(htim);
+ 800aabc:	6878      	ldr	r0, [r7, #4]
+ 800aabe:	f7f7 fbf1 	bl	80022a4 <HAL_TIM_PeriodElapsedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+  /* TIM Break input event */
+  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
+ 800aac2:	687b      	ldr	r3, [r7, #4]
+ 800aac4:	681b      	ldr	r3, [r3, #0]
+ 800aac6:	691b      	ldr	r3, [r3, #16]
+ 800aac8:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 800aacc:	2b80      	cmp	r3, #128	; 0x80
+ 800aace:	d10e      	bne.n	800aaee <HAL_TIM_IRQHandler+0x1b0>
+  {
+    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
+ 800aad0:	687b      	ldr	r3, [r7, #4]
+ 800aad2:	681b      	ldr	r3, [r3, #0]
+ 800aad4:	68db      	ldr	r3, [r3, #12]
+ 800aad6:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 800aada:	2b80      	cmp	r3, #128	; 0x80
+ 800aadc:	d107      	bne.n	800aaee <HAL_TIM_IRQHandler+0x1b0>
+    {
+      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
+ 800aade:	687b      	ldr	r3, [r7, #4]
+ 800aae0:	681b      	ldr	r3, [r3, #0]
+ 800aae2:	f06f 0280 	mvn.w	r2, #128	; 0x80
+ 800aae6:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->BreakCallback(htim);
+#else
+      HAL_TIMEx_BreakCallback(htim);
+ 800aae8:	6878      	ldr	r0, [r7, #4]
+ 800aaea:	f000 ffb9 	bl	800ba60 <HAL_TIMEx_BreakCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+  /* TIM Break2 input event */
+  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET)
+ 800aaee:	687b      	ldr	r3, [r7, #4]
+ 800aaf0:	681b      	ldr	r3, [r3, #0]
+ 800aaf2:	691b      	ldr	r3, [r3, #16]
+ 800aaf4:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 800aaf8:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
+ 800aafc:	d10e      	bne.n	800ab1c <HAL_TIM_IRQHandler+0x1de>
+  {
+    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
+ 800aafe:	687b      	ldr	r3, [r7, #4]
+ 800ab00:	681b      	ldr	r3, [r3, #0]
+ 800ab02:	68db      	ldr	r3, [r3, #12]
+ 800ab04:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 800ab08:	2b80      	cmp	r3, #128	; 0x80
+ 800ab0a:	d107      	bne.n	800ab1c <HAL_TIM_IRQHandler+0x1de>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
+ 800ab0c:	687b      	ldr	r3, [r7, #4]
+ 800ab0e:	681b      	ldr	r3, [r3, #0]
+ 800ab10:	f46f 7280 	mvn.w	r2, #256	; 0x100
+ 800ab14:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->Break2Callback(htim);
+#else
+      HAL_TIMEx_Break2Callback(htim);
+ 800ab16:	6878      	ldr	r0, [r7, #4]
+ 800ab18:	f000 ffac 	bl	800ba74 <HAL_TIMEx_Break2Callback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+  /* TIM Trigger detection event */
+  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
+ 800ab1c:	687b      	ldr	r3, [r7, #4]
+ 800ab1e:	681b      	ldr	r3, [r3, #0]
+ 800ab20:	691b      	ldr	r3, [r3, #16]
+ 800ab22:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800ab26:	2b40      	cmp	r3, #64	; 0x40
+ 800ab28:	d10e      	bne.n	800ab48 <HAL_TIM_IRQHandler+0x20a>
+  {
+    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
+ 800ab2a:	687b      	ldr	r3, [r7, #4]
+ 800ab2c:	681b      	ldr	r3, [r3, #0]
+ 800ab2e:	68db      	ldr	r3, [r3, #12]
+ 800ab30:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800ab34:	2b40      	cmp	r3, #64	; 0x40
+ 800ab36:	d107      	bne.n	800ab48 <HAL_TIM_IRQHandler+0x20a>
+    {
+      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
+ 800ab38:	687b      	ldr	r3, [r7, #4]
+ 800ab3a:	681b      	ldr	r3, [r3, #0]
+ 800ab3c:	f06f 0240 	mvn.w	r2, #64	; 0x40
+ 800ab40:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->TriggerCallback(htim);
+#else
+      HAL_TIM_TriggerCallback(htim);
+ 800ab42:	6878      	ldr	r0, [r7, #4]
+ 800ab44:	f000 fa4c 	bl	800afe0 <HAL_TIM_TriggerCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+  /* TIM commutation event */
+  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
+ 800ab48:	687b      	ldr	r3, [r7, #4]
+ 800ab4a:	681b      	ldr	r3, [r3, #0]
+ 800ab4c:	691b      	ldr	r3, [r3, #16]
+ 800ab4e:	f003 0320 	and.w	r3, r3, #32
+ 800ab52:	2b20      	cmp	r3, #32
+ 800ab54:	d10e      	bne.n	800ab74 <HAL_TIM_IRQHandler+0x236>
+  {
+    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
+ 800ab56:	687b      	ldr	r3, [r7, #4]
+ 800ab58:	681b      	ldr	r3, [r3, #0]
+ 800ab5a:	68db      	ldr	r3, [r3, #12]
+ 800ab5c:	f003 0320 	and.w	r3, r3, #32
+ 800ab60:	2b20      	cmp	r3, #32
+ 800ab62:	d107      	bne.n	800ab74 <HAL_TIM_IRQHandler+0x236>
+    {
+      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
+ 800ab64:	687b      	ldr	r3, [r7, #4]
+ 800ab66:	681b      	ldr	r3, [r3, #0]
+ 800ab68:	f06f 0220 	mvn.w	r2, #32
+ 800ab6c:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->CommutationCallback(htim);
+#else
+      HAL_TIMEx_CommutCallback(htim);
+ 800ab6e:	6878      	ldr	r0, [r7, #4]
+ 800ab70:	f000 ff6c 	bl	800ba4c <HAL_TIMEx_CommutCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+}
+ 800ab74:	bf00      	nop
+ 800ab76:	3708      	adds	r7, #8
+ 800ab78:	46bd      	mov	sp, r7
+ 800ab7a:	bd80      	pop	{r7, pc}
+
+0800ab7c <HAL_TIM_PWM_ConfigChannel>:
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
+                                            TIM_OC_InitTypeDef *sConfig,
+                                            uint32_t Channel)
+{
+ 800ab7c:	b580      	push	{r7, lr}
+ 800ab7e:	b084      	sub	sp, #16
+ 800ab80:	af00      	add	r7, sp, #0
+ 800ab82:	60f8      	str	r0, [r7, #12]
+ 800ab84:	60b9      	str	r1, [r7, #8]
+ 800ab86:	607a      	str	r2, [r7, #4]
+  assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
+  assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
+  assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
+
+  /* Process Locked */
+  __HAL_LOCK(htim);
+ 800ab88:	68fb      	ldr	r3, [r7, #12]
+ 800ab8a:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
+ 800ab8e:	2b01      	cmp	r3, #1
+ 800ab90:	d101      	bne.n	800ab96 <HAL_TIM_PWM_ConfigChannel+0x1a>
+ 800ab92:	2302      	movs	r3, #2
+ 800ab94:	e105      	b.n	800ada2 <HAL_TIM_PWM_ConfigChannel+0x226>
+ 800ab96:	68fb      	ldr	r3, [r7, #12]
+ 800ab98:	2201      	movs	r2, #1
+ 800ab9a:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  htim->State = HAL_TIM_STATE_BUSY;
+ 800ab9e:	68fb      	ldr	r3, [r7, #12]
+ 800aba0:	2202      	movs	r2, #2
+ 800aba2:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  switch (Channel)
+ 800aba6:	687b      	ldr	r3, [r7, #4]
+ 800aba8:	2b14      	cmp	r3, #20
+ 800abaa:	f200 80f0 	bhi.w	800ad8e <HAL_TIM_PWM_ConfigChannel+0x212>
+ 800abae:	a201      	add	r2, pc, #4	; (adr r2, 800abb4 <HAL_TIM_PWM_ConfigChannel+0x38>)
+ 800abb0:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 800abb4:	0800ac09 	.word	0x0800ac09
+ 800abb8:	0800ad8f 	.word	0x0800ad8f
+ 800abbc:	0800ad8f 	.word	0x0800ad8f
+ 800abc0:	0800ad8f 	.word	0x0800ad8f
+ 800abc4:	0800ac49 	.word	0x0800ac49
+ 800abc8:	0800ad8f 	.word	0x0800ad8f
+ 800abcc:	0800ad8f 	.word	0x0800ad8f
+ 800abd0:	0800ad8f 	.word	0x0800ad8f
+ 800abd4:	0800ac8b 	.word	0x0800ac8b
+ 800abd8:	0800ad8f 	.word	0x0800ad8f
+ 800abdc:	0800ad8f 	.word	0x0800ad8f
+ 800abe0:	0800ad8f 	.word	0x0800ad8f
+ 800abe4:	0800accb 	.word	0x0800accb
+ 800abe8:	0800ad8f 	.word	0x0800ad8f
+ 800abec:	0800ad8f 	.word	0x0800ad8f
+ 800abf0:	0800ad8f 	.word	0x0800ad8f
+ 800abf4:	0800ad0d 	.word	0x0800ad0d
+ 800abf8:	0800ad8f 	.word	0x0800ad8f
+ 800abfc:	0800ad8f 	.word	0x0800ad8f
+ 800ac00:	0800ad8f 	.word	0x0800ad8f
+ 800ac04:	0800ad4d 	.word	0x0800ad4d
+    {
+      /* Check the parameters */
+      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
+
+      /* Configure the Channel 1 in PWM mode */
+      TIM_OC1_SetConfig(htim->Instance, sConfig);
+ 800ac08:	68fb      	ldr	r3, [r7, #12]
+ 800ac0a:	681b      	ldr	r3, [r3, #0]
+ 800ac0c:	68b9      	ldr	r1, [r7, #8]
+ 800ac0e:	4618      	mov	r0, r3
+ 800ac10:	f000 fa90 	bl	800b134 <TIM_OC1_SetConfig>
+
+      /* Set the Preload enable bit for channel1 */
+      htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
+ 800ac14:	68fb      	ldr	r3, [r7, #12]
+ 800ac16:	681b      	ldr	r3, [r3, #0]
+ 800ac18:	699a      	ldr	r2, [r3, #24]
+ 800ac1a:	68fb      	ldr	r3, [r7, #12]
+ 800ac1c:	681b      	ldr	r3, [r3, #0]
+ 800ac1e:	f042 0208 	orr.w	r2, r2, #8
+ 800ac22:	619a      	str	r2, [r3, #24]
+
+      /* Configure the Output Fast mode */
+      htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
+ 800ac24:	68fb      	ldr	r3, [r7, #12]
+ 800ac26:	681b      	ldr	r3, [r3, #0]
+ 800ac28:	699a      	ldr	r2, [r3, #24]
+ 800ac2a:	68fb      	ldr	r3, [r7, #12]
+ 800ac2c:	681b      	ldr	r3, [r3, #0]
+ 800ac2e:	f022 0204 	bic.w	r2, r2, #4
+ 800ac32:	619a      	str	r2, [r3, #24]
+      htim->Instance->CCMR1 |= sConfig->OCFastMode;
+ 800ac34:	68fb      	ldr	r3, [r7, #12]
+ 800ac36:	681b      	ldr	r3, [r3, #0]
+ 800ac38:	6999      	ldr	r1, [r3, #24]
+ 800ac3a:	68bb      	ldr	r3, [r7, #8]
+ 800ac3c:	691a      	ldr	r2, [r3, #16]
+ 800ac3e:	68fb      	ldr	r3, [r7, #12]
+ 800ac40:	681b      	ldr	r3, [r3, #0]
+ 800ac42:	430a      	orrs	r2, r1
+ 800ac44:	619a      	str	r2, [r3, #24]
+      break;
+ 800ac46:	e0a3      	b.n	800ad90 <HAL_TIM_PWM_ConfigChannel+0x214>
+    {
+      /* Check the parameters */
+      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
+
+      /* Configure the Channel 2 in PWM mode */
+      TIM_OC2_SetConfig(htim->Instance, sConfig);
+ 800ac48:	68fb      	ldr	r3, [r7, #12]
+ 800ac4a:	681b      	ldr	r3, [r3, #0]
+ 800ac4c:	68b9      	ldr	r1, [r7, #8]
+ 800ac4e:	4618      	mov	r0, r3
+ 800ac50:	f000 fae2 	bl	800b218 <TIM_OC2_SetConfig>
+
+      /* Set the Preload enable bit for channel2 */
+      htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
+ 800ac54:	68fb      	ldr	r3, [r7, #12]
+ 800ac56:	681b      	ldr	r3, [r3, #0]
+ 800ac58:	699a      	ldr	r2, [r3, #24]
+ 800ac5a:	68fb      	ldr	r3, [r7, #12]
+ 800ac5c:	681b      	ldr	r3, [r3, #0]
+ 800ac5e:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
+ 800ac62:	619a      	str	r2, [r3, #24]
+
+      /* Configure the Output Fast mode */
+      htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
+ 800ac64:	68fb      	ldr	r3, [r7, #12]
+ 800ac66:	681b      	ldr	r3, [r3, #0]
+ 800ac68:	699a      	ldr	r2, [r3, #24]
+ 800ac6a:	68fb      	ldr	r3, [r7, #12]
+ 800ac6c:	681b      	ldr	r3, [r3, #0]
+ 800ac6e:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
+ 800ac72:	619a      	str	r2, [r3, #24]
+      htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
+ 800ac74:	68fb      	ldr	r3, [r7, #12]
+ 800ac76:	681b      	ldr	r3, [r3, #0]
+ 800ac78:	6999      	ldr	r1, [r3, #24]
+ 800ac7a:	68bb      	ldr	r3, [r7, #8]
+ 800ac7c:	691b      	ldr	r3, [r3, #16]
+ 800ac7e:	021a      	lsls	r2, r3, #8
+ 800ac80:	68fb      	ldr	r3, [r7, #12]
+ 800ac82:	681b      	ldr	r3, [r3, #0]
+ 800ac84:	430a      	orrs	r2, r1
+ 800ac86:	619a      	str	r2, [r3, #24]
+      break;
+ 800ac88:	e082      	b.n	800ad90 <HAL_TIM_PWM_ConfigChannel+0x214>
+    {
+      /* Check the parameters */
+      assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
+
+      /* Configure the Channel 3 in PWM mode */
+      TIM_OC3_SetConfig(htim->Instance, sConfig);
+ 800ac8a:	68fb      	ldr	r3, [r7, #12]
+ 800ac8c:	681b      	ldr	r3, [r3, #0]
+ 800ac8e:	68b9      	ldr	r1, [r7, #8]
+ 800ac90:	4618      	mov	r0, r3
+ 800ac92:	f000 fb39 	bl	800b308 <TIM_OC3_SetConfig>
+
+      /* Set the Preload enable bit for channel3 */
+      htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
+ 800ac96:	68fb      	ldr	r3, [r7, #12]
+ 800ac98:	681b      	ldr	r3, [r3, #0]
+ 800ac9a:	69da      	ldr	r2, [r3, #28]
+ 800ac9c:	68fb      	ldr	r3, [r7, #12]
+ 800ac9e:	681b      	ldr	r3, [r3, #0]
+ 800aca0:	f042 0208 	orr.w	r2, r2, #8
+ 800aca4:	61da      	str	r2, [r3, #28]
+
+      /* Configure the Output Fast mode */
+      htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
+ 800aca6:	68fb      	ldr	r3, [r7, #12]
+ 800aca8:	681b      	ldr	r3, [r3, #0]
+ 800acaa:	69da      	ldr	r2, [r3, #28]
+ 800acac:	68fb      	ldr	r3, [r7, #12]
+ 800acae:	681b      	ldr	r3, [r3, #0]
+ 800acb0:	f022 0204 	bic.w	r2, r2, #4
+ 800acb4:	61da      	str	r2, [r3, #28]
+      htim->Instance->CCMR2 |= sConfig->OCFastMode;
+ 800acb6:	68fb      	ldr	r3, [r7, #12]
+ 800acb8:	681b      	ldr	r3, [r3, #0]
+ 800acba:	69d9      	ldr	r1, [r3, #28]
+ 800acbc:	68bb      	ldr	r3, [r7, #8]
+ 800acbe:	691a      	ldr	r2, [r3, #16]
+ 800acc0:	68fb      	ldr	r3, [r7, #12]
+ 800acc2:	681b      	ldr	r3, [r3, #0]
+ 800acc4:	430a      	orrs	r2, r1
+ 800acc6:	61da      	str	r2, [r3, #28]
+      break;
+ 800acc8:	e062      	b.n	800ad90 <HAL_TIM_PWM_ConfigChannel+0x214>
+    {
+      /* Check the parameters */
+      assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
+
+      /* Configure the Channel 4 in PWM mode */
+      TIM_OC4_SetConfig(htim->Instance, sConfig);
+ 800acca:	68fb      	ldr	r3, [r7, #12]
+ 800accc:	681b      	ldr	r3, [r3, #0]
+ 800acce:	68b9      	ldr	r1, [r7, #8]
+ 800acd0:	4618      	mov	r0, r3
+ 800acd2:	f000 fb8f 	bl	800b3f4 <TIM_OC4_SetConfig>
+
+      /* Set the Preload enable bit for channel4 */
+      htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
+ 800acd6:	68fb      	ldr	r3, [r7, #12]
+ 800acd8:	681b      	ldr	r3, [r3, #0]
+ 800acda:	69da      	ldr	r2, [r3, #28]
+ 800acdc:	68fb      	ldr	r3, [r7, #12]
+ 800acde:	681b      	ldr	r3, [r3, #0]
+ 800ace0:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
+ 800ace4:	61da      	str	r2, [r3, #28]
+
+      /* Configure the Output Fast mode */
+      htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
+ 800ace6:	68fb      	ldr	r3, [r7, #12]
+ 800ace8:	681b      	ldr	r3, [r3, #0]
+ 800acea:	69da      	ldr	r2, [r3, #28]
+ 800acec:	68fb      	ldr	r3, [r7, #12]
+ 800acee:	681b      	ldr	r3, [r3, #0]
+ 800acf0:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
+ 800acf4:	61da      	str	r2, [r3, #28]
+      htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
+ 800acf6:	68fb      	ldr	r3, [r7, #12]
+ 800acf8:	681b      	ldr	r3, [r3, #0]
+ 800acfa:	69d9      	ldr	r1, [r3, #28]
+ 800acfc:	68bb      	ldr	r3, [r7, #8]
+ 800acfe:	691b      	ldr	r3, [r3, #16]
+ 800ad00:	021a      	lsls	r2, r3, #8
+ 800ad02:	68fb      	ldr	r3, [r7, #12]
+ 800ad04:	681b      	ldr	r3, [r3, #0]
+ 800ad06:	430a      	orrs	r2, r1
+ 800ad08:	61da      	str	r2, [r3, #28]
+      break;
+ 800ad0a:	e041      	b.n	800ad90 <HAL_TIM_PWM_ConfigChannel+0x214>
+    {
+      /* Check the parameters */
+      assert_param(IS_TIM_CC5_INSTANCE(htim->Instance));
+
+      /* Configure the Channel 5 in PWM mode */
+      TIM_OC5_SetConfig(htim->Instance, sConfig);
+ 800ad0c:	68fb      	ldr	r3, [r7, #12]
+ 800ad0e:	681b      	ldr	r3, [r3, #0]
+ 800ad10:	68b9      	ldr	r1, [r7, #8]
+ 800ad12:	4618      	mov	r0, r3
+ 800ad14:	f000 fbc6 	bl	800b4a4 <TIM_OC5_SetConfig>
+
+      /* Set the Preload enable bit for channel5*/
+      htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE;
+ 800ad18:	68fb      	ldr	r3, [r7, #12]
+ 800ad1a:	681b      	ldr	r3, [r3, #0]
+ 800ad1c:	6d5a      	ldr	r2, [r3, #84]	; 0x54
+ 800ad1e:	68fb      	ldr	r3, [r7, #12]
+ 800ad20:	681b      	ldr	r3, [r3, #0]
+ 800ad22:	f042 0208 	orr.w	r2, r2, #8
+ 800ad26:	655a      	str	r2, [r3, #84]	; 0x54
+
+      /* Configure the Output Fast mode */
+      htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE;
+ 800ad28:	68fb      	ldr	r3, [r7, #12]
+ 800ad2a:	681b      	ldr	r3, [r3, #0]
+ 800ad2c:	6d5a      	ldr	r2, [r3, #84]	; 0x54
+ 800ad2e:	68fb      	ldr	r3, [r7, #12]
+ 800ad30:	681b      	ldr	r3, [r3, #0]
+ 800ad32:	f022 0204 	bic.w	r2, r2, #4
+ 800ad36:	655a      	str	r2, [r3, #84]	; 0x54
+      htim->Instance->CCMR3 |= sConfig->OCFastMode;
+ 800ad38:	68fb      	ldr	r3, [r7, #12]
+ 800ad3a:	681b      	ldr	r3, [r3, #0]
+ 800ad3c:	6d59      	ldr	r1, [r3, #84]	; 0x54
+ 800ad3e:	68bb      	ldr	r3, [r7, #8]
+ 800ad40:	691a      	ldr	r2, [r3, #16]
+ 800ad42:	68fb      	ldr	r3, [r7, #12]
+ 800ad44:	681b      	ldr	r3, [r3, #0]
+ 800ad46:	430a      	orrs	r2, r1
+ 800ad48:	655a      	str	r2, [r3, #84]	; 0x54
+      break;
+ 800ad4a:	e021      	b.n	800ad90 <HAL_TIM_PWM_ConfigChannel+0x214>
+    {
+      /* Check the parameters */
+      assert_param(IS_TIM_CC6_INSTANCE(htim->Instance));
+
+      /* Configure the Channel 6 in PWM mode */
+      TIM_OC6_SetConfig(htim->Instance, sConfig);
+ 800ad4c:	68fb      	ldr	r3, [r7, #12]
+ 800ad4e:	681b      	ldr	r3, [r3, #0]
+ 800ad50:	68b9      	ldr	r1, [r7, #8]
+ 800ad52:	4618      	mov	r0, r3
+ 800ad54:	f000 fbf8 	bl	800b548 <TIM_OC6_SetConfig>
+
+      /* Set the Preload enable bit for channel6 */
+      htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE;
+ 800ad58:	68fb      	ldr	r3, [r7, #12]
+ 800ad5a:	681b      	ldr	r3, [r3, #0]
+ 800ad5c:	6d5a      	ldr	r2, [r3, #84]	; 0x54
+ 800ad5e:	68fb      	ldr	r3, [r7, #12]
+ 800ad60:	681b      	ldr	r3, [r3, #0]
+ 800ad62:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
+ 800ad66:	655a      	str	r2, [r3, #84]	; 0x54
+
+      /* Configure the Output Fast mode */
+      htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE;
+ 800ad68:	68fb      	ldr	r3, [r7, #12]
+ 800ad6a:	681b      	ldr	r3, [r3, #0]
+ 800ad6c:	6d5a      	ldr	r2, [r3, #84]	; 0x54
+ 800ad6e:	68fb      	ldr	r3, [r7, #12]
+ 800ad70:	681b      	ldr	r3, [r3, #0]
+ 800ad72:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
+ 800ad76:	655a      	str	r2, [r3, #84]	; 0x54
+      htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U;
+ 800ad78:	68fb      	ldr	r3, [r7, #12]
+ 800ad7a:	681b      	ldr	r3, [r3, #0]
+ 800ad7c:	6d59      	ldr	r1, [r3, #84]	; 0x54
+ 800ad7e:	68bb      	ldr	r3, [r7, #8]
+ 800ad80:	691b      	ldr	r3, [r3, #16]
+ 800ad82:	021a      	lsls	r2, r3, #8
+ 800ad84:	68fb      	ldr	r3, [r7, #12]
+ 800ad86:	681b      	ldr	r3, [r3, #0]
+ 800ad88:	430a      	orrs	r2, r1
+ 800ad8a:	655a      	str	r2, [r3, #84]	; 0x54
+      break;
+ 800ad8c:	e000      	b.n	800ad90 <HAL_TIM_PWM_ConfigChannel+0x214>
+    }
+
+    default:
+      break;
+ 800ad8e:	bf00      	nop
+  }
+
+  htim->State = HAL_TIM_STATE_READY;
+ 800ad90:	68fb      	ldr	r3, [r7, #12]
+ 800ad92:	2201      	movs	r2, #1
+ 800ad94:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  __HAL_UNLOCK(htim);
+ 800ad98:	68fb      	ldr	r3, [r7, #12]
+ 800ad9a:	2200      	movs	r2, #0
+ 800ad9c:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  return HAL_OK;
+ 800ada0:	2300      	movs	r3, #0
+}
+ 800ada2:	4618      	mov	r0, r3
+ 800ada4:	3710      	adds	r7, #16
+ 800ada6:	46bd      	mov	sp, r7
+ 800ada8:	bd80      	pop	{r7, pc}
+ 800adaa:	bf00      	nop
+
+0800adac <HAL_TIM_ConfigClockSource>:
+  * @param  sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
+  *         contains the clock source information for the TIM peripheral.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig)
+{
+ 800adac:	b580      	push	{r7, lr}
+ 800adae:	b084      	sub	sp, #16
+ 800adb0:	af00      	add	r7, sp, #0
+ 800adb2:	6078      	str	r0, [r7, #4]
+ 800adb4:	6039      	str	r1, [r7, #0]
+  uint32_t tmpsmcr;
+
+  /* Process Locked */
+  __HAL_LOCK(htim);
+ 800adb6:	687b      	ldr	r3, [r7, #4]
+ 800adb8:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
+ 800adbc:	2b01      	cmp	r3, #1
+ 800adbe:	d101      	bne.n	800adc4 <HAL_TIM_ConfigClockSource+0x18>
+ 800adc0:	2302      	movs	r3, #2
+ 800adc2:	e0a6      	b.n	800af12 <HAL_TIM_ConfigClockSource+0x166>
+ 800adc4:	687b      	ldr	r3, [r7, #4]
+ 800adc6:	2201      	movs	r2, #1
+ 800adc8:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  htim->State = HAL_TIM_STATE_BUSY;
+ 800adcc:	687b      	ldr	r3, [r7, #4]
+ 800adce:	2202      	movs	r2, #2
+ 800add0:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  /* Check the parameters */
+  assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
+
+  /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
+  tmpsmcr = htim->Instance->SMCR;
+ 800add4:	687b      	ldr	r3, [r7, #4]
+ 800add6:	681b      	ldr	r3, [r3, #0]
+ 800add8:	689b      	ldr	r3, [r3, #8]
+ 800adda:	60fb      	str	r3, [r7, #12]
+  tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
+ 800addc:	68fa      	ldr	r2, [r7, #12]
+ 800adde:	4b4f      	ldr	r3, [pc, #316]	; (800af1c <HAL_TIM_ConfigClockSource+0x170>)
+ 800ade0:	4013      	ands	r3, r2
+ 800ade2:	60fb      	str	r3, [r7, #12]
+  tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
+ 800ade4:	68fb      	ldr	r3, [r7, #12]
+ 800ade6:	f423 437f 	bic.w	r3, r3, #65280	; 0xff00
+ 800adea:	60fb      	str	r3, [r7, #12]
+  htim->Instance->SMCR = tmpsmcr;
+ 800adec:	687b      	ldr	r3, [r7, #4]
+ 800adee:	681b      	ldr	r3, [r3, #0]
+ 800adf0:	68fa      	ldr	r2, [r7, #12]
+ 800adf2:	609a      	str	r2, [r3, #8]
+
+  switch (sClockSourceConfig->ClockSource)
+ 800adf4:	683b      	ldr	r3, [r7, #0]
+ 800adf6:	681b      	ldr	r3, [r3, #0]
+ 800adf8:	2b40      	cmp	r3, #64	; 0x40
+ 800adfa:	d067      	beq.n	800aecc <HAL_TIM_ConfigClockSource+0x120>
+ 800adfc:	2b40      	cmp	r3, #64	; 0x40
+ 800adfe:	d80b      	bhi.n	800ae18 <HAL_TIM_ConfigClockSource+0x6c>
+ 800ae00:	2b10      	cmp	r3, #16
+ 800ae02:	d073      	beq.n	800aeec <HAL_TIM_ConfigClockSource+0x140>
+ 800ae04:	2b10      	cmp	r3, #16
+ 800ae06:	d802      	bhi.n	800ae0e <HAL_TIM_ConfigClockSource+0x62>
+ 800ae08:	2b00      	cmp	r3, #0
+ 800ae0a:	d06f      	beq.n	800aeec <HAL_TIM_ConfigClockSource+0x140>
+      TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
+      break;
+    }
+
+    default:
+      break;
+ 800ae0c:	e078      	b.n	800af00 <HAL_TIM_ConfigClockSource+0x154>
+  switch (sClockSourceConfig->ClockSource)
+ 800ae0e:	2b20      	cmp	r3, #32
+ 800ae10:	d06c      	beq.n	800aeec <HAL_TIM_ConfigClockSource+0x140>
+ 800ae12:	2b30      	cmp	r3, #48	; 0x30
+ 800ae14:	d06a      	beq.n	800aeec <HAL_TIM_ConfigClockSource+0x140>
+      break;
+ 800ae16:	e073      	b.n	800af00 <HAL_TIM_ConfigClockSource+0x154>
+  switch (sClockSourceConfig->ClockSource)
+ 800ae18:	2b70      	cmp	r3, #112	; 0x70
+ 800ae1a:	d00d      	beq.n	800ae38 <HAL_TIM_ConfigClockSource+0x8c>
+ 800ae1c:	2b70      	cmp	r3, #112	; 0x70
+ 800ae1e:	d804      	bhi.n	800ae2a <HAL_TIM_ConfigClockSource+0x7e>
+ 800ae20:	2b50      	cmp	r3, #80	; 0x50
+ 800ae22:	d033      	beq.n	800ae8c <HAL_TIM_ConfigClockSource+0xe0>
+ 800ae24:	2b60      	cmp	r3, #96	; 0x60
+ 800ae26:	d041      	beq.n	800aeac <HAL_TIM_ConfigClockSource+0x100>
+      break;
+ 800ae28:	e06a      	b.n	800af00 <HAL_TIM_ConfigClockSource+0x154>
+  switch (sClockSourceConfig->ClockSource)
+ 800ae2a:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
+ 800ae2e:	d066      	beq.n	800aefe <HAL_TIM_ConfigClockSource+0x152>
+ 800ae30:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
+ 800ae34:	d017      	beq.n	800ae66 <HAL_TIM_ConfigClockSource+0xba>
+      break;
+ 800ae36:	e063      	b.n	800af00 <HAL_TIM_ConfigClockSource+0x154>
+      TIM_ETR_SetConfig(htim->Instance,
+ 800ae38:	687b      	ldr	r3, [r7, #4]
+ 800ae3a:	6818      	ldr	r0, [r3, #0]
+ 800ae3c:	683b      	ldr	r3, [r7, #0]
+ 800ae3e:	6899      	ldr	r1, [r3, #8]
+ 800ae40:	683b      	ldr	r3, [r7, #0]
+ 800ae42:	685a      	ldr	r2, [r3, #4]
+ 800ae44:	683b      	ldr	r3, [r7, #0]
+ 800ae46:	68db      	ldr	r3, [r3, #12]
+ 800ae48:	f000 fcd4 	bl	800b7f4 <TIM_ETR_SetConfig>
+      tmpsmcr = htim->Instance->SMCR;
+ 800ae4c:	687b      	ldr	r3, [r7, #4]
+ 800ae4e:	681b      	ldr	r3, [r3, #0]
+ 800ae50:	689b      	ldr	r3, [r3, #8]
+ 800ae52:	60fb      	str	r3, [r7, #12]
+      tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
+ 800ae54:	68fb      	ldr	r3, [r7, #12]
+ 800ae56:	f043 0377 	orr.w	r3, r3, #119	; 0x77
+ 800ae5a:	60fb      	str	r3, [r7, #12]
+      htim->Instance->SMCR = tmpsmcr;
+ 800ae5c:	687b      	ldr	r3, [r7, #4]
+ 800ae5e:	681b      	ldr	r3, [r3, #0]
+ 800ae60:	68fa      	ldr	r2, [r7, #12]
+ 800ae62:	609a      	str	r2, [r3, #8]
+      break;
+ 800ae64:	e04c      	b.n	800af00 <HAL_TIM_ConfigClockSource+0x154>
+      TIM_ETR_SetConfig(htim->Instance,
+ 800ae66:	687b      	ldr	r3, [r7, #4]
+ 800ae68:	6818      	ldr	r0, [r3, #0]
+ 800ae6a:	683b      	ldr	r3, [r7, #0]
+ 800ae6c:	6899      	ldr	r1, [r3, #8]
+ 800ae6e:	683b      	ldr	r3, [r7, #0]
+ 800ae70:	685a      	ldr	r2, [r3, #4]
+ 800ae72:	683b      	ldr	r3, [r7, #0]
+ 800ae74:	68db      	ldr	r3, [r3, #12]
+ 800ae76:	f000 fcbd 	bl	800b7f4 <TIM_ETR_SetConfig>
+      htim->Instance->SMCR |= TIM_SMCR_ECE;
+ 800ae7a:	687b      	ldr	r3, [r7, #4]
+ 800ae7c:	681b      	ldr	r3, [r3, #0]
+ 800ae7e:	689a      	ldr	r2, [r3, #8]
+ 800ae80:	687b      	ldr	r3, [r7, #4]
+ 800ae82:	681b      	ldr	r3, [r3, #0]
+ 800ae84:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
+ 800ae88:	609a      	str	r2, [r3, #8]
+      break;
+ 800ae8a:	e039      	b.n	800af00 <HAL_TIM_ConfigClockSource+0x154>
+      TIM_TI1_ConfigInputStage(htim->Instance,
+ 800ae8c:	687b      	ldr	r3, [r7, #4]
+ 800ae8e:	6818      	ldr	r0, [r3, #0]
+ 800ae90:	683b      	ldr	r3, [r7, #0]
+ 800ae92:	6859      	ldr	r1, [r3, #4]
+ 800ae94:	683b      	ldr	r3, [r7, #0]
+ 800ae96:	68db      	ldr	r3, [r3, #12]
+ 800ae98:	461a      	mov	r2, r3
+ 800ae9a:	f000 fc31 	bl	800b700 <TIM_TI1_ConfigInputStage>
+      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
+ 800ae9e:	687b      	ldr	r3, [r7, #4]
+ 800aea0:	681b      	ldr	r3, [r3, #0]
+ 800aea2:	2150      	movs	r1, #80	; 0x50
+ 800aea4:	4618      	mov	r0, r3
+ 800aea6:	f000 fc8a 	bl	800b7be <TIM_ITRx_SetConfig>
+      break;
+ 800aeaa:	e029      	b.n	800af00 <HAL_TIM_ConfigClockSource+0x154>
+      TIM_TI2_ConfigInputStage(htim->Instance,
+ 800aeac:	687b      	ldr	r3, [r7, #4]
+ 800aeae:	6818      	ldr	r0, [r3, #0]
+ 800aeb0:	683b      	ldr	r3, [r7, #0]
+ 800aeb2:	6859      	ldr	r1, [r3, #4]
+ 800aeb4:	683b      	ldr	r3, [r7, #0]
+ 800aeb6:	68db      	ldr	r3, [r3, #12]
+ 800aeb8:	461a      	mov	r2, r3
+ 800aeba:	f000 fc50 	bl	800b75e <TIM_TI2_ConfigInputStage>
+      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
+ 800aebe:	687b      	ldr	r3, [r7, #4]
+ 800aec0:	681b      	ldr	r3, [r3, #0]
+ 800aec2:	2160      	movs	r1, #96	; 0x60
+ 800aec4:	4618      	mov	r0, r3
+ 800aec6:	f000 fc7a 	bl	800b7be <TIM_ITRx_SetConfig>
+      break;
+ 800aeca:	e019      	b.n	800af00 <HAL_TIM_ConfigClockSource+0x154>
+      TIM_TI1_ConfigInputStage(htim->Instance,
+ 800aecc:	687b      	ldr	r3, [r7, #4]
+ 800aece:	6818      	ldr	r0, [r3, #0]
+ 800aed0:	683b      	ldr	r3, [r7, #0]
+ 800aed2:	6859      	ldr	r1, [r3, #4]
+ 800aed4:	683b      	ldr	r3, [r7, #0]
+ 800aed6:	68db      	ldr	r3, [r3, #12]
+ 800aed8:	461a      	mov	r2, r3
+ 800aeda:	f000 fc11 	bl	800b700 <TIM_TI1_ConfigInputStage>
+      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
+ 800aede:	687b      	ldr	r3, [r7, #4]
+ 800aee0:	681b      	ldr	r3, [r3, #0]
+ 800aee2:	2140      	movs	r1, #64	; 0x40
+ 800aee4:	4618      	mov	r0, r3
+ 800aee6:	f000 fc6a 	bl	800b7be <TIM_ITRx_SetConfig>
+      break;
+ 800aeea:	e009      	b.n	800af00 <HAL_TIM_ConfigClockSource+0x154>
+      TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
+ 800aeec:	687b      	ldr	r3, [r7, #4]
+ 800aeee:	681a      	ldr	r2, [r3, #0]
+ 800aef0:	683b      	ldr	r3, [r7, #0]
+ 800aef2:	681b      	ldr	r3, [r3, #0]
+ 800aef4:	4619      	mov	r1, r3
+ 800aef6:	4610      	mov	r0, r2
+ 800aef8:	f000 fc61 	bl	800b7be <TIM_ITRx_SetConfig>
+      break;
+ 800aefc:	e000      	b.n	800af00 <HAL_TIM_ConfigClockSource+0x154>
+      break;
+ 800aefe:	bf00      	nop
+  }
+  htim->State = HAL_TIM_STATE_READY;
+ 800af00:	687b      	ldr	r3, [r7, #4]
+ 800af02:	2201      	movs	r2, #1
+ 800af04:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  __HAL_UNLOCK(htim);
+ 800af08:	687b      	ldr	r3, [r7, #4]
+ 800af0a:	2200      	movs	r2, #0
+ 800af0c:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  return HAL_OK;
+ 800af10:	2300      	movs	r3, #0
+}
+ 800af12:	4618      	mov	r0, r3
+ 800af14:	3710      	adds	r7, #16
+ 800af16:	46bd      	mov	sp, r7
+ 800af18:	bd80      	pop	{r7, pc}
+ 800af1a:	bf00      	nop
+ 800af1c:	fffeff88 	.word	0xfffeff88
+
+0800af20 <HAL_TIM_SlaveConfigSynchro>:
+  *         timer input or external trigger input) and the Slave mode
+  *         (Disable, Reset, Gated, Trigger, External clock mode 1).
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig)
+{
+ 800af20:	b580      	push	{r7, lr}
+ 800af22:	b082      	sub	sp, #8
+ 800af24:	af00      	add	r7, sp, #0
+ 800af26:	6078      	str	r0, [r7, #4]
+ 800af28:	6039      	str	r1, [r7, #0]
+  /* Check the parameters */
+  assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
+  assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
+  assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
+
+  __HAL_LOCK(htim);
+ 800af2a:	687b      	ldr	r3, [r7, #4]
+ 800af2c:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
+ 800af30:	2b01      	cmp	r3, #1
+ 800af32:	d101      	bne.n	800af38 <HAL_TIM_SlaveConfigSynchro+0x18>
+ 800af34:	2302      	movs	r3, #2
+ 800af36:	e031      	b.n	800af9c <HAL_TIM_SlaveConfigSynchro+0x7c>
+ 800af38:	687b      	ldr	r3, [r7, #4]
+ 800af3a:	2201      	movs	r2, #1
+ 800af3c:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  htim->State = HAL_TIM_STATE_BUSY;
+ 800af40:	687b      	ldr	r3, [r7, #4]
+ 800af42:	2202      	movs	r2, #2
+ 800af44:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK)
+ 800af48:	6839      	ldr	r1, [r7, #0]
+ 800af4a:	6878      	ldr	r0, [r7, #4]
+ 800af4c:	f000 fb50 	bl	800b5f0 <TIM_SlaveTimer_SetConfig>
+ 800af50:	4603      	mov	r3, r0
+ 800af52:	2b00      	cmp	r3, #0
+ 800af54:	d009      	beq.n	800af6a <HAL_TIM_SlaveConfigSynchro+0x4a>
+  {
+    htim->State = HAL_TIM_STATE_READY;
+ 800af56:	687b      	ldr	r3, [r7, #4]
+ 800af58:	2201      	movs	r2, #1
+ 800af5a:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+    __HAL_UNLOCK(htim);
+ 800af5e:	687b      	ldr	r3, [r7, #4]
+ 800af60:	2200      	movs	r2, #0
+ 800af62:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+    return HAL_ERROR;
+ 800af66:	2301      	movs	r3, #1
+ 800af68:	e018      	b.n	800af9c <HAL_TIM_SlaveConfigSynchro+0x7c>
+  }
+
+  /* Disable Trigger Interrupt */
+  __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER);
+ 800af6a:	687b      	ldr	r3, [r7, #4]
+ 800af6c:	681b      	ldr	r3, [r3, #0]
+ 800af6e:	68da      	ldr	r2, [r3, #12]
+ 800af70:	687b      	ldr	r3, [r7, #4]
+ 800af72:	681b      	ldr	r3, [r3, #0]
+ 800af74:	f022 0240 	bic.w	r2, r2, #64	; 0x40
+ 800af78:	60da      	str	r2, [r3, #12]
+
+  /* Disable Trigger DMA request */
+  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
+ 800af7a:	687b      	ldr	r3, [r7, #4]
+ 800af7c:	681b      	ldr	r3, [r3, #0]
+ 800af7e:	68da      	ldr	r2, [r3, #12]
+ 800af80:	687b      	ldr	r3, [r7, #4]
+ 800af82:	681b      	ldr	r3, [r3, #0]
+ 800af84:	f422 4280 	bic.w	r2, r2, #16384	; 0x4000
+ 800af88:	60da      	str	r2, [r3, #12]
+
+  htim->State = HAL_TIM_STATE_READY;
+ 800af8a:	687b      	ldr	r3, [r7, #4]
+ 800af8c:	2201      	movs	r2, #1
+ 800af8e:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  __HAL_UNLOCK(htim);
+ 800af92:	687b      	ldr	r3, [r7, #4]
+ 800af94:	2200      	movs	r2, #0
+ 800af96:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  return HAL_OK;
+ 800af9a:	2300      	movs	r3, #0
+}
+ 800af9c:	4618      	mov	r0, r3
+ 800af9e:	3708      	adds	r7, #8
+ 800afa0:	46bd      	mov	sp, r7
+ 800afa2:	bd80      	pop	{r7, pc}
+
+0800afa4 <HAL_TIM_OC_DelayElapsedCallback>:
+  * @brief  Output Compare callback in non-blocking mode
+  * @param  htim TIM OC handle
+  * @retval None
+  */
+__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ 800afa4:	b480      	push	{r7}
+ 800afa6:	b083      	sub	sp, #12
+ 800afa8:	af00      	add	r7, sp, #0
+ 800afaa:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
+   */
+}
+ 800afac:	bf00      	nop
+ 800afae:	370c      	adds	r7, #12
+ 800afb0:	46bd      	mov	sp, r7
+ 800afb2:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800afb6:	4770      	bx	lr
+
+0800afb8 <HAL_TIM_IC_CaptureCallback>:
+  * @brief  Input Capture callback in non-blocking mode
+  * @param  htim TIM IC handle
+  * @retval None
+  */
+__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
+{
+ 800afb8:	b480      	push	{r7}
+ 800afba:	b083      	sub	sp, #12
+ 800afbc:	af00      	add	r7, sp, #0
+ 800afbe:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_IC_CaptureCallback could be implemented in the user file
+   */
+}
+ 800afc0:	bf00      	nop
+ 800afc2:	370c      	adds	r7, #12
+ 800afc4:	46bd      	mov	sp, r7
+ 800afc6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800afca:	4770      	bx	lr
+
+0800afcc <HAL_TIM_PWM_PulseFinishedCallback>:
+  * @brief  PWM Pulse finished callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
+{
+ 800afcc:	b480      	push	{r7}
+ 800afce:	b083      	sub	sp, #12
+ 800afd0:	af00      	add	r7, sp, #0
+ 800afd2:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
+   */
+}
+ 800afd4:	bf00      	nop
+ 800afd6:	370c      	adds	r7, #12
+ 800afd8:	46bd      	mov	sp, r7
+ 800afda:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800afde:	4770      	bx	lr
+
+0800afe0 <HAL_TIM_TriggerCallback>:
+  * @brief  Hall Trigger detection callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
+{
+ 800afe0:	b480      	push	{r7}
+ 800afe2:	b083      	sub	sp, #12
+ 800afe4:	af00      	add	r7, sp, #0
+ 800afe6:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_TriggerCallback could be implemented in the user file
+   */
+}
+ 800afe8:	bf00      	nop
+ 800afea:	370c      	adds	r7, #12
+ 800afec:	46bd      	mov	sp, r7
+ 800afee:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800aff2:	4770      	bx	lr
+
+0800aff4 <TIM_Base_SetConfig>:
+  * @param  TIMx TIM peripheral
+  * @param  Structure TIM Base configuration structure
+  * @retval None
+  */
+void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
+{
+ 800aff4:	b480      	push	{r7}
+ 800aff6:	b085      	sub	sp, #20
+ 800aff8:	af00      	add	r7, sp, #0
+ 800affa:	6078      	str	r0, [r7, #4]
+ 800affc:	6039      	str	r1, [r7, #0]
+  uint32_t tmpcr1;
+  tmpcr1 = TIMx->CR1;
+ 800affe:	687b      	ldr	r3, [r7, #4]
+ 800b000:	681b      	ldr	r3, [r3, #0]
+ 800b002:	60fb      	str	r3, [r7, #12]
+
+  /* Set TIM Time Base Unit parameters ---------------------------------------*/
+  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
+ 800b004:	687b      	ldr	r3, [r7, #4]
+ 800b006:	4a40      	ldr	r2, [pc, #256]	; (800b108 <TIM_Base_SetConfig+0x114>)
+ 800b008:	4293      	cmp	r3, r2
+ 800b00a:	d013      	beq.n	800b034 <TIM_Base_SetConfig+0x40>
+ 800b00c:	687b      	ldr	r3, [r7, #4]
+ 800b00e:	f1b3 4f80 	cmp.w	r3, #1073741824	; 0x40000000
+ 800b012:	d00f      	beq.n	800b034 <TIM_Base_SetConfig+0x40>
+ 800b014:	687b      	ldr	r3, [r7, #4]
+ 800b016:	4a3d      	ldr	r2, [pc, #244]	; (800b10c <TIM_Base_SetConfig+0x118>)
+ 800b018:	4293      	cmp	r3, r2
+ 800b01a:	d00b      	beq.n	800b034 <TIM_Base_SetConfig+0x40>
+ 800b01c:	687b      	ldr	r3, [r7, #4]
+ 800b01e:	4a3c      	ldr	r2, [pc, #240]	; (800b110 <TIM_Base_SetConfig+0x11c>)
+ 800b020:	4293      	cmp	r3, r2
+ 800b022:	d007      	beq.n	800b034 <TIM_Base_SetConfig+0x40>
+ 800b024:	687b      	ldr	r3, [r7, #4]
+ 800b026:	4a3b      	ldr	r2, [pc, #236]	; (800b114 <TIM_Base_SetConfig+0x120>)
+ 800b028:	4293      	cmp	r3, r2
+ 800b02a:	d003      	beq.n	800b034 <TIM_Base_SetConfig+0x40>
+ 800b02c:	687b      	ldr	r3, [r7, #4]
+ 800b02e:	4a3a      	ldr	r2, [pc, #232]	; (800b118 <TIM_Base_SetConfig+0x124>)
+ 800b030:	4293      	cmp	r3, r2
+ 800b032:	d108      	bne.n	800b046 <TIM_Base_SetConfig+0x52>
+  {
+    /* Select the Counter Mode */
+    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
+ 800b034:	68fb      	ldr	r3, [r7, #12]
+ 800b036:	f023 0370 	bic.w	r3, r3, #112	; 0x70
+ 800b03a:	60fb      	str	r3, [r7, #12]
+    tmpcr1 |= Structure->CounterMode;
+ 800b03c:	683b      	ldr	r3, [r7, #0]
+ 800b03e:	685b      	ldr	r3, [r3, #4]
+ 800b040:	68fa      	ldr	r2, [r7, #12]
+ 800b042:	4313      	orrs	r3, r2
+ 800b044:	60fb      	str	r3, [r7, #12]
+  }
+
+  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
+ 800b046:	687b      	ldr	r3, [r7, #4]
+ 800b048:	4a2f      	ldr	r2, [pc, #188]	; (800b108 <TIM_Base_SetConfig+0x114>)
+ 800b04a:	4293      	cmp	r3, r2
+ 800b04c:	d02b      	beq.n	800b0a6 <TIM_Base_SetConfig+0xb2>
+ 800b04e:	687b      	ldr	r3, [r7, #4]
+ 800b050:	f1b3 4f80 	cmp.w	r3, #1073741824	; 0x40000000
+ 800b054:	d027      	beq.n	800b0a6 <TIM_Base_SetConfig+0xb2>
+ 800b056:	687b      	ldr	r3, [r7, #4]
+ 800b058:	4a2c      	ldr	r2, [pc, #176]	; (800b10c <TIM_Base_SetConfig+0x118>)
+ 800b05a:	4293      	cmp	r3, r2
+ 800b05c:	d023      	beq.n	800b0a6 <TIM_Base_SetConfig+0xb2>
+ 800b05e:	687b      	ldr	r3, [r7, #4]
+ 800b060:	4a2b      	ldr	r2, [pc, #172]	; (800b110 <TIM_Base_SetConfig+0x11c>)
+ 800b062:	4293      	cmp	r3, r2
+ 800b064:	d01f      	beq.n	800b0a6 <TIM_Base_SetConfig+0xb2>
+ 800b066:	687b      	ldr	r3, [r7, #4]
+ 800b068:	4a2a      	ldr	r2, [pc, #168]	; (800b114 <TIM_Base_SetConfig+0x120>)
+ 800b06a:	4293      	cmp	r3, r2
+ 800b06c:	d01b      	beq.n	800b0a6 <TIM_Base_SetConfig+0xb2>
+ 800b06e:	687b      	ldr	r3, [r7, #4]
+ 800b070:	4a29      	ldr	r2, [pc, #164]	; (800b118 <TIM_Base_SetConfig+0x124>)
+ 800b072:	4293      	cmp	r3, r2
+ 800b074:	d017      	beq.n	800b0a6 <TIM_Base_SetConfig+0xb2>
+ 800b076:	687b      	ldr	r3, [r7, #4]
+ 800b078:	4a28      	ldr	r2, [pc, #160]	; (800b11c <TIM_Base_SetConfig+0x128>)
+ 800b07a:	4293      	cmp	r3, r2
+ 800b07c:	d013      	beq.n	800b0a6 <TIM_Base_SetConfig+0xb2>
+ 800b07e:	687b      	ldr	r3, [r7, #4]
+ 800b080:	4a27      	ldr	r2, [pc, #156]	; (800b120 <TIM_Base_SetConfig+0x12c>)
+ 800b082:	4293      	cmp	r3, r2
+ 800b084:	d00f      	beq.n	800b0a6 <TIM_Base_SetConfig+0xb2>
+ 800b086:	687b      	ldr	r3, [r7, #4]
+ 800b088:	4a26      	ldr	r2, [pc, #152]	; (800b124 <TIM_Base_SetConfig+0x130>)
+ 800b08a:	4293      	cmp	r3, r2
+ 800b08c:	d00b      	beq.n	800b0a6 <TIM_Base_SetConfig+0xb2>
+ 800b08e:	687b      	ldr	r3, [r7, #4]
+ 800b090:	4a25      	ldr	r2, [pc, #148]	; (800b128 <TIM_Base_SetConfig+0x134>)
+ 800b092:	4293      	cmp	r3, r2
+ 800b094:	d007      	beq.n	800b0a6 <TIM_Base_SetConfig+0xb2>
+ 800b096:	687b      	ldr	r3, [r7, #4]
+ 800b098:	4a24      	ldr	r2, [pc, #144]	; (800b12c <TIM_Base_SetConfig+0x138>)
+ 800b09a:	4293      	cmp	r3, r2
+ 800b09c:	d003      	beq.n	800b0a6 <TIM_Base_SetConfig+0xb2>
+ 800b09e:	687b      	ldr	r3, [r7, #4]
+ 800b0a0:	4a23      	ldr	r2, [pc, #140]	; (800b130 <TIM_Base_SetConfig+0x13c>)
+ 800b0a2:	4293      	cmp	r3, r2
+ 800b0a4:	d108      	bne.n	800b0b8 <TIM_Base_SetConfig+0xc4>
+  {
+    /* Set the clock division */
+    tmpcr1 &= ~TIM_CR1_CKD;
+ 800b0a6:	68fb      	ldr	r3, [r7, #12]
+ 800b0a8:	f423 7340 	bic.w	r3, r3, #768	; 0x300
+ 800b0ac:	60fb      	str	r3, [r7, #12]
+    tmpcr1 |= (uint32_t)Structure->ClockDivision;
+ 800b0ae:	683b      	ldr	r3, [r7, #0]
+ 800b0b0:	68db      	ldr	r3, [r3, #12]
+ 800b0b2:	68fa      	ldr	r2, [r7, #12]
+ 800b0b4:	4313      	orrs	r3, r2
+ 800b0b6:	60fb      	str	r3, [r7, #12]
+  }
+
+  /* Set the auto-reload preload */
+  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
+ 800b0b8:	68fb      	ldr	r3, [r7, #12]
+ 800b0ba:	f023 0280 	bic.w	r2, r3, #128	; 0x80
+ 800b0be:	683b      	ldr	r3, [r7, #0]
+ 800b0c0:	695b      	ldr	r3, [r3, #20]
+ 800b0c2:	4313      	orrs	r3, r2
+ 800b0c4:	60fb      	str	r3, [r7, #12]
+
+  TIMx->CR1 = tmpcr1;
+ 800b0c6:	687b      	ldr	r3, [r7, #4]
+ 800b0c8:	68fa      	ldr	r2, [r7, #12]
+ 800b0ca:	601a      	str	r2, [r3, #0]
+
+  /* Set the Autoreload value */
+  TIMx->ARR = (uint32_t)Structure->Period ;
+ 800b0cc:	683b      	ldr	r3, [r7, #0]
+ 800b0ce:	689a      	ldr	r2, [r3, #8]
+ 800b0d0:	687b      	ldr	r3, [r7, #4]
+ 800b0d2:	62da      	str	r2, [r3, #44]	; 0x2c
+
+  /* Set the Prescaler value */
+  TIMx->PSC = Structure->Prescaler;
+ 800b0d4:	683b      	ldr	r3, [r7, #0]
+ 800b0d6:	681a      	ldr	r2, [r3, #0]
+ 800b0d8:	687b      	ldr	r3, [r7, #4]
+ 800b0da:	629a      	str	r2, [r3, #40]	; 0x28
+
+  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
+ 800b0dc:	687b      	ldr	r3, [r7, #4]
+ 800b0de:	4a0a      	ldr	r2, [pc, #40]	; (800b108 <TIM_Base_SetConfig+0x114>)
+ 800b0e0:	4293      	cmp	r3, r2
+ 800b0e2:	d003      	beq.n	800b0ec <TIM_Base_SetConfig+0xf8>
+ 800b0e4:	687b      	ldr	r3, [r7, #4]
+ 800b0e6:	4a0c      	ldr	r2, [pc, #48]	; (800b118 <TIM_Base_SetConfig+0x124>)
+ 800b0e8:	4293      	cmp	r3, r2
+ 800b0ea:	d103      	bne.n	800b0f4 <TIM_Base_SetConfig+0x100>
+  {
+    /* Set the Repetition Counter value */
+    TIMx->RCR = Structure->RepetitionCounter;
+ 800b0ec:	683b      	ldr	r3, [r7, #0]
+ 800b0ee:	691a      	ldr	r2, [r3, #16]
+ 800b0f0:	687b      	ldr	r3, [r7, #4]
+ 800b0f2:	631a      	str	r2, [r3, #48]	; 0x30
+  }
+
+  /* Generate an update event to reload the Prescaler
+     and the repetition counter (only for advanced timer) value immediately */
+  TIMx->EGR = TIM_EGR_UG;
+ 800b0f4:	687b      	ldr	r3, [r7, #4]
+ 800b0f6:	2201      	movs	r2, #1
+ 800b0f8:	615a      	str	r2, [r3, #20]
+}
+ 800b0fa:	bf00      	nop
+ 800b0fc:	3714      	adds	r7, #20
+ 800b0fe:	46bd      	mov	sp, r7
+ 800b100:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b104:	4770      	bx	lr
+ 800b106:	bf00      	nop
+ 800b108:	40010000 	.word	0x40010000
+ 800b10c:	40000400 	.word	0x40000400
+ 800b110:	40000800 	.word	0x40000800
+ 800b114:	40000c00 	.word	0x40000c00
+ 800b118:	40010400 	.word	0x40010400
+ 800b11c:	40014000 	.word	0x40014000
+ 800b120:	40014400 	.word	0x40014400
+ 800b124:	40014800 	.word	0x40014800
+ 800b128:	40001800 	.word	0x40001800
+ 800b12c:	40001c00 	.word	0x40001c00
+ 800b130:	40002000 	.word	0x40002000
+
+0800b134 <TIM_OC1_SetConfig>:
+  * @param  TIMx to select the TIM peripheral
+  * @param  OC_Config The ouput configuration structure
+  * @retval None
+  */
+static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
+{
+ 800b134:	b480      	push	{r7}
+ 800b136:	b087      	sub	sp, #28
+ 800b138:	af00      	add	r7, sp, #0
+ 800b13a:	6078      	str	r0, [r7, #4]
+ 800b13c:	6039      	str	r1, [r7, #0]
+  uint32_t tmpccmrx;
+  uint32_t tmpccer;
+  uint32_t tmpcr2;
+
+  /* Disable the Channel 1: Reset the CC1E Bit */
+  TIMx->CCER &= ~TIM_CCER_CC1E;
+ 800b13e:	687b      	ldr	r3, [r7, #4]
+ 800b140:	6a1b      	ldr	r3, [r3, #32]
+ 800b142:	f023 0201 	bic.w	r2, r3, #1
+ 800b146:	687b      	ldr	r3, [r7, #4]
+ 800b148:	621a      	str	r2, [r3, #32]
+
+  /* Get the TIMx CCER register value */
+  tmpccer = TIMx->CCER;
+ 800b14a:	687b      	ldr	r3, [r7, #4]
+ 800b14c:	6a1b      	ldr	r3, [r3, #32]
+ 800b14e:	617b      	str	r3, [r7, #20]
+  /* Get the TIMx CR2 register value */
+  tmpcr2 =  TIMx->CR2;
+ 800b150:	687b      	ldr	r3, [r7, #4]
+ 800b152:	685b      	ldr	r3, [r3, #4]
+ 800b154:	613b      	str	r3, [r7, #16]
+
+  /* Get the TIMx CCMR1 register value */
+  tmpccmrx = TIMx->CCMR1;
+ 800b156:	687b      	ldr	r3, [r7, #4]
+ 800b158:	699b      	ldr	r3, [r3, #24]
+ 800b15a:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Compare Mode Bits */
+  tmpccmrx &= ~TIM_CCMR1_OC1M;
+ 800b15c:	68fa      	ldr	r2, [r7, #12]
+ 800b15e:	4b2b      	ldr	r3, [pc, #172]	; (800b20c <TIM_OC1_SetConfig+0xd8>)
+ 800b160:	4013      	ands	r3, r2
+ 800b162:	60fb      	str	r3, [r7, #12]
+  tmpccmrx &= ~TIM_CCMR1_CC1S;
+ 800b164:	68fb      	ldr	r3, [r7, #12]
+ 800b166:	f023 0303 	bic.w	r3, r3, #3
+ 800b16a:	60fb      	str	r3, [r7, #12]
+  /* Select the Output Compare Mode */
+  tmpccmrx |= OC_Config->OCMode;
+ 800b16c:	683b      	ldr	r3, [r7, #0]
+ 800b16e:	681b      	ldr	r3, [r3, #0]
+ 800b170:	68fa      	ldr	r2, [r7, #12]
+ 800b172:	4313      	orrs	r3, r2
+ 800b174:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Polarity level */
+  tmpccer &= ~TIM_CCER_CC1P;
+ 800b176:	697b      	ldr	r3, [r7, #20]
+ 800b178:	f023 0302 	bic.w	r3, r3, #2
+ 800b17c:	617b      	str	r3, [r7, #20]
+  /* Set the Output Compare Polarity */
+  tmpccer |= OC_Config->OCPolarity;
+ 800b17e:	683b      	ldr	r3, [r7, #0]
+ 800b180:	689b      	ldr	r3, [r3, #8]
+ 800b182:	697a      	ldr	r2, [r7, #20]
+ 800b184:	4313      	orrs	r3, r2
+ 800b186:	617b      	str	r3, [r7, #20]
+
+  if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
+ 800b188:	687b      	ldr	r3, [r7, #4]
+ 800b18a:	4a21      	ldr	r2, [pc, #132]	; (800b210 <TIM_OC1_SetConfig+0xdc>)
+ 800b18c:	4293      	cmp	r3, r2
+ 800b18e:	d003      	beq.n	800b198 <TIM_OC1_SetConfig+0x64>
+ 800b190:	687b      	ldr	r3, [r7, #4]
+ 800b192:	4a20      	ldr	r2, [pc, #128]	; (800b214 <TIM_OC1_SetConfig+0xe0>)
+ 800b194:	4293      	cmp	r3, r2
+ 800b196:	d10c      	bne.n	800b1b2 <TIM_OC1_SetConfig+0x7e>
+  {
+    /* Check parameters */
+    assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
+
+    /* Reset the Output N Polarity level */
+    tmpccer &= ~TIM_CCER_CC1NP;
+ 800b198:	697b      	ldr	r3, [r7, #20]
+ 800b19a:	f023 0308 	bic.w	r3, r3, #8
+ 800b19e:	617b      	str	r3, [r7, #20]
+    /* Set the Output N Polarity */
+    tmpccer |= OC_Config->OCNPolarity;
+ 800b1a0:	683b      	ldr	r3, [r7, #0]
+ 800b1a2:	68db      	ldr	r3, [r3, #12]
+ 800b1a4:	697a      	ldr	r2, [r7, #20]
+ 800b1a6:	4313      	orrs	r3, r2
+ 800b1a8:	617b      	str	r3, [r7, #20]
+    /* Reset the Output N State */
+    tmpccer &= ~TIM_CCER_CC1NE;
+ 800b1aa:	697b      	ldr	r3, [r7, #20]
+ 800b1ac:	f023 0304 	bic.w	r3, r3, #4
+ 800b1b0:	617b      	str	r3, [r7, #20]
+  }
+
+  if (IS_TIM_BREAK_INSTANCE(TIMx))
+ 800b1b2:	687b      	ldr	r3, [r7, #4]
+ 800b1b4:	4a16      	ldr	r2, [pc, #88]	; (800b210 <TIM_OC1_SetConfig+0xdc>)
+ 800b1b6:	4293      	cmp	r3, r2
+ 800b1b8:	d003      	beq.n	800b1c2 <TIM_OC1_SetConfig+0x8e>
+ 800b1ba:	687b      	ldr	r3, [r7, #4]
+ 800b1bc:	4a15      	ldr	r2, [pc, #84]	; (800b214 <TIM_OC1_SetConfig+0xe0>)
+ 800b1be:	4293      	cmp	r3, r2
+ 800b1c0:	d111      	bne.n	800b1e6 <TIM_OC1_SetConfig+0xb2>
+    /* Check parameters */
+    assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
+    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
+
+    /* Reset the Output Compare and Output Compare N IDLE State */
+    tmpcr2 &= ~TIM_CR2_OIS1;
+ 800b1c2:	693b      	ldr	r3, [r7, #16]
+ 800b1c4:	f423 7380 	bic.w	r3, r3, #256	; 0x100
+ 800b1c8:	613b      	str	r3, [r7, #16]
+    tmpcr2 &= ~TIM_CR2_OIS1N;
+ 800b1ca:	693b      	ldr	r3, [r7, #16]
+ 800b1cc:	f423 7300 	bic.w	r3, r3, #512	; 0x200
+ 800b1d0:	613b      	str	r3, [r7, #16]
+    /* Set the Output Idle state */
+    tmpcr2 |= OC_Config->OCIdleState;
+ 800b1d2:	683b      	ldr	r3, [r7, #0]
+ 800b1d4:	695b      	ldr	r3, [r3, #20]
+ 800b1d6:	693a      	ldr	r2, [r7, #16]
+ 800b1d8:	4313      	orrs	r3, r2
+ 800b1da:	613b      	str	r3, [r7, #16]
+    /* Set the Output N Idle state */
+    tmpcr2 |= OC_Config->OCNIdleState;
+ 800b1dc:	683b      	ldr	r3, [r7, #0]
+ 800b1de:	699b      	ldr	r3, [r3, #24]
+ 800b1e0:	693a      	ldr	r2, [r7, #16]
+ 800b1e2:	4313      	orrs	r3, r2
+ 800b1e4:	613b      	str	r3, [r7, #16]
+  }
+
+  /* Write to TIMx CR2 */
+  TIMx->CR2 = tmpcr2;
+ 800b1e6:	687b      	ldr	r3, [r7, #4]
+ 800b1e8:	693a      	ldr	r2, [r7, #16]
+ 800b1ea:	605a      	str	r2, [r3, #4]
+
+  /* Write to TIMx CCMR1 */
+  TIMx->CCMR1 = tmpccmrx;
+ 800b1ec:	687b      	ldr	r3, [r7, #4]
+ 800b1ee:	68fa      	ldr	r2, [r7, #12]
+ 800b1f0:	619a      	str	r2, [r3, #24]
+
+  /* Set the Capture Compare Register value */
+  TIMx->CCR1 = OC_Config->Pulse;
+ 800b1f2:	683b      	ldr	r3, [r7, #0]
+ 800b1f4:	685a      	ldr	r2, [r3, #4]
+ 800b1f6:	687b      	ldr	r3, [r7, #4]
+ 800b1f8:	635a      	str	r2, [r3, #52]	; 0x34
+
+  /* Write to TIMx CCER */
+  TIMx->CCER = tmpccer;
+ 800b1fa:	687b      	ldr	r3, [r7, #4]
+ 800b1fc:	697a      	ldr	r2, [r7, #20]
+ 800b1fe:	621a      	str	r2, [r3, #32]
+}
+ 800b200:	bf00      	nop
+ 800b202:	371c      	adds	r7, #28
+ 800b204:	46bd      	mov	sp, r7
+ 800b206:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b20a:	4770      	bx	lr
+ 800b20c:	fffeff8f 	.word	0xfffeff8f
+ 800b210:	40010000 	.word	0x40010000
+ 800b214:	40010400 	.word	0x40010400
+
+0800b218 <TIM_OC2_SetConfig>:
+  * @param  TIMx to select the TIM peripheral
+  * @param  OC_Config The ouput configuration structure
+  * @retval None
+  */
+void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
+{
+ 800b218:	b480      	push	{r7}
+ 800b21a:	b087      	sub	sp, #28
+ 800b21c:	af00      	add	r7, sp, #0
+ 800b21e:	6078      	str	r0, [r7, #4]
+ 800b220:	6039      	str	r1, [r7, #0]
+  uint32_t tmpccmrx;
+  uint32_t tmpccer;
+  uint32_t tmpcr2;
+
+  /* Disable the Channel 2: Reset the CC2E Bit */
+  TIMx->CCER &= ~TIM_CCER_CC2E;
+ 800b222:	687b      	ldr	r3, [r7, #4]
+ 800b224:	6a1b      	ldr	r3, [r3, #32]
+ 800b226:	f023 0210 	bic.w	r2, r3, #16
+ 800b22a:	687b      	ldr	r3, [r7, #4]
+ 800b22c:	621a      	str	r2, [r3, #32]
+
+  /* Get the TIMx CCER register value */
+  tmpccer = TIMx->CCER;
+ 800b22e:	687b      	ldr	r3, [r7, #4]
+ 800b230:	6a1b      	ldr	r3, [r3, #32]
+ 800b232:	617b      	str	r3, [r7, #20]
+  /* Get the TIMx CR2 register value */
+  tmpcr2 =  TIMx->CR2;
+ 800b234:	687b      	ldr	r3, [r7, #4]
+ 800b236:	685b      	ldr	r3, [r3, #4]
+ 800b238:	613b      	str	r3, [r7, #16]
+
+  /* Get the TIMx CCMR1 register value */
+  tmpccmrx = TIMx->CCMR1;
+ 800b23a:	687b      	ldr	r3, [r7, #4]
+ 800b23c:	699b      	ldr	r3, [r3, #24]
+ 800b23e:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Compare mode and Capture/Compare selection Bits */
+  tmpccmrx &= ~TIM_CCMR1_OC2M;
+ 800b240:	68fa      	ldr	r2, [r7, #12]
+ 800b242:	4b2e      	ldr	r3, [pc, #184]	; (800b2fc <TIM_OC2_SetConfig+0xe4>)
+ 800b244:	4013      	ands	r3, r2
+ 800b246:	60fb      	str	r3, [r7, #12]
+  tmpccmrx &= ~TIM_CCMR1_CC2S;
+ 800b248:	68fb      	ldr	r3, [r7, #12]
+ 800b24a:	f423 7340 	bic.w	r3, r3, #768	; 0x300
+ 800b24e:	60fb      	str	r3, [r7, #12]
+
+  /* Select the Output Compare Mode */
+  tmpccmrx |= (OC_Config->OCMode << 8U);
+ 800b250:	683b      	ldr	r3, [r7, #0]
+ 800b252:	681b      	ldr	r3, [r3, #0]
+ 800b254:	021b      	lsls	r3, r3, #8
+ 800b256:	68fa      	ldr	r2, [r7, #12]
+ 800b258:	4313      	orrs	r3, r2
+ 800b25a:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Polarity level */
+  tmpccer &= ~TIM_CCER_CC2P;
+ 800b25c:	697b      	ldr	r3, [r7, #20]
+ 800b25e:	f023 0320 	bic.w	r3, r3, #32
+ 800b262:	617b      	str	r3, [r7, #20]
+  /* Set the Output Compare Polarity */
+  tmpccer |= (OC_Config->OCPolarity << 4U);
+ 800b264:	683b      	ldr	r3, [r7, #0]
+ 800b266:	689b      	ldr	r3, [r3, #8]
+ 800b268:	011b      	lsls	r3, r3, #4
+ 800b26a:	697a      	ldr	r2, [r7, #20]
+ 800b26c:	4313      	orrs	r3, r2
+ 800b26e:	617b      	str	r3, [r7, #20]
+
+  if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
+ 800b270:	687b      	ldr	r3, [r7, #4]
+ 800b272:	4a23      	ldr	r2, [pc, #140]	; (800b300 <TIM_OC2_SetConfig+0xe8>)
+ 800b274:	4293      	cmp	r3, r2
+ 800b276:	d003      	beq.n	800b280 <TIM_OC2_SetConfig+0x68>
+ 800b278:	687b      	ldr	r3, [r7, #4]
+ 800b27a:	4a22      	ldr	r2, [pc, #136]	; (800b304 <TIM_OC2_SetConfig+0xec>)
+ 800b27c:	4293      	cmp	r3, r2
+ 800b27e:	d10d      	bne.n	800b29c <TIM_OC2_SetConfig+0x84>
+  {
+    assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
+
+    /* Reset the Output N Polarity level */
+    tmpccer &= ~TIM_CCER_CC2NP;
+ 800b280:	697b      	ldr	r3, [r7, #20]
+ 800b282:	f023 0380 	bic.w	r3, r3, #128	; 0x80
+ 800b286:	617b      	str	r3, [r7, #20]
+    /* Set the Output N Polarity */
+    tmpccer |= (OC_Config->OCNPolarity << 4U);
+ 800b288:	683b      	ldr	r3, [r7, #0]
+ 800b28a:	68db      	ldr	r3, [r3, #12]
+ 800b28c:	011b      	lsls	r3, r3, #4
+ 800b28e:	697a      	ldr	r2, [r7, #20]
+ 800b290:	4313      	orrs	r3, r2
+ 800b292:	617b      	str	r3, [r7, #20]
+    /* Reset the Output N State */
+    tmpccer &= ~TIM_CCER_CC2NE;
+ 800b294:	697b      	ldr	r3, [r7, #20]
+ 800b296:	f023 0340 	bic.w	r3, r3, #64	; 0x40
+ 800b29a:	617b      	str	r3, [r7, #20]
+
+  }
+
+  if (IS_TIM_BREAK_INSTANCE(TIMx))
+ 800b29c:	687b      	ldr	r3, [r7, #4]
+ 800b29e:	4a18      	ldr	r2, [pc, #96]	; (800b300 <TIM_OC2_SetConfig+0xe8>)
+ 800b2a0:	4293      	cmp	r3, r2
+ 800b2a2:	d003      	beq.n	800b2ac <TIM_OC2_SetConfig+0x94>
+ 800b2a4:	687b      	ldr	r3, [r7, #4]
+ 800b2a6:	4a17      	ldr	r2, [pc, #92]	; (800b304 <TIM_OC2_SetConfig+0xec>)
+ 800b2a8:	4293      	cmp	r3, r2
+ 800b2aa:	d113      	bne.n	800b2d4 <TIM_OC2_SetConfig+0xbc>
+    /* Check parameters */
+    assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
+    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
+
+    /* Reset the Output Compare and Output Compare N IDLE State */
+    tmpcr2 &= ~TIM_CR2_OIS2;
+ 800b2ac:	693b      	ldr	r3, [r7, #16]
+ 800b2ae:	f423 6380 	bic.w	r3, r3, #1024	; 0x400
+ 800b2b2:	613b      	str	r3, [r7, #16]
+    tmpcr2 &= ~TIM_CR2_OIS2N;
+ 800b2b4:	693b      	ldr	r3, [r7, #16]
+ 800b2b6:	f423 6300 	bic.w	r3, r3, #2048	; 0x800
+ 800b2ba:	613b      	str	r3, [r7, #16]
+    /* Set the Output Idle state */
+    tmpcr2 |= (OC_Config->OCIdleState << 2U);
+ 800b2bc:	683b      	ldr	r3, [r7, #0]
+ 800b2be:	695b      	ldr	r3, [r3, #20]
+ 800b2c0:	009b      	lsls	r3, r3, #2
+ 800b2c2:	693a      	ldr	r2, [r7, #16]
+ 800b2c4:	4313      	orrs	r3, r2
+ 800b2c6:	613b      	str	r3, [r7, #16]
+    /* Set the Output N Idle state */
+    tmpcr2 |= (OC_Config->OCNIdleState << 2U);
+ 800b2c8:	683b      	ldr	r3, [r7, #0]
+ 800b2ca:	699b      	ldr	r3, [r3, #24]
+ 800b2cc:	009b      	lsls	r3, r3, #2
+ 800b2ce:	693a      	ldr	r2, [r7, #16]
+ 800b2d0:	4313      	orrs	r3, r2
+ 800b2d2:	613b      	str	r3, [r7, #16]
+  }
+
+  /* Write to TIMx CR2 */
+  TIMx->CR2 = tmpcr2;
+ 800b2d4:	687b      	ldr	r3, [r7, #4]
+ 800b2d6:	693a      	ldr	r2, [r7, #16]
+ 800b2d8:	605a      	str	r2, [r3, #4]
+
+  /* Write to TIMx CCMR1 */
+  TIMx->CCMR1 = tmpccmrx;
+ 800b2da:	687b      	ldr	r3, [r7, #4]
+ 800b2dc:	68fa      	ldr	r2, [r7, #12]
+ 800b2de:	619a      	str	r2, [r3, #24]
+
+  /* Set the Capture Compare Register value */
+  TIMx->CCR2 = OC_Config->Pulse;
+ 800b2e0:	683b      	ldr	r3, [r7, #0]
+ 800b2e2:	685a      	ldr	r2, [r3, #4]
+ 800b2e4:	687b      	ldr	r3, [r7, #4]
+ 800b2e6:	639a      	str	r2, [r3, #56]	; 0x38
+
+  /* Write to TIMx CCER */
+  TIMx->CCER = tmpccer;
+ 800b2e8:	687b      	ldr	r3, [r7, #4]
+ 800b2ea:	697a      	ldr	r2, [r7, #20]
+ 800b2ec:	621a      	str	r2, [r3, #32]
+}
+ 800b2ee:	bf00      	nop
+ 800b2f0:	371c      	adds	r7, #28
+ 800b2f2:	46bd      	mov	sp, r7
+ 800b2f4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b2f8:	4770      	bx	lr
+ 800b2fa:	bf00      	nop
+ 800b2fc:	feff8fff 	.word	0xfeff8fff
+ 800b300:	40010000 	.word	0x40010000
+ 800b304:	40010400 	.word	0x40010400
+
+0800b308 <TIM_OC3_SetConfig>:
+  * @param  TIMx to select the TIM peripheral
+  * @param  OC_Config The ouput configuration structure
+  * @retval None
+  */
+static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
+{
+ 800b308:	b480      	push	{r7}
+ 800b30a:	b087      	sub	sp, #28
+ 800b30c:	af00      	add	r7, sp, #0
+ 800b30e:	6078      	str	r0, [r7, #4]
+ 800b310:	6039      	str	r1, [r7, #0]
+  uint32_t tmpccmrx;
+  uint32_t tmpccer;
+  uint32_t tmpcr2;
+
+  /* Disable the Channel 3: Reset the CC2E Bit */
+  TIMx->CCER &= ~TIM_CCER_CC3E;
+ 800b312:	687b      	ldr	r3, [r7, #4]
+ 800b314:	6a1b      	ldr	r3, [r3, #32]
+ 800b316:	f423 7280 	bic.w	r2, r3, #256	; 0x100
+ 800b31a:	687b      	ldr	r3, [r7, #4]
+ 800b31c:	621a      	str	r2, [r3, #32]
+
+  /* Get the TIMx CCER register value */
+  tmpccer = TIMx->CCER;
+ 800b31e:	687b      	ldr	r3, [r7, #4]
+ 800b320:	6a1b      	ldr	r3, [r3, #32]
+ 800b322:	617b      	str	r3, [r7, #20]
+  /* Get the TIMx CR2 register value */
+  tmpcr2 =  TIMx->CR2;
+ 800b324:	687b      	ldr	r3, [r7, #4]
+ 800b326:	685b      	ldr	r3, [r3, #4]
+ 800b328:	613b      	str	r3, [r7, #16]
+
+  /* Get the TIMx CCMR2 register value */
+  tmpccmrx = TIMx->CCMR2;
+ 800b32a:	687b      	ldr	r3, [r7, #4]
+ 800b32c:	69db      	ldr	r3, [r3, #28]
+ 800b32e:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Compare mode and Capture/Compare selection Bits */
+  tmpccmrx &= ~TIM_CCMR2_OC3M;
+ 800b330:	68fa      	ldr	r2, [r7, #12]
+ 800b332:	4b2d      	ldr	r3, [pc, #180]	; (800b3e8 <TIM_OC3_SetConfig+0xe0>)
+ 800b334:	4013      	ands	r3, r2
+ 800b336:	60fb      	str	r3, [r7, #12]
+  tmpccmrx &= ~TIM_CCMR2_CC3S;
+ 800b338:	68fb      	ldr	r3, [r7, #12]
+ 800b33a:	f023 0303 	bic.w	r3, r3, #3
+ 800b33e:	60fb      	str	r3, [r7, #12]
+  /* Select the Output Compare Mode */
+  tmpccmrx |= OC_Config->OCMode;
+ 800b340:	683b      	ldr	r3, [r7, #0]
+ 800b342:	681b      	ldr	r3, [r3, #0]
+ 800b344:	68fa      	ldr	r2, [r7, #12]
+ 800b346:	4313      	orrs	r3, r2
+ 800b348:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Polarity level */
+  tmpccer &= ~TIM_CCER_CC3P;
+ 800b34a:	697b      	ldr	r3, [r7, #20]
+ 800b34c:	f423 7300 	bic.w	r3, r3, #512	; 0x200
+ 800b350:	617b      	str	r3, [r7, #20]
+  /* Set the Output Compare Polarity */
+  tmpccer |= (OC_Config->OCPolarity << 8U);
+ 800b352:	683b      	ldr	r3, [r7, #0]
+ 800b354:	689b      	ldr	r3, [r3, #8]
+ 800b356:	021b      	lsls	r3, r3, #8
+ 800b358:	697a      	ldr	r2, [r7, #20]
+ 800b35a:	4313      	orrs	r3, r2
+ 800b35c:	617b      	str	r3, [r7, #20]
+
+  if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
+ 800b35e:	687b      	ldr	r3, [r7, #4]
+ 800b360:	4a22      	ldr	r2, [pc, #136]	; (800b3ec <TIM_OC3_SetConfig+0xe4>)
+ 800b362:	4293      	cmp	r3, r2
+ 800b364:	d003      	beq.n	800b36e <TIM_OC3_SetConfig+0x66>
+ 800b366:	687b      	ldr	r3, [r7, #4]
+ 800b368:	4a21      	ldr	r2, [pc, #132]	; (800b3f0 <TIM_OC3_SetConfig+0xe8>)
+ 800b36a:	4293      	cmp	r3, r2
+ 800b36c:	d10d      	bne.n	800b38a <TIM_OC3_SetConfig+0x82>
+  {
+    assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
+
+    /* Reset the Output N Polarity level */
+    tmpccer &= ~TIM_CCER_CC3NP;
+ 800b36e:	697b      	ldr	r3, [r7, #20]
+ 800b370:	f423 6300 	bic.w	r3, r3, #2048	; 0x800
+ 800b374:	617b      	str	r3, [r7, #20]
+    /* Set the Output N Polarity */
+    tmpccer |= (OC_Config->OCNPolarity << 8U);
+ 800b376:	683b      	ldr	r3, [r7, #0]
+ 800b378:	68db      	ldr	r3, [r3, #12]
+ 800b37a:	021b      	lsls	r3, r3, #8
+ 800b37c:	697a      	ldr	r2, [r7, #20]
+ 800b37e:	4313      	orrs	r3, r2
+ 800b380:	617b      	str	r3, [r7, #20]
+    /* Reset the Output N State */
+    tmpccer &= ~TIM_CCER_CC3NE;
+ 800b382:	697b      	ldr	r3, [r7, #20]
+ 800b384:	f423 6380 	bic.w	r3, r3, #1024	; 0x400
+ 800b388:	617b      	str	r3, [r7, #20]
+  }
+
+  if (IS_TIM_BREAK_INSTANCE(TIMx))
+ 800b38a:	687b      	ldr	r3, [r7, #4]
+ 800b38c:	4a17      	ldr	r2, [pc, #92]	; (800b3ec <TIM_OC3_SetConfig+0xe4>)
+ 800b38e:	4293      	cmp	r3, r2
+ 800b390:	d003      	beq.n	800b39a <TIM_OC3_SetConfig+0x92>
+ 800b392:	687b      	ldr	r3, [r7, #4]
+ 800b394:	4a16      	ldr	r2, [pc, #88]	; (800b3f0 <TIM_OC3_SetConfig+0xe8>)
+ 800b396:	4293      	cmp	r3, r2
+ 800b398:	d113      	bne.n	800b3c2 <TIM_OC3_SetConfig+0xba>
+    /* Check parameters */
+    assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
+    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
+
+    /* Reset the Output Compare and Output Compare N IDLE State */
+    tmpcr2 &= ~TIM_CR2_OIS3;
+ 800b39a:	693b      	ldr	r3, [r7, #16]
+ 800b39c:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
+ 800b3a0:	613b      	str	r3, [r7, #16]
+    tmpcr2 &= ~TIM_CR2_OIS3N;
+ 800b3a2:	693b      	ldr	r3, [r7, #16]
+ 800b3a4:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
+ 800b3a8:	613b      	str	r3, [r7, #16]
+    /* Set the Output Idle state */
+    tmpcr2 |= (OC_Config->OCIdleState << 4U);
+ 800b3aa:	683b      	ldr	r3, [r7, #0]
+ 800b3ac:	695b      	ldr	r3, [r3, #20]
+ 800b3ae:	011b      	lsls	r3, r3, #4
+ 800b3b0:	693a      	ldr	r2, [r7, #16]
+ 800b3b2:	4313      	orrs	r3, r2
+ 800b3b4:	613b      	str	r3, [r7, #16]
+    /* Set the Output N Idle state */
+    tmpcr2 |= (OC_Config->OCNIdleState << 4U);
+ 800b3b6:	683b      	ldr	r3, [r7, #0]
+ 800b3b8:	699b      	ldr	r3, [r3, #24]
+ 800b3ba:	011b      	lsls	r3, r3, #4
+ 800b3bc:	693a      	ldr	r2, [r7, #16]
+ 800b3be:	4313      	orrs	r3, r2
+ 800b3c0:	613b      	str	r3, [r7, #16]
+  }
+
+  /* Write to TIMx CR2 */
+  TIMx->CR2 = tmpcr2;
+ 800b3c2:	687b      	ldr	r3, [r7, #4]
+ 800b3c4:	693a      	ldr	r2, [r7, #16]
+ 800b3c6:	605a      	str	r2, [r3, #4]
+
+  /* Write to TIMx CCMR2 */
+  TIMx->CCMR2 = tmpccmrx;
+ 800b3c8:	687b      	ldr	r3, [r7, #4]
+ 800b3ca:	68fa      	ldr	r2, [r7, #12]
+ 800b3cc:	61da      	str	r2, [r3, #28]
+
+  /* Set the Capture Compare Register value */
+  TIMx->CCR3 = OC_Config->Pulse;
+ 800b3ce:	683b      	ldr	r3, [r7, #0]
+ 800b3d0:	685a      	ldr	r2, [r3, #4]
+ 800b3d2:	687b      	ldr	r3, [r7, #4]
+ 800b3d4:	63da      	str	r2, [r3, #60]	; 0x3c
+
+  /* Write to TIMx CCER */
+  TIMx->CCER = tmpccer;
+ 800b3d6:	687b      	ldr	r3, [r7, #4]
+ 800b3d8:	697a      	ldr	r2, [r7, #20]
+ 800b3da:	621a      	str	r2, [r3, #32]
+}
+ 800b3dc:	bf00      	nop
+ 800b3de:	371c      	adds	r7, #28
+ 800b3e0:	46bd      	mov	sp, r7
+ 800b3e2:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b3e6:	4770      	bx	lr
+ 800b3e8:	fffeff8f 	.word	0xfffeff8f
+ 800b3ec:	40010000 	.word	0x40010000
+ 800b3f0:	40010400 	.word	0x40010400
+
+0800b3f4 <TIM_OC4_SetConfig>:
+  * @param  TIMx to select the TIM peripheral
+  * @param  OC_Config The ouput configuration structure
+  * @retval None
+  */
+static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
+{
+ 800b3f4:	b480      	push	{r7}
+ 800b3f6:	b087      	sub	sp, #28
+ 800b3f8:	af00      	add	r7, sp, #0
+ 800b3fa:	6078      	str	r0, [r7, #4]
+ 800b3fc:	6039      	str	r1, [r7, #0]
+  uint32_t tmpccmrx;
+  uint32_t tmpccer;
+  uint32_t tmpcr2;
+
+  /* Disable the Channel 4: Reset the CC4E Bit */
+  TIMx->CCER &= ~TIM_CCER_CC4E;
+ 800b3fe:	687b      	ldr	r3, [r7, #4]
+ 800b400:	6a1b      	ldr	r3, [r3, #32]
+ 800b402:	f423 5280 	bic.w	r2, r3, #4096	; 0x1000
+ 800b406:	687b      	ldr	r3, [r7, #4]
+ 800b408:	621a      	str	r2, [r3, #32]
+
+  /* Get the TIMx CCER register value */
+  tmpccer = TIMx->CCER;
+ 800b40a:	687b      	ldr	r3, [r7, #4]
+ 800b40c:	6a1b      	ldr	r3, [r3, #32]
+ 800b40e:	613b      	str	r3, [r7, #16]
+  /* Get the TIMx CR2 register value */
+  tmpcr2 =  TIMx->CR2;
+ 800b410:	687b      	ldr	r3, [r7, #4]
+ 800b412:	685b      	ldr	r3, [r3, #4]
+ 800b414:	617b      	str	r3, [r7, #20]
+
+  /* Get the TIMx CCMR2 register value */
+  tmpccmrx = TIMx->CCMR2;
+ 800b416:	687b      	ldr	r3, [r7, #4]
+ 800b418:	69db      	ldr	r3, [r3, #28]
+ 800b41a:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Compare mode and Capture/Compare selection Bits */
+  tmpccmrx &= ~TIM_CCMR2_OC4M;
+ 800b41c:	68fa      	ldr	r2, [r7, #12]
+ 800b41e:	4b1e      	ldr	r3, [pc, #120]	; (800b498 <TIM_OC4_SetConfig+0xa4>)
+ 800b420:	4013      	ands	r3, r2
+ 800b422:	60fb      	str	r3, [r7, #12]
+  tmpccmrx &= ~TIM_CCMR2_CC4S;
+ 800b424:	68fb      	ldr	r3, [r7, #12]
+ 800b426:	f423 7340 	bic.w	r3, r3, #768	; 0x300
+ 800b42a:	60fb      	str	r3, [r7, #12]
+
+  /* Select the Output Compare Mode */
+  tmpccmrx |= (OC_Config->OCMode << 8U);
+ 800b42c:	683b      	ldr	r3, [r7, #0]
+ 800b42e:	681b      	ldr	r3, [r3, #0]
+ 800b430:	021b      	lsls	r3, r3, #8
+ 800b432:	68fa      	ldr	r2, [r7, #12]
+ 800b434:	4313      	orrs	r3, r2
+ 800b436:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Polarity level */
+  tmpccer &= ~TIM_CCER_CC4P;
+ 800b438:	693b      	ldr	r3, [r7, #16]
+ 800b43a:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
+ 800b43e:	613b      	str	r3, [r7, #16]
+  /* Set the Output Compare Polarity */
+  tmpccer |= (OC_Config->OCPolarity << 12U);
+ 800b440:	683b      	ldr	r3, [r7, #0]
+ 800b442:	689b      	ldr	r3, [r3, #8]
+ 800b444:	031b      	lsls	r3, r3, #12
+ 800b446:	693a      	ldr	r2, [r7, #16]
+ 800b448:	4313      	orrs	r3, r2
+ 800b44a:	613b      	str	r3, [r7, #16]
+
+  if (IS_TIM_BREAK_INSTANCE(TIMx))
+ 800b44c:	687b      	ldr	r3, [r7, #4]
+ 800b44e:	4a13      	ldr	r2, [pc, #76]	; (800b49c <TIM_OC4_SetConfig+0xa8>)
+ 800b450:	4293      	cmp	r3, r2
+ 800b452:	d003      	beq.n	800b45c <TIM_OC4_SetConfig+0x68>
+ 800b454:	687b      	ldr	r3, [r7, #4]
+ 800b456:	4a12      	ldr	r2, [pc, #72]	; (800b4a0 <TIM_OC4_SetConfig+0xac>)
+ 800b458:	4293      	cmp	r3, r2
+ 800b45a:	d109      	bne.n	800b470 <TIM_OC4_SetConfig+0x7c>
+  {
+    /* Check parameters */
+    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
+
+    /* Reset the Output Compare IDLE State */
+    tmpcr2 &= ~TIM_CR2_OIS4;
+ 800b45c:	697b      	ldr	r3, [r7, #20]
+ 800b45e:	f423 4380 	bic.w	r3, r3, #16384	; 0x4000
+ 800b462:	617b      	str	r3, [r7, #20]
+
+    /* Set the Output Idle state */
+    tmpcr2 |= (OC_Config->OCIdleState << 6U);
+ 800b464:	683b      	ldr	r3, [r7, #0]
+ 800b466:	695b      	ldr	r3, [r3, #20]
+ 800b468:	019b      	lsls	r3, r3, #6
+ 800b46a:	697a      	ldr	r2, [r7, #20]
+ 800b46c:	4313      	orrs	r3, r2
+ 800b46e:	617b      	str	r3, [r7, #20]
+  }
+
+  /* Write to TIMx CR2 */
+  TIMx->CR2 = tmpcr2;
+ 800b470:	687b      	ldr	r3, [r7, #4]
+ 800b472:	697a      	ldr	r2, [r7, #20]
+ 800b474:	605a      	str	r2, [r3, #4]
+
+  /* Write to TIMx CCMR2 */
+  TIMx->CCMR2 = tmpccmrx;
+ 800b476:	687b      	ldr	r3, [r7, #4]
+ 800b478:	68fa      	ldr	r2, [r7, #12]
+ 800b47a:	61da      	str	r2, [r3, #28]
+
+  /* Set the Capture Compare Register value */
+  TIMx->CCR4 = OC_Config->Pulse;
+ 800b47c:	683b      	ldr	r3, [r7, #0]
+ 800b47e:	685a      	ldr	r2, [r3, #4]
+ 800b480:	687b      	ldr	r3, [r7, #4]
+ 800b482:	641a      	str	r2, [r3, #64]	; 0x40
+
+  /* Write to TIMx CCER */
+  TIMx->CCER = tmpccer;
+ 800b484:	687b      	ldr	r3, [r7, #4]
+ 800b486:	693a      	ldr	r2, [r7, #16]
+ 800b488:	621a      	str	r2, [r3, #32]
+}
+ 800b48a:	bf00      	nop
+ 800b48c:	371c      	adds	r7, #28
+ 800b48e:	46bd      	mov	sp, r7
+ 800b490:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b494:	4770      	bx	lr
+ 800b496:	bf00      	nop
+ 800b498:	feff8fff 	.word	0xfeff8fff
+ 800b49c:	40010000 	.word	0x40010000
+ 800b4a0:	40010400 	.word	0x40010400
+
+0800b4a4 <TIM_OC5_SetConfig>:
+  * @param  OC_Config The ouput configuration structure
+  * @retval None
+  */
+static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx,
+                              TIM_OC_InitTypeDef *OC_Config)
+{
+ 800b4a4:	b480      	push	{r7}
+ 800b4a6:	b087      	sub	sp, #28
+ 800b4a8:	af00      	add	r7, sp, #0
+ 800b4aa:	6078      	str	r0, [r7, #4]
+ 800b4ac:	6039      	str	r1, [r7, #0]
+  uint32_t tmpccmrx;
+  uint32_t tmpccer;
+  uint32_t tmpcr2;
+
+  /* Disable the output: Reset the CCxE Bit */
+  TIMx->CCER &= ~TIM_CCER_CC5E;
+ 800b4ae:	687b      	ldr	r3, [r7, #4]
+ 800b4b0:	6a1b      	ldr	r3, [r3, #32]
+ 800b4b2:	f423 3280 	bic.w	r2, r3, #65536	; 0x10000
+ 800b4b6:	687b      	ldr	r3, [r7, #4]
+ 800b4b8:	621a      	str	r2, [r3, #32]
+
+  /* Get the TIMx CCER register value */
+  tmpccer = TIMx->CCER;
+ 800b4ba:	687b      	ldr	r3, [r7, #4]
+ 800b4bc:	6a1b      	ldr	r3, [r3, #32]
+ 800b4be:	613b      	str	r3, [r7, #16]
+  /* Get the TIMx CR2 register value */
+  tmpcr2 =  TIMx->CR2;
+ 800b4c0:	687b      	ldr	r3, [r7, #4]
+ 800b4c2:	685b      	ldr	r3, [r3, #4]
+ 800b4c4:	617b      	str	r3, [r7, #20]
+  /* Get the TIMx CCMR1 register value */
+  tmpccmrx = TIMx->CCMR3;
+ 800b4c6:	687b      	ldr	r3, [r7, #4]
+ 800b4c8:	6d5b      	ldr	r3, [r3, #84]	; 0x54
+ 800b4ca:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Compare Mode Bits */
+  tmpccmrx &= ~(TIM_CCMR3_OC5M);
+ 800b4cc:	68fa      	ldr	r2, [r7, #12]
+ 800b4ce:	4b1b      	ldr	r3, [pc, #108]	; (800b53c <TIM_OC5_SetConfig+0x98>)
+ 800b4d0:	4013      	ands	r3, r2
+ 800b4d2:	60fb      	str	r3, [r7, #12]
+  /* Select the Output Compare Mode */
+  tmpccmrx |= OC_Config->OCMode;
+ 800b4d4:	683b      	ldr	r3, [r7, #0]
+ 800b4d6:	681b      	ldr	r3, [r3, #0]
+ 800b4d8:	68fa      	ldr	r2, [r7, #12]
+ 800b4da:	4313      	orrs	r3, r2
+ 800b4dc:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Polarity level */
+  tmpccer &= ~TIM_CCER_CC5P;
+ 800b4de:	693b      	ldr	r3, [r7, #16]
+ 800b4e0:	f423 3300 	bic.w	r3, r3, #131072	; 0x20000
+ 800b4e4:	613b      	str	r3, [r7, #16]
+  /* Set the Output Compare Polarity */
+  tmpccer |= (OC_Config->OCPolarity << 16U);
+ 800b4e6:	683b      	ldr	r3, [r7, #0]
+ 800b4e8:	689b      	ldr	r3, [r3, #8]
+ 800b4ea:	041b      	lsls	r3, r3, #16
+ 800b4ec:	693a      	ldr	r2, [r7, #16]
+ 800b4ee:	4313      	orrs	r3, r2
+ 800b4f0:	613b      	str	r3, [r7, #16]
+
+  if (IS_TIM_BREAK_INSTANCE(TIMx))
+ 800b4f2:	687b      	ldr	r3, [r7, #4]
+ 800b4f4:	4a12      	ldr	r2, [pc, #72]	; (800b540 <TIM_OC5_SetConfig+0x9c>)
+ 800b4f6:	4293      	cmp	r3, r2
+ 800b4f8:	d003      	beq.n	800b502 <TIM_OC5_SetConfig+0x5e>
+ 800b4fa:	687b      	ldr	r3, [r7, #4]
+ 800b4fc:	4a11      	ldr	r2, [pc, #68]	; (800b544 <TIM_OC5_SetConfig+0xa0>)
+ 800b4fe:	4293      	cmp	r3, r2
+ 800b500:	d109      	bne.n	800b516 <TIM_OC5_SetConfig+0x72>
+  {
+    /* Reset the Output Compare IDLE State */
+    tmpcr2 &= ~TIM_CR2_OIS5;
+ 800b502:	697b      	ldr	r3, [r7, #20]
+ 800b504:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
+ 800b508:	617b      	str	r3, [r7, #20]
+    /* Set the Output Idle state */
+    tmpcr2 |= (OC_Config->OCIdleState << 8U);
+ 800b50a:	683b      	ldr	r3, [r7, #0]
+ 800b50c:	695b      	ldr	r3, [r3, #20]
+ 800b50e:	021b      	lsls	r3, r3, #8
+ 800b510:	697a      	ldr	r2, [r7, #20]
+ 800b512:	4313      	orrs	r3, r2
+ 800b514:	617b      	str	r3, [r7, #20]
+  }
+  /* Write to TIMx CR2 */
+  TIMx->CR2 = tmpcr2;
+ 800b516:	687b      	ldr	r3, [r7, #4]
+ 800b518:	697a      	ldr	r2, [r7, #20]
+ 800b51a:	605a      	str	r2, [r3, #4]
+
+  /* Write to TIMx CCMR3 */
+  TIMx->CCMR3 = tmpccmrx;
+ 800b51c:	687b      	ldr	r3, [r7, #4]
+ 800b51e:	68fa      	ldr	r2, [r7, #12]
+ 800b520:	655a      	str	r2, [r3, #84]	; 0x54
+
+  /* Set the Capture Compare Register value */
+  TIMx->CCR5 = OC_Config->Pulse;
+ 800b522:	683b      	ldr	r3, [r7, #0]
+ 800b524:	685a      	ldr	r2, [r3, #4]
+ 800b526:	687b      	ldr	r3, [r7, #4]
+ 800b528:	659a      	str	r2, [r3, #88]	; 0x58
+
+  /* Write to TIMx CCER */
+  TIMx->CCER = tmpccer;
+ 800b52a:	687b      	ldr	r3, [r7, #4]
+ 800b52c:	693a      	ldr	r2, [r7, #16]
+ 800b52e:	621a      	str	r2, [r3, #32]
+}
+ 800b530:	bf00      	nop
+ 800b532:	371c      	adds	r7, #28
+ 800b534:	46bd      	mov	sp, r7
+ 800b536:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b53a:	4770      	bx	lr
+ 800b53c:	fffeff8f 	.word	0xfffeff8f
+ 800b540:	40010000 	.word	0x40010000
+ 800b544:	40010400 	.word	0x40010400
+
+0800b548 <TIM_OC6_SetConfig>:
+  * @param  OC_Config The ouput configuration structure
+  * @retval None
+  */
+static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx,
+                              TIM_OC_InitTypeDef *OC_Config)
+{
+ 800b548:	b480      	push	{r7}
+ 800b54a:	b087      	sub	sp, #28
+ 800b54c:	af00      	add	r7, sp, #0
+ 800b54e:	6078      	str	r0, [r7, #4]
+ 800b550:	6039      	str	r1, [r7, #0]
+  uint32_t tmpccmrx;
+  uint32_t tmpccer;
+  uint32_t tmpcr2;
+
+  /* Disable the output: Reset the CCxE Bit */
+  TIMx->CCER &= ~TIM_CCER_CC6E;
+ 800b552:	687b      	ldr	r3, [r7, #4]
+ 800b554:	6a1b      	ldr	r3, [r3, #32]
+ 800b556:	f423 1280 	bic.w	r2, r3, #1048576	; 0x100000
+ 800b55a:	687b      	ldr	r3, [r7, #4]
+ 800b55c:	621a      	str	r2, [r3, #32]
+
+  /* Get the TIMx CCER register value */
+  tmpccer = TIMx->CCER;
+ 800b55e:	687b      	ldr	r3, [r7, #4]
+ 800b560:	6a1b      	ldr	r3, [r3, #32]
+ 800b562:	613b      	str	r3, [r7, #16]
+  /* Get the TIMx CR2 register value */
+  tmpcr2 =  TIMx->CR2;
+ 800b564:	687b      	ldr	r3, [r7, #4]
+ 800b566:	685b      	ldr	r3, [r3, #4]
+ 800b568:	617b      	str	r3, [r7, #20]
+  /* Get the TIMx CCMR1 register value */
+  tmpccmrx = TIMx->CCMR3;
+ 800b56a:	687b      	ldr	r3, [r7, #4]
+ 800b56c:	6d5b      	ldr	r3, [r3, #84]	; 0x54
+ 800b56e:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Compare Mode Bits */
+  tmpccmrx &= ~(TIM_CCMR3_OC6M);
+ 800b570:	68fa      	ldr	r2, [r7, #12]
+ 800b572:	4b1c      	ldr	r3, [pc, #112]	; (800b5e4 <TIM_OC6_SetConfig+0x9c>)
+ 800b574:	4013      	ands	r3, r2
+ 800b576:	60fb      	str	r3, [r7, #12]
+  /* Select the Output Compare Mode */
+  tmpccmrx |= (OC_Config->OCMode << 8U);
+ 800b578:	683b      	ldr	r3, [r7, #0]
+ 800b57a:	681b      	ldr	r3, [r3, #0]
+ 800b57c:	021b      	lsls	r3, r3, #8
+ 800b57e:	68fa      	ldr	r2, [r7, #12]
+ 800b580:	4313      	orrs	r3, r2
+ 800b582:	60fb      	str	r3, [r7, #12]
+
+  /* Reset the Output Polarity level */
+  tmpccer &= (uint32_t)~TIM_CCER_CC6P;
+ 800b584:	693b      	ldr	r3, [r7, #16]
+ 800b586:	f423 1300 	bic.w	r3, r3, #2097152	; 0x200000
+ 800b58a:	613b      	str	r3, [r7, #16]
+  /* Set the Output Compare Polarity */
+  tmpccer |= (OC_Config->OCPolarity << 20U);
+ 800b58c:	683b      	ldr	r3, [r7, #0]
+ 800b58e:	689b      	ldr	r3, [r3, #8]
+ 800b590:	051b      	lsls	r3, r3, #20
+ 800b592:	693a      	ldr	r2, [r7, #16]
+ 800b594:	4313      	orrs	r3, r2
+ 800b596:	613b      	str	r3, [r7, #16]
+
+  if (IS_TIM_BREAK_INSTANCE(TIMx))
+ 800b598:	687b      	ldr	r3, [r7, #4]
+ 800b59a:	4a13      	ldr	r2, [pc, #76]	; (800b5e8 <TIM_OC6_SetConfig+0xa0>)
+ 800b59c:	4293      	cmp	r3, r2
+ 800b59e:	d003      	beq.n	800b5a8 <TIM_OC6_SetConfig+0x60>
+ 800b5a0:	687b      	ldr	r3, [r7, #4]
+ 800b5a2:	4a12      	ldr	r2, [pc, #72]	; (800b5ec <TIM_OC6_SetConfig+0xa4>)
+ 800b5a4:	4293      	cmp	r3, r2
+ 800b5a6:	d109      	bne.n	800b5bc <TIM_OC6_SetConfig+0x74>
+  {
+    /* Reset the Output Compare IDLE State */
+    tmpcr2 &= ~TIM_CR2_OIS6;
+ 800b5a8:	697b      	ldr	r3, [r7, #20]
+ 800b5aa:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
+ 800b5ae:	617b      	str	r3, [r7, #20]
+    /* Set the Output Idle state */
+    tmpcr2 |= (OC_Config->OCIdleState << 10U);
+ 800b5b0:	683b      	ldr	r3, [r7, #0]
+ 800b5b2:	695b      	ldr	r3, [r3, #20]
+ 800b5b4:	029b      	lsls	r3, r3, #10
+ 800b5b6:	697a      	ldr	r2, [r7, #20]
+ 800b5b8:	4313      	orrs	r3, r2
+ 800b5ba:	617b      	str	r3, [r7, #20]
+  }
+
+  /* Write to TIMx CR2 */
+  TIMx->CR2 = tmpcr2;
+ 800b5bc:	687b      	ldr	r3, [r7, #4]
+ 800b5be:	697a      	ldr	r2, [r7, #20]
+ 800b5c0:	605a      	str	r2, [r3, #4]
+
+  /* Write to TIMx CCMR3 */
+  TIMx->CCMR3 = tmpccmrx;
+ 800b5c2:	687b      	ldr	r3, [r7, #4]
+ 800b5c4:	68fa      	ldr	r2, [r7, #12]
+ 800b5c6:	655a      	str	r2, [r3, #84]	; 0x54
+
+  /* Set the Capture Compare Register value */
+  TIMx->CCR6 = OC_Config->Pulse;
+ 800b5c8:	683b      	ldr	r3, [r7, #0]
+ 800b5ca:	685a      	ldr	r2, [r3, #4]
+ 800b5cc:	687b      	ldr	r3, [r7, #4]
+ 800b5ce:	65da      	str	r2, [r3, #92]	; 0x5c
+
+  /* Write to TIMx CCER */
+  TIMx->CCER = tmpccer;
+ 800b5d0:	687b      	ldr	r3, [r7, #4]
+ 800b5d2:	693a      	ldr	r2, [r7, #16]
+ 800b5d4:	621a      	str	r2, [r3, #32]
+}
+ 800b5d6:	bf00      	nop
+ 800b5d8:	371c      	adds	r7, #28
+ 800b5da:	46bd      	mov	sp, r7
+ 800b5dc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b5e0:	4770      	bx	lr
+ 800b5e2:	bf00      	nop
+ 800b5e4:	feff8fff 	.word	0xfeff8fff
+ 800b5e8:	40010000 	.word	0x40010000
+ 800b5ec:	40010400 	.word	0x40010400
+
+0800b5f0 <TIM_SlaveTimer_SetConfig>:
+  * @param  sSlaveConfig Slave timer configuration
+  * @retval None
+  */
+static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
+                                                  TIM_SlaveConfigTypeDef *sSlaveConfig)
+{
+ 800b5f0:	b580      	push	{r7, lr}
+ 800b5f2:	b086      	sub	sp, #24
+ 800b5f4:	af00      	add	r7, sp, #0
+ 800b5f6:	6078      	str	r0, [r7, #4]
+ 800b5f8:	6039      	str	r1, [r7, #0]
+  uint32_t tmpsmcr;
+  uint32_t tmpccmr1;
+  uint32_t tmpccer;
+
+  /* Get the TIMx SMCR register value */
+  tmpsmcr = htim->Instance->SMCR;
+ 800b5fa:	687b      	ldr	r3, [r7, #4]
+ 800b5fc:	681b      	ldr	r3, [r3, #0]
+ 800b5fe:	689b      	ldr	r3, [r3, #8]
+ 800b600:	617b      	str	r3, [r7, #20]
+
+  /* Reset the Trigger Selection Bits */
+  tmpsmcr &= ~TIM_SMCR_TS;
+ 800b602:	697b      	ldr	r3, [r7, #20]
+ 800b604:	f023 0370 	bic.w	r3, r3, #112	; 0x70
+ 800b608:	617b      	str	r3, [r7, #20]
+  /* Set the Input Trigger source */
+  tmpsmcr |= sSlaveConfig->InputTrigger;
+ 800b60a:	683b      	ldr	r3, [r7, #0]
+ 800b60c:	685b      	ldr	r3, [r3, #4]
+ 800b60e:	697a      	ldr	r2, [r7, #20]
+ 800b610:	4313      	orrs	r3, r2
+ 800b612:	617b      	str	r3, [r7, #20]
+
+  /* Reset the slave mode Bits */
+  tmpsmcr &= ~TIM_SMCR_SMS;
+ 800b614:	697a      	ldr	r2, [r7, #20]
+ 800b616:	4b39      	ldr	r3, [pc, #228]	; (800b6fc <TIM_SlaveTimer_SetConfig+0x10c>)
+ 800b618:	4013      	ands	r3, r2
+ 800b61a:	617b      	str	r3, [r7, #20]
+  /* Set the slave mode */
+  tmpsmcr |= sSlaveConfig->SlaveMode;
+ 800b61c:	683b      	ldr	r3, [r7, #0]
+ 800b61e:	681b      	ldr	r3, [r3, #0]
+ 800b620:	697a      	ldr	r2, [r7, #20]
+ 800b622:	4313      	orrs	r3, r2
+ 800b624:	617b      	str	r3, [r7, #20]
+
+  /* Write to TIMx SMCR */
+  htim->Instance->SMCR = tmpsmcr;
+ 800b626:	687b      	ldr	r3, [r7, #4]
+ 800b628:	681b      	ldr	r3, [r3, #0]
+ 800b62a:	697a      	ldr	r2, [r7, #20]
+ 800b62c:	609a      	str	r2, [r3, #8]
+
+  /* Configure the trigger prescaler, filter, and polarity */
+  switch (sSlaveConfig->InputTrigger)
+ 800b62e:	683b      	ldr	r3, [r7, #0]
+ 800b630:	685b      	ldr	r3, [r3, #4]
+ 800b632:	2b30      	cmp	r3, #48	; 0x30
+ 800b634:	d05c      	beq.n	800b6f0 <TIM_SlaveTimer_SetConfig+0x100>
+ 800b636:	2b30      	cmp	r3, #48	; 0x30
+ 800b638:	d806      	bhi.n	800b648 <TIM_SlaveTimer_SetConfig+0x58>
+ 800b63a:	2b10      	cmp	r3, #16
+ 800b63c:	d058      	beq.n	800b6f0 <TIM_SlaveTimer_SetConfig+0x100>
+ 800b63e:	2b20      	cmp	r3, #32
+ 800b640:	d056      	beq.n	800b6f0 <TIM_SlaveTimer_SetConfig+0x100>
+ 800b642:	2b00      	cmp	r3, #0
+ 800b644:	d054      	beq.n	800b6f0 <TIM_SlaveTimer_SetConfig+0x100>
+      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
+      break;
+    }
+
+    default:
+      break;
+ 800b646:	e054      	b.n	800b6f2 <TIM_SlaveTimer_SetConfig+0x102>
+  switch (sSlaveConfig->InputTrigger)
+ 800b648:	2b50      	cmp	r3, #80	; 0x50
+ 800b64a:	d03d      	beq.n	800b6c8 <TIM_SlaveTimer_SetConfig+0xd8>
+ 800b64c:	2b50      	cmp	r3, #80	; 0x50
+ 800b64e:	d802      	bhi.n	800b656 <TIM_SlaveTimer_SetConfig+0x66>
+ 800b650:	2b40      	cmp	r3, #64	; 0x40
+ 800b652:	d010      	beq.n	800b676 <TIM_SlaveTimer_SetConfig+0x86>
+      break;
+ 800b654:	e04d      	b.n	800b6f2 <TIM_SlaveTimer_SetConfig+0x102>
+  switch (sSlaveConfig->InputTrigger)
+ 800b656:	2b60      	cmp	r3, #96	; 0x60
+ 800b658:	d040      	beq.n	800b6dc <TIM_SlaveTimer_SetConfig+0xec>
+ 800b65a:	2b70      	cmp	r3, #112	; 0x70
+ 800b65c:	d000      	beq.n	800b660 <TIM_SlaveTimer_SetConfig+0x70>
+      break;
+ 800b65e:	e048      	b.n	800b6f2 <TIM_SlaveTimer_SetConfig+0x102>
+      TIM_ETR_SetConfig(htim->Instance,
+ 800b660:	687b      	ldr	r3, [r7, #4]
+ 800b662:	6818      	ldr	r0, [r3, #0]
+ 800b664:	683b      	ldr	r3, [r7, #0]
+ 800b666:	68d9      	ldr	r1, [r3, #12]
+ 800b668:	683b      	ldr	r3, [r7, #0]
+ 800b66a:	689a      	ldr	r2, [r3, #8]
+ 800b66c:	683b      	ldr	r3, [r7, #0]
+ 800b66e:	691b      	ldr	r3, [r3, #16]
+ 800b670:	f000 f8c0 	bl	800b7f4 <TIM_ETR_SetConfig>
+      break;
+ 800b674:	e03d      	b.n	800b6f2 <TIM_SlaveTimer_SetConfig+0x102>
+      if(sSlaveConfig->SlaveMode == TIM_SLAVEMODE_GATED)
+ 800b676:	683b      	ldr	r3, [r7, #0]
+ 800b678:	681b      	ldr	r3, [r3, #0]
+ 800b67a:	2b05      	cmp	r3, #5
+ 800b67c:	d101      	bne.n	800b682 <TIM_SlaveTimer_SetConfig+0x92>
+        return HAL_ERROR;
+ 800b67e:	2301      	movs	r3, #1
+ 800b680:	e038      	b.n	800b6f4 <TIM_SlaveTimer_SetConfig+0x104>
+      tmpccer = htim->Instance->CCER;
+ 800b682:	687b      	ldr	r3, [r7, #4]
+ 800b684:	681b      	ldr	r3, [r3, #0]
+ 800b686:	6a1b      	ldr	r3, [r3, #32]
+ 800b688:	613b      	str	r3, [r7, #16]
+      htim->Instance->CCER &= ~TIM_CCER_CC1E;
+ 800b68a:	687b      	ldr	r3, [r7, #4]
+ 800b68c:	681b      	ldr	r3, [r3, #0]
+ 800b68e:	6a1a      	ldr	r2, [r3, #32]
+ 800b690:	687b      	ldr	r3, [r7, #4]
+ 800b692:	681b      	ldr	r3, [r3, #0]
+ 800b694:	f022 0201 	bic.w	r2, r2, #1
+ 800b698:	621a      	str	r2, [r3, #32]
+      tmpccmr1 = htim->Instance->CCMR1;
+ 800b69a:	687b      	ldr	r3, [r7, #4]
+ 800b69c:	681b      	ldr	r3, [r3, #0]
+ 800b69e:	699b      	ldr	r3, [r3, #24]
+ 800b6a0:	60fb      	str	r3, [r7, #12]
+      tmpccmr1 &= ~TIM_CCMR1_IC1F;
+ 800b6a2:	68fb      	ldr	r3, [r7, #12]
+ 800b6a4:	f023 03f0 	bic.w	r3, r3, #240	; 0xf0
+ 800b6a8:	60fb      	str	r3, [r7, #12]
+      tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U);
+ 800b6aa:	683b      	ldr	r3, [r7, #0]
+ 800b6ac:	691b      	ldr	r3, [r3, #16]
+ 800b6ae:	011b      	lsls	r3, r3, #4
+ 800b6b0:	68fa      	ldr	r2, [r7, #12]
+ 800b6b2:	4313      	orrs	r3, r2
+ 800b6b4:	60fb      	str	r3, [r7, #12]
+      htim->Instance->CCMR1 = tmpccmr1;
+ 800b6b6:	687b      	ldr	r3, [r7, #4]
+ 800b6b8:	681b      	ldr	r3, [r3, #0]
+ 800b6ba:	68fa      	ldr	r2, [r7, #12]
+ 800b6bc:	619a      	str	r2, [r3, #24]
+      htim->Instance->CCER = tmpccer;
+ 800b6be:	687b      	ldr	r3, [r7, #4]
+ 800b6c0:	681b      	ldr	r3, [r3, #0]
+ 800b6c2:	693a      	ldr	r2, [r7, #16]
+ 800b6c4:	621a      	str	r2, [r3, #32]
+      break;
+ 800b6c6:	e014      	b.n	800b6f2 <TIM_SlaveTimer_SetConfig+0x102>
+      TIM_TI1_ConfigInputStage(htim->Instance,
+ 800b6c8:	687b      	ldr	r3, [r7, #4]
+ 800b6ca:	6818      	ldr	r0, [r3, #0]
+ 800b6cc:	683b      	ldr	r3, [r7, #0]
+ 800b6ce:	6899      	ldr	r1, [r3, #8]
+ 800b6d0:	683b      	ldr	r3, [r7, #0]
+ 800b6d2:	691b      	ldr	r3, [r3, #16]
+ 800b6d4:	461a      	mov	r2, r3
+ 800b6d6:	f000 f813 	bl	800b700 <TIM_TI1_ConfigInputStage>
+      break;
+ 800b6da:	e00a      	b.n	800b6f2 <TIM_SlaveTimer_SetConfig+0x102>
+      TIM_TI2_ConfigInputStage(htim->Instance,
+ 800b6dc:	687b      	ldr	r3, [r7, #4]
+ 800b6de:	6818      	ldr	r0, [r3, #0]
+ 800b6e0:	683b      	ldr	r3, [r7, #0]
+ 800b6e2:	6899      	ldr	r1, [r3, #8]
+ 800b6e4:	683b      	ldr	r3, [r7, #0]
+ 800b6e6:	691b      	ldr	r3, [r3, #16]
+ 800b6e8:	461a      	mov	r2, r3
+ 800b6ea:	f000 f838 	bl	800b75e <TIM_TI2_ConfigInputStage>
+      break;
+ 800b6ee:	e000      	b.n	800b6f2 <TIM_SlaveTimer_SetConfig+0x102>
+      break;
+ 800b6f0:	bf00      	nop
+  }
+  return HAL_OK;
+ 800b6f2:	2300      	movs	r3, #0
+}
+ 800b6f4:	4618      	mov	r0, r3
+ 800b6f6:	3718      	adds	r7, #24
+ 800b6f8:	46bd      	mov	sp, r7
+ 800b6fa:	bd80      	pop	{r7, pc}
+ 800b6fc:	fffefff8 	.word	0xfffefff8
+
+0800b700 <TIM_TI1_ConfigInputStage>:
+  * @param  TIM_ICFilter Specifies the Input Capture Filter.
+  *          This parameter must be a value between 0x00 and 0x0F.
+  * @retval None
+  */
+static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
+{
+ 800b700:	b480      	push	{r7}
+ 800b702:	b087      	sub	sp, #28
+ 800b704:	af00      	add	r7, sp, #0
+ 800b706:	60f8      	str	r0, [r7, #12]
+ 800b708:	60b9      	str	r1, [r7, #8]
+ 800b70a:	607a      	str	r2, [r7, #4]
+  uint32_t tmpccmr1;
+  uint32_t tmpccer;
+
+  /* Disable the Channel 1: Reset the CC1E Bit */
+  tmpccer = TIMx->CCER;
+ 800b70c:	68fb      	ldr	r3, [r7, #12]
+ 800b70e:	6a1b      	ldr	r3, [r3, #32]
+ 800b710:	617b      	str	r3, [r7, #20]
+  TIMx->CCER &= ~TIM_CCER_CC1E;
+ 800b712:	68fb      	ldr	r3, [r7, #12]
+ 800b714:	6a1b      	ldr	r3, [r3, #32]
+ 800b716:	f023 0201 	bic.w	r2, r3, #1
+ 800b71a:	68fb      	ldr	r3, [r7, #12]
+ 800b71c:	621a      	str	r2, [r3, #32]
+  tmpccmr1 = TIMx->CCMR1;
+ 800b71e:	68fb      	ldr	r3, [r7, #12]
+ 800b720:	699b      	ldr	r3, [r3, #24]
+ 800b722:	613b      	str	r3, [r7, #16]
+
+  /* Set the filter */
+  tmpccmr1 &= ~TIM_CCMR1_IC1F;
+ 800b724:	693b      	ldr	r3, [r7, #16]
+ 800b726:	f023 03f0 	bic.w	r3, r3, #240	; 0xf0
+ 800b72a:	613b      	str	r3, [r7, #16]
+  tmpccmr1 |= (TIM_ICFilter << 4U);
+ 800b72c:	687b      	ldr	r3, [r7, #4]
+ 800b72e:	011b      	lsls	r3, r3, #4
+ 800b730:	693a      	ldr	r2, [r7, #16]
+ 800b732:	4313      	orrs	r3, r2
+ 800b734:	613b      	str	r3, [r7, #16]
+
+  /* Select the Polarity and set the CC1E Bit */
+  tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
+ 800b736:	697b      	ldr	r3, [r7, #20]
+ 800b738:	f023 030a 	bic.w	r3, r3, #10
+ 800b73c:	617b      	str	r3, [r7, #20]
+  tmpccer |= TIM_ICPolarity;
+ 800b73e:	697a      	ldr	r2, [r7, #20]
+ 800b740:	68bb      	ldr	r3, [r7, #8]
+ 800b742:	4313      	orrs	r3, r2
+ 800b744:	617b      	str	r3, [r7, #20]
+
+  /* Write to TIMx CCMR1 and CCER registers */
+  TIMx->CCMR1 = tmpccmr1;
+ 800b746:	68fb      	ldr	r3, [r7, #12]
+ 800b748:	693a      	ldr	r2, [r7, #16]
+ 800b74a:	619a      	str	r2, [r3, #24]
+  TIMx->CCER = tmpccer;
+ 800b74c:	68fb      	ldr	r3, [r7, #12]
+ 800b74e:	697a      	ldr	r2, [r7, #20]
+ 800b750:	621a      	str	r2, [r3, #32]
+}
+ 800b752:	bf00      	nop
+ 800b754:	371c      	adds	r7, #28
+ 800b756:	46bd      	mov	sp, r7
+ 800b758:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b75c:	4770      	bx	lr
+
+0800b75e <TIM_TI2_ConfigInputStage>:
+  * @param  TIM_ICFilter Specifies the Input Capture Filter.
+  *          This parameter must be a value between 0x00 and 0x0F.
+  * @retval None
+  */
+static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
+{
+ 800b75e:	b480      	push	{r7}
+ 800b760:	b087      	sub	sp, #28
+ 800b762:	af00      	add	r7, sp, #0
+ 800b764:	60f8      	str	r0, [r7, #12]
+ 800b766:	60b9      	str	r1, [r7, #8]
+ 800b768:	607a      	str	r2, [r7, #4]
+  uint32_t tmpccmr1;
+  uint32_t tmpccer;
+
+  /* Disable the Channel 2: Reset the CC2E Bit */
+  TIMx->CCER &= ~TIM_CCER_CC2E;
+ 800b76a:	68fb      	ldr	r3, [r7, #12]
+ 800b76c:	6a1b      	ldr	r3, [r3, #32]
+ 800b76e:	f023 0210 	bic.w	r2, r3, #16
+ 800b772:	68fb      	ldr	r3, [r7, #12]
+ 800b774:	621a      	str	r2, [r3, #32]
+  tmpccmr1 = TIMx->CCMR1;
+ 800b776:	68fb      	ldr	r3, [r7, #12]
+ 800b778:	699b      	ldr	r3, [r3, #24]
+ 800b77a:	617b      	str	r3, [r7, #20]
+  tmpccer = TIMx->CCER;
+ 800b77c:	68fb      	ldr	r3, [r7, #12]
+ 800b77e:	6a1b      	ldr	r3, [r3, #32]
+ 800b780:	613b      	str	r3, [r7, #16]
+
+  /* Set the filter */
+  tmpccmr1 &= ~TIM_CCMR1_IC2F;
+ 800b782:	697b      	ldr	r3, [r7, #20]
+ 800b784:	f423 4370 	bic.w	r3, r3, #61440	; 0xf000
+ 800b788:	617b      	str	r3, [r7, #20]
+  tmpccmr1 |= (TIM_ICFilter << 12U);
+ 800b78a:	687b      	ldr	r3, [r7, #4]
+ 800b78c:	031b      	lsls	r3, r3, #12
+ 800b78e:	697a      	ldr	r2, [r7, #20]
+ 800b790:	4313      	orrs	r3, r2
+ 800b792:	617b      	str	r3, [r7, #20]
+
+  /* Select the Polarity and set the CC2E Bit */
+  tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
+ 800b794:	693b      	ldr	r3, [r7, #16]
+ 800b796:	f023 03a0 	bic.w	r3, r3, #160	; 0xa0
+ 800b79a:	613b      	str	r3, [r7, #16]
+  tmpccer |= (TIM_ICPolarity << 4U);
+ 800b79c:	68bb      	ldr	r3, [r7, #8]
+ 800b79e:	011b      	lsls	r3, r3, #4
+ 800b7a0:	693a      	ldr	r2, [r7, #16]
+ 800b7a2:	4313      	orrs	r3, r2
+ 800b7a4:	613b      	str	r3, [r7, #16]
+
+  /* Write to TIMx CCMR1 and CCER registers */
+  TIMx->CCMR1 = tmpccmr1 ;
+ 800b7a6:	68fb      	ldr	r3, [r7, #12]
+ 800b7a8:	697a      	ldr	r2, [r7, #20]
+ 800b7aa:	619a      	str	r2, [r3, #24]
+  TIMx->CCER = tmpccer;
+ 800b7ac:	68fb      	ldr	r3, [r7, #12]
+ 800b7ae:	693a      	ldr	r2, [r7, #16]
+ 800b7b0:	621a      	str	r2, [r3, #32]
+}
+ 800b7b2:	bf00      	nop
+ 800b7b4:	371c      	adds	r7, #28
+ 800b7b6:	46bd      	mov	sp, r7
+ 800b7b8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b7bc:	4770      	bx	lr
+
+0800b7be <TIM_ITRx_SetConfig>:
+  *            @arg TIM_TS_TI2FP2: Filtered Timer Input 2
+  *            @arg TIM_TS_ETRF: External Trigger input
+  * @retval None
+  */
+static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
+{
+ 800b7be:	b480      	push	{r7}
+ 800b7c0:	b085      	sub	sp, #20
+ 800b7c2:	af00      	add	r7, sp, #0
+ 800b7c4:	6078      	str	r0, [r7, #4]
+ 800b7c6:	6039      	str	r1, [r7, #0]
+  uint32_t tmpsmcr;
+
+  /* Get the TIMx SMCR register value */
+  tmpsmcr = TIMx->SMCR;
+ 800b7c8:	687b      	ldr	r3, [r7, #4]
+ 800b7ca:	689b      	ldr	r3, [r3, #8]
+ 800b7cc:	60fb      	str	r3, [r7, #12]
+  /* Reset the TS Bits */
+  tmpsmcr &= ~TIM_SMCR_TS;
+ 800b7ce:	68fb      	ldr	r3, [r7, #12]
+ 800b7d0:	f023 0370 	bic.w	r3, r3, #112	; 0x70
+ 800b7d4:	60fb      	str	r3, [r7, #12]
+  /* Set the Input Trigger source and the slave mode*/
+  tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
+ 800b7d6:	683a      	ldr	r2, [r7, #0]
+ 800b7d8:	68fb      	ldr	r3, [r7, #12]
+ 800b7da:	4313      	orrs	r3, r2
+ 800b7dc:	f043 0307 	orr.w	r3, r3, #7
+ 800b7e0:	60fb      	str	r3, [r7, #12]
+  /* Write to TIMx SMCR */
+  TIMx->SMCR = tmpsmcr;
+ 800b7e2:	687b      	ldr	r3, [r7, #4]
+ 800b7e4:	68fa      	ldr	r2, [r7, #12]
+ 800b7e6:	609a      	str	r2, [r3, #8]
+}
+ 800b7e8:	bf00      	nop
+ 800b7ea:	3714      	adds	r7, #20
+ 800b7ec:	46bd      	mov	sp, r7
+ 800b7ee:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b7f2:	4770      	bx	lr
+
+0800b7f4 <TIM_ETR_SetConfig>:
+  *          This parameter must be a value between 0x00 and 0x0F
+  * @retval None
+  */
+void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
+                       uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
+{
+ 800b7f4:	b480      	push	{r7}
+ 800b7f6:	b087      	sub	sp, #28
+ 800b7f8:	af00      	add	r7, sp, #0
+ 800b7fa:	60f8      	str	r0, [r7, #12]
+ 800b7fc:	60b9      	str	r1, [r7, #8]
+ 800b7fe:	607a      	str	r2, [r7, #4]
+ 800b800:	603b      	str	r3, [r7, #0]
+  uint32_t tmpsmcr;
+
+  tmpsmcr = TIMx->SMCR;
+ 800b802:	68fb      	ldr	r3, [r7, #12]
+ 800b804:	689b      	ldr	r3, [r3, #8]
+ 800b806:	617b      	str	r3, [r7, #20]
+
+  /* Reset the ETR Bits */
+  tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
+ 800b808:	697b      	ldr	r3, [r7, #20]
+ 800b80a:	f423 437f 	bic.w	r3, r3, #65280	; 0xff00
+ 800b80e:	617b      	str	r3, [r7, #20]
+
+  /* Set the Prescaler, the Filter value and the Polarity */
+  tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
+ 800b810:	683b      	ldr	r3, [r7, #0]
+ 800b812:	021a      	lsls	r2, r3, #8
+ 800b814:	687b      	ldr	r3, [r7, #4]
+ 800b816:	431a      	orrs	r2, r3
+ 800b818:	68bb      	ldr	r3, [r7, #8]
+ 800b81a:	4313      	orrs	r3, r2
+ 800b81c:	697a      	ldr	r2, [r7, #20]
+ 800b81e:	4313      	orrs	r3, r2
+ 800b820:	617b      	str	r3, [r7, #20]
+
+  /* Write to TIMx SMCR */
+  TIMx->SMCR = tmpsmcr;
+ 800b822:	68fb      	ldr	r3, [r7, #12]
+ 800b824:	697a      	ldr	r2, [r7, #20]
+ 800b826:	609a      	str	r2, [r3, #8]
+}
+ 800b828:	bf00      	nop
+ 800b82a:	371c      	adds	r7, #28
+ 800b82c:	46bd      	mov	sp, r7
+ 800b82e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b832:	4770      	bx	lr
+
+0800b834 <HAL_TIMEx_MasterConfigSynchronization>:
+  *         mode.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
+                                                        TIM_MasterConfigTypeDef *sMasterConfig)
+{
+ 800b834:	b480      	push	{r7}
+ 800b836:	b085      	sub	sp, #20
+ 800b838:	af00      	add	r7, sp, #0
+ 800b83a:	6078      	str	r0, [r7, #4]
+ 800b83c:	6039      	str	r1, [r7, #0]
+  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
+  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
+  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
+
+  /* Check input state */
+  __HAL_LOCK(htim);
+ 800b83e:	687b      	ldr	r3, [r7, #4]
+ 800b840:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
+ 800b844:	2b01      	cmp	r3, #1
+ 800b846:	d101      	bne.n	800b84c <HAL_TIMEx_MasterConfigSynchronization+0x18>
+ 800b848:	2302      	movs	r3, #2
+ 800b84a:	e06d      	b.n	800b928 <HAL_TIMEx_MasterConfigSynchronization+0xf4>
+ 800b84c:	687b      	ldr	r3, [r7, #4]
+ 800b84e:	2201      	movs	r2, #1
+ 800b850:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  /* Change the handler state */
+  htim->State = HAL_TIM_STATE_BUSY;
+ 800b854:	687b      	ldr	r3, [r7, #4]
+ 800b856:	2202      	movs	r2, #2
+ 800b858:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  /* Get the TIMx CR2 register value */
+  tmpcr2 = htim->Instance->CR2;
+ 800b85c:	687b      	ldr	r3, [r7, #4]
+ 800b85e:	681b      	ldr	r3, [r3, #0]
+ 800b860:	685b      	ldr	r3, [r3, #4]
+ 800b862:	60fb      	str	r3, [r7, #12]
+
+  /* Get the TIMx SMCR register value */
+  tmpsmcr = htim->Instance->SMCR;
+ 800b864:	687b      	ldr	r3, [r7, #4]
+ 800b866:	681b      	ldr	r3, [r3, #0]
+ 800b868:	689b      	ldr	r3, [r3, #8]
+ 800b86a:	60bb      	str	r3, [r7, #8]
+
+  /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
+  if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
+ 800b86c:	687b      	ldr	r3, [r7, #4]
+ 800b86e:	681b      	ldr	r3, [r3, #0]
+ 800b870:	4a30      	ldr	r2, [pc, #192]	; (800b934 <HAL_TIMEx_MasterConfigSynchronization+0x100>)
+ 800b872:	4293      	cmp	r3, r2
+ 800b874:	d004      	beq.n	800b880 <HAL_TIMEx_MasterConfigSynchronization+0x4c>
+ 800b876:	687b      	ldr	r3, [r7, #4]
+ 800b878:	681b      	ldr	r3, [r3, #0]
+ 800b87a:	4a2f      	ldr	r2, [pc, #188]	; (800b938 <HAL_TIMEx_MasterConfigSynchronization+0x104>)
+ 800b87c:	4293      	cmp	r3, r2
+ 800b87e:	d108      	bne.n	800b892 <HAL_TIMEx_MasterConfigSynchronization+0x5e>
+  {
+    /* Check the parameters */
+    assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
+
+    /* Clear the MMS2 bits */
+    tmpcr2 &= ~TIM_CR2_MMS2;
+ 800b880:	68fb      	ldr	r3, [r7, #12]
+ 800b882:	f423 0370 	bic.w	r3, r3, #15728640	; 0xf00000
+ 800b886:	60fb      	str	r3, [r7, #12]
+    /* Select the TRGO2 source*/
+    tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
+ 800b888:	683b      	ldr	r3, [r7, #0]
+ 800b88a:	685b      	ldr	r3, [r3, #4]
+ 800b88c:	68fa      	ldr	r2, [r7, #12]
+ 800b88e:	4313      	orrs	r3, r2
+ 800b890:	60fb      	str	r3, [r7, #12]
+  }
+
+  /* Reset the MMS Bits */
+  tmpcr2 &= ~TIM_CR2_MMS;
+ 800b892:	68fb      	ldr	r3, [r7, #12]
+ 800b894:	f023 0370 	bic.w	r3, r3, #112	; 0x70
+ 800b898:	60fb      	str	r3, [r7, #12]
+  /* Select the TRGO source */
+  tmpcr2 |=  sMasterConfig->MasterOutputTrigger;
+ 800b89a:	683b      	ldr	r3, [r7, #0]
+ 800b89c:	681b      	ldr	r3, [r3, #0]
+ 800b89e:	68fa      	ldr	r2, [r7, #12]
+ 800b8a0:	4313      	orrs	r3, r2
+ 800b8a2:	60fb      	str	r3, [r7, #12]
+
+  /* Update TIMx CR2 */
+  htim->Instance->CR2 = tmpcr2;
+ 800b8a4:	687b      	ldr	r3, [r7, #4]
+ 800b8a6:	681b      	ldr	r3, [r3, #0]
+ 800b8a8:	68fa      	ldr	r2, [r7, #12]
+ 800b8aa:	605a      	str	r2, [r3, #4]
+
+  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ 800b8ac:	687b      	ldr	r3, [r7, #4]
+ 800b8ae:	681b      	ldr	r3, [r3, #0]
+ 800b8b0:	4a20      	ldr	r2, [pc, #128]	; (800b934 <HAL_TIMEx_MasterConfigSynchronization+0x100>)
+ 800b8b2:	4293      	cmp	r3, r2
+ 800b8b4:	d022      	beq.n	800b8fc <HAL_TIMEx_MasterConfigSynchronization+0xc8>
+ 800b8b6:	687b      	ldr	r3, [r7, #4]
+ 800b8b8:	681b      	ldr	r3, [r3, #0]
+ 800b8ba:	f1b3 4f80 	cmp.w	r3, #1073741824	; 0x40000000
+ 800b8be:	d01d      	beq.n	800b8fc <HAL_TIMEx_MasterConfigSynchronization+0xc8>
+ 800b8c0:	687b      	ldr	r3, [r7, #4]
+ 800b8c2:	681b      	ldr	r3, [r3, #0]
+ 800b8c4:	4a1d      	ldr	r2, [pc, #116]	; (800b93c <HAL_TIMEx_MasterConfigSynchronization+0x108>)
+ 800b8c6:	4293      	cmp	r3, r2
+ 800b8c8:	d018      	beq.n	800b8fc <HAL_TIMEx_MasterConfigSynchronization+0xc8>
+ 800b8ca:	687b      	ldr	r3, [r7, #4]
+ 800b8cc:	681b      	ldr	r3, [r3, #0]
+ 800b8ce:	4a1c      	ldr	r2, [pc, #112]	; (800b940 <HAL_TIMEx_MasterConfigSynchronization+0x10c>)
+ 800b8d0:	4293      	cmp	r3, r2
+ 800b8d2:	d013      	beq.n	800b8fc <HAL_TIMEx_MasterConfigSynchronization+0xc8>
+ 800b8d4:	687b      	ldr	r3, [r7, #4]
+ 800b8d6:	681b      	ldr	r3, [r3, #0]
+ 800b8d8:	4a1a      	ldr	r2, [pc, #104]	; (800b944 <HAL_TIMEx_MasterConfigSynchronization+0x110>)
+ 800b8da:	4293      	cmp	r3, r2
+ 800b8dc:	d00e      	beq.n	800b8fc <HAL_TIMEx_MasterConfigSynchronization+0xc8>
+ 800b8de:	687b      	ldr	r3, [r7, #4]
+ 800b8e0:	681b      	ldr	r3, [r3, #0]
+ 800b8e2:	4a15      	ldr	r2, [pc, #84]	; (800b938 <HAL_TIMEx_MasterConfigSynchronization+0x104>)
+ 800b8e4:	4293      	cmp	r3, r2
+ 800b8e6:	d009      	beq.n	800b8fc <HAL_TIMEx_MasterConfigSynchronization+0xc8>
+ 800b8e8:	687b      	ldr	r3, [r7, #4]
+ 800b8ea:	681b      	ldr	r3, [r3, #0]
+ 800b8ec:	4a16      	ldr	r2, [pc, #88]	; (800b948 <HAL_TIMEx_MasterConfigSynchronization+0x114>)
+ 800b8ee:	4293      	cmp	r3, r2
+ 800b8f0:	d004      	beq.n	800b8fc <HAL_TIMEx_MasterConfigSynchronization+0xc8>
+ 800b8f2:	687b      	ldr	r3, [r7, #4]
+ 800b8f4:	681b      	ldr	r3, [r3, #0]
+ 800b8f6:	4a15      	ldr	r2, [pc, #84]	; (800b94c <HAL_TIMEx_MasterConfigSynchronization+0x118>)
+ 800b8f8:	4293      	cmp	r3, r2
+ 800b8fa:	d10c      	bne.n	800b916 <HAL_TIMEx_MasterConfigSynchronization+0xe2>
+  {
+    /* Reset the MSM Bit */
+    tmpsmcr &= ~TIM_SMCR_MSM;
+ 800b8fc:	68bb      	ldr	r3, [r7, #8]
+ 800b8fe:	f023 0380 	bic.w	r3, r3, #128	; 0x80
+ 800b902:	60bb      	str	r3, [r7, #8]
+    /* Set master mode */
+    tmpsmcr |= sMasterConfig->MasterSlaveMode;
+ 800b904:	683b      	ldr	r3, [r7, #0]
+ 800b906:	689b      	ldr	r3, [r3, #8]
+ 800b908:	68ba      	ldr	r2, [r7, #8]
+ 800b90a:	4313      	orrs	r3, r2
+ 800b90c:	60bb      	str	r3, [r7, #8]
+
+    /* Update TIMx SMCR */
+    htim->Instance->SMCR = tmpsmcr;
+ 800b90e:	687b      	ldr	r3, [r7, #4]
+ 800b910:	681b      	ldr	r3, [r3, #0]
+ 800b912:	68ba      	ldr	r2, [r7, #8]
+ 800b914:	609a      	str	r2, [r3, #8]
+  }
+
+  /* Change the htim state */
+  htim->State = HAL_TIM_STATE_READY;
+ 800b916:	687b      	ldr	r3, [r7, #4]
+ 800b918:	2201      	movs	r2, #1
+ 800b91a:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
+
+  __HAL_UNLOCK(htim);
+ 800b91e:	687b      	ldr	r3, [r7, #4]
+ 800b920:	2200      	movs	r2, #0
+ 800b922:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  return HAL_OK;
+ 800b926:	2300      	movs	r3, #0
+}
+ 800b928:	4618      	mov	r0, r3
+ 800b92a:	3714      	adds	r7, #20
+ 800b92c:	46bd      	mov	sp, r7
+ 800b92e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800b932:	4770      	bx	lr
+ 800b934:	40010000 	.word	0x40010000
+ 800b938:	40010400 	.word	0x40010400
+ 800b93c:	40000400 	.word	0x40000400
+ 800b940:	40000800 	.word	0x40000800
+ 800b944:	40000c00 	.word	0x40000c00
+ 800b948:	40014000 	.word	0x40014000
+ 800b94c:	40001800 	.word	0x40001800
+
+0800b950 <HAL_TIMEx_ConfigBreakDeadTime>:
+  *         interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
+                                                TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
+{
+ 800b950:	b480      	push	{r7}
+ 800b952:	b085      	sub	sp, #20
+ 800b954:	af00      	add	r7, sp, #0
+ 800b956:	6078      	str	r0, [r7, #4]
+ 800b958:	6039      	str	r1, [r7, #0]
+  /* Keep this variable initialized to 0 as it is used to configure BDTR register */
+  uint32_t tmpbdtr = 0U;
+ 800b95a:	2300      	movs	r3, #0
+ 800b95c:	60fb      	str	r3, [r7, #12]
+  assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
+  assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
+  assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
+
+  /* Check input state */
+  __HAL_LOCK(htim);
+ 800b95e:	687b      	ldr	r3, [r7, #4]
+ 800b960:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
+ 800b964:	2b01      	cmp	r3, #1
+ 800b966:	d101      	bne.n	800b96c <HAL_TIMEx_ConfigBreakDeadTime+0x1c>
+ 800b968:	2302      	movs	r3, #2
+ 800b96a:	e065      	b.n	800ba38 <HAL_TIMEx_ConfigBreakDeadTime+0xe8>
+ 800b96c:	687b      	ldr	r3, [r7, #4]
+ 800b96e:	2201      	movs	r2, #1
+ 800b970:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
+     the OSSI State, the dead time value and the Automatic Output Enable Bit */
+
+  /* Set the BDTR bits */
+  MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
+ 800b974:	68fb      	ldr	r3, [r7, #12]
+ 800b976:	f023 02ff 	bic.w	r2, r3, #255	; 0xff
+ 800b97a:	683b      	ldr	r3, [r7, #0]
+ 800b97c:	68db      	ldr	r3, [r3, #12]
+ 800b97e:	4313      	orrs	r3, r2
+ 800b980:	60fb      	str	r3, [r7, #12]
+  MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
+ 800b982:	68fb      	ldr	r3, [r7, #12]
+ 800b984:	f423 7240 	bic.w	r2, r3, #768	; 0x300
+ 800b988:	683b      	ldr	r3, [r7, #0]
+ 800b98a:	689b      	ldr	r3, [r3, #8]
+ 800b98c:	4313      	orrs	r3, r2
+ 800b98e:	60fb      	str	r3, [r7, #12]
+  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
+ 800b990:	68fb      	ldr	r3, [r7, #12]
+ 800b992:	f423 6280 	bic.w	r2, r3, #1024	; 0x400
+ 800b996:	683b      	ldr	r3, [r7, #0]
+ 800b998:	685b      	ldr	r3, [r3, #4]
+ 800b99a:	4313      	orrs	r3, r2
+ 800b99c:	60fb      	str	r3, [r7, #12]
+  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
+ 800b99e:	68fb      	ldr	r3, [r7, #12]
+ 800b9a0:	f423 6200 	bic.w	r2, r3, #2048	; 0x800
+ 800b9a4:	683b      	ldr	r3, [r7, #0]
+ 800b9a6:	681b      	ldr	r3, [r3, #0]
+ 800b9a8:	4313      	orrs	r3, r2
+ 800b9aa:	60fb      	str	r3, [r7, #12]
+  MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
+ 800b9ac:	68fb      	ldr	r3, [r7, #12]
+ 800b9ae:	f423 5280 	bic.w	r2, r3, #4096	; 0x1000
+ 800b9b2:	683b      	ldr	r3, [r7, #0]
+ 800b9b4:	691b      	ldr	r3, [r3, #16]
+ 800b9b6:	4313      	orrs	r3, r2
+ 800b9b8:	60fb      	str	r3, [r7, #12]
+  MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
+ 800b9ba:	68fb      	ldr	r3, [r7, #12]
+ 800b9bc:	f423 5200 	bic.w	r2, r3, #8192	; 0x2000
+ 800b9c0:	683b      	ldr	r3, [r7, #0]
+ 800b9c2:	695b      	ldr	r3, [r3, #20]
+ 800b9c4:	4313      	orrs	r3, r2
+ 800b9c6:	60fb      	str	r3, [r7, #12]
+  MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
+ 800b9c8:	68fb      	ldr	r3, [r7, #12]
+ 800b9ca:	f423 4280 	bic.w	r2, r3, #16384	; 0x4000
+ 800b9ce:	683b      	ldr	r3, [r7, #0]
+ 800b9d0:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 800b9d2:	4313      	orrs	r3, r2
+ 800b9d4:	60fb      	str	r3, [r7, #12]
+  MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
+ 800b9d6:	68fb      	ldr	r3, [r7, #12]
+ 800b9d8:	f423 2270 	bic.w	r2, r3, #983040	; 0xf0000
+ 800b9dc:	683b      	ldr	r3, [r7, #0]
+ 800b9de:	699b      	ldr	r3, [r3, #24]
+ 800b9e0:	041b      	lsls	r3, r3, #16
+ 800b9e2:	4313      	orrs	r3, r2
+ 800b9e4:	60fb      	str	r3, [r7, #12]
+
+  if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
+ 800b9e6:	687b      	ldr	r3, [r7, #4]
+ 800b9e8:	681b      	ldr	r3, [r3, #0]
+ 800b9ea:	4a16      	ldr	r2, [pc, #88]	; (800ba44 <HAL_TIMEx_ConfigBreakDeadTime+0xf4>)
+ 800b9ec:	4293      	cmp	r3, r2
+ 800b9ee:	d004      	beq.n	800b9fa <HAL_TIMEx_ConfigBreakDeadTime+0xaa>
+ 800b9f0:	687b      	ldr	r3, [r7, #4]
+ 800b9f2:	681b      	ldr	r3, [r3, #0]
+ 800b9f4:	4a14      	ldr	r2, [pc, #80]	; (800ba48 <HAL_TIMEx_ConfigBreakDeadTime+0xf8>)
+ 800b9f6:	4293      	cmp	r3, r2
+ 800b9f8:	d115      	bne.n	800ba26 <HAL_TIMEx_ConfigBreakDeadTime+0xd6>
+    assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
+    assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
+    assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
+
+    /* Set the BREAK2 input related BDTR bits */
+    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
+ 800b9fa:	68fb      	ldr	r3, [r7, #12]
+ 800b9fc:	f423 0270 	bic.w	r2, r3, #15728640	; 0xf00000
+ 800ba00:	683b      	ldr	r3, [r7, #0]
+ 800ba02:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800ba04:	051b      	lsls	r3, r3, #20
+ 800ba06:	4313      	orrs	r3, r2
+ 800ba08:	60fb      	str	r3, [r7, #12]
+    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
+ 800ba0a:	68fb      	ldr	r3, [r7, #12]
+ 800ba0c:	f023 7280 	bic.w	r2, r3, #16777216	; 0x1000000
+ 800ba10:	683b      	ldr	r3, [r7, #0]
+ 800ba12:	69db      	ldr	r3, [r3, #28]
+ 800ba14:	4313      	orrs	r3, r2
+ 800ba16:	60fb      	str	r3, [r7, #12]
+    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
+ 800ba18:	68fb      	ldr	r3, [r7, #12]
+ 800ba1a:	f023 7200 	bic.w	r2, r3, #33554432	; 0x2000000
+ 800ba1e:	683b      	ldr	r3, [r7, #0]
+ 800ba20:	6a1b      	ldr	r3, [r3, #32]
+ 800ba22:	4313      	orrs	r3, r2
+ 800ba24:	60fb      	str	r3, [r7, #12]
+  }
+
+  /* Set TIMx_BDTR */
+  htim->Instance->BDTR = tmpbdtr;
+ 800ba26:	687b      	ldr	r3, [r7, #4]
+ 800ba28:	681b      	ldr	r3, [r3, #0]
+ 800ba2a:	68fa      	ldr	r2, [r7, #12]
+ 800ba2c:	645a      	str	r2, [r3, #68]	; 0x44
+
+  __HAL_UNLOCK(htim);
+ 800ba2e:	687b      	ldr	r3, [r7, #4]
+ 800ba30:	2200      	movs	r2, #0
+ 800ba32:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  return HAL_OK;
+ 800ba36:	2300      	movs	r3, #0
+}
+ 800ba38:	4618      	mov	r0, r3
+ 800ba3a:	3714      	adds	r7, #20
+ 800ba3c:	46bd      	mov	sp, r7
+ 800ba3e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800ba42:	4770      	bx	lr
+ 800ba44:	40010000 	.word	0x40010000
+ 800ba48:	40010400 	.word	0x40010400
+
+0800ba4c <HAL_TIMEx_CommutCallback>:
+  * @brief  Hall commutation changed callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
+{
+ 800ba4c:	b480      	push	{r7}
+ 800ba4e:	b083      	sub	sp, #12
+ 800ba50:	af00      	add	r7, sp, #0
+ 800ba52:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIMEx_CommutCallback could be implemented in the user file
+   */
+}
+ 800ba54:	bf00      	nop
+ 800ba56:	370c      	adds	r7, #12
+ 800ba58:	46bd      	mov	sp, r7
+ 800ba5a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800ba5e:	4770      	bx	lr
+
+0800ba60 <HAL_TIMEx_BreakCallback>:
+  * @brief  Hall Break detection callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
+{
+ 800ba60:	b480      	push	{r7}
+ 800ba62:	b083      	sub	sp, #12
+ 800ba64:	af00      	add	r7, sp, #0
+ 800ba66:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIMEx_BreakCallback could be implemented in the user file
+   */
+}
+ 800ba68:	bf00      	nop
+ 800ba6a:	370c      	adds	r7, #12
+ 800ba6c:	46bd      	mov	sp, r7
+ 800ba6e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800ba72:	4770      	bx	lr
+
+0800ba74 <HAL_TIMEx_Break2Callback>:
+  * @brief  Hall Break2 detection callback in non blocking mode
+  * @param  htim: TIM handle
+  * @retval None
+  */
+__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
+{
+ 800ba74:	b480      	push	{r7}
+ 800ba76:	b083      	sub	sp, #12
+ 800ba78:	af00      	add	r7, sp, #0
+ 800ba7a:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function Should not be modified, when the callback is needed,
+            the HAL_TIMEx_Break2Callback could be implemented in the user file
+   */
+}
+ 800ba7c:	bf00      	nop
+ 800ba7e:	370c      	adds	r7, #12
+ 800ba80:	46bd      	mov	sp, r7
+ 800ba82:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800ba86:	4770      	bx	lr
+
+0800ba88 <HAL_UART_Init>:
+  *        parameters in the UART_InitTypeDef and initialize the associated handle.
+  * @param huart UART handle.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
+{
+ 800ba88:	b580      	push	{r7, lr}
+ 800ba8a:	b082      	sub	sp, #8
+ 800ba8c:	af00      	add	r7, sp, #0
+ 800ba8e:	6078      	str	r0, [r7, #4]
+  /* Check the UART handle allocation */
+  if (huart == NULL)
+ 800ba90:	687b      	ldr	r3, [r7, #4]
+ 800ba92:	2b00      	cmp	r3, #0
+ 800ba94:	d101      	bne.n	800ba9a <HAL_UART_Init+0x12>
+  {
+    return HAL_ERROR;
+ 800ba96:	2301      	movs	r3, #1
+ 800ba98:	e040      	b.n	800bb1c <HAL_UART_Init+0x94>
+  {
+    /* Check the parameters */
+    assert_param(IS_UART_INSTANCE(huart->Instance));
+  }
+
+  if (huart->gState == HAL_UART_STATE_RESET)
+ 800ba9a:	687b      	ldr	r3, [r7, #4]
+ 800ba9c:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 800ba9e:	2b00      	cmp	r3, #0
+ 800baa0:	d106      	bne.n	800bab0 <HAL_UART_Init+0x28>
+  {
+    /* Allocate lock resource and initialize it */
+    huart->Lock = HAL_UNLOCKED;
+ 800baa2:	687b      	ldr	r3, [r7, #4]
+ 800baa4:	2200      	movs	r2, #0
+ 800baa6:	f883 2070 	strb.w	r2, [r3, #112]	; 0x70
+
+    /* Init the low level hardware */
+    huart->MspInitCallback(huart);
+#else
+    /* Init the low level hardware : GPIO, CLOCK */
+    HAL_UART_MspInit(huart);
+ 800baaa:	6878      	ldr	r0, [r7, #4]
+ 800baac:	f7f8 fd56 	bl	800455c <HAL_UART_MspInit>
+#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
+  }
+
+  huart->gState = HAL_UART_STATE_BUSY;
+ 800bab0:	687b      	ldr	r3, [r7, #4]
+ 800bab2:	2224      	movs	r2, #36	; 0x24
+ 800bab4:	675a      	str	r2, [r3, #116]	; 0x74
+
+  __HAL_UART_DISABLE(huart);
+ 800bab6:	687b      	ldr	r3, [r7, #4]
+ 800bab8:	681b      	ldr	r3, [r3, #0]
+ 800baba:	681a      	ldr	r2, [r3, #0]
+ 800babc:	687b      	ldr	r3, [r7, #4]
+ 800babe:	681b      	ldr	r3, [r3, #0]
+ 800bac0:	f022 0201 	bic.w	r2, r2, #1
+ 800bac4:	601a      	str	r2, [r3, #0]
+
+  /* Set the UART Communication parameters */
+  if (UART_SetConfig(huart) == HAL_ERROR)
+ 800bac6:	6878      	ldr	r0, [r7, #4]
+ 800bac8:	f000 f82c 	bl	800bb24 <UART_SetConfig>
+ 800bacc:	4603      	mov	r3, r0
+ 800bace:	2b01      	cmp	r3, #1
+ 800bad0:	d101      	bne.n	800bad6 <HAL_UART_Init+0x4e>
+  {
+    return HAL_ERROR;
+ 800bad2:	2301      	movs	r3, #1
+ 800bad4:	e022      	b.n	800bb1c <HAL_UART_Init+0x94>
+  }
+
+  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
+ 800bad6:	687b      	ldr	r3, [r7, #4]
+ 800bad8:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800bada:	2b00      	cmp	r3, #0
+ 800badc:	d002      	beq.n	800bae4 <HAL_UART_Init+0x5c>
+  {
+    UART_AdvFeatureConfig(huart);
+ 800bade:	6878      	ldr	r0, [r7, #4]
+ 800bae0:	f000 faca 	bl	800c078 <UART_AdvFeatureConfig>
+  }
+
+  /* In asynchronous mode, the following bits must be kept cleared:
+  - LINEN and CLKEN bits in the USART_CR2 register,
+  - SCEN, HDSEL and IREN  bits in the USART_CR3 register.*/
+  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
+ 800bae4:	687b      	ldr	r3, [r7, #4]
+ 800bae6:	681b      	ldr	r3, [r3, #0]
+ 800bae8:	685a      	ldr	r2, [r3, #4]
+ 800baea:	687b      	ldr	r3, [r7, #4]
+ 800baec:	681b      	ldr	r3, [r3, #0]
+ 800baee:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
+ 800baf2:	605a      	str	r2, [r3, #4]
+  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
+ 800baf4:	687b      	ldr	r3, [r7, #4]
+ 800baf6:	681b      	ldr	r3, [r3, #0]
+ 800baf8:	689a      	ldr	r2, [r3, #8]
+ 800bafa:	687b      	ldr	r3, [r7, #4]
+ 800bafc:	681b      	ldr	r3, [r3, #0]
+ 800bafe:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
+ 800bb02:	609a      	str	r2, [r3, #8]
+
+  __HAL_UART_ENABLE(huart);
+ 800bb04:	687b      	ldr	r3, [r7, #4]
+ 800bb06:	681b      	ldr	r3, [r3, #0]
+ 800bb08:	681a      	ldr	r2, [r3, #0]
+ 800bb0a:	687b      	ldr	r3, [r7, #4]
+ 800bb0c:	681b      	ldr	r3, [r3, #0]
+ 800bb0e:	f042 0201 	orr.w	r2, r2, #1
+ 800bb12:	601a      	str	r2, [r3, #0]
+
+  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
+  return (UART_CheckIdleState(huart));
+ 800bb14:	6878      	ldr	r0, [r7, #4]
+ 800bb16:	f000 fb51 	bl	800c1bc <UART_CheckIdleState>
+ 800bb1a:	4603      	mov	r3, r0
+}
+ 800bb1c:	4618      	mov	r0, r3
+ 800bb1e:	3708      	adds	r7, #8
+ 800bb20:	46bd      	mov	sp, r7
+ 800bb22:	bd80      	pop	{r7, pc}
+
+0800bb24 <UART_SetConfig>:
+  * @brief Configure the UART peripheral.
+  * @param huart UART handle.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
+{
+ 800bb24:	b580      	push	{r7, lr}
+ 800bb26:	b088      	sub	sp, #32
+ 800bb28:	af00      	add	r7, sp, #0
+ 800bb2a:	6078      	str	r0, [r7, #4]
+  uint32_t tmpreg;
+  uint16_t brrtemp;
+  UART_ClockSourceTypeDef clocksource;
+  uint32_t usartdiv                   = 0x00000000U;
+ 800bb2c:	2300      	movs	r3, #0
+ 800bb2e:	61bb      	str	r3, [r7, #24]
+  HAL_StatusTypeDef ret               = HAL_OK;
+ 800bb30:	2300      	movs	r3, #0
+ 800bb32:	75fb      	strb	r3, [r7, #23]
+  *  the UART Word Length, Parity, Mode and oversampling:
+  *  set the M bits according to huart->Init.WordLength value
+  *  set PCE and PS bits according to huart->Init.Parity value
+  *  set TE and RE bits according to huart->Init.Mode value
+  *  set OVER8 bit according to huart->Init.OverSampling value */
+  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
+ 800bb34:	687b      	ldr	r3, [r7, #4]
+ 800bb36:	689a      	ldr	r2, [r3, #8]
+ 800bb38:	687b      	ldr	r3, [r7, #4]
+ 800bb3a:	691b      	ldr	r3, [r3, #16]
+ 800bb3c:	431a      	orrs	r2, r3
+ 800bb3e:	687b      	ldr	r3, [r7, #4]
+ 800bb40:	695b      	ldr	r3, [r3, #20]
+ 800bb42:	431a      	orrs	r2, r3
+ 800bb44:	687b      	ldr	r3, [r7, #4]
+ 800bb46:	69db      	ldr	r3, [r3, #28]
+ 800bb48:	4313      	orrs	r3, r2
+ 800bb4a:	613b      	str	r3, [r7, #16]
+  MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
+ 800bb4c:	687b      	ldr	r3, [r7, #4]
+ 800bb4e:	681b      	ldr	r3, [r3, #0]
+ 800bb50:	681a      	ldr	r2, [r3, #0]
+ 800bb52:	4bb1      	ldr	r3, [pc, #708]	; (800be18 <UART_SetConfig+0x2f4>)
+ 800bb54:	4013      	ands	r3, r2
+ 800bb56:	687a      	ldr	r2, [r7, #4]
+ 800bb58:	6812      	ldr	r2, [r2, #0]
+ 800bb5a:	6939      	ldr	r1, [r7, #16]
+ 800bb5c:	430b      	orrs	r3, r1
+ 800bb5e:	6013      	str	r3, [r2, #0]
+
+  /*-------------------------- USART CR2 Configuration -----------------------*/
+  /* Configure the UART Stop Bits: Set STOP[13:12] bits according
+  * to huart->Init.StopBits value */
+  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
+ 800bb60:	687b      	ldr	r3, [r7, #4]
+ 800bb62:	681b      	ldr	r3, [r3, #0]
+ 800bb64:	685b      	ldr	r3, [r3, #4]
+ 800bb66:	f423 5140 	bic.w	r1, r3, #12288	; 0x3000
+ 800bb6a:	687b      	ldr	r3, [r7, #4]
+ 800bb6c:	68da      	ldr	r2, [r3, #12]
+ 800bb6e:	687b      	ldr	r3, [r7, #4]
+ 800bb70:	681b      	ldr	r3, [r3, #0]
+ 800bb72:	430a      	orrs	r2, r1
+ 800bb74:	605a      	str	r2, [r3, #4]
+  /* Configure
+  * - UART HardWare Flow Control: set CTSE and RTSE bits according
+  *   to huart->Init.HwFlowCtl value
+  * - one-bit sampling method versus three samples' majority rule according
+  *   to huart->Init.OneBitSampling (not applicable to LPUART) */
+  tmpreg = (uint32_t)huart->Init.HwFlowCtl;
+ 800bb76:	687b      	ldr	r3, [r7, #4]
+ 800bb78:	699b      	ldr	r3, [r3, #24]
+ 800bb7a:	613b      	str	r3, [r7, #16]
+
+  tmpreg |= huart->Init.OneBitSampling;
+ 800bb7c:	687b      	ldr	r3, [r7, #4]
+ 800bb7e:	6a1b      	ldr	r3, [r3, #32]
+ 800bb80:	693a      	ldr	r2, [r7, #16]
+ 800bb82:	4313      	orrs	r3, r2
+ 800bb84:	613b      	str	r3, [r7, #16]
+  MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
+ 800bb86:	687b      	ldr	r3, [r7, #4]
+ 800bb88:	681b      	ldr	r3, [r3, #0]
+ 800bb8a:	689b      	ldr	r3, [r3, #8]
+ 800bb8c:	f423 6130 	bic.w	r1, r3, #2816	; 0xb00
+ 800bb90:	687b      	ldr	r3, [r7, #4]
+ 800bb92:	681b      	ldr	r3, [r3, #0]
+ 800bb94:	693a      	ldr	r2, [r7, #16]
+ 800bb96:	430a      	orrs	r2, r1
+ 800bb98:	609a      	str	r2, [r3, #8]
+
+
+  /*-------------------------- USART BRR Configuration -----------------------*/
+  UART_GETCLOCKSOURCE(huart, clocksource);
+ 800bb9a:	687b      	ldr	r3, [r7, #4]
+ 800bb9c:	681b      	ldr	r3, [r3, #0]
+ 800bb9e:	4a9f      	ldr	r2, [pc, #636]	; (800be1c <UART_SetConfig+0x2f8>)
+ 800bba0:	4293      	cmp	r3, r2
+ 800bba2:	d121      	bne.n	800bbe8 <UART_SetConfig+0xc4>
+ 800bba4:	4b9e      	ldr	r3, [pc, #632]	; (800be20 <UART_SetConfig+0x2fc>)
+ 800bba6:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800bbaa:	f003 0303 	and.w	r3, r3, #3
+ 800bbae:	2b03      	cmp	r3, #3
+ 800bbb0:	d816      	bhi.n	800bbe0 <UART_SetConfig+0xbc>
+ 800bbb2:	a201      	add	r2, pc, #4	; (adr r2, 800bbb8 <UART_SetConfig+0x94>)
+ 800bbb4:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 800bbb8:	0800bbc9 	.word	0x0800bbc9
+ 800bbbc:	0800bbd5 	.word	0x0800bbd5
+ 800bbc0:	0800bbcf 	.word	0x0800bbcf
+ 800bbc4:	0800bbdb 	.word	0x0800bbdb
+ 800bbc8:	2301      	movs	r3, #1
+ 800bbca:	77fb      	strb	r3, [r7, #31]
+ 800bbcc:	e151      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bbce:	2302      	movs	r3, #2
+ 800bbd0:	77fb      	strb	r3, [r7, #31]
+ 800bbd2:	e14e      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bbd4:	2304      	movs	r3, #4
+ 800bbd6:	77fb      	strb	r3, [r7, #31]
+ 800bbd8:	e14b      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bbda:	2308      	movs	r3, #8
+ 800bbdc:	77fb      	strb	r3, [r7, #31]
+ 800bbde:	e148      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bbe0:	2310      	movs	r3, #16
+ 800bbe2:	77fb      	strb	r3, [r7, #31]
+ 800bbe4:	bf00      	nop
+ 800bbe6:	e144      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bbe8:	687b      	ldr	r3, [r7, #4]
+ 800bbea:	681b      	ldr	r3, [r3, #0]
+ 800bbec:	4a8d      	ldr	r2, [pc, #564]	; (800be24 <UART_SetConfig+0x300>)
+ 800bbee:	4293      	cmp	r3, r2
+ 800bbf0:	d134      	bne.n	800bc5c <UART_SetConfig+0x138>
+ 800bbf2:	4b8b      	ldr	r3, [pc, #556]	; (800be20 <UART_SetConfig+0x2fc>)
+ 800bbf4:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800bbf8:	f003 030c 	and.w	r3, r3, #12
+ 800bbfc:	2b0c      	cmp	r3, #12
+ 800bbfe:	d829      	bhi.n	800bc54 <UART_SetConfig+0x130>
+ 800bc00:	a201      	add	r2, pc, #4	; (adr r2, 800bc08 <UART_SetConfig+0xe4>)
+ 800bc02:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 800bc06:	bf00      	nop
+ 800bc08:	0800bc3d 	.word	0x0800bc3d
+ 800bc0c:	0800bc55 	.word	0x0800bc55
+ 800bc10:	0800bc55 	.word	0x0800bc55
+ 800bc14:	0800bc55 	.word	0x0800bc55
+ 800bc18:	0800bc49 	.word	0x0800bc49
+ 800bc1c:	0800bc55 	.word	0x0800bc55
+ 800bc20:	0800bc55 	.word	0x0800bc55
+ 800bc24:	0800bc55 	.word	0x0800bc55
+ 800bc28:	0800bc43 	.word	0x0800bc43
+ 800bc2c:	0800bc55 	.word	0x0800bc55
+ 800bc30:	0800bc55 	.word	0x0800bc55
+ 800bc34:	0800bc55 	.word	0x0800bc55
+ 800bc38:	0800bc4f 	.word	0x0800bc4f
+ 800bc3c:	2300      	movs	r3, #0
+ 800bc3e:	77fb      	strb	r3, [r7, #31]
+ 800bc40:	e117      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bc42:	2302      	movs	r3, #2
+ 800bc44:	77fb      	strb	r3, [r7, #31]
+ 800bc46:	e114      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bc48:	2304      	movs	r3, #4
+ 800bc4a:	77fb      	strb	r3, [r7, #31]
+ 800bc4c:	e111      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bc4e:	2308      	movs	r3, #8
+ 800bc50:	77fb      	strb	r3, [r7, #31]
+ 800bc52:	e10e      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bc54:	2310      	movs	r3, #16
+ 800bc56:	77fb      	strb	r3, [r7, #31]
+ 800bc58:	bf00      	nop
+ 800bc5a:	e10a      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bc5c:	687b      	ldr	r3, [r7, #4]
+ 800bc5e:	681b      	ldr	r3, [r3, #0]
+ 800bc60:	4a71      	ldr	r2, [pc, #452]	; (800be28 <UART_SetConfig+0x304>)
+ 800bc62:	4293      	cmp	r3, r2
+ 800bc64:	d120      	bne.n	800bca8 <UART_SetConfig+0x184>
+ 800bc66:	4b6e      	ldr	r3, [pc, #440]	; (800be20 <UART_SetConfig+0x2fc>)
+ 800bc68:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800bc6c:	f003 0330 	and.w	r3, r3, #48	; 0x30
+ 800bc70:	2b10      	cmp	r3, #16
+ 800bc72:	d00f      	beq.n	800bc94 <UART_SetConfig+0x170>
+ 800bc74:	2b10      	cmp	r3, #16
+ 800bc76:	d802      	bhi.n	800bc7e <UART_SetConfig+0x15a>
+ 800bc78:	2b00      	cmp	r3, #0
+ 800bc7a:	d005      	beq.n	800bc88 <UART_SetConfig+0x164>
+ 800bc7c:	e010      	b.n	800bca0 <UART_SetConfig+0x17c>
+ 800bc7e:	2b20      	cmp	r3, #32
+ 800bc80:	d005      	beq.n	800bc8e <UART_SetConfig+0x16a>
+ 800bc82:	2b30      	cmp	r3, #48	; 0x30
+ 800bc84:	d009      	beq.n	800bc9a <UART_SetConfig+0x176>
+ 800bc86:	e00b      	b.n	800bca0 <UART_SetConfig+0x17c>
+ 800bc88:	2300      	movs	r3, #0
+ 800bc8a:	77fb      	strb	r3, [r7, #31]
+ 800bc8c:	e0f1      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bc8e:	2302      	movs	r3, #2
+ 800bc90:	77fb      	strb	r3, [r7, #31]
+ 800bc92:	e0ee      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bc94:	2304      	movs	r3, #4
+ 800bc96:	77fb      	strb	r3, [r7, #31]
+ 800bc98:	e0eb      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bc9a:	2308      	movs	r3, #8
+ 800bc9c:	77fb      	strb	r3, [r7, #31]
+ 800bc9e:	e0e8      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bca0:	2310      	movs	r3, #16
+ 800bca2:	77fb      	strb	r3, [r7, #31]
+ 800bca4:	bf00      	nop
+ 800bca6:	e0e4      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bca8:	687b      	ldr	r3, [r7, #4]
+ 800bcaa:	681b      	ldr	r3, [r3, #0]
+ 800bcac:	4a5f      	ldr	r2, [pc, #380]	; (800be2c <UART_SetConfig+0x308>)
+ 800bcae:	4293      	cmp	r3, r2
+ 800bcb0:	d120      	bne.n	800bcf4 <UART_SetConfig+0x1d0>
+ 800bcb2:	4b5b      	ldr	r3, [pc, #364]	; (800be20 <UART_SetConfig+0x2fc>)
+ 800bcb4:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800bcb8:	f003 03c0 	and.w	r3, r3, #192	; 0xc0
+ 800bcbc:	2b40      	cmp	r3, #64	; 0x40
+ 800bcbe:	d00f      	beq.n	800bce0 <UART_SetConfig+0x1bc>
+ 800bcc0:	2b40      	cmp	r3, #64	; 0x40
+ 800bcc2:	d802      	bhi.n	800bcca <UART_SetConfig+0x1a6>
+ 800bcc4:	2b00      	cmp	r3, #0
+ 800bcc6:	d005      	beq.n	800bcd4 <UART_SetConfig+0x1b0>
+ 800bcc8:	e010      	b.n	800bcec <UART_SetConfig+0x1c8>
+ 800bcca:	2b80      	cmp	r3, #128	; 0x80
+ 800bccc:	d005      	beq.n	800bcda <UART_SetConfig+0x1b6>
+ 800bcce:	2bc0      	cmp	r3, #192	; 0xc0
+ 800bcd0:	d009      	beq.n	800bce6 <UART_SetConfig+0x1c2>
+ 800bcd2:	e00b      	b.n	800bcec <UART_SetConfig+0x1c8>
+ 800bcd4:	2300      	movs	r3, #0
+ 800bcd6:	77fb      	strb	r3, [r7, #31]
+ 800bcd8:	e0cb      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bcda:	2302      	movs	r3, #2
+ 800bcdc:	77fb      	strb	r3, [r7, #31]
+ 800bcde:	e0c8      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bce0:	2304      	movs	r3, #4
+ 800bce2:	77fb      	strb	r3, [r7, #31]
+ 800bce4:	e0c5      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bce6:	2308      	movs	r3, #8
+ 800bce8:	77fb      	strb	r3, [r7, #31]
+ 800bcea:	e0c2      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bcec:	2310      	movs	r3, #16
+ 800bcee:	77fb      	strb	r3, [r7, #31]
+ 800bcf0:	bf00      	nop
+ 800bcf2:	e0be      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bcf4:	687b      	ldr	r3, [r7, #4]
+ 800bcf6:	681b      	ldr	r3, [r3, #0]
+ 800bcf8:	4a4d      	ldr	r2, [pc, #308]	; (800be30 <UART_SetConfig+0x30c>)
+ 800bcfa:	4293      	cmp	r3, r2
+ 800bcfc:	d124      	bne.n	800bd48 <UART_SetConfig+0x224>
+ 800bcfe:	4b48      	ldr	r3, [pc, #288]	; (800be20 <UART_SetConfig+0x2fc>)
+ 800bd00:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800bd04:	f403 7340 	and.w	r3, r3, #768	; 0x300
+ 800bd08:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
+ 800bd0c:	d012      	beq.n	800bd34 <UART_SetConfig+0x210>
+ 800bd0e:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
+ 800bd12:	d802      	bhi.n	800bd1a <UART_SetConfig+0x1f6>
+ 800bd14:	2b00      	cmp	r3, #0
+ 800bd16:	d007      	beq.n	800bd28 <UART_SetConfig+0x204>
+ 800bd18:	e012      	b.n	800bd40 <UART_SetConfig+0x21c>
+ 800bd1a:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
+ 800bd1e:	d006      	beq.n	800bd2e <UART_SetConfig+0x20a>
+ 800bd20:	f5b3 7f40 	cmp.w	r3, #768	; 0x300
+ 800bd24:	d009      	beq.n	800bd3a <UART_SetConfig+0x216>
+ 800bd26:	e00b      	b.n	800bd40 <UART_SetConfig+0x21c>
+ 800bd28:	2300      	movs	r3, #0
+ 800bd2a:	77fb      	strb	r3, [r7, #31]
+ 800bd2c:	e0a1      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bd2e:	2302      	movs	r3, #2
+ 800bd30:	77fb      	strb	r3, [r7, #31]
+ 800bd32:	e09e      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bd34:	2304      	movs	r3, #4
+ 800bd36:	77fb      	strb	r3, [r7, #31]
+ 800bd38:	e09b      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bd3a:	2308      	movs	r3, #8
+ 800bd3c:	77fb      	strb	r3, [r7, #31]
+ 800bd3e:	e098      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bd40:	2310      	movs	r3, #16
+ 800bd42:	77fb      	strb	r3, [r7, #31]
+ 800bd44:	bf00      	nop
+ 800bd46:	e094      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bd48:	687b      	ldr	r3, [r7, #4]
+ 800bd4a:	681b      	ldr	r3, [r3, #0]
+ 800bd4c:	4a39      	ldr	r2, [pc, #228]	; (800be34 <UART_SetConfig+0x310>)
+ 800bd4e:	4293      	cmp	r3, r2
+ 800bd50:	d124      	bne.n	800bd9c <UART_SetConfig+0x278>
+ 800bd52:	4b33      	ldr	r3, [pc, #204]	; (800be20 <UART_SetConfig+0x2fc>)
+ 800bd54:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800bd58:	f403 6340 	and.w	r3, r3, #3072	; 0xc00
+ 800bd5c:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
+ 800bd60:	d012      	beq.n	800bd88 <UART_SetConfig+0x264>
+ 800bd62:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
+ 800bd66:	d802      	bhi.n	800bd6e <UART_SetConfig+0x24a>
+ 800bd68:	2b00      	cmp	r3, #0
+ 800bd6a:	d007      	beq.n	800bd7c <UART_SetConfig+0x258>
+ 800bd6c:	e012      	b.n	800bd94 <UART_SetConfig+0x270>
+ 800bd6e:	f5b3 6f00 	cmp.w	r3, #2048	; 0x800
+ 800bd72:	d006      	beq.n	800bd82 <UART_SetConfig+0x25e>
+ 800bd74:	f5b3 6f40 	cmp.w	r3, #3072	; 0xc00
+ 800bd78:	d009      	beq.n	800bd8e <UART_SetConfig+0x26a>
+ 800bd7a:	e00b      	b.n	800bd94 <UART_SetConfig+0x270>
+ 800bd7c:	2301      	movs	r3, #1
+ 800bd7e:	77fb      	strb	r3, [r7, #31]
+ 800bd80:	e077      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bd82:	2302      	movs	r3, #2
+ 800bd84:	77fb      	strb	r3, [r7, #31]
+ 800bd86:	e074      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bd88:	2304      	movs	r3, #4
+ 800bd8a:	77fb      	strb	r3, [r7, #31]
+ 800bd8c:	e071      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bd8e:	2308      	movs	r3, #8
+ 800bd90:	77fb      	strb	r3, [r7, #31]
+ 800bd92:	e06e      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bd94:	2310      	movs	r3, #16
+ 800bd96:	77fb      	strb	r3, [r7, #31]
+ 800bd98:	bf00      	nop
+ 800bd9a:	e06a      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bd9c:	687b      	ldr	r3, [r7, #4]
+ 800bd9e:	681b      	ldr	r3, [r3, #0]
+ 800bda0:	4a25      	ldr	r2, [pc, #148]	; (800be38 <UART_SetConfig+0x314>)
+ 800bda2:	4293      	cmp	r3, r2
+ 800bda4:	d124      	bne.n	800bdf0 <UART_SetConfig+0x2cc>
+ 800bda6:	4b1e      	ldr	r3, [pc, #120]	; (800be20 <UART_SetConfig+0x2fc>)
+ 800bda8:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800bdac:	f403 5340 	and.w	r3, r3, #12288	; 0x3000
+ 800bdb0:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
+ 800bdb4:	d012      	beq.n	800bddc <UART_SetConfig+0x2b8>
+ 800bdb6:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
+ 800bdba:	d802      	bhi.n	800bdc2 <UART_SetConfig+0x29e>
+ 800bdbc:	2b00      	cmp	r3, #0
+ 800bdbe:	d007      	beq.n	800bdd0 <UART_SetConfig+0x2ac>
+ 800bdc0:	e012      	b.n	800bde8 <UART_SetConfig+0x2c4>
+ 800bdc2:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
+ 800bdc6:	d006      	beq.n	800bdd6 <UART_SetConfig+0x2b2>
+ 800bdc8:	f5b3 5f40 	cmp.w	r3, #12288	; 0x3000
+ 800bdcc:	d009      	beq.n	800bde2 <UART_SetConfig+0x2be>
+ 800bdce:	e00b      	b.n	800bde8 <UART_SetConfig+0x2c4>
+ 800bdd0:	2300      	movs	r3, #0
+ 800bdd2:	77fb      	strb	r3, [r7, #31]
+ 800bdd4:	e04d      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bdd6:	2302      	movs	r3, #2
+ 800bdd8:	77fb      	strb	r3, [r7, #31]
+ 800bdda:	e04a      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bddc:	2304      	movs	r3, #4
+ 800bdde:	77fb      	strb	r3, [r7, #31]
+ 800bde0:	e047      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bde2:	2308      	movs	r3, #8
+ 800bde4:	77fb      	strb	r3, [r7, #31]
+ 800bde6:	e044      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bde8:	2310      	movs	r3, #16
+ 800bdea:	77fb      	strb	r3, [r7, #31]
+ 800bdec:	bf00      	nop
+ 800bdee:	e040      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800bdf0:	687b      	ldr	r3, [r7, #4]
+ 800bdf2:	681b      	ldr	r3, [r3, #0]
+ 800bdf4:	4a11      	ldr	r2, [pc, #68]	; (800be3c <UART_SetConfig+0x318>)
+ 800bdf6:	4293      	cmp	r3, r2
+ 800bdf8:	d139      	bne.n	800be6e <UART_SetConfig+0x34a>
+ 800bdfa:	4b09      	ldr	r3, [pc, #36]	; (800be20 <UART_SetConfig+0x2fc>)
+ 800bdfc:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 800be00:	f403 4340 	and.w	r3, r3, #49152	; 0xc000
+ 800be04:	f5b3 4f80 	cmp.w	r3, #16384	; 0x4000
+ 800be08:	d027      	beq.n	800be5a <UART_SetConfig+0x336>
+ 800be0a:	f5b3 4f80 	cmp.w	r3, #16384	; 0x4000
+ 800be0e:	d817      	bhi.n	800be40 <UART_SetConfig+0x31c>
+ 800be10:	2b00      	cmp	r3, #0
+ 800be12:	d01c      	beq.n	800be4e <UART_SetConfig+0x32a>
+ 800be14:	e027      	b.n	800be66 <UART_SetConfig+0x342>
+ 800be16:	bf00      	nop
+ 800be18:	efff69f3 	.word	0xefff69f3
+ 800be1c:	40011000 	.word	0x40011000
+ 800be20:	40023800 	.word	0x40023800
+ 800be24:	40004400 	.word	0x40004400
+ 800be28:	40004800 	.word	0x40004800
+ 800be2c:	40004c00 	.word	0x40004c00
+ 800be30:	40005000 	.word	0x40005000
+ 800be34:	40011400 	.word	0x40011400
+ 800be38:	40007800 	.word	0x40007800
+ 800be3c:	40007c00 	.word	0x40007c00
+ 800be40:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
+ 800be44:	d006      	beq.n	800be54 <UART_SetConfig+0x330>
+ 800be46:	f5b3 4f40 	cmp.w	r3, #49152	; 0xc000
+ 800be4a:	d009      	beq.n	800be60 <UART_SetConfig+0x33c>
+ 800be4c:	e00b      	b.n	800be66 <UART_SetConfig+0x342>
+ 800be4e:	2300      	movs	r3, #0
+ 800be50:	77fb      	strb	r3, [r7, #31]
+ 800be52:	e00e      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800be54:	2302      	movs	r3, #2
+ 800be56:	77fb      	strb	r3, [r7, #31]
+ 800be58:	e00b      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800be5a:	2304      	movs	r3, #4
+ 800be5c:	77fb      	strb	r3, [r7, #31]
+ 800be5e:	e008      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800be60:	2308      	movs	r3, #8
+ 800be62:	77fb      	strb	r3, [r7, #31]
+ 800be64:	e005      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800be66:	2310      	movs	r3, #16
+ 800be68:	77fb      	strb	r3, [r7, #31]
+ 800be6a:	bf00      	nop
+ 800be6c:	e001      	b.n	800be72 <UART_SetConfig+0x34e>
+ 800be6e:	2310      	movs	r3, #16
+ 800be70:	77fb      	strb	r3, [r7, #31]
+
+  if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
+ 800be72:	687b      	ldr	r3, [r7, #4]
+ 800be74:	69db      	ldr	r3, [r3, #28]
+ 800be76:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
+ 800be7a:	d17f      	bne.n	800bf7c <UART_SetConfig+0x458>
+  {
+    switch (clocksource)
+ 800be7c:	7ffb      	ldrb	r3, [r7, #31]
+ 800be7e:	2b08      	cmp	r3, #8
+ 800be80:	d85c      	bhi.n	800bf3c <UART_SetConfig+0x418>
+ 800be82:	a201      	add	r2, pc, #4	; (adr r2, 800be88 <UART_SetConfig+0x364>)
+ 800be84:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 800be88:	0800bead 	.word	0x0800bead
+ 800be8c:	0800becd 	.word	0x0800becd
+ 800be90:	0800beed 	.word	0x0800beed
+ 800be94:	0800bf3d 	.word	0x0800bf3d
+ 800be98:	0800bf05 	.word	0x0800bf05
+ 800be9c:	0800bf3d 	.word	0x0800bf3d
+ 800bea0:	0800bf3d 	.word	0x0800bf3d
+ 800bea4:	0800bf3d 	.word	0x0800bf3d
+ 800bea8:	0800bf25 	.word	0x0800bf25
+    {
+      case UART_CLOCKSOURCE_PCLK1:
+        pclk = HAL_RCC_GetPCLK1Freq();
+ 800beac:	f7fd fb78 	bl	80095a0 <HAL_RCC_GetPCLK1Freq>
+ 800beb0:	60f8      	str	r0, [r7, #12]
+        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
+ 800beb2:	68fb      	ldr	r3, [r7, #12]
+ 800beb4:	005a      	lsls	r2, r3, #1
+ 800beb6:	687b      	ldr	r3, [r7, #4]
+ 800beb8:	685b      	ldr	r3, [r3, #4]
+ 800beba:	085b      	lsrs	r3, r3, #1
+ 800bebc:	441a      	add	r2, r3
+ 800bebe:	687b      	ldr	r3, [r7, #4]
+ 800bec0:	685b      	ldr	r3, [r3, #4]
+ 800bec2:	fbb2 f3f3 	udiv	r3, r2, r3
+ 800bec6:	b29b      	uxth	r3, r3
+ 800bec8:	61bb      	str	r3, [r7, #24]
+        break;
+ 800beca:	e03a      	b.n	800bf42 <UART_SetConfig+0x41e>
+      case UART_CLOCKSOURCE_PCLK2:
+        pclk = HAL_RCC_GetPCLK2Freq();
+ 800becc:	f7fd fb7c 	bl	80095c8 <HAL_RCC_GetPCLK2Freq>
+ 800bed0:	60f8      	str	r0, [r7, #12]
+        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
+ 800bed2:	68fb      	ldr	r3, [r7, #12]
+ 800bed4:	005a      	lsls	r2, r3, #1
+ 800bed6:	687b      	ldr	r3, [r7, #4]
+ 800bed8:	685b      	ldr	r3, [r3, #4]
+ 800beda:	085b      	lsrs	r3, r3, #1
+ 800bedc:	441a      	add	r2, r3
+ 800bede:	687b      	ldr	r3, [r7, #4]
+ 800bee0:	685b      	ldr	r3, [r3, #4]
+ 800bee2:	fbb2 f3f3 	udiv	r3, r2, r3
+ 800bee6:	b29b      	uxth	r3, r3
+ 800bee8:	61bb      	str	r3, [r7, #24]
+        break;
+ 800beea:	e02a      	b.n	800bf42 <UART_SetConfig+0x41e>
+      case UART_CLOCKSOURCE_HSI:
+        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
+ 800beec:	687b      	ldr	r3, [r7, #4]
+ 800beee:	685b      	ldr	r3, [r3, #4]
+ 800bef0:	085a      	lsrs	r2, r3, #1
+ 800bef2:	4b5f      	ldr	r3, [pc, #380]	; (800c070 <UART_SetConfig+0x54c>)
+ 800bef4:	4413      	add	r3, r2
+ 800bef6:	687a      	ldr	r2, [r7, #4]
+ 800bef8:	6852      	ldr	r2, [r2, #4]
+ 800befa:	fbb3 f3f2 	udiv	r3, r3, r2
+ 800befe:	b29b      	uxth	r3, r3
+ 800bf00:	61bb      	str	r3, [r7, #24]
+        break;
+ 800bf02:	e01e      	b.n	800bf42 <UART_SetConfig+0x41e>
+      case UART_CLOCKSOURCE_SYSCLK:
+        pclk = HAL_RCC_GetSysClockFreq();
+ 800bf04:	f7fd fa8e 	bl	8009424 <HAL_RCC_GetSysClockFreq>
+ 800bf08:	60f8      	str	r0, [r7, #12]
+        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
+ 800bf0a:	68fb      	ldr	r3, [r7, #12]
+ 800bf0c:	005a      	lsls	r2, r3, #1
+ 800bf0e:	687b      	ldr	r3, [r7, #4]
+ 800bf10:	685b      	ldr	r3, [r3, #4]
+ 800bf12:	085b      	lsrs	r3, r3, #1
+ 800bf14:	441a      	add	r2, r3
+ 800bf16:	687b      	ldr	r3, [r7, #4]
+ 800bf18:	685b      	ldr	r3, [r3, #4]
+ 800bf1a:	fbb2 f3f3 	udiv	r3, r2, r3
+ 800bf1e:	b29b      	uxth	r3, r3
+ 800bf20:	61bb      	str	r3, [r7, #24]
+        break;
+ 800bf22:	e00e      	b.n	800bf42 <UART_SetConfig+0x41e>
+      case UART_CLOCKSOURCE_LSE:
+        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
+ 800bf24:	687b      	ldr	r3, [r7, #4]
+ 800bf26:	685b      	ldr	r3, [r3, #4]
+ 800bf28:	085b      	lsrs	r3, r3, #1
+ 800bf2a:	f503 3280 	add.w	r2, r3, #65536	; 0x10000
+ 800bf2e:	687b      	ldr	r3, [r7, #4]
+ 800bf30:	685b      	ldr	r3, [r3, #4]
+ 800bf32:	fbb2 f3f3 	udiv	r3, r2, r3
+ 800bf36:	b29b      	uxth	r3, r3
+ 800bf38:	61bb      	str	r3, [r7, #24]
+        break;
+ 800bf3a:	e002      	b.n	800bf42 <UART_SetConfig+0x41e>
+      default:
+        ret = HAL_ERROR;
+ 800bf3c:	2301      	movs	r3, #1
+ 800bf3e:	75fb      	strb	r3, [r7, #23]
+        break;
+ 800bf40:	bf00      	nop
+    }
+
+    /* USARTDIV must be greater than or equal to 0d16 */
+    if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
+ 800bf42:	69bb      	ldr	r3, [r7, #24]
+ 800bf44:	2b0f      	cmp	r3, #15
+ 800bf46:	d916      	bls.n	800bf76 <UART_SetConfig+0x452>
+ 800bf48:	69bb      	ldr	r3, [r7, #24]
+ 800bf4a:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 800bf4e:	d212      	bcs.n	800bf76 <UART_SetConfig+0x452>
+    {
+      brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
+ 800bf50:	69bb      	ldr	r3, [r7, #24]
+ 800bf52:	b29b      	uxth	r3, r3
+ 800bf54:	f023 030f 	bic.w	r3, r3, #15
+ 800bf58:	817b      	strh	r3, [r7, #10]
+      brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
+ 800bf5a:	69bb      	ldr	r3, [r7, #24]
+ 800bf5c:	085b      	lsrs	r3, r3, #1
+ 800bf5e:	b29b      	uxth	r3, r3
+ 800bf60:	f003 0307 	and.w	r3, r3, #7
+ 800bf64:	b29a      	uxth	r2, r3
+ 800bf66:	897b      	ldrh	r3, [r7, #10]
+ 800bf68:	4313      	orrs	r3, r2
+ 800bf6a:	817b      	strh	r3, [r7, #10]
+      huart->Instance->BRR = brrtemp;
+ 800bf6c:	687b      	ldr	r3, [r7, #4]
+ 800bf6e:	681b      	ldr	r3, [r3, #0]
+ 800bf70:	897a      	ldrh	r2, [r7, #10]
+ 800bf72:	60da      	str	r2, [r3, #12]
+ 800bf74:	e070      	b.n	800c058 <UART_SetConfig+0x534>
+    }
+    else
+    {
+      ret = HAL_ERROR;
+ 800bf76:	2301      	movs	r3, #1
+ 800bf78:	75fb      	strb	r3, [r7, #23]
+ 800bf7a:	e06d      	b.n	800c058 <UART_SetConfig+0x534>
+    }
+  }
+  else
+  {
+    switch (clocksource)
+ 800bf7c:	7ffb      	ldrb	r3, [r7, #31]
+ 800bf7e:	2b08      	cmp	r3, #8
+ 800bf80:	d859      	bhi.n	800c036 <UART_SetConfig+0x512>
+ 800bf82:	a201      	add	r2, pc, #4	; (adr r2, 800bf88 <UART_SetConfig+0x464>)
+ 800bf84:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 800bf88:	0800bfad 	.word	0x0800bfad
+ 800bf8c:	0800bfcb 	.word	0x0800bfcb
+ 800bf90:	0800bfe9 	.word	0x0800bfe9
+ 800bf94:	0800c037 	.word	0x0800c037
+ 800bf98:	0800c001 	.word	0x0800c001
+ 800bf9c:	0800c037 	.word	0x0800c037
+ 800bfa0:	0800c037 	.word	0x0800c037
+ 800bfa4:	0800c037 	.word	0x0800c037
+ 800bfa8:	0800c01f 	.word	0x0800c01f
+    {
+      case UART_CLOCKSOURCE_PCLK1:
+        pclk = HAL_RCC_GetPCLK1Freq();
+ 800bfac:	f7fd faf8 	bl	80095a0 <HAL_RCC_GetPCLK1Freq>
+ 800bfb0:	60f8      	str	r0, [r7, #12]
+        usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
+ 800bfb2:	687b      	ldr	r3, [r7, #4]
+ 800bfb4:	685b      	ldr	r3, [r3, #4]
+ 800bfb6:	085a      	lsrs	r2, r3, #1
+ 800bfb8:	68fb      	ldr	r3, [r7, #12]
+ 800bfba:	441a      	add	r2, r3
+ 800bfbc:	687b      	ldr	r3, [r7, #4]
+ 800bfbe:	685b      	ldr	r3, [r3, #4]
+ 800bfc0:	fbb2 f3f3 	udiv	r3, r2, r3
+ 800bfc4:	b29b      	uxth	r3, r3
+ 800bfc6:	61bb      	str	r3, [r7, #24]
+        break;
+ 800bfc8:	e038      	b.n	800c03c <UART_SetConfig+0x518>
+      case UART_CLOCKSOURCE_PCLK2:
+        pclk = HAL_RCC_GetPCLK2Freq();
+ 800bfca:	f7fd fafd 	bl	80095c8 <HAL_RCC_GetPCLK2Freq>
+ 800bfce:	60f8      	str	r0, [r7, #12]
+        usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
+ 800bfd0:	687b      	ldr	r3, [r7, #4]
+ 800bfd2:	685b      	ldr	r3, [r3, #4]
+ 800bfd4:	085a      	lsrs	r2, r3, #1
+ 800bfd6:	68fb      	ldr	r3, [r7, #12]
+ 800bfd8:	441a      	add	r2, r3
+ 800bfda:	687b      	ldr	r3, [r7, #4]
+ 800bfdc:	685b      	ldr	r3, [r3, #4]
+ 800bfde:	fbb2 f3f3 	udiv	r3, r2, r3
+ 800bfe2:	b29b      	uxth	r3, r3
+ 800bfe4:	61bb      	str	r3, [r7, #24]
+        break;
+ 800bfe6:	e029      	b.n	800c03c <UART_SetConfig+0x518>
+      case UART_CLOCKSOURCE_HSI:
+        usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
+ 800bfe8:	687b      	ldr	r3, [r7, #4]
+ 800bfea:	685b      	ldr	r3, [r3, #4]
+ 800bfec:	085a      	lsrs	r2, r3, #1
+ 800bfee:	4b21      	ldr	r3, [pc, #132]	; (800c074 <UART_SetConfig+0x550>)
+ 800bff0:	4413      	add	r3, r2
+ 800bff2:	687a      	ldr	r2, [r7, #4]
+ 800bff4:	6852      	ldr	r2, [r2, #4]
+ 800bff6:	fbb3 f3f2 	udiv	r3, r3, r2
+ 800bffa:	b29b      	uxth	r3, r3
+ 800bffc:	61bb      	str	r3, [r7, #24]
+        break;
+ 800bffe:	e01d      	b.n	800c03c <UART_SetConfig+0x518>
+      case UART_CLOCKSOURCE_SYSCLK:
+        pclk = HAL_RCC_GetSysClockFreq();
+ 800c000:	f7fd fa10 	bl	8009424 <HAL_RCC_GetSysClockFreq>
+ 800c004:	60f8      	str	r0, [r7, #12]
+        usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
+ 800c006:	687b      	ldr	r3, [r7, #4]
+ 800c008:	685b      	ldr	r3, [r3, #4]
+ 800c00a:	085a      	lsrs	r2, r3, #1
+ 800c00c:	68fb      	ldr	r3, [r7, #12]
+ 800c00e:	441a      	add	r2, r3
+ 800c010:	687b      	ldr	r3, [r7, #4]
+ 800c012:	685b      	ldr	r3, [r3, #4]
+ 800c014:	fbb2 f3f3 	udiv	r3, r2, r3
+ 800c018:	b29b      	uxth	r3, r3
+ 800c01a:	61bb      	str	r3, [r7, #24]
+        break;
+ 800c01c:	e00e      	b.n	800c03c <UART_SetConfig+0x518>
+      case UART_CLOCKSOURCE_LSE:
+        usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
+ 800c01e:	687b      	ldr	r3, [r7, #4]
+ 800c020:	685b      	ldr	r3, [r3, #4]
+ 800c022:	085b      	lsrs	r3, r3, #1
+ 800c024:	f503 4200 	add.w	r2, r3, #32768	; 0x8000
+ 800c028:	687b      	ldr	r3, [r7, #4]
+ 800c02a:	685b      	ldr	r3, [r3, #4]
+ 800c02c:	fbb2 f3f3 	udiv	r3, r2, r3
+ 800c030:	b29b      	uxth	r3, r3
+ 800c032:	61bb      	str	r3, [r7, #24]
+        break;
+ 800c034:	e002      	b.n	800c03c <UART_SetConfig+0x518>
+      default:
+        ret = HAL_ERROR;
+ 800c036:	2301      	movs	r3, #1
+ 800c038:	75fb      	strb	r3, [r7, #23]
+        break;
+ 800c03a:	bf00      	nop
+    }
+
+    /* USARTDIV must be greater than or equal to 0d16 */
+    if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
+ 800c03c:	69bb      	ldr	r3, [r7, #24]
+ 800c03e:	2b0f      	cmp	r3, #15
+ 800c040:	d908      	bls.n	800c054 <UART_SetConfig+0x530>
+ 800c042:	69bb      	ldr	r3, [r7, #24]
+ 800c044:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 800c048:	d204      	bcs.n	800c054 <UART_SetConfig+0x530>
+    {
+      huart->Instance->BRR = usartdiv;
+ 800c04a:	687b      	ldr	r3, [r7, #4]
+ 800c04c:	681b      	ldr	r3, [r3, #0]
+ 800c04e:	69ba      	ldr	r2, [r7, #24]
+ 800c050:	60da      	str	r2, [r3, #12]
+ 800c052:	e001      	b.n	800c058 <UART_SetConfig+0x534>
+    }
+    else
+    {
+      ret = HAL_ERROR;
+ 800c054:	2301      	movs	r3, #1
+ 800c056:	75fb      	strb	r3, [r7, #23]
+    }
+  }
+
+
+  /* Clear ISR function pointers */
+  huart->RxISR = NULL;
+ 800c058:	687b      	ldr	r3, [r7, #4]
+ 800c05a:	2200      	movs	r2, #0
+ 800c05c:	661a      	str	r2, [r3, #96]	; 0x60
+  huart->TxISR = NULL;
+ 800c05e:	687b      	ldr	r3, [r7, #4]
+ 800c060:	2200      	movs	r2, #0
+ 800c062:	665a      	str	r2, [r3, #100]	; 0x64
+
+  return ret;
+ 800c064:	7dfb      	ldrb	r3, [r7, #23]
+}
+ 800c066:	4618      	mov	r0, r3
+ 800c068:	3720      	adds	r7, #32
+ 800c06a:	46bd      	mov	sp, r7
+ 800c06c:	bd80      	pop	{r7, pc}
+ 800c06e:	bf00      	nop
+ 800c070:	01e84800 	.word	0x01e84800
+ 800c074:	00f42400 	.word	0x00f42400
+
+0800c078 <UART_AdvFeatureConfig>:
+  * @brief Configure the UART peripheral advanced features.
+  * @param huart UART handle.
+  * @retval None
+  */
+void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
+{
+ 800c078:	b480      	push	{r7}
+ 800c07a:	b083      	sub	sp, #12
+ 800c07c:	af00      	add	r7, sp, #0
+ 800c07e:	6078      	str	r0, [r7, #4]
+  /* Check whether the set of advanced features to configure is properly set */
+  assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
+
+  /* if required, configure TX pin active level inversion */
+  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
+ 800c080:	687b      	ldr	r3, [r7, #4]
+ 800c082:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800c084:	f003 0301 	and.w	r3, r3, #1
+ 800c088:	2b00      	cmp	r3, #0
+ 800c08a:	d00a      	beq.n	800c0a2 <UART_AdvFeatureConfig+0x2a>
+  {
+    assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
+    MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
+ 800c08c:	687b      	ldr	r3, [r7, #4]
+ 800c08e:	681b      	ldr	r3, [r3, #0]
+ 800c090:	685b      	ldr	r3, [r3, #4]
+ 800c092:	f423 3100 	bic.w	r1, r3, #131072	; 0x20000
+ 800c096:	687b      	ldr	r3, [r7, #4]
+ 800c098:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 800c09a:	687b      	ldr	r3, [r7, #4]
+ 800c09c:	681b      	ldr	r3, [r3, #0]
+ 800c09e:	430a      	orrs	r2, r1
+ 800c0a0:	605a      	str	r2, [r3, #4]
+  }
+
+  /* if required, configure RX pin active level inversion */
+  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
+ 800c0a2:	687b      	ldr	r3, [r7, #4]
+ 800c0a4:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800c0a6:	f003 0302 	and.w	r3, r3, #2
+ 800c0aa:	2b00      	cmp	r3, #0
+ 800c0ac:	d00a      	beq.n	800c0c4 <UART_AdvFeatureConfig+0x4c>
+  {
+    assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
+    MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
+ 800c0ae:	687b      	ldr	r3, [r7, #4]
+ 800c0b0:	681b      	ldr	r3, [r3, #0]
+ 800c0b2:	685b      	ldr	r3, [r3, #4]
+ 800c0b4:	f423 3180 	bic.w	r1, r3, #65536	; 0x10000
+ 800c0b8:	687b      	ldr	r3, [r7, #4]
+ 800c0ba:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800c0bc:	687b      	ldr	r3, [r7, #4]
+ 800c0be:	681b      	ldr	r3, [r3, #0]
+ 800c0c0:	430a      	orrs	r2, r1
+ 800c0c2:	605a      	str	r2, [r3, #4]
+  }
+
+  /* if required, configure data inversion */
+  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
+ 800c0c4:	687b      	ldr	r3, [r7, #4]
+ 800c0c6:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800c0c8:	f003 0304 	and.w	r3, r3, #4
+ 800c0cc:	2b00      	cmp	r3, #0
+ 800c0ce:	d00a      	beq.n	800c0e6 <UART_AdvFeatureConfig+0x6e>
+  {
+    assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
+    MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
+ 800c0d0:	687b      	ldr	r3, [r7, #4]
+ 800c0d2:	681b      	ldr	r3, [r3, #0]
+ 800c0d4:	685b      	ldr	r3, [r3, #4]
+ 800c0d6:	f423 2180 	bic.w	r1, r3, #262144	; 0x40000
+ 800c0da:	687b      	ldr	r3, [r7, #4]
+ 800c0dc:	6b1a      	ldr	r2, [r3, #48]	; 0x30
+ 800c0de:	687b      	ldr	r3, [r7, #4]
+ 800c0e0:	681b      	ldr	r3, [r3, #0]
+ 800c0e2:	430a      	orrs	r2, r1
+ 800c0e4:	605a      	str	r2, [r3, #4]
+  }
+
+  /* if required, configure RX/TX pins swap */
+  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
+ 800c0e6:	687b      	ldr	r3, [r7, #4]
+ 800c0e8:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800c0ea:	f003 0308 	and.w	r3, r3, #8
+ 800c0ee:	2b00      	cmp	r3, #0
+ 800c0f0:	d00a      	beq.n	800c108 <UART_AdvFeatureConfig+0x90>
+  {
+    assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
+    MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
+ 800c0f2:	687b      	ldr	r3, [r7, #4]
+ 800c0f4:	681b      	ldr	r3, [r3, #0]
+ 800c0f6:	685b      	ldr	r3, [r3, #4]
+ 800c0f8:	f423 4100 	bic.w	r1, r3, #32768	; 0x8000
+ 800c0fc:	687b      	ldr	r3, [r7, #4]
+ 800c0fe:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 800c100:	687b      	ldr	r3, [r7, #4]
+ 800c102:	681b      	ldr	r3, [r3, #0]
+ 800c104:	430a      	orrs	r2, r1
+ 800c106:	605a      	str	r2, [r3, #4]
+  }
+
+  /* if required, configure RX overrun detection disabling */
+  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
+ 800c108:	687b      	ldr	r3, [r7, #4]
+ 800c10a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800c10c:	f003 0310 	and.w	r3, r3, #16
+ 800c110:	2b00      	cmp	r3, #0
+ 800c112:	d00a      	beq.n	800c12a <UART_AdvFeatureConfig+0xb2>
+  {
+    assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
+    MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
+ 800c114:	687b      	ldr	r3, [r7, #4]
+ 800c116:	681b      	ldr	r3, [r3, #0]
+ 800c118:	689b      	ldr	r3, [r3, #8]
+ 800c11a:	f423 5180 	bic.w	r1, r3, #4096	; 0x1000
+ 800c11e:	687b      	ldr	r3, [r7, #4]
+ 800c120:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 800c122:	687b      	ldr	r3, [r7, #4]
+ 800c124:	681b      	ldr	r3, [r3, #0]
+ 800c126:	430a      	orrs	r2, r1
+ 800c128:	609a      	str	r2, [r3, #8]
+  }
+
+  /* if required, configure DMA disabling on reception error */
+  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
+ 800c12a:	687b      	ldr	r3, [r7, #4]
+ 800c12c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800c12e:	f003 0320 	and.w	r3, r3, #32
+ 800c132:	2b00      	cmp	r3, #0
+ 800c134:	d00a      	beq.n	800c14c <UART_AdvFeatureConfig+0xd4>
+  {
+    assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
+    MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
+ 800c136:	687b      	ldr	r3, [r7, #4]
+ 800c138:	681b      	ldr	r3, [r3, #0]
+ 800c13a:	689b      	ldr	r3, [r3, #8]
+ 800c13c:	f423 5100 	bic.w	r1, r3, #8192	; 0x2000
+ 800c140:	687b      	ldr	r3, [r7, #4]
+ 800c142:	6bda      	ldr	r2, [r3, #60]	; 0x3c
+ 800c144:	687b      	ldr	r3, [r7, #4]
+ 800c146:	681b      	ldr	r3, [r3, #0]
+ 800c148:	430a      	orrs	r2, r1
+ 800c14a:	609a      	str	r2, [r3, #8]
+  }
+
+  /* if required, configure auto Baud rate detection scheme */
+  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
+ 800c14c:	687b      	ldr	r3, [r7, #4]
+ 800c14e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800c150:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800c154:	2b00      	cmp	r3, #0
+ 800c156:	d01a      	beq.n	800c18e <UART_AdvFeatureConfig+0x116>
+  {
+    assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
+    assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
+    MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
+ 800c158:	687b      	ldr	r3, [r7, #4]
+ 800c15a:	681b      	ldr	r3, [r3, #0]
+ 800c15c:	685b      	ldr	r3, [r3, #4]
+ 800c15e:	f423 1180 	bic.w	r1, r3, #1048576	; 0x100000
+ 800c162:	687b      	ldr	r3, [r7, #4]
+ 800c164:	6c1a      	ldr	r2, [r3, #64]	; 0x40
+ 800c166:	687b      	ldr	r3, [r7, #4]
+ 800c168:	681b      	ldr	r3, [r3, #0]
+ 800c16a:	430a      	orrs	r2, r1
+ 800c16c:	605a      	str	r2, [r3, #4]
+    /* set auto Baudrate detection parameters if detection is enabled */
+    if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
+ 800c16e:	687b      	ldr	r3, [r7, #4]
+ 800c170:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800c172:	f5b3 1f80 	cmp.w	r3, #1048576	; 0x100000
+ 800c176:	d10a      	bne.n	800c18e <UART_AdvFeatureConfig+0x116>
+    {
+      assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
+      MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
+ 800c178:	687b      	ldr	r3, [r7, #4]
+ 800c17a:	681b      	ldr	r3, [r3, #0]
+ 800c17c:	685b      	ldr	r3, [r3, #4]
+ 800c17e:	f423 01c0 	bic.w	r1, r3, #6291456	; 0x600000
+ 800c182:	687b      	ldr	r3, [r7, #4]
+ 800c184:	6c5a      	ldr	r2, [r3, #68]	; 0x44
+ 800c186:	687b      	ldr	r3, [r7, #4]
+ 800c188:	681b      	ldr	r3, [r3, #0]
+ 800c18a:	430a      	orrs	r2, r1
+ 800c18c:	605a      	str	r2, [r3, #4]
+    }
+  }
+
+  /* if required, configure MSB first on communication line */
+  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
+ 800c18e:	687b      	ldr	r3, [r7, #4]
+ 800c190:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800c192:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 800c196:	2b00      	cmp	r3, #0
+ 800c198:	d00a      	beq.n	800c1b0 <UART_AdvFeatureConfig+0x138>
+  {
+    assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
+    MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
+ 800c19a:	687b      	ldr	r3, [r7, #4]
+ 800c19c:	681b      	ldr	r3, [r3, #0]
+ 800c19e:	685b      	ldr	r3, [r3, #4]
+ 800c1a0:	f423 2100 	bic.w	r1, r3, #524288	; 0x80000
+ 800c1a4:	687b      	ldr	r3, [r7, #4]
+ 800c1a6:	6c9a      	ldr	r2, [r3, #72]	; 0x48
+ 800c1a8:	687b      	ldr	r3, [r7, #4]
+ 800c1aa:	681b      	ldr	r3, [r3, #0]
+ 800c1ac:	430a      	orrs	r2, r1
+ 800c1ae:	605a      	str	r2, [r3, #4]
+  }
+}
+ 800c1b0:	bf00      	nop
+ 800c1b2:	370c      	adds	r7, #12
+ 800c1b4:	46bd      	mov	sp, r7
+ 800c1b6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800c1ba:	4770      	bx	lr
+
+0800c1bc <UART_CheckIdleState>:
+  * @brief Check the UART Idle State.
+  * @param huart UART handle.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
+{
+ 800c1bc:	b580      	push	{r7, lr}
+ 800c1be:	b086      	sub	sp, #24
+ 800c1c0:	af02      	add	r7, sp, #8
+ 800c1c2:	6078      	str	r0, [r7, #4]
+  uint32_t tickstart;
+
+  /* Initialize the UART ErrorCode */
+  huart->ErrorCode = HAL_UART_ERROR_NONE;
+ 800c1c4:	687b      	ldr	r3, [r7, #4]
+ 800c1c6:	2200      	movs	r2, #0
+ 800c1c8:	67da      	str	r2, [r3, #124]	; 0x7c
+
+  /* Init tickstart for timeout managment*/
+  tickstart = HAL_GetTick();
+ 800c1ca:	f7f8 fcbd 	bl	8004b48 <HAL_GetTick>
+ 800c1ce:	60f8      	str	r0, [r7, #12]
+
+  /* Check if the Transmitter is enabled */
+  if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
+ 800c1d0:	687b      	ldr	r3, [r7, #4]
+ 800c1d2:	681b      	ldr	r3, [r3, #0]
+ 800c1d4:	681b      	ldr	r3, [r3, #0]
+ 800c1d6:	f003 0308 	and.w	r3, r3, #8
+ 800c1da:	2b08      	cmp	r3, #8
+ 800c1dc:	d10e      	bne.n	800c1fc <UART_CheckIdleState+0x40>
+  {
+    /* Wait until TEACK flag is set */
+    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
+ 800c1de:	f06f 437e 	mvn.w	r3, #4261412864	; 0xfe000000
+ 800c1e2:	9300      	str	r3, [sp, #0]
+ 800c1e4:	68fb      	ldr	r3, [r7, #12]
+ 800c1e6:	2200      	movs	r2, #0
+ 800c1e8:	f44f 1100 	mov.w	r1, #2097152	; 0x200000
+ 800c1ec:	6878      	ldr	r0, [r7, #4]
+ 800c1ee:	f000 f814 	bl	800c21a <UART_WaitOnFlagUntilTimeout>
+ 800c1f2:	4603      	mov	r3, r0
+ 800c1f4:	2b00      	cmp	r3, #0
+ 800c1f6:	d001      	beq.n	800c1fc <UART_CheckIdleState+0x40>
+    {
+      /* Timeout occurred */
+      return HAL_TIMEOUT;
+ 800c1f8:	2303      	movs	r3, #3
+ 800c1fa:	e00a      	b.n	800c212 <UART_CheckIdleState+0x56>
+    }
+  }
+#endif
+
+  /* Initialize the UART State */
+  huart->gState = HAL_UART_STATE_READY;
+ 800c1fc:	687b      	ldr	r3, [r7, #4]
+ 800c1fe:	2220      	movs	r2, #32
+ 800c200:	675a      	str	r2, [r3, #116]	; 0x74
+  huart->RxState = HAL_UART_STATE_READY;
+ 800c202:	687b      	ldr	r3, [r7, #4]
+ 800c204:	2220      	movs	r2, #32
+ 800c206:	679a      	str	r2, [r3, #120]	; 0x78
+
+  __HAL_UNLOCK(huart);
+ 800c208:	687b      	ldr	r3, [r7, #4]
+ 800c20a:	2200      	movs	r2, #0
+ 800c20c:	f883 2070 	strb.w	r2, [r3, #112]	; 0x70
+
+  return HAL_OK;
+ 800c210:	2300      	movs	r3, #0
+}
+ 800c212:	4618      	mov	r0, r3
+ 800c214:	3710      	adds	r7, #16
+ 800c216:	46bd      	mov	sp, r7
+ 800c218:	bd80      	pop	{r7, pc}
+
+0800c21a <UART_WaitOnFlagUntilTimeout>:
+  * @param Timeout   Timeout duration
+  * @retval HAL status
+  */
+HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
+                                              uint32_t Tickstart, uint32_t Timeout)
+{
+ 800c21a:	b580      	push	{r7, lr}
+ 800c21c:	b084      	sub	sp, #16
+ 800c21e:	af00      	add	r7, sp, #0
+ 800c220:	60f8      	str	r0, [r7, #12]
+ 800c222:	60b9      	str	r1, [r7, #8]
+ 800c224:	603b      	str	r3, [r7, #0]
+ 800c226:	4613      	mov	r3, r2
+ 800c228:	71fb      	strb	r3, [r7, #7]
+  /* Wait until flag is set */
+  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
+ 800c22a:	e05d      	b.n	800c2e8 <UART_WaitOnFlagUntilTimeout+0xce>
+  {
+    /* Check for the Timeout */
+    if (Timeout != HAL_MAX_DELAY)
+ 800c22c:	69bb      	ldr	r3, [r7, #24]
+ 800c22e:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800c232:	d059      	beq.n	800c2e8 <UART_WaitOnFlagUntilTimeout+0xce>
+    {
+      if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
+ 800c234:	f7f8 fc88 	bl	8004b48 <HAL_GetTick>
+ 800c238:	4602      	mov	r2, r0
+ 800c23a:	683b      	ldr	r3, [r7, #0]
+ 800c23c:	1ad3      	subs	r3, r2, r3
+ 800c23e:	69ba      	ldr	r2, [r7, #24]
+ 800c240:	429a      	cmp	r2, r3
+ 800c242:	d302      	bcc.n	800c24a <UART_WaitOnFlagUntilTimeout+0x30>
+ 800c244:	69bb      	ldr	r3, [r7, #24]
+ 800c246:	2b00      	cmp	r3, #0
+ 800c248:	d11b      	bne.n	800c282 <UART_WaitOnFlagUntilTimeout+0x68>
+      {
+        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
+        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
+ 800c24a:	68fb      	ldr	r3, [r7, #12]
+ 800c24c:	681b      	ldr	r3, [r3, #0]
+ 800c24e:	681a      	ldr	r2, [r3, #0]
+ 800c250:	68fb      	ldr	r3, [r7, #12]
+ 800c252:	681b      	ldr	r3, [r3, #0]
+ 800c254:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
+ 800c258:	601a      	str	r2, [r3, #0]
+        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
+ 800c25a:	68fb      	ldr	r3, [r7, #12]
+ 800c25c:	681b      	ldr	r3, [r3, #0]
+ 800c25e:	689a      	ldr	r2, [r3, #8]
+ 800c260:	68fb      	ldr	r3, [r7, #12]
+ 800c262:	681b      	ldr	r3, [r3, #0]
+ 800c264:	f022 0201 	bic.w	r2, r2, #1
+ 800c268:	609a      	str	r2, [r3, #8]
+
+        huart->gState = HAL_UART_STATE_READY;
+ 800c26a:	68fb      	ldr	r3, [r7, #12]
+ 800c26c:	2220      	movs	r2, #32
+ 800c26e:	675a      	str	r2, [r3, #116]	; 0x74
+        huart->RxState = HAL_UART_STATE_READY;
+ 800c270:	68fb      	ldr	r3, [r7, #12]
+ 800c272:	2220      	movs	r2, #32
+ 800c274:	679a      	str	r2, [r3, #120]	; 0x78
+
+        __HAL_UNLOCK(huart);
+ 800c276:	68fb      	ldr	r3, [r7, #12]
+ 800c278:	2200      	movs	r2, #0
+ 800c27a:	f883 2070 	strb.w	r2, [r3, #112]	; 0x70
+
+        return HAL_TIMEOUT;
+ 800c27e:	2303      	movs	r3, #3
+ 800c280:	e042      	b.n	800c308 <UART_WaitOnFlagUntilTimeout+0xee>
+      }
+
+      if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
+ 800c282:	68fb      	ldr	r3, [r7, #12]
+ 800c284:	681b      	ldr	r3, [r3, #0]
+ 800c286:	681b      	ldr	r3, [r3, #0]
+ 800c288:	f003 0304 	and.w	r3, r3, #4
+ 800c28c:	2b00      	cmp	r3, #0
+ 800c28e:	d02b      	beq.n	800c2e8 <UART_WaitOnFlagUntilTimeout+0xce>
+      {
+        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
+ 800c290:	68fb      	ldr	r3, [r7, #12]
+ 800c292:	681b      	ldr	r3, [r3, #0]
+ 800c294:	69db      	ldr	r3, [r3, #28]
+ 800c296:	f403 6300 	and.w	r3, r3, #2048	; 0x800
+ 800c29a:	f5b3 6f00 	cmp.w	r3, #2048	; 0x800
+ 800c29e:	d123      	bne.n	800c2e8 <UART_WaitOnFlagUntilTimeout+0xce>
+        {
+          /* Clear Receiver Timeout flag*/
+          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
+ 800c2a0:	68fb      	ldr	r3, [r7, #12]
+ 800c2a2:	681b      	ldr	r3, [r3, #0]
+ 800c2a4:	f44f 6200 	mov.w	r2, #2048	; 0x800
+ 800c2a8:	621a      	str	r2, [r3, #32]
+          
+          /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
+          CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
+ 800c2aa:	68fb      	ldr	r3, [r7, #12]
+ 800c2ac:	681b      	ldr	r3, [r3, #0]
+ 800c2ae:	681a      	ldr	r2, [r3, #0]
+ 800c2b0:	68fb      	ldr	r3, [r7, #12]
+ 800c2b2:	681b      	ldr	r3, [r3, #0]
+ 800c2b4:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
+ 800c2b8:	601a      	str	r2, [r3, #0]
+          CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
+ 800c2ba:	68fb      	ldr	r3, [r7, #12]
+ 800c2bc:	681b      	ldr	r3, [r3, #0]
+ 800c2be:	689a      	ldr	r2, [r3, #8]
+ 800c2c0:	68fb      	ldr	r3, [r7, #12]
+ 800c2c2:	681b      	ldr	r3, [r3, #0]
+ 800c2c4:	f022 0201 	bic.w	r2, r2, #1
+ 800c2c8:	609a      	str	r2, [r3, #8]
+
+          huart->gState = HAL_UART_STATE_READY;
+ 800c2ca:	68fb      	ldr	r3, [r7, #12]
+ 800c2cc:	2220      	movs	r2, #32
+ 800c2ce:	675a      	str	r2, [r3, #116]	; 0x74
+          huart->RxState = HAL_UART_STATE_READY;
+ 800c2d0:	68fb      	ldr	r3, [r7, #12]
+ 800c2d2:	2220      	movs	r2, #32
+ 800c2d4:	679a      	str	r2, [r3, #120]	; 0x78
+          huart->ErrorCode = HAL_UART_ERROR_RTO;
+ 800c2d6:	68fb      	ldr	r3, [r7, #12]
+ 800c2d8:	2220      	movs	r2, #32
+ 800c2da:	67da      	str	r2, [r3, #124]	; 0x7c
+          
+          /* Process Unlocked */
+          __HAL_UNLOCK(huart);
+ 800c2dc:	68fb      	ldr	r3, [r7, #12]
+ 800c2de:	2200      	movs	r2, #0
+ 800c2e0:	f883 2070 	strb.w	r2, [r3, #112]	; 0x70
+          
+          return HAL_TIMEOUT;
+ 800c2e4:	2303      	movs	r3, #3
+ 800c2e6:	e00f      	b.n	800c308 <UART_WaitOnFlagUntilTimeout+0xee>
+  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
+ 800c2e8:	68fb      	ldr	r3, [r7, #12]
+ 800c2ea:	681b      	ldr	r3, [r3, #0]
+ 800c2ec:	69da      	ldr	r2, [r3, #28]
+ 800c2ee:	68bb      	ldr	r3, [r7, #8]
+ 800c2f0:	4013      	ands	r3, r2
+ 800c2f2:	68ba      	ldr	r2, [r7, #8]
+ 800c2f4:	429a      	cmp	r2, r3
+ 800c2f6:	bf0c      	ite	eq
+ 800c2f8:	2301      	moveq	r3, #1
+ 800c2fa:	2300      	movne	r3, #0
+ 800c2fc:	b2db      	uxtb	r3, r3
+ 800c2fe:	461a      	mov	r2, r3
+ 800c300:	79fb      	ldrb	r3, [r7, #7]
+ 800c302:	429a      	cmp	r2, r3
+ 800c304:	d092      	beq.n	800c22c <UART_WaitOnFlagUntilTimeout+0x12>
+        }
+      }
+    }
+  }
+  return HAL_OK;
+ 800c306:	2300      	movs	r3, #0
+}
+ 800c308:	4618      	mov	r0, r3
+ 800c30a:	3710      	adds	r7, #16
+ 800c30c:	46bd      	mov	sp, r7
+ 800c30e:	bd80      	pop	{r7, pc}
+
+0800c310 <FMC_SDRAM_Init>:
+  * @param  Device Pointer to SDRAM device instance
+  * @param  Init Pointer to SDRAM Initialization structure   
+  * @retval HAL status
+  */
+HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDef *Init)
+{
+ 800c310:	b480      	push	{r7}
+ 800c312:	b085      	sub	sp, #20
+ 800c314:	af00      	add	r7, sp, #0
+ 800c316:	6078      	str	r0, [r7, #4]
+ 800c318:	6039      	str	r1, [r7, #0]
+  uint32_t tmpr1 = 0;
+ 800c31a:	2300      	movs	r3, #0
+ 800c31c:	60fb      	str	r3, [r7, #12]
+  uint32_t tmpr2 = 0;
+ 800c31e:	2300      	movs	r3, #0
+ 800c320:	60bb      	str	r3, [r7, #8]
+  assert_param(IS_FMC_SDCLOCK_PERIOD(Init->SDClockPeriod));
+  assert_param(IS_FMC_READ_BURST(Init->ReadBurst));
+  assert_param(IS_FMC_READPIPE_DELAY(Init->ReadPipeDelay));   
+
+  /* Set SDRAM bank configuration parameters */
+  if (Init->SDBank != FMC_SDRAM_BANK2) 
+ 800c322:	683b      	ldr	r3, [r7, #0]
+ 800c324:	681b      	ldr	r3, [r3, #0]
+ 800c326:	2b01      	cmp	r3, #1
+ 800c328:	d027      	beq.n	800c37a <FMC_SDRAM_Init+0x6a>
+  {
+    tmpr1 = Device->SDCR[FMC_SDRAM_BANK1];
+ 800c32a:	687b      	ldr	r3, [r7, #4]
+ 800c32c:	681b      	ldr	r3, [r3, #0]
+ 800c32e:	60fb      	str	r3, [r7, #12]
+    
+    /* Clear NC, NR, MWID, NB, CAS, WP, SDCLK, RBURST, and RPIPE bits */
+    tmpr1 &= ((uint32_t)~(FMC_SDCR1_NC  | FMC_SDCR1_NR | FMC_SDCR1_MWID | \
+ 800c330:	68fa      	ldr	r2, [r7, #12]
+ 800c332:	4b2f      	ldr	r3, [pc, #188]	; (800c3f0 <FMC_SDRAM_Init+0xe0>)
+ 800c334:	4013      	ands	r3, r2
+ 800c336:	60fb      	str	r3, [r7, #12]
+                          FMC_SDCR1_NB  | FMC_SDCR1_CAS | FMC_SDCR1_WP   | \
+                          FMC_SDCR1_SDCLK | FMC_SDCR1_RBURST | FMC_SDCR1_RPIPE));
+
+    tmpr1 |= (uint32_t)(Init->ColumnBitsNumber   |\
+ 800c338:	683b      	ldr	r3, [r7, #0]
+ 800c33a:	685a      	ldr	r2, [r3, #4]
+                        Init->RowBitsNumber      |\
+ 800c33c:	683b      	ldr	r3, [r7, #0]
+ 800c33e:	689b      	ldr	r3, [r3, #8]
+    tmpr1 |= (uint32_t)(Init->ColumnBitsNumber   |\
+ 800c340:	431a      	orrs	r2, r3
+                        Init->MemoryDataWidth    |\
+ 800c342:	683b      	ldr	r3, [r7, #0]
+ 800c344:	68db      	ldr	r3, [r3, #12]
+                        Init->RowBitsNumber      |\
+ 800c346:	431a      	orrs	r2, r3
+                        Init->InternalBankNumber |\
+ 800c348:	683b      	ldr	r3, [r7, #0]
+ 800c34a:	691b      	ldr	r3, [r3, #16]
+                        Init->MemoryDataWidth    |\
+ 800c34c:	431a      	orrs	r2, r3
+                        Init->CASLatency         |\
+ 800c34e:	683b      	ldr	r3, [r7, #0]
+ 800c350:	695b      	ldr	r3, [r3, #20]
+                        Init->InternalBankNumber |\
+ 800c352:	431a      	orrs	r2, r3
+                        Init->WriteProtection    |\
+ 800c354:	683b      	ldr	r3, [r7, #0]
+ 800c356:	699b      	ldr	r3, [r3, #24]
+                        Init->CASLatency         |\
+ 800c358:	431a      	orrs	r2, r3
+                        Init->SDClockPeriod      |\
+ 800c35a:	683b      	ldr	r3, [r7, #0]
+ 800c35c:	69db      	ldr	r3, [r3, #28]
+                        Init->WriteProtection    |\
+ 800c35e:	431a      	orrs	r2, r3
+                        Init->ReadBurst          |\
+ 800c360:	683b      	ldr	r3, [r7, #0]
+ 800c362:	6a1b      	ldr	r3, [r3, #32]
+                        Init->SDClockPeriod      |\
+ 800c364:	431a      	orrs	r2, r3
+                        Init->ReadPipeDelay
+ 800c366:	683b      	ldr	r3, [r7, #0]
+ 800c368:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+                        Init->ReadBurst          |\
+ 800c36a:	4313      	orrs	r3, r2
+    tmpr1 |= (uint32_t)(Init->ColumnBitsNumber   |\
+ 800c36c:	68fa      	ldr	r2, [r7, #12]
+ 800c36e:	4313      	orrs	r3, r2
+ 800c370:	60fb      	str	r3, [r7, #12]
+                        );                                      
+    Device->SDCR[FMC_SDRAM_BANK1] = tmpr1;
+ 800c372:	687b      	ldr	r3, [r7, #4]
+ 800c374:	68fa      	ldr	r2, [r7, #12]
+ 800c376:	601a      	str	r2, [r3, #0]
+ 800c378:	e032      	b.n	800c3e0 <FMC_SDRAM_Init+0xd0>
+  }
+  else /* FMC_Bank2_SDRAM */                      
+  {
+    tmpr1 = Device->SDCR[FMC_SDRAM_BANK1];
+ 800c37a:	687b      	ldr	r3, [r7, #4]
+ 800c37c:	681b      	ldr	r3, [r3, #0]
+ 800c37e:	60fb      	str	r3, [r7, #12]
+    
+    /* Clear SDCLK, RBURST, and RPIPE bits */
+    tmpr1 &= ((uint32_t)~(FMC_SDCR1_SDCLK | FMC_SDCR1_RBURST | FMC_SDCR1_RPIPE));
+ 800c380:	68fb      	ldr	r3, [r7, #12]
+ 800c382:	f423 43f8 	bic.w	r3, r3, #31744	; 0x7c00
+ 800c386:	60fb      	str	r3, [r7, #12]
+    
+    tmpr1 |= (uint32_t)(Init->SDClockPeriod      |\
+ 800c388:	683b      	ldr	r3, [r7, #0]
+ 800c38a:	69da      	ldr	r2, [r3, #28]
+                        Init->ReadBurst          |\
+ 800c38c:	683b      	ldr	r3, [r7, #0]
+ 800c38e:	6a1b      	ldr	r3, [r3, #32]
+    tmpr1 |= (uint32_t)(Init->SDClockPeriod      |\
+ 800c390:	431a      	orrs	r2, r3
+                        Init->ReadPipeDelay);
+ 800c392:	683b      	ldr	r3, [r7, #0]
+ 800c394:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+                        Init->ReadBurst          |\
+ 800c396:	4313      	orrs	r3, r2
+    tmpr1 |= (uint32_t)(Init->SDClockPeriod      |\
+ 800c398:	68fa      	ldr	r2, [r7, #12]
+ 800c39a:	4313      	orrs	r3, r2
+ 800c39c:	60fb      	str	r3, [r7, #12]
+    
+    tmpr2 = Device->SDCR[FMC_SDRAM_BANK2];
+ 800c39e:	687b      	ldr	r3, [r7, #4]
+ 800c3a0:	685b      	ldr	r3, [r3, #4]
+ 800c3a2:	60bb      	str	r3, [r7, #8]
+    
+    /* Clear NC, NR, MWID, NB, CAS, WP, SDCLK, RBURST, and RPIPE bits */
+    tmpr2 &= ((uint32_t)~(FMC_SDCR1_NC  | FMC_SDCR1_NR | FMC_SDCR1_MWID | \
+ 800c3a4:	68ba      	ldr	r2, [r7, #8]
+ 800c3a6:	4b12      	ldr	r3, [pc, #72]	; (800c3f0 <FMC_SDRAM_Init+0xe0>)
+ 800c3a8:	4013      	ands	r3, r2
+ 800c3aa:	60bb      	str	r3, [r7, #8]
+                          FMC_SDCR1_NB  | FMC_SDCR1_CAS | FMC_SDCR1_WP   | \
+                          FMC_SDCR1_SDCLK | FMC_SDCR1_RBURST | FMC_SDCR1_RPIPE));
+
+    tmpr2 |= (uint32_t)(Init->ColumnBitsNumber   |\
+ 800c3ac:	683b      	ldr	r3, [r7, #0]
+ 800c3ae:	685a      	ldr	r2, [r3, #4]
+                       Init->RowBitsNumber       |\
+ 800c3b0:	683b      	ldr	r3, [r7, #0]
+ 800c3b2:	689b      	ldr	r3, [r3, #8]
+    tmpr2 |= (uint32_t)(Init->ColumnBitsNumber   |\
+ 800c3b4:	431a      	orrs	r2, r3
+                       Init->MemoryDataWidth     |\
+ 800c3b6:	683b      	ldr	r3, [r7, #0]
+ 800c3b8:	68db      	ldr	r3, [r3, #12]
+                       Init->RowBitsNumber       |\
+ 800c3ba:	431a      	orrs	r2, r3
+                       Init->InternalBankNumber  |\
+ 800c3bc:	683b      	ldr	r3, [r7, #0]
+ 800c3be:	691b      	ldr	r3, [r3, #16]
+                       Init->MemoryDataWidth     |\
+ 800c3c0:	431a      	orrs	r2, r3
+                       Init->CASLatency          |\
+ 800c3c2:	683b      	ldr	r3, [r7, #0]
+ 800c3c4:	695b      	ldr	r3, [r3, #20]
+                       Init->InternalBankNumber  |\
+ 800c3c6:	431a      	orrs	r2, r3
+                       Init->WriteProtection);
+ 800c3c8:	683b      	ldr	r3, [r7, #0]
+ 800c3ca:	699b      	ldr	r3, [r3, #24]
+                       Init->CASLatency          |\
+ 800c3cc:	4313      	orrs	r3, r2
+    tmpr2 |= (uint32_t)(Init->ColumnBitsNumber   |\
+ 800c3ce:	68ba      	ldr	r2, [r7, #8]
+ 800c3d0:	4313      	orrs	r3, r2
+ 800c3d2:	60bb      	str	r3, [r7, #8]
+
+    Device->SDCR[FMC_SDRAM_BANK1] = tmpr1;
+ 800c3d4:	687b      	ldr	r3, [r7, #4]
+ 800c3d6:	68fa      	ldr	r2, [r7, #12]
+ 800c3d8:	601a      	str	r2, [r3, #0]
+    Device->SDCR[FMC_SDRAM_BANK2] = tmpr2;
+ 800c3da:	687b      	ldr	r3, [r7, #4]
+ 800c3dc:	68ba      	ldr	r2, [r7, #8]
+ 800c3de:	605a      	str	r2, [r3, #4]
+  }
+  
+  return HAL_OK;
+ 800c3e0:	2300      	movs	r3, #0
+}
+ 800c3e2:	4618      	mov	r0, r3
+ 800c3e4:	3714      	adds	r7, #20
+ 800c3e6:	46bd      	mov	sp, r7
+ 800c3e8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800c3ec:	4770      	bx	lr
+ 800c3ee:	bf00      	nop
+ 800c3f0:	ffff8000 	.word	0xffff8000
+
+0800c3f4 <FMC_SDRAM_Timing_Init>:
+  * @param  Timing Pointer to SDRAM Timing structure
+  * @param  Bank SDRAM bank number   
+  * @retval HAL status
+  */
+HAL_StatusTypeDef FMC_SDRAM_Timing_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank)
+{
+ 800c3f4:	b480      	push	{r7}
+ 800c3f6:	b087      	sub	sp, #28
+ 800c3f8:	af00      	add	r7, sp, #0
+ 800c3fa:	60f8      	str	r0, [r7, #12]
+ 800c3fc:	60b9      	str	r1, [r7, #8]
+ 800c3fe:	607a      	str	r2, [r7, #4]
+  uint32_t tmpr1 = 0;
+ 800c400:	2300      	movs	r3, #0
+ 800c402:	617b      	str	r3, [r7, #20]
+  uint32_t tmpr2 = 0;
+ 800c404:	2300      	movs	r3, #0
+ 800c406:	613b      	str	r3, [r7, #16]
+  assert_param(IS_FMC_RP_DELAY(Timing->RPDelay));
+  assert_param(IS_FMC_RCD_DELAY(Timing->RCDDelay));
+  assert_param(IS_FMC_SDRAM_BANK(Bank));
+  
+  /* Set SDRAM device timing parameters */ 
+  if (Bank != FMC_SDRAM_BANK2) 
+ 800c408:	687b      	ldr	r3, [r7, #4]
+ 800c40a:	2b01      	cmp	r3, #1
+ 800c40c:	d02e      	beq.n	800c46c <FMC_SDRAM_Timing_Init+0x78>
+  {
+    tmpr1 = Device->SDTR[FMC_SDRAM_BANK1];
+ 800c40e:	68fb      	ldr	r3, [r7, #12]
+ 800c410:	689b      	ldr	r3, [r3, #8]
+ 800c412:	617b      	str	r3, [r7, #20]
+    
+    /* Clear TMRD, TXSR, TRAS, TRC, TWR, TRP and TRCD bits */
+    tmpr1 &= ((uint32_t)~(FMC_SDTR1_TMRD  | FMC_SDTR1_TXSR | FMC_SDTR1_TRAS | \
+ 800c414:	697b      	ldr	r3, [r7, #20]
+ 800c416:	f003 4370 	and.w	r3, r3, #4026531840	; 0xf0000000
+ 800c41a:	617b      	str	r3, [r7, #20]
+                          FMC_SDTR1_TRC  | FMC_SDTR1_TWR | FMC_SDTR1_TRP | \
+                          FMC_SDTR1_TRCD));
+    
+    tmpr1 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
+ 800c41c:	68bb      	ldr	r3, [r7, #8]
+ 800c41e:	681b      	ldr	r3, [r3, #0]
+ 800c420:	1e5a      	subs	r2, r3, #1
+                       (((Timing->ExitSelfRefreshDelay)-1) << 4) |\
+ 800c422:	68bb      	ldr	r3, [r7, #8]
+ 800c424:	685b      	ldr	r3, [r3, #4]
+ 800c426:	3b01      	subs	r3, #1
+ 800c428:	011b      	lsls	r3, r3, #4
+    tmpr1 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
+ 800c42a:	431a      	orrs	r2, r3
+                       (((Timing->SelfRefreshTime)-1) << 8)      |\
+ 800c42c:	68bb      	ldr	r3, [r7, #8]
+ 800c42e:	689b      	ldr	r3, [r3, #8]
+ 800c430:	3b01      	subs	r3, #1
+ 800c432:	021b      	lsls	r3, r3, #8
+                       (((Timing->ExitSelfRefreshDelay)-1) << 4) |\
+ 800c434:	431a      	orrs	r2, r3
+                       (((Timing->RowCycleDelay)-1) << 12)       |\
+ 800c436:	68bb      	ldr	r3, [r7, #8]
+ 800c438:	68db      	ldr	r3, [r3, #12]
+ 800c43a:	3b01      	subs	r3, #1
+ 800c43c:	031b      	lsls	r3, r3, #12
+                       (((Timing->SelfRefreshTime)-1) << 8)      |\
+ 800c43e:	431a      	orrs	r2, r3
+                       (((Timing->WriteRecoveryTime)-1) <<16)    |\
+ 800c440:	68bb      	ldr	r3, [r7, #8]
+ 800c442:	691b      	ldr	r3, [r3, #16]
+ 800c444:	3b01      	subs	r3, #1
+ 800c446:	041b      	lsls	r3, r3, #16
+                       (((Timing->RowCycleDelay)-1) << 12)       |\
+ 800c448:	431a      	orrs	r2, r3
+                       (((Timing->RPDelay)-1) << 20)             |\
+ 800c44a:	68bb      	ldr	r3, [r7, #8]
+ 800c44c:	695b      	ldr	r3, [r3, #20]
+ 800c44e:	3b01      	subs	r3, #1
+ 800c450:	051b      	lsls	r3, r3, #20
+                       (((Timing->WriteRecoveryTime)-1) <<16)    |\
+ 800c452:	431a      	orrs	r2, r3
+                       (((Timing->RCDDelay)-1) << 24));
+ 800c454:	68bb      	ldr	r3, [r7, #8]
+ 800c456:	699b      	ldr	r3, [r3, #24]
+ 800c458:	3b01      	subs	r3, #1
+ 800c45a:	061b      	lsls	r3, r3, #24
+    tmpr1 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
+ 800c45c:	4313      	orrs	r3, r2
+ 800c45e:	697a      	ldr	r2, [r7, #20]
+ 800c460:	4313      	orrs	r3, r2
+ 800c462:	617b      	str	r3, [r7, #20]
+    Device->SDTR[FMC_SDRAM_BANK1] = tmpr1;
+ 800c464:	68fb      	ldr	r3, [r7, #12]
+ 800c466:	697a      	ldr	r2, [r7, #20]
+ 800c468:	609a      	str	r2, [r3, #8]
+ 800c46a:	e039      	b.n	800c4e0 <FMC_SDRAM_Timing_Init+0xec>
+  }
+  else /* FMC_Bank2_SDRAM */
+  {
+    tmpr1 = Device->SDTR[FMC_SDRAM_BANK1];
+ 800c46c:	68fb      	ldr	r3, [r7, #12]
+ 800c46e:	689b      	ldr	r3, [r3, #8]
+ 800c470:	617b      	str	r3, [r7, #20]
+    
+    /* Clear TRC and TRP bits */
+    tmpr1 &= ((uint32_t)~(FMC_SDTR1_TRC | FMC_SDTR1_TRP));
+ 800c472:	697a      	ldr	r2, [r7, #20]
+ 800c474:	4b1e      	ldr	r3, [pc, #120]	; (800c4f0 <FMC_SDRAM_Timing_Init+0xfc>)
+ 800c476:	4013      	ands	r3, r2
+ 800c478:	617b      	str	r3, [r7, #20]
+    
+    tmpr1 |= (uint32_t)((((Timing->RowCycleDelay)-1) << 12)       |\
+ 800c47a:	68bb      	ldr	r3, [r7, #8]
+ 800c47c:	68db      	ldr	r3, [r3, #12]
+ 800c47e:	3b01      	subs	r3, #1
+ 800c480:	031a      	lsls	r2, r3, #12
+                        (((Timing->RPDelay)-1) << 20)); 
+ 800c482:	68bb      	ldr	r3, [r7, #8]
+ 800c484:	695b      	ldr	r3, [r3, #20]
+ 800c486:	3b01      	subs	r3, #1
+ 800c488:	051b      	lsls	r3, r3, #20
+    tmpr1 |= (uint32_t)((((Timing->RowCycleDelay)-1) << 12)       |\
+ 800c48a:	4313      	orrs	r3, r2
+ 800c48c:	697a      	ldr	r2, [r7, #20]
+ 800c48e:	4313      	orrs	r3, r2
+ 800c490:	617b      	str	r3, [r7, #20]
+    
+    tmpr2 = Device->SDTR[FMC_SDRAM_BANK2];
+ 800c492:	68fb      	ldr	r3, [r7, #12]
+ 800c494:	68db      	ldr	r3, [r3, #12]
+ 800c496:	613b      	str	r3, [r7, #16]
+    
+    /* Clear TMRD, TXSR, TRAS, TRC, TWR, TRP and TRCD bits */
+    tmpr2 &= ((uint32_t)~(FMC_SDTR1_TMRD  | FMC_SDTR1_TXSR | FMC_SDTR1_TRAS | \
+ 800c498:	693b      	ldr	r3, [r7, #16]
+ 800c49a:	f003 4370 	and.w	r3, r3, #4026531840	; 0xf0000000
+ 800c49e:	613b      	str	r3, [r7, #16]
+                          FMC_SDTR1_TRC  | FMC_SDTR1_TWR | FMC_SDTR1_TRP | \
+                          FMC_SDTR1_TRCD));
+    
+    tmpr2 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
+ 800c4a0:	68bb      	ldr	r3, [r7, #8]
+ 800c4a2:	681b      	ldr	r3, [r3, #0]
+ 800c4a4:	1e5a      	subs	r2, r3, #1
+                       (((Timing->ExitSelfRefreshDelay)-1) << 4)  |\
+ 800c4a6:	68bb      	ldr	r3, [r7, #8]
+ 800c4a8:	685b      	ldr	r3, [r3, #4]
+ 800c4aa:	3b01      	subs	r3, #1
+ 800c4ac:	011b      	lsls	r3, r3, #4
+    tmpr2 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
+ 800c4ae:	431a      	orrs	r2, r3
+                       (((Timing->SelfRefreshTime)-1) << 8)       |\
+ 800c4b0:	68bb      	ldr	r3, [r7, #8]
+ 800c4b2:	689b      	ldr	r3, [r3, #8]
+ 800c4b4:	3b01      	subs	r3, #1
+ 800c4b6:	021b      	lsls	r3, r3, #8
+                       (((Timing->ExitSelfRefreshDelay)-1) << 4)  |\
+ 800c4b8:	431a      	orrs	r2, r3
+                       (((Timing->WriteRecoveryTime)-1) <<16)     |\
+ 800c4ba:	68bb      	ldr	r3, [r7, #8]
+ 800c4bc:	691b      	ldr	r3, [r3, #16]
+ 800c4be:	3b01      	subs	r3, #1
+ 800c4c0:	041b      	lsls	r3, r3, #16
+                       (((Timing->SelfRefreshTime)-1) << 8)       |\
+ 800c4c2:	431a      	orrs	r2, r3
+                       (((Timing->RCDDelay)-1) << 24));   
+ 800c4c4:	68bb      	ldr	r3, [r7, #8]
+ 800c4c6:	699b      	ldr	r3, [r3, #24]
+ 800c4c8:	3b01      	subs	r3, #1
+ 800c4ca:	061b      	lsls	r3, r3, #24
+    tmpr2 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
+ 800c4cc:	4313      	orrs	r3, r2
+ 800c4ce:	693a      	ldr	r2, [r7, #16]
+ 800c4d0:	4313      	orrs	r3, r2
+ 800c4d2:	613b      	str	r3, [r7, #16]
+
+    Device->SDTR[FMC_SDRAM_BANK1] = tmpr1;
+ 800c4d4:	68fb      	ldr	r3, [r7, #12]
+ 800c4d6:	697a      	ldr	r2, [r7, #20]
+ 800c4d8:	609a      	str	r2, [r3, #8]
+    Device->SDTR[FMC_SDRAM_BANK2] = tmpr2;
+ 800c4da:	68fb      	ldr	r3, [r7, #12]
+ 800c4dc:	693a      	ldr	r2, [r7, #16]
+ 800c4de:	60da      	str	r2, [r3, #12]
+  }
+  
+  return HAL_OK;
+ 800c4e0:	2300      	movs	r3, #0
+}
+ 800c4e2:	4618      	mov	r0, r3
+ 800c4e4:	371c      	adds	r7, #28
+ 800c4e6:	46bd      	mov	sp, r7
+ 800c4e8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800c4ec:	4770      	bx	lr
+ 800c4ee:	bf00      	nop
+ 800c4f0:	ff0f0fff 	.word	0xff0f0fff
+
+0800c4f4 <FMC_SDRAM_SendCommand>:
+  * @param  Timing Pointer to SDRAM Timing structure
+  * @param  Timeout Timeout wait value
+  * @retval HAL state
+  */  
+HAL_StatusTypeDef FMC_SDRAM_SendCommand(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
+{
+ 800c4f4:	b480      	push	{r7}
+ 800c4f6:	b087      	sub	sp, #28
+ 800c4f8:	af00      	add	r7, sp, #0
+ 800c4fa:	60f8      	str	r0, [r7, #12]
+ 800c4fc:	60b9      	str	r1, [r7, #8]
+ 800c4fe:	607a      	str	r2, [r7, #4]
+  __IO uint32_t tmpr = 0;
+ 800c500:	2300      	movs	r3, #0
+ 800c502:	617b      	str	r3, [r7, #20]
+  assert_param(IS_FMC_COMMAND_TARGET(Command->CommandTarget));
+  assert_param(IS_FMC_AUTOREFRESH_NUMBER(Command->AutoRefreshNumber));
+  assert_param(IS_FMC_MODE_REGISTER(Command->ModeRegisterDefinition));  
+
+  /* Set command register */
+  tmpr = (uint32_t)((Command->CommandMode)                  |\
+ 800c504:	68bb      	ldr	r3, [r7, #8]
+ 800c506:	681a      	ldr	r2, [r3, #0]
+                    (Command->CommandTarget)                |\
+ 800c508:	68bb      	ldr	r3, [r7, #8]
+ 800c50a:	685b      	ldr	r3, [r3, #4]
+  tmpr = (uint32_t)((Command->CommandMode)                  |\
+ 800c50c:	431a      	orrs	r2, r3
+                    (((Command->AutoRefreshNumber)-1) << 5) |\
+ 800c50e:	68bb      	ldr	r3, [r7, #8]
+ 800c510:	689b      	ldr	r3, [r3, #8]
+ 800c512:	3b01      	subs	r3, #1
+ 800c514:	015b      	lsls	r3, r3, #5
+                    (Command->CommandTarget)                |\
+ 800c516:	431a      	orrs	r2, r3
+                    ((Command->ModeRegisterDefinition) << 9)
+ 800c518:	68bb      	ldr	r3, [r7, #8]
+ 800c51a:	68db      	ldr	r3, [r3, #12]
+ 800c51c:	025b      	lsls	r3, r3, #9
+  tmpr = (uint32_t)((Command->CommandMode)                  |\
+ 800c51e:	4313      	orrs	r3, r2
+ 800c520:	617b      	str	r3, [r7, #20]
+                    );
+    
+  Device->SDCMR = tmpr;
+ 800c522:	697a      	ldr	r2, [r7, #20]
+ 800c524:	68fb      	ldr	r3, [r7, #12]
+ 800c526:	611a      	str	r2, [r3, #16]
+  
+  return HAL_OK;  
+ 800c528:	2300      	movs	r3, #0
+}
+ 800c52a:	4618      	mov	r0, r3
+ 800c52c:	371c      	adds	r7, #28
+ 800c52e:	46bd      	mov	sp, r7
+ 800c530:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800c534:	4770      	bx	lr
+
+0800c536 <FMC_SDRAM_ProgramRefreshRate>:
+  * @param  Device Pointer to SDRAM device instance  
+  * @param  RefreshRate The SDRAM refresh rate value.       
+  * @retval HAL state
+  */
+HAL_StatusTypeDef FMC_SDRAM_ProgramRefreshRate(FMC_SDRAM_TypeDef *Device, uint32_t RefreshRate)
+{
+ 800c536:	b480      	push	{r7}
+ 800c538:	b083      	sub	sp, #12
+ 800c53a:	af00      	add	r7, sp, #0
+ 800c53c:	6078      	str	r0, [r7, #4]
+ 800c53e:	6039      	str	r1, [r7, #0]
+  /* Check the parameters */
+  assert_param(IS_FMC_SDRAM_DEVICE(Device));
+  assert_param(IS_FMC_REFRESH_RATE(RefreshRate));
+  
+  /* Set the refresh rate in command register */
+  Device->SDRTR |= (RefreshRate<<1);
+ 800c540:	687b      	ldr	r3, [r7, #4]
+ 800c542:	695a      	ldr	r2, [r3, #20]
+ 800c544:	683b      	ldr	r3, [r7, #0]
+ 800c546:	005b      	lsls	r3, r3, #1
+ 800c548:	431a      	orrs	r2, r3
+ 800c54a:	687b      	ldr	r3, [r7, #4]
+ 800c54c:	615a      	str	r2, [r3, #20]
+  
+  return HAL_OK;   
+ 800c54e:	2300      	movs	r3, #0
+}
+ 800c550:	4618      	mov	r0, r3
+ 800c552:	370c      	adds	r7, #12
+ 800c554:	46bd      	mov	sp, r7
+ 800c556:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800c55a:	4770      	bx	lr
+
+0800c55c <MX_LWIP_Init>:
+
+/**
+  * LwIP initialization function
+  */
+void MX_LWIP_Init(void)
+{
+ 800c55c:	b5b0      	push	{r4, r5, r7, lr}
+ 800c55e:	b08e      	sub	sp, #56	; 0x38
+ 800c560:	af04      	add	r7, sp, #16
+  /* Initilialize the LwIP stack with RTOS */
+  tcpip_init( NULL, NULL );
+ 800c562:	2100      	movs	r1, #0
+ 800c564:	2000      	movs	r0, #0
+ 800c566:	f003 fe19 	bl	801019c <tcpip_init>
+
+  /* IP addresses initialization with DHCP (IPv4) */
+  ipaddr.addr = 0;
+ 800c56a:	4b2a      	ldr	r3, [pc, #168]	; (800c614 <MX_LWIP_Init+0xb8>)
+ 800c56c:	2200      	movs	r2, #0
+ 800c56e:	601a      	str	r2, [r3, #0]
+  netmask.addr = 0;
+ 800c570:	4b29      	ldr	r3, [pc, #164]	; (800c618 <MX_LWIP_Init+0xbc>)
+ 800c572:	2200      	movs	r2, #0
+ 800c574:	601a      	str	r2, [r3, #0]
+  gw.addr = 0;
+ 800c576:	4b29      	ldr	r3, [pc, #164]	; (800c61c <MX_LWIP_Init+0xc0>)
+ 800c578:	2200      	movs	r2, #0
+ 800c57a:	601a      	str	r2, [r3, #0]
+
+  /* add the network interface (IPv4/IPv6) with RTOS */
+  netif_add(&gnetif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &tcpip_input);
+ 800c57c:	4b28      	ldr	r3, [pc, #160]	; (800c620 <MX_LWIP_Init+0xc4>)
+ 800c57e:	9302      	str	r3, [sp, #8]
+ 800c580:	4b28      	ldr	r3, [pc, #160]	; (800c624 <MX_LWIP_Init+0xc8>)
+ 800c582:	9301      	str	r3, [sp, #4]
+ 800c584:	2300      	movs	r3, #0
+ 800c586:	9300      	str	r3, [sp, #0]
+ 800c588:	4b24      	ldr	r3, [pc, #144]	; (800c61c <MX_LWIP_Init+0xc0>)
+ 800c58a:	4a23      	ldr	r2, [pc, #140]	; (800c618 <MX_LWIP_Init+0xbc>)
+ 800c58c:	4921      	ldr	r1, [pc, #132]	; (800c614 <MX_LWIP_Init+0xb8>)
+ 800c58e:	4826      	ldr	r0, [pc, #152]	; (800c628 <MX_LWIP_Init+0xcc>)
+ 800c590:	f004 fb88 	bl	8010ca4 <netif_add>
+
+  /* Registers the default network interface */
+  netif_set_default(&gnetif);
+ 800c594:	4824      	ldr	r0, [pc, #144]	; (800c628 <MX_LWIP_Init+0xcc>)
+ 800c596:	f004 fd3f 	bl	8011018 <netif_set_default>
+
+  if (netif_is_link_up(&gnetif))
+ 800c59a:	4b23      	ldr	r3, [pc, #140]	; (800c628 <MX_LWIP_Init+0xcc>)
+ 800c59c:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 800c5a0:	089b      	lsrs	r3, r3, #2
+ 800c5a2:	f003 0301 	and.w	r3, r3, #1
+ 800c5a6:	b2db      	uxtb	r3, r3
+ 800c5a8:	2b00      	cmp	r3, #0
+ 800c5aa:	d003      	beq.n	800c5b4 <MX_LWIP_Init+0x58>
+  {
+    /* When the netif is fully configured this function must be called */
+    netif_set_up(&gnetif);
+ 800c5ac:	481e      	ldr	r0, [pc, #120]	; (800c628 <MX_LWIP_Init+0xcc>)
+ 800c5ae:	f004 fd43 	bl	8011038 <netif_set_up>
+ 800c5b2:	e002      	b.n	800c5ba <MX_LWIP_Init+0x5e>
+  }
+  else
+  {
+    /* When the netif link is down this function must be called */
+    netif_set_down(&gnetif);
+ 800c5b4:	481c      	ldr	r0, [pc, #112]	; (800c628 <MX_LWIP_Init+0xcc>)
+ 800c5b6:	f004 fdab 	bl	8011110 <netif_set_down>
+  }
+
+  /* Set the link callback function, this function is called on change of link status*/
+  netif_set_link_callback(&gnetif, ethernetif_update_config);
+ 800c5ba:	491c      	ldr	r1, [pc, #112]	; (800c62c <MX_LWIP_Init+0xd0>)
+ 800c5bc:	481a      	ldr	r0, [pc, #104]	; (800c628 <MX_LWIP_Init+0xcc>)
+ 800c5be:	f004 fe41 	bl	8011244 <netif_set_link_callback>
+
+  /* create a binary semaphore used for informing ethernetif of frame reception */
+  osSemaphoreDef(Netif_SEM);
+ 800c5c2:	2300      	movs	r3, #0
+ 800c5c4:	623b      	str	r3, [r7, #32]
+ 800c5c6:	2300      	movs	r3, #0
+ 800c5c8:	627b      	str	r3, [r7, #36]	; 0x24
+  Netif_LinkSemaphore = osSemaphoreCreate(osSemaphore(Netif_SEM) , 1 );
+ 800c5ca:	f107 0320 	add.w	r3, r7, #32
+ 800c5ce:	2101      	movs	r1, #1
+ 800c5d0:	4618      	mov	r0, r3
+ 800c5d2:	f000 fd75 	bl	800d0c0 <osSemaphoreCreate>
+ 800c5d6:	4602      	mov	r2, r0
+ 800c5d8:	4b15      	ldr	r3, [pc, #84]	; (800c630 <MX_LWIP_Init+0xd4>)
+ 800c5da:	601a      	str	r2, [r3, #0]
+
+  link_arg.netif = &gnetif;
+ 800c5dc:	4b15      	ldr	r3, [pc, #84]	; (800c634 <MX_LWIP_Init+0xd8>)
+ 800c5de:	4a12      	ldr	r2, [pc, #72]	; (800c628 <MX_LWIP_Init+0xcc>)
+ 800c5e0:	601a      	str	r2, [r3, #0]
+  link_arg.semaphore = Netif_LinkSemaphore;
+ 800c5e2:	4b13      	ldr	r3, [pc, #76]	; (800c630 <MX_LWIP_Init+0xd4>)
+ 800c5e4:	681b      	ldr	r3, [r3, #0]
+ 800c5e6:	4a13      	ldr	r2, [pc, #76]	; (800c634 <MX_LWIP_Init+0xd8>)
+ 800c5e8:	6053      	str	r3, [r2, #4]
+  /* Create the Ethernet link handler thread */
+/* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
+  osThreadDef(LinkThr, ethernetif_set_link, osPriorityBelowNormal, 0, configMINIMAL_STACK_SIZE * 2);
+ 800c5ea:	4b13      	ldr	r3, [pc, #76]	; (800c638 <MX_LWIP_Init+0xdc>)
+ 800c5ec:	1d3c      	adds	r4, r7, #4
+ 800c5ee:	461d      	mov	r5, r3
+ 800c5f0:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 800c5f2:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 800c5f4:	e895 0007 	ldmia.w	r5, {r0, r1, r2}
+ 800c5f8:	e884 0007 	stmia.w	r4, {r0, r1, r2}
+  osThreadCreate (osThread(LinkThr), &link_arg);
+ 800c5fc:	1d3b      	adds	r3, r7, #4
+ 800c5fe:	490d      	ldr	r1, [pc, #52]	; (800c634 <MX_LWIP_Init+0xd8>)
+ 800c600:	4618      	mov	r0, r3
+ 800c602:	f000 fc60 	bl	800cec6 <osThreadCreate>
+/* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
+
+  /* Start DHCP negotiation for a network interface (IPv4) */
+  dhcp_start(&gnetif);
+ 800c606:	4808      	ldr	r0, [pc, #32]	; (800c628 <MX_LWIP_Init+0xcc>)
+ 800c608:	f00b ff7e 	bl	8018508 <dhcp_start>
+
+/* USER CODE BEGIN 3 */
+
+/* USER CODE END 3 */
+}
+ 800c60c:	bf00      	nop
+ 800c60e:	3728      	adds	r7, #40	; 0x28
+ 800c610:	46bd      	mov	sp, r7
+ 800c612:	bdb0      	pop	{r4, r5, r7, pc}
+ 800c614:	20008fbc 	.word	0x20008fbc
+ 800c618:	20008fc0 	.word	0x20008fc0
+ 800c61c:	20008fc4 	.word	0x20008fc4
+ 800c620:	080100d9 	.word	0x080100d9
+ 800c624:	0800cc55 	.word	0x0800cc55
+ 800c628:	20008f84 	.word	0x20008f84
+ 800c62c:	0800cd39 	.word	0x0800cd39
+ 800c630:	20000570 	.word	0x20000570
+ 800c634:	20008f7c 	.word	0x20008f7c
+ 800c638:	0801d668 	.word	0x0801d668
+
+0800c63c <HAL_ETH_MspInit>:
+/* USER CODE END 3 */
+
+/* Private functions ---------------------------------------------------------*/
+
+void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
+{
+ 800c63c:	b580      	push	{r7, lr}
+ 800c63e:	b08e      	sub	sp, #56	; 0x38
+ 800c640:	af00      	add	r7, sp, #0
+ 800c642:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 800c644:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 800c648:	2200      	movs	r2, #0
+ 800c64a:	601a      	str	r2, [r3, #0]
+ 800c64c:	605a      	str	r2, [r3, #4]
+ 800c64e:	609a      	str	r2, [r3, #8]
+ 800c650:	60da      	str	r2, [r3, #12]
+ 800c652:	611a      	str	r2, [r3, #16]
+  if(ethHandle->Instance==ETH)
+ 800c654:	687b      	ldr	r3, [r7, #4]
+ 800c656:	681b      	ldr	r3, [r3, #0]
+ 800c658:	4a44      	ldr	r2, [pc, #272]	; (800c76c <HAL_ETH_MspInit+0x130>)
+ 800c65a:	4293      	cmp	r3, r2
+ 800c65c:	f040 8081 	bne.w	800c762 <HAL_ETH_MspInit+0x126>
+  {
+  /* USER CODE BEGIN ETH_MspInit 0 */
+
+  /* USER CODE END ETH_MspInit 0 */
+    /* Enable Peripheral clock */
+    __HAL_RCC_ETH_CLK_ENABLE();
+ 800c660:	4b43      	ldr	r3, [pc, #268]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c662:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c664:	4a42      	ldr	r2, [pc, #264]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c666:	f043 7300 	orr.w	r3, r3, #33554432	; 0x2000000
+ 800c66a:	6313      	str	r3, [r2, #48]	; 0x30
+ 800c66c:	4b40      	ldr	r3, [pc, #256]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c66e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c670:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
+ 800c674:	623b      	str	r3, [r7, #32]
+ 800c676:	6a3b      	ldr	r3, [r7, #32]
+ 800c678:	4b3d      	ldr	r3, [pc, #244]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c67a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c67c:	4a3c      	ldr	r2, [pc, #240]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c67e:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
+ 800c682:	6313      	str	r3, [r2, #48]	; 0x30
+ 800c684:	4b3a      	ldr	r3, [pc, #232]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c686:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c688:	f003 6380 	and.w	r3, r3, #67108864	; 0x4000000
+ 800c68c:	61fb      	str	r3, [r7, #28]
+ 800c68e:	69fb      	ldr	r3, [r7, #28]
+ 800c690:	4b37      	ldr	r3, [pc, #220]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c692:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c694:	4a36      	ldr	r2, [pc, #216]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c696:	f043 6300 	orr.w	r3, r3, #134217728	; 0x8000000
+ 800c69a:	6313      	str	r3, [r2, #48]	; 0x30
+ 800c69c:	4b34      	ldr	r3, [pc, #208]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c69e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c6a0:	f003 6300 	and.w	r3, r3, #134217728	; 0x8000000
+ 800c6a4:	61bb      	str	r3, [r7, #24]
+ 800c6a6:	69bb      	ldr	r3, [r7, #24]
+
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+ 800c6a8:	4b31      	ldr	r3, [pc, #196]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c6aa:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c6ac:	4a30      	ldr	r2, [pc, #192]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c6ae:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 800c6b2:	6313      	str	r3, [r2, #48]	; 0x30
+ 800c6b4:	4b2e      	ldr	r3, [pc, #184]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c6b6:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c6b8:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800c6bc:	617b      	str	r3, [r7, #20]
+ 800c6be:	697b      	ldr	r3, [r7, #20]
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+ 800c6c0:	4b2b      	ldr	r3, [pc, #172]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c6c2:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c6c4:	4a2a      	ldr	r2, [pc, #168]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c6c6:	f043 0304 	orr.w	r3, r3, #4
+ 800c6ca:	6313      	str	r3, [r2, #48]	; 0x30
+ 800c6cc:	4b28      	ldr	r3, [pc, #160]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c6ce:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c6d0:	f003 0304 	and.w	r3, r3, #4
+ 800c6d4:	613b      	str	r3, [r7, #16]
+ 800c6d6:	693b      	ldr	r3, [r7, #16]
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+ 800c6d8:	4b25      	ldr	r3, [pc, #148]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c6da:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c6dc:	4a24      	ldr	r2, [pc, #144]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c6de:	f043 0301 	orr.w	r3, r3, #1
+ 800c6e2:	6313      	str	r3, [r2, #48]	; 0x30
+ 800c6e4:	4b22      	ldr	r3, [pc, #136]	; (800c770 <HAL_ETH_MspInit+0x134>)
+ 800c6e6:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800c6e8:	f003 0301 	and.w	r3, r3, #1
+ 800c6ec:	60fb      	str	r3, [r7, #12]
+ 800c6ee:	68fb      	ldr	r3, [r7, #12]
+    PC4     ------> ETH_RXD0
+    PA2     ------> ETH_MDIO
+    PC5     ------> ETH_RXD1
+    PA7     ------> ETH_CRS_DV
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_13|GPIO_PIN_11;
+ 800c6f0:	f44f 43d0 	mov.w	r3, #26624	; 0x6800
+ 800c6f4:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 800c6f6:	2302      	movs	r3, #2
+ 800c6f8:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800c6fa:	2300      	movs	r3, #0
+ 800c6fc:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 800c6fe:	2303      	movs	r3, #3
+ 800c700:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+ 800c702:	230b      	movs	r3, #11
+ 800c704:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 800c706:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 800c70a:	4619      	mov	r1, r3
+ 800c70c:	4819      	ldr	r0, [pc, #100]	; (800c774 <HAL_ETH_MspInit+0x138>)
+ 800c70e:	f7fa fe8b 	bl	8007428 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
+ 800c712:	2332      	movs	r3, #50	; 0x32
+ 800c714:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 800c716:	2302      	movs	r3, #2
+ 800c718:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800c71a:	2300      	movs	r3, #0
+ 800c71c:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 800c71e:	2303      	movs	r3, #3
+ 800c720:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+ 800c722:	230b      	movs	r3, #11
+ 800c724:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ 800c726:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 800c72a:	4619      	mov	r1, r3
+ 800c72c:	4812      	ldr	r0, [pc, #72]	; (800c778 <HAL_ETH_MspInit+0x13c>)
+ 800c72e:	f7fa fe7b 	bl	8007428 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
+ 800c732:	2386      	movs	r3, #134	; 0x86
+ 800c734:	627b      	str	r3, [r7, #36]	; 0x24
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 800c736:	2302      	movs	r3, #2
+ 800c738:	62bb      	str	r3, [r7, #40]	; 0x28
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800c73a:	2300      	movs	r3, #0
+ 800c73c:	62fb      	str	r3, [r7, #44]	; 0x2c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 800c73e:	2303      	movs	r3, #3
+ 800c740:	633b      	str	r3, [r7, #48]	; 0x30
+    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+ 800c742:	230b      	movs	r3, #11
+ 800c744:	637b      	str	r3, [r7, #52]	; 0x34
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 800c746:	f107 0324 	add.w	r3, r7, #36	; 0x24
+ 800c74a:	4619      	mov	r1, r3
+ 800c74c:	480b      	ldr	r0, [pc, #44]	; (800c77c <HAL_ETH_MspInit+0x140>)
+ 800c74e:	f7fa fe6b 	bl	8007428 <HAL_GPIO_Init>
+
+    /* Peripheral interrupt init */
+    HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
+ 800c752:	2200      	movs	r2, #0
+ 800c754:	2105      	movs	r1, #5
+ 800c756:	203d      	movs	r0, #61	; 0x3d
+ 800c758:	f7f8 feb6 	bl	80054c8 <HAL_NVIC_SetPriority>
+    HAL_NVIC_EnableIRQ(ETH_IRQn);
+ 800c75c:	203d      	movs	r0, #61	; 0x3d
+ 800c75e:	f7f8 fecf 	bl	8005500 <HAL_NVIC_EnableIRQ>
+  /* USER CODE BEGIN ETH_MspInit 1 */
+
+  /* USER CODE END ETH_MspInit 1 */
+  }
+}
+ 800c762:	bf00      	nop
+ 800c764:	3738      	adds	r7, #56	; 0x38
+ 800c766:	46bd      	mov	sp, r7
+ 800c768:	bd80      	pop	{r7, pc}
+ 800c76a:	bf00      	nop
+ 800c76c:	40028000 	.word	0x40028000
+ 800c770:	40023800 	.word	0x40023800
+ 800c774:	40021800 	.word	0x40021800
+ 800c778:	40020800 	.word	0x40020800
+ 800c77c:	40020000 	.word	0x40020000
+
+0800c780 <HAL_ETH_RxCpltCallback>:
+  * @brief  Ethernet Rx Transfer completed callback
+  * @param  heth: ETH handle
+  * @retval None
+  */
+void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
+{
+ 800c780:	b580      	push	{r7, lr}
+ 800c782:	b082      	sub	sp, #8
+ 800c784:	af00      	add	r7, sp, #0
+ 800c786:	6078      	str	r0, [r7, #4]
+  osSemaphoreRelease(s_xSemaphore);
+ 800c788:	4b04      	ldr	r3, [pc, #16]	; (800c79c <HAL_ETH_RxCpltCallback+0x1c>)
+ 800c78a:	681b      	ldr	r3, [r3, #0]
+ 800c78c:	4618      	mov	r0, r3
+ 800c78e:	f000 fd25 	bl	800d1dc <osSemaphoreRelease>
+}
+ 800c792:	bf00      	nop
+ 800c794:	3708      	adds	r7, #8
+ 800c796:	46bd      	mov	sp, r7
+ 800c798:	bd80      	pop	{r7, pc}
+ 800c79a:	bf00      	nop
+ 800c79c:	20000574 	.word	0x20000574
+
+0800c7a0 <low_level_init>:
+ *
+ * @param netif the already initialized lwip network interface structure
+ *        for this ethernetif
+ */
+static void low_level_init(struct netif *netif)
+{
+ 800c7a0:	b5b0      	push	{r4, r5, r7, lr}
+ 800c7a2:	b090      	sub	sp, #64	; 0x40
+ 800c7a4:	af00      	add	r7, sp, #0
+ 800c7a6:	6078      	str	r0, [r7, #4]
+  uint32_t regvalue = 0;
+ 800c7a8:	2300      	movs	r3, #0
+ 800c7aa:	63bb      	str	r3, [r7, #56]	; 0x38
+  HAL_StatusTypeDef hal_eth_init_status;
+
+/* Init ETH */
+
+   uint8_t MACAddr[6] ;
+  heth.Instance = ETH;
+ 800c7ac:	4b60      	ldr	r3, [pc, #384]	; (800c930 <low_level_init+0x190>)
+ 800c7ae:	4a61      	ldr	r2, [pc, #388]	; (800c934 <low_level_init+0x194>)
+ 800c7b0:	601a      	str	r2, [r3, #0]
+  heth.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
+ 800c7b2:	4b5f      	ldr	r3, [pc, #380]	; (800c930 <low_level_init+0x190>)
+ 800c7b4:	2201      	movs	r2, #1
+ 800c7b6:	605a      	str	r2, [r3, #4]
+  heth.Init.Speed = ETH_SPEED_100M;
+ 800c7b8:	4b5d      	ldr	r3, [pc, #372]	; (800c930 <low_level_init+0x190>)
+ 800c7ba:	f44f 4280 	mov.w	r2, #16384	; 0x4000
+ 800c7be:	609a      	str	r2, [r3, #8]
+  heth.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
+ 800c7c0:	4b5b      	ldr	r3, [pc, #364]	; (800c930 <low_level_init+0x190>)
+ 800c7c2:	f44f 6200 	mov.w	r2, #2048	; 0x800
+ 800c7c6:	60da      	str	r2, [r3, #12]
+  heth.Init.PhyAddress = LAN8742A_PHY_ADDRESS;
+ 800c7c8:	4b59      	ldr	r3, [pc, #356]	; (800c930 <low_level_init+0x190>)
+ 800c7ca:	2201      	movs	r2, #1
+ 800c7cc:	821a      	strh	r2, [r3, #16]
+  MACAddr[0] = 0x00;
+ 800c7ce:	2300      	movs	r3, #0
+ 800c7d0:	f887 3030 	strb.w	r3, [r7, #48]	; 0x30
+  MACAddr[1] = 0x80;
+ 800c7d4:	2380      	movs	r3, #128	; 0x80
+ 800c7d6:	f887 3031 	strb.w	r3, [r7, #49]	; 0x31
+  MACAddr[2] = 0xE1;
+ 800c7da:	23e1      	movs	r3, #225	; 0xe1
+ 800c7dc:	f887 3032 	strb.w	r3, [r7, #50]	; 0x32
+  MACAddr[3] = 0x00;
+ 800c7e0:	2300      	movs	r3, #0
+ 800c7e2:	f887 3033 	strb.w	r3, [r7, #51]	; 0x33
+  MACAddr[4] = 0x00;
+ 800c7e6:	2300      	movs	r3, #0
+ 800c7e8:	f887 3034 	strb.w	r3, [r7, #52]	; 0x34
+  MACAddr[5] = 0x00;
+ 800c7ec:	2300      	movs	r3, #0
+ 800c7ee:	f887 3035 	strb.w	r3, [r7, #53]	; 0x35
+  heth.Init.MACAddr = &MACAddr[0];
+ 800c7f2:	4a4f      	ldr	r2, [pc, #316]	; (800c930 <low_level_init+0x190>)
+ 800c7f4:	f107 0330 	add.w	r3, r7, #48	; 0x30
+ 800c7f8:	6153      	str	r3, [r2, #20]
+  heth.Init.RxMode = ETH_RXINTERRUPT_MODE;
+ 800c7fa:	4b4d      	ldr	r3, [pc, #308]	; (800c930 <low_level_init+0x190>)
+ 800c7fc:	2201      	movs	r2, #1
+ 800c7fe:	619a      	str	r2, [r3, #24]
+  heth.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
+ 800c800:	4b4b      	ldr	r3, [pc, #300]	; (800c930 <low_level_init+0x190>)
+ 800c802:	2200      	movs	r2, #0
+ 800c804:	61da      	str	r2, [r3, #28]
+  heth.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
+ 800c806:	4b4a      	ldr	r3, [pc, #296]	; (800c930 <low_level_init+0x190>)
+ 800c808:	f44f 0200 	mov.w	r2, #8388608	; 0x800000
+ 800c80c:	621a      	str	r2, [r3, #32]
+
+  /* USER CODE BEGIN MACADDRESS */
+
+  /* USER CODE END MACADDRESS */
+
+  hal_eth_init_status = HAL_ETH_Init(&heth);
+ 800c80e:	4848      	ldr	r0, [pc, #288]	; (800c930 <low_level_init+0x190>)
+ 800c810:	f7f9 fc84 	bl	800611c <HAL_ETH_Init>
+ 800c814:	4603      	mov	r3, r0
+ 800c816:	f887 303f 	strb.w	r3, [r7, #63]	; 0x3f
+
+  if (hal_eth_init_status == HAL_OK)
+ 800c81a:	f897 303f 	ldrb.w	r3, [r7, #63]	; 0x3f
+ 800c81e:	2b00      	cmp	r3, #0
+ 800c820:	d108      	bne.n	800c834 <low_level_init+0x94>
+  {
+    /* Set netif link flag */
+    netif->flags |= NETIF_FLAG_LINK_UP;
+ 800c822:	687b      	ldr	r3, [r7, #4]
+ 800c824:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 800c828:	f043 0304 	orr.w	r3, r3, #4
+ 800c82c:	b2da      	uxtb	r2, r3
+ 800c82e:	687b      	ldr	r3, [r7, #4]
+ 800c830:	f883 2031 	strb.w	r2, [r3, #49]	; 0x31
+  }
+  /* Initialize Tx Descriptors list: Chain Mode */
+  HAL_ETH_DMATxDescListInit(&heth, DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
+ 800c834:	2304      	movs	r3, #4
+ 800c836:	4a40      	ldr	r2, [pc, #256]	; (800c938 <low_level_init+0x198>)
+ 800c838:	4940      	ldr	r1, [pc, #256]	; (800c93c <low_level_init+0x19c>)
+ 800c83a:	483d      	ldr	r0, [pc, #244]	; (800c930 <low_level_init+0x190>)
+ 800c83c:	f7f9 fe0a 	bl	8006454 <HAL_ETH_DMATxDescListInit>
+
+  /* Initialize Rx Descriptors list: Chain Mode  */
+  HAL_ETH_DMARxDescListInit(&heth, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
+ 800c840:	2304      	movs	r3, #4
+ 800c842:	4a3f      	ldr	r2, [pc, #252]	; (800c940 <low_level_init+0x1a0>)
+ 800c844:	493f      	ldr	r1, [pc, #252]	; (800c944 <low_level_init+0x1a4>)
+ 800c846:	483a      	ldr	r0, [pc, #232]	; (800c930 <low_level_init+0x190>)
+ 800c848:	f7f9 fe6d 	bl	8006526 <HAL_ETH_DMARxDescListInit>
+
+#if LWIP_ARP || LWIP_ETHERNET
+
+  /* set MAC hardware address length */
+  netif->hwaddr_len = ETH_HWADDR_LEN;
+ 800c84c:	687b      	ldr	r3, [r7, #4]
+ 800c84e:	2206      	movs	r2, #6
+ 800c850:	f883 2030 	strb.w	r2, [r3, #48]	; 0x30
+
+  /* set MAC hardware address */
+  netif->hwaddr[0] =  heth.Init.MACAddr[0];
+ 800c854:	4b36      	ldr	r3, [pc, #216]	; (800c930 <low_level_init+0x190>)
+ 800c856:	695b      	ldr	r3, [r3, #20]
+ 800c858:	781a      	ldrb	r2, [r3, #0]
+ 800c85a:	687b      	ldr	r3, [r7, #4]
+ 800c85c:	f883 202a 	strb.w	r2, [r3, #42]	; 0x2a
+  netif->hwaddr[1] =  heth.Init.MACAddr[1];
+ 800c860:	4b33      	ldr	r3, [pc, #204]	; (800c930 <low_level_init+0x190>)
+ 800c862:	695b      	ldr	r3, [r3, #20]
+ 800c864:	785a      	ldrb	r2, [r3, #1]
+ 800c866:	687b      	ldr	r3, [r7, #4]
+ 800c868:	f883 202b 	strb.w	r2, [r3, #43]	; 0x2b
+  netif->hwaddr[2] =  heth.Init.MACAddr[2];
+ 800c86c:	4b30      	ldr	r3, [pc, #192]	; (800c930 <low_level_init+0x190>)
+ 800c86e:	695b      	ldr	r3, [r3, #20]
+ 800c870:	789a      	ldrb	r2, [r3, #2]
+ 800c872:	687b      	ldr	r3, [r7, #4]
+ 800c874:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
+  netif->hwaddr[3] =  heth.Init.MACAddr[3];
+ 800c878:	4b2d      	ldr	r3, [pc, #180]	; (800c930 <low_level_init+0x190>)
+ 800c87a:	695b      	ldr	r3, [r3, #20]
+ 800c87c:	78da      	ldrb	r2, [r3, #3]
+ 800c87e:	687b      	ldr	r3, [r7, #4]
+ 800c880:	f883 202d 	strb.w	r2, [r3, #45]	; 0x2d
+  netif->hwaddr[4] =  heth.Init.MACAddr[4];
+ 800c884:	4b2a      	ldr	r3, [pc, #168]	; (800c930 <low_level_init+0x190>)
+ 800c886:	695b      	ldr	r3, [r3, #20]
+ 800c888:	791a      	ldrb	r2, [r3, #4]
+ 800c88a:	687b      	ldr	r3, [r7, #4]
+ 800c88c:	f883 202e 	strb.w	r2, [r3, #46]	; 0x2e
+  netif->hwaddr[5] =  heth.Init.MACAddr[5];
+ 800c890:	4b27      	ldr	r3, [pc, #156]	; (800c930 <low_level_init+0x190>)
+ 800c892:	695b      	ldr	r3, [r3, #20]
+ 800c894:	795a      	ldrb	r2, [r3, #5]
+ 800c896:	687b      	ldr	r3, [r7, #4]
+ 800c898:	f883 202f 	strb.w	r2, [r3, #47]	; 0x2f
+
+  /* maximum transfer unit */
+  netif->mtu = 1500;
+ 800c89c:	687b      	ldr	r3, [r7, #4]
+ 800c89e:	f240 52dc 	movw	r2, #1500	; 0x5dc
+ 800c8a2:	851a      	strh	r2, [r3, #40]	; 0x28
+
+  /* Accept broadcast address and ARP traffic */
+  /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
+  #if LWIP_ARP
+    netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
+ 800c8a4:	687b      	ldr	r3, [r7, #4]
+ 800c8a6:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 800c8aa:	f043 030a 	orr.w	r3, r3, #10
+ 800c8ae:	b2da      	uxtb	r2, r3
+ 800c8b0:	687b      	ldr	r3, [r7, #4]
+ 800c8b2:	f883 2031 	strb.w	r2, [r3, #49]	; 0x31
+  #else
+    netif->flags |= NETIF_FLAG_BROADCAST;
+  #endif /* LWIP_ARP */
+
+/* create a binary semaphore used for informing ethernetif of frame reception */
+  osSemaphoreDef(SEM);
+ 800c8b6:	2300      	movs	r3, #0
+ 800c8b8:	62bb      	str	r3, [r7, #40]	; 0x28
+ 800c8ba:	2300      	movs	r3, #0
+ 800c8bc:	62fb      	str	r3, [r7, #44]	; 0x2c
+  s_xSemaphore = osSemaphoreCreate(osSemaphore(SEM), 1);
+ 800c8be:	f107 0328 	add.w	r3, r7, #40	; 0x28
+ 800c8c2:	2101      	movs	r1, #1
+ 800c8c4:	4618      	mov	r0, r3
+ 800c8c6:	f000 fbfb 	bl	800d0c0 <osSemaphoreCreate>
+ 800c8ca:	4602      	mov	r2, r0
+ 800c8cc:	4b1e      	ldr	r3, [pc, #120]	; (800c948 <low_level_init+0x1a8>)
+ 800c8ce:	601a      	str	r2, [r3, #0]
+
+/* create the task that handles the ETH_MAC */
+/* USER CODE BEGIN OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
+  osThreadDef(EthIf, ethernetif_input, osPriorityRealtime, 0, INTERFACE_THREAD_STACK_SIZE);
+ 800c8d0:	4b1e      	ldr	r3, [pc, #120]	; (800c94c <low_level_init+0x1ac>)
+ 800c8d2:	f107 040c 	add.w	r4, r7, #12
+ 800c8d6:	461d      	mov	r5, r3
+ 800c8d8:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 800c8da:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 800c8dc:	e895 0007 	ldmia.w	r5, {r0, r1, r2}
+ 800c8e0:	e884 0007 	stmia.w	r4, {r0, r1, r2}
+  osThreadCreate (osThread(EthIf), netif);
+ 800c8e4:	f107 030c 	add.w	r3, r7, #12
+ 800c8e8:	6879      	ldr	r1, [r7, #4]
+ 800c8ea:	4618      	mov	r0, r3
+ 800c8ec:	f000 faeb 	bl	800cec6 <osThreadCreate>
+/* USER CODE END OS_THREAD_DEF_CREATE_CMSIS_RTOS_V1 */
+  /* Enable MAC and DMA transmission and reception */
+  HAL_ETH_Start(&heth);
+ 800c8f0:	480f      	ldr	r0, [pc, #60]	; (800c930 <low_level_init+0x190>)
+ 800c8f2:	f7fa f940 	bl	8006b76 <HAL_ETH_Start>
+/* USER CODE BEGIN PHY_PRE_CONFIG */
+
+/* USER CODE END PHY_PRE_CONFIG */
+
+  /* Read Register Configuration */
+  HAL_ETH_ReadPHYRegister(&heth, PHY_ISFR, &regvalue);
+ 800c8f6:	f107 0338 	add.w	r3, r7, #56	; 0x38
+ 800c8fa:	461a      	mov	r2, r3
+ 800c8fc:	211d      	movs	r1, #29
+ 800c8fe:	480c      	ldr	r0, [pc, #48]	; (800c930 <low_level_init+0x190>)
+ 800c900:	f7fa f86b 	bl	80069da <HAL_ETH_ReadPHYRegister>
+  regvalue |= (PHY_ISFR_INT4);
+ 800c904:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 800c906:	f043 030b 	orr.w	r3, r3, #11
+ 800c90a:	63bb      	str	r3, [r7, #56]	; 0x38
+
+  /* Enable Interrupt on change of link status */
+  HAL_ETH_WritePHYRegister(&heth, PHY_ISFR , regvalue );
+ 800c90c:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 800c90e:	461a      	mov	r2, r3
+ 800c910:	211d      	movs	r1, #29
+ 800c912:	4807      	ldr	r0, [pc, #28]	; (800c930 <low_level_init+0x190>)
+ 800c914:	f7fa f8c9 	bl	8006aaa <HAL_ETH_WritePHYRegister>
+
+  /* Read Register Configuration */
+  HAL_ETH_ReadPHYRegister(&heth, PHY_ISFR , &regvalue);
+ 800c918:	f107 0338 	add.w	r3, r7, #56	; 0x38
+ 800c91c:	461a      	mov	r2, r3
+ 800c91e:	211d      	movs	r1, #29
+ 800c920:	4803      	ldr	r0, [pc, #12]	; (800c930 <low_level_init+0x190>)
+ 800c922:	f7fa f85a 	bl	80069da <HAL_ETH_ReadPHYRegister>
+#endif /* LWIP_ARP || LWIP_ETHERNET */
+
+/* USER CODE BEGIN LOW_LEVEL_INIT */
+
+/* USER CODE END LOW_LEVEL_INIT */
+}
+ 800c926:	bf00      	nop
+ 800c928:	3740      	adds	r7, #64	; 0x40
+ 800c92a:	46bd      	mov	sp, r7
+ 800c92c:	bdb0      	pop	{r4, r5, r7, pc}
+ 800c92e:	bf00      	nop
+ 800c930:	2000a898 	.word	0x2000a898
+ 800c934:	40028000 	.word	0x40028000
+ 800c938:	2000a8e0 	.word	0x2000a8e0
+ 800c93c:	20008fc8 	.word	0x20008fc8
+ 800c940:	20009048 	.word	0x20009048
+ 800c944:	2000a818 	.word	0x2000a818
+ 800c948:	20000574 	.word	0x20000574
+ 800c94c:	0801d68c 	.word	0x0801d68c
+
+0800c950 <low_level_output>:
+ *       to become availale since the stack doesn't retry to send a packet
+ *       dropped because of memory failure (except for the TCP timers).
+ */
+
+static err_t low_level_output(struct netif *netif, struct pbuf *p)
+{
+ 800c950:	b580      	push	{r7, lr}
+ 800c952:	b08a      	sub	sp, #40	; 0x28
+ 800c954:	af00      	add	r7, sp, #0
+ 800c956:	6078      	str	r0, [r7, #4]
+ 800c958:	6039      	str	r1, [r7, #0]
+  err_t errval;
+  struct pbuf *q;
+  uint8_t *buffer = (uint8_t *)(heth.TxDesc->Buffer1Addr);
+ 800c95a:	4b4b      	ldr	r3, [pc, #300]	; (800ca88 <low_level_output+0x138>)
+ 800c95c:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800c95e:	689b      	ldr	r3, [r3, #8]
+ 800c960:	61fb      	str	r3, [r7, #28]
+  __IO ETH_DMADescTypeDef *DmaTxDesc;
+  uint32_t framelength = 0;
+ 800c962:	2300      	movs	r3, #0
+ 800c964:	617b      	str	r3, [r7, #20]
+  uint32_t bufferoffset = 0;
+ 800c966:	2300      	movs	r3, #0
+ 800c968:	613b      	str	r3, [r7, #16]
+  uint32_t byteslefttocopy = 0;
+ 800c96a:	2300      	movs	r3, #0
+ 800c96c:	60fb      	str	r3, [r7, #12]
+  uint32_t payloadoffset = 0;
+ 800c96e:	2300      	movs	r3, #0
+ 800c970:	60bb      	str	r3, [r7, #8]
+  DmaTxDesc = heth.TxDesc;
+ 800c972:	4b45      	ldr	r3, [pc, #276]	; (800ca88 <low_level_output+0x138>)
+ 800c974:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800c976:	61bb      	str	r3, [r7, #24]
+  bufferoffset = 0;
+ 800c978:	2300      	movs	r3, #0
+ 800c97a:	613b      	str	r3, [r7, #16]
+
+  /* copy frame from pbufs to driver buffers */
+  for(q = p; q != NULL; q = q->next)
+ 800c97c:	683b      	ldr	r3, [r7, #0]
+ 800c97e:	623b      	str	r3, [r7, #32]
+ 800c980:	e05a      	b.n	800ca38 <low_level_output+0xe8>
+    {
+      /* Is this buffer available? If not, goto error */
+      if((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET)
+ 800c982:	69bb      	ldr	r3, [r7, #24]
+ 800c984:	681b      	ldr	r3, [r3, #0]
+ 800c986:	2b00      	cmp	r3, #0
+ 800c988:	da03      	bge.n	800c992 <low_level_output+0x42>
+      {
+        errval = ERR_USE;
+ 800c98a:	23f8      	movs	r3, #248	; 0xf8
+ 800c98c:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+        goto error;
+ 800c990:	e05c      	b.n	800ca4c <low_level_output+0xfc>
+      }
+
+      /* Get bytes in current lwIP buffer */
+      byteslefttocopy = q->len;
+ 800c992:	6a3b      	ldr	r3, [r7, #32]
+ 800c994:	895b      	ldrh	r3, [r3, #10]
+ 800c996:	60fb      	str	r3, [r7, #12]
+      payloadoffset = 0;
+ 800c998:	2300      	movs	r3, #0
+ 800c99a:	60bb      	str	r3, [r7, #8]
+
+      /* Check if the length of data to copy is bigger than Tx buffer size*/
+      while( (byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE )
+ 800c99c:	e02f      	b.n	800c9fe <low_level_output+0xae>
+      {
+        /* Copy data to Tx buffer*/
+        memcpy( (uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), (ETH_TX_BUF_SIZE - bufferoffset) );
+ 800c99e:	69fa      	ldr	r2, [r7, #28]
+ 800c9a0:	693b      	ldr	r3, [r7, #16]
+ 800c9a2:	18d0      	adds	r0, r2, r3
+ 800c9a4:	6a3b      	ldr	r3, [r7, #32]
+ 800c9a6:	685a      	ldr	r2, [r3, #4]
+ 800c9a8:	68bb      	ldr	r3, [r7, #8]
+ 800c9aa:	18d1      	adds	r1, r2, r3
+ 800c9ac:	693a      	ldr	r2, [r7, #16]
+ 800c9ae:	f240 53f4 	movw	r3, #1524	; 0x5f4
+ 800c9b2:	1a9b      	subs	r3, r3, r2
+ 800c9b4:	461a      	mov	r2, r3
+ 800c9b6:	f00f fcf2 	bl	801c39e <memcpy>
+
+        /* Point to next descriptor */
+        DmaTxDesc = (ETH_DMADescTypeDef *)(DmaTxDesc->Buffer2NextDescAddr);
+ 800c9ba:	69bb      	ldr	r3, [r7, #24]
+ 800c9bc:	68db      	ldr	r3, [r3, #12]
+ 800c9be:	61bb      	str	r3, [r7, #24]
+
+        /* Check if the buffer is available */
+        if((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET)
+ 800c9c0:	69bb      	ldr	r3, [r7, #24]
+ 800c9c2:	681b      	ldr	r3, [r3, #0]
+ 800c9c4:	2b00      	cmp	r3, #0
+ 800c9c6:	da03      	bge.n	800c9d0 <low_level_output+0x80>
+        {
+          errval = ERR_USE;
+ 800c9c8:	23f8      	movs	r3, #248	; 0xf8
+ 800c9ca:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+          goto error;
+ 800c9ce:	e03d      	b.n	800ca4c <low_level_output+0xfc>
+        }
+
+        buffer = (uint8_t *)(DmaTxDesc->Buffer1Addr);
+ 800c9d0:	69bb      	ldr	r3, [r7, #24]
+ 800c9d2:	689b      	ldr	r3, [r3, #8]
+ 800c9d4:	61fb      	str	r3, [r7, #28]
+
+        byteslefttocopy = byteslefttocopy - (ETH_TX_BUF_SIZE - bufferoffset);
+ 800c9d6:	693a      	ldr	r2, [r7, #16]
+ 800c9d8:	68fb      	ldr	r3, [r7, #12]
+ 800c9da:	4413      	add	r3, r2
+ 800c9dc:	f2a3 53f4 	subw	r3, r3, #1524	; 0x5f4
+ 800c9e0:	60fb      	str	r3, [r7, #12]
+        payloadoffset = payloadoffset + (ETH_TX_BUF_SIZE - bufferoffset);
+ 800c9e2:	68ba      	ldr	r2, [r7, #8]
+ 800c9e4:	693b      	ldr	r3, [r7, #16]
+ 800c9e6:	1ad3      	subs	r3, r2, r3
+ 800c9e8:	f203 53f4 	addw	r3, r3, #1524	; 0x5f4
+ 800c9ec:	60bb      	str	r3, [r7, #8]
+        framelength = framelength + (ETH_TX_BUF_SIZE - bufferoffset);
+ 800c9ee:	697a      	ldr	r2, [r7, #20]
+ 800c9f0:	693b      	ldr	r3, [r7, #16]
+ 800c9f2:	1ad3      	subs	r3, r2, r3
+ 800c9f4:	f203 53f4 	addw	r3, r3, #1524	; 0x5f4
+ 800c9f8:	617b      	str	r3, [r7, #20]
+        bufferoffset = 0;
+ 800c9fa:	2300      	movs	r3, #0
+ 800c9fc:	613b      	str	r3, [r7, #16]
+      while( (byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE )
+ 800c9fe:	68fa      	ldr	r2, [r7, #12]
+ 800ca00:	693b      	ldr	r3, [r7, #16]
+ 800ca02:	4413      	add	r3, r2
+ 800ca04:	f240 52f4 	movw	r2, #1524	; 0x5f4
+ 800ca08:	4293      	cmp	r3, r2
+ 800ca0a:	d8c8      	bhi.n	800c99e <low_level_output+0x4e>
+      }
+
+      /* Copy the remaining bytes */
+      memcpy( (uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), byteslefttocopy );
+ 800ca0c:	69fa      	ldr	r2, [r7, #28]
+ 800ca0e:	693b      	ldr	r3, [r7, #16]
+ 800ca10:	18d0      	adds	r0, r2, r3
+ 800ca12:	6a3b      	ldr	r3, [r7, #32]
+ 800ca14:	685a      	ldr	r2, [r3, #4]
+ 800ca16:	68bb      	ldr	r3, [r7, #8]
+ 800ca18:	4413      	add	r3, r2
+ 800ca1a:	68fa      	ldr	r2, [r7, #12]
+ 800ca1c:	4619      	mov	r1, r3
+ 800ca1e:	f00f fcbe 	bl	801c39e <memcpy>
+      bufferoffset = bufferoffset + byteslefttocopy;
+ 800ca22:	693a      	ldr	r2, [r7, #16]
+ 800ca24:	68fb      	ldr	r3, [r7, #12]
+ 800ca26:	4413      	add	r3, r2
+ 800ca28:	613b      	str	r3, [r7, #16]
+      framelength = framelength + byteslefttocopy;
+ 800ca2a:	697a      	ldr	r2, [r7, #20]
+ 800ca2c:	68fb      	ldr	r3, [r7, #12]
+ 800ca2e:	4413      	add	r3, r2
+ 800ca30:	617b      	str	r3, [r7, #20]
+  for(q = p; q != NULL; q = q->next)
+ 800ca32:	6a3b      	ldr	r3, [r7, #32]
+ 800ca34:	681b      	ldr	r3, [r3, #0]
+ 800ca36:	623b      	str	r3, [r7, #32]
+ 800ca38:	6a3b      	ldr	r3, [r7, #32]
+ 800ca3a:	2b00      	cmp	r3, #0
+ 800ca3c:	d1a1      	bne.n	800c982 <low_level_output+0x32>
+    }
+
+  /* Prepare transmit descriptors to give to DMA */
+  HAL_ETH_TransmitFrame(&heth, framelength);
+ 800ca3e:	6979      	ldr	r1, [r7, #20]
+ 800ca40:	4811      	ldr	r0, [pc, #68]	; (800ca88 <low_level_output+0x138>)
+ 800ca42:	f7f9 fddd 	bl	8006600 <HAL_ETH_TransmitFrame>
+
+  errval = ERR_OK;
+ 800ca46:	2300      	movs	r3, #0
+ 800ca48:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+
+error:
+
+  /* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
+  if ((heth.Instance->DMASR & ETH_DMASR_TUS) != (uint32_t)RESET)
+ 800ca4c:	4b0e      	ldr	r3, [pc, #56]	; (800ca88 <low_level_output+0x138>)
+ 800ca4e:	681a      	ldr	r2, [r3, #0]
+ 800ca50:	f241 0314 	movw	r3, #4116	; 0x1014
+ 800ca54:	4413      	add	r3, r2
+ 800ca56:	681b      	ldr	r3, [r3, #0]
+ 800ca58:	f003 0320 	and.w	r3, r3, #32
+ 800ca5c:	2b00      	cmp	r3, #0
+ 800ca5e:	d00d      	beq.n	800ca7c <low_level_output+0x12c>
+  {
+    /* Clear TUS ETHERNET DMA flag */
+    heth.Instance->DMASR = ETH_DMASR_TUS;
+ 800ca60:	4b09      	ldr	r3, [pc, #36]	; (800ca88 <low_level_output+0x138>)
+ 800ca62:	681a      	ldr	r2, [r3, #0]
+ 800ca64:	f241 0314 	movw	r3, #4116	; 0x1014
+ 800ca68:	4413      	add	r3, r2
+ 800ca6a:	2220      	movs	r2, #32
+ 800ca6c:	601a      	str	r2, [r3, #0]
+
+    /* Resume DMA transmission*/
+    heth.Instance->DMATPDR = 0;
+ 800ca6e:	4b06      	ldr	r3, [pc, #24]	; (800ca88 <low_level_output+0x138>)
+ 800ca70:	681a      	ldr	r2, [r3, #0]
+ 800ca72:	f241 0304 	movw	r3, #4100	; 0x1004
+ 800ca76:	4413      	add	r3, r2
+ 800ca78:	2200      	movs	r2, #0
+ 800ca7a:	601a      	str	r2, [r3, #0]
+  }
+  return errval;
+ 800ca7c:	f997 3027 	ldrsb.w	r3, [r7, #39]	; 0x27
+}
+ 800ca80:	4618      	mov	r0, r3
+ 800ca82:	3728      	adds	r7, #40	; 0x28
+ 800ca84:	46bd      	mov	sp, r7
+ 800ca86:	bd80      	pop	{r7, pc}
+ 800ca88:	2000a898 	.word	0x2000a898
+
+0800ca8c <low_level_input>:
+ * @param netif the lwip network interface structure for this ethernetif
+ * @return a pbuf filled with the received packet (including MAC header)
+ *         NULL on memory error
+   */
+static struct pbuf * low_level_input(struct netif *netif)
+{
+ 800ca8c:	b580      	push	{r7, lr}
+ 800ca8e:	b08c      	sub	sp, #48	; 0x30
+ 800ca90:	af00      	add	r7, sp, #0
+ 800ca92:	6078      	str	r0, [r7, #4]
+  struct pbuf *p = NULL;
+ 800ca94:	2300      	movs	r3, #0
+ 800ca96:	62fb      	str	r3, [r7, #44]	; 0x2c
+  struct pbuf *q = NULL;
+ 800ca98:	2300      	movs	r3, #0
+ 800ca9a:	62bb      	str	r3, [r7, #40]	; 0x28
+  uint16_t len = 0;
+ 800ca9c:	2300      	movs	r3, #0
+ 800ca9e:	81fb      	strh	r3, [r7, #14]
+  uint8_t *buffer;
+  __IO ETH_DMADescTypeDef *dmarxdesc;
+  uint32_t bufferoffset = 0;
+ 800caa0:	2300      	movs	r3, #0
+ 800caa2:	61fb      	str	r3, [r7, #28]
+  uint32_t payloadoffset = 0;
+ 800caa4:	2300      	movs	r3, #0
+ 800caa6:	61bb      	str	r3, [r7, #24]
+  uint32_t byteslefttocopy = 0;
+ 800caa8:	2300      	movs	r3, #0
+ 800caaa:	617b      	str	r3, [r7, #20]
+  uint32_t i=0;
+ 800caac:	2300      	movs	r3, #0
+ 800caae:	613b      	str	r3, [r7, #16]
+
+  /* get received frame */
+  if (HAL_ETH_GetReceivedFrame_IT(&heth) != HAL_OK)
+ 800cab0:	484f      	ldr	r0, [pc, #316]	; (800cbf0 <low_level_input+0x164>)
+ 800cab2:	f7f9 fe8f 	bl	80067d4 <HAL_ETH_GetReceivedFrame_IT>
+ 800cab6:	4603      	mov	r3, r0
+ 800cab8:	2b00      	cmp	r3, #0
+ 800caba:	d001      	beq.n	800cac0 <low_level_input+0x34>
+
+    return NULL;
+ 800cabc:	2300      	movs	r3, #0
+ 800cabe:	e092      	b.n	800cbe6 <low_level_input+0x15a>
+
+  /* Obtain the size of the packet and put it into the "len" variable. */
+  len = heth.RxFrameInfos.length;
+ 800cac0:	4b4b      	ldr	r3, [pc, #300]	; (800cbf0 <low_level_input+0x164>)
+ 800cac2:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 800cac4:	81fb      	strh	r3, [r7, #14]
+  buffer = (uint8_t *)heth.RxFrameInfos.buffer;
+ 800cac6:	4b4a      	ldr	r3, [pc, #296]	; (800cbf0 <low_level_input+0x164>)
+ 800cac8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800caca:	627b      	str	r3, [r7, #36]	; 0x24
+
+  if (len > 0)
+ 800cacc:	89fb      	ldrh	r3, [r7, #14]
+ 800cace:	2b00      	cmp	r3, #0
+ 800cad0:	d007      	beq.n	800cae2 <low_level_input+0x56>
+  {
+    /* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
+    p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
+ 800cad2:	89fb      	ldrh	r3, [r7, #14]
+ 800cad4:	f44f 72c1 	mov.w	r2, #386	; 0x182
+ 800cad8:	4619      	mov	r1, r3
+ 800cada:	2000      	movs	r0, #0
+ 800cadc:	f004 fc7c 	bl	80113d8 <pbuf_alloc>
+ 800cae0:	62f8      	str	r0, [r7, #44]	; 0x2c
+  }
+
+  if (p != NULL)
+ 800cae2:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800cae4:	2b00      	cmp	r3, #0
+ 800cae6:	d04b      	beq.n	800cb80 <low_level_input+0xf4>
+  {
+    dmarxdesc = heth.RxFrameInfos.FSRxDesc;
+ 800cae8:	4b41      	ldr	r3, [pc, #260]	; (800cbf0 <low_level_input+0x164>)
+ 800caea:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800caec:	623b      	str	r3, [r7, #32]
+    bufferoffset = 0;
+ 800caee:	2300      	movs	r3, #0
+ 800caf0:	61fb      	str	r3, [r7, #28]
+    for(q = p; q != NULL; q = q->next)
+ 800caf2:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800caf4:	62bb      	str	r3, [r7, #40]	; 0x28
+ 800caf6:	e040      	b.n	800cb7a <low_level_input+0xee>
+    {
+      byteslefttocopy = q->len;
+ 800caf8:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800cafa:	895b      	ldrh	r3, [r3, #10]
+ 800cafc:	617b      	str	r3, [r7, #20]
+      payloadoffset = 0;
+ 800cafe:	2300      	movs	r3, #0
+ 800cb00:	61bb      	str	r3, [r7, #24]
+
+      /* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size*/
+      while( (byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE )
+ 800cb02:	e021      	b.n	800cb48 <low_level_input+0xbc>
+      {
+        /* Copy data to pbuf */
+        memcpy( (uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset));
+ 800cb04:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800cb06:	685a      	ldr	r2, [r3, #4]
+ 800cb08:	69bb      	ldr	r3, [r7, #24]
+ 800cb0a:	18d0      	adds	r0, r2, r3
+ 800cb0c:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 800cb0e:	69fb      	ldr	r3, [r7, #28]
+ 800cb10:	18d1      	adds	r1, r2, r3
+ 800cb12:	69fa      	ldr	r2, [r7, #28]
+ 800cb14:	f240 53f4 	movw	r3, #1524	; 0x5f4
+ 800cb18:	1a9b      	subs	r3, r3, r2
+ 800cb1a:	461a      	mov	r2, r3
+ 800cb1c:	f00f fc3f 	bl	801c39e <memcpy>
+
+        /* Point to next descriptor */
+        dmarxdesc = (ETH_DMADescTypeDef *)(dmarxdesc->Buffer2NextDescAddr);
+ 800cb20:	6a3b      	ldr	r3, [r7, #32]
+ 800cb22:	68db      	ldr	r3, [r3, #12]
+ 800cb24:	623b      	str	r3, [r7, #32]
+        buffer = (uint8_t *)(dmarxdesc->Buffer1Addr);
+ 800cb26:	6a3b      	ldr	r3, [r7, #32]
+ 800cb28:	689b      	ldr	r3, [r3, #8]
+ 800cb2a:	627b      	str	r3, [r7, #36]	; 0x24
+
+        byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset);
+ 800cb2c:	69fa      	ldr	r2, [r7, #28]
+ 800cb2e:	697b      	ldr	r3, [r7, #20]
+ 800cb30:	4413      	add	r3, r2
+ 800cb32:	f2a3 53f4 	subw	r3, r3, #1524	; 0x5f4
+ 800cb36:	617b      	str	r3, [r7, #20]
+        payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset);
+ 800cb38:	69ba      	ldr	r2, [r7, #24]
+ 800cb3a:	69fb      	ldr	r3, [r7, #28]
+ 800cb3c:	1ad3      	subs	r3, r2, r3
+ 800cb3e:	f203 53f4 	addw	r3, r3, #1524	; 0x5f4
+ 800cb42:	61bb      	str	r3, [r7, #24]
+        bufferoffset = 0;
+ 800cb44:	2300      	movs	r3, #0
+ 800cb46:	61fb      	str	r3, [r7, #28]
+      while( (byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE )
+ 800cb48:	697a      	ldr	r2, [r7, #20]
+ 800cb4a:	69fb      	ldr	r3, [r7, #28]
+ 800cb4c:	4413      	add	r3, r2
+ 800cb4e:	f240 52f4 	movw	r2, #1524	; 0x5f4
+ 800cb52:	4293      	cmp	r3, r2
+ 800cb54:	d8d6      	bhi.n	800cb04 <low_level_input+0x78>
+      }
+      /* Copy remaining data in pbuf */
+      memcpy( (uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), byteslefttocopy);
+ 800cb56:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800cb58:	685a      	ldr	r2, [r3, #4]
+ 800cb5a:	69bb      	ldr	r3, [r7, #24]
+ 800cb5c:	18d0      	adds	r0, r2, r3
+ 800cb5e:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 800cb60:	69fb      	ldr	r3, [r7, #28]
+ 800cb62:	4413      	add	r3, r2
+ 800cb64:	697a      	ldr	r2, [r7, #20]
+ 800cb66:	4619      	mov	r1, r3
+ 800cb68:	f00f fc19 	bl	801c39e <memcpy>
+      bufferoffset = bufferoffset + byteslefttocopy;
+ 800cb6c:	69fa      	ldr	r2, [r7, #28]
+ 800cb6e:	697b      	ldr	r3, [r7, #20]
+ 800cb70:	4413      	add	r3, r2
+ 800cb72:	61fb      	str	r3, [r7, #28]
+    for(q = p; q != NULL; q = q->next)
+ 800cb74:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800cb76:	681b      	ldr	r3, [r3, #0]
+ 800cb78:	62bb      	str	r3, [r7, #40]	; 0x28
+ 800cb7a:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800cb7c:	2b00      	cmp	r3, #0
+ 800cb7e:	d1bb      	bne.n	800caf8 <low_level_input+0x6c>
+    }
+  }
+
+    /* Release descriptors to DMA */
+    /* Point to first descriptor */
+    dmarxdesc = heth.RxFrameInfos.FSRxDesc;
+ 800cb80:	4b1b      	ldr	r3, [pc, #108]	; (800cbf0 <low_level_input+0x164>)
+ 800cb82:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800cb84:	623b      	str	r3, [r7, #32]
+    /* Set Own bit in Rx descriptors: gives the buffers back to DMA */
+    for (i=0; i< heth.RxFrameInfos.SegCount; i++)
+ 800cb86:	2300      	movs	r3, #0
+ 800cb88:	613b      	str	r3, [r7, #16]
+ 800cb8a:	e00b      	b.n	800cba4 <low_level_input+0x118>
+    {
+      dmarxdesc->Status |= ETH_DMARXDESC_OWN;
+ 800cb8c:	6a3b      	ldr	r3, [r7, #32]
+ 800cb8e:	681b      	ldr	r3, [r3, #0]
+ 800cb90:	f043 4200 	orr.w	r2, r3, #2147483648	; 0x80000000
+ 800cb94:	6a3b      	ldr	r3, [r7, #32]
+ 800cb96:	601a      	str	r2, [r3, #0]
+      dmarxdesc = (ETH_DMADescTypeDef *)(dmarxdesc->Buffer2NextDescAddr);
+ 800cb98:	6a3b      	ldr	r3, [r7, #32]
+ 800cb9a:	68db      	ldr	r3, [r3, #12]
+ 800cb9c:	623b      	str	r3, [r7, #32]
+    for (i=0; i< heth.RxFrameInfos.SegCount; i++)
+ 800cb9e:	693b      	ldr	r3, [r7, #16]
+ 800cba0:	3301      	adds	r3, #1
+ 800cba2:	613b      	str	r3, [r7, #16]
+ 800cba4:	4b12      	ldr	r3, [pc, #72]	; (800cbf0 <low_level_input+0x164>)
+ 800cba6:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800cba8:	693a      	ldr	r2, [r7, #16]
+ 800cbaa:	429a      	cmp	r2, r3
+ 800cbac:	d3ee      	bcc.n	800cb8c <low_level_input+0x100>
+    }
+
+    /* Clear Segment_Count */
+    heth.RxFrameInfos.SegCount =0;
+ 800cbae:	4b10      	ldr	r3, [pc, #64]	; (800cbf0 <low_level_input+0x164>)
+ 800cbb0:	2200      	movs	r2, #0
+ 800cbb2:	639a      	str	r2, [r3, #56]	; 0x38
+
+  /* When Rx Buffer unavailable flag is set: clear it and resume reception */
+  if ((heth.Instance->DMASR & ETH_DMASR_RBUS) != (uint32_t)RESET)
+ 800cbb4:	4b0e      	ldr	r3, [pc, #56]	; (800cbf0 <low_level_input+0x164>)
+ 800cbb6:	681a      	ldr	r2, [r3, #0]
+ 800cbb8:	f241 0314 	movw	r3, #4116	; 0x1014
+ 800cbbc:	4413      	add	r3, r2
+ 800cbbe:	681b      	ldr	r3, [r3, #0]
+ 800cbc0:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 800cbc4:	2b00      	cmp	r3, #0
+ 800cbc6:	d00d      	beq.n	800cbe4 <low_level_input+0x158>
+  {
+    /* Clear RBUS ETHERNET DMA flag */
+    heth.Instance->DMASR = ETH_DMASR_RBUS;
+ 800cbc8:	4b09      	ldr	r3, [pc, #36]	; (800cbf0 <low_level_input+0x164>)
+ 800cbca:	681a      	ldr	r2, [r3, #0]
+ 800cbcc:	f241 0314 	movw	r3, #4116	; 0x1014
+ 800cbd0:	4413      	add	r3, r2
+ 800cbd2:	2280      	movs	r2, #128	; 0x80
+ 800cbd4:	601a      	str	r2, [r3, #0]
+    /* Resume DMA reception */
+    heth.Instance->DMARPDR = 0;
+ 800cbd6:	4b06      	ldr	r3, [pc, #24]	; (800cbf0 <low_level_input+0x164>)
+ 800cbd8:	681a      	ldr	r2, [r3, #0]
+ 800cbda:	f241 0308 	movw	r3, #4104	; 0x1008
+ 800cbde:	4413      	add	r3, r2
+ 800cbe0:	2200      	movs	r2, #0
+ 800cbe2:	601a      	str	r2, [r3, #0]
+  }
+  return p;
+ 800cbe4:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+}
+ 800cbe6:	4618      	mov	r0, r3
+ 800cbe8:	3730      	adds	r7, #48	; 0x30
+ 800cbea:	46bd      	mov	sp, r7
+ 800cbec:	bd80      	pop	{r7, pc}
+ 800cbee:	bf00      	nop
+ 800cbf0:	2000a898 	.word	0x2000a898
+
+0800cbf4 <ethernetif_input>:
+ * the appropriate input function is called.
+ *
+ * @param netif the lwip network interface structure for this ethernetif
+ */
+void ethernetif_input(void const * argument)
+{
+ 800cbf4:	b580      	push	{r7, lr}
+ 800cbf6:	b084      	sub	sp, #16
+ 800cbf8:	af00      	add	r7, sp, #0
+ 800cbfa:	6078      	str	r0, [r7, #4]
+  struct pbuf *p;
+  struct netif *netif = (struct netif *) argument;
+ 800cbfc:	687b      	ldr	r3, [r7, #4]
+ 800cbfe:	60fb      	str	r3, [r7, #12]
+
+  for( ;; )
+  {
+    if (osSemaphoreWait(s_xSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
+ 800cc00:	4b12      	ldr	r3, [pc, #72]	; (800cc4c <ethernetif_input+0x58>)
+ 800cc02:	681b      	ldr	r3, [r3, #0]
+ 800cc04:	f04f 31ff 	mov.w	r1, #4294967295
+ 800cc08:	4618      	mov	r0, r3
+ 800cc0a:	f000 fa99 	bl	800d140 <osSemaphoreWait>
+ 800cc0e:	4603      	mov	r3, r0
+ 800cc10:	2b00      	cmp	r3, #0
+ 800cc12:	d1f5      	bne.n	800cc00 <ethernetif_input+0xc>
+    {
+      do
+      {
+        LOCK_TCPIP_CORE();
+ 800cc14:	480e      	ldr	r0, [pc, #56]	; (800cc50 <ethernetif_input+0x5c>)
+ 800cc16:	f00f fb2f 	bl	801c278 <sys_mutex_lock>
+        p = low_level_input( netif );
+ 800cc1a:	68f8      	ldr	r0, [r7, #12]
+ 800cc1c:	f7ff ff36 	bl	800ca8c <low_level_input>
+ 800cc20:	60b8      	str	r0, [r7, #8]
+        if   (p != NULL)
+ 800cc22:	68bb      	ldr	r3, [r7, #8]
+ 800cc24:	2b00      	cmp	r3, #0
+ 800cc26:	d00a      	beq.n	800cc3e <ethernetif_input+0x4a>
+        {
+          if (netif->input( p, netif) != ERR_OK )
+ 800cc28:	68fb      	ldr	r3, [r7, #12]
+ 800cc2a:	691b      	ldr	r3, [r3, #16]
+ 800cc2c:	68f9      	ldr	r1, [r7, #12]
+ 800cc2e:	68b8      	ldr	r0, [r7, #8]
+ 800cc30:	4798      	blx	r3
+ 800cc32:	4603      	mov	r3, r0
+ 800cc34:	2b00      	cmp	r3, #0
+ 800cc36:	d002      	beq.n	800cc3e <ethernetif_input+0x4a>
+          {
+            pbuf_free(p);
+ 800cc38:	68b8      	ldr	r0, [r7, #8]
+ 800cc3a:	f004 fead 	bl	8011998 <pbuf_free>
+          }
+        }
+        UNLOCK_TCPIP_CORE();
+ 800cc3e:	4804      	ldr	r0, [pc, #16]	; (800cc50 <ethernetif_input+0x5c>)
+ 800cc40:	f00f fb29 	bl	801c296 <sys_mutex_unlock>
+      } while(p!=NULL);
+ 800cc44:	68bb      	ldr	r3, [r7, #8]
+ 800cc46:	2b00      	cmp	r3, #0
+ 800cc48:	d1e4      	bne.n	800cc14 <ethernetif_input+0x20>
+    if (osSemaphoreWait(s_xSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
+ 800cc4a:	e7d9      	b.n	800cc00 <ethernetif_input+0xc>
+ 800cc4c:	20000574 	.word	0x20000574
+ 800cc50:	2000c0b0 	.word	0x2000c0b0
+
+0800cc54 <ethernetif_init>:
+ * @return ERR_OK if the loopif is initialized
+ *         ERR_MEM if private data couldn't be allocated
+ *         any other err_t on error
+ */
+err_t ethernetif_init(struct netif *netif)
+{
+ 800cc54:	b580      	push	{r7, lr}
+ 800cc56:	b082      	sub	sp, #8
+ 800cc58:	af00      	add	r7, sp, #0
+ 800cc5a:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT("netif != NULL", (netif != NULL));
+ 800cc5c:	687b      	ldr	r3, [r7, #4]
+ 800cc5e:	2b00      	cmp	r3, #0
+ 800cc60:	d106      	bne.n	800cc70 <ethernetif_init+0x1c>
+ 800cc62:	4b0e      	ldr	r3, [pc, #56]	; (800cc9c <ethernetif_init+0x48>)
+ 800cc64:	f240 222b 	movw	r2, #555	; 0x22b
+ 800cc68:	490d      	ldr	r1, [pc, #52]	; (800cca0 <ethernetif_init+0x4c>)
+ 800cc6a:	480e      	ldr	r0, [pc, #56]	; (800cca4 <ethernetif_init+0x50>)
+ 800cc6c:	f00f fbc4 	bl	801c3f8 <iprintf>
+#if LWIP_NETIF_HOSTNAME
+  /* Initialize interface hostname */
+  netif->hostname = "lwip";
+#endif /* LWIP_NETIF_HOSTNAME */
+
+  netif->name[0] = IFNAME0;
+ 800cc70:	687b      	ldr	r3, [r7, #4]
+ 800cc72:	2273      	movs	r2, #115	; 0x73
+ 800cc74:	f883 2032 	strb.w	r2, [r3, #50]	; 0x32
+  netif->name[1] = IFNAME1;
+ 800cc78:	687b      	ldr	r3, [r7, #4]
+ 800cc7a:	2274      	movs	r2, #116	; 0x74
+ 800cc7c:	f883 2033 	strb.w	r2, [r3, #51]	; 0x33
+   * is available...) */
+
+#if LWIP_IPV4
+#if LWIP_ARP || LWIP_ETHERNET
+#if LWIP_ARP
+  netif->output = etharp_output;
+ 800cc80:	687b      	ldr	r3, [r7, #4]
+ 800cc82:	4a09      	ldr	r2, [pc, #36]	; (800cca8 <ethernetif_init+0x54>)
+ 800cc84:	615a      	str	r2, [r3, #20]
+
+#if LWIP_IPV6
+  netif->output_ip6 = ethip6_output;
+#endif /* LWIP_IPV6 */
+
+  netif->linkoutput = low_level_output;
+ 800cc86:	687b      	ldr	r3, [r7, #4]
+ 800cc88:	4a08      	ldr	r2, [pc, #32]	; (800ccac <ethernetif_init+0x58>)
+ 800cc8a:	619a      	str	r2, [r3, #24]
+
+  /* initialize the hardware */
+  low_level_init(netif);
+ 800cc8c:	6878      	ldr	r0, [r7, #4]
+ 800cc8e:	f7ff fd87 	bl	800c7a0 <low_level_init>
+
+  return ERR_OK;
+ 800cc92:	2300      	movs	r3, #0
+}
+ 800cc94:	4618      	mov	r0, r3
+ 800cc96:	3708      	adds	r7, #8
+ 800cc98:	46bd      	mov	sp, r7
+ 800cc9a:	bd80      	pop	{r7, pc}
+ 800cc9c:	0801d6a8 	.word	0x0801d6a8
+ 800cca0:	0801d6c4 	.word	0x0801d6c4
+ 800cca4:	0801d6d4 	.word	0x0801d6d4
+ 800cca8:	0801a3f5 	.word	0x0801a3f5
+ 800ccac:	0800c951 	.word	0x0800c951
+
+0800ccb0 <sys_now>:
+*         when LWIP_TIMERS == 1 and NO_SYS == 1
+* @param  None
+* @retval Time
+*/
+u32_t sys_now(void)
+{
+ 800ccb0:	b580      	push	{r7, lr}
+ 800ccb2:	af00      	add	r7, sp, #0
+  return HAL_GetTick();
+ 800ccb4:	f7f7 ff48 	bl	8004b48 <HAL_GetTick>
+ 800ccb8:	4603      	mov	r3, r0
+}
+ 800ccba:	4618      	mov	r0, r3
+ 800ccbc:	bd80      	pop	{r7, pc}
+	...
+
+0800ccc0 <ethernetif_set_link>:
+  * @param  netif: the network interface
+  * @retval None
+  */
+void ethernetif_set_link(void const *argument)
+
+{
+ 800ccc0:	b580      	push	{r7, lr}
+ 800ccc2:	b084      	sub	sp, #16
+ 800ccc4:	af00      	add	r7, sp, #0
+ 800ccc6:	6078      	str	r0, [r7, #4]
+  uint32_t regvalue = 0;
+ 800ccc8:	2300      	movs	r3, #0
+ 800ccca:	60bb      	str	r3, [r7, #8]
+  struct link_str *link_arg = (struct link_str *)argument;
+ 800cccc:	687b      	ldr	r3, [r7, #4]
+ 800ccce:	60fb      	str	r3, [r7, #12]
+
+  for(;;)
+  {
+    /* Read PHY_BSR*/
+    HAL_ETH_ReadPHYRegister(&heth, PHY_BSR, &regvalue);
+ 800ccd0:	f107 0308 	add.w	r3, r7, #8
+ 800ccd4:	461a      	mov	r2, r3
+ 800ccd6:	2101      	movs	r1, #1
+ 800ccd8:	4816      	ldr	r0, [pc, #88]	; (800cd34 <ethernetif_set_link+0x74>)
+ 800ccda:	f7f9 fe7e 	bl	80069da <HAL_ETH_ReadPHYRegister>
+
+    regvalue &= PHY_LINKED_STATUS;
+ 800ccde:	68bb      	ldr	r3, [r7, #8]
+ 800cce0:	f003 0304 	and.w	r3, r3, #4
+ 800cce4:	60bb      	str	r3, [r7, #8]
+
+    /* Check whether the netif link down and the PHY link is up */
+    if(!netif_is_link_up(link_arg->netif) && (regvalue))
+ 800cce6:	68fb      	ldr	r3, [r7, #12]
+ 800cce8:	681b      	ldr	r3, [r3, #0]
+ 800ccea:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 800ccee:	f003 0304 	and.w	r3, r3, #4
+ 800ccf2:	2b00      	cmp	r3, #0
+ 800ccf4:	d108      	bne.n	800cd08 <ethernetif_set_link+0x48>
+ 800ccf6:	68bb      	ldr	r3, [r7, #8]
+ 800ccf8:	2b00      	cmp	r3, #0
+ 800ccfa:	d005      	beq.n	800cd08 <ethernetif_set_link+0x48>
+    {
+      /* network cable is connected */
+      netif_set_link_up(link_arg->netif);
+ 800ccfc:	68fb      	ldr	r3, [r7, #12]
+ 800ccfe:	681b      	ldr	r3, [r3, #0]
+ 800cd00:	4618      	mov	r0, r3
+ 800cd02:	f004 fa37 	bl	8011174 <netif_set_link_up>
+ 800cd06:	e011      	b.n	800cd2c <ethernetif_set_link+0x6c>
+    }
+    else if(netif_is_link_up(link_arg->netif) && (!regvalue))
+ 800cd08:	68fb      	ldr	r3, [r7, #12]
+ 800cd0a:	681b      	ldr	r3, [r3, #0]
+ 800cd0c:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 800cd10:	089b      	lsrs	r3, r3, #2
+ 800cd12:	f003 0301 	and.w	r3, r3, #1
+ 800cd16:	b2db      	uxtb	r3, r3
+ 800cd18:	2b00      	cmp	r3, #0
+ 800cd1a:	d007      	beq.n	800cd2c <ethernetif_set_link+0x6c>
+ 800cd1c:	68bb      	ldr	r3, [r7, #8]
+ 800cd1e:	2b00      	cmp	r3, #0
+ 800cd20:	d104      	bne.n	800cd2c <ethernetif_set_link+0x6c>
+    {
+      /* network cable is dis-connected */
+      netif_set_link_down(link_arg->netif);
+ 800cd22:	68fb      	ldr	r3, [r7, #12]
+ 800cd24:	681b      	ldr	r3, [r3, #0]
+ 800cd26:	4618      	mov	r0, r3
+ 800cd28:	f004 fa5c 	bl	80111e4 <netif_set_link_down>
+    }
+
+    /* Suspend thread for 200 ms */
+    osDelay(200);
+ 800cd2c:	20c8      	movs	r0, #200	; 0xc8
+ 800cd2e:	f000 f916 	bl	800cf5e <osDelay>
+    HAL_ETH_ReadPHYRegister(&heth, PHY_BSR, &regvalue);
+ 800cd32:	e7cd      	b.n	800ccd0 <ethernetif_set_link+0x10>
+ 800cd34:	2000a898 	.word	0x2000a898
+
+0800cd38 <ethernetif_update_config>:
+  *         to update low level driver configuration.
+* @param  netif: The network interface
+  * @retval None
+  */
+void ethernetif_update_config(struct netif *netif)
+{
+ 800cd38:	b580      	push	{r7, lr}
+ 800cd3a:	b084      	sub	sp, #16
+ 800cd3c:	af00      	add	r7, sp, #0
+ 800cd3e:	6078      	str	r0, [r7, #4]
+  __IO uint32_t tickstart = 0;
+ 800cd40:	2300      	movs	r3, #0
+ 800cd42:	60fb      	str	r3, [r7, #12]
+  uint32_t regvalue = 0;
+ 800cd44:	2300      	movs	r3, #0
+ 800cd46:	60bb      	str	r3, [r7, #8]
+
+  if(netif_is_link_up(netif))
+ 800cd48:	687b      	ldr	r3, [r7, #4]
+ 800cd4a:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 800cd4e:	089b      	lsrs	r3, r3, #2
+ 800cd50:	f003 0301 	and.w	r3, r3, #1
+ 800cd54:	b2db      	uxtb	r3, r3
+ 800cd56:	2b00      	cmp	r3, #0
+ 800cd58:	d05d      	beq.n	800ce16 <ethernetif_update_config+0xde>
+  {
+    /* Restart the auto-negotiation */
+    if(heth.Init.AutoNegotiation != ETH_AUTONEGOTIATION_DISABLE)
+ 800cd5a:	4b34      	ldr	r3, [pc, #208]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800cd5c:	685b      	ldr	r3, [r3, #4]
+ 800cd5e:	2b00      	cmp	r3, #0
+ 800cd60:	d03f      	beq.n	800cde2 <ethernetif_update_config+0xaa>
+    {
+      /* Enable Auto-Negotiation */
+      HAL_ETH_WritePHYRegister(&heth, PHY_BCR, PHY_AUTONEGOTIATION);
+ 800cd62:	f44f 5280 	mov.w	r2, #4096	; 0x1000
+ 800cd66:	2100      	movs	r1, #0
+ 800cd68:	4830      	ldr	r0, [pc, #192]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800cd6a:	f7f9 fe9e 	bl	8006aaa <HAL_ETH_WritePHYRegister>
+
+      /* Get tick */
+      tickstart = HAL_GetTick();
+ 800cd6e:	f7f7 feeb 	bl	8004b48 <HAL_GetTick>
+ 800cd72:	4603      	mov	r3, r0
+ 800cd74:	60fb      	str	r3, [r7, #12]
+
+      /* Wait until the auto-negotiation will be completed */
+      do
+      {
+        HAL_ETH_ReadPHYRegister(&heth, PHY_BSR, &regvalue);
+ 800cd76:	f107 0308 	add.w	r3, r7, #8
+ 800cd7a:	461a      	mov	r2, r3
+ 800cd7c:	2101      	movs	r1, #1
+ 800cd7e:	482b      	ldr	r0, [pc, #172]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800cd80:	f7f9 fe2b 	bl	80069da <HAL_ETH_ReadPHYRegister>
+
+        /* Check for the Timeout ( 1s ) */
+        if((HAL_GetTick() - tickstart ) > 1000)
+ 800cd84:	f7f7 fee0 	bl	8004b48 <HAL_GetTick>
+ 800cd88:	4602      	mov	r2, r0
+ 800cd8a:	68fb      	ldr	r3, [r7, #12]
+ 800cd8c:	1ad3      	subs	r3, r2, r3
+ 800cd8e:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
+ 800cd92:	d828      	bhi.n	800cde6 <ethernetif_update_config+0xae>
+        {
+          /* In case of timeout */
+          goto error;
+        }
+      } while (((regvalue & PHY_AUTONEGO_COMPLETE) != PHY_AUTONEGO_COMPLETE));
+ 800cd94:	68bb      	ldr	r3, [r7, #8]
+ 800cd96:	f003 0320 	and.w	r3, r3, #32
+ 800cd9a:	2b00      	cmp	r3, #0
+ 800cd9c:	d0eb      	beq.n	800cd76 <ethernetif_update_config+0x3e>
+
+      /* Read the result of the auto-negotiation */
+      HAL_ETH_ReadPHYRegister(&heth, PHY_SR, &regvalue);
+ 800cd9e:	f107 0308 	add.w	r3, r7, #8
+ 800cda2:	461a      	mov	r2, r3
+ 800cda4:	211f      	movs	r1, #31
+ 800cda6:	4821      	ldr	r0, [pc, #132]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800cda8:	f7f9 fe17 	bl	80069da <HAL_ETH_ReadPHYRegister>
+
+      /* Configure the MAC with the Duplex Mode fixed by the auto-negotiation process */
+      if((regvalue & PHY_DUPLEX_STATUS) != (uint32_t)RESET)
+ 800cdac:	68bb      	ldr	r3, [r7, #8]
+ 800cdae:	f003 0310 	and.w	r3, r3, #16
+ 800cdb2:	2b00      	cmp	r3, #0
+ 800cdb4:	d004      	beq.n	800cdc0 <ethernetif_update_config+0x88>
+      {
+        /* Set Ethernet duplex mode to Full-duplex following the auto-negotiation */
+        heth.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
+ 800cdb6:	4b1d      	ldr	r3, [pc, #116]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800cdb8:	f44f 6200 	mov.w	r2, #2048	; 0x800
+ 800cdbc:	60da      	str	r2, [r3, #12]
+ 800cdbe:	e002      	b.n	800cdc6 <ethernetif_update_config+0x8e>
+      }
+      else
+      {
+        /* Set Ethernet duplex mode to Half-duplex following the auto-negotiation */
+        heth.Init.DuplexMode = ETH_MODE_HALFDUPLEX;
+ 800cdc0:	4b1a      	ldr	r3, [pc, #104]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800cdc2:	2200      	movs	r2, #0
+ 800cdc4:	60da      	str	r2, [r3, #12]
+      }
+      /* Configure the MAC with the speed fixed by the auto-negotiation process */
+      if(regvalue & PHY_SPEED_STATUS)
+ 800cdc6:	68bb      	ldr	r3, [r7, #8]
+ 800cdc8:	f003 0304 	and.w	r3, r3, #4
+ 800cdcc:	2b00      	cmp	r3, #0
+ 800cdce:	d003      	beq.n	800cdd8 <ethernetif_update_config+0xa0>
+      {
+        /* Set Ethernet speed to 10M following the auto-negotiation */
+        heth.Init.Speed = ETH_SPEED_10M;
+ 800cdd0:	4b16      	ldr	r3, [pc, #88]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800cdd2:	2200      	movs	r2, #0
+ 800cdd4:	609a      	str	r2, [r3, #8]
+ 800cdd6:	e016      	b.n	800ce06 <ethernetif_update_config+0xce>
+      }
+      else
+      {
+        /* Set Ethernet speed to 100M following the auto-negotiation */
+        heth.Init.Speed = ETH_SPEED_100M;
+ 800cdd8:	4b14      	ldr	r3, [pc, #80]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800cdda:	f44f 4280 	mov.w	r2, #16384	; 0x4000
+ 800cdde:	609a      	str	r2, [r3, #8]
+ 800cde0:	e011      	b.n	800ce06 <ethernetif_update_config+0xce>
+      }
+    }
+    else /* AutoNegotiation Disable */
+    {
+    error :
+ 800cde2:	bf00      	nop
+ 800cde4:	e000      	b.n	800cde8 <ethernetif_update_config+0xb0>
+          goto error;
+ 800cde6:	bf00      	nop
+      /* Check parameters */
+      assert_param(IS_ETH_SPEED(heth.Init.Speed));
+      assert_param(IS_ETH_DUPLEX_MODE(heth.Init.DuplexMode));
+
+      /* Set MAC Speed and Duplex Mode to PHY */
+      HAL_ETH_WritePHYRegister(&heth, PHY_BCR, ((uint16_t)(heth.Init.DuplexMode >> 3) |
+ 800cde8:	4b10      	ldr	r3, [pc, #64]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800cdea:	68db      	ldr	r3, [r3, #12]
+ 800cdec:	08db      	lsrs	r3, r3, #3
+ 800cdee:	b29a      	uxth	r2, r3
+                                                     (uint16_t)(heth.Init.Speed >> 1)));
+ 800cdf0:	4b0e      	ldr	r3, [pc, #56]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800cdf2:	689b      	ldr	r3, [r3, #8]
+ 800cdf4:	085b      	lsrs	r3, r3, #1
+ 800cdf6:	b29b      	uxth	r3, r3
+      HAL_ETH_WritePHYRegister(&heth, PHY_BCR, ((uint16_t)(heth.Init.DuplexMode >> 3) |
+ 800cdf8:	4313      	orrs	r3, r2
+ 800cdfa:	b29b      	uxth	r3, r3
+ 800cdfc:	461a      	mov	r2, r3
+ 800cdfe:	2100      	movs	r1, #0
+ 800ce00:	480a      	ldr	r0, [pc, #40]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800ce02:	f7f9 fe52 	bl	8006aaa <HAL_ETH_WritePHYRegister>
+    }
+
+    /* ETHERNET MAC Re-Configuration */
+    HAL_ETH_ConfigMAC(&heth, (ETH_MACInitTypeDef *) NULL);
+ 800ce06:	2100      	movs	r1, #0
+ 800ce08:	4808      	ldr	r0, [pc, #32]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800ce0a:	f7f9 ff13 	bl	8006c34 <HAL_ETH_ConfigMAC>
+
+    /* Restart MAC interface */
+    HAL_ETH_Start(&heth);
+ 800ce0e:	4807      	ldr	r0, [pc, #28]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800ce10:	f7f9 feb1 	bl	8006b76 <HAL_ETH_Start>
+ 800ce14:	e002      	b.n	800ce1c <ethernetif_update_config+0xe4>
+  }
+  else
+  {
+    /* Stop MAC interface */
+    HAL_ETH_Stop(&heth);
+ 800ce16:	4805      	ldr	r0, [pc, #20]	; (800ce2c <ethernetif_update_config+0xf4>)
+ 800ce18:	f7f9 fedc 	bl	8006bd4 <HAL_ETH_Stop>
+  }
+
+  ethernetif_notify_conn_changed(netif);
+ 800ce1c:	6878      	ldr	r0, [r7, #4]
+ 800ce1e:	f000 f807 	bl	800ce30 <ethernetif_notify_conn_changed>
+}
+ 800ce22:	bf00      	nop
+ 800ce24:	3710      	adds	r7, #16
+ 800ce26:	46bd      	mov	sp, r7
+ 800ce28:	bd80      	pop	{r7, pc}
+ 800ce2a:	bf00      	nop
+ 800ce2c:	2000a898 	.word	0x2000a898
+
+0800ce30 <ethernetif_notify_conn_changed>:
+  * @brief  This function notify user about link status changement.
+  * @param  netif: the network interface
+  * @retval None
+  */
+__weak void ethernetif_notify_conn_changed(struct netif *netif)
+{
+ 800ce30:	b480      	push	{r7}
+ 800ce32:	b083      	sub	sp, #12
+ 800ce34:	af00      	add	r7, sp, #0
+ 800ce36:	6078      	str	r0, [r7, #4]
+  /* NOTE : This is function could be implemented in user file
+            when the callback is needed,
+  */
+
+}
+ 800ce38:	bf00      	nop
+ 800ce3a:	370c      	adds	r7, #12
+ 800ce3c:	46bd      	mov	sp, r7
+ 800ce3e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800ce42:	4770      	bx	lr
+
+0800ce44 <makeFreeRtosPriority>:
+
+extern void xPortSysTickHandler(void);
+
+/* Convert from CMSIS type osPriority to FreeRTOS priority number */
+static unsigned portBASE_TYPE makeFreeRtosPriority (osPriority priority)
+{
+ 800ce44:	b480      	push	{r7}
+ 800ce46:	b085      	sub	sp, #20
+ 800ce48:	af00      	add	r7, sp, #0
+ 800ce4a:	4603      	mov	r3, r0
+ 800ce4c:	80fb      	strh	r3, [r7, #6]
+  unsigned portBASE_TYPE fpriority = tskIDLE_PRIORITY;
+ 800ce4e:	2300      	movs	r3, #0
+ 800ce50:	60fb      	str	r3, [r7, #12]
+  
+  if (priority != osPriorityError) {
+ 800ce52:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
+ 800ce56:	2b84      	cmp	r3, #132	; 0x84
+ 800ce58:	d005      	beq.n	800ce66 <makeFreeRtosPriority+0x22>
+    fpriority += (priority - osPriorityIdle);
+ 800ce5a:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
+ 800ce5e:	68fb      	ldr	r3, [r7, #12]
+ 800ce60:	4413      	add	r3, r2
+ 800ce62:	3303      	adds	r3, #3
+ 800ce64:	60fb      	str	r3, [r7, #12]
+  }
+  
+  return fpriority;
+ 800ce66:	68fb      	ldr	r3, [r7, #12]
+}
+ 800ce68:	4618      	mov	r0, r3
+ 800ce6a:	3714      	adds	r7, #20
+ 800ce6c:	46bd      	mov	sp, r7
+ 800ce6e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800ce72:	4770      	bx	lr
+
+0800ce74 <inHandlerMode>:
+#endif
+
+
+/* Determine whether we are in thread mode or handler mode. */
+static int inHandlerMode (void)
+{
+ 800ce74:	b480      	push	{r7}
+ 800ce76:	b083      	sub	sp, #12
+ 800ce78:	af00      	add	r7, sp, #0
+ */
+__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+ 800ce7a:	f3ef 8305 	mrs	r3, IPSR
+ 800ce7e:	607b      	str	r3, [r7, #4]
+  return(result);
+ 800ce80:	687b      	ldr	r3, [r7, #4]
+  return __get_IPSR() != 0;
+ 800ce82:	2b00      	cmp	r3, #0
+ 800ce84:	bf14      	ite	ne
+ 800ce86:	2301      	movne	r3, #1
+ 800ce88:	2300      	moveq	r3, #0
+ 800ce8a:	b2db      	uxtb	r3, r3
+}
+ 800ce8c:	4618      	mov	r0, r3
+ 800ce8e:	370c      	adds	r7, #12
+ 800ce90:	46bd      	mov	sp, r7
+ 800ce92:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800ce96:	4770      	bx	lr
+
+0800ce98 <osKernelStart>:
+* @param  argument      pointer that is passed to the thread function as start argument.
+* @retval status code that indicates the execution status of the function
+* @note   MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS.
+*/
+osStatus osKernelStart (void)
+{
+ 800ce98:	b580      	push	{r7, lr}
+ 800ce9a:	af00      	add	r7, sp, #0
+  vTaskStartScheduler();
+ 800ce9c:	f001 fd8e 	bl	800e9bc <vTaskStartScheduler>
+  
+  return osOK;
+ 800cea0:	2300      	movs	r3, #0
+}
+ 800cea2:	4618      	mov	r0, r3
+ 800cea4:	bd80      	pop	{r7, pc}
+
+0800cea6 <osKernelSysTick>:
+* @param  None
+* @retval None
+* @note   MUST REMAIN UNCHANGED: \b osKernelSysTick shall be consistent in every CMSIS-RTOS.
+*/
+uint32_t osKernelSysTick(void)
+{
+ 800cea6:	b580      	push	{r7, lr}
+ 800cea8:	af00      	add	r7, sp, #0
+  if (inHandlerMode()) {
+ 800ceaa:	f7ff ffe3 	bl	800ce74 <inHandlerMode>
+ 800ceae:	4603      	mov	r3, r0
+ 800ceb0:	2b00      	cmp	r3, #0
+ 800ceb2:	d003      	beq.n	800cebc <osKernelSysTick+0x16>
+    return xTaskGetTickCountFromISR();
+ 800ceb4:	f001 fea0 	bl	800ebf8 <xTaskGetTickCountFromISR>
+ 800ceb8:	4603      	mov	r3, r0
+ 800ceba:	e002      	b.n	800cec2 <osKernelSysTick+0x1c>
+  }
+  else {
+    return xTaskGetTickCount();
+ 800cebc:	f001 fe8c 	bl	800ebd8 <xTaskGetTickCount>
+ 800cec0:	4603      	mov	r3, r0
+  }
+}
+ 800cec2:	4618      	mov	r0, r3
+ 800cec4:	bd80      	pop	{r7, pc}
+
+0800cec6 <osThreadCreate>:
+* @param  argument      pointer that is passed to the thread function as start argument.
+* @retval thread ID for reference by other functions or NULL in case of error.
+* @note   MUST REMAIN UNCHANGED: \b osThreadCreate shall be consistent in every CMSIS-RTOS.
+*/
+osThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument)
+{
+ 800cec6:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 800cec8:	b089      	sub	sp, #36	; 0x24
+ 800ceca:	af04      	add	r7, sp, #16
+ 800cecc:	6078      	str	r0, [r7, #4]
+ 800cece:	6039      	str	r1, [r7, #0]
+  TaskHandle_t handle;
+  
+#if( configSUPPORT_STATIC_ALLOCATION == 1 ) &&  ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+  if((thread_def->buffer != NULL) && (thread_def->controlblock != NULL)) {
+ 800ced0:	687b      	ldr	r3, [r7, #4]
+ 800ced2:	695b      	ldr	r3, [r3, #20]
+ 800ced4:	2b00      	cmp	r3, #0
+ 800ced6:	d020      	beq.n	800cf1a <osThreadCreate+0x54>
+ 800ced8:	687b      	ldr	r3, [r7, #4]
+ 800ceda:	699b      	ldr	r3, [r3, #24]
+ 800cedc:	2b00      	cmp	r3, #0
+ 800cede:	d01c      	beq.n	800cf1a <osThreadCreate+0x54>
+    handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
+ 800cee0:	687b      	ldr	r3, [r7, #4]
+ 800cee2:	685c      	ldr	r4, [r3, #4]
+ 800cee4:	687b      	ldr	r3, [r7, #4]
+ 800cee6:	681d      	ldr	r5, [r3, #0]
+ 800cee8:	687b      	ldr	r3, [r7, #4]
+ 800ceea:	691e      	ldr	r6, [r3, #16]
+ 800ceec:	687b      	ldr	r3, [r7, #4]
+ 800ceee:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
+ 800cef2:	4618      	mov	r0, r3
+ 800cef4:	f7ff ffa6 	bl	800ce44 <makeFreeRtosPriority>
+ 800cef8:	4601      	mov	r1, r0
+              thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority),
+              thread_def->buffer, thread_def->controlblock);
+ 800cefa:	687b      	ldr	r3, [r7, #4]
+ 800cefc:	695b      	ldr	r3, [r3, #20]
+ 800cefe:	687a      	ldr	r2, [r7, #4]
+ 800cf00:	6992      	ldr	r2, [r2, #24]
+    handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
+ 800cf02:	9202      	str	r2, [sp, #8]
+ 800cf04:	9301      	str	r3, [sp, #4]
+ 800cf06:	9100      	str	r1, [sp, #0]
+ 800cf08:	683b      	ldr	r3, [r7, #0]
+ 800cf0a:	4632      	mov	r2, r6
+ 800cf0c:	4629      	mov	r1, r5
+ 800cf0e:	4620      	mov	r0, r4
+ 800cf10:	f001 fafb 	bl	800e50a <xTaskCreateStatic>
+ 800cf14:	4603      	mov	r3, r0
+ 800cf16:	60fb      	str	r3, [r7, #12]
+ 800cf18:	e01c      	b.n	800cf54 <osThreadCreate+0x8e>
+  }
+  else {
+    if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
+ 800cf1a:	687b      	ldr	r3, [r7, #4]
+ 800cf1c:	685c      	ldr	r4, [r3, #4]
+ 800cf1e:	687b      	ldr	r3, [r7, #4]
+ 800cf20:	681d      	ldr	r5, [r3, #0]
+              thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority),
+ 800cf22:	687b      	ldr	r3, [r7, #4]
+ 800cf24:	691b      	ldr	r3, [r3, #16]
+    if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
+ 800cf26:	b29e      	uxth	r6, r3
+ 800cf28:	687b      	ldr	r3, [r7, #4]
+ 800cf2a:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
+ 800cf2e:	4618      	mov	r0, r3
+ 800cf30:	f7ff ff88 	bl	800ce44 <makeFreeRtosPriority>
+ 800cf34:	4602      	mov	r2, r0
+ 800cf36:	f107 030c 	add.w	r3, r7, #12
+ 800cf3a:	9301      	str	r3, [sp, #4]
+ 800cf3c:	9200      	str	r2, [sp, #0]
+ 800cf3e:	683b      	ldr	r3, [r7, #0]
+ 800cf40:	4632      	mov	r2, r6
+ 800cf42:	4629      	mov	r1, r5
+ 800cf44:	4620      	mov	r0, r4
+ 800cf46:	f001 fb40 	bl	800e5ca <xTaskCreate>
+ 800cf4a:	4603      	mov	r3, r0
+ 800cf4c:	2b01      	cmp	r3, #1
+ 800cf4e:	d001      	beq.n	800cf54 <osThreadCreate+0x8e>
+              &handle) != pdPASS)  {
+      return NULL;
+ 800cf50:	2300      	movs	r3, #0
+ 800cf52:	e000      	b.n	800cf56 <osThreadCreate+0x90>
+                   &handle) != pdPASS)  {
+    return NULL;
+  }     
+#endif
+  
+  return handle;
+ 800cf54:	68fb      	ldr	r3, [r7, #12]
+}
+ 800cf56:	4618      	mov	r0, r3
+ 800cf58:	3714      	adds	r7, #20
+ 800cf5a:	46bd      	mov	sp, r7
+ 800cf5c:	bdf0      	pop	{r4, r5, r6, r7, pc}
+
+0800cf5e <osDelay>:
+* @brief   Wait for Timeout (Time Delay)
+* @param   millisec      time delay value
+* @retval  status code that indicates the execution status of the function.
+*/
+osStatus osDelay (uint32_t millisec)
+{
+ 800cf5e:	b580      	push	{r7, lr}
+ 800cf60:	b084      	sub	sp, #16
+ 800cf62:	af00      	add	r7, sp, #0
+ 800cf64:	6078      	str	r0, [r7, #4]
+#if INCLUDE_vTaskDelay
+  TickType_t ticks = millisec / portTICK_PERIOD_MS;
+ 800cf66:	687b      	ldr	r3, [r7, #4]
+ 800cf68:	60fb      	str	r3, [r7, #12]
+  
+  vTaskDelay(ticks ? ticks : 1);          /* Minimum delay = 1 tick */
+ 800cf6a:	68fb      	ldr	r3, [r7, #12]
+ 800cf6c:	2b00      	cmp	r3, #0
+ 800cf6e:	d001      	beq.n	800cf74 <osDelay+0x16>
+ 800cf70:	68fb      	ldr	r3, [r7, #12]
+ 800cf72:	e000      	b.n	800cf76 <osDelay+0x18>
+ 800cf74:	2301      	movs	r3, #1
+ 800cf76:	4618      	mov	r0, r3
+ 800cf78:	f001 fcea 	bl	800e950 <vTaskDelay>
+  
+  return osOK;
+ 800cf7c:	2300      	movs	r3, #0
+#else
+  (void) millisec;
+  
+  return osErrorResource;
+#endif
+}
+ 800cf7e:	4618      	mov	r0, r3
+ 800cf80:	3710      	adds	r7, #16
+ 800cf82:	46bd      	mov	sp, r7
+ 800cf84:	bd80      	pop	{r7, pc}
+
+0800cf86 <osMutexCreate>:
+* @param  mutex_def     mutex definition referenced with \ref osMutex.
+* @retval  mutex ID for reference by other functions or NULL in case of error.
+* @note   MUST REMAIN UNCHANGED: \b osMutexCreate shall be consistent in every CMSIS-RTOS.
+*/
+osMutexId osMutexCreate (const osMutexDef_t *mutex_def)
+{
+ 800cf86:	b580      	push	{r7, lr}
+ 800cf88:	b082      	sub	sp, #8
+ 800cf8a:	af00      	add	r7, sp, #0
+ 800cf8c:	6078      	str	r0, [r7, #4]
+#if ( configUSE_MUTEXES == 1)
+
+#if( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+
+  if (mutex_def->controlblock != NULL) {
+ 800cf8e:	687b      	ldr	r3, [r7, #4]
+ 800cf90:	685b      	ldr	r3, [r3, #4]
+ 800cf92:	2b00      	cmp	r3, #0
+ 800cf94:	d007      	beq.n	800cfa6 <osMutexCreate+0x20>
+    return xSemaphoreCreateMutexStatic( mutex_def->controlblock );
+ 800cf96:	687b      	ldr	r3, [r7, #4]
+ 800cf98:	685b      	ldr	r3, [r3, #4]
+ 800cf9a:	4619      	mov	r1, r3
+ 800cf9c:	2001      	movs	r0, #1
+ 800cf9e:	f000 fc5e 	bl	800d85e <xQueueCreateMutexStatic>
+ 800cfa2:	4603      	mov	r3, r0
+ 800cfa4:	e003      	b.n	800cfae <osMutexCreate+0x28>
+     }
+  else {
+    return xSemaphoreCreateMutex(); 
+ 800cfa6:	2001      	movs	r0, #1
+ 800cfa8:	f000 fc41 	bl	800d82e <xQueueCreateMutex>
+ 800cfac:	4603      	mov	r3, r0
+    return xSemaphoreCreateMutex(); 
+#endif
+#else
+  return NULL;
+#endif
+}
+ 800cfae:	4618      	mov	r0, r3
+ 800cfb0:	3708      	adds	r7, #8
+ 800cfb2:	46bd      	mov	sp, r7
+ 800cfb4:	bd80      	pop	{r7, pc}
+	...
+
+0800cfb8 <osMutexWait>:
+* @param millisec      timeout value or 0 in case of no time-out.
+* @retval  status code that indicates the execution status of the function.
+* @note   MUST REMAIN UNCHANGED: \b osMutexWait shall be consistent in every CMSIS-RTOS.
+*/
+osStatus osMutexWait (osMutexId mutex_id, uint32_t millisec)
+{
+ 800cfb8:	b580      	push	{r7, lr}
+ 800cfba:	b084      	sub	sp, #16
+ 800cfbc:	af00      	add	r7, sp, #0
+ 800cfbe:	6078      	str	r0, [r7, #4]
+ 800cfc0:	6039      	str	r1, [r7, #0]
+  TickType_t ticks;
+  portBASE_TYPE taskWoken = pdFALSE;  
+ 800cfc2:	2300      	movs	r3, #0
+ 800cfc4:	60bb      	str	r3, [r7, #8]
+  
+  
+  if (mutex_id == NULL) {
+ 800cfc6:	687b      	ldr	r3, [r7, #4]
+ 800cfc8:	2b00      	cmp	r3, #0
+ 800cfca:	d101      	bne.n	800cfd0 <osMutexWait+0x18>
+    return osErrorParameter;
+ 800cfcc:	2380      	movs	r3, #128	; 0x80
+ 800cfce:	e03a      	b.n	800d046 <osMutexWait+0x8e>
+  }
+  
+  ticks = 0;
+ 800cfd0:	2300      	movs	r3, #0
+ 800cfd2:	60fb      	str	r3, [r7, #12]
+  if (millisec == osWaitForever) {
+ 800cfd4:	683b      	ldr	r3, [r7, #0]
+ 800cfd6:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800cfda:	d103      	bne.n	800cfe4 <osMutexWait+0x2c>
+    ticks = portMAX_DELAY;
+ 800cfdc:	f04f 33ff 	mov.w	r3, #4294967295
+ 800cfe0:	60fb      	str	r3, [r7, #12]
+ 800cfe2:	e009      	b.n	800cff8 <osMutexWait+0x40>
+  }
+  else if (millisec != 0) {
+ 800cfe4:	683b      	ldr	r3, [r7, #0]
+ 800cfe6:	2b00      	cmp	r3, #0
+ 800cfe8:	d006      	beq.n	800cff8 <osMutexWait+0x40>
+    ticks = millisec / portTICK_PERIOD_MS;
+ 800cfea:	683b      	ldr	r3, [r7, #0]
+ 800cfec:	60fb      	str	r3, [r7, #12]
+    if (ticks == 0) {
+ 800cfee:	68fb      	ldr	r3, [r7, #12]
+ 800cff0:	2b00      	cmp	r3, #0
+ 800cff2:	d101      	bne.n	800cff8 <osMutexWait+0x40>
+      ticks = 1;
+ 800cff4:	2301      	movs	r3, #1
+ 800cff6:	60fb      	str	r3, [r7, #12]
+    }
+  }
+  
+  if (inHandlerMode()) {
+ 800cff8:	f7ff ff3c 	bl	800ce74 <inHandlerMode>
+ 800cffc:	4603      	mov	r3, r0
+ 800cffe:	2b00      	cmp	r3, #0
+ 800d000:	d017      	beq.n	800d032 <osMutexWait+0x7a>
+    if (xSemaphoreTakeFromISR(mutex_id, &taskWoken) != pdTRUE) {
+ 800d002:	f107 0308 	add.w	r3, r7, #8
+ 800d006:	461a      	mov	r2, r3
+ 800d008:	2100      	movs	r1, #0
+ 800d00a:	6878      	ldr	r0, [r7, #4]
+ 800d00c:	f001 f8d2 	bl	800e1b4 <xQueueReceiveFromISR>
+ 800d010:	4603      	mov	r3, r0
+ 800d012:	2b01      	cmp	r3, #1
+ 800d014:	d001      	beq.n	800d01a <osMutexWait+0x62>
+      return osErrorOS;
+ 800d016:	23ff      	movs	r3, #255	; 0xff
+ 800d018:	e015      	b.n	800d046 <osMutexWait+0x8e>
+    }
+	portEND_SWITCHING_ISR(taskWoken);
+ 800d01a:	68bb      	ldr	r3, [r7, #8]
+ 800d01c:	2b00      	cmp	r3, #0
+ 800d01e:	d011      	beq.n	800d044 <osMutexWait+0x8c>
+ 800d020:	4b0b      	ldr	r3, [pc, #44]	; (800d050 <osMutexWait+0x98>)
+ 800d022:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800d026:	601a      	str	r2, [r3, #0]
+ 800d028:	f3bf 8f4f 	dsb	sy
+ 800d02c:	f3bf 8f6f 	isb	sy
+ 800d030:	e008      	b.n	800d044 <osMutexWait+0x8c>
+  } 
+  else if (xSemaphoreTake(mutex_id, ticks) != pdTRUE) {
+ 800d032:	68f9      	ldr	r1, [r7, #12]
+ 800d034:	6878      	ldr	r0, [r7, #4]
+ 800d036:	f000 ffad 	bl	800df94 <xQueueSemaphoreTake>
+ 800d03a:	4603      	mov	r3, r0
+ 800d03c:	2b01      	cmp	r3, #1
+ 800d03e:	d001      	beq.n	800d044 <osMutexWait+0x8c>
+    return osErrorOS;
+ 800d040:	23ff      	movs	r3, #255	; 0xff
+ 800d042:	e000      	b.n	800d046 <osMutexWait+0x8e>
+  }
+  
+  return osOK;
+ 800d044:	2300      	movs	r3, #0
+}
+ 800d046:	4618      	mov	r0, r3
+ 800d048:	3710      	adds	r7, #16
+ 800d04a:	46bd      	mov	sp, r7
+ 800d04c:	bd80      	pop	{r7, pc}
+ 800d04e:	bf00      	nop
+ 800d050:	e000ed04 	.word	0xe000ed04
+
+0800d054 <osMutexRelease>:
+* @param mutex_id      mutex ID obtained by \ref osMutexCreate.
+* @retval  status code that indicates the execution status of the function.
+* @note   MUST REMAIN UNCHANGED: \b osMutexRelease shall be consistent in every CMSIS-RTOS.
+*/
+osStatus osMutexRelease (osMutexId mutex_id)
+{
+ 800d054:	b580      	push	{r7, lr}
+ 800d056:	b084      	sub	sp, #16
+ 800d058:	af00      	add	r7, sp, #0
+ 800d05a:	6078      	str	r0, [r7, #4]
+  osStatus result = osOK;
+ 800d05c:	2300      	movs	r3, #0
+ 800d05e:	60fb      	str	r3, [r7, #12]
+  portBASE_TYPE taskWoken = pdFALSE;
+ 800d060:	2300      	movs	r3, #0
+ 800d062:	60bb      	str	r3, [r7, #8]
+  
+  if (inHandlerMode()) {
+ 800d064:	f7ff ff06 	bl	800ce74 <inHandlerMode>
+ 800d068:	4603      	mov	r3, r0
+ 800d06a:	2b00      	cmp	r3, #0
+ 800d06c:	d016      	beq.n	800d09c <osMutexRelease+0x48>
+    if (xSemaphoreGiveFromISR(mutex_id, &taskWoken) != pdTRUE) {
+ 800d06e:	f107 0308 	add.w	r3, r7, #8
+ 800d072:	4619      	mov	r1, r3
+ 800d074:	6878      	ldr	r0, [r7, #4]
+ 800d076:	f000 fe19 	bl	800dcac <xQueueGiveFromISR>
+ 800d07a:	4603      	mov	r3, r0
+ 800d07c:	2b01      	cmp	r3, #1
+ 800d07e:	d001      	beq.n	800d084 <osMutexRelease+0x30>
+      return osErrorOS;
+ 800d080:	23ff      	movs	r3, #255	; 0xff
+ 800d082:	e017      	b.n	800d0b4 <osMutexRelease+0x60>
+    }
+    portEND_SWITCHING_ISR(taskWoken);
+ 800d084:	68bb      	ldr	r3, [r7, #8]
+ 800d086:	2b00      	cmp	r3, #0
+ 800d088:	d013      	beq.n	800d0b2 <osMutexRelease+0x5e>
+ 800d08a:	4b0c      	ldr	r3, [pc, #48]	; (800d0bc <osMutexRelease+0x68>)
+ 800d08c:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800d090:	601a      	str	r2, [r3, #0]
+ 800d092:	f3bf 8f4f 	dsb	sy
+ 800d096:	f3bf 8f6f 	isb	sy
+ 800d09a:	e00a      	b.n	800d0b2 <osMutexRelease+0x5e>
+  }
+  else if (xSemaphoreGive(mutex_id) != pdTRUE) 
+ 800d09c:	2300      	movs	r3, #0
+ 800d09e:	2200      	movs	r2, #0
+ 800d0a0:	2100      	movs	r1, #0
+ 800d0a2:	6878      	ldr	r0, [r7, #4]
+ 800d0a4:	f000 fc64 	bl	800d970 <xQueueGenericSend>
+ 800d0a8:	4603      	mov	r3, r0
+ 800d0aa:	2b01      	cmp	r3, #1
+ 800d0ac:	d001      	beq.n	800d0b2 <osMutexRelease+0x5e>
+  {
+    result = osErrorOS;
+ 800d0ae:	23ff      	movs	r3, #255	; 0xff
+ 800d0b0:	60fb      	str	r3, [r7, #12]
+  }
+  return result;
+ 800d0b2:	68fb      	ldr	r3, [r7, #12]
+}
+ 800d0b4:	4618      	mov	r0, r3
+ 800d0b6:	3710      	adds	r7, #16
+ 800d0b8:	46bd      	mov	sp, r7
+ 800d0ba:	bd80      	pop	{r7, pc}
+ 800d0bc:	e000ed04 	.word	0xe000ed04
+
+0800d0c0 <osSemaphoreCreate>:
+* @param count         number of available resources.
+* @retval  semaphore ID for reference by other functions or NULL in case of error.
+* @note   MUST REMAIN UNCHANGED: \b osSemaphoreCreate shall be consistent in every CMSIS-RTOS.
+*/
+osSemaphoreId osSemaphoreCreate (const osSemaphoreDef_t *semaphore_def, int32_t count)
+{ 
+ 800d0c0:	b580      	push	{r7, lr}
+ 800d0c2:	b086      	sub	sp, #24
+ 800d0c4:	af02      	add	r7, sp, #8
+ 800d0c6:	6078      	str	r0, [r7, #4]
+ 800d0c8:	6039      	str	r1, [r7, #0]
+#if( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+
+  osSemaphoreId sema;
+  
+  if (semaphore_def->controlblock != NULL){
+ 800d0ca:	687b      	ldr	r3, [r7, #4]
+ 800d0cc:	685b      	ldr	r3, [r3, #4]
+ 800d0ce:	2b00      	cmp	r3, #0
+ 800d0d0:	d017      	beq.n	800d102 <osSemaphoreCreate+0x42>
+    if (count == 1) {
+ 800d0d2:	683b      	ldr	r3, [r7, #0]
+ 800d0d4:	2b01      	cmp	r3, #1
+ 800d0d6:	d10b      	bne.n	800d0f0 <osSemaphoreCreate+0x30>
+      return xSemaphoreCreateBinaryStatic( semaphore_def->controlblock );
+ 800d0d8:	687b      	ldr	r3, [r7, #4]
+ 800d0da:	685a      	ldr	r2, [r3, #4]
+ 800d0dc:	2303      	movs	r3, #3
+ 800d0de:	9300      	str	r3, [sp, #0]
+ 800d0e0:	4613      	mov	r3, r2
+ 800d0e2:	2200      	movs	r2, #0
+ 800d0e4:	2100      	movs	r1, #0
+ 800d0e6:	2001      	movs	r0, #1
+ 800d0e8:	f000 faaa 	bl	800d640 <xQueueGenericCreateStatic>
+ 800d0ec:	4603      	mov	r3, r0
+ 800d0ee:	e023      	b.n	800d138 <osSemaphoreCreate+0x78>
+    }
+    else {
+#if (configUSE_COUNTING_SEMAPHORES == 1 )
+      return xSemaphoreCreateCountingStatic( count, count, semaphore_def->controlblock );
+ 800d0f0:	6838      	ldr	r0, [r7, #0]
+ 800d0f2:	6839      	ldr	r1, [r7, #0]
+ 800d0f4:	687b      	ldr	r3, [r7, #4]
+ 800d0f6:	685b      	ldr	r3, [r3, #4]
+ 800d0f8:	461a      	mov	r2, r3
+ 800d0fa:	f000 fbcb 	bl	800d894 <xQueueCreateCountingSemaphoreStatic>
+ 800d0fe:	4603      	mov	r3, r0
+ 800d100:	e01a      	b.n	800d138 <osSemaphoreCreate+0x78>
+      return NULL;
+#endif
+    }
+  }
+  else {
+    if (count == 1) {
+ 800d102:	683b      	ldr	r3, [r7, #0]
+ 800d104:	2b01      	cmp	r3, #1
+ 800d106:	d110      	bne.n	800d12a <osSemaphoreCreate+0x6a>
+      vSemaphoreCreateBinary(sema);
+ 800d108:	2203      	movs	r2, #3
+ 800d10a:	2100      	movs	r1, #0
+ 800d10c:	2001      	movs	r0, #1
+ 800d10e:	f000 fb14 	bl	800d73a <xQueueGenericCreate>
+ 800d112:	60f8      	str	r0, [r7, #12]
+ 800d114:	68fb      	ldr	r3, [r7, #12]
+ 800d116:	2b00      	cmp	r3, #0
+ 800d118:	d005      	beq.n	800d126 <osSemaphoreCreate+0x66>
+ 800d11a:	2300      	movs	r3, #0
+ 800d11c:	2200      	movs	r2, #0
+ 800d11e:	2100      	movs	r1, #0
+ 800d120:	68f8      	ldr	r0, [r7, #12]
+ 800d122:	f000 fc25 	bl	800d970 <xQueueGenericSend>
+      return sema;
+ 800d126:	68fb      	ldr	r3, [r7, #12]
+ 800d128:	e006      	b.n	800d138 <osSemaphoreCreate+0x78>
+    }
+    else {
+#if (configUSE_COUNTING_SEMAPHORES == 1 )	
+      return xSemaphoreCreateCounting(count, count);
+ 800d12a:	683b      	ldr	r3, [r7, #0]
+ 800d12c:	683a      	ldr	r2, [r7, #0]
+ 800d12e:	4611      	mov	r1, r2
+ 800d130:	4618      	mov	r0, r3
+ 800d132:	f000 fbe8 	bl	800d906 <xQueueCreateCountingSemaphore>
+ 800d136:	4603      	mov	r3, r0
+#else
+    return NULL;
+#endif
+  }
+#endif
+}
+ 800d138:	4618      	mov	r0, r3
+ 800d13a:	3710      	adds	r7, #16
+ 800d13c:	46bd      	mov	sp, r7
+ 800d13e:	bd80      	pop	{r7, pc}
+
+0800d140 <osSemaphoreWait>:
+* @param  millisec      timeout value or 0 in case of no time-out.
+* @retval  number of available tokens, or -1 in case of incorrect parameters.
+* @note   MUST REMAIN UNCHANGED: \b osSemaphoreWait shall be consistent in every CMSIS-RTOS.
+*/
+int32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec)
+{
+ 800d140:	b580      	push	{r7, lr}
+ 800d142:	b084      	sub	sp, #16
+ 800d144:	af00      	add	r7, sp, #0
+ 800d146:	6078      	str	r0, [r7, #4]
+ 800d148:	6039      	str	r1, [r7, #0]
+  TickType_t ticks;
+  portBASE_TYPE taskWoken = pdFALSE;  
+ 800d14a:	2300      	movs	r3, #0
+ 800d14c:	60bb      	str	r3, [r7, #8]
+  
+  
+  if (semaphore_id == NULL) {
+ 800d14e:	687b      	ldr	r3, [r7, #4]
+ 800d150:	2b00      	cmp	r3, #0
+ 800d152:	d101      	bne.n	800d158 <osSemaphoreWait+0x18>
+    return osErrorParameter;
+ 800d154:	2380      	movs	r3, #128	; 0x80
+ 800d156:	e03a      	b.n	800d1ce <osSemaphoreWait+0x8e>
+  }
+  
+  ticks = 0;
+ 800d158:	2300      	movs	r3, #0
+ 800d15a:	60fb      	str	r3, [r7, #12]
+  if (millisec == osWaitForever) {
+ 800d15c:	683b      	ldr	r3, [r7, #0]
+ 800d15e:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800d162:	d103      	bne.n	800d16c <osSemaphoreWait+0x2c>
+    ticks = portMAX_DELAY;
+ 800d164:	f04f 33ff 	mov.w	r3, #4294967295
+ 800d168:	60fb      	str	r3, [r7, #12]
+ 800d16a:	e009      	b.n	800d180 <osSemaphoreWait+0x40>
+  }
+  else if (millisec != 0) {
+ 800d16c:	683b      	ldr	r3, [r7, #0]
+ 800d16e:	2b00      	cmp	r3, #0
+ 800d170:	d006      	beq.n	800d180 <osSemaphoreWait+0x40>
+    ticks = millisec / portTICK_PERIOD_MS;
+ 800d172:	683b      	ldr	r3, [r7, #0]
+ 800d174:	60fb      	str	r3, [r7, #12]
+    if (ticks == 0) {
+ 800d176:	68fb      	ldr	r3, [r7, #12]
+ 800d178:	2b00      	cmp	r3, #0
+ 800d17a:	d101      	bne.n	800d180 <osSemaphoreWait+0x40>
+      ticks = 1;
+ 800d17c:	2301      	movs	r3, #1
+ 800d17e:	60fb      	str	r3, [r7, #12]
+    }
+  }
+  
+  if (inHandlerMode()) {
+ 800d180:	f7ff fe78 	bl	800ce74 <inHandlerMode>
+ 800d184:	4603      	mov	r3, r0
+ 800d186:	2b00      	cmp	r3, #0
+ 800d188:	d017      	beq.n	800d1ba <osSemaphoreWait+0x7a>
+    if (xSemaphoreTakeFromISR(semaphore_id, &taskWoken) != pdTRUE) {
+ 800d18a:	f107 0308 	add.w	r3, r7, #8
+ 800d18e:	461a      	mov	r2, r3
+ 800d190:	2100      	movs	r1, #0
+ 800d192:	6878      	ldr	r0, [r7, #4]
+ 800d194:	f001 f80e 	bl	800e1b4 <xQueueReceiveFromISR>
+ 800d198:	4603      	mov	r3, r0
+ 800d19a:	2b01      	cmp	r3, #1
+ 800d19c:	d001      	beq.n	800d1a2 <osSemaphoreWait+0x62>
+      return osErrorOS;
+ 800d19e:	23ff      	movs	r3, #255	; 0xff
+ 800d1a0:	e015      	b.n	800d1ce <osSemaphoreWait+0x8e>
+    }
+	portEND_SWITCHING_ISR(taskWoken);
+ 800d1a2:	68bb      	ldr	r3, [r7, #8]
+ 800d1a4:	2b00      	cmp	r3, #0
+ 800d1a6:	d011      	beq.n	800d1cc <osSemaphoreWait+0x8c>
+ 800d1a8:	4b0b      	ldr	r3, [pc, #44]	; (800d1d8 <osSemaphoreWait+0x98>)
+ 800d1aa:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800d1ae:	601a      	str	r2, [r3, #0]
+ 800d1b0:	f3bf 8f4f 	dsb	sy
+ 800d1b4:	f3bf 8f6f 	isb	sy
+ 800d1b8:	e008      	b.n	800d1cc <osSemaphoreWait+0x8c>
+  }  
+  else if (xSemaphoreTake(semaphore_id, ticks) != pdTRUE) {
+ 800d1ba:	68f9      	ldr	r1, [r7, #12]
+ 800d1bc:	6878      	ldr	r0, [r7, #4]
+ 800d1be:	f000 fee9 	bl	800df94 <xQueueSemaphoreTake>
+ 800d1c2:	4603      	mov	r3, r0
+ 800d1c4:	2b01      	cmp	r3, #1
+ 800d1c6:	d001      	beq.n	800d1cc <osSemaphoreWait+0x8c>
+    return osErrorOS;
+ 800d1c8:	23ff      	movs	r3, #255	; 0xff
+ 800d1ca:	e000      	b.n	800d1ce <osSemaphoreWait+0x8e>
+  }
+  
+  return osOK;
+ 800d1cc:	2300      	movs	r3, #0
+}
+ 800d1ce:	4618      	mov	r0, r3
+ 800d1d0:	3710      	adds	r7, #16
+ 800d1d2:	46bd      	mov	sp, r7
+ 800d1d4:	bd80      	pop	{r7, pc}
+ 800d1d6:	bf00      	nop
+ 800d1d8:	e000ed04 	.word	0xe000ed04
+
+0800d1dc <osSemaphoreRelease>:
+* @param  semaphore_id  semaphore object referenced with \ref osSemaphore.
+* @retval  status code that indicates the execution status of the function.
+* @note   MUST REMAIN UNCHANGED: \b osSemaphoreRelease shall be consistent in every CMSIS-RTOS.
+*/
+osStatus osSemaphoreRelease (osSemaphoreId semaphore_id)
+{
+ 800d1dc:	b580      	push	{r7, lr}
+ 800d1de:	b084      	sub	sp, #16
+ 800d1e0:	af00      	add	r7, sp, #0
+ 800d1e2:	6078      	str	r0, [r7, #4]
+  osStatus result = osOK;
+ 800d1e4:	2300      	movs	r3, #0
+ 800d1e6:	60fb      	str	r3, [r7, #12]
+  portBASE_TYPE taskWoken = pdFALSE;
+ 800d1e8:	2300      	movs	r3, #0
+ 800d1ea:	60bb      	str	r3, [r7, #8]
+  
+  
+  if (inHandlerMode()) {
+ 800d1ec:	f7ff fe42 	bl	800ce74 <inHandlerMode>
+ 800d1f0:	4603      	mov	r3, r0
+ 800d1f2:	2b00      	cmp	r3, #0
+ 800d1f4:	d016      	beq.n	800d224 <osSemaphoreRelease+0x48>
+    if (xSemaphoreGiveFromISR(semaphore_id, &taskWoken) != pdTRUE) {
+ 800d1f6:	f107 0308 	add.w	r3, r7, #8
+ 800d1fa:	4619      	mov	r1, r3
+ 800d1fc:	6878      	ldr	r0, [r7, #4]
+ 800d1fe:	f000 fd55 	bl	800dcac <xQueueGiveFromISR>
+ 800d202:	4603      	mov	r3, r0
+ 800d204:	2b01      	cmp	r3, #1
+ 800d206:	d001      	beq.n	800d20c <osSemaphoreRelease+0x30>
+      return osErrorOS;
+ 800d208:	23ff      	movs	r3, #255	; 0xff
+ 800d20a:	e017      	b.n	800d23c <osSemaphoreRelease+0x60>
+    }
+    portEND_SWITCHING_ISR(taskWoken);
+ 800d20c:	68bb      	ldr	r3, [r7, #8]
+ 800d20e:	2b00      	cmp	r3, #0
+ 800d210:	d013      	beq.n	800d23a <osSemaphoreRelease+0x5e>
+ 800d212:	4b0c      	ldr	r3, [pc, #48]	; (800d244 <osSemaphoreRelease+0x68>)
+ 800d214:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800d218:	601a      	str	r2, [r3, #0]
+ 800d21a:	f3bf 8f4f 	dsb	sy
+ 800d21e:	f3bf 8f6f 	isb	sy
+ 800d222:	e00a      	b.n	800d23a <osSemaphoreRelease+0x5e>
+  }
+  else {
+    if (xSemaphoreGive(semaphore_id) != pdTRUE) {
+ 800d224:	2300      	movs	r3, #0
+ 800d226:	2200      	movs	r2, #0
+ 800d228:	2100      	movs	r1, #0
+ 800d22a:	6878      	ldr	r0, [r7, #4]
+ 800d22c:	f000 fba0 	bl	800d970 <xQueueGenericSend>
+ 800d230:	4603      	mov	r3, r0
+ 800d232:	2b01      	cmp	r3, #1
+ 800d234:	d001      	beq.n	800d23a <osSemaphoreRelease+0x5e>
+      result = osErrorOS;
+ 800d236:	23ff      	movs	r3, #255	; 0xff
+ 800d238:	60fb      	str	r3, [r7, #12]
+    }
+  }
+  
+  return result;
+ 800d23a:	68fb      	ldr	r3, [r7, #12]
+}
+ 800d23c:	4618      	mov	r0, r3
+ 800d23e:	3710      	adds	r7, #16
+ 800d240:	46bd      	mov	sp, r7
+ 800d242:	bd80      	pop	{r7, pc}
+ 800d244:	e000ed04 	.word	0xe000ed04
+
+0800d248 <osMessageCreate>:
+* @param  thread_id     thread ID (obtained by \ref osThreadCreate or \ref osThreadGetId) or NULL.
+* @retval  message queue ID for reference by other functions or NULL in case of error.
+* @note   MUST REMAIN UNCHANGED: \b osMessageCreate shall be consistent in every CMSIS-RTOS.
+*/
+osMessageQId osMessageCreate (const osMessageQDef_t *queue_def, osThreadId thread_id)
+{
+ 800d248:	b590      	push	{r4, r7, lr}
+ 800d24a:	b085      	sub	sp, #20
+ 800d24c:	af02      	add	r7, sp, #8
+ 800d24e:	6078      	str	r0, [r7, #4]
+ 800d250:	6039      	str	r1, [r7, #0]
+  (void) thread_id;
+  
+#if( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+
+  if ((queue_def->buffer != NULL) && (queue_def->controlblock != NULL)) {
+ 800d252:	687b      	ldr	r3, [r7, #4]
+ 800d254:	689b      	ldr	r3, [r3, #8]
+ 800d256:	2b00      	cmp	r3, #0
+ 800d258:	d012      	beq.n	800d280 <osMessageCreate+0x38>
+ 800d25a:	687b      	ldr	r3, [r7, #4]
+ 800d25c:	68db      	ldr	r3, [r3, #12]
+ 800d25e:	2b00      	cmp	r3, #0
+ 800d260:	d00e      	beq.n	800d280 <osMessageCreate+0x38>
+    return xQueueCreateStatic(queue_def->queue_sz, queue_def->item_sz, queue_def->buffer, queue_def->controlblock);
+ 800d262:	687b      	ldr	r3, [r7, #4]
+ 800d264:	6818      	ldr	r0, [r3, #0]
+ 800d266:	687b      	ldr	r3, [r7, #4]
+ 800d268:	6859      	ldr	r1, [r3, #4]
+ 800d26a:	687b      	ldr	r3, [r7, #4]
+ 800d26c:	689a      	ldr	r2, [r3, #8]
+ 800d26e:	687b      	ldr	r3, [r7, #4]
+ 800d270:	68dc      	ldr	r4, [r3, #12]
+ 800d272:	2300      	movs	r3, #0
+ 800d274:	9300      	str	r3, [sp, #0]
+ 800d276:	4623      	mov	r3, r4
+ 800d278:	f000 f9e2 	bl	800d640 <xQueueGenericCreateStatic>
+ 800d27c:	4603      	mov	r3, r0
+ 800d27e:	e008      	b.n	800d292 <osMessageCreate+0x4a>
+  }
+  else {
+    return xQueueCreate(queue_def->queue_sz, queue_def->item_sz);
+ 800d280:	687b      	ldr	r3, [r7, #4]
+ 800d282:	6818      	ldr	r0, [r3, #0]
+ 800d284:	687b      	ldr	r3, [r7, #4]
+ 800d286:	685b      	ldr	r3, [r3, #4]
+ 800d288:	2200      	movs	r2, #0
+ 800d28a:	4619      	mov	r1, r3
+ 800d28c:	f000 fa55 	bl	800d73a <xQueueGenericCreate>
+ 800d290:	4603      	mov	r3, r0
+#elif ( configSUPPORT_STATIC_ALLOCATION == 1 )
+  return xQueueCreateStatic(queue_def->queue_sz, queue_def->item_sz, queue_def->buffer, queue_def->controlblock);
+#else  
+  return xQueueCreate(queue_def->queue_sz, queue_def->item_sz);
+#endif
+}
+ 800d292:	4618      	mov	r0, r3
+ 800d294:	370c      	adds	r7, #12
+ 800d296:	46bd      	mov	sp, r7
+ 800d298:	bd90      	pop	{r4, r7, pc}
+	...
+
+0800d29c <osMessagePut>:
+* @param  millisec  timeout value or 0 in case of no time-out.
+* @retval status code that indicates the execution status of the function.
+* @note   MUST REMAIN UNCHANGED: \b osMessagePut shall be consistent in every CMSIS-RTOS.
+*/
+osStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec)
+{
+ 800d29c:	b580      	push	{r7, lr}
+ 800d29e:	b086      	sub	sp, #24
+ 800d2a0:	af00      	add	r7, sp, #0
+ 800d2a2:	60f8      	str	r0, [r7, #12]
+ 800d2a4:	60b9      	str	r1, [r7, #8]
+ 800d2a6:	607a      	str	r2, [r7, #4]
+  portBASE_TYPE taskWoken = pdFALSE;
+ 800d2a8:	2300      	movs	r3, #0
+ 800d2aa:	613b      	str	r3, [r7, #16]
+  TickType_t ticks;
+  
+  ticks = millisec / portTICK_PERIOD_MS;
+ 800d2ac:	687b      	ldr	r3, [r7, #4]
+ 800d2ae:	617b      	str	r3, [r7, #20]
+  if (ticks == 0) {
+ 800d2b0:	697b      	ldr	r3, [r7, #20]
+ 800d2b2:	2b00      	cmp	r3, #0
+ 800d2b4:	d101      	bne.n	800d2ba <osMessagePut+0x1e>
+    ticks = 1;
+ 800d2b6:	2301      	movs	r3, #1
+ 800d2b8:	617b      	str	r3, [r7, #20]
+  }
+  
+  if (inHandlerMode()) {
+ 800d2ba:	f7ff fddb 	bl	800ce74 <inHandlerMode>
+ 800d2be:	4603      	mov	r3, r0
+ 800d2c0:	2b00      	cmp	r3, #0
+ 800d2c2:	d018      	beq.n	800d2f6 <osMessagePut+0x5a>
+    if (xQueueSendFromISR(queue_id, &info, &taskWoken) != pdTRUE) {
+ 800d2c4:	f107 0210 	add.w	r2, r7, #16
+ 800d2c8:	f107 0108 	add.w	r1, r7, #8
+ 800d2cc:	2300      	movs	r3, #0
+ 800d2ce:	68f8      	ldr	r0, [r7, #12]
+ 800d2d0:	f000 fc50 	bl	800db74 <xQueueGenericSendFromISR>
+ 800d2d4:	4603      	mov	r3, r0
+ 800d2d6:	2b01      	cmp	r3, #1
+ 800d2d8:	d001      	beq.n	800d2de <osMessagePut+0x42>
+      return osErrorOS;
+ 800d2da:	23ff      	movs	r3, #255	; 0xff
+ 800d2dc:	e018      	b.n	800d310 <osMessagePut+0x74>
+    }
+    portEND_SWITCHING_ISR(taskWoken);
+ 800d2de:	693b      	ldr	r3, [r7, #16]
+ 800d2e0:	2b00      	cmp	r3, #0
+ 800d2e2:	d014      	beq.n	800d30e <osMessagePut+0x72>
+ 800d2e4:	4b0c      	ldr	r3, [pc, #48]	; (800d318 <osMessagePut+0x7c>)
+ 800d2e6:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800d2ea:	601a      	str	r2, [r3, #0]
+ 800d2ec:	f3bf 8f4f 	dsb	sy
+ 800d2f0:	f3bf 8f6f 	isb	sy
+ 800d2f4:	e00b      	b.n	800d30e <osMessagePut+0x72>
+  }
+  else {
+    if (xQueueSend(queue_id, &info, ticks) != pdTRUE) {
+ 800d2f6:	f107 0108 	add.w	r1, r7, #8
+ 800d2fa:	2300      	movs	r3, #0
+ 800d2fc:	697a      	ldr	r2, [r7, #20]
+ 800d2fe:	68f8      	ldr	r0, [r7, #12]
+ 800d300:	f000 fb36 	bl	800d970 <xQueueGenericSend>
+ 800d304:	4603      	mov	r3, r0
+ 800d306:	2b01      	cmp	r3, #1
+ 800d308:	d001      	beq.n	800d30e <osMessagePut+0x72>
+      return osErrorOS;
+ 800d30a:	23ff      	movs	r3, #255	; 0xff
+ 800d30c:	e000      	b.n	800d310 <osMessagePut+0x74>
+    }
+  }
+  
+  return osOK;
+ 800d30e:	2300      	movs	r3, #0
+}
+ 800d310:	4618      	mov	r0, r3
+ 800d312:	3718      	adds	r7, #24
+ 800d314:	46bd      	mov	sp, r7
+ 800d316:	bd80      	pop	{r7, pc}
+ 800d318:	e000ed04 	.word	0xe000ed04
+
+0800d31c <osMessageGet>:
+* @param  millisec  timeout value or 0 in case of no time-out.
+* @retval event information that includes status code.
+* @note   MUST REMAIN UNCHANGED: \b osMessageGet shall be consistent in every CMSIS-RTOS.
+*/
+osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec)
+{
+ 800d31c:	b590      	push	{r4, r7, lr}
+ 800d31e:	b08b      	sub	sp, #44	; 0x2c
+ 800d320:	af00      	add	r7, sp, #0
+ 800d322:	60f8      	str	r0, [r7, #12]
+ 800d324:	60b9      	str	r1, [r7, #8]
+ 800d326:	607a      	str	r2, [r7, #4]
+  portBASE_TYPE taskWoken;
+  TickType_t ticks;
+  osEvent event;
+  
+  event.def.message_id = queue_id;
+ 800d328:	68bb      	ldr	r3, [r7, #8]
+ 800d32a:	61fb      	str	r3, [r7, #28]
+  event.value.v = 0;
+ 800d32c:	2300      	movs	r3, #0
+ 800d32e:	61bb      	str	r3, [r7, #24]
+  
+  if (queue_id == NULL) {
+ 800d330:	68bb      	ldr	r3, [r7, #8]
+ 800d332:	2b00      	cmp	r3, #0
+ 800d334:	d10a      	bne.n	800d34c <osMessageGet+0x30>
+    event.status = osErrorParameter;
+ 800d336:	2380      	movs	r3, #128	; 0x80
+ 800d338:	617b      	str	r3, [r7, #20]
+    return event;
+ 800d33a:	68fb      	ldr	r3, [r7, #12]
+ 800d33c:	461c      	mov	r4, r3
+ 800d33e:	f107 0314 	add.w	r3, r7, #20
+ 800d342:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
+ 800d346:	e884 0007 	stmia.w	r4, {r0, r1, r2}
+ 800d34a:	e054      	b.n	800d3f6 <osMessageGet+0xda>
+  }
+  
+  taskWoken = pdFALSE;
+ 800d34c:	2300      	movs	r3, #0
+ 800d34e:	623b      	str	r3, [r7, #32]
+  
+  ticks = 0;
+ 800d350:	2300      	movs	r3, #0
+ 800d352:	627b      	str	r3, [r7, #36]	; 0x24
+  if (millisec == osWaitForever) {
+ 800d354:	687b      	ldr	r3, [r7, #4]
+ 800d356:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800d35a:	d103      	bne.n	800d364 <osMessageGet+0x48>
+    ticks = portMAX_DELAY;
+ 800d35c:	f04f 33ff 	mov.w	r3, #4294967295
+ 800d360:	627b      	str	r3, [r7, #36]	; 0x24
+ 800d362:	e009      	b.n	800d378 <osMessageGet+0x5c>
+  }
+  else if (millisec != 0) {
+ 800d364:	687b      	ldr	r3, [r7, #4]
+ 800d366:	2b00      	cmp	r3, #0
+ 800d368:	d006      	beq.n	800d378 <osMessageGet+0x5c>
+    ticks = millisec / portTICK_PERIOD_MS;
+ 800d36a:	687b      	ldr	r3, [r7, #4]
+ 800d36c:	627b      	str	r3, [r7, #36]	; 0x24
+    if (ticks == 0) {
+ 800d36e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800d370:	2b00      	cmp	r3, #0
+ 800d372:	d101      	bne.n	800d378 <osMessageGet+0x5c>
+      ticks = 1;
+ 800d374:	2301      	movs	r3, #1
+ 800d376:	627b      	str	r3, [r7, #36]	; 0x24
+    }
+  }
+  
+  if (inHandlerMode()) {
+ 800d378:	f7ff fd7c 	bl	800ce74 <inHandlerMode>
+ 800d37c:	4603      	mov	r3, r0
+ 800d37e:	2b00      	cmp	r3, #0
+ 800d380:	d01c      	beq.n	800d3bc <osMessageGet+0xa0>
+    if (xQueueReceiveFromISR(queue_id, &event.value.v, &taskWoken) == pdTRUE) {
+ 800d382:	f107 0220 	add.w	r2, r7, #32
+ 800d386:	f107 0314 	add.w	r3, r7, #20
+ 800d38a:	3304      	adds	r3, #4
+ 800d38c:	4619      	mov	r1, r3
+ 800d38e:	68b8      	ldr	r0, [r7, #8]
+ 800d390:	f000 ff10 	bl	800e1b4 <xQueueReceiveFromISR>
+ 800d394:	4603      	mov	r3, r0
+ 800d396:	2b01      	cmp	r3, #1
+ 800d398:	d102      	bne.n	800d3a0 <osMessageGet+0x84>
+      /* We have mail */
+      event.status = osEventMessage;
+ 800d39a:	2310      	movs	r3, #16
+ 800d39c:	617b      	str	r3, [r7, #20]
+ 800d39e:	e001      	b.n	800d3a4 <osMessageGet+0x88>
+    }
+    else {
+      event.status = osOK;
+ 800d3a0:	2300      	movs	r3, #0
+ 800d3a2:	617b      	str	r3, [r7, #20]
+    }
+    portEND_SWITCHING_ISR(taskWoken);
+ 800d3a4:	6a3b      	ldr	r3, [r7, #32]
+ 800d3a6:	2b00      	cmp	r3, #0
+ 800d3a8:	d01d      	beq.n	800d3e6 <osMessageGet+0xca>
+ 800d3aa:	4b15      	ldr	r3, [pc, #84]	; (800d400 <osMessageGet+0xe4>)
+ 800d3ac:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800d3b0:	601a      	str	r2, [r3, #0]
+ 800d3b2:	f3bf 8f4f 	dsb	sy
+ 800d3b6:	f3bf 8f6f 	isb	sy
+ 800d3ba:	e014      	b.n	800d3e6 <osMessageGet+0xca>
+  }
+  else {
+    if (xQueueReceive(queue_id, &event.value.v, ticks) == pdTRUE) {
+ 800d3bc:	f107 0314 	add.w	r3, r7, #20
+ 800d3c0:	3304      	adds	r3, #4
+ 800d3c2:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 800d3c4:	4619      	mov	r1, r3
+ 800d3c6:	68b8      	ldr	r0, [r7, #8]
+ 800d3c8:	f000 fd02 	bl	800ddd0 <xQueueReceive>
+ 800d3cc:	4603      	mov	r3, r0
+ 800d3ce:	2b01      	cmp	r3, #1
+ 800d3d0:	d102      	bne.n	800d3d8 <osMessageGet+0xbc>
+      /* We have mail */
+      event.status = osEventMessage;
+ 800d3d2:	2310      	movs	r3, #16
+ 800d3d4:	617b      	str	r3, [r7, #20]
+ 800d3d6:	e006      	b.n	800d3e6 <osMessageGet+0xca>
+    }
+    else {
+      event.status = (ticks == 0) ? osOK : osEventTimeout;
+ 800d3d8:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800d3da:	2b00      	cmp	r3, #0
+ 800d3dc:	d101      	bne.n	800d3e2 <osMessageGet+0xc6>
+ 800d3de:	2300      	movs	r3, #0
+ 800d3e0:	e000      	b.n	800d3e4 <osMessageGet+0xc8>
+ 800d3e2:	2340      	movs	r3, #64	; 0x40
+ 800d3e4:	617b      	str	r3, [r7, #20]
+    }
+  }
+  
+  return event;
+ 800d3e6:	68fb      	ldr	r3, [r7, #12]
+ 800d3e8:	461c      	mov	r4, r3
+ 800d3ea:	f107 0314 	add.w	r3, r7, #20
+ 800d3ee:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
+ 800d3f2:	e884 0007 	stmia.w	r4, {r0, r1, r2}
+}
+ 800d3f6:	68f8      	ldr	r0, [r7, #12]
+ 800d3f8:	372c      	adds	r7, #44	; 0x2c
+ 800d3fa:	46bd      	mov	sp, r7
+ 800d3fc:	bd90      	pop	{r4, r7, pc}
+ 800d3fe:	bf00      	nop
+ 800d400:	e000ed04 	.word	0xe000ed04
+
+0800d404 <vListInitialise>:
+/*-----------------------------------------------------------
+ * PUBLIC LIST API documented in list.h
+ *----------------------------------------------------------*/
+
+void vListInitialise( List_t * const pxList )
+{
+ 800d404:	b480      	push	{r7}
+ 800d406:	b083      	sub	sp, #12
+ 800d408:	af00      	add	r7, sp, #0
+ 800d40a:	6078      	str	r0, [r7, #4]
+	/* The list structure contains a list item which is used to mark the
+	end of the list.  To initialise the list the list end is inserted
+	as the only list entry. */
+	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+ 800d40c:	687b      	ldr	r3, [r7, #4]
+ 800d40e:	f103 0208 	add.w	r2, r3, #8
+ 800d412:	687b      	ldr	r3, [r7, #4]
+ 800d414:	605a      	str	r2, [r3, #4]
+
+	/* The list end value is the highest possible value in the list to
+	ensure it remains at the end of the list. */
+	pxList->xListEnd.xItemValue = portMAX_DELAY;
+ 800d416:	687b      	ldr	r3, [r7, #4]
+ 800d418:	f04f 32ff 	mov.w	r2, #4294967295
+ 800d41c:	609a      	str	r2, [r3, #8]
+
+	/* The list end next and previous pointers point to itself so we know
+	when the list is empty. */
+	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+ 800d41e:	687b      	ldr	r3, [r7, #4]
+ 800d420:	f103 0208 	add.w	r2, r3, #8
+ 800d424:	687b      	ldr	r3, [r7, #4]
+ 800d426:	60da      	str	r2, [r3, #12]
+	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+ 800d428:	687b      	ldr	r3, [r7, #4]
+ 800d42a:	f103 0208 	add.w	r2, r3, #8
+ 800d42e:	687b      	ldr	r3, [r7, #4]
+ 800d430:	611a      	str	r2, [r3, #16]
+
+	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
+ 800d432:	687b      	ldr	r3, [r7, #4]
+ 800d434:	2200      	movs	r2, #0
+ 800d436:	601a      	str	r2, [r3, #0]
+
+	/* Write known values into the list if
+	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
+	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
+}
+ 800d438:	bf00      	nop
+ 800d43a:	370c      	adds	r7, #12
+ 800d43c:	46bd      	mov	sp, r7
+ 800d43e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800d442:	4770      	bx	lr
+
+0800d444 <vListInitialiseItem>:
+/*-----------------------------------------------------------*/
+
+void vListInitialiseItem( ListItem_t * const pxItem )
+{
+ 800d444:	b480      	push	{r7}
+ 800d446:	b083      	sub	sp, #12
+ 800d448:	af00      	add	r7, sp, #0
+ 800d44a:	6078      	str	r0, [r7, #4]
+	/* Make sure the list item is not recorded as being on a list. */
+	pxItem->pxContainer = NULL;
+ 800d44c:	687b      	ldr	r3, [r7, #4]
+ 800d44e:	2200      	movs	r2, #0
+ 800d450:	611a      	str	r2, [r3, #16]
+
+	/* Write known values into the list item if
+	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+}
+ 800d452:	bf00      	nop
+ 800d454:	370c      	adds	r7, #12
+ 800d456:	46bd      	mov	sp, r7
+ 800d458:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800d45c:	4770      	bx	lr
+
+0800d45e <vListInsertEnd>:
+/*-----------------------------------------------------------*/
+
+void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
+{
+ 800d45e:	b480      	push	{r7}
+ 800d460:	b085      	sub	sp, #20
+ 800d462:	af00      	add	r7, sp, #0
+ 800d464:	6078      	str	r0, [r7, #4]
+ 800d466:	6039      	str	r1, [r7, #0]
+ListItem_t * const pxIndex = pxList->pxIndex;
+ 800d468:	687b      	ldr	r3, [r7, #4]
+ 800d46a:	685b      	ldr	r3, [r3, #4]
+ 800d46c:	60fb      	str	r3, [r7, #12]
+	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
+
+	/* Insert a new list item into pxList, but rather than sort the list,
+	makes the new list item the last item to be removed by a call to
+	listGET_OWNER_OF_NEXT_ENTRY(). */
+	pxNewListItem->pxNext = pxIndex;
+ 800d46e:	683b      	ldr	r3, [r7, #0]
+ 800d470:	68fa      	ldr	r2, [r7, #12]
+ 800d472:	605a      	str	r2, [r3, #4]
+	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
+ 800d474:	68fb      	ldr	r3, [r7, #12]
+ 800d476:	689a      	ldr	r2, [r3, #8]
+ 800d478:	683b      	ldr	r3, [r7, #0]
+ 800d47a:	609a      	str	r2, [r3, #8]
+
+	/* Only used during decision coverage testing. */
+	mtCOVERAGE_TEST_DELAY();
+
+	pxIndex->pxPrevious->pxNext = pxNewListItem;
+ 800d47c:	68fb      	ldr	r3, [r7, #12]
+ 800d47e:	689b      	ldr	r3, [r3, #8]
+ 800d480:	683a      	ldr	r2, [r7, #0]
+ 800d482:	605a      	str	r2, [r3, #4]
+	pxIndex->pxPrevious = pxNewListItem;
+ 800d484:	68fb      	ldr	r3, [r7, #12]
+ 800d486:	683a      	ldr	r2, [r7, #0]
+ 800d488:	609a      	str	r2, [r3, #8]
+
+	/* Remember which list the item is in. */
+	pxNewListItem->pxContainer = pxList;
+ 800d48a:	683b      	ldr	r3, [r7, #0]
+ 800d48c:	687a      	ldr	r2, [r7, #4]
+ 800d48e:	611a      	str	r2, [r3, #16]
+
+	( pxList->uxNumberOfItems )++;
+ 800d490:	687b      	ldr	r3, [r7, #4]
+ 800d492:	681b      	ldr	r3, [r3, #0]
+ 800d494:	1c5a      	adds	r2, r3, #1
+ 800d496:	687b      	ldr	r3, [r7, #4]
+ 800d498:	601a      	str	r2, [r3, #0]
+}
+ 800d49a:	bf00      	nop
+ 800d49c:	3714      	adds	r7, #20
+ 800d49e:	46bd      	mov	sp, r7
+ 800d4a0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800d4a4:	4770      	bx	lr
+
+0800d4a6 <vListInsert>:
+/*-----------------------------------------------------------*/
+
+void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
+{
+ 800d4a6:	b480      	push	{r7}
+ 800d4a8:	b085      	sub	sp, #20
+ 800d4aa:	af00      	add	r7, sp, #0
+ 800d4ac:	6078      	str	r0, [r7, #4]
+ 800d4ae:	6039      	str	r1, [r7, #0]
+ListItem_t *pxIterator;
+const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
+ 800d4b0:	683b      	ldr	r3, [r7, #0]
+ 800d4b2:	681b      	ldr	r3, [r3, #0]
+ 800d4b4:	60bb      	str	r3, [r7, #8]
+	new list item should be placed after it.  This ensures that TCBs which are
+	stored in ready lists (all of which have the same xItemValue value) get a
+	share of the CPU.  However, if the xItemValue is the same as the back marker
+	the iteration loop below will not end.  Therefore the value is checked
+	first, and the algorithm slightly modified if necessary. */
+	if( xValueOfInsertion == portMAX_DELAY )
+ 800d4b6:	68bb      	ldr	r3, [r7, #8]
+ 800d4b8:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800d4bc:	d103      	bne.n	800d4c6 <vListInsert+0x20>
+	{
+		pxIterator = pxList->xListEnd.pxPrevious;
+ 800d4be:	687b      	ldr	r3, [r7, #4]
+ 800d4c0:	691b      	ldr	r3, [r3, #16]
+ 800d4c2:	60fb      	str	r3, [r7, #12]
+ 800d4c4:	e00c      	b.n	800d4e0 <vListInsert+0x3a>
+			4) Using a queue or semaphore before it has been initialised or
+			   before the scheduler has been started (are interrupts firing
+			   before vTaskStartScheduler() has been called?).
+		**********************************************************************/
+
+		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
+ 800d4c6:	687b      	ldr	r3, [r7, #4]
+ 800d4c8:	3308      	adds	r3, #8
+ 800d4ca:	60fb      	str	r3, [r7, #12]
+ 800d4cc:	e002      	b.n	800d4d4 <vListInsert+0x2e>
+ 800d4ce:	68fb      	ldr	r3, [r7, #12]
+ 800d4d0:	685b      	ldr	r3, [r3, #4]
+ 800d4d2:	60fb      	str	r3, [r7, #12]
+ 800d4d4:	68fb      	ldr	r3, [r7, #12]
+ 800d4d6:	685b      	ldr	r3, [r3, #4]
+ 800d4d8:	681b      	ldr	r3, [r3, #0]
+ 800d4da:	68ba      	ldr	r2, [r7, #8]
+ 800d4dc:	429a      	cmp	r2, r3
+ 800d4de:	d2f6      	bcs.n	800d4ce <vListInsert+0x28>
+			/* There is nothing to do here, just iterating to the wanted
+			insertion position. */
+		}
+	}
+
+	pxNewListItem->pxNext = pxIterator->pxNext;
+ 800d4e0:	68fb      	ldr	r3, [r7, #12]
+ 800d4e2:	685a      	ldr	r2, [r3, #4]
+ 800d4e4:	683b      	ldr	r3, [r7, #0]
+ 800d4e6:	605a      	str	r2, [r3, #4]
+	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
+ 800d4e8:	683b      	ldr	r3, [r7, #0]
+ 800d4ea:	685b      	ldr	r3, [r3, #4]
+ 800d4ec:	683a      	ldr	r2, [r7, #0]
+ 800d4ee:	609a      	str	r2, [r3, #8]
+	pxNewListItem->pxPrevious = pxIterator;
+ 800d4f0:	683b      	ldr	r3, [r7, #0]
+ 800d4f2:	68fa      	ldr	r2, [r7, #12]
+ 800d4f4:	609a      	str	r2, [r3, #8]
+	pxIterator->pxNext = pxNewListItem;
+ 800d4f6:	68fb      	ldr	r3, [r7, #12]
+ 800d4f8:	683a      	ldr	r2, [r7, #0]
+ 800d4fa:	605a      	str	r2, [r3, #4]
+
+	/* Remember which list the item is in.  This allows fast removal of the
+	item later. */
+	pxNewListItem->pxContainer = pxList;
+ 800d4fc:	683b      	ldr	r3, [r7, #0]
+ 800d4fe:	687a      	ldr	r2, [r7, #4]
+ 800d500:	611a      	str	r2, [r3, #16]
+
+	( pxList->uxNumberOfItems )++;
+ 800d502:	687b      	ldr	r3, [r7, #4]
+ 800d504:	681b      	ldr	r3, [r3, #0]
+ 800d506:	1c5a      	adds	r2, r3, #1
+ 800d508:	687b      	ldr	r3, [r7, #4]
+ 800d50a:	601a      	str	r2, [r3, #0]
+}
+ 800d50c:	bf00      	nop
+ 800d50e:	3714      	adds	r7, #20
+ 800d510:	46bd      	mov	sp, r7
+ 800d512:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800d516:	4770      	bx	lr
+
+0800d518 <uxListRemove>:
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
+{
+ 800d518:	b480      	push	{r7}
+ 800d51a:	b085      	sub	sp, #20
+ 800d51c:	af00      	add	r7, sp, #0
+ 800d51e:	6078      	str	r0, [r7, #4]
+/* The list item knows which list it is in.  Obtain the list from the list
+item. */
+List_t * const pxList = pxItemToRemove->pxContainer;
+ 800d520:	687b      	ldr	r3, [r7, #4]
+ 800d522:	691b      	ldr	r3, [r3, #16]
+ 800d524:	60fb      	str	r3, [r7, #12]
+
+	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+ 800d526:	687b      	ldr	r3, [r7, #4]
+ 800d528:	685b      	ldr	r3, [r3, #4]
+ 800d52a:	687a      	ldr	r2, [r7, #4]
+ 800d52c:	6892      	ldr	r2, [r2, #8]
+ 800d52e:	609a      	str	r2, [r3, #8]
+	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
+ 800d530:	687b      	ldr	r3, [r7, #4]
+ 800d532:	689b      	ldr	r3, [r3, #8]
+ 800d534:	687a      	ldr	r2, [r7, #4]
+ 800d536:	6852      	ldr	r2, [r2, #4]
+ 800d538:	605a      	str	r2, [r3, #4]
+
+	/* Only used during decision coverage testing. */
+	mtCOVERAGE_TEST_DELAY();
+
+	/* Make sure the index is left pointing to a valid item. */
+	if( pxList->pxIndex == pxItemToRemove )
+ 800d53a:	68fb      	ldr	r3, [r7, #12]
+ 800d53c:	685b      	ldr	r3, [r3, #4]
+ 800d53e:	687a      	ldr	r2, [r7, #4]
+ 800d540:	429a      	cmp	r2, r3
+ 800d542:	d103      	bne.n	800d54c <uxListRemove+0x34>
+	{
+		pxList->pxIndex = pxItemToRemove->pxPrevious;
+ 800d544:	687b      	ldr	r3, [r7, #4]
+ 800d546:	689a      	ldr	r2, [r3, #8]
+ 800d548:	68fb      	ldr	r3, [r7, #12]
+ 800d54a:	605a      	str	r2, [r3, #4]
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	pxItemToRemove->pxContainer = NULL;
+ 800d54c:	687b      	ldr	r3, [r7, #4]
+ 800d54e:	2200      	movs	r2, #0
+ 800d550:	611a      	str	r2, [r3, #16]
+	( pxList->uxNumberOfItems )--;
+ 800d552:	68fb      	ldr	r3, [r7, #12]
+ 800d554:	681b      	ldr	r3, [r3, #0]
+ 800d556:	1e5a      	subs	r2, r3, #1
+ 800d558:	68fb      	ldr	r3, [r7, #12]
+ 800d55a:	601a      	str	r2, [r3, #0]
+
+	return pxList->uxNumberOfItems;
+ 800d55c:	68fb      	ldr	r3, [r7, #12]
+ 800d55e:	681b      	ldr	r3, [r3, #0]
+}
+ 800d560:	4618      	mov	r0, r3
+ 800d562:	3714      	adds	r7, #20
+ 800d564:	46bd      	mov	sp, r7
+ 800d566:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800d56a:	4770      	bx	lr
+
+0800d56c <xQueueGenericReset>:
+	}														\
+	taskEXIT_CRITICAL()
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
+{
+ 800d56c:	b580      	push	{r7, lr}
+ 800d56e:	b084      	sub	sp, #16
+ 800d570:	af00      	add	r7, sp, #0
+ 800d572:	6078      	str	r0, [r7, #4]
+ 800d574:	6039      	str	r1, [r7, #0]
+Queue_t * const pxQueue = xQueue;
+ 800d576:	687b      	ldr	r3, [r7, #4]
+ 800d578:	60fb      	str	r3, [r7, #12]
+
+	configASSERT( pxQueue );
+ 800d57a:	68fb      	ldr	r3, [r7, #12]
+ 800d57c:	2b00      	cmp	r3, #0
+ 800d57e:	d10b      	bne.n	800d598 <xQueueGenericReset+0x2c>
+
+portFORCE_INLINE static void vPortRaiseBASEPRI( void )
+{
+uint32_t ulNewBASEPRI;
+
+	__asm volatile
+ 800d580:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d584:	b672      	cpsid	i
+ 800d586:	f383 8811 	msr	BASEPRI, r3
+ 800d58a:	f3bf 8f6f 	isb	sy
+ 800d58e:	f3bf 8f4f 	dsb	sy
+ 800d592:	b662      	cpsie	i
+ 800d594:	60bb      	str	r3, [r7, #8]
+ 800d596:	e7fe      	b.n	800d596 <xQueueGenericReset+0x2a>
+
+	taskENTER_CRITICAL();
+ 800d598:	f002 f9a6 	bl	800f8e8 <vPortEnterCritical>
+	{
+		pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
+ 800d59c:	68fb      	ldr	r3, [r7, #12]
+ 800d59e:	681a      	ldr	r2, [r3, #0]
+ 800d5a0:	68fb      	ldr	r3, [r7, #12]
+ 800d5a2:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 800d5a4:	68f9      	ldr	r1, [r7, #12]
+ 800d5a6:	6c09      	ldr	r1, [r1, #64]	; 0x40
+ 800d5a8:	fb01 f303 	mul.w	r3, r1, r3
+ 800d5ac:	441a      	add	r2, r3
+ 800d5ae:	68fb      	ldr	r3, [r7, #12]
+ 800d5b0:	609a      	str	r2, [r3, #8]
+		pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
+ 800d5b2:	68fb      	ldr	r3, [r7, #12]
+ 800d5b4:	2200      	movs	r2, #0
+ 800d5b6:	639a      	str	r2, [r3, #56]	; 0x38
+		pxQueue->pcWriteTo = pxQueue->pcHead;
+ 800d5b8:	68fb      	ldr	r3, [r7, #12]
+ 800d5ba:	681a      	ldr	r2, [r3, #0]
+ 800d5bc:	68fb      	ldr	r3, [r7, #12]
+ 800d5be:	605a      	str	r2, [r3, #4]
+		pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
+ 800d5c0:	68fb      	ldr	r3, [r7, #12]
+ 800d5c2:	681a      	ldr	r2, [r3, #0]
+ 800d5c4:	68fb      	ldr	r3, [r7, #12]
+ 800d5c6:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 800d5c8:	3b01      	subs	r3, #1
+ 800d5ca:	68f9      	ldr	r1, [r7, #12]
+ 800d5cc:	6c09      	ldr	r1, [r1, #64]	; 0x40
+ 800d5ce:	fb01 f303 	mul.w	r3, r1, r3
+ 800d5d2:	441a      	add	r2, r3
+ 800d5d4:	68fb      	ldr	r3, [r7, #12]
+ 800d5d6:	60da      	str	r2, [r3, #12]
+		pxQueue->cRxLock = queueUNLOCKED;
+ 800d5d8:	68fb      	ldr	r3, [r7, #12]
+ 800d5da:	22ff      	movs	r2, #255	; 0xff
+ 800d5dc:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+		pxQueue->cTxLock = queueUNLOCKED;
+ 800d5e0:	68fb      	ldr	r3, [r7, #12]
+ 800d5e2:	22ff      	movs	r2, #255	; 0xff
+ 800d5e4:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+
+		if( xNewQueue == pdFALSE )
+ 800d5e8:	683b      	ldr	r3, [r7, #0]
+ 800d5ea:	2b00      	cmp	r3, #0
+ 800d5ec:	d114      	bne.n	800d618 <xQueueGenericReset+0xac>
+			/* If there are tasks blocked waiting to read from the queue, then
+			the tasks will remain blocked as after this function exits the queue
+			will still be empty.  If there are tasks blocked waiting to write to
+			the queue, then one should be unblocked as after this function exits
+			it will be possible to write to it. */
+			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+ 800d5ee:	68fb      	ldr	r3, [r7, #12]
+ 800d5f0:	691b      	ldr	r3, [r3, #16]
+ 800d5f2:	2b00      	cmp	r3, #0
+ 800d5f4:	d01a      	beq.n	800d62c <xQueueGenericReset+0xc0>
+			{
+				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+ 800d5f6:	68fb      	ldr	r3, [r7, #12]
+ 800d5f8:	3310      	adds	r3, #16
+ 800d5fa:	4618      	mov	r0, r3
+ 800d5fc:	f001 fc70 	bl	800eee0 <xTaskRemoveFromEventList>
+ 800d600:	4603      	mov	r3, r0
+ 800d602:	2b00      	cmp	r3, #0
+ 800d604:	d012      	beq.n	800d62c <xQueueGenericReset+0xc0>
+				{
+					queueYIELD_IF_USING_PREEMPTION();
+ 800d606:	4b0d      	ldr	r3, [pc, #52]	; (800d63c <xQueueGenericReset+0xd0>)
+ 800d608:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800d60c:	601a      	str	r2, [r3, #0]
+ 800d60e:	f3bf 8f4f 	dsb	sy
+ 800d612:	f3bf 8f6f 	isb	sy
+ 800d616:	e009      	b.n	800d62c <xQueueGenericReset+0xc0>
+			}
+		}
+		else
+		{
+			/* Ensure the event queues start in the correct state. */
+			vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
+ 800d618:	68fb      	ldr	r3, [r7, #12]
+ 800d61a:	3310      	adds	r3, #16
+ 800d61c:	4618      	mov	r0, r3
+ 800d61e:	f7ff fef1 	bl	800d404 <vListInitialise>
+			vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
+ 800d622:	68fb      	ldr	r3, [r7, #12]
+ 800d624:	3324      	adds	r3, #36	; 0x24
+ 800d626:	4618      	mov	r0, r3
+ 800d628:	f7ff feec 	bl	800d404 <vListInitialise>
+		}
+	}
+	taskEXIT_CRITICAL();
+ 800d62c:	f002 f98e 	bl	800f94c <vPortExitCritical>
+
+	/* A value is returned for calling semantic consistency with previous
+	versions. */
+	return pdPASS;
+ 800d630:	2301      	movs	r3, #1
+}
+ 800d632:	4618      	mov	r0, r3
+ 800d634:	3710      	adds	r7, #16
+ 800d636:	46bd      	mov	sp, r7
+ 800d638:	bd80      	pop	{r7, pc}
+ 800d63a:	bf00      	nop
+ 800d63c:	e000ed04 	.word	0xe000ed04
+
+0800d640 <xQueueGenericCreateStatic>:
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+
+	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
+	{
+ 800d640:	b580      	push	{r7, lr}
+ 800d642:	b08e      	sub	sp, #56	; 0x38
+ 800d644:	af02      	add	r7, sp, #8
+ 800d646:	60f8      	str	r0, [r7, #12]
+ 800d648:	60b9      	str	r1, [r7, #8]
+ 800d64a:	607a      	str	r2, [r7, #4]
+ 800d64c:	603b      	str	r3, [r7, #0]
+	Queue_t *pxNewQueue;
+
+		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
+ 800d64e:	68fb      	ldr	r3, [r7, #12]
+ 800d650:	2b00      	cmp	r3, #0
+ 800d652:	d10b      	bne.n	800d66c <xQueueGenericCreateStatic+0x2c>
+ 800d654:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d658:	b672      	cpsid	i
+ 800d65a:	f383 8811 	msr	BASEPRI, r3
+ 800d65e:	f3bf 8f6f 	isb	sy
+ 800d662:	f3bf 8f4f 	dsb	sy
+ 800d666:	b662      	cpsie	i
+ 800d668:	62bb      	str	r3, [r7, #40]	; 0x28
+ 800d66a:	e7fe      	b.n	800d66a <xQueueGenericCreateStatic+0x2a>
+
+		/* The StaticQueue_t structure and the queue storage area must be
+		supplied. */
+		configASSERT( pxStaticQueue != NULL );
+ 800d66c:	683b      	ldr	r3, [r7, #0]
+ 800d66e:	2b00      	cmp	r3, #0
+ 800d670:	d10b      	bne.n	800d68a <xQueueGenericCreateStatic+0x4a>
+ 800d672:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d676:	b672      	cpsid	i
+ 800d678:	f383 8811 	msr	BASEPRI, r3
+ 800d67c:	f3bf 8f6f 	isb	sy
+ 800d680:	f3bf 8f4f 	dsb	sy
+ 800d684:	b662      	cpsie	i
+ 800d686:	627b      	str	r3, [r7, #36]	; 0x24
+ 800d688:	e7fe      	b.n	800d688 <xQueueGenericCreateStatic+0x48>
+
+		/* A queue storage area should be provided if the item size is not 0, and
+		should not be provided if the item size is 0. */
+		configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
+ 800d68a:	687b      	ldr	r3, [r7, #4]
+ 800d68c:	2b00      	cmp	r3, #0
+ 800d68e:	d002      	beq.n	800d696 <xQueueGenericCreateStatic+0x56>
+ 800d690:	68bb      	ldr	r3, [r7, #8]
+ 800d692:	2b00      	cmp	r3, #0
+ 800d694:	d001      	beq.n	800d69a <xQueueGenericCreateStatic+0x5a>
+ 800d696:	2301      	movs	r3, #1
+ 800d698:	e000      	b.n	800d69c <xQueueGenericCreateStatic+0x5c>
+ 800d69a:	2300      	movs	r3, #0
+ 800d69c:	2b00      	cmp	r3, #0
+ 800d69e:	d10b      	bne.n	800d6b8 <xQueueGenericCreateStatic+0x78>
+ 800d6a0:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d6a4:	b672      	cpsid	i
+ 800d6a6:	f383 8811 	msr	BASEPRI, r3
+ 800d6aa:	f3bf 8f6f 	isb	sy
+ 800d6ae:	f3bf 8f4f 	dsb	sy
+ 800d6b2:	b662      	cpsie	i
+ 800d6b4:	623b      	str	r3, [r7, #32]
+ 800d6b6:	e7fe      	b.n	800d6b6 <xQueueGenericCreateStatic+0x76>
+		configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
+ 800d6b8:	687b      	ldr	r3, [r7, #4]
+ 800d6ba:	2b00      	cmp	r3, #0
+ 800d6bc:	d102      	bne.n	800d6c4 <xQueueGenericCreateStatic+0x84>
+ 800d6be:	68bb      	ldr	r3, [r7, #8]
+ 800d6c0:	2b00      	cmp	r3, #0
+ 800d6c2:	d101      	bne.n	800d6c8 <xQueueGenericCreateStatic+0x88>
+ 800d6c4:	2301      	movs	r3, #1
+ 800d6c6:	e000      	b.n	800d6ca <xQueueGenericCreateStatic+0x8a>
+ 800d6c8:	2300      	movs	r3, #0
+ 800d6ca:	2b00      	cmp	r3, #0
+ 800d6cc:	d10b      	bne.n	800d6e6 <xQueueGenericCreateStatic+0xa6>
+ 800d6ce:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d6d2:	b672      	cpsid	i
+ 800d6d4:	f383 8811 	msr	BASEPRI, r3
+ 800d6d8:	f3bf 8f6f 	isb	sy
+ 800d6dc:	f3bf 8f4f 	dsb	sy
+ 800d6e0:	b662      	cpsie	i
+ 800d6e2:	61fb      	str	r3, [r7, #28]
+ 800d6e4:	e7fe      	b.n	800d6e4 <xQueueGenericCreateStatic+0xa4>
+		#if( configASSERT_DEFINED == 1 )
+		{
+			/* Sanity check that the size of the structure used to declare a
+			variable of type StaticQueue_t or StaticSemaphore_t equals the size of
+			the real queue and semaphore structures. */
+			volatile size_t xSize = sizeof( StaticQueue_t );
+ 800d6e6:	2348      	movs	r3, #72	; 0x48
+ 800d6e8:	617b      	str	r3, [r7, #20]
+			configASSERT( xSize == sizeof( Queue_t ) );
+ 800d6ea:	697b      	ldr	r3, [r7, #20]
+ 800d6ec:	2b48      	cmp	r3, #72	; 0x48
+ 800d6ee:	d00b      	beq.n	800d708 <xQueueGenericCreateStatic+0xc8>
+ 800d6f0:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d6f4:	b672      	cpsid	i
+ 800d6f6:	f383 8811 	msr	BASEPRI, r3
+ 800d6fa:	f3bf 8f6f 	isb	sy
+ 800d6fe:	f3bf 8f4f 	dsb	sy
+ 800d702:	b662      	cpsie	i
+ 800d704:	61bb      	str	r3, [r7, #24]
+ 800d706:	e7fe      	b.n	800d706 <xQueueGenericCreateStatic+0xc6>
+			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
+ 800d708:	697b      	ldr	r3, [r7, #20]
+		#endif /* configASSERT_DEFINED */
+
+		/* The address of a statically allocated queue was passed in, use it.
+		The address of a statically allocated storage area was also passed in
+		but is already set. */
+		pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
+ 800d70a:	683b      	ldr	r3, [r7, #0]
+ 800d70c:	62fb      	str	r3, [r7, #44]	; 0x2c
+
+		if( pxNewQueue != NULL )
+ 800d70e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800d710:	2b00      	cmp	r3, #0
+ 800d712:	d00d      	beq.n	800d730 <xQueueGenericCreateStatic+0xf0>
+			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+			{
+				/* Queues can be allocated wither statically or dynamically, so
+				note this queue was allocated statically in case the queue is
+				later deleted. */
+				pxNewQueue->ucStaticallyAllocated = pdTRUE;
+ 800d714:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800d716:	2201      	movs	r2, #1
+ 800d718:	f883 2046 	strb.w	r2, [r3, #70]	; 0x46
+			}
+			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+
+			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
+ 800d71c:	f897 2038 	ldrb.w	r2, [r7, #56]	; 0x38
+ 800d720:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800d722:	9300      	str	r3, [sp, #0]
+ 800d724:	4613      	mov	r3, r2
+ 800d726:	687a      	ldr	r2, [r7, #4]
+ 800d728:	68b9      	ldr	r1, [r7, #8]
+ 800d72a:	68f8      	ldr	r0, [r7, #12]
+ 800d72c:	f000 f846 	bl	800d7bc <prvInitialiseNewQueue>
+		{
+			traceQUEUE_CREATE_FAILED( ucQueueType );
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return pxNewQueue;
+ 800d730:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+	}
+ 800d732:	4618      	mov	r0, r3
+ 800d734:	3730      	adds	r7, #48	; 0x30
+ 800d736:	46bd      	mov	sp, r7
+ 800d738:	bd80      	pop	{r7, pc}
+
+0800d73a <xQueueGenericCreate>:
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+
+	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
+	{
+ 800d73a:	b580      	push	{r7, lr}
+ 800d73c:	b08a      	sub	sp, #40	; 0x28
+ 800d73e:	af02      	add	r7, sp, #8
+ 800d740:	60f8      	str	r0, [r7, #12]
+ 800d742:	60b9      	str	r1, [r7, #8]
+ 800d744:	4613      	mov	r3, r2
+ 800d746:	71fb      	strb	r3, [r7, #7]
+	Queue_t *pxNewQueue;
+	size_t xQueueSizeInBytes;
+	uint8_t *pucQueueStorage;
+
+		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
+ 800d748:	68fb      	ldr	r3, [r7, #12]
+ 800d74a:	2b00      	cmp	r3, #0
+ 800d74c:	d10b      	bne.n	800d766 <xQueueGenericCreate+0x2c>
+ 800d74e:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d752:	b672      	cpsid	i
+ 800d754:	f383 8811 	msr	BASEPRI, r3
+ 800d758:	f3bf 8f6f 	isb	sy
+ 800d75c:	f3bf 8f4f 	dsb	sy
+ 800d760:	b662      	cpsie	i
+ 800d762:	613b      	str	r3, [r7, #16]
+ 800d764:	e7fe      	b.n	800d764 <xQueueGenericCreate+0x2a>
+
+		if( uxItemSize == ( UBaseType_t ) 0 )
+ 800d766:	68bb      	ldr	r3, [r7, #8]
+ 800d768:	2b00      	cmp	r3, #0
+ 800d76a:	d102      	bne.n	800d772 <xQueueGenericCreate+0x38>
+		{
+			/* There is not going to be a queue storage area. */
+			xQueueSizeInBytes = ( size_t ) 0;
+ 800d76c:	2300      	movs	r3, #0
+ 800d76e:	61fb      	str	r3, [r7, #28]
+ 800d770:	e004      	b.n	800d77c <xQueueGenericCreate+0x42>
+		}
+		else
+		{
+			/* Allocate enough space to hold the maximum number of items that
+			can be in the queue at any time. */
+			xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+ 800d772:	68fb      	ldr	r3, [r7, #12]
+ 800d774:	68ba      	ldr	r2, [r7, #8]
+ 800d776:	fb02 f303 	mul.w	r3, r2, r3
+ 800d77a:	61fb      	str	r3, [r7, #28]
+		alignment requirements of the Queue_t structure - which in this case
+		is an int8_t *.  Therefore, whenever the stack alignment requirements
+		are greater than or equal to the pointer to char requirements the cast
+		is safe.  In other cases alignment requirements are not strict (one or
+		two bytes). */
+		pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
+ 800d77c:	69fb      	ldr	r3, [r7, #28]
+ 800d77e:	3348      	adds	r3, #72	; 0x48
+ 800d780:	4618      	mov	r0, r3
+ 800d782:	f002 f9d3 	bl	800fb2c <pvPortMalloc>
+ 800d786:	61b8      	str	r0, [r7, #24]
+
+		if( pxNewQueue != NULL )
+ 800d788:	69bb      	ldr	r3, [r7, #24]
+ 800d78a:	2b00      	cmp	r3, #0
+ 800d78c:	d011      	beq.n	800d7b2 <xQueueGenericCreate+0x78>
+		{
+			/* Jump past the queue structure to find the location of the queue
+			storage area. */
+			pucQueueStorage = ( uint8_t * ) pxNewQueue;
+ 800d78e:	69bb      	ldr	r3, [r7, #24]
+ 800d790:	617b      	str	r3, [r7, #20]
+			pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
+ 800d792:	697b      	ldr	r3, [r7, #20]
+ 800d794:	3348      	adds	r3, #72	; 0x48
+ 800d796:	617b      	str	r3, [r7, #20]
+			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+			{
+				/* Queues can be created either statically or dynamically, so
+				note this task was created dynamically in case it is later
+				deleted. */
+				pxNewQueue->ucStaticallyAllocated = pdFALSE;
+ 800d798:	69bb      	ldr	r3, [r7, #24]
+ 800d79a:	2200      	movs	r2, #0
+ 800d79c:	f883 2046 	strb.w	r2, [r3, #70]	; 0x46
+			}
+			#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
+ 800d7a0:	79fa      	ldrb	r2, [r7, #7]
+ 800d7a2:	69bb      	ldr	r3, [r7, #24]
+ 800d7a4:	9300      	str	r3, [sp, #0]
+ 800d7a6:	4613      	mov	r3, r2
+ 800d7a8:	697a      	ldr	r2, [r7, #20]
+ 800d7aa:	68b9      	ldr	r1, [r7, #8]
+ 800d7ac:	68f8      	ldr	r0, [r7, #12]
+ 800d7ae:	f000 f805 	bl	800d7bc <prvInitialiseNewQueue>
+		{
+			traceQUEUE_CREATE_FAILED( ucQueueType );
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return pxNewQueue;
+ 800d7b2:	69bb      	ldr	r3, [r7, #24]
+	}
+ 800d7b4:	4618      	mov	r0, r3
+ 800d7b6:	3720      	adds	r7, #32
+ 800d7b8:	46bd      	mov	sp, r7
+ 800d7ba:	bd80      	pop	{r7, pc}
+
+0800d7bc <prvInitialiseNewQueue>:
+
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+/*-----------------------------------------------------------*/
+
+static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
+{
+ 800d7bc:	b580      	push	{r7, lr}
+ 800d7be:	b084      	sub	sp, #16
+ 800d7c0:	af00      	add	r7, sp, #0
+ 800d7c2:	60f8      	str	r0, [r7, #12]
+ 800d7c4:	60b9      	str	r1, [r7, #8]
+ 800d7c6:	607a      	str	r2, [r7, #4]
+ 800d7c8:	70fb      	strb	r3, [r7, #3]
+	/* Remove compiler warnings about unused parameters should
+	configUSE_TRACE_FACILITY not be set to 1. */
+	( void ) ucQueueType;
+
+	if( uxItemSize == ( UBaseType_t ) 0 )
+ 800d7ca:	68bb      	ldr	r3, [r7, #8]
+ 800d7cc:	2b00      	cmp	r3, #0
+ 800d7ce:	d103      	bne.n	800d7d8 <prvInitialiseNewQueue+0x1c>
+	{
+		/* No RAM was allocated for the queue storage area, but PC head cannot
+		be set to NULL because NULL is used as a key to say the queue is used as
+		a mutex.  Therefore just set pcHead to point to the queue as a benign
+		value that is known to be within the memory map. */
+		pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
+ 800d7d0:	69bb      	ldr	r3, [r7, #24]
+ 800d7d2:	69ba      	ldr	r2, [r7, #24]
+ 800d7d4:	601a      	str	r2, [r3, #0]
+ 800d7d6:	e002      	b.n	800d7de <prvInitialiseNewQueue+0x22>
+	}
+	else
+	{
+		/* Set the head to the start of the queue storage area. */
+		pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
+ 800d7d8:	69bb      	ldr	r3, [r7, #24]
+ 800d7da:	687a      	ldr	r2, [r7, #4]
+ 800d7dc:	601a      	str	r2, [r3, #0]
+	}
+
+	/* Initialise the queue members as described where the queue type is
+	defined. */
+	pxNewQueue->uxLength = uxQueueLength;
+ 800d7de:	69bb      	ldr	r3, [r7, #24]
+ 800d7e0:	68fa      	ldr	r2, [r7, #12]
+ 800d7e2:	63da      	str	r2, [r3, #60]	; 0x3c
+	pxNewQueue->uxItemSize = uxItemSize;
+ 800d7e4:	69bb      	ldr	r3, [r7, #24]
+ 800d7e6:	68ba      	ldr	r2, [r7, #8]
+ 800d7e8:	641a      	str	r2, [r3, #64]	; 0x40
+	( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
+ 800d7ea:	2101      	movs	r1, #1
+ 800d7ec:	69b8      	ldr	r0, [r7, #24]
+ 800d7ee:	f7ff febd 	bl	800d56c <xQueueGenericReset>
+		pxNewQueue->pxQueueSetContainer = NULL;
+	}
+	#endif /* configUSE_QUEUE_SETS */
+
+	traceQUEUE_CREATE( pxNewQueue );
+}
+ 800d7f2:	bf00      	nop
+ 800d7f4:	3710      	adds	r7, #16
+ 800d7f6:	46bd      	mov	sp, r7
+ 800d7f8:	bd80      	pop	{r7, pc}
+
+0800d7fa <prvInitialiseMutex>:
+/*-----------------------------------------------------------*/
+
+#if( configUSE_MUTEXES == 1 )
+
+	static void prvInitialiseMutex( Queue_t *pxNewQueue )
+	{
+ 800d7fa:	b580      	push	{r7, lr}
+ 800d7fc:	b082      	sub	sp, #8
+ 800d7fe:	af00      	add	r7, sp, #0
+ 800d800:	6078      	str	r0, [r7, #4]
+		if( pxNewQueue != NULL )
+ 800d802:	687b      	ldr	r3, [r7, #4]
+ 800d804:	2b00      	cmp	r3, #0
+ 800d806:	d00e      	beq.n	800d826 <prvInitialiseMutex+0x2c>
+		{
+			/* The queue create function will set all the queue structure members
+			correctly for a generic queue, but this function is creating a
+			mutex.  Overwrite those members that need to be set differently -
+			in particular the information required for priority inheritance. */
+			pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
+ 800d808:	687b      	ldr	r3, [r7, #4]
+ 800d80a:	2200      	movs	r2, #0
+ 800d80c:	609a      	str	r2, [r3, #8]
+			pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
+ 800d80e:	687b      	ldr	r3, [r7, #4]
+ 800d810:	2200      	movs	r2, #0
+ 800d812:	601a      	str	r2, [r3, #0]
+
+			/* In case this is a recursive mutex. */
+			pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
+ 800d814:	687b      	ldr	r3, [r7, #4]
+ 800d816:	2200      	movs	r2, #0
+ 800d818:	60da      	str	r2, [r3, #12]
+
+			traceCREATE_MUTEX( pxNewQueue );
+
+			/* Start with the semaphore in the expected state. */
+			( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
+ 800d81a:	2300      	movs	r3, #0
+ 800d81c:	2200      	movs	r2, #0
+ 800d81e:	2100      	movs	r1, #0
+ 800d820:	6878      	ldr	r0, [r7, #4]
+ 800d822:	f000 f8a5 	bl	800d970 <xQueueGenericSend>
+		}
+		else
+		{
+			traceCREATE_MUTEX_FAILED();
+		}
+	}
+ 800d826:	bf00      	nop
+ 800d828:	3708      	adds	r7, #8
+ 800d82a:	46bd      	mov	sp, r7
+ 800d82c:	bd80      	pop	{r7, pc}
+
+0800d82e <xQueueCreateMutex>:
+/*-----------------------------------------------------------*/
+
+#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+
+	QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
+	{
+ 800d82e:	b580      	push	{r7, lr}
+ 800d830:	b086      	sub	sp, #24
+ 800d832:	af00      	add	r7, sp, #0
+ 800d834:	4603      	mov	r3, r0
+ 800d836:	71fb      	strb	r3, [r7, #7]
+	QueueHandle_t xNewQueue;
+	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
+ 800d838:	2301      	movs	r3, #1
+ 800d83a:	617b      	str	r3, [r7, #20]
+ 800d83c:	2300      	movs	r3, #0
+ 800d83e:	613b      	str	r3, [r7, #16]
+
+		xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
+ 800d840:	79fb      	ldrb	r3, [r7, #7]
+ 800d842:	461a      	mov	r2, r3
+ 800d844:	6939      	ldr	r1, [r7, #16]
+ 800d846:	6978      	ldr	r0, [r7, #20]
+ 800d848:	f7ff ff77 	bl	800d73a <xQueueGenericCreate>
+ 800d84c:	60f8      	str	r0, [r7, #12]
+		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
+ 800d84e:	68f8      	ldr	r0, [r7, #12]
+ 800d850:	f7ff ffd3 	bl	800d7fa <prvInitialiseMutex>
+
+		return xNewQueue;
+ 800d854:	68fb      	ldr	r3, [r7, #12]
+	}
+ 800d856:	4618      	mov	r0, r3
+ 800d858:	3718      	adds	r7, #24
+ 800d85a:	46bd      	mov	sp, r7
+ 800d85c:	bd80      	pop	{r7, pc}
+
+0800d85e <xQueueCreateMutexStatic>:
+/*-----------------------------------------------------------*/
+
+#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+
+	QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
+	{
+ 800d85e:	b580      	push	{r7, lr}
+ 800d860:	b088      	sub	sp, #32
+ 800d862:	af02      	add	r7, sp, #8
+ 800d864:	4603      	mov	r3, r0
+ 800d866:	6039      	str	r1, [r7, #0]
+ 800d868:	71fb      	strb	r3, [r7, #7]
+	QueueHandle_t xNewQueue;
+	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
+ 800d86a:	2301      	movs	r3, #1
+ 800d86c:	617b      	str	r3, [r7, #20]
+ 800d86e:	2300      	movs	r3, #0
+ 800d870:	613b      	str	r3, [r7, #16]
+
+		/* Prevent compiler warnings about unused parameters if
+		configUSE_TRACE_FACILITY does not equal 1. */
+		( void ) ucQueueType;
+
+		xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
+ 800d872:	79fb      	ldrb	r3, [r7, #7]
+ 800d874:	9300      	str	r3, [sp, #0]
+ 800d876:	683b      	ldr	r3, [r7, #0]
+ 800d878:	2200      	movs	r2, #0
+ 800d87a:	6939      	ldr	r1, [r7, #16]
+ 800d87c:	6978      	ldr	r0, [r7, #20]
+ 800d87e:	f7ff fedf 	bl	800d640 <xQueueGenericCreateStatic>
+ 800d882:	60f8      	str	r0, [r7, #12]
+		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
+ 800d884:	68f8      	ldr	r0, [r7, #12]
+ 800d886:	f7ff ffb8 	bl	800d7fa <prvInitialiseMutex>
+
+		return xNewQueue;
+ 800d88a:	68fb      	ldr	r3, [r7, #12]
+	}
+ 800d88c:	4618      	mov	r0, r3
+ 800d88e:	3718      	adds	r7, #24
+ 800d890:	46bd      	mov	sp, r7
+ 800d892:	bd80      	pop	{r7, pc}
+
+0800d894 <xQueueCreateCountingSemaphoreStatic>:
+/*-----------------------------------------------------------*/
+
+#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+
+	QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )
+	{
+ 800d894:	b580      	push	{r7, lr}
+ 800d896:	b08a      	sub	sp, #40	; 0x28
+ 800d898:	af02      	add	r7, sp, #8
+ 800d89a:	60f8      	str	r0, [r7, #12]
+ 800d89c:	60b9      	str	r1, [r7, #8]
+ 800d89e:	607a      	str	r2, [r7, #4]
+	QueueHandle_t xHandle;
+
+		configASSERT( uxMaxCount != 0 );
+ 800d8a0:	68fb      	ldr	r3, [r7, #12]
+ 800d8a2:	2b00      	cmp	r3, #0
+ 800d8a4:	d10b      	bne.n	800d8be <xQueueCreateCountingSemaphoreStatic+0x2a>
+ 800d8a6:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d8aa:	b672      	cpsid	i
+ 800d8ac:	f383 8811 	msr	BASEPRI, r3
+ 800d8b0:	f3bf 8f6f 	isb	sy
+ 800d8b4:	f3bf 8f4f 	dsb	sy
+ 800d8b8:	b662      	cpsie	i
+ 800d8ba:	61bb      	str	r3, [r7, #24]
+ 800d8bc:	e7fe      	b.n	800d8bc <xQueueCreateCountingSemaphoreStatic+0x28>
+		configASSERT( uxInitialCount <= uxMaxCount );
+ 800d8be:	68ba      	ldr	r2, [r7, #8]
+ 800d8c0:	68fb      	ldr	r3, [r7, #12]
+ 800d8c2:	429a      	cmp	r2, r3
+ 800d8c4:	d90b      	bls.n	800d8de <xQueueCreateCountingSemaphoreStatic+0x4a>
+ 800d8c6:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d8ca:	b672      	cpsid	i
+ 800d8cc:	f383 8811 	msr	BASEPRI, r3
+ 800d8d0:	f3bf 8f6f 	isb	sy
+ 800d8d4:	f3bf 8f4f 	dsb	sy
+ 800d8d8:	b662      	cpsie	i
+ 800d8da:	617b      	str	r3, [r7, #20]
+ 800d8dc:	e7fe      	b.n	800d8dc <xQueueCreateCountingSemaphoreStatic+0x48>
+
+		xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
+ 800d8de:	2302      	movs	r3, #2
+ 800d8e0:	9300      	str	r3, [sp, #0]
+ 800d8e2:	687b      	ldr	r3, [r7, #4]
+ 800d8e4:	2200      	movs	r2, #0
+ 800d8e6:	2100      	movs	r1, #0
+ 800d8e8:	68f8      	ldr	r0, [r7, #12]
+ 800d8ea:	f7ff fea9 	bl	800d640 <xQueueGenericCreateStatic>
+ 800d8ee:	61f8      	str	r0, [r7, #28]
+
+		if( xHandle != NULL )
+ 800d8f0:	69fb      	ldr	r3, [r7, #28]
+ 800d8f2:	2b00      	cmp	r3, #0
+ 800d8f4:	d002      	beq.n	800d8fc <xQueueCreateCountingSemaphoreStatic+0x68>
+		{
+			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
+ 800d8f6:	69fb      	ldr	r3, [r7, #28]
+ 800d8f8:	68ba      	ldr	r2, [r7, #8]
+ 800d8fa:	639a      	str	r2, [r3, #56]	; 0x38
+		else
+		{
+			traceCREATE_COUNTING_SEMAPHORE_FAILED();
+		}
+
+		return xHandle;
+ 800d8fc:	69fb      	ldr	r3, [r7, #28]
+	}
+ 800d8fe:	4618      	mov	r0, r3
+ 800d900:	3720      	adds	r7, #32
+ 800d902:	46bd      	mov	sp, r7
+ 800d904:	bd80      	pop	{r7, pc}
+
+0800d906 <xQueueCreateCountingSemaphore>:
+/*-----------------------------------------------------------*/
+
+#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+
+	QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )
+	{
+ 800d906:	b580      	push	{r7, lr}
+ 800d908:	b086      	sub	sp, #24
+ 800d90a:	af00      	add	r7, sp, #0
+ 800d90c:	6078      	str	r0, [r7, #4]
+ 800d90e:	6039      	str	r1, [r7, #0]
+	QueueHandle_t xHandle;
+
+		configASSERT( uxMaxCount != 0 );
+ 800d910:	687b      	ldr	r3, [r7, #4]
+ 800d912:	2b00      	cmp	r3, #0
+ 800d914:	d10b      	bne.n	800d92e <xQueueCreateCountingSemaphore+0x28>
+ 800d916:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d91a:	b672      	cpsid	i
+ 800d91c:	f383 8811 	msr	BASEPRI, r3
+ 800d920:	f3bf 8f6f 	isb	sy
+ 800d924:	f3bf 8f4f 	dsb	sy
+ 800d928:	b662      	cpsie	i
+ 800d92a:	613b      	str	r3, [r7, #16]
+ 800d92c:	e7fe      	b.n	800d92c <xQueueCreateCountingSemaphore+0x26>
+		configASSERT( uxInitialCount <= uxMaxCount );
+ 800d92e:	683a      	ldr	r2, [r7, #0]
+ 800d930:	687b      	ldr	r3, [r7, #4]
+ 800d932:	429a      	cmp	r2, r3
+ 800d934:	d90b      	bls.n	800d94e <xQueueCreateCountingSemaphore+0x48>
+ 800d936:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d93a:	b672      	cpsid	i
+ 800d93c:	f383 8811 	msr	BASEPRI, r3
+ 800d940:	f3bf 8f6f 	isb	sy
+ 800d944:	f3bf 8f4f 	dsb	sy
+ 800d948:	b662      	cpsie	i
+ 800d94a:	60fb      	str	r3, [r7, #12]
+ 800d94c:	e7fe      	b.n	800d94c <xQueueCreateCountingSemaphore+0x46>
+
+		xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
+ 800d94e:	2202      	movs	r2, #2
+ 800d950:	2100      	movs	r1, #0
+ 800d952:	6878      	ldr	r0, [r7, #4]
+ 800d954:	f7ff fef1 	bl	800d73a <xQueueGenericCreate>
+ 800d958:	6178      	str	r0, [r7, #20]
+
+		if( xHandle != NULL )
+ 800d95a:	697b      	ldr	r3, [r7, #20]
+ 800d95c:	2b00      	cmp	r3, #0
+ 800d95e:	d002      	beq.n	800d966 <xQueueCreateCountingSemaphore+0x60>
+		{
+			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
+ 800d960:	697b      	ldr	r3, [r7, #20]
+ 800d962:	683a      	ldr	r2, [r7, #0]
+ 800d964:	639a      	str	r2, [r3, #56]	; 0x38
+		else
+		{
+			traceCREATE_COUNTING_SEMAPHORE_FAILED();
+		}
+
+		return xHandle;
+ 800d966:	697b      	ldr	r3, [r7, #20]
+	}
+ 800d968:	4618      	mov	r0, r3
+ 800d96a:	3718      	adds	r7, #24
+ 800d96c:	46bd      	mov	sp, r7
+ 800d96e:	bd80      	pop	{r7, pc}
+
+0800d970 <xQueueGenericSend>:
+
+#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
+{
+ 800d970:	b580      	push	{r7, lr}
+ 800d972:	b08e      	sub	sp, #56	; 0x38
+ 800d974:	af00      	add	r7, sp, #0
+ 800d976:	60f8      	str	r0, [r7, #12]
+ 800d978:	60b9      	str	r1, [r7, #8]
+ 800d97a:	607a      	str	r2, [r7, #4]
+ 800d97c:	603b      	str	r3, [r7, #0]
+BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
+ 800d97e:	2300      	movs	r3, #0
+ 800d980:	637b      	str	r3, [r7, #52]	; 0x34
+TimeOut_t xTimeOut;
+Queue_t * const pxQueue = xQueue;
+ 800d982:	68fb      	ldr	r3, [r7, #12]
+ 800d984:	633b      	str	r3, [r7, #48]	; 0x30
+
+	configASSERT( pxQueue );
+ 800d986:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800d988:	2b00      	cmp	r3, #0
+ 800d98a:	d10b      	bne.n	800d9a4 <xQueueGenericSend+0x34>
+ 800d98c:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d990:	b672      	cpsid	i
+ 800d992:	f383 8811 	msr	BASEPRI, r3
+ 800d996:	f3bf 8f6f 	isb	sy
+ 800d99a:	f3bf 8f4f 	dsb	sy
+ 800d99e:	b662      	cpsie	i
+ 800d9a0:	62bb      	str	r3, [r7, #40]	; 0x28
+ 800d9a2:	e7fe      	b.n	800d9a2 <xQueueGenericSend+0x32>
+	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+ 800d9a4:	68bb      	ldr	r3, [r7, #8]
+ 800d9a6:	2b00      	cmp	r3, #0
+ 800d9a8:	d103      	bne.n	800d9b2 <xQueueGenericSend+0x42>
+ 800d9aa:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800d9ac:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800d9ae:	2b00      	cmp	r3, #0
+ 800d9b0:	d101      	bne.n	800d9b6 <xQueueGenericSend+0x46>
+ 800d9b2:	2301      	movs	r3, #1
+ 800d9b4:	e000      	b.n	800d9b8 <xQueueGenericSend+0x48>
+ 800d9b6:	2300      	movs	r3, #0
+ 800d9b8:	2b00      	cmp	r3, #0
+ 800d9ba:	d10b      	bne.n	800d9d4 <xQueueGenericSend+0x64>
+ 800d9bc:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d9c0:	b672      	cpsid	i
+ 800d9c2:	f383 8811 	msr	BASEPRI, r3
+ 800d9c6:	f3bf 8f6f 	isb	sy
+ 800d9ca:	f3bf 8f4f 	dsb	sy
+ 800d9ce:	b662      	cpsie	i
+ 800d9d0:	627b      	str	r3, [r7, #36]	; 0x24
+ 800d9d2:	e7fe      	b.n	800d9d2 <xQueueGenericSend+0x62>
+	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
+ 800d9d4:	683b      	ldr	r3, [r7, #0]
+ 800d9d6:	2b02      	cmp	r3, #2
+ 800d9d8:	d103      	bne.n	800d9e2 <xQueueGenericSend+0x72>
+ 800d9da:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800d9dc:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 800d9de:	2b01      	cmp	r3, #1
+ 800d9e0:	d101      	bne.n	800d9e6 <xQueueGenericSend+0x76>
+ 800d9e2:	2301      	movs	r3, #1
+ 800d9e4:	e000      	b.n	800d9e8 <xQueueGenericSend+0x78>
+ 800d9e6:	2300      	movs	r3, #0
+ 800d9e8:	2b00      	cmp	r3, #0
+ 800d9ea:	d10b      	bne.n	800da04 <xQueueGenericSend+0x94>
+ 800d9ec:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800d9f0:	b672      	cpsid	i
+ 800d9f2:	f383 8811 	msr	BASEPRI, r3
+ 800d9f6:	f3bf 8f6f 	isb	sy
+ 800d9fa:	f3bf 8f4f 	dsb	sy
+ 800d9fe:	b662      	cpsie	i
+ 800da00:	623b      	str	r3, [r7, #32]
+ 800da02:	e7fe      	b.n	800da02 <xQueueGenericSend+0x92>
+	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+	{
+		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+ 800da04:	f001 fc2c 	bl	800f260 <xTaskGetSchedulerState>
+ 800da08:	4603      	mov	r3, r0
+ 800da0a:	2b00      	cmp	r3, #0
+ 800da0c:	d102      	bne.n	800da14 <xQueueGenericSend+0xa4>
+ 800da0e:	687b      	ldr	r3, [r7, #4]
+ 800da10:	2b00      	cmp	r3, #0
+ 800da12:	d101      	bne.n	800da18 <xQueueGenericSend+0xa8>
+ 800da14:	2301      	movs	r3, #1
+ 800da16:	e000      	b.n	800da1a <xQueueGenericSend+0xaa>
+ 800da18:	2300      	movs	r3, #0
+ 800da1a:	2b00      	cmp	r3, #0
+ 800da1c:	d10b      	bne.n	800da36 <xQueueGenericSend+0xc6>
+ 800da1e:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800da22:	b672      	cpsid	i
+ 800da24:	f383 8811 	msr	BASEPRI, r3
+ 800da28:	f3bf 8f6f 	isb	sy
+ 800da2c:	f3bf 8f4f 	dsb	sy
+ 800da30:	b662      	cpsie	i
+ 800da32:	61fb      	str	r3, [r7, #28]
+ 800da34:	e7fe      	b.n	800da34 <xQueueGenericSend+0xc4>
+	/*lint -save -e904 This function relaxes the coding standard somewhat to
+	allow return statements within the function itself.  This is done in the
+	interest of execution time efficiency. */
+	for( ;; )
+	{
+		taskENTER_CRITICAL();
+ 800da36:	f001 ff57 	bl	800f8e8 <vPortEnterCritical>
+		{
+			/* Is there room on the queue now?  The running task must be the
+			highest priority task wanting to access the queue.  If the head item
+			in the queue is to be overwritten then it does not matter if the
+			queue is full. */
+			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
+ 800da3a:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800da3c:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 800da3e:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800da40:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 800da42:	429a      	cmp	r2, r3
+ 800da44:	d302      	bcc.n	800da4c <xQueueGenericSend+0xdc>
+ 800da46:	683b      	ldr	r3, [r7, #0]
+ 800da48:	2b02      	cmp	r3, #2
+ 800da4a:	d129      	bne.n	800daa0 <xQueueGenericSend+0x130>
+						}
+					}
+				}
+				#else /* configUSE_QUEUE_SETS */
+				{
+					xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
+ 800da4c:	683a      	ldr	r2, [r7, #0]
+ 800da4e:	68b9      	ldr	r1, [r7, #8]
+ 800da50:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 800da52:	f000 fc4a 	bl	800e2ea <prvCopyDataToQueue>
+ 800da56:	62f8      	str	r0, [r7, #44]	; 0x2c
+
+					/* If there was a task waiting for data to arrive on the
+					queue then unblock it now. */
+					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+ 800da58:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800da5a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800da5c:	2b00      	cmp	r3, #0
+ 800da5e:	d010      	beq.n	800da82 <xQueueGenericSend+0x112>
+					{
+						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+ 800da60:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800da62:	3324      	adds	r3, #36	; 0x24
+ 800da64:	4618      	mov	r0, r3
+ 800da66:	f001 fa3b 	bl	800eee0 <xTaskRemoveFromEventList>
+ 800da6a:	4603      	mov	r3, r0
+ 800da6c:	2b00      	cmp	r3, #0
+ 800da6e:	d013      	beq.n	800da98 <xQueueGenericSend+0x128>
+						{
+							/* The unblocked task has a priority higher than
+							our own so yield immediately.  Yes it is ok to do
+							this from within the critical section - the kernel
+							takes care of that. */
+							queueYIELD_IF_USING_PREEMPTION();
+ 800da70:	4b3f      	ldr	r3, [pc, #252]	; (800db70 <xQueueGenericSend+0x200>)
+ 800da72:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800da76:	601a      	str	r2, [r3, #0]
+ 800da78:	f3bf 8f4f 	dsb	sy
+ 800da7c:	f3bf 8f6f 	isb	sy
+ 800da80:	e00a      	b.n	800da98 <xQueueGenericSend+0x128>
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else if( xYieldRequired != pdFALSE )
+ 800da82:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800da84:	2b00      	cmp	r3, #0
+ 800da86:	d007      	beq.n	800da98 <xQueueGenericSend+0x128>
+					{
+						/* This path is a special case that will only get
+						executed if the task was holding multiple mutexes and
+						the mutexes were given back in an order that is
+						different to that in which they were taken. */
+						queueYIELD_IF_USING_PREEMPTION();
+ 800da88:	4b39      	ldr	r3, [pc, #228]	; (800db70 <xQueueGenericSend+0x200>)
+ 800da8a:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800da8e:	601a      	str	r2, [r3, #0]
+ 800da90:	f3bf 8f4f 	dsb	sy
+ 800da94:	f3bf 8f6f 	isb	sy
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				#endif /* configUSE_QUEUE_SETS */
+
+				taskEXIT_CRITICAL();
+ 800da98:	f001 ff58 	bl	800f94c <vPortExitCritical>
+				return pdPASS;
+ 800da9c:	2301      	movs	r3, #1
+ 800da9e:	e063      	b.n	800db68 <xQueueGenericSend+0x1f8>
+			}
+			else
+			{
+				if( xTicksToWait == ( TickType_t ) 0 )
+ 800daa0:	687b      	ldr	r3, [r7, #4]
+ 800daa2:	2b00      	cmp	r3, #0
+ 800daa4:	d103      	bne.n	800daae <xQueueGenericSend+0x13e>
+				{
+					/* The queue was full and no block time is specified (or
+					the block time has expired) so leave now. */
+					taskEXIT_CRITICAL();
+ 800daa6:	f001 ff51 	bl	800f94c <vPortExitCritical>
+
+					/* Return to the original privilege level before exiting
+					the function. */
+					traceQUEUE_SEND_FAILED( pxQueue );
+					return errQUEUE_FULL;
+ 800daaa:	2300      	movs	r3, #0
+ 800daac:	e05c      	b.n	800db68 <xQueueGenericSend+0x1f8>
+				}
+				else if( xEntryTimeSet == pdFALSE )
+ 800daae:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 800dab0:	2b00      	cmp	r3, #0
+ 800dab2:	d106      	bne.n	800dac2 <xQueueGenericSend+0x152>
+				{
+					/* The queue was full and a block time was specified so
+					configure the timeout structure. */
+					vTaskInternalSetTimeOutState( &xTimeOut );
+ 800dab4:	f107 0314 	add.w	r3, r7, #20
+ 800dab8:	4618      	mov	r0, r3
+ 800daba:	f001 fa75 	bl	800efa8 <vTaskInternalSetTimeOutState>
+					xEntryTimeSet = pdTRUE;
+ 800dabe:	2301      	movs	r3, #1
+ 800dac0:	637b      	str	r3, [r7, #52]	; 0x34
+					/* Entry time was already set. */
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		taskEXIT_CRITICAL();
+ 800dac2:	f001 ff43 	bl	800f94c <vPortExitCritical>
+
+		/* Interrupts and other tasks can send to and receive from the queue
+		now the critical section has been exited. */
+
+		vTaskSuspendAll();
+ 800dac6:	f000 ffdb 	bl	800ea80 <vTaskSuspendAll>
+		prvLockQueue( pxQueue );
+ 800daca:	f001 ff0d 	bl	800f8e8 <vPortEnterCritical>
+ 800dace:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dad0:	f893 3044 	ldrb.w	r3, [r3, #68]	; 0x44
+ 800dad4:	b25b      	sxtb	r3, r3
+ 800dad6:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800dada:	d103      	bne.n	800dae4 <xQueueGenericSend+0x174>
+ 800dadc:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dade:	2200      	movs	r2, #0
+ 800dae0:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+ 800dae4:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dae6:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 800daea:	b25b      	sxtb	r3, r3
+ 800daec:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800daf0:	d103      	bne.n	800dafa <xQueueGenericSend+0x18a>
+ 800daf2:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800daf4:	2200      	movs	r2, #0
+ 800daf6:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+ 800dafa:	f001 ff27 	bl	800f94c <vPortExitCritical>
+
+		/* Update the timeout state to see if it has expired yet. */
+		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+ 800dafe:	1d3a      	adds	r2, r7, #4
+ 800db00:	f107 0314 	add.w	r3, r7, #20
+ 800db04:	4611      	mov	r1, r2
+ 800db06:	4618      	mov	r0, r3
+ 800db08:	f001 fa64 	bl	800efd4 <xTaskCheckForTimeOut>
+ 800db0c:	4603      	mov	r3, r0
+ 800db0e:	2b00      	cmp	r3, #0
+ 800db10:	d124      	bne.n	800db5c <xQueueGenericSend+0x1ec>
+		{
+			if( prvIsQueueFull( pxQueue ) != pdFALSE )
+ 800db12:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 800db14:	f000 fce1 	bl	800e4da <prvIsQueueFull>
+ 800db18:	4603      	mov	r3, r0
+ 800db1a:	2b00      	cmp	r3, #0
+ 800db1c:	d018      	beq.n	800db50 <xQueueGenericSend+0x1e0>
+			{
+				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
+				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
+ 800db1e:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800db20:	3310      	adds	r3, #16
+ 800db22:	687a      	ldr	r2, [r7, #4]
+ 800db24:	4611      	mov	r1, r2
+ 800db26:	4618      	mov	r0, r3
+ 800db28:	f001 f9b4 	bl	800ee94 <vTaskPlaceOnEventList>
+				/* Unlocking the queue means queue events can effect the
+				event list.  It is possible that interrupts occurring now
+				remove this task from the event list again - but as the
+				scheduler is suspended the task will go onto the pending
+				ready last instead of the actual ready list. */
+				prvUnlockQueue( pxQueue );
+ 800db2c:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 800db2e:	f000 fc6c 	bl	800e40a <prvUnlockQueue>
+				/* Resuming the scheduler will move tasks from the pending
+				ready list into the ready list - so it is feasible that this
+				task is already in a ready list before it yields - in which
+				case the yield will not cause a context switch unless there
+				is also a higher priority task in the pending ready list. */
+				if( xTaskResumeAll() == pdFALSE )
+ 800db32:	f000 ffb3 	bl	800ea9c <xTaskResumeAll>
+ 800db36:	4603      	mov	r3, r0
+ 800db38:	2b00      	cmp	r3, #0
+ 800db3a:	f47f af7c 	bne.w	800da36 <xQueueGenericSend+0xc6>
+				{
+					portYIELD_WITHIN_API();
+ 800db3e:	4b0c      	ldr	r3, [pc, #48]	; (800db70 <xQueueGenericSend+0x200>)
+ 800db40:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800db44:	601a      	str	r2, [r3, #0]
+ 800db46:	f3bf 8f4f 	dsb	sy
+ 800db4a:	f3bf 8f6f 	isb	sy
+ 800db4e:	e772      	b.n	800da36 <xQueueGenericSend+0xc6>
+				}
+			}
+			else
+			{
+				/* Try again. */
+				prvUnlockQueue( pxQueue );
+ 800db50:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 800db52:	f000 fc5a 	bl	800e40a <prvUnlockQueue>
+				( void ) xTaskResumeAll();
+ 800db56:	f000 ffa1 	bl	800ea9c <xTaskResumeAll>
+ 800db5a:	e76c      	b.n	800da36 <xQueueGenericSend+0xc6>
+			}
+		}
+		else
+		{
+			/* The timeout has expired. */
+			prvUnlockQueue( pxQueue );
+ 800db5c:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 800db5e:	f000 fc54 	bl	800e40a <prvUnlockQueue>
+			( void ) xTaskResumeAll();
+ 800db62:	f000 ff9b 	bl	800ea9c <xTaskResumeAll>
+
+			traceQUEUE_SEND_FAILED( pxQueue );
+			return errQUEUE_FULL;
+ 800db66:	2300      	movs	r3, #0
+		}
+	} /*lint -restore */
+}
+ 800db68:	4618      	mov	r0, r3
+ 800db6a:	3738      	adds	r7, #56	; 0x38
+ 800db6c:	46bd      	mov	sp, r7
+ 800db6e:	bd80      	pop	{r7, pc}
+ 800db70:	e000ed04 	.word	0xe000ed04
+
+0800db74 <xQueueGenericSendFromISR>:
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
+{
+ 800db74:	b580      	push	{r7, lr}
+ 800db76:	b08e      	sub	sp, #56	; 0x38
+ 800db78:	af00      	add	r7, sp, #0
+ 800db7a:	60f8      	str	r0, [r7, #12]
+ 800db7c:	60b9      	str	r1, [r7, #8]
+ 800db7e:	607a      	str	r2, [r7, #4]
+ 800db80:	603b      	str	r3, [r7, #0]
+BaseType_t xReturn;
+UBaseType_t uxSavedInterruptStatus;
+Queue_t * const pxQueue = xQueue;
+ 800db82:	68fb      	ldr	r3, [r7, #12]
+ 800db84:	633b      	str	r3, [r7, #48]	; 0x30
+
+	configASSERT( pxQueue );
+ 800db86:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800db88:	2b00      	cmp	r3, #0
+ 800db8a:	d10b      	bne.n	800dba4 <xQueueGenericSendFromISR+0x30>
+ 800db8c:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800db90:	b672      	cpsid	i
+ 800db92:	f383 8811 	msr	BASEPRI, r3
+ 800db96:	f3bf 8f6f 	isb	sy
+ 800db9a:	f3bf 8f4f 	dsb	sy
+ 800db9e:	b662      	cpsie	i
+ 800dba0:	627b      	str	r3, [r7, #36]	; 0x24
+ 800dba2:	e7fe      	b.n	800dba2 <xQueueGenericSendFromISR+0x2e>
+	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+ 800dba4:	68bb      	ldr	r3, [r7, #8]
+ 800dba6:	2b00      	cmp	r3, #0
+ 800dba8:	d103      	bne.n	800dbb2 <xQueueGenericSendFromISR+0x3e>
+ 800dbaa:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dbac:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800dbae:	2b00      	cmp	r3, #0
+ 800dbb0:	d101      	bne.n	800dbb6 <xQueueGenericSendFromISR+0x42>
+ 800dbb2:	2301      	movs	r3, #1
+ 800dbb4:	e000      	b.n	800dbb8 <xQueueGenericSendFromISR+0x44>
+ 800dbb6:	2300      	movs	r3, #0
+ 800dbb8:	2b00      	cmp	r3, #0
+ 800dbba:	d10b      	bne.n	800dbd4 <xQueueGenericSendFromISR+0x60>
+ 800dbbc:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800dbc0:	b672      	cpsid	i
+ 800dbc2:	f383 8811 	msr	BASEPRI, r3
+ 800dbc6:	f3bf 8f6f 	isb	sy
+ 800dbca:	f3bf 8f4f 	dsb	sy
+ 800dbce:	b662      	cpsie	i
+ 800dbd0:	623b      	str	r3, [r7, #32]
+ 800dbd2:	e7fe      	b.n	800dbd2 <xQueueGenericSendFromISR+0x5e>
+	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
+ 800dbd4:	683b      	ldr	r3, [r7, #0]
+ 800dbd6:	2b02      	cmp	r3, #2
+ 800dbd8:	d103      	bne.n	800dbe2 <xQueueGenericSendFromISR+0x6e>
+ 800dbda:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dbdc:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 800dbde:	2b01      	cmp	r3, #1
+ 800dbe0:	d101      	bne.n	800dbe6 <xQueueGenericSendFromISR+0x72>
+ 800dbe2:	2301      	movs	r3, #1
+ 800dbe4:	e000      	b.n	800dbe8 <xQueueGenericSendFromISR+0x74>
+ 800dbe6:	2300      	movs	r3, #0
+ 800dbe8:	2b00      	cmp	r3, #0
+ 800dbea:	d10b      	bne.n	800dc04 <xQueueGenericSendFromISR+0x90>
+ 800dbec:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800dbf0:	b672      	cpsid	i
+ 800dbf2:	f383 8811 	msr	BASEPRI, r3
+ 800dbf6:	f3bf 8f6f 	isb	sy
+ 800dbfa:	f3bf 8f4f 	dsb	sy
+ 800dbfe:	b662      	cpsie	i
+ 800dc00:	61fb      	str	r3, [r7, #28]
+ 800dc02:	e7fe      	b.n	800dc02 <xQueueGenericSendFromISR+0x8e>
+	that have been assigned a priority at or (logically) below the maximum
+	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
+	safe API to ensure interrupt entry is as fast and as simple as possible.
+	More information (albeit Cortex-M specific) is provided on the following
+	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
+	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+ 800dc04:	f001 ff50 	bl	800faa8 <vPortValidateInterruptPriority>
+
+portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
+{
+uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
+
+	__asm volatile
+ 800dc08:	f3ef 8211 	mrs	r2, BASEPRI
+ 800dc0c:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800dc10:	b672      	cpsid	i
+ 800dc12:	f383 8811 	msr	BASEPRI, r3
+ 800dc16:	f3bf 8f6f 	isb	sy
+ 800dc1a:	f3bf 8f4f 	dsb	sy
+ 800dc1e:	b662      	cpsie	i
+ 800dc20:	61ba      	str	r2, [r7, #24]
+ 800dc22:	617b      	str	r3, [r7, #20]
+		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+	);
+
+	/* This return will not be reached but is necessary to prevent compiler
+	warnings. */
+	return ulOriginalBASEPRI;
+ 800dc24:	69bb      	ldr	r3, [r7, #24]
+	/* Similar to xQueueGenericSend, except without blocking if there is no room
+	in the queue.  Also don't directly wake a task that was blocked on a queue
+	read, instead return a flag to say whether a context switch is required or
+	not (i.e. has a task with a higher priority than us been woken by this
+	post). */
+	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+ 800dc26:	62fb      	str	r3, [r7, #44]	; 0x2c
+	{
+		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
+ 800dc28:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dc2a:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 800dc2c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dc2e:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 800dc30:	429a      	cmp	r2, r3
+ 800dc32:	d302      	bcc.n	800dc3a <xQueueGenericSendFromISR+0xc6>
+ 800dc34:	683b      	ldr	r3, [r7, #0]
+ 800dc36:	2b02      	cmp	r3, #2
+ 800dc38:	d12c      	bne.n	800dc94 <xQueueGenericSendFromISR+0x120>
+		{
+			const int8_t cTxLock = pxQueue->cTxLock;
+ 800dc3a:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dc3c:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 800dc40:	f887 302b 	strb.w	r3, [r7, #43]	; 0x2b
+			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
+			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
+			in a task disinheriting a priority and prvCopyDataToQueue() can be
+			called here even though the disinherit function does not check if
+			the scheduler is suspended before accessing the ready lists. */
+			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
+ 800dc44:	683a      	ldr	r2, [r7, #0]
+ 800dc46:	68b9      	ldr	r1, [r7, #8]
+ 800dc48:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 800dc4a:	f000 fb4e 	bl	800e2ea <prvCopyDataToQueue>
+
+			/* The event list is not altered if the queue is locked.  This will
+			be done when the queue is unlocked later. */
+			if( cTxLock == queueUNLOCKED )
+ 800dc4e:	f997 302b 	ldrsb.w	r3, [r7, #43]	; 0x2b
+ 800dc52:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800dc56:	d112      	bne.n	800dc7e <xQueueGenericSendFromISR+0x10a>
+						}
+					}
+				}
+				#else /* configUSE_QUEUE_SETS */
+				{
+					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+ 800dc58:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dc5a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800dc5c:	2b00      	cmp	r3, #0
+ 800dc5e:	d016      	beq.n	800dc8e <xQueueGenericSendFromISR+0x11a>
+					{
+						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+ 800dc60:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dc62:	3324      	adds	r3, #36	; 0x24
+ 800dc64:	4618      	mov	r0, r3
+ 800dc66:	f001 f93b 	bl	800eee0 <xTaskRemoveFromEventList>
+ 800dc6a:	4603      	mov	r3, r0
+ 800dc6c:	2b00      	cmp	r3, #0
+ 800dc6e:	d00e      	beq.n	800dc8e <xQueueGenericSendFromISR+0x11a>
+						{
+							/* The task waiting has a higher priority so record that a
+							context	switch is required. */
+							if( pxHigherPriorityTaskWoken != NULL )
+ 800dc70:	687b      	ldr	r3, [r7, #4]
+ 800dc72:	2b00      	cmp	r3, #0
+ 800dc74:	d00b      	beq.n	800dc8e <xQueueGenericSendFromISR+0x11a>
+							{
+								*pxHigherPriorityTaskWoken = pdTRUE;
+ 800dc76:	687b      	ldr	r3, [r7, #4]
+ 800dc78:	2201      	movs	r2, #1
+ 800dc7a:	601a      	str	r2, [r3, #0]
+ 800dc7c:	e007      	b.n	800dc8e <xQueueGenericSendFromISR+0x11a>
+			}
+			else
+			{
+				/* Increment the lock count so the task that unlocks the queue
+				knows that data was posted while it was locked. */
+				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
+ 800dc7e:	f897 302b 	ldrb.w	r3, [r7, #43]	; 0x2b
+ 800dc82:	3301      	adds	r3, #1
+ 800dc84:	b2db      	uxtb	r3, r3
+ 800dc86:	b25a      	sxtb	r2, r3
+ 800dc88:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dc8a:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+			}
+
+			xReturn = pdPASS;
+ 800dc8e:	2301      	movs	r3, #1
+ 800dc90:	637b      	str	r3, [r7, #52]	; 0x34
+		{
+ 800dc92:	e001      	b.n	800dc98 <xQueueGenericSendFromISR+0x124>
+		}
+		else
+		{
+			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
+			xReturn = errQUEUE_FULL;
+ 800dc94:	2300      	movs	r3, #0
+ 800dc96:	637b      	str	r3, [r7, #52]	; 0x34
+ 800dc98:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800dc9a:	613b      	str	r3, [r7, #16]
+}
+/*-----------------------------------------------------------*/
+
+portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
+{
+	__asm volatile
+ 800dc9c:	693b      	ldr	r3, [r7, #16]
+ 800dc9e:	f383 8811 	msr	BASEPRI, r3
+		}
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+ 800dca2:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+}
+ 800dca4:	4618      	mov	r0, r3
+ 800dca6:	3738      	adds	r7, #56	; 0x38
+ 800dca8:	46bd      	mov	sp, r7
+ 800dcaa:	bd80      	pop	{r7, pc}
+
+0800dcac <xQueueGiveFromISR>:
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
+{
+ 800dcac:	b580      	push	{r7, lr}
+ 800dcae:	b08e      	sub	sp, #56	; 0x38
+ 800dcb0:	af00      	add	r7, sp, #0
+ 800dcb2:	6078      	str	r0, [r7, #4]
+ 800dcb4:	6039      	str	r1, [r7, #0]
+BaseType_t xReturn;
+UBaseType_t uxSavedInterruptStatus;
+Queue_t * const pxQueue = xQueue;
+ 800dcb6:	687b      	ldr	r3, [r7, #4]
+ 800dcb8:	633b      	str	r3, [r7, #48]	; 0x30
+	item size is 0.  Don't directly wake a task that was blocked on a queue
+	read, instead return a flag to say whether a context switch is required or
+	not (i.e. has a task with a higher priority than us been woken by this
+	post). */
+
+	configASSERT( pxQueue );
+ 800dcba:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dcbc:	2b00      	cmp	r3, #0
+ 800dcbe:	d10b      	bne.n	800dcd8 <xQueueGiveFromISR+0x2c>
+	__asm volatile
+ 800dcc0:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800dcc4:	b672      	cpsid	i
+ 800dcc6:	f383 8811 	msr	BASEPRI, r3
+ 800dcca:	f3bf 8f6f 	isb	sy
+ 800dcce:	f3bf 8f4f 	dsb	sy
+ 800dcd2:	b662      	cpsie	i
+ 800dcd4:	623b      	str	r3, [r7, #32]
+ 800dcd6:	e7fe      	b.n	800dcd6 <xQueueGiveFromISR+0x2a>
+
+	/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
+	if the item size is not 0. */
+	configASSERT( pxQueue->uxItemSize == 0 );
+ 800dcd8:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dcda:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800dcdc:	2b00      	cmp	r3, #0
+ 800dcde:	d00b      	beq.n	800dcf8 <xQueueGiveFromISR+0x4c>
+ 800dce0:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800dce4:	b672      	cpsid	i
+ 800dce6:	f383 8811 	msr	BASEPRI, r3
+ 800dcea:	f3bf 8f6f 	isb	sy
+ 800dcee:	f3bf 8f4f 	dsb	sy
+ 800dcf2:	b662      	cpsie	i
+ 800dcf4:	61fb      	str	r3, [r7, #28]
+ 800dcf6:	e7fe      	b.n	800dcf6 <xQueueGiveFromISR+0x4a>
+
+	/* Normally a mutex would not be given from an interrupt, especially if
+	there is a mutex holder, as priority inheritance makes no sense for an
+	interrupts, only tasks. */
+	configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
+ 800dcf8:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dcfa:	681b      	ldr	r3, [r3, #0]
+ 800dcfc:	2b00      	cmp	r3, #0
+ 800dcfe:	d103      	bne.n	800dd08 <xQueueGiveFromISR+0x5c>
+ 800dd00:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dd02:	689b      	ldr	r3, [r3, #8]
+ 800dd04:	2b00      	cmp	r3, #0
+ 800dd06:	d101      	bne.n	800dd0c <xQueueGiveFromISR+0x60>
+ 800dd08:	2301      	movs	r3, #1
+ 800dd0a:	e000      	b.n	800dd0e <xQueueGiveFromISR+0x62>
+ 800dd0c:	2300      	movs	r3, #0
+ 800dd0e:	2b00      	cmp	r3, #0
+ 800dd10:	d10b      	bne.n	800dd2a <xQueueGiveFromISR+0x7e>
+ 800dd12:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800dd16:	b672      	cpsid	i
+ 800dd18:	f383 8811 	msr	BASEPRI, r3
+ 800dd1c:	f3bf 8f6f 	isb	sy
+ 800dd20:	f3bf 8f4f 	dsb	sy
+ 800dd24:	b662      	cpsie	i
+ 800dd26:	61bb      	str	r3, [r7, #24]
+ 800dd28:	e7fe      	b.n	800dd28 <xQueueGiveFromISR+0x7c>
+	that have been assigned a priority at or (logically) below the maximum
+	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
+	safe API to ensure interrupt entry is as fast and as simple as possible.
+	More information (albeit Cortex-M specific) is provided on the following
+	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
+	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+ 800dd2a:	f001 febd 	bl	800faa8 <vPortValidateInterruptPriority>
+	__asm volatile
+ 800dd2e:	f3ef 8211 	mrs	r2, BASEPRI
+ 800dd32:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800dd36:	b672      	cpsid	i
+ 800dd38:	f383 8811 	msr	BASEPRI, r3
+ 800dd3c:	f3bf 8f6f 	isb	sy
+ 800dd40:	f3bf 8f4f 	dsb	sy
+ 800dd44:	b662      	cpsie	i
+ 800dd46:	617a      	str	r2, [r7, #20]
+ 800dd48:	613b      	str	r3, [r7, #16]
+	return ulOriginalBASEPRI;
+ 800dd4a:	697b      	ldr	r3, [r7, #20]
+
+	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+ 800dd4c:	62fb      	str	r3, [r7, #44]	; 0x2c
+	{
+		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+ 800dd4e:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dd50:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800dd52:	62bb      	str	r3, [r7, #40]	; 0x28
+
+		/* When the queue is used to implement a semaphore no data is ever
+		moved through the queue but it is still valid to see if the queue 'has
+		space'. */
+		if( uxMessagesWaiting < pxQueue->uxLength )
+ 800dd54:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dd56:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 800dd58:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 800dd5a:	429a      	cmp	r2, r3
+ 800dd5c:	d22b      	bcs.n	800ddb6 <xQueueGiveFromISR+0x10a>
+		{
+			const int8_t cTxLock = pxQueue->cTxLock;
+ 800dd5e:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dd60:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 800dd64:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+			holder - and if there is a mutex holder then the mutex cannot be
+			given from an ISR.  As this is the ISR version of the function it
+			can be assumed there is no mutex holder and no need to determine if
+			priority disinheritance is needed.  Simply increase the count of
+			messages (semaphores) available. */
+			pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
+ 800dd68:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800dd6a:	1c5a      	adds	r2, r3, #1
+ 800dd6c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dd6e:	639a      	str	r2, [r3, #56]	; 0x38
+
+			/* The event list is not altered if the queue is locked.  This will
+			be done when the queue is unlocked later. */
+			if( cTxLock == queueUNLOCKED )
+ 800dd70:	f997 3027 	ldrsb.w	r3, [r7, #39]	; 0x27
+ 800dd74:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800dd78:	d112      	bne.n	800dda0 <xQueueGiveFromISR+0xf4>
+						}
+					}
+				}
+				#else /* configUSE_QUEUE_SETS */
+				{
+					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+ 800dd7a:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dd7c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800dd7e:	2b00      	cmp	r3, #0
+ 800dd80:	d016      	beq.n	800ddb0 <xQueueGiveFromISR+0x104>
+					{
+						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+ 800dd82:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800dd84:	3324      	adds	r3, #36	; 0x24
+ 800dd86:	4618      	mov	r0, r3
+ 800dd88:	f001 f8aa 	bl	800eee0 <xTaskRemoveFromEventList>
+ 800dd8c:	4603      	mov	r3, r0
+ 800dd8e:	2b00      	cmp	r3, #0
+ 800dd90:	d00e      	beq.n	800ddb0 <xQueueGiveFromISR+0x104>
+						{
+							/* The task waiting has a higher priority so record that a
+							context	switch is required. */
+							if( pxHigherPriorityTaskWoken != NULL )
+ 800dd92:	683b      	ldr	r3, [r7, #0]
+ 800dd94:	2b00      	cmp	r3, #0
+ 800dd96:	d00b      	beq.n	800ddb0 <xQueueGiveFromISR+0x104>
+							{
+								*pxHigherPriorityTaskWoken = pdTRUE;
+ 800dd98:	683b      	ldr	r3, [r7, #0]
+ 800dd9a:	2201      	movs	r2, #1
+ 800dd9c:	601a      	str	r2, [r3, #0]
+ 800dd9e:	e007      	b.n	800ddb0 <xQueueGiveFromISR+0x104>
+			}
+			else
+			{
+				/* Increment the lock count so the task that unlocks the queue
+				knows that data was posted while it was locked. */
+				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
+ 800dda0:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 800dda4:	3301      	adds	r3, #1
+ 800dda6:	b2db      	uxtb	r3, r3
+ 800dda8:	b25a      	sxtb	r2, r3
+ 800ddaa:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800ddac:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+			}
+
+			xReturn = pdPASS;
+ 800ddb0:	2301      	movs	r3, #1
+ 800ddb2:	637b      	str	r3, [r7, #52]	; 0x34
+ 800ddb4:	e001      	b.n	800ddba <xQueueGiveFromISR+0x10e>
+		}
+		else
+		{
+			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
+			xReturn = errQUEUE_FULL;
+ 800ddb6:	2300      	movs	r3, #0
+ 800ddb8:	637b      	str	r3, [r7, #52]	; 0x34
+ 800ddba:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800ddbc:	60fb      	str	r3, [r7, #12]
+	__asm volatile
+ 800ddbe:	68fb      	ldr	r3, [r7, #12]
+ 800ddc0:	f383 8811 	msr	BASEPRI, r3
+		}
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+ 800ddc4:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+}
+ 800ddc6:	4618      	mov	r0, r3
+ 800ddc8:	3738      	adds	r7, #56	; 0x38
+ 800ddca:	46bd      	mov	sp, r7
+ 800ddcc:	bd80      	pop	{r7, pc}
+	...
+
+0800ddd0 <xQueueReceive>:
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
+{
+ 800ddd0:	b580      	push	{r7, lr}
+ 800ddd2:	b08c      	sub	sp, #48	; 0x30
+ 800ddd4:	af00      	add	r7, sp, #0
+ 800ddd6:	60f8      	str	r0, [r7, #12]
+ 800ddd8:	60b9      	str	r1, [r7, #8]
+ 800ddda:	607a      	str	r2, [r7, #4]
+BaseType_t xEntryTimeSet = pdFALSE;
+ 800dddc:	2300      	movs	r3, #0
+ 800ddde:	62fb      	str	r3, [r7, #44]	; 0x2c
+TimeOut_t xTimeOut;
+Queue_t * const pxQueue = xQueue;
+ 800dde0:	68fb      	ldr	r3, [r7, #12]
+ 800dde2:	62bb      	str	r3, [r7, #40]	; 0x28
+
+	/* Check the pointer is not NULL. */
+	configASSERT( ( pxQueue ) );
+ 800dde4:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800dde6:	2b00      	cmp	r3, #0
+ 800dde8:	d10b      	bne.n	800de02 <xQueueReceive+0x32>
+	__asm volatile
+ 800ddea:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800ddee:	b672      	cpsid	i
+ 800ddf0:	f383 8811 	msr	BASEPRI, r3
+ 800ddf4:	f3bf 8f6f 	isb	sy
+ 800ddf8:	f3bf 8f4f 	dsb	sy
+ 800ddfc:	b662      	cpsie	i
+ 800ddfe:	623b      	str	r3, [r7, #32]
+ 800de00:	e7fe      	b.n	800de00 <xQueueReceive+0x30>
+
+	/* The buffer into which data is received can only be NULL if the data size
+	is zero (so no data is copied into the buffer. */
+	configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
+ 800de02:	68bb      	ldr	r3, [r7, #8]
+ 800de04:	2b00      	cmp	r3, #0
+ 800de06:	d103      	bne.n	800de10 <xQueueReceive+0x40>
+ 800de08:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800de0a:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800de0c:	2b00      	cmp	r3, #0
+ 800de0e:	d101      	bne.n	800de14 <xQueueReceive+0x44>
+ 800de10:	2301      	movs	r3, #1
+ 800de12:	e000      	b.n	800de16 <xQueueReceive+0x46>
+ 800de14:	2300      	movs	r3, #0
+ 800de16:	2b00      	cmp	r3, #0
+ 800de18:	d10b      	bne.n	800de32 <xQueueReceive+0x62>
+ 800de1a:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800de1e:	b672      	cpsid	i
+ 800de20:	f383 8811 	msr	BASEPRI, r3
+ 800de24:	f3bf 8f6f 	isb	sy
+ 800de28:	f3bf 8f4f 	dsb	sy
+ 800de2c:	b662      	cpsie	i
+ 800de2e:	61fb      	str	r3, [r7, #28]
+ 800de30:	e7fe      	b.n	800de30 <xQueueReceive+0x60>
+
+	/* Cannot block if the scheduler is suspended. */
+	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+	{
+		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+ 800de32:	f001 fa15 	bl	800f260 <xTaskGetSchedulerState>
+ 800de36:	4603      	mov	r3, r0
+ 800de38:	2b00      	cmp	r3, #0
+ 800de3a:	d102      	bne.n	800de42 <xQueueReceive+0x72>
+ 800de3c:	687b      	ldr	r3, [r7, #4]
+ 800de3e:	2b00      	cmp	r3, #0
+ 800de40:	d101      	bne.n	800de46 <xQueueReceive+0x76>
+ 800de42:	2301      	movs	r3, #1
+ 800de44:	e000      	b.n	800de48 <xQueueReceive+0x78>
+ 800de46:	2300      	movs	r3, #0
+ 800de48:	2b00      	cmp	r3, #0
+ 800de4a:	d10b      	bne.n	800de64 <xQueueReceive+0x94>
+ 800de4c:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800de50:	b672      	cpsid	i
+ 800de52:	f383 8811 	msr	BASEPRI, r3
+ 800de56:	f3bf 8f6f 	isb	sy
+ 800de5a:	f3bf 8f4f 	dsb	sy
+ 800de5e:	b662      	cpsie	i
+ 800de60:	61bb      	str	r3, [r7, #24]
+ 800de62:	e7fe      	b.n	800de62 <xQueueReceive+0x92>
+	/*lint -save -e904  This function relaxes the coding standard somewhat to
+	allow return statements within the function itself.  This is done in the
+	interest of execution time efficiency. */
+	for( ;; )
+	{
+		taskENTER_CRITICAL();
+ 800de64:	f001 fd40 	bl	800f8e8 <vPortEnterCritical>
+		{
+			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+ 800de68:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800de6a:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800de6c:	627b      	str	r3, [r7, #36]	; 0x24
+
+			/* Is there data in the queue now?  To be running the calling task
+			must be the highest priority task wanting to access the queue. */
+			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+ 800de6e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800de70:	2b00      	cmp	r3, #0
+ 800de72:	d01f      	beq.n	800deb4 <xQueueReceive+0xe4>
+			{
+				/* Data available, remove one item. */
+				prvCopyDataFromQueue( pxQueue, pvBuffer );
+ 800de74:	68b9      	ldr	r1, [r7, #8]
+ 800de76:	6ab8      	ldr	r0, [r7, #40]	; 0x28
+ 800de78:	f000 faa1 	bl	800e3be <prvCopyDataFromQueue>
+				traceQUEUE_RECEIVE( pxQueue );
+				pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
+ 800de7c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800de7e:	1e5a      	subs	r2, r3, #1
+ 800de80:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800de82:	639a      	str	r2, [r3, #56]	; 0x38
+
+				/* There is now space in the queue, were any tasks waiting to
+				post to the queue?  If so, unblock the highest priority waiting
+				task. */
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+ 800de84:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800de86:	691b      	ldr	r3, [r3, #16]
+ 800de88:	2b00      	cmp	r3, #0
+ 800de8a:	d00f      	beq.n	800deac <xQueueReceive+0xdc>
+				{
+					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+ 800de8c:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800de8e:	3310      	adds	r3, #16
+ 800de90:	4618      	mov	r0, r3
+ 800de92:	f001 f825 	bl	800eee0 <xTaskRemoveFromEventList>
+ 800de96:	4603      	mov	r3, r0
+ 800de98:	2b00      	cmp	r3, #0
+ 800de9a:	d007      	beq.n	800deac <xQueueReceive+0xdc>
+					{
+						queueYIELD_IF_USING_PREEMPTION();
+ 800de9c:	4b3c      	ldr	r3, [pc, #240]	; (800df90 <xQueueReceive+0x1c0>)
+ 800de9e:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800dea2:	601a      	str	r2, [r3, #0]
+ 800dea4:	f3bf 8f4f 	dsb	sy
+ 800dea8:	f3bf 8f6f 	isb	sy
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				taskEXIT_CRITICAL();
+ 800deac:	f001 fd4e 	bl	800f94c <vPortExitCritical>
+				return pdPASS;
+ 800deb0:	2301      	movs	r3, #1
+ 800deb2:	e069      	b.n	800df88 <xQueueReceive+0x1b8>
+			}
+			else
+			{
+				if( xTicksToWait == ( TickType_t ) 0 )
+ 800deb4:	687b      	ldr	r3, [r7, #4]
+ 800deb6:	2b00      	cmp	r3, #0
+ 800deb8:	d103      	bne.n	800dec2 <xQueueReceive+0xf2>
+				{
+					/* The queue was empty and no block time is specified (or
+					the block time has expired) so leave now. */
+					taskEXIT_CRITICAL();
+ 800deba:	f001 fd47 	bl	800f94c <vPortExitCritical>
+					traceQUEUE_RECEIVE_FAILED( pxQueue );
+					return errQUEUE_EMPTY;
+ 800debe:	2300      	movs	r3, #0
+ 800dec0:	e062      	b.n	800df88 <xQueueReceive+0x1b8>
+				}
+				else if( xEntryTimeSet == pdFALSE )
+ 800dec2:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800dec4:	2b00      	cmp	r3, #0
+ 800dec6:	d106      	bne.n	800ded6 <xQueueReceive+0x106>
+				{
+					/* The queue was empty and a block time was specified so
+					configure the timeout structure. */
+					vTaskInternalSetTimeOutState( &xTimeOut );
+ 800dec8:	f107 0310 	add.w	r3, r7, #16
+ 800decc:	4618      	mov	r0, r3
+ 800dece:	f001 f86b 	bl	800efa8 <vTaskInternalSetTimeOutState>
+					xEntryTimeSet = pdTRUE;
+ 800ded2:	2301      	movs	r3, #1
+ 800ded4:	62fb      	str	r3, [r7, #44]	; 0x2c
+					/* Entry time was already set. */
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		taskEXIT_CRITICAL();
+ 800ded6:	f001 fd39 	bl	800f94c <vPortExitCritical>
+
+		/* Interrupts and other tasks can send to and receive from the queue
+		now the critical section has been exited. */
+
+		vTaskSuspendAll();
+ 800deda:	f000 fdd1 	bl	800ea80 <vTaskSuspendAll>
+		prvLockQueue( pxQueue );
+ 800dede:	f001 fd03 	bl	800f8e8 <vPortEnterCritical>
+ 800dee2:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800dee4:	f893 3044 	ldrb.w	r3, [r3, #68]	; 0x44
+ 800dee8:	b25b      	sxtb	r3, r3
+ 800deea:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800deee:	d103      	bne.n	800def8 <xQueueReceive+0x128>
+ 800def0:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800def2:	2200      	movs	r2, #0
+ 800def4:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+ 800def8:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800defa:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 800defe:	b25b      	sxtb	r3, r3
+ 800df00:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800df04:	d103      	bne.n	800df0e <xQueueReceive+0x13e>
+ 800df06:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800df08:	2200      	movs	r2, #0
+ 800df0a:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+ 800df0e:	f001 fd1d 	bl	800f94c <vPortExitCritical>
+
+		/* Update the timeout state to see if it has expired yet. */
+		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+ 800df12:	1d3a      	adds	r2, r7, #4
+ 800df14:	f107 0310 	add.w	r3, r7, #16
+ 800df18:	4611      	mov	r1, r2
+ 800df1a:	4618      	mov	r0, r3
+ 800df1c:	f001 f85a 	bl	800efd4 <xTaskCheckForTimeOut>
+ 800df20:	4603      	mov	r3, r0
+ 800df22:	2b00      	cmp	r3, #0
+ 800df24:	d123      	bne.n	800df6e <xQueueReceive+0x19e>
+		{
+			/* The timeout has not expired.  If the queue is still empty place
+			the task on the list of tasks waiting to receive from the queue. */
+			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+ 800df26:	6ab8      	ldr	r0, [r7, #40]	; 0x28
+ 800df28:	f000 fac1 	bl	800e4ae <prvIsQueueEmpty>
+ 800df2c:	4603      	mov	r3, r0
+ 800df2e:	2b00      	cmp	r3, #0
+ 800df30:	d017      	beq.n	800df62 <xQueueReceive+0x192>
+			{
+				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
+				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
+ 800df32:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800df34:	3324      	adds	r3, #36	; 0x24
+ 800df36:	687a      	ldr	r2, [r7, #4]
+ 800df38:	4611      	mov	r1, r2
+ 800df3a:	4618      	mov	r0, r3
+ 800df3c:	f000 ffaa 	bl	800ee94 <vTaskPlaceOnEventList>
+				prvUnlockQueue( pxQueue );
+ 800df40:	6ab8      	ldr	r0, [r7, #40]	; 0x28
+ 800df42:	f000 fa62 	bl	800e40a <prvUnlockQueue>
+				if( xTaskResumeAll() == pdFALSE )
+ 800df46:	f000 fda9 	bl	800ea9c <xTaskResumeAll>
+ 800df4a:	4603      	mov	r3, r0
+ 800df4c:	2b00      	cmp	r3, #0
+ 800df4e:	d189      	bne.n	800de64 <xQueueReceive+0x94>
+				{
+					portYIELD_WITHIN_API();
+ 800df50:	4b0f      	ldr	r3, [pc, #60]	; (800df90 <xQueueReceive+0x1c0>)
+ 800df52:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800df56:	601a      	str	r2, [r3, #0]
+ 800df58:	f3bf 8f4f 	dsb	sy
+ 800df5c:	f3bf 8f6f 	isb	sy
+ 800df60:	e780      	b.n	800de64 <xQueueReceive+0x94>
+			}
+			else
+			{
+				/* The queue contains data again.  Loop back to try and read the
+				data. */
+				prvUnlockQueue( pxQueue );
+ 800df62:	6ab8      	ldr	r0, [r7, #40]	; 0x28
+ 800df64:	f000 fa51 	bl	800e40a <prvUnlockQueue>
+				( void ) xTaskResumeAll();
+ 800df68:	f000 fd98 	bl	800ea9c <xTaskResumeAll>
+ 800df6c:	e77a      	b.n	800de64 <xQueueReceive+0x94>
+		}
+		else
+		{
+			/* Timed out.  If there is no data in the queue exit, otherwise loop
+			back and attempt to read the data. */
+			prvUnlockQueue( pxQueue );
+ 800df6e:	6ab8      	ldr	r0, [r7, #40]	; 0x28
+ 800df70:	f000 fa4b 	bl	800e40a <prvUnlockQueue>
+			( void ) xTaskResumeAll();
+ 800df74:	f000 fd92 	bl	800ea9c <xTaskResumeAll>
+
+			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+ 800df78:	6ab8      	ldr	r0, [r7, #40]	; 0x28
+ 800df7a:	f000 fa98 	bl	800e4ae <prvIsQueueEmpty>
+ 800df7e:	4603      	mov	r3, r0
+ 800df80:	2b00      	cmp	r3, #0
+ 800df82:	f43f af6f 	beq.w	800de64 <xQueueReceive+0x94>
+			{
+				traceQUEUE_RECEIVE_FAILED( pxQueue );
+				return errQUEUE_EMPTY;
+ 800df86:	2300      	movs	r3, #0
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+	} /*lint -restore */
+}
+ 800df88:	4618      	mov	r0, r3
+ 800df8a:	3730      	adds	r7, #48	; 0x30
+ 800df8c:	46bd      	mov	sp, r7
+ 800df8e:	bd80      	pop	{r7, pc}
+ 800df90:	e000ed04 	.word	0xe000ed04
+
+0800df94 <xQueueSemaphoreTake>:
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait )
+{
+ 800df94:	b580      	push	{r7, lr}
+ 800df96:	b08e      	sub	sp, #56	; 0x38
+ 800df98:	af00      	add	r7, sp, #0
+ 800df9a:	6078      	str	r0, [r7, #4]
+ 800df9c:	6039      	str	r1, [r7, #0]
+BaseType_t xEntryTimeSet = pdFALSE;
+ 800df9e:	2300      	movs	r3, #0
+ 800dfa0:	637b      	str	r3, [r7, #52]	; 0x34
+TimeOut_t xTimeOut;
+Queue_t * const pxQueue = xQueue;
+ 800dfa2:	687b      	ldr	r3, [r7, #4]
+ 800dfa4:	62fb      	str	r3, [r7, #44]	; 0x2c
+
+#if( configUSE_MUTEXES == 1 )
+	BaseType_t xInheritanceOccurred = pdFALSE;
+ 800dfa6:	2300      	movs	r3, #0
+ 800dfa8:	633b      	str	r3, [r7, #48]	; 0x30
+#endif
+
+	/* Check the queue pointer is not NULL. */
+	configASSERT( ( pxQueue ) );
+ 800dfaa:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800dfac:	2b00      	cmp	r3, #0
+ 800dfae:	d10b      	bne.n	800dfc8 <xQueueSemaphoreTake+0x34>
+ 800dfb0:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800dfb4:	b672      	cpsid	i
+ 800dfb6:	f383 8811 	msr	BASEPRI, r3
+ 800dfba:	f3bf 8f6f 	isb	sy
+ 800dfbe:	f3bf 8f4f 	dsb	sy
+ 800dfc2:	b662      	cpsie	i
+ 800dfc4:	623b      	str	r3, [r7, #32]
+ 800dfc6:	e7fe      	b.n	800dfc6 <xQueueSemaphoreTake+0x32>
+
+	/* Check this really is a semaphore, in which case the item size will be
+	0. */
+	configASSERT( pxQueue->uxItemSize == 0 );
+ 800dfc8:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800dfca:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800dfcc:	2b00      	cmp	r3, #0
+ 800dfce:	d00b      	beq.n	800dfe8 <xQueueSemaphoreTake+0x54>
+ 800dfd0:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800dfd4:	b672      	cpsid	i
+ 800dfd6:	f383 8811 	msr	BASEPRI, r3
+ 800dfda:	f3bf 8f6f 	isb	sy
+ 800dfde:	f3bf 8f4f 	dsb	sy
+ 800dfe2:	b662      	cpsie	i
+ 800dfe4:	61fb      	str	r3, [r7, #28]
+ 800dfe6:	e7fe      	b.n	800dfe6 <xQueueSemaphoreTake+0x52>
+
+	/* Cannot block if the scheduler is suspended. */
+	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+	{
+		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+ 800dfe8:	f001 f93a 	bl	800f260 <xTaskGetSchedulerState>
+ 800dfec:	4603      	mov	r3, r0
+ 800dfee:	2b00      	cmp	r3, #0
+ 800dff0:	d102      	bne.n	800dff8 <xQueueSemaphoreTake+0x64>
+ 800dff2:	683b      	ldr	r3, [r7, #0]
+ 800dff4:	2b00      	cmp	r3, #0
+ 800dff6:	d101      	bne.n	800dffc <xQueueSemaphoreTake+0x68>
+ 800dff8:	2301      	movs	r3, #1
+ 800dffa:	e000      	b.n	800dffe <xQueueSemaphoreTake+0x6a>
+ 800dffc:	2300      	movs	r3, #0
+ 800dffe:	2b00      	cmp	r3, #0
+ 800e000:	d10b      	bne.n	800e01a <xQueueSemaphoreTake+0x86>
+ 800e002:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e006:	b672      	cpsid	i
+ 800e008:	f383 8811 	msr	BASEPRI, r3
+ 800e00c:	f3bf 8f6f 	isb	sy
+ 800e010:	f3bf 8f4f 	dsb	sy
+ 800e014:	b662      	cpsie	i
+ 800e016:	61bb      	str	r3, [r7, #24]
+ 800e018:	e7fe      	b.n	800e018 <xQueueSemaphoreTake+0x84>
+	/*lint -save -e904 This function relaxes the coding standard somewhat to allow return
+	statements within the function itself.  This is done in the interest
+	of execution time efficiency. */
+	for( ;; )
+	{
+		taskENTER_CRITICAL();
+ 800e01a:	f001 fc65 	bl	800f8e8 <vPortEnterCritical>
+		{
+			/* Semaphores are queues with an item size of 0, and where the
+			number of messages in the queue is the semaphore's count value. */
+			const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
+ 800e01e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e020:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800e022:	62bb      	str	r3, [r7, #40]	; 0x28
+
+			/* Is there data in the queue now?  To be running the calling task
+			must be the highest priority task wanting to access the queue. */
+			if( uxSemaphoreCount > ( UBaseType_t ) 0 )
+ 800e024:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800e026:	2b00      	cmp	r3, #0
+ 800e028:	d024      	beq.n	800e074 <xQueueSemaphoreTake+0xe0>
+			{
+				traceQUEUE_RECEIVE( pxQueue );
+
+				/* Semaphores are queues with a data size of zero and where the
+				messages waiting is the semaphore's count.  Reduce the count. */
+				pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
+ 800e02a:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800e02c:	1e5a      	subs	r2, r3, #1
+ 800e02e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e030:	639a      	str	r2, [r3, #56]	; 0x38
+
+				#if ( configUSE_MUTEXES == 1 )
+				{
+					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
+ 800e032:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e034:	681b      	ldr	r3, [r3, #0]
+ 800e036:	2b00      	cmp	r3, #0
+ 800e038:	d104      	bne.n	800e044 <xQueueSemaphoreTake+0xb0>
+					{
+						/* Record the information required to implement
+						priority inheritance should it become necessary. */
+						pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
+ 800e03a:	f001 fad3 	bl	800f5e4 <pvTaskIncrementMutexHeldCount>
+ 800e03e:	4602      	mov	r2, r0
+ 800e040:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e042:	609a      	str	r2, [r3, #8]
+				}
+				#endif /* configUSE_MUTEXES */
+
+				/* Check to see if other tasks are blocked waiting to give the
+				semaphore, and if so, unblock the highest priority such task. */
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+ 800e044:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e046:	691b      	ldr	r3, [r3, #16]
+ 800e048:	2b00      	cmp	r3, #0
+ 800e04a:	d00f      	beq.n	800e06c <xQueueSemaphoreTake+0xd8>
+				{
+					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+ 800e04c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e04e:	3310      	adds	r3, #16
+ 800e050:	4618      	mov	r0, r3
+ 800e052:	f000 ff45 	bl	800eee0 <xTaskRemoveFromEventList>
+ 800e056:	4603      	mov	r3, r0
+ 800e058:	2b00      	cmp	r3, #0
+ 800e05a:	d007      	beq.n	800e06c <xQueueSemaphoreTake+0xd8>
+					{
+						queueYIELD_IF_USING_PREEMPTION();
+ 800e05c:	4b54      	ldr	r3, [pc, #336]	; (800e1b0 <xQueueSemaphoreTake+0x21c>)
+ 800e05e:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800e062:	601a      	str	r2, [r3, #0]
+ 800e064:	f3bf 8f4f 	dsb	sy
+ 800e068:	f3bf 8f6f 	isb	sy
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				taskEXIT_CRITICAL();
+ 800e06c:	f001 fc6e 	bl	800f94c <vPortExitCritical>
+				return pdPASS;
+ 800e070:	2301      	movs	r3, #1
+ 800e072:	e098      	b.n	800e1a6 <xQueueSemaphoreTake+0x212>
+			}
+			else
+			{
+				if( xTicksToWait == ( TickType_t ) 0 )
+ 800e074:	683b      	ldr	r3, [r7, #0]
+ 800e076:	2b00      	cmp	r3, #0
+ 800e078:	d112      	bne.n	800e0a0 <xQueueSemaphoreTake+0x10c>
+					/* For inheritance to have occurred there must have been an
+					initial timeout, and an adjusted timeout cannot become 0, as
+					if it were 0 the function would have exited. */
+					#if( configUSE_MUTEXES == 1 )
+					{
+						configASSERT( xInheritanceOccurred == pdFALSE );
+ 800e07a:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e07c:	2b00      	cmp	r3, #0
+ 800e07e:	d00b      	beq.n	800e098 <xQueueSemaphoreTake+0x104>
+ 800e080:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e084:	b672      	cpsid	i
+ 800e086:	f383 8811 	msr	BASEPRI, r3
+ 800e08a:	f3bf 8f6f 	isb	sy
+ 800e08e:	f3bf 8f4f 	dsb	sy
+ 800e092:	b662      	cpsie	i
+ 800e094:	617b      	str	r3, [r7, #20]
+ 800e096:	e7fe      	b.n	800e096 <xQueueSemaphoreTake+0x102>
+					}
+					#endif /* configUSE_MUTEXES */
+
+					/* The semaphore count was 0 and no block time is specified
+					(or the block time has expired) so exit now. */
+					taskEXIT_CRITICAL();
+ 800e098:	f001 fc58 	bl	800f94c <vPortExitCritical>
+					traceQUEUE_RECEIVE_FAILED( pxQueue );
+					return errQUEUE_EMPTY;
+ 800e09c:	2300      	movs	r3, #0
+ 800e09e:	e082      	b.n	800e1a6 <xQueueSemaphoreTake+0x212>
+				}
+				else if( xEntryTimeSet == pdFALSE )
+ 800e0a0:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 800e0a2:	2b00      	cmp	r3, #0
+ 800e0a4:	d106      	bne.n	800e0b4 <xQueueSemaphoreTake+0x120>
+				{
+					/* The semaphore count was 0 and a block time was specified
+					so configure the timeout structure ready to block. */
+					vTaskInternalSetTimeOutState( &xTimeOut );
+ 800e0a6:	f107 030c 	add.w	r3, r7, #12
+ 800e0aa:	4618      	mov	r0, r3
+ 800e0ac:	f000 ff7c 	bl	800efa8 <vTaskInternalSetTimeOutState>
+					xEntryTimeSet = pdTRUE;
+ 800e0b0:	2301      	movs	r3, #1
+ 800e0b2:	637b      	str	r3, [r7, #52]	; 0x34
+					/* Entry time was already set. */
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		taskEXIT_CRITICAL();
+ 800e0b4:	f001 fc4a 	bl	800f94c <vPortExitCritical>
+
+		/* Interrupts and other tasks can give to and take from the semaphore
+		now the critical section has been exited. */
+
+		vTaskSuspendAll();
+ 800e0b8:	f000 fce2 	bl	800ea80 <vTaskSuspendAll>
+		prvLockQueue( pxQueue );
+ 800e0bc:	f001 fc14 	bl	800f8e8 <vPortEnterCritical>
+ 800e0c0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e0c2:	f893 3044 	ldrb.w	r3, [r3, #68]	; 0x44
+ 800e0c6:	b25b      	sxtb	r3, r3
+ 800e0c8:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800e0cc:	d103      	bne.n	800e0d6 <xQueueSemaphoreTake+0x142>
+ 800e0ce:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e0d0:	2200      	movs	r2, #0
+ 800e0d2:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+ 800e0d6:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e0d8:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 800e0dc:	b25b      	sxtb	r3, r3
+ 800e0de:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800e0e2:	d103      	bne.n	800e0ec <xQueueSemaphoreTake+0x158>
+ 800e0e4:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e0e6:	2200      	movs	r2, #0
+ 800e0e8:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+ 800e0ec:	f001 fc2e 	bl	800f94c <vPortExitCritical>
+
+		/* Update the timeout state to see if it has expired yet. */
+		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+ 800e0f0:	463a      	mov	r2, r7
+ 800e0f2:	f107 030c 	add.w	r3, r7, #12
+ 800e0f6:	4611      	mov	r1, r2
+ 800e0f8:	4618      	mov	r0, r3
+ 800e0fa:	f000 ff6b 	bl	800efd4 <xTaskCheckForTimeOut>
+ 800e0fe:	4603      	mov	r3, r0
+ 800e100:	2b00      	cmp	r3, #0
+ 800e102:	d132      	bne.n	800e16a <xQueueSemaphoreTake+0x1d6>
+		{
+			/* A block time is specified and not expired.  If the semaphore
+			count is 0 then enter the Blocked state to wait for a semaphore to
+			become available.  As semaphores are implemented with queues the
+			queue being empty is equivalent to the semaphore count being 0. */
+			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+ 800e104:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 800e106:	f000 f9d2 	bl	800e4ae <prvIsQueueEmpty>
+ 800e10a:	4603      	mov	r3, r0
+ 800e10c:	2b00      	cmp	r3, #0
+ 800e10e:	d026      	beq.n	800e15e <xQueueSemaphoreTake+0x1ca>
+			{
+				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
+
+				#if ( configUSE_MUTEXES == 1 )
+				{
+					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
+ 800e110:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e112:	681b      	ldr	r3, [r3, #0]
+ 800e114:	2b00      	cmp	r3, #0
+ 800e116:	d109      	bne.n	800e12c <xQueueSemaphoreTake+0x198>
+					{
+						taskENTER_CRITICAL();
+ 800e118:	f001 fbe6 	bl	800f8e8 <vPortEnterCritical>
+						{
+							xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
+ 800e11c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e11e:	689b      	ldr	r3, [r3, #8]
+ 800e120:	4618      	mov	r0, r3
+ 800e122:	f001 f8bb 	bl	800f29c <xTaskPriorityInherit>
+ 800e126:	6338      	str	r0, [r7, #48]	; 0x30
+						}
+						taskEXIT_CRITICAL();
+ 800e128:	f001 fc10 	bl	800f94c <vPortExitCritical>
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				#endif
+
+				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
+ 800e12c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e12e:	3324      	adds	r3, #36	; 0x24
+ 800e130:	683a      	ldr	r2, [r7, #0]
+ 800e132:	4611      	mov	r1, r2
+ 800e134:	4618      	mov	r0, r3
+ 800e136:	f000 fead 	bl	800ee94 <vTaskPlaceOnEventList>
+				prvUnlockQueue( pxQueue );
+ 800e13a:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 800e13c:	f000 f965 	bl	800e40a <prvUnlockQueue>
+				if( xTaskResumeAll() == pdFALSE )
+ 800e140:	f000 fcac 	bl	800ea9c <xTaskResumeAll>
+ 800e144:	4603      	mov	r3, r0
+ 800e146:	2b00      	cmp	r3, #0
+ 800e148:	f47f af67 	bne.w	800e01a <xQueueSemaphoreTake+0x86>
+				{
+					portYIELD_WITHIN_API();
+ 800e14c:	4b18      	ldr	r3, [pc, #96]	; (800e1b0 <xQueueSemaphoreTake+0x21c>)
+ 800e14e:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800e152:	601a      	str	r2, [r3, #0]
+ 800e154:	f3bf 8f4f 	dsb	sy
+ 800e158:	f3bf 8f6f 	isb	sy
+ 800e15c:	e75d      	b.n	800e01a <xQueueSemaphoreTake+0x86>
+			}
+			else
+			{
+				/* There was no timeout and the semaphore count was not 0, so
+				attempt to take the semaphore again. */
+				prvUnlockQueue( pxQueue );
+ 800e15e:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 800e160:	f000 f953 	bl	800e40a <prvUnlockQueue>
+				( void ) xTaskResumeAll();
+ 800e164:	f000 fc9a 	bl	800ea9c <xTaskResumeAll>
+ 800e168:	e757      	b.n	800e01a <xQueueSemaphoreTake+0x86>
+			}
+		}
+		else
+		{
+			/* Timed out. */
+			prvUnlockQueue( pxQueue );
+ 800e16a:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 800e16c:	f000 f94d 	bl	800e40a <prvUnlockQueue>
+			( void ) xTaskResumeAll();
+ 800e170:	f000 fc94 	bl	800ea9c <xTaskResumeAll>
+
+			/* If the semaphore count is 0 exit now as the timeout has
+			expired.  Otherwise return to attempt to take the semaphore that is
+			known to be available.  As semaphores are implemented by queues the
+			queue being empty is equivalent to the semaphore count being 0. */
+			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+ 800e174:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 800e176:	f000 f99a 	bl	800e4ae <prvIsQueueEmpty>
+ 800e17a:	4603      	mov	r3, r0
+ 800e17c:	2b00      	cmp	r3, #0
+ 800e17e:	f43f af4c 	beq.w	800e01a <xQueueSemaphoreTake+0x86>
+				#if ( configUSE_MUTEXES == 1 )
+				{
+					/* xInheritanceOccurred could only have be set if
+					pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
+					test the mutex type again to check it is actually a mutex. */
+					if( xInheritanceOccurred != pdFALSE )
+ 800e182:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e184:	2b00      	cmp	r3, #0
+ 800e186:	d00d      	beq.n	800e1a4 <xQueueSemaphoreTake+0x210>
+					{
+						taskENTER_CRITICAL();
+ 800e188:	f001 fbae 	bl	800f8e8 <vPortEnterCritical>
+							/* This task blocking on the mutex caused another
+							task to inherit this task's priority.  Now this task
+							has timed out the priority should be disinherited
+							again, but only as low as the next highest priority
+							task that is waiting for the same mutex. */
+							uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
+ 800e18c:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 800e18e:	f000 f894 	bl	800e2ba <prvGetDisinheritPriorityAfterTimeout>
+ 800e192:	6278      	str	r0, [r7, #36]	; 0x24
+							vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
+ 800e194:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e196:	689b      	ldr	r3, [r3, #8]
+ 800e198:	6a79      	ldr	r1, [r7, #36]	; 0x24
+ 800e19a:	4618      	mov	r0, r3
+ 800e19c:	f001 f986 	bl	800f4ac <vTaskPriorityDisinheritAfterTimeout>
+						}
+						taskEXIT_CRITICAL();
+ 800e1a0:	f001 fbd4 	bl	800f94c <vPortExitCritical>
+					}
+				}
+				#endif /* configUSE_MUTEXES */
+
+				traceQUEUE_RECEIVE_FAILED( pxQueue );
+				return errQUEUE_EMPTY;
+ 800e1a4:	2300      	movs	r3, #0
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+	} /*lint -restore */
+}
+ 800e1a6:	4618      	mov	r0, r3
+ 800e1a8:	3738      	adds	r7, #56	; 0x38
+ 800e1aa:	46bd      	mov	sp, r7
+ 800e1ac:	bd80      	pop	{r7, pc}
+ 800e1ae:	bf00      	nop
+ 800e1b0:	e000ed04 	.word	0xe000ed04
+
+0800e1b4 <xQueueReceiveFromISR>:
+	} /*lint -restore */
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
+{
+ 800e1b4:	b580      	push	{r7, lr}
+ 800e1b6:	b08e      	sub	sp, #56	; 0x38
+ 800e1b8:	af00      	add	r7, sp, #0
+ 800e1ba:	60f8      	str	r0, [r7, #12]
+ 800e1bc:	60b9      	str	r1, [r7, #8]
+ 800e1be:	607a      	str	r2, [r7, #4]
+BaseType_t xReturn;
+UBaseType_t uxSavedInterruptStatus;
+Queue_t * const pxQueue = xQueue;
+ 800e1c0:	68fb      	ldr	r3, [r7, #12]
+ 800e1c2:	633b      	str	r3, [r7, #48]	; 0x30
+
+	configASSERT( pxQueue );
+ 800e1c4:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e1c6:	2b00      	cmp	r3, #0
+ 800e1c8:	d10b      	bne.n	800e1e2 <xQueueReceiveFromISR+0x2e>
+ 800e1ca:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e1ce:	b672      	cpsid	i
+ 800e1d0:	f383 8811 	msr	BASEPRI, r3
+ 800e1d4:	f3bf 8f6f 	isb	sy
+ 800e1d8:	f3bf 8f4f 	dsb	sy
+ 800e1dc:	b662      	cpsie	i
+ 800e1de:	623b      	str	r3, [r7, #32]
+ 800e1e0:	e7fe      	b.n	800e1e0 <xQueueReceiveFromISR+0x2c>
+	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+ 800e1e2:	68bb      	ldr	r3, [r7, #8]
+ 800e1e4:	2b00      	cmp	r3, #0
+ 800e1e6:	d103      	bne.n	800e1f0 <xQueueReceiveFromISR+0x3c>
+ 800e1e8:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e1ea:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800e1ec:	2b00      	cmp	r3, #0
+ 800e1ee:	d101      	bne.n	800e1f4 <xQueueReceiveFromISR+0x40>
+ 800e1f0:	2301      	movs	r3, #1
+ 800e1f2:	e000      	b.n	800e1f6 <xQueueReceiveFromISR+0x42>
+ 800e1f4:	2300      	movs	r3, #0
+ 800e1f6:	2b00      	cmp	r3, #0
+ 800e1f8:	d10b      	bne.n	800e212 <xQueueReceiveFromISR+0x5e>
+ 800e1fa:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e1fe:	b672      	cpsid	i
+ 800e200:	f383 8811 	msr	BASEPRI, r3
+ 800e204:	f3bf 8f6f 	isb	sy
+ 800e208:	f3bf 8f4f 	dsb	sy
+ 800e20c:	b662      	cpsie	i
+ 800e20e:	61fb      	str	r3, [r7, #28]
+ 800e210:	e7fe      	b.n	800e210 <xQueueReceiveFromISR+0x5c>
+	that have been assigned a priority at or (logically) below the maximum
+	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
+	safe API to ensure interrupt entry is as fast and as simple as possible.
+	More information (albeit Cortex-M specific) is provided on the following
+	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
+	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+ 800e212:	f001 fc49 	bl	800faa8 <vPortValidateInterruptPriority>
+	__asm volatile
+ 800e216:	f3ef 8211 	mrs	r2, BASEPRI
+ 800e21a:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e21e:	b672      	cpsid	i
+ 800e220:	f383 8811 	msr	BASEPRI, r3
+ 800e224:	f3bf 8f6f 	isb	sy
+ 800e228:	f3bf 8f4f 	dsb	sy
+ 800e22c:	b662      	cpsie	i
+ 800e22e:	61ba      	str	r2, [r7, #24]
+ 800e230:	617b      	str	r3, [r7, #20]
+	return ulOriginalBASEPRI;
+ 800e232:	69bb      	ldr	r3, [r7, #24]
+
+	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+ 800e234:	62fb      	str	r3, [r7, #44]	; 0x2c
+	{
+		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+ 800e236:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e238:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800e23a:	62bb      	str	r3, [r7, #40]	; 0x28
+
+		/* Cannot block in an ISR, so check there is data available. */
+		if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+ 800e23c:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800e23e:	2b00      	cmp	r3, #0
+ 800e240:	d02f      	beq.n	800e2a2 <xQueueReceiveFromISR+0xee>
+		{
+			const int8_t cRxLock = pxQueue->cRxLock;
+ 800e242:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e244:	f893 3044 	ldrb.w	r3, [r3, #68]	; 0x44
+ 800e248:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+
+			traceQUEUE_RECEIVE_FROM_ISR( pxQueue );
+
+			prvCopyDataFromQueue( pxQueue, pvBuffer );
+ 800e24c:	68b9      	ldr	r1, [r7, #8]
+ 800e24e:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 800e250:	f000 f8b5 	bl	800e3be <prvCopyDataFromQueue>
+			pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
+ 800e254:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800e256:	1e5a      	subs	r2, r3, #1
+ 800e258:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e25a:	639a      	str	r2, [r3, #56]	; 0x38
+
+			/* If the queue is locked the event list will not be modified.
+			Instead update the lock count so the task that unlocks the queue
+			will know that an ISR has removed data while the queue was
+			locked. */
+			if( cRxLock == queueUNLOCKED )
+ 800e25c:	f997 3027 	ldrsb.w	r3, [r7, #39]	; 0x27
+ 800e260:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800e264:	d112      	bne.n	800e28c <xQueueReceiveFromISR+0xd8>
+			{
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+ 800e266:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e268:	691b      	ldr	r3, [r3, #16]
+ 800e26a:	2b00      	cmp	r3, #0
+ 800e26c:	d016      	beq.n	800e29c <xQueueReceiveFromISR+0xe8>
+				{
+					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+ 800e26e:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e270:	3310      	adds	r3, #16
+ 800e272:	4618      	mov	r0, r3
+ 800e274:	f000 fe34 	bl	800eee0 <xTaskRemoveFromEventList>
+ 800e278:	4603      	mov	r3, r0
+ 800e27a:	2b00      	cmp	r3, #0
+ 800e27c:	d00e      	beq.n	800e29c <xQueueReceiveFromISR+0xe8>
+					{
+						/* The task waiting has a higher priority than us so
+						force a context switch. */
+						if( pxHigherPriorityTaskWoken != NULL )
+ 800e27e:	687b      	ldr	r3, [r7, #4]
+ 800e280:	2b00      	cmp	r3, #0
+ 800e282:	d00b      	beq.n	800e29c <xQueueReceiveFromISR+0xe8>
+						{
+							*pxHigherPriorityTaskWoken = pdTRUE;
+ 800e284:	687b      	ldr	r3, [r7, #4]
+ 800e286:	2201      	movs	r2, #1
+ 800e288:	601a      	str	r2, [r3, #0]
+ 800e28a:	e007      	b.n	800e29c <xQueueReceiveFromISR+0xe8>
+			}
+			else
+			{
+				/* Increment the lock count so the task that unlocks the queue
+				knows that data was removed while it was locked. */
+				pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
+ 800e28c:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 800e290:	3301      	adds	r3, #1
+ 800e292:	b2db      	uxtb	r3, r3
+ 800e294:	b25a      	sxtb	r2, r3
+ 800e296:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e298:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+			}
+
+			xReturn = pdPASS;
+ 800e29c:	2301      	movs	r3, #1
+ 800e29e:	637b      	str	r3, [r7, #52]	; 0x34
+ 800e2a0:	e001      	b.n	800e2a6 <xQueueReceiveFromISR+0xf2>
+		}
+		else
+		{
+			xReturn = pdFAIL;
+ 800e2a2:	2300      	movs	r3, #0
+ 800e2a4:	637b      	str	r3, [r7, #52]	; 0x34
+ 800e2a6:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e2a8:	613b      	str	r3, [r7, #16]
+	__asm volatile
+ 800e2aa:	693b      	ldr	r3, [r7, #16]
+ 800e2ac:	f383 8811 	msr	BASEPRI, r3
+			traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
+		}
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+ 800e2b0:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+}
+ 800e2b2:	4618      	mov	r0, r3
+ 800e2b4:	3738      	adds	r7, #56	; 0x38
+ 800e2b6:	46bd      	mov	sp, r7
+ 800e2b8:	bd80      	pop	{r7, pc}
+
+0800e2ba <prvGetDisinheritPriorityAfterTimeout>:
+/*-----------------------------------------------------------*/
+
+#if( configUSE_MUTEXES == 1 )
+
+	static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
+	{
+ 800e2ba:	b480      	push	{r7}
+ 800e2bc:	b085      	sub	sp, #20
+ 800e2be:	af00      	add	r7, sp, #0
+ 800e2c0:	6078      	str	r0, [r7, #4]
+		priority, but the waiting task times out, then the holder should
+		disinherit the priority - but only down to the highest priority of any
+		other tasks that are waiting for the same mutex.  For this purpose,
+		return the priority of the highest priority task that is waiting for the
+		mutex. */
+		if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
+ 800e2c2:	687b      	ldr	r3, [r7, #4]
+ 800e2c4:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800e2c6:	2b00      	cmp	r3, #0
+ 800e2c8:	d006      	beq.n	800e2d8 <prvGetDisinheritPriorityAfterTimeout+0x1e>
+		{
+			uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
+ 800e2ca:	687b      	ldr	r3, [r7, #4]
+ 800e2cc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800e2ce:	681b      	ldr	r3, [r3, #0]
+ 800e2d0:	f1c3 0307 	rsb	r3, r3, #7
+ 800e2d4:	60fb      	str	r3, [r7, #12]
+ 800e2d6:	e001      	b.n	800e2dc <prvGetDisinheritPriorityAfterTimeout+0x22>
+		}
+		else
+		{
+			uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
+ 800e2d8:	2300      	movs	r3, #0
+ 800e2da:	60fb      	str	r3, [r7, #12]
+		}
+
+		return uxHighestPriorityOfWaitingTasks;
+ 800e2dc:	68fb      	ldr	r3, [r7, #12]
+	}
+ 800e2de:	4618      	mov	r0, r3
+ 800e2e0:	3714      	adds	r7, #20
+ 800e2e2:	46bd      	mov	sp, r7
+ 800e2e4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800e2e8:	4770      	bx	lr
+
+0800e2ea <prvCopyDataToQueue>:
+
+#endif /* configUSE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
+{
+ 800e2ea:	b580      	push	{r7, lr}
+ 800e2ec:	b086      	sub	sp, #24
+ 800e2ee:	af00      	add	r7, sp, #0
+ 800e2f0:	60f8      	str	r0, [r7, #12]
+ 800e2f2:	60b9      	str	r1, [r7, #8]
+ 800e2f4:	607a      	str	r2, [r7, #4]
+BaseType_t xReturn = pdFALSE;
+ 800e2f6:	2300      	movs	r3, #0
+ 800e2f8:	617b      	str	r3, [r7, #20]
+UBaseType_t uxMessagesWaiting;
+
+	/* This function is called from a critical section. */
+
+	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+ 800e2fa:	68fb      	ldr	r3, [r7, #12]
+ 800e2fc:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800e2fe:	613b      	str	r3, [r7, #16]
+
+	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
+ 800e300:	68fb      	ldr	r3, [r7, #12]
+ 800e302:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800e304:	2b00      	cmp	r3, #0
+ 800e306:	d10d      	bne.n	800e324 <prvCopyDataToQueue+0x3a>
+	{
+		#if ( configUSE_MUTEXES == 1 )
+		{
+			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
+ 800e308:	68fb      	ldr	r3, [r7, #12]
+ 800e30a:	681b      	ldr	r3, [r3, #0]
+ 800e30c:	2b00      	cmp	r3, #0
+ 800e30e:	d14d      	bne.n	800e3ac <prvCopyDataToQueue+0xc2>
+			{
+				/* The mutex is no longer being held. */
+				xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
+ 800e310:	68fb      	ldr	r3, [r7, #12]
+ 800e312:	689b      	ldr	r3, [r3, #8]
+ 800e314:	4618      	mov	r0, r3
+ 800e316:	f001 f841 	bl	800f39c <xTaskPriorityDisinherit>
+ 800e31a:	6178      	str	r0, [r7, #20]
+				pxQueue->u.xSemaphore.xMutexHolder = NULL;
+ 800e31c:	68fb      	ldr	r3, [r7, #12]
+ 800e31e:	2200      	movs	r2, #0
+ 800e320:	609a      	str	r2, [r3, #8]
+ 800e322:	e043      	b.n	800e3ac <prvCopyDataToQueue+0xc2>
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		#endif /* configUSE_MUTEXES */
+	}
+	else if( xPosition == queueSEND_TO_BACK )
+ 800e324:	687b      	ldr	r3, [r7, #4]
+ 800e326:	2b00      	cmp	r3, #0
+ 800e328:	d119      	bne.n	800e35e <prvCopyDataToQueue+0x74>
+	{
+		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
+ 800e32a:	68fb      	ldr	r3, [r7, #12]
+ 800e32c:	6858      	ldr	r0, [r3, #4]
+ 800e32e:	68fb      	ldr	r3, [r7, #12]
+ 800e330:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800e332:	461a      	mov	r2, r3
+ 800e334:	68b9      	ldr	r1, [r7, #8]
+ 800e336:	f00e f832 	bl	801c39e <memcpy>
+		pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
+ 800e33a:	68fb      	ldr	r3, [r7, #12]
+ 800e33c:	685a      	ldr	r2, [r3, #4]
+ 800e33e:	68fb      	ldr	r3, [r7, #12]
+ 800e340:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800e342:	441a      	add	r2, r3
+ 800e344:	68fb      	ldr	r3, [r7, #12]
+ 800e346:	605a      	str	r2, [r3, #4]
+		if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
+ 800e348:	68fb      	ldr	r3, [r7, #12]
+ 800e34a:	685a      	ldr	r2, [r3, #4]
+ 800e34c:	68fb      	ldr	r3, [r7, #12]
+ 800e34e:	689b      	ldr	r3, [r3, #8]
+ 800e350:	429a      	cmp	r2, r3
+ 800e352:	d32b      	bcc.n	800e3ac <prvCopyDataToQueue+0xc2>
+		{
+			pxQueue->pcWriteTo = pxQueue->pcHead;
+ 800e354:	68fb      	ldr	r3, [r7, #12]
+ 800e356:	681a      	ldr	r2, [r3, #0]
+ 800e358:	68fb      	ldr	r3, [r7, #12]
+ 800e35a:	605a      	str	r2, [r3, #4]
+ 800e35c:	e026      	b.n	800e3ac <prvCopyDataToQueue+0xc2>
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes.  Assert checks null pointer only used when length is 0. */
+ 800e35e:	68fb      	ldr	r3, [r7, #12]
+ 800e360:	68d8      	ldr	r0, [r3, #12]
+ 800e362:	68fb      	ldr	r3, [r7, #12]
+ 800e364:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800e366:	461a      	mov	r2, r3
+ 800e368:	68b9      	ldr	r1, [r7, #8]
+ 800e36a:	f00e f818 	bl	801c39e <memcpy>
+		pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
+ 800e36e:	68fb      	ldr	r3, [r7, #12]
+ 800e370:	68da      	ldr	r2, [r3, #12]
+ 800e372:	68fb      	ldr	r3, [r7, #12]
+ 800e374:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800e376:	425b      	negs	r3, r3
+ 800e378:	441a      	add	r2, r3
+ 800e37a:	68fb      	ldr	r3, [r7, #12]
+ 800e37c:	60da      	str	r2, [r3, #12]
+		if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
+ 800e37e:	68fb      	ldr	r3, [r7, #12]
+ 800e380:	68da      	ldr	r2, [r3, #12]
+ 800e382:	68fb      	ldr	r3, [r7, #12]
+ 800e384:	681b      	ldr	r3, [r3, #0]
+ 800e386:	429a      	cmp	r2, r3
+ 800e388:	d207      	bcs.n	800e39a <prvCopyDataToQueue+0xb0>
+		{
+			pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
+ 800e38a:	68fb      	ldr	r3, [r7, #12]
+ 800e38c:	689a      	ldr	r2, [r3, #8]
+ 800e38e:	68fb      	ldr	r3, [r7, #12]
+ 800e390:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800e392:	425b      	negs	r3, r3
+ 800e394:	441a      	add	r2, r3
+ 800e396:	68fb      	ldr	r3, [r7, #12]
+ 800e398:	60da      	str	r2, [r3, #12]
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		if( xPosition == queueOVERWRITE )
+ 800e39a:	687b      	ldr	r3, [r7, #4]
+ 800e39c:	2b02      	cmp	r3, #2
+ 800e39e:	d105      	bne.n	800e3ac <prvCopyDataToQueue+0xc2>
+		{
+			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+ 800e3a0:	693b      	ldr	r3, [r7, #16]
+ 800e3a2:	2b00      	cmp	r3, #0
+ 800e3a4:	d002      	beq.n	800e3ac <prvCopyDataToQueue+0xc2>
+			{
+				/* An item is not being added but overwritten, so subtract
+				one from the recorded number of items in the queue so when
+				one is added again below the number of recorded items remains
+				correct. */
+				--uxMessagesWaiting;
+ 800e3a6:	693b      	ldr	r3, [r7, #16]
+ 800e3a8:	3b01      	subs	r3, #1
+ 800e3aa:	613b      	str	r3, [r7, #16]
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+	pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
+ 800e3ac:	693b      	ldr	r3, [r7, #16]
+ 800e3ae:	1c5a      	adds	r2, r3, #1
+ 800e3b0:	68fb      	ldr	r3, [r7, #12]
+ 800e3b2:	639a      	str	r2, [r3, #56]	; 0x38
+
+	return xReturn;
+ 800e3b4:	697b      	ldr	r3, [r7, #20]
+}
+ 800e3b6:	4618      	mov	r0, r3
+ 800e3b8:	3718      	adds	r7, #24
+ 800e3ba:	46bd      	mov	sp, r7
+ 800e3bc:	bd80      	pop	{r7, pc}
+
+0800e3be <prvCopyDataFromQueue>:
+/*-----------------------------------------------------------*/
+
+static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
+{
+ 800e3be:	b580      	push	{r7, lr}
+ 800e3c0:	b082      	sub	sp, #8
+ 800e3c2:	af00      	add	r7, sp, #0
+ 800e3c4:	6078      	str	r0, [r7, #4]
+ 800e3c6:	6039      	str	r1, [r7, #0]
+	if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
+ 800e3c8:	687b      	ldr	r3, [r7, #4]
+ 800e3ca:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800e3cc:	2b00      	cmp	r3, #0
+ 800e3ce:	d018      	beq.n	800e402 <prvCopyDataFromQueue+0x44>
+	{
+		pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
+ 800e3d0:	687b      	ldr	r3, [r7, #4]
+ 800e3d2:	68da      	ldr	r2, [r3, #12]
+ 800e3d4:	687b      	ldr	r3, [r7, #4]
+ 800e3d6:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800e3d8:	441a      	add	r2, r3
+ 800e3da:	687b      	ldr	r3, [r7, #4]
+ 800e3dc:	60da      	str	r2, [r3, #12]
+		if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
+ 800e3de:	687b      	ldr	r3, [r7, #4]
+ 800e3e0:	68da      	ldr	r2, [r3, #12]
+ 800e3e2:	687b      	ldr	r3, [r7, #4]
+ 800e3e4:	689b      	ldr	r3, [r3, #8]
+ 800e3e6:	429a      	cmp	r2, r3
+ 800e3e8:	d303      	bcc.n	800e3f2 <prvCopyDataFromQueue+0x34>
+		{
+			pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
+ 800e3ea:	687b      	ldr	r3, [r7, #4]
+ 800e3ec:	681a      	ldr	r2, [r3, #0]
+ 800e3ee:	687b      	ldr	r3, [r7, #4]
+ 800e3f0:	60da      	str	r2, [r3, #12]
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+		( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
+ 800e3f2:	687b      	ldr	r3, [r7, #4]
+ 800e3f4:	68d9      	ldr	r1, [r3, #12]
+ 800e3f6:	687b      	ldr	r3, [r7, #4]
+ 800e3f8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800e3fa:	461a      	mov	r2, r3
+ 800e3fc:	6838      	ldr	r0, [r7, #0]
+ 800e3fe:	f00d ffce 	bl	801c39e <memcpy>
+	}
+}
+ 800e402:	bf00      	nop
+ 800e404:	3708      	adds	r7, #8
+ 800e406:	46bd      	mov	sp, r7
+ 800e408:	bd80      	pop	{r7, pc}
+
+0800e40a <prvUnlockQueue>:
+/*-----------------------------------------------------------*/
+
+static void prvUnlockQueue( Queue_t * const pxQueue )
+{
+ 800e40a:	b580      	push	{r7, lr}
+ 800e40c:	b084      	sub	sp, #16
+ 800e40e:	af00      	add	r7, sp, #0
+ 800e410:	6078      	str	r0, [r7, #4]
+
+	/* The lock counts contains the number of extra data items placed or
+	removed from the queue while the queue was locked.  When a queue is
+	locked items can be added or removed, but the event lists cannot be
+	updated. */
+	taskENTER_CRITICAL();
+ 800e412:	f001 fa69 	bl	800f8e8 <vPortEnterCritical>
+	{
+		int8_t cTxLock = pxQueue->cTxLock;
+ 800e416:	687b      	ldr	r3, [r7, #4]
+ 800e418:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
+ 800e41c:	73fb      	strb	r3, [r7, #15]
+
+		/* See if data was added to the queue while it was locked. */
+		while( cTxLock > queueLOCKED_UNMODIFIED )
+ 800e41e:	e011      	b.n	800e444 <prvUnlockQueue+0x3a>
+			}
+			#else /* configUSE_QUEUE_SETS */
+			{
+				/* Tasks that are removed from the event list will get added to
+				the pending ready list as the scheduler is still suspended. */
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+ 800e420:	687b      	ldr	r3, [r7, #4]
+ 800e422:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800e424:	2b00      	cmp	r3, #0
+ 800e426:	d012      	beq.n	800e44e <prvUnlockQueue+0x44>
+				{
+					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+ 800e428:	687b      	ldr	r3, [r7, #4]
+ 800e42a:	3324      	adds	r3, #36	; 0x24
+ 800e42c:	4618      	mov	r0, r3
+ 800e42e:	f000 fd57 	bl	800eee0 <xTaskRemoveFromEventList>
+ 800e432:	4603      	mov	r3, r0
+ 800e434:	2b00      	cmp	r3, #0
+ 800e436:	d001      	beq.n	800e43c <prvUnlockQueue+0x32>
+					{
+						/* The task waiting has a higher priority so record that
+						a context switch is required. */
+						vTaskMissedYield();
+ 800e438:	f000 fe30 	bl	800f09c <vTaskMissedYield>
+					break;
+				}
+			}
+			#endif /* configUSE_QUEUE_SETS */
+
+			--cTxLock;
+ 800e43c:	7bfb      	ldrb	r3, [r7, #15]
+ 800e43e:	3b01      	subs	r3, #1
+ 800e440:	b2db      	uxtb	r3, r3
+ 800e442:	73fb      	strb	r3, [r7, #15]
+		while( cTxLock > queueLOCKED_UNMODIFIED )
+ 800e444:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 800e448:	2b00      	cmp	r3, #0
+ 800e44a:	dce9      	bgt.n	800e420 <prvUnlockQueue+0x16>
+ 800e44c:	e000      	b.n	800e450 <prvUnlockQueue+0x46>
+					break;
+ 800e44e:	bf00      	nop
+		}
+
+		pxQueue->cTxLock = queueUNLOCKED;
+ 800e450:	687b      	ldr	r3, [r7, #4]
+ 800e452:	22ff      	movs	r2, #255	; 0xff
+ 800e454:	f883 2045 	strb.w	r2, [r3, #69]	; 0x45
+	}
+	taskEXIT_CRITICAL();
+ 800e458:	f001 fa78 	bl	800f94c <vPortExitCritical>
+
+	/* Do the same for the Rx lock. */
+	taskENTER_CRITICAL();
+ 800e45c:	f001 fa44 	bl	800f8e8 <vPortEnterCritical>
+	{
+		int8_t cRxLock = pxQueue->cRxLock;
+ 800e460:	687b      	ldr	r3, [r7, #4]
+ 800e462:	f893 3044 	ldrb.w	r3, [r3, #68]	; 0x44
+ 800e466:	73bb      	strb	r3, [r7, #14]
+
+		while( cRxLock > queueLOCKED_UNMODIFIED )
+ 800e468:	e011      	b.n	800e48e <prvUnlockQueue+0x84>
+		{
+			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+ 800e46a:	687b      	ldr	r3, [r7, #4]
+ 800e46c:	691b      	ldr	r3, [r3, #16]
+ 800e46e:	2b00      	cmp	r3, #0
+ 800e470:	d012      	beq.n	800e498 <prvUnlockQueue+0x8e>
+			{
+				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+ 800e472:	687b      	ldr	r3, [r7, #4]
+ 800e474:	3310      	adds	r3, #16
+ 800e476:	4618      	mov	r0, r3
+ 800e478:	f000 fd32 	bl	800eee0 <xTaskRemoveFromEventList>
+ 800e47c:	4603      	mov	r3, r0
+ 800e47e:	2b00      	cmp	r3, #0
+ 800e480:	d001      	beq.n	800e486 <prvUnlockQueue+0x7c>
+				{
+					vTaskMissedYield();
+ 800e482:	f000 fe0b 	bl	800f09c <vTaskMissedYield>
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				--cRxLock;
+ 800e486:	7bbb      	ldrb	r3, [r7, #14]
+ 800e488:	3b01      	subs	r3, #1
+ 800e48a:	b2db      	uxtb	r3, r3
+ 800e48c:	73bb      	strb	r3, [r7, #14]
+		while( cRxLock > queueLOCKED_UNMODIFIED )
+ 800e48e:	f997 300e 	ldrsb.w	r3, [r7, #14]
+ 800e492:	2b00      	cmp	r3, #0
+ 800e494:	dce9      	bgt.n	800e46a <prvUnlockQueue+0x60>
+ 800e496:	e000      	b.n	800e49a <prvUnlockQueue+0x90>
+			}
+			else
+			{
+				break;
+ 800e498:	bf00      	nop
+			}
+		}
+
+		pxQueue->cRxLock = queueUNLOCKED;
+ 800e49a:	687b      	ldr	r3, [r7, #4]
+ 800e49c:	22ff      	movs	r2, #255	; 0xff
+ 800e49e:	f883 2044 	strb.w	r2, [r3, #68]	; 0x44
+	}
+	taskEXIT_CRITICAL();
+ 800e4a2:	f001 fa53 	bl	800f94c <vPortExitCritical>
+}
+ 800e4a6:	bf00      	nop
+ 800e4a8:	3710      	adds	r7, #16
+ 800e4aa:	46bd      	mov	sp, r7
+ 800e4ac:	bd80      	pop	{r7, pc}
+
+0800e4ae <prvIsQueueEmpty>:
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
+{
+ 800e4ae:	b580      	push	{r7, lr}
+ 800e4b0:	b084      	sub	sp, #16
+ 800e4b2:	af00      	add	r7, sp, #0
+ 800e4b4:	6078      	str	r0, [r7, #4]
+BaseType_t xReturn;
+
+	taskENTER_CRITICAL();
+ 800e4b6:	f001 fa17 	bl	800f8e8 <vPortEnterCritical>
+	{
+		if( pxQueue->uxMessagesWaiting == ( UBaseType_t )  0 )
+ 800e4ba:	687b      	ldr	r3, [r7, #4]
+ 800e4bc:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800e4be:	2b00      	cmp	r3, #0
+ 800e4c0:	d102      	bne.n	800e4c8 <prvIsQueueEmpty+0x1a>
+		{
+			xReturn = pdTRUE;
+ 800e4c2:	2301      	movs	r3, #1
+ 800e4c4:	60fb      	str	r3, [r7, #12]
+ 800e4c6:	e001      	b.n	800e4cc <prvIsQueueEmpty+0x1e>
+		}
+		else
+		{
+			xReturn = pdFALSE;
+ 800e4c8:	2300      	movs	r3, #0
+ 800e4ca:	60fb      	str	r3, [r7, #12]
+		}
+	}
+	taskEXIT_CRITICAL();
+ 800e4cc:	f001 fa3e 	bl	800f94c <vPortExitCritical>
+
+	return xReturn;
+ 800e4d0:	68fb      	ldr	r3, [r7, #12]
+}
+ 800e4d2:	4618      	mov	r0, r3
+ 800e4d4:	3710      	adds	r7, #16
+ 800e4d6:	46bd      	mov	sp, r7
+ 800e4d8:	bd80      	pop	{r7, pc}
+
+0800e4da <prvIsQueueFull>:
+	return xReturn;
+} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
+{
+ 800e4da:	b580      	push	{r7, lr}
+ 800e4dc:	b084      	sub	sp, #16
+ 800e4de:	af00      	add	r7, sp, #0
+ 800e4e0:	6078      	str	r0, [r7, #4]
+BaseType_t xReturn;
+
+	taskENTER_CRITICAL();
+ 800e4e2:	f001 fa01 	bl	800f8e8 <vPortEnterCritical>
+	{
+		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
+ 800e4e6:	687b      	ldr	r3, [r7, #4]
+ 800e4e8:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 800e4ea:	687b      	ldr	r3, [r7, #4]
+ 800e4ec:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 800e4ee:	429a      	cmp	r2, r3
+ 800e4f0:	d102      	bne.n	800e4f8 <prvIsQueueFull+0x1e>
+		{
+			xReturn = pdTRUE;
+ 800e4f2:	2301      	movs	r3, #1
+ 800e4f4:	60fb      	str	r3, [r7, #12]
+ 800e4f6:	e001      	b.n	800e4fc <prvIsQueueFull+0x22>
+		}
+		else
+		{
+			xReturn = pdFALSE;
+ 800e4f8:	2300      	movs	r3, #0
+ 800e4fa:	60fb      	str	r3, [r7, #12]
+		}
+	}
+	taskEXIT_CRITICAL();
+ 800e4fc:	f001 fa26 	bl	800f94c <vPortExitCritical>
+
+	return xReturn;
+ 800e500:	68fb      	ldr	r3, [r7, #12]
+}
+ 800e502:	4618      	mov	r0, r3
+ 800e504:	3710      	adds	r7, #16
+ 800e506:	46bd      	mov	sp, r7
+ 800e508:	bd80      	pop	{r7, pc}
+
+0800e50a <xTaskCreateStatic>:
+									const uint32_t ulStackDepth,
+									void * const pvParameters,
+									UBaseType_t uxPriority,
+									StackType_t * const puxStackBuffer,
+									StaticTask_t * const pxTaskBuffer )
+	{
+ 800e50a:	b580      	push	{r7, lr}
+ 800e50c:	b08e      	sub	sp, #56	; 0x38
+ 800e50e:	af04      	add	r7, sp, #16
+ 800e510:	60f8      	str	r0, [r7, #12]
+ 800e512:	60b9      	str	r1, [r7, #8]
+ 800e514:	607a      	str	r2, [r7, #4]
+ 800e516:	603b      	str	r3, [r7, #0]
+	TCB_t *pxNewTCB;
+	TaskHandle_t xReturn;
+
+		configASSERT( puxStackBuffer != NULL );
+ 800e518:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 800e51a:	2b00      	cmp	r3, #0
+ 800e51c:	d10b      	bne.n	800e536 <xTaskCreateStatic+0x2c>
+	__asm volatile
+ 800e51e:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e522:	b672      	cpsid	i
+ 800e524:	f383 8811 	msr	BASEPRI, r3
+ 800e528:	f3bf 8f6f 	isb	sy
+ 800e52c:	f3bf 8f4f 	dsb	sy
+ 800e530:	b662      	cpsie	i
+ 800e532:	623b      	str	r3, [r7, #32]
+ 800e534:	e7fe      	b.n	800e534 <xTaskCreateStatic+0x2a>
+		configASSERT( pxTaskBuffer != NULL );
+ 800e536:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 800e538:	2b00      	cmp	r3, #0
+ 800e53a:	d10b      	bne.n	800e554 <xTaskCreateStatic+0x4a>
+ 800e53c:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e540:	b672      	cpsid	i
+ 800e542:	f383 8811 	msr	BASEPRI, r3
+ 800e546:	f3bf 8f6f 	isb	sy
+ 800e54a:	f3bf 8f4f 	dsb	sy
+ 800e54e:	b662      	cpsie	i
+ 800e550:	61fb      	str	r3, [r7, #28]
+ 800e552:	e7fe      	b.n	800e552 <xTaskCreateStatic+0x48>
+		#if( configASSERT_DEFINED == 1 )
+		{
+			/* Sanity check that the size of the structure used to declare a
+			variable of type StaticTask_t equals the size of the real task
+			structure. */
+			volatile size_t xSize = sizeof( StaticTask_t );
+ 800e554:	2358      	movs	r3, #88	; 0x58
+ 800e556:	613b      	str	r3, [r7, #16]
+			configASSERT( xSize == sizeof( TCB_t ) );
+ 800e558:	693b      	ldr	r3, [r7, #16]
+ 800e55a:	2b58      	cmp	r3, #88	; 0x58
+ 800e55c:	d00b      	beq.n	800e576 <xTaskCreateStatic+0x6c>
+ 800e55e:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e562:	b672      	cpsid	i
+ 800e564:	f383 8811 	msr	BASEPRI, r3
+ 800e568:	f3bf 8f6f 	isb	sy
+ 800e56c:	f3bf 8f4f 	dsb	sy
+ 800e570:	b662      	cpsie	i
+ 800e572:	61bb      	str	r3, [r7, #24]
+ 800e574:	e7fe      	b.n	800e574 <xTaskCreateStatic+0x6a>
+			( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
+ 800e576:	693b      	ldr	r3, [r7, #16]
+		}
+		#endif /* configASSERT_DEFINED */
+
+
+		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
+ 800e578:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 800e57a:	2b00      	cmp	r3, #0
+ 800e57c:	d01e      	beq.n	800e5bc <xTaskCreateStatic+0xb2>
+ 800e57e:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 800e580:	2b00      	cmp	r3, #0
+ 800e582:	d01b      	beq.n	800e5bc <xTaskCreateStatic+0xb2>
+		{
+			/* The memory used for the task's TCB and stack are passed into this
+			function - use them. */
+			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
+ 800e584:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 800e586:	627b      	str	r3, [r7, #36]	; 0x24
+			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
+ 800e588:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800e58a:	6b7a      	ldr	r2, [r7, #52]	; 0x34
+ 800e58c:	631a      	str	r2, [r3, #48]	; 0x30
+
+			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
+			{
+				/* Tasks can be created statically or dynamically, so note this
+				task was created statically in case the task is later deleted. */
+				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
+ 800e58e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800e590:	2202      	movs	r2, #2
+ 800e592:	f883 2055 	strb.w	r2, [r3, #85]	; 0x55
+			}
+			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
+
+			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
+ 800e596:	2300      	movs	r3, #0
+ 800e598:	9303      	str	r3, [sp, #12]
+ 800e59a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800e59c:	9302      	str	r3, [sp, #8]
+ 800e59e:	f107 0314 	add.w	r3, r7, #20
+ 800e5a2:	9301      	str	r3, [sp, #4]
+ 800e5a4:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e5a6:	9300      	str	r3, [sp, #0]
+ 800e5a8:	683b      	ldr	r3, [r7, #0]
+ 800e5aa:	687a      	ldr	r2, [r7, #4]
+ 800e5ac:	68b9      	ldr	r1, [r7, #8]
+ 800e5ae:	68f8      	ldr	r0, [r7, #12]
+ 800e5b0:	f000 f850 	bl	800e654 <prvInitialiseNewTask>
+			prvAddNewTaskToReadyList( pxNewTCB );
+ 800e5b4:	6a78      	ldr	r0, [r7, #36]	; 0x24
+ 800e5b6:	f000 f8e1 	bl	800e77c <prvAddNewTaskToReadyList>
+ 800e5ba:	e001      	b.n	800e5c0 <xTaskCreateStatic+0xb6>
+		}
+		else
+		{
+			xReturn = NULL;
+ 800e5bc:	2300      	movs	r3, #0
+ 800e5be:	617b      	str	r3, [r7, #20]
+		}
+
+		return xReturn;
+ 800e5c0:	697b      	ldr	r3, [r7, #20]
+	}
+ 800e5c2:	4618      	mov	r0, r3
+ 800e5c4:	3728      	adds	r7, #40	; 0x28
+ 800e5c6:	46bd      	mov	sp, r7
+ 800e5c8:	bd80      	pop	{r7, pc}
+
+0800e5ca <xTaskCreate>:
+							const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+							const configSTACK_DEPTH_TYPE usStackDepth,
+							void * const pvParameters,
+							UBaseType_t uxPriority,
+							TaskHandle_t * const pxCreatedTask )
+	{
+ 800e5ca:	b580      	push	{r7, lr}
+ 800e5cc:	b08c      	sub	sp, #48	; 0x30
+ 800e5ce:	af04      	add	r7, sp, #16
+ 800e5d0:	60f8      	str	r0, [r7, #12]
+ 800e5d2:	60b9      	str	r1, [r7, #8]
+ 800e5d4:	603b      	str	r3, [r7, #0]
+ 800e5d6:	4613      	mov	r3, r2
+ 800e5d8:	80fb      	strh	r3, [r7, #6]
+		#else /* portSTACK_GROWTH */
+		{
+		StackType_t *pxStack;
+
+			/* Allocate space for the stack used by the task being created. */
+			pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
+ 800e5da:	88fb      	ldrh	r3, [r7, #6]
+ 800e5dc:	009b      	lsls	r3, r3, #2
+ 800e5de:	4618      	mov	r0, r3
+ 800e5e0:	f001 faa4 	bl	800fb2c <pvPortMalloc>
+ 800e5e4:	6178      	str	r0, [r7, #20]
+
+			if( pxStack != NULL )
+ 800e5e6:	697b      	ldr	r3, [r7, #20]
+ 800e5e8:	2b00      	cmp	r3, #0
+ 800e5ea:	d00e      	beq.n	800e60a <xTaskCreate+0x40>
+			{
+				/* Allocate space for the TCB. */
+				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
+ 800e5ec:	2058      	movs	r0, #88	; 0x58
+ 800e5ee:	f001 fa9d 	bl	800fb2c <pvPortMalloc>
+ 800e5f2:	61f8      	str	r0, [r7, #28]
+
+				if( pxNewTCB != NULL )
+ 800e5f4:	69fb      	ldr	r3, [r7, #28]
+ 800e5f6:	2b00      	cmp	r3, #0
+ 800e5f8:	d003      	beq.n	800e602 <xTaskCreate+0x38>
+				{
+					/* Store the stack location in the TCB. */
+					pxNewTCB->pxStack = pxStack;
+ 800e5fa:	69fb      	ldr	r3, [r7, #28]
+ 800e5fc:	697a      	ldr	r2, [r7, #20]
+ 800e5fe:	631a      	str	r2, [r3, #48]	; 0x30
+ 800e600:	e005      	b.n	800e60e <xTaskCreate+0x44>
+				}
+				else
+				{
+					/* The stack cannot be used as the TCB was not created.  Free
+					it again. */
+					vPortFree( pxStack );
+ 800e602:	6978      	ldr	r0, [r7, #20]
+ 800e604:	f001 fb5e 	bl	800fcc4 <vPortFree>
+ 800e608:	e001      	b.n	800e60e <xTaskCreate+0x44>
+				}
+			}
+			else
+			{
+				pxNewTCB = NULL;
+ 800e60a:	2300      	movs	r3, #0
+ 800e60c:	61fb      	str	r3, [r7, #28]
+			}
+		}
+		#endif /* portSTACK_GROWTH */
+
+		if( pxNewTCB != NULL )
+ 800e60e:	69fb      	ldr	r3, [r7, #28]
+ 800e610:	2b00      	cmp	r3, #0
+ 800e612:	d017      	beq.n	800e644 <xTaskCreate+0x7a>
+		{
+			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
+			{
+				/* Tasks can be created statically or dynamically, so note this
+				task was created dynamically in case it is later deleted. */
+				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
+ 800e614:	69fb      	ldr	r3, [r7, #28]
+ 800e616:	2200      	movs	r2, #0
+ 800e618:	f883 2055 	strb.w	r2, [r3, #85]	; 0x55
+			}
+			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
+
+			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
+ 800e61c:	88fa      	ldrh	r2, [r7, #6]
+ 800e61e:	2300      	movs	r3, #0
+ 800e620:	9303      	str	r3, [sp, #12]
+ 800e622:	69fb      	ldr	r3, [r7, #28]
+ 800e624:	9302      	str	r3, [sp, #8]
+ 800e626:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e628:	9301      	str	r3, [sp, #4]
+ 800e62a:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800e62c:	9300      	str	r3, [sp, #0]
+ 800e62e:	683b      	ldr	r3, [r7, #0]
+ 800e630:	68b9      	ldr	r1, [r7, #8]
+ 800e632:	68f8      	ldr	r0, [r7, #12]
+ 800e634:	f000 f80e 	bl	800e654 <prvInitialiseNewTask>
+			prvAddNewTaskToReadyList( pxNewTCB );
+ 800e638:	69f8      	ldr	r0, [r7, #28]
+ 800e63a:	f000 f89f 	bl	800e77c <prvAddNewTaskToReadyList>
+			xReturn = pdPASS;
+ 800e63e:	2301      	movs	r3, #1
+ 800e640:	61bb      	str	r3, [r7, #24]
+ 800e642:	e002      	b.n	800e64a <xTaskCreate+0x80>
+		}
+		else
+		{
+			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
+ 800e644:	f04f 33ff 	mov.w	r3, #4294967295
+ 800e648:	61bb      	str	r3, [r7, #24]
+		}
+
+		return xReturn;
+ 800e64a:	69bb      	ldr	r3, [r7, #24]
+	}
+ 800e64c:	4618      	mov	r0, r3
+ 800e64e:	3720      	adds	r7, #32
+ 800e650:	46bd      	mov	sp, r7
+ 800e652:	bd80      	pop	{r7, pc}
+
+0800e654 <prvInitialiseNewTask>:
+									void * const pvParameters,
+									UBaseType_t uxPriority,
+									TaskHandle_t * const pxCreatedTask,
+									TCB_t *pxNewTCB,
+									const MemoryRegion_t * const xRegions )
+{
+ 800e654:	b580      	push	{r7, lr}
+ 800e656:	b088      	sub	sp, #32
+ 800e658:	af00      	add	r7, sp, #0
+ 800e65a:	60f8      	str	r0, [r7, #12]
+ 800e65c:	60b9      	str	r1, [r7, #8]
+ 800e65e:	607a      	str	r2, [r7, #4]
+ 800e660:	603b      	str	r3, [r7, #0]
+
+	/* Avoid dependency on memset() if it is not required. */
+	#if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
+	{
+		/* Fill the stack with a known value to assist debugging. */
+		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
+ 800e662:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e664:	6b18      	ldr	r0, [r3, #48]	; 0x30
+ 800e666:	687b      	ldr	r3, [r7, #4]
+ 800e668:	009b      	lsls	r3, r3, #2
+ 800e66a:	461a      	mov	r2, r3
+ 800e66c:	21a5      	movs	r1, #165	; 0xa5
+ 800e66e:	f00d feba 	bl	801c3e6 <memset>
+	grows from high memory to low (as per the 80x86) or vice versa.
+	portSTACK_GROWTH is used to make the result positive or negative as required
+	by the port. */
+	#if( portSTACK_GROWTH < 0 )
+	{
+		pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
+ 800e672:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e674:	6b1a      	ldr	r2, [r3, #48]	; 0x30
+ 800e676:	6879      	ldr	r1, [r7, #4]
+ 800e678:	f06f 4340 	mvn.w	r3, #3221225472	; 0xc0000000
+ 800e67c:	440b      	add	r3, r1
+ 800e67e:	009b      	lsls	r3, r3, #2
+ 800e680:	4413      	add	r3, r2
+ 800e682:	61bb      	str	r3, [r7, #24]
+		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
+ 800e684:	69bb      	ldr	r3, [r7, #24]
+ 800e686:	f023 0307 	bic.w	r3, r3, #7
+ 800e68a:	61bb      	str	r3, [r7, #24]
+
+		/* Check the alignment of the calculated top of stack is correct. */
+		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
+ 800e68c:	69bb      	ldr	r3, [r7, #24]
+ 800e68e:	f003 0307 	and.w	r3, r3, #7
+ 800e692:	2b00      	cmp	r3, #0
+ 800e694:	d00b      	beq.n	800e6ae <prvInitialiseNewTask+0x5a>
+ 800e696:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e69a:	b672      	cpsid	i
+ 800e69c:	f383 8811 	msr	BASEPRI, r3
+ 800e6a0:	f3bf 8f6f 	isb	sy
+ 800e6a4:	f3bf 8f4f 	dsb	sy
+ 800e6a8:	b662      	cpsie	i
+ 800e6aa:	617b      	str	r3, [r7, #20]
+ 800e6ac:	e7fe      	b.n	800e6ac <prvInitialiseNewTask+0x58>
+		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
+	}
+	#endif /* portSTACK_GROWTH */
+
+	/* Store the task name in the TCB. */
+	if( pcName != NULL )
+ 800e6ae:	68bb      	ldr	r3, [r7, #8]
+ 800e6b0:	2b00      	cmp	r3, #0
+ 800e6b2:	d01f      	beq.n	800e6f4 <prvInitialiseNewTask+0xa0>
+	{
+		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
+ 800e6b4:	2300      	movs	r3, #0
+ 800e6b6:	61fb      	str	r3, [r7, #28]
+ 800e6b8:	e012      	b.n	800e6e0 <prvInitialiseNewTask+0x8c>
+		{
+			pxNewTCB->pcTaskName[ x ] = pcName[ x ];
+ 800e6ba:	68ba      	ldr	r2, [r7, #8]
+ 800e6bc:	69fb      	ldr	r3, [r7, #28]
+ 800e6be:	4413      	add	r3, r2
+ 800e6c0:	7819      	ldrb	r1, [r3, #0]
+ 800e6c2:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 800e6c4:	69fb      	ldr	r3, [r7, #28]
+ 800e6c6:	4413      	add	r3, r2
+ 800e6c8:	3334      	adds	r3, #52	; 0x34
+ 800e6ca:	460a      	mov	r2, r1
+ 800e6cc:	701a      	strb	r2, [r3, #0]
+
+			/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
+			configMAX_TASK_NAME_LEN characters just in case the memory after the
+			string is not accessible (extremely unlikely). */
+			if( pcName[ x ] == ( char ) 0x00 )
+ 800e6ce:	68ba      	ldr	r2, [r7, #8]
+ 800e6d0:	69fb      	ldr	r3, [r7, #28]
+ 800e6d2:	4413      	add	r3, r2
+ 800e6d4:	781b      	ldrb	r3, [r3, #0]
+ 800e6d6:	2b00      	cmp	r3, #0
+ 800e6d8:	d006      	beq.n	800e6e8 <prvInitialiseNewTask+0x94>
+		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
+ 800e6da:	69fb      	ldr	r3, [r7, #28]
+ 800e6dc:	3301      	adds	r3, #1
+ 800e6de:	61fb      	str	r3, [r7, #28]
+ 800e6e0:	69fb      	ldr	r3, [r7, #28]
+ 800e6e2:	2b0f      	cmp	r3, #15
+ 800e6e4:	d9e9      	bls.n	800e6ba <prvInitialiseNewTask+0x66>
+ 800e6e6:	e000      	b.n	800e6ea <prvInitialiseNewTask+0x96>
+			{
+				break;
+ 800e6e8:	bf00      	nop
+			}
+		}
+
+		/* Ensure the name string is terminated in the case that the string length
+		was greater or equal to configMAX_TASK_NAME_LEN. */
+		pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
+ 800e6ea:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e6ec:	2200      	movs	r2, #0
+ 800e6ee:	f883 2043 	strb.w	r2, [r3, #67]	; 0x43
+ 800e6f2:	e003      	b.n	800e6fc <prvInitialiseNewTask+0xa8>
+	}
+	else
+	{
+		/* The task has not been given a name, so just ensure there is a NULL
+		terminator when it is read out. */
+		pxNewTCB->pcTaskName[ 0 ] = 0x00;
+ 800e6f4:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e6f6:	2200      	movs	r2, #0
+ 800e6f8:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
+	}
+
+	/* This is used as an array index so must ensure it's not too large.  First
+	remove the privilege bit if one is present. */
+	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
+ 800e6fc:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800e6fe:	2b06      	cmp	r3, #6
+ 800e700:	d901      	bls.n	800e706 <prvInitialiseNewTask+0xb2>
+	{
+		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
+ 800e702:	2306      	movs	r3, #6
+ 800e704:	62bb      	str	r3, [r7, #40]	; 0x28
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	pxNewTCB->uxPriority = uxPriority;
+ 800e706:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e708:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 800e70a:	62da      	str	r2, [r3, #44]	; 0x2c
+	#if ( configUSE_MUTEXES == 1 )
+	{
+		pxNewTCB->uxBasePriority = uxPriority;
+ 800e70c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e70e:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 800e710:	645a      	str	r2, [r3, #68]	; 0x44
+		pxNewTCB->uxMutexesHeld = 0;
+ 800e712:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e714:	2200      	movs	r2, #0
+ 800e716:	649a      	str	r2, [r3, #72]	; 0x48
+	}
+	#endif /* configUSE_MUTEXES */
+
+	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
+ 800e718:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e71a:	3304      	adds	r3, #4
+ 800e71c:	4618      	mov	r0, r3
+ 800e71e:	f7fe fe91 	bl	800d444 <vListInitialiseItem>
+	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
+ 800e722:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e724:	3318      	adds	r3, #24
+ 800e726:	4618      	mov	r0, r3
+ 800e728:	f7fe fe8c 	bl	800d444 <vListInitialiseItem>
+
+	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
+	back to	the containing TCB from a generic item in a list. */
+	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
+ 800e72c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e72e:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 800e730:	611a      	str	r2, [r3, #16]
+
+	/* Event lists are always in priority order. */
+	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+ 800e732:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800e734:	f1c3 0207 	rsb	r2, r3, #7
+ 800e738:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e73a:	619a      	str	r2, [r3, #24]
+	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
+ 800e73c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e73e:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 800e740:	625a      	str	r2, [r3, #36]	; 0x24
+	}
+	#endif /* portCRITICAL_NESTING_IN_TCB */
+
+	#if ( configUSE_APPLICATION_TASK_TAG == 1 )
+	{
+		pxNewTCB->pxTaskTag = NULL;
+ 800e742:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e744:	2200      	movs	r2, #0
+ 800e746:	64da      	str	r2, [r3, #76]	; 0x4c
+	}
+	#endif
+
+	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
+	{
+		pxNewTCB->ulNotifiedValue = 0;
+ 800e748:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e74a:	2200      	movs	r2, #0
+ 800e74c:	651a      	str	r2, [r3, #80]	; 0x50
+		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
+ 800e74e:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e750:	2200      	movs	r2, #0
+ 800e752:	f883 2054 	strb.w	r2, [r3, #84]	; 0x54
+			}
+			#endif /* portSTACK_GROWTH */
+		}
+		#else /* portHAS_STACK_OVERFLOW_CHECKING */
+		{
+			pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
+ 800e756:	683a      	ldr	r2, [r7, #0]
+ 800e758:	68f9      	ldr	r1, [r7, #12]
+ 800e75a:	69b8      	ldr	r0, [r7, #24]
+ 800e75c:	f000 ffbc 	bl	800f6d8 <pxPortInitialiseStack>
+ 800e760:	4602      	mov	r2, r0
+ 800e762:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800e764:	601a      	str	r2, [r3, #0]
+		}
+		#endif /* portHAS_STACK_OVERFLOW_CHECKING */
+	}
+	#endif /* portUSING_MPU_WRAPPERS */
+
+	if( pxCreatedTask != NULL )
+ 800e766:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e768:	2b00      	cmp	r3, #0
+ 800e76a:	d002      	beq.n	800e772 <prvInitialiseNewTask+0x11e>
+	{
+		/* Pass the handle out in an anonymous way.  The handle can be used to
+		change the created task's priority, delete the created task, etc.*/
+		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
+ 800e76c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800e76e:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 800e770:	601a      	str	r2, [r3, #0]
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+}
+ 800e772:	bf00      	nop
+ 800e774:	3720      	adds	r7, #32
+ 800e776:	46bd      	mov	sp, r7
+ 800e778:	bd80      	pop	{r7, pc}
+	...
+
+0800e77c <prvAddNewTaskToReadyList>:
+/*-----------------------------------------------------------*/
+
+static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
+{
+ 800e77c:	b580      	push	{r7, lr}
+ 800e77e:	b082      	sub	sp, #8
+ 800e780:	af00      	add	r7, sp, #0
+ 800e782:	6078      	str	r0, [r7, #4]
+	/* Ensure interrupts don't access the task lists while the lists are being
+	updated. */
+	taskENTER_CRITICAL();
+ 800e784:	f001 f8b0 	bl	800f8e8 <vPortEnterCritical>
+	{
+		uxCurrentNumberOfTasks++;
+ 800e788:	4b2a      	ldr	r3, [pc, #168]	; (800e834 <prvAddNewTaskToReadyList+0xb8>)
+ 800e78a:	681b      	ldr	r3, [r3, #0]
+ 800e78c:	3301      	adds	r3, #1
+ 800e78e:	4a29      	ldr	r2, [pc, #164]	; (800e834 <prvAddNewTaskToReadyList+0xb8>)
+ 800e790:	6013      	str	r3, [r2, #0]
+		if( pxCurrentTCB == NULL )
+ 800e792:	4b29      	ldr	r3, [pc, #164]	; (800e838 <prvAddNewTaskToReadyList+0xbc>)
+ 800e794:	681b      	ldr	r3, [r3, #0]
+ 800e796:	2b00      	cmp	r3, #0
+ 800e798:	d109      	bne.n	800e7ae <prvAddNewTaskToReadyList+0x32>
+		{
+			/* There are no other tasks, or all the other tasks are in
+			the suspended state - make this the current task. */
+			pxCurrentTCB = pxNewTCB;
+ 800e79a:	4a27      	ldr	r2, [pc, #156]	; (800e838 <prvAddNewTaskToReadyList+0xbc>)
+ 800e79c:	687b      	ldr	r3, [r7, #4]
+ 800e79e:	6013      	str	r3, [r2, #0]
+
+			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
+ 800e7a0:	4b24      	ldr	r3, [pc, #144]	; (800e834 <prvAddNewTaskToReadyList+0xb8>)
+ 800e7a2:	681b      	ldr	r3, [r3, #0]
+ 800e7a4:	2b01      	cmp	r3, #1
+ 800e7a6:	d110      	bne.n	800e7ca <prvAddNewTaskToReadyList+0x4e>
+			{
+				/* This is the first task to be created so do the preliminary
+				initialisation required.  We will not recover if this call
+				fails, but we will report the failure. */
+				prvInitialiseTaskLists();
+ 800e7a8:	f000 fc9e 	bl	800f0e8 <prvInitialiseTaskLists>
+ 800e7ac:	e00d      	b.n	800e7ca <prvAddNewTaskToReadyList+0x4e>
+		else
+		{
+			/* If the scheduler is not already running, make this task the
+			current task if it is the highest priority task to be created
+			so far. */
+			if( xSchedulerRunning == pdFALSE )
+ 800e7ae:	4b23      	ldr	r3, [pc, #140]	; (800e83c <prvAddNewTaskToReadyList+0xc0>)
+ 800e7b0:	681b      	ldr	r3, [r3, #0]
+ 800e7b2:	2b00      	cmp	r3, #0
+ 800e7b4:	d109      	bne.n	800e7ca <prvAddNewTaskToReadyList+0x4e>
+			{
+				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
+ 800e7b6:	4b20      	ldr	r3, [pc, #128]	; (800e838 <prvAddNewTaskToReadyList+0xbc>)
+ 800e7b8:	681b      	ldr	r3, [r3, #0]
+ 800e7ba:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800e7bc:	687b      	ldr	r3, [r7, #4]
+ 800e7be:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800e7c0:	429a      	cmp	r2, r3
+ 800e7c2:	d802      	bhi.n	800e7ca <prvAddNewTaskToReadyList+0x4e>
+				{
+					pxCurrentTCB = pxNewTCB;
+ 800e7c4:	4a1c      	ldr	r2, [pc, #112]	; (800e838 <prvAddNewTaskToReadyList+0xbc>)
+ 800e7c6:	687b      	ldr	r3, [r7, #4]
+ 800e7c8:	6013      	str	r3, [r2, #0]
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+
+		uxTaskNumber++;
+ 800e7ca:	4b1d      	ldr	r3, [pc, #116]	; (800e840 <prvAddNewTaskToReadyList+0xc4>)
+ 800e7cc:	681b      	ldr	r3, [r3, #0]
+ 800e7ce:	3301      	adds	r3, #1
+ 800e7d0:	4a1b      	ldr	r2, [pc, #108]	; (800e840 <prvAddNewTaskToReadyList+0xc4>)
+ 800e7d2:	6013      	str	r3, [r2, #0]
+			pxNewTCB->uxTCBNumber = uxTaskNumber;
+		}
+		#endif /* configUSE_TRACE_FACILITY */
+		traceTASK_CREATE( pxNewTCB );
+
+		prvAddTaskToReadyList( pxNewTCB );
+ 800e7d4:	687b      	ldr	r3, [r7, #4]
+ 800e7d6:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800e7d8:	2201      	movs	r2, #1
+ 800e7da:	409a      	lsls	r2, r3
+ 800e7dc:	4b19      	ldr	r3, [pc, #100]	; (800e844 <prvAddNewTaskToReadyList+0xc8>)
+ 800e7de:	681b      	ldr	r3, [r3, #0]
+ 800e7e0:	4313      	orrs	r3, r2
+ 800e7e2:	4a18      	ldr	r2, [pc, #96]	; (800e844 <prvAddNewTaskToReadyList+0xc8>)
+ 800e7e4:	6013      	str	r3, [r2, #0]
+ 800e7e6:	687b      	ldr	r3, [r7, #4]
+ 800e7e8:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800e7ea:	4613      	mov	r3, r2
+ 800e7ec:	009b      	lsls	r3, r3, #2
+ 800e7ee:	4413      	add	r3, r2
+ 800e7f0:	009b      	lsls	r3, r3, #2
+ 800e7f2:	4a15      	ldr	r2, [pc, #84]	; (800e848 <prvAddNewTaskToReadyList+0xcc>)
+ 800e7f4:	441a      	add	r2, r3
+ 800e7f6:	687b      	ldr	r3, [r7, #4]
+ 800e7f8:	3304      	adds	r3, #4
+ 800e7fa:	4619      	mov	r1, r3
+ 800e7fc:	4610      	mov	r0, r2
+ 800e7fe:	f7fe fe2e 	bl	800d45e <vListInsertEnd>
+
+		portSETUP_TCB( pxNewTCB );
+	}
+	taskEXIT_CRITICAL();
+ 800e802:	f001 f8a3 	bl	800f94c <vPortExitCritical>
+
+	if( xSchedulerRunning != pdFALSE )
+ 800e806:	4b0d      	ldr	r3, [pc, #52]	; (800e83c <prvAddNewTaskToReadyList+0xc0>)
+ 800e808:	681b      	ldr	r3, [r3, #0]
+ 800e80a:	2b00      	cmp	r3, #0
+ 800e80c:	d00e      	beq.n	800e82c <prvAddNewTaskToReadyList+0xb0>
+	{
+		/* If the created task is of a higher priority than the current task
+		then it should run now. */
+		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
+ 800e80e:	4b0a      	ldr	r3, [pc, #40]	; (800e838 <prvAddNewTaskToReadyList+0xbc>)
+ 800e810:	681b      	ldr	r3, [r3, #0]
+ 800e812:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800e814:	687b      	ldr	r3, [r7, #4]
+ 800e816:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800e818:	429a      	cmp	r2, r3
+ 800e81a:	d207      	bcs.n	800e82c <prvAddNewTaskToReadyList+0xb0>
+		{
+			taskYIELD_IF_USING_PREEMPTION();
+ 800e81c:	4b0b      	ldr	r3, [pc, #44]	; (800e84c <prvAddNewTaskToReadyList+0xd0>)
+ 800e81e:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800e822:	601a      	str	r2, [r3, #0]
+ 800e824:	f3bf 8f4f 	dsb	sy
+ 800e828:	f3bf 8f6f 	isb	sy
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+}
+ 800e82c:	bf00      	nop
+ 800e82e:	3708      	adds	r7, #8
+ 800e830:	46bd      	mov	sp, r7
+ 800e832:	bd80      	pop	{r7, pc}
+ 800e834:	20000678 	.word	0x20000678
+ 800e838:	20000578 	.word	0x20000578
+ 800e83c:	20000684 	.word	0x20000684
+ 800e840:	20000694 	.word	0x20000694
+ 800e844:	20000680 	.word	0x20000680
+ 800e848:	2000057c 	.word	0x2000057c
+ 800e84c:	e000ed04 	.word	0xe000ed04
+
+0800e850 <vTaskDelayUntil>:
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_vTaskDelayUntil == 1 )
+
+	void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement )
+	{
+ 800e850:	b580      	push	{r7, lr}
+ 800e852:	b08a      	sub	sp, #40	; 0x28
+ 800e854:	af00      	add	r7, sp, #0
+ 800e856:	6078      	str	r0, [r7, #4]
+ 800e858:	6039      	str	r1, [r7, #0]
+	TickType_t xTimeToWake;
+	BaseType_t xAlreadyYielded, xShouldDelay = pdFALSE;
+ 800e85a:	2300      	movs	r3, #0
+ 800e85c:	627b      	str	r3, [r7, #36]	; 0x24
+
+		configASSERT( pxPreviousWakeTime );
+ 800e85e:	687b      	ldr	r3, [r7, #4]
+ 800e860:	2b00      	cmp	r3, #0
+ 800e862:	d10b      	bne.n	800e87c <vTaskDelayUntil+0x2c>
+ 800e864:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e868:	b672      	cpsid	i
+ 800e86a:	f383 8811 	msr	BASEPRI, r3
+ 800e86e:	f3bf 8f6f 	isb	sy
+ 800e872:	f3bf 8f4f 	dsb	sy
+ 800e876:	b662      	cpsie	i
+ 800e878:	617b      	str	r3, [r7, #20]
+ 800e87a:	e7fe      	b.n	800e87a <vTaskDelayUntil+0x2a>
+		configASSERT( ( xTimeIncrement > 0U ) );
+ 800e87c:	683b      	ldr	r3, [r7, #0]
+ 800e87e:	2b00      	cmp	r3, #0
+ 800e880:	d10b      	bne.n	800e89a <vTaskDelayUntil+0x4a>
+ 800e882:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e886:	b672      	cpsid	i
+ 800e888:	f383 8811 	msr	BASEPRI, r3
+ 800e88c:	f3bf 8f6f 	isb	sy
+ 800e890:	f3bf 8f4f 	dsb	sy
+ 800e894:	b662      	cpsie	i
+ 800e896:	613b      	str	r3, [r7, #16]
+ 800e898:	e7fe      	b.n	800e898 <vTaskDelayUntil+0x48>
+		configASSERT( uxSchedulerSuspended == 0 );
+ 800e89a:	4b2a      	ldr	r3, [pc, #168]	; (800e944 <vTaskDelayUntil+0xf4>)
+ 800e89c:	681b      	ldr	r3, [r3, #0]
+ 800e89e:	2b00      	cmp	r3, #0
+ 800e8a0:	d00b      	beq.n	800e8ba <vTaskDelayUntil+0x6a>
+ 800e8a2:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e8a6:	b672      	cpsid	i
+ 800e8a8:	f383 8811 	msr	BASEPRI, r3
+ 800e8ac:	f3bf 8f6f 	isb	sy
+ 800e8b0:	f3bf 8f4f 	dsb	sy
+ 800e8b4:	b662      	cpsie	i
+ 800e8b6:	60fb      	str	r3, [r7, #12]
+ 800e8b8:	e7fe      	b.n	800e8b8 <vTaskDelayUntil+0x68>
+
+		vTaskSuspendAll();
+ 800e8ba:	f000 f8e1 	bl	800ea80 <vTaskSuspendAll>
+		{
+			/* Minor optimisation.  The tick count cannot change in this
+			block. */
+			const TickType_t xConstTickCount = xTickCount;
+ 800e8be:	4b22      	ldr	r3, [pc, #136]	; (800e948 <vTaskDelayUntil+0xf8>)
+ 800e8c0:	681b      	ldr	r3, [r3, #0]
+ 800e8c2:	623b      	str	r3, [r7, #32]
+
+			/* Generate the tick time at which the task wants to wake. */
+			xTimeToWake = *pxPreviousWakeTime + xTimeIncrement;
+ 800e8c4:	687b      	ldr	r3, [r7, #4]
+ 800e8c6:	681b      	ldr	r3, [r3, #0]
+ 800e8c8:	683a      	ldr	r2, [r7, #0]
+ 800e8ca:	4413      	add	r3, r2
+ 800e8cc:	61fb      	str	r3, [r7, #28]
+
+			if( xConstTickCount < *pxPreviousWakeTime )
+ 800e8ce:	687b      	ldr	r3, [r7, #4]
+ 800e8d0:	681b      	ldr	r3, [r3, #0]
+ 800e8d2:	6a3a      	ldr	r2, [r7, #32]
+ 800e8d4:	429a      	cmp	r2, r3
+ 800e8d6:	d20b      	bcs.n	800e8f0 <vTaskDelayUntil+0xa0>
+				/* The tick count has overflowed since this function was
+				lasted called.  In this case the only time we should ever
+				actually delay is if the wake time has also	overflowed,
+				and the wake time is greater than the tick time.  When this
+				is the case it is as if neither time had overflowed. */
+				if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xConstTickCount ) )
+ 800e8d8:	687b      	ldr	r3, [r7, #4]
+ 800e8da:	681b      	ldr	r3, [r3, #0]
+ 800e8dc:	69fa      	ldr	r2, [r7, #28]
+ 800e8de:	429a      	cmp	r2, r3
+ 800e8e0:	d211      	bcs.n	800e906 <vTaskDelayUntil+0xb6>
+ 800e8e2:	69fa      	ldr	r2, [r7, #28]
+ 800e8e4:	6a3b      	ldr	r3, [r7, #32]
+ 800e8e6:	429a      	cmp	r2, r3
+ 800e8e8:	d90d      	bls.n	800e906 <vTaskDelayUntil+0xb6>
+				{
+					xShouldDelay = pdTRUE;
+ 800e8ea:	2301      	movs	r3, #1
+ 800e8ec:	627b      	str	r3, [r7, #36]	; 0x24
+ 800e8ee:	e00a      	b.n	800e906 <vTaskDelayUntil+0xb6>
+			else
+			{
+				/* The tick time has not overflowed.  In this case we will
+				delay if either the wake time has overflowed, and/or the
+				tick time is less than the wake time. */
+				if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xConstTickCount ) )
+ 800e8f0:	687b      	ldr	r3, [r7, #4]
+ 800e8f2:	681b      	ldr	r3, [r3, #0]
+ 800e8f4:	69fa      	ldr	r2, [r7, #28]
+ 800e8f6:	429a      	cmp	r2, r3
+ 800e8f8:	d303      	bcc.n	800e902 <vTaskDelayUntil+0xb2>
+ 800e8fa:	69fa      	ldr	r2, [r7, #28]
+ 800e8fc:	6a3b      	ldr	r3, [r7, #32]
+ 800e8fe:	429a      	cmp	r2, r3
+ 800e900:	d901      	bls.n	800e906 <vTaskDelayUntil+0xb6>
+				{
+					xShouldDelay = pdTRUE;
+ 800e902:	2301      	movs	r3, #1
+ 800e904:	627b      	str	r3, [r7, #36]	; 0x24
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+
+			/* Update the wake time ready for the next call. */
+			*pxPreviousWakeTime = xTimeToWake;
+ 800e906:	687b      	ldr	r3, [r7, #4]
+ 800e908:	69fa      	ldr	r2, [r7, #28]
+ 800e90a:	601a      	str	r2, [r3, #0]
+
+			if( xShouldDelay != pdFALSE )
+ 800e90c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800e90e:	2b00      	cmp	r3, #0
+ 800e910:	d006      	beq.n	800e920 <vTaskDelayUntil+0xd0>
+			{
+				traceTASK_DELAY_UNTIL( xTimeToWake );
+
+				/* prvAddCurrentTaskToDelayedList() needs the block time, not
+				the time to wake, so subtract the current tick count. */
+				prvAddCurrentTaskToDelayedList( xTimeToWake - xConstTickCount, pdFALSE );
+ 800e912:	69fa      	ldr	r2, [r7, #28]
+ 800e914:	6a3b      	ldr	r3, [r7, #32]
+ 800e916:	1ad3      	subs	r3, r2, r3
+ 800e918:	2100      	movs	r1, #0
+ 800e91a:	4618      	mov	r0, r3
+ 800e91c:	f000 fe76 	bl	800f60c <prvAddCurrentTaskToDelayedList>
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		xAlreadyYielded = xTaskResumeAll();
+ 800e920:	f000 f8bc 	bl	800ea9c <xTaskResumeAll>
+ 800e924:	61b8      	str	r0, [r7, #24]
+
+		/* Force a reschedule if xTaskResumeAll has not already done so, we may
+		have put ourselves to sleep. */
+		if( xAlreadyYielded == pdFALSE )
+ 800e926:	69bb      	ldr	r3, [r7, #24]
+ 800e928:	2b00      	cmp	r3, #0
+ 800e92a:	d107      	bne.n	800e93c <vTaskDelayUntil+0xec>
+		{
+			portYIELD_WITHIN_API();
+ 800e92c:	4b07      	ldr	r3, [pc, #28]	; (800e94c <vTaskDelayUntil+0xfc>)
+ 800e92e:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800e932:	601a      	str	r2, [r3, #0]
+ 800e934:	f3bf 8f4f 	dsb	sy
+ 800e938:	f3bf 8f6f 	isb	sy
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+ 800e93c:	bf00      	nop
+ 800e93e:	3728      	adds	r7, #40	; 0x28
+ 800e940:	46bd      	mov	sp, r7
+ 800e942:	bd80      	pop	{r7, pc}
+ 800e944:	200006a0 	.word	0x200006a0
+ 800e948:	2000067c 	.word	0x2000067c
+ 800e94c:	e000ed04 	.word	0xe000ed04
+
+0800e950 <vTaskDelay>:
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_vTaskDelay == 1 )
+
+	void vTaskDelay( const TickType_t xTicksToDelay )
+	{
+ 800e950:	b580      	push	{r7, lr}
+ 800e952:	b084      	sub	sp, #16
+ 800e954:	af00      	add	r7, sp, #0
+ 800e956:	6078      	str	r0, [r7, #4]
+	BaseType_t xAlreadyYielded = pdFALSE;
+ 800e958:	2300      	movs	r3, #0
+ 800e95a:	60fb      	str	r3, [r7, #12]
+
+		/* A delay time of zero just forces a reschedule. */
+		if( xTicksToDelay > ( TickType_t ) 0U )
+ 800e95c:	687b      	ldr	r3, [r7, #4]
+ 800e95e:	2b00      	cmp	r3, #0
+ 800e960:	d018      	beq.n	800e994 <vTaskDelay+0x44>
+		{
+			configASSERT( uxSchedulerSuspended == 0 );
+ 800e962:	4b14      	ldr	r3, [pc, #80]	; (800e9b4 <vTaskDelay+0x64>)
+ 800e964:	681b      	ldr	r3, [r3, #0]
+ 800e966:	2b00      	cmp	r3, #0
+ 800e968:	d00b      	beq.n	800e982 <vTaskDelay+0x32>
+ 800e96a:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800e96e:	b672      	cpsid	i
+ 800e970:	f383 8811 	msr	BASEPRI, r3
+ 800e974:	f3bf 8f6f 	isb	sy
+ 800e978:	f3bf 8f4f 	dsb	sy
+ 800e97c:	b662      	cpsie	i
+ 800e97e:	60bb      	str	r3, [r7, #8]
+ 800e980:	e7fe      	b.n	800e980 <vTaskDelay+0x30>
+			vTaskSuspendAll();
+ 800e982:	f000 f87d 	bl	800ea80 <vTaskSuspendAll>
+				list or removed from the blocked list until the scheduler
+				is resumed.
+
+				This task cannot be in an event list as it is the currently
+				executing task. */
+				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
+ 800e986:	2100      	movs	r1, #0
+ 800e988:	6878      	ldr	r0, [r7, #4]
+ 800e98a:	f000 fe3f 	bl	800f60c <prvAddCurrentTaskToDelayedList>
+			}
+			xAlreadyYielded = xTaskResumeAll();
+ 800e98e:	f000 f885 	bl	800ea9c <xTaskResumeAll>
+ 800e992:	60f8      	str	r0, [r7, #12]
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		/* Force a reschedule if xTaskResumeAll has not already done so, we may
+		have put ourselves to sleep. */
+		if( xAlreadyYielded == pdFALSE )
+ 800e994:	68fb      	ldr	r3, [r7, #12]
+ 800e996:	2b00      	cmp	r3, #0
+ 800e998:	d107      	bne.n	800e9aa <vTaskDelay+0x5a>
+		{
+			portYIELD_WITHIN_API();
+ 800e99a:	4b07      	ldr	r3, [pc, #28]	; (800e9b8 <vTaskDelay+0x68>)
+ 800e99c:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800e9a0:	601a      	str	r2, [r3, #0]
+ 800e9a2:	f3bf 8f4f 	dsb	sy
+ 800e9a6:	f3bf 8f6f 	isb	sy
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+ 800e9aa:	bf00      	nop
+ 800e9ac:	3710      	adds	r7, #16
+ 800e9ae:	46bd      	mov	sp, r7
+ 800e9b0:	bd80      	pop	{r7, pc}
+ 800e9b2:	bf00      	nop
+ 800e9b4:	200006a0 	.word	0x200006a0
+ 800e9b8:	e000ed04 	.word	0xe000ed04
+
+0800e9bc <vTaskStartScheduler>:
+
+#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+void vTaskStartScheduler( void )
+{
+ 800e9bc:	b580      	push	{r7, lr}
+ 800e9be:	b08a      	sub	sp, #40	; 0x28
+ 800e9c0:	af04      	add	r7, sp, #16
+BaseType_t xReturn;
+
+	/* Add the idle task at the lowest priority. */
+	#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+	{
+		StaticTask_t *pxIdleTaskTCBBuffer = NULL;
+ 800e9c2:	2300      	movs	r3, #0
+ 800e9c4:	60bb      	str	r3, [r7, #8]
+		StackType_t *pxIdleTaskStackBuffer = NULL;
+ 800e9c6:	2300      	movs	r3, #0
+ 800e9c8:	607b      	str	r3, [r7, #4]
+		uint32_t ulIdleTaskStackSize;
+
+		/* The Idle task is created using user provided RAM - obtain the
+		address of the RAM then create the idle task. */
+		vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
+ 800e9ca:	463a      	mov	r2, r7
+ 800e9cc:	1d39      	adds	r1, r7, #4
+ 800e9ce:	f107 0308 	add.w	r3, r7, #8
+ 800e9d2:	4618      	mov	r0, r3
+ 800e9d4:	f7f1 fe06 	bl	80005e4 <vApplicationGetIdleTaskMemory>
+		xIdleTaskHandle = xTaskCreateStatic(	prvIdleTask,
+ 800e9d8:	6839      	ldr	r1, [r7, #0]
+ 800e9da:	687b      	ldr	r3, [r7, #4]
+ 800e9dc:	68ba      	ldr	r2, [r7, #8]
+ 800e9de:	9202      	str	r2, [sp, #8]
+ 800e9e0:	9301      	str	r3, [sp, #4]
+ 800e9e2:	2300      	movs	r3, #0
+ 800e9e4:	9300      	str	r3, [sp, #0]
+ 800e9e6:	2300      	movs	r3, #0
+ 800e9e8:	460a      	mov	r2, r1
+ 800e9ea:	491f      	ldr	r1, [pc, #124]	; (800ea68 <vTaskStartScheduler+0xac>)
+ 800e9ec:	481f      	ldr	r0, [pc, #124]	; (800ea6c <vTaskStartScheduler+0xb0>)
+ 800e9ee:	f7ff fd8c 	bl	800e50a <xTaskCreateStatic>
+ 800e9f2:	4602      	mov	r2, r0
+ 800e9f4:	4b1e      	ldr	r3, [pc, #120]	; (800ea70 <vTaskStartScheduler+0xb4>)
+ 800e9f6:	601a      	str	r2, [r3, #0]
+												( void * ) NULL, /*lint !e961.  The cast is not redundant for all compilers. */
+												portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
+												pxIdleTaskStackBuffer,
+												pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
+
+		if( xIdleTaskHandle != NULL )
+ 800e9f8:	4b1d      	ldr	r3, [pc, #116]	; (800ea70 <vTaskStartScheduler+0xb4>)
+ 800e9fa:	681b      	ldr	r3, [r3, #0]
+ 800e9fc:	2b00      	cmp	r3, #0
+ 800e9fe:	d002      	beq.n	800ea06 <vTaskStartScheduler+0x4a>
+		{
+			xReturn = pdPASS;
+ 800ea00:	2301      	movs	r3, #1
+ 800ea02:	617b      	str	r3, [r7, #20]
+ 800ea04:	e001      	b.n	800ea0a <vTaskStartScheduler+0x4e>
+		}
+		else
+		{
+			xReturn = pdFAIL;
+ 800ea06:	2300      	movs	r3, #0
+ 800ea08:	617b      	str	r3, [r7, #20]
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	#endif /* configUSE_TIMERS */
+
+	if( xReturn == pdPASS )
+ 800ea0a:	697b      	ldr	r3, [r7, #20]
+ 800ea0c:	2b01      	cmp	r3, #1
+ 800ea0e:	d117      	bne.n	800ea40 <vTaskStartScheduler+0x84>
+ 800ea10:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800ea14:	b672      	cpsid	i
+ 800ea16:	f383 8811 	msr	BASEPRI, r3
+ 800ea1a:	f3bf 8f6f 	isb	sy
+ 800ea1e:	f3bf 8f4f 	dsb	sy
+ 800ea22:	b662      	cpsie	i
+ 800ea24:	613b      	str	r3, [r7, #16]
+			structure specific to the task that will run first. */
+			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
+		}
+		#endif /* configUSE_NEWLIB_REENTRANT */
+
+		xNextTaskUnblockTime = portMAX_DELAY;
+ 800ea26:	4b13      	ldr	r3, [pc, #76]	; (800ea74 <vTaskStartScheduler+0xb8>)
+ 800ea28:	f04f 32ff 	mov.w	r2, #4294967295
+ 800ea2c:	601a      	str	r2, [r3, #0]
+		xSchedulerRunning = pdTRUE;
+ 800ea2e:	4b12      	ldr	r3, [pc, #72]	; (800ea78 <vTaskStartScheduler+0xbc>)
+ 800ea30:	2201      	movs	r2, #1
+ 800ea32:	601a      	str	r2, [r3, #0]
+		xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
+ 800ea34:	4b11      	ldr	r3, [pc, #68]	; (800ea7c <vTaskStartScheduler+0xc0>)
+ 800ea36:	2200      	movs	r2, #0
+ 800ea38:	601a      	str	r2, [r3, #0]
+
+		traceTASK_SWITCHED_IN();
+
+		/* Setting up the timer tick is hardware specific and thus in the
+		portable interface. */
+		if( xPortStartScheduler() != pdFALSE )
+ 800ea3a:	f000 fed9 	bl	800f7f0 <xPortStartScheduler>
+	}
+
+	/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
+	meaning xIdleTaskHandle is not used anywhere else. */
+	( void ) xIdleTaskHandle;
+}
+ 800ea3e:	e00f      	b.n	800ea60 <vTaskStartScheduler+0xa4>
+		configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
+ 800ea40:	697b      	ldr	r3, [r7, #20]
+ 800ea42:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800ea46:	d10b      	bne.n	800ea60 <vTaskStartScheduler+0xa4>
+ 800ea48:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800ea4c:	b672      	cpsid	i
+ 800ea4e:	f383 8811 	msr	BASEPRI, r3
+ 800ea52:	f3bf 8f6f 	isb	sy
+ 800ea56:	f3bf 8f4f 	dsb	sy
+ 800ea5a:	b662      	cpsie	i
+ 800ea5c:	60fb      	str	r3, [r7, #12]
+ 800ea5e:	e7fe      	b.n	800ea5e <vTaskStartScheduler+0xa2>
+}
+ 800ea60:	bf00      	nop
+ 800ea62:	3718      	adds	r7, #24
+ 800ea64:	46bd      	mov	sp, r7
+ 800ea66:	bd80      	pop	{r7, pc}
+ 800ea68:	0801d6fc 	.word	0x0801d6fc
+ 800ea6c:	0800f0b5 	.word	0x0800f0b5
+ 800ea70:	2000069c 	.word	0x2000069c
+ 800ea74:	20000698 	.word	0x20000698
+ 800ea78:	20000684 	.word	0x20000684
+ 800ea7c:	2000067c 	.word	0x2000067c
+
+0800ea80 <vTaskSuspendAll>:
+	vPortEndScheduler();
+}
+/*----------------------------------------------------------*/
+
+void vTaskSuspendAll( void )
+{
+ 800ea80:	b480      	push	{r7}
+ 800ea82:	af00      	add	r7, sp, #0
+	/* A critical section is not required as the variable is of type
+	BaseType_t.  Please read Richard Barry's reply in the following link to a
+	post in the FreeRTOS support forum before reporting this as a bug! -
+	http://goo.gl/wu4acr */
+	++uxSchedulerSuspended;
+ 800ea84:	4b04      	ldr	r3, [pc, #16]	; (800ea98 <vTaskSuspendAll+0x18>)
+ 800ea86:	681b      	ldr	r3, [r3, #0]
+ 800ea88:	3301      	adds	r3, #1
+ 800ea8a:	4a03      	ldr	r2, [pc, #12]	; (800ea98 <vTaskSuspendAll+0x18>)
+ 800ea8c:	6013      	str	r3, [r2, #0]
+	portMEMORY_BARRIER();
+}
+ 800ea8e:	bf00      	nop
+ 800ea90:	46bd      	mov	sp, r7
+ 800ea92:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800ea96:	4770      	bx	lr
+ 800ea98:	200006a0 	.word	0x200006a0
+
+0800ea9c <xTaskResumeAll>:
+
+#endif /* configUSE_TICKLESS_IDLE */
+/*----------------------------------------------------------*/
+
+BaseType_t xTaskResumeAll( void )
+{
+ 800ea9c:	b580      	push	{r7, lr}
+ 800ea9e:	b084      	sub	sp, #16
+ 800eaa0:	af00      	add	r7, sp, #0
+TCB_t *pxTCB = NULL;
+ 800eaa2:	2300      	movs	r3, #0
+ 800eaa4:	60fb      	str	r3, [r7, #12]
+BaseType_t xAlreadyYielded = pdFALSE;
+ 800eaa6:	2300      	movs	r3, #0
+ 800eaa8:	60bb      	str	r3, [r7, #8]
+
+	/* If uxSchedulerSuspended is zero then this function does not match a
+	previous call to vTaskSuspendAll(). */
+	configASSERT( uxSchedulerSuspended );
+ 800eaaa:	4b42      	ldr	r3, [pc, #264]	; (800ebb4 <xTaskResumeAll+0x118>)
+ 800eaac:	681b      	ldr	r3, [r3, #0]
+ 800eaae:	2b00      	cmp	r3, #0
+ 800eab0:	d10b      	bne.n	800eaca <xTaskResumeAll+0x2e>
+ 800eab2:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800eab6:	b672      	cpsid	i
+ 800eab8:	f383 8811 	msr	BASEPRI, r3
+ 800eabc:	f3bf 8f6f 	isb	sy
+ 800eac0:	f3bf 8f4f 	dsb	sy
+ 800eac4:	b662      	cpsie	i
+ 800eac6:	603b      	str	r3, [r7, #0]
+ 800eac8:	e7fe      	b.n	800eac8 <xTaskResumeAll+0x2c>
+	/* It is possible that an ISR caused a task to be removed from an event
+	list while the scheduler was suspended.  If this was the case then the
+	removed task will have been added to the xPendingReadyList.  Once the
+	scheduler has been resumed it is safe to move all the pending ready
+	tasks from this list into their appropriate ready list. */
+	taskENTER_CRITICAL();
+ 800eaca:	f000 ff0d 	bl	800f8e8 <vPortEnterCritical>
+	{
+		--uxSchedulerSuspended;
+ 800eace:	4b39      	ldr	r3, [pc, #228]	; (800ebb4 <xTaskResumeAll+0x118>)
+ 800ead0:	681b      	ldr	r3, [r3, #0]
+ 800ead2:	3b01      	subs	r3, #1
+ 800ead4:	4a37      	ldr	r2, [pc, #220]	; (800ebb4 <xTaskResumeAll+0x118>)
+ 800ead6:	6013      	str	r3, [r2, #0]
+
+		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+ 800ead8:	4b36      	ldr	r3, [pc, #216]	; (800ebb4 <xTaskResumeAll+0x118>)
+ 800eada:	681b      	ldr	r3, [r3, #0]
+ 800eadc:	2b00      	cmp	r3, #0
+ 800eade:	d161      	bne.n	800eba4 <xTaskResumeAll+0x108>
+		{
+			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
+ 800eae0:	4b35      	ldr	r3, [pc, #212]	; (800ebb8 <xTaskResumeAll+0x11c>)
+ 800eae2:	681b      	ldr	r3, [r3, #0]
+ 800eae4:	2b00      	cmp	r3, #0
+ 800eae6:	d05d      	beq.n	800eba4 <xTaskResumeAll+0x108>
+			{
+				/* Move any readied tasks from the pending list into the
+				appropriate ready list. */
+				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+ 800eae8:	e02e      	b.n	800eb48 <xTaskResumeAll+0xac>
+				{
+					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 800eaea:	4b34      	ldr	r3, [pc, #208]	; (800ebbc <xTaskResumeAll+0x120>)
+ 800eaec:	68db      	ldr	r3, [r3, #12]
+ 800eaee:	68db      	ldr	r3, [r3, #12]
+ 800eaf0:	60fb      	str	r3, [r7, #12]
+					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+ 800eaf2:	68fb      	ldr	r3, [r7, #12]
+ 800eaf4:	3318      	adds	r3, #24
+ 800eaf6:	4618      	mov	r0, r3
+ 800eaf8:	f7fe fd0e 	bl	800d518 <uxListRemove>
+					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+ 800eafc:	68fb      	ldr	r3, [r7, #12]
+ 800eafe:	3304      	adds	r3, #4
+ 800eb00:	4618      	mov	r0, r3
+ 800eb02:	f7fe fd09 	bl	800d518 <uxListRemove>
+					prvAddTaskToReadyList( pxTCB );
+ 800eb06:	68fb      	ldr	r3, [r7, #12]
+ 800eb08:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800eb0a:	2201      	movs	r2, #1
+ 800eb0c:	409a      	lsls	r2, r3
+ 800eb0e:	4b2c      	ldr	r3, [pc, #176]	; (800ebc0 <xTaskResumeAll+0x124>)
+ 800eb10:	681b      	ldr	r3, [r3, #0]
+ 800eb12:	4313      	orrs	r3, r2
+ 800eb14:	4a2a      	ldr	r2, [pc, #168]	; (800ebc0 <xTaskResumeAll+0x124>)
+ 800eb16:	6013      	str	r3, [r2, #0]
+ 800eb18:	68fb      	ldr	r3, [r7, #12]
+ 800eb1a:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800eb1c:	4613      	mov	r3, r2
+ 800eb1e:	009b      	lsls	r3, r3, #2
+ 800eb20:	4413      	add	r3, r2
+ 800eb22:	009b      	lsls	r3, r3, #2
+ 800eb24:	4a27      	ldr	r2, [pc, #156]	; (800ebc4 <xTaskResumeAll+0x128>)
+ 800eb26:	441a      	add	r2, r3
+ 800eb28:	68fb      	ldr	r3, [r7, #12]
+ 800eb2a:	3304      	adds	r3, #4
+ 800eb2c:	4619      	mov	r1, r3
+ 800eb2e:	4610      	mov	r0, r2
+ 800eb30:	f7fe fc95 	bl	800d45e <vListInsertEnd>
+
+					/* If the moved task has a priority higher than the current
+					task then a yield must be performed. */
+					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+ 800eb34:	68fb      	ldr	r3, [r7, #12]
+ 800eb36:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800eb38:	4b23      	ldr	r3, [pc, #140]	; (800ebc8 <xTaskResumeAll+0x12c>)
+ 800eb3a:	681b      	ldr	r3, [r3, #0]
+ 800eb3c:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800eb3e:	429a      	cmp	r2, r3
+ 800eb40:	d302      	bcc.n	800eb48 <xTaskResumeAll+0xac>
+					{
+						xYieldPending = pdTRUE;
+ 800eb42:	4b22      	ldr	r3, [pc, #136]	; (800ebcc <xTaskResumeAll+0x130>)
+ 800eb44:	2201      	movs	r2, #1
+ 800eb46:	601a      	str	r2, [r3, #0]
+				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+ 800eb48:	4b1c      	ldr	r3, [pc, #112]	; (800ebbc <xTaskResumeAll+0x120>)
+ 800eb4a:	681b      	ldr	r3, [r3, #0]
+ 800eb4c:	2b00      	cmp	r3, #0
+ 800eb4e:	d1cc      	bne.n	800eaea <xTaskResumeAll+0x4e>
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+
+				if( pxTCB != NULL )
+ 800eb50:	68fb      	ldr	r3, [r7, #12]
+ 800eb52:	2b00      	cmp	r3, #0
+ 800eb54:	d001      	beq.n	800eb5a <xTaskResumeAll+0xbe>
+					which may have prevented the next unblock time from being
+					re-calculated, in which case re-calculate it now.  Mainly
+					important for low power tickless implementations, where
+					this can prevent an unnecessary exit from low power
+					state. */
+					prvResetNextTaskUnblockTime();
+ 800eb56:	f000 fb63 	bl	800f220 <prvResetNextTaskUnblockTime>
+				/* If any ticks occurred while the scheduler was suspended then
+				they should be processed now.  This ensures the tick count does
+				not	slip, and that any delayed tasks are resumed at the correct
+				time. */
+				{
+					UBaseType_t uxPendedCounts = uxPendedTicks; /* Non-volatile copy. */
+ 800eb5a:	4b1d      	ldr	r3, [pc, #116]	; (800ebd0 <xTaskResumeAll+0x134>)
+ 800eb5c:	681b      	ldr	r3, [r3, #0]
+ 800eb5e:	607b      	str	r3, [r7, #4]
+
+					if( uxPendedCounts > ( UBaseType_t ) 0U )
+ 800eb60:	687b      	ldr	r3, [r7, #4]
+ 800eb62:	2b00      	cmp	r3, #0
+ 800eb64:	d010      	beq.n	800eb88 <xTaskResumeAll+0xec>
+					{
+						do
+						{
+							if( xTaskIncrementTick() != pdFALSE )
+ 800eb66:	f000 f859 	bl	800ec1c <xTaskIncrementTick>
+ 800eb6a:	4603      	mov	r3, r0
+ 800eb6c:	2b00      	cmp	r3, #0
+ 800eb6e:	d002      	beq.n	800eb76 <xTaskResumeAll+0xda>
+							{
+								xYieldPending = pdTRUE;
+ 800eb70:	4b16      	ldr	r3, [pc, #88]	; (800ebcc <xTaskResumeAll+0x130>)
+ 800eb72:	2201      	movs	r2, #1
+ 800eb74:	601a      	str	r2, [r3, #0]
+							}
+							else
+							{
+								mtCOVERAGE_TEST_MARKER();
+							}
+							--uxPendedCounts;
+ 800eb76:	687b      	ldr	r3, [r7, #4]
+ 800eb78:	3b01      	subs	r3, #1
+ 800eb7a:	607b      	str	r3, [r7, #4]
+						} while( uxPendedCounts > ( UBaseType_t ) 0U );
+ 800eb7c:	687b      	ldr	r3, [r7, #4]
+ 800eb7e:	2b00      	cmp	r3, #0
+ 800eb80:	d1f1      	bne.n	800eb66 <xTaskResumeAll+0xca>
+
+						uxPendedTicks = 0;
+ 800eb82:	4b13      	ldr	r3, [pc, #76]	; (800ebd0 <xTaskResumeAll+0x134>)
+ 800eb84:	2200      	movs	r2, #0
+ 800eb86:	601a      	str	r2, [r3, #0]
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+
+				if( xYieldPending != pdFALSE )
+ 800eb88:	4b10      	ldr	r3, [pc, #64]	; (800ebcc <xTaskResumeAll+0x130>)
+ 800eb8a:	681b      	ldr	r3, [r3, #0]
+ 800eb8c:	2b00      	cmp	r3, #0
+ 800eb8e:	d009      	beq.n	800eba4 <xTaskResumeAll+0x108>
+				{
+					#if( configUSE_PREEMPTION != 0 )
+					{
+						xAlreadyYielded = pdTRUE;
+ 800eb90:	2301      	movs	r3, #1
+ 800eb92:	60bb      	str	r3, [r7, #8]
+					}
+					#endif
+					taskYIELD_IF_USING_PREEMPTION();
+ 800eb94:	4b0f      	ldr	r3, [pc, #60]	; (800ebd4 <xTaskResumeAll+0x138>)
+ 800eb96:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800eb9a:	601a      	str	r2, [r3, #0]
+ 800eb9c:	f3bf 8f4f 	dsb	sy
+ 800eba0:	f3bf 8f6f 	isb	sy
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	taskEXIT_CRITICAL();
+ 800eba4:	f000 fed2 	bl	800f94c <vPortExitCritical>
+
+	return xAlreadyYielded;
+ 800eba8:	68bb      	ldr	r3, [r7, #8]
+}
+ 800ebaa:	4618      	mov	r0, r3
+ 800ebac:	3710      	adds	r7, #16
+ 800ebae:	46bd      	mov	sp, r7
+ 800ebb0:	bd80      	pop	{r7, pc}
+ 800ebb2:	bf00      	nop
+ 800ebb4:	200006a0 	.word	0x200006a0
+ 800ebb8:	20000678 	.word	0x20000678
+ 800ebbc:	20000638 	.word	0x20000638
+ 800ebc0:	20000680 	.word	0x20000680
+ 800ebc4:	2000057c 	.word	0x2000057c
+ 800ebc8:	20000578 	.word	0x20000578
+ 800ebcc:	2000068c 	.word	0x2000068c
+ 800ebd0:	20000688 	.word	0x20000688
+ 800ebd4:	e000ed04 	.word	0xe000ed04
+
+0800ebd8 <xTaskGetTickCount>:
+/*-----------------------------------------------------------*/
+
+TickType_t xTaskGetTickCount( void )
+{
+ 800ebd8:	b480      	push	{r7}
+ 800ebda:	b083      	sub	sp, #12
+ 800ebdc:	af00      	add	r7, sp, #0
+TickType_t xTicks;
+
+	/* Critical section required if running on a 16 bit processor. */
+	portTICK_TYPE_ENTER_CRITICAL();
+	{
+		xTicks = xTickCount;
+ 800ebde:	4b05      	ldr	r3, [pc, #20]	; (800ebf4 <xTaskGetTickCount+0x1c>)
+ 800ebe0:	681b      	ldr	r3, [r3, #0]
+ 800ebe2:	607b      	str	r3, [r7, #4]
+	}
+	portTICK_TYPE_EXIT_CRITICAL();
+
+	return xTicks;
+ 800ebe4:	687b      	ldr	r3, [r7, #4]
+}
+ 800ebe6:	4618      	mov	r0, r3
+ 800ebe8:	370c      	adds	r7, #12
+ 800ebea:	46bd      	mov	sp, r7
+ 800ebec:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800ebf0:	4770      	bx	lr
+ 800ebf2:	bf00      	nop
+ 800ebf4:	2000067c 	.word	0x2000067c
+
+0800ebf8 <xTaskGetTickCountFromISR>:
+/*-----------------------------------------------------------*/
+
+TickType_t xTaskGetTickCountFromISR( void )
+{
+ 800ebf8:	b580      	push	{r7, lr}
+ 800ebfa:	b082      	sub	sp, #8
+ 800ebfc:	af00      	add	r7, sp, #0
+	that have been assigned a priority at or (logically) below the maximum
+	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
+	safe API to ensure interrupt entry is as fast and as simple as possible.
+	More information (albeit Cortex-M specific) is provided on the following
+	link: https://www.freertos.org/RTOS-Cortex-M3-M4.html */
+	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+ 800ebfe:	f000 ff53 	bl	800faa8 <vPortValidateInterruptPriority>
+
+	uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
+ 800ec02:	2300      	movs	r3, #0
+ 800ec04:	607b      	str	r3, [r7, #4]
+	{
+		xReturn = xTickCount;
+ 800ec06:	4b04      	ldr	r3, [pc, #16]	; (800ec18 <xTaskGetTickCountFromISR+0x20>)
+ 800ec08:	681b      	ldr	r3, [r3, #0]
+ 800ec0a:	603b      	str	r3, [r7, #0]
+	}
+	portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+ 800ec0c:	683b      	ldr	r3, [r7, #0]
+}
+ 800ec0e:	4618      	mov	r0, r3
+ 800ec10:	3708      	adds	r7, #8
+ 800ec12:	46bd      	mov	sp, r7
+ 800ec14:	bd80      	pop	{r7, pc}
+ 800ec16:	bf00      	nop
+ 800ec18:	2000067c 	.word	0x2000067c
+
+0800ec1c <xTaskIncrementTick>:
+
+#endif /* INCLUDE_xTaskAbortDelay */
+/*----------------------------------------------------------*/
+
+BaseType_t xTaskIncrementTick( void )
+{
+ 800ec1c:	b580      	push	{r7, lr}
+ 800ec1e:	b086      	sub	sp, #24
+ 800ec20:	af00      	add	r7, sp, #0
+TCB_t * pxTCB;
+TickType_t xItemValue;
+BaseType_t xSwitchRequired = pdFALSE;
+ 800ec22:	2300      	movs	r3, #0
+ 800ec24:	617b      	str	r3, [r7, #20]
+
+	/* Called by the portable layer each time a tick interrupt occurs.
+	Increments the tick then checks to see if the new tick value will cause any
+	tasks to be unblocked. */
+	traceTASK_INCREMENT_TICK( xTickCount );
+	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+ 800ec26:	4b4f      	ldr	r3, [pc, #316]	; (800ed64 <xTaskIncrementTick+0x148>)
+ 800ec28:	681b      	ldr	r3, [r3, #0]
+ 800ec2a:	2b00      	cmp	r3, #0
+ 800ec2c:	f040 8089 	bne.w	800ed42 <xTaskIncrementTick+0x126>
+	{
+		/* Minor optimisation.  The tick count cannot change in this
+		block. */
+		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
+ 800ec30:	4b4d      	ldr	r3, [pc, #308]	; (800ed68 <xTaskIncrementTick+0x14c>)
+ 800ec32:	681b      	ldr	r3, [r3, #0]
+ 800ec34:	3301      	adds	r3, #1
+ 800ec36:	613b      	str	r3, [r7, #16]
+
+		/* Increment the RTOS tick, switching the delayed and overflowed
+		delayed lists if it wraps to 0. */
+		xTickCount = xConstTickCount;
+ 800ec38:	4a4b      	ldr	r2, [pc, #300]	; (800ed68 <xTaskIncrementTick+0x14c>)
+ 800ec3a:	693b      	ldr	r3, [r7, #16]
+ 800ec3c:	6013      	str	r3, [r2, #0]
+
+		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
+ 800ec3e:	693b      	ldr	r3, [r7, #16]
+ 800ec40:	2b00      	cmp	r3, #0
+ 800ec42:	d121      	bne.n	800ec88 <xTaskIncrementTick+0x6c>
+		{
+			taskSWITCH_DELAYED_LISTS();
+ 800ec44:	4b49      	ldr	r3, [pc, #292]	; (800ed6c <xTaskIncrementTick+0x150>)
+ 800ec46:	681b      	ldr	r3, [r3, #0]
+ 800ec48:	681b      	ldr	r3, [r3, #0]
+ 800ec4a:	2b00      	cmp	r3, #0
+ 800ec4c:	d00b      	beq.n	800ec66 <xTaskIncrementTick+0x4a>
+ 800ec4e:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800ec52:	b672      	cpsid	i
+ 800ec54:	f383 8811 	msr	BASEPRI, r3
+ 800ec58:	f3bf 8f6f 	isb	sy
+ 800ec5c:	f3bf 8f4f 	dsb	sy
+ 800ec60:	b662      	cpsie	i
+ 800ec62:	603b      	str	r3, [r7, #0]
+ 800ec64:	e7fe      	b.n	800ec64 <xTaskIncrementTick+0x48>
+ 800ec66:	4b41      	ldr	r3, [pc, #260]	; (800ed6c <xTaskIncrementTick+0x150>)
+ 800ec68:	681b      	ldr	r3, [r3, #0]
+ 800ec6a:	60fb      	str	r3, [r7, #12]
+ 800ec6c:	4b40      	ldr	r3, [pc, #256]	; (800ed70 <xTaskIncrementTick+0x154>)
+ 800ec6e:	681b      	ldr	r3, [r3, #0]
+ 800ec70:	4a3e      	ldr	r2, [pc, #248]	; (800ed6c <xTaskIncrementTick+0x150>)
+ 800ec72:	6013      	str	r3, [r2, #0]
+ 800ec74:	4a3e      	ldr	r2, [pc, #248]	; (800ed70 <xTaskIncrementTick+0x154>)
+ 800ec76:	68fb      	ldr	r3, [r7, #12]
+ 800ec78:	6013      	str	r3, [r2, #0]
+ 800ec7a:	4b3e      	ldr	r3, [pc, #248]	; (800ed74 <xTaskIncrementTick+0x158>)
+ 800ec7c:	681b      	ldr	r3, [r3, #0]
+ 800ec7e:	3301      	adds	r3, #1
+ 800ec80:	4a3c      	ldr	r2, [pc, #240]	; (800ed74 <xTaskIncrementTick+0x158>)
+ 800ec82:	6013      	str	r3, [r2, #0]
+ 800ec84:	f000 facc 	bl	800f220 <prvResetNextTaskUnblockTime>
+
+		/* See if this tick has made a timeout expire.  Tasks are stored in
+		the	queue in the order of their wake time - meaning once one task
+		has been found whose block time has not expired there is no need to
+		look any further down the list. */
+		if( xConstTickCount >= xNextTaskUnblockTime )
+ 800ec88:	4b3b      	ldr	r3, [pc, #236]	; (800ed78 <xTaskIncrementTick+0x15c>)
+ 800ec8a:	681b      	ldr	r3, [r3, #0]
+ 800ec8c:	693a      	ldr	r2, [r7, #16]
+ 800ec8e:	429a      	cmp	r2, r3
+ 800ec90:	d348      	bcc.n	800ed24 <xTaskIncrementTick+0x108>
+		{
+			for( ;; )
+			{
+				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+ 800ec92:	4b36      	ldr	r3, [pc, #216]	; (800ed6c <xTaskIncrementTick+0x150>)
+ 800ec94:	681b      	ldr	r3, [r3, #0]
+ 800ec96:	681b      	ldr	r3, [r3, #0]
+ 800ec98:	2b00      	cmp	r3, #0
+ 800ec9a:	d104      	bne.n	800eca6 <xTaskIncrementTick+0x8a>
+					/* The delayed list is empty.  Set xNextTaskUnblockTime
+					to the maximum possible value so it is extremely
+					unlikely that the
+					if( xTickCount >= xNextTaskUnblockTime ) test will pass
+					next time through. */
+					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+ 800ec9c:	4b36      	ldr	r3, [pc, #216]	; (800ed78 <xTaskIncrementTick+0x15c>)
+ 800ec9e:	f04f 32ff 	mov.w	r2, #4294967295
+ 800eca2:	601a      	str	r2, [r3, #0]
+					break;
+ 800eca4:	e03e      	b.n	800ed24 <xTaskIncrementTick+0x108>
+				{
+					/* The delayed list is not empty, get the value of the
+					item at the head of the delayed list.  This is the time
+					at which the task at the head of the delayed list must
+					be removed from the Blocked state. */
+					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 800eca6:	4b31      	ldr	r3, [pc, #196]	; (800ed6c <xTaskIncrementTick+0x150>)
+ 800eca8:	681b      	ldr	r3, [r3, #0]
+ 800ecaa:	68db      	ldr	r3, [r3, #12]
+ 800ecac:	68db      	ldr	r3, [r3, #12]
+ 800ecae:	60bb      	str	r3, [r7, #8]
+					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
+ 800ecb0:	68bb      	ldr	r3, [r7, #8]
+ 800ecb2:	685b      	ldr	r3, [r3, #4]
+ 800ecb4:	607b      	str	r3, [r7, #4]
+
+					if( xConstTickCount < xItemValue )
+ 800ecb6:	693a      	ldr	r2, [r7, #16]
+ 800ecb8:	687b      	ldr	r3, [r7, #4]
+ 800ecba:	429a      	cmp	r2, r3
+ 800ecbc:	d203      	bcs.n	800ecc6 <xTaskIncrementTick+0xaa>
+						/* It is not time to unblock this item yet, but the
+						item value is the time at which the task at the head
+						of the blocked list must be removed from the Blocked
+						state -	so record the item value in
+						xNextTaskUnblockTime. */
+						xNextTaskUnblockTime = xItemValue;
+ 800ecbe:	4a2e      	ldr	r2, [pc, #184]	; (800ed78 <xTaskIncrementTick+0x15c>)
+ 800ecc0:	687b      	ldr	r3, [r7, #4]
+ 800ecc2:	6013      	str	r3, [r2, #0]
+						break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
+ 800ecc4:	e02e      	b.n	800ed24 <xTaskIncrementTick+0x108>
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* It is time to remove the item from the Blocked state. */
+					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+ 800ecc6:	68bb      	ldr	r3, [r7, #8]
+ 800ecc8:	3304      	adds	r3, #4
+ 800ecca:	4618      	mov	r0, r3
+ 800eccc:	f7fe fc24 	bl	800d518 <uxListRemove>
+
+					/* Is the task waiting on an event also?  If so remove
+					it from the event list. */
+					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+ 800ecd0:	68bb      	ldr	r3, [r7, #8]
+ 800ecd2:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 800ecd4:	2b00      	cmp	r3, #0
+ 800ecd6:	d004      	beq.n	800ece2 <xTaskIncrementTick+0xc6>
+					{
+						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+ 800ecd8:	68bb      	ldr	r3, [r7, #8]
+ 800ecda:	3318      	adds	r3, #24
+ 800ecdc:	4618      	mov	r0, r3
+ 800ecde:	f7fe fc1b 	bl	800d518 <uxListRemove>
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* Place the unblocked task into the appropriate ready
+					list. */
+					prvAddTaskToReadyList( pxTCB );
+ 800ece2:	68bb      	ldr	r3, [r7, #8]
+ 800ece4:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800ece6:	2201      	movs	r2, #1
+ 800ece8:	409a      	lsls	r2, r3
+ 800ecea:	4b24      	ldr	r3, [pc, #144]	; (800ed7c <xTaskIncrementTick+0x160>)
+ 800ecec:	681b      	ldr	r3, [r3, #0]
+ 800ecee:	4313      	orrs	r3, r2
+ 800ecf0:	4a22      	ldr	r2, [pc, #136]	; (800ed7c <xTaskIncrementTick+0x160>)
+ 800ecf2:	6013      	str	r3, [r2, #0]
+ 800ecf4:	68bb      	ldr	r3, [r7, #8]
+ 800ecf6:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800ecf8:	4613      	mov	r3, r2
+ 800ecfa:	009b      	lsls	r3, r3, #2
+ 800ecfc:	4413      	add	r3, r2
+ 800ecfe:	009b      	lsls	r3, r3, #2
+ 800ed00:	4a1f      	ldr	r2, [pc, #124]	; (800ed80 <xTaskIncrementTick+0x164>)
+ 800ed02:	441a      	add	r2, r3
+ 800ed04:	68bb      	ldr	r3, [r7, #8]
+ 800ed06:	3304      	adds	r3, #4
+ 800ed08:	4619      	mov	r1, r3
+ 800ed0a:	4610      	mov	r0, r2
+ 800ed0c:	f7fe fba7 	bl	800d45e <vListInsertEnd>
+					{
+						/* Preemption is on, but a context switch should
+						only be performed if the unblocked task has a
+						priority that is equal to or higher than the
+						currently executing task. */
+						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+ 800ed10:	68bb      	ldr	r3, [r7, #8]
+ 800ed12:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800ed14:	4b1b      	ldr	r3, [pc, #108]	; (800ed84 <xTaskIncrementTick+0x168>)
+ 800ed16:	681b      	ldr	r3, [r3, #0]
+ 800ed18:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800ed1a:	429a      	cmp	r2, r3
+ 800ed1c:	d3b9      	bcc.n	800ec92 <xTaskIncrementTick+0x76>
+						{
+							xSwitchRequired = pdTRUE;
+ 800ed1e:	2301      	movs	r3, #1
+ 800ed20:	617b      	str	r3, [r7, #20]
+				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+ 800ed22:	e7b6      	b.n	800ec92 <xTaskIncrementTick+0x76>
+		/* Tasks of equal priority to the currently running task will share
+		processing time (time slice) if preemption is on, and the application
+		writer has not explicitly turned time slicing off. */
+		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
+		{
+			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
+ 800ed24:	4b17      	ldr	r3, [pc, #92]	; (800ed84 <xTaskIncrementTick+0x168>)
+ 800ed26:	681b      	ldr	r3, [r3, #0]
+ 800ed28:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800ed2a:	4915      	ldr	r1, [pc, #84]	; (800ed80 <xTaskIncrementTick+0x164>)
+ 800ed2c:	4613      	mov	r3, r2
+ 800ed2e:	009b      	lsls	r3, r3, #2
+ 800ed30:	4413      	add	r3, r2
+ 800ed32:	009b      	lsls	r3, r3, #2
+ 800ed34:	440b      	add	r3, r1
+ 800ed36:	681b      	ldr	r3, [r3, #0]
+ 800ed38:	2b01      	cmp	r3, #1
+ 800ed3a:	d907      	bls.n	800ed4c <xTaskIncrementTick+0x130>
+			{
+				xSwitchRequired = pdTRUE;
+ 800ed3c:	2301      	movs	r3, #1
+ 800ed3e:	617b      	str	r3, [r7, #20]
+ 800ed40:	e004      	b.n	800ed4c <xTaskIncrementTick+0x130>
+		}
+		#endif /* configUSE_TICK_HOOK */
+	}
+	else
+	{
+		++uxPendedTicks;
+ 800ed42:	4b11      	ldr	r3, [pc, #68]	; (800ed88 <xTaskIncrementTick+0x16c>)
+ 800ed44:	681b      	ldr	r3, [r3, #0]
+ 800ed46:	3301      	adds	r3, #1
+ 800ed48:	4a0f      	ldr	r2, [pc, #60]	; (800ed88 <xTaskIncrementTick+0x16c>)
+ 800ed4a:	6013      	str	r3, [r2, #0]
+		#endif
+	}
+
+	#if ( configUSE_PREEMPTION == 1 )
+	{
+		if( xYieldPending != pdFALSE )
+ 800ed4c:	4b0f      	ldr	r3, [pc, #60]	; (800ed8c <xTaskIncrementTick+0x170>)
+ 800ed4e:	681b      	ldr	r3, [r3, #0]
+ 800ed50:	2b00      	cmp	r3, #0
+ 800ed52:	d001      	beq.n	800ed58 <xTaskIncrementTick+0x13c>
+		{
+			xSwitchRequired = pdTRUE;
+ 800ed54:	2301      	movs	r3, #1
+ 800ed56:	617b      	str	r3, [r7, #20]
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	#endif /* configUSE_PREEMPTION */
+
+	return xSwitchRequired;
+ 800ed58:	697b      	ldr	r3, [r7, #20]
+}
+ 800ed5a:	4618      	mov	r0, r3
+ 800ed5c:	3718      	adds	r7, #24
+ 800ed5e:	46bd      	mov	sp, r7
+ 800ed60:	bd80      	pop	{r7, pc}
+ 800ed62:	bf00      	nop
+ 800ed64:	200006a0 	.word	0x200006a0
+ 800ed68:	2000067c 	.word	0x2000067c
+ 800ed6c:	20000630 	.word	0x20000630
+ 800ed70:	20000634 	.word	0x20000634
+ 800ed74:	20000690 	.word	0x20000690
+ 800ed78:	20000698 	.word	0x20000698
+ 800ed7c:	20000680 	.word	0x20000680
+ 800ed80:	2000057c 	.word	0x2000057c
+ 800ed84:	20000578 	.word	0x20000578
+ 800ed88:	20000688 	.word	0x20000688
+ 800ed8c:	2000068c 	.word	0x2000068c
+
+0800ed90 <vTaskSwitchContext>:
+
+#endif /* configUSE_APPLICATION_TASK_TAG */
+/*-----------------------------------------------------------*/
+
+void vTaskSwitchContext( void )
+{
+ 800ed90:	b580      	push	{r7, lr}
+ 800ed92:	b088      	sub	sp, #32
+ 800ed94:	af00      	add	r7, sp, #0
+	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
+ 800ed96:	4b3a      	ldr	r3, [pc, #232]	; (800ee80 <vTaskSwitchContext+0xf0>)
+ 800ed98:	681b      	ldr	r3, [r3, #0]
+ 800ed9a:	2b00      	cmp	r3, #0
+ 800ed9c:	d003      	beq.n	800eda6 <vTaskSwitchContext+0x16>
+	{
+		/* The scheduler is currently suspended - do not allow a context
+		switch. */
+		xYieldPending = pdTRUE;
+ 800ed9e:	4b39      	ldr	r3, [pc, #228]	; (800ee84 <vTaskSwitchContext+0xf4>)
+ 800eda0:	2201      	movs	r2, #1
+ 800eda2:	601a      	str	r2, [r3, #0]
+			structure specific to this task. */
+			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
+		}
+		#endif /* configUSE_NEWLIB_REENTRANT */
+	}
+}
+ 800eda4:	e067      	b.n	800ee76 <vTaskSwitchContext+0xe6>
+		xYieldPending = pdFALSE;
+ 800eda6:	4b37      	ldr	r3, [pc, #220]	; (800ee84 <vTaskSwitchContext+0xf4>)
+ 800eda8:	2200      	movs	r2, #0
+ 800edaa:	601a      	str	r2, [r3, #0]
+		taskCHECK_FOR_STACK_OVERFLOW();
+ 800edac:	4b36      	ldr	r3, [pc, #216]	; (800ee88 <vTaskSwitchContext+0xf8>)
+ 800edae:	681b      	ldr	r3, [r3, #0]
+ 800edb0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800edb2:	61fb      	str	r3, [r7, #28]
+ 800edb4:	f04f 33a5 	mov.w	r3, #2779096485	; 0xa5a5a5a5
+ 800edb8:	61bb      	str	r3, [r7, #24]
+ 800edba:	69fb      	ldr	r3, [r7, #28]
+ 800edbc:	681b      	ldr	r3, [r3, #0]
+ 800edbe:	69ba      	ldr	r2, [r7, #24]
+ 800edc0:	429a      	cmp	r2, r3
+ 800edc2:	d111      	bne.n	800ede8 <vTaskSwitchContext+0x58>
+ 800edc4:	69fb      	ldr	r3, [r7, #28]
+ 800edc6:	3304      	adds	r3, #4
+ 800edc8:	681b      	ldr	r3, [r3, #0]
+ 800edca:	69ba      	ldr	r2, [r7, #24]
+ 800edcc:	429a      	cmp	r2, r3
+ 800edce:	d10b      	bne.n	800ede8 <vTaskSwitchContext+0x58>
+ 800edd0:	69fb      	ldr	r3, [r7, #28]
+ 800edd2:	3308      	adds	r3, #8
+ 800edd4:	681b      	ldr	r3, [r3, #0]
+ 800edd6:	69ba      	ldr	r2, [r7, #24]
+ 800edd8:	429a      	cmp	r2, r3
+ 800edda:	d105      	bne.n	800ede8 <vTaskSwitchContext+0x58>
+ 800eddc:	69fb      	ldr	r3, [r7, #28]
+ 800edde:	330c      	adds	r3, #12
+ 800ede0:	681b      	ldr	r3, [r3, #0]
+ 800ede2:	69ba      	ldr	r2, [r7, #24]
+ 800ede4:	429a      	cmp	r2, r3
+ 800ede6:	d008      	beq.n	800edfa <vTaskSwitchContext+0x6a>
+ 800ede8:	4b27      	ldr	r3, [pc, #156]	; (800ee88 <vTaskSwitchContext+0xf8>)
+ 800edea:	681a      	ldr	r2, [r3, #0]
+ 800edec:	4b26      	ldr	r3, [pc, #152]	; (800ee88 <vTaskSwitchContext+0xf8>)
+ 800edee:	681b      	ldr	r3, [r3, #0]
+ 800edf0:	3334      	adds	r3, #52	; 0x34
+ 800edf2:	4619      	mov	r1, r3
+ 800edf4:	4610      	mov	r0, r2
+ 800edf6:	f7f1 fbe2 	bl	80005be <vApplicationStackOverflowHook>
+		taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 800edfa:	4b24      	ldr	r3, [pc, #144]	; (800ee8c <vTaskSwitchContext+0xfc>)
+ 800edfc:	681b      	ldr	r3, [r3, #0]
+ 800edfe:	60fb      	str	r3, [r7, #12]
+		__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
+ 800ee00:	68fb      	ldr	r3, [r7, #12]
+ 800ee02:	fab3 f383 	clz	r3, r3
+ 800ee06:	72fb      	strb	r3, [r7, #11]
+		return ucReturn;
+ 800ee08:	7afb      	ldrb	r3, [r7, #11]
+ 800ee0a:	f1c3 031f 	rsb	r3, r3, #31
+ 800ee0e:	617b      	str	r3, [r7, #20]
+ 800ee10:	491f      	ldr	r1, [pc, #124]	; (800ee90 <vTaskSwitchContext+0x100>)
+ 800ee12:	697a      	ldr	r2, [r7, #20]
+ 800ee14:	4613      	mov	r3, r2
+ 800ee16:	009b      	lsls	r3, r3, #2
+ 800ee18:	4413      	add	r3, r2
+ 800ee1a:	009b      	lsls	r3, r3, #2
+ 800ee1c:	440b      	add	r3, r1
+ 800ee1e:	681b      	ldr	r3, [r3, #0]
+ 800ee20:	2b00      	cmp	r3, #0
+ 800ee22:	d10b      	bne.n	800ee3c <vTaskSwitchContext+0xac>
+	__asm volatile
+ 800ee24:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800ee28:	b672      	cpsid	i
+ 800ee2a:	f383 8811 	msr	BASEPRI, r3
+ 800ee2e:	f3bf 8f6f 	isb	sy
+ 800ee32:	f3bf 8f4f 	dsb	sy
+ 800ee36:	b662      	cpsie	i
+ 800ee38:	607b      	str	r3, [r7, #4]
+ 800ee3a:	e7fe      	b.n	800ee3a <vTaskSwitchContext+0xaa>
+ 800ee3c:	697a      	ldr	r2, [r7, #20]
+ 800ee3e:	4613      	mov	r3, r2
+ 800ee40:	009b      	lsls	r3, r3, #2
+ 800ee42:	4413      	add	r3, r2
+ 800ee44:	009b      	lsls	r3, r3, #2
+ 800ee46:	4a12      	ldr	r2, [pc, #72]	; (800ee90 <vTaskSwitchContext+0x100>)
+ 800ee48:	4413      	add	r3, r2
+ 800ee4a:	613b      	str	r3, [r7, #16]
+ 800ee4c:	693b      	ldr	r3, [r7, #16]
+ 800ee4e:	685b      	ldr	r3, [r3, #4]
+ 800ee50:	685a      	ldr	r2, [r3, #4]
+ 800ee52:	693b      	ldr	r3, [r7, #16]
+ 800ee54:	605a      	str	r2, [r3, #4]
+ 800ee56:	693b      	ldr	r3, [r7, #16]
+ 800ee58:	685a      	ldr	r2, [r3, #4]
+ 800ee5a:	693b      	ldr	r3, [r7, #16]
+ 800ee5c:	3308      	adds	r3, #8
+ 800ee5e:	429a      	cmp	r2, r3
+ 800ee60:	d104      	bne.n	800ee6c <vTaskSwitchContext+0xdc>
+ 800ee62:	693b      	ldr	r3, [r7, #16]
+ 800ee64:	685b      	ldr	r3, [r3, #4]
+ 800ee66:	685a      	ldr	r2, [r3, #4]
+ 800ee68:	693b      	ldr	r3, [r7, #16]
+ 800ee6a:	605a      	str	r2, [r3, #4]
+ 800ee6c:	693b      	ldr	r3, [r7, #16]
+ 800ee6e:	685b      	ldr	r3, [r3, #4]
+ 800ee70:	68db      	ldr	r3, [r3, #12]
+ 800ee72:	4a05      	ldr	r2, [pc, #20]	; (800ee88 <vTaskSwitchContext+0xf8>)
+ 800ee74:	6013      	str	r3, [r2, #0]
+}
+ 800ee76:	bf00      	nop
+ 800ee78:	3720      	adds	r7, #32
+ 800ee7a:	46bd      	mov	sp, r7
+ 800ee7c:	bd80      	pop	{r7, pc}
+ 800ee7e:	bf00      	nop
+ 800ee80:	200006a0 	.word	0x200006a0
+ 800ee84:	2000068c 	.word	0x2000068c
+ 800ee88:	20000578 	.word	0x20000578
+ 800ee8c:	20000680 	.word	0x20000680
+ 800ee90:	2000057c 	.word	0x2000057c
+
+0800ee94 <vTaskPlaceOnEventList>:
+/*-----------------------------------------------------------*/
+
+void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
+{
+ 800ee94:	b580      	push	{r7, lr}
+ 800ee96:	b084      	sub	sp, #16
+ 800ee98:	af00      	add	r7, sp, #0
+ 800ee9a:	6078      	str	r0, [r7, #4]
+ 800ee9c:	6039      	str	r1, [r7, #0]
+	configASSERT( pxEventList );
+ 800ee9e:	687b      	ldr	r3, [r7, #4]
+ 800eea0:	2b00      	cmp	r3, #0
+ 800eea2:	d10b      	bne.n	800eebc <vTaskPlaceOnEventList+0x28>
+ 800eea4:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800eea8:	b672      	cpsid	i
+ 800eeaa:	f383 8811 	msr	BASEPRI, r3
+ 800eeae:	f3bf 8f6f 	isb	sy
+ 800eeb2:	f3bf 8f4f 	dsb	sy
+ 800eeb6:	b662      	cpsie	i
+ 800eeb8:	60fb      	str	r3, [r7, #12]
+ 800eeba:	e7fe      	b.n	800eeba <vTaskPlaceOnEventList+0x26>
+
+	/* Place the event list item of the TCB in the appropriate event list.
+	This is placed in the list in priority order so the highest priority task
+	is the first to be woken by the event.  The queue that contains the event
+	list is locked, preventing simultaneous access from interrupts. */
+	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
+ 800eebc:	4b07      	ldr	r3, [pc, #28]	; (800eedc <vTaskPlaceOnEventList+0x48>)
+ 800eebe:	681b      	ldr	r3, [r3, #0]
+ 800eec0:	3318      	adds	r3, #24
+ 800eec2:	4619      	mov	r1, r3
+ 800eec4:	6878      	ldr	r0, [r7, #4]
+ 800eec6:	f7fe faee 	bl	800d4a6 <vListInsert>
+
+	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
+ 800eeca:	2101      	movs	r1, #1
+ 800eecc:	6838      	ldr	r0, [r7, #0]
+ 800eece:	f000 fb9d 	bl	800f60c <prvAddCurrentTaskToDelayedList>
+}
+ 800eed2:	bf00      	nop
+ 800eed4:	3710      	adds	r7, #16
+ 800eed6:	46bd      	mov	sp, r7
+ 800eed8:	bd80      	pop	{r7, pc}
+ 800eeda:	bf00      	nop
+ 800eedc:	20000578 	.word	0x20000578
+
+0800eee0 <xTaskRemoveFromEventList>:
+
+#endif /* configUSE_TIMERS */
+/*-----------------------------------------------------------*/
+
+BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
+{
+ 800eee0:	b580      	push	{r7, lr}
+ 800eee2:	b086      	sub	sp, #24
+ 800eee4:	af00      	add	r7, sp, #0
+ 800eee6:	6078      	str	r0, [r7, #4]
+	get called - the lock count on the queue will get modified instead.  This
+	means exclusive access to the event list is guaranteed here.
+
+	This function assumes that a check has already been made to ensure that
+	pxEventList is not empty. */
+	pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 800eee8:	687b      	ldr	r3, [r7, #4]
+ 800eeea:	68db      	ldr	r3, [r3, #12]
+ 800eeec:	68db      	ldr	r3, [r3, #12]
+ 800eeee:	613b      	str	r3, [r7, #16]
+	configASSERT( pxUnblockedTCB );
+ 800eef0:	693b      	ldr	r3, [r7, #16]
+ 800eef2:	2b00      	cmp	r3, #0
+ 800eef4:	d10b      	bne.n	800ef0e <xTaskRemoveFromEventList+0x2e>
+ 800eef6:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800eefa:	b672      	cpsid	i
+ 800eefc:	f383 8811 	msr	BASEPRI, r3
+ 800ef00:	f3bf 8f6f 	isb	sy
+ 800ef04:	f3bf 8f4f 	dsb	sy
+ 800ef08:	b662      	cpsie	i
+ 800ef0a:	60fb      	str	r3, [r7, #12]
+ 800ef0c:	e7fe      	b.n	800ef0c <xTaskRemoveFromEventList+0x2c>
+	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
+ 800ef0e:	693b      	ldr	r3, [r7, #16]
+ 800ef10:	3318      	adds	r3, #24
+ 800ef12:	4618      	mov	r0, r3
+ 800ef14:	f7fe fb00 	bl	800d518 <uxListRemove>
+
+	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+ 800ef18:	4b1d      	ldr	r3, [pc, #116]	; (800ef90 <xTaskRemoveFromEventList+0xb0>)
+ 800ef1a:	681b      	ldr	r3, [r3, #0]
+ 800ef1c:	2b00      	cmp	r3, #0
+ 800ef1e:	d11c      	bne.n	800ef5a <xTaskRemoveFromEventList+0x7a>
+	{
+		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
+ 800ef20:	693b      	ldr	r3, [r7, #16]
+ 800ef22:	3304      	adds	r3, #4
+ 800ef24:	4618      	mov	r0, r3
+ 800ef26:	f7fe faf7 	bl	800d518 <uxListRemove>
+		prvAddTaskToReadyList( pxUnblockedTCB );
+ 800ef2a:	693b      	ldr	r3, [r7, #16]
+ 800ef2c:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800ef2e:	2201      	movs	r2, #1
+ 800ef30:	409a      	lsls	r2, r3
+ 800ef32:	4b18      	ldr	r3, [pc, #96]	; (800ef94 <xTaskRemoveFromEventList+0xb4>)
+ 800ef34:	681b      	ldr	r3, [r3, #0]
+ 800ef36:	4313      	orrs	r3, r2
+ 800ef38:	4a16      	ldr	r2, [pc, #88]	; (800ef94 <xTaskRemoveFromEventList+0xb4>)
+ 800ef3a:	6013      	str	r3, [r2, #0]
+ 800ef3c:	693b      	ldr	r3, [r7, #16]
+ 800ef3e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800ef40:	4613      	mov	r3, r2
+ 800ef42:	009b      	lsls	r3, r3, #2
+ 800ef44:	4413      	add	r3, r2
+ 800ef46:	009b      	lsls	r3, r3, #2
+ 800ef48:	4a13      	ldr	r2, [pc, #76]	; (800ef98 <xTaskRemoveFromEventList+0xb8>)
+ 800ef4a:	441a      	add	r2, r3
+ 800ef4c:	693b      	ldr	r3, [r7, #16]
+ 800ef4e:	3304      	adds	r3, #4
+ 800ef50:	4619      	mov	r1, r3
+ 800ef52:	4610      	mov	r0, r2
+ 800ef54:	f7fe fa83 	bl	800d45e <vListInsertEnd>
+ 800ef58:	e005      	b.n	800ef66 <xTaskRemoveFromEventList+0x86>
+	}
+	else
+	{
+		/* The delayed and ready lists cannot be accessed, so hold this task
+		pending until the scheduler is resumed. */
+		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
+ 800ef5a:	693b      	ldr	r3, [r7, #16]
+ 800ef5c:	3318      	adds	r3, #24
+ 800ef5e:	4619      	mov	r1, r3
+ 800ef60:	480e      	ldr	r0, [pc, #56]	; (800ef9c <xTaskRemoveFromEventList+0xbc>)
+ 800ef62:	f7fe fa7c 	bl	800d45e <vListInsertEnd>
+	}
+
+	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
+ 800ef66:	693b      	ldr	r3, [r7, #16]
+ 800ef68:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800ef6a:	4b0d      	ldr	r3, [pc, #52]	; (800efa0 <xTaskRemoveFromEventList+0xc0>)
+ 800ef6c:	681b      	ldr	r3, [r3, #0]
+ 800ef6e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800ef70:	429a      	cmp	r2, r3
+ 800ef72:	d905      	bls.n	800ef80 <xTaskRemoveFromEventList+0xa0>
+	{
+		/* Return true if the task removed from the event list has a higher
+		priority than the calling task.  This allows the calling task to know if
+		it should force a context switch now. */
+		xReturn = pdTRUE;
+ 800ef74:	2301      	movs	r3, #1
+ 800ef76:	617b      	str	r3, [r7, #20]
+
+		/* Mark that a yield is pending in case the user is not using the
+		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
+		xYieldPending = pdTRUE;
+ 800ef78:	4b0a      	ldr	r3, [pc, #40]	; (800efa4 <xTaskRemoveFromEventList+0xc4>)
+ 800ef7a:	2201      	movs	r2, #1
+ 800ef7c:	601a      	str	r2, [r3, #0]
+ 800ef7e:	e001      	b.n	800ef84 <xTaskRemoveFromEventList+0xa4>
+	}
+	else
+	{
+		xReturn = pdFALSE;
+ 800ef80:	2300      	movs	r3, #0
+ 800ef82:	617b      	str	r3, [r7, #20]
+	}
+
+	return xReturn;
+ 800ef84:	697b      	ldr	r3, [r7, #20]
+}
+ 800ef86:	4618      	mov	r0, r3
+ 800ef88:	3718      	adds	r7, #24
+ 800ef8a:	46bd      	mov	sp, r7
+ 800ef8c:	bd80      	pop	{r7, pc}
+ 800ef8e:	bf00      	nop
+ 800ef90:	200006a0 	.word	0x200006a0
+ 800ef94:	20000680 	.word	0x20000680
+ 800ef98:	2000057c 	.word	0x2000057c
+ 800ef9c:	20000638 	.word	0x20000638
+ 800efa0:	20000578 	.word	0x20000578
+ 800efa4:	2000068c 	.word	0x2000068c
+
+0800efa8 <vTaskInternalSetTimeOutState>:
+	taskEXIT_CRITICAL();
+}
+/*-----------------------------------------------------------*/
+
+void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
+{
+ 800efa8:	b480      	push	{r7}
+ 800efaa:	b083      	sub	sp, #12
+ 800efac:	af00      	add	r7, sp, #0
+ 800efae:	6078      	str	r0, [r7, #4]
+	/* For internal use only as it does not use a critical section. */
+	pxTimeOut->xOverflowCount = xNumOfOverflows;
+ 800efb0:	4b06      	ldr	r3, [pc, #24]	; (800efcc <vTaskInternalSetTimeOutState+0x24>)
+ 800efb2:	681a      	ldr	r2, [r3, #0]
+ 800efb4:	687b      	ldr	r3, [r7, #4]
+ 800efb6:	601a      	str	r2, [r3, #0]
+	pxTimeOut->xTimeOnEntering = xTickCount;
+ 800efb8:	4b05      	ldr	r3, [pc, #20]	; (800efd0 <vTaskInternalSetTimeOutState+0x28>)
+ 800efba:	681a      	ldr	r2, [r3, #0]
+ 800efbc:	687b      	ldr	r3, [r7, #4]
+ 800efbe:	605a      	str	r2, [r3, #4]
+}
+ 800efc0:	bf00      	nop
+ 800efc2:	370c      	adds	r7, #12
+ 800efc4:	46bd      	mov	sp, r7
+ 800efc6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800efca:	4770      	bx	lr
+ 800efcc:	20000690 	.word	0x20000690
+ 800efd0:	2000067c 	.word	0x2000067c
+
+0800efd4 <xTaskCheckForTimeOut>:
+/*-----------------------------------------------------------*/
+
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
+{
+ 800efd4:	b580      	push	{r7, lr}
+ 800efd6:	b088      	sub	sp, #32
+ 800efd8:	af00      	add	r7, sp, #0
+ 800efda:	6078      	str	r0, [r7, #4]
+ 800efdc:	6039      	str	r1, [r7, #0]
+BaseType_t xReturn;
+
+	configASSERT( pxTimeOut );
+ 800efde:	687b      	ldr	r3, [r7, #4]
+ 800efe0:	2b00      	cmp	r3, #0
+ 800efe2:	d10b      	bne.n	800effc <xTaskCheckForTimeOut+0x28>
+ 800efe4:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800efe8:	b672      	cpsid	i
+ 800efea:	f383 8811 	msr	BASEPRI, r3
+ 800efee:	f3bf 8f6f 	isb	sy
+ 800eff2:	f3bf 8f4f 	dsb	sy
+ 800eff6:	b662      	cpsie	i
+ 800eff8:	613b      	str	r3, [r7, #16]
+ 800effa:	e7fe      	b.n	800effa <xTaskCheckForTimeOut+0x26>
+	configASSERT( pxTicksToWait );
+ 800effc:	683b      	ldr	r3, [r7, #0]
+ 800effe:	2b00      	cmp	r3, #0
+ 800f000:	d10b      	bne.n	800f01a <xTaskCheckForTimeOut+0x46>
+ 800f002:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f006:	b672      	cpsid	i
+ 800f008:	f383 8811 	msr	BASEPRI, r3
+ 800f00c:	f3bf 8f6f 	isb	sy
+ 800f010:	f3bf 8f4f 	dsb	sy
+ 800f014:	b662      	cpsie	i
+ 800f016:	60fb      	str	r3, [r7, #12]
+ 800f018:	e7fe      	b.n	800f018 <xTaskCheckForTimeOut+0x44>
+
+	taskENTER_CRITICAL();
+ 800f01a:	f000 fc65 	bl	800f8e8 <vPortEnterCritical>
+	{
+		/* Minor optimisation.  The tick count cannot change in this block. */
+		const TickType_t xConstTickCount = xTickCount;
+ 800f01e:	4b1d      	ldr	r3, [pc, #116]	; (800f094 <xTaskCheckForTimeOut+0xc0>)
+ 800f020:	681b      	ldr	r3, [r3, #0]
+ 800f022:	61bb      	str	r3, [r7, #24]
+		const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
+ 800f024:	687b      	ldr	r3, [r7, #4]
+ 800f026:	685b      	ldr	r3, [r3, #4]
+ 800f028:	69ba      	ldr	r2, [r7, #24]
+ 800f02a:	1ad3      	subs	r3, r2, r3
+ 800f02c:	617b      	str	r3, [r7, #20]
+			}
+			else
+		#endif
+
+		#if ( INCLUDE_vTaskSuspend == 1 )
+			if( *pxTicksToWait == portMAX_DELAY )
+ 800f02e:	683b      	ldr	r3, [r7, #0]
+ 800f030:	681b      	ldr	r3, [r3, #0]
+ 800f032:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800f036:	d102      	bne.n	800f03e <xTaskCheckForTimeOut+0x6a>
+			{
+				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
+				specified is the maximum block time then the task should block
+				indefinitely, and therefore never time out. */
+				xReturn = pdFALSE;
+ 800f038:	2300      	movs	r3, #0
+ 800f03a:	61fb      	str	r3, [r7, #28]
+ 800f03c:	e023      	b.n	800f086 <xTaskCheckForTimeOut+0xb2>
+			}
+			else
+		#endif
+
+		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
+ 800f03e:	687b      	ldr	r3, [r7, #4]
+ 800f040:	681a      	ldr	r2, [r3, #0]
+ 800f042:	4b15      	ldr	r3, [pc, #84]	; (800f098 <xTaskCheckForTimeOut+0xc4>)
+ 800f044:	681b      	ldr	r3, [r3, #0]
+ 800f046:	429a      	cmp	r2, r3
+ 800f048:	d007      	beq.n	800f05a <xTaskCheckForTimeOut+0x86>
+ 800f04a:	687b      	ldr	r3, [r7, #4]
+ 800f04c:	685b      	ldr	r3, [r3, #4]
+ 800f04e:	69ba      	ldr	r2, [r7, #24]
+ 800f050:	429a      	cmp	r2, r3
+ 800f052:	d302      	bcc.n	800f05a <xTaskCheckForTimeOut+0x86>
+			/* The tick count is greater than the time at which
+			vTaskSetTimeout() was called, but has also overflowed since
+			vTaskSetTimeOut() was called.  It must have wrapped all the way
+			around and gone past again. This passed since vTaskSetTimeout()
+			was called. */
+			xReturn = pdTRUE;
+ 800f054:	2301      	movs	r3, #1
+ 800f056:	61fb      	str	r3, [r7, #28]
+ 800f058:	e015      	b.n	800f086 <xTaskCheckForTimeOut+0xb2>
+		}
+		else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
+ 800f05a:	683b      	ldr	r3, [r7, #0]
+ 800f05c:	681b      	ldr	r3, [r3, #0]
+ 800f05e:	697a      	ldr	r2, [r7, #20]
+ 800f060:	429a      	cmp	r2, r3
+ 800f062:	d20b      	bcs.n	800f07c <xTaskCheckForTimeOut+0xa8>
+		{
+			/* Not a genuine timeout. Adjust parameters for time remaining. */
+			*pxTicksToWait -= xElapsedTime;
+ 800f064:	683b      	ldr	r3, [r7, #0]
+ 800f066:	681a      	ldr	r2, [r3, #0]
+ 800f068:	697b      	ldr	r3, [r7, #20]
+ 800f06a:	1ad2      	subs	r2, r2, r3
+ 800f06c:	683b      	ldr	r3, [r7, #0]
+ 800f06e:	601a      	str	r2, [r3, #0]
+			vTaskInternalSetTimeOutState( pxTimeOut );
+ 800f070:	6878      	ldr	r0, [r7, #4]
+ 800f072:	f7ff ff99 	bl	800efa8 <vTaskInternalSetTimeOutState>
+			xReturn = pdFALSE;
+ 800f076:	2300      	movs	r3, #0
+ 800f078:	61fb      	str	r3, [r7, #28]
+ 800f07a:	e004      	b.n	800f086 <xTaskCheckForTimeOut+0xb2>
+		}
+		else
+		{
+			*pxTicksToWait = 0;
+ 800f07c:	683b      	ldr	r3, [r7, #0]
+ 800f07e:	2200      	movs	r2, #0
+ 800f080:	601a      	str	r2, [r3, #0]
+			xReturn = pdTRUE;
+ 800f082:	2301      	movs	r3, #1
+ 800f084:	61fb      	str	r3, [r7, #28]
+		}
+	}
+	taskEXIT_CRITICAL();
+ 800f086:	f000 fc61 	bl	800f94c <vPortExitCritical>
+
+	return xReturn;
+ 800f08a:	69fb      	ldr	r3, [r7, #28]
+}
+ 800f08c:	4618      	mov	r0, r3
+ 800f08e:	3720      	adds	r7, #32
+ 800f090:	46bd      	mov	sp, r7
+ 800f092:	bd80      	pop	{r7, pc}
+ 800f094:	2000067c 	.word	0x2000067c
+ 800f098:	20000690 	.word	0x20000690
+
+0800f09c <vTaskMissedYield>:
+/*-----------------------------------------------------------*/
+
+void vTaskMissedYield( void )
+{
+ 800f09c:	b480      	push	{r7}
+ 800f09e:	af00      	add	r7, sp, #0
+	xYieldPending = pdTRUE;
+ 800f0a0:	4b03      	ldr	r3, [pc, #12]	; (800f0b0 <vTaskMissedYield+0x14>)
+ 800f0a2:	2201      	movs	r2, #1
+ 800f0a4:	601a      	str	r2, [r3, #0]
+}
+ 800f0a6:	bf00      	nop
+ 800f0a8:	46bd      	mov	sp, r7
+ 800f0aa:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800f0ae:	4770      	bx	lr
+ 800f0b0:	2000068c 	.word	0x2000068c
+
+0800f0b4 <prvIdleTask>:
+ *
+ * void prvIdleTask( void *pvParameters );
+ *
+ */
+static portTASK_FUNCTION( prvIdleTask, pvParameters )
+{
+ 800f0b4:	b580      	push	{r7, lr}
+ 800f0b6:	b082      	sub	sp, #8
+ 800f0b8:	af00      	add	r7, sp, #0
+ 800f0ba:	6078      	str	r0, [r7, #4]
+
+	for( ;; )
+	{
+		/* See if any tasks have deleted themselves - if so then the idle task
+		is responsible for freeing the deleted task's TCB and stack. */
+		prvCheckTasksWaitingTermination();
+ 800f0bc:	f000 f854 	bl	800f168 <prvCheckTasksWaitingTermination>
+
+			A critical region is not required here as we are just reading from
+			the list, and an occasional incorrect value will not matter.  If
+			the ready list at the idle priority contains more than one task
+			then a task other than the idle task is ready to execute. */
+			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
+ 800f0c0:	4b07      	ldr	r3, [pc, #28]	; (800f0e0 <prvIdleTask+0x2c>)
+ 800f0c2:	681b      	ldr	r3, [r3, #0]
+ 800f0c4:	2b01      	cmp	r3, #1
+ 800f0c6:	d907      	bls.n	800f0d8 <prvIdleTask+0x24>
+			{
+				taskYIELD();
+ 800f0c8:	4b06      	ldr	r3, [pc, #24]	; (800f0e4 <prvIdleTask+0x30>)
+ 800f0ca:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800f0ce:	601a      	str	r2, [r3, #0]
+ 800f0d0:	f3bf 8f4f 	dsb	sy
+ 800f0d4:	f3bf 8f6f 	isb	sy
+			/* Call the user defined function from within the idle task.  This
+			allows the application designer to add background functionality
+			without the overhead of a separate task.
+			NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES,
+			CALL A FUNCTION THAT MIGHT BLOCK. */
+			vApplicationIdleHook();
+ 800f0d8:	f7f1 fa6a 	bl	80005b0 <vApplicationIdleHook>
+		prvCheckTasksWaitingTermination();
+ 800f0dc:	e7ee      	b.n	800f0bc <prvIdleTask+0x8>
+ 800f0de:	bf00      	nop
+ 800f0e0:	2000057c 	.word	0x2000057c
+ 800f0e4:	e000ed04 	.word	0xe000ed04
+
+0800f0e8 <prvInitialiseTaskLists>:
+
+#endif /* portUSING_MPU_WRAPPERS */
+/*-----------------------------------------------------------*/
+
+static void prvInitialiseTaskLists( void )
+{
+ 800f0e8:	b580      	push	{r7, lr}
+ 800f0ea:	b082      	sub	sp, #8
+ 800f0ec:	af00      	add	r7, sp, #0
+UBaseType_t uxPriority;
+
+	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
+ 800f0ee:	2300      	movs	r3, #0
+ 800f0f0:	607b      	str	r3, [r7, #4]
+ 800f0f2:	e00c      	b.n	800f10e <prvInitialiseTaskLists+0x26>
+	{
+		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
+ 800f0f4:	687a      	ldr	r2, [r7, #4]
+ 800f0f6:	4613      	mov	r3, r2
+ 800f0f8:	009b      	lsls	r3, r3, #2
+ 800f0fa:	4413      	add	r3, r2
+ 800f0fc:	009b      	lsls	r3, r3, #2
+ 800f0fe:	4a12      	ldr	r2, [pc, #72]	; (800f148 <prvInitialiseTaskLists+0x60>)
+ 800f100:	4413      	add	r3, r2
+ 800f102:	4618      	mov	r0, r3
+ 800f104:	f7fe f97e 	bl	800d404 <vListInitialise>
+	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
+ 800f108:	687b      	ldr	r3, [r7, #4]
+ 800f10a:	3301      	adds	r3, #1
+ 800f10c:	607b      	str	r3, [r7, #4]
+ 800f10e:	687b      	ldr	r3, [r7, #4]
+ 800f110:	2b06      	cmp	r3, #6
+ 800f112:	d9ef      	bls.n	800f0f4 <prvInitialiseTaskLists+0xc>
+	}
+
+	vListInitialise( &xDelayedTaskList1 );
+ 800f114:	480d      	ldr	r0, [pc, #52]	; (800f14c <prvInitialiseTaskLists+0x64>)
+ 800f116:	f7fe f975 	bl	800d404 <vListInitialise>
+	vListInitialise( &xDelayedTaskList2 );
+ 800f11a:	480d      	ldr	r0, [pc, #52]	; (800f150 <prvInitialiseTaskLists+0x68>)
+ 800f11c:	f7fe f972 	bl	800d404 <vListInitialise>
+	vListInitialise( &xPendingReadyList );
+ 800f120:	480c      	ldr	r0, [pc, #48]	; (800f154 <prvInitialiseTaskLists+0x6c>)
+ 800f122:	f7fe f96f 	bl	800d404 <vListInitialise>
+
+	#if ( INCLUDE_vTaskDelete == 1 )
+	{
+		vListInitialise( &xTasksWaitingTermination );
+ 800f126:	480c      	ldr	r0, [pc, #48]	; (800f158 <prvInitialiseTaskLists+0x70>)
+ 800f128:	f7fe f96c 	bl	800d404 <vListInitialise>
+	}
+	#endif /* INCLUDE_vTaskDelete */
+
+	#if ( INCLUDE_vTaskSuspend == 1 )
+	{
+		vListInitialise( &xSuspendedTaskList );
+ 800f12c:	480b      	ldr	r0, [pc, #44]	; (800f15c <prvInitialiseTaskLists+0x74>)
+ 800f12e:	f7fe f969 	bl	800d404 <vListInitialise>
+	}
+	#endif /* INCLUDE_vTaskSuspend */
+
+	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
+	using list2. */
+	pxDelayedTaskList = &xDelayedTaskList1;
+ 800f132:	4b0b      	ldr	r3, [pc, #44]	; (800f160 <prvInitialiseTaskLists+0x78>)
+ 800f134:	4a05      	ldr	r2, [pc, #20]	; (800f14c <prvInitialiseTaskLists+0x64>)
+ 800f136:	601a      	str	r2, [r3, #0]
+	pxOverflowDelayedTaskList = &xDelayedTaskList2;
+ 800f138:	4b0a      	ldr	r3, [pc, #40]	; (800f164 <prvInitialiseTaskLists+0x7c>)
+ 800f13a:	4a05      	ldr	r2, [pc, #20]	; (800f150 <prvInitialiseTaskLists+0x68>)
+ 800f13c:	601a      	str	r2, [r3, #0]
+}
+ 800f13e:	bf00      	nop
+ 800f140:	3708      	adds	r7, #8
+ 800f142:	46bd      	mov	sp, r7
+ 800f144:	bd80      	pop	{r7, pc}
+ 800f146:	bf00      	nop
+ 800f148:	2000057c 	.word	0x2000057c
+ 800f14c:	20000608 	.word	0x20000608
+ 800f150:	2000061c 	.word	0x2000061c
+ 800f154:	20000638 	.word	0x20000638
+ 800f158:	2000064c 	.word	0x2000064c
+ 800f15c:	20000664 	.word	0x20000664
+ 800f160:	20000630 	.word	0x20000630
+ 800f164:	20000634 	.word	0x20000634
+
+0800f168 <prvCheckTasksWaitingTermination>:
+/*-----------------------------------------------------------*/
+
+static void prvCheckTasksWaitingTermination( void )
+{
+ 800f168:	b580      	push	{r7, lr}
+ 800f16a:	b082      	sub	sp, #8
+ 800f16c:	af00      	add	r7, sp, #0
+	{
+		TCB_t *pxTCB;
+
+		/* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
+		being called too often in the idle task. */
+		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
+ 800f16e:	e019      	b.n	800f1a4 <prvCheckTasksWaitingTermination+0x3c>
+		{
+			taskENTER_CRITICAL();
+ 800f170:	f000 fbba 	bl	800f8e8 <vPortEnterCritical>
+			{
+				pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 800f174:	4b0f      	ldr	r3, [pc, #60]	; (800f1b4 <prvCheckTasksWaitingTermination+0x4c>)
+ 800f176:	68db      	ldr	r3, [r3, #12]
+ 800f178:	68db      	ldr	r3, [r3, #12]
+ 800f17a:	607b      	str	r3, [r7, #4]
+				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+ 800f17c:	687b      	ldr	r3, [r7, #4]
+ 800f17e:	3304      	adds	r3, #4
+ 800f180:	4618      	mov	r0, r3
+ 800f182:	f7fe f9c9 	bl	800d518 <uxListRemove>
+				--uxCurrentNumberOfTasks;
+ 800f186:	4b0c      	ldr	r3, [pc, #48]	; (800f1b8 <prvCheckTasksWaitingTermination+0x50>)
+ 800f188:	681b      	ldr	r3, [r3, #0]
+ 800f18a:	3b01      	subs	r3, #1
+ 800f18c:	4a0a      	ldr	r2, [pc, #40]	; (800f1b8 <prvCheckTasksWaitingTermination+0x50>)
+ 800f18e:	6013      	str	r3, [r2, #0]
+				--uxDeletedTasksWaitingCleanUp;
+ 800f190:	4b0a      	ldr	r3, [pc, #40]	; (800f1bc <prvCheckTasksWaitingTermination+0x54>)
+ 800f192:	681b      	ldr	r3, [r3, #0]
+ 800f194:	3b01      	subs	r3, #1
+ 800f196:	4a09      	ldr	r2, [pc, #36]	; (800f1bc <prvCheckTasksWaitingTermination+0x54>)
+ 800f198:	6013      	str	r3, [r2, #0]
+			}
+			taskEXIT_CRITICAL();
+ 800f19a:	f000 fbd7 	bl	800f94c <vPortExitCritical>
+
+			prvDeleteTCB( pxTCB );
+ 800f19e:	6878      	ldr	r0, [r7, #4]
+ 800f1a0:	f000 f80e 	bl	800f1c0 <prvDeleteTCB>
+		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
+ 800f1a4:	4b05      	ldr	r3, [pc, #20]	; (800f1bc <prvCheckTasksWaitingTermination+0x54>)
+ 800f1a6:	681b      	ldr	r3, [r3, #0]
+ 800f1a8:	2b00      	cmp	r3, #0
+ 800f1aa:	d1e1      	bne.n	800f170 <prvCheckTasksWaitingTermination+0x8>
+		}
+	}
+	#endif /* INCLUDE_vTaskDelete */
+}
+ 800f1ac:	bf00      	nop
+ 800f1ae:	3708      	adds	r7, #8
+ 800f1b0:	46bd      	mov	sp, r7
+ 800f1b2:	bd80      	pop	{r7, pc}
+ 800f1b4:	2000064c 	.word	0x2000064c
+ 800f1b8:	20000678 	.word	0x20000678
+ 800f1bc:	20000660 	.word	0x20000660
+
+0800f1c0 <prvDeleteTCB>:
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_vTaskDelete == 1 )
+
+	static void prvDeleteTCB( TCB_t *pxTCB )
+	{
+ 800f1c0:	b580      	push	{r7, lr}
+ 800f1c2:	b084      	sub	sp, #16
+ 800f1c4:	af00      	add	r7, sp, #0
+ 800f1c6:	6078      	str	r0, [r7, #4]
+		#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
+		{
+			/* The task could have been allocated statically or dynamically, so
+			check what was statically allocated before trying to free the
+			memory. */
+			if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
+ 800f1c8:	687b      	ldr	r3, [r7, #4]
+ 800f1ca:	f893 3055 	ldrb.w	r3, [r3, #85]	; 0x55
+ 800f1ce:	2b00      	cmp	r3, #0
+ 800f1d0:	d108      	bne.n	800f1e4 <prvDeleteTCB+0x24>
+			{
+				/* Both the stack and TCB were allocated dynamically, so both
+				must be freed. */
+				vPortFree( pxTCB->pxStack );
+ 800f1d2:	687b      	ldr	r3, [r7, #4]
+ 800f1d4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800f1d6:	4618      	mov	r0, r3
+ 800f1d8:	f000 fd74 	bl	800fcc4 <vPortFree>
+				vPortFree( pxTCB );
+ 800f1dc:	6878      	ldr	r0, [r7, #4]
+ 800f1de:	f000 fd71 	bl	800fcc4 <vPortFree>
+				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+	}
+ 800f1e2:	e019      	b.n	800f218 <prvDeleteTCB+0x58>
+			else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
+ 800f1e4:	687b      	ldr	r3, [r7, #4]
+ 800f1e6:	f893 3055 	ldrb.w	r3, [r3, #85]	; 0x55
+ 800f1ea:	2b01      	cmp	r3, #1
+ 800f1ec:	d103      	bne.n	800f1f6 <prvDeleteTCB+0x36>
+				vPortFree( pxTCB );
+ 800f1ee:	6878      	ldr	r0, [r7, #4]
+ 800f1f0:	f000 fd68 	bl	800fcc4 <vPortFree>
+	}
+ 800f1f4:	e010      	b.n	800f218 <prvDeleteTCB+0x58>
+				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
+ 800f1f6:	687b      	ldr	r3, [r7, #4]
+ 800f1f8:	f893 3055 	ldrb.w	r3, [r3, #85]	; 0x55
+ 800f1fc:	2b02      	cmp	r3, #2
+ 800f1fe:	d00b      	beq.n	800f218 <prvDeleteTCB+0x58>
+ 800f200:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f204:	b672      	cpsid	i
+ 800f206:	f383 8811 	msr	BASEPRI, r3
+ 800f20a:	f3bf 8f6f 	isb	sy
+ 800f20e:	f3bf 8f4f 	dsb	sy
+ 800f212:	b662      	cpsie	i
+ 800f214:	60fb      	str	r3, [r7, #12]
+ 800f216:	e7fe      	b.n	800f216 <prvDeleteTCB+0x56>
+	}
+ 800f218:	bf00      	nop
+ 800f21a:	3710      	adds	r7, #16
+ 800f21c:	46bd      	mov	sp, r7
+ 800f21e:	bd80      	pop	{r7, pc}
+
+0800f220 <prvResetNextTaskUnblockTime>:
+
+#endif /* INCLUDE_vTaskDelete */
+/*-----------------------------------------------------------*/
+
+static void prvResetNextTaskUnblockTime( void )
+{
+ 800f220:	b480      	push	{r7}
+ 800f222:	b083      	sub	sp, #12
+ 800f224:	af00      	add	r7, sp, #0
+TCB_t *pxTCB;
+
+	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+ 800f226:	4b0c      	ldr	r3, [pc, #48]	; (800f258 <prvResetNextTaskUnblockTime+0x38>)
+ 800f228:	681b      	ldr	r3, [r3, #0]
+ 800f22a:	681b      	ldr	r3, [r3, #0]
+ 800f22c:	2b00      	cmp	r3, #0
+ 800f22e:	d104      	bne.n	800f23a <prvResetNextTaskUnblockTime+0x1a>
+	{
+		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
+		the maximum possible value so it is	extremely unlikely that the
+		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
+		there is an item in the delayed list. */
+		xNextTaskUnblockTime = portMAX_DELAY;
+ 800f230:	4b0a      	ldr	r3, [pc, #40]	; (800f25c <prvResetNextTaskUnblockTime+0x3c>)
+ 800f232:	f04f 32ff 	mov.w	r2, #4294967295
+ 800f236:	601a      	str	r2, [r3, #0]
+		which the task at the head of the delayed list should be removed
+		from the Blocked state. */
+		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
+	}
+}
+ 800f238:	e008      	b.n	800f24c <prvResetNextTaskUnblockTime+0x2c>
+		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 800f23a:	4b07      	ldr	r3, [pc, #28]	; (800f258 <prvResetNextTaskUnblockTime+0x38>)
+ 800f23c:	681b      	ldr	r3, [r3, #0]
+ 800f23e:	68db      	ldr	r3, [r3, #12]
+ 800f240:	68db      	ldr	r3, [r3, #12]
+ 800f242:	607b      	str	r3, [r7, #4]
+		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
+ 800f244:	687b      	ldr	r3, [r7, #4]
+ 800f246:	685b      	ldr	r3, [r3, #4]
+ 800f248:	4a04      	ldr	r2, [pc, #16]	; (800f25c <prvResetNextTaskUnblockTime+0x3c>)
+ 800f24a:	6013      	str	r3, [r2, #0]
+}
+ 800f24c:	bf00      	nop
+ 800f24e:	370c      	adds	r7, #12
+ 800f250:	46bd      	mov	sp, r7
+ 800f252:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800f256:	4770      	bx	lr
+ 800f258:	20000630 	.word	0x20000630
+ 800f25c:	20000698 	.word	0x20000698
+
+0800f260 <xTaskGetSchedulerState>:
+/*-----------------------------------------------------------*/
+
+#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+
+	BaseType_t xTaskGetSchedulerState( void )
+	{
+ 800f260:	b480      	push	{r7}
+ 800f262:	b083      	sub	sp, #12
+ 800f264:	af00      	add	r7, sp, #0
+	BaseType_t xReturn;
+
+		if( xSchedulerRunning == pdFALSE )
+ 800f266:	4b0b      	ldr	r3, [pc, #44]	; (800f294 <xTaskGetSchedulerState+0x34>)
+ 800f268:	681b      	ldr	r3, [r3, #0]
+ 800f26a:	2b00      	cmp	r3, #0
+ 800f26c:	d102      	bne.n	800f274 <xTaskGetSchedulerState+0x14>
+		{
+			xReturn = taskSCHEDULER_NOT_STARTED;
+ 800f26e:	2301      	movs	r3, #1
+ 800f270:	607b      	str	r3, [r7, #4]
+ 800f272:	e008      	b.n	800f286 <xTaskGetSchedulerState+0x26>
+		}
+		else
+		{
+			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+ 800f274:	4b08      	ldr	r3, [pc, #32]	; (800f298 <xTaskGetSchedulerState+0x38>)
+ 800f276:	681b      	ldr	r3, [r3, #0]
+ 800f278:	2b00      	cmp	r3, #0
+ 800f27a:	d102      	bne.n	800f282 <xTaskGetSchedulerState+0x22>
+			{
+				xReturn = taskSCHEDULER_RUNNING;
+ 800f27c:	2302      	movs	r3, #2
+ 800f27e:	607b      	str	r3, [r7, #4]
+ 800f280:	e001      	b.n	800f286 <xTaskGetSchedulerState+0x26>
+			}
+			else
+			{
+				xReturn = taskSCHEDULER_SUSPENDED;
+ 800f282:	2300      	movs	r3, #0
+ 800f284:	607b      	str	r3, [r7, #4]
+			}
+		}
+
+		return xReturn;
+ 800f286:	687b      	ldr	r3, [r7, #4]
+	}
+ 800f288:	4618      	mov	r0, r3
+ 800f28a:	370c      	adds	r7, #12
+ 800f28c:	46bd      	mov	sp, r7
+ 800f28e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800f292:	4770      	bx	lr
+ 800f294:	20000684 	.word	0x20000684
+ 800f298:	200006a0 	.word	0x200006a0
+
+0800f29c <xTaskPriorityInherit>:
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_MUTEXES == 1 )
+
+	BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
+	{
+ 800f29c:	b580      	push	{r7, lr}
+ 800f29e:	b084      	sub	sp, #16
+ 800f2a0:	af00      	add	r7, sp, #0
+ 800f2a2:	6078      	str	r0, [r7, #4]
+	TCB_t * const pxMutexHolderTCB = pxMutexHolder;
+ 800f2a4:	687b      	ldr	r3, [r7, #4]
+ 800f2a6:	60bb      	str	r3, [r7, #8]
+	BaseType_t xReturn = pdFALSE;
+ 800f2a8:	2300      	movs	r3, #0
+ 800f2aa:	60fb      	str	r3, [r7, #12]
+
+		/* If the mutex was given back by an interrupt while the queue was
+		locked then the mutex holder might now be NULL.  _RB_ Is this still
+		needed as interrupts can no longer use mutexes? */
+		if( pxMutexHolder != NULL )
+ 800f2ac:	687b      	ldr	r3, [r7, #4]
+ 800f2ae:	2b00      	cmp	r3, #0
+ 800f2b0:	d069      	beq.n	800f386 <xTaskPriorityInherit+0xea>
+		{
+			/* If the holder of the mutex has a priority below the priority of
+			the task attempting to obtain the mutex then it will temporarily
+			inherit the priority of the task attempting to obtain the mutex. */
+			if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
+ 800f2b2:	68bb      	ldr	r3, [r7, #8]
+ 800f2b4:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800f2b6:	4b36      	ldr	r3, [pc, #216]	; (800f390 <xTaskPriorityInherit+0xf4>)
+ 800f2b8:	681b      	ldr	r3, [r3, #0]
+ 800f2ba:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f2bc:	429a      	cmp	r2, r3
+ 800f2be:	d259      	bcs.n	800f374 <xTaskPriorityInherit+0xd8>
+			{
+				/* Adjust the mutex holder state to account for its new
+				priority.  Only reset the event list item value if the value is
+				not being used for anything else. */
+				if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
+ 800f2c0:	68bb      	ldr	r3, [r7, #8]
+ 800f2c2:	699b      	ldr	r3, [r3, #24]
+ 800f2c4:	2b00      	cmp	r3, #0
+ 800f2c6:	db06      	blt.n	800f2d6 <xTaskPriorityInherit+0x3a>
+				{
+					listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+ 800f2c8:	4b31      	ldr	r3, [pc, #196]	; (800f390 <xTaskPriorityInherit+0xf4>)
+ 800f2ca:	681b      	ldr	r3, [r3, #0]
+ 800f2cc:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f2ce:	f1c3 0207 	rsb	r2, r3, #7
+ 800f2d2:	68bb      	ldr	r3, [r7, #8]
+ 800f2d4:	619a      	str	r2, [r3, #24]
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				/* If the task being modified is in the ready state it will need
+				to be moved into a new list. */
+				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
+ 800f2d6:	68bb      	ldr	r3, [r7, #8]
+ 800f2d8:	6959      	ldr	r1, [r3, #20]
+ 800f2da:	68bb      	ldr	r3, [r7, #8]
+ 800f2dc:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800f2de:	4613      	mov	r3, r2
+ 800f2e0:	009b      	lsls	r3, r3, #2
+ 800f2e2:	4413      	add	r3, r2
+ 800f2e4:	009b      	lsls	r3, r3, #2
+ 800f2e6:	4a2b      	ldr	r2, [pc, #172]	; (800f394 <xTaskPriorityInherit+0xf8>)
+ 800f2e8:	4413      	add	r3, r2
+ 800f2ea:	4299      	cmp	r1, r3
+ 800f2ec:	d13a      	bne.n	800f364 <xTaskPriorityInherit+0xc8>
+				{
+					if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+ 800f2ee:	68bb      	ldr	r3, [r7, #8]
+ 800f2f0:	3304      	adds	r3, #4
+ 800f2f2:	4618      	mov	r0, r3
+ 800f2f4:	f7fe f910 	bl	800d518 <uxListRemove>
+ 800f2f8:	4603      	mov	r3, r0
+ 800f2fa:	2b00      	cmp	r3, #0
+ 800f2fc:	d115      	bne.n	800f32a <xTaskPriorityInherit+0x8e>
+					{
+						taskRESET_READY_PRIORITY( pxMutexHolderTCB->uxPriority );
+ 800f2fe:	68bb      	ldr	r3, [r7, #8]
+ 800f300:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800f302:	4924      	ldr	r1, [pc, #144]	; (800f394 <xTaskPriorityInherit+0xf8>)
+ 800f304:	4613      	mov	r3, r2
+ 800f306:	009b      	lsls	r3, r3, #2
+ 800f308:	4413      	add	r3, r2
+ 800f30a:	009b      	lsls	r3, r3, #2
+ 800f30c:	440b      	add	r3, r1
+ 800f30e:	681b      	ldr	r3, [r3, #0]
+ 800f310:	2b00      	cmp	r3, #0
+ 800f312:	d10a      	bne.n	800f32a <xTaskPriorityInherit+0x8e>
+ 800f314:	68bb      	ldr	r3, [r7, #8]
+ 800f316:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f318:	2201      	movs	r2, #1
+ 800f31a:	fa02 f303 	lsl.w	r3, r2, r3
+ 800f31e:	43da      	mvns	r2, r3
+ 800f320:	4b1d      	ldr	r3, [pc, #116]	; (800f398 <xTaskPriorityInherit+0xfc>)
+ 800f322:	681b      	ldr	r3, [r3, #0]
+ 800f324:	4013      	ands	r3, r2
+ 800f326:	4a1c      	ldr	r2, [pc, #112]	; (800f398 <xTaskPriorityInherit+0xfc>)
+ 800f328:	6013      	str	r3, [r2, #0]
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* Inherit the priority before being moved into the new list. */
+					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
+ 800f32a:	4b19      	ldr	r3, [pc, #100]	; (800f390 <xTaskPriorityInherit+0xf4>)
+ 800f32c:	681b      	ldr	r3, [r3, #0]
+ 800f32e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800f330:	68bb      	ldr	r3, [r7, #8]
+ 800f332:	62da      	str	r2, [r3, #44]	; 0x2c
+					prvAddTaskToReadyList( pxMutexHolderTCB );
+ 800f334:	68bb      	ldr	r3, [r7, #8]
+ 800f336:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f338:	2201      	movs	r2, #1
+ 800f33a:	409a      	lsls	r2, r3
+ 800f33c:	4b16      	ldr	r3, [pc, #88]	; (800f398 <xTaskPriorityInherit+0xfc>)
+ 800f33e:	681b      	ldr	r3, [r3, #0]
+ 800f340:	4313      	orrs	r3, r2
+ 800f342:	4a15      	ldr	r2, [pc, #84]	; (800f398 <xTaskPriorityInherit+0xfc>)
+ 800f344:	6013      	str	r3, [r2, #0]
+ 800f346:	68bb      	ldr	r3, [r7, #8]
+ 800f348:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800f34a:	4613      	mov	r3, r2
+ 800f34c:	009b      	lsls	r3, r3, #2
+ 800f34e:	4413      	add	r3, r2
+ 800f350:	009b      	lsls	r3, r3, #2
+ 800f352:	4a10      	ldr	r2, [pc, #64]	; (800f394 <xTaskPriorityInherit+0xf8>)
+ 800f354:	441a      	add	r2, r3
+ 800f356:	68bb      	ldr	r3, [r7, #8]
+ 800f358:	3304      	adds	r3, #4
+ 800f35a:	4619      	mov	r1, r3
+ 800f35c:	4610      	mov	r0, r2
+ 800f35e:	f7fe f87e 	bl	800d45e <vListInsertEnd>
+ 800f362:	e004      	b.n	800f36e <xTaskPriorityInherit+0xd2>
+				}
+				else
+				{
+					/* Just inherit the priority. */
+					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
+ 800f364:	4b0a      	ldr	r3, [pc, #40]	; (800f390 <xTaskPriorityInherit+0xf4>)
+ 800f366:	681b      	ldr	r3, [r3, #0]
+ 800f368:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800f36a:	68bb      	ldr	r3, [r7, #8]
+ 800f36c:	62da      	str	r2, [r3, #44]	; 0x2c
+				}
+
+				traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );
+
+				/* Inheritance occurred. */
+				xReturn = pdTRUE;
+ 800f36e:	2301      	movs	r3, #1
+ 800f370:	60fb      	str	r3, [r7, #12]
+ 800f372:	e008      	b.n	800f386 <xTaskPriorityInherit+0xea>
+			}
+			else
+			{
+				if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
+ 800f374:	68bb      	ldr	r3, [r7, #8]
+ 800f376:	6c5a      	ldr	r2, [r3, #68]	; 0x44
+ 800f378:	4b05      	ldr	r3, [pc, #20]	; (800f390 <xTaskPriorityInherit+0xf4>)
+ 800f37a:	681b      	ldr	r3, [r3, #0]
+ 800f37c:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f37e:	429a      	cmp	r2, r3
+ 800f380:	d201      	bcs.n	800f386 <xTaskPriorityInherit+0xea>
+					current priority of the mutex holder is not lower than the
+					priority of the task attempting to take the mutex.
+					Therefore the mutex holder must have already inherited a
+					priority, but inheritance would have occurred if that had
+					not been the case. */
+					xReturn = pdTRUE;
+ 800f382:	2301      	movs	r3, #1
+ 800f384:	60fb      	str	r3, [r7, #12]
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return xReturn;
+ 800f386:	68fb      	ldr	r3, [r7, #12]
+	}
+ 800f388:	4618      	mov	r0, r3
+ 800f38a:	3710      	adds	r7, #16
+ 800f38c:	46bd      	mov	sp, r7
+ 800f38e:	bd80      	pop	{r7, pc}
+ 800f390:	20000578 	.word	0x20000578
+ 800f394:	2000057c 	.word	0x2000057c
+ 800f398:	20000680 	.word	0x20000680
+
+0800f39c <xTaskPriorityDisinherit>:
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_MUTEXES == 1 )
+
+	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
+	{
+ 800f39c:	b580      	push	{r7, lr}
+ 800f39e:	b086      	sub	sp, #24
+ 800f3a0:	af00      	add	r7, sp, #0
+ 800f3a2:	6078      	str	r0, [r7, #4]
+	TCB_t * const pxTCB = pxMutexHolder;
+ 800f3a4:	687b      	ldr	r3, [r7, #4]
+ 800f3a6:	613b      	str	r3, [r7, #16]
+	BaseType_t xReturn = pdFALSE;
+ 800f3a8:	2300      	movs	r3, #0
+ 800f3aa:	617b      	str	r3, [r7, #20]
+
+		if( pxMutexHolder != NULL )
+ 800f3ac:	687b      	ldr	r3, [r7, #4]
+ 800f3ae:	2b00      	cmp	r3, #0
+ 800f3b0:	d070      	beq.n	800f494 <xTaskPriorityDisinherit+0xf8>
+		{
+			/* A task can only have an inherited priority if it holds the mutex.
+			If the mutex is held by a task then it cannot be given from an
+			interrupt, and if a mutex is given by the holding task then it must
+			be the running state task. */
+			configASSERT( pxTCB == pxCurrentTCB );
+ 800f3b2:	4b3b      	ldr	r3, [pc, #236]	; (800f4a0 <xTaskPriorityDisinherit+0x104>)
+ 800f3b4:	681b      	ldr	r3, [r3, #0]
+ 800f3b6:	693a      	ldr	r2, [r7, #16]
+ 800f3b8:	429a      	cmp	r2, r3
+ 800f3ba:	d00b      	beq.n	800f3d4 <xTaskPriorityDisinherit+0x38>
+ 800f3bc:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f3c0:	b672      	cpsid	i
+ 800f3c2:	f383 8811 	msr	BASEPRI, r3
+ 800f3c6:	f3bf 8f6f 	isb	sy
+ 800f3ca:	f3bf 8f4f 	dsb	sy
+ 800f3ce:	b662      	cpsie	i
+ 800f3d0:	60fb      	str	r3, [r7, #12]
+ 800f3d2:	e7fe      	b.n	800f3d2 <xTaskPriorityDisinherit+0x36>
+			configASSERT( pxTCB->uxMutexesHeld );
+ 800f3d4:	693b      	ldr	r3, [r7, #16]
+ 800f3d6:	6c9b      	ldr	r3, [r3, #72]	; 0x48
+ 800f3d8:	2b00      	cmp	r3, #0
+ 800f3da:	d10b      	bne.n	800f3f4 <xTaskPriorityDisinherit+0x58>
+ 800f3dc:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f3e0:	b672      	cpsid	i
+ 800f3e2:	f383 8811 	msr	BASEPRI, r3
+ 800f3e6:	f3bf 8f6f 	isb	sy
+ 800f3ea:	f3bf 8f4f 	dsb	sy
+ 800f3ee:	b662      	cpsie	i
+ 800f3f0:	60bb      	str	r3, [r7, #8]
+ 800f3f2:	e7fe      	b.n	800f3f2 <xTaskPriorityDisinherit+0x56>
+			( pxTCB->uxMutexesHeld )--;
+ 800f3f4:	693b      	ldr	r3, [r7, #16]
+ 800f3f6:	6c9b      	ldr	r3, [r3, #72]	; 0x48
+ 800f3f8:	1e5a      	subs	r2, r3, #1
+ 800f3fa:	693b      	ldr	r3, [r7, #16]
+ 800f3fc:	649a      	str	r2, [r3, #72]	; 0x48
+
+			/* Has the holder of the mutex inherited the priority of another
+			task? */
+			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
+ 800f3fe:	693b      	ldr	r3, [r7, #16]
+ 800f400:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800f402:	693b      	ldr	r3, [r7, #16]
+ 800f404:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 800f406:	429a      	cmp	r2, r3
+ 800f408:	d044      	beq.n	800f494 <xTaskPriorityDisinherit+0xf8>
+			{
+				/* Only disinherit if no other mutexes are held. */
+				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
+ 800f40a:	693b      	ldr	r3, [r7, #16]
+ 800f40c:	6c9b      	ldr	r3, [r3, #72]	; 0x48
+ 800f40e:	2b00      	cmp	r3, #0
+ 800f410:	d140      	bne.n	800f494 <xTaskPriorityDisinherit+0xf8>
+					/* A task can only have an inherited priority if it holds
+					the mutex.  If the mutex is held by a task then it cannot be
+					given from an interrupt, and if a mutex is given by the
+					holding task then it must be the running state task.  Remove
+					the holding task from the ready list. */
+					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+ 800f412:	693b      	ldr	r3, [r7, #16]
+ 800f414:	3304      	adds	r3, #4
+ 800f416:	4618      	mov	r0, r3
+ 800f418:	f7fe f87e 	bl	800d518 <uxListRemove>
+ 800f41c:	4603      	mov	r3, r0
+ 800f41e:	2b00      	cmp	r3, #0
+ 800f420:	d115      	bne.n	800f44e <xTaskPriorityDisinherit+0xb2>
+					{
+						taskRESET_READY_PRIORITY( pxTCB->uxPriority );
+ 800f422:	693b      	ldr	r3, [r7, #16]
+ 800f424:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800f426:	491f      	ldr	r1, [pc, #124]	; (800f4a4 <xTaskPriorityDisinherit+0x108>)
+ 800f428:	4613      	mov	r3, r2
+ 800f42a:	009b      	lsls	r3, r3, #2
+ 800f42c:	4413      	add	r3, r2
+ 800f42e:	009b      	lsls	r3, r3, #2
+ 800f430:	440b      	add	r3, r1
+ 800f432:	681b      	ldr	r3, [r3, #0]
+ 800f434:	2b00      	cmp	r3, #0
+ 800f436:	d10a      	bne.n	800f44e <xTaskPriorityDisinherit+0xb2>
+ 800f438:	693b      	ldr	r3, [r7, #16]
+ 800f43a:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f43c:	2201      	movs	r2, #1
+ 800f43e:	fa02 f303 	lsl.w	r3, r2, r3
+ 800f442:	43da      	mvns	r2, r3
+ 800f444:	4b18      	ldr	r3, [pc, #96]	; (800f4a8 <xTaskPriorityDisinherit+0x10c>)
+ 800f446:	681b      	ldr	r3, [r3, #0]
+ 800f448:	4013      	ands	r3, r2
+ 800f44a:	4a17      	ldr	r2, [pc, #92]	; (800f4a8 <xTaskPriorityDisinherit+0x10c>)
+ 800f44c:	6013      	str	r3, [r2, #0]
+					}
+
+					/* Disinherit the priority before adding the task into the
+					new	ready list. */
+					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
+					pxTCB->uxPriority = pxTCB->uxBasePriority;
+ 800f44e:	693b      	ldr	r3, [r7, #16]
+ 800f450:	6c5a      	ldr	r2, [r3, #68]	; 0x44
+ 800f452:	693b      	ldr	r3, [r7, #16]
+ 800f454:	62da      	str	r2, [r3, #44]	; 0x2c
+
+					/* Reset the event list item value.  It cannot be in use for
+					any other purpose if this task is running, and it must be
+					running to give back the mutex. */
+					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+ 800f456:	693b      	ldr	r3, [r7, #16]
+ 800f458:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f45a:	f1c3 0207 	rsb	r2, r3, #7
+ 800f45e:	693b      	ldr	r3, [r7, #16]
+ 800f460:	619a      	str	r2, [r3, #24]
+					prvAddTaskToReadyList( pxTCB );
+ 800f462:	693b      	ldr	r3, [r7, #16]
+ 800f464:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f466:	2201      	movs	r2, #1
+ 800f468:	409a      	lsls	r2, r3
+ 800f46a:	4b0f      	ldr	r3, [pc, #60]	; (800f4a8 <xTaskPriorityDisinherit+0x10c>)
+ 800f46c:	681b      	ldr	r3, [r3, #0]
+ 800f46e:	4313      	orrs	r3, r2
+ 800f470:	4a0d      	ldr	r2, [pc, #52]	; (800f4a8 <xTaskPriorityDisinherit+0x10c>)
+ 800f472:	6013      	str	r3, [r2, #0]
+ 800f474:	693b      	ldr	r3, [r7, #16]
+ 800f476:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800f478:	4613      	mov	r3, r2
+ 800f47a:	009b      	lsls	r3, r3, #2
+ 800f47c:	4413      	add	r3, r2
+ 800f47e:	009b      	lsls	r3, r3, #2
+ 800f480:	4a08      	ldr	r2, [pc, #32]	; (800f4a4 <xTaskPriorityDisinherit+0x108>)
+ 800f482:	441a      	add	r2, r3
+ 800f484:	693b      	ldr	r3, [r7, #16]
+ 800f486:	3304      	adds	r3, #4
+ 800f488:	4619      	mov	r1, r3
+ 800f48a:	4610      	mov	r0, r2
+ 800f48c:	f7fd ffe7 	bl	800d45e <vListInsertEnd>
+					in an order different to that in which they were taken.
+					If a context switch did not occur when the first mutex was
+					returned, even if a task was waiting on it, then a context
+					switch should occur when the last mutex is returned whether
+					a task is waiting on it or not. */
+					xReturn = pdTRUE;
+ 800f490:	2301      	movs	r3, #1
+ 800f492:	617b      	str	r3, [r7, #20]
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return xReturn;
+ 800f494:	697b      	ldr	r3, [r7, #20]
+	}
+ 800f496:	4618      	mov	r0, r3
+ 800f498:	3718      	adds	r7, #24
+ 800f49a:	46bd      	mov	sp, r7
+ 800f49c:	bd80      	pop	{r7, pc}
+ 800f49e:	bf00      	nop
+ 800f4a0:	20000578 	.word	0x20000578
+ 800f4a4:	2000057c 	.word	0x2000057c
+ 800f4a8:	20000680 	.word	0x20000680
+
+0800f4ac <vTaskPriorityDisinheritAfterTimeout>:
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_MUTEXES == 1 )
+
+	void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask )
+	{
+ 800f4ac:	b580      	push	{r7, lr}
+ 800f4ae:	b088      	sub	sp, #32
+ 800f4b0:	af00      	add	r7, sp, #0
+ 800f4b2:	6078      	str	r0, [r7, #4]
+ 800f4b4:	6039      	str	r1, [r7, #0]
+	TCB_t * const pxTCB = pxMutexHolder;
+ 800f4b6:	687b      	ldr	r3, [r7, #4]
+ 800f4b8:	61bb      	str	r3, [r7, #24]
+	UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
+	const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
+ 800f4ba:	2301      	movs	r3, #1
+ 800f4bc:	617b      	str	r3, [r7, #20]
+
+		if( pxMutexHolder != NULL )
+ 800f4be:	687b      	ldr	r3, [r7, #4]
+ 800f4c0:	2b00      	cmp	r3, #0
+ 800f4c2:	f000 8085 	beq.w	800f5d0 <vTaskPriorityDisinheritAfterTimeout+0x124>
+		{
+			/* If pxMutexHolder is not NULL then the holder must hold at least
+			one mutex. */
+			configASSERT( pxTCB->uxMutexesHeld );
+ 800f4c6:	69bb      	ldr	r3, [r7, #24]
+ 800f4c8:	6c9b      	ldr	r3, [r3, #72]	; 0x48
+ 800f4ca:	2b00      	cmp	r3, #0
+ 800f4cc:	d10b      	bne.n	800f4e6 <vTaskPriorityDisinheritAfterTimeout+0x3a>
+ 800f4ce:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f4d2:	b672      	cpsid	i
+ 800f4d4:	f383 8811 	msr	BASEPRI, r3
+ 800f4d8:	f3bf 8f6f 	isb	sy
+ 800f4dc:	f3bf 8f4f 	dsb	sy
+ 800f4e0:	b662      	cpsie	i
+ 800f4e2:	60fb      	str	r3, [r7, #12]
+ 800f4e4:	e7fe      	b.n	800f4e4 <vTaskPriorityDisinheritAfterTimeout+0x38>
+
+			/* Determine the priority to which the priority of the task that
+			holds the mutex should be set.  This will be the greater of the
+			holding task's base priority and the priority of the highest
+			priority task that is waiting to obtain the mutex. */
+			if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
+ 800f4e6:	69bb      	ldr	r3, [r7, #24]
+ 800f4e8:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 800f4ea:	683a      	ldr	r2, [r7, #0]
+ 800f4ec:	429a      	cmp	r2, r3
+ 800f4ee:	d902      	bls.n	800f4f6 <vTaskPriorityDisinheritAfterTimeout+0x4a>
+			{
+				uxPriorityToUse = uxHighestPriorityWaitingTask;
+ 800f4f0:	683b      	ldr	r3, [r7, #0]
+ 800f4f2:	61fb      	str	r3, [r7, #28]
+ 800f4f4:	e002      	b.n	800f4fc <vTaskPriorityDisinheritAfterTimeout+0x50>
+			}
+			else
+			{
+				uxPriorityToUse = pxTCB->uxBasePriority;
+ 800f4f6:	69bb      	ldr	r3, [r7, #24]
+ 800f4f8:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 800f4fa:	61fb      	str	r3, [r7, #28]
+			}
+
+			/* Does the priority need to change? */
+			if( pxTCB->uxPriority != uxPriorityToUse )
+ 800f4fc:	69bb      	ldr	r3, [r7, #24]
+ 800f4fe:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f500:	69fa      	ldr	r2, [r7, #28]
+ 800f502:	429a      	cmp	r2, r3
+ 800f504:	d064      	beq.n	800f5d0 <vTaskPriorityDisinheritAfterTimeout+0x124>
+			{
+				/* Only disinherit if no other mutexes are held.  This is a
+				simplification in the priority inheritance implementation.  If
+				the task that holds the mutex is also holding other mutexes then
+				the other mutexes may have caused the priority inheritance. */
+				if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
+ 800f506:	69bb      	ldr	r3, [r7, #24]
+ 800f508:	6c9b      	ldr	r3, [r3, #72]	; 0x48
+ 800f50a:	697a      	ldr	r2, [r7, #20]
+ 800f50c:	429a      	cmp	r2, r3
+ 800f50e:	d15f      	bne.n	800f5d0 <vTaskPriorityDisinheritAfterTimeout+0x124>
+				{
+					/* If a task has timed out because it already holds the
+					mutex it was trying to obtain then it cannot of inherited
+					its own priority. */
+					configASSERT( pxTCB != pxCurrentTCB );
+ 800f510:	4b31      	ldr	r3, [pc, #196]	; (800f5d8 <vTaskPriorityDisinheritAfterTimeout+0x12c>)
+ 800f512:	681b      	ldr	r3, [r3, #0]
+ 800f514:	69ba      	ldr	r2, [r7, #24]
+ 800f516:	429a      	cmp	r2, r3
+ 800f518:	d10b      	bne.n	800f532 <vTaskPriorityDisinheritAfterTimeout+0x86>
+ 800f51a:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f51e:	b672      	cpsid	i
+ 800f520:	f383 8811 	msr	BASEPRI, r3
+ 800f524:	f3bf 8f6f 	isb	sy
+ 800f528:	f3bf 8f4f 	dsb	sy
+ 800f52c:	b662      	cpsie	i
+ 800f52e:	60bb      	str	r3, [r7, #8]
+ 800f530:	e7fe      	b.n	800f530 <vTaskPriorityDisinheritAfterTimeout+0x84>
+
+					/* Disinherit the priority, remembering the previous
+					priority to facilitate determining the subject task's
+					state. */
+					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
+					uxPriorityUsedOnEntry = pxTCB->uxPriority;
+ 800f532:	69bb      	ldr	r3, [r7, #24]
+ 800f534:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f536:	613b      	str	r3, [r7, #16]
+					pxTCB->uxPriority = uxPriorityToUse;
+ 800f538:	69bb      	ldr	r3, [r7, #24]
+ 800f53a:	69fa      	ldr	r2, [r7, #28]
+ 800f53c:	62da      	str	r2, [r3, #44]	; 0x2c
+
+					/* Only reset the event list item value if the value is not
+					being used for anything else. */
+					if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
+ 800f53e:	69bb      	ldr	r3, [r7, #24]
+ 800f540:	699b      	ldr	r3, [r3, #24]
+ 800f542:	2b00      	cmp	r3, #0
+ 800f544:	db04      	blt.n	800f550 <vTaskPriorityDisinheritAfterTimeout+0xa4>
+					{
+						listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+ 800f546:	69fb      	ldr	r3, [r7, #28]
+ 800f548:	f1c3 0207 	rsb	r2, r3, #7
+ 800f54c:	69bb      	ldr	r3, [r7, #24]
+ 800f54e:	619a      	str	r2, [r3, #24]
+					then the task that holds the mutex could be in either the
+					Ready, Blocked or Suspended states.  Only remove the task
+					from its current state list if it is in the Ready state as
+					the task's priority is going to change and there is one
+					Ready list per priority. */
+					if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
+ 800f550:	69bb      	ldr	r3, [r7, #24]
+ 800f552:	6959      	ldr	r1, [r3, #20]
+ 800f554:	693a      	ldr	r2, [r7, #16]
+ 800f556:	4613      	mov	r3, r2
+ 800f558:	009b      	lsls	r3, r3, #2
+ 800f55a:	4413      	add	r3, r2
+ 800f55c:	009b      	lsls	r3, r3, #2
+ 800f55e:	4a1f      	ldr	r2, [pc, #124]	; (800f5dc <vTaskPriorityDisinheritAfterTimeout+0x130>)
+ 800f560:	4413      	add	r3, r2
+ 800f562:	4299      	cmp	r1, r3
+ 800f564:	d134      	bne.n	800f5d0 <vTaskPriorityDisinheritAfterTimeout+0x124>
+					{
+						if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+ 800f566:	69bb      	ldr	r3, [r7, #24]
+ 800f568:	3304      	adds	r3, #4
+ 800f56a:	4618      	mov	r0, r3
+ 800f56c:	f7fd ffd4 	bl	800d518 <uxListRemove>
+ 800f570:	4603      	mov	r3, r0
+ 800f572:	2b00      	cmp	r3, #0
+ 800f574:	d115      	bne.n	800f5a2 <vTaskPriorityDisinheritAfterTimeout+0xf6>
+						{
+							taskRESET_READY_PRIORITY( pxTCB->uxPriority );
+ 800f576:	69bb      	ldr	r3, [r7, #24]
+ 800f578:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800f57a:	4918      	ldr	r1, [pc, #96]	; (800f5dc <vTaskPriorityDisinheritAfterTimeout+0x130>)
+ 800f57c:	4613      	mov	r3, r2
+ 800f57e:	009b      	lsls	r3, r3, #2
+ 800f580:	4413      	add	r3, r2
+ 800f582:	009b      	lsls	r3, r3, #2
+ 800f584:	440b      	add	r3, r1
+ 800f586:	681b      	ldr	r3, [r3, #0]
+ 800f588:	2b00      	cmp	r3, #0
+ 800f58a:	d10a      	bne.n	800f5a2 <vTaskPriorityDisinheritAfterTimeout+0xf6>
+ 800f58c:	69bb      	ldr	r3, [r7, #24]
+ 800f58e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f590:	2201      	movs	r2, #1
+ 800f592:	fa02 f303 	lsl.w	r3, r2, r3
+ 800f596:	43da      	mvns	r2, r3
+ 800f598:	4b11      	ldr	r3, [pc, #68]	; (800f5e0 <vTaskPriorityDisinheritAfterTimeout+0x134>)
+ 800f59a:	681b      	ldr	r3, [r3, #0]
+ 800f59c:	4013      	ands	r3, r2
+ 800f59e:	4a10      	ldr	r2, [pc, #64]	; (800f5e0 <vTaskPriorityDisinheritAfterTimeout+0x134>)
+ 800f5a0:	6013      	str	r3, [r2, #0]
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+
+						prvAddTaskToReadyList( pxTCB );
+ 800f5a2:	69bb      	ldr	r3, [r7, #24]
+ 800f5a4:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f5a6:	2201      	movs	r2, #1
+ 800f5a8:	409a      	lsls	r2, r3
+ 800f5aa:	4b0d      	ldr	r3, [pc, #52]	; (800f5e0 <vTaskPriorityDisinheritAfterTimeout+0x134>)
+ 800f5ac:	681b      	ldr	r3, [r3, #0]
+ 800f5ae:	4313      	orrs	r3, r2
+ 800f5b0:	4a0b      	ldr	r2, [pc, #44]	; (800f5e0 <vTaskPriorityDisinheritAfterTimeout+0x134>)
+ 800f5b2:	6013      	str	r3, [r2, #0]
+ 800f5b4:	69bb      	ldr	r3, [r7, #24]
+ 800f5b6:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800f5b8:	4613      	mov	r3, r2
+ 800f5ba:	009b      	lsls	r3, r3, #2
+ 800f5bc:	4413      	add	r3, r2
+ 800f5be:	009b      	lsls	r3, r3, #2
+ 800f5c0:	4a06      	ldr	r2, [pc, #24]	; (800f5dc <vTaskPriorityDisinheritAfterTimeout+0x130>)
+ 800f5c2:	441a      	add	r2, r3
+ 800f5c4:	69bb      	ldr	r3, [r7, #24]
+ 800f5c6:	3304      	adds	r3, #4
+ 800f5c8:	4619      	mov	r1, r3
+ 800f5ca:	4610      	mov	r0, r2
+ 800f5cc:	f7fd ff47 	bl	800d45e <vListInsertEnd>
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+ 800f5d0:	bf00      	nop
+ 800f5d2:	3720      	adds	r7, #32
+ 800f5d4:	46bd      	mov	sp, r7
+ 800f5d6:	bd80      	pop	{r7, pc}
+ 800f5d8:	20000578 	.word	0x20000578
+ 800f5dc:	2000057c 	.word	0x2000057c
+ 800f5e0:	20000680 	.word	0x20000680
+
+0800f5e4 <pvTaskIncrementMutexHeldCount>:
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_MUTEXES == 1 )
+
+	TaskHandle_t pvTaskIncrementMutexHeldCount( void )
+	{
+ 800f5e4:	b480      	push	{r7}
+ 800f5e6:	af00      	add	r7, sp, #0
+		/* If xSemaphoreCreateMutex() is called before any tasks have been created
+		then pxCurrentTCB will be NULL. */
+		if( pxCurrentTCB != NULL )
+ 800f5e8:	4b07      	ldr	r3, [pc, #28]	; (800f608 <pvTaskIncrementMutexHeldCount+0x24>)
+ 800f5ea:	681b      	ldr	r3, [r3, #0]
+ 800f5ec:	2b00      	cmp	r3, #0
+ 800f5ee:	d004      	beq.n	800f5fa <pvTaskIncrementMutexHeldCount+0x16>
+		{
+			( pxCurrentTCB->uxMutexesHeld )++;
+ 800f5f0:	4b05      	ldr	r3, [pc, #20]	; (800f608 <pvTaskIncrementMutexHeldCount+0x24>)
+ 800f5f2:	681b      	ldr	r3, [r3, #0]
+ 800f5f4:	6c9a      	ldr	r2, [r3, #72]	; 0x48
+ 800f5f6:	3201      	adds	r2, #1
+ 800f5f8:	649a      	str	r2, [r3, #72]	; 0x48
+		}
+
+		return pxCurrentTCB;
+ 800f5fa:	4b03      	ldr	r3, [pc, #12]	; (800f608 <pvTaskIncrementMutexHeldCount+0x24>)
+ 800f5fc:	681b      	ldr	r3, [r3, #0]
+	}
+ 800f5fe:	4618      	mov	r0, r3
+ 800f600:	46bd      	mov	sp, r7
+ 800f602:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800f606:	4770      	bx	lr
+ 800f608:	20000578 	.word	0x20000578
+
+0800f60c <prvAddCurrentTaskToDelayedList>:
+	}
+#endif
+/*-----------------------------------------------------------*/
+
+static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
+{
+ 800f60c:	b580      	push	{r7, lr}
+ 800f60e:	b084      	sub	sp, #16
+ 800f610:	af00      	add	r7, sp, #0
+ 800f612:	6078      	str	r0, [r7, #4]
+ 800f614:	6039      	str	r1, [r7, #0]
+TickType_t xTimeToWake;
+const TickType_t xConstTickCount = xTickCount;
+ 800f616:	4b29      	ldr	r3, [pc, #164]	; (800f6bc <prvAddCurrentTaskToDelayedList+0xb0>)
+ 800f618:	681b      	ldr	r3, [r3, #0]
+ 800f61a:	60fb      	str	r3, [r7, #12]
+	}
+	#endif
+
+	/* Remove the task from the ready list before adding it to the blocked list
+	as the same list item is used for both lists. */
+	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+ 800f61c:	4b28      	ldr	r3, [pc, #160]	; (800f6c0 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 800f61e:	681b      	ldr	r3, [r3, #0]
+ 800f620:	3304      	adds	r3, #4
+ 800f622:	4618      	mov	r0, r3
+ 800f624:	f7fd ff78 	bl	800d518 <uxListRemove>
+ 800f628:	4603      	mov	r3, r0
+ 800f62a:	2b00      	cmp	r3, #0
+ 800f62c:	d10b      	bne.n	800f646 <prvAddCurrentTaskToDelayedList+0x3a>
+	{
+		/* The current task must be in a ready list, so there is no need to
+		check, and the port reset macro can be called directly. */
+		portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority ); /*lint !e931 pxCurrentTCB cannot change as it is the calling task.  pxCurrentTCB->uxPriority and uxTopReadyPriority cannot change as called with scheduler suspended or in a critical section. */
+ 800f62e:	4b24      	ldr	r3, [pc, #144]	; (800f6c0 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 800f630:	681b      	ldr	r3, [r3, #0]
+ 800f632:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800f634:	2201      	movs	r2, #1
+ 800f636:	fa02 f303 	lsl.w	r3, r2, r3
+ 800f63a:	43da      	mvns	r2, r3
+ 800f63c:	4b21      	ldr	r3, [pc, #132]	; (800f6c4 <prvAddCurrentTaskToDelayedList+0xb8>)
+ 800f63e:	681b      	ldr	r3, [r3, #0]
+ 800f640:	4013      	ands	r3, r2
+ 800f642:	4a20      	ldr	r2, [pc, #128]	; (800f6c4 <prvAddCurrentTaskToDelayedList+0xb8>)
+ 800f644:	6013      	str	r3, [r2, #0]
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	#if ( INCLUDE_vTaskSuspend == 1 )
+	{
+		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
+ 800f646:	687b      	ldr	r3, [r7, #4]
+ 800f648:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800f64c:	d10a      	bne.n	800f664 <prvAddCurrentTaskToDelayedList+0x58>
+ 800f64e:	683b      	ldr	r3, [r7, #0]
+ 800f650:	2b00      	cmp	r3, #0
+ 800f652:	d007      	beq.n	800f664 <prvAddCurrentTaskToDelayedList+0x58>
+		{
+			/* Add the task to the suspended task list instead of a delayed task
+			list to ensure it is not woken by a timing event.  It will block
+			indefinitely. */
+			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
+ 800f654:	4b1a      	ldr	r3, [pc, #104]	; (800f6c0 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 800f656:	681b      	ldr	r3, [r3, #0]
+ 800f658:	3304      	adds	r3, #4
+ 800f65a:	4619      	mov	r1, r3
+ 800f65c:	481a      	ldr	r0, [pc, #104]	; (800f6c8 <prvAddCurrentTaskToDelayedList+0xbc>)
+ 800f65e:	f7fd fefe 	bl	800d45e <vListInsertEnd>
+
+		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
+		( void ) xCanBlockIndefinitely;
+	}
+	#endif /* INCLUDE_vTaskSuspend */
+}
+ 800f662:	e026      	b.n	800f6b2 <prvAddCurrentTaskToDelayedList+0xa6>
+			xTimeToWake = xConstTickCount + xTicksToWait;
+ 800f664:	68fa      	ldr	r2, [r7, #12]
+ 800f666:	687b      	ldr	r3, [r7, #4]
+ 800f668:	4413      	add	r3, r2
+ 800f66a:	60bb      	str	r3, [r7, #8]
+			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
+ 800f66c:	4b14      	ldr	r3, [pc, #80]	; (800f6c0 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 800f66e:	681b      	ldr	r3, [r3, #0]
+ 800f670:	68ba      	ldr	r2, [r7, #8]
+ 800f672:	605a      	str	r2, [r3, #4]
+			if( xTimeToWake < xConstTickCount )
+ 800f674:	68ba      	ldr	r2, [r7, #8]
+ 800f676:	68fb      	ldr	r3, [r7, #12]
+ 800f678:	429a      	cmp	r2, r3
+ 800f67a:	d209      	bcs.n	800f690 <prvAddCurrentTaskToDelayedList+0x84>
+				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+ 800f67c:	4b13      	ldr	r3, [pc, #76]	; (800f6cc <prvAddCurrentTaskToDelayedList+0xc0>)
+ 800f67e:	681a      	ldr	r2, [r3, #0]
+ 800f680:	4b0f      	ldr	r3, [pc, #60]	; (800f6c0 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 800f682:	681b      	ldr	r3, [r3, #0]
+ 800f684:	3304      	adds	r3, #4
+ 800f686:	4619      	mov	r1, r3
+ 800f688:	4610      	mov	r0, r2
+ 800f68a:	f7fd ff0c 	bl	800d4a6 <vListInsert>
+}
+ 800f68e:	e010      	b.n	800f6b2 <prvAddCurrentTaskToDelayedList+0xa6>
+				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+ 800f690:	4b0f      	ldr	r3, [pc, #60]	; (800f6d0 <prvAddCurrentTaskToDelayedList+0xc4>)
+ 800f692:	681a      	ldr	r2, [r3, #0]
+ 800f694:	4b0a      	ldr	r3, [pc, #40]	; (800f6c0 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 800f696:	681b      	ldr	r3, [r3, #0]
+ 800f698:	3304      	adds	r3, #4
+ 800f69a:	4619      	mov	r1, r3
+ 800f69c:	4610      	mov	r0, r2
+ 800f69e:	f7fd ff02 	bl	800d4a6 <vListInsert>
+				if( xTimeToWake < xNextTaskUnblockTime )
+ 800f6a2:	4b0c      	ldr	r3, [pc, #48]	; (800f6d4 <prvAddCurrentTaskToDelayedList+0xc8>)
+ 800f6a4:	681b      	ldr	r3, [r3, #0]
+ 800f6a6:	68ba      	ldr	r2, [r7, #8]
+ 800f6a8:	429a      	cmp	r2, r3
+ 800f6aa:	d202      	bcs.n	800f6b2 <prvAddCurrentTaskToDelayedList+0xa6>
+					xNextTaskUnblockTime = xTimeToWake;
+ 800f6ac:	4a09      	ldr	r2, [pc, #36]	; (800f6d4 <prvAddCurrentTaskToDelayedList+0xc8>)
+ 800f6ae:	68bb      	ldr	r3, [r7, #8]
+ 800f6b0:	6013      	str	r3, [r2, #0]
+}
+ 800f6b2:	bf00      	nop
+ 800f6b4:	3710      	adds	r7, #16
+ 800f6b6:	46bd      	mov	sp, r7
+ 800f6b8:	bd80      	pop	{r7, pc}
+ 800f6ba:	bf00      	nop
+ 800f6bc:	2000067c 	.word	0x2000067c
+ 800f6c0:	20000578 	.word	0x20000578
+ 800f6c4:	20000680 	.word	0x20000680
+ 800f6c8:	20000664 	.word	0x20000664
+ 800f6cc:	20000634 	.word	0x20000634
+ 800f6d0:	20000630 	.word	0x20000630
+ 800f6d4:	20000698 	.word	0x20000698
+
+0800f6d8 <pxPortInitialiseStack>:
+
+/*
+ * See header file for description.
+ */
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
+{
+ 800f6d8:	b480      	push	{r7}
+ 800f6da:	b085      	sub	sp, #20
+ 800f6dc:	af00      	add	r7, sp, #0
+ 800f6de:	60f8      	str	r0, [r7, #12]
+ 800f6e0:	60b9      	str	r1, [r7, #8]
+ 800f6e2:	607a      	str	r2, [r7, #4]
+	/* Simulate the stack frame as it would be created by a context switch
+	interrupt. */
+
+	/* Offset added to account for the way the MCU uses the stack on entry/exit
+	of interrupts, and to ensure alignment. */
+	pxTopOfStack--;
+ 800f6e4:	68fb      	ldr	r3, [r7, #12]
+ 800f6e6:	3b04      	subs	r3, #4
+ 800f6e8:	60fb      	str	r3, [r7, #12]
+
+	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
+ 800f6ea:	68fb      	ldr	r3, [r7, #12]
+ 800f6ec:	f04f 7280 	mov.w	r2, #16777216	; 0x1000000
+ 800f6f0:	601a      	str	r2, [r3, #0]
+	pxTopOfStack--;
+ 800f6f2:	68fb      	ldr	r3, [r7, #12]
+ 800f6f4:	3b04      	subs	r3, #4
+ 800f6f6:	60fb      	str	r3, [r7, #12]
+	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
+ 800f6f8:	68bb      	ldr	r3, [r7, #8]
+ 800f6fa:	f023 0201 	bic.w	r2, r3, #1
+ 800f6fe:	68fb      	ldr	r3, [r7, #12]
+ 800f700:	601a      	str	r2, [r3, #0]
+	pxTopOfStack--;
+ 800f702:	68fb      	ldr	r3, [r7, #12]
+ 800f704:	3b04      	subs	r3, #4
+ 800f706:	60fb      	str	r3, [r7, #12]
+	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
+ 800f708:	4a0c      	ldr	r2, [pc, #48]	; (800f73c <pxPortInitialiseStack+0x64>)
+ 800f70a:	68fb      	ldr	r3, [r7, #12]
+ 800f70c:	601a      	str	r2, [r3, #0]
+
+	/* Save code space by skipping register initialisation. */
+	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
+ 800f70e:	68fb      	ldr	r3, [r7, #12]
+ 800f710:	3b14      	subs	r3, #20
+ 800f712:	60fb      	str	r3, [r7, #12]
+	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
+ 800f714:	687a      	ldr	r2, [r7, #4]
+ 800f716:	68fb      	ldr	r3, [r7, #12]
+ 800f718:	601a      	str	r2, [r3, #0]
+
+	/* A save method is being used that requires each task to maintain its
+	own exec return value. */
+	pxTopOfStack--;
+ 800f71a:	68fb      	ldr	r3, [r7, #12]
+ 800f71c:	3b04      	subs	r3, #4
+ 800f71e:	60fb      	str	r3, [r7, #12]
+	*pxTopOfStack = portINITIAL_EXC_RETURN;
+ 800f720:	68fb      	ldr	r3, [r7, #12]
+ 800f722:	f06f 0202 	mvn.w	r2, #2
+ 800f726:	601a      	str	r2, [r3, #0]
+
+	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+ 800f728:	68fb      	ldr	r3, [r7, #12]
+ 800f72a:	3b20      	subs	r3, #32
+ 800f72c:	60fb      	str	r3, [r7, #12]
+
+	return pxTopOfStack;
+ 800f72e:	68fb      	ldr	r3, [r7, #12]
+}
+ 800f730:	4618      	mov	r0, r3
+ 800f732:	3714      	adds	r7, #20
+ 800f734:	46bd      	mov	sp, r7
+ 800f736:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800f73a:	4770      	bx	lr
+ 800f73c:	0800f741 	.word	0x0800f741
+
+0800f740 <prvTaskExitError>:
+/*-----------------------------------------------------------*/
+
+static void prvTaskExitError( void )
+{
+ 800f740:	b480      	push	{r7}
+ 800f742:	b085      	sub	sp, #20
+ 800f744:	af00      	add	r7, sp, #0
+volatile uint32_t ulDummy = 0;
+ 800f746:	2300      	movs	r3, #0
+ 800f748:	607b      	str	r3, [r7, #4]
+	its caller as there is nothing to return to.  If a task wants to exit it
+	should instead call vTaskDelete( NULL ).
+
+	Artificially force an assert() to be triggered if configASSERT() is
+	defined, then stop here so application writers can catch the error. */
+	configASSERT( uxCriticalNesting == ~0UL );
+ 800f74a:	4b13      	ldr	r3, [pc, #76]	; (800f798 <prvTaskExitError+0x58>)
+ 800f74c:	681b      	ldr	r3, [r3, #0]
+ 800f74e:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800f752:	d00b      	beq.n	800f76c <prvTaskExitError+0x2c>
+ 800f754:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f758:	b672      	cpsid	i
+ 800f75a:	f383 8811 	msr	BASEPRI, r3
+ 800f75e:	f3bf 8f6f 	isb	sy
+ 800f762:	f3bf 8f4f 	dsb	sy
+ 800f766:	b662      	cpsie	i
+ 800f768:	60fb      	str	r3, [r7, #12]
+ 800f76a:	e7fe      	b.n	800f76a <prvTaskExitError+0x2a>
+ 800f76c:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f770:	b672      	cpsid	i
+ 800f772:	f383 8811 	msr	BASEPRI, r3
+ 800f776:	f3bf 8f6f 	isb	sy
+ 800f77a:	f3bf 8f4f 	dsb	sy
+ 800f77e:	b662      	cpsie	i
+ 800f780:	60bb      	str	r3, [r7, #8]
+	portDISABLE_INTERRUPTS();
+	while( ulDummy == 0 )
+ 800f782:	bf00      	nop
+ 800f784:	687b      	ldr	r3, [r7, #4]
+ 800f786:	2b00      	cmp	r3, #0
+ 800f788:	d0fc      	beq.n	800f784 <prvTaskExitError+0x44>
+		about code appearing after this function is called - making ulDummy
+		volatile makes the compiler think the function could return and
+		therefore not output an 'unreachable code' warning for code that appears
+		after it. */
+	}
+}
+ 800f78a:	bf00      	nop
+ 800f78c:	3714      	adds	r7, #20
+ 800f78e:	46bd      	mov	sp, r7
+ 800f790:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800f794:	4770      	bx	lr
+ 800f796:	bf00      	nop
+ 800f798:	2000005c 	.word	0x2000005c
+ 800f79c:	00000000 	.word	0x00000000
+
+0800f7a0 <SVC_Handler>:
+/*-----------------------------------------------------------*/
+
+void vPortSVCHandler( void )
+{
+	__asm volatile (
+ 800f7a0:	4b07      	ldr	r3, [pc, #28]	; (800f7c0 <pxCurrentTCBConst2>)
+ 800f7a2:	6819      	ldr	r1, [r3, #0]
+ 800f7a4:	6808      	ldr	r0, [r1, #0]
+ 800f7a6:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 800f7aa:	f380 8809 	msr	PSP, r0
+ 800f7ae:	f3bf 8f6f 	isb	sy
+ 800f7b2:	f04f 0000 	mov.w	r0, #0
+ 800f7b6:	f380 8811 	msr	BASEPRI, r0
+ 800f7ba:	4770      	bx	lr
+ 800f7bc:	f3af 8000 	nop.w
+
+0800f7c0 <pxCurrentTCBConst2>:
+ 800f7c0:	20000578 	.word	0x20000578
+					"	bx r14							\n"
+					"									\n"
+					"	.align 4						\n"
+					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+				);
+}
+ 800f7c4:	bf00      	nop
+ 800f7c6:	bf00      	nop
+
+0800f7c8 <prvPortStartFirstTask>:
+{
+	/* Start the first task.  This also clears the bit that indicates the FPU is
+	in use in case the FPU was used before the scheduler was started - which
+	would otherwise result in the unnecessary leaving of space in the SVC stack
+	for lazy saving of FPU registers. */
+	__asm volatile(
+ 800f7c8:	4808      	ldr	r0, [pc, #32]	; (800f7ec <prvPortStartFirstTask+0x24>)
+ 800f7ca:	6800      	ldr	r0, [r0, #0]
+ 800f7cc:	6800      	ldr	r0, [r0, #0]
+ 800f7ce:	f380 8808 	msr	MSP, r0
+ 800f7d2:	f04f 0000 	mov.w	r0, #0
+ 800f7d6:	f380 8814 	msr	CONTROL, r0
+ 800f7da:	b662      	cpsie	i
+ 800f7dc:	b661      	cpsie	f
+ 800f7de:	f3bf 8f4f 	dsb	sy
+ 800f7e2:	f3bf 8f6f 	isb	sy
+ 800f7e6:	df00      	svc	0
+ 800f7e8:	bf00      	nop
+					" dsb					\n"
+					" isb					\n"
+					" svc 0					\n" /* System call to start first task. */
+					" nop					\n"
+				);
+}
+ 800f7ea:	bf00      	nop
+ 800f7ec:	e000ed08 	.word	0xe000ed08
+
+0800f7f0 <xPortStartScheduler>:
+
+/*
+ * See header file for description.
+ */
+BaseType_t xPortStartScheduler( void )
+{
+ 800f7f0:	b580      	push	{r7, lr}
+ 800f7f2:	b084      	sub	sp, #16
+ 800f7f4:	af00      	add	r7, sp, #0
+	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
+
+	#if( configASSERT_DEFINED == 1 )
+	{
+		volatile uint32_t ulOriginalPriority;
+		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
+ 800f7f6:	4b36      	ldr	r3, [pc, #216]	; (800f8d0 <xPortStartScheduler+0xe0>)
+ 800f7f8:	60fb      	str	r3, [r7, #12]
+		functions can be called.  ISR safe functions are those that end in
+		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
+		ensure interrupt entry is as fast and simple as possible.
+
+		Save the interrupt priority value that is about to be clobbered. */
+		ulOriginalPriority = *pucFirstUserPriorityRegister;
+ 800f7fa:	68fb      	ldr	r3, [r7, #12]
+ 800f7fc:	781b      	ldrb	r3, [r3, #0]
+ 800f7fe:	b2db      	uxtb	r3, r3
+ 800f800:	607b      	str	r3, [r7, #4]
+
+		/* Determine the number of priority bits available.  First write to all
+		possible bits. */
+		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
+ 800f802:	68fb      	ldr	r3, [r7, #12]
+ 800f804:	22ff      	movs	r2, #255	; 0xff
+ 800f806:	701a      	strb	r2, [r3, #0]
+
+		/* Read the value back to see how many bits stuck. */
+		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
+ 800f808:	68fb      	ldr	r3, [r7, #12]
+ 800f80a:	781b      	ldrb	r3, [r3, #0]
+ 800f80c:	b2db      	uxtb	r3, r3
+ 800f80e:	70fb      	strb	r3, [r7, #3]
+
+		/* Use the same mask on the maximum system call priority. */
+		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
+ 800f810:	78fb      	ldrb	r3, [r7, #3]
+ 800f812:	b2db      	uxtb	r3, r3
+ 800f814:	f003 0350 	and.w	r3, r3, #80	; 0x50
+ 800f818:	b2da      	uxtb	r2, r3
+ 800f81a:	4b2e      	ldr	r3, [pc, #184]	; (800f8d4 <xPortStartScheduler+0xe4>)
+ 800f81c:	701a      	strb	r2, [r3, #0]
+
+		/* Calculate the maximum acceptable priority group value for the number
+		of bits read back. */
+		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
+ 800f81e:	4b2e      	ldr	r3, [pc, #184]	; (800f8d8 <xPortStartScheduler+0xe8>)
+ 800f820:	2207      	movs	r2, #7
+ 800f822:	601a      	str	r2, [r3, #0]
+		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+ 800f824:	e009      	b.n	800f83a <xPortStartScheduler+0x4a>
+		{
+			ulMaxPRIGROUPValue--;
+ 800f826:	4b2c      	ldr	r3, [pc, #176]	; (800f8d8 <xPortStartScheduler+0xe8>)
+ 800f828:	681b      	ldr	r3, [r3, #0]
+ 800f82a:	3b01      	subs	r3, #1
+ 800f82c:	4a2a      	ldr	r2, [pc, #168]	; (800f8d8 <xPortStartScheduler+0xe8>)
+ 800f82e:	6013      	str	r3, [r2, #0]
+			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
+ 800f830:	78fb      	ldrb	r3, [r7, #3]
+ 800f832:	b2db      	uxtb	r3, r3
+ 800f834:	005b      	lsls	r3, r3, #1
+ 800f836:	b2db      	uxtb	r3, r3
+ 800f838:	70fb      	strb	r3, [r7, #3]
+		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
+ 800f83a:	78fb      	ldrb	r3, [r7, #3]
+ 800f83c:	b2db      	uxtb	r3, r3
+ 800f83e:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 800f842:	2b80      	cmp	r3, #128	; 0x80
+ 800f844:	d0ef      	beq.n	800f826 <xPortStartScheduler+0x36>
+		#ifdef configPRIO_BITS
+		{
+			/* Check the FreeRTOS configuration that defines the number of
+			priority bits matches the number of priority bits actually queried
+			from the hardware. */
+			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+ 800f846:	4b24      	ldr	r3, [pc, #144]	; (800f8d8 <xPortStartScheduler+0xe8>)
+ 800f848:	681b      	ldr	r3, [r3, #0]
+ 800f84a:	f1c3 0307 	rsb	r3, r3, #7
+ 800f84e:	2b04      	cmp	r3, #4
+ 800f850:	d00b      	beq.n	800f86a <xPortStartScheduler+0x7a>
+ 800f852:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f856:	b672      	cpsid	i
+ 800f858:	f383 8811 	msr	BASEPRI, r3
+ 800f85c:	f3bf 8f6f 	isb	sy
+ 800f860:	f3bf 8f4f 	dsb	sy
+ 800f864:	b662      	cpsie	i
+ 800f866:	60bb      	str	r3, [r7, #8]
+ 800f868:	e7fe      	b.n	800f868 <xPortStartScheduler+0x78>
+		}
+		#endif
+
+		/* Shift the priority group value back to its position within the AIRCR
+		register. */
+		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
+ 800f86a:	4b1b      	ldr	r3, [pc, #108]	; (800f8d8 <xPortStartScheduler+0xe8>)
+ 800f86c:	681b      	ldr	r3, [r3, #0]
+ 800f86e:	021b      	lsls	r3, r3, #8
+ 800f870:	4a19      	ldr	r2, [pc, #100]	; (800f8d8 <xPortStartScheduler+0xe8>)
+ 800f872:	6013      	str	r3, [r2, #0]
+		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
+ 800f874:	4b18      	ldr	r3, [pc, #96]	; (800f8d8 <xPortStartScheduler+0xe8>)
+ 800f876:	681b      	ldr	r3, [r3, #0]
+ 800f878:	f403 63e0 	and.w	r3, r3, #1792	; 0x700
+ 800f87c:	4a16      	ldr	r2, [pc, #88]	; (800f8d8 <xPortStartScheduler+0xe8>)
+ 800f87e:	6013      	str	r3, [r2, #0]
+
+		/* Restore the clobbered interrupt priority register to its original
+		value. */
+		*pucFirstUserPriorityRegister = ulOriginalPriority;
+ 800f880:	687b      	ldr	r3, [r7, #4]
+ 800f882:	b2da      	uxtb	r2, r3
+ 800f884:	68fb      	ldr	r3, [r7, #12]
+ 800f886:	701a      	strb	r2, [r3, #0]
+	}
+	#endif /* conifgASSERT_DEFINED */
+
+	/* Make PendSV and SysTick the lowest priority interrupts. */
+	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
+ 800f888:	4b14      	ldr	r3, [pc, #80]	; (800f8dc <xPortStartScheduler+0xec>)
+ 800f88a:	681b      	ldr	r3, [r3, #0]
+ 800f88c:	4a13      	ldr	r2, [pc, #76]	; (800f8dc <xPortStartScheduler+0xec>)
+ 800f88e:	f443 0370 	orr.w	r3, r3, #15728640	; 0xf00000
+ 800f892:	6013      	str	r3, [r2, #0]
+	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
+ 800f894:	4b11      	ldr	r3, [pc, #68]	; (800f8dc <xPortStartScheduler+0xec>)
+ 800f896:	681b      	ldr	r3, [r3, #0]
+ 800f898:	4a10      	ldr	r2, [pc, #64]	; (800f8dc <xPortStartScheduler+0xec>)
+ 800f89a:	f043 4370 	orr.w	r3, r3, #4026531840	; 0xf0000000
+ 800f89e:	6013      	str	r3, [r2, #0]
+
+	/* Start the timer that generates the tick ISR.  Interrupts are disabled
+	here already. */
+	vPortSetupTimerInterrupt();
+ 800f8a0:	f000 f8d4 	bl	800fa4c <vPortSetupTimerInterrupt>
+
+	/* Initialise the critical nesting count ready for the first task. */
+	uxCriticalNesting = 0;
+ 800f8a4:	4b0e      	ldr	r3, [pc, #56]	; (800f8e0 <xPortStartScheduler+0xf0>)
+ 800f8a6:	2200      	movs	r2, #0
+ 800f8a8:	601a      	str	r2, [r3, #0]
+
+	/* Ensure the VFP is enabled - it should be anyway. */
+	vPortEnableVFP();
+ 800f8aa:	f000 f8f3 	bl	800fa94 <vPortEnableVFP>
+
+	/* Lazy save always. */
+	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
+ 800f8ae:	4b0d      	ldr	r3, [pc, #52]	; (800f8e4 <xPortStartScheduler+0xf4>)
+ 800f8b0:	681b      	ldr	r3, [r3, #0]
+ 800f8b2:	4a0c      	ldr	r2, [pc, #48]	; (800f8e4 <xPortStartScheduler+0xf4>)
+ 800f8b4:	f043 4340 	orr.w	r3, r3, #3221225472	; 0xc0000000
+ 800f8b8:	6013      	str	r3, [r2, #0]
+
+	/* Start the first task. */
+	prvPortStartFirstTask();
+ 800f8ba:	f7ff ff85 	bl	800f7c8 <prvPortStartFirstTask>
+	exit error function to prevent compiler warnings about a static function
+	not being called in the case that the application writer overrides this
+	functionality by defining configTASK_RETURN_ADDRESS.  Call
+	vTaskSwitchContext() so link time optimisation does not remove the
+	symbol. */
+	vTaskSwitchContext();
+ 800f8be:	f7ff fa67 	bl	800ed90 <vTaskSwitchContext>
+	prvTaskExitError();
+ 800f8c2:	f7ff ff3d 	bl	800f740 <prvTaskExitError>
+
+	/* Should not get here! */
+	return 0;
+ 800f8c6:	2300      	movs	r3, #0
+}
+ 800f8c8:	4618      	mov	r0, r3
+ 800f8ca:	3710      	adds	r7, #16
+ 800f8cc:	46bd      	mov	sp, r7
+ 800f8ce:	bd80      	pop	{r7, pc}
+ 800f8d0:	e000e400 	.word	0xe000e400
+ 800f8d4:	200006a4 	.word	0x200006a4
+ 800f8d8:	200006a8 	.word	0x200006a8
+ 800f8dc:	e000ed20 	.word	0xe000ed20
+ 800f8e0:	2000005c 	.word	0x2000005c
+ 800f8e4:	e000ef34 	.word	0xe000ef34
+
+0800f8e8 <vPortEnterCritical>:
+	configASSERT( uxCriticalNesting == 1000UL );
+}
+/*-----------------------------------------------------------*/
+
+void vPortEnterCritical( void )
+{
+ 800f8e8:	b480      	push	{r7}
+ 800f8ea:	b083      	sub	sp, #12
+ 800f8ec:	af00      	add	r7, sp, #0
+ 800f8ee:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f8f2:	b672      	cpsid	i
+ 800f8f4:	f383 8811 	msr	BASEPRI, r3
+ 800f8f8:	f3bf 8f6f 	isb	sy
+ 800f8fc:	f3bf 8f4f 	dsb	sy
+ 800f900:	b662      	cpsie	i
+ 800f902:	607b      	str	r3, [r7, #4]
+	portDISABLE_INTERRUPTS();
+	uxCriticalNesting++;
+ 800f904:	4b0f      	ldr	r3, [pc, #60]	; (800f944 <vPortEnterCritical+0x5c>)
+ 800f906:	681b      	ldr	r3, [r3, #0]
+ 800f908:	3301      	adds	r3, #1
+ 800f90a:	4a0e      	ldr	r2, [pc, #56]	; (800f944 <vPortEnterCritical+0x5c>)
+ 800f90c:	6013      	str	r3, [r2, #0]
+	/* This is not the interrupt safe version of the enter critical function so
+	assert() if it is being called from an interrupt context.  Only API
+	functions that end in "FromISR" can be used in an interrupt.  Only assert if
+	the critical nesting count is 1 to protect against recursive calls if the
+	assert function also uses a critical section. */
+	if( uxCriticalNesting == 1 )
+ 800f90e:	4b0d      	ldr	r3, [pc, #52]	; (800f944 <vPortEnterCritical+0x5c>)
+ 800f910:	681b      	ldr	r3, [r3, #0]
+ 800f912:	2b01      	cmp	r3, #1
+ 800f914:	d110      	bne.n	800f938 <vPortEnterCritical+0x50>
+	{
+		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+ 800f916:	4b0c      	ldr	r3, [pc, #48]	; (800f948 <vPortEnterCritical+0x60>)
+ 800f918:	681b      	ldr	r3, [r3, #0]
+ 800f91a:	b2db      	uxtb	r3, r3
+ 800f91c:	2b00      	cmp	r3, #0
+ 800f91e:	d00b      	beq.n	800f938 <vPortEnterCritical+0x50>
+ 800f920:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f924:	b672      	cpsid	i
+ 800f926:	f383 8811 	msr	BASEPRI, r3
+ 800f92a:	f3bf 8f6f 	isb	sy
+ 800f92e:	f3bf 8f4f 	dsb	sy
+ 800f932:	b662      	cpsie	i
+ 800f934:	603b      	str	r3, [r7, #0]
+ 800f936:	e7fe      	b.n	800f936 <vPortEnterCritical+0x4e>
+	}
+}
+ 800f938:	bf00      	nop
+ 800f93a:	370c      	adds	r7, #12
+ 800f93c:	46bd      	mov	sp, r7
+ 800f93e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800f942:	4770      	bx	lr
+ 800f944:	2000005c 	.word	0x2000005c
+ 800f948:	e000ed04 	.word	0xe000ed04
+
+0800f94c <vPortExitCritical>:
+/*-----------------------------------------------------------*/
+
+void vPortExitCritical( void )
+{
+ 800f94c:	b480      	push	{r7}
+ 800f94e:	b083      	sub	sp, #12
+ 800f950:	af00      	add	r7, sp, #0
+	configASSERT( uxCriticalNesting );
+ 800f952:	4b12      	ldr	r3, [pc, #72]	; (800f99c <vPortExitCritical+0x50>)
+ 800f954:	681b      	ldr	r3, [r3, #0]
+ 800f956:	2b00      	cmp	r3, #0
+ 800f958:	d10b      	bne.n	800f972 <vPortExitCritical+0x26>
+ 800f95a:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800f95e:	b672      	cpsid	i
+ 800f960:	f383 8811 	msr	BASEPRI, r3
+ 800f964:	f3bf 8f6f 	isb	sy
+ 800f968:	f3bf 8f4f 	dsb	sy
+ 800f96c:	b662      	cpsie	i
+ 800f96e:	607b      	str	r3, [r7, #4]
+ 800f970:	e7fe      	b.n	800f970 <vPortExitCritical+0x24>
+	uxCriticalNesting--;
+ 800f972:	4b0a      	ldr	r3, [pc, #40]	; (800f99c <vPortExitCritical+0x50>)
+ 800f974:	681b      	ldr	r3, [r3, #0]
+ 800f976:	3b01      	subs	r3, #1
+ 800f978:	4a08      	ldr	r2, [pc, #32]	; (800f99c <vPortExitCritical+0x50>)
+ 800f97a:	6013      	str	r3, [r2, #0]
+	if( uxCriticalNesting == 0 )
+ 800f97c:	4b07      	ldr	r3, [pc, #28]	; (800f99c <vPortExitCritical+0x50>)
+ 800f97e:	681b      	ldr	r3, [r3, #0]
+ 800f980:	2b00      	cmp	r3, #0
+ 800f982:	d104      	bne.n	800f98e <vPortExitCritical+0x42>
+ 800f984:	2300      	movs	r3, #0
+ 800f986:	603b      	str	r3, [r7, #0]
+	__asm volatile
+ 800f988:	683b      	ldr	r3, [r7, #0]
+ 800f98a:	f383 8811 	msr	BASEPRI, r3
+	{
+		portENABLE_INTERRUPTS();
+	}
+}
+ 800f98e:	bf00      	nop
+ 800f990:	370c      	adds	r7, #12
+ 800f992:	46bd      	mov	sp, r7
+ 800f994:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800f998:	4770      	bx	lr
+ 800f99a:	bf00      	nop
+ 800f99c:	2000005c 	.word	0x2000005c
+
+0800f9a0 <PendSV_Handler>:
+
+void xPortPendSVHandler( void )
+{
+	/* This is a naked function. */
+
+	__asm volatile
+ 800f9a0:	f3ef 8009 	mrs	r0, PSP
+ 800f9a4:	f3bf 8f6f 	isb	sy
+ 800f9a8:	4b15      	ldr	r3, [pc, #84]	; (800fa00 <pxCurrentTCBConst>)
+ 800f9aa:	681a      	ldr	r2, [r3, #0]
+ 800f9ac:	f01e 0f10 	tst.w	lr, #16
+ 800f9b0:	bf08      	it	eq
+ 800f9b2:	ed20 8a10 	vstmdbeq	r0!, {s16-s31}
+ 800f9b6:	e920 4ff0 	stmdb	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 800f9ba:	6010      	str	r0, [r2, #0]
+ 800f9bc:	e92d 0009 	stmdb	sp!, {r0, r3}
+ 800f9c0:	f04f 0050 	mov.w	r0, #80	; 0x50
+ 800f9c4:	b672      	cpsid	i
+ 800f9c6:	f380 8811 	msr	BASEPRI, r0
+ 800f9ca:	f3bf 8f4f 	dsb	sy
+ 800f9ce:	f3bf 8f6f 	isb	sy
+ 800f9d2:	b662      	cpsie	i
+ 800f9d4:	f7ff f9dc 	bl	800ed90 <vTaskSwitchContext>
+ 800f9d8:	f04f 0000 	mov.w	r0, #0
+ 800f9dc:	f380 8811 	msr	BASEPRI, r0
+ 800f9e0:	bc09      	pop	{r0, r3}
+ 800f9e2:	6819      	ldr	r1, [r3, #0]
+ 800f9e4:	6808      	ldr	r0, [r1, #0]
+ 800f9e6:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 800f9ea:	f01e 0f10 	tst.w	lr, #16
+ 800f9ee:	bf08      	it	eq
+ 800f9f0:	ecb0 8a10 	vldmiaeq	r0!, {s16-s31}
+ 800f9f4:	f380 8809 	msr	PSP, r0
+ 800f9f8:	f3bf 8f6f 	isb	sy
+ 800f9fc:	4770      	bx	lr
+ 800f9fe:	bf00      	nop
+
+0800fa00 <pxCurrentTCBConst>:
+ 800fa00:	20000578 	.word	0x20000578
+	"										\n"
+	"	.align 4							\n"
+	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
+	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
+	);
+}
+ 800fa04:	bf00      	nop
+ 800fa06:	bf00      	nop
+
+0800fa08 <SysTick_Handler>:
+/*-----------------------------------------------------------*/
+
+void xPortSysTickHandler( void )
+{
+ 800fa08:	b580      	push	{r7, lr}
+ 800fa0a:	b082      	sub	sp, #8
+ 800fa0c:	af00      	add	r7, sp, #0
+	__asm volatile
+ 800fa0e:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800fa12:	b672      	cpsid	i
+ 800fa14:	f383 8811 	msr	BASEPRI, r3
+ 800fa18:	f3bf 8f6f 	isb	sy
+ 800fa1c:	f3bf 8f4f 	dsb	sy
+ 800fa20:	b662      	cpsie	i
+ 800fa22:	607b      	str	r3, [r7, #4]
+	save and then restore the interrupt mask value as its value is already
+	known. */
+	portDISABLE_INTERRUPTS();
+	{
+		/* Increment the RTOS tick. */
+		if( xTaskIncrementTick() != pdFALSE )
+ 800fa24:	f7ff f8fa 	bl	800ec1c <xTaskIncrementTick>
+ 800fa28:	4603      	mov	r3, r0
+ 800fa2a:	2b00      	cmp	r3, #0
+ 800fa2c:	d003      	beq.n	800fa36 <SysTick_Handler+0x2e>
+		{
+			/* A context switch is required.  Context switching is performed in
+			the PendSV interrupt.  Pend the PendSV interrupt. */
+			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+ 800fa2e:	4b06      	ldr	r3, [pc, #24]	; (800fa48 <SysTick_Handler+0x40>)
+ 800fa30:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
+ 800fa34:	601a      	str	r2, [r3, #0]
+ 800fa36:	2300      	movs	r3, #0
+ 800fa38:	603b      	str	r3, [r7, #0]
+	__asm volatile
+ 800fa3a:	683b      	ldr	r3, [r7, #0]
+ 800fa3c:	f383 8811 	msr	BASEPRI, r3
+		}
+	}
+	portENABLE_INTERRUPTS();
+}
+ 800fa40:	bf00      	nop
+ 800fa42:	3708      	adds	r7, #8
+ 800fa44:	46bd      	mov	sp, r7
+ 800fa46:	bd80      	pop	{r7, pc}
+ 800fa48:	e000ed04 	.word	0xe000ed04
+
+0800fa4c <vPortSetupTimerInterrupt>:
+/*
+ * Setup the systick timer to generate the tick interrupts at the required
+ * frequency.
+ */
+__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
+{
+ 800fa4c:	b480      	push	{r7}
+ 800fa4e:	af00      	add	r7, sp, #0
+		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+	}
+	#endif /* configUSE_TICKLESS_IDLE */
+
+	/* Stop and clear the SysTick. */
+	portNVIC_SYSTICK_CTRL_REG = 0UL;
+ 800fa50:	4b0b      	ldr	r3, [pc, #44]	; (800fa80 <vPortSetupTimerInterrupt+0x34>)
+ 800fa52:	2200      	movs	r2, #0
+ 800fa54:	601a      	str	r2, [r3, #0]
+	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+ 800fa56:	4b0b      	ldr	r3, [pc, #44]	; (800fa84 <vPortSetupTimerInterrupt+0x38>)
+ 800fa58:	2200      	movs	r2, #0
+ 800fa5a:	601a      	str	r2, [r3, #0]
+
+	/* Configure SysTick to interrupt at the requested rate. */
+	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+ 800fa5c:	4b0a      	ldr	r3, [pc, #40]	; (800fa88 <vPortSetupTimerInterrupt+0x3c>)
+ 800fa5e:	681b      	ldr	r3, [r3, #0]
+ 800fa60:	4a0a      	ldr	r2, [pc, #40]	; (800fa8c <vPortSetupTimerInterrupt+0x40>)
+ 800fa62:	fba2 2303 	umull	r2, r3, r2, r3
+ 800fa66:	099b      	lsrs	r3, r3, #6
+ 800fa68:	4a09      	ldr	r2, [pc, #36]	; (800fa90 <vPortSetupTimerInterrupt+0x44>)
+ 800fa6a:	3b01      	subs	r3, #1
+ 800fa6c:	6013      	str	r3, [r2, #0]
+	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
+ 800fa6e:	4b04      	ldr	r3, [pc, #16]	; (800fa80 <vPortSetupTimerInterrupt+0x34>)
+ 800fa70:	2207      	movs	r2, #7
+ 800fa72:	601a      	str	r2, [r3, #0]
+}
+ 800fa74:	bf00      	nop
+ 800fa76:	46bd      	mov	sp, r7
+ 800fa78:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800fa7c:	4770      	bx	lr
+ 800fa7e:	bf00      	nop
+ 800fa80:	e000e010 	.word	0xe000e010
+ 800fa84:	e000e018 	.word	0xe000e018
+ 800fa88:	20000050 	.word	0x20000050
+ 800fa8c:	10624dd3 	.word	0x10624dd3
+ 800fa90:	e000e014 	.word	0xe000e014
+
+0800fa94 <vPortEnableVFP>:
+/*-----------------------------------------------------------*/
+
+/* This is a naked function. */
+static void vPortEnableVFP( void )
+{
+	__asm volatile
+ 800fa94:	f8df 000c 	ldr.w	r0, [pc, #12]	; 800faa4 <vPortEnableVFP+0x10>
+ 800fa98:	6801      	ldr	r1, [r0, #0]
+ 800fa9a:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
+ 800fa9e:	6001      	str	r1, [r0, #0]
+ 800faa0:	4770      	bx	lr
+		"								\n"
+		"	orr r1, r1, #( 0xf << 20 )	\n" /* Enable CP10 and CP11 coprocessors, then save back. */
+		"	str r1, [r0]				\n"
+		"	bx r14						"
+	);
+}
+ 800faa2:	bf00      	nop
+ 800faa4:	e000ed88 	.word	0xe000ed88
+
+0800faa8 <vPortValidateInterruptPriority>:
+/*-----------------------------------------------------------*/
+
+#if( configASSERT_DEFINED == 1 )
+
+	void vPortValidateInterruptPriority( void )
+	{
+ 800faa8:	b480      	push	{r7}
+ 800faaa:	b085      	sub	sp, #20
+ 800faac:	af00      	add	r7, sp, #0
+	uint32_t ulCurrentInterrupt;
+	uint8_t ucCurrentPriority;
+
+		/* Obtain the number of the currently executing interrupt. */
+		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+ 800faae:	f3ef 8305 	mrs	r3, IPSR
+ 800fab2:	60fb      	str	r3, [r7, #12]
+
+		/* Is the interrupt number a user defined interrupt? */
+		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+ 800fab4:	68fb      	ldr	r3, [r7, #12]
+ 800fab6:	2b0f      	cmp	r3, #15
+ 800fab8:	d915      	bls.n	800fae6 <vPortValidateInterruptPriority+0x3e>
+		{
+			/* Look up the interrupt's priority. */
+			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+ 800faba:	4a18      	ldr	r2, [pc, #96]	; (800fb1c <vPortValidateInterruptPriority+0x74>)
+ 800fabc:	68fb      	ldr	r3, [r7, #12]
+ 800fabe:	4413      	add	r3, r2
+ 800fac0:	781b      	ldrb	r3, [r3, #0]
+ 800fac2:	72fb      	strb	r3, [r7, #11]
+			interrupt entry is as fast and simple as possible.
+
+			The following links provide detailed information:
+			http://www.freertos.org/RTOS-Cortex-M3-M4.html
+			http://www.freertos.org/FAQHelp.html */
+			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+ 800fac4:	4b16      	ldr	r3, [pc, #88]	; (800fb20 <vPortValidateInterruptPriority+0x78>)
+ 800fac6:	781b      	ldrb	r3, [r3, #0]
+ 800fac8:	7afa      	ldrb	r2, [r7, #11]
+ 800faca:	429a      	cmp	r2, r3
+ 800facc:	d20b      	bcs.n	800fae6 <vPortValidateInterruptPriority+0x3e>
+	__asm volatile
+ 800face:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800fad2:	b672      	cpsid	i
+ 800fad4:	f383 8811 	msr	BASEPRI, r3
+ 800fad8:	f3bf 8f6f 	isb	sy
+ 800fadc:	f3bf 8f4f 	dsb	sy
+ 800fae0:	b662      	cpsie	i
+ 800fae2:	607b      	str	r3, [r7, #4]
+ 800fae4:	e7fe      	b.n	800fae4 <vPortValidateInterruptPriority+0x3c>
+		configuration then the correct setting can be achieved on all Cortex-M
+		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+		scheduler.  Note however that some vendor specific peripheral libraries
+		assume a non-zero priority group setting, in which cases using a value
+		of zero will result in unpredictable behaviour. */
+		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+ 800fae6:	4b0f      	ldr	r3, [pc, #60]	; (800fb24 <vPortValidateInterruptPriority+0x7c>)
+ 800fae8:	681b      	ldr	r3, [r3, #0]
+ 800faea:	f403 62e0 	and.w	r2, r3, #1792	; 0x700
+ 800faee:	4b0e      	ldr	r3, [pc, #56]	; (800fb28 <vPortValidateInterruptPriority+0x80>)
+ 800faf0:	681b      	ldr	r3, [r3, #0]
+ 800faf2:	429a      	cmp	r2, r3
+ 800faf4:	d90b      	bls.n	800fb0e <vPortValidateInterruptPriority+0x66>
+ 800faf6:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800fafa:	b672      	cpsid	i
+ 800fafc:	f383 8811 	msr	BASEPRI, r3
+ 800fb00:	f3bf 8f6f 	isb	sy
+ 800fb04:	f3bf 8f4f 	dsb	sy
+ 800fb08:	b662      	cpsie	i
+ 800fb0a:	603b      	str	r3, [r7, #0]
+ 800fb0c:	e7fe      	b.n	800fb0c <vPortValidateInterruptPriority+0x64>
+	}
+ 800fb0e:	bf00      	nop
+ 800fb10:	3714      	adds	r7, #20
+ 800fb12:	46bd      	mov	sp, r7
+ 800fb14:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800fb18:	4770      	bx	lr
+ 800fb1a:	bf00      	nop
+ 800fb1c:	e000e3f0 	.word	0xe000e3f0
+ 800fb20:	200006a4 	.word	0x200006a4
+ 800fb24:	e000ed0c 	.word	0xe000ed0c
+ 800fb28:	200006a8 	.word	0x200006a8
+
+0800fb2c <pvPortMalloc>:
+static size_t xBlockAllocatedBit = 0;
+
+/*-----------------------------------------------------------*/
+
+void *pvPortMalloc( size_t xWantedSize )
+{
+ 800fb2c:	b580      	push	{r7, lr}
+ 800fb2e:	b08a      	sub	sp, #40	; 0x28
+ 800fb30:	af00      	add	r7, sp, #0
+ 800fb32:	6078      	str	r0, [r7, #4]
+BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
+void *pvReturn = NULL;
+ 800fb34:	2300      	movs	r3, #0
+ 800fb36:	61fb      	str	r3, [r7, #28]
+
+	vTaskSuspendAll();
+ 800fb38:	f7fe ffa2 	bl	800ea80 <vTaskSuspendAll>
+	{
+		/* If this is the first call to malloc then the heap will require
+		initialisation to setup the list of free blocks. */
+		if( pxEnd == NULL )
+ 800fb3c:	4b5c      	ldr	r3, [pc, #368]	; (800fcb0 <pvPortMalloc+0x184>)
+ 800fb3e:	681b      	ldr	r3, [r3, #0]
+ 800fb40:	2b00      	cmp	r3, #0
+ 800fb42:	d101      	bne.n	800fb48 <pvPortMalloc+0x1c>
+		{
+			prvHeapInit();
+ 800fb44:	f000 f91a 	bl	800fd7c <prvHeapInit>
+
+		/* Check the requested block size is not so large that the top bit is
+		set.  The top bit of the block size member of the BlockLink_t structure
+		is used to determine who owns the block - the application or the
+		kernel, so it must be free. */
+		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
+ 800fb48:	4b5a      	ldr	r3, [pc, #360]	; (800fcb4 <pvPortMalloc+0x188>)
+ 800fb4a:	681a      	ldr	r2, [r3, #0]
+ 800fb4c:	687b      	ldr	r3, [r7, #4]
+ 800fb4e:	4013      	ands	r3, r2
+ 800fb50:	2b00      	cmp	r3, #0
+ 800fb52:	f040 8090 	bne.w	800fc76 <pvPortMalloc+0x14a>
+		{
+			/* The wanted size is increased so it can contain a BlockLink_t
+			structure in addition to the requested amount of bytes. */
+			if( xWantedSize > 0 )
+ 800fb56:	687b      	ldr	r3, [r7, #4]
+ 800fb58:	2b00      	cmp	r3, #0
+ 800fb5a:	d01e      	beq.n	800fb9a <pvPortMalloc+0x6e>
+			{
+				xWantedSize += xHeapStructSize;
+ 800fb5c:	2208      	movs	r2, #8
+ 800fb5e:	687b      	ldr	r3, [r7, #4]
+ 800fb60:	4413      	add	r3, r2
+ 800fb62:	607b      	str	r3, [r7, #4]
+
+				/* Ensure that blocks are always aligned to the required number
+				of bytes. */
+				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
+ 800fb64:	687b      	ldr	r3, [r7, #4]
+ 800fb66:	f003 0307 	and.w	r3, r3, #7
+ 800fb6a:	2b00      	cmp	r3, #0
+ 800fb6c:	d015      	beq.n	800fb9a <pvPortMalloc+0x6e>
+				{
+					/* Byte alignment required. */
+					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
+ 800fb6e:	687b      	ldr	r3, [r7, #4]
+ 800fb70:	f023 0307 	bic.w	r3, r3, #7
+ 800fb74:	3308      	adds	r3, #8
+ 800fb76:	607b      	str	r3, [r7, #4]
+					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
+ 800fb78:	687b      	ldr	r3, [r7, #4]
+ 800fb7a:	f003 0307 	and.w	r3, r3, #7
+ 800fb7e:	2b00      	cmp	r3, #0
+ 800fb80:	d00b      	beq.n	800fb9a <pvPortMalloc+0x6e>
+ 800fb82:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800fb86:	b672      	cpsid	i
+ 800fb88:	f383 8811 	msr	BASEPRI, r3
+ 800fb8c:	f3bf 8f6f 	isb	sy
+ 800fb90:	f3bf 8f4f 	dsb	sy
+ 800fb94:	b662      	cpsie	i
+ 800fb96:	617b      	str	r3, [r7, #20]
+ 800fb98:	e7fe      	b.n	800fb98 <pvPortMalloc+0x6c>
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
+ 800fb9a:	687b      	ldr	r3, [r7, #4]
+ 800fb9c:	2b00      	cmp	r3, #0
+ 800fb9e:	d06a      	beq.n	800fc76 <pvPortMalloc+0x14a>
+ 800fba0:	4b45      	ldr	r3, [pc, #276]	; (800fcb8 <pvPortMalloc+0x18c>)
+ 800fba2:	681b      	ldr	r3, [r3, #0]
+ 800fba4:	687a      	ldr	r2, [r7, #4]
+ 800fba6:	429a      	cmp	r2, r3
+ 800fba8:	d865      	bhi.n	800fc76 <pvPortMalloc+0x14a>
+			{
+				/* Traverse the list from the start	(lowest address) block until
+				one	of adequate size is found. */
+				pxPreviousBlock = &xStart;
+ 800fbaa:	4b44      	ldr	r3, [pc, #272]	; (800fcbc <pvPortMalloc+0x190>)
+ 800fbac:	623b      	str	r3, [r7, #32]
+				pxBlock = xStart.pxNextFreeBlock;
+ 800fbae:	4b43      	ldr	r3, [pc, #268]	; (800fcbc <pvPortMalloc+0x190>)
+ 800fbb0:	681b      	ldr	r3, [r3, #0]
+ 800fbb2:	627b      	str	r3, [r7, #36]	; 0x24
+				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+ 800fbb4:	e004      	b.n	800fbc0 <pvPortMalloc+0x94>
+				{
+					pxPreviousBlock = pxBlock;
+ 800fbb6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fbb8:	623b      	str	r3, [r7, #32]
+					pxBlock = pxBlock->pxNextFreeBlock;
+ 800fbba:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fbbc:	681b      	ldr	r3, [r3, #0]
+ 800fbbe:	627b      	str	r3, [r7, #36]	; 0x24
+				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+ 800fbc0:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fbc2:	685b      	ldr	r3, [r3, #4]
+ 800fbc4:	687a      	ldr	r2, [r7, #4]
+ 800fbc6:	429a      	cmp	r2, r3
+ 800fbc8:	d903      	bls.n	800fbd2 <pvPortMalloc+0xa6>
+ 800fbca:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fbcc:	681b      	ldr	r3, [r3, #0]
+ 800fbce:	2b00      	cmp	r3, #0
+ 800fbd0:	d1f1      	bne.n	800fbb6 <pvPortMalloc+0x8a>
+				}
+
+				/* If the end marker was reached then a block of adequate size
+				was	not found. */
+				if( pxBlock != pxEnd )
+ 800fbd2:	4b37      	ldr	r3, [pc, #220]	; (800fcb0 <pvPortMalloc+0x184>)
+ 800fbd4:	681b      	ldr	r3, [r3, #0]
+ 800fbd6:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 800fbd8:	429a      	cmp	r2, r3
+ 800fbda:	d04c      	beq.n	800fc76 <pvPortMalloc+0x14a>
+				{
+					/* Return the memory space pointed to - jumping over the
+					BlockLink_t structure at its start. */
+					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
+ 800fbdc:	6a3b      	ldr	r3, [r7, #32]
+ 800fbde:	681b      	ldr	r3, [r3, #0]
+ 800fbe0:	2208      	movs	r2, #8
+ 800fbe2:	4413      	add	r3, r2
+ 800fbe4:	61fb      	str	r3, [r7, #28]
+
+					/* This block is being returned for use so must be taken out
+					of the list of free blocks. */
+					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+ 800fbe6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fbe8:	681a      	ldr	r2, [r3, #0]
+ 800fbea:	6a3b      	ldr	r3, [r7, #32]
+ 800fbec:	601a      	str	r2, [r3, #0]
+
+					/* If the block is larger than required it can be split into
+					two. */
+					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
+ 800fbee:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fbf0:	685a      	ldr	r2, [r3, #4]
+ 800fbf2:	687b      	ldr	r3, [r7, #4]
+ 800fbf4:	1ad2      	subs	r2, r2, r3
+ 800fbf6:	2308      	movs	r3, #8
+ 800fbf8:	005b      	lsls	r3, r3, #1
+ 800fbfa:	429a      	cmp	r2, r3
+ 800fbfc:	d920      	bls.n	800fc40 <pvPortMalloc+0x114>
+					{
+						/* This block is to be split into two.  Create a new
+						block following the number of bytes requested. The void
+						cast is used to prevent byte alignment warnings from the
+						compiler. */
+						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+ 800fbfe:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 800fc00:	687b      	ldr	r3, [r7, #4]
+ 800fc02:	4413      	add	r3, r2
+ 800fc04:	61bb      	str	r3, [r7, #24]
+						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
+ 800fc06:	69bb      	ldr	r3, [r7, #24]
+ 800fc08:	f003 0307 	and.w	r3, r3, #7
+ 800fc0c:	2b00      	cmp	r3, #0
+ 800fc0e:	d00b      	beq.n	800fc28 <pvPortMalloc+0xfc>
+ 800fc10:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800fc14:	b672      	cpsid	i
+ 800fc16:	f383 8811 	msr	BASEPRI, r3
+ 800fc1a:	f3bf 8f6f 	isb	sy
+ 800fc1e:	f3bf 8f4f 	dsb	sy
+ 800fc22:	b662      	cpsie	i
+ 800fc24:	613b      	str	r3, [r7, #16]
+ 800fc26:	e7fe      	b.n	800fc26 <pvPortMalloc+0xfa>
+
+						/* Calculate the sizes of two blocks split from the
+						single block. */
+						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+ 800fc28:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fc2a:	685a      	ldr	r2, [r3, #4]
+ 800fc2c:	687b      	ldr	r3, [r7, #4]
+ 800fc2e:	1ad2      	subs	r2, r2, r3
+ 800fc30:	69bb      	ldr	r3, [r7, #24]
+ 800fc32:	605a      	str	r2, [r3, #4]
+						pxBlock->xBlockSize = xWantedSize;
+ 800fc34:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fc36:	687a      	ldr	r2, [r7, #4]
+ 800fc38:	605a      	str	r2, [r3, #4]
+
+						/* Insert the new block into the list of free blocks. */
+						prvInsertBlockIntoFreeList( pxNewBlockLink );
+ 800fc3a:	69b8      	ldr	r0, [r7, #24]
+ 800fc3c:	f000 f900 	bl	800fe40 <prvInsertBlockIntoFreeList>
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					xFreeBytesRemaining -= pxBlock->xBlockSize;
+ 800fc40:	4b1d      	ldr	r3, [pc, #116]	; (800fcb8 <pvPortMalloc+0x18c>)
+ 800fc42:	681a      	ldr	r2, [r3, #0]
+ 800fc44:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fc46:	685b      	ldr	r3, [r3, #4]
+ 800fc48:	1ad3      	subs	r3, r2, r3
+ 800fc4a:	4a1b      	ldr	r2, [pc, #108]	; (800fcb8 <pvPortMalloc+0x18c>)
+ 800fc4c:	6013      	str	r3, [r2, #0]
+
+					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
+ 800fc4e:	4b1a      	ldr	r3, [pc, #104]	; (800fcb8 <pvPortMalloc+0x18c>)
+ 800fc50:	681a      	ldr	r2, [r3, #0]
+ 800fc52:	4b1b      	ldr	r3, [pc, #108]	; (800fcc0 <pvPortMalloc+0x194>)
+ 800fc54:	681b      	ldr	r3, [r3, #0]
+ 800fc56:	429a      	cmp	r2, r3
+ 800fc58:	d203      	bcs.n	800fc62 <pvPortMalloc+0x136>
+					{
+						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
+ 800fc5a:	4b17      	ldr	r3, [pc, #92]	; (800fcb8 <pvPortMalloc+0x18c>)
+ 800fc5c:	681b      	ldr	r3, [r3, #0]
+ 800fc5e:	4a18      	ldr	r2, [pc, #96]	; (800fcc0 <pvPortMalloc+0x194>)
+ 800fc60:	6013      	str	r3, [r2, #0]
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* The block is being returned - it is allocated and owned
+					by the application and has no "next" block. */
+					pxBlock->xBlockSize |= xBlockAllocatedBit;
+ 800fc62:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fc64:	685a      	ldr	r2, [r3, #4]
+ 800fc66:	4b13      	ldr	r3, [pc, #76]	; (800fcb4 <pvPortMalloc+0x188>)
+ 800fc68:	681b      	ldr	r3, [r3, #0]
+ 800fc6a:	431a      	orrs	r2, r3
+ 800fc6c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fc6e:	605a      	str	r2, [r3, #4]
+					pxBlock->pxNextFreeBlock = NULL;
+ 800fc70:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800fc72:	2200      	movs	r2, #0
+ 800fc74:	601a      	str	r2, [r3, #0]
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		traceMALLOC( pvReturn, xWantedSize );
+	}
+	( void ) xTaskResumeAll();
+ 800fc76:	f7fe ff11 	bl	800ea9c <xTaskResumeAll>
+
+	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
+	{
+		if( pvReturn == NULL )
+ 800fc7a:	69fb      	ldr	r3, [r7, #28]
+ 800fc7c:	2b00      	cmp	r3, #0
+ 800fc7e:	d101      	bne.n	800fc84 <pvPortMalloc+0x158>
+		{
+			extern void vApplicationMallocFailedHook( void );
+			vApplicationMallocFailedHook();
+ 800fc80:	f7f0 fca8 	bl	80005d4 <vApplicationMallocFailedHook>
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	#endif
+
+	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
+ 800fc84:	69fb      	ldr	r3, [r7, #28]
+ 800fc86:	f003 0307 	and.w	r3, r3, #7
+ 800fc8a:	2b00      	cmp	r3, #0
+ 800fc8c:	d00b      	beq.n	800fca6 <pvPortMalloc+0x17a>
+ 800fc8e:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800fc92:	b672      	cpsid	i
+ 800fc94:	f383 8811 	msr	BASEPRI, r3
+ 800fc98:	f3bf 8f6f 	isb	sy
+ 800fc9c:	f3bf 8f4f 	dsb	sy
+ 800fca0:	b662      	cpsie	i
+ 800fca2:	60fb      	str	r3, [r7, #12]
+ 800fca4:	e7fe      	b.n	800fca4 <pvPortMalloc+0x178>
+	return pvReturn;
+ 800fca6:	69fb      	ldr	r3, [r7, #28]
+}
+ 800fca8:	4618      	mov	r0, r3
+ 800fcaa:	3728      	adds	r7, #40	; 0x28
+ 800fcac:	46bd      	mov	sp, r7
+ 800fcae:	bd80      	pop	{r7, pc}
+ 800fcb0:	200086b4 	.word	0x200086b4
+ 800fcb4:	200086c0 	.word	0x200086c0
+ 800fcb8:	200086b8 	.word	0x200086b8
+ 800fcbc:	200086ac 	.word	0x200086ac
+ 800fcc0:	200086bc 	.word	0x200086bc
+
+0800fcc4 <vPortFree>:
+/*-----------------------------------------------------------*/
+
+void vPortFree( void *pv )
+{
+ 800fcc4:	b580      	push	{r7, lr}
+ 800fcc6:	b086      	sub	sp, #24
+ 800fcc8:	af00      	add	r7, sp, #0
+ 800fcca:	6078      	str	r0, [r7, #4]
+uint8_t *puc = ( uint8_t * ) pv;
+ 800fccc:	687b      	ldr	r3, [r7, #4]
+ 800fcce:	617b      	str	r3, [r7, #20]
+BlockLink_t *pxLink;
+
+	if( pv != NULL )
+ 800fcd0:	687b      	ldr	r3, [r7, #4]
+ 800fcd2:	2b00      	cmp	r3, #0
+ 800fcd4:	d04a      	beq.n	800fd6c <vPortFree+0xa8>
+	{
+		/* The memory being freed will have an BlockLink_t structure immediately
+		before it. */
+		puc -= xHeapStructSize;
+ 800fcd6:	2308      	movs	r3, #8
+ 800fcd8:	425b      	negs	r3, r3
+ 800fcda:	697a      	ldr	r2, [r7, #20]
+ 800fcdc:	4413      	add	r3, r2
+ 800fcde:	617b      	str	r3, [r7, #20]
+
+		/* This casting is to keep the compiler from issuing warnings. */
+		pxLink = ( void * ) puc;
+ 800fce0:	697b      	ldr	r3, [r7, #20]
+ 800fce2:	613b      	str	r3, [r7, #16]
+
+		/* Check the block is actually allocated. */
+		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
+ 800fce4:	693b      	ldr	r3, [r7, #16]
+ 800fce6:	685a      	ldr	r2, [r3, #4]
+ 800fce8:	4b22      	ldr	r3, [pc, #136]	; (800fd74 <vPortFree+0xb0>)
+ 800fcea:	681b      	ldr	r3, [r3, #0]
+ 800fcec:	4013      	ands	r3, r2
+ 800fcee:	2b00      	cmp	r3, #0
+ 800fcf0:	d10b      	bne.n	800fd0a <vPortFree+0x46>
+ 800fcf2:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800fcf6:	b672      	cpsid	i
+ 800fcf8:	f383 8811 	msr	BASEPRI, r3
+ 800fcfc:	f3bf 8f6f 	isb	sy
+ 800fd00:	f3bf 8f4f 	dsb	sy
+ 800fd04:	b662      	cpsie	i
+ 800fd06:	60fb      	str	r3, [r7, #12]
+ 800fd08:	e7fe      	b.n	800fd08 <vPortFree+0x44>
+		configASSERT( pxLink->pxNextFreeBlock == NULL );
+ 800fd0a:	693b      	ldr	r3, [r7, #16]
+ 800fd0c:	681b      	ldr	r3, [r3, #0]
+ 800fd0e:	2b00      	cmp	r3, #0
+ 800fd10:	d00b      	beq.n	800fd2a <vPortFree+0x66>
+ 800fd12:	f04f 0350 	mov.w	r3, #80	; 0x50
+ 800fd16:	b672      	cpsid	i
+ 800fd18:	f383 8811 	msr	BASEPRI, r3
+ 800fd1c:	f3bf 8f6f 	isb	sy
+ 800fd20:	f3bf 8f4f 	dsb	sy
+ 800fd24:	b662      	cpsie	i
+ 800fd26:	60bb      	str	r3, [r7, #8]
+ 800fd28:	e7fe      	b.n	800fd28 <vPortFree+0x64>
+
+		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
+ 800fd2a:	693b      	ldr	r3, [r7, #16]
+ 800fd2c:	685a      	ldr	r2, [r3, #4]
+ 800fd2e:	4b11      	ldr	r3, [pc, #68]	; (800fd74 <vPortFree+0xb0>)
+ 800fd30:	681b      	ldr	r3, [r3, #0]
+ 800fd32:	4013      	ands	r3, r2
+ 800fd34:	2b00      	cmp	r3, #0
+ 800fd36:	d019      	beq.n	800fd6c <vPortFree+0xa8>
+		{
+			if( pxLink->pxNextFreeBlock == NULL )
+ 800fd38:	693b      	ldr	r3, [r7, #16]
+ 800fd3a:	681b      	ldr	r3, [r3, #0]
+ 800fd3c:	2b00      	cmp	r3, #0
+ 800fd3e:	d115      	bne.n	800fd6c <vPortFree+0xa8>
+			{
+				/* The block is being returned to the heap - it is no longer
+				allocated. */
+				pxLink->xBlockSize &= ~xBlockAllocatedBit;
+ 800fd40:	693b      	ldr	r3, [r7, #16]
+ 800fd42:	685a      	ldr	r2, [r3, #4]
+ 800fd44:	4b0b      	ldr	r3, [pc, #44]	; (800fd74 <vPortFree+0xb0>)
+ 800fd46:	681b      	ldr	r3, [r3, #0]
+ 800fd48:	43db      	mvns	r3, r3
+ 800fd4a:	401a      	ands	r2, r3
+ 800fd4c:	693b      	ldr	r3, [r7, #16]
+ 800fd4e:	605a      	str	r2, [r3, #4]
+
+				vTaskSuspendAll();
+ 800fd50:	f7fe fe96 	bl	800ea80 <vTaskSuspendAll>
+				{
+					/* Add this block to the list of free blocks. */
+					xFreeBytesRemaining += pxLink->xBlockSize;
+ 800fd54:	693b      	ldr	r3, [r7, #16]
+ 800fd56:	685a      	ldr	r2, [r3, #4]
+ 800fd58:	4b07      	ldr	r3, [pc, #28]	; (800fd78 <vPortFree+0xb4>)
+ 800fd5a:	681b      	ldr	r3, [r3, #0]
+ 800fd5c:	4413      	add	r3, r2
+ 800fd5e:	4a06      	ldr	r2, [pc, #24]	; (800fd78 <vPortFree+0xb4>)
+ 800fd60:	6013      	str	r3, [r2, #0]
+					traceFREE( pv, pxLink->xBlockSize );
+					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+ 800fd62:	6938      	ldr	r0, [r7, #16]
+ 800fd64:	f000 f86c 	bl	800fe40 <prvInsertBlockIntoFreeList>
+				}
+				( void ) xTaskResumeAll();
+ 800fd68:	f7fe fe98 	bl	800ea9c <xTaskResumeAll>
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+}
+ 800fd6c:	bf00      	nop
+ 800fd6e:	3718      	adds	r7, #24
+ 800fd70:	46bd      	mov	sp, r7
+ 800fd72:	bd80      	pop	{r7, pc}
+ 800fd74:	200086c0 	.word	0x200086c0
+ 800fd78:	200086b8 	.word	0x200086b8
+
+0800fd7c <prvHeapInit>:
+	/* This just exists to keep the linker quiet. */
+}
+/*-----------------------------------------------------------*/
+
+static void prvHeapInit( void )
+{
+ 800fd7c:	b480      	push	{r7}
+ 800fd7e:	b085      	sub	sp, #20
+ 800fd80:	af00      	add	r7, sp, #0
+BlockLink_t *pxFirstFreeBlock;
+uint8_t *pucAlignedHeap;
+size_t uxAddress;
+size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
+ 800fd82:	f44f 4300 	mov.w	r3, #32768	; 0x8000
+ 800fd86:	60bb      	str	r3, [r7, #8]
+
+	/* Ensure the heap starts on a correctly aligned boundary. */
+	uxAddress = ( size_t ) ucHeap;
+ 800fd88:	4b27      	ldr	r3, [pc, #156]	; (800fe28 <prvHeapInit+0xac>)
+ 800fd8a:	60fb      	str	r3, [r7, #12]
+
+	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
+ 800fd8c:	68fb      	ldr	r3, [r7, #12]
+ 800fd8e:	f003 0307 	and.w	r3, r3, #7
+ 800fd92:	2b00      	cmp	r3, #0
+ 800fd94:	d00c      	beq.n	800fdb0 <prvHeapInit+0x34>
+	{
+		uxAddress += ( portBYTE_ALIGNMENT - 1 );
+ 800fd96:	68fb      	ldr	r3, [r7, #12]
+ 800fd98:	3307      	adds	r3, #7
+ 800fd9a:	60fb      	str	r3, [r7, #12]
+		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
+ 800fd9c:	68fb      	ldr	r3, [r7, #12]
+ 800fd9e:	f023 0307 	bic.w	r3, r3, #7
+ 800fda2:	60fb      	str	r3, [r7, #12]
+		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
+ 800fda4:	68ba      	ldr	r2, [r7, #8]
+ 800fda6:	68fb      	ldr	r3, [r7, #12]
+ 800fda8:	1ad3      	subs	r3, r2, r3
+ 800fdaa:	4a1f      	ldr	r2, [pc, #124]	; (800fe28 <prvHeapInit+0xac>)
+ 800fdac:	4413      	add	r3, r2
+ 800fdae:	60bb      	str	r3, [r7, #8]
+	}
+
+	pucAlignedHeap = ( uint8_t * ) uxAddress;
+ 800fdb0:	68fb      	ldr	r3, [r7, #12]
+ 800fdb2:	607b      	str	r3, [r7, #4]
+
+	/* xStart is used to hold a pointer to the first item in the list of free
+	blocks.  The void cast is used to prevent compiler warnings. */
+	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
+ 800fdb4:	4a1d      	ldr	r2, [pc, #116]	; (800fe2c <prvHeapInit+0xb0>)
+ 800fdb6:	687b      	ldr	r3, [r7, #4]
+ 800fdb8:	6013      	str	r3, [r2, #0]
+	xStart.xBlockSize = ( size_t ) 0;
+ 800fdba:	4b1c      	ldr	r3, [pc, #112]	; (800fe2c <prvHeapInit+0xb0>)
+ 800fdbc:	2200      	movs	r2, #0
+ 800fdbe:	605a      	str	r2, [r3, #4]
+
+	/* pxEnd is used to mark the end of the list of free blocks and is inserted
+	at the end of the heap space. */
+	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
+ 800fdc0:	687b      	ldr	r3, [r7, #4]
+ 800fdc2:	68ba      	ldr	r2, [r7, #8]
+ 800fdc4:	4413      	add	r3, r2
+ 800fdc6:	60fb      	str	r3, [r7, #12]
+	uxAddress -= xHeapStructSize;
+ 800fdc8:	2208      	movs	r2, #8
+ 800fdca:	68fb      	ldr	r3, [r7, #12]
+ 800fdcc:	1a9b      	subs	r3, r3, r2
+ 800fdce:	60fb      	str	r3, [r7, #12]
+	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
+ 800fdd0:	68fb      	ldr	r3, [r7, #12]
+ 800fdd2:	f023 0307 	bic.w	r3, r3, #7
+ 800fdd6:	60fb      	str	r3, [r7, #12]
+	pxEnd = ( void * ) uxAddress;
+ 800fdd8:	68fb      	ldr	r3, [r7, #12]
+ 800fdda:	4a15      	ldr	r2, [pc, #84]	; (800fe30 <prvHeapInit+0xb4>)
+ 800fddc:	6013      	str	r3, [r2, #0]
+	pxEnd->xBlockSize = 0;
+ 800fdde:	4b14      	ldr	r3, [pc, #80]	; (800fe30 <prvHeapInit+0xb4>)
+ 800fde0:	681b      	ldr	r3, [r3, #0]
+ 800fde2:	2200      	movs	r2, #0
+ 800fde4:	605a      	str	r2, [r3, #4]
+	pxEnd->pxNextFreeBlock = NULL;
+ 800fde6:	4b12      	ldr	r3, [pc, #72]	; (800fe30 <prvHeapInit+0xb4>)
+ 800fde8:	681b      	ldr	r3, [r3, #0]
+ 800fdea:	2200      	movs	r2, #0
+ 800fdec:	601a      	str	r2, [r3, #0]
+
+	/* To start with there is a single free block that is sized to take up the
+	entire heap space, minus the space taken by pxEnd. */
+	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
+ 800fdee:	687b      	ldr	r3, [r7, #4]
+ 800fdf0:	603b      	str	r3, [r7, #0]
+	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
+ 800fdf2:	683b      	ldr	r3, [r7, #0]
+ 800fdf4:	68fa      	ldr	r2, [r7, #12]
+ 800fdf6:	1ad2      	subs	r2, r2, r3
+ 800fdf8:	683b      	ldr	r3, [r7, #0]
+ 800fdfa:	605a      	str	r2, [r3, #4]
+	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
+ 800fdfc:	4b0c      	ldr	r3, [pc, #48]	; (800fe30 <prvHeapInit+0xb4>)
+ 800fdfe:	681a      	ldr	r2, [r3, #0]
+ 800fe00:	683b      	ldr	r3, [r7, #0]
+ 800fe02:	601a      	str	r2, [r3, #0]
+
+	/* Only one block exists - and it covers the entire usable heap space. */
+	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+ 800fe04:	683b      	ldr	r3, [r7, #0]
+ 800fe06:	685b      	ldr	r3, [r3, #4]
+ 800fe08:	4a0a      	ldr	r2, [pc, #40]	; (800fe34 <prvHeapInit+0xb8>)
+ 800fe0a:	6013      	str	r3, [r2, #0]
+	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+ 800fe0c:	683b      	ldr	r3, [r7, #0]
+ 800fe0e:	685b      	ldr	r3, [r3, #4]
+ 800fe10:	4a09      	ldr	r2, [pc, #36]	; (800fe38 <prvHeapInit+0xbc>)
+ 800fe12:	6013      	str	r3, [r2, #0]
+
+	/* Work out the position of the top bit in a size_t variable. */
+	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
+ 800fe14:	4b09      	ldr	r3, [pc, #36]	; (800fe3c <prvHeapInit+0xc0>)
+ 800fe16:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
+ 800fe1a:	601a      	str	r2, [r3, #0]
+}
+ 800fe1c:	bf00      	nop
+ 800fe1e:	3714      	adds	r7, #20
+ 800fe20:	46bd      	mov	sp, r7
+ 800fe22:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800fe26:	4770      	bx	lr
+ 800fe28:	200006ac 	.word	0x200006ac
+ 800fe2c:	200086ac 	.word	0x200086ac
+ 800fe30:	200086b4 	.word	0x200086b4
+ 800fe34:	200086bc 	.word	0x200086bc
+ 800fe38:	200086b8 	.word	0x200086b8
+ 800fe3c:	200086c0 	.word	0x200086c0
+
+0800fe40 <prvInsertBlockIntoFreeList>:
+/*-----------------------------------------------------------*/
+
+static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
+{
+ 800fe40:	b480      	push	{r7}
+ 800fe42:	b085      	sub	sp, #20
+ 800fe44:	af00      	add	r7, sp, #0
+ 800fe46:	6078      	str	r0, [r7, #4]
+BlockLink_t *pxIterator;
+uint8_t *puc;
+
+	/* Iterate through the list until a block is found that has a higher address
+	than the block being inserted. */
+	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
+ 800fe48:	4b28      	ldr	r3, [pc, #160]	; (800feec <prvInsertBlockIntoFreeList+0xac>)
+ 800fe4a:	60fb      	str	r3, [r7, #12]
+ 800fe4c:	e002      	b.n	800fe54 <prvInsertBlockIntoFreeList+0x14>
+ 800fe4e:	68fb      	ldr	r3, [r7, #12]
+ 800fe50:	681b      	ldr	r3, [r3, #0]
+ 800fe52:	60fb      	str	r3, [r7, #12]
+ 800fe54:	68fb      	ldr	r3, [r7, #12]
+ 800fe56:	681b      	ldr	r3, [r3, #0]
+ 800fe58:	687a      	ldr	r2, [r7, #4]
+ 800fe5a:	429a      	cmp	r2, r3
+ 800fe5c:	d8f7      	bhi.n	800fe4e <prvInsertBlockIntoFreeList+0xe>
+		/* Nothing to do here, just iterate to the right position. */
+	}
+
+	/* Do the block being inserted, and the block it is being inserted after
+	make a contiguous block of memory? */
+	puc = ( uint8_t * ) pxIterator;
+ 800fe5e:	68fb      	ldr	r3, [r7, #12]
+ 800fe60:	60bb      	str	r3, [r7, #8]
+	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
+ 800fe62:	68fb      	ldr	r3, [r7, #12]
+ 800fe64:	685b      	ldr	r3, [r3, #4]
+ 800fe66:	68ba      	ldr	r2, [r7, #8]
+ 800fe68:	4413      	add	r3, r2
+ 800fe6a:	687a      	ldr	r2, [r7, #4]
+ 800fe6c:	429a      	cmp	r2, r3
+ 800fe6e:	d108      	bne.n	800fe82 <prvInsertBlockIntoFreeList+0x42>
+	{
+		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
+ 800fe70:	68fb      	ldr	r3, [r7, #12]
+ 800fe72:	685a      	ldr	r2, [r3, #4]
+ 800fe74:	687b      	ldr	r3, [r7, #4]
+ 800fe76:	685b      	ldr	r3, [r3, #4]
+ 800fe78:	441a      	add	r2, r3
+ 800fe7a:	68fb      	ldr	r3, [r7, #12]
+ 800fe7c:	605a      	str	r2, [r3, #4]
+		pxBlockToInsert = pxIterator;
+ 800fe7e:	68fb      	ldr	r3, [r7, #12]
+ 800fe80:	607b      	str	r3, [r7, #4]
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	/* Do the block being inserted, and the block it is being inserted before
+	make a contiguous block of memory? */
+	puc = ( uint8_t * ) pxBlockToInsert;
+ 800fe82:	687b      	ldr	r3, [r7, #4]
+ 800fe84:	60bb      	str	r3, [r7, #8]
+	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
+ 800fe86:	687b      	ldr	r3, [r7, #4]
+ 800fe88:	685b      	ldr	r3, [r3, #4]
+ 800fe8a:	68ba      	ldr	r2, [r7, #8]
+ 800fe8c:	441a      	add	r2, r3
+ 800fe8e:	68fb      	ldr	r3, [r7, #12]
+ 800fe90:	681b      	ldr	r3, [r3, #0]
+ 800fe92:	429a      	cmp	r2, r3
+ 800fe94:	d118      	bne.n	800fec8 <prvInsertBlockIntoFreeList+0x88>
+	{
+		if( pxIterator->pxNextFreeBlock != pxEnd )
+ 800fe96:	68fb      	ldr	r3, [r7, #12]
+ 800fe98:	681a      	ldr	r2, [r3, #0]
+ 800fe9a:	4b15      	ldr	r3, [pc, #84]	; (800fef0 <prvInsertBlockIntoFreeList+0xb0>)
+ 800fe9c:	681b      	ldr	r3, [r3, #0]
+ 800fe9e:	429a      	cmp	r2, r3
+ 800fea0:	d00d      	beq.n	800febe <prvInsertBlockIntoFreeList+0x7e>
+		{
+			/* Form one big block from the two blocks. */
+			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
+ 800fea2:	687b      	ldr	r3, [r7, #4]
+ 800fea4:	685a      	ldr	r2, [r3, #4]
+ 800fea6:	68fb      	ldr	r3, [r7, #12]
+ 800fea8:	681b      	ldr	r3, [r3, #0]
+ 800feaa:	685b      	ldr	r3, [r3, #4]
+ 800feac:	441a      	add	r2, r3
+ 800feae:	687b      	ldr	r3, [r7, #4]
+ 800feb0:	605a      	str	r2, [r3, #4]
+			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
+ 800feb2:	68fb      	ldr	r3, [r7, #12]
+ 800feb4:	681b      	ldr	r3, [r3, #0]
+ 800feb6:	681a      	ldr	r2, [r3, #0]
+ 800feb8:	687b      	ldr	r3, [r7, #4]
+ 800feba:	601a      	str	r2, [r3, #0]
+ 800febc:	e008      	b.n	800fed0 <prvInsertBlockIntoFreeList+0x90>
+		}
+		else
+		{
+			pxBlockToInsert->pxNextFreeBlock = pxEnd;
+ 800febe:	4b0c      	ldr	r3, [pc, #48]	; (800fef0 <prvInsertBlockIntoFreeList+0xb0>)
+ 800fec0:	681a      	ldr	r2, [r3, #0]
+ 800fec2:	687b      	ldr	r3, [r7, #4]
+ 800fec4:	601a      	str	r2, [r3, #0]
+ 800fec6:	e003      	b.n	800fed0 <prvInsertBlockIntoFreeList+0x90>
+		}
+	}
+	else
+	{
+		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
+ 800fec8:	68fb      	ldr	r3, [r7, #12]
+ 800feca:	681a      	ldr	r2, [r3, #0]
+ 800fecc:	687b      	ldr	r3, [r7, #4]
+ 800fece:	601a      	str	r2, [r3, #0]
+
+	/* If the block being inserted plugged a gab, so was merged with the block
+	before and the block after, then it's pxNextFreeBlock pointer will have
+	already been set, and should not be set here as that would make it point
+	to itself. */
+	if( pxIterator != pxBlockToInsert )
+ 800fed0:	68fa      	ldr	r2, [r7, #12]
+ 800fed2:	687b      	ldr	r3, [r7, #4]
+ 800fed4:	429a      	cmp	r2, r3
+ 800fed6:	d002      	beq.n	800fede <prvInsertBlockIntoFreeList+0x9e>
+	{
+		pxIterator->pxNextFreeBlock = pxBlockToInsert;
+ 800fed8:	68fb      	ldr	r3, [r7, #12]
+ 800feda:	687a      	ldr	r2, [r7, #4]
+ 800fedc:	601a      	str	r2, [r3, #0]
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+}
+ 800fede:	bf00      	nop
+ 800fee0:	3714      	adds	r7, #20
+ 800fee2:	46bd      	mov	sp, r7
+ 800fee4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800fee8:	4770      	bx	lr
+ 800feea:	bf00      	nop
+ 800feec:	200086ac 	.word	0x200086ac
+ 800fef0:	200086b4 	.word	0x200086b4
+
+0800fef4 <tcpip_timeouts_mbox_fetch>:
+ * @param mbox the mbox to fetch the message from
+ * @param msg the place to store the message
+ */
+static void
+tcpip_timeouts_mbox_fetch(sys_mbox_t *mbox, void **msg)
+{
+ 800fef4:	b580      	push	{r7, lr}
+ 800fef6:	b084      	sub	sp, #16
+ 800fef8:	af00      	add	r7, sp, #0
+ 800fefa:	6078      	str	r0, [r7, #4]
+ 800fefc:	6039      	str	r1, [r7, #0]
+  u32_t sleeptime, res;
+
+again:
+  LWIP_ASSERT_CORE_LOCKED();
+
+  sleeptime = sys_timeouts_sleeptime();
+ 800fefe:	f007 fa91 	bl	8017424 <sys_timeouts_sleeptime>
+ 800ff02:	60f8      	str	r0, [r7, #12]
+  if (sleeptime == SYS_TIMEOUTS_SLEEPTIME_INFINITE) {
+ 800ff04:	68fb      	ldr	r3, [r7, #12]
+ 800ff06:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800ff0a:	d10b      	bne.n	800ff24 <tcpip_timeouts_mbox_fetch+0x30>
+    UNLOCK_TCPIP_CORE();
+ 800ff0c:	4813      	ldr	r0, [pc, #76]	; (800ff5c <tcpip_timeouts_mbox_fetch+0x68>)
+ 800ff0e:	f00c f9c2 	bl	801c296 <sys_mutex_unlock>
+    sys_arch_mbox_fetch(mbox, msg, 0);
+ 800ff12:	2200      	movs	r2, #0
+ 800ff14:	6839      	ldr	r1, [r7, #0]
+ 800ff16:	6878      	ldr	r0, [r7, #4]
+ 800ff18:	f00c f934 	bl	801c184 <sys_arch_mbox_fetch>
+    LOCK_TCPIP_CORE();
+ 800ff1c:	480f      	ldr	r0, [pc, #60]	; (800ff5c <tcpip_timeouts_mbox_fetch+0x68>)
+ 800ff1e:	f00c f9ab 	bl	801c278 <sys_mutex_lock>
+    return;
+ 800ff22:	e018      	b.n	800ff56 <tcpip_timeouts_mbox_fetch+0x62>
+  } else if (sleeptime == 0) {
+ 800ff24:	68fb      	ldr	r3, [r7, #12]
+ 800ff26:	2b00      	cmp	r3, #0
+ 800ff28:	d102      	bne.n	800ff30 <tcpip_timeouts_mbox_fetch+0x3c>
+    sys_check_timeouts();
+ 800ff2a:	f007 fa41 	bl	80173b0 <sys_check_timeouts>
+    /* We try again to fetch a message from the mbox. */
+    goto again;
+ 800ff2e:	e7e6      	b.n	800fefe <tcpip_timeouts_mbox_fetch+0xa>
+  }
+
+  UNLOCK_TCPIP_CORE();
+ 800ff30:	480a      	ldr	r0, [pc, #40]	; (800ff5c <tcpip_timeouts_mbox_fetch+0x68>)
+ 800ff32:	f00c f9b0 	bl	801c296 <sys_mutex_unlock>
+  res = sys_arch_mbox_fetch(mbox, msg, sleeptime);
+ 800ff36:	68fa      	ldr	r2, [r7, #12]
+ 800ff38:	6839      	ldr	r1, [r7, #0]
+ 800ff3a:	6878      	ldr	r0, [r7, #4]
+ 800ff3c:	f00c f922 	bl	801c184 <sys_arch_mbox_fetch>
+ 800ff40:	60b8      	str	r0, [r7, #8]
+  LOCK_TCPIP_CORE();
+ 800ff42:	4806      	ldr	r0, [pc, #24]	; (800ff5c <tcpip_timeouts_mbox_fetch+0x68>)
+ 800ff44:	f00c f998 	bl	801c278 <sys_mutex_lock>
+  if (res == SYS_ARCH_TIMEOUT) {
+ 800ff48:	68bb      	ldr	r3, [r7, #8]
+ 800ff4a:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 800ff4e:	d102      	bne.n	800ff56 <tcpip_timeouts_mbox_fetch+0x62>
+    /* If a SYS_ARCH_TIMEOUT value is returned, a timeout occurred
+       before a message could be fetched. */
+    sys_check_timeouts();
+ 800ff50:	f007 fa2e 	bl	80173b0 <sys_check_timeouts>
+    /* We try again to fetch a message from the mbox. */
+    goto again;
+ 800ff54:	e7d3      	b.n	800fefe <tcpip_timeouts_mbox_fetch+0xa>
+  }
+}
+ 800ff56:	3710      	adds	r7, #16
+ 800ff58:	46bd      	mov	sp, r7
+ 800ff5a:	bd80      	pop	{r7, pc}
+ 800ff5c:	2000c0b0 	.word	0x2000c0b0
+
+0800ff60 <tcpip_thread>:
+ *
+ * @param arg unused argument
+ */
+static void
+tcpip_thread(void *arg)
+{
+ 800ff60:	b580      	push	{r7, lr}
+ 800ff62:	b084      	sub	sp, #16
+ 800ff64:	af00      	add	r7, sp, #0
+ 800ff66:	6078      	str	r0, [r7, #4]
+  struct tcpip_msg *msg;
+  LWIP_UNUSED_ARG(arg);
+
+  LWIP_MARK_TCPIP_THREAD();
+
+  LOCK_TCPIP_CORE();
+ 800ff68:	4810      	ldr	r0, [pc, #64]	; (800ffac <tcpip_thread+0x4c>)
+ 800ff6a:	f00c f985 	bl	801c278 <sys_mutex_lock>
+  if (tcpip_init_done != NULL) {
+ 800ff6e:	4b10      	ldr	r3, [pc, #64]	; (800ffb0 <tcpip_thread+0x50>)
+ 800ff70:	681b      	ldr	r3, [r3, #0]
+ 800ff72:	2b00      	cmp	r3, #0
+ 800ff74:	d005      	beq.n	800ff82 <tcpip_thread+0x22>
+    tcpip_init_done(tcpip_init_done_arg);
+ 800ff76:	4b0e      	ldr	r3, [pc, #56]	; (800ffb0 <tcpip_thread+0x50>)
+ 800ff78:	681b      	ldr	r3, [r3, #0]
+ 800ff7a:	4a0e      	ldr	r2, [pc, #56]	; (800ffb4 <tcpip_thread+0x54>)
+ 800ff7c:	6812      	ldr	r2, [r2, #0]
+ 800ff7e:	4610      	mov	r0, r2
+ 800ff80:	4798      	blx	r3
+  }
+
+  while (1) {                          /* MAIN Loop */
+    LWIP_TCPIP_THREAD_ALIVE();
+    /* wait for a message, timeouts are processed while waiting */
+    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
+ 800ff82:	f107 030c 	add.w	r3, r7, #12
+ 800ff86:	4619      	mov	r1, r3
+ 800ff88:	480b      	ldr	r0, [pc, #44]	; (800ffb8 <tcpip_thread+0x58>)
+ 800ff8a:	f7ff ffb3 	bl	800fef4 <tcpip_timeouts_mbox_fetch>
+    if (msg == NULL) {
+ 800ff8e:	68fb      	ldr	r3, [r7, #12]
+ 800ff90:	2b00      	cmp	r3, #0
+ 800ff92:	d106      	bne.n	800ffa2 <tcpip_thread+0x42>
+      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: NULL\n"));
+      LWIP_ASSERT("tcpip_thread: invalid message", 0);
+ 800ff94:	4b09      	ldr	r3, [pc, #36]	; (800ffbc <tcpip_thread+0x5c>)
+ 800ff96:	2291      	movs	r2, #145	; 0x91
+ 800ff98:	4909      	ldr	r1, [pc, #36]	; (800ffc0 <tcpip_thread+0x60>)
+ 800ff9a:	480a      	ldr	r0, [pc, #40]	; (800ffc4 <tcpip_thread+0x64>)
+ 800ff9c:	f00c fa2c 	bl	801c3f8 <iprintf>
+      continue;
+ 800ffa0:	e003      	b.n	800ffaa <tcpip_thread+0x4a>
+    }
+    tcpip_thread_handle_msg(msg);
+ 800ffa2:	68fb      	ldr	r3, [r7, #12]
+ 800ffa4:	4618      	mov	r0, r3
+ 800ffa6:	f000 f80f 	bl	800ffc8 <tcpip_thread_handle_msg>
+    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
+ 800ffaa:	e7ea      	b.n	800ff82 <tcpip_thread+0x22>
+ 800ffac:	2000c0b0 	.word	0x2000c0b0
+ 800ffb0:	200086c4 	.word	0x200086c4
+ 800ffb4:	200086c8 	.word	0x200086c8
+ 800ffb8:	200086cc 	.word	0x200086cc
+ 800ffbc:	0801d704 	.word	0x0801d704
+ 800ffc0:	0801d734 	.word	0x0801d734
+ 800ffc4:	0801d754 	.word	0x0801d754
+
+0800ffc8 <tcpip_thread_handle_msg>:
+/* Handle a single tcpip_msg
+ * This is in its own function for access by tests only.
+ */
+static void
+tcpip_thread_handle_msg(struct tcpip_msg *msg)
+{
+ 800ffc8:	b580      	push	{r7, lr}
+ 800ffca:	b082      	sub	sp, #8
+ 800ffcc:	af00      	add	r7, sp, #0
+ 800ffce:	6078      	str	r0, [r7, #4]
+  switch (msg->type) {
+ 800ffd0:	687b      	ldr	r3, [r7, #4]
+ 800ffd2:	781b      	ldrb	r3, [r3, #0]
+ 800ffd4:	2b01      	cmp	r3, #1
+ 800ffd6:	d018      	beq.n	801000a <tcpip_thread_handle_msg+0x42>
+ 800ffd8:	2b02      	cmp	r3, #2
+ 800ffda:	d021      	beq.n	8010020 <tcpip_thread_handle_msg+0x58>
+ 800ffdc:	2b00      	cmp	r3, #0
+ 800ffde:	d126      	bne.n	801002e <tcpip_thread_handle_msg+0x66>
+#endif /* !LWIP_TCPIP_CORE_LOCKING */
+
+#if !LWIP_TCPIP_CORE_LOCKING_INPUT
+    case TCPIP_MSG_INPKT:
+      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: PACKET %p\n", (void *)msg));
+      if (msg->msg.inp.input_fn(msg->msg.inp.p, msg->msg.inp.netif) != ERR_OK) {
+ 800ffe0:	687b      	ldr	r3, [r7, #4]
+ 800ffe2:	68db      	ldr	r3, [r3, #12]
+ 800ffe4:	687a      	ldr	r2, [r7, #4]
+ 800ffe6:	6850      	ldr	r0, [r2, #4]
+ 800ffe8:	687a      	ldr	r2, [r7, #4]
+ 800ffea:	6892      	ldr	r2, [r2, #8]
+ 800ffec:	4611      	mov	r1, r2
+ 800ffee:	4798      	blx	r3
+ 800fff0:	4603      	mov	r3, r0
+ 800fff2:	2b00      	cmp	r3, #0
+ 800fff4:	d004      	beq.n	8010000 <tcpip_thread_handle_msg+0x38>
+        pbuf_free(msg->msg.inp.p);
+ 800fff6:	687b      	ldr	r3, [r7, #4]
+ 800fff8:	685b      	ldr	r3, [r3, #4]
+ 800fffa:	4618      	mov	r0, r3
+ 800fffc:	f001 fccc 	bl	8011998 <pbuf_free>
+      }
+      memp_free(MEMP_TCPIP_MSG_INPKT, msg);
+ 8010000:	6879      	ldr	r1, [r7, #4]
+ 8010002:	2009      	movs	r0, #9
+ 8010004:	f000 fe1c 	bl	8010c40 <memp_free>
+      break;
+ 8010008:	e018      	b.n	801003c <tcpip_thread_handle_msg+0x74>
+      break;
+#endif /* LWIP_TCPIP_TIMEOUT && LWIP_TIMERS */
+
+    case TCPIP_MSG_CALLBACK:
+      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK %p\n", (void *)msg));
+      msg->msg.cb.function(msg->msg.cb.ctx);
+ 801000a:	687b      	ldr	r3, [r7, #4]
+ 801000c:	685b      	ldr	r3, [r3, #4]
+ 801000e:	687a      	ldr	r2, [r7, #4]
+ 8010010:	6892      	ldr	r2, [r2, #8]
+ 8010012:	4610      	mov	r0, r2
+ 8010014:	4798      	blx	r3
+      memp_free(MEMP_TCPIP_MSG_API, msg);
+ 8010016:	6879      	ldr	r1, [r7, #4]
+ 8010018:	2008      	movs	r0, #8
+ 801001a:	f000 fe11 	bl	8010c40 <memp_free>
+      break;
+ 801001e:	e00d      	b.n	801003c <tcpip_thread_handle_msg+0x74>
+
+    case TCPIP_MSG_CALLBACK_STATIC:
+      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK_STATIC %p\n", (void *)msg));
+      msg->msg.cb.function(msg->msg.cb.ctx);
+ 8010020:	687b      	ldr	r3, [r7, #4]
+ 8010022:	685b      	ldr	r3, [r3, #4]
+ 8010024:	687a      	ldr	r2, [r7, #4]
+ 8010026:	6892      	ldr	r2, [r2, #8]
+ 8010028:	4610      	mov	r0, r2
+ 801002a:	4798      	blx	r3
+      break;
+ 801002c:	e006      	b.n	801003c <tcpip_thread_handle_msg+0x74>
+
+    default:
+      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: %d\n", msg->type));
+      LWIP_ASSERT("tcpip_thread: invalid message", 0);
+ 801002e:	4b05      	ldr	r3, [pc, #20]	; (8010044 <tcpip_thread_handle_msg+0x7c>)
+ 8010030:	22cf      	movs	r2, #207	; 0xcf
+ 8010032:	4905      	ldr	r1, [pc, #20]	; (8010048 <tcpip_thread_handle_msg+0x80>)
+ 8010034:	4805      	ldr	r0, [pc, #20]	; (801004c <tcpip_thread_handle_msg+0x84>)
+ 8010036:	f00c f9df 	bl	801c3f8 <iprintf>
+      break;
+ 801003a:	bf00      	nop
+  }
+}
+ 801003c:	bf00      	nop
+ 801003e:	3708      	adds	r7, #8
+ 8010040:	46bd      	mov	sp, r7
+ 8010042:	bd80      	pop	{r7, pc}
+ 8010044:	0801d704 	.word	0x0801d704
+ 8010048:	0801d734 	.word	0x0801d734
+ 801004c:	0801d754 	.word	0x0801d754
+
+08010050 <tcpip_inpkt>:
+ * @param inp the network interface on which the packet was received
+ * @param input_fn input function to call
+ */
+err_t
+tcpip_inpkt(struct pbuf *p, struct netif *inp, netif_input_fn input_fn)
+{
+ 8010050:	b580      	push	{r7, lr}
+ 8010052:	b086      	sub	sp, #24
+ 8010054:	af00      	add	r7, sp, #0
+ 8010056:	60f8      	str	r0, [r7, #12]
+ 8010058:	60b9      	str	r1, [r7, #8]
+ 801005a:	607a      	str	r2, [r7, #4]
+  UNLOCK_TCPIP_CORE();
+  return ret;
+#else /* LWIP_TCPIP_CORE_LOCKING_INPUT */
+  struct tcpip_msg *msg;
+
+  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
+ 801005c:	481a      	ldr	r0, [pc, #104]	; (80100c8 <tcpip_inpkt+0x78>)
+ 801005e:	f00c f8d0 	bl	801c202 <sys_mbox_valid>
+ 8010062:	4603      	mov	r3, r0
+ 8010064:	2b00      	cmp	r3, #0
+ 8010066:	d105      	bne.n	8010074 <tcpip_inpkt+0x24>
+ 8010068:	4b18      	ldr	r3, [pc, #96]	; (80100cc <tcpip_inpkt+0x7c>)
+ 801006a:	22fc      	movs	r2, #252	; 0xfc
+ 801006c:	4918      	ldr	r1, [pc, #96]	; (80100d0 <tcpip_inpkt+0x80>)
+ 801006e:	4819      	ldr	r0, [pc, #100]	; (80100d4 <tcpip_inpkt+0x84>)
+ 8010070:	f00c f9c2 	bl	801c3f8 <iprintf>
+
+  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_INPKT);
+ 8010074:	2009      	movs	r0, #9
+ 8010076:	f000 fd91 	bl	8010b9c <memp_malloc>
+ 801007a:	6178      	str	r0, [r7, #20]
+  if (msg == NULL) {
+ 801007c:	697b      	ldr	r3, [r7, #20]
+ 801007e:	2b00      	cmp	r3, #0
+ 8010080:	d102      	bne.n	8010088 <tcpip_inpkt+0x38>
+    return ERR_MEM;
+ 8010082:	f04f 33ff 	mov.w	r3, #4294967295
+ 8010086:	e01a      	b.n	80100be <tcpip_inpkt+0x6e>
+  }
+
+  msg->type = TCPIP_MSG_INPKT;
+ 8010088:	697b      	ldr	r3, [r7, #20]
+ 801008a:	2200      	movs	r2, #0
+ 801008c:	701a      	strb	r2, [r3, #0]
+  msg->msg.inp.p = p;
+ 801008e:	697b      	ldr	r3, [r7, #20]
+ 8010090:	68fa      	ldr	r2, [r7, #12]
+ 8010092:	605a      	str	r2, [r3, #4]
+  msg->msg.inp.netif = inp;
+ 8010094:	697b      	ldr	r3, [r7, #20]
+ 8010096:	68ba      	ldr	r2, [r7, #8]
+ 8010098:	609a      	str	r2, [r3, #8]
+  msg->msg.inp.input_fn = input_fn;
+ 801009a:	697b      	ldr	r3, [r7, #20]
+ 801009c:	687a      	ldr	r2, [r7, #4]
+ 801009e:	60da      	str	r2, [r3, #12]
+  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
+ 80100a0:	6979      	ldr	r1, [r7, #20]
+ 80100a2:	4809      	ldr	r0, [pc, #36]	; (80100c8 <tcpip_inpkt+0x78>)
+ 80100a4:	f00c f854 	bl	801c150 <sys_mbox_trypost>
+ 80100a8:	4603      	mov	r3, r0
+ 80100aa:	2b00      	cmp	r3, #0
+ 80100ac:	d006      	beq.n	80100bc <tcpip_inpkt+0x6c>
+    memp_free(MEMP_TCPIP_MSG_INPKT, msg);
+ 80100ae:	6979      	ldr	r1, [r7, #20]
+ 80100b0:	2009      	movs	r0, #9
+ 80100b2:	f000 fdc5 	bl	8010c40 <memp_free>
+    return ERR_MEM;
+ 80100b6:	f04f 33ff 	mov.w	r3, #4294967295
+ 80100ba:	e000      	b.n	80100be <tcpip_inpkt+0x6e>
+  }
+  return ERR_OK;
+ 80100bc:	2300      	movs	r3, #0
+#endif /* LWIP_TCPIP_CORE_LOCKING_INPUT */
+}
+ 80100be:	4618      	mov	r0, r3
+ 80100c0:	3718      	adds	r7, #24
+ 80100c2:	46bd      	mov	sp, r7
+ 80100c4:	bd80      	pop	{r7, pc}
+ 80100c6:	bf00      	nop
+ 80100c8:	200086cc 	.word	0x200086cc
+ 80100cc:	0801d704 	.word	0x0801d704
+ 80100d0:	0801d77c 	.word	0x0801d77c
+ 80100d4:	0801d754 	.word	0x0801d754
+
+080100d8 <tcpip_input>:
+ *          NETIF_FLAG_ETHERNET flags)
+ * @param inp the network interface on which the packet was received
+ */
+err_t
+tcpip_input(struct pbuf *p, struct netif *inp)
+{
+ 80100d8:	b580      	push	{r7, lr}
+ 80100da:	b082      	sub	sp, #8
+ 80100dc:	af00      	add	r7, sp, #0
+ 80100de:	6078      	str	r0, [r7, #4]
+ 80100e0:	6039      	str	r1, [r7, #0]
+#if LWIP_ETHERNET
+  if (inp->flags & (NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET)) {
+ 80100e2:	683b      	ldr	r3, [r7, #0]
+ 80100e4:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 80100e8:	f003 0318 	and.w	r3, r3, #24
+ 80100ec:	2b00      	cmp	r3, #0
+ 80100ee:	d006      	beq.n	80100fe <tcpip_input+0x26>
+    return tcpip_inpkt(p, inp, ethernet_input);
+ 80100f0:	4a08      	ldr	r2, [pc, #32]	; (8010114 <tcpip_input+0x3c>)
+ 80100f2:	6839      	ldr	r1, [r7, #0]
+ 80100f4:	6878      	ldr	r0, [r7, #4]
+ 80100f6:	f7ff ffab 	bl	8010050 <tcpip_inpkt>
+ 80100fa:	4603      	mov	r3, r0
+ 80100fc:	e005      	b.n	801010a <tcpip_input+0x32>
+  } else
+#endif /* LWIP_ETHERNET */
+    return tcpip_inpkt(p, inp, ip_input);
+ 80100fe:	4a06      	ldr	r2, [pc, #24]	; (8010118 <tcpip_input+0x40>)
+ 8010100:	6839      	ldr	r1, [r7, #0]
+ 8010102:	6878      	ldr	r0, [r7, #4]
+ 8010104:	f7ff ffa4 	bl	8010050 <tcpip_inpkt>
+ 8010108:	4603      	mov	r3, r0
+}
+ 801010a:	4618      	mov	r0, r3
+ 801010c:	3708      	adds	r7, #8
+ 801010e:	46bd      	mov	sp, r7
+ 8010110:	bd80      	pop	{r7, pc}
+ 8010112:	bf00      	nop
+ 8010114:	0801bf61 	.word	0x0801bf61
+ 8010118:	0801ae45 	.word	0x0801ae45
+
+0801011c <tcpip_try_callback>:
+ *
+ * @see tcpip_callback
+ */
+err_t
+tcpip_try_callback(tcpip_callback_fn function, void *ctx)
+{
+ 801011c:	b580      	push	{r7, lr}
+ 801011e:	b084      	sub	sp, #16
+ 8010120:	af00      	add	r7, sp, #0
+ 8010122:	6078      	str	r0, [r7, #4]
+ 8010124:	6039      	str	r1, [r7, #0]
+  struct tcpip_msg *msg;
+
+  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
+ 8010126:	4819      	ldr	r0, [pc, #100]	; (801018c <tcpip_try_callback+0x70>)
+ 8010128:	f00c f86b 	bl	801c202 <sys_mbox_valid>
+ 801012c:	4603      	mov	r3, r0
+ 801012e:	2b00      	cmp	r3, #0
+ 8010130:	d106      	bne.n	8010140 <tcpip_try_callback+0x24>
+ 8010132:	4b17      	ldr	r3, [pc, #92]	; (8010190 <tcpip_try_callback+0x74>)
+ 8010134:	f240 125d 	movw	r2, #349	; 0x15d
+ 8010138:	4916      	ldr	r1, [pc, #88]	; (8010194 <tcpip_try_callback+0x78>)
+ 801013a:	4817      	ldr	r0, [pc, #92]	; (8010198 <tcpip_try_callback+0x7c>)
+ 801013c:	f00c f95c 	bl	801c3f8 <iprintf>
+
+  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_API);
+ 8010140:	2008      	movs	r0, #8
+ 8010142:	f000 fd2b 	bl	8010b9c <memp_malloc>
+ 8010146:	60f8      	str	r0, [r7, #12]
+  if (msg == NULL) {
+ 8010148:	68fb      	ldr	r3, [r7, #12]
+ 801014a:	2b00      	cmp	r3, #0
+ 801014c:	d102      	bne.n	8010154 <tcpip_try_callback+0x38>
+    return ERR_MEM;
+ 801014e:	f04f 33ff 	mov.w	r3, #4294967295
+ 8010152:	e017      	b.n	8010184 <tcpip_try_callback+0x68>
+  }
+
+  msg->type = TCPIP_MSG_CALLBACK;
+ 8010154:	68fb      	ldr	r3, [r7, #12]
+ 8010156:	2201      	movs	r2, #1
+ 8010158:	701a      	strb	r2, [r3, #0]
+  msg->msg.cb.function = function;
+ 801015a:	68fb      	ldr	r3, [r7, #12]
+ 801015c:	687a      	ldr	r2, [r7, #4]
+ 801015e:	605a      	str	r2, [r3, #4]
+  msg->msg.cb.ctx = ctx;
+ 8010160:	68fb      	ldr	r3, [r7, #12]
+ 8010162:	683a      	ldr	r2, [r7, #0]
+ 8010164:	609a      	str	r2, [r3, #8]
+
+  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
+ 8010166:	68f9      	ldr	r1, [r7, #12]
+ 8010168:	4808      	ldr	r0, [pc, #32]	; (801018c <tcpip_try_callback+0x70>)
+ 801016a:	f00b fff1 	bl	801c150 <sys_mbox_trypost>
+ 801016e:	4603      	mov	r3, r0
+ 8010170:	2b00      	cmp	r3, #0
+ 8010172:	d006      	beq.n	8010182 <tcpip_try_callback+0x66>
+    memp_free(MEMP_TCPIP_MSG_API, msg);
+ 8010174:	68f9      	ldr	r1, [r7, #12]
+ 8010176:	2008      	movs	r0, #8
+ 8010178:	f000 fd62 	bl	8010c40 <memp_free>
+    return ERR_MEM;
+ 801017c:	f04f 33ff 	mov.w	r3, #4294967295
+ 8010180:	e000      	b.n	8010184 <tcpip_try_callback+0x68>
+  }
+  return ERR_OK;
+ 8010182:	2300      	movs	r3, #0
+}
+ 8010184:	4618      	mov	r0, r3
+ 8010186:	3710      	adds	r7, #16
+ 8010188:	46bd      	mov	sp, r7
+ 801018a:	bd80      	pop	{r7, pc}
+ 801018c:	200086cc 	.word	0x200086cc
+ 8010190:	0801d704 	.word	0x0801d704
+ 8010194:	0801d77c 	.word	0x0801d77c
+ 8010198:	0801d754 	.word	0x0801d754
+
+0801019c <tcpip_init>:
+ * @param initfunc a function to call when tcpip_thread is running and finished initializing
+ * @param arg argument to pass to initfunc
+ */
+void
+tcpip_init(tcpip_init_done_fn initfunc, void *arg)
+{
+ 801019c:	b580      	push	{r7, lr}
+ 801019e:	b084      	sub	sp, #16
+ 80101a0:	af02      	add	r7, sp, #8
+ 80101a2:	6078      	str	r0, [r7, #4]
+ 80101a4:	6039      	str	r1, [r7, #0]
+  lwip_init();
+ 80101a6:	f000 f871 	bl	801028c <lwip_init>
+
+  tcpip_init_done = initfunc;
+ 80101aa:	4a17      	ldr	r2, [pc, #92]	; (8010208 <tcpip_init+0x6c>)
+ 80101ac:	687b      	ldr	r3, [r7, #4]
+ 80101ae:	6013      	str	r3, [r2, #0]
+  tcpip_init_done_arg = arg;
+ 80101b0:	4a16      	ldr	r2, [pc, #88]	; (801020c <tcpip_init+0x70>)
+ 80101b2:	683b      	ldr	r3, [r7, #0]
+ 80101b4:	6013      	str	r3, [r2, #0]
+  if (sys_mbox_new(&tcpip_mbox, TCPIP_MBOX_SIZE) != ERR_OK) {
+ 80101b6:	2106      	movs	r1, #6
+ 80101b8:	4815      	ldr	r0, [pc, #84]	; (8010210 <tcpip_init+0x74>)
+ 80101ba:	f00b ffa7 	bl	801c10c <sys_mbox_new>
+ 80101be:	4603      	mov	r3, r0
+ 80101c0:	2b00      	cmp	r3, #0
+ 80101c2:	d006      	beq.n	80101d2 <tcpip_init+0x36>
+    LWIP_ASSERT("failed to create tcpip_thread mbox", 0);
+ 80101c4:	4b13      	ldr	r3, [pc, #76]	; (8010214 <tcpip_init+0x78>)
+ 80101c6:	f240 2261 	movw	r2, #609	; 0x261
+ 80101ca:	4913      	ldr	r1, [pc, #76]	; (8010218 <tcpip_init+0x7c>)
+ 80101cc:	4813      	ldr	r0, [pc, #76]	; (801021c <tcpip_init+0x80>)
+ 80101ce:	f00c f913 	bl	801c3f8 <iprintf>
+  }
+#if LWIP_TCPIP_CORE_LOCKING
+  if (sys_mutex_new(&lock_tcpip_core) != ERR_OK) {
+ 80101d2:	4813      	ldr	r0, [pc, #76]	; (8010220 <tcpip_init+0x84>)
+ 80101d4:	f00c f834 	bl	801c240 <sys_mutex_new>
+ 80101d8:	4603      	mov	r3, r0
+ 80101da:	2b00      	cmp	r3, #0
+ 80101dc:	d006      	beq.n	80101ec <tcpip_init+0x50>
+    LWIP_ASSERT("failed to create lock_tcpip_core", 0);
+ 80101de:	4b0d      	ldr	r3, [pc, #52]	; (8010214 <tcpip_init+0x78>)
+ 80101e0:	f240 2265 	movw	r2, #613	; 0x265
+ 80101e4:	490f      	ldr	r1, [pc, #60]	; (8010224 <tcpip_init+0x88>)
+ 80101e6:	480d      	ldr	r0, [pc, #52]	; (801021c <tcpip_init+0x80>)
+ 80101e8:	f00c f906 	bl	801c3f8 <iprintf>
+  }
+#endif /* LWIP_TCPIP_CORE_LOCKING */
+
+  sys_thread_new(TCPIP_THREAD_NAME, tcpip_thread, NULL, TCPIP_THREAD_STACKSIZE, TCPIP_THREAD_PRIO);
+ 80101ec:	2300      	movs	r3, #0
+ 80101ee:	9300      	str	r3, [sp, #0]
+ 80101f0:	f44f 6380 	mov.w	r3, #1024	; 0x400
+ 80101f4:	2200      	movs	r2, #0
+ 80101f6:	490c      	ldr	r1, [pc, #48]	; (8010228 <tcpip_init+0x8c>)
+ 80101f8:	480c      	ldr	r0, [pc, #48]	; (801022c <tcpip_init+0x90>)
+ 80101fa:	f00c f859 	bl	801c2b0 <sys_thread_new>
+}
+ 80101fe:	bf00      	nop
+ 8010200:	3708      	adds	r7, #8
+ 8010202:	46bd      	mov	sp, r7
+ 8010204:	bd80      	pop	{r7, pc}
+ 8010206:	bf00      	nop
+ 8010208:	200086c4 	.word	0x200086c4
+ 801020c:	200086c8 	.word	0x200086c8
+ 8010210:	200086cc 	.word	0x200086cc
+ 8010214:	0801d704 	.word	0x0801d704
+ 8010218:	0801d78c 	.word	0x0801d78c
+ 801021c:	0801d754 	.word	0x0801d754
+ 8010220:	2000c0b0 	.word	0x2000c0b0
+ 8010224:	0801d7b0 	.word	0x0801d7b0
+ 8010228:	0800ff61 	.word	0x0800ff61
+ 801022c:	0801d7d4 	.word	0x0801d7d4
+
+08010230 <lwip_htons>:
+ * @param n u16_t in host byte order
+ * @return n in network byte order
+ */
+u16_t
+lwip_htons(u16_t n)
+{
+ 8010230:	b480      	push	{r7}
+ 8010232:	b083      	sub	sp, #12
+ 8010234:	af00      	add	r7, sp, #0
+ 8010236:	4603      	mov	r3, r0
+ 8010238:	80fb      	strh	r3, [r7, #6]
+  return PP_HTONS(n);
+ 801023a:	88fb      	ldrh	r3, [r7, #6]
+ 801023c:	021b      	lsls	r3, r3, #8
+ 801023e:	b21a      	sxth	r2, r3
+ 8010240:	88fb      	ldrh	r3, [r7, #6]
+ 8010242:	0a1b      	lsrs	r3, r3, #8
+ 8010244:	b29b      	uxth	r3, r3
+ 8010246:	b21b      	sxth	r3, r3
+ 8010248:	4313      	orrs	r3, r2
+ 801024a:	b21b      	sxth	r3, r3
+ 801024c:	b29b      	uxth	r3, r3
+}
+ 801024e:	4618      	mov	r0, r3
+ 8010250:	370c      	adds	r7, #12
+ 8010252:	46bd      	mov	sp, r7
+ 8010254:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8010258:	4770      	bx	lr
+
+0801025a <lwip_htonl>:
+ * @param n u32_t in host byte order
+ * @return n in network byte order
+ */
+u32_t
+lwip_htonl(u32_t n)
+{
+ 801025a:	b480      	push	{r7}
+ 801025c:	b083      	sub	sp, #12
+ 801025e:	af00      	add	r7, sp, #0
+ 8010260:	6078      	str	r0, [r7, #4]
+  return PP_HTONL(n);
+ 8010262:	687b      	ldr	r3, [r7, #4]
+ 8010264:	061a      	lsls	r2, r3, #24
+ 8010266:	687b      	ldr	r3, [r7, #4]
+ 8010268:	021b      	lsls	r3, r3, #8
+ 801026a:	f403 037f 	and.w	r3, r3, #16711680	; 0xff0000
+ 801026e:	431a      	orrs	r2, r3
+ 8010270:	687b      	ldr	r3, [r7, #4]
+ 8010272:	0a1b      	lsrs	r3, r3, #8
+ 8010274:	f403 437f 	and.w	r3, r3, #65280	; 0xff00
+ 8010278:	431a      	orrs	r2, r3
+ 801027a:	687b      	ldr	r3, [r7, #4]
+ 801027c:	0e1b      	lsrs	r3, r3, #24
+ 801027e:	4313      	orrs	r3, r2
+}
+ 8010280:	4618      	mov	r0, r3
+ 8010282:	370c      	adds	r7, #12
+ 8010284:	46bd      	mov	sp, r7
+ 8010286:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 801028a:	4770      	bx	lr
+
+0801028c <lwip_init>:
+ * Initialize all modules.
+ * Use this in NO_SYS mode. Use tcpip_init() otherwise.
+ */
+void
+lwip_init(void)
+{
+ 801028c:	b580      	push	{r7, lr}
+ 801028e:	b082      	sub	sp, #8
+ 8010290:	af00      	add	r7, sp, #0
+#ifndef LWIP_SKIP_CONST_CHECK
+  int a = 0;
+ 8010292:	2300      	movs	r3, #0
+ 8010294:	607b      	str	r3, [r7, #4]
+#endif
+
+  /* Modules initialization */
+  stats_init();
+#if !NO_SYS
+  sys_init();
+ 8010296:	f00b ffc5 	bl	801c224 <sys_init>
+#endif /* !NO_SYS */
+  mem_init();
+ 801029a:	f000 f8d5 	bl	8010448 <mem_init>
+  memp_init();
+ 801029e:	f000 fc31 	bl	8010b04 <memp_init>
+  pbuf_init();
+  netif_init();
+ 80102a2:	f000 fcf7 	bl	8010c94 <netif_init>
+#endif /* LWIP_IPV4 */
+#if LWIP_RAW
+  raw_init();
+#endif /* LWIP_RAW */
+#if LWIP_UDP
+  udp_init();
+ 80102a6:	f007 f8f5 	bl	8017494 <udp_init>
+#endif /* LWIP_UDP */
+#if LWIP_TCP
+  tcp_init();
+ 80102aa:	f001 fe1f 	bl	8011eec <tcp_init>
+#if PPP_SUPPORT
+  ppp_init();
+#endif
+
+#if LWIP_TIMERS
+  sys_timeouts_init();
+ 80102ae:	f007 f839 	bl	8017324 <sys_timeouts_init>
+#endif /* LWIP_TIMERS */
+}
+ 80102b2:	bf00      	nop
+ 80102b4:	3708      	adds	r7, #8
+ 80102b6:	46bd      	mov	sp, r7
+ 80102b8:	bd80      	pop	{r7, pc}
+	...
+
+080102bc <ptr_to_mem>:
+#define mem_overflow_check_element(mem)
+#endif /* MEM_OVERFLOW_CHECK */
+
+static struct mem *
+ptr_to_mem(mem_size_t ptr)
+{
+ 80102bc:	b480      	push	{r7}
+ 80102be:	b083      	sub	sp, #12
+ 80102c0:	af00      	add	r7, sp, #0
+ 80102c2:	4603      	mov	r3, r0
+ 80102c4:	80fb      	strh	r3, [r7, #6]
+  return (struct mem *)(void *)&ram[ptr];
+ 80102c6:	4b05      	ldr	r3, [pc, #20]	; (80102dc <ptr_to_mem+0x20>)
+ 80102c8:	681a      	ldr	r2, [r3, #0]
+ 80102ca:	88fb      	ldrh	r3, [r7, #6]
+ 80102cc:	4413      	add	r3, r2
+}
+ 80102ce:	4618      	mov	r0, r3
+ 80102d0:	370c      	adds	r7, #12
+ 80102d2:	46bd      	mov	sp, r7
+ 80102d4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80102d8:	4770      	bx	lr
+ 80102da:	bf00      	nop
+ 80102dc:	200086d0 	.word	0x200086d0
+
+080102e0 <mem_to_ptr>:
+
+static mem_size_t
+mem_to_ptr(void *mem)
+{
+ 80102e0:	b480      	push	{r7}
+ 80102e2:	b083      	sub	sp, #12
+ 80102e4:	af00      	add	r7, sp, #0
+ 80102e6:	6078      	str	r0, [r7, #4]
+  return (mem_size_t)((u8_t *)mem - ram);
+ 80102e8:	687b      	ldr	r3, [r7, #4]
+ 80102ea:	4a05      	ldr	r2, [pc, #20]	; (8010300 <mem_to_ptr+0x20>)
+ 80102ec:	6812      	ldr	r2, [r2, #0]
+ 80102ee:	1a9b      	subs	r3, r3, r2
+ 80102f0:	b29b      	uxth	r3, r3
+}
+ 80102f2:	4618      	mov	r0, r3
+ 80102f4:	370c      	adds	r7, #12
+ 80102f6:	46bd      	mov	sp, r7
+ 80102f8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80102fc:	4770      	bx	lr
+ 80102fe:	bf00      	nop
+ 8010300:	200086d0 	.word	0x200086d0
+
+08010304 <plug_holes>:
+ * This assumes access to the heap is protected by the calling function
+ * already.
+ */
+static void
+plug_holes(struct mem *mem)
+{
+ 8010304:	b590      	push	{r4, r7, lr}
+ 8010306:	b085      	sub	sp, #20
+ 8010308:	af00      	add	r7, sp, #0
+ 801030a:	6078      	str	r0, [r7, #4]
+  struct mem *nmem;
+  struct mem *pmem;
+
+  LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram);
+ 801030c:	4b45      	ldr	r3, [pc, #276]	; (8010424 <plug_holes+0x120>)
+ 801030e:	681b      	ldr	r3, [r3, #0]
+ 8010310:	687a      	ldr	r2, [r7, #4]
+ 8010312:	429a      	cmp	r2, r3
+ 8010314:	d206      	bcs.n	8010324 <plug_holes+0x20>
+ 8010316:	4b44      	ldr	r3, [pc, #272]	; (8010428 <plug_holes+0x124>)
+ 8010318:	f240 12df 	movw	r2, #479	; 0x1df
+ 801031c:	4943      	ldr	r1, [pc, #268]	; (801042c <plug_holes+0x128>)
+ 801031e:	4844      	ldr	r0, [pc, #272]	; (8010430 <plug_holes+0x12c>)
+ 8010320:	f00c f86a 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end);
+ 8010324:	4b43      	ldr	r3, [pc, #268]	; (8010434 <plug_holes+0x130>)
+ 8010326:	681b      	ldr	r3, [r3, #0]
+ 8010328:	687a      	ldr	r2, [r7, #4]
+ 801032a:	429a      	cmp	r2, r3
+ 801032c:	d306      	bcc.n	801033c <plug_holes+0x38>
+ 801032e:	4b3e      	ldr	r3, [pc, #248]	; (8010428 <plug_holes+0x124>)
+ 8010330:	f44f 72f0 	mov.w	r2, #480	; 0x1e0
+ 8010334:	4940      	ldr	r1, [pc, #256]	; (8010438 <plug_holes+0x134>)
+ 8010336:	483e      	ldr	r0, [pc, #248]	; (8010430 <plug_holes+0x12c>)
+ 8010338:	f00c f85e 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0);
+ 801033c:	687b      	ldr	r3, [r7, #4]
+ 801033e:	791b      	ldrb	r3, [r3, #4]
+ 8010340:	2b00      	cmp	r3, #0
+ 8010342:	d006      	beq.n	8010352 <plug_holes+0x4e>
+ 8010344:	4b38      	ldr	r3, [pc, #224]	; (8010428 <plug_holes+0x124>)
+ 8010346:	f240 12e1 	movw	r2, #481	; 0x1e1
+ 801034a:	493c      	ldr	r1, [pc, #240]	; (801043c <plug_holes+0x138>)
+ 801034c:	4838      	ldr	r0, [pc, #224]	; (8010430 <plug_holes+0x12c>)
+ 801034e:	f00c f853 	bl	801c3f8 <iprintf>
+
+  /* plug hole forward */
+  LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED);
+ 8010352:	687b      	ldr	r3, [r7, #4]
+ 8010354:	881b      	ldrh	r3, [r3, #0]
+ 8010356:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 801035a:	d906      	bls.n	801036a <plug_holes+0x66>
+ 801035c:	4b32      	ldr	r3, [pc, #200]	; (8010428 <plug_holes+0x124>)
+ 801035e:	f44f 72f2 	mov.w	r2, #484	; 0x1e4
+ 8010362:	4937      	ldr	r1, [pc, #220]	; (8010440 <plug_holes+0x13c>)
+ 8010364:	4832      	ldr	r0, [pc, #200]	; (8010430 <plug_holes+0x12c>)
+ 8010366:	f00c f847 	bl	801c3f8 <iprintf>
+
+  nmem = ptr_to_mem(mem->next);
+ 801036a:	687b      	ldr	r3, [r7, #4]
+ 801036c:	881b      	ldrh	r3, [r3, #0]
+ 801036e:	4618      	mov	r0, r3
+ 8010370:	f7ff ffa4 	bl	80102bc <ptr_to_mem>
+ 8010374:	60f8      	str	r0, [r7, #12]
+  if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) {
+ 8010376:	687a      	ldr	r2, [r7, #4]
+ 8010378:	68fb      	ldr	r3, [r7, #12]
+ 801037a:	429a      	cmp	r2, r3
+ 801037c:	d024      	beq.n	80103c8 <plug_holes+0xc4>
+ 801037e:	68fb      	ldr	r3, [r7, #12]
+ 8010380:	791b      	ldrb	r3, [r3, #4]
+ 8010382:	2b00      	cmp	r3, #0
+ 8010384:	d120      	bne.n	80103c8 <plug_holes+0xc4>
+ 8010386:	4b2b      	ldr	r3, [pc, #172]	; (8010434 <plug_holes+0x130>)
+ 8010388:	681b      	ldr	r3, [r3, #0]
+ 801038a:	68fa      	ldr	r2, [r7, #12]
+ 801038c:	429a      	cmp	r2, r3
+ 801038e:	d01b      	beq.n	80103c8 <plug_holes+0xc4>
+    /* if mem->next is unused and not end of ram, combine mem and mem->next */
+    if (lfree == nmem) {
+ 8010390:	4b2c      	ldr	r3, [pc, #176]	; (8010444 <plug_holes+0x140>)
+ 8010392:	681b      	ldr	r3, [r3, #0]
+ 8010394:	68fa      	ldr	r2, [r7, #12]
+ 8010396:	429a      	cmp	r2, r3
+ 8010398:	d102      	bne.n	80103a0 <plug_holes+0x9c>
+      lfree = mem;
+ 801039a:	4a2a      	ldr	r2, [pc, #168]	; (8010444 <plug_holes+0x140>)
+ 801039c:	687b      	ldr	r3, [r7, #4]
+ 801039e:	6013      	str	r3, [r2, #0]
+    }
+    mem->next = nmem->next;
+ 80103a0:	68fb      	ldr	r3, [r7, #12]
+ 80103a2:	881a      	ldrh	r2, [r3, #0]
+ 80103a4:	687b      	ldr	r3, [r7, #4]
+ 80103a6:	801a      	strh	r2, [r3, #0]
+    if (nmem->next != MEM_SIZE_ALIGNED) {
+ 80103a8:	68fb      	ldr	r3, [r7, #12]
+ 80103aa:	881b      	ldrh	r3, [r3, #0]
+ 80103ac:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 80103b0:	d00a      	beq.n	80103c8 <plug_holes+0xc4>
+      ptr_to_mem(nmem->next)->prev = mem_to_ptr(mem);
+ 80103b2:	68fb      	ldr	r3, [r7, #12]
+ 80103b4:	881b      	ldrh	r3, [r3, #0]
+ 80103b6:	4618      	mov	r0, r3
+ 80103b8:	f7ff ff80 	bl	80102bc <ptr_to_mem>
+ 80103bc:	4604      	mov	r4, r0
+ 80103be:	6878      	ldr	r0, [r7, #4]
+ 80103c0:	f7ff ff8e 	bl	80102e0 <mem_to_ptr>
+ 80103c4:	4603      	mov	r3, r0
+ 80103c6:	8063      	strh	r3, [r4, #2]
+    }
+  }
+
+  /* plug hole backward */
+  pmem = ptr_to_mem(mem->prev);
+ 80103c8:	687b      	ldr	r3, [r7, #4]
+ 80103ca:	885b      	ldrh	r3, [r3, #2]
+ 80103cc:	4618      	mov	r0, r3
+ 80103ce:	f7ff ff75 	bl	80102bc <ptr_to_mem>
+ 80103d2:	60b8      	str	r0, [r7, #8]
+  if (pmem != mem && pmem->used == 0) {
+ 80103d4:	68ba      	ldr	r2, [r7, #8]
+ 80103d6:	687b      	ldr	r3, [r7, #4]
+ 80103d8:	429a      	cmp	r2, r3
+ 80103da:	d01f      	beq.n	801041c <plug_holes+0x118>
+ 80103dc:	68bb      	ldr	r3, [r7, #8]
+ 80103de:	791b      	ldrb	r3, [r3, #4]
+ 80103e0:	2b00      	cmp	r3, #0
+ 80103e2:	d11b      	bne.n	801041c <plug_holes+0x118>
+    /* if mem->prev is unused, combine mem and mem->prev */
+    if (lfree == mem) {
+ 80103e4:	4b17      	ldr	r3, [pc, #92]	; (8010444 <plug_holes+0x140>)
+ 80103e6:	681b      	ldr	r3, [r3, #0]
+ 80103e8:	687a      	ldr	r2, [r7, #4]
+ 80103ea:	429a      	cmp	r2, r3
+ 80103ec:	d102      	bne.n	80103f4 <plug_holes+0xf0>
+      lfree = pmem;
+ 80103ee:	4a15      	ldr	r2, [pc, #84]	; (8010444 <plug_holes+0x140>)
+ 80103f0:	68bb      	ldr	r3, [r7, #8]
+ 80103f2:	6013      	str	r3, [r2, #0]
+    }
+    pmem->next = mem->next;
+ 80103f4:	687b      	ldr	r3, [r7, #4]
+ 80103f6:	881a      	ldrh	r2, [r3, #0]
+ 80103f8:	68bb      	ldr	r3, [r7, #8]
+ 80103fa:	801a      	strh	r2, [r3, #0]
+    if (mem->next != MEM_SIZE_ALIGNED) {
+ 80103fc:	687b      	ldr	r3, [r7, #4]
+ 80103fe:	881b      	ldrh	r3, [r3, #0]
+ 8010400:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 8010404:	d00a      	beq.n	801041c <plug_holes+0x118>
+      ptr_to_mem(mem->next)->prev = mem_to_ptr(pmem);
+ 8010406:	687b      	ldr	r3, [r7, #4]
+ 8010408:	881b      	ldrh	r3, [r3, #0]
+ 801040a:	4618      	mov	r0, r3
+ 801040c:	f7ff ff56 	bl	80102bc <ptr_to_mem>
+ 8010410:	4604      	mov	r4, r0
+ 8010412:	68b8      	ldr	r0, [r7, #8]
+ 8010414:	f7ff ff64 	bl	80102e0 <mem_to_ptr>
+ 8010418:	4603      	mov	r3, r0
+ 801041a:	8063      	strh	r3, [r4, #2]
+    }
+  }
+}
+ 801041c:	bf00      	nop
+ 801041e:	3714      	adds	r7, #20
+ 8010420:	46bd      	mov	sp, r7
+ 8010422:	bd90      	pop	{r4, r7, pc}
+ 8010424:	200086d0 	.word	0x200086d0
+ 8010428:	0801d7e4 	.word	0x0801d7e4
+ 801042c:	0801d814 	.word	0x0801d814
+ 8010430:	0801d82c 	.word	0x0801d82c
+ 8010434:	200086d4 	.word	0x200086d4
+ 8010438:	0801d854 	.word	0x0801d854
+ 801043c:	0801d870 	.word	0x0801d870
+ 8010440:	0801d88c 	.word	0x0801d88c
+ 8010444:	200086dc 	.word	0x200086dc
+
+08010448 <mem_init>:
+/**
+ * Zero the heap and initialize start, end and lowest-free
+ */
+void
+mem_init(void)
+{
+ 8010448:	b580      	push	{r7, lr}
+ 801044a:	b082      	sub	sp, #8
+ 801044c:	af00      	add	r7, sp, #0
+
+  LWIP_ASSERT("Sanity check alignment",
+              (SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT - 1)) == 0);
+
+  /* align the heap */
+  ram = (u8_t *)LWIP_MEM_ALIGN(LWIP_RAM_HEAP_POINTER);
+ 801044e:	4b1f      	ldr	r3, [pc, #124]	; (80104cc <mem_init+0x84>)
+ 8010450:	3303      	adds	r3, #3
+ 8010452:	f023 0303 	bic.w	r3, r3, #3
+ 8010456:	461a      	mov	r2, r3
+ 8010458:	4b1d      	ldr	r3, [pc, #116]	; (80104d0 <mem_init+0x88>)
+ 801045a:	601a      	str	r2, [r3, #0]
+  /* initialize the start of the heap */
+  mem = (struct mem *)(void *)ram;
+ 801045c:	4b1c      	ldr	r3, [pc, #112]	; (80104d0 <mem_init+0x88>)
+ 801045e:	681b      	ldr	r3, [r3, #0]
+ 8010460:	607b      	str	r3, [r7, #4]
+  mem->next = MEM_SIZE_ALIGNED;
+ 8010462:	687b      	ldr	r3, [r7, #4]
+ 8010464:	f44f 62c8 	mov.w	r2, #1600	; 0x640
+ 8010468:	801a      	strh	r2, [r3, #0]
+  mem->prev = 0;
+ 801046a:	687b      	ldr	r3, [r7, #4]
+ 801046c:	2200      	movs	r2, #0
+ 801046e:	805a      	strh	r2, [r3, #2]
+  mem->used = 0;
+ 8010470:	687b      	ldr	r3, [r7, #4]
+ 8010472:	2200      	movs	r2, #0
+ 8010474:	711a      	strb	r2, [r3, #4]
+  /* initialize the end of the heap */
+  ram_end = ptr_to_mem(MEM_SIZE_ALIGNED);
+ 8010476:	f44f 60c8 	mov.w	r0, #1600	; 0x640
+ 801047a:	f7ff ff1f 	bl	80102bc <ptr_to_mem>
+ 801047e:	4602      	mov	r2, r0
+ 8010480:	4b14      	ldr	r3, [pc, #80]	; (80104d4 <mem_init+0x8c>)
+ 8010482:	601a      	str	r2, [r3, #0]
+  ram_end->used = 1;
+ 8010484:	4b13      	ldr	r3, [pc, #76]	; (80104d4 <mem_init+0x8c>)
+ 8010486:	681b      	ldr	r3, [r3, #0]
+ 8010488:	2201      	movs	r2, #1
+ 801048a:	711a      	strb	r2, [r3, #4]
+  ram_end->next = MEM_SIZE_ALIGNED;
+ 801048c:	4b11      	ldr	r3, [pc, #68]	; (80104d4 <mem_init+0x8c>)
+ 801048e:	681b      	ldr	r3, [r3, #0]
+ 8010490:	f44f 62c8 	mov.w	r2, #1600	; 0x640
+ 8010494:	801a      	strh	r2, [r3, #0]
+  ram_end->prev = MEM_SIZE_ALIGNED;
+ 8010496:	4b0f      	ldr	r3, [pc, #60]	; (80104d4 <mem_init+0x8c>)
+ 8010498:	681b      	ldr	r3, [r3, #0]
+ 801049a:	f44f 62c8 	mov.w	r2, #1600	; 0x640
+ 801049e:	805a      	strh	r2, [r3, #2]
+  MEM_SANITY();
+
+  /* initialize the lowest-free pointer to the start of the heap */
+  lfree = (struct mem *)(void *)ram;
+ 80104a0:	4b0b      	ldr	r3, [pc, #44]	; (80104d0 <mem_init+0x88>)
+ 80104a2:	681b      	ldr	r3, [r3, #0]
+ 80104a4:	4a0c      	ldr	r2, [pc, #48]	; (80104d8 <mem_init+0x90>)
+ 80104a6:	6013      	str	r3, [r2, #0]
+
+  MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED);
+
+  if (sys_mutex_new(&mem_mutex) != ERR_OK) {
+ 80104a8:	480c      	ldr	r0, [pc, #48]	; (80104dc <mem_init+0x94>)
+ 80104aa:	f00b fec9 	bl	801c240 <sys_mutex_new>
+ 80104ae:	4603      	mov	r3, r0
+ 80104b0:	2b00      	cmp	r3, #0
+ 80104b2:	d006      	beq.n	80104c2 <mem_init+0x7a>
+    LWIP_ASSERT("failed to create mem_mutex", 0);
+ 80104b4:	4b0a      	ldr	r3, [pc, #40]	; (80104e0 <mem_init+0x98>)
+ 80104b6:	f240 221f 	movw	r2, #543	; 0x21f
+ 80104ba:	490a      	ldr	r1, [pc, #40]	; (80104e4 <mem_init+0x9c>)
+ 80104bc:	480a      	ldr	r0, [pc, #40]	; (80104e8 <mem_init+0xa0>)
+ 80104be:	f00b ff9b 	bl	801c3f8 <iprintf>
+  }
+}
+ 80104c2:	bf00      	nop
+ 80104c4:	3708      	adds	r7, #8
+ 80104c6:	46bd      	mov	sp, r7
+ 80104c8:	bd80      	pop	{r7, pc}
+ 80104ca:	bf00      	nop
+ 80104cc:	2000c0cc 	.word	0x2000c0cc
+ 80104d0:	200086d0 	.word	0x200086d0
+ 80104d4:	200086d4 	.word	0x200086d4
+ 80104d8:	200086dc 	.word	0x200086dc
+ 80104dc:	200086d8 	.word	0x200086d8
+ 80104e0:	0801d7e4 	.word	0x0801d7e4
+ 80104e4:	0801d8b8 	.word	0x0801d8b8
+ 80104e8:	0801d82c 	.word	0x0801d82c
+
+080104ec <mem_link_valid>:
+/* Check if a struct mem is correctly linked.
+ * If not, double-free is a possible reason.
+ */
+static int
+mem_link_valid(struct mem *mem)
+{
+ 80104ec:	b580      	push	{r7, lr}
+ 80104ee:	b086      	sub	sp, #24
+ 80104f0:	af00      	add	r7, sp, #0
+ 80104f2:	6078      	str	r0, [r7, #4]
+  struct mem *nmem, *pmem;
+  mem_size_t rmem_idx;
+  rmem_idx = mem_to_ptr(mem);
+ 80104f4:	6878      	ldr	r0, [r7, #4]
+ 80104f6:	f7ff fef3 	bl	80102e0 <mem_to_ptr>
+ 80104fa:	4603      	mov	r3, r0
+ 80104fc:	82fb      	strh	r3, [r7, #22]
+  nmem = ptr_to_mem(mem->next);
+ 80104fe:	687b      	ldr	r3, [r7, #4]
+ 8010500:	881b      	ldrh	r3, [r3, #0]
+ 8010502:	4618      	mov	r0, r3
+ 8010504:	f7ff feda 	bl	80102bc <ptr_to_mem>
+ 8010508:	6138      	str	r0, [r7, #16]
+  pmem = ptr_to_mem(mem->prev);
+ 801050a:	687b      	ldr	r3, [r7, #4]
+ 801050c:	885b      	ldrh	r3, [r3, #2]
+ 801050e:	4618      	mov	r0, r3
+ 8010510:	f7ff fed4 	bl	80102bc <ptr_to_mem>
+ 8010514:	60f8      	str	r0, [r7, #12]
+  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
+ 8010516:	687b      	ldr	r3, [r7, #4]
+ 8010518:	881b      	ldrh	r3, [r3, #0]
+ 801051a:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 801051e:	d818      	bhi.n	8010552 <mem_link_valid+0x66>
+ 8010520:	687b      	ldr	r3, [r7, #4]
+ 8010522:	885b      	ldrh	r3, [r3, #2]
+ 8010524:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 8010528:	d813      	bhi.n	8010552 <mem_link_valid+0x66>
+      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
+ 801052a:	687b      	ldr	r3, [r7, #4]
+ 801052c:	885b      	ldrh	r3, [r3, #2]
+  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
+ 801052e:	8afa      	ldrh	r2, [r7, #22]
+ 8010530:	429a      	cmp	r2, r3
+ 8010532:	d004      	beq.n	801053e <mem_link_valid+0x52>
+      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
+ 8010534:	68fb      	ldr	r3, [r7, #12]
+ 8010536:	881b      	ldrh	r3, [r3, #0]
+ 8010538:	8afa      	ldrh	r2, [r7, #22]
+ 801053a:	429a      	cmp	r2, r3
+ 801053c:	d109      	bne.n	8010552 <mem_link_valid+0x66>
+      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
+ 801053e:	4b08      	ldr	r3, [pc, #32]	; (8010560 <mem_link_valid+0x74>)
+ 8010540:	681b      	ldr	r3, [r3, #0]
+      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
+ 8010542:	693a      	ldr	r2, [r7, #16]
+ 8010544:	429a      	cmp	r2, r3
+ 8010546:	d006      	beq.n	8010556 <mem_link_valid+0x6a>
+      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
+ 8010548:	693b      	ldr	r3, [r7, #16]
+ 801054a:	885b      	ldrh	r3, [r3, #2]
+ 801054c:	8afa      	ldrh	r2, [r7, #22]
+ 801054e:	429a      	cmp	r2, r3
+ 8010550:	d001      	beq.n	8010556 <mem_link_valid+0x6a>
+    return 0;
+ 8010552:	2300      	movs	r3, #0
+ 8010554:	e000      	b.n	8010558 <mem_link_valid+0x6c>
+  }
+  return 1;
+ 8010556:	2301      	movs	r3, #1
+}
+ 8010558:	4618      	mov	r0, r3
+ 801055a:	3718      	adds	r7, #24
+ 801055c:	46bd      	mov	sp, r7
+ 801055e:	bd80      	pop	{r7, pc}
+ 8010560:	200086d4 	.word	0x200086d4
+
+08010564 <mem_free>:
+ * @param rmem is the data portion of a struct mem as returned by a previous
+ *             call to mem_malloc()
+ */
+void
+mem_free(void *rmem)
+{
+ 8010564:	b580      	push	{r7, lr}
+ 8010566:	b088      	sub	sp, #32
+ 8010568:	af00      	add	r7, sp, #0
+ 801056a:	6078      	str	r0, [r7, #4]
+  struct mem *mem;
+  LWIP_MEM_FREE_DECL_PROTECT();
+
+  if (rmem == NULL) {
+ 801056c:	687b      	ldr	r3, [r7, #4]
+ 801056e:	2b00      	cmp	r3, #0
+ 8010570:	d070      	beq.n	8010654 <mem_free+0xf0>
+    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n"));
+    return;
+  }
+  if ((((mem_ptr_t)rmem) & (MEM_ALIGNMENT - 1)) != 0) {
+ 8010572:	687b      	ldr	r3, [r7, #4]
+ 8010574:	f003 0303 	and.w	r3, r3, #3
+ 8010578:	2b00      	cmp	r3, #0
+ 801057a:	d00d      	beq.n	8010598 <mem_free+0x34>
+    LWIP_MEM_ILLEGAL_FREE("mem_free: sanity check alignment");
+ 801057c:	4b37      	ldr	r3, [pc, #220]	; (801065c <mem_free+0xf8>)
+ 801057e:	f240 2273 	movw	r2, #627	; 0x273
+ 8010582:	4937      	ldr	r1, [pc, #220]	; (8010660 <mem_free+0xfc>)
+ 8010584:	4837      	ldr	r0, [pc, #220]	; (8010664 <mem_free+0x100>)
+ 8010586:	f00b ff37 	bl	801c3f8 <iprintf>
+    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: sanity check alignment\n"));
+    /* protect mem stats from concurrent access */
+    MEM_STATS_INC_LOCKED(illegal);
+ 801058a:	f00b feb7 	bl	801c2fc <sys_arch_protect>
+ 801058e:	60f8      	str	r0, [r7, #12]
+ 8010590:	68f8      	ldr	r0, [r7, #12]
+ 8010592:	f00b fec1 	bl	801c318 <sys_arch_unprotect>
+    return;
+ 8010596:	e05e      	b.n	8010656 <mem_free+0xf2>
+  }
+
+  /* Get the corresponding struct mem: */
+  /* cast through void* to get rid of alignment warnings */
+  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
+ 8010598:	687b      	ldr	r3, [r7, #4]
+ 801059a:	3b08      	subs	r3, #8
+ 801059c:	61fb      	str	r3, [r7, #28]
+
+  if ((u8_t *)mem < ram || (u8_t *)rmem + MIN_SIZE_ALIGNED > (u8_t *)ram_end) {
+ 801059e:	4b32      	ldr	r3, [pc, #200]	; (8010668 <mem_free+0x104>)
+ 80105a0:	681b      	ldr	r3, [r3, #0]
+ 80105a2:	69fa      	ldr	r2, [r7, #28]
+ 80105a4:	429a      	cmp	r2, r3
+ 80105a6:	d306      	bcc.n	80105b6 <mem_free+0x52>
+ 80105a8:	687b      	ldr	r3, [r7, #4]
+ 80105aa:	f103 020c 	add.w	r2, r3, #12
+ 80105ae:	4b2f      	ldr	r3, [pc, #188]	; (801066c <mem_free+0x108>)
+ 80105b0:	681b      	ldr	r3, [r3, #0]
+ 80105b2:	429a      	cmp	r2, r3
+ 80105b4:	d90d      	bls.n	80105d2 <mem_free+0x6e>
+    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory");
+ 80105b6:	4b29      	ldr	r3, [pc, #164]	; (801065c <mem_free+0xf8>)
+ 80105b8:	f240 227f 	movw	r2, #639	; 0x27f
+ 80105bc:	492c      	ldr	r1, [pc, #176]	; (8010670 <mem_free+0x10c>)
+ 80105be:	4829      	ldr	r0, [pc, #164]	; (8010664 <mem_free+0x100>)
+ 80105c0:	f00b ff1a 	bl	801c3f8 <iprintf>
+    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n"));
+    /* protect mem stats from concurrent access */
+    MEM_STATS_INC_LOCKED(illegal);
+ 80105c4:	f00b fe9a 	bl	801c2fc <sys_arch_protect>
+ 80105c8:	6138      	str	r0, [r7, #16]
+ 80105ca:	6938      	ldr	r0, [r7, #16]
+ 80105cc:	f00b fea4 	bl	801c318 <sys_arch_unprotect>
+    return;
+ 80105d0:	e041      	b.n	8010656 <mem_free+0xf2>
+  }
+#if MEM_OVERFLOW_CHECK
+  mem_overflow_check_element(mem);
+#endif
+  /* protect the heap from concurrent access */
+  LWIP_MEM_FREE_PROTECT();
+ 80105d2:	4828      	ldr	r0, [pc, #160]	; (8010674 <mem_free+0x110>)
+ 80105d4:	f00b fe50 	bl	801c278 <sys_mutex_lock>
+  /* mem has to be in a used state */
+  if (!mem->used) {
+ 80105d8:	69fb      	ldr	r3, [r7, #28]
+ 80105da:	791b      	ldrb	r3, [r3, #4]
+ 80105dc:	2b00      	cmp	r3, #0
+ 80105de:	d110      	bne.n	8010602 <mem_free+0x9e>
+    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: double free");
+ 80105e0:	4b1e      	ldr	r3, [pc, #120]	; (801065c <mem_free+0xf8>)
+ 80105e2:	f44f 7223 	mov.w	r2, #652	; 0x28c
+ 80105e6:	4924      	ldr	r1, [pc, #144]	; (8010678 <mem_free+0x114>)
+ 80105e8:	481e      	ldr	r0, [pc, #120]	; (8010664 <mem_free+0x100>)
+ 80105ea:	f00b ff05 	bl	801c3f8 <iprintf>
+    LWIP_MEM_FREE_UNPROTECT();
+ 80105ee:	4821      	ldr	r0, [pc, #132]	; (8010674 <mem_free+0x110>)
+ 80105f0:	f00b fe51 	bl	801c296 <sys_mutex_unlock>
+    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: double free?\n"));
+    /* protect mem stats from concurrent access */
+    MEM_STATS_INC_LOCKED(illegal);
+ 80105f4:	f00b fe82 	bl	801c2fc <sys_arch_protect>
+ 80105f8:	6178      	str	r0, [r7, #20]
+ 80105fa:	6978      	ldr	r0, [r7, #20]
+ 80105fc:	f00b fe8c 	bl	801c318 <sys_arch_unprotect>
+    return;
+ 8010600:	e029      	b.n	8010656 <mem_free+0xf2>
+  }
+
+  if (!mem_link_valid(mem)) {
+ 8010602:	69f8      	ldr	r0, [r7, #28]
+ 8010604:	f7ff ff72 	bl	80104ec <mem_link_valid>
+ 8010608:	4603      	mov	r3, r0
+ 801060a:	2b00      	cmp	r3, #0
+ 801060c:	d110      	bne.n	8010630 <mem_free+0xcc>
+    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: non-linked: double free");
+ 801060e:	4b13      	ldr	r3, [pc, #76]	; (801065c <mem_free+0xf8>)
+ 8010610:	f240 2295 	movw	r2, #661	; 0x295
+ 8010614:	4919      	ldr	r1, [pc, #100]	; (801067c <mem_free+0x118>)
+ 8010616:	4813      	ldr	r0, [pc, #76]	; (8010664 <mem_free+0x100>)
+ 8010618:	f00b feee 	bl	801c3f8 <iprintf>
+    LWIP_MEM_FREE_UNPROTECT();
+ 801061c:	4815      	ldr	r0, [pc, #84]	; (8010674 <mem_free+0x110>)
+ 801061e:	f00b fe3a 	bl	801c296 <sys_mutex_unlock>
+    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: non-linked: double free?\n"));
+    /* protect mem stats from concurrent access */
+    MEM_STATS_INC_LOCKED(illegal);
+ 8010622:	f00b fe6b 	bl	801c2fc <sys_arch_protect>
+ 8010626:	61b8      	str	r0, [r7, #24]
+ 8010628:	69b8      	ldr	r0, [r7, #24]
+ 801062a:	f00b fe75 	bl	801c318 <sys_arch_unprotect>
+    return;
+ 801062e:	e012      	b.n	8010656 <mem_free+0xf2>
+  }
+
+  /* mem is now unused. */
+  mem->used = 0;
+ 8010630:	69fb      	ldr	r3, [r7, #28]
+ 8010632:	2200      	movs	r2, #0
+ 8010634:	711a      	strb	r2, [r3, #4]
+
+  if (mem < lfree) {
+ 8010636:	4b12      	ldr	r3, [pc, #72]	; (8010680 <mem_free+0x11c>)
+ 8010638:	681b      	ldr	r3, [r3, #0]
+ 801063a:	69fa      	ldr	r2, [r7, #28]
+ 801063c:	429a      	cmp	r2, r3
+ 801063e:	d202      	bcs.n	8010646 <mem_free+0xe2>
+    /* the newly freed struct is now the lowest */
+    lfree = mem;
+ 8010640:	4a0f      	ldr	r2, [pc, #60]	; (8010680 <mem_free+0x11c>)
+ 8010642:	69fb      	ldr	r3, [r7, #28]
+ 8010644:	6013      	str	r3, [r2, #0]
+  }
+
+  MEM_STATS_DEC_USED(used, mem->next - (mem_size_t)(((u8_t *)mem - ram)));
+
+  /* finally, see if prev or next are free also */
+  plug_holes(mem);
+ 8010646:	69f8      	ldr	r0, [r7, #28]
+ 8010648:	f7ff fe5c 	bl	8010304 <plug_holes>
+  MEM_SANITY();
+#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
+  mem_free_count = 1;
+#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
+  LWIP_MEM_FREE_UNPROTECT();
+ 801064c:	4809      	ldr	r0, [pc, #36]	; (8010674 <mem_free+0x110>)
+ 801064e:	f00b fe22 	bl	801c296 <sys_mutex_unlock>
+ 8010652:	e000      	b.n	8010656 <mem_free+0xf2>
+    return;
+ 8010654:	bf00      	nop
+}
+ 8010656:	3720      	adds	r7, #32
+ 8010658:	46bd      	mov	sp, r7
+ 801065a:	bd80      	pop	{r7, pc}
+ 801065c:	0801d7e4 	.word	0x0801d7e4
+ 8010660:	0801d8d4 	.word	0x0801d8d4
+ 8010664:	0801d82c 	.word	0x0801d82c
+ 8010668:	200086d0 	.word	0x200086d0
+ 801066c:	200086d4 	.word	0x200086d4
+ 8010670:	0801d8f8 	.word	0x0801d8f8
+ 8010674:	200086d8 	.word	0x200086d8
+ 8010678:	0801d914 	.word	0x0801d914
+ 801067c:	0801d93c 	.word	0x0801d93c
+ 8010680:	200086dc 	.word	0x200086dc
+
+08010684 <mem_trim>:
+ *         or NULL if newsize is > old size, in which case rmem is NOT touched
+ *         or freed!
+ */
+void *
+mem_trim(void *rmem, mem_size_t new_size)
+{
+ 8010684:	b580      	push	{r7, lr}
+ 8010686:	b088      	sub	sp, #32
+ 8010688:	af00      	add	r7, sp, #0
+ 801068a:	6078      	str	r0, [r7, #4]
+ 801068c:	460b      	mov	r3, r1
+ 801068e:	807b      	strh	r3, [r7, #2]
+  /* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */
+  LWIP_MEM_FREE_DECL_PROTECT();
+
+  /* Expand the size of the allocated memory region so that we can
+     adjust for alignment. */
+  newsize = (mem_size_t)LWIP_MEM_ALIGN_SIZE(new_size);
+ 8010690:	887b      	ldrh	r3, [r7, #2]
+ 8010692:	3303      	adds	r3, #3
+ 8010694:	b29b      	uxth	r3, r3
+ 8010696:	f023 0303 	bic.w	r3, r3, #3
+ 801069a:	83fb      	strh	r3, [r7, #30]
+  if (newsize < MIN_SIZE_ALIGNED) {
+ 801069c:	8bfb      	ldrh	r3, [r7, #30]
+ 801069e:	2b0b      	cmp	r3, #11
+ 80106a0:	d801      	bhi.n	80106a6 <mem_trim+0x22>
+    /* every data block must be at least MIN_SIZE_ALIGNED long */
+    newsize = MIN_SIZE_ALIGNED;
+ 80106a2:	230c      	movs	r3, #12
+ 80106a4:	83fb      	strh	r3, [r7, #30]
+  }
+#if MEM_OVERFLOW_CHECK
+  newsize += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
+#endif
+  if ((newsize > MEM_SIZE_ALIGNED) || (newsize < new_size)) {
+ 80106a6:	8bfb      	ldrh	r3, [r7, #30]
+ 80106a8:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 80106ac:	d803      	bhi.n	80106b6 <mem_trim+0x32>
+ 80106ae:	8bfa      	ldrh	r2, [r7, #30]
+ 80106b0:	887b      	ldrh	r3, [r7, #2]
+ 80106b2:	429a      	cmp	r2, r3
+ 80106b4:	d201      	bcs.n	80106ba <mem_trim+0x36>
+    return NULL;
+ 80106b6:	2300      	movs	r3, #0
+ 80106b8:	e0d8      	b.n	801086c <mem_trim+0x1e8>
+  }
+
+  LWIP_ASSERT("mem_trim: legal memory", (u8_t *)rmem >= (u8_t *)ram &&
+ 80106ba:	4b6e      	ldr	r3, [pc, #440]	; (8010874 <mem_trim+0x1f0>)
+ 80106bc:	681b      	ldr	r3, [r3, #0]
+ 80106be:	687a      	ldr	r2, [r7, #4]
+ 80106c0:	429a      	cmp	r2, r3
+ 80106c2:	d304      	bcc.n	80106ce <mem_trim+0x4a>
+ 80106c4:	4b6c      	ldr	r3, [pc, #432]	; (8010878 <mem_trim+0x1f4>)
+ 80106c6:	681b      	ldr	r3, [r3, #0]
+ 80106c8:	687a      	ldr	r2, [r7, #4]
+ 80106ca:	429a      	cmp	r2, r3
+ 80106cc:	d306      	bcc.n	80106dc <mem_trim+0x58>
+ 80106ce:	4b6b      	ldr	r3, [pc, #428]	; (801087c <mem_trim+0x1f8>)
+ 80106d0:	f240 22d2 	movw	r2, #722	; 0x2d2
+ 80106d4:	496a      	ldr	r1, [pc, #424]	; (8010880 <mem_trim+0x1fc>)
+ 80106d6:	486b      	ldr	r0, [pc, #428]	; (8010884 <mem_trim+0x200>)
+ 80106d8:	f00b fe8e 	bl	801c3f8 <iprintf>
+              (u8_t *)rmem < (u8_t *)ram_end);
+
+  if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) {
+ 80106dc:	4b65      	ldr	r3, [pc, #404]	; (8010874 <mem_trim+0x1f0>)
+ 80106de:	681b      	ldr	r3, [r3, #0]
+ 80106e0:	687a      	ldr	r2, [r7, #4]
+ 80106e2:	429a      	cmp	r2, r3
+ 80106e4:	d304      	bcc.n	80106f0 <mem_trim+0x6c>
+ 80106e6:	4b64      	ldr	r3, [pc, #400]	; (8010878 <mem_trim+0x1f4>)
+ 80106e8:	681b      	ldr	r3, [r3, #0]
+ 80106ea:	687a      	ldr	r2, [r7, #4]
+ 80106ec:	429a      	cmp	r2, r3
+ 80106ee:	d307      	bcc.n	8010700 <mem_trim+0x7c>
+    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_trim: illegal memory\n"));
+    /* protect mem stats from concurrent access */
+    MEM_STATS_INC_LOCKED(illegal);
+ 80106f0:	f00b fe04 	bl	801c2fc <sys_arch_protect>
+ 80106f4:	60b8      	str	r0, [r7, #8]
+ 80106f6:	68b8      	ldr	r0, [r7, #8]
+ 80106f8:	f00b fe0e 	bl	801c318 <sys_arch_unprotect>
+    return rmem;
+ 80106fc:	687b      	ldr	r3, [r7, #4]
+ 80106fe:	e0b5      	b.n	801086c <mem_trim+0x1e8>
+  }
+  /* Get the corresponding struct mem ... */
+  /* cast through void* to get rid of alignment warnings */
+  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
+ 8010700:	687b      	ldr	r3, [r7, #4]
+ 8010702:	3b08      	subs	r3, #8
+ 8010704:	61bb      	str	r3, [r7, #24]
+#if MEM_OVERFLOW_CHECK
+  mem_overflow_check_element(mem);
+#endif
+  /* ... and its offset pointer */
+  ptr = mem_to_ptr(mem);
+ 8010706:	69b8      	ldr	r0, [r7, #24]
+ 8010708:	f7ff fdea 	bl	80102e0 <mem_to_ptr>
+ 801070c:	4603      	mov	r3, r0
+ 801070e:	82fb      	strh	r3, [r7, #22]
+
+  size = (mem_size_t)((mem_size_t)(mem->next - ptr) - (SIZEOF_STRUCT_MEM + MEM_SANITY_OVERHEAD));
+ 8010710:	69bb      	ldr	r3, [r7, #24]
+ 8010712:	881a      	ldrh	r2, [r3, #0]
+ 8010714:	8afb      	ldrh	r3, [r7, #22]
+ 8010716:	1ad3      	subs	r3, r2, r3
+ 8010718:	b29b      	uxth	r3, r3
+ 801071a:	3b08      	subs	r3, #8
+ 801071c:	82bb      	strh	r3, [r7, #20]
+  LWIP_ASSERT("mem_trim can only shrink memory", newsize <= size);
+ 801071e:	8bfa      	ldrh	r2, [r7, #30]
+ 8010720:	8abb      	ldrh	r3, [r7, #20]
+ 8010722:	429a      	cmp	r2, r3
+ 8010724:	d906      	bls.n	8010734 <mem_trim+0xb0>
+ 8010726:	4b55      	ldr	r3, [pc, #340]	; (801087c <mem_trim+0x1f8>)
+ 8010728:	f44f 7239 	mov.w	r2, #740	; 0x2e4
+ 801072c:	4956      	ldr	r1, [pc, #344]	; (8010888 <mem_trim+0x204>)
+ 801072e:	4855      	ldr	r0, [pc, #340]	; (8010884 <mem_trim+0x200>)
+ 8010730:	f00b fe62 	bl	801c3f8 <iprintf>
+  if (newsize > size) {
+ 8010734:	8bfa      	ldrh	r2, [r7, #30]
+ 8010736:	8abb      	ldrh	r3, [r7, #20]
+ 8010738:	429a      	cmp	r2, r3
+ 801073a:	d901      	bls.n	8010740 <mem_trim+0xbc>
+    /* not supported */
+    return NULL;
+ 801073c:	2300      	movs	r3, #0
+ 801073e:	e095      	b.n	801086c <mem_trim+0x1e8>
+  }
+  if (newsize == size) {
+ 8010740:	8bfa      	ldrh	r2, [r7, #30]
+ 8010742:	8abb      	ldrh	r3, [r7, #20]
+ 8010744:	429a      	cmp	r2, r3
+ 8010746:	d101      	bne.n	801074c <mem_trim+0xc8>
+    /* No change in size, simply return */
+    return rmem;
+ 8010748:	687b      	ldr	r3, [r7, #4]
+ 801074a:	e08f      	b.n	801086c <mem_trim+0x1e8>
+  }
+
+  /* protect the heap from concurrent access */
+  LWIP_MEM_FREE_PROTECT();
+ 801074c:	484f      	ldr	r0, [pc, #316]	; (801088c <mem_trim+0x208>)
+ 801074e:	f00b fd93 	bl	801c278 <sys_mutex_lock>
+
+  mem2 = ptr_to_mem(mem->next);
+ 8010752:	69bb      	ldr	r3, [r7, #24]
+ 8010754:	881b      	ldrh	r3, [r3, #0]
+ 8010756:	4618      	mov	r0, r3
+ 8010758:	f7ff fdb0 	bl	80102bc <ptr_to_mem>
+ 801075c:	6138      	str	r0, [r7, #16]
+  if (mem2->used == 0) {
+ 801075e:	693b      	ldr	r3, [r7, #16]
+ 8010760:	791b      	ldrb	r3, [r3, #4]
+ 8010762:	2b00      	cmp	r3, #0
+ 8010764:	d13f      	bne.n	80107e6 <mem_trim+0x162>
+    /* The next struct is unused, we can simply move it at little */
+    mem_size_t next;
+    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
+ 8010766:	69bb      	ldr	r3, [r7, #24]
+ 8010768:	881b      	ldrh	r3, [r3, #0]
+ 801076a:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 801076e:	d106      	bne.n	801077e <mem_trim+0xfa>
+ 8010770:	4b42      	ldr	r3, [pc, #264]	; (801087c <mem_trim+0x1f8>)
+ 8010772:	f240 22f5 	movw	r2, #757	; 0x2f5
+ 8010776:	4946      	ldr	r1, [pc, #280]	; (8010890 <mem_trim+0x20c>)
+ 8010778:	4842      	ldr	r0, [pc, #264]	; (8010884 <mem_trim+0x200>)
+ 801077a:	f00b fe3d 	bl	801c3f8 <iprintf>
+    /* remember the old next pointer */
+    next = mem2->next;
+ 801077e:	693b      	ldr	r3, [r7, #16]
+ 8010780:	881b      	ldrh	r3, [r3, #0]
+ 8010782:	81bb      	strh	r3, [r7, #12]
+    /* create new struct mem which is moved directly after the shrinked mem */
+    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
+ 8010784:	8afa      	ldrh	r2, [r7, #22]
+ 8010786:	8bfb      	ldrh	r3, [r7, #30]
+ 8010788:	4413      	add	r3, r2
+ 801078a:	b29b      	uxth	r3, r3
+ 801078c:	3308      	adds	r3, #8
+ 801078e:	81fb      	strh	r3, [r7, #14]
+    if (lfree == mem2) {
+ 8010790:	4b40      	ldr	r3, [pc, #256]	; (8010894 <mem_trim+0x210>)
+ 8010792:	681b      	ldr	r3, [r3, #0]
+ 8010794:	693a      	ldr	r2, [r7, #16]
+ 8010796:	429a      	cmp	r2, r3
+ 8010798:	d106      	bne.n	80107a8 <mem_trim+0x124>
+      lfree = ptr_to_mem(ptr2);
+ 801079a:	89fb      	ldrh	r3, [r7, #14]
+ 801079c:	4618      	mov	r0, r3
+ 801079e:	f7ff fd8d 	bl	80102bc <ptr_to_mem>
+ 80107a2:	4602      	mov	r2, r0
+ 80107a4:	4b3b      	ldr	r3, [pc, #236]	; (8010894 <mem_trim+0x210>)
+ 80107a6:	601a      	str	r2, [r3, #0]
+    }
+    mem2 = ptr_to_mem(ptr2);
+ 80107a8:	89fb      	ldrh	r3, [r7, #14]
+ 80107aa:	4618      	mov	r0, r3
+ 80107ac:	f7ff fd86 	bl	80102bc <ptr_to_mem>
+ 80107b0:	6138      	str	r0, [r7, #16]
+    mem2->used = 0;
+ 80107b2:	693b      	ldr	r3, [r7, #16]
+ 80107b4:	2200      	movs	r2, #0
+ 80107b6:	711a      	strb	r2, [r3, #4]
+    /* restore the next pointer */
+    mem2->next = next;
+ 80107b8:	693b      	ldr	r3, [r7, #16]
+ 80107ba:	89ba      	ldrh	r2, [r7, #12]
+ 80107bc:	801a      	strh	r2, [r3, #0]
+    /* link it back to mem */
+    mem2->prev = ptr;
+ 80107be:	693b      	ldr	r3, [r7, #16]
+ 80107c0:	8afa      	ldrh	r2, [r7, #22]
+ 80107c2:	805a      	strh	r2, [r3, #2]
+    /* link mem to it */
+    mem->next = ptr2;
+ 80107c4:	69bb      	ldr	r3, [r7, #24]
+ 80107c6:	89fa      	ldrh	r2, [r7, #14]
+ 80107c8:	801a      	strh	r2, [r3, #0]
+    /* last thing to restore linked list: as we have moved mem2,
+     * let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not
+     * the end of the heap */
+    if (mem2->next != MEM_SIZE_ALIGNED) {
+ 80107ca:	693b      	ldr	r3, [r7, #16]
+ 80107cc:	881b      	ldrh	r3, [r3, #0]
+ 80107ce:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 80107d2:	d047      	beq.n	8010864 <mem_trim+0x1e0>
+      ptr_to_mem(mem2->next)->prev = ptr2;
+ 80107d4:	693b      	ldr	r3, [r7, #16]
+ 80107d6:	881b      	ldrh	r3, [r3, #0]
+ 80107d8:	4618      	mov	r0, r3
+ 80107da:	f7ff fd6f 	bl	80102bc <ptr_to_mem>
+ 80107de:	4602      	mov	r2, r0
+ 80107e0:	89fb      	ldrh	r3, [r7, #14]
+ 80107e2:	8053      	strh	r3, [r2, #2]
+ 80107e4:	e03e      	b.n	8010864 <mem_trim+0x1e0>
+    }
+    MEM_STATS_DEC_USED(used, (size - newsize));
+    /* no need to plug holes, we've already done that */
+  } else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) {
+ 80107e6:	8bfb      	ldrh	r3, [r7, #30]
+ 80107e8:	f103 0214 	add.w	r2, r3, #20
+ 80107ec:	8abb      	ldrh	r3, [r7, #20]
+ 80107ee:	429a      	cmp	r2, r3
+ 80107f0:	d838      	bhi.n	8010864 <mem_trim+0x1e0>
+     * Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem
+     * ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED').
+     * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
+     *       region that couldn't hold data, but when mem->next gets freed,
+     *       the 2 regions would be combined, resulting in more free memory */
+    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
+ 80107f2:	8afa      	ldrh	r2, [r7, #22]
+ 80107f4:	8bfb      	ldrh	r3, [r7, #30]
+ 80107f6:	4413      	add	r3, r2
+ 80107f8:	b29b      	uxth	r3, r3
+ 80107fa:	3308      	adds	r3, #8
+ 80107fc:	81fb      	strh	r3, [r7, #14]
+    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
+ 80107fe:	69bb      	ldr	r3, [r7, #24]
+ 8010800:	881b      	ldrh	r3, [r3, #0]
+ 8010802:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 8010806:	d106      	bne.n	8010816 <mem_trim+0x192>
+ 8010808:	4b1c      	ldr	r3, [pc, #112]	; (801087c <mem_trim+0x1f8>)
+ 801080a:	f240 3216 	movw	r2, #790	; 0x316
+ 801080e:	4920      	ldr	r1, [pc, #128]	; (8010890 <mem_trim+0x20c>)
+ 8010810:	481c      	ldr	r0, [pc, #112]	; (8010884 <mem_trim+0x200>)
+ 8010812:	f00b fdf1 	bl	801c3f8 <iprintf>
+    mem2 = ptr_to_mem(ptr2);
+ 8010816:	89fb      	ldrh	r3, [r7, #14]
+ 8010818:	4618      	mov	r0, r3
+ 801081a:	f7ff fd4f 	bl	80102bc <ptr_to_mem>
+ 801081e:	6138      	str	r0, [r7, #16]
+    if (mem2 < lfree) {
+ 8010820:	4b1c      	ldr	r3, [pc, #112]	; (8010894 <mem_trim+0x210>)
+ 8010822:	681b      	ldr	r3, [r3, #0]
+ 8010824:	693a      	ldr	r2, [r7, #16]
+ 8010826:	429a      	cmp	r2, r3
+ 8010828:	d202      	bcs.n	8010830 <mem_trim+0x1ac>
+      lfree = mem2;
+ 801082a:	4a1a      	ldr	r2, [pc, #104]	; (8010894 <mem_trim+0x210>)
+ 801082c:	693b      	ldr	r3, [r7, #16]
+ 801082e:	6013      	str	r3, [r2, #0]
+    }
+    mem2->used = 0;
+ 8010830:	693b      	ldr	r3, [r7, #16]
+ 8010832:	2200      	movs	r2, #0
+ 8010834:	711a      	strb	r2, [r3, #4]
+    mem2->next = mem->next;
+ 8010836:	69bb      	ldr	r3, [r7, #24]
+ 8010838:	881a      	ldrh	r2, [r3, #0]
+ 801083a:	693b      	ldr	r3, [r7, #16]
+ 801083c:	801a      	strh	r2, [r3, #0]
+    mem2->prev = ptr;
+ 801083e:	693b      	ldr	r3, [r7, #16]
+ 8010840:	8afa      	ldrh	r2, [r7, #22]
+ 8010842:	805a      	strh	r2, [r3, #2]
+    mem->next = ptr2;
+ 8010844:	69bb      	ldr	r3, [r7, #24]
+ 8010846:	89fa      	ldrh	r2, [r7, #14]
+ 8010848:	801a      	strh	r2, [r3, #0]
+    if (mem2->next != MEM_SIZE_ALIGNED) {
+ 801084a:	693b      	ldr	r3, [r7, #16]
+ 801084c:	881b      	ldrh	r3, [r3, #0]
+ 801084e:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 8010852:	d007      	beq.n	8010864 <mem_trim+0x1e0>
+      ptr_to_mem(mem2->next)->prev = ptr2;
+ 8010854:	693b      	ldr	r3, [r7, #16]
+ 8010856:	881b      	ldrh	r3, [r3, #0]
+ 8010858:	4618      	mov	r0, r3
+ 801085a:	f7ff fd2f 	bl	80102bc <ptr_to_mem>
+ 801085e:	4602      	mov	r2, r0
+ 8010860:	89fb      	ldrh	r3, [r7, #14]
+ 8010862:	8053      	strh	r3, [r2, #2]
+#endif
+  MEM_SANITY();
+#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
+  mem_free_count = 1;
+#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
+  LWIP_MEM_FREE_UNPROTECT();
+ 8010864:	4809      	ldr	r0, [pc, #36]	; (801088c <mem_trim+0x208>)
+ 8010866:	f00b fd16 	bl	801c296 <sys_mutex_unlock>
+  return rmem;
+ 801086a:	687b      	ldr	r3, [r7, #4]
+}
+ 801086c:	4618      	mov	r0, r3
+ 801086e:	3720      	adds	r7, #32
+ 8010870:	46bd      	mov	sp, r7
+ 8010872:	bd80      	pop	{r7, pc}
+ 8010874:	200086d0 	.word	0x200086d0
+ 8010878:	200086d4 	.word	0x200086d4
+ 801087c:	0801d7e4 	.word	0x0801d7e4
+ 8010880:	0801d970 	.word	0x0801d970
+ 8010884:	0801d82c 	.word	0x0801d82c
+ 8010888:	0801d988 	.word	0x0801d988
+ 801088c:	200086d8 	.word	0x200086d8
+ 8010890:	0801d9a8 	.word	0x0801d9a8
+ 8010894:	200086dc 	.word	0x200086dc
+
+08010898 <mem_malloc>:
+ *
+ * Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT).
+ */
+void *
+mem_malloc(mem_size_t size_in)
+{
+ 8010898:	b580      	push	{r7, lr}
+ 801089a:	b088      	sub	sp, #32
+ 801089c:	af00      	add	r7, sp, #0
+ 801089e:	4603      	mov	r3, r0
+ 80108a0:	80fb      	strh	r3, [r7, #6]
+#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
+  u8_t local_mem_free_count = 0;
+#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
+  LWIP_MEM_ALLOC_DECL_PROTECT();
+
+  if (size_in == 0) {
+ 80108a2:	88fb      	ldrh	r3, [r7, #6]
+ 80108a4:	2b00      	cmp	r3, #0
+ 80108a6:	d101      	bne.n	80108ac <mem_malloc+0x14>
+    return NULL;
+ 80108a8:	2300      	movs	r3, #0
+ 80108aa:	e0e2      	b.n	8010a72 <mem_malloc+0x1da>
+  }
+
+  /* Expand the size of the allocated memory region so that we can
+     adjust for alignment. */
+  size = (mem_size_t)LWIP_MEM_ALIGN_SIZE(size_in);
+ 80108ac:	88fb      	ldrh	r3, [r7, #6]
+ 80108ae:	3303      	adds	r3, #3
+ 80108b0:	b29b      	uxth	r3, r3
+ 80108b2:	f023 0303 	bic.w	r3, r3, #3
+ 80108b6:	83bb      	strh	r3, [r7, #28]
+  if (size < MIN_SIZE_ALIGNED) {
+ 80108b8:	8bbb      	ldrh	r3, [r7, #28]
+ 80108ba:	2b0b      	cmp	r3, #11
+ 80108bc:	d801      	bhi.n	80108c2 <mem_malloc+0x2a>
+    /* every data block must be at least MIN_SIZE_ALIGNED long */
+    size = MIN_SIZE_ALIGNED;
+ 80108be:	230c      	movs	r3, #12
+ 80108c0:	83bb      	strh	r3, [r7, #28]
+  }
+#if MEM_OVERFLOW_CHECK
+  size += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
+#endif
+  if ((size > MEM_SIZE_ALIGNED) || (size < size_in)) {
+ 80108c2:	8bbb      	ldrh	r3, [r7, #28]
+ 80108c4:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 80108c8:	d803      	bhi.n	80108d2 <mem_malloc+0x3a>
+ 80108ca:	8bba      	ldrh	r2, [r7, #28]
+ 80108cc:	88fb      	ldrh	r3, [r7, #6]
+ 80108ce:	429a      	cmp	r2, r3
+ 80108d0:	d201      	bcs.n	80108d6 <mem_malloc+0x3e>
+    return NULL;
+ 80108d2:	2300      	movs	r3, #0
+ 80108d4:	e0cd      	b.n	8010a72 <mem_malloc+0x1da>
+  }
+
+  /* protect the heap from concurrent access */
+  sys_mutex_lock(&mem_mutex);
+ 80108d6:	4869      	ldr	r0, [pc, #420]	; (8010a7c <mem_malloc+0x1e4>)
+ 80108d8:	f00b fcce 	bl	801c278 <sys_mutex_lock>
+#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
+
+    /* Scan through the heap searching for a free block that is big enough,
+     * beginning with the lowest free block.
+     */
+    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
+ 80108dc:	4b68      	ldr	r3, [pc, #416]	; (8010a80 <mem_malloc+0x1e8>)
+ 80108de:	681b      	ldr	r3, [r3, #0]
+ 80108e0:	4618      	mov	r0, r3
+ 80108e2:	f7ff fcfd 	bl	80102e0 <mem_to_ptr>
+ 80108e6:	4603      	mov	r3, r0
+ 80108e8:	83fb      	strh	r3, [r7, #30]
+ 80108ea:	e0b7      	b.n	8010a5c <mem_malloc+0x1c4>
+         ptr = ptr_to_mem(ptr)->next) {
+      mem = ptr_to_mem(ptr);
+ 80108ec:	8bfb      	ldrh	r3, [r7, #30]
+ 80108ee:	4618      	mov	r0, r3
+ 80108f0:	f7ff fce4 	bl	80102bc <ptr_to_mem>
+ 80108f4:	6178      	str	r0, [r7, #20]
+        local_mem_free_count = 1;
+        break;
+      }
+#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
+
+      if ((!mem->used) &&
+ 80108f6:	697b      	ldr	r3, [r7, #20]
+ 80108f8:	791b      	ldrb	r3, [r3, #4]
+ 80108fa:	2b00      	cmp	r3, #0
+ 80108fc:	f040 80a7 	bne.w	8010a4e <mem_malloc+0x1b6>
+          (mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) {
+ 8010900:	697b      	ldr	r3, [r7, #20]
+ 8010902:	881b      	ldrh	r3, [r3, #0]
+ 8010904:	461a      	mov	r2, r3
+ 8010906:	8bfb      	ldrh	r3, [r7, #30]
+ 8010908:	1ad3      	subs	r3, r2, r3
+ 801090a:	f1a3 0208 	sub.w	r2, r3, #8
+ 801090e:	8bbb      	ldrh	r3, [r7, #28]
+      if ((!mem->used) &&
+ 8010910:	429a      	cmp	r2, r3
+ 8010912:	f0c0 809c 	bcc.w	8010a4e <mem_malloc+0x1b6>
+        /* mem is not used and at least perfect fit is possible:
+         * mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */
+
+        if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) {
+ 8010916:	697b      	ldr	r3, [r7, #20]
+ 8010918:	881b      	ldrh	r3, [r3, #0]
+ 801091a:	461a      	mov	r2, r3
+ 801091c:	8bfb      	ldrh	r3, [r7, #30]
+ 801091e:	1ad3      	subs	r3, r2, r3
+ 8010920:	f1a3 0208 	sub.w	r2, r3, #8
+ 8010924:	8bbb      	ldrh	r3, [r7, #28]
+ 8010926:	3314      	adds	r3, #20
+ 8010928:	429a      	cmp	r2, r3
+ 801092a:	d333      	bcc.n	8010994 <mem_malloc+0xfc>
+           * struct mem would fit in but no data between mem2 and mem2->next
+           * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
+           *       region that couldn't hold data, but when mem->next gets freed,
+           *       the 2 regions would be combined, resulting in more free memory
+           */
+          ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + size);
+ 801092c:	8bfa      	ldrh	r2, [r7, #30]
+ 801092e:	8bbb      	ldrh	r3, [r7, #28]
+ 8010930:	4413      	add	r3, r2
+ 8010932:	b29b      	uxth	r3, r3
+ 8010934:	3308      	adds	r3, #8
+ 8010936:	827b      	strh	r3, [r7, #18]
+          LWIP_ASSERT("invalid next ptr",ptr2 != MEM_SIZE_ALIGNED);
+ 8010938:	8a7b      	ldrh	r3, [r7, #18]
+ 801093a:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 801093e:	d106      	bne.n	801094e <mem_malloc+0xb6>
+ 8010940:	4b50      	ldr	r3, [pc, #320]	; (8010a84 <mem_malloc+0x1ec>)
+ 8010942:	f240 3287 	movw	r2, #903	; 0x387
+ 8010946:	4950      	ldr	r1, [pc, #320]	; (8010a88 <mem_malloc+0x1f0>)
+ 8010948:	4850      	ldr	r0, [pc, #320]	; (8010a8c <mem_malloc+0x1f4>)
+ 801094a:	f00b fd55 	bl	801c3f8 <iprintf>
+          /* create mem2 struct */
+          mem2 = ptr_to_mem(ptr2);
+ 801094e:	8a7b      	ldrh	r3, [r7, #18]
+ 8010950:	4618      	mov	r0, r3
+ 8010952:	f7ff fcb3 	bl	80102bc <ptr_to_mem>
+ 8010956:	60f8      	str	r0, [r7, #12]
+          mem2->used = 0;
+ 8010958:	68fb      	ldr	r3, [r7, #12]
+ 801095a:	2200      	movs	r2, #0
+ 801095c:	711a      	strb	r2, [r3, #4]
+          mem2->next = mem->next;
+ 801095e:	697b      	ldr	r3, [r7, #20]
+ 8010960:	881a      	ldrh	r2, [r3, #0]
+ 8010962:	68fb      	ldr	r3, [r7, #12]
+ 8010964:	801a      	strh	r2, [r3, #0]
+          mem2->prev = ptr;
+ 8010966:	68fb      	ldr	r3, [r7, #12]
+ 8010968:	8bfa      	ldrh	r2, [r7, #30]
+ 801096a:	805a      	strh	r2, [r3, #2]
+          /* and insert it between mem and mem->next */
+          mem->next = ptr2;
+ 801096c:	697b      	ldr	r3, [r7, #20]
+ 801096e:	8a7a      	ldrh	r2, [r7, #18]
+ 8010970:	801a      	strh	r2, [r3, #0]
+          mem->used = 1;
+ 8010972:	697b      	ldr	r3, [r7, #20]
+ 8010974:	2201      	movs	r2, #1
+ 8010976:	711a      	strb	r2, [r3, #4]
+
+          if (mem2->next != MEM_SIZE_ALIGNED) {
+ 8010978:	68fb      	ldr	r3, [r7, #12]
+ 801097a:	881b      	ldrh	r3, [r3, #0]
+ 801097c:	f5b3 6fc8 	cmp.w	r3, #1600	; 0x640
+ 8010980:	d00b      	beq.n	801099a <mem_malloc+0x102>
+            ptr_to_mem(mem2->next)->prev = ptr2;
+ 8010982:	68fb      	ldr	r3, [r7, #12]
+ 8010984:	881b      	ldrh	r3, [r3, #0]
+ 8010986:	4618      	mov	r0, r3
+ 8010988:	f7ff fc98 	bl	80102bc <ptr_to_mem>
+ 801098c:	4602      	mov	r2, r0
+ 801098e:	8a7b      	ldrh	r3, [r7, #18]
+ 8010990:	8053      	strh	r3, [r2, #2]
+ 8010992:	e002      	b.n	801099a <mem_malloc+0x102>
+           * take care of this).
+           * -> near fit or exact fit: do not split, no mem2 creation
+           * also can't move mem->next directly behind mem, since mem->next
+           * will always be used at this point!
+           */
+          mem->used = 1;
+ 8010994:	697b      	ldr	r3, [r7, #20]
+ 8010996:	2201      	movs	r2, #1
+ 8010998:	711a      	strb	r2, [r3, #4]
+          MEM_STATS_INC_USED(used, mem->next - mem_to_ptr(mem));
+        }
+#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
+mem_malloc_adjust_lfree:
+#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
+        if (mem == lfree) {
+ 801099a:	4b39      	ldr	r3, [pc, #228]	; (8010a80 <mem_malloc+0x1e8>)
+ 801099c:	681b      	ldr	r3, [r3, #0]
+ 801099e:	697a      	ldr	r2, [r7, #20]
+ 80109a0:	429a      	cmp	r2, r3
+ 80109a2:	d127      	bne.n	80109f4 <mem_malloc+0x15c>
+          struct mem *cur = lfree;
+ 80109a4:	4b36      	ldr	r3, [pc, #216]	; (8010a80 <mem_malloc+0x1e8>)
+ 80109a6:	681b      	ldr	r3, [r3, #0]
+ 80109a8:	61bb      	str	r3, [r7, #24]
+          /* Find next free block after mem and update lowest free pointer */
+          while (cur->used && cur != ram_end) {
+ 80109aa:	e005      	b.n	80109b8 <mem_malloc+0x120>
+              /* If mem_free or mem_trim have run, we have to restart since they
+                 could have altered our current struct mem or lfree. */
+              goto mem_malloc_adjust_lfree;
+            }
+#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
+            cur = ptr_to_mem(cur->next);
+ 80109ac:	69bb      	ldr	r3, [r7, #24]
+ 80109ae:	881b      	ldrh	r3, [r3, #0]
+ 80109b0:	4618      	mov	r0, r3
+ 80109b2:	f7ff fc83 	bl	80102bc <ptr_to_mem>
+ 80109b6:	61b8      	str	r0, [r7, #24]
+          while (cur->used && cur != ram_end) {
+ 80109b8:	69bb      	ldr	r3, [r7, #24]
+ 80109ba:	791b      	ldrb	r3, [r3, #4]
+ 80109bc:	2b00      	cmp	r3, #0
+ 80109be:	d004      	beq.n	80109ca <mem_malloc+0x132>
+ 80109c0:	4b33      	ldr	r3, [pc, #204]	; (8010a90 <mem_malloc+0x1f8>)
+ 80109c2:	681b      	ldr	r3, [r3, #0]
+ 80109c4:	69ba      	ldr	r2, [r7, #24]
+ 80109c6:	429a      	cmp	r2, r3
+ 80109c8:	d1f0      	bne.n	80109ac <mem_malloc+0x114>
+          }
+          lfree = cur;
+ 80109ca:	4a2d      	ldr	r2, [pc, #180]	; (8010a80 <mem_malloc+0x1e8>)
+ 80109cc:	69bb      	ldr	r3, [r7, #24]
+ 80109ce:	6013      	str	r3, [r2, #0]
+          LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used)));
+ 80109d0:	4b2b      	ldr	r3, [pc, #172]	; (8010a80 <mem_malloc+0x1e8>)
+ 80109d2:	681a      	ldr	r2, [r3, #0]
+ 80109d4:	4b2e      	ldr	r3, [pc, #184]	; (8010a90 <mem_malloc+0x1f8>)
+ 80109d6:	681b      	ldr	r3, [r3, #0]
+ 80109d8:	429a      	cmp	r2, r3
+ 80109da:	d00b      	beq.n	80109f4 <mem_malloc+0x15c>
+ 80109dc:	4b28      	ldr	r3, [pc, #160]	; (8010a80 <mem_malloc+0x1e8>)
+ 80109de:	681b      	ldr	r3, [r3, #0]
+ 80109e0:	791b      	ldrb	r3, [r3, #4]
+ 80109e2:	2b00      	cmp	r3, #0
+ 80109e4:	d006      	beq.n	80109f4 <mem_malloc+0x15c>
+ 80109e6:	4b27      	ldr	r3, [pc, #156]	; (8010a84 <mem_malloc+0x1ec>)
+ 80109e8:	f240 32b5 	movw	r2, #949	; 0x3b5
+ 80109ec:	4929      	ldr	r1, [pc, #164]	; (8010a94 <mem_malloc+0x1fc>)
+ 80109ee:	4827      	ldr	r0, [pc, #156]	; (8010a8c <mem_malloc+0x1f4>)
+ 80109f0:	f00b fd02 	bl	801c3f8 <iprintf>
+        }
+        LWIP_MEM_ALLOC_UNPROTECT();
+        sys_mutex_unlock(&mem_mutex);
+ 80109f4:	4821      	ldr	r0, [pc, #132]	; (8010a7c <mem_malloc+0x1e4>)
+ 80109f6:	f00b fc4e 	bl	801c296 <sys_mutex_unlock>
+        LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.",
+ 80109fa:	8bba      	ldrh	r2, [r7, #28]
+ 80109fc:	697b      	ldr	r3, [r7, #20]
+ 80109fe:	4413      	add	r3, r2
+ 8010a00:	3308      	adds	r3, #8
+ 8010a02:	4a23      	ldr	r2, [pc, #140]	; (8010a90 <mem_malloc+0x1f8>)
+ 8010a04:	6812      	ldr	r2, [r2, #0]
+ 8010a06:	4293      	cmp	r3, r2
+ 8010a08:	d906      	bls.n	8010a18 <mem_malloc+0x180>
+ 8010a0a:	4b1e      	ldr	r3, [pc, #120]	; (8010a84 <mem_malloc+0x1ec>)
+ 8010a0c:	f240 32ba 	movw	r2, #954	; 0x3ba
+ 8010a10:	4921      	ldr	r1, [pc, #132]	; (8010a98 <mem_malloc+0x200>)
+ 8010a12:	481e      	ldr	r0, [pc, #120]	; (8010a8c <mem_malloc+0x1f4>)
+ 8010a14:	f00b fcf0 	bl	801c3f8 <iprintf>
+                    (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end);
+        LWIP_ASSERT("mem_malloc: allocated memory properly aligned.",
+ 8010a18:	697b      	ldr	r3, [r7, #20]
+ 8010a1a:	f003 0303 	and.w	r3, r3, #3
+ 8010a1e:	2b00      	cmp	r3, #0
+ 8010a20:	d006      	beq.n	8010a30 <mem_malloc+0x198>
+ 8010a22:	4b18      	ldr	r3, [pc, #96]	; (8010a84 <mem_malloc+0x1ec>)
+ 8010a24:	f44f 726f 	mov.w	r2, #956	; 0x3bc
+ 8010a28:	491c      	ldr	r1, [pc, #112]	; (8010a9c <mem_malloc+0x204>)
+ 8010a2a:	4818      	ldr	r0, [pc, #96]	; (8010a8c <mem_malloc+0x1f4>)
+ 8010a2c:	f00b fce4 	bl	801c3f8 <iprintf>
+                    ((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0);
+        LWIP_ASSERT("mem_malloc: sanity check alignment",
+ 8010a30:	697b      	ldr	r3, [r7, #20]
+ 8010a32:	f003 0303 	and.w	r3, r3, #3
+ 8010a36:	2b00      	cmp	r3, #0
+ 8010a38:	d006      	beq.n	8010a48 <mem_malloc+0x1b0>
+ 8010a3a:	4b12      	ldr	r3, [pc, #72]	; (8010a84 <mem_malloc+0x1ec>)
+ 8010a3c:	f240 32be 	movw	r2, #958	; 0x3be
+ 8010a40:	4917      	ldr	r1, [pc, #92]	; (8010aa0 <mem_malloc+0x208>)
+ 8010a42:	4812      	ldr	r0, [pc, #72]	; (8010a8c <mem_malloc+0x1f4>)
+ 8010a44:	f00b fcd8 	bl	801c3f8 <iprintf>
+
+#if MEM_OVERFLOW_CHECK
+        mem_overflow_init_element(mem, size_in);
+#endif
+        MEM_SANITY();
+        return (u8_t *)mem + SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET;
+ 8010a48:	697b      	ldr	r3, [r7, #20]
+ 8010a4a:	3308      	adds	r3, #8
+ 8010a4c:	e011      	b.n	8010a72 <mem_malloc+0x1da>
+         ptr = ptr_to_mem(ptr)->next) {
+ 8010a4e:	8bfb      	ldrh	r3, [r7, #30]
+ 8010a50:	4618      	mov	r0, r3
+ 8010a52:	f7ff fc33 	bl	80102bc <ptr_to_mem>
+ 8010a56:	4603      	mov	r3, r0
+ 8010a58:	881b      	ldrh	r3, [r3, #0]
+ 8010a5a:	83fb      	strh	r3, [r7, #30]
+    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
+ 8010a5c:	8bfa      	ldrh	r2, [r7, #30]
+ 8010a5e:	8bbb      	ldrh	r3, [r7, #28]
+ 8010a60:	f5c3 63c8 	rsb	r3, r3, #1600	; 0x640
+ 8010a64:	429a      	cmp	r2, r3
+ 8010a66:	f4ff af41 	bcc.w	80108ec <mem_malloc+0x54>
+    /* if we got interrupted by a mem_free, try again */
+  } while (local_mem_free_count != 0);
+#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
+  MEM_STATS_INC(err);
+  LWIP_MEM_ALLOC_UNPROTECT();
+  sys_mutex_unlock(&mem_mutex);
+ 8010a6a:	4804      	ldr	r0, [pc, #16]	; (8010a7c <mem_malloc+0x1e4>)
+ 8010a6c:	f00b fc13 	bl	801c296 <sys_mutex_unlock>
+  LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size));
+  return NULL;
+ 8010a70:	2300      	movs	r3, #0
+}
+ 8010a72:	4618      	mov	r0, r3
+ 8010a74:	3720      	adds	r7, #32
+ 8010a76:	46bd      	mov	sp, r7
+ 8010a78:	bd80      	pop	{r7, pc}
+ 8010a7a:	bf00      	nop
+ 8010a7c:	200086d8 	.word	0x200086d8
+ 8010a80:	200086dc 	.word	0x200086dc
+ 8010a84:	0801d7e4 	.word	0x0801d7e4
+ 8010a88:	0801d9a8 	.word	0x0801d9a8
+ 8010a8c:	0801d82c 	.word	0x0801d82c
+ 8010a90:	200086d4 	.word	0x200086d4
+ 8010a94:	0801d9bc 	.word	0x0801d9bc
+ 8010a98:	0801d9d8 	.word	0x0801d9d8
+ 8010a9c:	0801da08 	.word	0x0801da08
+ 8010aa0:	0801da38 	.word	0x0801da38
+
+08010aa4 <memp_init_pool>:
+ *
+ * @param desc pool to initialize
+ */
+void
+memp_init_pool(const struct memp_desc *desc)
+{
+ 8010aa4:	b480      	push	{r7}
+ 8010aa6:	b085      	sub	sp, #20
+ 8010aa8:	af00      	add	r7, sp, #0
+ 8010aaa:	6078      	str	r0, [r7, #4]
+  LWIP_UNUSED_ARG(desc);
+#else
+  int i;
+  struct memp *memp;
+
+  *desc->tab = NULL;
+ 8010aac:	687b      	ldr	r3, [r7, #4]
+ 8010aae:	689b      	ldr	r3, [r3, #8]
+ 8010ab0:	2200      	movs	r2, #0
+ 8010ab2:	601a      	str	r2, [r3, #0]
+  memp = (struct memp *)LWIP_MEM_ALIGN(desc->base);
+ 8010ab4:	687b      	ldr	r3, [r7, #4]
+ 8010ab6:	685b      	ldr	r3, [r3, #4]
+ 8010ab8:	3303      	adds	r3, #3
+ 8010aba:	f023 0303 	bic.w	r3, r3, #3
+ 8010abe:	60bb      	str	r3, [r7, #8]
+                                       + MEM_SANITY_REGION_AFTER_ALIGNED
+#endif
+                                      ));
+#endif
+  /* create a linked list of memp elements */
+  for (i = 0; i < desc->num; ++i) {
+ 8010ac0:	2300      	movs	r3, #0
+ 8010ac2:	60fb      	str	r3, [r7, #12]
+ 8010ac4:	e011      	b.n	8010aea <memp_init_pool+0x46>
+    memp->next = *desc->tab;
+ 8010ac6:	687b      	ldr	r3, [r7, #4]
+ 8010ac8:	689b      	ldr	r3, [r3, #8]
+ 8010aca:	681a      	ldr	r2, [r3, #0]
+ 8010acc:	68bb      	ldr	r3, [r7, #8]
+ 8010ace:	601a      	str	r2, [r3, #0]
+    *desc->tab = memp;
+ 8010ad0:	687b      	ldr	r3, [r7, #4]
+ 8010ad2:	689b      	ldr	r3, [r3, #8]
+ 8010ad4:	68ba      	ldr	r2, [r7, #8]
+ 8010ad6:	601a      	str	r2, [r3, #0]
+#if MEMP_OVERFLOW_CHECK
+    memp_overflow_init_element(memp, desc);
+#endif /* MEMP_OVERFLOW_CHECK */
+    /* cast through void* to get rid of alignment warnings */
+    memp = (struct memp *)(void *)((u8_t *)memp + MEMP_SIZE + desc->size
+ 8010ad8:	687b      	ldr	r3, [r7, #4]
+ 8010ada:	881b      	ldrh	r3, [r3, #0]
+ 8010adc:	461a      	mov	r2, r3
+ 8010ade:	68bb      	ldr	r3, [r7, #8]
+ 8010ae0:	4413      	add	r3, r2
+ 8010ae2:	60bb      	str	r3, [r7, #8]
+  for (i = 0; i < desc->num; ++i) {
+ 8010ae4:	68fb      	ldr	r3, [r7, #12]
+ 8010ae6:	3301      	adds	r3, #1
+ 8010ae8:	60fb      	str	r3, [r7, #12]
+ 8010aea:	687b      	ldr	r3, [r7, #4]
+ 8010aec:	885b      	ldrh	r3, [r3, #2]
+ 8010aee:	461a      	mov	r2, r3
+ 8010af0:	68fb      	ldr	r3, [r7, #12]
+ 8010af2:	4293      	cmp	r3, r2
+ 8010af4:	dbe7      	blt.n	8010ac6 <memp_init_pool+0x22>
+#endif /* !MEMP_MEM_MALLOC */
+
+#if MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY)
+  desc->stats->name  = desc->desc;
+#endif /* MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY) */
+}
+ 8010af6:	bf00      	nop
+ 8010af8:	3714      	adds	r7, #20
+ 8010afa:	46bd      	mov	sp, r7
+ 8010afc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8010b00:	4770      	bx	lr
+	...
+
+08010b04 <memp_init>:
+ *
+ * Carves out memp_memory into linked lists for each pool-type.
+ */
+void
+memp_init(void)
+{
+ 8010b04:	b580      	push	{r7, lr}
+ 8010b06:	b082      	sub	sp, #8
+ 8010b08:	af00      	add	r7, sp, #0
+  u16_t i;
+
+  /* for every pool: */
+  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
+ 8010b0a:	2300      	movs	r3, #0
+ 8010b0c:	80fb      	strh	r3, [r7, #6]
+ 8010b0e:	e009      	b.n	8010b24 <memp_init+0x20>
+    memp_init_pool(memp_pools[i]);
+ 8010b10:	88fb      	ldrh	r3, [r7, #6]
+ 8010b12:	4a08      	ldr	r2, [pc, #32]	; (8010b34 <memp_init+0x30>)
+ 8010b14:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8010b18:	4618      	mov	r0, r3
+ 8010b1a:	f7ff ffc3 	bl	8010aa4 <memp_init_pool>
+  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
+ 8010b1e:	88fb      	ldrh	r3, [r7, #6]
+ 8010b20:	3301      	adds	r3, #1
+ 8010b22:	80fb      	strh	r3, [r7, #6]
+ 8010b24:	88fb      	ldrh	r3, [r7, #6]
+ 8010b26:	2b0c      	cmp	r3, #12
+ 8010b28:	d9f2      	bls.n	8010b10 <memp_init+0xc>
+
+#if MEMP_OVERFLOW_CHECK >= 2
+  /* check everything a first time to see if it worked */
+  memp_overflow_check_all();
+#endif /* MEMP_OVERFLOW_CHECK >= 2 */
+}
+ 8010b2a:	bf00      	nop
+ 8010b2c:	3708      	adds	r7, #8
+ 8010b2e:	46bd      	mov	sp, r7
+ 8010b30:	bd80      	pop	{r7, pc}
+ 8010b32:	bf00      	nop
+ 8010b34:	08022514 	.word	0x08022514
+
+08010b38 <do_memp_malloc_pool>:
+#if !MEMP_OVERFLOW_CHECK
+do_memp_malloc_pool(const struct memp_desc *desc)
+#else
+do_memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
+#endif
+{
+ 8010b38:	b580      	push	{r7, lr}
+ 8010b3a:	b084      	sub	sp, #16
+ 8010b3c:	af00      	add	r7, sp, #0
+ 8010b3e:	6078      	str	r0, [r7, #4]
+
+#if MEMP_MEM_MALLOC
+  memp = (struct memp *)mem_malloc(MEMP_SIZE + MEMP_ALIGN_SIZE(desc->size));
+  SYS_ARCH_PROTECT(old_level);
+#else /* MEMP_MEM_MALLOC */
+  SYS_ARCH_PROTECT(old_level);
+ 8010b40:	f00b fbdc 	bl	801c2fc <sys_arch_protect>
+ 8010b44:	60f8      	str	r0, [r7, #12]
+
+  memp = *desc->tab;
+ 8010b46:	687b      	ldr	r3, [r7, #4]
+ 8010b48:	689b      	ldr	r3, [r3, #8]
+ 8010b4a:	681b      	ldr	r3, [r3, #0]
+ 8010b4c:	60bb      	str	r3, [r7, #8]
+#endif /* MEMP_MEM_MALLOC */
+
+  if (memp != NULL) {
+ 8010b4e:	68bb      	ldr	r3, [r7, #8]
+ 8010b50:	2b00      	cmp	r3, #0
+ 8010b52:	d015      	beq.n	8010b80 <do_memp_malloc_pool+0x48>
+#if !MEMP_MEM_MALLOC
+#if MEMP_OVERFLOW_CHECK == 1
+    memp_overflow_check_element(memp, desc);
+#endif /* MEMP_OVERFLOW_CHECK */
+
+    *desc->tab = memp->next;
+ 8010b54:	687b      	ldr	r3, [r7, #4]
+ 8010b56:	689b      	ldr	r3, [r3, #8]
+ 8010b58:	68ba      	ldr	r2, [r7, #8]
+ 8010b5a:	6812      	ldr	r2, [r2, #0]
+ 8010b5c:	601a      	str	r2, [r3, #0]
+    memp->line = line;
+#if MEMP_MEM_MALLOC
+    memp_overflow_init_element(memp, desc);
+#endif /* MEMP_MEM_MALLOC */
+#endif /* MEMP_OVERFLOW_CHECK */
+    LWIP_ASSERT("memp_malloc: memp properly aligned",
+ 8010b5e:	68bb      	ldr	r3, [r7, #8]
+ 8010b60:	f003 0303 	and.w	r3, r3, #3
+ 8010b64:	2b00      	cmp	r3, #0
+ 8010b66:	d006      	beq.n	8010b76 <do_memp_malloc_pool+0x3e>
+ 8010b68:	4b09      	ldr	r3, [pc, #36]	; (8010b90 <do_memp_malloc_pool+0x58>)
+ 8010b6a:	f240 1219 	movw	r2, #281	; 0x119
+ 8010b6e:	4909      	ldr	r1, [pc, #36]	; (8010b94 <do_memp_malloc_pool+0x5c>)
+ 8010b70:	4809      	ldr	r0, [pc, #36]	; (8010b98 <do_memp_malloc_pool+0x60>)
+ 8010b72:	f00b fc41 	bl	801c3f8 <iprintf>
+    desc->stats->used++;
+    if (desc->stats->used > desc->stats->max) {
+      desc->stats->max = desc->stats->used;
+    }
+#endif
+    SYS_ARCH_UNPROTECT(old_level);
+ 8010b76:	68f8      	ldr	r0, [r7, #12]
+ 8010b78:	f00b fbce 	bl	801c318 <sys_arch_unprotect>
+    /* cast through u8_t* to get rid of alignment warnings */
+    return ((u8_t *)memp + MEMP_SIZE);
+ 8010b7c:	68bb      	ldr	r3, [r7, #8]
+ 8010b7e:	e003      	b.n	8010b88 <do_memp_malloc_pool+0x50>
+  } else {
+#if MEMP_STATS
+    desc->stats->err++;
+#endif
+    SYS_ARCH_UNPROTECT(old_level);
+ 8010b80:	68f8      	ldr	r0, [r7, #12]
+ 8010b82:	f00b fbc9 	bl	801c318 <sys_arch_unprotect>
+    LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", desc->desc));
+  }
+
+  return NULL;
+ 8010b86:	2300      	movs	r3, #0
+}
+ 8010b88:	4618      	mov	r0, r3
+ 8010b8a:	3710      	adds	r7, #16
+ 8010b8c:	46bd      	mov	sp, r7
+ 8010b8e:	bd80      	pop	{r7, pc}
+ 8010b90:	0801da5c 	.word	0x0801da5c
+ 8010b94:	0801da8c 	.word	0x0801da8c
+ 8010b98:	0801dab0 	.word	0x0801dab0
+
+08010b9c <memp_malloc>:
+#if !MEMP_OVERFLOW_CHECK
+memp_malloc(memp_t type)
+#else
+memp_malloc_fn(memp_t type, const char *file, const int line)
+#endif
+{
+ 8010b9c:	b580      	push	{r7, lr}
+ 8010b9e:	b084      	sub	sp, #16
+ 8010ba0:	af00      	add	r7, sp, #0
+ 8010ba2:	4603      	mov	r3, r0
+ 8010ba4:	71fb      	strb	r3, [r7, #7]
+  void *memp;
+  LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;);
+ 8010ba6:	79fb      	ldrb	r3, [r7, #7]
+ 8010ba8:	2b0c      	cmp	r3, #12
+ 8010baa:	d908      	bls.n	8010bbe <memp_malloc+0x22>
+ 8010bac:	4b0a      	ldr	r3, [pc, #40]	; (8010bd8 <memp_malloc+0x3c>)
+ 8010bae:	f240 1257 	movw	r2, #343	; 0x157
+ 8010bb2:	490a      	ldr	r1, [pc, #40]	; (8010bdc <memp_malloc+0x40>)
+ 8010bb4:	480a      	ldr	r0, [pc, #40]	; (8010be0 <memp_malloc+0x44>)
+ 8010bb6:	f00b fc1f 	bl	801c3f8 <iprintf>
+ 8010bba:	2300      	movs	r3, #0
+ 8010bbc:	e008      	b.n	8010bd0 <memp_malloc+0x34>
+#if MEMP_OVERFLOW_CHECK >= 2
+  memp_overflow_check_all();
+#endif /* MEMP_OVERFLOW_CHECK >= 2 */
+
+#if !MEMP_OVERFLOW_CHECK
+  memp = do_memp_malloc_pool(memp_pools[type]);
+ 8010bbe:	79fb      	ldrb	r3, [r7, #7]
+ 8010bc0:	4a08      	ldr	r2, [pc, #32]	; (8010be4 <memp_malloc+0x48>)
+ 8010bc2:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8010bc6:	4618      	mov	r0, r3
+ 8010bc8:	f7ff ffb6 	bl	8010b38 <do_memp_malloc_pool>
+ 8010bcc:	60f8      	str	r0, [r7, #12]
+#else
+  memp = do_memp_malloc_pool_fn(memp_pools[type], file, line);
+#endif
+
+  return memp;
+ 8010bce:	68fb      	ldr	r3, [r7, #12]
+}
+ 8010bd0:	4618      	mov	r0, r3
+ 8010bd2:	3710      	adds	r7, #16
+ 8010bd4:	46bd      	mov	sp, r7
+ 8010bd6:	bd80      	pop	{r7, pc}
+ 8010bd8:	0801da5c 	.word	0x0801da5c
+ 8010bdc:	0801daec 	.word	0x0801daec
+ 8010be0:	0801dab0 	.word	0x0801dab0
+ 8010be4:	08022514 	.word	0x08022514
+
+08010be8 <do_memp_free_pool>:
+
+static void
+do_memp_free_pool(const struct memp_desc *desc, void *mem)
+{
+ 8010be8:	b580      	push	{r7, lr}
+ 8010bea:	b084      	sub	sp, #16
+ 8010bec:	af00      	add	r7, sp, #0
+ 8010bee:	6078      	str	r0, [r7, #4]
+ 8010bf0:	6039      	str	r1, [r7, #0]
+  struct memp *memp;
+  SYS_ARCH_DECL_PROTECT(old_level);
+
+  LWIP_ASSERT("memp_free: mem properly aligned",
+ 8010bf2:	683b      	ldr	r3, [r7, #0]
+ 8010bf4:	f003 0303 	and.w	r3, r3, #3
+ 8010bf8:	2b00      	cmp	r3, #0
+ 8010bfa:	d006      	beq.n	8010c0a <do_memp_free_pool+0x22>
+ 8010bfc:	4b0d      	ldr	r3, [pc, #52]	; (8010c34 <do_memp_free_pool+0x4c>)
+ 8010bfe:	f240 126d 	movw	r2, #365	; 0x16d
+ 8010c02:	490d      	ldr	r1, [pc, #52]	; (8010c38 <do_memp_free_pool+0x50>)
+ 8010c04:	480d      	ldr	r0, [pc, #52]	; (8010c3c <do_memp_free_pool+0x54>)
+ 8010c06:	f00b fbf7 	bl	801c3f8 <iprintf>
+              ((mem_ptr_t)mem % MEM_ALIGNMENT) == 0);
+
+  /* cast through void* to get rid of alignment warnings */
+  memp = (struct memp *)(void *)((u8_t *)mem - MEMP_SIZE);
+ 8010c0a:	683b      	ldr	r3, [r7, #0]
+ 8010c0c:	60fb      	str	r3, [r7, #12]
+
+  SYS_ARCH_PROTECT(old_level);
+ 8010c0e:	f00b fb75 	bl	801c2fc <sys_arch_protect>
+ 8010c12:	60b8      	str	r0, [r7, #8]
+#if MEMP_MEM_MALLOC
+  LWIP_UNUSED_ARG(desc);
+  SYS_ARCH_UNPROTECT(old_level);
+  mem_free(memp);
+#else /* MEMP_MEM_MALLOC */
+  memp->next = *desc->tab;
+ 8010c14:	687b      	ldr	r3, [r7, #4]
+ 8010c16:	689b      	ldr	r3, [r3, #8]
+ 8010c18:	681a      	ldr	r2, [r3, #0]
+ 8010c1a:	68fb      	ldr	r3, [r7, #12]
+ 8010c1c:	601a      	str	r2, [r3, #0]
+  *desc->tab = memp;
+ 8010c1e:	687b      	ldr	r3, [r7, #4]
+ 8010c20:	689b      	ldr	r3, [r3, #8]
+ 8010c22:	68fa      	ldr	r2, [r7, #12]
+ 8010c24:	601a      	str	r2, [r3, #0]
+
+#if MEMP_SANITY_CHECK
+  LWIP_ASSERT("memp sanity", memp_sanity(desc));
+#endif /* MEMP_SANITY_CHECK */
+
+  SYS_ARCH_UNPROTECT(old_level);
+ 8010c26:	68b8      	ldr	r0, [r7, #8]
+ 8010c28:	f00b fb76 	bl	801c318 <sys_arch_unprotect>
+#endif /* !MEMP_MEM_MALLOC */
+}
+ 8010c2c:	bf00      	nop
+ 8010c2e:	3710      	adds	r7, #16
+ 8010c30:	46bd      	mov	sp, r7
+ 8010c32:	bd80      	pop	{r7, pc}
+ 8010c34:	0801da5c 	.word	0x0801da5c
+ 8010c38:	0801db0c 	.word	0x0801db0c
+ 8010c3c:	0801dab0 	.word	0x0801dab0
+
+08010c40 <memp_free>:
+ * @param type the pool where to put mem
+ * @param mem the memp element to free
+ */
+void
+memp_free(memp_t type, void *mem)
+{
+ 8010c40:	b580      	push	{r7, lr}
+ 8010c42:	b082      	sub	sp, #8
+ 8010c44:	af00      	add	r7, sp, #0
+ 8010c46:	4603      	mov	r3, r0
+ 8010c48:	6039      	str	r1, [r7, #0]
+ 8010c4a:	71fb      	strb	r3, [r7, #7]
+#ifdef LWIP_HOOK_MEMP_AVAILABLE
+  struct memp *old_first;
+#endif
+
+  LWIP_ERROR("memp_free: type < MEMP_MAX", (type < MEMP_MAX), return;);
+ 8010c4c:	79fb      	ldrb	r3, [r7, #7]
+ 8010c4e:	2b0c      	cmp	r3, #12
+ 8010c50:	d907      	bls.n	8010c62 <memp_free+0x22>
+ 8010c52:	4b0c      	ldr	r3, [pc, #48]	; (8010c84 <memp_free+0x44>)
+ 8010c54:	f44f 72d5 	mov.w	r2, #426	; 0x1aa
+ 8010c58:	490b      	ldr	r1, [pc, #44]	; (8010c88 <memp_free+0x48>)
+ 8010c5a:	480c      	ldr	r0, [pc, #48]	; (8010c8c <memp_free+0x4c>)
+ 8010c5c:	f00b fbcc 	bl	801c3f8 <iprintf>
+ 8010c60:	e00c      	b.n	8010c7c <memp_free+0x3c>
+
+  if (mem == NULL) {
+ 8010c62:	683b      	ldr	r3, [r7, #0]
+ 8010c64:	2b00      	cmp	r3, #0
+ 8010c66:	d008      	beq.n	8010c7a <memp_free+0x3a>
+
+#ifdef LWIP_HOOK_MEMP_AVAILABLE
+  old_first = *memp_pools[type]->tab;
+#endif
+
+  do_memp_free_pool(memp_pools[type], mem);
+ 8010c68:	79fb      	ldrb	r3, [r7, #7]
+ 8010c6a:	4a09      	ldr	r2, [pc, #36]	; (8010c90 <memp_free+0x50>)
+ 8010c6c:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8010c70:	6839      	ldr	r1, [r7, #0]
+ 8010c72:	4618      	mov	r0, r3
+ 8010c74:	f7ff ffb8 	bl	8010be8 <do_memp_free_pool>
+ 8010c78:	e000      	b.n	8010c7c <memp_free+0x3c>
+    return;
+ 8010c7a:	bf00      	nop
+#ifdef LWIP_HOOK_MEMP_AVAILABLE
+  if (old_first == NULL) {
+    LWIP_HOOK_MEMP_AVAILABLE(type);
+  }
+#endif
+}
+ 8010c7c:	3708      	adds	r7, #8
+ 8010c7e:	46bd      	mov	sp, r7
+ 8010c80:	bd80      	pop	{r7, pc}
+ 8010c82:	bf00      	nop
+ 8010c84:	0801da5c 	.word	0x0801da5c
+ 8010c88:	0801db2c 	.word	0x0801db2c
+ 8010c8c:	0801dab0 	.word	0x0801dab0
+ 8010c90:	08022514 	.word	0x08022514
+
+08010c94 <netif_init>:
+}
+#endif /* LWIP_HAVE_LOOPIF */
+
+void
+netif_init(void)
+{
+ 8010c94:	b480      	push	{r7}
+ 8010c96:	af00      	add	r7, sp, #0
+
+  netif_set_link_up(&loop_netif);
+  netif_set_up(&loop_netif);
+
+#endif /* LWIP_HAVE_LOOPIF */
+}
+ 8010c98:	bf00      	nop
+ 8010c9a:	46bd      	mov	sp, r7
+ 8010c9c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8010ca0:	4770      	bx	lr
+	...
+
+08010ca4 <netif_add>:
+netif_add(struct netif *netif,
+#if LWIP_IPV4
+          const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw,
+#endif /* LWIP_IPV4 */
+          void *state, netif_init_fn init, netif_input_fn input)
+{
+ 8010ca4:	b580      	push	{r7, lr}
+ 8010ca6:	b086      	sub	sp, #24
+ 8010ca8:	af00      	add	r7, sp, #0
+ 8010caa:	60f8      	str	r0, [r7, #12]
+ 8010cac:	60b9      	str	r1, [r7, #8]
+ 8010cae:	607a      	str	r2, [r7, #4]
+ 8010cb0:	603b      	str	r3, [r7, #0]
+    LWIP_ASSERT("single netif already set", 0);
+    return NULL;
+  }
+#endif
+
+  LWIP_ERROR("netif_add: invalid netif", netif != NULL, return NULL);
+ 8010cb2:	68fb      	ldr	r3, [r7, #12]
+ 8010cb4:	2b00      	cmp	r3, #0
+ 8010cb6:	d108      	bne.n	8010cca <netif_add+0x26>
+ 8010cb8:	4b5b      	ldr	r3, [pc, #364]	; (8010e28 <netif_add+0x184>)
+ 8010cba:	f240 1227 	movw	r2, #295	; 0x127
+ 8010cbe:	495b      	ldr	r1, [pc, #364]	; (8010e2c <netif_add+0x188>)
+ 8010cc0:	485b      	ldr	r0, [pc, #364]	; (8010e30 <netif_add+0x18c>)
+ 8010cc2:	f00b fb99 	bl	801c3f8 <iprintf>
+ 8010cc6:	2300      	movs	r3, #0
+ 8010cc8:	e0a9      	b.n	8010e1e <netif_add+0x17a>
+  LWIP_ERROR("netif_add: No init function given", init != NULL, return NULL);
+ 8010cca:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8010ccc:	2b00      	cmp	r3, #0
+ 8010cce:	d108      	bne.n	8010ce2 <netif_add+0x3e>
+ 8010cd0:	4b55      	ldr	r3, [pc, #340]	; (8010e28 <netif_add+0x184>)
+ 8010cd2:	f44f 7294 	mov.w	r2, #296	; 0x128
+ 8010cd6:	4957      	ldr	r1, [pc, #348]	; (8010e34 <netif_add+0x190>)
+ 8010cd8:	4855      	ldr	r0, [pc, #340]	; (8010e30 <netif_add+0x18c>)
+ 8010cda:	f00b fb8d 	bl	801c3f8 <iprintf>
+ 8010cde:	2300      	movs	r3, #0
+ 8010ce0:	e09d      	b.n	8010e1e <netif_add+0x17a>
+
+#if LWIP_IPV4
+  if (ipaddr == NULL) {
+ 8010ce2:	68bb      	ldr	r3, [r7, #8]
+ 8010ce4:	2b00      	cmp	r3, #0
+ 8010ce6:	d101      	bne.n	8010cec <netif_add+0x48>
+    ipaddr = ip_2_ip4(IP4_ADDR_ANY);
+ 8010ce8:	4b53      	ldr	r3, [pc, #332]	; (8010e38 <netif_add+0x194>)
+ 8010cea:	60bb      	str	r3, [r7, #8]
+  }
+  if (netmask == NULL) {
+ 8010cec:	687b      	ldr	r3, [r7, #4]
+ 8010cee:	2b00      	cmp	r3, #0
+ 8010cf0:	d101      	bne.n	8010cf6 <netif_add+0x52>
+    netmask = ip_2_ip4(IP4_ADDR_ANY);
+ 8010cf2:	4b51      	ldr	r3, [pc, #324]	; (8010e38 <netif_add+0x194>)
+ 8010cf4:	607b      	str	r3, [r7, #4]
+  }
+  if (gw == NULL) {
+ 8010cf6:	683b      	ldr	r3, [r7, #0]
+ 8010cf8:	2b00      	cmp	r3, #0
+ 8010cfa:	d101      	bne.n	8010d00 <netif_add+0x5c>
+    gw = ip_2_ip4(IP4_ADDR_ANY);
+ 8010cfc:	4b4e      	ldr	r3, [pc, #312]	; (8010e38 <netif_add+0x194>)
+ 8010cfe:	603b      	str	r3, [r7, #0]
+  }
+
+  /* reset new interface configuration state */
+  ip_addr_set_zero_ip4(&netif->ip_addr);
+ 8010d00:	68fb      	ldr	r3, [r7, #12]
+ 8010d02:	2200      	movs	r2, #0
+ 8010d04:	605a      	str	r2, [r3, #4]
+  ip_addr_set_zero_ip4(&netif->netmask);
+ 8010d06:	68fb      	ldr	r3, [r7, #12]
+ 8010d08:	2200      	movs	r2, #0
+ 8010d0a:	609a      	str	r2, [r3, #8]
+  ip_addr_set_zero_ip4(&netif->gw);
+ 8010d0c:	68fb      	ldr	r3, [r7, #12]
+ 8010d0e:	2200      	movs	r2, #0
+ 8010d10:	60da      	str	r2, [r3, #12]
+  netif->output = netif_null_output_ip4;
+ 8010d12:	68fb      	ldr	r3, [r7, #12]
+ 8010d14:	4a49      	ldr	r2, [pc, #292]	; (8010e3c <netif_add+0x198>)
+ 8010d16:	615a      	str	r2, [r3, #20]
+#endif /* LWIP_IPV6_ADDRESS_LIFETIMES */
+  }
+  netif->output_ip6 = netif_null_output_ip6;
+#endif /* LWIP_IPV6 */
+  NETIF_SET_CHECKSUM_CTRL(netif, NETIF_CHECKSUM_ENABLE_ALL);
+  netif->mtu = 0;
+ 8010d18:	68fb      	ldr	r3, [r7, #12]
+ 8010d1a:	2200      	movs	r2, #0
+ 8010d1c:	851a      	strh	r2, [r3, #40]	; 0x28
+  netif->flags = 0;
+ 8010d1e:	68fb      	ldr	r3, [r7, #12]
+ 8010d20:	2200      	movs	r2, #0
+ 8010d22:	f883 2031 	strb.w	r2, [r3, #49]	; 0x31
+#ifdef netif_get_client_data
+  memset(netif->client_data, 0, sizeof(netif->client_data));
+ 8010d26:	68fb      	ldr	r3, [r7, #12]
+ 8010d28:	3324      	adds	r3, #36	; 0x24
+ 8010d2a:	2204      	movs	r2, #4
+ 8010d2c:	2100      	movs	r1, #0
+ 8010d2e:	4618      	mov	r0, r3
+ 8010d30:	f00b fb59 	bl	801c3e6 <memset>
+#endif /* LWIP_IPV6 */
+#if LWIP_NETIF_STATUS_CALLBACK
+  netif->status_callback = NULL;
+#endif /* LWIP_NETIF_STATUS_CALLBACK */
+#if LWIP_NETIF_LINK_CALLBACK
+  netif->link_callback = NULL;
+ 8010d34:	68fb      	ldr	r3, [r7, #12]
+ 8010d36:	2200      	movs	r2, #0
+ 8010d38:	61da      	str	r2, [r3, #28]
+  netif->loop_first = NULL;
+  netif->loop_last = NULL;
+#endif /* ENABLE_LOOPBACK */
+
+  /* remember netif specific state information data */
+  netif->state = state;
+ 8010d3a:	68fb      	ldr	r3, [r7, #12]
+ 8010d3c:	6a3a      	ldr	r2, [r7, #32]
+ 8010d3e:	621a      	str	r2, [r3, #32]
+  netif->num = netif_num;
+ 8010d40:	4b3f      	ldr	r3, [pc, #252]	; (8010e40 <netif_add+0x19c>)
+ 8010d42:	781a      	ldrb	r2, [r3, #0]
+ 8010d44:	68fb      	ldr	r3, [r7, #12]
+ 8010d46:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
+  netif->input = input;
+ 8010d4a:	68fb      	ldr	r3, [r7, #12]
+ 8010d4c:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 8010d4e:	611a      	str	r2, [r3, #16]
+#if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS
+  netif->loop_cnt_current = 0;
+#endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */
+
+#if LWIP_IPV4
+  netif_set_addr(netif, ipaddr, netmask, gw);
+ 8010d50:	683b      	ldr	r3, [r7, #0]
+ 8010d52:	687a      	ldr	r2, [r7, #4]
+ 8010d54:	68b9      	ldr	r1, [r7, #8]
+ 8010d56:	68f8      	ldr	r0, [r7, #12]
+ 8010d58:	f000 f914 	bl	8010f84 <netif_set_addr>
+#endif /* LWIP_IPV4 */
+
+  /* call user specified initialization function for netif */
+  if (init(netif) != ERR_OK) {
+ 8010d5c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8010d5e:	68f8      	ldr	r0, [r7, #12]
+ 8010d60:	4798      	blx	r3
+ 8010d62:	4603      	mov	r3, r0
+ 8010d64:	2b00      	cmp	r3, #0
+ 8010d66:	d001      	beq.n	8010d6c <netif_add+0xc8>
+    return NULL;
+ 8010d68:	2300      	movs	r3, #0
+ 8010d6a:	e058      	b.n	8010e1e <netif_add+0x17a>
+     */
+  {
+    struct netif *netif2;
+    int num_netifs;
+    do {
+      if (netif->num == 255) {
+ 8010d6c:	68fb      	ldr	r3, [r7, #12]
+ 8010d6e:	f893 3034 	ldrb.w	r3, [r3, #52]	; 0x34
+ 8010d72:	2bff      	cmp	r3, #255	; 0xff
+ 8010d74:	d103      	bne.n	8010d7e <netif_add+0xda>
+        netif->num = 0;
+ 8010d76:	68fb      	ldr	r3, [r7, #12]
+ 8010d78:	2200      	movs	r2, #0
+ 8010d7a:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
+      }
+      num_netifs = 0;
+ 8010d7e:	2300      	movs	r3, #0
+ 8010d80:	613b      	str	r3, [r7, #16]
+      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
+ 8010d82:	4b30      	ldr	r3, [pc, #192]	; (8010e44 <netif_add+0x1a0>)
+ 8010d84:	681b      	ldr	r3, [r3, #0]
+ 8010d86:	617b      	str	r3, [r7, #20]
+ 8010d88:	e02b      	b.n	8010de2 <netif_add+0x13e>
+        LWIP_ASSERT("netif already added", netif2 != netif);
+ 8010d8a:	697a      	ldr	r2, [r7, #20]
+ 8010d8c:	68fb      	ldr	r3, [r7, #12]
+ 8010d8e:	429a      	cmp	r2, r3
+ 8010d90:	d106      	bne.n	8010da0 <netif_add+0xfc>
+ 8010d92:	4b25      	ldr	r3, [pc, #148]	; (8010e28 <netif_add+0x184>)
+ 8010d94:	f240 128b 	movw	r2, #395	; 0x18b
+ 8010d98:	492b      	ldr	r1, [pc, #172]	; (8010e48 <netif_add+0x1a4>)
+ 8010d9a:	4825      	ldr	r0, [pc, #148]	; (8010e30 <netif_add+0x18c>)
+ 8010d9c:	f00b fb2c 	bl	801c3f8 <iprintf>
+        num_netifs++;
+ 8010da0:	693b      	ldr	r3, [r7, #16]
+ 8010da2:	3301      	adds	r3, #1
+ 8010da4:	613b      	str	r3, [r7, #16]
+        LWIP_ASSERT("too many netifs, max. supported number is 255", num_netifs <= 255);
+ 8010da6:	693b      	ldr	r3, [r7, #16]
+ 8010da8:	2bff      	cmp	r3, #255	; 0xff
+ 8010daa:	dd06      	ble.n	8010dba <netif_add+0x116>
+ 8010dac:	4b1e      	ldr	r3, [pc, #120]	; (8010e28 <netif_add+0x184>)
+ 8010dae:	f240 128d 	movw	r2, #397	; 0x18d
+ 8010db2:	4926      	ldr	r1, [pc, #152]	; (8010e4c <netif_add+0x1a8>)
+ 8010db4:	481e      	ldr	r0, [pc, #120]	; (8010e30 <netif_add+0x18c>)
+ 8010db6:	f00b fb1f 	bl	801c3f8 <iprintf>
+        if (netif2->num == netif->num) {
+ 8010dba:	697b      	ldr	r3, [r7, #20]
+ 8010dbc:	f893 2034 	ldrb.w	r2, [r3, #52]	; 0x34
+ 8010dc0:	68fb      	ldr	r3, [r7, #12]
+ 8010dc2:	f893 3034 	ldrb.w	r3, [r3, #52]	; 0x34
+ 8010dc6:	429a      	cmp	r2, r3
+ 8010dc8:	d108      	bne.n	8010ddc <netif_add+0x138>
+          netif->num++;
+ 8010dca:	68fb      	ldr	r3, [r7, #12]
+ 8010dcc:	f893 3034 	ldrb.w	r3, [r3, #52]	; 0x34
+ 8010dd0:	3301      	adds	r3, #1
+ 8010dd2:	b2da      	uxtb	r2, r3
+ 8010dd4:	68fb      	ldr	r3, [r7, #12]
+ 8010dd6:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
+          break;
+ 8010dda:	e005      	b.n	8010de8 <netif_add+0x144>
+      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
+ 8010ddc:	697b      	ldr	r3, [r7, #20]
+ 8010dde:	681b      	ldr	r3, [r3, #0]
+ 8010de0:	617b      	str	r3, [r7, #20]
+ 8010de2:	697b      	ldr	r3, [r7, #20]
+ 8010de4:	2b00      	cmp	r3, #0
+ 8010de6:	d1d0      	bne.n	8010d8a <netif_add+0xe6>
+        }
+      }
+    } while (netif2 != NULL);
+ 8010de8:	697b      	ldr	r3, [r7, #20]
+ 8010dea:	2b00      	cmp	r3, #0
+ 8010dec:	d1be      	bne.n	8010d6c <netif_add+0xc8>
+  }
+  if (netif->num == 254) {
+ 8010dee:	68fb      	ldr	r3, [r7, #12]
+ 8010df0:	f893 3034 	ldrb.w	r3, [r3, #52]	; 0x34
+ 8010df4:	2bfe      	cmp	r3, #254	; 0xfe
+ 8010df6:	d103      	bne.n	8010e00 <netif_add+0x15c>
+    netif_num = 0;
+ 8010df8:	4b11      	ldr	r3, [pc, #68]	; (8010e40 <netif_add+0x19c>)
+ 8010dfa:	2200      	movs	r2, #0
+ 8010dfc:	701a      	strb	r2, [r3, #0]
+ 8010dfe:	e006      	b.n	8010e0e <netif_add+0x16a>
+  } else {
+    netif_num = (u8_t)(netif->num + 1);
+ 8010e00:	68fb      	ldr	r3, [r7, #12]
+ 8010e02:	f893 3034 	ldrb.w	r3, [r3, #52]	; 0x34
+ 8010e06:	3301      	adds	r3, #1
+ 8010e08:	b2da      	uxtb	r2, r3
+ 8010e0a:	4b0d      	ldr	r3, [pc, #52]	; (8010e40 <netif_add+0x19c>)
+ 8010e0c:	701a      	strb	r2, [r3, #0]
+  }
+
+  /* add this netif to the list */
+  netif->next = netif_list;
+ 8010e0e:	4b0d      	ldr	r3, [pc, #52]	; (8010e44 <netif_add+0x1a0>)
+ 8010e10:	681a      	ldr	r2, [r3, #0]
+ 8010e12:	68fb      	ldr	r3, [r7, #12]
+ 8010e14:	601a      	str	r2, [r3, #0]
+  netif_list = netif;
+ 8010e16:	4a0b      	ldr	r2, [pc, #44]	; (8010e44 <netif_add+0x1a0>)
+ 8010e18:	68fb      	ldr	r3, [r7, #12]
+ 8010e1a:	6013      	str	r3, [r2, #0]
+#endif /* LWIP_IPV4 */
+  LWIP_DEBUGF(NETIF_DEBUG, ("\n"));
+
+  netif_invoke_ext_callback(netif, LWIP_NSC_NETIF_ADDED, NULL);
+
+  return netif;
+ 8010e1c:	68fb      	ldr	r3, [r7, #12]
+}
+ 8010e1e:	4618      	mov	r0, r3
+ 8010e20:	3718      	adds	r7, #24
+ 8010e22:	46bd      	mov	sp, r7
+ 8010e24:	bd80      	pop	{r7, pc}
+ 8010e26:	bf00      	nop
+ 8010e28:	0801db48 	.word	0x0801db48
+ 8010e2c:	0801dbdc 	.word	0x0801dbdc
+ 8010e30:	0801db98 	.word	0x0801db98
+ 8010e34:	0801dbf8 	.word	0x0801dbf8
+ 8010e38:	08022598 	.word	0x08022598
+ 8010e3c:	08011267 	.word	0x08011267
+ 8010e40:	20008714 	.word	0x20008714
+ 8010e44:	2000f7d8 	.word	0x2000f7d8
+ 8010e48:	0801dc1c 	.word	0x0801dc1c
+ 8010e4c:	0801dc30 	.word	0x0801dc30
+
+08010e50 <netif_do_ip_addr_changed>:
+
+static void
+netif_do_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
+{
+ 8010e50:	b580      	push	{r7, lr}
+ 8010e52:	b082      	sub	sp, #8
+ 8010e54:	af00      	add	r7, sp, #0
+ 8010e56:	6078      	str	r0, [r7, #4]
+ 8010e58:	6039      	str	r1, [r7, #0]
+#if LWIP_TCP
+  tcp_netif_ip_addr_changed(old_addr, new_addr);
+ 8010e5a:	6839      	ldr	r1, [r7, #0]
+ 8010e5c:	6878      	ldr	r0, [r7, #4]
+ 8010e5e:	f002 fb81 	bl	8013564 <tcp_netif_ip_addr_changed>
+#endif /* LWIP_TCP */
+#if LWIP_UDP
+  udp_netif_ip_addr_changed(old_addr, new_addr);
+ 8010e62:	6839      	ldr	r1, [r7, #0]
+ 8010e64:	6878      	ldr	r0, [r7, #4]
+ 8010e66:	f006 ffa1 	bl	8017dac <udp_netif_ip_addr_changed>
+#endif /* LWIP_UDP */
+#if LWIP_RAW
+  raw_netif_ip_addr_changed(old_addr, new_addr);
+#endif /* LWIP_RAW */
+}
+ 8010e6a:	bf00      	nop
+ 8010e6c:	3708      	adds	r7, #8
+ 8010e6e:	46bd      	mov	sp, r7
+ 8010e70:	bd80      	pop	{r7, pc}
+	...
+
+08010e74 <netif_do_set_ipaddr>:
+
+#if LWIP_IPV4
+static int
+netif_do_set_ipaddr(struct netif *netif, const ip4_addr_t *ipaddr, ip_addr_t *old_addr)
+{
+ 8010e74:	b580      	push	{r7, lr}
+ 8010e76:	b086      	sub	sp, #24
+ 8010e78:	af00      	add	r7, sp, #0
+ 8010e7a:	60f8      	str	r0, [r7, #12]
+ 8010e7c:	60b9      	str	r1, [r7, #8]
+ 8010e7e:	607a      	str	r2, [r7, #4]
+  LWIP_ASSERT("invalid pointer", ipaddr != NULL);
+ 8010e80:	68bb      	ldr	r3, [r7, #8]
+ 8010e82:	2b00      	cmp	r3, #0
+ 8010e84:	d106      	bne.n	8010e94 <netif_do_set_ipaddr+0x20>
+ 8010e86:	4b1d      	ldr	r3, [pc, #116]	; (8010efc <netif_do_set_ipaddr+0x88>)
+ 8010e88:	f240 12cb 	movw	r2, #459	; 0x1cb
+ 8010e8c:	491c      	ldr	r1, [pc, #112]	; (8010f00 <netif_do_set_ipaddr+0x8c>)
+ 8010e8e:	481d      	ldr	r0, [pc, #116]	; (8010f04 <netif_do_set_ipaddr+0x90>)
+ 8010e90:	f00b fab2 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("invalid pointer", old_addr != NULL);
+ 8010e94:	687b      	ldr	r3, [r7, #4]
+ 8010e96:	2b00      	cmp	r3, #0
+ 8010e98:	d106      	bne.n	8010ea8 <netif_do_set_ipaddr+0x34>
+ 8010e9a:	4b18      	ldr	r3, [pc, #96]	; (8010efc <netif_do_set_ipaddr+0x88>)
+ 8010e9c:	f44f 72e6 	mov.w	r2, #460	; 0x1cc
+ 8010ea0:	4917      	ldr	r1, [pc, #92]	; (8010f00 <netif_do_set_ipaddr+0x8c>)
+ 8010ea2:	4818      	ldr	r0, [pc, #96]	; (8010f04 <netif_do_set_ipaddr+0x90>)
+ 8010ea4:	f00b faa8 	bl	801c3f8 <iprintf>
+
+  /* address is actually being changed? */
+  if (ip4_addr_cmp(ipaddr, netif_ip4_addr(netif)) == 0) {
+ 8010ea8:	68bb      	ldr	r3, [r7, #8]
+ 8010eaa:	681a      	ldr	r2, [r3, #0]
+ 8010eac:	68fb      	ldr	r3, [r7, #12]
+ 8010eae:	3304      	adds	r3, #4
+ 8010eb0:	681b      	ldr	r3, [r3, #0]
+ 8010eb2:	429a      	cmp	r2, r3
+ 8010eb4:	d01c      	beq.n	8010ef0 <netif_do_set_ipaddr+0x7c>
+    ip_addr_t new_addr;
+    *ip_2_ip4(&new_addr) = *ipaddr;
+ 8010eb6:	68bb      	ldr	r3, [r7, #8]
+ 8010eb8:	681b      	ldr	r3, [r3, #0]
+ 8010eba:	617b      	str	r3, [r7, #20]
+    IP_SET_TYPE_VAL(new_addr, IPADDR_TYPE_V4);
+
+    ip_addr_copy(*old_addr, *netif_ip_addr4(netif));
+ 8010ebc:	68fb      	ldr	r3, [r7, #12]
+ 8010ebe:	3304      	adds	r3, #4
+ 8010ec0:	681a      	ldr	r2, [r3, #0]
+ 8010ec2:	687b      	ldr	r3, [r7, #4]
+ 8010ec4:	601a      	str	r2, [r3, #0]
+
+    LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n"));
+    netif_do_ip_addr_changed(old_addr, &new_addr);
+ 8010ec6:	f107 0314 	add.w	r3, r7, #20
+ 8010eca:	4619      	mov	r1, r3
+ 8010ecc:	6878      	ldr	r0, [r7, #4]
+ 8010ece:	f7ff ffbf 	bl	8010e50 <netif_do_ip_addr_changed>
+
+    mib2_remove_ip4(netif);
+    mib2_remove_route_ip4(0, netif);
+    /* set new IP address to netif */
+    ip4_addr_set(ip_2_ip4(&netif->ip_addr), ipaddr);
+ 8010ed2:	68bb      	ldr	r3, [r7, #8]
+ 8010ed4:	2b00      	cmp	r3, #0
+ 8010ed6:	d002      	beq.n	8010ede <netif_do_set_ipaddr+0x6a>
+ 8010ed8:	68bb      	ldr	r3, [r7, #8]
+ 8010eda:	681b      	ldr	r3, [r3, #0]
+ 8010edc:	e000      	b.n	8010ee0 <netif_do_set_ipaddr+0x6c>
+ 8010ede:	2300      	movs	r3, #0
+ 8010ee0:	68fa      	ldr	r2, [r7, #12]
+ 8010ee2:	6053      	str	r3, [r2, #4]
+    IP_SET_TYPE_VAL(netif->ip_addr, IPADDR_TYPE_V4);
+    mib2_add_ip4(netif);
+    mib2_add_route_ip4(0, netif);
+
+    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4);
+ 8010ee4:	2101      	movs	r1, #1
+ 8010ee6:	68f8      	ldr	r0, [r7, #12]
+ 8010ee8:	f000 f8d2 	bl	8011090 <netif_issue_reports>
+
+    NETIF_STATUS_CALLBACK(netif);
+    return 1; /* address changed */
+ 8010eec:	2301      	movs	r3, #1
+ 8010eee:	e000      	b.n	8010ef2 <netif_do_set_ipaddr+0x7e>
+  }
+  return 0; /* address unchanged */
+ 8010ef0:	2300      	movs	r3, #0
+}
+ 8010ef2:	4618      	mov	r0, r3
+ 8010ef4:	3718      	adds	r7, #24
+ 8010ef6:	46bd      	mov	sp, r7
+ 8010ef8:	bd80      	pop	{r7, pc}
+ 8010efa:	bf00      	nop
+ 8010efc:	0801db48 	.word	0x0801db48
+ 8010f00:	0801dc60 	.word	0x0801dc60
+ 8010f04:	0801db98 	.word	0x0801db98
+
+08010f08 <netif_do_set_netmask>:
+  }
+}
+
+static int
+netif_do_set_netmask(struct netif *netif, const ip4_addr_t *netmask, ip_addr_t *old_nm)
+{
+ 8010f08:	b480      	push	{r7}
+ 8010f0a:	b085      	sub	sp, #20
+ 8010f0c:	af00      	add	r7, sp, #0
+ 8010f0e:	60f8      	str	r0, [r7, #12]
+ 8010f10:	60b9      	str	r1, [r7, #8]
+ 8010f12:	607a      	str	r2, [r7, #4]
+  /* address is actually being changed? */
+  if (ip4_addr_cmp(netmask, netif_ip4_netmask(netif)) == 0) {
+ 8010f14:	68bb      	ldr	r3, [r7, #8]
+ 8010f16:	681a      	ldr	r2, [r3, #0]
+ 8010f18:	68fb      	ldr	r3, [r7, #12]
+ 8010f1a:	3308      	adds	r3, #8
+ 8010f1c:	681b      	ldr	r3, [r3, #0]
+ 8010f1e:	429a      	cmp	r2, r3
+ 8010f20:	d00a      	beq.n	8010f38 <netif_do_set_netmask+0x30>
+#else
+    LWIP_UNUSED_ARG(old_nm);
+#endif
+    mib2_remove_route_ip4(0, netif);
+    /* set new netmask to netif */
+    ip4_addr_set(ip_2_ip4(&netif->netmask), netmask);
+ 8010f22:	68bb      	ldr	r3, [r7, #8]
+ 8010f24:	2b00      	cmp	r3, #0
+ 8010f26:	d002      	beq.n	8010f2e <netif_do_set_netmask+0x26>
+ 8010f28:	68bb      	ldr	r3, [r7, #8]
+ 8010f2a:	681b      	ldr	r3, [r3, #0]
+ 8010f2c:	e000      	b.n	8010f30 <netif_do_set_netmask+0x28>
+ 8010f2e:	2300      	movs	r3, #0
+ 8010f30:	68fa      	ldr	r2, [r7, #12]
+ 8010f32:	6093      	str	r3, [r2, #8]
+                netif->name[0], netif->name[1],
+                ip4_addr1_16(netif_ip4_netmask(netif)),
+                ip4_addr2_16(netif_ip4_netmask(netif)),
+                ip4_addr3_16(netif_ip4_netmask(netif)),
+                ip4_addr4_16(netif_ip4_netmask(netif))));
+    return 1; /* netmask changed */
+ 8010f34:	2301      	movs	r3, #1
+ 8010f36:	e000      	b.n	8010f3a <netif_do_set_netmask+0x32>
+  }
+  return 0; /* netmask unchanged */
+ 8010f38:	2300      	movs	r3, #0
+}
+ 8010f3a:	4618      	mov	r0, r3
+ 8010f3c:	3714      	adds	r7, #20
+ 8010f3e:	46bd      	mov	sp, r7
+ 8010f40:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8010f44:	4770      	bx	lr
+
+08010f46 <netif_do_set_gw>:
+  }
+}
+
+static int
+netif_do_set_gw(struct netif *netif, const ip4_addr_t *gw, ip_addr_t *old_gw)
+{
+ 8010f46:	b480      	push	{r7}
+ 8010f48:	b085      	sub	sp, #20
+ 8010f4a:	af00      	add	r7, sp, #0
+ 8010f4c:	60f8      	str	r0, [r7, #12]
+ 8010f4e:	60b9      	str	r1, [r7, #8]
+ 8010f50:	607a      	str	r2, [r7, #4]
+  /* address is actually being changed? */
+  if (ip4_addr_cmp(gw, netif_ip4_gw(netif)) == 0) {
+ 8010f52:	68bb      	ldr	r3, [r7, #8]
+ 8010f54:	681a      	ldr	r2, [r3, #0]
+ 8010f56:	68fb      	ldr	r3, [r7, #12]
+ 8010f58:	330c      	adds	r3, #12
+ 8010f5a:	681b      	ldr	r3, [r3, #0]
+ 8010f5c:	429a      	cmp	r2, r3
+ 8010f5e:	d00a      	beq.n	8010f76 <netif_do_set_gw+0x30>
+    ip_addr_copy(*old_gw, *netif_ip_gw4(netif));
+#else
+    LWIP_UNUSED_ARG(old_gw);
+#endif
+
+    ip4_addr_set(ip_2_ip4(&netif->gw), gw);
+ 8010f60:	68bb      	ldr	r3, [r7, #8]
+ 8010f62:	2b00      	cmp	r3, #0
+ 8010f64:	d002      	beq.n	8010f6c <netif_do_set_gw+0x26>
+ 8010f66:	68bb      	ldr	r3, [r7, #8]
+ 8010f68:	681b      	ldr	r3, [r3, #0]
+ 8010f6a:	e000      	b.n	8010f6e <netif_do_set_gw+0x28>
+ 8010f6c:	2300      	movs	r3, #0
+ 8010f6e:	68fa      	ldr	r2, [r7, #12]
+ 8010f70:	60d3      	str	r3, [r2, #12]
+                netif->name[0], netif->name[1],
+                ip4_addr1_16(netif_ip4_gw(netif)),
+                ip4_addr2_16(netif_ip4_gw(netif)),
+                ip4_addr3_16(netif_ip4_gw(netif)),
+                ip4_addr4_16(netif_ip4_gw(netif))));
+    return 1; /* gateway changed */
+ 8010f72:	2301      	movs	r3, #1
+ 8010f74:	e000      	b.n	8010f78 <netif_do_set_gw+0x32>
+  }
+  return 0; /* gateway unchanged */
+ 8010f76:	2300      	movs	r3, #0
+}
+ 8010f78:	4618      	mov	r0, r3
+ 8010f7a:	3714      	adds	r7, #20
+ 8010f7c:	46bd      	mov	sp, r7
+ 8010f7e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8010f82:	4770      	bx	lr
+
+08010f84 <netif_set_addr>:
+ * @param gw the new default gateway
+ */
+void
+netif_set_addr(struct netif *netif, const ip4_addr_t *ipaddr, const ip4_addr_t *netmask,
+               const ip4_addr_t *gw)
+{
+ 8010f84:	b580      	push	{r7, lr}
+ 8010f86:	b088      	sub	sp, #32
+ 8010f88:	af00      	add	r7, sp, #0
+ 8010f8a:	60f8      	str	r0, [r7, #12]
+ 8010f8c:	60b9      	str	r1, [r7, #8]
+ 8010f8e:	607a      	str	r2, [r7, #4]
+ 8010f90:	603b      	str	r3, [r7, #0]
+  ip_addr_t old_nm_val;
+  ip_addr_t old_gw_val;
+  ip_addr_t *old_nm = &old_nm_val;
+  ip_addr_t *old_gw = &old_gw_val;
+#else
+  ip_addr_t *old_nm = NULL;
+ 8010f92:	2300      	movs	r3, #0
+ 8010f94:	61fb      	str	r3, [r7, #28]
+  ip_addr_t *old_gw = NULL;
+ 8010f96:	2300      	movs	r3, #0
+ 8010f98:	61bb      	str	r3, [r7, #24]
+  int remove;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
+  if (ipaddr == NULL) {
+ 8010f9a:	68bb      	ldr	r3, [r7, #8]
+ 8010f9c:	2b00      	cmp	r3, #0
+ 8010f9e:	d101      	bne.n	8010fa4 <netif_set_addr+0x20>
+    ipaddr = IP4_ADDR_ANY4;
+ 8010fa0:	4b1c      	ldr	r3, [pc, #112]	; (8011014 <netif_set_addr+0x90>)
+ 8010fa2:	60bb      	str	r3, [r7, #8]
+  }
+  if (netmask == NULL) {
+ 8010fa4:	687b      	ldr	r3, [r7, #4]
+ 8010fa6:	2b00      	cmp	r3, #0
+ 8010fa8:	d101      	bne.n	8010fae <netif_set_addr+0x2a>
+    netmask = IP4_ADDR_ANY4;
+ 8010faa:	4b1a      	ldr	r3, [pc, #104]	; (8011014 <netif_set_addr+0x90>)
+ 8010fac:	607b      	str	r3, [r7, #4]
+  }
+  if (gw == NULL) {
+ 8010fae:	683b      	ldr	r3, [r7, #0]
+ 8010fb0:	2b00      	cmp	r3, #0
+ 8010fb2:	d101      	bne.n	8010fb8 <netif_set_addr+0x34>
+    gw = IP4_ADDR_ANY4;
+ 8010fb4:	4b17      	ldr	r3, [pc, #92]	; (8011014 <netif_set_addr+0x90>)
+ 8010fb6:	603b      	str	r3, [r7, #0]
+  }
+
+  remove = ip4_addr_isany(ipaddr);
+ 8010fb8:	68bb      	ldr	r3, [r7, #8]
+ 8010fba:	2b00      	cmp	r3, #0
+ 8010fbc:	d003      	beq.n	8010fc6 <netif_set_addr+0x42>
+ 8010fbe:	68bb      	ldr	r3, [r7, #8]
+ 8010fc0:	681b      	ldr	r3, [r3, #0]
+ 8010fc2:	2b00      	cmp	r3, #0
+ 8010fc4:	d101      	bne.n	8010fca <netif_set_addr+0x46>
+ 8010fc6:	2301      	movs	r3, #1
+ 8010fc8:	e000      	b.n	8010fcc <netif_set_addr+0x48>
+ 8010fca:	2300      	movs	r3, #0
+ 8010fcc:	617b      	str	r3, [r7, #20]
+  if (remove) {
+ 8010fce:	697b      	ldr	r3, [r7, #20]
+ 8010fd0:	2b00      	cmp	r3, #0
+ 8010fd2:	d006      	beq.n	8010fe2 <netif_set_addr+0x5e>
+    /* when removing an address, we have to remove it *before* changing netmask/gw
+       to ensure that tcp RST segment can be sent correctly */
+    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
+ 8010fd4:	f107 0310 	add.w	r3, r7, #16
+ 8010fd8:	461a      	mov	r2, r3
+ 8010fda:	68b9      	ldr	r1, [r7, #8]
+ 8010fdc:	68f8      	ldr	r0, [r7, #12]
+ 8010fde:	f7ff ff49 	bl	8010e74 <netif_do_set_ipaddr>
+      change_reason |= LWIP_NSC_IPV4_ADDRESS_CHANGED;
+      cb_args.ipv4_changed.old_address = &old_addr;
+#endif
+    }
+  }
+  if (netif_do_set_netmask(netif, netmask, old_nm)) {
+ 8010fe2:	69fa      	ldr	r2, [r7, #28]
+ 8010fe4:	6879      	ldr	r1, [r7, #4]
+ 8010fe6:	68f8      	ldr	r0, [r7, #12]
+ 8010fe8:	f7ff ff8e 	bl	8010f08 <netif_do_set_netmask>
+#if LWIP_NETIF_EXT_STATUS_CALLBACK
+    change_reason |= LWIP_NSC_IPV4_NETMASK_CHANGED;
+    cb_args.ipv4_changed.old_netmask = old_nm;
+#endif
+  }
+  if (netif_do_set_gw(netif, gw, old_gw)) {
+ 8010fec:	69ba      	ldr	r2, [r7, #24]
+ 8010fee:	6839      	ldr	r1, [r7, #0]
+ 8010ff0:	68f8      	ldr	r0, [r7, #12]
+ 8010ff2:	f7ff ffa8 	bl	8010f46 <netif_do_set_gw>
+#if LWIP_NETIF_EXT_STATUS_CALLBACK
+    change_reason |= LWIP_NSC_IPV4_GATEWAY_CHANGED;
+    cb_args.ipv4_changed.old_gw = old_gw;
+#endif
+  }
+  if (!remove) {
+ 8010ff6:	697b      	ldr	r3, [r7, #20]
+ 8010ff8:	2b00      	cmp	r3, #0
+ 8010ffa:	d106      	bne.n	801100a <netif_set_addr+0x86>
+    /* set ipaddr last to ensure netmask/gw have been set when status callback is called */
+    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
+ 8010ffc:	f107 0310 	add.w	r3, r7, #16
+ 8011000:	461a      	mov	r2, r3
+ 8011002:	68b9      	ldr	r1, [r7, #8]
+ 8011004:	68f8      	ldr	r0, [r7, #12]
+ 8011006:	f7ff ff35 	bl	8010e74 <netif_do_set_ipaddr>
+  if (change_reason != LWIP_NSC_NONE) {
+    change_reason |= LWIP_NSC_IPV4_SETTINGS_CHANGED;
+    netif_invoke_ext_callback(netif, change_reason, &cb_args);
+  }
+#endif
+}
+ 801100a:	bf00      	nop
+ 801100c:	3720      	adds	r7, #32
+ 801100e:	46bd      	mov	sp, r7
+ 8011010:	bd80      	pop	{r7, pc}
+ 8011012:	bf00      	nop
+ 8011014:	08022598 	.word	0x08022598
+
+08011018 <netif_set_default>:
+ *
+ * @param netif the default network interface
+ */
+void
+netif_set_default(struct netif *netif)
+{
+ 8011018:	b480      	push	{r7}
+ 801101a:	b083      	sub	sp, #12
+ 801101c:	af00      	add	r7, sp, #0
+ 801101e:	6078      	str	r0, [r7, #4]
+    mib2_remove_route_ip4(1, netif);
+  } else {
+    /* install default route */
+    mib2_add_route_ip4(1, netif);
+  }
+  netif_default = netif;
+ 8011020:	4a04      	ldr	r2, [pc, #16]	; (8011034 <netif_set_default+0x1c>)
+ 8011022:	687b      	ldr	r3, [r7, #4]
+ 8011024:	6013      	str	r3, [r2, #0]
+  LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n",
+                            netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\''));
+}
+ 8011026:	bf00      	nop
+ 8011028:	370c      	adds	r7, #12
+ 801102a:	46bd      	mov	sp, r7
+ 801102c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8011030:	4770      	bx	lr
+ 8011032:	bf00      	nop
+ 8011034:	2000f7dc 	.word	0x2000f7dc
+
+08011038 <netif_set_up>:
+ * Bring an interface up, available for processing
+ * traffic.
+ */
+void
+netif_set_up(struct netif *netif)
+{
+ 8011038:	b580      	push	{r7, lr}
+ 801103a:	b082      	sub	sp, #8
+ 801103c:	af00      	add	r7, sp, #0
+ 801103e:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("netif_set_up: invalid netif", netif != NULL, return);
+ 8011040:	687b      	ldr	r3, [r7, #4]
+ 8011042:	2b00      	cmp	r3, #0
+ 8011044:	d107      	bne.n	8011056 <netif_set_up+0x1e>
+ 8011046:	4b0f      	ldr	r3, [pc, #60]	; (8011084 <netif_set_up+0x4c>)
+ 8011048:	f44f 7254 	mov.w	r2, #848	; 0x350
+ 801104c:	490e      	ldr	r1, [pc, #56]	; (8011088 <netif_set_up+0x50>)
+ 801104e:	480f      	ldr	r0, [pc, #60]	; (801108c <netif_set_up+0x54>)
+ 8011050:	f00b f9d2 	bl	801c3f8 <iprintf>
+ 8011054:	e013      	b.n	801107e <netif_set_up+0x46>
+
+  if (!(netif->flags & NETIF_FLAG_UP)) {
+ 8011056:	687b      	ldr	r3, [r7, #4]
+ 8011058:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801105c:	f003 0301 	and.w	r3, r3, #1
+ 8011060:	2b00      	cmp	r3, #0
+ 8011062:	d10c      	bne.n	801107e <netif_set_up+0x46>
+    netif_set_flags(netif, NETIF_FLAG_UP);
+ 8011064:	687b      	ldr	r3, [r7, #4]
+ 8011066:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801106a:	f043 0301 	orr.w	r3, r3, #1
+ 801106e:	b2da      	uxtb	r2, r3
+ 8011070:	687b      	ldr	r3, [r7, #4]
+ 8011072:	f883 2031 	strb.w	r2, [r3, #49]	; 0x31
+      args.status_changed.state = 1;
+      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
+    }
+#endif
+
+    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
+ 8011076:	2103      	movs	r1, #3
+ 8011078:	6878      	ldr	r0, [r7, #4]
+ 801107a:	f000 f809 	bl	8011090 <netif_issue_reports>
+#if LWIP_IPV6
+    nd6_restart_netif(netif);
+#endif /* LWIP_IPV6 */
+  }
+}
+ 801107e:	3708      	adds	r7, #8
+ 8011080:	46bd      	mov	sp, r7
+ 8011082:	bd80      	pop	{r7, pc}
+ 8011084:	0801db48 	.word	0x0801db48
+ 8011088:	0801dcd0 	.word	0x0801dcd0
+ 801108c:	0801db98 	.word	0x0801db98
+
+08011090 <netif_issue_reports>:
+
+/** Send ARP/IGMP/MLD/RS events, e.g. on link-up/netif-up or addr-change
+ */
+static void
+netif_issue_reports(struct netif *netif, u8_t report_type)
+{
+ 8011090:	b580      	push	{r7, lr}
+ 8011092:	b082      	sub	sp, #8
+ 8011094:	af00      	add	r7, sp, #0
+ 8011096:	6078      	str	r0, [r7, #4]
+ 8011098:	460b      	mov	r3, r1
+ 801109a:	70fb      	strb	r3, [r7, #3]
+  LWIP_ASSERT("netif_issue_reports: invalid netif", netif != NULL);
+ 801109c:	687b      	ldr	r3, [r7, #4]
+ 801109e:	2b00      	cmp	r3, #0
+ 80110a0:	d106      	bne.n	80110b0 <netif_issue_reports+0x20>
+ 80110a2:	4b18      	ldr	r3, [pc, #96]	; (8011104 <netif_issue_reports+0x74>)
+ 80110a4:	f240 326d 	movw	r2, #877	; 0x36d
+ 80110a8:	4917      	ldr	r1, [pc, #92]	; (8011108 <netif_issue_reports+0x78>)
+ 80110aa:	4818      	ldr	r0, [pc, #96]	; (801110c <netif_issue_reports+0x7c>)
+ 80110ac:	f00b f9a4 	bl	801c3f8 <iprintf>
+
+  /* Only send reports when both link and admin states are up */
+  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
+ 80110b0:	687b      	ldr	r3, [r7, #4]
+ 80110b2:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 80110b6:	f003 0304 	and.w	r3, r3, #4
+ 80110ba:	2b00      	cmp	r3, #0
+ 80110bc:	d01e      	beq.n	80110fc <netif_issue_reports+0x6c>
+      !(netif->flags & NETIF_FLAG_UP)) {
+ 80110be:	687b      	ldr	r3, [r7, #4]
+ 80110c0:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 80110c4:	f003 0301 	and.w	r3, r3, #1
+  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
+ 80110c8:	2b00      	cmp	r3, #0
+ 80110ca:	d017      	beq.n	80110fc <netif_issue_reports+0x6c>
+    return;
+  }
+
+#if LWIP_IPV4
+  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
+ 80110cc:	78fb      	ldrb	r3, [r7, #3]
+ 80110ce:	f003 0301 	and.w	r3, r3, #1
+ 80110d2:	2b00      	cmp	r3, #0
+ 80110d4:	d013      	beq.n	80110fe <netif_issue_reports+0x6e>
+      !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
+ 80110d6:	687b      	ldr	r3, [r7, #4]
+ 80110d8:	3304      	adds	r3, #4
+ 80110da:	681b      	ldr	r3, [r3, #0]
+  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
+ 80110dc:	2b00      	cmp	r3, #0
+ 80110de:	d00e      	beq.n	80110fe <netif_issue_reports+0x6e>
+#if LWIP_ARP
+    /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */
+    if (netif->flags & (NETIF_FLAG_ETHARP)) {
+ 80110e0:	687b      	ldr	r3, [r7, #4]
+ 80110e2:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 80110e6:	f003 0308 	and.w	r3, r3, #8
+ 80110ea:	2b00      	cmp	r3, #0
+ 80110ec:	d007      	beq.n	80110fe <netif_issue_reports+0x6e>
+      etharp_gratuitous(netif);
+ 80110ee:	687b      	ldr	r3, [r7, #4]
+ 80110f0:	3304      	adds	r3, #4
+ 80110f2:	4619      	mov	r1, r3
+ 80110f4:	6878      	ldr	r0, [r7, #4]
+ 80110f6:	f009 fc6b 	bl	801a9d0 <etharp_request>
+ 80110fa:	e000      	b.n	80110fe <netif_issue_reports+0x6e>
+    return;
+ 80110fc:	bf00      	nop
+    /* send mld memberships */
+    mld6_report_groups(netif);
+#endif /* LWIP_IPV6_MLD */
+  }
+#endif /* LWIP_IPV6 */
+}
+ 80110fe:	3708      	adds	r7, #8
+ 8011100:	46bd      	mov	sp, r7
+ 8011102:	bd80      	pop	{r7, pc}
+ 8011104:	0801db48 	.word	0x0801db48
+ 8011108:	0801dcec 	.word	0x0801dcec
+ 801110c:	0801db98 	.word	0x0801db98
+
+08011110 <netif_set_down>:
+ * @ingroup netif
+ * Bring an interface down, disabling any traffic processing.
+ */
+void
+netif_set_down(struct netif *netif)
+{
+ 8011110:	b580      	push	{r7, lr}
+ 8011112:	b082      	sub	sp, #8
+ 8011114:	af00      	add	r7, sp, #0
+ 8011116:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("netif_set_down: invalid netif", netif != NULL, return);
+ 8011118:	687b      	ldr	r3, [r7, #4]
+ 801111a:	2b00      	cmp	r3, #0
+ 801111c:	d107      	bne.n	801112e <netif_set_down+0x1e>
+ 801111e:	4b12      	ldr	r3, [pc, #72]	; (8011168 <netif_set_down+0x58>)
+ 8011120:	f240 329b 	movw	r2, #923	; 0x39b
+ 8011124:	4911      	ldr	r1, [pc, #68]	; (801116c <netif_set_down+0x5c>)
+ 8011126:	4812      	ldr	r0, [pc, #72]	; (8011170 <netif_set_down+0x60>)
+ 8011128:	f00b f966 	bl	801c3f8 <iprintf>
+ 801112c:	e019      	b.n	8011162 <netif_set_down+0x52>
+
+  if (netif->flags & NETIF_FLAG_UP) {
+ 801112e:	687b      	ldr	r3, [r7, #4]
+ 8011130:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 8011134:	f003 0301 	and.w	r3, r3, #1
+ 8011138:	2b00      	cmp	r3, #0
+ 801113a:	d012      	beq.n	8011162 <netif_set_down+0x52>
+      args.status_changed.state = 0;
+      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
+    }
+#endif
+
+    netif_clear_flags(netif, NETIF_FLAG_UP);
+ 801113c:	687b      	ldr	r3, [r7, #4]
+ 801113e:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 8011142:	f023 0301 	bic.w	r3, r3, #1
+ 8011146:	b2da      	uxtb	r2, r3
+ 8011148:	687b      	ldr	r3, [r7, #4]
+ 801114a:	f883 2031 	strb.w	r2, [r3, #49]	; 0x31
+    MIB2_COPY_SYSUPTIME_TO(&netif->ts);
+
+#if LWIP_IPV4 && LWIP_ARP
+    if (netif->flags & NETIF_FLAG_ETHARP) {
+ 801114e:	687b      	ldr	r3, [r7, #4]
+ 8011150:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 8011154:	f003 0308 	and.w	r3, r3, #8
+ 8011158:	2b00      	cmp	r3, #0
+ 801115a:	d002      	beq.n	8011162 <netif_set_down+0x52>
+      etharp_cleanup_netif(netif);
+ 801115c:	6878      	ldr	r0, [r7, #4]
+ 801115e:	f008 fff1 	bl	801a144 <etharp_cleanup_netif>
+    nd6_cleanup_netif(netif);
+#endif /* LWIP_IPV6 */
+
+    NETIF_STATUS_CALLBACK(netif);
+  }
+}
+ 8011162:	3708      	adds	r7, #8
+ 8011164:	46bd      	mov	sp, r7
+ 8011166:	bd80      	pop	{r7, pc}
+ 8011168:	0801db48 	.word	0x0801db48
+ 801116c:	0801dd10 	.word	0x0801dd10
+ 8011170:	0801db98 	.word	0x0801db98
+
+08011174 <netif_set_link_up>:
+ * @ingroup netif
+ * Called by a driver when its link goes up
+ */
+void
+netif_set_link_up(struct netif *netif)
+{
+ 8011174:	b580      	push	{r7, lr}
+ 8011176:	b082      	sub	sp, #8
+ 8011178:	af00      	add	r7, sp, #0
+ 801117a:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("netif_set_link_up: invalid netif", netif != NULL, return);
+ 801117c:	687b      	ldr	r3, [r7, #4]
+ 801117e:	2b00      	cmp	r3, #0
+ 8011180:	d107      	bne.n	8011192 <netif_set_link_up+0x1e>
+ 8011182:	4b15      	ldr	r3, [pc, #84]	; (80111d8 <netif_set_link_up+0x64>)
+ 8011184:	f44f 7278 	mov.w	r2, #992	; 0x3e0
+ 8011188:	4914      	ldr	r1, [pc, #80]	; (80111dc <netif_set_link_up+0x68>)
+ 801118a:	4815      	ldr	r0, [pc, #84]	; (80111e0 <netif_set_link_up+0x6c>)
+ 801118c:	f00b f934 	bl	801c3f8 <iprintf>
+ 8011190:	e01e      	b.n	80111d0 <netif_set_link_up+0x5c>
+
+  if (!(netif->flags & NETIF_FLAG_LINK_UP)) {
+ 8011192:	687b      	ldr	r3, [r7, #4]
+ 8011194:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 8011198:	f003 0304 	and.w	r3, r3, #4
+ 801119c:	2b00      	cmp	r3, #0
+ 801119e:	d117      	bne.n	80111d0 <netif_set_link_up+0x5c>
+    netif_set_flags(netif, NETIF_FLAG_LINK_UP);
+ 80111a0:	687b      	ldr	r3, [r7, #4]
+ 80111a2:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 80111a6:	f043 0304 	orr.w	r3, r3, #4
+ 80111aa:	b2da      	uxtb	r2, r3
+ 80111ac:	687b      	ldr	r3, [r7, #4]
+ 80111ae:	f883 2031 	strb.w	r2, [r3, #49]	; 0x31
+
+#if LWIP_DHCP
+    dhcp_network_changed(netif);
+ 80111b2:	6878      	ldr	r0, [r7, #4]
+ 80111b4:	f007 fa26 	bl	8018604 <dhcp_network_changed>
+
+#if LWIP_AUTOIP
+    autoip_network_changed(netif);
+#endif /* LWIP_AUTOIP */
+
+    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
+ 80111b8:	2103      	movs	r1, #3
+ 80111ba:	6878      	ldr	r0, [r7, #4]
+ 80111bc:	f7ff ff68 	bl	8011090 <netif_issue_reports>
+#if LWIP_IPV6
+    nd6_restart_netif(netif);
+#endif /* LWIP_IPV6 */
+
+    NETIF_LINK_CALLBACK(netif);
+ 80111c0:	687b      	ldr	r3, [r7, #4]
+ 80111c2:	69db      	ldr	r3, [r3, #28]
+ 80111c4:	2b00      	cmp	r3, #0
+ 80111c6:	d003      	beq.n	80111d0 <netif_set_link_up+0x5c>
+ 80111c8:	687b      	ldr	r3, [r7, #4]
+ 80111ca:	69db      	ldr	r3, [r3, #28]
+ 80111cc:	6878      	ldr	r0, [r7, #4]
+ 80111ce:	4798      	blx	r3
+      args.link_changed.state = 1;
+      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
+    }
+#endif
+  }
+}
+ 80111d0:	3708      	adds	r7, #8
+ 80111d2:	46bd      	mov	sp, r7
+ 80111d4:	bd80      	pop	{r7, pc}
+ 80111d6:	bf00      	nop
+ 80111d8:	0801db48 	.word	0x0801db48
+ 80111dc:	0801dd30 	.word	0x0801dd30
+ 80111e0:	0801db98 	.word	0x0801db98
+
+080111e4 <netif_set_link_down>:
+ * @ingroup netif
+ * Called by a driver when its link goes down
+ */
+void
+netif_set_link_down(struct netif *netif)
+{
+ 80111e4:	b580      	push	{r7, lr}
+ 80111e6:	b082      	sub	sp, #8
+ 80111e8:	af00      	add	r7, sp, #0
+ 80111ea:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("netif_set_link_down: invalid netif", netif != NULL, return);
+ 80111ec:	687b      	ldr	r3, [r7, #4]
+ 80111ee:	2b00      	cmp	r3, #0
+ 80111f0:	d107      	bne.n	8011202 <netif_set_link_down+0x1e>
+ 80111f2:	4b11      	ldr	r3, [pc, #68]	; (8011238 <netif_set_link_down+0x54>)
+ 80111f4:	f240 4206 	movw	r2, #1030	; 0x406
+ 80111f8:	4910      	ldr	r1, [pc, #64]	; (801123c <netif_set_link_down+0x58>)
+ 80111fa:	4811      	ldr	r0, [pc, #68]	; (8011240 <netif_set_link_down+0x5c>)
+ 80111fc:	f00b f8fc 	bl	801c3f8 <iprintf>
+ 8011200:	e017      	b.n	8011232 <netif_set_link_down+0x4e>
+
+  if (netif->flags & NETIF_FLAG_LINK_UP) {
+ 8011202:	687b      	ldr	r3, [r7, #4]
+ 8011204:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 8011208:	f003 0304 	and.w	r3, r3, #4
+ 801120c:	2b00      	cmp	r3, #0
+ 801120e:	d010      	beq.n	8011232 <netif_set_link_down+0x4e>
+    netif_clear_flags(netif, NETIF_FLAG_LINK_UP);
+ 8011210:	687b      	ldr	r3, [r7, #4]
+ 8011212:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 8011216:	f023 0304 	bic.w	r3, r3, #4
+ 801121a:	b2da      	uxtb	r2, r3
+ 801121c:	687b      	ldr	r3, [r7, #4]
+ 801121e:	f883 2031 	strb.w	r2, [r3, #49]	; 0x31
+    NETIF_LINK_CALLBACK(netif);
+ 8011222:	687b      	ldr	r3, [r7, #4]
+ 8011224:	69db      	ldr	r3, [r3, #28]
+ 8011226:	2b00      	cmp	r3, #0
+ 8011228:	d003      	beq.n	8011232 <netif_set_link_down+0x4e>
+ 801122a:	687b      	ldr	r3, [r7, #4]
+ 801122c:	69db      	ldr	r3, [r3, #28]
+ 801122e:	6878      	ldr	r0, [r7, #4]
+ 8011230:	4798      	blx	r3
+      args.link_changed.state = 0;
+      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
+    }
+#endif
+  }
+}
+ 8011232:	3708      	adds	r7, #8
+ 8011234:	46bd      	mov	sp, r7
+ 8011236:	bd80      	pop	{r7, pc}
+ 8011238:	0801db48 	.word	0x0801db48
+ 801123c:	0801dd54 	.word	0x0801dd54
+ 8011240:	0801db98 	.word	0x0801db98
+
+08011244 <netif_set_link_callback>:
+ * @ingroup netif
+ * Set callback to be called when link is brought up/down
+ */
+void
+netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback)
+{
+ 8011244:	b480      	push	{r7}
+ 8011246:	b083      	sub	sp, #12
+ 8011248:	af00      	add	r7, sp, #0
+ 801124a:	6078      	str	r0, [r7, #4]
+ 801124c:	6039      	str	r1, [r7, #0]
+  LWIP_ASSERT_CORE_LOCKED();
+
+  if (netif) {
+ 801124e:	687b      	ldr	r3, [r7, #4]
+ 8011250:	2b00      	cmp	r3, #0
+ 8011252:	d002      	beq.n	801125a <netif_set_link_callback+0x16>
+    netif->link_callback = link_callback;
+ 8011254:	687b      	ldr	r3, [r7, #4]
+ 8011256:	683a      	ldr	r2, [r7, #0]
+ 8011258:	61da      	str	r2, [r3, #28]
+  }
+}
+ 801125a:	bf00      	nop
+ 801125c:	370c      	adds	r7, #12
+ 801125e:	46bd      	mov	sp, r7
+ 8011260:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8011264:	4770      	bx	lr
+
+08011266 <netif_null_output_ip4>:
+#if LWIP_IPV4
+/** Dummy IPv4 output function for netifs not supporting IPv4
+ */
+static err_t
+netif_null_output_ip4(struct netif *netif, struct pbuf *p, const ip4_addr_t *ipaddr)
+{
+ 8011266:	b480      	push	{r7}
+ 8011268:	b085      	sub	sp, #20
+ 801126a:	af00      	add	r7, sp, #0
+ 801126c:	60f8      	str	r0, [r7, #12]
+ 801126e:	60b9      	str	r1, [r7, #8]
+ 8011270:	607a      	str	r2, [r7, #4]
+  LWIP_UNUSED_ARG(netif);
+  LWIP_UNUSED_ARG(p);
+  LWIP_UNUSED_ARG(ipaddr);
+
+  return ERR_IF;
+ 8011272:	f06f 030b 	mvn.w	r3, #11
+}
+ 8011276:	4618      	mov	r0, r3
+ 8011278:	3714      	adds	r7, #20
+ 801127a:	46bd      	mov	sp, r7
+ 801127c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8011280:	4770      	bx	lr
+	...
+
+08011284 <netif_get_by_index>:
+*
+* @param idx index of netif to find
+*/
+struct netif *
+netif_get_by_index(u8_t idx)
+{
+ 8011284:	b480      	push	{r7}
+ 8011286:	b085      	sub	sp, #20
+ 8011288:	af00      	add	r7, sp, #0
+ 801128a:	4603      	mov	r3, r0
+ 801128c:	71fb      	strb	r3, [r7, #7]
+  struct netif *netif;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  if (idx != NETIF_NO_INDEX) {
+ 801128e:	79fb      	ldrb	r3, [r7, #7]
+ 8011290:	2b00      	cmp	r3, #0
+ 8011292:	d013      	beq.n	80112bc <netif_get_by_index+0x38>
+    NETIF_FOREACH(netif) {
+ 8011294:	4b0d      	ldr	r3, [pc, #52]	; (80112cc <netif_get_by_index+0x48>)
+ 8011296:	681b      	ldr	r3, [r3, #0]
+ 8011298:	60fb      	str	r3, [r7, #12]
+ 801129a:	e00c      	b.n	80112b6 <netif_get_by_index+0x32>
+      if (idx == netif_get_index(netif)) {
+ 801129c:	68fb      	ldr	r3, [r7, #12]
+ 801129e:	f893 3034 	ldrb.w	r3, [r3, #52]	; 0x34
+ 80112a2:	3301      	adds	r3, #1
+ 80112a4:	b2db      	uxtb	r3, r3
+ 80112a6:	79fa      	ldrb	r2, [r7, #7]
+ 80112a8:	429a      	cmp	r2, r3
+ 80112aa:	d101      	bne.n	80112b0 <netif_get_by_index+0x2c>
+        return netif; /* found! */
+ 80112ac:	68fb      	ldr	r3, [r7, #12]
+ 80112ae:	e006      	b.n	80112be <netif_get_by_index+0x3a>
+    NETIF_FOREACH(netif) {
+ 80112b0:	68fb      	ldr	r3, [r7, #12]
+ 80112b2:	681b      	ldr	r3, [r3, #0]
+ 80112b4:	60fb      	str	r3, [r7, #12]
+ 80112b6:	68fb      	ldr	r3, [r7, #12]
+ 80112b8:	2b00      	cmp	r3, #0
+ 80112ba:	d1ef      	bne.n	801129c <netif_get_by_index+0x18>
+      }
+    }
+  }
+
+  return NULL;
+ 80112bc:	2300      	movs	r3, #0
+}
+ 80112be:	4618      	mov	r0, r3
+ 80112c0:	3714      	adds	r7, #20
+ 80112c2:	46bd      	mov	sp, r7
+ 80112c4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80112c8:	4770      	bx	lr
+ 80112ca:	bf00      	nop
+ 80112cc:	2000f7d8 	.word	0x2000f7d8
+
+080112d0 <pbuf_free_ooseq>:
+#if !NO_SYS
+static
+#endif /* !NO_SYS */
+void
+pbuf_free_ooseq(void)
+{
+ 80112d0:	b580      	push	{r7, lr}
+ 80112d2:	b082      	sub	sp, #8
+ 80112d4:	af00      	add	r7, sp, #0
+  struct tcp_pcb *pcb;
+  SYS_ARCH_SET(pbuf_free_ooseq_pending, 0);
+ 80112d6:	f00b f811 	bl	801c2fc <sys_arch_protect>
+ 80112da:	6038      	str	r0, [r7, #0]
+ 80112dc:	4b0d      	ldr	r3, [pc, #52]	; (8011314 <pbuf_free_ooseq+0x44>)
+ 80112de:	2200      	movs	r2, #0
+ 80112e0:	701a      	strb	r2, [r3, #0]
+ 80112e2:	6838      	ldr	r0, [r7, #0]
+ 80112e4:	f00b f818 	bl	801c318 <sys_arch_unprotect>
+
+  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
+ 80112e8:	4b0b      	ldr	r3, [pc, #44]	; (8011318 <pbuf_free_ooseq+0x48>)
+ 80112ea:	681b      	ldr	r3, [r3, #0]
+ 80112ec:	607b      	str	r3, [r7, #4]
+ 80112ee:	e00a      	b.n	8011306 <pbuf_free_ooseq+0x36>
+    if (pcb->ooseq != NULL) {
+ 80112f0:	687b      	ldr	r3, [r7, #4]
+ 80112f2:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 80112f4:	2b00      	cmp	r3, #0
+ 80112f6:	d003      	beq.n	8011300 <pbuf_free_ooseq+0x30>
+      /** Free the ooseq pbufs of one PCB only */
+      LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n"));
+      tcp_free_ooseq(pcb);
+ 80112f8:	6878      	ldr	r0, [r7, #4]
+ 80112fa:	f002 f971 	bl	80135e0 <tcp_free_ooseq>
+      return;
+ 80112fe:	e005      	b.n	801130c <pbuf_free_ooseq+0x3c>
+  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
+ 8011300:	687b      	ldr	r3, [r7, #4]
+ 8011302:	68db      	ldr	r3, [r3, #12]
+ 8011304:	607b      	str	r3, [r7, #4]
+ 8011306:	687b      	ldr	r3, [r7, #4]
+ 8011308:	2b00      	cmp	r3, #0
+ 801130a:	d1f1      	bne.n	80112f0 <pbuf_free_ooseq+0x20>
+    }
+  }
+}
+ 801130c:	3708      	adds	r7, #8
+ 801130e:	46bd      	mov	sp, r7
+ 8011310:	bd80      	pop	{r7, pc}
+ 8011312:	bf00      	nop
+ 8011314:	2000f7e0 	.word	0x2000f7e0
+ 8011318:	2000f7e8 	.word	0x2000f7e8
+
+0801131c <pbuf_free_ooseq_callback>:
+/**
+ * Just a callback function for tcpip_callback() that calls pbuf_free_ooseq().
+ */
+static void
+pbuf_free_ooseq_callback(void *arg)
+{
+ 801131c:	b580      	push	{r7, lr}
+ 801131e:	b082      	sub	sp, #8
+ 8011320:	af00      	add	r7, sp, #0
+ 8011322:	6078      	str	r0, [r7, #4]
+  LWIP_UNUSED_ARG(arg);
+  pbuf_free_ooseq();
+ 8011324:	f7ff ffd4 	bl	80112d0 <pbuf_free_ooseq>
+}
+ 8011328:	bf00      	nop
+ 801132a:	3708      	adds	r7, #8
+ 801132c:	46bd      	mov	sp, r7
+ 801132e:	bd80      	pop	{r7, pc}
+
+08011330 <pbuf_pool_is_empty>:
+#endif /* !NO_SYS */
+
+/** Queue a call to pbuf_free_ooseq if not already queued. */
+static void
+pbuf_pool_is_empty(void)
+{
+ 8011330:	b580      	push	{r7, lr}
+ 8011332:	b082      	sub	sp, #8
+ 8011334:	af00      	add	r7, sp, #0
+#ifndef PBUF_POOL_FREE_OOSEQ_QUEUE_CALL
+  SYS_ARCH_SET(pbuf_free_ooseq_pending, 1);
+#else /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
+  u8_t queued;
+  SYS_ARCH_DECL_PROTECT(old_level);
+  SYS_ARCH_PROTECT(old_level);
+ 8011336:	f00a ffe1 	bl	801c2fc <sys_arch_protect>
+ 801133a:	6078      	str	r0, [r7, #4]
+  queued = pbuf_free_ooseq_pending;
+ 801133c:	4b0f      	ldr	r3, [pc, #60]	; (801137c <pbuf_pool_is_empty+0x4c>)
+ 801133e:	781b      	ldrb	r3, [r3, #0]
+ 8011340:	70fb      	strb	r3, [r7, #3]
+  pbuf_free_ooseq_pending = 1;
+ 8011342:	4b0e      	ldr	r3, [pc, #56]	; (801137c <pbuf_pool_is_empty+0x4c>)
+ 8011344:	2201      	movs	r2, #1
+ 8011346:	701a      	strb	r2, [r3, #0]
+  SYS_ARCH_UNPROTECT(old_level);
+ 8011348:	6878      	ldr	r0, [r7, #4]
+ 801134a:	f00a ffe5 	bl	801c318 <sys_arch_unprotect>
+
+  if (!queued) {
+ 801134e:	78fb      	ldrb	r3, [r7, #3]
+ 8011350:	2b00      	cmp	r3, #0
+ 8011352:	d10f      	bne.n	8011374 <pbuf_pool_is_empty+0x44>
+    /* queue a call to pbuf_free_ooseq if not already queued */
+    PBUF_POOL_FREE_OOSEQ_QUEUE_CALL();
+ 8011354:	2100      	movs	r1, #0
+ 8011356:	480a      	ldr	r0, [pc, #40]	; (8011380 <pbuf_pool_is_empty+0x50>)
+ 8011358:	f7fe fee0 	bl	801011c <tcpip_try_callback>
+ 801135c:	4603      	mov	r3, r0
+ 801135e:	2b00      	cmp	r3, #0
+ 8011360:	d008      	beq.n	8011374 <pbuf_pool_is_empty+0x44>
+ 8011362:	f00a ffcb 	bl	801c2fc <sys_arch_protect>
+ 8011366:	6078      	str	r0, [r7, #4]
+ 8011368:	4b04      	ldr	r3, [pc, #16]	; (801137c <pbuf_pool_is_empty+0x4c>)
+ 801136a:	2200      	movs	r2, #0
+ 801136c:	701a      	strb	r2, [r3, #0]
+ 801136e:	6878      	ldr	r0, [r7, #4]
+ 8011370:	f00a ffd2 	bl	801c318 <sys_arch_unprotect>
+  }
+#endif /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
+}
+ 8011374:	bf00      	nop
+ 8011376:	3708      	adds	r7, #8
+ 8011378:	46bd      	mov	sp, r7
+ 801137a:	bd80      	pop	{r7, pc}
+ 801137c:	2000f7e0 	.word	0x2000f7e0
+ 8011380:	0801131d 	.word	0x0801131d
+
+08011384 <pbuf_init_alloced_pbuf>:
+#endif /* !LWIP_TCP || !TCP_QUEUE_OOSEQ || !PBUF_POOL_FREE_OOSEQ */
+
+/* Initialize members of struct pbuf after allocation */
+static void
+pbuf_init_alloced_pbuf(struct pbuf *p, void *payload, u16_t tot_len, u16_t len, pbuf_type type, u8_t flags)
+{
+ 8011384:	b480      	push	{r7}
+ 8011386:	b085      	sub	sp, #20
+ 8011388:	af00      	add	r7, sp, #0
+ 801138a:	60f8      	str	r0, [r7, #12]
+ 801138c:	60b9      	str	r1, [r7, #8]
+ 801138e:	4611      	mov	r1, r2
+ 8011390:	461a      	mov	r2, r3
+ 8011392:	460b      	mov	r3, r1
+ 8011394:	80fb      	strh	r3, [r7, #6]
+ 8011396:	4613      	mov	r3, r2
+ 8011398:	80bb      	strh	r3, [r7, #4]
+  p->next = NULL;
+ 801139a:	68fb      	ldr	r3, [r7, #12]
+ 801139c:	2200      	movs	r2, #0
+ 801139e:	601a      	str	r2, [r3, #0]
+  p->payload = payload;
+ 80113a0:	68fb      	ldr	r3, [r7, #12]
+ 80113a2:	68ba      	ldr	r2, [r7, #8]
+ 80113a4:	605a      	str	r2, [r3, #4]
+  p->tot_len = tot_len;
+ 80113a6:	68fb      	ldr	r3, [r7, #12]
+ 80113a8:	88fa      	ldrh	r2, [r7, #6]
+ 80113aa:	811a      	strh	r2, [r3, #8]
+  p->len = len;
+ 80113ac:	68fb      	ldr	r3, [r7, #12]
+ 80113ae:	88ba      	ldrh	r2, [r7, #4]
+ 80113b0:	815a      	strh	r2, [r3, #10]
+  p->type_internal = (u8_t)type;
+ 80113b2:	8b3b      	ldrh	r3, [r7, #24]
+ 80113b4:	b2da      	uxtb	r2, r3
+ 80113b6:	68fb      	ldr	r3, [r7, #12]
+ 80113b8:	731a      	strb	r2, [r3, #12]
+  p->flags = flags;
+ 80113ba:	68fb      	ldr	r3, [r7, #12]
+ 80113bc:	7f3a      	ldrb	r2, [r7, #28]
+ 80113be:	735a      	strb	r2, [r3, #13]
+  p->ref = 1;
+ 80113c0:	68fb      	ldr	r3, [r7, #12]
+ 80113c2:	2201      	movs	r2, #1
+ 80113c4:	739a      	strb	r2, [r3, #14]
+  p->if_idx = NETIF_NO_INDEX;
+ 80113c6:	68fb      	ldr	r3, [r7, #12]
+ 80113c8:	2200      	movs	r2, #0
+ 80113ca:	73da      	strb	r2, [r3, #15]
+}
+ 80113cc:	bf00      	nop
+ 80113ce:	3714      	adds	r7, #20
+ 80113d0:	46bd      	mov	sp, r7
+ 80113d2:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80113d6:	4770      	bx	lr
+
+080113d8 <pbuf_alloc>:
+ * @return the allocated pbuf. If multiple pbufs where allocated, this
+ * is the first pbuf of a pbuf chain.
+ */
+struct pbuf *
+pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type)
+{
+ 80113d8:	b580      	push	{r7, lr}
+ 80113da:	b08c      	sub	sp, #48	; 0x30
+ 80113dc:	af02      	add	r7, sp, #8
+ 80113de:	4603      	mov	r3, r0
+ 80113e0:	71fb      	strb	r3, [r7, #7]
+ 80113e2:	460b      	mov	r3, r1
+ 80113e4:	80bb      	strh	r3, [r7, #4]
+ 80113e6:	4613      	mov	r3, r2
+ 80113e8:	807b      	strh	r3, [r7, #2]
+  struct pbuf *p;
+  u16_t offset = (u16_t)layer;
+ 80113ea:	79fb      	ldrb	r3, [r7, #7]
+ 80113ec:	847b      	strh	r3, [r7, #34]	; 0x22
+  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length));
+
+  switch (type) {
+ 80113ee:	887b      	ldrh	r3, [r7, #2]
+ 80113f0:	2b41      	cmp	r3, #65	; 0x41
+ 80113f2:	d00b      	beq.n	801140c <pbuf_alloc+0x34>
+ 80113f4:	2b41      	cmp	r3, #65	; 0x41
+ 80113f6:	dc02      	bgt.n	80113fe <pbuf_alloc+0x26>
+ 80113f8:	2b01      	cmp	r3, #1
+ 80113fa:	d007      	beq.n	801140c <pbuf_alloc+0x34>
+ 80113fc:	e0c2      	b.n	8011584 <pbuf_alloc+0x1ac>
+ 80113fe:	f5b3 7fc1 	cmp.w	r3, #386	; 0x182
+ 8011402:	d00b      	beq.n	801141c <pbuf_alloc+0x44>
+ 8011404:	f5b3 7f20 	cmp.w	r3, #640	; 0x280
+ 8011408:	d070      	beq.n	80114ec <pbuf_alloc+0x114>
+ 801140a:	e0bb      	b.n	8011584 <pbuf_alloc+0x1ac>
+    case PBUF_REF: /* fall through */
+    case PBUF_ROM:
+      p = pbuf_alloc_reference(NULL, length, type);
+ 801140c:	887a      	ldrh	r2, [r7, #2]
+ 801140e:	88bb      	ldrh	r3, [r7, #4]
+ 8011410:	4619      	mov	r1, r3
+ 8011412:	2000      	movs	r0, #0
+ 8011414:	f000 f8d2 	bl	80115bc <pbuf_alloc_reference>
+ 8011418:	6278      	str	r0, [r7, #36]	; 0x24
+      break;
+ 801141a:	e0bd      	b.n	8011598 <pbuf_alloc+0x1c0>
+    case PBUF_POOL: {
+      struct pbuf *q, *last;
+      u16_t rem_len; /* remaining length */
+      p = NULL;
+ 801141c:	2300      	movs	r3, #0
+ 801141e:	627b      	str	r3, [r7, #36]	; 0x24
+      last = NULL;
+ 8011420:	2300      	movs	r3, #0
+ 8011422:	61fb      	str	r3, [r7, #28]
+      rem_len = length;
+ 8011424:	88bb      	ldrh	r3, [r7, #4]
+ 8011426:	837b      	strh	r3, [r7, #26]
+      do {
+        u16_t qlen;
+        q = (struct pbuf *)memp_malloc(MEMP_PBUF_POOL);
+ 8011428:	200c      	movs	r0, #12
+ 801142a:	f7ff fbb7 	bl	8010b9c <memp_malloc>
+ 801142e:	6138      	str	r0, [r7, #16]
+        if (q == NULL) {
+ 8011430:	693b      	ldr	r3, [r7, #16]
+ 8011432:	2b00      	cmp	r3, #0
+ 8011434:	d109      	bne.n	801144a <pbuf_alloc+0x72>
+          PBUF_POOL_IS_EMPTY();
+ 8011436:	f7ff ff7b 	bl	8011330 <pbuf_pool_is_empty>
+          /* free chain so far allocated */
+          if (p) {
+ 801143a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801143c:	2b00      	cmp	r3, #0
+ 801143e:	d002      	beq.n	8011446 <pbuf_alloc+0x6e>
+            pbuf_free(p);
+ 8011440:	6a78      	ldr	r0, [r7, #36]	; 0x24
+ 8011442:	f000 faa9 	bl	8011998 <pbuf_free>
+          }
+          /* bail out unsuccessfully */
+          return NULL;
+ 8011446:	2300      	movs	r3, #0
+ 8011448:	e0a7      	b.n	801159a <pbuf_alloc+0x1c2>
+        }
+        qlen = LWIP_MIN(rem_len, (u16_t)(PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)));
+ 801144a:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 801144c:	3303      	adds	r3, #3
+ 801144e:	b29b      	uxth	r3, r3
+ 8011450:	f023 0303 	bic.w	r3, r3, #3
+ 8011454:	b29b      	uxth	r3, r3
+ 8011456:	f5c3 7314 	rsb	r3, r3, #592	; 0x250
+ 801145a:	b29b      	uxth	r3, r3
+ 801145c:	8b7a      	ldrh	r2, [r7, #26]
+ 801145e:	4293      	cmp	r3, r2
+ 8011460:	bf28      	it	cs
+ 8011462:	4613      	movcs	r3, r2
+ 8011464:	81fb      	strh	r3, [r7, #14]
+        pbuf_init_alloced_pbuf(q, LWIP_MEM_ALIGN((void *)((u8_t *)q + SIZEOF_STRUCT_PBUF + offset)),
+ 8011466:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 8011468:	3310      	adds	r3, #16
+ 801146a:	693a      	ldr	r2, [r7, #16]
+ 801146c:	4413      	add	r3, r2
+ 801146e:	3303      	adds	r3, #3
+ 8011470:	f023 0303 	bic.w	r3, r3, #3
+ 8011474:	4618      	mov	r0, r3
+ 8011476:	89f9      	ldrh	r1, [r7, #14]
+ 8011478:	8b7a      	ldrh	r2, [r7, #26]
+ 801147a:	2300      	movs	r3, #0
+ 801147c:	9301      	str	r3, [sp, #4]
+ 801147e:	887b      	ldrh	r3, [r7, #2]
+ 8011480:	9300      	str	r3, [sp, #0]
+ 8011482:	460b      	mov	r3, r1
+ 8011484:	4601      	mov	r1, r0
+ 8011486:	6938      	ldr	r0, [r7, #16]
+ 8011488:	f7ff ff7c 	bl	8011384 <pbuf_init_alloced_pbuf>
+                               rem_len, qlen, type, 0);
+        LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned",
+ 801148c:	693b      	ldr	r3, [r7, #16]
+ 801148e:	685b      	ldr	r3, [r3, #4]
+ 8011490:	f003 0303 	and.w	r3, r3, #3
+ 8011494:	2b00      	cmp	r3, #0
+ 8011496:	d006      	beq.n	80114a6 <pbuf_alloc+0xce>
+ 8011498:	4b42      	ldr	r3, [pc, #264]	; (80115a4 <pbuf_alloc+0x1cc>)
+ 801149a:	f240 1201 	movw	r2, #257	; 0x101
+ 801149e:	4942      	ldr	r1, [pc, #264]	; (80115a8 <pbuf_alloc+0x1d0>)
+ 80114a0:	4842      	ldr	r0, [pc, #264]	; (80115ac <pbuf_alloc+0x1d4>)
+ 80114a2:	f00a ffa9 	bl	801c3f8 <iprintf>
+                    ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0);
+        LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT",
+ 80114a6:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 80114a8:	3303      	adds	r3, #3
+ 80114aa:	f023 0303 	bic.w	r3, r3, #3
+ 80114ae:	f5b3 7f14 	cmp.w	r3, #592	; 0x250
+ 80114b2:	d106      	bne.n	80114c2 <pbuf_alloc+0xea>
+ 80114b4:	4b3b      	ldr	r3, [pc, #236]	; (80115a4 <pbuf_alloc+0x1cc>)
+ 80114b6:	f240 1203 	movw	r2, #259	; 0x103
+ 80114ba:	493d      	ldr	r1, [pc, #244]	; (80115b0 <pbuf_alloc+0x1d8>)
+ 80114bc:	483b      	ldr	r0, [pc, #236]	; (80115ac <pbuf_alloc+0x1d4>)
+ 80114be:	f00a ff9b 	bl	801c3f8 <iprintf>
+                    (PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 );
+        if (p == NULL) {
+ 80114c2:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80114c4:	2b00      	cmp	r3, #0
+ 80114c6:	d102      	bne.n	80114ce <pbuf_alloc+0xf6>
+          /* allocated head of pbuf chain (into p) */
+          p = q;
+ 80114c8:	693b      	ldr	r3, [r7, #16]
+ 80114ca:	627b      	str	r3, [r7, #36]	; 0x24
+ 80114cc:	e002      	b.n	80114d4 <pbuf_alloc+0xfc>
+        } else {
+          /* make previous pbuf point to this pbuf */
+          last->next = q;
+ 80114ce:	69fb      	ldr	r3, [r7, #28]
+ 80114d0:	693a      	ldr	r2, [r7, #16]
+ 80114d2:	601a      	str	r2, [r3, #0]
+        }
+        last = q;
+ 80114d4:	693b      	ldr	r3, [r7, #16]
+ 80114d6:	61fb      	str	r3, [r7, #28]
+        rem_len = (u16_t)(rem_len - qlen);
+ 80114d8:	8b7a      	ldrh	r2, [r7, #26]
+ 80114da:	89fb      	ldrh	r3, [r7, #14]
+ 80114dc:	1ad3      	subs	r3, r2, r3
+ 80114de:	837b      	strh	r3, [r7, #26]
+        offset = 0;
+ 80114e0:	2300      	movs	r3, #0
+ 80114e2:	847b      	strh	r3, [r7, #34]	; 0x22
+      } while (rem_len > 0);
+ 80114e4:	8b7b      	ldrh	r3, [r7, #26]
+ 80114e6:	2b00      	cmp	r3, #0
+ 80114e8:	d19e      	bne.n	8011428 <pbuf_alloc+0x50>
+      break;
+ 80114ea:	e055      	b.n	8011598 <pbuf_alloc+0x1c0>
+    }
+    case PBUF_RAM: {
+      u16_t payload_len = (u16_t)(LWIP_MEM_ALIGN_SIZE(offset) + LWIP_MEM_ALIGN_SIZE(length));
+ 80114ec:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 80114ee:	3303      	adds	r3, #3
+ 80114f0:	b29b      	uxth	r3, r3
+ 80114f2:	f023 0303 	bic.w	r3, r3, #3
+ 80114f6:	b29a      	uxth	r2, r3
+ 80114f8:	88bb      	ldrh	r3, [r7, #4]
+ 80114fa:	3303      	adds	r3, #3
+ 80114fc:	b29b      	uxth	r3, r3
+ 80114fe:	f023 0303 	bic.w	r3, r3, #3
+ 8011502:	b29b      	uxth	r3, r3
+ 8011504:	4413      	add	r3, r2
+ 8011506:	833b      	strh	r3, [r7, #24]
+      mem_size_t alloc_len = (mem_size_t)(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF) + payload_len);
+ 8011508:	8b3b      	ldrh	r3, [r7, #24]
+ 801150a:	3310      	adds	r3, #16
+ 801150c:	82fb      	strh	r3, [r7, #22]
+
+      /* bug #50040: Check for integer overflow when calculating alloc_len */
+      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
+ 801150e:	8b3a      	ldrh	r2, [r7, #24]
+ 8011510:	88bb      	ldrh	r3, [r7, #4]
+ 8011512:	3303      	adds	r3, #3
+ 8011514:	f023 0303 	bic.w	r3, r3, #3
+ 8011518:	429a      	cmp	r2, r3
+ 801151a:	d306      	bcc.n	801152a <pbuf_alloc+0x152>
+          (alloc_len < LWIP_MEM_ALIGN_SIZE(length))) {
+ 801151c:	8afa      	ldrh	r2, [r7, #22]
+ 801151e:	88bb      	ldrh	r3, [r7, #4]
+ 8011520:	3303      	adds	r3, #3
+ 8011522:	f023 0303 	bic.w	r3, r3, #3
+      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
+ 8011526:	429a      	cmp	r2, r3
+ 8011528:	d201      	bcs.n	801152e <pbuf_alloc+0x156>
+        return NULL;
+ 801152a:	2300      	movs	r3, #0
+ 801152c:	e035      	b.n	801159a <pbuf_alloc+0x1c2>
+      }
+
+      /* If pbuf is to be allocated in RAM, allocate memory for it. */
+      p = (struct pbuf *)mem_malloc(alloc_len);
+ 801152e:	8afb      	ldrh	r3, [r7, #22]
+ 8011530:	4618      	mov	r0, r3
+ 8011532:	f7ff f9b1 	bl	8010898 <mem_malloc>
+ 8011536:	6278      	str	r0, [r7, #36]	; 0x24
+      if (p == NULL) {
+ 8011538:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801153a:	2b00      	cmp	r3, #0
+ 801153c:	d101      	bne.n	8011542 <pbuf_alloc+0x16a>
+        return NULL;
+ 801153e:	2300      	movs	r3, #0
+ 8011540:	e02b      	b.n	801159a <pbuf_alloc+0x1c2>
+      }
+      pbuf_init_alloced_pbuf(p, LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)),
+ 8011542:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 8011544:	3310      	adds	r3, #16
+ 8011546:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 8011548:	4413      	add	r3, r2
+ 801154a:	3303      	adds	r3, #3
+ 801154c:	f023 0303 	bic.w	r3, r3, #3
+ 8011550:	4618      	mov	r0, r3
+ 8011552:	88b9      	ldrh	r1, [r7, #4]
+ 8011554:	88ba      	ldrh	r2, [r7, #4]
+ 8011556:	2300      	movs	r3, #0
+ 8011558:	9301      	str	r3, [sp, #4]
+ 801155a:	887b      	ldrh	r3, [r7, #2]
+ 801155c:	9300      	str	r3, [sp, #0]
+ 801155e:	460b      	mov	r3, r1
+ 8011560:	4601      	mov	r1, r0
+ 8011562:	6a78      	ldr	r0, [r7, #36]	; 0x24
+ 8011564:	f7ff ff0e 	bl	8011384 <pbuf_init_alloced_pbuf>
+                             length, length, type, 0);
+      LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned",
+ 8011568:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801156a:	685b      	ldr	r3, [r3, #4]
+ 801156c:	f003 0303 	and.w	r3, r3, #3
+ 8011570:	2b00      	cmp	r3, #0
+ 8011572:	d010      	beq.n	8011596 <pbuf_alloc+0x1be>
+ 8011574:	4b0b      	ldr	r3, [pc, #44]	; (80115a4 <pbuf_alloc+0x1cc>)
+ 8011576:	f240 1223 	movw	r2, #291	; 0x123
+ 801157a:	490e      	ldr	r1, [pc, #56]	; (80115b4 <pbuf_alloc+0x1dc>)
+ 801157c:	480b      	ldr	r0, [pc, #44]	; (80115ac <pbuf_alloc+0x1d4>)
+ 801157e:	f00a ff3b 	bl	801c3f8 <iprintf>
+                  ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0);
+      break;
+ 8011582:	e008      	b.n	8011596 <pbuf_alloc+0x1be>
+    }
+    default:
+      LWIP_ASSERT("pbuf_alloc: erroneous type", 0);
+ 8011584:	4b07      	ldr	r3, [pc, #28]	; (80115a4 <pbuf_alloc+0x1cc>)
+ 8011586:	f240 1227 	movw	r2, #295	; 0x127
+ 801158a:	490b      	ldr	r1, [pc, #44]	; (80115b8 <pbuf_alloc+0x1e0>)
+ 801158c:	4807      	ldr	r0, [pc, #28]	; (80115ac <pbuf_alloc+0x1d4>)
+ 801158e:	f00a ff33 	bl	801c3f8 <iprintf>
+      return NULL;
+ 8011592:	2300      	movs	r3, #0
+ 8011594:	e001      	b.n	801159a <pbuf_alloc+0x1c2>
+      break;
+ 8011596:	bf00      	nop
+  }
+  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p));
+  return p;
+ 8011598:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+}
+ 801159a:	4618      	mov	r0, r3
+ 801159c:	3728      	adds	r7, #40	; 0x28
+ 801159e:	46bd      	mov	sp, r7
+ 80115a0:	bd80      	pop	{r7, pc}
+ 80115a2:	bf00      	nop
+ 80115a4:	0801dd78 	.word	0x0801dd78
+ 80115a8:	0801dda8 	.word	0x0801dda8
+ 80115ac:	0801ddd8 	.word	0x0801ddd8
+ 80115b0:	0801de00 	.word	0x0801de00
+ 80115b4:	0801de34 	.word	0x0801de34
+ 80115b8:	0801de60 	.word	0x0801de60
+
+080115bc <pbuf_alloc_reference>:
+ *
+ * @return the allocated pbuf.
+ */
+struct pbuf *
+pbuf_alloc_reference(void *payload, u16_t length, pbuf_type type)
+{
+ 80115bc:	b580      	push	{r7, lr}
+ 80115be:	b086      	sub	sp, #24
+ 80115c0:	af02      	add	r7, sp, #8
+ 80115c2:	6078      	str	r0, [r7, #4]
+ 80115c4:	460b      	mov	r3, r1
+ 80115c6:	807b      	strh	r3, [r7, #2]
+ 80115c8:	4613      	mov	r3, r2
+ 80115ca:	803b      	strh	r3, [r7, #0]
+  struct pbuf *p;
+  LWIP_ASSERT("invalid pbuf_type", (type == PBUF_REF) || (type == PBUF_ROM));
+ 80115cc:	883b      	ldrh	r3, [r7, #0]
+ 80115ce:	2b41      	cmp	r3, #65	; 0x41
+ 80115d0:	d009      	beq.n	80115e6 <pbuf_alloc_reference+0x2a>
+ 80115d2:	883b      	ldrh	r3, [r7, #0]
+ 80115d4:	2b01      	cmp	r3, #1
+ 80115d6:	d006      	beq.n	80115e6 <pbuf_alloc_reference+0x2a>
+ 80115d8:	4b0f      	ldr	r3, [pc, #60]	; (8011618 <pbuf_alloc_reference+0x5c>)
+ 80115da:	f44f 72a5 	mov.w	r2, #330	; 0x14a
+ 80115de:	490f      	ldr	r1, [pc, #60]	; (801161c <pbuf_alloc_reference+0x60>)
+ 80115e0:	480f      	ldr	r0, [pc, #60]	; (8011620 <pbuf_alloc_reference+0x64>)
+ 80115e2:	f00a ff09 	bl	801c3f8 <iprintf>
+  /* only allocate memory for the pbuf structure */
+  p = (struct pbuf *)memp_malloc(MEMP_PBUF);
+ 80115e6:	200b      	movs	r0, #11
+ 80115e8:	f7ff fad8 	bl	8010b9c <memp_malloc>
+ 80115ec:	60f8      	str	r0, [r7, #12]
+  if (p == NULL) {
+ 80115ee:	68fb      	ldr	r3, [r7, #12]
+ 80115f0:	2b00      	cmp	r3, #0
+ 80115f2:	d101      	bne.n	80115f8 <pbuf_alloc_reference+0x3c>
+    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
+                ("pbuf_alloc_reference: Could not allocate MEMP_PBUF for PBUF_%s.\n",
+                 (type == PBUF_ROM) ? "ROM" : "REF"));
+    return NULL;
+ 80115f4:	2300      	movs	r3, #0
+ 80115f6:	e00b      	b.n	8011610 <pbuf_alloc_reference+0x54>
+  }
+  pbuf_init_alloced_pbuf(p, payload, length, length, type, 0);
+ 80115f8:	8879      	ldrh	r1, [r7, #2]
+ 80115fa:	887a      	ldrh	r2, [r7, #2]
+ 80115fc:	2300      	movs	r3, #0
+ 80115fe:	9301      	str	r3, [sp, #4]
+ 8011600:	883b      	ldrh	r3, [r7, #0]
+ 8011602:	9300      	str	r3, [sp, #0]
+ 8011604:	460b      	mov	r3, r1
+ 8011606:	6879      	ldr	r1, [r7, #4]
+ 8011608:	68f8      	ldr	r0, [r7, #12]
+ 801160a:	f7ff febb 	bl	8011384 <pbuf_init_alloced_pbuf>
+  return p;
+ 801160e:	68fb      	ldr	r3, [r7, #12]
+}
+ 8011610:	4618      	mov	r0, r3
+ 8011612:	3710      	adds	r7, #16
+ 8011614:	46bd      	mov	sp, r7
+ 8011616:	bd80      	pop	{r7, pc}
+ 8011618:	0801dd78 	.word	0x0801dd78
+ 801161c:	0801de7c 	.word	0x0801de7c
+ 8011620:	0801ddd8 	.word	0x0801ddd8
+
+08011624 <pbuf_alloced_custom>:
+ *        big enough to hold 'length' plus the header size
+ */
+struct pbuf *
+pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type, struct pbuf_custom *p,
+                    void *payload_mem, u16_t payload_mem_len)
+{
+ 8011624:	b580      	push	{r7, lr}
+ 8011626:	b088      	sub	sp, #32
+ 8011628:	af02      	add	r7, sp, #8
+ 801162a:	607b      	str	r3, [r7, #4]
+ 801162c:	4603      	mov	r3, r0
+ 801162e:	73fb      	strb	r3, [r7, #15]
+ 8011630:	460b      	mov	r3, r1
+ 8011632:	81bb      	strh	r3, [r7, #12]
+ 8011634:	4613      	mov	r3, r2
+ 8011636:	817b      	strh	r3, [r7, #10]
+  u16_t offset = (u16_t)l;
+ 8011638:	7bfb      	ldrb	r3, [r7, #15]
+ 801163a:	827b      	strh	r3, [r7, #18]
+  void *payload;
+  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloced_custom(length=%"U16_F")\n", length));
+
+  if (LWIP_MEM_ALIGN_SIZE(offset) + length > payload_mem_len) {
+ 801163c:	8a7b      	ldrh	r3, [r7, #18]
+ 801163e:	3303      	adds	r3, #3
+ 8011640:	f023 0203 	bic.w	r2, r3, #3
+ 8011644:	89bb      	ldrh	r3, [r7, #12]
+ 8011646:	441a      	add	r2, r3
+ 8011648:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
+ 801164a:	429a      	cmp	r2, r3
+ 801164c:	d901      	bls.n	8011652 <pbuf_alloced_custom+0x2e>
+    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_WARNING, ("pbuf_alloced_custom(length=%"U16_F") buffer too short\n", length));
+    return NULL;
+ 801164e:	2300      	movs	r3, #0
+ 8011650:	e018      	b.n	8011684 <pbuf_alloced_custom+0x60>
+  }
+
+  if (payload_mem != NULL) {
+ 8011652:	6a3b      	ldr	r3, [r7, #32]
+ 8011654:	2b00      	cmp	r3, #0
+ 8011656:	d007      	beq.n	8011668 <pbuf_alloced_custom+0x44>
+    payload = (u8_t *)payload_mem + LWIP_MEM_ALIGN_SIZE(offset);
+ 8011658:	8a7b      	ldrh	r3, [r7, #18]
+ 801165a:	3303      	adds	r3, #3
+ 801165c:	f023 0303 	bic.w	r3, r3, #3
+ 8011660:	6a3a      	ldr	r2, [r7, #32]
+ 8011662:	4413      	add	r3, r2
+ 8011664:	617b      	str	r3, [r7, #20]
+ 8011666:	e001      	b.n	801166c <pbuf_alloced_custom+0x48>
+  } else {
+    payload = NULL;
+ 8011668:	2300      	movs	r3, #0
+ 801166a:	617b      	str	r3, [r7, #20]
+  }
+  pbuf_init_alloced_pbuf(&p->pbuf, payload, length, length, type, PBUF_FLAG_IS_CUSTOM);
+ 801166c:	6878      	ldr	r0, [r7, #4]
+ 801166e:	89b9      	ldrh	r1, [r7, #12]
+ 8011670:	89ba      	ldrh	r2, [r7, #12]
+ 8011672:	2302      	movs	r3, #2
+ 8011674:	9301      	str	r3, [sp, #4]
+ 8011676:	897b      	ldrh	r3, [r7, #10]
+ 8011678:	9300      	str	r3, [sp, #0]
+ 801167a:	460b      	mov	r3, r1
+ 801167c:	6979      	ldr	r1, [r7, #20]
+ 801167e:	f7ff fe81 	bl	8011384 <pbuf_init_alloced_pbuf>
+  return &p->pbuf;
+ 8011682:	687b      	ldr	r3, [r7, #4]
+}
+ 8011684:	4618      	mov	r0, r3
+ 8011686:	3718      	adds	r7, #24
+ 8011688:	46bd      	mov	sp, r7
+ 801168a:	bd80      	pop	{r7, pc}
+
+0801168c <pbuf_realloc>:
+ *
+ * @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain).
+ */
+void
+pbuf_realloc(struct pbuf *p, u16_t new_len)
+{
+ 801168c:	b580      	push	{r7, lr}
+ 801168e:	b084      	sub	sp, #16
+ 8011690:	af00      	add	r7, sp, #0
+ 8011692:	6078      	str	r0, [r7, #4]
+ 8011694:	460b      	mov	r3, r1
+ 8011696:	807b      	strh	r3, [r7, #2]
+  struct pbuf *q;
+  u16_t rem_len; /* remaining length */
+  u16_t shrink;
+
+  LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL);
+ 8011698:	687b      	ldr	r3, [r7, #4]
+ 801169a:	2b00      	cmp	r3, #0
+ 801169c:	d106      	bne.n	80116ac <pbuf_realloc+0x20>
+ 801169e:	4b3a      	ldr	r3, [pc, #232]	; (8011788 <pbuf_realloc+0xfc>)
+ 80116a0:	f44f 72cc 	mov.w	r2, #408	; 0x198
+ 80116a4:	4939      	ldr	r1, [pc, #228]	; (801178c <pbuf_realloc+0x100>)
+ 80116a6:	483a      	ldr	r0, [pc, #232]	; (8011790 <pbuf_realloc+0x104>)
+ 80116a8:	f00a fea6 	bl	801c3f8 <iprintf>
+
+  /* desired length larger than current length? */
+  if (new_len >= p->tot_len) {
+ 80116ac:	687b      	ldr	r3, [r7, #4]
+ 80116ae:	891b      	ldrh	r3, [r3, #8]
+ 80116b0:	887a      	ldrh	r2, [r7, #2]
+ 80116b2:	429a      	cmp	r2, r3
+ 80116b4:	d264      	bcs.n	8011780 <pbuf_realloc+0xf4>
+    return;
+  }
+
+  /* the pbuf chain grows by (new_len - p->tot_len) bytes
+   * (which may be negative in case of shrinking) */
+  shrink = (u16_t)(p->tot_len - new_len);
+ 80116b6:	687b      	ldr	r3, [r7, #4]
+ 80116b8:	891a      	ldrh	r2, [r3, #8]
+ 80116ba:	887b      	ldrh	r3, [r7, #2]
+ 80116bc:	1ad3      	subs	r3, r2, r3
+ 80116be:	813b      	strh	r3, [r7, #8]
+
+  /* first, step over any pbufs that should remain in the chain */
+  rem_len = new_len;
+ 80116c0:	887b      	ldrh	r3, [r7, #2]
+ 80116c2:	817b      	strh	r3, [r7, #10]
+  q = p;
+ 80116c4:	687b      	ldr	r3, [r7, #4]
+ 80116c6:	60fb      	str	r3, [r7, #12]
+  /* should this pbuf be kept? */
+  while (rem_len > q->len) {
+ 80116c8:	e018      	b.n	80116fc <pbuf_realloc+0x70>
+    /* decrease remaining length by pbuf length */
+    rem_len = (u16_t)(rem_len - q->len);
+ 80116ca:	68fb      	ldr	r3, [r7, #12]
+ 80116cc:	895b      	ldrh	r3, [r3, #10]
+ 80116ce:	897a      	ldrh	r2, [r7, #10]
+ 80116d0:	1ad3      	subs	r3, r2, r3
+ 80116d2:	817b      	strh	r3, [r7, #10]
+    /* decrease total length indicator */
+    q->tot_len = (u16_t)(q->tot_len - shrink);
+ 80116d4:	68fb      	ldr	r3, [r7, #12]
+ 80116d6:	891a      	ldrh	r2, [r3, #8]
+ 80116d8:	893b      	ldrh	r3, [r7, #8]
+ 80116da:	1ad3      	subs	r3, r2, r3
+ 80116dc:	b29a      	uxth	r2, r3
+ 80116de:	68fb      	ldr	r3, [r7, #12]
+ 80116e0:	811a      	strh	r2, [r3, #8]
+    /* proceed to next pbuf in chain */
+    q = q->next;
+ 80116e2:	68fb      	ldr	r3, [r7, #12]
+ 80116e4:	681b      	ldr	r3, [r3, #0]
+ 80116e6:	60fb      	str	r3, [r7, #12]
+    LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL);
+ 80116e8:	68fb      	ldr	r3, [r7, #12]
+ 80116ea:	2b00      	cmp	r3, #0
+ 80116ec:	d106      	bne.n	80116fc <pbuf_realloc+0x70>
+ 80116ee:	4b26      	ldr	r3, [pc, #152]	; (8011788 <pbuf_realloc+0xfc>)
+ 80116f0:	f240 12af 	movw	r2, #431	; 0x1af
+ 80116f4:	4927      	ldr	r1, [pc, #156]	; (8011794 <pbuf_realloc+0x108>)
+ 80116f6:	4826      	ldr	r0, [pc, #152]	; (8011790 <pbuf_realloc+0x104>)
+ 80116f8:	f00a fe7e 	bl	801c3f8 <iprintf>
+  while (rem_len > q->len) {
+ 80116fc:	68fb      	ldr	r3, [r7, #12]
+ 80116fe:	895b      	ldrh	r3, [r3, #10]
+ 8011700:	897a      	ldrh	r2, [r7, #10]
+ 8011702:	429a      	cmp	r2, r3
+ 8011704:	d8e1      	bhi.n	80116ca <pbuf_realloc+0x3e>
+  /* we have now reached the new last pbuf (in q) */
+  /* rem_len == desired length for pbuf q */
+
+  /* shrink allocated memory for PBUF_RAM */
+  /* (other types merely adjust their length fields */
+  if (pbuf_match_allocsrc(q, PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) && (rem_len != q->len)
+ 8011706:	68fb      	ldr	r3, [r7, #12]
+ 8011708:	7b1b      	ldrb	r3, [r3, #12]
+ 801170a:	f003 030f 	and.w	r3, r3, #15
+ 801170e:	2b00      	cmp	r3, #0
+ 8011710:	d122      	bne.n	8011758 <pbuf_realloc+0xcc>
+ 8011712:	68fb      	ldr	r3, [r7, #12]
+ 8011714:	895b      	ldrh	r3, [r3, #10]
+ 8011716:	897a      	ldrh	r2, [r7, #10]
+ 8011718:	429a      	cmp	r2, r3
+ 801171a:	d01d      	beq.n	8011758 <pbuf_realloc+0xcc>
+#if LWIP_SUPPORT_CUSTOM_PBUF
+      && ((q->flags & PBUF_FLAG_IS_CUSTOM) == 0)
+ 801171c:	68fb      	ldr	r3, [r7, #12]
+ 801171e:	7b5b      	ldrb	r3, [r3, #13]
+ 8011720:	f003 0302 	and.w	r3, r3, #2
+ 8011724:	2b00      	cmp	r3, #0
+ 8011726:	d117      	bne.n	8011758 <pbuf_realloc+0xcc>
+#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
+     ) {
+    /* reallocate and adjust the length of the pbuf that will be split */
+    q = (struct pbuf *)mem_trim(q, (mem_size_t)(((u8_t *)q->payload - (u8_t *)q) + rem_len));
+ 8011728:	68fb      	ldr	r3, [r7, #12]
+ 801172a:	685b      	ldr	r3, [r3, #4]
+ 801172c:	461a      	mov	r2, r3
+ 801172e:	68fb      	ldr	r3, [r7, #12]
+ 8011730:	1ad3      	subs	r3, r2, r3
+ 8011732:	b29a      	uxth	r2, r3
+ 8011734:	897b      	ldrh	r3, [r7, #10]
+ 8011736:	4413      	add	r3, r2
+ 8011738:	b29b      	uxth	r3, r3
+ 801173a:	4619      	mov	r1, r3
+ 801173c:	68f8      	ldr	r0, [r7, #12]
+ 801173e:	f7fe ffa1 	bl	8010684 <mem_trim>
+ 8011742:	60f8      	str	r0, [r7, #12]
+    LWIP_ASSERT("mem_trim returned q == NULL", q != NULL);
+ 8011744:	68fb      	ldr	r3, [r7, #12]
+ 8011746:	2b00      	cmp	r3, #0
+ 8011748:	d106      	bne.n	8011758 <pbuf_realloc+0xcc>
+ 801174a:	4b0f      	ldr	r3, [pc, #60]	; (8011788 <pbuf_realloc+0xfc>)
+ 801174c:	f240 12bd 	movw	r2, #445	; 0x1bd
+ 8011750:	4911      	ldr	r1, [pc, #68]	; (8011798 <pbuf_realloc+0x10c>)
+ 8011752:	480f      	ldr	r0, [pc, #60]	; (8011790 <pbuf_realloc+0x104>)
+ 8011754:	f00a fe50 	bl	801c3f8 <iprintf>
+  }
+  /* adjust length fields for new last pbuf */
+  q->len = rem_len;
+ 8011758:	68fb      	ldr	r3, [r7, #12]
+ 801175a:	897a      	ldrh	r2, [r7, #10]
+ 801175c:	815a      	strh	r2, [r3, #10]
+  q->tot_len = q->len;
+ 801175e:	68fb      	ldr	r3, [r7, #12]
+ 8011760:	895a      	ldrh	r2, [r3, #10]
+ 8011762:	68fb      	ldr	r3, [r7, #12]
+ 8011764:	811a      	strh	r2, [r3, #8]
+
+  /* any remaining pbufs in chain? */
+  if (q->next != NULL) {
+ 8011766:	68fb      	ldr	r3, [r7, #12]
+ 8011768:	681b      	ldr	r3, [r3, #0]
+ 801176a:	2b00      	cmp	r3, #0
+ 801176c:	d004      	beq.n	8011778 <pbuf_realloc+0xec>
+    /* free remaining pbufs in chain */
+    pbuf_free(q->next);
+ 801176e:	68fb      	ldr	r3, [r7, #12]
+ 8011770:	681b      	ldr	r3, [r3, #0]
+ 8011772:	4618      	mov	r0, r3
+ 8011774:	f000 f910 	bl	8011998 <pbuf_free>
+  }
+  /* q is last packet in chain */
+  q->next = NULL;
+ 8011778:	68fb      	ldr	r3, [r7, #12]
+ 801177a:	2200      	movs	r2, #0
+ 801177c:	601a      	str	r2, [r3, #0]
+ 801177e:	e000      	b.n	8011782 <pbuf_realloc+0xf6>
+    return;
+ 8011780:	bf00      	nop
+
+}
+ 8011782:	3710      	adds	r7, #16
+ 8011784:	46bd      	mov	sp, r7
+ 8011786:	bd80      	pop	{r7, pc}
+ 8011788:	0801dd78 	.word	0x0801dd78
+ 801178c:	0801de90 	.word	0x0801de90
+ 8011790:	0801ddd8 	.word	0x0801ddd8
+ 8011794:	0801dea8 	.word	0x0801dea8
+ 8011798:	0801dec0 	.word	0x0801dec0
+
+0801179c <pbuf_add_header_impl>:
+ * @return non-zero on failure, zero on success.
+ *
+ */
+static u8_t
+pbuf_add_header_impl(struct pbuf *p, size_t header_size_increment, u8_t force)
+{
+ 801179c:	b580      	push	{r7, lr}
+ 801179e:	b086      	sub	sp, #24
+ 80117a0:	af00      	add	r7, sp, #0
+ 80117a2:	60f8      	str	r0, [r7, #12]
+ 80117a4:	60b9      	str	r1, [r7, #8]
+ 80117a6:	4613      	mov	r3, r2
+ 80117a8:	71fb      	strb	r3, [r7, #7]
+  u16_t type_internal;
+  void *payload;
+  u16_t increment_magnitude;
+
+  LWIP_ASSERT("p != NULL", p != NULL);
+ 80117aa:	68fb      	ldr	r3, [r7, #12]
+ 80117ac:	2b00      	cmp	r3, #0
+ 80117ae:	d106      	bne.n	80117be <pbuf_add_header_impl+0x22>
+ 80117b0:	4b2b      	ldr	r3, [pc, #172]	; (8011860 <pbuf_add_header_impl+0xc4>)
+ 80117b2:	f240 12df 	movw	r2, #479	; 0x1df
+ 80117b6:	492b      	ldr	r1, [pc, #172]	; (8011864 <pbuf_add_header_impl+0xc8>)
+ 80117b8:	482b      	ldr	r0, [pc, #172]	; (8011868 <pbuf_add_header_impl+0xcc>)
+ 80117ba:	f00a fe1d 	bl	801c3f8 <iprintf>
+  if ((p == NULL) || (header_size_increment > 0xFFFF)) {
+ 80117be:	68fb      	ldr	r3, [r7, #12]
+ 80117c0:	2b00      	cmp	r3, #0
+ 80117c2:	d003      	beq.n	80117cc <pbuf_add_header_impl+0x30>
+ 80117c4:	68bb      	ldr	r3, [r7, #8]
+ 80117c6:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 80117ca:	d301      	bcc.n	80117d0 <pbuf_add_header_impl+0x34>
+    return 1;
+ 80117cc:	2301      	movs	r3, #1
+ 80117ce:	e043      	b.n	8011858 <pbuf_add_header_impl+0xbc>
+  }
+  if (header_size_increment == 0) {
+ 80117d0:	68bb      	ldr	r3, [r7, #8]
+ 80117d2:	2b00      	cmp	r3, #0
+ 80117d4:	d101      	bne.n	80117da <pbuf_add_header_impl+0x3e>
+    return 0;
+ 80117d6:	2300      	movs	r3, #0
+ 80117d8:	e03e      	b.n	8011858 <pbuf_add_header_impl+0xbc>
+  }
+
+  increment_magnitude = (u16_t)header_size_increment;
+ 80117da:	68bb      	ldr	r3, [r7, #8]
+ 80117dc:	827b      	strh	r3, [r7, #18]
+  /* Do not allow tot_len to wrap as a result. */
+  if ((u16_t)(increment_magnitude + p->tot_len) < increment_magnitude) {
+ 80117de:	68fb      	ldr	r3, [r7, #12]
+ 80117e0:	891a      	ldrh	r2, [r3, #8]
+ 80117e2:	8a7b      	ldrh	r3, [r7, #18]
+ 80117e4:	4413      	add	r3, r2
+ 80117e6:	b29b      	uxth	r3, r3
+ 80117e8:	8a7a      	ldrh	r2, [r7, #18]
+ 80117ea:	429a      	cmp	r2, r3
+ 80117ec:	d901      	bls.n	80117f2 <pbuf_add_header_impl+0x56>
+    return 1;
+ 80117ee:	2301      	movs	r3, #1
+ 80117f0:	e032      	b.n	8011858 <pbuf_add_header_impl+0xbc>
+  }
+
+  type_internal = p->type_internal;
+ 80117f2:	68fb      	ldr	r3, [r7, #12]
+ 80117f4:	7b1b      	ldrb	r3, [r3, #12]
+ 80117f6:	823b      	strh	r3, [r7, #16]
+
+  /* pbuf types containing payloads? */
+  if (type_internal & PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS) {
+ 80117f8:	8a3b      	ldrh	r3, [r7, #16]
+ 80117fa:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 80117fe:	2b00      	cmp	r3, #0
+ 8011800:	d00c      	beq.n	801181c <pbuf_add_header_impl+0x80>
+    /* set new payload pointer */
+    payload = (u8_t *)p->payload - header_size_increment;
+ 8011802:	68fb      	ldr	r3, [r7, #12]
+ 8011804:	685a      	ldr	r2, [r3, #4]
+ 8011806:	68bb      	ldr	r3, [r7, #8]
+ 8011808:	425b      	negs	r3, r3
+ 801180a:	4413      	add	r3, r2
+ 801180c:	617b      	str	r3, [r7, #20]
+    /* boundary check fails? */
+    if ((u8_t *)payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) {
+ 801180e:	68fb      	ldr	r3, [r7, #12]
+ 8011810:	3310      	adds	r3, #16
+ 8011812:	697a      	ldr	r2, [r7, #20]
+ 8011814:	429a      	cmp	r2, r3
+ 8011816:	d20d      	bcs.n	8011834 <pbuf_add_header_impl+0x98>
+      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE,
+                   ("pbuf_add_header: failed as %p < %p (not enough space for new header size)\n",
+                    (void *)payload, (void *)((u8_t *)p + SIZEOF_STRUCT_PBUF)));
+      /* bail out unsuccessfully */
+      return 1;
+ 8011818:	2301      	movs	r3, #1
+ 801181a:	e01d      	b.n	8011858 <pbuf_add_header_impl+0xbc>
+    }
+    /* pbuf types referring to external payloads? */
+  } else {
+    /* hide a header in the payload? */
+    if (force) {
+ 801181c:	79fb      	ldrb	r3, [r7, #7]
+ 801181e:	2b00      	cmp	r3, #0
+ 8011820:	d006      	beq.n	8011830 <pbuf_add_header_impl+0x94>
+      payload = (u8_t *)p->payload - header_size_increment;
+ 8011822:	68fb      	ldr	r3, [r7, #12]
+ 8011824:	685a      	ldr	r2, [r3, #4]
+ 8011826:	68bb      	ldr	r3, [r7, #8]
+ 8011828:	425b      	negs	r3, r3
+ 801182a:	4413      	add	r3, r2
+ 801182c:	617b      	str	r3, [r7, #20]
+ 801182e:	e001      	b.n	8011834 <pbuf_add_header_impl+0x98>
+    } else {
+      /* cannot expand payload to front (yet!)
+       * bail out unsuccessfully */
+      return 1;
+ 8011830:	2301      	movs	r3, #1
+ 8011832:	e011      	b.n	8011858 <pbuf_add_header_impl+0xbc>
+  }
+  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_add_header: old %p new %p (%"U16_F")\n",
+              (void *)p->payload, (void *)payload, increment_magnitude));
+
+  /* modify pbuf fields */
+  p->payload = payload;
+ 8011834:	68fb      	ldr	r3, [r7, #12]
+ 8011836:	697a      	ldr	r2, [r7, #20]
+ 8011838:	605a      	str	r2, [r3, #4]
+  p->len = (u16_t)(p->len + increment_magnitude);
+ 801183a:	68fb      	ldr	r3, [r7, #12]
+ 801183c:	895a      	ldrh	r2, [r3, #10]
+ 801183e:	8a7b      	ldrh	r3, [r7, #18]
+ 8011840:	4413      	add	r3, r2
+ 8011842:	b29a      	uxth	r2, r3
+ 8011844:	68fb      	ldr	r3, [r7, #12]
+ 8011846:	815a      	strh	r2, [r3, #10]
+  p->tot_len = (u16_t)(p->tot_len + increment_magnitude);
+ 8011848:	68fb      	ldr	r3, [r7, #12]
+ 801184a:	891a      	ldrh	r2, [r3, #8]
+ 801184c:	8a7b      	ldrh	r3, [r7, #18]
+ 801184e:	4413      	add	r3, r2
+ 8011850:	b29a      	uxth	r2, r3
+ 8011852:	68fb      	ldr	r3, [r7, #12]
+ 8011854:	811a      	strh	r2, [r3, #8]
+
+
+  return 0;
+ 8011856:	2300      	movs	r3, #0
+}
+ 8011858:	4618      	mov	r0, r3
+ 801185a:	3718      	adds	r7, #24
+ 801185c:	46bd      	mov	sp, r7
+ 801185e:	bd80      	pop	{r7, pc}
+ 8011860:	0801dd78 	.word	0x0801dd78
+ 8011864:	0801dedc 	.word	0x0801dedc
+ 8011868:	0801ddd8 	.word	0x0801ddd8
+
+0801186c <pbuf_add_header>:
+ * @return non-zero on failure, zero on success.
+ *
+ */
+u8_t
+pbuf_add_header(struct pbuf *p, size_t header_size_increment)
+{
+ 801186c:	b580      	push	{r7, lr}
+ 801186e:	b082      	sub	sp, #8
+ 8011870:	af00      	add	r7, sp, #0
+ 8011872:	6078      	str	r0, [r7, #4]
+ 8011874:	6039      	str	r1, [r7, #0]
+  return pbuf_add_header_impl(p, header_size_increment, 0);
+ 8011876:	2200      	movs	r2, #0
+ 8011878:	6839      	ldr	r1, [r7, #0]
+ 801187a:	6878      	ldr	r0, [r7, #4]
+ 801187c:	f7ff ff8e 	bl	801179c <pbuf_add_header_impl>
+ 8011880:	4603      	mov	r3, r0
+}
+ 8011882:	4618      	mov	r0, r3
+ 8011884:	3708      	adds	r7, #8
+ 8011886:	46bd      	mov	sp, r7
+ 8011888:	bd80      	pop	{r7, pc}
+	...
+
+0801188c <pbuf_remove_header>:
+ * @return non-zero on failure, zero on success.
+ *
+ */
+u8_t
+pbuf_remove_header(struct pbuf *p, size_t header_size_decrement)
+{
+ 801188c:	b580      	push	{r7, lr}
+ 801188e:	b084      	sub	sp, #16
+ 8011890:	af00      	add	r7, sp, #0
+ 8011892:	6078      	str	r0, [r7, #4]
+ 8011894:	6039      	str	r1, [r7, #0]
+  void *payload;
+  u16_t increment_magnitude;
+
+  LWIP_ASSERT("p != NULL", p != NULL);
+ 8011896:	687b      	ldr	r3, [r7, #4]
+ 8011898:	2b00      	cmp	r3, #0
+ 801189a:	d106      	bne.n	80118aa <pbuf_remove_header+0x1e>
+ 801189c:	4b20      	ldr	r3, [pc, #128]	; (8011920 <pbuf_remove_header+0x94>)
+ 801189e:	f240 224b 	movw	r2, #587	; 0x24b
+ 80118a2:	4920      	ldr	r1, [pc, #128]	; (8011924 <pbuf_remove_header+0x98>)
+ 80118a4:	4820      	ldr	r0, [pc, #128]	; (8011928 <pbuf_remove_header+0x9c>)
+ 80118a6:	f00a fda7 	bl	801c3f8 <iprintf>
+  if ((p == NULL) || (header_size_decrement > 0xFFFF)) {
+ 80118aa:	687b      	ldr	r3, [r7, #4]
+ 80118ac:	2b00      	cmp	r3, #0
+ 80118ae:	d003      	beq.n	80118b8 <pbuf_remove_header+0x2c>
+ 80118b0:	683b      	ldr	r3, [r7, #0]
+ 80118b2:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 80118b6:	d301      	bcc.n	80118bc <pbuf_remove_header+0x30>
+    return 1;
+ 80118b8:	2301      	movs	r3, #1
+ 80118ba:	e02c      	b.n	8011916 <pbuf_remove_header+0x8a>
+  }
+  if (header_size_decrement == 0) {
+ 80118bc:	683b      	ldr	r3, [r7, #0]
+ 80118be:	2b00      	cmp	r3, #0
+ 80118c0:	d101      	bne.n	80118c6 <pbuf_remove_header+0x3a>
+    return 0;
+ 80118c2:	2300      	movs	r3, #0
+ 80118c4:	e027      	b.n	8011916 <pbuf_remove_header+0x8a>
+  }
+
+  increment_magnitude = (u16_t)header_size_decrement;
+ 80118c6:	683b      	ldr	r3, [r7, #0]
+ 80118c8:	81fb      	strh	r3, [r7, #14]
+  /* Check that we aren't going to move off the end of the pbuf */
+  LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;);
+ 80118ca:	687b      	ldr	r3, [r7, #4]
+ 80118cc:	895b      	ldrh	r3, [r3, #10]
+ 80118ce:	89fa      	ldrh	r2, [r7, #14]
+ 80118d0:	429a      	cmp	r2, r3
+ 80118d2:	d908      	bls.n	80118e6 <pbuf_remove_header+0x5a>
+ 80118d4:	4b12      	ldr	r3, [pc, #72]	; (8011920 <pbuf_remove_header+0x94>)
+ 80118d6:	f240 2255 	movw	r2, #597	; 0x255
+ 80118da:	4914      	ldr	r1, [pc, #80]	; (801192c <pbuf_remove_header+0xa0>)
+ 80118dc:	4812      	ldr	r0, [pc, #72]	; (8011928 <pbuf_remove_header+0x9c>)
+ 80118de:	f00a fd8b 	bl	801c3f8 <iprintf>
+ 80118e2:	2301      	movs	r3, #1
+ 80118e4:	e017      	b.n	8011916 <pbuf_remove_header+0x8a>
+
+  /* remember current payload pointer */
+  payload = p->payload;
+ 80118e6:	687b      	ldr	r3, [r7, #4]
+ 80118e8:	685b      	ldr	r3, [r3, #4]
+ 80118ea:	60bb      	str	r3, [r7, #8]
+  LWIP_UNUSED_ARG(payload); /* only used in LWIP_DEBUGF below */
+
+  /* increase payload pointer (guarded by length check above) */
+  p->payload = (u8_t *)p->payload + header_size_decrement;
+ 80118ec:	687b      	ldr	r3, [r7, #4]
+ 80118ee:	685a      	ldr	r2, [r3, #4]
+ 80118f0:	683b      	ldr	r3, [r7, #0]
+ 80118f2:	441a      	add	r2, r3
+ 80118f4:	687b      	ldr	r3, [r7, #4]
+ 80118f6:	605a      	str	r2, [r3, #4]
+  /* modify pbuf length fields */
+  p->len = (u16_t)(p->len - increment_magnitude);
+ 80118f8:	687b      	ldr	r3, [r7, #4]
+ 80118fa:	895a      	ldrh	r2, [r3, #10]
+ 80118fc:	89fb      	ldrh	r3, [r7, #14]
+ 80118fe:	1ad3      	subs	r3, r2, r3
+ 8011900:	b29a      	uxth	r2, r3
+ 8011902:	687b      	ldr	r3, [r7, #4]
+ 8011904:	815a      	strh	r2, [r3, #10]
+  p->tot_len = (u16_t)(p->tot_len - increment_magnitude);
+ 8011906:	687b      	ldr	r3, [r7, #4]
+ 8011908:	891a      	ldrh	r2, [r3, #8]
+ 801190a:	89fb      	ldrh	r3, [r7, #14]
+ 801190c:	1ad3      	subs	r3, r2, r3
+ 801190e:	b29a      	uxth	r2, r3
+ 8011910:	687b      	ldr	r3, [r7, #4]
+ 8011912:	811a      	strh	r2, [r3, #8]
+
+  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_remove_header: old %p new %p (%"U16_F")\n",
+              (void *)payload, (void *)p->payload, increment_magnitude));
+
+  return 0;
+ 8011914:	2300      	movs	r3, #0
+}
+ 8011916:	4618      	mov	r0, r3
+ 8011918:	3710      	adds	r7, #16
+ 801191a:	46bd      	mov	sp, r7
+ 801191c:	bd80      	pop	{r7, pc}
+ 801191e:	bf00      	nop
+ 8011920:	0801dd78 	.word	0x0801dd78
+ 8011924:	0801dedc 	.word	0x0801dedc
+ 8011928:	0801ddd8 	.word	0x0801ddd8
+ 801192c:	0801dee8 	.word	0x0801dee8
+
+08011930 <pbuf_header_impl>:
+
+static u8_t
+pbuf_header_impl(struct pbuf *p, s16_t header_size_increment, u8_t force)
+{
+ 8011930:	b580      	push	{r7, lr}
+ 8011932:	b082      	sub	sp, #8
+ 8011934:	af00      	add	r7, sp, #0
+ 8011936:	6078      	str	r0, [r7, #4]
+ 8011938:	460b      	mov	r3, r1
+ 801193a:	807b      	strh	r3, [r7, #2]
+ 801193c:	4613      	mov	r3, r2
+ 801193e:	707b      	strb	r3, [r7, #1]
+  if (header_size_increment < 0) {
+ 8011940:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
+ 8011944:	2b00      	cmp	r3, #0
+ 8011946:	da08      	bge.n	801195a <pbuf_header_impl+0x2a>
+    return pbuf_remove_header(p, (size_t) - header_size_increment);
+ 8011948:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
+ 801194c:	425b      	negs	r3, r3
+ 801194e:	4619      	mov	r1, r3
+ 8011950:	6878      	ldr	r0, [r7, #4]
+ 8011952:	f7ff ff9b 	bl	801188c <pbuf_remove_header>
+ 8011956:	4603      	mov	r3, r0
+ 8011958:	e007      	b.n	801196a <pbuf_header_impl+0x3a>
+  } else {
+    return pbuf_add_header_impl(p, (size_t)header_size_increment, force);
+ 801195a:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
+ 801195e:	787a      	ldrb	r2, [r7, #1]
+ 8011960:	4619      	mov	r1, r3
+ 8011962:	6878      	ldr	r0, [r7, #4]
+ 8011964:	f7ff ff1a 	bl	801179c <pbuf_add_header_impl>
+ 8011968:	4603      	mov	r3, r0
+  }
+}
+ 801196a:	4618      	mov	r0, r3
+ 801196c:	3708      	adds	r7, #8
+ 801196e:	46bd      	mov	sp, r7
+ 8011970:	bd80      	pop	{r7, pc}
+
+08011972 <pbuf_header_force>:
+ * Same as pbuf_header but does not check if 'header_size > 0' is allowed.
+ * This is used internally only, to allow PBUF_REF for RX.
+ */
+u8_t
+pbuf_header_force(struct pbuf *p, s16_t header_size_increment)
+{
+ 8011972:	b580      	push	{r7, lr}
+ 8011974:	b082      	sub	sp, #8
+ 8011976:	af00      	add	r7, sp, #0
+ 8011978:	6078      	str	r0, [r7, #4]
+ 801197a:	460b      	mov	r3, r1
+ 801197c:	807b      	strh	r3, [r7, #2]
+  return pbuf_header_impl(p, header_size_increment, 1);
+ 801197e:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
+ 8011982:	2201      	movs	r2, #1
+ 8011984:	4619      	mov	r1, r3
+ 8011986:	6878      	ldr	r0, [r7, #4]
+ 8011988:	f7ff ffd2 	bl	8011930 <pbuf_header_impl>
+ 801198c:	4603      	mov	r3, r0
+}
+ 801198e:	4618      	mov	r0, r3
+ 8011990:	3708      	adds	r7, #8
+ 8011992:	46bd      	mov	sp, r7
+ 8011994:	bd80      	pop	{r7, pc}
+	...
+
+08011998 <pbuf_free>:
+ * 1->1->1 becomes .......
+ *
+ */
+u8_t
+pbuf_free(struct pbuf *p)
+{
+ 8011998:	b580      	push	{r7, lr}
+ 801199a:	b088      	sub	sp, #32
+ 801199c:	af00      	add	r7, sp, #0
+ 801199e:	6078      	str	r0, [r7, #4]
+  u8_t alloc_src;
+  struct pbuf *q;
+  u8_t count;
+
+  if (p == NULL) {
+ 80119a0:	687b      	ldr	r3, [r7, #4]
+ 80119a2:	2b00      	cmp	r3, #0
+ 80119a4:	d10b      	bne.n	80119be <pbuf_free+0x26>
+    LWIP_ASSERT("p != NULL", p != NULL);
+ 80119a6:	687b      	ldr	r3, [r7, #4]
+ 80119a8:	2b00      	cmp	r3, #0
+ 80119aa:	d106      	bne.n	80119ba <pbuf_free+0x22>
+ 80119ac:	4b3b      	ldr	r3, [pc, #236]	; (8011a9c <pbuf_free+0x104>)
+ 80119ae:	f44f 7237 	mov.w	r2, #732	; 0x2dc
+ 80119b2:	493b      	ldr	r1, [pc, #236]	; (8011aa0 <pbuf_free+0x108>)
+ 80119b4:	483b      	ldr	r0, [pc, #236]	; (8011aa4 <pbuf_free+0x10c>)
+ 80119b6:	f00a fd1f 	bl	801c3f8 <iprintf>
+    /* if assertions are disabled, proceed with debug output */
+    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
+                ("pbuf_free(p == NULL) was called.\n"));
+    return 0;
+ 80119ba:	2300      	movs	r3, #0
+ 80119bc:	e069      	b.n	8011a92 <pbuf_free+0xfa>
+  }
+  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p));
+
+  PERF_START;
+
+  count = 0;
+ 80119be:	2300      	movs	r3, #0
+ 80119c0:	77fb      	strb	r3, [r7, #31]
+  /* de-allocate all consecutive pbufs from the head of the chain that
+   * obtain a zero reference count after decrementing*/
+  while (p != NULL) {
+ 80119c2:	e062      	b.n	8011a8a <pbuf_free+0xf2>
+    LWIP_PBUF_REF_T ref;
+    SYS_ARCH_DECL_PROTECT(old_level);
+    /* Since decrementing ref cannot be guaranteed to be a single machine operation
+     * we must protect it. We put the new ref into a local variable to prevent
+     * further protection. */
+    SYS_ARCH_PROTECT(old_level);
+ 80119c4:	f00a fc9a 	bl	801c2fc <sys_arch_protect>
+ 80119c8:	61b8      	str	r0, [r7, #24]
+    /* all pbufs in a chain are referenced at least once */
+    LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0);
+ 80119ca:	687b      	ldr	r3, [r7, #4]
+ 80119cc:	7b9b      	ldrb	r3, [r3, #14]
+ 80119ce:	2b00      	cmp	r3, #0
+ 80119d0:	d106      	bne.n	80119e0 <pbuf_free+0x48>
+ 80119d2:	4b32      	ldr	r3, [pc, #200]	; (8011a9c <pbuf_free+0x104>)
+ 80119d4:	f240 22f1 	movw	r2, #753	; 0x2f1
+ 80119d8:	4933      	ldr	r1, [pc, #204]	; (8011aa8 <pbuf_free+0x110>)
+ 80119da:	4832      	ldr	r0, [pc, #200]	; (8011aa4 <pbuf_free+0x10c>)
+ 80119dc:	f00a fd0c 	bl	801c3f8 <iprintf>
+    /* decrease reference count (number of pointers to pbuf) */
+    ref = --(p->ref);
+ 80119e0:	687b      	ldr	r3, [r7, #4]
+ 80119e2:	7b9b      	ldrb	r3, [r3, #14]
+ 80119e4:	3b01      	subs	r3, #1
+ 80119e6:	b2da      	uxtb	r2, r3
+ 80119e8:	687b      	ldr	r3, [r7, #4]
+ 80119ea:	739a      	strb	r2, [r3, #14]
+ 80119ec:	687b      	ldr	r3, [r7, #4]
+ 80119ee:	7b9b      	ldrb	r3, [r3, #14]
+ 80119f0:	75fb      	strb	r3, [r7, #23]
+    SYS_ARCH_UNPROTECT(old_level);
+ 80119f2:	69b8      	ldr	r0, [r7, #24]
+ 80119f4:	f00a fc90 	bl	801c318 <sys_arch_unprotect>
+    /* this pbuf is no longer referenced to? */
+    if (ref == 0) {
+ 80119f8:	7dfb      	ldrb	r3, [r7, #23]
+ 80119fa:	2b00      	cmp	r3, #0
+ 80119fc:	d143      	bne.n	8011a86 <pbuf_free+0xee>
+      /* remember next pbuf in chain for next iteration */
+      q = p->next;
+ 80119fe:	687b      	ldr	r3, [r7, #4]
+ 8011a00:	681b      	ldr	r3, [r3, #0]
+ 8011a02:	613b      	str	r3, [r7, #16]
+      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p));
+      alloc_src = pbuf_get_allocsrc(p);
+ 8011a04:	687b      	ldr	r3, [r7, #4]
+ 8011a06:	7b1b      	ldrb	r3, [r3, #12]
+ 8011a08:	f003 030f 	and.w	r3, r3, #15
+ 8011a0c:	73fb      	strb	r3, [r7, #15]
+#if LWIP_SUPPORT_CUSTOM_PBUF
+      /* is this a custom pbuf? */
+      if ((p->flags & PBUF_FLAG_IS_CUSTOM) != 0) {
+ 8011a0e:	687b      	ldr	r3, [r7, #4]
+ 8011a10:	7b5b      	ldrb	r3, [r3, #13]
+ 8011a12:	f003 0302 	and.w	r3, r3, #2
+ 8011a16:	2b00      	cmp	r3, #0
+ 8011a18:	d011      	beq.n	8011a3e <pbuf_free+0xa6>
+        struct pbuf_custom *pc = (struct pbuf_custom *)p;
+ 8011a1a:	687b      	ldr	r3, [r7, #4]
+ 8011a1c:	60bb      	str	r3, [r7, #8]
+        LWIP_ASSERT("pc->custom_free_function != NULL", pc->custom_free_function != NULL);
+ 8011a1e:	68bb      	ldr	r3, [r7, #8]
+ 8011a20:	691b      	ldr	r3, [r3, #16]
+ 8011a22:	2b00      	cmp	r3, #0
+ 8011a24:	d106      	bne.n	8011a34 <pbuf_free+0x9c>
+ 8011a26:	4b1d      	ldr	r3, [pc, #116]	; (8011a9c <pbuf_free+0x104>)
+ 8011a28:	f240 22ff 	movw	r2, #767	; 0x2ff
+ 8011a2c:	491f      	ldr	r1, [pc, #124]	; (8011aac <pbuf_free+0x114>)
+ 8011a2e:	481d      	ldr	r0, [pc, #116]	; (8011aa4 <pbuf_free+0x10c>)
+ 8011a30:	f00a fce2 	bl	801c3f8 <iprintf>
+        pc->custom_free_function(p);
+ 8011a34:	68bb      	ldr	r3, [r7, #8]
+ 8011a36:	691b      	ldr	r3, [r3, #16]
+ 8011a38:	6878      	ldr	r0, [r7, #4]
+ 8011a3a:	4798      	blx	r3
+ 8011a3c:	e01d      	b.n	8011a7a <pbuf_free+0xe2>
+      } else
+#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
+      {
+        /* is this a pbuf from the pool? */
+        if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL) {
+ 8011a3e:	7bfb      	ldrb	r3, [r7, #15]
+ 8011a40:	2b02      	cmp	r3, #2
+ 8011a42:	d104      	bne.n	8011a4e <pbuf_free+0xb6>
+          memp_free(MEMP_PBUF_POOL, p);
+ 8011a44:	6879      	ldr	r1, [r7, #4]
+ 8011a46:	200c      	movs	r0, #12
+ 8011a48:	f7ff f8fa 	bl	8010c40 <memp_free>
+ 8011a4c:	e015      	b.n	8011a7a <pbuf_free+0xe2>
+          /* is this a ROM or RAM referencing pbuf? */
+        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF) {
+ 8011a4e:	7bfb      	ldrb	r3, [r7, #15]
+ 8011a50:	2b01      	cmp	r3, #1
+ 8011a52:	d104      	bne.n	8011a5e <pbuf_free+0xc6>
+          memp_free(MEMP_PBUF, p);
+ 8011a54:	6879      	ldr	r1, [r7, #4]
+ 8011a56:	200b      	movs	r0, #11
+ 8011a58:	f7ff f8f2 	bl	8010c40 <memp_free>
+ 8011a5c:	e00d      	b.n	8011a7a <pbuf_free+0xe2>
+          /* type == PBUF_RAM */
+        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) {
+ 8011a5e:	7bfb      	ldrb	r3, [r7, #15]
+ 8011a60:	2b00      	cmp	r3, #0
+ 8011a62:	d103      	bne.n	8011a6c <pbuf_free+0xd4>
+          mem_free(p);
+ 8011a64:	6878      	ldr	r0, [r7, #4]
+ 8011a66:	f7fe fd7d 	bl	8010564 <mem_free>
+ 8011a6a:	e006      	b.n	8011a7a <pbuf_free+0xe2>
+        } else {
+          /* @todo: support freeing other types */
+          LWIP_ASSERT("invalid pbuf type", 0);
+ 8011a6c:	4b0b      	ldr	r3, [pc, #44]	; (8011a9c <pbuf_free+0x104>)
+ 8011a6e:	f240 320f 	movw	r2, #783	; 0x30f
+ 8011a72:	490f      	ldr	r1, [pc, #60]	; (8011ab0 <pbuf_free+0x118>)
+ 8011a74:	480b      	ldr	r0, [pc, #44]	; (8011aa4 <pbuf_free+0x10c>)
+ 8011a76:	f00a fcbf 	bl	801c3f8 <iprintf>
+        }
+      }
+      count++;
+ 8011a7a:	7ffb      	ldrb	r3, [r7, #31]
+ 8011a7c:	3301      	adds	r3, #1
+ 8011a7e:	77fb      	strb	r3, [r7, #31]
+      /* proceed to next pbuf */
+      p = q;
+ 8011a80:	693b      	ldr	r3, [r7, #16]
+ 8011a82:	607b      	str	r3, [r7, #4]
+ 8011a84:	e001      	b.n	8011a8a <pbuf_free+0xf2>
+      /* p->ref > 0, this pbuf is still referenced to */
+      /* (and so the remaining pbufs in chain as well) */
+    } else {
+      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, (u16_t)ref));
+      /* stop walking through the chain */
+      p = NULL;
+ 8011a86:	2300      	movs	r3, #0
+ 8011a88:	607b      	str	r3, [r7, #4]
+  while (p != NULL) {
+ 8011a8a:	687b      	ldr	r3, [r7, #4]
+ 8011a8c:	2b00      	cmp	r3, #0
+ 8011a8e:	d199      	bne.n	80119c4 <pbuf_free+0x2c>
+    }
+  }
+  PERF_STOP("pbuf_free");
+  /* return number of de-allocated pbufs */
+  return count;
+ 8011a90:	7ffb      	ldrb	r3, [r7, #31]
+}
+ 8011a92:	4618      	mov	r0, r3
+ 8011a94:	3720      	adds	r7, #32
+ 8011a96:	46bd      	mov	sp, r7
+ 8011a98:	bd80      	pop	{r7, pc}
+ 8011a9a:	bf00      	nop
+ 8011a9c:	0801dd78 	.word	0x0801dd78
+ 8011aa0:	0801dedc 	.word	0x0801dedc
+ 8011aa4:	0801ddd8 	.word	0x0801ddd8
+ 8011aa8:	0801df08 	.word	0x0801df08
+ 8011aac:	0801df20 	.word	0x0801df20
+ 8011ab0:	0801df44 	.word	0x0801df44
+
+08011ab4 <pbuf_clen>:
+ * @param p first pbuf of chain
+ * @return the number of pbufs in a chain
+ */
+u16_t
+pbuf_clen(const struct pbuf *p)
+{
+ 8011ab4:	b480      	push	{r7}
+ 8011ab6:	b085      	sub	sp, #20
+ 8011ab8:	af00      	add	r7, sp, #0
+ 8011aba:	6078      	str	r0, [r7, #4]
+  u16_t len;
+
+  len = 0;
+ 8011abc:	2300      	movs	r3, #0
+ 8011abe:	81fb      	strh	r3, [r7, #14]
+  while (p != NULL) {
+ 8011ac0:	e005      	b.n	8011ace <pbuf_clen+0x1a>
+    ++len;
+ 8011ac2:	89fb      	ldrh	r3, [r7, #14]
+ 8011ac4:	3301      	adds	r3, #1
+ 8011ac6:	81fb      	strh	r3, [r7, #14]
+    p = p->next;
+ 8011ac8:	687b      	ldr	r3, [r7, #4]
+ 8011aca:	681b      	ldr	r3, [r3, #0]
+ 8011acc:	607b      	str	r3, [r7, #4]
+  while (p != NULL) {
+ 8011ace:	687b      	ldr	r3, [r7, #4]
+ 8011ad0:	2b00      	cmp	r3, #0
+ 8011ad2:	d1f6      	bne.n	8011ac2 <pbuf_clen+0xe>
+  }
+  return len;
+ 8011ad4:	89fb      	ldrh	r3, [r7, #14]
+}
+ 8011ad6:	4618      	mov	r0, r3
+ 8011ad8:	3714      	adds	r7, #20
+ 8011ada:	46bd      	mov	sp, r7
+ 8011adc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8011ae0:	4770      	bx	lr
+	...
+
+08011ae4 <pbuf_ref>:
+ * @param p pbuf to increase reference counter of
+ *
+ */
+void
+pbuf_ref(struct pbuf *p)
+{
+ 8011ae4:	b580      	push	{r7, lr}
+ 8011ae6:	b084      	sub	sp, #16
+ 8011ae8:	af00      	add	r7, sp, #0
+ 8011aea:	6078      	str	r0, [r7, #4]
+  /* pbuf given? */
+  if (p != NULL) {
+ 8011aec:	687b      	ldr	r3, [r7, #4]
+ 8011aee:	2b00      	cmp	r3, #0
+ 8011af0:	d016      	beq.n	8011b20 <pbuf_ref+0x3c>
+    SYS_ARCH_SET(p->ref, (LWIP_PBUF_REF_T)(p->ref + 1));
+ 8011af2:	f00a fc03 	bl	801c2fc <sys_arch_protect>
+ 8011af6:	60f8      	str	r0, [r7, #12]
+ 8011af8:	687b      	ldr	r3, [r7, #4]
+ 8011afa:	7b9b      	ldrb	r3, [r3, #14]
+ 8011afc:	3301      	adds	r3, #1
+ 8011afe:	b2da      	uxtb	r2, r3
+ 8011b00:	687b      	ldr	r3, [r7, #4]
+ 8011b02:	739a      	strb	r2, [r3, #14]
+ 8011b04:	68f8      	ldr	r0, [r7, #12]
+ 8011b06:	f00a fc07 	bl	801c318 <sys_arch_unprotect>
+    LWIP_ASSERT("pbuf ref overflow", p->ref > 0);
+ 8011b0a:	687b      	ldr	r3, [r7, #4]
+ 8011b0c:	7b9b      	ldrb	r3, [r3, #14]
+ 8011b0e:	2b00      	cmp	r3, #0
+ 8011b10:	d106      	bne.n	8011b20 <pbuf_ref+0x3c>
+ 8011b12:	4b05      	ldr	r3, [pc, #20]	; (8011b28 <pbuf_ref+0x44>)
+ 8011b14:	f240 3242 	movw	r2, #834	; 0x342
+ 8011b18:	4904      	ldr	r1, [pc, #16]	; (8011b2c <pbuf_ref+0x48>)
+ 8011b1a:	4805      	ldr	r0, [pc, #20]	; (8011b30 <pbuf_ref+0x4c>)
+ 8011b1c:	f00a fc6c 	bl	801c3f8 <iprintf>
+  }
+}
+ 8011b20:	bf00      	nop
+ 8011b22:	3710      	adds	r7, #16
+ 8011b24:	46bd      	mov	sp, r7
+ 8011b26:	bd80      	pop	{r7, pc}
+ 8011b28:	0801dd78 	.word	0x0801dd78
+ 8011b2c:	0801df58 	.word	0x0801df58
+ 8011b30:	0801ddd8 	.word	0x0801ddd8
+
+08011b34 <pbuf_cat>:
+ *
+ * @see pbuf_chain()
+ */
+void
+pbuf_cat(struct pbuf *h, struct pbuf *t)
+{
+ 8011b34:	b580      	push	{r7, lr}
+ 8011b36:	b084      	sub	sp, #16
+ 8011b38:	af00      	add	r7, sp, #0
+ 8011b3a:	6078      	str	r0, [r7, #4]
+ 8011b3c:	6039      	str	r1, [r7, #0]
+  struct pbuf *p;
+
+  LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)",
+ 8011b3e:	687b      	ldr	r3, [r7, #4]
+ 8011b40:	2b00      	cmp	r3, #0
+ 8011b42:	d002      	beq.n	8011b4a <pbuf_cat+0x16>
+ 8011b44:	683b      	ldr	r3, [r7, #0]
+ 8011b46:	2b00      	cmp	r3, #0
+ 8011b48:	d107      	bne.n	8011b5a <pbuf_cat+0x26>
+ 8011b4a:	4b20      	ldr	r3, [pc, #128]	; (8011bcc <pbuf_cat+0x98>)
+ 8011b4c:	f240 325a 	movw	r2, #858	; 0x35a
+ 8011b50:	491f      	ldr	r1, [pc, #124]	; (8011bd0 <pbuf_cat+0x9c>)
+ 8011b52:	4820      	ldr	r0, [pc, #128]	; (8011bd4 <pbuf_cat+0xa0>)
+ 8011b54:	f00a fc50 	bl	801c3f8 <iprintf>
+ 8011b58:	e034      	b.n	8011bc4 <pbuf_cat+0x90>
+             ((h != NULL) && (t != NULL)), return;);
+
+  /* proceed to last pbuf of chain */
+  for (p = h; p->next != NULL; p = p->next) {
+ 8011b5a:	687b      	ldr	r3, [r7, #4]
+ 8011b5c:	60fb      	str	r3, [r7, #12]
+ 8011b5e:	e00a      	b.n	8011b76 <pbuf_cat+0x42>
+    /* add total length of second chain to all totals of first chain */
+    p->tot_len = (u16_t)(p->tot_len + t->tot_len);
+ 8011b60:	68fb      	ldr	r3, [r7, #12]
+ 8011b62:	891a      	ldrh	r2, [r3, #8]
+ 8011b64:	683b      	ldr	r3, [r7, #0]
+ 8011b66:	891b      	ldrh	r3, [r3, #8]
+ 8011b68:	4413      	add	r3, r2
+ 8011b6a:	b29a      	uxth	r2, r3
+ 8011b6c:	68fb      	ldr	r3, [r7, #12]
+ 8011b6e:	811a      	strh	r2, [r3, #8]
+  for (p = h; p->next != NULL; p = p->next) {
+ 8011b70:	68fb      	ldr	r3, [r7, #12]
+ 8011b72:	681b      	ldr	r3, [r3, #0]
+ 8011b74:	60fb      	str	r3, [r7, #12]
+ 8011b76:	68fb      	ldr	r3, [r7, #12]
+ 8011b78:	681b      	ldr	r3, [r3, #0]
+ 8011b7a:	2b00      	cmp	r3, #0
+ 8011b7c:	d1f0      	bne.n	8011b60 <pbuf_cat+0x2c>
+  }
+  /* { p is last pbuf of first h chain, p->next == NULL } */
+  LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len);
+ 8011b7e:	68fb      	ldr	r3, [r7, #12]
+ 8011b80:	891a      	ldrh	r2, [r3, #8]
+ 8011b82:	68fb      	ldr	r3, [r7, #12]
+ 8011b84:	895b      	ldrh	r3, [r3, #10]
+ 8011b86:	429a      	cmp	r2, r3
+ 8011b88:	d006      	beq.n	8011b98 <pbuf_cat+0x64>
+ 8011b8a:	4b10      	ldr	r3, [pc, #64]	; (8011bcc <pbuf_cat+0x98>)
+ 8011b8c:	f240 3262 	movw	r2, #866	; 0x362
+ 8011b90:	4911      	ldr	r1, [pc, #68]	; (8011bd8 <pbuf_cat+0xa4>)
+ 8011b92:	4810      	ldr	r0, [pc, #64]	; (8011bd4 <pbuf_cat+0xa0>)
+ 8011b94:	f00a fc30 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("p->next == NULL", p->next == NULL);
+ 8011b98:	68fb      	ldr	r3, [r7, #12]
+ 8011b9a:	681b      	ldr	r3, [r3, #0]
+ 8011b9c:	2b00      	cmp	r3, #0
+ 8011b9e:	d006      	beq.n	8011bae <pbuf_cat+0x7a>
+ 8011ba0:	4b0a      	ldr	r3, [pc, #40]	; (8011bcc <pbuf_cat+0x98>)
+ 8011ba2:	f240 3263 	movw	r2, #867	; 0x363
+ 8011ba6:	490d      	ldr	r1, [pc, #52]	; (8011bdc <pbuf_cat+0xa8>)
+ 8011ba8:	480a      	ldr	r0, [pc, #40]	; (8011bd4 <pbuf_cat+0xa0>)
+ 8011baa:	f00a fc25 	bl	801c3f8 <iprintf>
+  /* add total length of second chain to last pbuf total of first chain */
+  p->tot_len = (u16_t)(p->tot_len + t->tot_len);
+ 8011bae:	68fb      	ldr	r3, [r7, #12]
+ 8011bb0:	891a      	ldrh	r2, [r3, #8]
+ 8011bb2:	683b      	ldr	r3, [r7, #0]
+ 8011bb4:	891b      	ldrh	r3, [r3, #8]
+ 8011bb6:	4413      	add	r3, r2
+ 8011bb8:	b29a      	uxth	r2, r3
+ 8011bba:	68fb      	ldr	r3, [r7, #12]
+ 8011bbc:	811a      	strh	r2, [r3, #8]
+  /* chain last pbuf of head (p) with first of tail (t) */
+  p->next = t;
+ 8011bbe:	68fb      	ldr	r3, [r7, #12]
+ 8011bc0:	683a      	ldr	r2, [r7, #0]
+ 8011bc2:	601a      	str	r2, [r3, #0]
+  /* p->next now references t, but the caller will drop its reference to t,
+   * so netto there is no change to the reference count of t.
+   */
+}
+ 8011bc4:	3710      	adds	r7, #16
+ 8011bc6:	46bd      	mov	sp, r7
+ 8011bc8:	bd80      	pop	{r7, pc}
+ 8011bca:	bf00      	nop
+ 8011bcc:	0801dd78 	.word	0x0801dd78
+ 8011bd0:	0801df6c 	.word	0x0801df6c
+ 8011bd4:	0801ddd8 	.word	0x0801ddd8
+ 8011bd8:	0801dfa4 	.word	0x0801dfa4
+ 8011bdc:	0801dfd4 	.word	0x0801dfd4
+
+08011be0 <pbuf_chain>:
+ * The ->ref field of the first pbuf of the tail chain is adjusted.
+ *
+ */
+void
+pbuf_chain(struct pbuf *h, struct pbuf *t)
+{
+ 8011be0:	b580      	push	{r7, lr}
+ 8011be2:	b082      	sub	sp, #8
+ 8011be4:	af00      	add	r7, sp, #0
+ 8011be6:	6078      	str	r0, [r7, #4]
+ 8011be8:	6039      	str	r1, [r7, #0]
+  pbuf_cat(h, t);
+ 8011bea:	6839      	ldr	r1, [r7, #0]
+ 8011bec:	6878      	ldr	r0, [r7, #4]
+ 8011bee:	f7ff ffa1 	bl	8011b34 <pbuf_cat>
+  /* t is now referenced by h */
+  pbuf_ref(t);
+ 8011bf2:	6838      	ldr	r0, [r7, #0]
+ 8011bf4:	f7ff ff76 	bl	8011ae4 <pbuf_ref>
+  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t));
+}
+ 8011bf8:	bf00      	nop
+ 8011bfa:	3708      	adds	r7, #8
+ 8011bfc:	46bd      	mov	sp, r7
+ 8011bfe:	bd80      	pop	{r7, pc}
+
+08011c00 <pbuf_copy>:
+ *         ERR_ARG if one of the pbufs is NULL or p_to is not big
+ *                 enough to hold p_from
+ */
+err_t
+pbuf_copy(struct pbuf *p_to, const struct pbuf *p_from)
+{
+ 8011c00:	b580      	push	{r7, lr}
+ 8011c02:	b086      	sub	sp, #24
+ 8011c04:	af00      	add	r7, sp, #0
+ 8011c06:	6078      	str	r0, [r7, #4]
+ 8011c08:	6039      	str	r1, [r7, #0]
+  size_t offset_to = 0, offset_from = 0, len;
+ 8011c0a:	2300      	movs	r3, #0
+ 8011c0c:	617b      	str	r3, [r7, #20]
+ 8011c0e:	2300      	movs	r3, #0
+ 8011c10:	613b      	str	r3, [r7, #16]
+
+  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n",
+              (const void *)p_to, (const void *)p_from));
+
+  /* is the target big enough to hold the source? */
+  LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) &&
+ 8011c12:	687b      	ldr	r3, [r7, #4]
+ 8011c14:	2b00      	cmp	r3, #0
+ 8011c16:	d008      	beq.n	8011c2a <pbuf_copy+0x2a>
+ 8011c18:	683b      	ldr	r3, [r7, #0]
+ 8011c1a:	2b00      	cmp	r3, #0
+ 8011c1c:	d005      	beq.n	8011c2a <pbuf_copy+0x2a>
+ 8011c1e:	687b      	ldr	r3, [r7, #4]
+ 8011c20:	891a      	ldrh	r2, [r3, #8]
+ 8011c22:	683b      	ldr	r3, [r7, #0]
+ 8011c24:	891b      	ldrh	r3, [r3, #8]
+ 8011c26:	429a      	cmp	r2, r3
+ 8011c28:	d209      	bcs.n	8011c3e <pbuf_copy+0x3e>
+ 8011c2a:	4b57      	ldr	r3, [pc, #348]	; (8011d88 <pbuf_copy+0x188>)
+ 8011c2c:	f240 32ca 	movw	r2, #970	; 0x3ca
+ 8011c30:	4956      	ldr	r1, [pc, #344]	; (8011d8c <pbuf_copy+0x18c>)
+ 8011c32:	4857      	ldr	r0, [pc, #348]	; (8011d90 <pbuf_copy+0x190>)
+ 8011c34:	f00a fbe0 	bl	801c3f8 <iprintf>
+ 8011c38:	f06f 030f 	mvn.w	r3, #15
+ 8011c3c:	e09f      	b.n	8011d7e <pbuf_copy+0x17e>
+             (p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;);
+
+  /* iterate through pbuf chain */
+  do {
+    /* copy one part of the original chain */
+    if ((p_to->len - offset_to) >= (p_from->len - offset_from)) {
+ 8011c3e:	687b      	ldr	r3, [r7, #4]
+ 8011c40:	895b      	ldrh	r3, [r3, #10]
+ 8011c42:	461a      	mov	r2, r3
+ 8011c44:	697b      	ldr	r3, [r7, #20]
+ 8011c46:	1ad2      	subs	r2, r2, r3
+ 8011c48:	683b      	ldr	r3, [r7, #0]
+ 8011c4a:	895b      	ldrh	r3, [r3, #10]
+ 8011c4c:	4619      	mov	r1, r3
+ 8011c4e:	693b      	ldr	r3, [r7, #16]
+ 8011c50:	1acb      	subs	r3, r1, r3
+ 8011c52:	429a      	cmp	r2, r3
+ 8011c54:	d306      	bcc.n	8011c64 <pbuf_copy+0x64>
+      /* complete current p_from fits into current p_to */
+      len = p_from->len - offset_from;
+ 8011c56:	683b      	ldr	r3, [r7, #0]
+ 8011c58:	895b      	ldrh	r3, [r3, #10]
+ 8011c5a:	461a      	mov	r2, r3
+ 8011c5c:	693b      	ldr	r3, [r7, #16]
+ 8011c5e:	1ad3      	subs	r3, r2, r3
+ 8011c60:	60fb      	str	r3, [r7, #12]
+ 8011c62:	e005      	b.n	8011c70 <pbuf_copy+0x70>
+    } else {
+      /* current p_from does not fit into current p_to */
+      len = p_to->len - offset_to;
+ 8011c64:	687b      	ldr	r3, [r7, #4]
+ 8011c66:	895b      	ldrh	r3, [r3, #10]
+ 8011c68:	461a      	mov	r2, r3
+ 8011c6a:	697b      	ldr	r3, [r7, #20]
+ 8011c6c:	1ad3      	subs	r3, r2, r3
+ 8011c6e:	60fb      	str	r3, [r7, #12]
+    }
+    MEMCPY((u8_t *)p_to->payload + offset_to, (u8_t *)p_from->payload + offset_from, len);
+ 8011c70:	687b      	ldr	r3, [r7, #4]
+ 8011c72:	685a      	ldr	r2, [r3, #4]
+ 8011c74:	697b      	ldr	r3, [r7, #20]
+ 8011c76:	18d0      	adds	r0, r2, r3
+ 8011c78:	683b      	ldr	r3, [r7, #0]
+ 8011c7a:	685a      	ldr	r2, [r3, #4]
+ 8011c7c:	693b      	ldr	r3, [r7, #16]
+ 8011c7e:	4413      	add	r3, r2
+ 8011c80:	68fa      	ldr	r2, [r7, #12]
+ 8011c82:	4619      	mov	r1, r3
+ 8011c84:	f00a fb8b 	bl	801c39e <memcpy>
+    offset_to += len;
+ 8011c88:	697a      	ldr	r2, [r7, #20]
+ 8011c8a:	68fb      	ldr	r3, [r7, #12]
+ 8011c8c:	4413      	add	r3, r2
+ 8011c8e:	617b      	str	r3, [r7, #20]
+    offset_from += len;
+ 8011c90:	693a      	ldr	r2, [r7, #16]
+ 8011c92:	68fb      	ldr	r3, [r7, #12]
+ 8011c94:	4413      	add	r3, r2
+ 8011c96:	613b      	str	r3, [r7, #16]
+    LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len);
+ 8011c98:	687b      	ldr	r3, [r7, #4]
+ 8011c9a:	895b      	ldrh	r3, [r3, #10]
+ 8011c9c:	461a      	mov	r2, r3
+ 8011c9e:	697b      	ldr	r3, [r7, #20]
+ 8011ca0:	4293      	cmp	r3, r2
+ 8011ca2:	d906      	bls.n	8011cb2 <pbuf_copy+0xb2>
+ 8011ca4:	4b38      	ldr	r3, [pc, #224]	; (8011d88 <pbuf_copy+0x188>)
+ 8011ca6:	f240 32d9 	movw	r2, #985	; 0x3d9
+ 8011caa:	493a      	ldr	r1, [pc, #232]	; (8011d94 <pbuf_copy+0x194>)
+ 8011cac:	4838      	ldr	r0, [pc, #224]	; (8011d90 <pbuf_copy+0x190>)
+ 8011cae:	f00a fba3 	bl	801c3f8 <iprintf>
+    LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len);
+ 8011cb2:	683b      	ldr	r3, [r7, #0]
+ 8011cb4:	895b      	ldrh	r3, [r3, #10]
+ 8011cb6:	461a      	mov	r2, r3
+ 8011cb8:	693b      	ldr	r3, [r7, #16]
+ 8011cba:	4293      	cmp	r3, r2
+ 8011cbc:	d906      	bls.n	8011ccc <pbuf_copy+0xcc>
+ 8011cbe:	4b32      	ldr	r3, [pc, #200]	; (8011d88 <pbuf_copy+0x188>)
+ 8011cc0:	f240 32da 	movw	r2, #986	; 0x3da
+ 8011cc4:	4934      	ldr	r1, [pc, #208]	; (8011d98 <pbuf_copy+0x198>)
+ 8011cc6:	4832      	ldr	r0, [pc, #200]	; (8011d90 <pbuf_copy+0x190>)
+ 8011cc8:	f00a fb96 	bl	801c3f8 <iprintf>
+    if (offset_from >= p_from->len) {
+ 8011ccc:	683b      	ldr	r3, [r7, #0]
+ 8011cce:	895b      	ldrh	r3, [r3, #10]
+ 8011cd0:	461a      	mov	r2, r3
+ 8011cd2:	693b      	ldr	r3, [r7, #16]
+ 8011cd4:	4293      	cmp	r3, r2
+ 8011cd6:	d304      	bcc.n	8011ce2 <pbuf_copy+0xe2>
+      /* on to next p_from (if any) */
+      offset_from = 0;
+ 8011cd8:	2300      	movs	r3, #0
+ 8011cda:	613b      	str	r3, [r7, #16]
+      p_from = p_from->next;
+ 8011cdc:	683b      	ldr	r3, [r7, #0]
+ 8011cde:	681b      	ldr	r3, [r3, #0]
+ 8011ce0:	603b      	str	r3, [r7, #0]
+    }
+    if (offset_to == p_to->len) {
+ 8011ce2:	687b      	ldr	r3, [r7, #4]
+ 8011ce4:	895b      	ldrh	r3, [r3, #10]
+ 8011ce6:	461a      	mov	r2, r3
+ 8011ce8:	697b      	ldr	r3, [r7, #20]
+ 8011cea:	4293      	cmp	r3, r2
+ 8011cec:	d114      	bne.n	8011d18 <pbuf_copy+0x118>
+      /* on to next p_to (if any) */
+      offset_to = 0;
+ 8011cee:	2300      	movs	r3, #0
+ 8011cf0:	617b      	str	r3, [r7, #20]
+      p_to = p_to->next;
+ 8011cf2:	687b      	ldr	r3, [r7, #4]
+ 8011cf4:	681b      	ldr	r3, [r3, #0]
+ 8011cf6:	607b      	str	r3, [r7, #4]
+      LWIP_ERROR("p_to != NULL", (p_to != NULL) || (p_from == NULL), return ERR_ARG;);
+ 8011cf8:	687b      	ldr	r3, [r7, #4]
+ 8011cfa:	2b00      	cmp	r3, #0
+ 8011cfc:	d10c      	bne.n	8011d18 <pbuf_copy+0x118>
+ 8011cfe:	683b      	ldr	r3, [r7, #0]
+ 8011d00:	2b00      	cmp	r3, #0
+ 8011d02:	d009      	beq.n	8011d18 <pbuf_copy+0x118>
+ 8011d04:	4b20      	ldr	r3, [pc, #128]	; (8011d88 <pbuf_copy+0x188>)
+ 8011d06:	f44f 7279 	mov.w	r2, #996	; 0x3e4
+ 8011d0a:	4924      	ldr	r1, [pc, #144]	; (8011d9c <pbuf_copy+0x19c>)
+ 8011d0c:	4820      	ldr	r0, [pc, #128]	; (8011d90 <pbuf_copy+0x190>)
+ 8011d0e:	f00a fb73 	bl	801c3f8 <iprintf>
+ 8011d12:	f06f 030f 	mvn.w	r3, #15
+ 8011d16:	e032      	b.n	8011d7e <pbuf_copy+0x17e>
+    }
+
+    if ((p_from != NULL) && (p_from->len == p_from->tot_len)) {
+ 8011d18:	683b      	ldr	r3, [r7, #0]
+ 8011d1a:	2b00      	cmp	r3, #0
+ 8011d1c:	d013      	beq.n	8011d46 <pbuf_copy+0x146>
+ 8011d1e:	683b      	ldr	r3, [r7, #0]
+ 8011d20:	895a      	ldrh	r2, [r3, #10]
+ 8011d22:	683b      	ldr	r3, [r7, #0]
+ 8011d24:	891b      	ldrh	r3, [r3, #8]
+ 8011d26:	429a      	cmp	r2, r3
+ 8011d28:	d10d      	bne.n	8011d46 <pbuf_copy+0x146>
+      /* don't copy more than one packet! */
+      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
+ 8011d2a:	683b      	ldr	r3, [r7, #0]
+ 8011d2c:	681b      	ldr	r3, [r3, #0]
+ 8011d2e:	2b00      	cmp	r3, #0
+ 8011d30:	d009      	beq.n	8011d46 <pbuf_copy+0x146>
+ 8011d32:	4b15      	ldr	r3, [pc, #84]	; (8011d88 <pbuf_copy+0x188>)
+ 8011d34:	f240 32ea 	movw	r2, #1002	; 0x3ea
+ 8011d38:	4919      	ldr	r1, [pc, #100]	; (8011da0 <pbuf_copy+0x1a0>)
+ 8011d3a:	4815      	ldr	r0, [pc, #84]	; (8011d90 <pbuf_copy+0x190>)
+ 8011d3c:	f00a fb5c 	bl	801c3f8 <iprintf>
+ 8011d40:	f06f 0305 	mvn.w	r3, #5
+ 8011d44:	e01b      	b.n	8011d7e <pbuf_copy+0x17e>
+                 (p_from->next == NULL), return ERR_VAL;);
+    }
+    if ((p_to != NULL) && (p_to->len == p_to->tot_len)) {
+ 8011d46:	687b      	ldr	r3, [r7, #4]
+ 8011d48:	2b00      	cmp	r3, #0
+ 8011d4a:	d013      	beq.n	8011d74 <pbuf_copy+0x174>
+ 8011d4c:	687b      	ldr	r3, [r7, #4]
+ 8011d4e:	895a      	ldrh	r2, [r3, #10]
+ 8011d50:	687b      	ldr	r3, [r7, #4]
+ 8011d52:	891b      	ldrh	r3, [r3, #8]
+ 8011d54:	429a      	cmp	r2, r3
+ 8011d56:	d10d      	bne.n	8011d74 <pbuf_copy+0x174>
+      /* don't copy more than one packet! */
+      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
+ 8011d58:	687b      	ldr	r3, [r7, #4]
+ 8011d5a:	681b      	ldr	r3, [r3, #0]
+ 8011d5c:	2b00      	cmp	r3, #0
+ 8011d5e:	d009      	beq.n	8011d74 <pbuf_copy+0x174>
+ 8011d60:	4b09      	ldr	r3, [pc, #36]	; (8011d88 <pbuf_copy+0x188>)
+ 8011d62:	f240 32ef 	movw	r2, #1007	; 0x3ef
+ 8011d66:	490e      	ldr	r1, [pc, #56]	; (8011da0 <pbuf_copy+0x1a0>)
+ 8011d68:	4809      	ldr	r0, [pc, #36]	; (8011d90 <pbuf_copy+0x190>)
+ 8011d6a:	f00a fb45 	bl	801c3f8 <iprintf>
+ 8011d6e:	f06f 0305 	mvn.w	r3, #5
+ 8011d72:	e004      	b.n	8011d7e <pbuf_copy+0x17e>
+                 (p_to->next == NULL), return ERR_VAL;);
+    }
+  } while (p_from);
+ 8011d74:	683b      	ldr	r3, [r7, #0]
+ 8011d76:	2b00      	cmp	r3, #0
+ 8011d78:	f47f af61 	bne.w	8011c3e <pbuf_copy+0x3e>
+  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n"));
+  return ERR_OK;
+ 8011d7c:	2300      	movs	r3, #0
+}
+ 8011d7e:	4618      	mov	r0, r3
+ 8011d80:	3718      	adds	r7, #24
+ 8011d82:	46bd      	mov	sp, r7
+ 8011d84:	bd80      	pop	{r7, pc}
+ 8011d86:	bf00      	nop
+ 8011d88:	0801dd78 	.word	0x0801dd78
+ 8011d8c:	0801e020 	.word	0x0801e020
+ 8011d90:	0801ddd8 	.word	0x0801ddd8
+ 8011d94:	0801e050 	.word	0x0801e050
+ 8011d98:	0801e068 	.word	0x0801e068
+ 8011d9c:	0801e084 	.word	0x0801e084
+ 8011da0:	0801e094 	.word	0x0801e094
+
+08011da4 <pbuf_copy_partial>:
+ * @param offset offset into the packet buffer from where to begin copying len bytes
+ * @return the number of bytes copied, or 0 on failure
+ */
+u16_t
+pbuf_copy_partial(const struct pbuf *buf, void *dataptr, u16_t len, u16_t offset)
+{
+ 8011da4:	b580      	push	{r7, lr}
+ 8011da6:	b088      	sub	sp, #32
+ 8011da8:	af00      	add	r7, sp, #0
+ 8011daa:	60f8      	str	r0, [r7, #12]
+ 8011dac:	60b9      	str	r1, [r7, #8]
+ 8011dae:	4611      	mov	r1, r2
+ 8011db0:	461a      	mov	r2, r3
+ 8011db2:	460b      	mov	r3, r1
+ 8011db4:	80fb      	strh	r3, [r7, #6]
+ 8011db6:	4613      	mov	r3, r2
+ 8011db8:	80bb      	strh	r3, [r7, #4]
+  const struct pbuf *p;
+  u16_t left = 0;
+ 8011dba:	2300      	movs	r3, #0
+ 8011dbc:	837b      	strh	r3, [r7, #26]
+  u16_t buf_copy_len;
+  u16_t copied_total = 0;
+ 8011dbe:	2300      	movs	r3, #0
+ 8011dc0:	82fb      	strh	r3, [r7, #22]
+
+  LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;);
+ 8011dc2:	68fb      	ldr	r3, [r7, #12]
+ 8011dc4:	2b00      	cmp	r3, #0
+ 8011dc6:	d108      	bne.n	8011dda <pbuf_copy_partial+0x36>
+ 8011dc8:	4b2b      	ldr	r3, [pc, #172]	; (8011e78 <pbuf_copy_partial+0xd4>)
+ 8011dca:	f240 420a 	movw	r2, #1034	; 0x40a
+ 8011dce:	492b      	ldr	r1, [pc, #172]	; (8011e7c <pbuf_copy_partial+0xd8>)
+ 8011dd0:	482b      	ldr	r0, [pc, #172]	; (8011e80 <pbuf_copy_partial+0xdc>)
+ 8011dd2:	f00a fb11 	bl	801c3f8 <iprintf>
+ 8011dd6:	2300      	movs	r3, #0
+ 8011dd8:	e04a      	b.n	8011e70 <pbuf_copy_partial+0xcc>
+  LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;);
+ 8011dda:	68bb      	ldr	r3, [r7, #8]
+ 8011ddc:	2b00      	cmp	r3, #0
+ 8011dde:	d108      	bne.n	8011df2 <pbuf_copy_partial+0x4e>
+ 8011de0:	4b25      	ldr	r3, [pc, #148]	; (8011e78 <pbuf_copy_partial+0xd4>)
+ 8011de2:	f240 420b 	movw	r2, #1035	; 0x40b
+ 8011de6:	4927      	ldr	r1, [pc, #156]	; (8011e84 <pbuf_copy_partial+0xe0>)
+ 8011de8:	4825      	ldr	r0, [pc, #148]	; (8011e80 <pbuf_copy_partial+0xdc>)
+ 8011dea:	f00a fb05 	bl	801c3f8 <iprintf>
+ 8011dee:	2300      	movs	r3, #0
+ 8011df0:	e03e      	b.n	8011e70 <pbuf_copy_partial+0xcc>
+
+  /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */
+  for (p = buf; len != 0 && p != NULL; p = p->next) {
+ 8011df2:	68fb      	ldr	r3, [r7, #12]
+ 8011df4:	61fb      	str	r3, [r7, #28]
+ 8011df6:	e034      	b.n	8011e62 <pbuf_copy_partial+0xbe>
+    if ((offset != 0) && (offset >= p->len)) {
+ 8011df8:	88bb      	ldrh	r3, [r7, #4]
+ 8011dfa:	2b00      	cmp	r3, #0
+ 8011dfc:	d00a      	beq.n	8011e14 <pbuf_copy_partial+0x70>
+ 8011dfe:	69fb      	ldr	r3, [r7, #28]
+ 8011e00:	895b      	ldrh	r3, [r3, #10]
+ 8011e02:	88ba      	ldrh	r2, [r7, #4]
+ 8011e04:	429a      	cmp	r2, r3
+ 8011e06:	d305      	bcc.n	8011e14 <pbuf_copy_partial+0x70>
+      /* don't copy from this buffer -> on to the next */
+      offset = (u16_t)(offset - p->len);
+ 8011e08:	69fb      	ldr	r3, [r7, #28]
+ 8011e0a:	895b      	ldrh	r3, [r3, #10]
+ 8011e0c:	88ba      	ldrh	r2, [r7, #4]
+ 8011e0e:	1ad3      	subs	r3, r2, r3
+ 8011e10:	80bb      	strh	r3, [r7, #4]
+ 8011e12:	e023      	b.n	8011e5c <pbuf_copy_partial+0xb8>
+    } else {
+      /* copy from this buffer. maybe only partially. */
+      buf_copy_len = (u16_t)(p->len - offset);
+ 8011e14:	69fb      	ldr	r3, [r7, #28]
+ 8011e16:	895a      	ldrh	r2, [r3, #10]
+ 8011e18:	88bb      	ldrh	r3, [r7, #4]
+ 8011e1a:	1ad3      	subs	r3, r2, r3
+ 8011e1c:	833b      	strh	r3, [r7, #24]
+      if (buf_copy_len > len) {
+ 8011e1e:	8b3a      	ldrh	r2, [r7, #24]
+ 8011e20:	88fb      	ldrh	r3, [r7, #6]
+ 8011e22:	429a      	cmp	r2, r3
+ 8011e24:	d901      	bls.n	8011e2a <pbuf_copy_partial+0x86>
+        buf_copy_len = len;
+ 8011e26:	88fb      	ldrh	r3, [r7, #6]
+ 8011e28:	833b      	strh	r3, [r7, #24]
+      }
+      /* copy the necessary parts of the buffer */
+      MEMCPY(&((char *)dataptr)[left], &((char *)p->payload)[offset], buf_copy_len);
+ 8011e2a:	8b7b      	ldrh	r3, [r7, #26]
+ 8011e2c:	68ba      	ldr	r2, [r7, #8]
+ 8011e2e:	18d0      	adds	r0, r2, r3
+ 8011e30:	69fb      	ldr	r3, [r7, #28]
+ 8011e32:	685a      	ldr	r2, [r3, #4]
+ 8011e34:	88bb      	ldrh	r3, [r7, #4]
+ 8011e36:	4413      	add	r3, r2
+ 8011e38:	8b3a      	ldrh	r2, [r7, #24]
+ 8011e3a:	4619      	mov	r1, r3
+ 8011e3c:	f00a faaf 	bl	801c39e <memcpy>
+      copied_total = (u16_t)(copied_total + buf_copy_len);
+ 8011e40:	8afa      	ldrh	r2, [r7, #22]
+ 8011e42:	8b3b      	ldrh	r3, [r7, #24]
+ 8011e44:	4413      	add	r3, r2
+ 8011e46:	82fb      	strh	r3, [r7, #22]
+      left = (u16_t)(left + buf_copy_len);
+ 8011e48:	8b7a      	ldrh	r2, [r7, #26]
+ 8011e4a:	8b3b      	ldrh	r3, [r7, #24]
+ 8011e4c:	4413      	add	r3, r2
+ 8011e4e:	837b      	strh	r3, [r7, #26]
+      len = (u16_t)(len - buf_copy_len);
+ 8011e50:	88fa      	ldrh	r2, [r7, #6]
+ 8011e52:	8b3b      	ldrh	r3, [r7, #24]
+ 8011e54:	1ad3      	subs	r3, r2, r3
+ 8011e56:	80fb      	strh	r3, [r7, #6]
+      offset = 0;
+ 8011e58:	2300      	movs	r3, #0
+ 8011e5a:	80bb      	strh	r3, [r7, #4]
+  for (p = buf; len != 0 && p != NULL; p = p->next) {
+ 8011e5c:	69fb      	ldr	r3, [r7, #28]
+ 8011e5e:	681b      	ldr	r3, [r3, #0]
+ 8011e60:	61fb      	str	r3, [r7, #28]
+ 8011e62:	88fb      	ldrh	r3, [r7, #6]
+ 8011e64:	2b00      	cmp	r3, #0
+ 8011e66:	d002      	beq.n	8011e6e <pbuf_copy_partial+0xca>
+ 8011e68:	69fb      	ldr	r3, [r7, #28]
+ 8011e6a:	2b00      	cmp	r3, #0
+ 8011e6c:	d1c4      	bne.n	8011df8 <pbuf_copy_partial+0x54>
+    }
+  }
+  return copied_total;
+ 8011e6e:	8afb      	ldrh	r3, [r7, #22]
+}
+ 8011e70:	4618      	mov	r0, r3
+ 8011e72:	3720      	adds	r7, #32
+ 8011e74:	46bd      	mov	sp, r7
+ 8011e76:	bd80      	pop	{r7, pc}
+ 8011e78:	0801dd78 	.word	0x0801dd78
+ 8011e7c:	0801e0c0 	.word	0x0801e0c0
+ 8011e80:	0801ddd8 	.word	0x0801ddd8
+ 8011e84:	0801e0e0 	.word	0x0801e0e0
+
+08011e88 <pbuf_clone>:
+ *
+ * @return a new pbuf or NULL if allocation fails
+ */
+struct pbuf *
+pbuf_clone(pbuf_layer layer, pbuf_type type, struct pbuf *p)
+{
+ 8011e88:	b580      	push	{r7, lr}
+ 8011e8a:	b084      	sub	sp, #16
+ 8011e8c:	af00      	add	r7, sp, #0
+ 8011e8e:	4603      	mov	r3, r0
+ 8011e90:	603a      	str	r2, [r7, #0]
+ 8011e92:	71fb      	strb	r3, [r7, #7]
+ 8011e94:	460b      	mov	r3, r1
+ 8011e96:	80bb      	strh	r3, [r7, #4]
+  struct pbuf *q;
+  err_t err;
+  q = pbuf_alloc(layer, p->tot_len, type);
+ 8011e98:	683b      	ldr	r3, [r7, #0]
+ 8011e9a:	8919      	ldrh	r1, [r3, #8]
+ 8011e9c:	88ba      	ldrh	r2, [r7, #4]
+ 8011e9e:	79fb      	ldrb	r3, [r7, #7]
+ 8011ea0:	4618      	mov	r0, r3
+ 8011ea2:	f7ff fa99 	bl	80113d8 <pbuf_alloc>
+ 8011ea6:	60f8      	str	r0, [r7, #12]
+  if (q == NULL) {
+ 8011ea8:	68fb      	ldr	r3, [r7, #12]
+ 8011eaa:	2b00      	cmp	r3, #0
+ 8011eac:	d101      	bne.n	8011eb2 <pbuf_clone+0x2a>
+    return NULL;
+ 8011eae:	2300      	movs	r3, #0
+ 8011eb0:	e011      	b.n	8011ed6 <pbuf_clone+0x4e>
+  }
+  err = pbuf_copy(q, p);
+ 8011eb2:	6839      	ldr	r1, [r7, #0]
+ 8011eb4:	68f8      	ldr	r0, [r7, #12]
+ 8011eb6:	f7ff fea3 	bl	8011c00 <pbuf_copy>
+ 8011eba:	4603      	mov	r3, r0
+ 8011ebc:	72fb      	strb	r3, [r7, #11]
+  LWIP_UNUSED_ARG(err); /* in case of LWIP_NOASSERT */
+  LWIP_ASSERT("pbuf_copy failed", err == ERR_OK);
+ 8011ebe:	f997 300b 	ldrsb.w	r3, [r7, #11]
+ 8011ec2:	2b00      	cmp	r3, #0
+ 8011ec4:	d006      	beq.n	8011ed4 <pbuf_clone+0x4c>
+ 8011ec6:	4b06      	ldr	r3, [pc, #24]	; (8011ee0 <pbuf_clone+0x58>)
+ 8011ec8:	f240 5224 	movw	r2, #1316	; 0x524
+ 8011ecc:	4905      	ldr	r1, [pc, #20]	; (8011ee4 <pbuf_clone+0x5c>)
+ 8011ece:	4806      	ldr	r0, [pc, #24]	; (8011ee8 <pbuf_clone+0x60>)
+ 8011ed0:	f00a fa92 	bl	801c3f8 <iprintf>
+  return q;
+ 8011ed4:	68fb      	ldr	r3, [r7, #12]
+}
+ 8011ed6:	4618      	mov	r0, r3
+ 8011ed8:	3710      	adds	r7, #16
+ 8011eda:	46bd      	mov	sp, r7
+ 8011edc:	bd80      	pop	{r7, pc}
+ 8011ede:	bf00      	nop
+ 8011ee0:	0801dd78 	.word	0x0801dd78
+ 8011ee4:	0801e1ec 	.word	0x0801e1ec
+ 8011ee8:	0801ddd8 	.word	0x0801ddd8
+
+08011eec <tcp_init>:
+/**
+ * Initialize this module.
+ */
+void
+tcp_init(void)
+{
+ 8011eec:	b580      	push	{r7, lr}
+ 8011eee:	af00      	add	r7, sp, #0
+#ifdef LWIP_RAND
+  tcp_port = TCP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
+ 8011ef0:	f00a fa9a 	bl	801c428 <rand>
+ 8011ef4:	4603      	mov	r3, r0
+ 8011ef6:	b29b      	uxth	r3, r3
+ 8011ef8:	f3c3 030d 	ubfx	r3, r3, #0, #14
+ 8011efc:	b29b      	uxth	r3, r3
+ 8011efe:	f5a3 4380 	sub.w	r3, r3, #16384	; 0x4000
+ 8011f02:	b29a      	uxth	r2, r3
+ 8011f04:	4b01      	ldr	r3, [pc, #4]	; (8011f0c <tcp_init+0x20>)
+ 8011f06:	801a      	strh	r2, [r3, #0]
+#endif /* LWIP_RAND */
+}
+ 8011f08:	bf00      	nop
+ 8011f0a:	bd80      	pop	{r7, pc}
+ 8011f0c:	20000060 	.word	0x20000060
+
+08011f10 <tcp_free>:
+
+/** Free a tcp pcb */
+void
+tcp_free(struct tcp_pcb *pcb)
+{
+ 8011f10:	b580      	push	{r7, lr}
+ 8011f12:	b082      	sub	sp, #8
+ 8011f14:	af00      	add	r7, sp, #0
+ 8011f16:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT("tcp_free: LISTEN", pcb->state != LISTEN);
+ 8011f18:	687b      	ldr	r3, [r7, #4]
+ 8011f1a:	7d1b      	ldrb	r3, [r3, #20]
+ 8011f1c:	2b01      	cmp	r3, #1
+ 8011f1e:	d105      	bne.n	8011f2c <tcp_free+0x1c>
+ 8011f20:	4b06      	ldr	r3, [pc, #24]	; (8011f3c <tcp_free+0x2c>)
+ 8011f22:	22d4      	movs	r2, #212	; 0xd4
+ 8011f24:	4906      	ldr	r1, [pc, #24]	; (8011f40 <tcp_free+0x30>)
+ 8011f26:	4807      	ldr	r0, [pc, #28]	; (8011f44 <tcp_free+0x34>)
+ 8011f28:	f00a fa66 	bl	801c3f8 <iprintf>
+#if LWIP_TCP_PCB_NUM_EXT_ARGS
+  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
+#endif
+  memp_free(MEMP_TCP_PCB, pcb);
+ 8011f2c:	6879      	ldr	r1, [r7, #4]
+ 8011f2e:	2001      	movs	r0, #1
+ 8011f30:	f7fe fe86 	bl	8010c40 <memp_free>
+}
+ 8011f34:	bf00      	nop
+ 8011f36:	3708      	adds	r7, #8
+ 8011f38:	46bd      	mov	sp, r7
+ 8011f3a:	bd80      	pop	{r7, pc}
+ 8011f3c:	0801e278 	.word	0x0801e278
+ 8011f40:	0801e2a8 	.word	0x0801e2a8
+ 8011f44:	0801e2bc 	.word	0x0801e2bc
+
+08011f48 <tcp_free_listen>:
+
+/** Free a tcp listen pcb */
+static void
+tcp_free_listen(struct tcp_pcb *pcb)
+{
+ 8011f48:	b580      	push	{r7, lr}
+ 8011f4a:	b082      	sub	sp, #8
+ 8011f4c:	af00      	add	r7, sp, #0
+ 8011f4e:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT("tcp_free_listen: !LISTEN", pcb->state != LISTEN);
+ 8011f50:	687b      	ldr	r3, [r7, #4]
+ 8011f52:	7d1b      	ldrb	r3, [r3, #20]
+ 8011f54:	2b01      	cmp	r3, #1
+ 8011f56:	d105      	bne.n	8011f64 <tcp_free_listen+0x1c>
+ 8011f58:	4b06      	ldr	r3, [pc, #24]	; (8011f74 <tcp_free_listen+0x2c>)
+ 8011f5a:	22df      	movs	r2, #223	; 0xdf
+ 8011f5c:	4906      	ldr	r1, [pc, #24]	; (8011f78 <tcp_free_listen+0x30>)
+ 8011f5e:	4807      	ldr	r0, [pc, #28]	; (8011f7c <tcp_free_listen+0x34>)
+ 8011f60:	f00a fa4a 	bl	801c3f8 <iprintf>
+#if LWIP_TCP_PCB_NUM_EXT_ARGS
+  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
+#endif
+  memp_free(MEMP_TCP_PCB_LISTEN, pcb);
+ 8011f64:	6879      	ldr	r1, [r7, #4]
+ 8011f66:	2002      	movs	r0, #2
+ 8011f68:	f7fe fe6a 	bl	8010c40 <memp_free>
+}
+ 8011f6c:	bf00      	nop
+ 8011f6e:	3708      	adds	r7, #8
+ 8011f70:	46bd      	mov	sp, r7
+ 8011f72:	bd80      	pop	{r7, pc}
+ 8011f74:	0801e278 	.word	0x0801e278
+ 8011f78:	0801e2e4 	.word	0x0801e2e4
+ 8011f7c:	0801e2bc 	.word	0x0801e2bc
+
+08011f80 <tcp_tmr>:
+/**
+ * Called periodically to dispatch TCP timers.
+ */
+void
+tcp_tmr(void)
+{
+ 8011f80:	b580      	push	{r7, lr}
+ 8011f82:	af00      	add	r7, sp, #0
+  /* Call tcp_fasttmr() every 250 ms */
+  tcp_fasttmr();
+ 8011f84:	f000 fe98 	bl	8012cb8 <tcp_fasttmr>
+
+  if (++tcp_timer & 1) {
+ 8011f88:	4b07      	ldr	r3, [pc, #28]	; (8011fa8 <tcp_tmr+0x28>)
+ 8011f8a:	781b      	ldrb	r3, [r3, #0]
+ 8011f8c:	3301      	adds	r3, #1
+ 8011f8e:	b2da      	uxtb	r2, r3
+ 8011f90:	4b05      	ldr	r3, [pc, #20]	; (8011fa8 <tcp_tmr+0x28>)
+ 8011f92:	701a      	strb	r2, [r3, #0]
+ 8011f94:	4b04      	ldr	r3, [pc, #16]	; (8011fa8 <tcp_tmr+0x28>)
+ 8011f96:	781b      	ldrb	r3, [r3, #0]
+ 8011f98:	f003 0301 	and.w	r3, r3, #1
+ 8011f9c:	2b00      	cmp	r3, #0
+ 8011f9e:	d001      	beq.n	8011fa4 <tcp_tmr+0x24>
+    /* Call tcp_slowtmr() every 500 ms, i.e., every other timer
+       tcp_tmr() is called. */
+    tcp_slowtmr();
+ 8011fa0:	f000 fb4c 	bl	801263c <tcp_slowtmr>
+  }
+}
+ 8011fa4:	bf00      	nop
+ 8011fa6:	bd80      	pop	{r7, pc}
+ 8011fa8:	20008715 	.word	0x20008715
+
+08011fac <tcp_remove_listener>:
+/** Called when a listen pcb is closed. Iterates one pcb list and removes the
+ * closed listener pcb from pcb->listener if matching.
+ */
+static void
+tcp_remove_listener(struct tcp_pcb *list, struct tcp_pcb_listen *lpcb)
+{
+ 8011fac:	b580      	push	{r7, lr}
+ 8011fae:	b084      	sub	sp, #16
+ 8011fb0:	af00      	add	r7, sp, #0
+ 8011fb2:	6078      	str	r0, [r7, #4]
+ 8011fb4:	6039      	str	r1, [r7, #0]
+  struct tcp_pcb *pcb;
+
+  LWIP_ASSERT("tcp_remove_listener: invalid listener", lpcb != NULL);
+ 8011fb6:	683b      	ldr	r3, [r7, #0]
+ 8011fb8:	2b00      	cmp	r3, #0
+ 8011fba:	d105      	bne.n	8011fc8 <tcp_remove_listener+0x1c>
+ 8011fbc:	4b0d      	ldr	r3, [pc, #52]	; (8011ff4 <tcp_remove_listener+0x48>)
+ 8011fbe:	22ff      	movs	r2, #255	; 0xff
+ 8011fc0:	490d      	ldr	r1, [pc, #52]	; (8011ff8 <tcp_remove_listener+0x4c>)
+ 8011fc2:	480e      	ldr	r0, [pc, #56]	; (8011ffc <tcp_remove_listener+0x50>)
+ 8011fc4:	f00a fa18 	bl	801c3f8 <iprintf>
+
+  for (pcb = list; pcb != NULL; pcb = pcb->next) {
+ 8011fc8:	687b      	ldr	r3, [r7, #4]
+ 8011fca:	60fb      	str	r3, [r7, #12]
+ 8011fcc:	e00a      	b.n	8011fe4 <tcp_remove_listener+0x38>
+    if (pcb->listener == lpcb) {
+ 8011fce:	68fb      	ldr	r3, [r7, #12]
+ 8011fd0:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
+ 8011fd2:	683a      	ldr	r2, [r7, #0]
+ 8011fd4:	429a      	cmp	r2, r3
+ 8011fd6:	d102      	bne.n	8011fde <tcp_remove_listener+0x32>
+      pcb->listener = NULL;
+ 8011fd8:	68fb      	ldr	r3, [r7, #12]
+ 8011fda:	2200      	movs	r2, #0
+ 8011fdc:	67da      	str	r2, [r3, #124]	; 0x7c
+  for (pcb = list; pcb != NULL; pcb = pcb->next) {
+ 8011fde:	68fb      	ldr	r3, [r7, #12]
+ 8011fe0:	68db      	ldr	r3, [r3, #12]
+ 8011fe2:	60fb      	str	r3, [r7, #12]
+ 8011fe4:	68fb      	ldr	r3, [r7, #12]
+ 8011fe6:	2b00      	cmp	r3, #0
+ 8011fe8:	d1f1      	bne.n	8011fce <tcp_remove_listener+0x22>
+    }
+  }
+}
+ 8011fea:	bf00      	nop
+ 8011fec:	3710      	adds	r7, #16
+ 8011fee:	46bd      	mov	sp, r7
+ 8011ff0:	bd80      	pop	{r7, pc}
+ 8011ff2:	bf00      	nop
+ 8011ff4:	0801e278 	.word	0x0801e278
+ 8011ff8:	0801e300 	.word	0x0801e300
+ 8011ffc:	0801e2bc 	.word	0x0801e2bc
+
+08012000 <tcp_listen_closed>:
+/** Called when a listen pcb is closed. Iterates all pcb lists and removes the
+ * closed listener pcb from pcb->listener if matching.
+ */
+static void
+tcp_listen_closed(struct tcp_pcb *pcb)
+{
+ 8012000:	b580      	push	{r7, lr}
+ 8012002:	b084      	sub	sp, #16
+ 8012004:	af00      	add	r7, sp, #0
+ 8012006:	6078      	str	r0, [r7, #4]
+#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
+  size_t i;
+  LWIP_ASSERT("pcb != NULL", pcb != NULL);
+ 8012008:	687b      	ldr	r3, [r7, #4]
+ 801200a:	2b00      	cmp	r3, #0
+ 801200c:	d106      	bne.n	801201c <tcp_listen_closed+0x1c>
+ 801200e:	4b14      	ldr	r3, [pc, #80]	; (8012060 <tcp_listen_closed+0x60>)
+ 8012010:	f240 1211 	movw	r2, #273	; 0x111
+ 8012014:	4913      	ldr	r1, [pc, #76]	; (8012064 <tcp_listen_closed+0x64>)
+ 8012016:	4814      	ldr	r0, [pc, #80]	; (8012068 <tcp_listen_closed+0x68>)
+ 8012018:	f00a f9ee 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("pcb->state == LISTEN", pcb->state == LISTEN);
+ 801201c:	687b      	ldr	r3, [r7, #4]
+ 801201e:	7d1b      	ldrb	r3, [r3, #20]
+ 8012020:	2b01      	cmp	r3, #1
+ 8012022:	d006      	beq.n	8012032 <tcp_listen_closed+0x32>
+ 8012024:	4b0e      	ldr	r3, [pc, #56]	; (8012060 <tcp_listen_closed+0x60>)
+ 8012026:	f44f 7289 	mov.w	r2, #274	; 0x112
+ 801202a:	4910      	ldr	r1, [pc, #64]	; (801206c <tcp_listen_closed+0x6c>)
+ 801202c:	480e      	ldr	r0, [pc, #56]	; (8012068 <tcp_listen_closed+0x68>)
+ 801202e:	f00a f9e3 	bl	801c3f8 <iprintf>
+  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
+ 8012032:	2301      	movs	r3, #1
+ 8012034:	60fb      	str	r3, [r7, #12]
+ 8012036:	e00b      	b.n	8012050 <tcp_listen_closed+0x50>
+    tcp_remove_listener(*tcp_pcb_lists[i], (struct tcp_pcb_listen *)pcb);
+ 8012038:	4a0d      	ldr	r2, [pc, #52]	; (8012070 <tcp_listen_closed+0x70>)
+ 801203a:	68fb      	ldr	r3, [r7, #12]
+ 801203c:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8012040:	681b      	ldr	r3, [r3, #0]
+ 8012042:	6879      	ldr	r1, [r7, #4]
+ 8012044:	4618      	mov	r0, r3
+ 8012046:	f7ff ffb1 	bl	8011fac <tcp_remove_listener>
+  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
+ 801204a:	68fb      	ldr	r3, [r7, #12]
+ 801204c:	3301      	adds	r3, #1
+ 801204e:	60fb      	str	r3, [r7, #12]
+ 8012050:	68fb      	ldr	r3, [r7, #12]
+ 8012052:	2b03      	cmp	r3, #3
+ 8012054:	d9f0      	bls.n	8012038 <tcp_listen_closed+0x38>
+  }
+#endif
+  LWIP_UNUSED_ARG(pcb);
+}
+ 8012056:	bf00      	nop
+ 8012058:	3710      	adds	r7, #16
+ 801205a:	46bd      	mov	sp, r7
+ 801205c:	bd80      	pop	{r7, pc}
+ 801205e:	bf00      	nop
+ 8012060:	0801e278 	.word	0x0801e278
+ 8012064:	0801e328 	.word	0x0801e328
+ 8012068:	0801e2bc 	.word	0x0801e2bc
+ 801206c:	0801e334 	.word	0x0801e334
+ 8012070:	08022560 	.word	0x08022560
+
+08012074 <tcp_close_shutdown>:
+ * @return ERR_OK if connection has been closed
+ *         another err_t if closing failed and pcb is not freed
+ */
+static err_t
+tcp_close_shutdown(struct tcp_pcb *pcb, u8_t rst_on_unacked_data)
+{
+ 8012074:	b5b0      	push	{r4, r5, r7, lr}
+ 8012076:	b088      	sub	sp, #32
+ 8012078:	af04      	add	r7, sp, #16
+ 801207a:	6078      	str	r0, [r7, #4]
+ 801207c:	460b      	mov	r3, r1
+ 801207e:	70fb      	strb	r3, [r7, #3]
+  LWIP_ASSERT("tcp_close_shutdown: invalid pcb", pcb != NULL);
+ 8012080:	687b      	ldr	r3, [r7, #4]
+ 8012082:	2b00      	cmp	r3, #0
+ 8012084:	d106      	bne.n	8012094 <tcp_close_shutdown+0x20>
+ 8012086:	4b61      	ldr	r3, [pc, #388]	; (801220c <tcp_close_shutdown+0x198>)
+ 8012088:	f44f 72af 	mov.w	r2, #350	; 0x15e
+ 801208c:	4960      	ldr	r1, [pc, #384]	; (8012210 <tcp_close_shutdown+0x19c>)
+ 801208e:	4861      	ldr	r0, [pc, #388]	; (8012214 <tcp_close_shutdown+0x1a0>)
+ 8012090:	f00a f9b2 	bl	801c3f8 <iprintf>
+
+  if (rst_on_unacked_data && ((pcb->state == ESTABLISHED) || (pcb->state == CLOSE_WAIT))) {
+ 8012094:	78fb      	ldrb	r3, [r7, #3]
+ 8012096:	2b00      	cmp	r3, #0
+ 8012098:	d066      	beq.n	8012168 <tcp_close_shutdown+0xf4>
+ 801209a:	687b      	ldr	r3, [r7, #4]
+ 801209c:	7d1b      	ldrb	r3, [r3, #20]
+ 801209e:	2b04      	cmp	r3, #4
+ 80120a0:	d003      	beq.n	80120aa <tcp_close_shutdown+0x36>
+ 80120a2:	687b      	ldr	r3, [r7, #4]
+ 80120a4:	7d1b      	ldrb	r3, [r3, #20]
+ 80120a6:	2b07      	cmp	r3, #7
+ 80120a8:	d15e      	bne.n	8012168 <tcp_close_shutdown+0xf4>
+    if ((pcb->refused_data != NULL) || (pcb->rcv_wnd != TCP_WND_MAX(pcb))) {
+ 80120aa:	687b      	ldr	r3, [r7, #4]
+ 80120ac:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 80120ae:	2b00      	cmp	r3, #0
+ 80120b0:	d104      	bne.n	80120bc <tcp_close_shutdown+0x48>
+ 80120b2:	687b      	ldr	r3, [r7, #4]
+ 80120b4:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 80120b6:	f5b3 6f06 	cmp.w	r3, #2144	; 0x860
+ 80120ba:	d055      	beq.n	8012168 <tcp_close_shutdown+0xf4>
+      /* Not all data received by application, send RST to tell the remote
+         side about this. */
+      LWIP_ASSERT("pcb->flags & TF_RXCLOSED", pcb->flags & TF_RXCLOSED);
+ 80120bc:	687b      	ldr	r3, [r7, #4]
+ 80120be:	8b5b      	ldrh	r3, [r3, #26]
+ 80120c0:	f003 0310 	and.w	r3, r3, #16
+ 80120c4:	2b00      	cmp	r3, #0
+ 80120c6:	d106      	bne.n	80120d6 <tcp_close_shutdown+0x62>
+ 80120c8:	4b50      	ldr	r3, [pc, #320]	; (801220c <tcp_close_shutdown+0x198>)
+ 80120ca:	f44f 72b2 	mov.w	r2, #356	; 0x164
+ 80120ce:	4952      	ldr	r1, [pc, #328]	; (8012218 <tcp_close_shutdown+0x1a4>)
+ 80120d0:	4850      	ldr	r0, [pc, #320]	; (8012214 <tcp_close_shutdown+0x1a0>)
+ 80120d2:	f00a f991 	bl	801c3f8 <iprintf>
+
+      /* don't call tcp_abort here: we must not deallocate the pcb since
+         that might not be expected when calling tcp_close */
+      tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
+ 80120d6:	687b      	ldr	r3, [r7, #4]
+ 80120d8:	6d18      	ldr	r0, [r3, #80]	; 0x50
+ 80120da:	687b      	ldr	r3, [r7, #4]
+ 80120dc:	6a5c      	ldr	r4, [r3, #36]	; 0x24
+ 80120de:	687d      	ldr	r5, [r7, #4]
+ 80120e0:	687b      	ldr	r3, [r7, #4]
+ 80120e2:	3304      	adds	r3, #4
+ 80120e4:	687a      	ldr	r2, [r7, #4]
+ 80120e6:	8ad2      	ldrh	r2, [r2, #22]
+ 80120e8:	6879      	ldr	r1, [r7, #4]
+ 80120ea:	8b09      	ldrh	r1, [r1, #24]
+ 80120ec:	9102      	str	r1, [sp, #8]
+ 80120ee:	9201      	str	r2, [sp, #4]
+ 80120f0:	9300      	str	r3, [sp, #0]
+ 80120f2:	462b      	mov	r3, r5
+ 80120f4:	4622      	mov	r2, r4
+ 80120f6:	4601      	mov	r1, r0
+ 80120f8:	6878      	ldr	r0, [r7, #4]
+ 80120fa:	f004 fe91 	bl	8016e20 <tcp_rst>
+              pcb->local_port, pcb->remote_port);
+
+      tcp_pcb_purge(pcb);
+ 80120fe:	6878      	ldr	r0, [r7, #4]
+ 8012100:	f001 f8ba 	bl	8013278 <tcp_pcb_purge>
+      TCP_RMV_ACTIVE(pcb);
+ 8012104:	4b45      	ldr	r3, [pc, #276]	; (801221c <tcp_close_shutdown+0x1a8>)
+ 8012106:	681b      	ldr	r3, [r3, #0]
+ 8012108:	687a      	ldr	r2, [r7, #4]
+ 801210a:	429a      	cmp	r2, r3
+ 801210c:	d105      	bne.n	801211a <tcp_close_shutdown+0xa6>
+ 801210e:	4b43      	ldr	r3, [pc, #268]	; (801221c <tcp_close_shutdown+0x1a8>)
+ 8012110:	681b      	ldr	r3, [r3, #0]
+ 8012112:	68db      	ldr	r3, [r3, #12]
+ 8012114:	4a41      	ldr	r2, [pc, #260]	; (801221c <tcp_close_shutdown+0x1a8>)
+ 8012116:	6013      	str	r3, [r2, #0]
+ 8012118:	e013      	b.n	8012142 <tcp_close_shutdown+0xce>
+ 801211a:	4b40      	ldr	r3, [pc, #256]	; (801221c <tcp_close_shutdown+0x1a8>)
+ 801211c:	681b      	ldr	r3, [r3, #0]
+ 801211e:	60fb      	str	r3, [r7, #12]
+ 8012120:	e00c      	b.n	801213c <tcp_close_shutdown+0xc8>
+ 8012122:	68fb      	ldr	r3, [r7, #12]
+ 8012124:	68db      	ldr	r3, [r3, #12]
+ 8012126:	687a      	ldr	r2, [r7, #4]
+ 8012128:	429a      	cmp	r2, r3
+ 801212a:	d104      	bne.n	8012136 <tcp_close_shutdown+0xc2>
+ 801212c:	687b      	ldr	r3, [r7, #4]
+ 801212e:	68da      	ldr	r2, [r3, #12]
+ 8012130:	68fb      	ldr	r3, [r7, #12]
+ 8012132:	60da      	str	r2, [r3, #12]
+ 8012134:	e005      	b.n	8012142 <tcp_close_shutdown+0xce>
+ 8012136:	68fb      	ldr	r3, [r7, #12]
+ 8012138:	68db      	ldr	r3, [r3, #12]
+ 801213a:	60fb      	str	r3, [r7, #12]
+ 801213c:	68fb      	ldr	r3, [r7, #12]
+ 801213e:	2b00      	cmp	r3, #0
+ 8012140:	d1ef      	bne.n	8012122 <tcp_close_shutdown+0xae>
+ 8012142:	687b      	ldr	r3, [r7, #4]
+ 8012144:	2200      	movs	r2, #0
+ 8012146:	60da      	str	r2, [r3, #12]
+ 8012148:	4b35      	ldr	r3, [pc, #212]	; (8012220 <tcp_close_shutdown+0x1ac>)
+ 801214a:	2201      	movs	r2, #1
+ 801214c:	701a      	strb	r2, [r3, #0]
+      /* Deallocate the pcb since we already sent a RST for it */
+      if (tcp_input_pcb == pcb) {
+ 801214e:	4b35      	ldr	r3, [pc, #212]	; (8012224 <tcp_close_shutdown+0x1b0>)
+ 8012150:	681b      	ldr	r3, [r3, #0]
+ 8012152:	687a      	ldr	r2, [r7, #4]
+ 8012154:	429a      	cmp	r2, r3
+ 8012156:	d102      	bne.n	801215e <tcp_close_shutdown+0xea>
+        /* prevent using a deallocated pcb: free it from tcp_input later */
+        tcp_trigger_input_pcb_close();
+ 8012158:	f003 fd4c 	bl	8015bf4 <tcp_trigger_input_pcb_close>
+ 801215c:	e002      	b.n	8012164 <tcp_close_shutdown+0xf0>
+      } else {
+        tcp_free(pcb);
+ 801215e:	6878      	ldr	r0, [r7, #4]
+ 8012160:	f7ff fed6 	bl	8011f10 <tcp_free>
+      }
+      return ERR_OK;
+ 8012164:	2300      	movs	r3, #0
+ 8012166:	e04d      	b.n	8012204 <tcp_close_shutdown+0x190>
+    }
+  }
+
+  /* - states which free the pcb are handled here,
+     - states which send FIN and change state are handled in tcp_close_shutdown_fin() */
+  switch (pcb->state) {
+ 8012168:	687b      	ldr	r3, [r7, #4]
+ 801216a:	7d1b      	ldrb	r3, [r3, #20]
+ 801216c:	2b01      	cmp	r3, #1
+ 801216e:	d02d      	beq.n	80121cc <tcp_close_shutdown+0x158>
+ 8012170:	2b02      	cmp	r3, #2
+ 8012172:	d036      	beq.n	80121e2 <tcp_close_shutdown+0x16e>
+ 8012174:	2b00      	cmp	r3, #0
+ 8012176:	d13f      	bne.n	80121f8 <tcp_close_shutdown+0x184>
+       * and the user needs some way to free it should the need arise.
+       * Calling tcp_close() with a pcb that has already been closed, (i.e. twice)
+       * or for a pcb that has been used and then entered the CLOSED state
+       * is erroneous, but this should never happen as the pcb has in those cases
+       * been freed, and so any remaining handles are bogus. */
+      if (pcb->local_port != 0) {
+ 8012178:	687b      	ldr	r3, [r7, #4]
+ 801217a:	8adb      	ldrh	r3, [r3, #22]
+ 801217c:	2b00      	cmp	r3, #0
+ 801217e:	d021      	beq.n	80121c4 <tcp_close_shutdown+0x150>
+        TCP_RMV(&tcp_bound_pcbs, pcb);
+ 8012180:	4b29      	ldr	r3, [pc, #164]	; (8012228 <tcp_close_shutdown+0x1b4>)
+ 8012182:	681b      	ldr	r3, [r3, #0]
+ 8012184:	687a      	ldr	r2, [r7, #4]
+ 8012186:	429a      	cmp	r2, r3
+ 8012188:	d105      	bne.n	8012196 <tcp_close_shutdown+0x122>
+ 801218a:	4b27      	ldr	r3, [pc, #156]	; (8012228 <tcp_close_shutdown+0x1b4>)
+ 801218c:	681b      	ldr	r3, [r3, #0]
+ 801218e:	68db      	ldr	r3, [r3, #12]
+ 8012190:	4a25      	ldr	r2, [pc, #148]	; (8012228 <tcp_close_shutdown+0x1b4>)
+ 8012192:	6013      	str	r3, [r2, #0]
+ 8012194:	e013      	b.n	80121be <tcp_close_shutdown+0x14a>
+ 8012196:	4b24      	ldr	r3, [pc, #144]	; (8012228 <tcp_close_shutdown+0x1b4>)
+ 8012198:	681b      	ldr	r3, [r3, #0]
+ 801219a:	60bb      	str	r3, [r7, #8]
+ 801219c:	e00c      	b.n	80121b8 <tcp_close_shutdown+0x144>
+ 801219e:	68bb      	ldr	r3, [r7, #8]
+ 80121a0:	68db      	ldr	r3, [r3, #12]
+ 80121a2:	687a      	ldr	r2, [r7, #4]
+ 80121a4:	429a      	cmp	r2, r3
+ 80121a6:	d104      	bne.n	80121b2 <tcp_close_shutdown+0x13e>
+ 80121a8:	687b      	ldr	r3, [r7, #4]
+ 80121aa:	68da      	ldr	r2, [r3, #12]
+ 80121ac:	68bb      	ldr	r3, [r7, #8]
+ 80121ae:	60da      	str	r2, [r3, #12]
+ 80121b0:	e005      	b.n	80121be <tcp_close_shutdown+0x14a>
+ 80121b2:	68bb      	ldr	r3, [r7, #8]
+ 80121b4:	68db      	ldr	r3, [r3, #12]
+ 80121b6:	60bb      	str	r3, [r7, #8]
+ 80121b8:	68bb      	ldr	r3, [r7, #8]
+ 80121ba:	2b00      	cmp	r3, #0
+ 80121bc:	d1ef      	bne.n	801219e <tcp_close_shutdown+0x12a>
+ 80121be:	687b      	ldr	r3, [r7, #4]
+ 80121c0:	2200      	movs	r2, #0
+ 80121c2:	60da      	str	r2, [r3, #12]
+      }
+      tcp_free(pcb);
+ 80121c4:	6878      	ldr	r0, [r7, #4]
+ 80121c6:	f7ff fea3 	bl	8011f10 <tcp_free>
+      break;
+ 80121ca:	e01a      	b.n	8012202 <tcp_close_shutdown+0x18e>
+    case LISTEN:
+      tcp_listen_closed(pcb);
+ 80121cc:	6878      	ldr	r0, [r7, #4]
+ 80121ce:	f7ff ff17 	bl	8012000 <tcp_listen_closed>
+      tcp_pcb_remove(&tcp_listen_pcbs.pcbs, pcb);
+ 80121d2:	6879      	ldr	r1, [r7, #4]
+ 80121d4:	4815      	ldr	r0, [pc, #84]	; (801222c <tcp_close_shutdown+0x1b8>)
+ 80121d6:	f001 f89f 	bl	8013318 <tcp_pcb_remove>
+      tcp_free_listen(pcb);
+ 80121da:	6878      	ldr	r0, [r7, #4]
+ 80121dc:	f7ff feb4 	bl	8011f48 <tcp_free_listen>
+      break;
+ 80121e0:	e00f      	b.n	8012202 <tcp_close_shutdown+0x18e>
+    case SYN_SENT:
+      TCP_PCB_REMOVE_ACTIVE(pcb);
+ 80121e2:	6879      	ldr	r1, [r7, #4]
+ 80121e4:	480d      	ldr	r0, [pc, #52]	; (801221c <tcp_close_shutdown+0x1a8>)
+ 80121e6:	f001 f897 	bl	8013318 <tcp_pcb_remove>
+ 80121ea:	4b0d      	ldr	r3, [pc, #52]	; (8012220 <tcp_close_shutdown+0x1ac>)
+ 80121ec:	2201      	movs	r2, #1
+ 80121ee:	701a      	strb	r2, [r3, #0]
+      tcp_free(pcb);
+ 80121f0:	6878      	ldr	r0, [r7, #4]
+ 80121f2:	f7ff fe8d 	bl	8011f10 <tcp_free>
+      MIB2_STATS_INC(mib2.tcpattemptfails);
+      break;
+ 80121f6:	e004      	b.n	8012202 <tcp_close_shutdown+0x18e>
+    default:
+      return tcp_close_shutdown_fin(pcb);
+ 80121f8:	6878      	ldr	r0, [r7, #4]
+ 80121fa:	f000 f819 	bl	8012230 <tcp_close_shutdown_fin>
+ 80121fe:	4603      	mov	r3, r0
+ 8012200:	e000      	b.n	8012204 <tcp_close_shutdown+0x190>
+  }
+  return ERR_OK;
+ 8012202:	2300      	movs	r3, #0
+}
+ 8012204:	4618      	mov	r0, r3
+ 8012206:	3710      	adds	r7, #16
+ 8012208:	46bd      	mov	sp, r7
+ 801220a:	bdb0      	pop	{r4, r5, r7, pc}
+ 801220c:	0801e278 	.word	0x0801e278
+ 8012210:	0801e34c 	.word	0x0801e34c
+ 8012214:	0801e2bc 	.word	0x0801e2bc
+ 8012218:	0801e36c 	.word	0x0801e36c
+ 801221c:	2000f7e8 	.word	0x2000f7e8
+ 8012220:	2000f7e4 	.word	0x2000f7e4
+ 8012224:	2000f7fc 	.word	0x2000f7fc
+ 8012228:	2000f7f4 	.word	0x2000f7f4
+ 801222c:	2000f7f0 	.word	0x2000f7f0
+
+08012230 <tcp_close_shutdown_fin>:
+
+static err_t
+tcp_close_shutdown_fin(struct tcp_pcb *pcb)
+{
+ 8012230:	b580      	push	{r7, lr}
+ 8012232:	b084      	sub	sp, #16
+ 8012234:	af00      	add	r7, sp, #0
+ 8012236:	6078      	str	r0, [r7, #4]
+  err_t err;
+  LWIP_ASSERT("pcb != NULL", pcb != NULL);
+ 8012238:	687b      	ldr	r3, [r7, #4]
+ 801223a:	2b00      	cmp	r3, #0
+ 801223c:	d106      	bne.n	801224c <tcp_close_shutdown_fin+0x1c>
+ 801223e:	4b2c      	ldr	r3, [pc, #176]	; (80122f0 <tcp_close_shutdown_fin+0xc0>)
+ 8012240:	f44f 72ce 	mov.w	r2, #412	; 0x19c
+ 8012244:	492b      	ldr	r1, [pc, #172]	; (80122f4 <tcp_close_shutdown_fin+0xc4>)
+ 8012246:	482c      	ldr	r0, [pc, #176]	; (80122f8 <tcp_close_shutdown_fin+0xc8>)
+ 8012248:	f00a f8d6 	bl	801c3f8 <iprintf>
+
+  switch (pcb->state) {
+ 801224c:	687b      	ldr	r3, [r7, #4]
+ 801224e:	7d1b      	ldrb	r3, [r3, #20]
+ 8012250:	2b04      	cmp	r3, #4
+ 8012252:	d010      	beq.n	8012276 <tcp_close_shutdown_fin+0x46>
+ 8012254:	2b07      	cmp	r3, #7
+ 8012256:	d01b      	beq.n	8012290 <tcp_close_shutdown_fin+0x60>
+ 8012258:	2b03      	cmp	r3, #3
+ 801225a:	d126      	bne.n	80122aa <tcp_close_shutdown_fin+0x7a>
+    case SYN_RCVD:
+      err = tcp_send_fin(pcb);
+ 801225c:	6878      	ldr	r0, [r7, #4]
+ 801225e:	f003 fedb 	bl	8016018 <tcp_send_fin>
+ 8012262:	4603      	mov	r3, r0
+ 8012264:	73fb      	strb	r3, [r7, #15]
+      if (err == ERR_OK) {
+ 8012266:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 801226a:	2b00      	cmp	r3, #0
+ 801226c:	d11f      	bne.n	80122ae <tcp_close_shutdown_fin+0x7e>
+        tcp_backlog_accepted(pcb);
+        MIB2_STATS_INC(mib2.tcpattemptfails);
+        pcb->state = FIN_WAIT_1;
+ 801226e:	687b      	ldr	r3, [r7, #4]
+ 8012270:	2205      	movs	r2, #5
+ 8012272:	751a      	strb	r2, [r3, #20]
+      }
+      break;
+ 8012274:	e01b      	b.n	80122ae <tcp_close_shutdown_fin+0x7e>
+    case ESTABLISHED:
+      err = tcp_send_fin(pcb);
+ 8012276:	6878      	ldr	r0, [r7, #4]
+ 8012278:	f003 fece 	bl	8016018 <tcp_send_fin>
+ 801227c:	4603      	mov	r3, r0
+ 801227e:	73fb      	strb	r3, [r7, #15]
+      if (err == ERR_OK) {
+ 8012280:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 8012284:	2b00      	cmp	r3, #0
+ 8012286:	d114      	bne.n	80122b2 <tcp_close_shutdown_fin+0x82>
+        MIB2_STATS_INC(mib2.tcpestabresets);
+        pcb->state = FIN_WAIT_1;
+ 8012288:	687b      	ldr	r3, [r7, #4]
+ 801228a:	2205      	movs	r2, #5
+ 801228c:	751a      	strb	r2, [r3, #20]
+      }
+      break;
+ 801228e:	e010      	b.n	80122b2 <tcp_close_shutdown_fin+0x82>
+    case CLOSE_WAIT:
+      err = tcp_send_fin(pcb);
+ 8012290:	6878      	ldr	r0, [r7, #4]
+ 8012292:	f003 fec1 	bl	8016018 <tcp_send_fin>
+ 8012296:	4603      	mov	r3, r0
+ 8012298:	73fb      	strb	r3, [r7, #15]
+      if (err == ERR_OK) {
+ 801229a:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 801229e:	2b00      	cmp	r3, #0
+ 80122a0:	d109      	bne.n	80122b6 <tcp_close_shutdown_fin+0x86>
+        MIB2_STATS_INC(mib2.tcpestabresets);
+        pcb->state = LAST_ACK;
+ 80122a2:	687b      	ldr	r3, [r7, #4]
+ 80122a4:	2209      	movs	r2, #9
+ 80122a6:	751a      	strb	r2, [r3, #20]
+      }
+      break;
+ 80122a8:	e005      	b.n	80122b6 <tcp_close_shutdown_fin+0x86>
+    default:
+      /* Has already been closed, do nothing. */
+      return ERR_OK;
+ 80122aa:	2300      	movs	r3, #0
+ 80122ac:	e01c      	b.n	80122e8 <tcp_close_shutdown_fin+0xb8>
+      break;
+ 80122ae:	bf00      	nop
+ 80122b0:	e002      	b.n	80122b8 <tcp_close_shutdown_fin+0x88>
+      break;
+ 80122b2:	bf00      	nop
+ 80122b4:	e000      	b.n	80122b8 <tcp_close_shutdown_fin+0x88>
+      break;
+ 80122b6:	bf00      	nop
+  }
+
+  if (err == ERR_OK) {
+ 80122b8:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 80122bc:	2b00      	cmp	r3, #0
+ 80122be:	d103      	bne.n	80122c8 <tcp_close_shutdown_fin+0x98>
+    /* To ensure all data has been sent when tcp_close returns, we have
+       to make sure tcp_output doesn't fail.
+       Since we don't really have to ensure all data has been sent when tcp_close
+       returns (unsent data is sent from tcp timer functions, also), we don't care
+       for the return value of tcp_output for now. */
+    tcp_output(pcb);
+ 80122c0:	6878      	ldr	r0, [r7, #4]
+ 80122c2:	f003 ffe7 	bl	8016294 <tcp_output>
+ 80122c6:	e00d      	b.n	80122e4 <tcp_close_shutdown_fin+0xb4>
+  } else if (err == ERR_MEM) {
+ 80122c8:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 80122cc:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 80122d0:	d108      	bne.n	80122e4 <tcp_close_shutdown_fin+0xb4>
+    /* Mark this pcb for closing. Closing is retried from tcp_tmr. */
+    tcp_set_flags(pcb, TF_CLOSEPEND);
+ 80122d2:	687b      	ldr	r3, [r7, #4]
+ 80122d4:	8b5b      	ldrh	r3, [r3, #26]
+ 80122d6:	f043 0308 	orr.w	r3, r3, #8
+ 80122da:	b29a      	uxth	r2, r3
+ 80122dc:	687b      	ldr	r3, [r7, #4]
+ 80122de:	835a      	strh	r2, [r3, #26]
+    /* We have to return ERR_OK from here to indicate to the callers that this
+       pcb should not be used any more as it will be freed soon via tcp_tmr.
+       This is OK here since sending FIN does not guarantee a time frime for
+       actually freeing the pcb, either (it is left in closure states for
+       remote ACK or timeout) */
+    return ERR_OK;
+ 80122e0:	2300      	movs	r3, #0
+ 80122e2:	e001      	b.n	80122e8 <tcp_close_shutdown_fin+0xb8>
+  }
+  return err;
+ 80122e4:	f997 300f 	ldrsb.w	r3, [r7, #15]
+}
+ 80122e8:	4618      	mov	r0, r3
+ 80122ea:	3710      	adds	r7, #16
+ 80122ec:	46bd      	mov	sp, r7
+ 80122ee:	bd80      	pop	{r7, pc}
+ 80122f0:	0801e278 	.word	0x0801e278
+ 80122f4:	0801e328 	.word	0x0801e328
+ 80122f8:	0801e2bc 	.word	0x0801e2bc
+
+080122fc <tcp_close>:
+ * @return ERR_OK if connection has been closed
+ *         another err_t if closing failed and pcb is not freed
+ */
+err_t
+tcp_close(struct tcp_pcb *pcb)
+{
+ 80122fc:	b580      	push	{r7, lr}
+ 80122fe:	b082      	sub	sp, #8
+ 8012300:	af00      	add	r7, sp, #0
+ 8012302:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("tcp_close: invalid pcb", pcb != NULL, return ERR_ARG);
+ 8012304:	687b      	ldr	r3, [r7, #4]
+ 8012306:	2b00      	cmp	r3, #0
+ 8012308:	d109      	bne.n	801231e <tcp_close+0x22>
+ 801230a:	4b0f      	ldr	r3, [pc, #60]	; (8012348 <tcp_close+0x4c>)
+ 801230c:	f44f 72f4 	mov.w	r2, #488	; 0x1e8
+ 8012310:	490e      	ldr	r1, [pc, #56]	; (801234c <tcp_close+0x50>)
+ 8012312:	480f      	ldr	r0, [pc, #60]	; (8012350 <tcp_close+0x54>)
+ 8012314:	f00a f870 	bl	801c3f8 <iprintf>
+ 8012318:	f06f 030f 	mvn.w	r3, #15
+ 801231c:	e00f      	b.n	801233e <tcp_close+0x42>
+  LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in "));
+
+  tcp_debug_print_state(pcb->state);
+
+  if (pcb->state != LISTEN) {
+ 801231e:	687b      	ldr	r3, [r7, #4]
+ 8012320:	7d1b      	ldrb	r3, [r3, #20]
+ 8012322:	2b01      	cmp	r3, #1
+ 8012324:	d006      	beq.n	8012334 <tcp_close+0x38>
+    /* Set a flag not to receive any more data... */
+    tcp_set_flags(pcb, TF_RXCLOSED);
+ 8012326:	687b      	ldr	r3, [r7, #4]
+ 8012328:	8b5b      	ldrh	r3, [r3, #26]
+ 801232a:	f043 0310 	orr.w	r3, r3, #16
+ 801232e:	b29a      	uxth	r2, r3
+ 8012330:	687b      	ldr	r3, [r7, #4]
+ 8012332:	835a      	strh	r2, [r3, #26]
+  }
+  /* ... and close */
+  return tcp_close_shutdown(pcb, 1);
+ 8012334:	2101      	movs	r1, #1
+ 8012336:	6878      	ldr	r0, [r7, #4]
+ 8012338:	f7ff fe9c 	bl	8012074 <tcp_close_shutdown>
+ 801233c:	4603      	mov	r3, r0
+}
+ 801233e:	4618      	mov	r0, r3
+ 8012340:	3708      	adds	r7, #8
+ 8012342:	46bd      	mov	sp, r7
+ 8012344:	bd80      	pop	{r7, pc}
+ 8012346:	bf00      	nop
+ 8012348:	0801e278 	.word	0x0801e278
+ 801234c:	0801e388 	.word	0x0801e388
+ 8012350:	0801e2bc 	.word	0x0801e2bc
+
+08012354 <tcp_abandon>:
+ * @param pcb the tcp_pcb to abort
+ * @param reset boolean to indicate whether a reset should be sent
+ */
+void
+tcp_abandon(struct tcp_pcb *pcb, int reset)
+{
+ 8012354:	b580      	push	{r7, lr}
+ 8012356:	b08e      	sub	sp, #56	; 0x38
+ 8012358:	af04      	add	r7, sp, #16
+ 801235a:	6078      	str	r0, [r7, #4]
+ 801235c:	6039      	str	r1, [r7, #0]
+#endif /* LWIP_CALLBACK_API */
+  void *errf_arg;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("tcp_abandon: invalid pcb", pcb != NULL, return);
+ 801235e:	687b      	ldr	r3, [r7, #4]
+ 8012360:	2b00      	cmp	r3, #0
+ 8012362:	d107      	bne.n	8012374 <tcp_abandon+0x20>
+ 8012364:	4b52      	ldr	r3, [pc, #328]	; (80124b0 <tcp_abandon+0x15c>)
+ 8012366:	f240 223d 	movw	r2, #573	; 0x23d
+ 801236a:	4952      	ldr	r1, [pc, #328]	; (80124b4 <tcp_abandon+0x160>)
+ 801236c:	4852      	ldr	r0, [pc, #328]	; (80124b8 <tcp_abandon+0x164>)
+ 801236e:	f00a f843 	bl	801c3f8 <iprintf>
+ 8012372:	e099      	b.n	80124a8 <tcp_abandon+0x154>
+
+  /* pcb->state LISTEN not allowed here */
+  LWIP_ASSERT("don't call tcp_abort/tcp_abandon for listen-pcbs",
+ 8012374:	687b      	ldr	r3, [r7, #4]
+ 8012376:	7d1b      	ldrb	r3, [r3, #20]
+ 8012378:	2b01      	cmp	r3, #1
+ 801237a:	d106      	bne.n	801238a <tcp_abandon+0x36>
+ 801237c:	4b4c      	ldr	r3, [pc, #304]	; (80124b0 <tcp_abandon+0x15c>)
+ 801237e:	f240 2241 	movw	r2, #577	; 0x241
+ 8012382:	494e      	ldr	r1, [pc, #312]	; (80124bc <tcp_abandon+0x168>)
+ 8012384:	484c      	ldr	r0, [pc, #304]	; (80124b8 <tcp_abandon+0x164>)
+ 8012386:	f00a f837 	bl	801c3f8 <iprintf>
+              pcb->state != LISTEN);
+  /* Figure out on which TCP PCB list we are, and remove us. If we
+     are in an active state, call the receive function associated with
+     the PCB with a NULL argument, and send an RST to the remote end. */
+  if (pcb->state == TIME_WAIT) {
+ 801238a:	687b      	ldr	r3, [r7, #4]
+ 801238c:	7d1b      	ldrb	r3, [r3, #20]
+ 801238e:	2b0a      	cmp	r3, #10
+ 8012390:	d107      	bne.n	80123a2 <tcp_abandon+0x4e>
+    tcp_pcb_remove(&tcp_tw_pcbs, pcb);
+ 8012392:	6879      	ldr	r1, [r7, #4]
+ 8012394:	484a      	ldr	r0, [pc, #296]	; (80124c0 <tcp_abandon+0x16c>)
+ 8012396:	f000 ffbf 	bl	8013318 <tcp_pcb_remove>
+    tcp_free(pcb);
+ 801239a:	6878      	ldr	r0, [r7, #4]
+ 801239c:	f7ff fdb8 	bl	8011f10 <tcp_free>
+ 80123a0:	e082      	b.n	80124a8 <tcp_abandon+0x154>
+  } else {
+    int send_rst = 0;
+ 80123a2:	2300      	movs	r3, #0
+ 80123a4:	627b      	str	r3, [r7, #36]	; 0x24
+    u16_t local_port = 0;
+ 80123a6:	2300      	movs	r3, #0
+ 80123a8:	847b      	strh	r3, [r7, #34]	; 0x22
+    enum tcp_state last_state;
+    seqno = pcb->snd_nxt;
+ 80123aa:	687b      	ldr	r3, [r7, #4]
+ 80123ac:	6d1b      	ldr	r3, [r3, #80]	; 0x50
+ 80123ae:	61bb      	str	r3, [r7, #24]
+    ackno = pcb->rcv_nxt;
+ 80123b0:	687b      	ldr	r3, [r7, #4]
+ 80123b2:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80123b4:	617b      	str	r3, [r7, #20]
+#if LWIP_CALLBACK_API
+    errf = pcb->errf;
+ 80123b6:	687b      	ldr	r3, [r7, #4]
+ 80123b8:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 80123bc:	613b      	str	r3, [r7, #16]
+#endif /* LWIP_CALLBACK_API */
+    errf_arg = pcb->callback_arg;
+ 80123be:	687b      	ldr	r3, [r7, #4]
+ 80123c0:	691b      	ldr	r3, [r3, #16]
+ 80123c2:	60fb      	str	r3, [r7, #12]
+    if (pcb->state == CLOSED) {
+ 80123c4:	687b      	ldr	r3, [r7, #4]
+ 80123c6:	7d1b      	ldrb	r3, [r3, #20]
+ 80123c8:	2b00      	cmp	r3, #0
+ 80123ca:	d126      	bne.n	801241a <tcp_abandon+0xc6>
+      if (pcb->local_port != 0) {
+ 80123cc:	687b      	ldr	r3, [r7, #4]
+ 80123ce:	8adb      	ldrh	r3, [r3, #22]
+ 80123d0:	2b00      	cmp	r3, #0
+ 80123d2:	d02e      	beq.n	8012432 <tcp_abandon+0xde>
+        /* bound, not yet opened */
+        TCP_RMV(&tcp_bound_pcbs, pcb);
+ 80123d4:	4b3b      	ldr	r3, [pc, #236]	; (80124c4 <tcp_abandon+0x170>)
+ 80123d6:	681b      	ldr	r3, [r3, #0]
+ 80123d8:	687a      	ldr	r2, [r7, #4]
+ 80123da:	429a      	cmp	r2, r3
+ 80123dc:	d105      	bne.n	80123ea <tcp_abandon+0x96>
+ 80123de:	4b39      	ldr	r3, [pc, #228]	; (80124c4 <tcp_abandon+0x170>)
+ 80123e0:	681b      	ldr	r3, [r3, #0]
+ 80123e2:	68db      	ldr	r3, [r3, #12]
+ 80123e4:	4a37      	ldr	r2, [pc, #220]	; (80124c4 <tcp_abandon+0x170>)
+ 80123e6:	6013      	str	r3, [r2, #0]
+ 80123e8:	e013      	b.n	8012412 <tcp_abandon+0xbe>
+ 80123ea:	4b36      	ldr	r3, [pc, #216]	; (80124c4 <tcp_abandon+0x170>)
+ 80123ec:	681b      	ldr	r3, [r3, #0]
+ 80123ee:	61fb      	str	r3, [r7, #28]
+ 80123f0:	e00c      	b.n	801240c <tcp_abandon+0xb8>
+ 80123f2:	69fb      	ldr	r3, [r7, #28]
+ 80123f4:	68db      	ldr	r3, [r3, #12]
+ 80123f6:	687a      	ldr	r2, [r7, #4]
+ 80123f8:	429a      	cmp	r2, r3
+ 80123fa:	d104      	bne.n	8012406 <tcp_abandon+0xb2>
+ 80123fc:	687b      	ldr	r3, [r7, #4]
+ 80123fe:	68da      	ldr	r2, [r3, #12]
+ 8012400:	69fb      	ldr	r3, [r7, #28]
+ 8012402:	60da      	str	r2, [r3, #12]
+ 8012404:	e005      	b.n	8012412 <tcp_abandon+0xbe>
+ 8012406:	69fb      	ldr	r3, [r7, #28]
+ 8012408:	68db      	ldr	r3, [r3, #12]
+ 801240a:	61fb      	str	r3, [r7, #28]
+ 801240c:	69fb      	ldr	r3, [r7, #28]
+ 801240e:	2b00      	cmp	r3, #0
+ 8012410:	d1ef      	bne.n	80123f2 <tcp_abandon+0x9e>
+ 8012412:	687b      	ldr	r3, [r7, #4]
+ 8012414:	2200      	movs	r2, #0
+ 8012416:	60da      	str	r2, [r3, #12]
+ 8012418:	e00b      	b.n	8012432 <tcp_abandon+0xde>
+      }
+    } else {
+      send_rst = reset;
+ 801241a:	683b      	ldr	r3, [r7, #0]
+ 801241c:	627b      	str	r3, [r7, #36]	; 0x24
+      local_port = pcb->local_port;
+ 801241e:	687b      	ldr	r3, [r7, #4]
+ 8012420:	8adb      	ldrh	r3, [r3, #22]
+ 8012422:	847b      	strh	r3, [r7, #34]	; 0x22
+      TCP_PCB_REMOVE_ACTIVE(pcb);
+ 8012424:	6879      	ldr	r1, [r7, #4]
+ 8012426:	4828      	ldr	r0, [pc, #160]	; (80124c8 <tcp_abandon+0x174>)
+ 8012428:	f000 ff76 	bl	8013318 <tcp_pcb_remove>
+ 801242c:	4b27      	ldr	r3, [pc, #156]	; (80124cc <tcp_abandon+0x178>)
+ 801242e:	2201      	movs	r2, #1
+ 8012430:	701a      	strb	r2, [r3, #0]
+    }
+    if (pcb->unacked != NULL) {
+ 8012432:	687b      	ldr	r3, [r7, #4]
+ 8012434:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8012436:	2b00      	cmp	r3, #0
+ 8012438:	d004      	beq.n	8012444 <tcp_abandon+0xf0>
+      tcp_segs_free(pcb->unacked);
+ 801243a:	687b      	ldr	r3, [r7, #4]
+ 801243c:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 801243e:	4618      	mov	r0, r3
+ 8012440:	f000 fd1a 	bl	8012e78 <tcp_segs_free>
+    }
+    if (pcb->unsent != NULL) {
+ 8012444:	687b      	ldr	r3, [r7, #4]
+ 8012446:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8012448:	2b00      	cmp	r3, #0
+ 801244a:	d004      	beq.n	8012456 <tcp_abandon+0x102>
+      tcp_segs_free(pcb->unsent);
+ 801244c:	687b      	ldr	r3, [r7, #4]
+ 801244e:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8012450:	4618      	mov	r0, r3
+ 8012452:	f000 fd11 	bl	8012e78 <tcp_segs_free>
+    }
+#if TCP_QUEUE_OOSEQ
+    if (pcb->ooseq != NULL) {
+ 8012456:	687b      	ldr	r3, [r7, #4]
+ 8012458:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 801245a:	2b00      	cmp	r3, #0
+ 801245c:	d004      	beq.n	8012468 <tcp_abandon+0x114>
+      tcp_segs_free(pcb->ooseq);
+ 801245e:	687b      	ldr	r3, [r7, #4]
+ 8012460:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8012462:	4618      	mov	r0, r3
+ 8012464:	f000 fd08 	bl	8012e78 <tcp_segs_free>
+    }
+#endif /* TCP_QUEUE_OOSEQ */
+    tcp_backlog_accepted(pcb);
+    if (send_rst) {
+ 8012468:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801246a:	2b00      	cmp	r3, #0
+ 801246c:	d00e      	beq.n	801248c <tcp_abandon+0x138>
+      LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n"));
+      tcp_rst(pcb, seqno, ackno, &pcb->local_ip, &pcb->remote_ip, local_port, pcb->remote_port);
+ 801246e:	6879      	ldr	r1, [r7, #4]
+ 8012470:	687b      	ldr	r3, [r7, #4]
+ 8012472:	3304      	adds	r3, #4
+ 8012474:	687a      	ldr	r2, [r7, #4]
+ 8012476:	8b12      	ldrh	r2, [r2, #24]
+ 8012478:	9202      	str	r2, [sp, #8]
+ 801247a:	8c7a      	ldrh	r2, [r7, #34]	; 0x22
+ 801247c:	9201      	str	r2, [sp, #4]
+ 801247e:	9300      	str	r3, [sp, #0]
+ 8012480:	460b      	mov	r3, r1
+ 8012482:	697a      	ldr	r2, [r7, #20]
+ 8012484:	69b9      	ldr	r1, [r7, #24]
+ 8012486:	6878      	ldr	r0, [r7, #4]
+ 8012488:	f004 fcca 	bl	8016e20 <tcp_rst>
+    }
+    last_state = pcb->state;
+ 801248c:	687b      	ldr	r3, [r7, #4]
+ 801248e:	7d1b      	ldrb	r3, [r3, #20]
+ 8012490:	72fb      	strb	r3, [r7, #11]
+    tcp_free(pcb);
+ 8012492:	6878      	ldr	r0, [r7, #4]
+ 8012494:	f7ff fd3c 	bl	8011f10 <tcp_free>
+    TCP_EVENT_ERR(last_state, errf, errf_arg, ERR_ABRT);
+ 8012498:	693b      	ldr	r3, [r7, #16]
+ 801249a:	2b00      	cmp	r3, #0
+ 801249c:	d004      	beq.n	80124a8 <tcp_abandon+0x154>
+ 801249e:	693b      	ldr	r3, [r7, #16]
+ 80124a0:	f06f 010c 	mvn.w	r1, #12
+ 80124a4:	68f8      	ldr	r0, [r7, #12]
+ 80124a6:	4798      	blx	r3
+  }
+}
+ 80124a8:	3728      	adds	r7, #40	; 0x28
+ 80124aa:	46bd      	mov	sp, r7
+ 80124ac:	bd80      	pop	{r7, pc}
+ 80124ae:	bf00      	nop
+ 80124b0:	0801e278 	.word	0x0801e278
+ 80124b4:	0801e3bc 	.word	0x0801e3bc
+ 80124b8:	0801e2bc 	.word	0x0801e2bc
+ 80124bc:	0801e3d8 	.word	0x0801e3d8
+ 80124c0:	2000f7f8 	.word	0x2000f7f8
+ 80124c4:	2000f7f4 	.word	0x2000f7f4
+ 80124c8:	2000f7e8 	.word	0x2000f7e8
+ 80124cc:	2000f7e4 	.word	0x2000f7e4
+
+080124d0 <tcp_abort>:
+ *
+ * @param pcb the tcp pcb to abort
+ */
+void
+tcp_abort(struct tcp_pcb *pcb)
+{
+ 80124d0:	b580      	push	{r7, lr}
+ 80124d2:	b082      	sub	sp, #8
+ 80124d4:	af00      	add	r7, sp, #0
+ 80124d6:	6078      	str	r0, [r7, #4]
+  tcp_abandon(pcb, 1);
+ 80124d8:	2101      	movs	r1, #1
+ 80124da:	6878      	ldr	r0, [r7, #4]
+ 80124dc:	f7ff ff3a 	bl	8012354 <tcp_abandon>
+}
+ 80124e0:	bf00      	nop
+ 80124e2:	3708      	adds	r7, #8
+ 80124e4:	46bd      	mov	sp, r7
+ 80124e6:	bd80      	pop	{r7, pc}
+
+080124e8 <tcp_update_rcv_ann_wnd>:
+ * Returns how much extra window would be advertised if we sent an
+ * update now.
+ */
+u32_t
+tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb)
+{
+ 80124e8:	b580      	push	{r7, lr}
+ 80124ea:	b084      	sub	sp, #16
+ 80124ec:	af00      	add	r7, sp, #0
+ 80124ee:	6078      	str	r0, [r7, #4]
+  u32_t new_right_edge;
+
+  LWIP_ASSERT("tcp_update_rcv_ann_wnd: invalid pcb", pcb != NULL);
+ 80124f0:	687b      	ldr	r3, [r7, #4]
+ 80124f2:	2b00      	cmp	r3, #0
+ 80124f4:	d106      	bne.n	8012504 <tcp_update_rcv_ann_wnd+0x1c>
+ 80124f6:	4b25      	ldr	r3, [pc, #148]	; (801258c <tcp_update_rcv_ann_wnd+0xa4>)
+ 80124f8:	f240 32a6 	movw	r2, #934	; 0x3a6
+ 80124fc:	4924      	ldr	r1, [pc, #144]	; (8012590 <tcp_update_rcv_ann_wnd+0xa8>)
+ 80124fe:	4825      	ldr	r0, [pc, #148]	; (8012594 <tcp_update_rcv_ann_wnd+0xac>)
+ 8012500:	f009 ff7a 	bl	801c3f8 <iprintf>
+  new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd;
+ 8012504:	687b      	ldr	r3, [r7, #4]
+ 8012506:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8012508:	687a      	ldr	r2, [r7, #4]
+ 801250a:	8d12      	ldrh	r2, [r2, #40]	; 0x28
+ 801250c:	4413      	add	r3, r2
+ 801250e:	60fb      	str	r3, [r7, #12]
+
+  if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) {
+ 8012510:	687b      	ldr	r3, [r7, #4]
+ 8012512:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8012514:	687a      	ldr	r2, [r7, #4]
+ 8012516:	8e52      	ldrh	r2, [r2, #50]	; 0x32
+ 8012518:	f5b2 6f86 	cmp.w	r2, #1072	; 0x430
+ 801251c:	bf28      	it	cs
+ 801251e:	f44f 6286 	movcs.w	r2, #1072	; 0x430
+ 8012522:	b292      	uxth	r2, r2
+ 8012524:	4413      	add	r3, r2
+ 8012526:	68fa      	ldr	r2, [r7, #12]
+ 8012528:	1ad3      	subs	r3, r2, r3
+ 801252a:	2b00      	cmp	r3, #0
+ 801252c:	db08      	blt.n	8012540 <tcp_update_rcv_ann_wnd+0x58>
+    /* we can advertise more window */
+    pcb->rcv_ann_wnd = pcb->rcv_wnd;
+ 801252e:	687b      	ldr	r3, [r7, #4]
+ 8012530:	8d1a      	ldrh	r2, [r3, #40]	; 0x28
+ 8012532:	687b      	ldr	r3, [r7, #4]
+ 8012534:	855a      	strh	r2, [r3, #42]	; 0x2a
+    return new_right_edge - pcb->rcv_ann_right_edge;
+ 8012536:	687b      	ldr	r3, [r7, #4]
+ 8012538:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 801253a:	68fa      	ldr	r2, [r7, #12]
+ 801253c:	1ad3      	subs	r3, r2, r3
+ 801253e:	e020      	b.n	8012582 <tcp_update_rcv_ann_wnd+0x9a>
+  } else {
+    if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) {
+ 8012540:	687b      	ldr	r3, [r7, #4]
+ 8012542:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 8012544:	687b      	ldr	r3, [r7, #4]
+ 8012546:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8012548:	1ad3      	subs	r3, r2, r3
+ 801254a:	2b00      	cmp	r3, #0
+ 801254c:	dd03      	ble.n	8012556 <tcp_update_rcv_ann_wnd+0x6e>
+      /* Can happen due to other end sending out of advertised window,
+       * but within actual available (but not yet advertised) window */
+      pcb->rcv_ann_wnd = 0;
+ 801254e:	687b      	ldr	r3, [r7, #4]
+ 8012550:	2200      	movs	r2, #0
+ 8012552:	855a      	strh	r2, [r3, #42]	; 0x2a
+ 8012554:	e014      	b.n	8012580 <tcp_update_rcv_ann_wnd+0x98>
+    } else {
+      /* keep the right edge of window constant */
+      u32_t new_rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt;
+ 8012556:	687b      	ldr	r3, [r7, #4]
+ 8012558:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 801255a:	687b      	ldr	r3, [r7, #4]
+ 801255c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 801255e:	1ad3      	subs	r3, r2, r3
+ 8012560:	60bb      	str	r3, [r7, #8]
+#if !LWIP_WND_SCALE
+      LWIP_ASSERT("new_rcv_ann_wnd <= 0xffff", new_rcv_ann_wnd <= 0xffff);
+ 8012562:	68bb      	ldr	r3, [r7, #8]
+ 8012564:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 8012568:	d306      	bcc.n	8012578 <tcp_update_rcv_ann_wnd+0x90>
+ 801256a:	4b08      	ldr	r3, [pc, #32]	; (801258c <tcp_update_rcv_ann_wnd+0xa4>)
+ 801256c:	f240 32b6 	movw	r2, #950	; 0x3b6
+ 8012570:	4909      	ldr	r1, [pc, #36]	; (8012598 <tcp_update_rcv_ann_wnd+0xb0>)
+ 8012572:	4808      	ldr	r0, [pc, #32]	; (8012594 <tcp_update_rcv_ann_wnd+0xac>)
+ 8012574:	f009 ff40 	bl	801c3f8 <iprintf>
+#endif
+      pcb->rcv_ann_wnd = (tcpwnd_size_t)new_rcv_ann_wnd;
+ 8012578:	68bb      	ldr	r3, [r7, #8]
+ 801257a:	b29a      	uxth	r2, r3
+ 801257c:	687b      	ldr	r3, [r7, #4]
+ 801257e:	855a      	strh	r2, [r3, #42]	; 0x2a
+    }
+    return 0;
+ 8012580:	2300      	movs	r3, #0
+  }
+}
+ 8012582:	4618      	mov	r0, r3
+ 8012584:	3710      	adds	r7, #16
+ 8012586:	46bd      	mov	sp, r7
+ 8012588:	bd80      	pop	{r7, pc}
+ 801258a:	bf00      	nop
+ 801258c:	0801e278 	.word	0x0801e278
+ 8012590:	0801e4d4 	.word	0x0801e4d4
+ 8012594:	0801e2bc 	.word	0x0801e2bc
+ 8012598:	0801e4f8 	.word	0x0801e4f8
+
+0801259c <tcp_recved>:
+ * @param pcb the tcp_pcb for which data is read
+ * @param len the amount of bytes that have been read by the application
+ */
+void
+tcp_recved(struct tcp_pcb *pcb, u16_t len)
+{
+ 801259c:	b580      	push	{r7, lr}
+ 801259e:	b084      	sub	sp, #16
+ 80125a0:	af00      	add	r7, sp, #0
+ 80125a2:	6078      	str	r0, [r7, #4]
+ 80125a4:	460b      	mov	r3, r1
+ 80125a6:	807b      	strh	r3, [r7, #2]
+  u32_t wnd_inflation;
+  tcpwnd_size_t rcv_wnd;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("tcp_recved: invalid pcb", pcb != NULL, return);
+ 80125a8:	687b      	ldr	r3, [r7, #4]
+ 80125aa:	2b00      	cmp	r3, #0
+ 80125ac:	d107      	bne.n	80125be <tcp_recved+0x22>
+ 80125ae:	4b1f      	ldr	r3, [pc, #124]	; (801262c <tcp_recved+0x90>)
+ 80125b0:	f240 32cf 	movw	r2, #975	; 0x3cf
+ 80125b4:	491e      	ldr	r1, [pc, #120]	; (8012630 <tcp_recved+0x94>)
+ 80125b6:	481f      	ldr	r0, [pc, #124]	; (8012634 <tcp_recved+0x98>)
+ 80125b8:	f009 ff1e 	bl	801c3f8 <iprintf>
+ 80125bc:	e032      	b.n	8012624 <tcp_recved+0x88>
+
+  /* pcb->state LISTEN not allowed here */
+  LWIP_ASSERT("don't call tcp_recved for listen-pcbs",
+ 80125be:	687b      	ldr	r3, [r7, #4]
+ 80125c0:	7d1b      	ldrb	r3, [r3, #20]
+ 80125c2:	2b01      	cmp	r3, #1
+ 80125c4:	d106      	bne.n	80125d4 <tcp_recved+0x38>
+ 80125c6:	4b19      	ldr	r3, [pc, #100]	; (801262c <tcp_recved+0x90>)
+ 80125c8:	f240 32d3 	movw	r2, #979	; 0x3d3
+ 80125cc:	491a      	ldr	r1, [pc, #104]	; (8012638 <tcp_recved+0x9c>)
+ 80125ce:	4819      	ldr	r0, [pc, #100]	; (8012634 <tcp_recved+0x98>)
+ 80125d0:	f009 ff12 	bl	801c3f8 <iprintf>
+              pcb->state != LISTEN);
+
+  rcv_wnd = (tcpwnd_size_t)(pcb->rcv_wnd + len);
+ 80125d4:	687b      	ldr	r3, [r7, #4]
+ 80125d6:	8d1a      	ldrh	r2, [r3, #40]	; 0x28
+ 80125d8:	887b      	ldrh	r3, [r7, #2]
+ 80125da:	4413      	add	r3, r2
+ 80125dc:	81fb      	strh	r3, [r7, #14]
+  if ((rcv_wnd > TCP_WND_MAX(pcb)) || (rcv_wnd < pcb->rcv_wnd)) {
+ 80125de:	89fb      	ldrh	r3, [r7, #14]
+ 80125e0:	f5b3 6f06 	cmp.w	r3, #2144	; 0x860
+ 80125e4:	d804      	bhi.n	80125f0 <tcp_recved+0x54>
+ 80125e6:	687b      	ldr	r3, [r7, #4]
+ 80125e8:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 80125ea:	89fa      	ldrh	r2, [r7, #14]
+ 80125ec:	429a      	cmp	r2, r3
+ 80125ee:	d204      	bcs.n	80125fa <tcp_recved+0x5e>
+    /* window got too big or tcpwnd_size_t overflow */
+    LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: window got too big or tcpwnd_size_t overflow\n"));
+    pcb->rcv_wnd = TCP_WND_MAX(pcb);
+ 80125f0:	687b      	ldr	r3, [r7, #4]
+ 80125f2:	f44f 6206 	mov.w	r2, #2144	; 0x860
+ 80125f6:	851a      	strh	r2, [r3, #40]	; 0x28
+ 80125f8:	e002      	b.n	8012600 <tcp_recved+0x64>
+  } else  {
+    pcb->rcv_wnd = rcv_wnd;
+ 80125fa:	687b      	ldr	r3, [r7, #4]
+ 80125fc:	89fa      	ldrh	r2, [r7, #14]
+ 80125fe:	851a      	strh	r2, [r3, #40]	; 0x28
+  }
+
+  wnd_inflation = tcp_update_rcv_ann_wnd(pcb);
+ 8012600:	6878      	ldr	r0, [r7, #4]
+ 8012602:	f7ff ff71 	bl	80124e8 <tcp_update_rcv_ann_wnd>
+ 8012606:	60b8      	str	r0, [r7, #8]
+
+  /* If the change in the right edge of window is significant (default
+   * watermark is TCP_WND/4), then send an explicit update now.
+   * Otherwise wait for a packet to be sent in the normal course of
+   * events (or more window to be available later) */
+  if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) {
+ 8012608:	68bb      	ldr	r3, [r7, #8]
+ 801260a:	f5b3 7f06 	cmp.w	r3, #536	; 0x218
+ 801260e:	d309      	bcc.n	8012624 <tcp_recved+0x88>
+    tcp_ack_now(pcb);
+ 8012610:	687b      	ldr	r3, [r7, #4]
+ 8012612:	8b5b      	ldrh	r3, [r3, #26]
+ 8012614:	f043 0302 	orr.w	r3, r3, #2
+ 8012618:	b29a      	uxth	r2, r3
+ 801261a:	687b      	ldr	r3, [r7, #4]
+ 801261c:	835a      	strh	r2, [r3, #26]
+    tcp_output(pcb);
+ 801261e:	6878      	ldr	r0, [r7, #4]
+ 8012620:	f003 fe38 	bl	8016294 <tcp_output>
+  }
+
+  LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: received %"U16_F" bytes, wnd %"TCPWNDSIZE_F" (%"TCPWNDSIZE_F").\n",
+                          len, pcb->rcv_wnd, (u16_t)(TCP_WND_MAX(pcb) - pcb->rcv_wnd)));
+}
+ 8012624:	3710      	adds	r7, #16
+ 8012626:	46bd      	mov	sp, r7
+ 8012628:	bd80      	pop	{r7, pc}
+ 801262a:	bf00      	nop
+ 801262c:	0801e278 	.word	0x0801e278
+ 8012630:	0801e514 	.word	0x0801e514
+ 8012634:	0801e2bc 	.word	0x0801e2bc
+ 8012638:	0801e52c 	.word	0x0801e52c
+
+0801263c <tcp_slowtmr>:
+ *
+ * Automatically called from tcp_tmr().
+ */
+void
+tcp_slowtmr(void)
+{
+ 801263c:	b5b0      	push	{r4, r5, r7, lr}
+ 801263e:	b090      	sub	sp, #64	; 0x40
+ 8012640:	af04      	add	r7, sp, #16
+  tcpwnd_size_t eff_wnd;
+  u8_t pcb_remove;      /* flag if a PCB should be removed */
+  u8_t pcb_reset;       /* flag if a RST should be sent when removing */
+  err_t err;
+
+  err = ERR_OK;
+ 8012642:	2300      	movs	r3, #0
+ 8012644:	f887 3025 	strb.w	r3, [r7, #37]	; 0x25
+
+  ++tcp_ticks;
+ 8012648:	4b94      	ldr	r3, [pc, #592]	; (801289c <tcp_slowtmr+0x260>)
+ 801264a:	681b      	ldr	r3, [r3, #0]
+ 801264c:	3301      	adds	r3, #1
+ 801264e:	4a93      	ldr	r2, [pc, #588]	; (801289c <tcp_slowtmr+0x260>)
+ 8012650:	6013      	str	r3, [r2, #0]
+  ++tcp_timer_ctr;
+ 8012652:	4b93      	ldr	r3, [pc, #588]	; (80128a0 <tcp_slowtmr+0x264>)
+ 8012654:	781b      	ldrb	r3, [r3, #0]
+ 8012656:	3301      	adds	r3, #1
+ 8012658:	b2da      	uxtb	r2, r3
+ 801265a:	4b91      	ldr	r3, [pc, #580]	; (80128a0 <tcp_slowtmr+0x264>)
+ 801265c:	701a      	strb	r2, [r3, #0]
+
+tcp_slowtmr_start:
+  /* Steps through all of the active PCBs. */
+  prev = NULL;
+ 801265e:	2300      	movs	r3, #0
+ 8012660:	62bb      	str	r3, [r7, #40]	; 0x28
+  pcb = tcp_active_pcbs;
+ 8012662:	4b90      	ldr	r3, [pc, #576]	; (80128a4 <tcp_slowtmr+0x268>)
+ 8012664:	681b      	ldr	r3, [r3, #0]
+ 8012666:	62fb      	str	r3, [r7, #44]	; 0x2c
+  if (pcb == NULL) {
+    LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: no active pcbs\n"));
+  }
+  while (pcb != NULL) {
+ 8012668:	e29d      	b.n	8012ba6 <tcp_slowtmr+0x56a>
+    LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: processing active pcb\n"));
+    LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED);
+ 801266a:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801266c:	7d1b      	ldrb	r3, [r3, #20]
+ 801266e:	2b00      	cmp	r3, #0
+ 8012670:	d106      	bne.n	8012680 <tcp_slowtmr+0x44>
+ 8012672:	4b8d      	ldr	r3, [pc, #564]	; (80128a8 <tcp_slowtmr+0x26c>)
+ 8012674:	f240 42be 	movw	r2, #1214	; 0x4be
+ 8012678:	498c      	ldr	r1, [pc, #560]	; (80128ac <tcp_slowtmr+0x270>)
+ 801267a:	488d      	ldr	r0, [pc, #564]	; (80128b0 <tcp_slowtmr+0x274>)
+ 801267c:	f009 febc 	bl	801c3f8 <iprintf>
+    LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN);
+ 8012680:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012682:	7d1b      	ldrb	r3, [r3, #20]
+ 8012684:	2b01      	cmp	r3, #1
+ 8012686:	d106      	bne.n	8012696 <tcp_slowtmr+0x5a>
+ 8012688:	4b87      	ldr	r3, [pc, #540]	; (80128a8 <tcp_slowtmr+0x26c>)
+ 801268a:	f240 42bf 	movw	r2, #1215	; 0x4bf
+ 801268e:	4989      	ldr	r1, [pc, #548]	; (80128b4 <tcp_slowtmr+0x278>)
+ 8012690:	4887      	ldr	r0, [pc, #540]	; (80128b0 <tcp_slowtmr+0x274>)
+ 8012692:	f009 feb1 	bl	801c3f8 <iprintf>
+    LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT);
+ 8012696:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012698:	7d1b      	ldrb	r3, [r3, #20]
+ 801269a:	2b0a      	cmp	r3, #10
+ 801269c:	d106      	bne.n	80126ac <tcp_slowtmr+0x70>
+ 801269e:	4b82      	ldr	r3, [pc, #520]	; (80128a8 <tcp_slowtmr+0x26c>)
+ 80126a0:	f44f 6298 	mov.w	r2, #1216	; 0x4c0
+ 80126a4:	4984      	ldr	r1, [pc, #528]	; (80128b8 <tcp_slowtmr+0x27c>)
+ 80126a6:	4882      	ldr	r0, [pc, #520]	; (80128b0 <tcp_slowtmr+0x274>)
+ 80126a8:	f009 fea6 	bl	801c3f8 <iprintf>
+    if (pcb->last_timer == tcp_timer_ctr) {
+ 80126ac:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80126ae:	7f9a      	ldrb	r2, [r3, #30]
+ 80126b0:	4b7b      	ldr	r3, [pc, #492]	; (80128a0 <tcp_slowtmr+0x264>)
+ 80126b2:	781b      	ldrb	r3, [r3, #0]
+ 80126b4:	429a      	cmp	r2, r3
+ 80126b6:	d105      	bne.n	80126c4 <tcp_slowtmr+0x88>
+      /* skip this pcb, we have already processed it */
+      prev = pcb;
+ 80126b8:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80126ba:	62bb      	str	r3, [r7, #40]	; 0x28
+      pcb = pcb->next;
+ 80126bc:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80126be:	68db      	ldr	r3, [r3, #12]
+ 80126c0:	62fb      	str	r3, [r7, #44]	; 0x2c
+      continue;
+ 80126c2:	e270      	b.n	8012ba6 <tcp_slowtmr+0x56a>
+    }
+    pcb->last_timer = tcp_timer_ctr;
+ 80126c4:	4b76      	ldr	r3, [pc, #472]	; (80128a0 <tcp_slowtmr+0x264>)
+ 80126c6:	781a      	ldrb	r2, [r3, #0]
+ 80126c8:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80126ca:	779a      	strb	r2, [r3, #30]
+
+    pcb_remove = 0;
+ 80126cc:	2300      	movs	r3, #0
+ 80126ce:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+    pcb_reset = 0;
+ 80126d2:	2300      	movs	r3, #0
+ 80126d4:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
+
+    if (pcb->state == SYN_SENT && pcb->nrtx >= TCP_SYNMAXRTX) {
+ 80126d8:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80126da:	7d1b      	ldrb	r3, [r3, #20]
+ 80126dc:	2b02      	cmp	r3, #2
+ 80126de:	d10a      	bne.n	80126f6 <tcp_slowtmr+0xba>
+ 80126e0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80126e2:	f893 3042 	ldrb.w	r3, [r3, #66]	; 0x42
+ 80126e6:	2b05      	cmp	r3, #5
+ 80126e8:	d905      	bls.n	80126f6 <tcp_slowtmr+0xba>
+      ++pcb_remove;
+ 80126ea:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 80126ee:	3301      	adds	r3, #1
+ 80126f0:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+ 80126f4:	e11e      	b.n	8012934 <tcp_slowtmr+0x2f8>
+      LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n"));
+    } else if (pcb->nrtx >= TCP_MAXRTX) {
+ 80126f6:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80126f8:	f893 3042 	ldrb.w	r3, [r3, #66]	; 0x42
+ 80126fc:	2b0b      	cmp	r3, #11
+ 80126fe:	d905      	bls.n	801270c <tcp_slowtmr+0xd0>
+      ++pcb_remove;
+ 8012700:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 8012704:	3301      	adds	r3, #1
+ 8012706:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+ 801270a:	e113      	b.n	8012934 <tcp_slowtmr+0x2f8>
+      LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max DATA retries reached\n"));
+    } else {
+      if (pcb->persist_backoff > 0) {
+ 801270c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801270e:	f893 3099 	ldrb.w	r3, [r3, #153]	; 0x99
+ 8012712:	2b00      	cmp	r3, #0
+ 8012714:	d075      	beq.n	8012802 <tcp_slowtmr+0x1c6>
+        LWIP_ASSERT("tcp_slowtimr: persist ticking with in-flight data", pcb->unacked == NULL);
+ 8012716:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012718:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 801271a:	2b00      	cmp	r3, #0
+ 801271c:	d006      	beq.n	801272c <tcp_slowtmr+0xf0>
+ 801271e:	4b62      	ldr	r3, [pc, #392]	; (80128a8 <tcp_slowtmr+0x26c>)
+ 8012720:	f240 42d4 	movw	r2, #1236	; 0x4d4
+ 8012724:	4965      	ldr	r1, [pc, #404]	; (80128bc <tcp_slowtmr+0x280>)
+ 8012726:	4862      	ldr	r0, [pc, #392]	; (80128b0 <tcp_slowtmr+0x274>)
+ 8012728:	f009 fe66 	bl	801c3f8 <iprintf>
+        LWIP_ASSERT("tcp_slowtimr: persist ticking with empty send buffer", pcb->unsent != NULL);
+ 801272c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801272e:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8012730:	2b00      	cmp	r3, #0
+ 8012732:	d106      	bne.n	8012742 <tcp_slowtmr+0x106>
+ 8012734:	4b5c      	ldr	r3, [pc, #368]	; (80128a8 <tcp_slowtmr+0x26c>)
+ 8012736:	f240 42d5 	movw	r2, #1237	; 0x4d5
+ 801273a:	4961      	ldr	r1, [pc, #388]	; (80128c0 <tcp_slowtmr+0x284>)
+ 801273c:	485c      	ldr	r0, [pc, #368]	; (80128b0 <tcp_slowtmr+0x274>)
+ 801273e:	f009 fe5b 	bl	801c3f8 <iprintf>
+        if (pcb->persist_probe >= TCP_MAXRTX) {
+ 8012742:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012744:	f893 309a 	ldrb.w	r3, [r3, #154]	; 0x9a
+ 8012748:	2b0b      	cmp	r3, #11
+ 801274a:	d905      	bls.n	8012758 <tcp_slowtmr+0x11c>
+          ++pcb_remove; /* max probes reached */
+ 801274c:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 8012750:	3301      	adds	r3, #1
+ 8012752:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+ 8012756:	e0ed      	b.n	8012934 <tcp_slowtmr+0x2f8>
+        } else {
+          u8_t backoff_cnt = tcp_persist_backoff[pcb->persist_backoff - 1];
+ 8012758:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801275a:	f893 3099 	ldrb.w	r3, [r3, #153]	; 0x99
+ 801275e:	3b01      	subs	r3, #1
+ 8012760:	4a58      	ldr	r2, [pc, #352]	; (80128c4 <tcp_slowtmr+0x288>)
+ 8012762:	5cd3      	ldrb	r3, [r2, r3]
+ 8012764:	747b      	strb	r3, [r7, #17]
+          if (pcb->persist_cnt < backoff_cnt) {
+ 8012766:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012768:	f893 3098 	ldrb.w	r3, [r3, #152]	; 0x98
+ 801276c:	7c7a      	ldrb	r2, [r7, #17]
+ 801276e:	429a      	cmp	r2, r3
+ 8012770:	d907      	bls.n	8012782 <tcp_slowtmr+0x146>
+            pcb->persist_cnt++;
+ 8012772:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012774:	f893 3098 	ldrb.w	r3, [r3, #152]	; 0x98
+ 8012778:	3301      	adds	r3, #1
+ 801277a:	b2da      	uxtb	r2, r3
+ 801277c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801277e:	f883 2098 	strb.w	r2, [r3, #152]	; 0x98
+          }
+          if (pcb->persist_cnt >= backoff_cnt) {
+ 8012782:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012784:	f893 3098 	ldrb.w	r3, [r3, #152]	; 0x98
+ 8012788:	7c7a      	ldrb	r2, [r7, #17]
+ 801278a:	429a      	cmp	r2, r3
+ 801278c:	f200 80d2 	bhi.w	8012934 <tcp_slowtmr+0x2f8>
+            int next_slot = 1; /* increment timer to next slot */
+ 8012790:	2301      	movs	r3, #1
+ 8012792:	623b      	str	r3, [r7, #32]
+            /* If snd_wnd is zero, send 1 byte probes */
+            if (pcb->snd_wnd == 0) {
+ 8012794:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012796:	f8b3 3060 	ldrh.w	r3, [r3, #96]	; 0x60
+ 801279a:	2b00      	cmp	r3, #0
+ 801279c:	d108      	bne.n	80127b0 <tcp_slowtmr+0x174>
+              if (tcp_zero_window_probe(pcb) != ERR_OK) {
+ 801279e:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 80127a0:	f004 fc32 	bl	8017008 <tcp_zero_window_probe>
+ 80127a4:	4603      	mov	r3, r0
+ 80127a6:	2b00      	cmp	r3, #0
+ 80127a8:	d014      	beq.n	80127d4 <tcp_slowtmr+0x198>
+                next_slot = 0; /* try probe again with current slot */
+ 80127aa:	2300      	movs	r3, #0
+ 80127ac:	623b      	str	r3, [r7, #32]
+ 80127ae:	e011      	b.n	80127d4 <tcp_slowtmr+0x198>
+              }
+              /* snd_wnd not fully closed, split unsent head and fill window */
+            } else {
+              if (tcp_split_unsent_seg(pcb, (u16_t)pcb->snd_wnd) == ERR_OK) {
+ 80127b0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80127b2:	f8b3 3060 	ldrh.w	r3, [r3, #96]	; 0x60
+ 80127b6:	4619      	mov	r1, r3
+ 80127b8:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 80127ba:	f003 fae5 	bl	8015d88 <tcp_split_unsent_seg>
+ 80127be:	4603      	mov	r3, r0
+ 80127c0:	2b00      	cmp	r3, #0
+ 80127c2:	d107      	bne.n	80127d4 <tcp_slowtmr+0x198>
+                if (tcp_output(pcb) == ERR_OK) {
+ 80127c4:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 80127c6:	f003 fd65 	bl	8016294 <tcp_output>
+ 80127ca:	4603      	mov	r3, r0
+ 80127cc:	2b00      	cmp	r3, #0
+ 80127ce:	d101      	bne.n	80127d4 <tcp_slowtmr+0x198>
+                  /* sending will cancel persist timer, else retry with current slot */
+                  next_slot = 0;
+ 80127d0:	2300      	movs	r3, #0
+ 80127d2:	623b      	str	r3, [r7, #32]
+                }
+              }
+            }
+            if (next_slot) {
+ 80127d4:	6a3b      	ldr	r3, [r7, #32]
+ 80127d6:	2b00      	cmp	r3, #0
+ 80127d8:	f000 80ac 	beq.w	8012934 <tcp_slowtmr+0x2f8>
+              pcb->persist_cnt = 0;
+ 80127dc:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80127de:	2200      	movs	r2, #0
+ 80127e0:	f883 2098 	strb.w	r2, [r3, #152]	; 0x98
+              if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) {
+ 80127e4:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80127e6:	f893 3099 	ldrb.w	r3, [r3, #153]	; 0x99
+ 80127ea:	2b06      	cmp	r3, #6
+ 80127ec:	f200 80a2 	bhi.w	8012934 <tcp_slowtmr+0x2f8>
+                pcb->persist_backoff++;
+ 80127f0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80127f2:	f893 3099 	ldrb.w	r3, [r3, #153]	; 0x99
+ 80127f6:	3301      	adds	r3, #1
+ 80127f8:	b2da      	uxtb	r2, r3
+ 80127fa:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80127fc:	f883 2099 	strb.w	r2, [r3, #153]	; 0x99
+ 8012800:	e098      	b.n	8012934 <tcp_slowtmr+0x2f8>
+            }
+          }
+        }
+      } else {
+        /* Increase the retransmission timer if it is running */
+        if ((pcb->rtime >= 0) && (pcb->rtime < 0x7FFF)) {
+ 8012802:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012804:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	; 0x30
+ 8012808:	2b00      	cmp	r3, #0
+ 801280a:	db0f      	blt.n	801282c <tcp_slowtmr+0x1f0>
+ 801280c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801280e:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	; 0x30
+ 8012812:	f647 72ff 	movw	r2, #32767	; 0x7fff
+ 8012816:	4293      	cmp	r3, r2
+ 8012818:	d008      	beq.n	801282c <tcp_slowtmr+0x1f0>
+          ++pcb->rtime;
+ 801281a:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801281c:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	; 0x30
+ 8012820:	b29b      	uxth	r3, r3
+ 8012822:	3301      	adds	r3, #1
+ 8012824:	b29b      	uxth	r3, r3
+ 8012826:	b21a      	sxth	r2, r3
+ 8012828:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801282a:	861a      	strh	r2, [r3, #48]	; 0x30
+        }
+
+        if (pcb->rtime >= pcb->rto) {
+ 801282c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801282e:	f9b3 2030 	ldrsh.w	r2, [r3, #48]	; 0x30
+ 8012832:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012834:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	; 0x40
+ 8012838:	429a      	cmp	r2, r3
+ 801283a:	db7b      	blt.n	8012934 <tcp_slowtmr+0x2f8>
+                                      " pcb->rto %"S16_F"\n",
+                                      pcb->rtime, pcb->rto));
+          /* If prepare phase fails but we have unsent data but no unacked data,
+             still execute the backoff calculations below, as this means we somehow
+             failed to send segment. */
+          if ((tcp_rexmit_rto_prepare(pcb) == ERR_OK) || ((pcb->unacked == NULL) && (pcb->unsent != NULL))) {
+ 801283c:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 801283e:	f004 f821 	bl	8016884 <tcp_rexmit_rto_prepare>
+ 8012842:	4603      	mov	r3, r0
+ 8012844:	2b00      	cmp	r3, #0
+ 8012846:	d007      	beq.n	8012858 <tcp_slowtmr+0x21c>
+ 8012848:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801284a:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 801284c:	2b00      	cmp	r3, #0
+ 801284e:	d171      	bne.n	8012934 <tcp_slowtmr+0x2f8>
+ 8012850:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012852:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8012854:	2b00      	cmp	r3, #0
+ 8012856:	d06d      	beq.n	8012934 <tcp_slowtmr+0x2f8>
+            /* Double retransmission time-out unless we are trying to
+             * connect to somebody (i.e., we are in SYN_SENT). */
+            if (pcb->state != SYN_SENT) {
+ 8012858:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801285a:	7d1b      	ldrb	r3, [r3, #20]
+ 801285c:	2b02      	cmp	r3, #2
+ 801285e:	d03a      	beq.n	80128d6 <tcp_slowtmr+0x29a>
+              u8_t backoff_idx = LWIP_MIN(pcb->nrtx, sizeof(tcp_backoff) - 1);
+ 8012860:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012862:	f893 3042 	ldrb.w	r3, [r3, #66]	; 0x42
+ 8012866:	2b0c      	cmp	r3, #12
+ 8012868:	bf28      	it	cs
+ 801286a:	230c      	movcs	r3, #12
+ 801286c:	76fb      	strb	r3, [r7, #27]
+              int calc_rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[backoff_idx];
+ 801286e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012870:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	; 0x3c
+ 8012874:	10db      	asrs	r3, r3, #3
+ 8012876:	b21b      	sxth	r3, r3
+ 8012878:	461a      	mov	r2, r3
+ 801287a:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801287c:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	; 0x3e
+ 8012880:	4413      	add	r3, r2
+ 8012882:	7efa      	ldrb	r2, [r7, #27]
+ 8012884:	4910      	ldr	r1, [pc, #64]	; (80128c8 <tcp_slowtmr+0x28c>)
+ 8012886:	5c8a      	ldrb	r2, [r1, r2]
+ 8012888:	4093      	lsls	r3, r2
+ 801288a:	617b      	str	r3, [r7, #20]
+              pcb->rto = (s16_t)LWIP_MIN(calc_rto, 0x7FFF);
+ 801288c:	697b      	ldr	r3, [r7, #20]
+ 801288e:	f647 72fe 	movw	r2, #32766	; 0x7ffe
+ 8012892:	4293      	cmp	r3, r2
+ 8012894:	dc1a      	bgt.n	80128cc <tcp_slowtmr+0x290>
+ 8012896:	697b      	ldr	r3, [r7, #20]
+ 8012898:	b21a      	sxth	r2, r3
+ 801289a:	e019      	b.n	80128d0 <tcp_slowtmr+0x294>
+ 801289c:	2000f7ec 	.word	0x2000f7ec
+ 80128a0:	20008716 	.word	0x20008716
+ 80128a4:	2000f7e8 	.word	0x2000f7e8
+ 80128a8:	0801e278 	.word	0x0801e278
+ 80128ac:	0801e5bc 	.word	0x0801e5bc
+ 80128b0:	0801e2bc 	.word	0x0801e2bc
+ 80128b4:	0801e5e8 	.word	0x0801e5e8
+ 80128b8:	0801e614 	.word	0x0801e614
+ 80128bc:	0801e644 	.word	0x0801e644
+ 80128c0:	0801e678 	.word	0x0801e678
+ 80128c4:	08022558 	.word	0x08022558
+ 80128c8:	08022548 	.word	0x08022548
+ 80128cc:	f647 72ff 	movw	r2, #32767	; 0x7fff
+ 80128d0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80128d2:	f8a3 2040 	strh.w	r2, [r3, #64]	; 0x40
+            }
+
+            /* Reset the retransmission timer. */
+            pcb->rtime = 0;
+ 80128d6:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80128d8:	2200      	movs	r2, #0
+ 80128da:	861a      	strh	r2, [r3, #48]	; 0x30
+
+            /* Reduce congestion window and ssthresh. */
+            eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd);
+ 80128dc:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80128de:	f8b3 2060 	ldrh.w	r2, [r3, #96]	; 0x60
+ 80128e2:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80128e4:	f8b3 3048 	ldrh.w	r3, [r3, #72]	; 0x48
+ 80128e8:	4293      	cmp	r3, r2
+ 80128ea:	bf28      	it	cs
+ 80128ec:	4613      	movcs	r3, r2
+ 80128ee:	827b      	strh	r3, [r7, #18]
+            pcb->ssthresh = eff_wnd >> 1;
+ 80128f0:	8a7b      	ldrh	r3, [r7, #18]
+ 80128f2:	085b      	lsrs	r3, r3, #1
+ 80128f4:	b29a      	uxth	r2, r3
+ 80128f6:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80128f8:	f8a3 204a 	strh.w	r2, [r3, #74]	; 0x4a
+            if (pcb->ssthresh < (tcpwnd_size_t)(pcb->mss << 1)) {
+ 80128fc:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80128fe:	f8b3 204a 	ldrh.w	r2, [r3, #74]	; 0x4a
+ 8012902:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012904:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8012906:	005b      	lsls	r3, r3, #1
+ 8012908:	b29b      	uxth	r3, r3
+ 801290a:	429a      	cmp	r2, r3
+ 801290c:	d206      	bcs.n	801291c <tcp_slowtmr+0x2e0>
+              pcb->ssthresh = (tcpwnd_size_t)(pcb->mss << 1);
+ 801290e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012910:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8012912:	005b      	lsls	r3, r3, #1
+ 8012914:	b29a      	uxth	r2, r3
+ 8012916:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012918:	f8a3 204a 	strh.w	r2, [r3, #74]	; 0x4a
+            }
+            pcb->cwnd = pcb->mss;
+ 801291c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801291e:	8e5a      	ldrh	r2, [r3, #50]	; 0x32
+ 8012920:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012922:	f8a3 2048 	strh.w	r2, [r3, #72]	; 0x48
+            LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: cwnd %"TCPWNDSIZE_F
+                                         " ssthresh %"TCPWNDSIZE_F"\n",
+                                         pcb->cwnd, pcb->ssthresh));
+            pcb->bytes_acked = 0;
+ 8012926:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012928:	2200      	movs	r2, #0
+ 801292a:	f8a3 206a 	strh.w	r2, [r3, #106]	; 0x6a
+
+            /* The following needs to be called AFTER cwnd is set to one
+               mss - STJ */
+            tcp_rexmit_rto_commit(pcb);
+ 801292e:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 8012930:	f004 f818 	bl	8016964 <tcp_rexmit_rto_commit>
+          }
+        }
+      }
+    }
+    /* Check if this PCB has stayed too long in FIN-WAIT-2 */
+    if (pcb->state == FIN_WAIT_2) {
+ 8012934:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012936:	7d1b      	ldrb	r3, [r3, #20]
+ 8012938:	2b06      	cmp	r3, #6
+ 801293a:	d111      	bne.n	8012960 <tcp_slowtmr+0x324>
+      /* If this PCB is in FIN_WAIT_2 because of SHUT_WR don't let it time out. */
+      if (pcb->flags & TF_RXCLOSED) {
+ 801293c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801293e:	8b5b      	ldrh	r3, [r3, #26]
+ 8012940:	f003 0310 	and.w	r3, r3, #16
+ 8012944:	2b00      	cmp	r3, #0
+ 8012946:	d00b      	beq.n	8012960 <tcp_slowtmr+0x324>
+        /* PCB was fully closed (either through close() or SHUT_RDWR):
+           normal FIN-WAIT timeout handling. */
+        if ((u32_t)(tcp_ticks - pcb->tmr) >
+ 8012948:	4b9c      	ldr	r3, [pc, #624]	; (8012bbc <tcp_slowtmr+0x580>)
+ 801294a:	681a      	ldr	r2, [r3, #0]
+ 801294c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801294e:	6a1b      	ldr	r3, [r3, #32]
+ 8012950:	1ad3      	subs	r3, r2, r3
+ 8012952:	2b28      	cmp	r3, #40	; 0x28
+ 8012954:	d904      	bls.n	8012960 <tcp_slowtmr+0x324>
+            TCP_FIN_WAIT_TIMEOUT / TCP_SLOW_INTERVAL) {
+          ++pcb_remove;
+ 8012956:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 801295a:	3301      	adds	r3, #1
+ 801295c:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+        }
+      }
+    }
+
+    /* Check if KEEPALIVE should be sent */
+    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
+ 8012960:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012962:	7a5b      	ldrb	r3, [r3, #9]
+ 8012964:	f003 0308 	and.w	r3, r3, #8
+ 8012968:	2b00      	cmp	r3, #0
+ 801296a:	d04a      	beq.n	8012a02 <tcp_slowtmr+0x3c6>
+        ((pcb->state == ESTABLISHED) ||
+ 801296c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801296e:	7d1b      	ldrb	r3, [r3, #20]
+    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
+ 8012970:	2b04      	cmp	r3, #4
+ 8012972:	d003      	beq.n	801297c <tcp_slowtmr+0x340>
+         (pcb->state == CLOSE_WAIT))) {
+ 8012974:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012976:	7d1b      	ldrb	r3, [r3, #20]
+        ((pcb->state == ESTABLISHED) ||
+ 8012978:	2b07      	cmp	r3, #7
+ 801297a:	d142      	bne.n	8012a02 <tcp_slowtmr+0x3c6>
+      if ((u32_t)(tcp_ticks - pcb->tmr) >
+ 801297c:	4b8f      	ldr	r3, [pc, #572]	; (8012bbc <tcp_slowtmr+0x580>)
+ 801297e:	681a      	ldr	r2, [r3, #0]
+ 8012980:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012982:	6a1b      	ldr	r3, [r3, #32]
+ 8012984:	1ad2      	subs	r2, r2, r3
+          (pcb->keep_idle + TCP_KEEP_DUR(pcb)) / TCP_SLOW_INTERVAL) {
+ 8012986:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012988:	f8d3 1094 	ldr.w	r1, [r3, #148]	; 0x94
+ 801298c:	4b8c      	ldr	r3, [pc, #560]	; (8012bc0 <tcp_slowtmr+0x584>)
+ 801298e:	440b      	add	r3, r1
+ 8012990:	498c      	ldr	r1, [pc, #560]	; (8012bc4 <tcp_slowtmr+0x588>)
+ 8012992:	fba1 1303 	umull	r1, r3, r1, r3
+ 8012996:	095b      	lsrs	r3, r3, #5
+      if ((u32_t)(tcp_ticks - pcb->tmr) >
+ 8012998:	429a      	cmp	r2, r3
+ 801299a:	d90a      	bls.n	80129b2 <tcp_slowtmr+0x376>
+        LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: KEEPALIVE timeout. Aborting connection to "));
+        ip_addr_debug_print_val(TCP_DEBUG, pcb->remote_ip);
+        LWIP_DEBUGF(TCP_DEBUG, ("\n"));
+
+        ++pcb_remove;
+ 801299c:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 80129a0:	3301      	adds	r3, #1
+ 80129a2:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+        ++pcb_reset;
+ 80129a6:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
+ 80129aa:	3301      	adds	r3, #1
+ 80129ac:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
+ 80129b0:	e027      	b.n	8012a02 <tcp_slowtmr+0x3c6>
+      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
+ 80129b2:	4b82      	ldr	r3, [pc, #520]	; (8012bbc <tcp_slowtmr+0x580>)
+ 80129b4:	681a      	ldr	r2, [r3, #0]
+ 80129b6:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80129b8:	6a1b      	ldr	r3, [r3, #32]
+ 80129ba:	1ad2      	subs	r2, r2, r3
+                 (pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEP_INTVL(pcb))
+ 80129bc:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80129be:	f8d3 1094 	ldr.w	r1, [r3, #148]	; 0x94
+ 80129c2:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80129c4:	f893 309b 	ldrb.w	r3, [r3, #155]	; 0x9b
+ 80129c8:	4618      	mov	r0, r3
+ 80129ca:	4b7f      	ldr	r3, [pc, #508]	; (8012bc8 <tcp_slowtmr+0x58c>)
+ 80129cc:	fb03 f300 	mul.w	r3, r3, r0
+ 80129d0:	440b      	add	r3, r1
+                 / TCP_SLOW_INTERVAL) {
+ 80129d2:	497c      	ldr	r1, [pc, #496]	; (8012bc4 <tcp_slowtmr+0x588>)
+ 80129d4:	fba1 1303 	umull	r1, r3, r1, r3
+ 80129d8:	095b      	lsrs	r3, r3, #5
+      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
+ 80129da:	429a      	cmp	r2, r3
+ 80129dc:	d911      	bls.n	8012a02 <tcp_slowtmr+0x3c6>
+        err = tcp_keepalive(pcb);
+ 80129de:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 80129e0:	f004 fad2 	bl	8016f88 <tcp_keepalive>
+ 80129e4:	4603      	mov	r3, r0
+ 80129e6:	f887 3025 	strb.w	r3, [r7, #37]	; 0x25
+        if (err == ERR_OK) {
+ 80129ea:	f997 3025 	ldrsb.w	r3, [r7, #37]	; 0x25
+ 80129ee:	2b00      	cmp	r3, #0
+ 80129f0:	d107      	bne.n	8012a02 <tcp_slowtmr+0x3c6>
+          pcb->keep_cnt_sent++;
+ 80129f2:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80129f4:	f893 309b 	ldrb.w	r3, [r3, #155]	; 0x9b
+ 80129f8:	3301      	adds	r3, #1
+ 80129fa:	b2da      	uxtb	r2, r3
+ 80129fc:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80129fe:	f883 209b 	strb.w	r2, [r3, #155]	; 0x9b
+
+    /* If this PCB has queued out of sequence data, but has been
+       inactive for too long, will drop the data (it will eventually
+       be retransmitted). */
+#if TCP_QUEUE_OOSEQ
+    if (pcb->ooseq != NULL &&
+ 8012a02:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012a04:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8012a06:	2b00      	cmp	r3, #0
+ 8012a08:	d011      	beq.n	8012a2e <tcp_slowtmr+0x3f2>
+        (tcp_ticks - pcb->tmr >= (u32_t)pcb->rto * TCP_OOSEQ_TIMEOUT)) {
+ 8012a0a:	4b6c      	ldr	r3, [pc, #432]	; (8012bbc <tcp_slowtmr+0x580>)
+ 8012a0c:	681a      	ldr	r2, [r3, #0]
+ 8012a0e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012a10:	6a1b      	ldr	r3, [r3, #32]
+ 8012a12:	1ad2      	subs	r2, r2, r3
+ 8012a14:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012a16:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	; 0x40
+ 8012a1a:	4619      	mov	r1, r3
+ 8012a1c:	460b      	mov	r3, r1
+ 8012a1e:	005b      	lsls	r3, r3, #1
+ 8012a20:	440b      	add	r3, r1
+ 8012a22:	005b      	lsls	r3, r3, #1
+    if (pcb->ooseq != NULL &&
+ 8012a24:	429a      	cmp	r2, r3
+ 8012a26:	d302      	bcc.n	8012a2e <tcp_slowtmr+0x3f2>
+      LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: dropping OOSEQ queued data\n"));
+      tcp_free_ooseq(pcb);
+ 8012a28:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 8012a2a:	f000 fdd9 	bl	80135e0 <tcp_free_ooseq>
+    }
+#endif /* TCP_QUEUE_OOSEQ */
+
+    /* Check if this PCB has stayed too long in SYN-RCVD */
+    if (pcb->state == SYN_RCVD) {
+ 8012a2e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012a30:	7d1b      	ldrb	r3, [r3, #20]
+ 8012a32:	2b03      	cmp	r3, #3
+ 8012a34:	d10b      	bne.n	8012a4e <tcp_slowtmr+0x412>
+      if ((u32_t)(tcp_ticks - pcb->tmr) >
+ 8012a36:	4b61      	ldr	r3, [pc, #388]	; (8012bbc <tcp_slowtmr+0x580>)
+ 8012a38:	681a      	ldr	r2, [r3, #0]
+ 8012a3a:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012a3c:	6a1b      	ldr	r3, [r3, #32]
+ 8012a3e:	1ad3      	subs	r3, r2, r3
+ 8012a40:	2b28      	cmp	r3, #40	; 0x28
+ 8012a42:	d904      	bls.n	8012a4e <tcp_slowtmr+0x412>
+          TCP_SYN_RCVD_TIMEOUT / TCP_SLOW_INTERVAL) {
+        ++pcb_remove;
+ 8012a44:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 8012a48:	3301      	adds	r3, #1
+ 8012a4a:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+        LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in SYN-RCVD\n"));
+      }
+    }
+
+    /* Check if this PCB has stayed too long in LAST-ACK */
+    if (pcb->state == LAST_ACK) {
+ 8012a4e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012a50:	7d1b      	ldrb	r3, [r3, #20]
+ 8012a52:	2b09      	cmp	r3, #9
+ 8012a54:	d10b      	bne.n	8012a6e <tcp_slowtmr+0x432>
+      if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
+ 8012a56:	4b59      	ldr	r3, [pc, #356]	; (8012bbc <tcp_slowtmr+0x580>)
+ 8012a58:	681a      	ldr	r2, [r3, #0]
+ 8012a5a:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012a5c:	6a1b      	ldr	r3, [r3, #32]
+ 8012a5e:	1ad3      	subs	r3, r2, r3
+ 8012a60:	2bf0      	cmp	r3, #240	; 0xf0
+ 8012a62:	d904      	bls.n	8012a6e <tcp_slowtmr+0x432>
+        ++pcb_remove;
+ 8012a64:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 8012a68:	3301      	adds	r3, #1
+ 8012a6a:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+        LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in LAST-ACK\n"));
+      }
+    }
+
+    /* If the PCB should be removed, do it. */
+    if (pcb_remove) {
+ 8012a6e:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 8012a72:	2b00      	cmp	r3, #0
+ 8012a74:	d060      	beq.n	8012b38 <tcp_slowtmr+0x4fc>
+      struct tcp_pcb *pcb2;
+#if LWIP_CALLBACK_API
+      tcp_err_fn err_fn = pcb->errf;
+ 8012a76:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012a78:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8012a7c:	60fb      	str	r3, [r7, #12]
+#endif /* LWIP_CALLBACK_API */
+      void *err_arg;
+      enum tcp_state last_state;
+      tcp_pcb_purge(pcb);
+ 8012a7e:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 8012a80:	f000 fbfa 	bl	8013278 <tcp_pcb_purge>
+      /* Remove PCB from tcp_active_pcbs list. */
+      if (prev != NULL) {
+ 8012a84:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8012a86:	2b00      	cmp	r3, #0
+ 8012a88:	d010      	beq.n	8012aac <tcp_slowtmr+0x470>
+        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs);
+ 8012a8a:	4b50      	ldr	r3, [pc, #320]	; (8012bcc <tcp_slowtmr+0x590>)
+ 8012a8c:	681b      	ldr	r3, [r3, #0]
+ 8012a8e:	6afa      	ldr	r2, [r7, #44]	; 0x2c
+ 8012a90:	429a      	cmp	r2, r3
+ 8012a92:	d106      	bne.n	8012aa2 <tcp_slowtmr+0x466>
+ 8012a94:	4b4e      	ldr	r3, [pc, #312]	; (8012bd0 <tcp_slowtmr+0x594>)
+ 8012a96:	f240 526d 	movw	r2, #1389	; 0x56d
+ 8012a9a:	494e      	ldr	r1, [pc, #312]	; (8012bd4 <tcp_slowtmr+0x598>)
+ 8012a9c:	484e      	ldr	r0, [pc, #312]	; (8012bd8 <tcp_slowtmr+0x59c>)
+ 8012a9e:	f009 fcab 	bl	801c3f8 <iprintf>
+        prev->next = pcb->next;
+ 8012aa2:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012aa4:	68da      	ldr	r2, [r3, #12]
+ 8012aa6:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8012aa8:	60da      	str	r2, [r3, #12]
+ 8012aaa:	e00f      	b.n	8012acc <tcp_slowtmr+0x490>
+      } else {
+        /* This PCB was the first. */
+        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb);
+ 8012aac:	4b47      	ldr	r3, [pc, #284]	; (8012bcc <tcp_slowtmr+0x590>)
+ 8012aae:	681b      	ldr	r3, [r3, #0]
+ 8012ab0:	6afa      	ldr	r2, [r7, #44]	; 0x2c
+ 8012ab2:	429a      	cmp	r2, r3
+ 8012ab4:	d006      	beq.n	8012ac4 <tcp_slowtmr+0x488>
+ 8012ab6:	4b46      	ldr	r3, [pc, #280]	; (8012bd0 <tcp_slowtmr+0x594>)
+ 8012ab8:	f240 5271 	movw	r2, #1393	; 0x571
+ 8012abc:	4947      	ldr	r1, [pc, #284]	; (8012bdc <tcp_slowtmr+0x5a0>)
+ 8012abe:	4846      	ldr	r0, [pc, #280]	; (8012bd8 <tcp_slowtmr+0x59c>)
+ 8012ac0:	f009 fc9a 	bl	801c3f8 <iprintf>
+        tcp_active_pcbs = pcb->next;
+ 8012ac4:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012ac6:	68db      	ldr	r3, [r3, #12]
+ 8012ac8:	4a40      	ldr	r2, [pc, #256]	; (8012bcc <tcp_slowtmr+0x590>)
+ 8012aca:	6013      	str	r3, [r2, #0]
+      }
+
+      if (pcb_reset) {
+ 8012acc:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
+ 8012ad0:	2b00      	cmp	r3, #0
+ 8012ad2:	d013      	beq.n	8012afc <tcp_slowtmr+0x4c0>
+        tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
+ 8012ad4:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012ad6:	6d18      	ldr	r0, [r3, #80]	; 0x50
+ 8012ad8:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012ada:	6a5c      	ldr	r4, [r3, #36]	; 0x24
+ 8012adc:	6afd      	ldr	r5, [r7, #44]	; 0x2c
+ 8012ade:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012ae0:	3304      	adds	r3, #4
+ 8012ae2:	6afa      	ldr	r2, [r7, #44]	; 0x2c
+ 8012ae4:	8ad2      	ldrh	r2, [r2, #22]
+ 8012ae6:	6af9      	ldr	r1, [r7, #44]	; 0x2c
+ 8012ae8:	8b09      	ldrh	r1, [r1, #24]
+ 8012aea:	9102      	str	r1, [sp, #8]
+ 8012aec:	9201      	str	r2, [sp, #4]
+ 8012aee:	9300      	str	r3, [sp, #0]
+ 8012af0:	462b      	mov	r3, r5
+ 8012af2:	4622      	mov	r2, r4
+ 8012af4:	4601      	mov	r1, r0
+ 8012af6:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 8012af8:	f004 f992 	bl	8016e20 <tcp_rst>
+                pcb->local_port, pcb->remote_port);
+      }
+
+      err_arg = pcb->callback_arg;
+ 8012afc:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012afe:	691b      	ldr	r3, [r3, #16]
+ 8012b00:	60bb      	str	r3, [r7, #8]
+      last_state = pcb->state;
+ 8012b02:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012b04:	7d1b      	ldrb	r3, [r3, #20]
+ 8012b06:	71fb      	strb	r3, [r7, #7]
+      pcb2 = pcb;
+ 8012b08:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012b0a:	603b      	str	r3, [r7, #0]
+      pcb = pcb->next;
+ 8012b0c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012b0e:	68db      	ldr	r3, [r3, #12]
+ 8012b10:	62fb      	str	r3, [r7, #44]	; 0x2c
+      tcp_free(pcb2);
+ 8012b12:	6838      	ldr	r0, [r7, #0]
+ 8012b14:	f7ff f9fc 	bl	8011f10 <tcp_free>
+
+      tcp_active_pcbs_changed = 0;
+ 8012b18:	4b31      	ldr	r3, [pc, #196]	; (8012be0 <tcp_slowtmr+0x5a4>)
+ 8012b1a:	2200      	movs	r2, #0
+ 8012b1c:	701a      	strb	r2, [r3, #0]
+      TCP_EVENT_ERR(last_state, err_fn, err_arg, ERR_ABRT);
+ 8012b1e:	68fb      	ldr	r3, [r7, #12]
+ 8012b20:	2b00      	cmp	r3, #0
+ 8012b22:	d004      	beq.n	8012b2e <tcp_slowtmr+0x4f2>
+ 8012b24:	68fb      	ldr	r3, [r7, #12]
+ 8012b26:	f06f 010c 	mvn.w	r1, #12
+ 8012b2a:	68b8      	ldr	r0, [r7, #8]
+ 8012b2c:	4798      	blx	r3
+      if (tcp_active_pcbs_changed) {
+ 8012b2e:	4b2c      	ldr	r3, [pc, #176]	; (8012be0 <tcp_slowtmr+0x5a4>)
+ 8012b30:	781b      	ldrb	r3, [r3, #0]
+ 8012b32:	2b00      	cmp	r3, #0
+ 8012b34:	d037      	beq.n	8012ba6 <tcp_slowtmr+0x56a>
+        goto tcp_slowtmr_start;
+ 8012b36:	e592      	b.n	801265e <tcp_slowtmr+0x22>
+      }
+    } else {
+      /* get the 'next' element now and work with 'prev' below (in case of abort) */
+      prev = pcb;
+ 8012b38:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012b3a:	62bb      	str	r3, [r7, #40]	; 0x28
+      pcb = pcb->next;
+ 8012b3c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012b3e:	68db      	ldr	r3, [r3, #12]
+ 8012b40:	62fb      	str	r3, [r7, #44]	; 0x2c
+
+      /* We check if we should poll the connection. */
+      ++prev->polltmr;
+ 8012b42:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8012b44:	7f1b      	ldrb	r3, [r3, #28]
+ 8012b46:	3301      	adds	r3, #1
+ 8012b48:	b2da      	uxtb	r2, r3
+ 8012b4a:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8012b4c:	771a      	strb	r2, [r3, #28]
+      if (prev->polltmr >= prev->pollinterval) {
+ 8012b4e:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8012b50:	7f1a      	ldrb	r2, [r3, #28]
+ 8012b52:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8012b54:	7f5b      	ldrb	r3, [r3, #29]
+ 8012b56:	429a      	cmp	r2, r3
+ 8012b58:	d325      	bcc.n	8012ba6 <tcp_slowtmr+0x56a>
+        prev->polltmr = 0;
+ 8012b5a:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8012b5c:	2200      	movs	r2, #0
+ 8012b5e:	771a      	strb	r2, [r3, #28]
+        LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n"));
+        tcp_active_pcbs_changed = 0;
+ 8012b60:	4b1f      	ldr	r3, [pc, #124]	; (8012be0 <tcp_slowtmr+0x5a4>)
+ 8012b62:	2200      	movs	r2, #0
+ 8012b64:	701a      	strb	r2, [r3, #0]
+        TCP_EVENT_POLL(prev, err);
+ 8012b66:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8012b68:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
+ 8012b6c:	2b00      	cmp	r3, #0
+ 8012b6e:	d00b      	beq.n	8012b88 <tcp_slowtmr+0x54c>
+ 8012b70:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8012b72:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
+ 8012b76:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 8012b78:	6912      	ldr	r2, [r2, #16]
+ 8012b7a:	6ab9      	ldr	r1, [r7, #40]	; 0x28
+ 8012b7c:	4610      	mov	r0, r2
+ 8012b7e:	4798      	blx	r3
+ 8012b80:	4603      	mov	r3, r0
+ 8012b82:	f887 3025 	strb.w	r3, [r7, #37]	; 0x25
+ 8012b86:	e002      	b.n	8012b8e <tcp_slowtmr+0x552>
+ 8012b88:	2300      	movs	r3, #0
+ 8012b8a:	f887 3025 	strb.w	r3, [r7, #37]	; 0x25
+        if (tcp_active_pcbs_changed) {
+ 8012b8e:	4b14      	ldr	r3, [pc, #80]	; (8012be0 <tcp_slowtmr+0x5a4>)
+ 8012b90:	781b      	ldrb	r3, [r3, #0]
+ 8012b92:	2b00      	cmp	r3, #0
+ 8012b94:	d000      	beq.n	8012b98 <tcp_slowtmr+0x55c>
+          goto tcp_slowtmr_start;
+ 8012b96:	e562      	b.n	801265e <tcp_slowtmr+0x22>
+        }
+        /* if err == ERR_ABRT, 'prev' is already deallocated */
+        if (err == ERR_OK) {
+ 8012b98:	f997 3025 	ldrsb.w	r3, [r7, #37]	; 0x25
+ 8012b9c:	2b00      	cmp	r3, #0
+ 8012b9e:	d102      	bne.n	8012ba6 <tcp_slowtmr+0x56a>
+          tcp_output(prev);
+ 8012ba0:	6ab8      	ldr	r0, [r7, #40]	; 0x28
+ 8012ba2:	f003 fb77 	bl	8016294 <tcp_output>
+  while (pcb != NULL) {
+ 8012ba6:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012ba8:	2b00      	cmp	r3, #0
+ 8012baa:	f47f ad5e 	bne.w	801266a <tcp_slowtmr+0x2e>
+    }
+  }
+
+
+  /* Steps through all of the TIME-WAIT PCBs. */
+  prev = NULL;
+ 8012bae:	2300      	movs	r3, #0
+ 8012bb0:	62bb      	str	r3, [r7, #40]	; 0x28
+  pcb = tcp_tw_pcbs;
+ 8012bb2:	4b0c      	ldr	r3, [pc, #48]	; (8012be4 <tcp_slowtmr+0x5a8>)
+ 8012bb4:	681b      	ldr	r3, [r3, #0]
+ 8012bb6:	62fb      	str	r3, [r7, #44]	; 0x2c
+  while (pcb != NULL) {
+ 8012bb8:	e069      	b.n	8012c8e <tcp_slowtmr+0x652>
+ 8012bba:	bf00      	nop
+ 8012bbc:	2000f7ec 	.word	0x2000f7ec
+ 8012bc0:	000a4cb8 	.word	0x000a4cb8
+ 8012bc4:	10624dd3 	.word	0x10624dd3
+ 8012bc8:	000124f8 	.word	0x000124f8
+ 8012bcc:	2000f7e8 	.word	0x2000f7e8
+ 8012bd0:	0801e278 	.word	0x0801e278
+ 8012bd4:	0801e6b0 	.word	0x0801e6b0
+ 8012bd8:	0801e2bc 	.word	0x0801e2bc
+ 8012bdc:	0801e6dc 	.word	0x0801e6dc
+ 8012be0:	2000f7e4 	.word	0x2000f7e4
+ 8012be4:	2000f7f8 	.word	0x2000f7f8
+    LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
+ 8012be8:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012bea:	7d1b      	ldrb	r3, [r3, #20]
+ 8012bec:	2b0a      	cmp	r3, #10
+ 8012bee:	d006      	beq.n	8012bfe <tcp_slowtmr+0x5c2>
+ 8012bf0:	4b2a      	ldr	r3, [pc, #168]	; (8012c9c <tcp_slowtmr+0x660>)
+ 8012bf2:	f240 52a1 	movw	r2, #1441	; 0x5a1
+ 8012bf6:	492a      	ldr	r1, [pc, #168]	; (8012ca0 <tcp_slowtmr+0x664>)
+ 8012bf8:	482a      	ldr	r0, [pc, #168]	; (8012ca4 <tcp_slowtmr+0x668>)
+ 8012bfa:	f009 fbfd 	bl	801c3f8 <iprintf>
+    pcb_remove = 0;
+ 8012bfe:	2300      	movs	r3, #0
+ 8012c00:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+
+    /* Check if this PCB has stayed long enough in TIME-WAIT */
+    if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
+ 8012c04:	4b28      	ldr	r3, [pc, #160]	; (8012ca8 <tcp_slowtmr+0x66c>)
+ 8012c06:	681a      	ldr	r2, [r3, #0]
+ 8012c08:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012c0a:	6a1b      	ldr	r3, [r3, #32]
+ 8012c0c:	1ad3      	subs	r3, r2, r3
+ 8012c0e:	2bf0      	cmp	r3, #240	; 0xf0
+ 8012c10:	d904      	bls.n	8012c1c <tcp_slowtmr+0x5e0>
+      ++pcb_remove;
+ 8012c12:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 8012c16:	3301      	adds	r3, #1
+ 8012c18:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+    }
+
+    /* If the PCB should be removed, do it. */
+    if (pcb_remove) {
+ 8012c1c:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 8012c20:	2b00      	cmp	r3, #0
+ 8012c22:	d02f      	beq.n	8012c84 <tcp_slowtmr+0x648>
+      struct tcp_pcb *pcb2;
+      tcp_pcb_purge(pcb);
+ 8012c24:	6af8      	ldr	r0, [r7, #44]	; 0x2c
+ 8012c26:	f000 fb27 	bl	8013278 <tcp_pcb_purge>
+      /* Remove PCB from tcp_tw_pcbs list. */
+      if (prev != NULL) {
+ 8012c2a:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8012c2c:	2b00      	cmp	r3, #0
+ 8012c2e:	d010      	beq.n	8012c52 <tcp_slowtmr+0x616>
+        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs);
+ 8012c30:	4b1e      	ldr	r3, [pc, #120]	; (8012cac <tcp_slowtmr+0x670>)
+ 8012c32:	681b      	ldr	r3, [r3, #0]
+ 8012c34:	6afa      	ldr	r2, [r7, #44]	; 0x2c
+ 8012c36:	429a      	cmp	r2, r3
+ 8012c38:	d106      	bne.n	8012c48 <tcp_slowtmr+0x60c>
+ 8012c3a:	4b18      	ldr	r3, [pc, #96]	; (8012c9c <tcp_slowtmr+0x660>)
+ 8012c3c:	f240 52af 	movw	r2, #1455	; 0x5af
+ 8012c40:	491b      	ldr	r1, [pc, #108]	; (8012cb0 <tcp_slowtmr+0x674>)
+ 8012c42:	4818      	ldr	r0, [pc, #96]	; (8012ca4 <tcp_slowtmr+0x668>)
+ 8012c44:	f009 fbd8 	bl	801c3f8 <iprintf>
+        prev->next = pcb->next;
+ 8012c48:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012c4a:	68da      	ldr	r2, [r3, #12]
+ 8012c4c:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8012c4e:	60da      	str	r2, [r3, #12]
+ 8012c50:	e00f      	b.n	8012c72 <tcp_slowtmr+0x636>
+      } else {
+        /* This PCB was the first. */
+        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb);
+ 8012c52:	4b16      	ldr	r3, [pc, #88]	; (8012cac <tcp_slowtmr+0x670>)
+ 8012c54:	681b      	ldr	r3, [r3, #0]
+ 8012c56:	6afa      	ldr	r2, [r7, #44]	; 0x2c
+ 8012c58:	429a      	cmp	r2, r3
+ 8012c5a:	d006      	beq.n	8012c6a <tcp_slowtmr+0x62e>
+ 8012c5c:	4b0f      	ldr	r3, [pc, #60]	; (8012c9c <tcp_slowtmr+0x660>)
+ 8012c5e:	f240 52b3 	movw	r2, #1459	; 0x5b3
+ 8012c62:	4914      	ldr	r1, [pc, #80]	; (8012cb4 <tcp_slowtmr+0x678>)
+ 8012c64:	480f      	ldr	r0, [pc, #60]	; (8012ca4 <tcp_slowtmr+0x668>)
+ 8012c66:	f009 fbc7 	bl	801c3f8 <iprintf>
+        tcp_tw_pcbs = pcb->next;
+ 8012c6a:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012c6c:	68db      	ldr	r3, [r3, #12]
+ 8012c6e:	4a0f      	ldr	r2, [pc, #60]	; (8012cac <tcp_slowtmr+0x670>)
+ 8012c70:	6013      	str	r3, [r2, #0]
+      }
+      pcb2 = pcb;
+ 8012c72:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012c74:	61fb      	str	r3, [r7, #28]
+      pcb = pcb->next;
+ 8012c76:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012c78:	68db      	ldr	r3, [r3, #12]
+ 8012c7a:	62fb      	str	r3, [r7, #44]	; 0x2c
+      tcp_free(pcb2);
+ 8012c7c:	69f8      	ldr	r0, [r7, #28]
+ 8012c7e:	f7ff f947 	bl	8011f10 <tcp_free>
+ 8012c82:	e004      	b.n	8012c8e <tcp_slowtmr+0x652>
+    } else {
+      prev = pcb;
+ 8012c84:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012c86:	62bb      	str	r3, [r7, #40]	; 0x28
+      pcb = pcb->next;
+ 8012c88:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012c8a:	68db      	ldr	r3, [r3, #12]
+ 8012c8c:	62fb      	str	r3, [r7, #44]	; 0x2c
+  while (pcb != NULL) {
+ 8012c8e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8012c90:	2b00      	cmp	r3, #0
+ 8012c92:	d1a9      	bne.n	8012be8 <tcp_slowtmr+0x5ac>
+    }
+  }
+}
+ 8012c94:	bf00      	nop
+ 8012c96:	3730      	adds	r7, #48	; 0x30
+ 8012c98:	46bd      	mov	sp, r7
+ 8012c9a:	bdb0      	pop	{r4, r5, r7, pc}
+ 8012c9c:	0801e278 	.word	0x0801e278
+ 8012ca0:	0801e708 	.word	0x0801e708
+ 8012ca4:	0801e2bc 	.word	0x0801e2bc
+ 8012ca8:	2000f7ec 	.word	0x2000f7ec
+ 8012cac:	2000f7f8 	.word	0x2000f7f8
+ 8012cb0:	0801e738 	.word	0x0801e738
+ 8012cb4:	0801e760 	.word	0x0801e760
+
+08012cb8 <tcp_fasttmr>:
+ *
+ * Automatically called from tcp_tmr().
+ */
+void
+tcp_fasttmr(void)
+{
+ 8012cb8:	b580      	push	{r7, lr}
+ 8012cba:	b082      	sub	sp, #8
+ 8012cbc:	af00      	add	r7, sp, #0
+  struct tcp_pcb *pcb;
+
+  ++tcp_timer_ctr;
+ 8012cbe:	4b2d      	ldr	r3, [pc, #180]	; (8012d74 <tcp_fasttmr+0xbc>)
+ 8012cc0:	781b      	ldrb	r3, [r3, #0]
+ 8012cc2:	3301      	adds	r3, #1
+ 8012cc4:	b2da      	uxtb	r2, r3
+ 8012cc6:	4b2b      	ldr	r3, [pc, #172]	; (8012d74 <tcp_fasttmr+0xbc>)
+ 8012cc8:	701a      	strb	r2, [r3, #0]
+
+tcp_fasttmr_start:
+  pcb = tcp_active_pcbs;
+ 8012cca:	4b2b      	ldr	r3, [pc, #172]	; (8012d78 <tcp_fasttmr+0xc0>)
+ 8012ccc:	681b      	ldr	r3, [r3, #0]
+ 8012cce:	607b      	str	r3, [r7, #4]
+
+  while (pcb != NULL) {
+ 8012cd0:	e048      	b.n	8012d64 <tcp_fasttmr+0xac>
+    if (pcb->last_timer != tcp_timer_ctr) {
+ 8012cd2:	687b      	ldr	r3, [r7, #4]
+ 8012cd4:	7f9a      	ldrb	r2, [r3, #30]
+ 8012cd6:	4b27      	ldr	r3, [pc, #156]	; (8012d74 <tcp_fasttmr+0xbc>)
+ 8012cd8:	781b      	ldrb	r3, [r3, #0]
+ 8012cda:	429a      	cmp	r2, r3
+ 8012cdc:	d03f      	beq.n	8012d5e <tcp_fasttmr+0xa6>
+      struct tcp_pcb *next;
+      pcb->last_timer = tcp_timer_ctr;
+ 8012cde:	4b25      	ldr	r3, [pc, #148]	; (8012d74 <tcp_fasttmr+0xbc>)
+ 8012ce0:	781a      	ldrb	r2, [r3, #0]
+ 8012ce2:	687b      	ldr	r3, [r7, #4]
+ 8012ce4:	779a      	strb	r2, [r3, #30]
+      /* send delayed ACKs */
+      if (pcb->flags & TF_ACK_DELAY) {
+ 8012ce6:	687b      	ldr	r3, [r7, #4]
+ 8012ce8:	8b5b      	ldrh	r3, [r3, #26]
+ 8012cea:	f003 0301 	and.w	r3, r3, #1
+ 8012cee:	2b00      	cmp	r3, #0
+ 8012cf0:	d010      	beq.n	8012d14 <tcp_fasttmr+0x5c>
+        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n"));
+        tcp_ack_now(pcb);
+ 8012cf2:	687b      	ldr	r3, [r7, #4]
+ 8012cf4:	8b5b      	ldrh	r3, [r3, #26]
+ 8012cf6:	f043 0302 	orr.w	r3, r3, #2
+ 8012cfa:	b29a      	uxth	r2, r3
+ 8012cfc:	687b      	ldr	r3, [r7, #4]
+ 8012cfe:	835a      	strh	r2, [r3, #26]
+        tcp_output(pcb);
+ 8012d00:	6878      	ldr	r0, [r7, #4]
+ 8012d02:	f003 fac7 	bl	8016294 <tcp_output>
+        tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
+ 8012d06:	687b      	ldr	r3, [r7, #4]
+ 8012d08:	8b5b      	ldrh	r3, [r3, #26]
+ 8012d0a:	f023 0303 	bic.w	r3, r3, #3
+ 8012d0e:	b29a      	uxth	r2, r3
+ 8012d10:	687b      	ldr	r3, [r7, #4]
+ 8012d12:	835a      	strh	r2, [r3, #26]
+      }
+      /* send pending FIN */
+      if (pcb->flags & TF_CLOSEPEND) {
+ 8012d14:	687b      	ldr	r3, [r7, #4]
+ 8012d16:	8b5b      	ldrh	r3, [r3, #26]
+ 8012d18:	f003 0308 	and.w	r3, r3, #8
+ 8012d1c:	2b00      	cmp	r3, #0
+ 8012d1e:	d009      	beq.n	8012d34 <tcp_fasttmr+0x7c>
+        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: pending FIN\n"));
+        tcp_clear_flags(pcb, TF_CLOSEPEND);
+ 8012d20:	687b      	ldr	r3, [r7, #4]
+ 8012d22:	8b5b      	ldrh	r3, [r3, #26]
+ 8012d24:	f023 0308 	bic.w	r3, r3, #8
+ 8012d28:	b29a      	uxth	r2, r3
+ 8012d2a:	687b      	ldr	r3, [r7, #4]
+ 8012d2c:	835a      	strh	r2, [r3, #26]
+        tcp_close_shutdown_fin(pcb);
+ 8012d2e:	6878      	ldr	r0, [r7, #4]
+ 8012d30:	f7ff fa7e 	bl	8012230 <tcp_close_shutdown_fin>
+      }
+
+      next = pcb->next;
+ 8012d34:	687b      	ldr	r3, [r7, #4]
+ 8012d36:	68db      	ldr	r3, [r3, #12]
+ 8012d38:	603b      	str	r3, [r7, #0]
+
+      /* If there is data which was previously "refused" by upper layer */
+      if (pcb->refused_data != NULL) {
+ 8012d3a:	687b      	ldr	r3, [r7, #4]
+ 8012d3c:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 8012d3e:	2b00      	cmp	r3, #0
+ 8012d40:	d00a      	beq.n	8012d58 <tcp_fasttmr+0xa0>
+        tcp_active_pcbs_changed = 0;
+ 8012d42:	4b0e      	ldr	r3, [pc, #56]	; (8012d7c <tcp_fasttmr+0xc4>)
+ 8012d44:	2200      	movs	r2, #0
+ 8012d46:	701a      	strb	r2, [r3, #0]
+        tcp_process_refused_data(pcb);
+ 8012d48:	6878      	ldr	r0, [r7, #4]
+ 8012d4a:	f000 f819 	bl	8012d80 <tcp_process_refused_data>
+        if (tcp_active_pcbs_changed) {
+ 8012d4e:	4b0b      	ldr	r3, [pc, #44]	; (8012d7c <tcp_fasttmr+0xc4>)
+ 8012d50:	781b      	ldrb	r3, [r3, #0]
+ 8012d52:	2b00      	cmp	r3, #0
+ 8012d54:	d000      	beq.n	8012d58 <tcp_fasttmr+0xa0>
+          /* application callback has changed the pcb list: restart the loop */
+          goto tcp_fasttmr_start;
+ 8012d56:	e7b8      	b.n	8012cca <tcp_fasttmr+0x12>
+        }
+      }
+      pcb = next;
+ 8012d58:	683b      	ldr	r3, [r7, #0]
+ 8012d5a:	607b      	str	r3, [r7, #4]
+ 8012d5c:	e002      	b.n	8012d64 <tcp_fasttmr+0xac>
+    } else {
+      pcb = pcb->next;
+ 8012d5e:	687b      	ldr	r3, [r7, #4]
+ 8012d60:	68db      	ldr	r3, [r3, #12]
+ 8012d62:	607b      	str	r3, [r7, #4]
+  while (pcb != NULL) {
+ 8012d64:	687b      	ldr	r3, [r7, #4]
+ 8012d66:	2b00      	cmp	r3, #0
+ 8012d68:	d1b3      	bne.n	8012cd2 <tcp_fasttmr+0x1a>
+    }
+  }
+}
+ 8012d6a:	bf00      	nop
+ 8012d6c:	3708      	adds	r7, #8
+ 8012d6e:	46bd      	mov	sp, r7
+ 8012d70:	bd80      	pop	{r7, pc}
+ 8012d72:	bf00      	nop
+ 8012d74:	20008716 	.word	0x20008716
+ 8012d78:	2000f7e8 	.word	0x2000f7e8
+ 8012d7c:	2000f7e4 	.word	0x2000f7e4
+
+08012d80 <tcp_process_refused_data>:
+}
+
+/** Pass pcb->refused_data to the recv callback */
+err_t
+tcp_process_refused_data(struct tcp_pcb *pcb)
+{
+ 8012d80:	b590      	push	{r4, r7, lr}
+ 8012d82:	b085      	sub	sp, #20
+ 8012d84:	af00      	add	r7, sp, #0
+ 8012d86:	6078      	str	r0, [r7, #4]
+#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
+  struct pbuf *rest;
+#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+
+  LWIP_ERROR("tcp_process_refused_data: invalid pcb", pcb != NULL, return ERR_ARG);
+ 8012d88:	687b      	ldr	r3, [r7, #4]
+ 8012d8a:	2b00      	cmp	r3, #0
+ 8012d8c:	d109      	bne.n	8012da2 <tcp_process_refused_data+0x22>
+ 8012d8e:	4b37      	ldr	r3, [pc, #220]	; (8012e6c <tcp_process_refused_data+0xec>)
+ 8012d90:	f240 6209 	movw	r2, #1545	; 0x609
+ 8012d94:	4936      	ldr	r1, [pc, #216]	; (8012e70 <tcp_process_refused_data+0xf0>)
+ 8012d96:	4837      	ldr	r0, [pc, #220]	; (8012e74 <tcp_process_refused_data+0xf4>)
+ 8012d98:	f009 fb2e 	bl	801c3f8 <iprintf>
+ 8012d9c:	f06f 030f 	mvn.w	r3, #15
+ 8012da0:	e060      	b.n	8012e64 <tcp_process_refused_data+0xe4>
+#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
+  while (pcb->refused_data != NULL)
+#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+  {
+    err_t err;
+    u8_t refused_flags = pcb->refused_data->flags;
+ 8012da2:	687b      	ldr	r3, [r7, #4]
+ 8012da4:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 8012da6:	7b5b      	ldrb	r3, [r3, #13]
+ 8012da8:	73bb      	strb	r3, [r7, #14]
+    /* set pcb->refused_data to NULL in case the callback frees it and then
+       closes the pcb */
+    struct pbuf *refused_data = pcb->refused_data;
+ 8012daa:	687b      	ldr	r3, [r7, #4]
+ 8012dac:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 8012dae:	60bb      	str	r3, [r7, #8]
+#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
+    pbuf_split_64k(refused_data, &rest);
+    pcb->refused_data = rest;
+#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+    pcb->refused_data = NULL;
+ 8012db0:	687b      	ldr	r3, [r7, #4]
+ 8012db2:	2200      	movs	r2, #0
+ 8012db4:	679a      	str	r2, [r3, #120]	; 0x78
+#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+    /* Notify again application with data previously received. */
+    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n"));
+    TCP_EVENT_RECV(pcb, refused_data, ERR_OK, err);
+ 8012db6:	687b      	ldr	r3, [r7, #4]
+ 8012db8:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
+ 8012dbc:	2b00      	cmp	r3, #0
+ 8012dbe:	d00b      	beq.n	8012dd8 <tcp_process_refused_data+0x58>
+ 8012dc0:	687b      	ldr	r3, [r7, #4]
+ 8012dc2:	f8d3 4084 	ldr.w	r4, [r3, #132]	; 0x84
+ 8012dc6:	687b      	ldr	r3, [r7, #4]
+ 8012dc8:	6918      	ldr	r0, [r3, #16]
+ 8012dca:	2300      	movs	r3, #0
+ 8012dcc:	68ba      	ldr	r2, [r7, #8]
+ 8012dce:	6879      	ldr	r1, [r7, #4]
+ 8012dd0:	47a0      	blx	r4
+ 8012dd2:	4603      	mov	r3, r0
+ 8012dd4:	73fb      	strb	r3, [r7, #15]
+ 8012dd6:	e007      	b.n	8012de8 <tcp_process_refused_data+0x68>
+ 8012dd8:	2300      	movs	r3, #0
+ 8012dda:	68ba      	ldr	r2, [r7, #8]
+ 8012ddc:	6879      	ldr	r1, [r7, #4]
+ 8012dde:	2000      	movs	r0, #0
+ 8012de0:	f000 f8a2 	bl	8012f28 <tcp_recv_null>
+ 8012de4:	4603      	mov	r3, r0
+ 8012de6:	73fb      	strb	r3, [r7, #15]
+    if (err == ERR_OK) {
+ 8012de8:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 8012dec:	2b00      	cmp	r3, #0
+ 8012dee:	d12a      	bne.n	8012e46 <tcp_process_refused_data+0xc6>
+      /* did refused_data include a FIN? */
+      if ((refused_flags & PBUF_FLAG_TCP_FIN)
+ 8012df0:	7bbb      	ldrb	r3, [r7, #14]
+ 8012df2:	f003 0320 	and.w	r3, r3, #32
+ 8012df6:	2b00      	cmp	r3, #0
+ 8012df8:	d033      	beq.n	8012e62 <tcp_process_refused_data+0xe2>
+          && (rest == NULL)
+#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+         ) {
+        /* correct rcv_wnd as the application won't call tcp_recved()
+           for the FIN's seqno */
+        if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
+ 8012dfa:	687b      	ldr	r3, [r7, #4]
+ 8012dfc:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8012dfe:	f5b3 6f06 	cmp.w	r3, #2144	; 0x860
+ 8012e02:	d005      	beq.n	8012e10 <tcp_process_refused_data+0x90>
+          pcb->rcv_wnd++;
+ 8012e04:	687b      	ldr	r3, [r7, #4]
+ 8012e06:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8012e08:	3301      	adds	r3, #1
+ 8012e0a:	b29a      	uxth	r2, r3
+ 8012e0c:	687b      	ldr	r3, [r7, #4]
+ 8012e0e:	851a      	strh	r2, [r3, #40]	; 0x28
+        }
+        TCP_EVENT_CLOSED(pcb, err);
+ 8012e10:	687b      	ldr	r3, [r7, #4]
+ 8012e12:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
+ 8012e16:	2b00      	cmp	r3, #0
+ 8012e18:	d00b      	beq.n	8012e32 <tcp_process_refused_data+0xb2>
+ 8012e1a:	687b      	ldr	r3, [r7, #4]
+ 8012e1c:	f8d3 4084 	ldr.w	r4, [r3, #132]	; 0x84
+ 8012e20:	687b      	ldr	r3, [r7, #4]
+ 8012e22:	6918      	ldr	r0, [r3, #16]
+ 8012e24:	2300      	movs	r3, #0
+ 8012e26:	2200      	movs	r2, #0
+ 8012e28:	6879      	ldr	r1, [r7, #4]
+ 8012e2a:	47a0      	blx	r4
+ 8012e2c:	4603      	mov	r3, r0
+ 8012e2e:	73fb      	strb	r3, [r7, #15]
+ 8012e30:	e001      	b.n	8012e36 <tcp_process_refused_data+0xb6>
+ 8012e32:	2300      	movs	r3, #0
+ 8012e34:	73fb      	strb	r3, [r7, #15]
+        if (err == ERR_ABRT) {
+ 8012e36:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 8012e3a:	f113 0f0d 	cmn.w	r3, #13
+ 8012e3e:	d110      	bne.n	8012e62 <tcp_process_refused_data+0xe2>
+          return ERR_ABRT;
+ 8012e40:	f06f 030c 	mvn.w	r3, #12
+ 8012e44:	e00e      	b.n	8012e64 <tcp_process_refused_data+0xe4>
+        }
+      }
+    } else if (err == ERR_ABRT) {
+ 8012e46:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 8012e4a:	f113 0f0d 	cmn.w	r3, #13
+ 8012e4e:	d102      	bne.n	8012e56 <tcp_process_refused_data+0xd6>
+      /* if err == ERR_ABRT, 'pcb' is already deallocated */
+      /* Drop incoming packets because pcb is "full" (only if the incoming
+         segment contains data). */
+      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n"));
+      return ERR_ABRT;
+ 8012e50:	f06f 030c 	mvn.w	r3, #12
+ 8012e54:	e006      	b.n	8012e64 <tcp_process_refused_data+0xe4>
+#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
+      if (rest != NULL) {
+        pbuf_cat(refused_data, rest);
+      }
+#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+      pcb->refused_data = refused_data;
+ 8012e56:	687b      	ldr	r3, [r7, #4]
+ 8012e58:	68ba      	ldr	r2, [r7, #8]
+ 8012e5a:	679a      	str	r2, [r3, #120]	; 0x78
+      return ERR_INPROGRESS;
+ 8012e5c:	f06f 0304 	mvn.w	r3, #4
+ 8012e60:	e000      	b.n	8012e64 <tcp_process_refused_data+0xe4>
+    }
+  }
+  return ERR_OK;
+ 8012e62:	2300      	movs	r3, #0
+}
+ 8012e64:	4618      	mov	r0, r3
+ 8012e66:	3714      	adds	r7, #20
+ 8012e68:	46bd      	mov	sp, r7
+ 8012e6a:	bd90      	pop	{r4, r7, pc}
+ 8012e6c:	0801e278 	.word	0x0801e278
+ 8012e70:	0801e788 	.word	0x0801e788
+ 8012e74:	0801e2bc 	.word	0x0801e2bc
+
+08012e78 <tcp_segs_free>:
+ *
+ * @param seg tcp_seg list of TCP segments to free
+ */
+void
+tcp_segs_free(struct tcp_seg *seg)
+{
+ 8012e78:	b580      	push	{r7, lr}
+ 8012e7a:	b084      	sub	sp, #16
+ 8012e7c:	af00      	add	r7, sp, #0
+ 8012e7e:	6078      	str	r0, [r7, #4]
+  while (seg != NULL) {
+ 8012e80:	e007      	b.n	8012e92 <tcp_segs_free+0x1a>
+    struct tcp_seg *next = seg->next;
+ 8012e82:	687b      	ldr	r3, [r7, #4]
+ 8012e84:	681b      	ldr	r3, [r3, #0]
+ 8012e86:	60fb      	str	r3, [r7, #12]
+    tcp_seg_free(seg);
+ 8012e88:	6878      	ldr	r0, [r7, #4]
+ 8012e8a:	f000 f809 	bl	8012ea0 <tcp_seg_free>
+    seg = next;
+ 8012e8e:	68fb      	ldr	r3, [r7, #12]
+ 8012e90:	607b      	str	r3, [r7, #4]
+  while (seg != NULL) {
+ 8012e92:	687b      	ldr	r3, [r7, #4]
+ 8012e94:	2b00      	cmp	r3, #0
+ 8012e96:	d1f4      	bne.n	8012e82 <tcp_segs_free+0xa>
+  }
+}
+ 8012e98:	bf00      	nop
+ 8012e9a:	3710      	adds	r7, #16
+ 8012e9c:	46bd      	mov	sp, r7
+ 8012e9e:	bd80      	pop	{r7, pc}
+
+08012ea0 <tcp_seg_free>:
+ *
+ * @param seg single tcp_seg to free
+ */
+void
+tcp_seg_free(struct tcp_seg *seg)
+{
+ 8012ea0:	b580      	push	{r7, lr}
+ 8012ea2:	b082      	sub	sp, #8
+ 8012ea4:	af00      	add	r7, sp, #0
+ 8012ea6:	6078      	str	r0, [r7, #4]
+  if (seg != NULL) {
+ 8012ea8:	687b      	ldr	r3, [r7, #4]
+ 8012eaa:	2b00      	cmp	r3, #0
+ 8012eac:	d00c      	beq.n	8012ec8 <tcp_seg_free+0x28>
+    if (seg->p != NULL) {
+ 8012eae:	687b      	ldr	r3, [r7, #4]
+ 8012eb0:	685b      	ldr	r3, [r3, #4]
+ 8012eb2:	2b00      	cmp	r3, #0
+ 8012eb4:	d004      	beq.n	8012ec0 <tcp_seg_free+0x20>
+      pbuf_free(seg->p);
+ 8012eb6:	687b      	ldr	r3, [r7, #4]
+ 8012eb8:	685b      	ldr	r3, [r3, #4]
+ 8012eba:	4618      	mov	r0, r3
+ 8012ebc:	f7fe fd6c 	bl	8011998 <pbuf_free>
+#if TCP_DEBUG
+      seg->p = NULL;
+#endif /* TCP_DEBUG */
+    }
+    memp_free(MEMP_TCP_SEG, seg);
+ 8012ec0:	6879      	ldr	r1, [r7, #4]
+ 8012ec2:	2003      	movs	r0, #3
+ 8012ec4:	f7fd febc 	bl	8010c40 <memp_free>
+  }
+}
+ 8012ec8:	bf00      	nop
+ 8012eca:	3708      	adds	r7, #8
+ 8012ecc:	46bd      	mov	sp, r7
+ 8012ece:	bd80      	pop	{r7, pc}
+
+08012ed0 <tcp_seg_copy>:
+ * @param seg the old tcp_seg
+ * @return a copy of seg
+ */
+struct tcp_seg *
+tcp_seg_copy(struct tcp_seg *seg)
+{
+ 8012ed0:	b580      	push	{r7, lr}
+ 8012ed2:	b084      	sub	sp, #16
+ 8012ed4:	af00      	add	r7, sp, #0
+ 8012ed6:	6078      	str	r0, [r7, #4]
+  struct tcp_seg *cseg;
+
+  LWIP_ASSERT("tcp_seg_copy: invalid seg", seg != NULL);
+ 8012ed8:	687b      	ldr	r3, [r7, #4]
+ 8012eda:	2b00      	cmp	r3, #0
+ 8012edc:	d106      	bne.n	8012eec <tcp_seg_copy+0x1c>
+ 8012ede:	4b0f      	ldr	r3, [pc, #60]	; (8012f1c <tcp_seg_copy+0x4c>)
+ 8012ee0:	f240 6282 	movw	r2, #1666	; 0x682
+ 8012ee4:	490e      	ldr	r1, [pc, #56]	; (8012f20 <tcp_seg_copy+0x50>)
+ 8012ee6:	480f      	ldr	r0, [pc, #60]	; (8012f24 <tcp_seg_copy+0x54>)
+ 8012ee8:	f009 fa86 	bl	801c3f8 <iprintf>
+
+  cseg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG);
+ 8012eec:	2003      	movs	r0, #3
+ 8012eee:	f7fd fe55 	bl	8010b9c <memp_malloc>
+ 8012ef2:	60f8      	str	r0, [r7, #12]
+  if (cseg == NULL) {
+ 8012ef4:	68fb      	ldr	r3, [r7, #12]
+ 8012ef6:	2b00      	cmp	r3, #0
+ 8012ef8:	d101      	bne.n	8012efe <tcp_seg_copy+0x2e>
+    return NULL;
+ 8012efa:	2300      	movs	r3, #0
+ 8012efc:	e00a      	b.n	8012f14 <tcp_seg_copy+0x44>
+  }
+  SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg));
+ 8012efe:	2210      	movs	r2, #16
+ 8012f00:	6879      	ldr	r1, [r7, #4]
+ 8012f02:	68f8      	ldr	r0, [r7, #12]
+ 8012f04:	f009 fa4b 	bl	801c39e <memcpy>
+  pbuf_ref(cseg->p);
+ 8012f08:	68fb      	ldr	r3, [r7, #12]
+ 8012f0a:	685b      	ldr	r3, [r3, #4]
+ 8012f0c:	4618      	mov	r0, r3
+ 8012f0e:	f7fe fde9 	bl	8011ae4 <pbuf_ref>
+  return cseg;
+ 8012f12:	68fb      	ldr	r3, [r7, #12]
+}
+ 8012f14:	4618      	mov	r0, r3
+ 8012f16:	3710      	adds	r7, #16
+ 8012f18:	46bd      	mov	sp, r7
+ 8012f1a:	bd80      	pop	{r7, pc}
+ 8012f1c:	0801e278 	.word	0x0801e278
+ 8012f20:	0801e7cc 	.word	0x0801e7cc
+ 8012f24:	0801e2bc 	.word	0x0801e2bc
+
+08012f28 <tcp_recv_null>:
+ * Default receive callback that is called if the user didn't register
+ * a recv callback for the pcb.
+ */
+err_t
+tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
+{
+ 8012f28:	b580      	push	{r7, lr}
+ 8012f2a:	b084      	sub	sp, #16
+ 8012f2c:	af00      	add	r7, sp, #0
+ 8012f2e:	60f8      	str	r0, [r7, #12]
+ 8012f30:	60b9      	str	r1, [r7, #8]
+ 8012f32:	607a      	str	r2, [r7, #4]
+ 8012f34:	70fb      	strb	r3, [r7, #3]
+  LWIP_UNUSED_ARG(arg);
+
+  LWIP_ERROR("tcp_recv_null: invalid pcb", pcb != NULL, return ERR_ARG);
+ 8012f36:	68bb      	ldr	r3, [r7, #8]
+ 8012f38:	2b00      	cmp	r3, #0
+ 8012f3a:	d109      	bne.n	8012f50 <tcp_recv_null+0x28>
+ 8012f3c:	4b12      	ldr	r3, [pc, #72]	; (8012f88 <tcp_recv_null+0x60>)
+ 8012f3e:	f44f 62d3 	mov.w	r2, #1688	; 0x698
+ 8012f42:	4912      	ldr	r1, [pc, #72]	; (8012f8c <tcp_recv_null+0x64>)
+ 8012f44:	4812      	ldr	r0, [pc, #72]	; (8012f90 <tcp_recv_null+0x68>)
+ 8012f46:	f009 fa57 	bl	801c3f8 <iprintf>
+ 8012f4a:	f06f 030f 	mvn.w	r3, #15
+ 8012f4e:	e016      	b.n	8012f7e <tcp_recv_null+0x56>
+
+  if (p != NULL) {
+ 8012f50:	687b      	ldr	r3, [r7, #4]
+ 8012f52:	2b00      	cmp	r3, #0
+ 8012f54:	d009      	beq.n	8012f6a <tcp_recv_null+0x42>
+    tcp_recved(pcb, p->tot_len);
+ 8012f56:	687b      	ldr	r3, [r7, #4]
+ 8012f58:	891b      	ldrh	r3, [r3, #8]
+ 8012f5a:	4619      	mov	r1, r3
+ 8012f5c:	68b8      	ldr	r0, [r7, #8]
+ 8012f5e:	f7ff fb1d 	bl	801259c <tcp_recved>
+    pbuf_free(p);
+ 8012f62:	6878      	ldr	r0, [r7, #4]
+ 8012f64:	f7fe fd18 	bl	8011998 <pbuf_free>
+ 8012f68:	e008      	b.n	8012f7c <tcp_recv_null+0x54>
+  } else if (err == ERR_OK) {
+ 8012f6a:	f997 3003 	ldrsb.w	r3, [r7, #3]
+ 8012f6e:	2b00      	cmp	r3, #0
+ 8012f70:	d104      	bne.n	8012f7c <tcp_recv_null+0x54>
+    return tcp_close(pcb);
+ 8012f72:	68b8      	ldr	r0, [r7, #8]
+ 8012f74:	f7ff f9c2 	bl	80122fc <tcp_close>
+ 8012f78:	4603      	mov	r3, r0
+ 8012f7a:	e000      	b.n	8012f7e <tcp_recv_null+0x56>
+  }
+  return ERR_OK;
+ 8012f7c:	2300      	movs	r3, #0
+}
+ 8012f7e:	4618      	mov	r0, r3
+ 8012f80:	3710      	adds	r7, #16
+ 8012f82:	46bd      	mov	sp, r7
+ 8012f84:	bd80      	pop	{r7, pc}
+ 8012f86:	bf00      	nop
+ 8012f88:	0801e278 	.word	0x0801e278
+ 8012f8c:	0801e7e8 	.word	0x0801e7e8
+ 8012f90:	0801e2bc 	.word	0x0801e2bc
+
+08012f94 <tcp_kill_prio>:
+ *
+ * @param prio minimum priority
+ */
+static void
+tcp_kill_prio(u8_t prio)
+{
+ 8012f94:	b580      	push	{r7, lr}
+ 8012f96:	b086      	sub	sp, #24
+ 8012f98:	af00      	add	r7, sp, #0
+ 8012f9a:	4603      	mov	r3, r0
+ 8012f9c:	71fb      	strb	r3, [r7, #7]
+  struct tcp_pcb *pcb, *inactive;
+  u32_t inactivity;
+  u8_t mprio;
+
+  mprio = LWIP_MIN(TCP_PRIO_MAX, prio);
+ 8012f9e:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8012fa2:	2b00      	cmp	r3, #0
+ 8012fa4:	db01      	blt.n	8012faa <tcp_kill_prio+0x16>
+ 8012fa6:	79fb      	ldrb	r3, [r7, #7]
+ 8012fa8:	e000      	b.n	8012fac <tcp_kill_prio+0x18>
+ 8012faa:	237f      	movs	r3, #127	; 0x7f
+ 8012fac:	72fb      	strb	r3, [r7, #11]
+
+  /* We want to kill connections with a lower prio, so bail out if 
+   * supplied prio is 0 - there can never be a lower prio
+   */
+  if (mprio == 0) {
+ 8012fae:	7afb      	ldrb	r3, [r7, #11]
+ 8012fb0:	2b00      	cmp	r3, #0
+ 8012fb2:	d034      	beq.n	801301e <tcp_kill_prio+0x8a>
+  /* We only want kill connections with a lower prio, so decrement prio by one 
+   * and start searching for oldest connection with same or lower priority than mprio.
+   * We want to find the connections with the lowest possible prio, and among
+   * these the one with the longest inactivity time.
+   */
+  mprio--;
+ 8012fb4:	7afb      	ldrb	r3, [r7, #11]
+ 8012fb6:	3b01      	subs	r3, #1
+ 8012fb8:	72fb      	strb	r3, [r7, #11]
+
+  inactivity = 0;
+ 8012fba:	2300      	movs	r3, #0
+ 8012fbc:	60fb      	str	r3, [r7, #12]
+  inactive = NULL;
+ 8012fbe:	2300      	movs	r3, #0
+ 8012fc0:	613b      	str	r3, [r7, #16]
+  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
+ 8012fc2:	4b19      	ldr	r3, [pc, #100]	; (8013028 <tcp_kill_prio+0x94>)
+ 8012fc4:	681b      	ldr	r3, [r3, #0]
+ 8012fc6:	617b      	str	r3, [r7, #20]
+ 8012fc8:	e01f      	b.n	801300a <tcp_kill_prio+0x76>
+        /* lower prio is always a kill candidate */
+    if ((pcb->prio < mprio) ||
+ 8012fca:	697b      	ldr	r3, [r7, #20]
+ 8012fcc:	7d5b      	ldrb	r3, [r3, #21]
+ 8012fce:	7afa      	ldrb	r2, [r7, #11]
+ 8012fd0:	429a      	cmp	r2, r3
+ 8012fd2:	d80c      	bhi.n	8012fee <tcp_kill_prio+0x5a>
+        /* longer inactivity is also a kill candidate */
+        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
+ 8012fd4:	697b      	ldr	r3, [r7, #20]
+ 8012fd6:	7d5b      	ldrb	r3, [r3, #21]
+    if ((pcb->prio < mprio) ||
+ 8012fd8:	7afa      	ldrb	r2, [r7, #11]
+ 8012fda:	429a      	cmp	r2, r3
+ 8012fdc:	d112      	bne.n	8013004 <tcp_kill_prio+0x70>
+        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
+ 8012fde:	4b13      	ldr	r3, [pc, #76]	; (801302c <tcp_kill_prio+0x98>)
+ 8012fe0:	681a      	ldr	r2, [r3, #0]
+ 8012fe2:	697b      	ldr	r3, [r7, #20]
+ 8012fe4:	6a1b      	ldr	r3, [r3, #32]
+ 8012fe6:	1ad3      	subs	r3, r2, r3
+ 8012fe8:	68fa      	ldr	r2, [r7, #12]
+ 8012fea:	429a      	cmp	r2, r3
+ 8012fec:	d80a      	bhi.n	8013004 <tcp_kill_prio+0x70>
+      inactivity = tcp_ticks - pcb->tmr;
+ 8012fee:	4b0f      	ldr	r3, [pc, #60]	; (801302c <tcp_kill_prio+0x98>)
+ 8012ff0:	681a      	ldr	r2, [r3, #0]
+ 8012ff2:	697b      	ldr	r3, [r7, #20]
+ 8012ff4:	6a1b      	ldr	r3, [r3, #32]
+ 8012ff6:	1ad3      	subs	r3, r2, r3
+ 8012ff8:	60fb      	str	r3, [r7, #12]
+      inactive   = pcb;
+ 8012ffa:	697b      	ldr	r3, [r7, #20]
+ 8012ffc:	613b      	str	r3, [r7, #16]
+      mprio      = pcb->prio;
+ 8012ffe:	697b      	ldr	r3, [r7, #20]
+ 8013000:	7d5b      	ldrb	r3, [r3, #21]
+ 8013002:	72fb      	strb	r3, [r7, #11]
+  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
+ 8013004:	697b      	ldr	r3, [r7, #20]
+ 8013006:	68db      	ldr	r3, [r3, #12]
+ 8013008:	617b      	str	r3, [r7, #20]
+ 801300a:	697b      	ldr	r3, [r7, #20]
+ 801300c:	2b00      	cmp	r3, #0
+ 801300e:	d1dc      	bne.n	8012fca <tcp_kill_prio+0x36>
+    }
+  }
+  if (inactive != NULL) {
+ 8013010:	693b      	ldr	r3, [r7, #16]
+ 8013012:	2b00      	cmp	r3, #0
+ 8013014:	d004      	beq.n	8013020 <tcp_kill_prio+0x8c>
+    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n",
+                            (void *)inactive, inactivity));
+    tcp_abort(inactive);
+ 8013016:	6938      	ldr	r0, [r7, #16]
+ 8013018:	f7ff fa5a 	bl	80124d0 <tcp_abort>
+ 801301c:	e000      	b.n	8013020 <tcp_kill_prio+0x8c>
+    return;
+ 801301e:	bf00      	nop
+  }
+}
+ 8013020:	3718      	adds	r7, #24
+ 8013022:	46bd      	mov	sp, r7
+ 8013024:	bd80      	pop	{r7, pc}
+ 8013026:	bf00      	nop
+ 8013028:	2000f7e8 	.word	0x2000f7e8
+ 801302c:	2000f7ec 	.word	0x2000f7ec
+
+08013030 <tcp_kill_state>:
+ * Kills the oldest connection that is in specific state.
+ * Called from tcp_alloc() for LAST_ACK and CLOSING if no more connections are available.
+ */
+static void
+tcp_kill_state(enum tcp_state state)
+{
+ 8013030:	b580      	push	{r7, lr}
+ 8013032:	b086      	sub	sp, #24
+ 8013034:	af00      	add	r7, sp, #0
+ 8013036:	4603      	mov	r3, r0
+ 8013038:	71fb      	strb	r3, [r7, #7]
+  struct tcp_pcb *pcb, *inactive;
+  u32_t inactivity;
+
+  LWIP_ASSERT("invalid state", (state == CLOSING) || (state == LAST_ACK));
+ 801303a:	79fb      	ldrb	r3, [r7, #7]
+ 801303c:	2b08      	cmp	r3, #8
+ 801303e:	d009      	beq.n	8013054 <tcp_kill_state+0x24>
+ 8013040:	79fb      	ldrb	r3, [r7, #7]
+ 8013042:	2b09      	cmp	r3, #9
+ 8013044:	d006      	beq.n	8013054 <tcp_kill_state+0x24>
+ 8013046:	4b1a      	ldr	r3, [pc, #104]	; (80130b0 <tcp_kill_state+0x80>)
+ 8013048:	f240 62dd 	movw	r2, #1757	; 0x6dd
+ 801304c:	4919      	ldr	r1, [pc, #100]	; (80130b4 <tcp_kill_state+0x84>)
+ 801304e:	481a      	ldr	r0, [pc, #104]	; (80130b8 <tcp_kill_state+0x88>)
+ 8013050:	f009 f9d2 	bl	801c3f8 <iprintf>
+
+  inactivity = 0;
+ 8013054:	2300      	movs	r3, #0
+ 8013056:	60fb      	str	r3, [r7, #12]
+  inactive = NULL;
+ 8013058:	2300      	movs	r3, #0
+ 801305a:	613b      	str	r3, [r7, #16]
+  /* Go through the list of active pcbs and get the oldest pcb that is in state
+     CLOSING/LAST_ACK. */
+  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
+ 801305c:	4b17      	ldr	r3, [pc, #92]	; (80130bc <tcp_kill_state+0x8c>)
+ 801305e:	681b      	ldr	r3, [r3, #0]
+ 8013060:	617b      	str	r3, [r7, #20]
+ 8013062:	e017      	b.n	8013094 <tcp_kill_state+0x64>
+    if (pcb->state == state) {
+ 8013064:	697b      	ldr	r3, [r7, #20]
+ 8013066:	7d1b      	ldrb	r3, [r3, #20]
+ 8013068:	79fa      	ldrb	r2, [r7, #7]
+ 801306a:	429a      	cmp	r2, r3
+ 801306c:	d10f      	bne.n	801308e <tcp_kill_state+0x5e>
+      if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
+ 801306e:	4b14      	ldr	r3, [pc, #80]	; (80130c0 <tcp_kill_state+0x90>)
+ 8013070:	681a      	ldr	r2, [r3, #0]
+ 8013072:	697b      	ldr	r3, [r7, #20]
+ 8013074:	6a1b      	ldr	r3, [r3, #32]
+ 8013076:	1ad3      	subs	r3, r2, r3
+ 8013078:	68fa      	ldr	r2, [r7, #12]
+ 801307a:	429a      	cmp	r2, r3
+ 801307c:	d807      	bhi.n	801308e <tcp_kill_state+0x5e>
+        inactivity = tcp_ticks - pcb->tmr;
+ 801307e:	4b10      	ldr	r3, [pc, #64]	; (80130c0 <tcp_kill_state+0x90>)
+ 8013080:	681a      	ldr	r2, [r3, #0]
+ 8013082:	697b      	ldr	r3, [r7, #20]
+ 8013084:	6a1b      	ldr	r3, [r3, #32]
+ 8013086:	1ad3      	subs	r3, r2, r3
+ 8013088:	60fb      	str	r3, [r7, #12]
+        inactive = pcb;
+ 801308a:	697b      	ldr	r3, [r7, #20]
+ 801308c:	613b      	str	r3, [r7, #16]
+  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
+ 801308e:	697b      	ldr	r3, [r7, #20]
+ 8013090:	68db      	ldr	r3, [r3, #12]
+ 8013092:	617b      	str	r3, [r7, #20]
+ 8013094:	697b      	ldr	r3, [r7, #20]
+ 8013096:	2b00      	cmp	r3, #0
+ 8013098:	d1e4      	bne.n	8013064 <tcp_kill_state+0x34>
+      }
+    }
+  }
+  if (inactive != NULL) {
+ 801309a:	693b      	ldr	r3, [r7, #16]
+ 801309c:	2b00      	cmp	r3, #0
+ 801309e:	d003      	beq.n	80130a8 <tcp_kill_state+0x78>
+    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_closing: killing oldest %s PCB %p (%"S32_F")\n",
+                            tcp_state_str[state], (void *)inactive, inactivity));
+    /* Don't send a RST, since no data is lost. */
+    tcp_abandon(inactive, 0);
+ 80130a0:	2100      	movs	r1, #0
+ 80130a2:	6938      	ldr	r0, [r7, #16]
+ 80130a4:	f7ff f956 	bl	8012354 <tcp_abandon>
+  }
+}
+ 80130a8:	bf00      	nop
+ 80130aa:	3718      	adds	r7, #24
+ 80130ac:	46bd      	mov	sp, r7
+ 80130ae:	bd80      	pop	{r7, pc}
+ 80130b0:	0801e278 	.word	0x0801e278
+ 80130b4:	0801e804 	.word	0x0801e804
+ 80130b8:	0801e2bc 	.word	0x0801e2bc
+ 80130bc:	2000f7e8 	.word	0x2000f7e8
+ 80130c0:	2000f7ec 	.word	0x2000f7ec
+
+080130c4 <tcp_kill_timewait>:
+ * Kills the oldest connection that is in TIME_WAIT state.
+ * Called from tcp_alloc() if no more connections are available.
+ */
+static void
+tcp_kill_timewait(void)
+{
+ 80130c4:	b580      	push	{r7, lr}
+ 80130c6:	b084      	sub	sp, #16
+ 80130c8:	af00      	add	r7, sp, #0
+  struct tcp_pcb *pcb, *inactive;
+  u32_t inactivity;
+
+  inactivity = 0;
+ 80130ca:	2300      	movs	r3, #0
+ 80130cc:	607b      	str	r3, [r7, #4]
+  inactive = NULL;
+ 80130ce:	2300      	movs	r3, #0
+ 80130d0:	60bb      	str	r3, [r7, #8]
+  /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */
+  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
+ 80130d2:	4b12      	ldr	r3, [pc, #72]	; (801311c <tcp_kill_timewait+0x58>)
+ 80130d4:	681b      	ldr	r3, [r3, #0]
+ 80130d6:	60fb      	str	r3, [r7, #12]
+ 80130d8:	e012      	b.n	8013100 <tcp_kill_timewait+0x3c>
+    if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
+ 80130da:	4b11      	ldr	r3, [pc, #68]	; (8013120 <tcp_kill_timewait+0x5c>)
+ 80130dc:	681a      	ldr	r2, [r3, #0]
+ 80130de:	68fb      	ldr	r3, [r7, #12]
+ 80130e0:	6a1b      	ldr	r3, [r3, #32]
+ 80130e2:	1ad3      	subs	r3, r2, r3
+ 80130e4:	687a      	ldr	r2, [r7, #4]
+ 80130e6:	429a      	cmp	r2, r3
+ 80130e8:	d807      	bhi.n	80130fa <tcp_kill_timewait+0x36>
+      inactivity = tcp_ticks - pcb->tmr;
+ 80130ea:	4b0d      	ldr	r3, [pc, #52]	; (8013120 <tcp_kill_timewait+0x5c>)
+ 80130ec:	681a      	ldr	r2, [r3, #0]
+ 80130ee:	68fb      	ldr	r3, [r7, #12]
+ 80130f0:	6a1b      	ldr	r3, [r3, #32]
+ 80130f2:	1ad3      	subs	r3, r2, r3
+ 80130f4:	607b      	str	r3, [r7, #4]
+      inactive = pcb;
+ 80130f6:	68fb      	ldr	r3, [r7, #12]
+ 80130f8:	60bb      	str	r3, [r7, #8]
+  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
+ 80130fa:	68fb      	ldr	r3, [r7, #12]
+ 80130fc:	68db      	ldr	r3, [r3, #12]
+ 80130fe:	60fb      	str	r3, [r7, #12]
+ 8013100:	68fb      	ldr	r3, [r7, #12]
+ 8013102:	2b00      	cmp	r3, #0
+ 8013104:	d1e9      	bne.n	80130da <tcp_kill_timewait+0x16>
+    }
+  }
+  if (inactive != NULL) {
+ 8013106:	68bb      	ldr	r3, [r7, #8]
+ 8013108:	2b00      	cmp	r3, #0
+ 801310a:	d002      	beq.n	8013112 <tcp_kill_timewait+0x4e>
+    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n",
+                            (void *)inactive, inactivity));
+    tcp_abort(inactive);
+ 801310c:	68b8      	ldr	r0, [r7, #8]
+ 801310e:	f7ff f9df 	bl	80124d0 <tcp_abort>
+  }
+}
+ 8013112:	bf00      	nop
+ 8013114:	3710      	adds	r7, #16
+ 8013116:	46bd      	mov	sp, r7
+ 8013118:	bd80      	pop	{r7, pc}
+ 801311a:	bf00      	nop
+ 801311c:	2000f7f8 	.word	0x2000f7f8
+ 8013120:	2000f7ec 	.word	0x2000f7ec
+
+08013124 <tcp_handle_closepend>:
+ * now send the FIN (which failed before), the pcb might be in a state that is
+ * OK for us to now free it.
+ */
+static void
+tcp_handle_closepend(void)
+{
+ 8013124:	b580      	push	{r7, lr}
+ 8013126:	b082      	sub	sp, #8
+ 8013128:	af00      	add	r7, sp, #0
+  struct tcp_pcb *pcb = tcp_active_pcbs;
+ 801312a:	4b10      	ldr	r3, [pc, #64]	; (801316c <tcp_handle_closepend+0x48>)
+ 801312c:	681b      	ldr	r3, [r3, #0]
+ 801312e:	607b      	str	r3, [r7, #4]
+
+  while (pcb != NULL) {
+ 8013130:	e014      	b.n	801315c <tcp_handle_closepend+0x38>
+    struct tcp_pcb *next = pcb->next;
+ 8013132:	687b      	ldr	r3, [r7, #4]
+ 8013134:	68db      	ldr	r3, [r3, #12]
+ 8013136:	603b      	str	r3, [r7, #0]
+    /* send pending FIN */
+    if (pcb->flags & TF_CLOSEPEND) {
+ 8013138:	687b      	ldr	r3, [r7, #4]
+ 801313a:	8b5b      	ldrh	r3, [r3, #26]
+ 801313c:	f003 0308 	and.w	r3, r3, #8
+ 8013140:	2b00      	cmp	r3, #0
+ 8013142:	d009      	beq.n	8013158 <tcp_handle_closepend+0x34>
+      LWIP_DEBUGF(TCP_DEBUG, ("tcp_handle_closepend: pending FIN\n"));
+      tcp_clear_flags(pcb, TF_CLOSEPEND);
+ 8013144:	687b      	ldr	r3, [r7, #4]
+ 8013146:	8b5b      	ldrh	r3, [r3, #26]
+ 8013148:	f023 0308 	bic.w	r3, r3, #8
+ 801314c:	b29a      	uxth	r2, r3
+ 801314e:	687b      	ldr	r3, [r7, #4]
+ 8013150:	835a      	strh	r2, [r3, #26]
+      tcp_close_shutdown_fin(pcb);
+ 8013152:	6878      	ldr	r0, [r7, #4]
+ 8013154:	f7ff f86c 	bl	8012230 <tcp_close_shutdown_fin>
+    }
+    pcb = next;
+ 8013158:	683b      	ldr	r3, [r7, #0]
+ 801315a:	607b      	str	r3, [r7, #4]
+  while (pcb != NULL) {
+ 801315c:	687b      	ldr	r3, [r7, #4]
+ 801315e:	2b00      	cmp	r3, #0
+ 8013160:	d1e7      	bne.n	8013132 <tcp_handle_closepend+0xe>
+  }
+}
+ 8013162:	bf00      	nop
+ 8013164:	3708      	adds	r7, #8
+ 8013166:	46bd      	mov	sp, r7
+ 8013168:	bd80      	pop	{r7, pc}
+ 801316a:	bf00      	nop
+ 801316c:	2000f7e8 	.word	0x2000f7e8
+
+08013170 <tcp_alloc>:
+ * @param prio priority for the new pcb
+ * @return a new tcp_pcb that initially is in state CLOSED
+ */
+struct tcp_pcb *
+tcp_alloc(u8_t prio)
+{
+ 8013170:	b580      	push	{r7, lr}
+ 8013172:	b084      	sub	sp, #16
+ 8013174:	af00      	add	r7, sp, #0
+ 8013176:	4603      	mov	r3, r0
+ 8013178:	71fb      	strb	r3, [r7, #7]
+  struct tcp_pcb *pcb;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
+ 801317a:	2001      	movs	r0, #1
+ 801317c:	f7fd fd0e 	bl	8010b9c <memp_malloc>
+ 8013180:	60f8      	str	r0, [r7, #12]
+  if (pcb == NULL) {
+ 8013182:	68fb      	ldr	r3, [r7, #12]
+ 8013184:	2b00      	cmp	r3, #0
+ 8013186:	d126      	bne.n	80131d6 <tcp_alloc+0x66>
+    /* Try to send FIN for all pcbs stuck in TF_CLOSEPEND first */
+    tcp_handle_closepend();
+ 8013188:	f7ff ffcc 	bl	8013124 <tcp_handle_closepend>
+
+    /* Try killing oldest connection in TIME-WAIT. */
+    LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n"));
+    tcp_kill_timewait();
+ 801318c:	f7ff ff9a 	bl	80130c4 <tcp_kill_timewait>
+    /* Try to allocate a tcp_pcb again. */
+    pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
+ 8013190:	2001      	movs	r0, #1
+ 8013192:	f7fd fd03 	bl	8010b9c <memp_malloc>
+ 8013196:	60f8      	str	r0, [r7, #12]
+    if (pcb == NULL) {
+ 8013198:	68fb      	ldr	r3, [r7, #12]
+ 801319a:	2b00      	cmp	r3, #0
+ 801319c:	d11b      	bne.n	80131d6 <tcp_alloc+0x66>
+      /* Try killing oldest connection in LAST-ACK (these wouldn't go to TIME-WAIT). */
+      LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest LAST-ACK connection\n"));
+      tcp_kill_state(LAST_ACK);
+ 801319e:	2009      	movs	r0, #9
+ 80131a0:	f7ff ff46 	bl	8013030 <tcp_kill_state>
+      /* Try to allocate a tcp_pcb again. */
+      pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
+ 80131a4:	2001      	movs	r0, #1
+ 80131a6:	f7fd fcf9 	bl	8010b9c <memp_malloc>
+ 80131aa:	60f8      	str	r0, [r7, #12]
+      if (pcb == NULL) {
+ 80131ac:	68fb      	ldr	r3, [r7, #12]
+ 80131ae:	2b00      	cmp	r3, #0
+ 80131b0:	d111      	bne.n	80131d6 <tcp_alloc+0x66>
+        /* Try killing oldest connection in CLOSING. */
+        LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest CLOSING connection\n"));
+        tcp_kill_state(CLOSING);
+ 80131b2:	2008      	movs	r0, #8
+ 80131b4:	f7ff ff3c 	bl	8013030 <tcp_kill_state>
+        /* Try to allocate a tcp_pcb again. */
+        pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
+ 80131b8:	2001      	movs	r0, #1
+ 80131ba:	f7fd fcef 	bl	8010b9c <memp_malloc>
+ 80131be:	60f8      	str	r0, [r7, #12]
+        if (pcb == NULL) {
+ 80131c0:	68fb      	ldr	r3, [r7, #12]
+ 80131c2:	2b00      	cmp	r3, #0
+ 80131c4:	d107      	bne.n	80131d6 <tcp_alloc+0x66>
+          /* Try killing oldest active connection with lower priority than the new one. */
+          LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing oldest connection with prio lower than %d\n", prio));
+          tcp_kill_prio(prio);
+ 80131c6:	79fb      	ldrb	r3, [r7, #7]
+ 80131c8:	4618      	mov	r0, r3
+ 80131ca:	f7ff fee3 	bl	8012f94 <tcp_kill_prio>
+          /* Try to allocate a tcp_pcb again. */
+          pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
+ 80131ce:	2001      	movs	r0, #1
+ 80131d0:	f7fd fce4 	bl	8010b9c <memp_malloc>
+ 80131d4:	60f8      	str	r0, [r7, #12]
+    if (pcb != NULL) {
+      /* adjust err stats: memp_malloc failed above */
+      MEMP_STATS_DEC(err, MEMP_TCP_PCB);
+    }
+  }
+  if (pcb != NULL) {
+ 80131d6:	68fb      	ldr	r3, [r7, #12]
+ 80131d8:	2b00      	cmp	r3, #0
+ 80131da:	d03f      	beq.n	801325c <tcp_alloc+0xec>
+    /* zero out the whole pcb, so there is no need to initialize members to zero */
+    memset(pcb, 0, sizeof(struct tcp_pcb));
+ 80131dc:	229c      	movs	r2, #156	; 0x9c
+ 80131de:	2100      	movs	r1, #0
+ 80131e0:	68f8      	ldr	r0, [r7, #12]
+ 80131e2:	f009 f900 	bl	801c3e6 <memset>
+    pcb->prio = prio;
+ 80131e6:	68fb      	ldr	r3, [r7, #12]
+ 80131e8:	79fa      	ldrb	r2, [r7, #7]
+ 80131ea:	755a      	strb	r2, [r3, #21]
+    pcb->snd_buf = TCP_SND_BUF;
+ 80131ec:	68fb      	ldr	r3, [r7, #12]
+ 80131ee:	f44f 6286 	mov.w	r2, #1072	; 0x430
+ 80131f2:	f8a3 2064 	strh.w	r2, [r3, #100]	; 0x64
+    /* Start with a window that does not need scaling. When window scaling is
+       enabled and used, the window is enlarged when both sides agree on scaling. */
+    pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
+ 80131f6:	68fb      	ldr	r3, [r7, #12]
+ 80131f8:	f44f 6206 	mov.w	r2, #2144	; 0x860
+ 80131fc:	855a      	strh	r2, [r3, #42]	; 0x2a
+ 80131fe:	68fb      	ldr	r3, [r7, #12]
+ 8013200:	8d5a      	ldrh	r2, [r3, #42]	; 0x2a
+ 8013202:	68fb      	ldr	r3, [r7, #12]
+ 8013204:	851a      	strh	r2, [r3, #40]	; 0x28
+    pcb->ttl = TCP_TTL;
+ 8013206:	68fb      	ldr	r3, [r7, #12]
+ 8013208:	22ff      	movs	r2, #255	; 0xff
+ 801320a:	72da      	strb	r2, [r3, #11]
+    /* As initial send MSS, we use TCP_MSS but limit it to 536.
+       The send MSS is updated when an MSS option is received. */
+    pcb->mss = INITIAL_MSS;
+ 801320c:	68fb      	ldr	r3, [r7, #12]
+ 801320e:	f44f 7206 	mov.w	r2, #536	; 0x218
+ 8013212:	865a      	strh	r2, [r3, #50]	; 0x32
+    pcb->rto = 3000 / TCP_SLOW_INTERVAL;
+ 8013214:	68fb      	ldr	r3, [r7, #12]
+ 8013216:	2206      	movs	r2, #6
+ 8013218:	f8a3 2040 	strh.w	r2, [r3, #64]	; 0x40
+    pcb->sv = 3000 / TCP_SLOW_INTERVAL;
+ 801321c:	68fb      	ldr	r3, [r7, #12]
+ 801321e:	2206      	movs	r2, #6
+ 8013220:	87da      	strh	r2, [r3, #62]	; 0x3e
+    pcb->rtime = -1;
+ 8013222:	68fb      	ldr	r3, [r7, #12]
+ 8013224:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8013228:	861a      	strh	r2, [r3, #48]	; 0x30
+    pcb->cwnd = 1;
+ 801322a:	68fb      	ldr	r3, [r7, #12]
+ 801322c:	2201      	movs	r2, #1
+ 801322e:	f8a3 2048 	strh.w	r2, [r3, #72]	; 0x48
+    pcb->tmr = tcp_ticks;
+ 8013232:	4b0d      	ldr	r3, [pc, #52]	; (8013268 <tcp_alloc+0xf8>)
+ 8013234:	681a      	ldr	r2, [r3, #0]
+ 8013236:	68fb      	ldr	r3, [r7, #12]
+ 8013238:	621a      	str	r2, [r3, #32]
+    pcb->last_timer = tcp_timer_ctr;
+ 801323a:	4b0c      	ldr	r3, [pc, #48]	; (801326c <tcp_alloc+0xfc>)
+ 801323c:	781a      	ldrb	r2, [r3, #0]
+ 801323e:	68fb      	ldr	r3, [r7, #12]
+ 8013240:	779a      	strb	r2, [r3, #30]
+    of using the largest advertised receive window.  We've seen complications with
+    receiving TCPs that use window scaling and/or window auto-tuning where the
+    initial advertised window is very small and then grows rapidly once the
+    connection is established. To avoid these complications, we set ssthresh to the
+    largest effective cwnd (amount of in-flight data) that the sender can have. */
+    pcb->ssthresh = TCP_SND_BUF;
+ 8013242:	68fb      	ldr	r3, [r7, #12]
+ 8013244:	f44f 6286 	mov.w	r2, #1072	; 0x430
+ 8013248:	f8a3 204a 	strh.w	r2, [r3, #74]	; 0x4a
+
+#if LWIP_CALLBACK_API
+    pcb->recv = tcp_recv_null;
+ 801324c:	68fb      	ldr	r3, [r7, #12]
+ 801324e:	4a08      	ldr	r2, [pc, #32]	; (8013270 <tcp_alloc+0x100>)
+ 8013250:	f8c3 2084 	str.w	r2, [r3, #132]	; 0x84
+#endif /* LWIP_CALLBACK_API */
+
+    /* Init KEEPALIVE timer */
+    pcb->keep_idle  = TCP_KEEPIDLE_DEFAULT;
+ 8013254:	68fb      	ldr	r3, [r7, #12]
+ 8013256:	4a07      	ldr	r2, [pc, #28]	; (8013274 <tcp_alloc+0x104>)
+ 8013258:	f8c3 2094 	str.w	r2, [r3, #148]	; 0x94
+#if LWIP_TCP_KEEPALIVE
+    pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT;
+    pcb->keep_cnt   = TCP_KEEPCNT_DEFAULT;
+#endif /* LWIP_TCP_KEEPALIVE */
+  }
+  return pcb;
+ 801325c:	68fb      	ldr	r3, [r7, #12]
+}
+ 801325e:	4618      	mov	r0, r3
+ 8013260:	3710      	adds	r7, #16
+ 8013262:	46bd      	mov	sp, r7
+ 8013264:	bd80      	pop	{r7, pc}
+ 8013266:	bf00      	nop
+ 8013268:	2000f7ec 	.word	0x2000f7ec
+ 801326c:	20008716 	.word	0x20008716
+ 8013270:	08012f29 	.word	0x08012f29
+ 8013274:	006ddd00 	.word	0x006ddd00
+
+08013278 <tcp_pcb_purge>:
+ *
+ * @param pcb tcp_pcb to purge. The pcb itself is not deallocated!
+ */
+void
+tcp_pcb_purge(struct tcp_pcb *pcb)
+{
+ 8013278:	b580      	push	{r7, lr}
+ 801327a:	b082      	sub	sp, #8
+ 801327c:	af00      	add	r7, sp, #0
+ 801327e:	6078      	str	r0, [r7, #4]
+  LWIP_ERROR("tcp_pcb_purge: invalid pcb", pcb != NULL, return);
+ 8013280:	687b      	ldr	r3, [r7, #4]
+ 8013282:	2b00      	cmp	r3, #0
+ 8013284:	d107      	bne.n	8013296 <tcp_pcb_purge+0x1e>
+ 8013286:	4b21      	ldr	r3, [pc, #132]	; (801330c <tcp_pcb_purge+0x94>)
+ 8013288:	f640 0251 	movw	r2, #2129	; 0x851
+ 801328c:	4920      	ldr	r1, [pc, #128]	; (8013310 <tcp_pcb_purge+0x98>)
+ 801328e:	4821      	ldr	r0, [pc, #132]	; (8013314 <tcp_pcb_purge+0x9c>)
+ 8013290:	f009 f8b2 	bl	801c3f8 <iprintf>
+ 8013294:	e037      	b.n	8013306 <tcp_pcb_purge+0x8e>
+
+  if (pcb->state != CLOSED &&
+ 8013296:	687b      	ldr	r3, [r7, #4]
+ 8013298:	7d1b      	ldrb	r3, [r3, #20]
+ 801329a:	2b00      	cmp	r3, #0
+ 801329c:	d033      	beq.n	8013306 <tcp_pcb_purge+0x8e>
+      pcb->state != TIME_WAIT &&
+ 801329e:	687b      	ldr	r3, [r7, #4]
+ 80132a0:	7d1b      	ldrb	r3, [r3, #20]
+  if (pcb->state != CLOSED &&
+ 80132a2:	2b0a      	cmp	r3, #10
+ 80132a4:	d02f      	beq.n	8013306 <tcp_pcb_purge+0x8e>
+      pcb->state != LISTEN) {
+ 80132a6:	687b      	ldr	r3, [r7, #4]
+ 80132a8:	7d1b      	ldrb	r3, [r3, #20]
+      pcb->state != TIME_WAIT &&
+ 80132aa:	2b01      	cmp	r3, #1
+ 80132ac:	d02b      	beq.n	8013306 <tcp_pcb_purge+0x8e>
+
+    LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n"));
+
+    tcp_backlog_accepted(pcb);
+
+    if (pcb->refused_data != NULL) {
+ 80132ae:	687b      	ldr	r3, [r7, #4]
+ 80132b0:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 80132b2:	2b00      	cmp	r3, #0
+ 80132b4:	d007      	beq.n	80132c6 <tcp_pcb_purge+0x4e>
+      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n"));
+      pbuf_free(pcb->refused_data);
+ 80132b6:	687b      	ldr	r3, [r7, #4]
+ 80132b8:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 80132ba:	4618      	mov	r0, r3
+ 80132bc:	f7fe fb6c 	bl	8011998 <pbuf_free>
+      pcb->refused_data = NULL;
+ 80132c0:	687b      	ldr	r3, [r7, #4]
+ 80132c2:	2200      	movs	r2, #0
+ 80132c4:	679a      	str	r2, [r3, #120]	; 0x78
+    }
+    if (pcb->unacked != NULL) {
+      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n"));
+    }
+#if TCP_QUEUE_OOSEQ
+    if (pcb->ooseq != NULL) {
+ 80132c6:	687b      	ldr	r3, [r7, #4]
+ 80132c8:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 80132ca:	2b00      	cmp	r3, #0
+ 80132cc:	d002      	beq.n	80132d4 <tcp_pcb_purge+0x5c>
+      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n"));
+      tcp_free_ooseq(pcb);
+ 80132ce:	6878      	ldr	r0, [r7, #4]
+ 80132d0:	f000 f986 	bl	80135e0 <tcp_free_ooseq>
+    }
+#endif /* TCP_QUEUE_OOSEQ */
+
+    /* Stop the retransmission timer as it will expect data on unacked
+       queue if it fires */
+    pcb->rtime = -1;
+ 80132d4:	687b      	ldr	r3, [r7, #4]
+ 80132d6:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 80132da:	861a      	strh	r2, [r3, #48]	; 0x30
+
+    tcp_segs_free(pcb->unsent);
+ 80132dc:	687b      	ldr	r3, [r7, #4]
+ 80132de:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 80132e0:	4618      	mov	r0, r3
+ 80132e2:	f7ff fdc9 	bl	8012e78 <tcp_segs_free>
+    tcp_segs_free(pcb->unacked);
+ 80132e6:	687b      	ldr	r3, [r7, #4]
+ 80132e8:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80132ea:	4618      	mov	r0, r3
+ 80132ec:	f7ff fdc4 	bl	8012e78 <tcp_segs_free>
+    pcb->unacked = pcb->unsent = NULL;
+ 80132f0:	687b      	ldr	r3, [r7, #4]
+ 80132f2:	2200      	movs	r2, #0
+ 80132f4:	66da      	str	r2, [r3, #108]	; 0x6c
+ 80132f6:	687b      	ldr	r3, [r7, #4]
+ 80132f8:	6eda      	ldr	r2, [r3, #108]	; 0x6c
+ 80132fa:	687b      	ldr	r3, [r7, #4]
+ 80132fc:	671a      	str	r2, [r3, #112]	; 0x70
+#if TCP_OVERSIZE
+    pcb->unsent_oversize = 0;
+ 80132fe:	687b      	ldr	r3, [r7, #4]
+ 8013300:	2200      	movs	r2, #0
+ 8013302:	f8a3 2068 	strh.w	r2, [r3, #104]	; 0x68
+#endif /* TCP_OVERSIZE */
+  }
+}
+ 8013306:	3708      	adds	r7, #8
+ 8013308:	46bd      	mov	sp, r7
+ 801330a:	bd80      	pop	{r7, pc}
+ 801330c:	0801e278 	.word	0x0801e278
+ 8013310:	0801e8c4 	.word	0x0801e8c4
+ 8013314:	0801e2bc 	.word	0x0801e2bc
+
+08013318 <tcp_pcb_remove>:
+ * @param pcblist PCB list to purge.
+ * @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated!
+ */
+void
+tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb)
+{
+ 8013318:	b580      	push	{r7, lr}
+ 801331a:	b084      	sub	sp, #16
+ 801331c:	af00      	add	r7, sp, #0
+ 801331e:	6078      	str	r0, [r7, #4]
+ 8013320:	6039      	str	r1, [r7, #0]
+  LWIP_ASSERT("tcp_pcb_remove: invalid pcb", pcb != NULL);
+ 8013322:	683b      	ldr	r3, [r7, #0]
+ 8013324:	2b00      	cmp	r3, #0
+ 8013326:	d106      	bne.n	8013336 <tcp_pcb_remove+0x1e>
+ 8013328:	4b3e      	ldr	r3, [pc, #248]	; (8013424 <tcp_pcb_remove+0x10c>)
+ 801332a:	f640 0283 	movw	r2, #2179	; 0x883
+ 801332e:	493e      	ldr	r1, [pc, #248]	; (8013428 <tcp_pcb_remove+0x110>)
+ 8013330:	483e      	ldr	r0, [pc, #248]	; (801342c <tcp_pcb_remove+0x114>)
+ 8013332:	f009 f861 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("tcp_pcb_remove: invalid pcblist", pcblist != NULL);
+ 8013336:	687b      	ldr	r3, [r7, #4]
+ 8013338:	2b00      	cmp	r3, #0
+ 801333a:	d106      	bne.n	801334a <tcp_pcb_remove+0x32>
+ 801333c:	4b39      	ldr	r3, [pc, #228]	; (8013424 <tcp_pcb_remove+0x10c>)
+ 801333e:	f640 0284 	movw	r2, #2180	; 0x884
+ 8013342:	493b      	ldr	r1, [pc, #236]	; (8013430 <tcp_pcb_remove+0x118>)
+ 8013344:	4839      	ldr	r0, [pc, #228]	; (801342c <tcp_pcb_remove+0x114>)
+ 8013346:	f009 f857 	bl	801c3f8 <iprintf>
+
+  TCP_RMV(pcblist, pcb);
+ 801334a:	687b      	ldr	r3, [r7, #4]
+ 801334c:	681b      	ldr	r3, [r3, #0]
+ 801334e:	683a      	ldr	r2, [r7, #0]
+ 8013350:	429a      	cmp	r2, r3
+ 8013352:	d105      	bne.n	8013360 <tcp_pcb_remove+0x48>
+ 8013354:	687b      	ldr	r3, [r7, #4]
+ 8013356:	681b      	ldr	r3, [r3, #0]
+ 8013358:	68da      	ldr	r2, [r3, #12]
+ 801335a:	687b      	ldr	r3, [r7, #4]
+ 801335c:	601a      	str	r2, [r3, #0]
+ 801335e:	e013      	b.n	8013388 <tcp_pcb_remove+0x70>
+ 8013360:	687b      	ldr	r3, [r7, #4]
+ 8013362:	681b      	ldr	r3, [r3, #0]
+ 8013364:	60fb      	str	r3, [r7, #12]
+ 8013366:	e00c      	b.n	8013382 <tcp_pcb_remove+0x6a>
+ 8013368:	68fb      	ldr	r3, [r7, #12]
+ 801336a:	68db      	ldr	r3, [r3, #12]
+ 801336c:	683a      	ldr	r2, [r7, #0]
+ 801336e:	429a      	cmp	r2, r3
+ 8013370:	d104      	bne.n	801337c <tcp_pcb_remove+0x64>
+ 8013372:	683b      	ldr	r3, [r7, #0]
+ 8013374:	68da      	ldr	r2, [r3, #12]
+ 8013376:	68fb      	ldr	r3, [r7, #12]
+ 8013378:	60da      	str	r2, [r3, #12]
+ 801337a:	e005      	b.n	8013388 <tcp_pcb_remove+0x70>
+ 801337c:	68fb      	ldr	r3, [r7, #12]
+ 801337e:	68db      	ldr	r3, [r3, #12]
+ 8013380:	60fb      	str	r3, [r7, #12]
+ 8013382:	68fb      	ldr	r3, [r7, #12]
+ 8013384:	2b00      	cmp	r3, #0
+ 8013386:	d1ef      	bne.n	8013368 <tcp_pcb_remove+0x50>
+ 8013388:	683b      	ldr	r3, [r7, #0]
+ 801338a:	2200      	movs	r2, #0
+ 801338c:	60da      	str	r2, [r3, #12]
+
+  tcp_pcb_purge(pcb);
+ 801338e:	6838      	ldr	r0, [r7, #0]
+ 8013390:	f7ff ff72 	bl	8013278 <tcp_pcb_purge>
+
+  /* if there is an outstanding delayed ACKs, send it */
+  if ((pcb->state != TIME_WAIT) &&
+ 8013394:	683b      	ldr	r3, [r7, #0]
+ 8013396:	7d1b      	ldrb	r3, [r3, #20]
+ 8013398:	2b0a      	cmp	r3, #10
+ 801339a:	d013      	beq.n	80133c4 <tcp_pcb_remove+0xac>
+      (pcb->state != LISTEN) &&
+ 801339c:	683b      	ldr	r3, [r7, #0]
+ 801339e:	7d1b      	ldrb	r3, [r3, #20]
+  if ((pcb->state != TIME_WAIT) &&
+ 80133a0:	2b01      	cmp	r3, #1
+ 80133a2:	d00f      	beq.n	80133c4 <tcp_pcb_remove+0xac>
+      (pcb->flags & TF_ACK_DELAY)) {
+ 80133a4:	683b      	ldr	r3, [r7, #0]
+ 80133a6:	8b5b      	ldrh	r3, [r3, #26]
+ 80133a8:	f003 0301 	and.w	r3, r3, #1
+      (pcb->state != LISTEN) &&
+ 80133ac:	2b00      	cmp	r3, #0
+ 80133ae:	d009      	beq.n	80133c4 <tcp_pcb_remove+0xac>
+    tcp_ack_now(pcb);
+ 80133b0:	683b      	ldr	r3, [r7, #0]
+ 80133b2:	8b5b      	ldrh	r3, [r3, #26]
+ 80133b4:	f043 0302 	orr.w	r3, r3, #2
+ 80133b8:	b29a      	uxth	r2, r3
+ 80133ba:	683b      	ldr	r3, [r7, #0]
+ 80133bc:	835a      	strh	r2, [r3, #26]
+    tcp_output(pcb);
+ 80133be:	6838      	ldr	r0, [r7, #0]
+ 80133c0:	f002 ff68 	bl	8016294 <tcp_output>
+  }
+
+  if (pcb->state != LISTEN) {
+ 80133c4:	683b      	ldr	r3, [r7, #0]
+ 80133c6:	7d1b      	ldrb	r3, [r3, #20]
+ 80133c8:	2b01      	cmp	r3, #1
+ 80133ca:	d020      	beq.n	801340e <tcp_pcb_remove+0xf6>
+    LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL);
+ 80133cc:	683b      	ldr	r3, [r7, #0]
+ 80133ce:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 80133d0:	2b00      	cmp	r3, #0
+ 80133d2:	d006      	beq.n	80133e2 <tcp_pcb_remove+0xca>
+ 80133d4:	4b13      	ldr	r3, [pc, #76]	; (8013424 <tcp_pcb_remove+0x10c>)
+ 80133d6:	f640 0293 	movw	r2, #2195	; 0x893
+ 80133da:	4916      	ldr	r1, [pc, #88]	; (8013434 <tcp_pcb_remove+0x11c>)
+ 80133dc:	4813      	ldr	r0, [pc, #76]	; (801342c <tcp_pcb_remove+0x114>)
+ 80133de:	f009 f80b 	bl	801c3f8 <iprintf>
+    LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL);
+ 80133e2:	683b      	ldr	r3, [r7, #0]
+ 80133e4:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80133e6:	2b00      	cmp	r3, #0
+ 80133e8:	d006      	beq.n	80133f8 <tcp_pcb_remove+0xe0>
+ 80133ea:	4b0e      	ldr	r3, [pc, #56]	; (8013424 <tcp_pcb_remove+0x10c>)
+ 80133ec:	f640 0294 	movw	r2, #2196	; 0x894
+ 80133f0:	4911      	ldr	r1, [pc, #68]	; (8013438 <tcp_pcb_remove+0x120>)
+ 80133f2:	480e      	ldr	r0, [pc, #56]	; (801342c <tcp_pcb_remove+0x114>)
+ 80133f4:	f009 f800 	bl	801c3f8 <iprintf>
+#if TCP_QUEUE_OOSEQ
+    LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL);
+ 80133f8:	683b      	ldr	r3, [r7, #0]
+ 80133fa:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 80133fc:	2b00      	cmp	r3, #0
+ 80133fe:	d006      	beq.n	801340e <tcp_pcb_remove+0xf6>
+ 8013400:	4b08      	ldr	r3, [pc, #32]	; (8013424 <tcp_pcb_remove+0x10c>)
+ 8013402:	f640 0296 	movw	r2, #2198	; 0x896
+ 8013406:	490d      	ldr	r1, [pc, #52]	; (801343c <tcp_pcb_remove+0x124>)
+ 8013408:	4808      	ldr	r0, [pc, #32]	; (801342c <tcp_pcb_remove+0x114>)
+ 801340a:	f008 fff5 	bl	801c3f8 <iprintf>
+#endif /* TCP_QUEUE_OOSEQ */
+  }
+
+  pcb->state = CLOSED;
+ 801340e:	683b      	ldr	r3, [r7, #0]
+ 8013410:	2200      	movs	r2, #0
+ 8013412:	751a      	strb	r2, [r3, #20]
+  /* reset the local port to prevent the pcb from being 'bound' */
+  pcb->local_port = 0;
+ 8013414:	683b      	ldr	r3, [r7, #0]
+ 8013416:	2200      	movs	r2, #0
+ 8013418:	82da      	strh	r2, [r3, #22]
+
+  LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane());
+}
+ 801341a:	bf00      	nop
+ 801341c:	3710      	adds	r7, #16
+ 801341e:	46bd      	mov	sp, r7
+ 8013420:	bd80      	pop	{r7, pc}
+ 8013422:	bf00      	nop
+ 8013424:	0801e278 	.word	0x0801e278
+ 8013428:	0801e8e0 	.word	0x0801e8e0
+ 801342c:	0801e2bc 	.word	0x0801e2bc
+ 8013430:	0801e8fc 	.word	0x0801e8fc
+ 8013434:	0801e91c 	.word	0x0801e91c
+ 8013438:	0801e934 	.word	0x0801e934
+ 801343c:	0801e950 	.word	0x0801e950
+
+08013440 <tcp_next_iss>:
+ *
+ * @return u32_t pseudo random sequence number
+ */
+u32_t
+tcp_next_iss(struct tcp_pcb *pcb)
+{
+ 8013440:	b580      	push	{r7, lr}
+ 8013442:	b082      	sub	sp, #8
+ 8013444:	af00      	add	r7, sp, #0
+ 8013446:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
+  return LWIP_HOOK_TCP_ISN(&pcb->local_ip, pcb->local_port, &pcb->remote_ip, pcb->remote_port);
+#else /* LWIP_HOOK_TCP_ISN */
+  static u32_t iss = 6510;
+
+  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
+ 8013448:	687b      	ldr	r3, [r7, #4]
+ 801344a:	2b00      	cmp	r3, #0
+ 801344c:	d106      	bne.n	801345c <tcp_next_iss+0x1c>
+ 801344e:	4b0a      	ldr	r3, [pc, #40]	; (8013478 <tcp_next_iss+0x38>)
+ 8013450:	f640 02af 	movw	r2, #2223	; 0x8af
+ 8013454:	4909      	ldr	r1, [pc, #36]	; (801347c <tcp_next_iss+0x3c>)
+ 8013456:	480a      	ldr	r0, [pc, #40]	; (8013480 <tcp_next_iss+0x40>)
+ 8013458:	f008 ffce 	bl	801c3f8 <iprintf>
+  LWIP_UNUSED_ARG(pcb);
+
+  iss += tcp_ticks;       /* XXX */
+ 801345c:	4b09      	ldr	r3, [pc, #36]	; (8013484 <tcp_next_iss+0x44>)
+ 801345e:	681a      	ldr	r2, [r3, #0]
+ 8013460:	4b09      	ldr	r3, [pc, #36]	; (8013488 <tcp_next_iss+0x48>)
+ 8013462:	681b      	ldr	r3, [r3, #0]
+ 8013464:	4413      	add	r3, r2
+ 8013466:	4a07      	ldr	r2, [pc, #28]	; (8013484 <tcp_next_iss+0x44>)
+ 8013468:	6013      	str	r3, [r2, #0]
+  return iss;
+ 801346a:	4b06      	ldr	r3, [pc, #24]	; (8013484 <tcp_next_iss+0x44>)
+ 801346c:	681b      	ldr	r3, [r3, #0]
+#endif /* LWIP_HOOK_TCP_ISN */
+}
+ 801346e:	4618      	mov	r0, r3
+ 8013470:	3708      	adds	r7, #8
+ 8013472:	46bd      	mov	sp, r7
+ 8013474:	bd80      	pop	{r7, pc}
+ 8013476:	bf00      	nop
+ 8013478:	0801e278 	.word	0x0801e278
+ 801347c:	0801e968 	.word	0x0801e968
+ 8013480:	0801e2bc 	.word	0x0801e2bc
+ 8013484:	20000064 	.word	0x20000064
+ 8013488:	2000f7ec 	.word	0x2000f7ec
+
+0801348c <tcp_eff_send_mss_netif>:
+ * by calculating the minimum of TCP_MSS and the mtu (if set) of the target
+ * netif (if not NULL).
+ */
+u16_t
+tcp_eff_send_mss_netif(u16_t sendmss, struct netif *outif, const ip_addr_t *dest)
+{
+ 801348c:	b580      	push	{r7, lr}
+ 801348e:	b086      	sub	sp, #24
+ 8013490:	af00      	add	r7, sp, #0
+ 8013492:	4603      	mov	r3, r0
+ 8013494:	60b9      	str	r1, [r7, #8]
+ 8013496:	607a      	str	r2, [r7, #4]
+ 8013498:	81fb      	strh	r3, [r7, #14]
+  u16_t mss_s;
+  u16_t mtu;
+
+  LWIP_UNUSED_ARG(dest); /* in case IPv6 is disabled */
+
+  LWIP_ASSERT("tcp_eff_send_mss_netif: invalid dst_ip", dest != NULL);
+ 801349a:	687b      	ldr	r3, [r7, #4]
+ 801349c:	2b00      	cmp	r3, #0
+ 801349e:	d106      	bne.n	80134ae <tcp_eff_send_mss_netif+0x22>
+ 80134a0:	4b14      	ldr	r3, [pc, #80]	; (80134f4 <tcp_eff_send_mss_netif+0x68>)
+ 80134a2:	f640 02c5 	movw	r2, #2245	; 0x8c5
+ 80134a6:	4914      	ldr	r1, [pc, #80]	; (80134f8 <tcp_eff_send_mss_netif+0x6c>)
+ 80134a8:	4814      	ldr	r0, [pc, #80]	; (80134fc <tcp_eff_send_mss_netif+0x70>)
+ 80134aa:	f008 ffa5 	bl	801c3f8 <iprintf>
+  else
+#endif /* LWIP_IPV4 */
+#endif /* LWIP_IPV6 */
+#if LWIP_IPV4
+  {
+    if (outif == NULL) {
+ 80134ae:	68bb      	ldr	r3, [r7, #8]
+ 80134b0:	2b00      	cmp	r3, #0
+ 80134b2:	d101      	bne.n	80134b8 <tcp_eff_send_mss_netif+0x2c>
+      return sendmss;
+ 80134b4:	89fb      	ldrh	r3, [r7, #14]
+ 80134b6:	e019      	b.n	80134ec <tcp_eff_send_mss_netif+0x60>
+    }
+    mtu = outif->mtu;
+ 80134b8:	68bb      	ldr	r3, [r7, #8]
+ 80134ba:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 80134bc:	82fb      	strh	r3, [r7, #22]
+  }
+#endif /* LWIP_IPV4 */
+
+  if (mtu != 0) {
+ 80134be:	8afb      	ldrh	r3, [r7, #22]
+ 80134c0:	2b00      	cmp	r3, #0
+ 80134c2:	d012      	beq.n	80134ea <tcp_eff_send_mss_netif+0x5e>
+    else
+#endif /* LWIP_IPV4 */
+#endif /* LWIP_IPV6 */
+#if LWIP_IPV4
+    {
+      offset = IP_HLEN + TCP_HLEN;
+ 80134c4:	2328      	movs	r3, #40	; 0x28
+ 80134c6:	82bb      	strh	r3, [r7, #20]
+    }
+#endif /* LWIP_IPV4 */
+    mss_s = (mtu > offset) ? (u16_t)(mtu - offset) : 0;
+ 80134c8:	8afa      	ldrh	r2, [r7, #22]
+ 80134ca:	8abb      	ldrh	r3, [r7, #20]
+ 80134cc:	429a      	cmp	r2, r3
+ 80134ce:	d904      	bls.n	80134da <tcp_eff_send_mss_netif+0x4e>
+ 80134d0:	8afa      	ldrh	r2, [r7, #22]
+ 80134d2:	8abb      	ldrh	r3, [r7, #20]
+ 80134d4:	1ad3      	subs	r3, r2, r3
+ 80134d6:	b29b      	uxth	r3, r3
+ 80134d8:	e000      	b.n	80134dc <tcp_eff_send_mss_netif+0x50>
+ 80134da:	2300      	movs	r3, #0
+ 80134dc:	827b      	strh	r3, [r7, #18]
+    /* RFC 1122, chap 4.2.2.6:
+     * Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize
+     * We correct for TCP options in tcp_write(), and don't support IP options.
+     */
+    sendmss = LWIP_MIN(sendmss, mss_s);
+ 80134de:	8a7a      	ldrh	r2, [r7, #18]
+ 80134e0:	89fb      	ldrh	r3, [r7, #14]
+ 80134e2:	4293      	cmp	r3, r2
+ 80134e4:	bf28      	it	cs
+ 80134e6:	4613      	movcs	r3, r2
+ 80134e8:	81fb      	strh	r3, [r7, #14]
+  }
+  return sendmss;
+ 80134ea:	89fb      	ldrh	r3, [r7, #14]
+}
+ 80134ec:	4618      	mov	r0, r3
+ 80134ee:	3718      	adds	r7, #24
+ 80134f0:	46bd      	mov	sp, r7
+ 80134f2:	bd80      	pop	{r7, pc}
+ 80134f4:	0801e278 	.word	0x0801e278
+ 80134f8:	0801e984 	.word	0x0801e984
+ 80134fc:	0801e2bc 	.word	0x0801e2bc
+
+08013500 <tcp_netif_ip_addr_changed_pcblist>:
+#endif /* TCP_CALCULATE_EFF_SEND_MSS */
+
+/** Helper function for tcp_netif_ip_addr_changed() that iterates a pcb list */
+static void
+tcp_netif_ip_addr_changed_pcblist(const ip_addr_t *old_addr, struct tcp_pcb *pcb_list)
+{
+ 8013500:	b580      	push	{r7, lr}
+ 8013502:	b084      	sub	sp, #16
+ 8013504:	af00      	add	r7, sp, #0
+ 8013506:	6078      	str	r0, [r7, #4]
+ 8013508:	6039      	str	r1, [r7, #0]
+  struct tcp_pcb *pcb;
+  pcb = pcb_list;
+ 801350a:	683b      	ldr	r3, [r7, #0]
+ 801350c:	60fb      	str	r3, [r7, #12]
+
+  LWIP_ASSERT("tcp_netif_ip_addr_changed_pcblist: invalid old_addr", old_addr != NULL);
+ 801350e:	687b      	ldr	r3, [r7, #4]
+ 8013510:	2b00      	cmp	r3, #0
+ 8013512:	d119      	bne.n	8013548 <tcp_netif_ip_addr_changed_pcblist+0x48>
+ 8013514:	4b10      	ldr	r3, [pc, #64]	; (8013558 <tcp_netif_ip_addr_changed_pcblist+0x58>)
+ 8013516:	f44f 6210 	mov.w	r2, #2304	; 0x900
+ 801351a:	4910      	ldr	r1, [pc, #64]	; (801355c <tcp_netif_ip_addr_changed_pcblist+0x5c>)
+ 801351c:	4810      	ldr	r0, [pc, #64]	; (8013560 <tcp_netif_ip_addr_changed_pcblist+0x60>)
+ 801351e:	f008 ff6b 	bl	801c3f8 <iprintf>
+
+  while (pcb != NULL) {
+ 8013522:	e011      	b.n	8013548 <tcp_netif_ip_addr_changed_pcblist+0x48>
+    /* PCB bound to current local interface address? */
+    if (ip_addr_cmp(&pcb->local_ip, old_addr)
+ 8013524:	68fb      	ldr	r3, [r7, #12]
+ 8013526:	681a      	ldr	r2, [r3, #0]
+ 8013528:	687b      	ldr	r3, [r7, #4]
+ 801352a:	681b      	ldr	r3, [r3, #0]
+ 801352c:	429a      	cmp	r2, r3
+ 801352e:	d108      	bne.n	8013542 <tcp_netif_ip_addr_changed_pcblist+0x42>
+        /* connections to link-local addresses must persist (RFC3927 ch. 1.9) */
+        && (!IP_IS_V4_VAL(pcb->local_ip) || !ip4_addr_islinklocal(ip_2_ip4(&pcb->local_ip)))
+#endif /* LWIP_AUTOIP */
+       ) {
+      /* this connection must be aborted */
+      struct tcp_pcb *next = pcb->next;
+ 8013530:	68fb      	ldr	r3, [r7, #12]
+ 8013532:	68db      	ldr	r3, [r3, #12]
+ 8013534:	60bb      	str	r3, [r7, #8]
+      LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb));
+      tcp_abort(pcb);
+ 8013536:	68f8      	ldr	r0, [r7, #12]
+ 8013538:	f7fe ffca 	bl	80124d0 <tcp_abort>
+      pcb = next;
+ 801353c:	68bb      	ldr	r3, [r7, #8]
+ 801353e:	60fb      	str	r3, [r7, #12]
+ 8013540:	e002      	b.n	8013548 <tcp_netif_ip_addr_changed_pcblist+0x48>
+    } else {
+      pcb = pcb->next;
+ 8013542:	68fb      	ldr	r3, [r7, #12]
+ 8013544:	68db      	ldr	r3, [r3, #12]
+ 8013546:	60fb      	str	r3, [r7, #12]
+  while (pcb != NULL) {
+ 8013548:	68fb      	ldr	r3, [r7, #12]
+ 801354a:	2b00      	cmp	r3, #0
+ 801354c:	d1ea      	bne.n	8013524 <tcp_netif_ip_addr_changed_pcblist+0x24>
+    }
+  }
+}
+ 801354e:	bf00      	nop
+ 8013550:	3710      	adds	r7, #16
+ 8013552:	46bd      	mov	sp, r7
+ 8013554:	bd80      	pop	{r7, pc}
+ 8013556:	bf00      	nop
+ 8013558:	0801e278 	.word	0x0801e278
+ 801355c:	0801e9ac 	.word	0x0801e9ac
+ 8013560:	0801e2bc 	.word	0x0801e2bc
+
+08013564 <tcp_netif_ip_addr_changed>:
+ * @param old_addr IP address of the netif before change
+ * @param new_addr IP address of the netif after change or NULL if netif has been removed
+ */
+void
+tcp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
+{
+ 8013564:	b580      	push	{r7, lr}
+ 8013566:	b084      	sub	sp, #16
+ 8013568:	af00      	add	r7, sp, #0
+ 801356a:	6078      	str	r0, [r7, #4]
+ 801356c:	6039      	str	r1, [r7, #0]
+  struct tcp_pcb_listen *lpcb;
+
+  if (!ip_addr_isany(old_addr)) {
+ 801356e:	687b      	ldr	r3, [r7, #4]
+ 8013570:	2b00      	cmp	r3, #0
+ 8013572:	d02a      	beq.n	80135ca <tcp_netif_ip_addr_changed+0x66>
+ 8013574:	687b      	ldr	r3, [r7, #4]
+ 8013576:	681b      	ldr	r3, [r3, #0]
+ 8013578:	2b00      	cmp	r3, #0
+ 801357a:	d026      	beq.n	80135ca <tcp_netif_ip_addr_changed+0x66>
+    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_active_pcbs);
+ 801357c:	4b15      	ldr	r3, [pc, #84]	; (80135d4 <tcp_netif_ip_addr_changed+0x70>)
+ 801357e:	681b      	ldr	r3, [r3, #0]
+ 8013580:	4619      	mov	r1, r3
+ 8013582:	6878      	ldr	r0, [r7, #4]
+ 8013584:	f7ff ffbc 	bl	8013500 <tcp_netif_ip_addr_changed_pcblist>
+    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_bound_pcbs);
+ 8013588:	4b13      	ldr	r3, [pc, #76]	; (80135d8 <tcp_netif_ip_addr_changed+0x74>)
+ 801358a:	681b      	ldr	r3, [r3, #0]
+ 801358c:	4619      	mov	r1, r3
+ 801358e:	6878      	ldr	r0, [r7, #4]
+ 8013590:	f7ff ffb6 	bl	8013500 <tcp_netif_ip_addr_changed_pcblist>
+
+    if (!ip_addr_isany(new_addr)) {
+ 8013594:	683b      	ldr	r3, [r7, #0]
+ 8013596:	2b00      	cmp	r3, #0
+ 8013598:	d017      	beq.n	80135ca <tcp_netif_ip_addr_changed+0x66>
+ 801359a:	683b      	ldr	r3, [r7, #0]
+ 801359c:	681b      	ldr	r3, [r3, #0]
+ 801359e:	2b00      	cmp	r3, #0
+ 80135a0:	d013      	beq.n	80135ca <tcp_netif_ip_addr_changed+0x66>
+      /* PCB bound to current local interface address? */
+      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
+ 80135a2:	4b0e      	ldr	r3, [pc, #56]	; (80135dc <tcp_netif_ip_addr_changed+0x78>)
+ 80135a4:	681b      	ldr	r3, [r3, #0]
+ 80135a6:	60fb      	str	r3, [r7, #12]
+ 80135a8:	e00c      	b.n	80135c4 <tcp_netif_ip_addr_changed+0x60>
+        /* PCB bound to current local interface address? */
+        if (ip_addr_cmp(&lpcb->local_ip, old_addr)) {
+ 80135aa:	68fb      	ldr	r3, [r7, #12]
+ 80135ac:	681a      	ldr	r2, [r3, #0]
+ 80135ae:	687b      	ldr	r3, [r7, #4]
+ 80135b0:	681b      	ldr	r3, [r3, #0]
+ 80135b2:	429a      	cmp	r2, r3
+ 80135b4:	d103      	bne.n	80135be <tcp_netif_ip_addr_changed+0x5a>
+          /* The PCB is listening to the old ipaddr and
+            * is set to listen to the new one instead */
+          ip_addr_copy(lpcb->local_ip, *new_addr);
+ 80135b6:	683b      	ldr	r3, [r7, #0]
+ 80135b8:	681a      	ldr	r2, [r3, #0]
+ 80135ba:	68fb      	ldr	r3, [r7, #12]
+ 80135bc:	601a      	str	r2, [r3, #0]
+      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
+ 80135be:	68fb      	ldr	r3, [r7, #12]
+ 80135c0:	68db      	ldr	r3, [r3, #12]
+ 80135c2:	60fb      	str	r3, [r7, #12]
+ 80135c4:	68fb      	ldr	r3, [r7, #12]
+ 80135c6:	2b00      	cmp	r3, #0
+ 80135c8:	d1ef      	bne.n	80135aa <tcp_netif_ip_addr_changed+0x46>
+        }
+      }
+    }
+  }
+}
+ 80135ca:	bf00      	nop
+ 80135cc:	3710      	adds	r7, #16
+ 80135ce:	46bd      	mov	sp, r7
+ 80135d0:	bd80      	pop	{r7, pc}
+ 80135d2:	bf00      	nop
+ 80135d4:	2000f7e8 	.word	0x2000f7e8
+ 80135d8:	2000f7f4 	.word	0x2000f7f4
+ 80135dc:	2000f7f0 	.word	0x2000f7f0
+
+080135e0 <tcp_free_ooseq>:
+
+#if TCP_QUEUE_OOSEQ
+/* Free all ooseq pbufs (and possibly reset SACK state) */
+void
+tcp_free_ooseq(struct tcp_pcb *pcb)
+{
+ 80135e0:	b580      	push	{r7, lr}
+ 80135e2:	b082      	sub	sp, #8
+ 80135e4:	af00      	add	r7, sp, #0
+ 80135e6:	6078      	str	r0, [r7, #4]
+  if (pcb->ooseq) {
+ 80135e8:	687b      	ldr	r3, [r7, #4]
+ 80135ea:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 80135ec:	2b00      	cmp	r3, #0
+ 80135ee:	d007      	beq.n	8013600 <tcp_free_ooseq+0x20>
+    tcp_segs_free(pcb->ooseq);
+ 80135f0:	687b      	ldr	r3, [r7, #4]
+ 80135f2:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 80135f4:	4618      	mov	r0, r3
+ 80135f6:	f7ff fc3f 	bl	8012e78 <tcp_segs_free>
+    pcb->ooseq = NULL;
+ 80135fa:	687b      	ldr	r3, [r7, #4]
+ 80135fc:	2200      	movs	r2, #0
+ 80135fe:	675a      	str	r2, [r3, #116]	; 0x74
+#if LWIP_TCP_SACK_OUT
+    memset(pcb->rcv_sacks, 0, sizeof(pcb->rcv_sacks));
+#endif /* LWIP_TCP_SACK_OUT */
+  }
+}
+ 8013600:	bf00      	nop
+ 8013602:	3708      	adds	r7, #8
+ 8013604:	46bd      	mov	sp, r7
+ 8013606:	bd80      	pop	{r7, pc}
+
+08013608 <tcp_input>:
+ * @param p received TCP segment to process (p->payload pointing to the TCP header)
+ * @param inp network interface on which this segment was received
+ */
+void
+tcp_input(struct pbuf *p, struct netif *inp)
+{
+ 8013608:	b590      	push	{r4, r7, lr}
+ 801360a:	b08d      	sub	sp, #52	; 0x34
+ 801360c:	af04      	add	r7, sp, #16
+ 801360e:	6078      	str	r0, [r7, #4]
+ 8013610:	6039      	str	r1, [r7, #0]
+  u8_t hdrlen_bytes;
+  err_t err;
+
+  LWIP_UNUSED_ARG(inp);
+  LWIP_ASSERT_CORE_LOCKED();
+  LWIP_ASSERT("tcp_input: invalid pbuf", p != NULL);
+ 8013612:	687b      	ldr	r3, [r7, #4]
+ 8013614:	2b00      	cmp	r3, #0
+ 8013616:	d105      	bne.n	8013624 <tcp_input+0x1c>
+ 8013618:	4b9b      	ldr	r3, [pc, #620]	; (8013888 <tcp_input+0x280>)
+ 801361a:	2283      	movs	r2, #131	; 0x83
+ 801361c:	499b      	ldr	r1, [pc, #620]	; (801388c <tcp_input+0x284>)
+ 801361e:	489c      	ldr	r0, [pc, #624]	; (8013890 <tcp_input+0x288>)
+ 8013620:	f008 feea 	bl	801c3f8 <iprintf>
+  PERF_START;
+
+  TCP_STATS_INC(tcp.recv);
+  MIB2_STATS_INC(mib2.tcpinsegs);
+
+  tcphdr = (struct tcp_hdr *)p->payload;
+ 8013624:	687b      	ldr	r3, [r7, #4]
+ 8013626:	685b      	ldr	r3, [r3, #4]
+ 8013628:	4a9a      	ldr	r2, [pc, #616]	; (8013894 <tcp_input+0x28c>)
+ 801362a:	6013      	str	r3, [r2, #0]
+#if TCP_INPUT_DEBUG
+  tcp_debug_print(tcphdr);
+#endif
+
+  /* Check that TCP header fits in payload */
+  if (p->len < TCP_HLEN) {
+ 801362c:	687b      	ldr	r3, [r7, #4]
+ 801362e:	895b      	ldrh	r3, [r3, #10]
+ 8013630:	2b13      	cmp	r3, #19
+ 8013632:	f240 83c4 	bls.w	8013dbe <tcp_input+0x7b6>
+    TCP_STATS_INC(tcp.lenerr);
+    goto dropped;
+  }
+
+  /* Don't even process incoming broadcasts/multicasts. */
+  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
+ 8013636:	4b98      	ldr	r3, [pc, #608]	; (8013898 <tcp_input+0x290>)
+ 8013638:	695a      	ldr	r2, [r3, #20]
+ 801363a:	4b97      	ldr	r3, [pc, #604]	; (8013898 <tcp_input+0x290>)
+ 801363c:	681b      	ldr	r3, [r3, #0]
+ 801363e:	4619      	mov	r1, r3
+ 8013640:	4610      	mov	r0, r2
+ 8013642:	f007 fe17 	bl	801b274 <ip4_addr_isbroadcast_u32>
+ 8013646:	4603      	mov	r3, r0
+ 8013648:	2b00      	cmp	r3, #0
+ 801364a:	f040 83ba 	bne.w	8013dc2 <tcp_input+0x7ba>
+      ip_addr_ismulticast(ip_current_dest_addr())) {
+ 801364e:	4b92      	ldr	r3, [pc, #584]	; (8013898 <tcp_input+0x290>)
+ 8013650:	695b      	ldr	r3, [r3, #20]
+ 8013652:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
+  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
+ 8013656:	2be0      	cmp	r3, #224	; 0xe0
+ 8013658:	f000 83b3 	beq.w	8013dc2 <tcp_input+0x7ba>
+    }
+  }
+#endif /* CHECKSUM_CHECK_TCP */
+
+  /* sanity-check header length */
+  hdrlen_bytes = TCPH_HDRLEN_BYTES(tcphdr);
+ 801365c:	4b8d      	ldr	r3, [pc, #564]	; (8013894 <tcp_input+0x28c>)
+ 801365e:	681b      	ldr	r3, [r3, #0]
+ 8013660:	899b      	ldrh	r3, [r3, #12]
+ 8013662:	b29b      	uxth	r3, r3
+ 8013664:	4618      	mov	r0, r3
+ 8013666:	f7fc fde3 	bl	8010230 <lwip_htons>
+ 801366a:	4603      	mov	r3, r0
+ 801366c:	0b1b      	lsrs	r3, r3, #12
+ 801366e:	b29b      	uxth	r3, r3
+ 8013670:	b2db      	uxtb	r3, r3
+ 8013672:	009b      	lsls	r3, r3, #2
+ 8013674:	74bb      	strb	r3, [r7, #18]
+  if ((hdrlen_bytes < TCP_HLEN) || (hdrlen_bytes > p->tot_len)) {
+ 8013676:	7cbb      	ldrb	r3, [r7, #18]
+ 8013678:	2b13      	cmp	r3, #19
+ 801367a:	f240 83a2 	bls.w	8013dc2 <tcp_input+0x7ba>
+ 801367e:	7cbb      	ldrb	r3, [r7, #18]
+ 8013680:	b29a      	uxth	r2, r3
+ 8013682:	687b      	ldr	r3, [r7, #4]
+ 8013684:	891b      	ldrh	r3, [r3, #8]
+ 8013686:	429a      	cmp	r2, r3
+ 8013688:	f200 839b 	bhi.w	8013dc2 <tcp_input+0x7ba>
+    goto dropped;
+  }
+
+  /* Move the payload pointer in the pbuf so that it points to the
+     TCP data instead of the TCP header. */
+  tcphdr_optlen = (u16_t)(hdrlen_bytes - TCP_HLEN);
+ 801368c:	7cbb      	ldrb	r3, [r7, #18]
+ 801368e:	b29b      	uxth	r3, r3
+ 8013690:	3b14      	subs	r3, #20
+ 8013692:	b29a      	uxth	r2, r3
+ 8013694:	4b81      	ldr	r3, [pc, #516]	; (801389c <tcp_input+0x294>)
+ 8013696:	801a      	strh	r2, [r3, #0]
+  tcphdr_opt2 = NULL;
+ 8013698:	4b81      	ldr	r3, [pc, #516]	; (80138a0 <tcp_input+0x298>)
+ 801369a:	2200      	movs	r2, #0
+ 801369c:	601a      	str	r2, [r3, #0]
+  if (p->len >= hdrlen_bytes) {
+ 801369e:	687b      	ldr	r3, [r7, #4]
+ 80136a0:	895a      	ldrh	r2, [r3, #10]
+ 80136a2:	7cbb      	ldrb	r3, [r7, #18]
+ 80136a4:	b29b      	uxth	r3, r3
+ 80136a6:	429a      	cmp	r2, r3
+ 80136a8:	d309      	bcc.n	80136be <tcp_input+0xb6>
+    /* all options are in the first pbuf */
+    tcphdr_opt1len = tcphdr_optlen;
+ 80136aa:	4b7c      	ldr	r3, [pc, #496]	; (801389c <tcp_input+0x294>)
+ 80136ac:	881a      	ldrh	r2, [r3, #0]
+ 80136ae:	4b7d      	ldr	r3, [pc, #500]	; (80138a4 <tcp_input+0x29c>)
+ 80136b0:	801a      	strh	r2, [r3, #0]
+    pbuf_remove_header(p, hdrlen_bytes); /* cannot fail */
+ 80136b2:	7cbb      	ldrb	r3, [r7, #18]
+ 80136b4:	4619      	mov	r1, r3
+ 80136b6:	6878      	ldr	r0, [r7, #4]
+ 80136b8:	f7fe f8e8 	bl	801188c <pbuf_remove_header>
+ 80136bc:	e04e      	b.n	801375c <tcp_input+0x154>
+  } else {
+    u16_t opt2len;
+    /* TCP header fits into first pbuf, options don't - data is in the next pbuf */
+    /* there must be a next pbuf, due to hdrlen_bytes sanity check above */
+    LWIP_ASSERT("p->next != NULL", p->next != NULL);
+ 80136be:	687b      	ldr	r3, [r7, #4]
+ 80136c0:	681b      	ldr	r3, [r3, #0]
+ 80136c2:	2b00      	cmp	r3, #0
+ 80136c4:	d105      	bne.n	80136d2 <tcp_input+0xca>
+ 80136c6:	4b70      	ldr	r3, [pc, #448]	; (8013888 <tcp_input+0x280>)
+ 80136c8:	22c2      	movs	r2, #194	; 0xc2
+ 80136ca:	4977      	ldr	r1, [pc, #476]	; (80138a8 <tcp_input+0x2a0>)
+ 80136cc:	4870      	ldr	r0, [pc, #448]	; (8013890 <tcp_input+0x288>)
+ 80136ce:	f008 fe93 	bl	801c3f8 <iprintf>
+
+    /* advance over the TCP header (cannot fail) */
+    pbuf_remove_header(p, TCP_HLEN);
+ 80136d2:	2114      	movs	r1, #20
+ 80136d4:	6878      	ldr	r0, [r7, #4]
+ 80136d6:	f7fe f8d9 	bl	801188c <pbuf_remove_header>
+
+    /* determine how long the first and second parts of the options are */
+    tcphdr_opt1len = p->len;
+ 80136da:	687b      	ldr	r3, [r7, #4]
+ 80136dc:	895a      	ldrh	r2, [r3, #10]
+ 80136de:	4b71      	ldr	r3, [pc, #452]	; (80138a4 <tcp_input+0x29c>)
+ 80136e0:	801a      	strh	r2, [r3, #0]
+    opt2len = (u16_t)(tcphdr_optlen - tcphdr_opt1len);
+ 80136e2:	4b6e      	ldr	r3, [pc, #440]	; (801389c <tcp_input+0x294>)
+ 80136e4:	881a      	ldrh	r2, [r3, #0]
+ 80136e6:	4b6f      	ldr	r3, [pc, #444]	; (80138a4 <tcp_input+0x29c>)
+ 80136e8:	881b      	ldrh	r3, [r3, #0]
+ 80136ea:	1ad3      	subs	r3, r2, r3
+ 80136ec:	823b      	strh	r3, [r7, #16]
+
+    /* options continue in the next pbuf: set p to zero length and hide the
+        options in the next pbuf (adjusting p->tot_len) */
+    pbuf_remove_header(p, tcphdr_opt1len);
+ 80136ee:	4b6d      	ldr	r3, [pc, #436]	; (80138a4 <tcp_input+0x29c>)
+ 80136f0:	881b      	ldrh	r3, [r3, #0]
+ 80136f2:	4619      	mov	r1, r3
+ 80136f4:	6878      	ldr	r0, [r7, #4]
+ 80136f6:	f7fe f8c9 	bl	801188c <pbuf_remove_header>
+
+    /* check that the options fit in the second pbuf */
+    if (opt2len > p->next->len) {
+ 80136fa:	687b      	ldr	r3, [r7, #4]
+ 80136fc:	681b      	ldr	r3, [r3, #0]
+ 80136fe:	895b      	ldrh	r3, [r3, #10]
+ 8013700:	8a3a      	ldrh	r2, [r7, #16]
+ 8013702:	429a      	cmp	r2, r3
+ 8013704:	f200 835f 	bhi.w	8013dc6 <tcp_input+0x7be>
+      TCP_STATS_INC(tcp.lenerr);
+      goto dropped;
+    }
+
+    /* remember the pointer to the second part of the options */
+    tcphdr_opt2 = (u8_t *)p->next->payload;
+ 8013708:	687b      	ldr	r3, [r7, #4]
+ 801370a:	681b      	ldr	r3, [r3, #0]
+ 801370c:	685b      	ldr	r3, [r3, #4]
+ 801370e:	4a64      	ldr	r2, [pc, #400]	; (80138a0 <tcp_input+0x298>)
+ 8013710:	6013      	str	r3, [r2, #0]
+
+    /* advance p->next to point after the options, and manually
+        adjust p->tot_len to keep it consistent with the changed p->next */
+    pbuf_remove_header(p->next, opt2len);
+ 8013712:	687b      	ldr	r3, [r7, #4]
+ 8013714:	681b      	ldr	r3, [r3, #0]
+ 8013716:	8a3a      	ldrh	r2, [r7, #16]
+ 8013718:	4611      	mov	r1, r2
+ 801371a:	4618      	mov	r0, r3
+ 801371c:	f7fe f8b6 	bl	801188c <pbuf_remove_header>
+    p->tot_len = (u16_t)(p->tot_len - opt2len);
+ 8013720:	687b      	ldr	r3, [r7, #4]
+ 8013722:	891a      	ldrh	r2, [r3, #8]
+ 8013724:	8a3b      	ldrh	r3, [r7, #16]
+ 8013726:	1ad3      	subs	r3, r2, r3
+ 8013728:	b29a      	uxth	r2, r3
+ 801372a:	687b      	ldr	r3, [r7, #4]
+ 801372c:	811a      	strh	r2, [r3, #8]
+
+    LWIP_ASSERT("p->len == 0", p->len == 0);
+ 801372e:	687b      	ldr	r3, [r7, #4]
+ 8013730:	895b      	ldrh	r3, [r3, #10]
+ 8013732:	2b00      	cmp	r3, #0
+ 8013734:	d005      	beq.n	8013742 <tcp_input+0x13a>
+ 8013736:	4b54      	ldr	r3, [pc, #336]	; (8013888 <tcp_input+0x280>)
+ 8013738:	22df      	movs	r2, #223	; 0xdf
+ 801373a:	495c      	ldr	r1, [pc, #368]	; (80138ac <tcp_input+0x2a4>)
+ 801373c:	4854      	ldr	r0, [pc, #336]	; (8013890 <tcp_input+0x288>)
+ 801373e:	f008 fe5b 	bl	801c3f8 <iprintf>
+    LWIP_ASSERT("p->tot_len == p->next->tot_len", p->tot_len == p->next->tot_len);
+ 8013742:	687b      	ldr	r3, [r7, #4]
+ 8013744:	891a      	ldrh	r2, [r3, #8]
+ 8013746:	687b      	ldr	r3, [r7, #4]
+ 8013748:	681b      	ldr	r3, [r3, #0]
+ 801374a:	891b      	ldrh	r3, [r3, #8]
+ 801374c:	429a      	cmp	r2, r3
+ 801374e:	d005      	beq.n	801375c <tcp_input+0x154>
+ 8013750:	4b4d      	ldr	r3, [pc, #308]	; (8013888 <tcp_input+0x280>)
+ 8013752:	22e0      	movs	r2, #224	; 0xe0
+ 8013754:	4956      	ldr	r1, [pc, #344]	; (80138b0 <tcp_input+0x2a8>)
+ 8013756:	484e      	ldr	r0, [pc, #312]	; (8013890 <tcp_input+0x288>)
+ 8013758:	f008 fe4e 	bl	801c3f8 <iprintf>
+  }
+
+  /* Convert fields in TCP header to host byte order. */
+  tcphdr->src = lwip_ntohs(tcphdr->src);
+ 801375c:	4b4d      	ldr	r3, [pc, #308]	; (8013894 <tcp_input+0x28c>)
+ 801375e:	681b      	ldr	r3, [r3, #0]
+ 8013760:	881b      	ldrh	r3, [r3, #0]
+ 8013762:	b29a      	uxth	r2, r3
+ 8013764:	4b4b      	ldr	r3, [pc, #300]	; (8013894 <tcp_input+0x28c>)
+ 8013766:	681c      	ldr	r4, [r3, #0]
+ 8013768:	4610      	mov	r0, r2
+ 801376a:	f7fc fd61 	bl	8010230 <lwip_htons>
+ 801376e:	4603      	mov	r3, r0
+ 8013770:	8023      	strh	r3, [r4, #0]
+  tcphdr->dest = lwip_ntohs(tcphdr->dest);
+ 8013772:	4b48      	ldr	r3, [pc, #288]	; (8013894 <tcp_input+0x28c>)
+ 8013774:	681b      	ldr	r3, [r3, #0]
+ 8013776:	885b      	ldrh	r3, [r3, #2]
+ 8013778:	b29a      	uxth	r2, r3
+ 801377a:	4b46      	ldr	r3, [pc, #280]	; (8013894 <tcp_input+0x28c>)
+ 801377c:	681c      	ldr	r4, [r3, #0]
+ 801377e:	4610      	mov	r0, r2
+ 8013780:	f7fc fd56 	bl	8010230 <lwip_htons>
+ 8013784:	4603      	mov	r3, r0
+ 8013786:	8063      	strh	r3, [r4, #2]
+  seqno = tcphdr->seqno = lwip_ntohl(tcphdr->seqno);
+ 8013788:	4b42      	ldr	r3, [pc, #264]	; (8013894 <tcp_input+0x28c>)
+ 801378a:	681b      	ldr	r3, [r3, #0]
+ 801378c:	685a      	ldr	r2, [r3, #4]
+ 801378e:	4b41      	ldr	r3, [pc, #260]	; (8013894 <tcp_input+0x28c>)
+ 8013790:	681c      	ldr	r4, [r3, #0]
+ 8013792:	4610      	mov	r0, r2
+ 8013794:	f7fc fd61 	bl	801025a <lwip_htonl>
+ 8013798:	4603      	mov	r3, r0
+ 801379a:	6063      	str	r3, [r4, #4]
+ 801379c:	6863      	ldr	r3, [r4, #4]
+ 801379e:	4a45      	ldr	r2, [pc, #276]	; (80138b4 <tcp_input+0x2ac>)
+ 80137a0:	6013      	str	r3, [r2, #0]
+  ackno = tcphdr->ackno = lwip_ntohl(tcphdr->ackno);
+ 80137a2:	4b3c      	ldr	r3, [pc, #240]	; (8013894 <tcp_input+0x28c>)
+ 80137a4:	681b      	ldr	r3, [r3, #0]
+ 80137a6:	689a      	ldr	r2, [r3, #8]
+ 80137a8:	4b3a      	ldr	r3, [pc, #232]	; (8013894 <tcp_input+0x28c>)
+ 80137aa:	681c      	ldr	r4, [r3, #0]
+ 80137ac:	4610      	mov	r0, r2
+ 80137ae:	f7fc fd54 	bl	801025a <lwip_htonl>
+ 80137b2:	4603      	mov	r3, r0
+ 80137b4:	60a3      	str	r3, [r4, #8]
+ 80137b6:	68a3      	ldr	r3, [r4, #8]
+ 80137b8:	4a3f      	ldr	r2, [pc, #252]	; (80138b8 <tcp_input+0x2b0>)
+ 80137ba:	6013      	str	r3, [r2, #0]
+  tcphdr->wnd = lwip_ntohs(tcphdr->wnd);
+ 80137bc:	4b35      	ldr	r3, [pc, #212]	; (8013894 <tcp_input+0x28c>)
+ 80137be:	681b      	ldr	r3, [r3, #0]
+ 80137c0:	89db      	ldrh	r3, [r3, #14]
+ 80137c2:	b29a      	uxth	r2, r3
+ 80137c4:	4b33      	ldr	r3, [pc, #204]	; (8013894 <tcp_input+0x28c>)
+ 80137c6:	681c      	ldr	r4, [r3, #0]
+ 80137c8:	4610      	mov	r0, r2
+ 80137ca:	f7fc fd31 	bl	8010230 <lwip_htons>
+ 80137ce:	4603      	mov	r3, r0
+ 80137d0:	81e3      	strh	r3, [r4, #14]
+
+  flags = TCPH_FLAGS(tcphdr);
+ 80137d2:	4b30      	ldr	r3, [pc, #192]	; (8013894 <tcp_input+0x28c>)
+ 80137d4:	681b      	ldr	r3, [r3, #0]
+ 80137d6:	899b      	ldrh	r3, [r3, #12]
+ 80137d8:	b29b      	uxth	r3, r3
+ 80137da:	4618      	mov	r0, r3
+ 80137dc:	f7fc fd28 	bl	8010230 <lwip_htons>
+ 80137e0:	4603      	mov	r3, r0
+ 80137e2:	b2db      	uxtb	r3, r3
+ 80137e4:	f003 033f 	and.w	r3, r3, #63	; 0x3f
+ 80137e8:	b2da      	uxtb	r2, r3
+ 80137ea:	4b34      	ldr	r3, [pc, #208]	; (80138bc <tcp_input+0x2b4>)
+ 80137ec:	701a      	strb	r2, [r3, #0]
+  tcplen = p->tot_len;
+ 80137ee:	687b      	ldr	r3, [r7, #4]
+ 80137f0:	891a      	ldrh	r2, [r3, #8]
+ 80137f2:	4b33      	ldr	r3, [pc, #204]	; (80138c0 <tcp_input+0x2b8>)
+ 80137f4:	801a      	strh	r2, [r3, #0]
+  if (flags & (TCP_FIN | TCP_SYN)) {
+ 80137f6:	4b31      	ldr	r3, [pc, #196]	; (80138bc <tcp_input+0x2b4>)
+ 80137f8:	781b      	ldrb	r3, [r3, #0]
+ 80137fa:	f003 0303 	and.w	r3, r3, #3
+ 80137fe:	2b00      	cmp	r3, #0
+ 8013800:	d00c      	beq.n	801381c <tcp_input+0x214>
+    tcplen++;
+ 8013802:	4b2f      	ldr	r3, [pc, #188]	; (80138c0 <tcp_input+0x2b8>)
+ 8013804:	881b      	ldrh	r3, [r3, #0]
+ 8013806:	3301      	adds	r3, #1
+ 8013808:	b29a      	uxth	r2, r3
+ 801380a:	4b2d      	ldr	r3, [pc, #180]	; (80138c0 <tcp_input+0x2b8>)
+ 801380c:	801a      	strh	r2, [r3, #0]
+    if (tcplen < p->tot_len) {
+ 801380e:	687b      	ldr	r3, [r7, #4]
+ 8013810:	891a      	ldrh	r2, [r3, #8]
+ 8013812:	4b2b      	ldr	r3, [pc, #172]	; (80138c0 <tcp_input+0x2b8>)
+ 8013814:	881b      	ldrh	r3, [r3, #0]
+ 8013816:	429a      	cmp	r2, r3
+ 8013818:	f200 82d7 	bhi.w	8013dca <tcp_input+0x7c2>
+    }
+  }
+
+  /* Demultiplex an incoming segment. First, we check if it is destined
+     for an active connection. */
+  prev = NULL;
+ 801381c:	2300      	movs	r3, #0
+ 801381e:	61bb      	str	r3, [r7, #24]
+
+  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
+ 8013820:	4b28      	ldr	r3, [pc, #160]	; (80138c4 <tcp_input+0x2bc>)
+ 8013822:	681b      	ldr	r3, [r3, #0]
+ 8013824:	61fb      	str	r3, [r7, #28]
+ 8013826:	e09d      	b.n	8013964 <tcp_input+0x35c>
+    LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED);
+ 8013828:	69fb      	ldr	r3, [r7, #28]
+ 801382a:	7d1b      	ldrb	r3, [r3, #20]
+ 801382c:	2b00      	cmp	r3, #0
+ 801382e:	d105      	bne.n	801383c <tcp_input+0x234>
+ 8013830:	4b15      	ldr	r3, [pc, #84]	; (8013888 <tcp_input+0x280>)
+ 8013832:	22fb      	movs	r2, #251	; 0xfb
+ 8013834:	4924      	ldr	r1, [pc, #144]	; (80138c8 <tcp_input+0x2c0>)
+ 8013836:	4816      	ldr	r0, [pc, #88]	; (8013890 <tcp_input+0x288>)
+ 8013838:	f008 fdde 	bl	801c3f8 <iprintf>
+    LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT);
+ 801383c:	69fb      	ldr	r3, [r7, #28]
+ 801383e:	7d1b      	ldrb	r3, [r3, #20]
+ 8013840:	2b0a      	cmp	r3, #10
+ 8013842:	d105      	bne.n	8013850 <tcp_input+0x248>
+ 8013844:	4b10      	ldr	r3, [pc, #64]	; (8013888 <tcp_input+0x280>)
+ 8013846:	22fc      	movs	r2, #252	; 0xfc
+ 8013848:	4920      	ldr	r1, [pc, #128]	; (80138cc <tcp_input+0x2c4>)
+ 801384a:	4811      	ldr	r0, [pc, #68]	; (8013890 <tcp_input+0x288>)
+ 801384c:	f008 fdd4 	bl	801c3f8 <iprintf>
+    LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN);
+ 8013850:	69fb      	ldr	r3, [r7, #28]
+ 8013852:	7d1b      	ldrb	r3, [r3, #20]
+ 8013854:	2b01      	cmp	r3, #1
+ 8013856:	d105      	bne.n	8013864 <tcp_input+0x25c>
+ 8013858:	4b0b      	ldr	r3, [pc, #44]	; (8013888 <tcp_input+0x280>)
+ 801385a:	22fd      	movs	r2, #253	; 0xfd
+ 801385c:	491c      	ldr	r1, [pc, #112]	; (80138d0 <tcp_input+0x2c8>)
+ 801385e:	480c      	ldr	r0, [pc, #48]	; (8013890 <tcp_input+0x288>)
+ 8013860:	f008 fdca 	bl	801c3f8 <iprintf>
+
+    /* check if PCB is bound to specific netif */
+    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
+ 8013864:	69fb      	ldr	r3, [r7, #28]
+ 8013866:	7a1b      	ldrb	r3, [r3, #8]
+ 8013868:	2b00      	cmp	r3, #0
+ 801386a:	d033      	beq.n	80138d4 <tcp_input+0x2cc>
+        (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
+ 801386c:	69fb      	ldr	r3, [r7, #28]
+ 801386e:	7a1a      	ldrb	r2, [r3, #8]
+ 8013870:	4b09      	ldr	r3, [pc, #36]	; (8013898 <tcp_input+0x290>)
+ 8013872:	685b      	ldr	r3, [r3, #4]
+ 8013874:	f893 3034 	ldrb.w	r3, [r3, #52]	; 0x34
+ 8013878:	3301      	adds	r3, #1
+ 801387a:	b2db      	uxtb	r3, r3
+    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
+ 801387c:	429a      	cmp	r2, r3
+ 801387e:	d029      	beq.n	80138d4 <tcp_input+0x2cc>
+      prev = pcb;
+ 8013880:	69fb      	ldr	r3, [r7, #28]
+ 8013882:	61bb      	str	r3, [r7, #24]
+      continue;
+ 8013884:	e06b      	b.n	801395e <tcp_input+0x356>
+ 8013886:	bf00      	nop
+ 8013888:	0801e9e0 	.word	0x0801e9e0
+ 801388c:	0801ea14 	.word	0x0801ea14
+ 8013890:	0801ea2c 	.word	0x0801ea2c
+ 8013894:	20008728 	.word	0x20008728
+ 8013898:	2000c0b4 	.word	0x2000c0b4
+ 801389c:	2000872c 	.word	0x2000872c
+ 80138a0:	20008730 	.word	0x20008730
+ 80138a4:	2000872e 	.word	0x2000872e
+ 80138a8:	0801ea54 	.word	0x0801ea54
+ 80138ac:	0801ea64 	.word	0x0801ea64
+ 80138b0:	0801ea70 	.word	0x0801ea70
+ 80138b4:	20008738 	.word	0x20008738
+ 80138b8:	2000873c 	.word	0x2000873c
+ 80138bc:	20008744 	.word	0x20008744
+ 80138c0:	20008742 	.word	0x20008742
+ 80138c4:	2000f7e8 	.word	0x2000f7e8
+ 80138c8:	0801ea90 	.word	0x0801ea90
+ 80138cc:	0801eab8 	.word	0x0801eab8
+ 80138d0:	0801eae4 	.word	0x0801eae4
+    }
+
+    if (pcb->remote_port == tcphdr->src &&
+ 80138d4:	69fb      	ldr	r3, [r7, #28]
+ 80138d6:	8b1a      	ldrh	r2, [r3, #24]
+ 80138d8:	4b94      	ldr	r3, [pc, #592]	; (8013b2c <tcp_input+0x524>)
+ 80138da:	681b      	ldr	r3, [r3, #0]
+ 80138dc:	881b      	ldrh	r3, [r3, #0]
+ 80138de:	b29b      	uxth	r3, r3
+ 80138e0:	429a      	cmp	r2, r3
+ 80138e2:	d13a      	bne.n	801395a <tcp_input+0x352>
+        pcb->local_port == tcphdr->dest &&
+ 80138e4:	69fb      	ldr	r3, [r7, #28]
+ 80138e6:	8ada      	ldrh	r2, [r3, #22]
+ 80138e8:	4b90      	ldr	r3, [pc, #576]	; (8013b2c <tcp_input+0x524>)
+ 80138ea:	681b      	ldr	r3, [r3, #0]
+ 80138ec:	885b      	ldrh	r3, [r3, #2]
+ 80138ee:	b29b      	uxth	r3, r3
+    if (pcb->remote_port == tcphdr->src &&
+ 80138f0:	429a      	cmp	r2, r3
+ 80138f2:	d132      	bne.n	801395a <tcp_input+0x352>
+        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
+ 80138f4:	69fb      	ldr	r3, [r7, #28]
+ 80138f6:	685a      	ldr	r2, [r3, #4]
+ 80138f8:	4b8d      	ldr	r3, [pc, #564]	; (8013b30 <tcp_input+0x528>)
+ 80138fa:	691b      	ldr	r3, [r3, #16]
+        pcb->local_port == tcphdr->dest &&
+ 80138fc:	429a      	cmp	r2, r3
+ 80138fe:	d12c      	bne.n	801395a <tcp_input+0x352>
+        ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
+ 8013900:	69fb      	ldr	r3, [r7, #28]
+ 8013902:	681a      	ldr	r2, [r3, #0]
+ 8013904:	4b8a      	ldr	r3, [pc, #552]	; (8013b30 <tcp_input+0x528>)
+ 8013906:	695b      	ldr	r3, [r3, #20]
+        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
+ 8013908:	429a      	cmp	r2, r3
+ 801390a:	d126      	bne.n	801395a <tcp_input+0x352>
+      /* Move this PCB to the front of the list so that subsequent
+         lookups will be faster (we exploit locality in TCP segment
+         arrivals). */
+      LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb);
+ 801390c:	69fb      	ldr	r3, [r7, #28]
+ 801390e:	68db      	ldr	r3, [r3, #12]
+ 8013910:	69fa      	ldr	r2, [r7, #28]
+ 8013912:	429a      	cmp	r2, r3
+ 8013914:	d106      	bne.n	8013924 <tcp_input+0x31c>
+ 8013916:	4b87      	ldr	r3, [pc, #540]	; (8013b34 <tcp_input+0x52c>)
+ 8013918:	f240 120d 	movw	r2, #269	; 0x10d
+ 801391c:	4986      	ldr	r1, [pc, #536]	; (8013b38 <tcp_input+0x530>)
+ 801391e:	4887      	ldr	r0, [pc, #540]	; (8013b3c <tcp_input+0x534>)
+ 8013920:	f008 fd6a 	bl	801c3f8 <iprintf>
+      if (prev != NULL) {
+ 8013924:	69bb      	ldr	r3, [r7, #24]
+ 8013926:	2b00      	cmp	r3, #0
+ 8013928:	d00a      	beq.n	8013940 <tcp_input+0x338>
+        prev->next = pcb->next;
+ 801392a:	69fb      	ldr	r3, [r7, #28]
+ 801392c:	68da      	ldr	r2, [r3, #12]
+ 801392e:	69bb      	ldr	r3, [r7, #24]
+ 8013930:	60da      	str	r2, [r3, #12]
+        pcb->next = tcp_active_pcbs;
+ 8013932:	4b83      	ldr	r3, [pc, #524]	; (8013b40 <tcp_input+0x538>)
+ 8013934:	681a      	ldr	r2, [r3, #0]
+ 8013936:	69fb      	ldr	r3, [r7, #28]
+ 8013938:	60da      	str	r2, [r3, #12]
+        tcp_active_pcbs = pcb;
+ 801393a:	4a81      	ldr	r2, [pc, #516]	; (8013b40 <tcp_input+0x538>)
+ 801393c:	69fb      	ldr	r3, [r7, #28]
+ 801393e:	6013      	str	r3, [r2, #0]
+      } else {
+        TCP_STATS_INC(tcp.cachehit);
+      }
+      LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb);
+ 8013940:	69fb      	ldr	r3, [r7, #28]
+ 8013942:	68db      	ldr	r3, [r3, #12]
+ 8013944:	69fa      	ldr	r2, [r7, #28]
+ 8013946:	429a      	cmp	r2, r3
+ 8013948:	d111      	bne.n	801396e <tcp_input+0x366>
+ 801394a:	4b7a      	ldr	r3, [pc, #488]	; (8013b34 <tcp_input+0x52c>)
+ 801394c:	f240 1215 	movw	r2, #277	; 0x115
+ 8013950:	497c      	ldr	r1, [pc, #496]	; (8013b44 <tcp_input+0x53c>)
+ 8013952:	487a      	ldr	r0, [pc, #488]	; (8013b3c <tcp_input+0x534>)
+ 8013954:	f008 fd50 	bl	801c3f8 <iprintf>
+      break;
+ 8013958:	e009      	b.n	801396e <tcp_input+0x366>
+    }
+    prev = pcb;
+ 801395a:	69fb      	ldr	r3, [r7, #28]
+ 801395c:	61bb      	str	r3, [r7, #24]
+  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
+ 801395e:	69fb      	ldr	r3, [r7, #28]
+ 8013960:	68db      	ldr	r3, [r3, #12]
+ 8013962:	61fb      	str	r3, [r7, #28]
+ 8013964:	69fb      	ldr	r3, [r7, #28]
+ 8013966:	2b00      	cmp	r3, #0
+ 8013968:	f47f af5e 	bne.w	8013828 <tcp_input+0x220>
+ 801396c:	e000      	b.n	8013970 <tcp_input+0x368>
+      break;
+ 801396e:	bf00      	nop
+  }
+
+  if (pcb == NULL) {
+ 8013970:	69fb      	ldr	r3, [r7, #28]
+ 8013972:	2b00      	cmp	r3, #0
+ 8013974:	f040 8095 	bne.w	8013aa2 <tcp_input+0x49a>
+    /* If it did not go to an active connection, we check the connections
+       in the TIME-WAIT state. */
+    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
+ 8013978:	4b73      	ldr	r3, [pc, #460]	; (8013b48 <tcp_input+0x540>)
+ 801397a:	681b      	ldr	r3, [r3, #0]
+ 801397c:	61fb      	str	r3, [r7, #28]
+ 801397e:	e03f      	b.n	8013a00 <tcp_input+0x3f8>
+      LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
+ 8013980:	69fb      	ldr	r3, [r7, #28]
+ 8013982:	7d1b      	ldrb	r3, [r3, #20]
+ 8013984:	2b0a      	cmp	r3, #10
+ 8013986:	d006      	beq.n	8013996 <tcp_input+0x38e>
+ 8013988:	4b6a      	ldr	r3, [pc, #424]	; (8013b34 <tcp_input+0x52c>)
+ 801398a:	f240 121f 	movw	r2, #287	; 0x11f
+ 801398e:	496f      	ldr	r1, [pc, #444]	; (8013b4c <tcp_input+0x544>)
+ 8013990:	486a      	ldr	r0, [pc, #424]	; (8013b3c <tcp_input+0x534>)
+ 8013992:	f008 fd31 	bl	801c3f8 <iprintf>
+
+      /* check if PCB is bound to specific netif */
+      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
+ 8013996:	69fb      	ldr	r3, [r7, #28]
+ 8013998:	7a1b      	ldrb	r3, [r3, #8]
+ 801399a:	2b00      	cmp	r3, #0
+ 801399c:	d009      	beq.n	80139b2 <tcp_input+0x3aa>
+          (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
+ 801399e:	69fb      	ldr	r3, [r7, #28]
+ 80139a0:	7a1a      	ldrb	r2, [r3, #8]
+ 80139a2:	4b63      	ldr	r3, [pc, #396]	; (8013b30 <tcp_input+0x528>)
+ 80139a4:	685b      	ldr	r3, [r3, #4]
+ 80139a6:	f893 3034 	ldrb.w	r3, [r3, #52]	; 0x34
+ 80139aa:	3301      	adds	r3, #1
+ 80139ac:	b2db      	uxtb	r3, r3
+      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
+ 80139ae:	429a      	cmp	r2, r3
+ 80139b0:	d122      	bne.n	80139f8 <tcp_input+0x3f0>
+        continue;
+      }
+
+      if (pcb->remote_port == tcphdr->src &&
+ 80139b2:	69fb      	ldr	r3, [r7, #28]
+ 80139b4:	8b1a      	ldrh	r2, [r3, #24]
+ 80139b6:	4b5d      	ldr	r3, [pc, #372]	; (8013b2c <tcp_input+0x524>)
+ 80139b8:	681b      	ldr	r3, [r3, #0]
+ 80139ba:	881b      	ldrh	r3, [r3, #0]
+ 80139bc:	b29b      	uxth	r3, r3
+ 80139be:	429a      	cmp	r2, r3
+ 80139c0:	d11b      	bne.n	80139fa <tcp_input+0x3f2>
+          pcb->local_port == tcphdr->dest &&
+ 80139c2:	69fb      	ldr	r3, [r7, #28]
+ 80139c4:	8ada      	ldrh	r2, [r3, #22]
+ 80139c6:	4b59      	ldr	r3, [pc, #356]	; (8013b2c <tcp_input+0x524>)
+ 80139c8:	681b      	ldr	r3, [r3, #0]
+ 80139ca:	885b      	ldrh	r3, [r3, #2]
+ 80139cc:	b29b      	uxth	r3, r3
+      if (pcb->remote_port == tcphdr->src &&
+ 80139ce:	429a      	cmp	r2, r3
+ 80139d0:	d113      	bne.n	80139fa <tcp_input+0x3f2>
+          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
+ 80139d2:	69fb      	ldr	r3, [r7, #28]
+ 80139d4:	685a      	ldr	r2, [r3, #4]
+ 80139d6:	4b56      	ldr	r3, [pc, #344]	; (8013b30 <tcp_input+0x528>)
+ 80139d8:	691b      	ldr	r3, [r3, #16]
+          pcb->local_port == tcphdr->dest &&
+ 80139da:	429a      	cmp	r2, r3
+ 80139dc:	d10d      	bne.n	80139fa <tcp_input+0x3f2>
+          ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
+ 80139de:	69fb      	ldr	r3, [r7, #28]
+ 80139e0:	681a      	ldr	r2, [r3, #0]
+ 80139e2:	4b53      	ldr	r3, [pc, #332]	; (8013b30 <tcp_input+0x528>)
+ 80139e4:	695b      	ldr	r3, [r3, #20]
+          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
+ 80139e6:	429a      	cmp	r2, r3
+ 80139e8:	d107      	bne.n	80139fa <tcp_input+0x3f2>
+#ifdef LWIP_HOOK_TCP_INPACKET_PCB
+        if (LWIP_HOOK_TCP_INPACKET_PCB(pcb, tcphdr, tcphdr_optlen, tcphdr_opt1len,
+                                       tcphdr_opt2, p) == ERR_OK)
+#endif
+        {
+          tcp_timewait_input(pcb);
+ 80139ea:	69f8      	ldr	r0, [r7, #28]
+ 80139ec:	f000 fb52 	bl	8014094 <tcp_timewait_input>
+        }
+        pbuf_free(p);
+ 80139f0:	6878      	ldr	r0, [r7, #4]
+ 80139f2:	f7fd ffd1 	bl	8011998 <pbuf_free>
+        return;
+ 80139f6:	e1ee      	b.n	8013dd6 <tcp_input+0x7ce>
+        continue;
+ 80139f8:	bf00      	nop
+    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
+ 80139fa:	69fb      	ldr	r3, [r7, #28]
+ 80139fc:	68db      	ldr	r3, [r3, #12]
+ 80139fe:	61fb      	str	r3, [r7, #28]
+ 8013a00:	69fb      	ldr	r3, [r7, #28]
+ 8013a02:	2b00      	cmp	r3, #0
+ 8013a04:	d1bc      	bne.n	8013980 <tcp_input+0x378>
+      }
+    }
+
+    /* Finally, if we still did not get a match, we check all PCBs that
+       are LISTENing for incoming connections. */
+    prev = NULL;
+ 8013a06:	2300      	movs	r3, #0
+ 8013a08:	61bb      	str	r3, [r7, #24]
+    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
+ 8013a0a:	4b51      	ldr	r3, [pc, #324]	; (8013b50 <tcp_input+0x548>)
+ 8013a0c:	681b      	ldr	r3, [r3, #0]
+ 8013a0e:	617b      	str	r3, [r7, #20]
+ 8013a10:	e02a      	b.n	8013a68 <tcp_input+0x460>
+      /* check if PCB is bound to specific netif */
+      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
+ 8013a12:	697b      	ldr	r3, [r7, #20]
+ 8013a14:	7a1b      	ldrb	r3, [r3, #8]
+ 8013a16:	2b00      	cmp	r3, #0
+ 8013a18:	d00c      	beq.n	8013a34 <tcp_input+0x42c>
+          (lpcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
+ 8013a1a:	697b      	ldr	r3, [r7, #20]
+ 8013a1c:	7a1a      	ldrb	r2, [r3, #8]
+ 8013a1e:	4b44      	ldr	r3, [pc, #272]	; (8013b30 <tcp_input+0x528>)
+ 8013a20:	685b      	ldr	r3, [r3, #4]
+ 8013a22:	f893 3034 	ldrb.w	r3, [r3, #52]	; 0x34
+ 8013a26:	3301      	adds	r3, #1
+ 8013a28:	b2db      	uxtb	r3, r3
+      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
+ 8013a2a:	429a      	cmp	r2, r3
+ 8013a2c:	d002      	beq.n	8013a34 <tcp_input+0x42c>
+        prev = (struct tcp_pcb *)lpcb;
+ 8013a2e:	697b      	ldr	r3, [r7, #20]
+ 8013a30:	61bb      	str	r3, [r7, #24]
+        continue;
+ 8013a32:	e016      	b.n	8013a62 <tcp_input+0x45a>
+      }
+
+      if (lpcb->local_port == tcphdr->dest) {
+ 8013a34:	697b      	ldr	r3, [r7, #20]
+ 8013a36:	8ada      	ldrh	r2, [r3, #22]
+ 8013a38:	4b3c      	ldr	r3, [pc, #240]	; (8013b2c <tcp_input+0x524>)
+ 8013a3a:	681b      	ldr	r3, [r3, #0]
+ 8013a3c:	885b      	ldrh	r3, [r3, #2]
+ 8013a3e:	b29b      	uxth	r3, r3
+ 8013a40:	429a      	cmp	r2, r3
+ 8013a42:	d10c      	bne.n	8013a5e <tcp_input+0x456>
+          lpcb_prev = prev;
+#else /* SO_REUSE */
+          break;
+#endif /* SO_REUSE */
+        } else if (IP_ADDR_PCB_VERSION_MATCH_EXACT(lpcb, ip_current_dest_addr())) {
+          if (ip_addr_cmp(&lpcb->local_ip, ip_current_dest_addr())) {
+ 8013a44:	697b      	ldr	r3, [r7, #20]
+ 8013a46:	681a      	ldr	r2, [r3, #0]
+ 8013a48:	4b39      	ldr	r3, [pc, #228]	; (8013b30 <tcp_input+0x528>)
+ 8013a4a:	695b      	ldr	r3, [r3, #20]
+ 8013a4c:	429a      	cmp	r2, r3
+ 8013a4e:	d00f      	beq.n	8013a70 <tcp_input+0x468>
+            /* found an exact match */
+            break;
+          } else if (ip_addr_isany(&lpcb->local_ip)) {
+ 8013a50:	697b      	ldr	r3, [r7, #20]
+ 8013a52:	2b00      	cmp	r3, #0
+ 8013a54:	d00d      	beq.n	8013a72 <tcp_input+0x46a>
+ 8013a56:	697b      	ldr	r3, [r7, #20]
+ 8013a58:	681b      	ldr	r3, [r3, #0]
+ 8013a5a:	2b00      	cmp	r3, #0
+ 8013a5c:	d009      	beq.n	8013a72 <tcp_input+0x46a>
+            break;
+#endif /* SO_REUSE */
+          }
+        }
+      }
+      prev = (struct tcp_pcb *)lpcb;
+ 8013a5e:	697b      	ldr	r3, [r7, #20]
+ 8013a60:	61bb      	str	r3, [r7, #24]
+    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
+ 8013a62:	697b      	ldr	r3, [r7, #20]
+ 8013a64:	68db      	ldr	r3, [r3, #12]
+ 8013a66:	617b      	str	r3, [r7, #20]
+ 8013a68:	697b      	ldr	r3, [r7, #20]
+ 8013a6a:	2b00      	cmp	r3, #0
+ 8013a6c:	d1d1      	bne.n	8013a12 <tcp_input+0x40a>
+ 8013a6e:	e000      	b.n	8013a72 <tcp_input+0x46a>
+            break;
+ 8013a70:	bf00      	nop
+      /* only pass to ANY if no specific local IP has been found */
+      lpcb = lpcb_any;
+      prev = lpcb_prev;
+    }
+#endif /* SO_REUSE */
+    if (lpcb != NULL) {
+ 8013a72:	697b      	ldr	r3, [r7, #20]
+ 8013a74:	2b00      	cmp	r3, #0
+ 8013a76:	d014      	beq.n	8013aa2 <tcp_input+0x49a>
+      /* Move this PCB to the front of the list so that subsequent
+         lookups will be faster (we exploit locality in TCP segment
+         arrivals). */
+      if (prev != NULL) {
+ 8013a78:	69bb      	ldr	r3, [r7, #24]
+ 8013a7a:	2b00      	cmp	r3, #0
+ 8013a7c:	d00a      	beq.n	8013a94 <tcp_input+0x48c>
+        ((struct tcp_pcb_listen *)prev)->next = lpcb->next;
+ 8013a7e:	697b      	ldr	r3, [r7, #20]
+ 8013a80:	68da      	ldr	r2, [r3, #12]
+ 8013a82:	69bb      	ldr	r3, [r7, #24]
+ 8013a84:	60da      	str	r2, [r3, #12]
+        /* our successor is the remainder of the listening list */
+        lpcb->next = tcp_listen_pcbs.listen_pcbs;
+ 8013a86:	4b32      	ldr	r3, [pc, #200]	; (8013b50 <tcp_input+0x548>)
+ 8013a88:	681a      	ldr	r2, [r3, #0]
+ 8013a8a:	697b      	ldr	r3, [r7, #20]
+ 8013a8c:	60da      	str	r2, [r3, #12]
+        /* put this listening pcb at the head of the listening list */
+        tcp_listen_pcbs.listen_pcbs = lpcb;
+ 8013a8e:	4a30      	ldr	r2, [pc, #192]	; (8013b50 <tcp_input+0x548>)
+ 8013a90:	697b      	ldr	r3, [r7, #20]
+ 8013a92:	6013      	str	r3, [r2, #0]
+#ifdef LWIP_HOOK_TCP_INPACKET_PCB
+      if (LWIP_HOOK_TCP_INPACKET_PCB((struct tcp_pcb *)lpcb, tcphdr, tcphdr_optlen,
+                                     tcphdr_opt1len, tcphdr_opt2, p) == ERR_OK)
+#endif
+      {
+        tcp_listen_input(lpcb);
+ 8013a94:	6978      	ldr	r0, [r7, #20]
+ 8013a96:	f000 f9ff 	bl	8013e98 <tcp_listen_input>
+      }
+      pbuf_free(p);
+ 8013a9a:	6878      	ldr	r0, [r7, #4]
+ 8013a9c:	f7fd ff7c 	bl	8011998 <pbuf_free>
+      return;
+ 8013aa0:	e199      	b.n	8013dd6 <tcp_input+0x7ce>
+      tcphdr_opt1len, tcphdr_opt2, p) != ERR_OK) {
+    pbuf_free(p);
+    return;
+  }
+#endif
+  if (pcb != NULL) {
+ 8013aa2:	69fb      	ldr	r3, [r7, #28]
+ 8013aa4:	2b00      	cmp	r3, #0
+ 8013aa6:	f000 8160 	beq.w	8013d6a <tcp_input+0x762>
+#if TCP_INPUT_DEBUG
+    tcp_debug_print_state(pcb->state);
+#endif /* TCP_INPUT_DEBUG */
+
+    /* Set up a tcp_seg structure. */
+    inseg.next = NULL;
+ 8013aaa:	4b2a      	ldr	r3, [pc, #168]	; (8013b54 <tcp_input+0x54c>)
+ 8013aac:	2200      	movs	r2, #0
+ 8013aae:	601a      	str	r2, [r3, #0]
+    inseg.len = p->tot_len;
+ 8013ab0:	687b      	ldr	r3, [r7, #4]
+ 8013ab2:	891a      	ldrh	r2, [r3, #8]
+ 8013ab4:	4b27      	ldr	r3, [pc, #156]	; (8013b54 <tcp_input+0x54c>)
+ 8013ab6:	811a      	strh	r2, [r3, #8]
+    inseg.p = p;
+ 8013ab8:	4a26      	ldr	r2, [pc, #152]	; (8013b54 <tcp_input+0x54c>)
+ 8013aba:	687b      	ldr	r3, [r7, #4]
+ 8013abc:	6053      	str	r3, [r2, #4]
+    inseg.tcphdr = tcphdr;
+ 8013abe:	4b1b      	ldr	r3, [pc, #108]	; (8013b2c <tcp_input+0x524>)
+ 8013ac0:	681b      	ldr	r3, [r3, #0]
+ 8013ac2:	4a24      	ldr	r2, [pc, #144]	; (8013b54 <tcp_input+0x54c>)
+ 8013ac4:	60d3      	str	r3, [r2, #12]
+
+    recv_data = NULL;
+ 8013ac6:	4b24      	ldr	r3, [pc, #144]	; (8013b58 <tcp_input+0x550>)
+ 8013ac8:	2200      	movs	r2, #0
+ 8013aca:	601a      	str	r2, [r3, #0]
+    recv_flags = 0;
+ 8013acc:	4b23      	ldr	r3, [pc, #140]	; (8013b5c <tcp_input+0x554>)
+ 8013ace:	2200      	movs	r2, #0
+ 8013ad0:	701a      	strb	r2, [r3, #0]
+    recv_acked = 0;
+ 8013ad2:	4b23      	ldr	r3, [pc, #140]	; (8013b60 <tcp_input+0x558>)
+ 8013ad4:	2200      	movs	r2, #0
+ 8013ad6:	801a      	strh	r2, [r3, #0]
+
+    if (flags & TCP_PSH) {
+ 8013ad8:	4b22      	ldr	r3, [pc, #136]	; (8013b64 <tcp_input+0x55c>)
+ 8013ada:	781b      	ldrb	r3, [r3, #0]
+ 8013adc:	f003 0308 	and.w	r3, r3, #8
+ 8013ae0:	2b00      	cmp	r3, #0
+ 8013ae2:	d006      	beq.n	8013af2 <tcp_input+0x4ea>
+      p->flags |= PBUF_FLAG_PUSH;
+ 8013ae4:	687b      	ldr	r3, [r7, #4]
+ 8013ae6:	7b5b      	ldrb	r3, [r3, #13]
+ 8013ae8:	f043 0301 	orr.w	r3, r3, #1
+ 8013aec:	b2da      	uxtb	r2, r3
+ 8013aee:	687b      	ldr	r3, [r7, #4]
+ 8013af0:	735a      	strb	r2, [r3, #13]
+    }
+
+    /* If there is data which was previously "refused" by upper layer */
+    if (pcb->refused_data != NULL) {
+ 8013af2:	69fb      	ldr	r3, [r7, #28]
+ 8013af4:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 8013af6:	2b00      	cmp	r3, #0
+ 8013af8:	d038      	beq.n	8013b6c <tcp_input+0x564>
+      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
+ 8013afa:	69f8      	ldr	r0, [r7, #28]
+ 8013afc:	f7ff f940 	bl	8012d80 <tcp_process_refused_data>
+ 8013b00:	4603      	mov	r3, r0
+ 8013b02:	f113 0f0d 	cmn.w	r3, #13
+ 8013b06:	d007      	beq.n	8013b18 <tcp_input+0x510>
+          ((pcb->refused_data != NULL) && (tcplen > 0))) {
+ 8013b08:	69fb      	ldr	r3, [r7, #28]
+ 8013b0a:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
+ 8013b0c:	2b00      	cmp	r3, #0
+ 8013b0e:	d02d      	beq.n	8013b6c <tcp_input+0x564>
+          ((pcb->refused_data != NULL) && (tcplen > 0))) {
+ 8013b10:	4b15      	ldr	r3, [pc, #84]	; (8013b68 <tcp_input+0x560>)
+ 8013b12:	881b      	ldrh	r3, [r3, #0]
+ 8013b14:	2b00      	cmp	r3, #0
+ 8013b16:	d029      	beq.n	8013b6c <tcp_input+0x564>
+        /* pcb has been aborted or refused data is still refused and the new
+           segment contains data */
+        if (pcb->rcv_ann_wnd == 0) {
+ 8013b18:	69fb      	ldr	r3, [r7, #28]
+ 8013b1a:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
+ 8013b1c:	2b00      	cmp	r3, #0
+ 8013b1e:	f040 8104 	bne.w	8013d2a <tcp_input+0x722>
+          /* this is a zero-window probe, we respond to it with current RCV.NXT
+          and drop the data segment */
+          tcp_send_empty_ack(pcb);
+ 8013b22:	69f8      	ldr	r0, [r7, #28]
+ 8013b24:	f003 f9ce 	bl	8016ec4 <tcp_send_empty_ack>
+        }
+        TCP_STATS_INC(tcp.drop);
+        MIB2_STATS_INC(mib2.tcpinerrs);
+        goto aborted;
+ 8013b28:	e0ff      	b.n	8013d2a <tcp_input+0x722>
+ 8013b2a:	bf00      	nop
+ 8013b2c:	20008728 	.word	0x20008728
+ 8013b30:	2000c0b4 	.word	0x2000c0b4
+ 8013b34:	0801e9e0 	.word	0x0801e9e0
+ 8013b38:	0801eb0c 	.word	0x0801eb0c
+ 8013b3c:	0801ea2c 	.word	0x0801ea2c
+ 8013b40:	2000f7e8 	.word	0x2000f7e8
+ 8013b44:	0801eb38 	.word	0x0801eb38
+ 8013b48:	2000f7f8 	.word	0x2000f7f8
+ 8013b4c:	0801eb64 	.word	0x0801eb64
+ 8013b50:	2000f7f0 	.word	0x2000f7f0
+ 8013b54:	20008718 	.word	0x20008718
+ 8013b58:	20008748 	.word	0x20008748
+ 8013b5c:	20008745 	.word	0x20008745
+ 8013b60:	20008740 	.word	0x20008740
+ 8013b64:	20008744 	.word	0x20008744
+ 8013b68:	20008742 	.word	0x20008742
+      }
+    }
+    tcp_input_pcb = pcb;
+ 8013b6c:	4a9b      	ldr	r2, [pc, #620]	; (8013ddc <tcp_input+0x7d4>)
+ 8013b6e:	69fb      	ldr	r3, [r7, #28]
+ 8013b70:	6013      	str	r3, [r2, #0]
+    err = tcp_process(pcb);
+ 8013b72:	69f8      	ldr	r0, [r7, #28]
+ 8013b74:	f000 fb0a 	bl	801418c <tcp_process>
+ 8013b78:	4603      	mov	r3, r0
+ 8013b7a:	74fb      	strb	r3, [r7, #19]
+    /* A return value of ERR_ABRT means that tcp_abort() was called
+       and that the pcb has been freed. If so, we don't do anything. */
+    if (err != ERR_ABRT) {
+ 8013b7c:	f997 3013 	ldrsb.w	r3, [r7, #19]
+ 8013b80:	f113 0f0d 	cmn.w	r3, #13
+ 8013b84:	f000 80d3 	beq.w	8013d2e <tcp_input+0x726>
+      if (recv_flags & TF_RESET) {
+ 8013b88:	4b95      	ldr	r3, [pc, #596]	; (8013de0 <tcp_input+0x7d8>)
+ 8013b8a:	781b      	ldrb	r3, [r3, #0]
+ 8013b8c:	f003 0308 	and.w	r3, r3, #8
+ 8013b90:	2b00      	cmp	r3, #0
+ 8013b92:	d015      	beq.n	8013bc0 <tcp_input+0x5b8>
+        /* TF_RESET means that the connection was reset by the other
+           end. We then call the error callback to inform the
+           application that the connection is dead before we
+           deallocate the PCB. */
+        TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_RST);
+ 8013b94:	69fb      	ldr	r3, [r7, #28]
+ 8013b96:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8013b9a:	2b00      	cmp	r3, #0
+ 8013b9c:	d008      	beq.n	8013bb0 <tcp_input+0x5a8>
+ 8013b9e:	69fb      	ldr	r3, [r7, #28]
+ 8013ba0:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8013ba4:	69fa      	ldr	r2, [r7, #28]
+ 8013ba6:	6912      	ldr	r2, [r2, #16]
+ 8013ba8:	f06f 010d 	mvn.w	r1, #13
+ 8013bac:	4610      	mov	r0, r2
+ 8013bae:	4798      	blx	r3
+        tcp_pcb_remove(&tcp_active_pcbs, pcb);
+ 8013bb0:	69f9      	ldr	r1, [r7, #28]
+ 8013bb2:	488c      	ldr	r0, [pc, #560]	; (8013de4 <tcp_input+0x7dc>)
+ 8013bb4:	f7ff fbb0 	bl	8013318 <tcp_pcb_remove>
+        tcp_free(pcb);
+ 8013bb8:	69f8      	ldr	r0, [r7, #28]
+ 8013bba:	f7fe f9a9 	bl	8011f10 <tcp_free>
+ 8013bbe:	e0c1      	b.n	8013d44 <tcp_input+0x73c>
+      } else {
+        err = ERR_OK;
+ 8013bc0:	2300      	movs	r3, #0
+ 8013bc2:	74fb      	strb	r3, [r7, #19]
+        /* If the application has registered a "sent" function to be
+           called when new send buffer space is available, we call it
+           now. */
+        if (recv_acked > 0) {
+ 8013bc4:	4b88      	ldr	r3, [pc, #544]	; (8013de8 <tcp_input+0x7e0>)
+ 8013bc6:	881b      	ldrh	r3, [r3, #0]
+ 8013bc8:	2b00      	cmp	r3, #0
+ 8013bca:	d01d      	beq.n	8013c08 <tcp_input+0x600>
+          while (acked > 0) {
+            acked16 = (u16_t)LWIP_MIN(acked, 0xffffu);
+            acked -= acked16;
+#else
+          {
+            acked16 = recv_acked;
+ 8013bcc:	4b86      	ldr	r3, [pc, #536]	; (8013de8 <tcp_input+0x7e0>)
+ 8013bce:	881b      	ldrh	r3, [r3, #0]
+ 8013bd0:	81fb      	strh	r3, [r7, #14]
+#endif
+            TCP_EVENT_SENT(pcb, (u16_t)acked16, err);
+ 8013bd2:	69fb      	ldr	r3, [r7, #28]
+ 8013bd4:	f8d3 3080 	ldr.w	r3, [r3, #128]	; 0x80
+ 8013bd8:	2b00      	cmp	r3, #0
+ 8013bda:	d00a      	beq.n	8013bf2 <tcp_input+0x5ea>
+ 8013bdc:	69fb      	ldr	r3, [r7, #28]
+ 8013bde:	f8d3 3080 	ldr.w	r3, [r3, #128]	; 0x80
+ 8013be2:	69fa      	ldr	r2, [r7, #28]
+ 8013be4:	6910      	ldr	r0, [r2, #16]
+ 8013be6:	89fa      	ldrh	r2, [r7, #14]
+ 8013be8:	69f9      	ldr	r1, [r7, #28]
+ 8013bea:	4798      	blx	r3
+ 8013bec:	4603      	mov	r3, r0
+ 8013bee:	74fb      	strb	r3, [r7, #19]
+ 8013bf0:	e001      	b.n	8013bf6 <tcp_input+0x5ee>
+ 8013bf2:	2300      	movs	r3, #0
+ 8013bf4:	74fb      	strb	r3, [r7, #19]
+            if (err == ERR_ABRT) {
+ 8013bf6:	f997 3013 	ldrsb.w	r3, [r7, #19]
+ 8013bfa:	f113 0f0d 	cmn.w	r3, #13
+ 8013bfe:	f000 8098 	beq.w	8013d32 <tcp_input+0x72a>
+              goto aborted;
+            }
+          }
+          recv_acked = 0;
+ 8013c02:	4b79      	ldr	r3, [pc, #484]	; (8013de8 <tcp_input+0x7e0>)
+ 8013c04:	2200      	movs	r2, #0
+ 8013c06:	801a      	strh	r2, [r3, #0]
+        }
+        if (tcp_input_delayed_close(pcb)) {
+ 8013c08:	69f8      	ldr	r0, [r7, #28]
+ 8013c0a:	f000 f905 	bl	8013e18 <tcp_input_delayed_close>
+ 8013c0e:	4603      	mov	r3, r0
+ 8013c10:	2b00      	cmp	r3, #0
+ 8013c12:	f040 8090 	bne.w	8013d36 <tcp_input+0x72e>
+#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
+        while (recv_data != NULL) {
+          struct pbuf *rest = NULL;
+          pbuf_split_64k(recv_data, &rest);
+#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+        if (recv_data != NULL) {
+ 8013c16:	4b75      	ldr	r3, [pc, #468]	; (8013dec <tcp_input+0x7e4>)
+ 8013c18:	681b      	ldr	r3, [r3, #0]
+ 8013c1a:	2b00      	cmp	r3, #0
+ 8013c1c:	d041      	beq.n	8013ca2 <tcp_input+0x69a>
+#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+
+          LWIP_ASSERT("pcb->refused_data == NULL", pcb->refused_data == NULL);
+ 8013c1e:	69fb      	ldr	r3, [r7, #28]
+ 8013c20:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 8013c22:	2b00      	cmp	r3, #0
+ 8013c24:	d006      	beq.n	8013c34 <tcp_input+0x62c>
+ 8013c26:	4b72      	ldr	r3, [pc, #456]	; (8013df0 <tcp_input+0x7e8>)
+ 8013c28:	f44f 72f3 	mov.w	r2, #486	; 0x1e6
+ 8013c2c:	4971      	ldr	r1, [pc, #452]	; (8013df4 <tcp_input+0x7ec>)
+ 8013c2e:	4872      	ldr	r0, [pc, #456]	; (8013df8 <tcp_input+0x7f0>)
+ 8013c30:	f008 fbe2 	bl	801c3f8 <iprintf>
+          if (pcb->flags & TF_RXCLOSED) {
+ 8013c34:	69fb      	ldr	r3, [r7, #28]
+ 8013c36:	8b5b      	ldrh	r3, [r3, #26]
+ 8013c38:	f003 0310 	and.w	r3, r3, #16
+ 8013c3c:	2b00      	cmp	r3, #0
+ 8013c3e:	d008      	beq.n	8013c52 <tcp_input+0x64a>
+            /* received data although already closed -> abort (send RST) to
+               notify the remote host that not all data has been processed */
+            pbuf_free(recv_data);
+ 8013c40:	4b6a      	ldr	r3, [pc, #424]	; (8013dec <tcp_input+0x7e4>)
+ 8013c42:	681b      	ldr	r3, [r3, #0]
+ 8013c44:	4618      	mov	r0, r3
+ 8013c46:	f7fd fea7 	bl	8011998 <pbuf_free>
+#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
+            if (rest != NULL) {
+              pbuf_free(rest);
+            }
+#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+            tcp_abort(pcb);
+ 8013c4a:	69f8      	ldr	r0, [r7, #28]
+ 8013c4c:	f7fe fc40 	bl	80124d0 <tcp_abort>
+            goto aborted;
+ 8013c50:	e078      	b.n	8013d44 <tcp_input+0x73c>
+          }
+
+          /* Notify application that data has been received. */
+          TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err);
+ 8013c52:	69fb      	ldr	r3, [r7, #28]
+ 8013c54:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
+ 8013c58:	2b00      	cmp	r3, #0
+ 8013c5a:	d00c      	beq.n	8013c76 <tcp_input+0x66e>
+ 8013c5c:	69fb      	ldr	r3, [r7, #28]
+ 8013c5e:	f8d3 4084 	ldr.w	r4, [r3, #132]	; 0x84
+ 8013c62:	69fb      	ldr	r3, [r7, #28]
+ 8013c64:	6918      	ldr	r0, [r3, #16]
+ 8013c66:	4b61      	ldr	r3, [pc, #388]	; (8013dec <tcp_input+0x7e4>)
+ 8013c68:	681a      	ldr	r2, [r3, #0]
+ 8013c6a:	2300      	movs	r3, #0
+ 8013c6c:	69f9      	ldr	r1, [r7, #28]
+ 8013c6e:	47a0      	blx	r4
+ 8013c70:	4603      	mov	r3, r0
+ 8013c72:	74fb      	strb	r3, [r7, #19]
+ 8013c74:	e008      	b.n	8013c88 <tcp_input+0x680>
+ 8013c76:	4b5d      	ldr	r3, [pc, #372]	; (8013dec <tcp_input+0x7e4>)
+ 8013c78:	681a      	ldr	r2, [r3, #0]
+ 8013c7a:	2300      	movs	r3, #0
+ 8013c7c:	69f9      	ldr	r1, [r7, #28]
+ 8013c7e:	2000      	movs	r0, #0
+ 8013c80:	f7ff f952 	bl	8012f28 <tcp_recv_null>
+ 8013c84:	4603      	mov	r3, r0
+ 8013c86:	74fb      	strb	r3, [r7, #19]
+          if (err == ERR_ABRT) {
+ 8013c88:	f997 3013 	ldrsb.w	r3, [r7, #19]
+ 8013c8c:	f113 0f0d 	cmn.w	r3, #13
+ 8013c90:	d053      	beq.n	8013d3a <tcp_input+0x732>
+#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+            goto aborted;
+          }
+
+          /* If the upper layer can't receive this data, store it */
+          if (err != ERR_OK) {
+ 8013c92:	f997 3013 	ldrsb.w	r3, [r7, #19]
+ 8013c96:	2b00      	cmp	r3, #0
+ 8013c98:	d003      	beq.n	8013ca2 <tcp_input+0x69a>
+#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
+            if (rest != NULL) {
+              pbuf_cat(recv_data, rest);
+            }
+#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
+            pcb->refused_data = recv_data;
+ 8013c9a:	4b54      	ldr	r3, [pc, #336]	; (8013dec <tcp_input+0x7e4>)
+ 8013c9c:	681a      	ldr	r2, [r3, #0]
+ 8013c9e:	69fb      	ldr	r3, [r7, #28]
+ 8013ca0:	679a      	str	r2, [r3, #120]	; 0x78
+          }
+        }
+
+        /* If a FIN segment was received, we call the callback
+           function with a NULL buffer to indicate EOF. */
+        if (recv_flags & TF_GOT_FIN) {
+ 8013ca2:	4b4f      	ldr	r3, [pc, #316]	; (8013de0 <tcp_input+0x7d8>)
+ 8013ca4:	781b      	ldrb	r3, [r3, #0]
+ 8013ca6:	f003 0320 	and.w	r3, r3, #32
+ 8013caa:	2b00      	cmp	r3, #0
+ 8013cac:	d030      	beq.n	8013d10 <tcp_input+0x708>
+          if (pcb->refused_data != NULL) {
+ 8013cae:	69fb      	ldr	r3, [r7, #28]
+ 8013cb0:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 8013cb2:	2b00      	cmp	r3, #0
+ 8013cb4:	d009      	beq.n	8013cca <tcp_input+0x6c2>
+            /* Delay this if we have refused data. */
+            pcb->refused_data->flags |= PBUF_FLAG_TCP_FIN;
+ 8013cb6:	69fb      	ldr	r3, [r7, #28]
+ 8013cb8:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 8013cba:	7b5a      	ldrb	r2, [r3, #13]
+ 8013cbc:	69fb      	ldr	r3, [r7, #28]
+ 8013cbe:	6f9b      	ldr	r3, [r3, #120]	; 0x78
+ 8013cc0:	f042 0220 	orr.w	r2, r2, #32
+ 8013cc4:	b2d2      	uxtb	r2, r2
+ 8013cc6:	735a      	strb	r2, [r3, #13]
+ 8013cc8:	e022      	b.n	8013d10 <tcp_input+0x708>
+          } else {
+            /* correct rcv_wnd as the application won't call tcp_recved()
+               for the FIN's seqno */
+            if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
+ 8013cca:	69fb      	ldr	r3, [r7, #28]
+ 8013ccc:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8013cce:	f5b3 6f06 	cmp.w	r3, #2144	; 0x860
+ 8013cd2:	d005      	beq.n	8013ce0 <tcp_input+0x6d8>
+              pcb->rcv_wnd++;
+ 8013cd4:	69fb      	ldr	r3, [r7, #28]
+ 8013cd6:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8013cd8:	3301      	adds	r3, #1
+ 8013cda:	b29a      	uxth	r2, r3
+ 8013cdc:	69fb      	ldr	r3, [r7, #28]
+ 8013cde:	851a      	strh	r2, [r3, #40]	; 0x28
+            }
+            TCP_EVENT_CLOSED(pcb, err);
+ 8013ce0:	69fb      	ldr	r3, [r7, #28]
+ 8013ce2:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
+ 8013ce6:	2b00      	cmp	r3, #0
+ 8013ce8:	d00b      	beq.n	8013d02 <tcp_input+0x6fa>
+ 8013cea:	69fb      	ldr	r3, [r7, #28]
+ 8013cec:	f8d3 4084 	ldr.w	r4, [r3, #132]	; 0x84
+ 8013cf0:	69fb      	ldr	r3, [r7, #28]
+ 8013cf2:	6918      	ldr	r0, [r3, #16]
+ 8013cf4:	2300      	movs	r3, #0
+ 8013cf6:	2200      	movs	r2, #0
+ 8013cf8:	69f9      	ldr	r1, [r7, #28]
+ 8013cfa:	47a0      	blx	r4
+ 8013cfc:	4603      	mov	r3, r0
+ 8013cfe:	74fb      	strb	r3, [r7, #19]
+ 8013d00:	e001      	b.n	8013d06 <tcp_input+0x6fe>
+ 8013d02:	2300      	movs	r3, #0
+ 8013d04:	74fb      	strb	r3, [r7, #19]
+            if (err == ERR_ABRT) {
+ 8013d06:	f997 3013 	ldrsb.w	r3, [r7, #19]
+ 8013d0a:	f113 0f0d 	cmn.w	r3, #13
+ 8013d0e:	d016      	beq.n	8013d3e <tcp_input+0x736>
+              goto aborted;
+            }
+          }
+        }
+
+        tcp_input_pcb = NULL;
+ 8013d10:	4b32      	ldr	r3, [pc, #200]	; (8013ddc <tcp_input+0x7d4>)
+ 8013d12:	2200      	movs	r2, #0
+ 8013d14:	601a      	str	r2, [r3, #0]
+        if (tcp_input_delayed_close(pcb)) {
+ 8013d16:	69f8      	ldr	r0, [r7, #28]
+ 8013d18:	f000 f87e 	bl	8013e18 <tcp_input_delayed_close>
+ 8013d1c:	4603      	mov	r3, r0
+ 8013d1e:	2b00      	cmp	r3, #0
+ 8013d20:	d10f      	bne.n	8013d42 <tcp_input+0x73a>
+          goto aborted;
+        }
+        /* Try to send something out. */
+        tcp_output(pcb);
+ 8013d22:	69f8      	ldr	r0, [r7, #28]
+ 8013d24:	f002 fab6 	bl	8016294 <tcp_output>
+ 8013d28:	e00c      	b.n	8013d44 <tcp_input+0x73c>
+        goto aborted;
+ 8013d2a:	bf00      	nop
+ 8013d2c:	e00a      	b.n	8013d44 <tcp_input+0x73c>
+#endif /* TCP_INPUT_DEBUG */
+      }
+    }
+    /* Jump target if pcb has been aborted in a callback (by calling tcp_abort()).
+       Below this line, 'pcb' may not be dereferenced! */
+aborted:
+ 8013d2e:	bf00      	nop
+ 8013d30:	e008      	b.n	8013d44 <tcp_input+0x73c>
+              goto aborted;
+ 8013d32:	bf00      	nop
+ 8013d34:	e006      	b.n	8013d44 <tcp_input+0x73c>
+          goto aborted;
+ 8013d36:	bf00      	nop
+ 8013d38:	e004      	b.n	8013d44 <tcp_input+0x73c>
+            goto aborted;
+ 8013d3a:	bf00      	nop
+ 8013d3c:	e002      	b.n	8013d44 <tcp_input+0x73c>
+              goto aborted;
+ 8013d3e:	bf00      	nop
+ 8013d40:	e000      	b.n	8013d44 <tcp_input+0x73c>
+          goto aborted;
+ 8013d42:	bf00      	nop
+    tcp_input_pcb = NULL;
+ 8013d44:	4b25      	ldr	r3, [pc, #148]	; (8013ddc <tcp_input+0x7d4>)
+ 8013d46:	2200      	movs	r2, #0
+ 8013d48:	601a      	str	r2, [r3, #0]
+    recv_data = NULL;
+ 8013d4a:	4b28      	ldr	r3, [pc, #160]	; (8013dec <tcp_input+0x7e4>)
+ 8013d4c:	2200      	movs	r2, #0
+ 8013d4e:	601a      	str	r2, [r3, #0]
+
+    /* give up our reference to inseg.p */
+    if (inseg.p != NULL) {
+ 8013d50:	4b2a      	ldr	r3, [pc, #168]	; (8013dfc <tcp_input+0x7f4>)
+ 8013d52:	685b      	ldr	r3, [r3, #4]
+ 8013d54:	2b00      	cmp	r3, #0
+ 8013d56:	d03d      	beq.n	8013dd4 <tcp_input+0x7cc>
+      pbuf_free(inseg.p);
+ 8013d58:	4b28      	ldr	r3, [pc, #160]	; (8013dfc <tcp_input+0x7f4>)
+ 8013d5a:	685b      	ldr	r3, [r3, #4]
+ 8013d5c:	4618      	mov	r0, r3
+ 8013d5e:	f7fd fe1b 	bl	8011998 <pbuf_free>
+      inseg.p = NULL;
+ 8013d62:	4b26      	ldr	r3, [pc, #152]	; (8013dfc <tcp_input+0x7f4>)
+ 8013d64:	2200      	movs	r2, #0
+ 8013d66:	605a      	str	r2, [r3, #4]
+    pbuf_free(p);
+  }
+
+  LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane());
+  PERF_STOP("tcp_input");
+  return;
+ 8013d68:	e034      	b.n	8013dd4 <tcp_input+0x7cc>
+    if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) {
+ 8013d6a:	4b25      	ldr	r3, [pc, #148]	; (8013e00 <tcp_input+0x7f8>)
+ 8013d6c:	681b      	ldr	r3, [r3, #0]
+ 8013d6e:	899b      	ldrh	r3, [r3, #12]
+ 8013d70:	b29b      	uxth	r3, r3
+ 8013d72:	4618      	mov	r0, r3
+ 8013d74:	f7fc fa5c 	bl	8010230 <lwip_htons>
+ 8013d78:	4603      	mov	r3, r0
+ 8013d7a:	b2db      	uxtb	r3, r3
+ 8013d7c:	f003 0304 	and.w	r3, r3, #4
+ 8013d80:	2b00      	cmp	r3, #0
+ 8013d82:	d118      	bne.n	8013db6 <tcp_input+0x7ae>
+      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 8013d84:	4b1f      	ldr	r3, [pc, #124]	; (8013e04 <tcp_input+0x7fc>)
+ 8013d86:	6819      	ldr	r1, [r3, #0]
+ 8013d88:	4b1f      	ldr	r3, [pc, #124]	; (8013e08 <tcp_input+0x800>)
+ 8013d8a:	881b      	ldrh	r3, [r3, #0]
+ 8013d8c:	461a      	mov	r2, r3
+ 8013d8e:	4b1f      	ldr	r3, [pc, #124]	; (8013e0c <tcp_input+0x804>)
+ 8013d90:	681b      	ldr	r3, [r3, #0]
+ 8013d92:	18d0      	adds	r0, r2, r3
+              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
+ 8013d94:	4b1a      	ldr	r3, [pc, #104]	; (8013e00 <tcp_input+0x7f8>)
+ 8013d96:	681b      	ldr	r3, [r3, #0]
+      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 8013d98:	885b      	ldrh	r3, [r3, #2]
+ 8013d9a:	b29b      	uxth	r3, r3
+              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
+ 8013d9c:	4a18      	ldr	r2, [pc, #96]	; (8013e00 <tcp_input+0x7f8>)
+ 8013d9e:	6812      	ldr	r2, [r2, #0]
+      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 8013da0:	8812      	ldrh	r2, [r2, #0]
+ 8013da2:	b292      	uxth	r2, r2
+ 8013da4:	9202      	str	r2, [sp, #8]
+ 8013da6:	9301      	str	r3, [sp, #4]
+ 8013da8:	4b19      	ldr	r3, [pc, #100]	; (8013e10 <tcp_input+0x808>)
+ 8013daa:	9300      	str	r3, [sp, #0]
+ 8013dac:	4b19      	ldr	r3, [pc, #100]	; (8013e14 <tcp_input+0x80c>)
+ 8013dae:	4602      	mov	r2, r0
+ 8013db0:	2000      	movs	r0, #0
+ 8013db2:	f003 f835 	bl	8016e20 <tcp_rst>
+    pbuf_free(p);
+ 8013db6:	6878      	ldr	r0, [r7, #4]
+ 8013db8:	f7fd fdee 	bl	8011998 <pbuf_free>
+  return;
+ 8013dbc:	e00a      	b.n	8013dd4 <tcp_input+0x7cc>
+    goto dropped;
+ 8013dbe:	bf00      	nop
+ 8013dc0:	e004      	b.n	8013dcc <tcp_input+0x7c4>
+dropped:
+ 8013dc2:	bf00      	nop
+ 8013dc4:	e002      	b.n	8013dcc <tcp_input+0x7c4>
+      goto dropped;
+ 8013dc6:	bf00      	nop
+ 8013dc8:	e000      	b.n	8013dcc <tcp_input+0x7c4>
+      goto dropped;
+ 8013dca:	bf00      	nop
+  TCP_STATS_INC(tcp.drop);
+  MIB2_STATS_INC(mib2.tcpinerrs);
+  pbuf_free(p);
+ 8013dcc:	6878      	ldr	r0, [r7, #4]
+ 8013dce:	f7fd fde3 	bl	8011998 <pbuf_free>
+ 8013dd2:	e000      	b.n	8013dd6 <tcp_input+0x7ce>
+  return;
+ 8013dd4:	bf00      	nop
+}
+ 8013dd6:	3724      	adds	r7, #36	; 0x24
+ 8013dd8:	46bd      	mov	sp, r7
+ 8013dda:	bd90      	pop	{r4, r7, pc}
+ 8013ddc:	2000f7fc 	.word	0x2000f7fc
+ 8013de0:	20008745 	.word	0x20008745
+ 8013de4:	2000f7e8 	.word	0x2000f7e8
+ 8013de8:	20008740 	.word	0x20008740
+ 8013dec:	20008748 	.word	0x20008748
+ 8013df0:	0801e9e0 	.word	0x0801e9e0
+ 8013df4:	0801eb94 	.word	0x0801eb94
+ 8013df8:	0801ea2c 	.word	0x0801ea2c
+ 8013dfc:	20008718 	.word	0x20008718
+ 8013e00:	20008728 	.word	0x20008728
+ 8013e04:	2000873c 	.word	0x2000873c
+ 8013e08:	20008742 	.word	0x20008742
+ 8013e0c:	20008738 	.word	0x20008738
+ 8013e10:	2000c0c4 	.word	0x2000c0c4
+ 8013e14:	2000c0c8 	.word	0x2000c0c8
+
+08013e18 <tcp_input_delayed_close>:
+ * any more.
+ * @returns 1 if the pcb has been closed and deallocated, 0 otherwise
+ */
+static int
+tcp_input_delayed_close(struct tcp_pcb *pcb)
+{
+ 8013e18:	b580      	push	{r7, lr}
+ 8013e1a:	b082      	sub	sp, #8
+ 8013e1c:	af00      	add	r7, sp, #0
+ 8013e1e:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT("tcp_input_delayed_close: invalid pcb", pcb != NULL);
+ 8013e20:	687b      	ldr	r3, [r7, #4]
+ 8013e22:	2b00      	cmp	r3, #0
+ 8013e24:	d106      	bne.n	8013e34 <tcp_input_delayed_close+0x1c>
+ 8013e26:	4b17      	ldr	r3, [pc, #92]	; (8013e84 <tcp_input_delayed_close+0x6c>)
+ 8013e28:	f240 225a 	movw	r2, #602	; 0x25a
+ 8013e2c:	4916      	ldr	r1, [pc, #88]	; (8013e88 <tcp_input_delayed_close+0x70>)
+ 8013e2e:	4817      	ldr	r0, [pc, #92]	; (8013e8c <tcp_input_delayed_close+0x74>)
+ 8013e30:	f008 fae2 	bl	801c3f8 <iprintf>
+
+  if (recv_flags & TF_CLOSED) {
+ 8013e34:	4b16      	ldr	r3, [pc, #88]	; (8013e90 <tcp_input_delayed_close+0x78>)
+ 8013e36:	781b      	ldrb	r3, [r3, #0]
+ 8013e38:	f003 0310 	and.w	r3, r3, #16
+ 8013e3c:	2b00      	cmp	r3, #0
+ 8013e3e:	d01c      	beq.n	8013e7a <tcp_input_delayed_close+0x62>
+    /* The connection has been closed and we will deallocate the
+        PCB. */
+    if (!(pcb->flags & TF_RXCLOSED)) {
+ 8013e40:	687b      	ldr	r3, [r7, #4]
+ 8013e42:	8b5b      	ldrh	r3, [r3, #26]
+ 8013e44:	f003 0310 	and.w	r3, r3, #16
+ 8013e48:	2b00      	cmp	r3, #0
+ 8013e4a:	d10d      	bne.n	8013e68 <tcp_input_delayed_close+0x50>
+      /* Connection closed although the application has only shut down the
+          tx side: call the PCB's err callback and indicate the closure to
+          ensure the application doesn't continue using the PCB. */
+      TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_CLSD);
+ 8013e4c:	687b      	ldr	r3, [r7, #4]
+ 8013e4e:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8013e52:	2b00      	cmp	r3, #0
+ 8013e54:	d008      	beq.n	8013e68 <tcp_input_delayed_close+0x50>
+ 8013e56:	687b      	ldr	r3, [r7, #4]
+ 8013e58:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
+ 8013e5c:	687a      	ldr	r2, [r7, #4]
+ 8013e5e:	6912      	ldr	r2, [r2, #16]
+ 8013e60:	f06f 010e 	mvn.w	r1, #14
+ 8013e64:	4610      	mov	r0, r2
+ 8013e66:	4798      	blx	r3
+    }
+    tcp_pcb_remove(&tcp_active_pcbs, pcb);
+ 8013e68:	6879      	ldr	r1, [r7, #4]
+ 8013e6a:	480a      	ldr	r0, [pc, #40]	; (8013e94 <tcp_input_delayed_close+0x7c>)
+ 8013e6c:	f7ff fa54 	bl	8013318 <tcp_pcb_remove>
+    tcp_free(pcb);
+ 8013e70:	6878      	ldr	r0, [r7, #4]
+ 8013e72:	f7fe f84d 	bl	8011f10 <tcp_free>
+    return 1;
+ 8013e76:	2301      	movs	r3, #1
+ 8013e78:	e000      	b.n	8013e7c <tcp_input_delayed_close+0x64>
+  }
+  return 0;
+ 8013e7a:	2300      	movs	r3, #0
+}
+ 8013e7c:	4618      	mov	r0, r3
+ 8013e7e:	3708      	adds	r7, #8
+ 8013e80:	46bd      	mov	sp, r7
+ 8013e82:	bd80      	pop	{r7, pc}
+ 8013e84:	0801e9e0 	.word	0x0801e9e0
+ 8013e88:	0801ebb0 	.word	0x0801ebb0
+ 8013e8c:	0801ea2c 	.word	0x0801ea2c
+ 8013e90:	20008745 	.word	0x20008745
+ 8013e94:	2000f7e8 	.word	0x2000f7e8
+
+08013e98 <tcp_listen_input>:
+ * @note the segment which arrived is saved in global variables, therefore only the pcb
+ *       involved is passed as a parameter to this function
+ */
+static void
+tcp_listen_input(struct tcp_pcb_listen *pcb)
+{
+ 8013e98:	b590      	push	{r4, r7, lr}
+ 8013e9a:	b08b      	sub	sp, #44	; 0x2c
+ 8013e9c:	af04      	add	r7, sp, #16
+ 8013e9e:	6078      	str	r0, [r7, #4]
+  struct tcp_pcb *npcb;
+  u32_t iss;
+  err_t rc;
+
+  if (flags & TCP_RST) {
+ 8013ea0:	4b6f      	ldr	r3, [pc, #444]	; (8014060 <tcp_listen_input+0x1c8>)
+ 8013ea2:	781b      	ldrb	r3, [r3, #0]
+ 8013ea4:	f003 0304 	and.w	r3, r3, #4
+ 8013ea8:	2b00      	cmp	r3, #0
+ 8013eaa:	f040 80d3 	bne.w	8014054 <tcp_listen_input+0x1bc>
+    /* An incoming RST should be ignored. Return. */
+    return;
+  }
+
+  LWIP_ASSERT("tcp_listen_input: invalid pcb", pcb != NULL);
+ 8013eae:	687b      	ldr	r3, [r7, #4]
+ 8013eb0:	2b00      	cmp	r3, #0
+ 8013eb2:	d106      	bne.n	8013ec2 <tcp_listen_input+0x2a>
+ 8013eb4:	4b6b      	ldr	r3, [pc, #428]	; (8014064 <tcp_listen_input+0x1cc>)
+ 8013eb6:	f240 2281 	movw	r2, #641	; 0x281
+ 8013eba:	496b      	ldr	r1, [pc, #428]	; (8014068 <tcp_listen_input+0x1d0>)
+ 8013ebc:	486b      	ldr	r0, [pc, #428]	; (801406c <tcp_listen_input+0x1d4>)
+ 8013ebe:	f008 fa9b 	bl	801c3f8 <iprintf>
+
+  /* In the LISTEN state, we check for incoming SYN segments,
+     creates a new PCB, and responds with a SYN|ACK. */
+  if (flags & TCP_ACK) {
+ 8013ec2:	4b67      	ldr	r3, [pc, #412]	; (8014060 <tcp_listen_input+0x1c8>)
+ 8013ec4:	781b      	ldrb	r3, [r3, #0]
+ 8013ec6:	f003 0310 	and.w	r3, r3, #16
+ 8013eca:	2b00      	cmp	r3, #0
+ 8013ecc:	d019      	beq.n	8013f02 <tcp_listen_input+0x6a>
+    /* For incoming segments with the ACK flag set, respond with a
+       RST. */
+    LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n"));
+    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 8013ece:	4b68      	ldr	r3, [pc, #416]	; (8014070 <tcp_listen_input+0x1d8>)
+ 8013ed0:	6819      	ldr	r1, [r3, #0]
+ 8013ed2:	4b68      	ldr	r3, [pc, #416]	; (8014074 <tcp_listen_input+0x1dc>)
+ 8013ed4:	881b      	ldrh	r3, [r3, #0]
+ 8013ed6:	461a      	mov	r2, r3
+ 8013ed8:	4b67      	ldr	r3, [pc, #412]	; (8014078 <tcp_listen_input+0x1e0>)
+ 8013eda:	681b      	ldr	r3, [r3, #0]
+ 8013edc:	18d0      	adds	r0, r2, r3
+            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
+ 8013ede:	4b67      	ldr	r3, [pc, #412]	; (801407c <tcp_listen_input+0x1e4>)
+ 8013ee0:	681b      	ldr	r3, [r3, #0]
+    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 8013ee2:	885b      	ldrh	r3, [r3, #2]
+ 8013ee4:	b29b      	uxth	r3, r3
+            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
+ 8013ee6:	4a65      	ldr	r2, [pc, #404]	; (801407c <tcp_listen_input+0x1e4>)
+ 8013ee8:	6812      	ldr	r2, [r2, #0]
+    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 8013eea:	8812      	ldrh	r2, [r2, #0]
+ 8013eec:	b292      	uxth	r2, r2
+ 8013eee:	9202      	str	r2, [sp, #8]
+ 8013ef0:	9301      	str	r3, [sp, #4]
+ 8013ef2:	4b63      	ldr	r3, [pc, #396]	; (8014080 <tcp_listen_input+0x1e8>)
+ 8013ef4:	9300      	str	r3, [sp, #0]
+ 8013ef6:	4b63      	ldr	r3, [pc, #396]	; (8014084 <tcp_listen_input+0x1ec>)
+ 8013ef8:	4602      	mov	r2, r0
+ 8013efa:	6878      	ldr	r0, [r7, #4]
+ 8013efc:	f002 ff90 	bl	8016e20 <tcp_rst>
+      tcp_abandon(npcb, 0);
+      return;
+    }
+    tcp_output(npcb);
+  }
+  return;
+ 8013f00:	e0aa      	b.n	8014058 <tcp_listen_input+0x1c0>
+  } else if (flags & TCP_SYN) {
+ 8013f02:	4b57      	ldr	r3, [pc, #348]	; (8014060 <tcp_listen_input+0x1c8>)
+ 8013f04:	781b      	ldrb	r3, [r3, #0]
+ 8013f06:	f003 0302 	and.w	r3, r3, #2
+ 8013f0a:	2b00      	cmp	r3, #0
+ 8013f0c:	f000 80a4 	beq.w	8014058 <tcp_listen_input+0x1c0>
+    npcb = tcp_alloc(pcb->prio);
+ 8013f10:	687b      	ldr	r3, [r7, #4]
+ 8013f12:	7d5b      	ldrb	r3, [r3, #21]
+ 8013f14:	4618      	mov	r0, r3
+ 8013f16:	f7ff f92b 	bl	8013170 <tcp_alloc>
+ 8013f1a:	6178      	str	r0, [r7, #20]
+    if (npcb == NULL) {
+ 8013f1c:	697b      	ldr	r3, [r7, #20]
+ 8013f1e:	2b00      	cmp	r3, #0
+ 8013f20:	d111      	bne.n	8013f46 <tcp_listen_input+0xae>
+      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
+ 8013f22:	687b      	ldr	r3, [r7, #4]
+ 8013f24:	699b      	ldr	r3, [r3, #24]
+ 8013f26:	2b00      	cmp	r3, #0
+ 8013f28:	d00a      	beq.n	8013f40 <tcp_listen_input+0xa8>
+ 8013f2a:	687b      	ldr	r3, [r7, #4]
+ 8013f2c:	699b      	ldr	r3, [r3, #24]
+ 8013f2e:	687a      	ldr	r2, [r7, #4]
+ 8013f30:	6910      	ldr	r0, [r2, #16]
+ 8013f32:	f04f 32ff 	mov.w	r2, #4294967295
+ 8013f36:	2100      	movs	r1, #0
+ 8013f38:	4798      	blx	r3
+ 8013f3a:	4603      	mov	r3, r0
+ 8013f3c:	73bb      	strb	r3, [r7, #14]
+      return;
+ 8013f3e:	e08c      	b.n	801405a <tcp_listen_input+0x1c2>
+      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
+ 8013f40:	23f0      	movs	r3, #240	; 0xf0
+ 8013f42:	73bb      	strb	r3, [r7, #14]
+      return;
+ 8013f44:	e089      	b.n	801405a <tcp_listen_input+0x1c2>
+    ip_addr_copy(npcb->local_ip, *ip_current_dest_addr());
+ 8013f46:	4b50      	ldr	r3, [pc, #320]	; (8014088 <tcp_listen_input+0x1f0>)
+ 8013f48:	695a      	ldr	r2, [r3, #20]
+ 8013f4a:	697b      	ldr	r3, [r7, #20]
+ 8013f4c:	601a      	str	r2, [r3, #0]
+    ip_addr_copy(npcb->remote_ip, *ip_current_src_addr());
+ 8013f4e:	4b4e      	ldr	r3, [pc, #312]	; (8014088 <tcp_listen_input+0x1f0>)
+ 8013f50:	691a      	ldr	r2, [r3, #16]
+ 8013f52:	697b      	ldr	r3, [r7, #20]
+ 8013f54:	605a      	str	r2, [r3, #4]
+    npcb->local_port = pcb->local_port;
+ 8013f56:	687b      	ldr	r3, [r7, #4]
+ 8013f58:	8ada      	ldrh	r2, [r3, #22]
+ 8013f5a:	697b      	ldr	r3, [r7, #20]
+ 8013f5c:	82da      	strh	r2, [r3, #22]
+    npcb->remote_port = tcphdr->src;
+ 8013f5e:	4b47      	ldr	r3, [pc, #284]	; (801407c <tcp_listen_input+0x1e4>)
+ 8013f60:	681b      	ldr	r3, [r3, #0]
+ 8013f62:	881b      	ldrh	r3, [r3, #0]
+ 8013f64:	b29a      	uxth	r2, r3
+ 8013f66:	697b      	ldr	r3, [r7, #20]
+ 8013f68:	831a      	strh	r2, [r3, #24]
+    npcb->state = SYN_RCVD;
+ 8013f6a:	697b      	ldr	r3, [r7, #20]
+ 8013f6c:	2203      	movs	r2, #3
+ 8013f6e:	751a      	strb	r2, [r3, #20]
+    npcb->rcv_nxt = seqno + 1;
+ 8013f70:	4b41      	ldr	r3, [pc, #260]	; (8014078 <tcp_listen_input+0x1e0>)
+ 8013f72:	681b      	ldr	r3, [r3, #0]
+ 8013f74:	1c5a      	adds	r2, r3, #1
+ 8013f76:	697b      	ldr	r3, [r7, #20]
+ 8013f78:	625a      	str	r2, [r3, #36]	; 0x24
+    npcb->rcv_ann_right_edge = npcb->rcv_nxt;
+ 8013f7a:	697b      	ldr	r3, [r7, #20]
+ 8013f7c:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 8013f7e:	697b      	ldr	r3, [r7, #20]
+ 8013f80:	62da      	str	r2, [r3, #44]	; 0x2c
+    iss = tcp_next_iss(npcb);
+ 8013f82:	6978      	ldr	r0, [r7, #20]
+ 8013f84:	f7ff fa5c 	bl	8013440 <tcp_next_iss>
+ 8013f88:	6138      	str	r0, [r7, #16]
+    npcb->snd_wl2 = iss;
+ 8013f8a:	697b      	ldr	r3, [r7, #20]
+ 8013f8c:	693a      	ldr	r2, [r7, #16]
+ 8013f8e:	659a      	str	r2, [r3, #88]	; 0x58
+    npcb->snd_nxt = iss;
+ 8013f90:	697b      	ldr	r3, [r7, #20]
+ 8013f92:	693a      	ldr	r2, [r7, #16]
+ 8013f94:	651a      	str	r2, [r3, #80]	; 0x50
+    npcb->lastack = iss;
+ 8013f96:	697b      	ldr	r3, [r7, #20]
+ 8013f98:	693a      	ldr	r2, [r7, #16]
+ 8013f9a:	645a      	str	r2, [r3, #68]	; 0x44
+    npcb->snd_lbb = iss;
+ 8013f9c:	697b      	ldr	r3, [r7, #20]
+ 8013f9e:	693a      	ldr	r2, [r7, #16]
+ 8013fa0:	65da      	str	r2, [r3, #92]	; 0x5c
+    npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */
+ 8013fa2:	4b35      	ldr	r3, [pc, #212]	; (8014078 <tcp_listen_input+0x1e0>)
+ 8013fa4:	681b      	ldr	r3, [r3, #0]
+ 8013fa6:	1e5a      	subs	r2, r3, #1
+ 8013fa8:	697b      	ldr	r3, [r7, #20]
+ 8013faa:	655a      	str	r2, [r3, #84]	; 0x54
+    npcb->callback_arg = pcb->callback_arg;
+ 8013fac:	687b      	ldr	r3, [r7, #4]
+ 8013fae:	691a      	ldr	r2, [r3, #16]
+ 8013fb0:	697b      	ldr	r3, [r7, #20]
+ 8013fb2:	611a      	str	r2, [r3, #16]
+    npcb->listener = pcb;
+ 8013fb4:	697b      	ldr	r3, [r7, #20]
+ 8013fb6:	687a      	ldr	r2, [r7, #4]
+ 8013fb8:	67da      	str	r2, [r3, #124]	; 0x7c
+    npcb->so_options = pcb->so_options & SOF_INHERITED;
+ 8013fba:	687b      	ldr	r3, [r7, #4]
+ 8013fbc:	7a5b      	ldrb	r3, [r3, #9]
+ 8013fbe:	f003 030c 	and.w	r3, r3, #12
+ 8013fc2:	b2da      	uxtb	r2, r3
+ 8013fc4:	697b      	ldr	r3, [r7, #20]
+ 8013fc6:	725a      	strb	r2, [r3, #9]
+    npcb->netif_idx = pcb->netif_idx;
+ 8013fc8:	687b      	ldr	r3, [r7, #4]
+ 8013fca:	7a1a      	ldrb	r2, [r3, #8]
+ 8013fcc:	697b      	ldr	r3, [r7, #20]
+ 8013fce:	721a      	strb	r2, [r3, #8]
+    TCP_REG_ACTIVE(npcb);
+ 8013fd0:	4b2e      	ldr	r3, [pc, #184]	; (801408c <tcp_listen_input+0x1f4>)
+ 8013fd2:	681a      	ldr	r2, [r3, #0]
+ 8013fd4:	697b      	ldr	r3, [r7, #20]
+ 8013fd6:	60da      	str	r2, [r3, #12]
+ 8013fd8:	4a2c      	ldr	r2, [pc, #176]	; (801408c <tcp_listen_input+0x1f4>)
+ 8013fda:	697b      	ldr	r3, [r7, #20]
+ 8013fdc:	6013      	str	r3, [r2, #0]
+ 8013fde:	f003 f8e1 	bl	80171a4 <tcp_timer_needed>
+ 8013fe2:	4b2b      	ldr	r3, [pc, #172]	; (8014090 <tcp_listen_input+0x1f8>)
+ 8013fe4:	2201      	movs	r2, #1
+ 8013fe6:	701a      	strb	r2, [r3, #0]
+    tcp_parseopt(npcb);
+ 8013fe8:	6978      	ldr	r0, [r7, #20]
+ 8013fea:	f001 fd8f 	bl	8015b0c <tcp_parseopt>
+    npcb->snd_wnd = tcphdr->wnd;
+ 8013fee:	4b23      	ldr	r3, [pc, #140]	; (801407c <tcp_listen_input+0x1e4>)
+ 8013ff0:	681b      	ldr	r3, [r3, #0]
+ 8013ff2:	89db      	ldrh	r3, [r3, #14]
+ 8013ff4:	b29a      	uxth	r2, r3
+ 8013ff6:	697b      	ldr	r3, [r7, #20]
+ 8013ff8:	f8a3 2060 	strh.w	r2, [r3, #96]	; 0x60
+    npcb->snd_wnd_max = npcb->snd_wnd;
+ 8013ffc:	697b      	ldr	r3, [r7, #20]
+ 8013ffe:	f8b3 2060 	ldrh.w	r2, [r3, #96]	; 0x60
+ 8014002:	697b      	ldr	r3, [r7, #20]
+ 8014004:	f8a3 2062 	strh.w	r2, [r3, #98]	; 0x62
+    npcb->mss = tcp_eff_send_mss(npcb->mss, &npcb->local_ip, &npcb->remote_ip);
+ 8014008:	697b      	ldr	r3, [r7, #20]
+ 801400a:	8e5c      	ldrh	r4, [r3, #50]	; 0x32
+ 801400c:	697b      	ldr	r3, [r7, #20]
+ 801400e:	3304      	adds	r3, #4
+ 8014010:	4618      	mov	r0, r3
+ 8014012:	f006 fe7d 	bl	801ad10 <ip4_route>
+ 8014016:	4601      	mov	r1, r0
+ 8014018:	697b      	ldr	r3, [r7, #20]
+ 801401a:	3304      	adds	r3, #4
+ 801401c:	461a      	mov	r2, r3
+ 801401e:	4620      	mov	r0, r4
+ 8014020:	f7ff fa34 	bl	801348c <tcp_eff_send_mss_netif>
+ 8014024:	4603      	mov	r3, r0
+ 8014026:	461a      	mov	r2, r3
+ 8014028:	697b      	ldr	r3, [r7, #20]
+ 801402a:	865a      	strh	r2, [r3, #50]	; 0x32
+    rc = tcp_enqueue_flags(npcb, TCP_SYN | TCP_ACK);
+ 801402c:	2112      	movs	r1, #18
+ 801402e:	6978      	ldr	r0, [r7, #20]
+ 8014030:	f002 f842 	bl	80160b8 <tcp_enqueue_flags>
+ 8014034:	4603      	mov	r3, r0
+ 8014036:	73fb      	strb	r3, [r7, #15]
+    if (rc != ERR_OK) {
+ 8014038:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 801403c:	2b00      	cmp	r3, #0
+ 801403e:	d004      	beq.n	801404a <tcp_listen_input+0x1b2>
+      tcp_abandon(npcb, 0);
+ 8014040:	2100      	movs	r1, #0
+ 8014042:	6978      	ldr	r0, [r7, #20]
+ 8014044:	f7fe f986 	bl	8012354 <tcp_abandon>
+      return;
+ 8014048:	e007      	b.n	801405a <tcp_listen_input+0x1c2>
+    tcp_output(npcb);
+ 801404a:	6978      	ldr	r0, [r7, #20]
+ 801404c:	f002 f922 	bl	8016294 <tcp_output>
+  return;
+ 8014050:	bf00      	nop
+ 8014052:	e001      	b.n	8014058 <tcp_listen_input+0x1c0>
+    return;
+ 8014054:	bf00      	nop
+ 8014056:	e000      	b.n	801405a <tcp_listen_input+0x1c2>
+  return;
+ 8014058:	bf00      	nop
+}
+ 801405a:	371c      	adds	r7, #28
+ 801405c:	46bd      	mov	sp, r7
+ 801405e:	bd90      	pop	{r4, r7, pc}
+ 8014060:	20008744 	.word	0x20008744
+ 8014064:	0801e9e0 	.word	0x0801e9e0
+ 8014068:	0801ebd8 	.word	0x0801ebd8
+ 801406c:	0801ea2c 	.word	0x0801ea2c
+ 8014070:	2000873c 	.word	0x2000873c
+ 8014074:	20008742 	.word	0x20008742
+ 8014078:	20008738 	.word	0x20008738
+ 801407c:	20008728 	.word	0x20008728
+ 8014080:	2000c0c4 	.word	0x2000c0c4
+ 8014084:	2000c0c8 	.word	0x2000c0c8
+ 8014088:	2000c0b4 	.word	0x2000c0b4
+ 801408c:	2000f7e8 	.word	0x2000f7e8
+ 8014090:	2000f7e4 	.word	0x2000f7e4
+
+08014094 <tcp_timewait_input>:
+ * @note the segment which arrived is saved in global variables, therefore only the pcb
+ *       involved is passed as a parameter to this function
+ */
+static void
+tcp_timewait_input(struct tcp_pcb *pcb)
+{
+ 8014094:	b580      	push	{r7, lr}
+ 8014096:	b086      	sub	sp, #24
+ 8014098:	af04      	add	r7, sp, #16
+ 801409a:	6078      	str	r0, [r7, #4]
+  /* RFC 1337: in TIME_WAIT, ignore RST and ACK FINs + any 'acceptable' segments */
+  /* RFC 793 3.9 Event Processing - Segment Arrives:
+   * - first check sequence number - we skip that one in TIME_WAIT (always
+   *   acceptable since we only send ACKs)
+   * - second check the RST bit (... return) */
+  if (flags & TCP_RST) {
+ 801409c:	4b30      	ldr	r3, [pc, #192]	; (8014160 <tcp_timewait_input+0xcc>)
+ 801409e:	781b      	ldrb	r3, [r3, #0]
+ 80140a0:	f003 0304 	and.w	r3, r3, #4
+ 80140a4:	2b00      	cmp	r3, #0
+ 80140a6:	d154      	bne.n	8014152 <tcp_timewait_input+0xbe>
+    return;
+  }
+
+  LWIP_ASSERT("tcp_timewait_input: invalid pcb", pcb != NULL);
+ 80140a8:	687b      	ldr	r3, [r7, #4]
+ 80140aa:	2b00      	cmp	r3, #0
+ 80140ac:	d106      	bne.n	80140bc <tcp_timewait_input+0x28>
+ 80140ae:	4b2d      	ldr	r3, [pc, #180]	; (8014164 <tcp_timewait_input+0xd0>)
+ 80140b0:	f240 22ee 	movw	r2, #750	; 0x2ee
+ 80140b4:	492c      	ldr	r1, [pc, #176]	; (8014168 <tcp_timewait_input+0xd4>)
+ 80140b6:	482d      	ldr	r0, [pc, #180]	; (801416c <tcp_timewait_input+0xd8>)
+ 80140b8:	f008 f99e 	bl	801c3f8 <iprintf>
+
+  /* - fourth, check the SYN bit, */
+  if (flags & TCP_SYN) {
+ 80140bc:	4b28      	ldr	r3, [pc, #160]	; (8014160 <tcp_timewait_input+0xcc>)
+ 80140be:	781b      	ldrb	r3, [r3, #0]
+ 80140c0:	f003 0302 	and.w	r3, r3, #2
+ 80140c4:	2b00      	cmp	r3, #0
+ 80140c6:	d02a      	beq.n	801411e <tcp_timewait_input+0x8a>
+    /* If an incoming segment is not acceptable, an acknowledgment
+       should be sent in reply */
+    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd)) {
+ 80140c8:	4b29      	ldr	r3, [pc, #164]	; (8014170 <tcp_timewait_input+0xdc>)
+ 80140ca:	681a      	ldr	r2, [r3, #0]
+ 80140cc:	687b      	ldr	r3, [r7, #4]
+ 80140ce:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80140d0:	1ad3      	subs	r3, r2, r3
+ 80140d2:	2b00      	cmp	r3, #0
+ 80140d4:	db2d      	blt.n	8014132 <tcp_timewait_input+0x9e>
+ 80140d6:	4b26      	ldr	r3, [pc, #152]	; (8014170 <tcp_timewait_input+0xdc>)
+ 80140d8:	681a      	ldr	r2, [r3, #0]
+ 80140da:	687b      	ldr	r3, [r7, #4]
+ 80140dc:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80140de:	6879      	ldr	r1, [r7, #4]
+ 80140e0:	8d09      	ldrh	r1, [r1, #40]	; 0x28
+ 80140e2:	440b      	add	r3, r1
+ 80140e4:	1ad3      	subs	r3, r2, r3
+ 80140e6:	2b00      	cmp	r3, #0
+ 80140e8:	dc23      	bgt.n	8014132 <tcp_timewait_input+0x9e>
+      /* If the SYN is in the window it is an error, send a reset */
+      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 80140ea:	4b22      	ldr	r3, [pc, #136]	; (8014174 <tcp_timewait_input+0xe0>)
+ 80140ec:	6819      	ldr	r1, [r3, #0]
+ 80140ee:	4b22      	ldr	r3, [pc, #136]	; (8014178 <tcp_timewait_input+0xe4>)
+ 80140f0:	881b      	ldrh	r3, [r3, #0]
+ 80140f2:	461a      	mov	r2, r3
+ 80140f4:	4b1e      	ldr	r3, [pc, #120]	; (8014170 <tcp_timewait_input+0xdc>)
+ 80140f6:	681b      	ldr	r3, [r3, #0]
+ 80140f8:	18d0      	adds	r0, r2, r3
+              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
+ 80140fa:	4b20      	ldr	r3, [pc, #128]	; (801417c <tcp_timewait_input+0xe8>)
+ 80140fc:	681b      	ldr	r3, [r3, #0]
+      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 80140fe:	885b      	ldrh	r3, [r3, #2]
+ 8014100:	b29b      	uxth	r3, r3
+              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
+ 8014102:	4a1e      	ldr	r2, [pc, #120]	; (801417c <tcp_timewait_input+0xe8>)
+ 8014104:	6812      	ldr	r2, [r2, #0]
+      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 8014106:	8812      	ldrh	r2, [r2, #0]
+ 8014108:	b292      	uxth	r2, r2
+ 801410a:	9202      	str	r2, [sp, #8]
+ 801410c:	9301      	str	r3, [sp, #4]
+ 801410e:	4b1c      	ldr	r3, [pc, #112]	; (8014180 <tcp_timewait_input+0xec>)
+ 8014110:	9300      	str	r3, [sp, #0]
+ 8014112:	4b1c      	ldr	r3, [pc, #112]	; (8014184 <tcp_timewait_input+0xf0>)
+ 8014114:	4602      	mov	r2, r0
+ 8014116:	6878      	ldr	r0, [r7, #4]
+ 8014118:	f002 fe82 	bl	8016e20 <tcp_rst>
+      return;
+ 801411c:	e01c      	b.n	8014158 <tcp_timewait_input+0xc4>
+    }
+  } else if (flags & TCP_FIN) {
+ 801411e:	4b10      	ldr	r3, [pc, #64]	; (8014160 <tcp_timewait_input+0xcc>)
+ 8014120:	781b      	ldrb	r3, [r3, #0]
+ 8014122:	f003 0301 	and.w	r3, r3, #1
+ 8014126:	2b00      	cmp	r3, #0
+ 8014128:	d003      	beq.n	8014132 <tcp_timewait_input+0x9e>
+    /* - eighth, check the FIN bit: Remain in the TIME-WAIT state.
+         Restart the 2 MSL time-wait timeout.*/
+    pcb->tmr = tcp_ticks;
+ 801412a:	4b17      	ldr	r3, [pc, #92]	; (8014188 <tcp_timewait_input+0xf4>)
+ 801412c:	681a      	ldr	r2, [r3, #0]
+ 801412e:	687b      	ldr	r3, [r7, #4]
+ 8014130:	621a      	str	r2, [r3, #32]
+  }
+
+  if ((tcplen > 0)) {
+ 8014132:	4b11      	ldr	r3, [pc, #68]	; (8014178 <tcp_timewait_input+0xe4>)
+ 8014134:	881b      	ldrh	r3, [r3, #0]
+ 8014136:	2b00      	cmp	r3, #0
+ 8014138:	d00d      	beq.n	8014156 <tcp_timewait_input+0xc2>
+    /* Acknowledge data, FIN or out-of-window SYN */
+    tcp_ack_now(pcb);
+ 801413a:	687b      	ldr	r3, [r7, #4]
+ 801413c:	8b5b      	ldrh	r3, [r3, #26]
+ 801413e:	f043 0302 	orr.w	r3, r3, #2
+ 8014142:	b29a      	uxth	r2, r3
+ 8014144:	687b      	ldr	r3, [r7, #4]
+ 8014146:	835a      	strh	r2, [r3, #26]
+    tcp_output(pcb);
+ 8014148:	6878      	ldr	r0, [r7, #4]
+ 801414a:	f002 f8a3 	bl	8016294 <tcp_output>
+  }
+  return;
+ 801414e:	bf00      	nop
+ 8014150:	e001      	b.n	8014156 <tcp_timewait_input+0xc2>
+    return;
+ 8014152:	bf00      	nop
+ 8014154:	e000      	b.n	8014158 <tcp_timewait_input+0xc4>
+  return;
+ 8014156:	bf00      	nop
+}
+ 8014158:	3708      	adds	r7, #8
+ 801415a:	46bd      	mov	sp, r7
+ 801415c:	bd80      	pop	{r7, pc}
+ 801415e:	bf00      	nop
+ 8014160:	20008744 	.word	0x20008744
+ 8014164:	0801e9e0 	.word	0x0801e9e0
+ 8014168:	0801ebf8 	.word	0x0801ebf8
+ 801416c:	0801ea2c 	.word	0x0801ea2c
+ 8014170:	20008738 	.word	0x20008738
+ 8014174:	2000873c 	.word	0x2000873c
+ 8014178:	20008742 	.word	0x20008742
+ 801417c:	20008728 	.word	0x20008728
+ 8014180:	2000c0c4 	.word	0x2000c0c4
+ 8014184:	2000c0c8 	.word	0x2000c0c8
+ 8014188:	2000f7ec 	.word	0x2000f7ec
+
+0801418c <tcp_process>:
+ * @note the segment which arrived is saved in global variables, therefore only the pcb
+ *       involved is passed as a parameter to this function
+ */
+static err_t
+tcp_process(struct tcp_pcb *pcb)
+{
+ 801418c:	b590      	push	{r4, r7, lr}
+ 801418e:	b08d      	sub	sp, #52	; 0x34
+ 8014190:	af04      	add	r7, sp, #16
+ 8014192:	6078      	str	r0, [r7, #4]
+  struct tcp_seg *rseg;
+  u8_t acceptable = 0;
+ 8014194:	2300      	movs	r3, #0
+ 8014196:	76fb      	strb	r3, [r7, #27]
+  err_t err;
+
+  err = ERR_OK;
+ 8014198:	2300      	movs	r3, #0
+ 801419a:	76bb      	strb	r3, [r7, #26]
+
+  LWIP_ASSERT("tcp_process: invalid pcb", pcb != NULL);
+ 801419c:	687b      	ldr	r3, [r7, #4]
+ 801419e:	2b00      	cmp	r3, #0
+ 80141a0:	d106      	bne.n	80141b0 <tcp_process+0x24>
+ 80141a2:	4ba5      	ldr	r3, [pc, #660]	; (8014438 <tcp_process+0x2ac>)
+ 80141a4:	f44f 7247 	mov.w	r2, #796	; 0x31c
+ 80141a8:	49a4      	ldr	r1, [pc, #656]	; (801443c <tcp_process+0x2b0>)
+ 80141aa:	48a5      	ldr	r0, [pc, #660]	; (8014440 <tcp_process+0x2b4>)
+ 80141ac:	f008 f924 	bl	801c3f8 <iprintf>
+
+  /* Process incoming RST segments. */
+  if (flags & TCP_RST) {
+ 80141b0:	4ba4      	ldr	r3, [pc, #656]	; (8014444 <tcp_process+0x2b8>)
+ 80141b2:	781b      	ldrb	r3, [r3, #0]
+ 80141b4:	f003 0304 	and.w	r3, r3, #4
+ 80141b8:	2b00      	cmp	r3, #0
+ 80141ba:	d04e      	beq.n	801425a <tcp_process+0xce>
+    /* First, determine if the reset is acceptable. */
+    if (pcb->state == SYN_SENT) {
+ 80141bc:	687b      	ldr	r3, [r7, #4]
+ 80141be:	7d1b      	ldrb	r3, [r3, #20]
+ 80141c0:	2b02      	cmp	r3, #2
+ 80141c2:	d108      	bne.n	80141d6 <tcp_process+0x4a>
+      /* "In the SYN-SENT state (a RST received in response to an initial SYN),
+          the RST is acceptable if the ACK field acknowledges the SYN." */
+      if (ackno == pcb->snd_nxt) {
+ 80141c4:	687b      	ldr	r3, [r7, #4]
+ 80141c6:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 80141c8:	4b9f      	ldr	r3, [pc, #636]	; (8014448 <tcp_process+0x2bc>)
+ 80141ca:	681b      	ldr	r3, [r3, #0]
+ 80141cc:	429a      	cmp	r2, r3
+ 80141ce:	d123      	bne.n	8014218 <tcp_process+0x8c>
+        acceptable = 1;
+ 80141d0:	2301      	movs	r3, #1
+ 80141d2:	76fb      	strb	r3, [r7, #27]
+ 80141d4:	e020      	b.n	8014218 <tcp_process+0x8c>
+      }
+    } else {
+      /* "In all states except SYN-SENT, all reset (RST) segments are validated
+          by checking their SEQ-fields." */
+      if (seqno == pcb->rcv_nxt) {
+ 80141d6:	687b      	ldr	r3, [r7, #4]
+ 80141d8:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 80141da:	4b9c      	ldr	r3, [pc, #624]	; (801444c <tcp_process+0x2c0>)
+ 80141dc:	681b      	ldr	r3, [r3, #0]
+ 80141de:	429a      	cmp	r2, r3
+ 80141e0:	d102      	bne.n	80141e8 <tcp_process+0x5c>
+        acceptable = 1;
+ 80141e2:	2301      	movs	r3, #1
+ 80141e4:	76fb      	strb	r3, [r7, #27]
+ 80141e6:	e017      	b.n	8014218 <tcp_process+0x8c>
+      } else  if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
+ 80141e8:	4b98      	ldr	r3, [pc, #608]	; (801444c <tcp_process+0x2c0>)
+ 80141ea:	681a      	ldr	r2, [r3, #0]
+ 80141ec:	687b      	ldr	r3, [r7, #4]
+ 80141ee:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80141f0:	1ad3      	subs	r3, r2, r3
+ 80141f2:	2b00      	cmp	r3, #0
+ 80141f4:	db10      	blt.n	8014218 <tcp_process+0x8c>
+ 80141f6:	4b95      	ldr	r3, [pc, #596]	; (801444c <tcp_process+0x2c0>)
+ 80141f8:	681a      	ldr	r2, [r3, #0]
+ 80141fa:	687b      	ldr	r3, [r7, #4]
+ 80141fc:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80141fe:	6879      	ldr	r1, [r7, #4]
+ 8014200:	8d09      	ldrh	r1, [r1, #40]	; 0x28
+ 8014202:	440b      	add	r3, r1
+ 8014204:	1ad3      	subs	r3, r2, r3
+ 8014206:	2b00      	cmp	r3, #0
+ 8014208:	dc06      	bgt.n	8014218 <tcp_process+0x8c>
+                                  pcb->rcv_nxt + pcb->rcv_wnd)) {
+        /* If the sequence number is inside the window, we send a challenge ACK
+           and wait for a re-send with matching sequence number.
+           This follows RFC 5961 section 3.2 and addresses CVE-2004-0230
+           (RST spoofing attack), which is present in RFC 793 RST handling. */
+        tcp_ack_now(pcb);
+ 801420a:	687b      	ldr	r3, [r7, #4]
+ 801420c:	8b5b      	ldrh	r3, [r3, #26]
+ 801420e:	f043 0302 	orr.w	r3, r3, #2
+ 8014212:	b29a      	uxth	r2, r3
+ 8014214:	687b      	ldr	r3, [r7, #4]
+ 8014216:	835a      	strh	r2, [r3, #26]
+      }
+    }
+
+    if (acceptable) {
+ 8014218:	7efb      	ldrb	r3, [r7, #27]
+ 801421a:	2b00      	cmp	r3, #0
+ 801421c:	d01b      	beq.n	8014256 <tcp_process+0xca>
+      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n"));
+      LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED);
+ 801421e:	687b      	ldr	r3, [r7, #4]
+ 8014220:	7d1b      	ldrb	r3, [r3, #20]
+ 8014222:	2b00      	cmp	r3, #0
+ 8014224:	d106      	bne.n	8014234 <tcp_process+0xa8>
+ 8014226:	4b84      	ldr	r3, [pc, #528]	; (8014438 <tcp_process+0x2ac>)
+ 8014228:	f44f 724e 	mov.w	r2, #824	; 0x338
+ 801422c:	4988      	ldr	r1, [pc, #544]	; (8014450 <tcp_process+0x2c4>)
+ 801422e:	4884      	ldr	r0, [pc, #528]	; (8014440 <tcp_process+0x2b4>)
+ 8014230:	f008 f8e2 	bl	801c3f8 <iprintf>
+      recv_flags |= TF_RESET;
+ 8014234:	4b87      	ldr	r3, [pc, #540]	; (8014454 <tcp_process+0x2c8>)
+ 8014236:	781b      	ldrb	r3, [r3, #0]
+ 8014238:	f043 0308 	orr.w	r3, r3, #8
+ 801423c:	b2da      	uxtb	r2, r3
+ 801423e:	4b85      	ldr	r3, [pc, #532]	; (8014454 <tcp_process+0x2c8>)
+ 8014240:	701a      	strb	r2, [r3, #0]
+      tcp_clear_flags(pcb, TF_ACK_DELAY);
+ 8014242:	687b      	ldr	r3, [r7, #4]
+ 8014244:	8b5b      	ldrh	r3, [r3, #26]
+ 8014246:	f023 0301 	bic.w	r3, r3, #1
+ 801424a:	b29a      	uxth	r2, r3
+ 801424c:	687b      	ldr	r3, [r7, #4]
+ 801424e:	835a      	strh	r2, [r3, #26]
+      return ERR_RST;
+ 8014250:	f06f 030d 	mvn.w	r3, #13
+ 8014254:	e37a      	b.n	801494c <tcp_process+0x7c0>
+    } else {
+      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
+                                    seqno, pcb->rcv_nxt));
+      LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
+                              seqno, pcb->rcv_nxt));
+      return ERR_OK;
+ 8014256:	2300      	movs	r3, #0
+ 8014258:	e378      	b.n	801494c <tcp_process+0x7c0>
+    }
+  }
+
+  if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) {
+ 801425a:	4b7a      	ldr	r3, [pc, #488]	; (8014444 <tcp_process+0x2b8>)
+ 801425c:	781b      	ldrb	r3, [r3, #0]
+ 801425e:	f003 0302 	and.w	r3, r3, #2
+ 8014262:	2b00      	cmp	r3, #0
+ 8014264:	d010      	beq.n	8014288 <tcp_process+0xfc>
+ 8014266:	687b      	ldr	r3, [r7, #4]
+ 8014268:	7d1b      	ldrb	r3, [r3, #20]
+ 801426a:	2b02      	cmp	r3, #2
+ 801426c:	d00c      	beq.n	8014288 <tcp_process+0xfc>
+ 801426e:	687b      	ldr	r3, [r7, #4]
+ 8014270:	7d1b      	ldrb	r3, [r3, #20]
+ 8014272:	2b03      	cmp	r3, #3
+ 8014274:	d008      	beq.n	8014288 <tcp_process+0xfc>
+    /* Cope with new connection attempt after remote end crashed */
+    tcp_ack_now(pcb);
+ 8014276:	687b      	ldr	r3, [r7, #4]
+ 8014278:	8b5b      	ldrh	r3, [r3, #26]
+ 801427a:	f043 0302 	orr.w	r3, r3, #2
+ 801427e:	b29a      	uxth	r2, r3
+ 8014280:	687b      	ldr	r3, [r7, #4]
+ 8014282:	835a      	strh	r2, [r3, #26]
+    return ERR_OK;
+ 8014284:	2300      	movs	r3, #0
+ 8014286:	e361      	b.n	801494c <tcp_process+0x7c0>
+  }
+
+  if ((pcb->flags & TF_RXCLOSED) == 0) {
+ 8014288:	687b      	ldr	r3, [r7, #4]
+ 801428a:	8b5b      	ldrh	r3, [r3, #26]
+ 801428c:	f003 0310 	and.w	r3, r3, #16
+ 8014290:	2b00      	cmp	r3, #0
+ 8014292:	d103      	bne.n	801429c <tcp_process+0x110>
+    /* Update the PCB (in)activity timer unless rx is closed (see tcp_shutdown) */
+    pcb->tmr = tcp_ticks;
+ 8014294:	4b70      	ldr	r3, [pc, #448]	; (8014458 <tcp_process+0x2cc>)
+ 8014296:	681a      	ldr	r2, [r3, #0]
+ 8014298:	687b      	ldr	r3, [r7, #4]
+ 801429a:	621a      	str	r2, [r3, #32]
+  }
+  pcb->keep_cnt_sent = 0;
+ 801429c:	687b      	ldr	r3, [r7, #4]
+ 801429e:	2200      	movs	r2, #0
+ 80142a0:	f883 209b 	strb.w	r2, [r3, #155]	; 0x9b
+  pcb->persist_probe = 0;
+ 80142a4:	687b      	ldr	r3, [r7, #4]
+ 80142a6:	2200      	movs	r2, #0
+ 80142a8:	f883 209a 	strb.w	r2, [r3, #154]	; 0x9a
+
+  tcp_parseopt(pcb);
+ 80142ac:	6878      	ldr	r0, [r7, #4]
+ 80142ae:	f001 fc2d 	bl	8015b0c <tcp_parseopt>
+
+  /* Do different things depending on the TCP state. */
+  switch (pcb->state) {
+ 80142b2:	687b      	ldr	r3, [r7, #4]
+ 80142b4:	7d1b      	ldrb	r3, [r3, #20]
+ 80142b6:	3b02      	subs	r3, #2
+ 80142b8:	2b07      	cmp	r3, #7
+ 80142ba:	f200 8337 	bhi.w	801492c <tcp_process+0x7a0>
+ 80142be:	a201      	add	r2, pc, #4	; (adr r2, 80142c4 <tcp_process+0x138>)
+ 80142c0:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 80142c4:	080142e5 	.word	0x080142e5
+ 80142c8:	08014515 	.word	0x08014515
+ 80142cc:	0801468d 	.word	0x0801468d
+ 80142d0:	080146b7 	.word	0x080146b7
+ 80142d4:	080147db 	.word	0x080147db
+ 80142d8:	0801468d 	.word	0x0801468d
+ 80142dc:	08014867 	.word	0x08014867
+ 80142e0:	080148f7 	.word	0x080148f7
+    case SYN_SENT:
+      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno,
+                                    pcb->snd_nxt, lwip_ntohl(pcb->unacked->tcphdr->seqno)));
+      /* received SYN ACK with expected sequence number? */
+      if ((flags & TCP_ACK) && (flags & TCP_SYN)
+ 80142e4:	4b57      	ldr	r3, [pc, #348]	; (8014444 <tcp_process+0x2b8>)
+ 80142e6:	781b      	ldrb	r3, [r3, #0]
+ 80142e8:	f003 0310 	and.w	r3, r3, #16
+ 80142ec:	2b00      	cmp	r3, #0
+ 80142ee:	f000 80e4 	beq.w	80144ba <tcp_process+0x32e>
+ 80142f2:	4b54      	ldr	r3, [pc, #336]	; (8014444 <tcp_process+0x2b8>)
+ 80142f4:	781b      	ldrb	r3, [r3, #0]
+ 80142f6:	f003 0302 	and.w	r3, r3, #2
+ 80142fa:	2b00      	cmp	r3, #0
+ 80142fc:	f000 80dd 	beq.w	80144ba <tcp_process+0x32e>
+          && (ackno == pcb->lastack + 1)) {
+ 8014300:	687b      	ldr	r3, [r7, #4]
+ 8014302:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8014304:	1c5a      	adds	r2, r3, #1
+ 8014306:	4b50      	ldr	r3, [pc, #320]	; (8014448 <tcp_process+0x2bc>)
+ 8014308:	681b      	ldr	r3, [r3, #0]
+ 801430a:	429a      	cmp	r2, r3
+ 801430c:	f040 80d5 	bne.w	80144ba <tcp_process+0x32e>
+        pcb->rcv_nxt = seqno + 1;
+ 8014310:	4b4e      	ldr	r3, [pc, #312]	; (801444c <tcp_process+0x2c0>)
+ 8014312:	681b      	ldr	r3, [r3, #0]
+ 8014314:	1c5a      	adds	r2, r3, #1
+ 8014316:	687b      	ldr	r3, [r7, #4]
+ 8014318:	625a      	str	r2, [r3, #36]	; 0x24
+        pcb->rcv_ann_right_edge = pcb->rcv_nxt;
+ 801431a:	687b      	ldr	r3, [r7, #4]
+ 801431c:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 801431e:	687b      	ldr	r3, [r7, #4]
+ 8014320:	62da      	str	r2, [r3, #44]	; 0x2c
+        pcb->lastack = ackno;
+ 8014322:	4b49      	ldr	r3, [pc, #292]	; (8014448 <tcp_process+0x2bc>)
+ 8014324:	681a      	ldr	r2, [r3, #0]
+ 8014326:	687b      	ldr	r3, [r7, #4]
+ 8014328:	645a      	str	r2, [r3, #68]	; 0x44
+        pcb->snd_wnd = tcphdr->wnd;
+ 801432a:	4b4c      	ldr	r3, [pc, #304]	; (801445c <tcp_process+0x2d0>)
+ 801432c:	681b      	ldr	r3, [r3, #0]
+ 801432e:	89db      	ldrh	r3, [r3, #14]
+ 8014330:	b29a      	uxth	r2, r3
+ 8014332:	687b      	ldr	r3, [r7, #4]
+ 8014334:	f8a3 2060 	strh.w	r2, [r3, #96]	; 0x60
+        pcb->snd_wnd_max = pcb->snd_wnd;
+ 8014338:	687b      	ldr	r3, [r7, #4]
+ 801433a:	f8b3 2060 	ldrh.w	r2, [r3, #96]	; 0x60
+ 801433e:	687b      	ldr	r3, [r7, #4]
+ 8014340:	f8a3 2062 	strh.w	r2, [r3, #98]	; 0x62
+        pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */
+ 8014344:	4b41      	ldr	r3, [pc, #260]	; (801444c <tcp_process+0x2c0>)
+ 8014346:	681b      	ldr	r3, [r3, #0]
+ 8014348:	1e5a      	subs	r2, r3, #1
+ 801434a:	687b      	ldr	r3, [r7, #4]
+ 801434c:	655a      	str	r2, [r3, #84]	; 0x54
+        pcb->state = ESTABLISHED;
+ 801434e:	687b      	ldr	r3, [r7, #4]
+ 8014350:	2204      	movs	r2, #4
+ 8014352:	751a      	strb	r2, [r3, #20]
+
+#if TCP_CALCULATE_EFF_SEND_MSS
+        pcb->mss = tcp_eff_send_mss(pcb->mss, &pcb->local_ip, &pcb->remote_ip);
+ 8014354:	687b      	ldr	r3, [r7, #4]
+ 8014356:	8e5c      	ldrh	r4, [r3, #50]	; 0x32
+ 8014358:	687b      	ldr	r3, [r7, #4]
+ 801435a:	3304      	adds	r3, #4
+ 801435c:	4618      	mov	r0, r3
+ 801435e:	f006 fcd7 	bl	801ad10 <ip4_route>
+ 8014362:	4601      	mov	r1, r0
+ 8014364:	687b      	ldr	r3, [r7, #4]
+ 8014366:	3304      	adds	r3, #4
+ 8014368:	461a      	mov	r2, r3
+ 801436a:	4620      	mov	r0, r4
+ 801436c:	f7ff f88e 	bl	801348c <tcp_eff_send_mss_netif>
+ 8014370:	4603      	mov	r3, r0
+ 8014372:	461a      	mov	r2, r3
+ 8014374:	687b      	ldr	r3, [r7, #4]
+ 8014376:	865a      	strh	r2, [r3, #50]	; 0x32
+#endif /* TCP_CALCULATE_EFF_SEND_MSS */
+
+        pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
+ 8014378:	687b      	ldr	r3, [r7, #4]
+ 801437a:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 801437c:	009a      	lsls	r2, r3, #2
+ 801437e:	687b      	ldr	r3, [r7, #4]
+ 8014380:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8014382:	005b      	lsls	r3, r3, #1
+ 8014384:	f241 111c 	movw	r1, #4380	; 0x111c
+ 8014388:	428b      	cmp	r3, r1
+ 801438a:	bf38      	it	cc
+ 801438c:	460b      	movcc	r3, r1
+ 801438e:	429a      	cmp	r2, r3
+ 8014390:	d204      	bcs.n	801439c <tcp_process+0x210>
+ 8014392:	687b      	ldr	r3, [r7, #4]
+ 8014394:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8014396:	009b      	lsls	r3, r3, #2
+ 8014398:	b29b      	uxth	r3, r3
+ 801439a:	e00d      	b.n	80143b8 <tcp_process+0x22c>
+ 801439c:	687b      	ldr	r3, [r7, #4]
+ 801439e:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 80143a0:	005b      	lsls	r3, r3, #1
+ 80143a2:	f241 121c 	movw	r2, #4380	; 0x111c
+ 80143a6:	4293      	cmp	r3, r2
+ 80143a8:	d904      	bls.n	80143b4 <tcp_process+0x228>
+ 80143aa:	687b      	ldr	r3, [r7, #4]
+ 80143ac:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 80143ae:	005b      	lsls	r3, r3, #1
+ 80143b0:	b29b      	uxth	r3, r3
+ 80143b2:	e001      	b.n	80143b8 <tcp_process+0x22c>
+ 80143b4:	f241 131c 	movw	r3, #4380	; 0x111c
+ 80143b8:	687a      	ldr	r2, [r7, #4]
+ 80143ba:	f8a2 3048 	strh.w	r3, [r2, #72]	; 0x48
+        LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SENT): cwnd %"TCPWNDSIZE_F
+                                     " ssthresh %"TCPWNDSIZE_F"\n",
+                                     pcb->cwnd, pcb->ssthresh));
+        LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0));
+ 80143be:	687b      	ldr	r3, [r7, #4]
+ 80143c0:	f8b3 3066 	ldrh.w	r3, [r3, #102]	; 0x66
+ 80143c4:	2b00      	cmp	r3, #0
+ 80143c6:	d106      	bne.n	80143d6 <tcp_process+0x24a>
+ 80143c8:	4b1b      	ldr	r3, [pc, #108]	; (8014438 <tcp_process+0x2ac>)
+ 80143ca:	f44f 725b 	mov.w	r2, #876	; 0x36c
+ 80143ce:	4924      	ldr	r1, [pc, #144]	; (8014460 <tcp_process+0x2d4>)
+ 80143d0:	481b      	ldr	r0, [pc, #108]	; (8014440 <tcp_process+0x2b4>)
+ 80143d2:	f008 f811 	bl	801c3f8 <iprintf>
+        --pcb->snd_queuelen;
+ 80143d6:	687b      	ldr	r3, [r7, #4]
+ 80143d8:	f8b3 3066 	ldrh.w	r3, [r3, #102]	; 0x66
+ 80143dc:	3b01      	subs	r3, #1
+ 80143de:	b29a      	uxth	r2, r3
+ 80143e0:	687b      	ldr	r3, [r7, #4]
+ 80143e2:	f8a3 2066 	strh.w	r2, [r3, #102]	; 0x66
+        LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));
+        rseg = pcb->unacked;
+ 80143e6:	687b      	ldr	r3, [r7, #4]
+ 80143e8:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80143ea:	61fb      	str	r3, [r7, #28]
+        if (rseg == NULL) {
+ 80143ec:	69fb      	ldr	r3, [r7, #28]
+ 80143ee:	2b00      	cmp	r3, #0
+ 80143f0:	d111      	bne.n	8014416 <tcp_process+0x28a>
+          /* might happen if tcp_output fails in tcp_rexmit_rto()
+             in which case the segment is on the unsent list */
+          rseg = pcb->unsent;
+ 80143f2:	687b      	ldr	r3, [r7, #4]
+ 80143f4:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 80143f6:	61fb      	str	r3, [r7, #28]
+          LWIP_ASSERT("no segment to free", rseg != NULL);
+ 80143f8:	69fb      	ldr	r3, [r7, #28]
+ 80143fa:	2b00      	cmp	r3, #0
+ 80143fc:	d106      	bne.n	801440c <tcp_process+0x280>
+ 80143fe:	4b0e      	ldr	r3, [pc, #56]	; (8014438 <tcp_process+0x2ac>)
+ 8014400:	f44f 725d 	mov.w	r2, #884	; 0x374
+ 8014404:	4917      	ldr	r1, [pc, #92]	; (8014464 <tcp_process+0x2d8>)
+ 8014406:	480e      	ldr	r0, [pc, #56]	; (8014440 <tcp_process+0x2b4>)
+ 8014408:	f007 fff6 	bl	801c3f8 <iprintf>
+          pcb->unsent = rseg->next;
+ 801440c:	69fb      	ldr	r3, [r7, #28]
+ 801440e:	681a      	ldr	r2, [r3, #0]
+ 8014410:	687b      	ldr	r3, [r7, #4]
+ 8014412:	66da      	str	r2, [r3, #108]	; 0x6c
+ 8014414:	e003      	b.n	801441e <tcp_process+0x292>
+        } else {
+          pcb->unacked = rseg->next;
+ 8014416:	69fb      	ldr	r3, [r7, #28]
+ 8014418:	681a      	ldr	r2, [r3, #0]
+ 801441a:	687b      	ldr	r3, [r7, #4]
+ 801441c:	671a      	str	r2, [r3, #112]	; 0x70
+        }
+        tcp_seg_free(rseg);
+ 801441e:	69f8      	ldr	r0, [r7, #28]
+ 8014420:	f7fe fd3e 	bl	8012ea0 <tcp_seg_free>
+
+        /* If there's nothing left to acknowledge, stop the retransmit
+           timer, otherwise reset it to start again */
+        if (pcb->unacked == NULL) {
+ 8014424:	687b      	ldr	r3, [r7, #4]
+ 8014426:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8014428:	2b00      	cmp	r3, #0
+ 801442a:	d11d      	bne.n	8014468 <tcp_process+0x2dc>
+          pcb->rtime = -1;
+ 801442c:	687b      	ldr	r3, [r7, #4]
+ 801442e:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8014432:	861a      	strh	r2, [r3, #48]	; 0x30
+ 8014434:	e01f      	b.n	8014476 <tcp_process+0x2ea>
+ 8014436:	bf00      	nop
+ 8014438:	0801e9e0 	.word	0x0801e9e0
+ 801443c:	0801ec18 	.word	0x0801ec18
+ 8014440:	0801ea2c 	.word	0x0801ea2c
+ 8014444:	20008744 	.word	0x20008744
+ 8014448:	2000873c 	.word	0x2000873c
+ 801444c:	20008738 	.word	0x20008738
+ 8014450:	0801ec34 	.word	0x0801ec34
+ 8014454:	20008745 	.word	0x20008745
+ 8014458:	2000f7ec 	.word	0x2000f7ec
+ 801445c:	20008728 	.word	0x20008728
+ 8014460:	0801ec54 	.word	0x0801ec54
+ 8014464:	0801ec6c 	.word	0x0801ec6c
+        } else {
+          pcb->rtime = 0;
+ 8014468:	687b      	ldr	r3, [r7, #4]
+ 801446a:	2200      	movs	r2, #0
+ 801446c:	861a      	strh	r2, [r3, #48]	; 0x30
+          pcb->nrtx = 0;
+ 801446e:	687b      	ldr	r3, [r7, #4]
+ 8014470:	2200      	movs	r2, #0
+ 8014472:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+        }
+
+        /* Call the user specified function to call when successfully
+         * connected. */
+        TCP_EVENT_CONNECTED(pcb, ERR_OK, err);
+ 8014476:	687b      	ldr	r3, [r7, #4]
+ 8014478:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 801447c:	2b00      	cmp	r3, #0
+ 801447e:	d00a      	beq.n	8014496 <tcp_process+0x30a>
+ 8014480:	687b      	ldr	r3, [r7, #4]
+ 8014482:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 8014486:	687a      	ldr	r2, [r7, #4]
+ 8014488:	6910      	ldr	r0, [r2, #16]
+ 801448a:	2200      	movs	r2, #0
+ 801448c:	6879      	ldr	r1, [r7, #4]
+ 801448e:	4798      	blx	r3
+ 8014490:	4603      	mov	r3, r0
+ 8014492:	76bb      	strb	r3, [r7, #26]
+ 8014494:	e001      	b.n	801449a <tcp_process+0x30e>
+ 8014496:	2300      	movs	r3, #0
+ 8014498:	76bb      	strb	r3, [r7, #26]
+        if (err == ERR_ABRT) {
+ 801449a:	f997 301a 	ldrsb.w	r3, [r7, #26]
+ 801449e:	f113 0f0d 	cmn.w	r3, #13
+ 80144a2:	d102      	bne.n	80144aa <tcp_process+0x31e>
+          return ERR_ABRT;
+ 80144a4:	f06f 030c 	mvn.w	r3, #12
+ 80144a8:	e250      	b.n	801494c <tcp_process+0x7c0>
+        }
+        tcp_ack_now(pcb);
+ 80144aa:	687b      	ldr	r3, [r7, #4]
+ 80144ac:	8b5b      	ldrh	r3, [r3, #26]
+ 80144ae:	f043 0302 	orr.w	r3, r3, #2
+ 80144b2:	b29a      	uxth	r2, r3
+ 80144b4:	687b      	ldr	r3, [r7, #4]
+ 80144b6:	835a      	strh	r2, [r3, #26]
+        if (pcb->nrtx < TCP_SYNMAXRTX) {
+          pcb->rtime = 0;
+          tcp_rexmit_rto(pcb);
+        }
+      }
+      break;
+ 80144b8:	e23a      	b.n	8014930 <tcp_process+0x7a4>
+      else if (flags & TCP_ACK) {
+ 80144ba:	4b9d      	ldr	r3, [pc, #628]	; (8014730 <tcp_process+0x5a4>)
+ 80144bc:	781b      	ldrb	r3, [r3, #0]
+ 80144be:	f003 0310 	and.w	r3, r3, #16
+ 80144c2:	2b00      	cmp	r3, #0
+ 80144c4:	f000 8234 	beq.w	8014930 <tcp_process+0x7a4>
+        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 80144c8:	4b9a      	ldr	r3, [pc, #616]	; (8014734 <tcp_process+0x5a8>)
+ 80144ca:	6819      	ldr	r1, [r3, #0]
+ 80144cc:	4b9a      	ldr	r3, [pc, #616]	; (8014738 <tcp_process+0x5ac>)
+ 80144ce:	881b      	ldrh	r3, [r3, #0]
+ 80144d0:	461a      	mov	r2, r3
+ 80144d2:	4b9a      	ldr	r3, [pc, #616]	; (801473c <tcp_process+0x5b0>)
+ 80144d4:	681b      	ldr	r3, [r3, #0]
+ 80144d6:	18d0      	adds	r0, r2, r3
+                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
+ 80144d8:	4b99      	ldr	r3, [pc, #612]	; (8014740 <tcp_process+0x5b4>)
+ 80144da:	681b      	ldr	r3, [r3, #0]
+        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 80144dc:	885b      	ldrh	r3, [r3, #2]
+ 80144de:	b29b      	uxth	r3, r3
+                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
+ 80144e0:	4a97      	ldr	r2, [pc, #604]	; (8014740 <tcp_process+0x5b4>)
+ 80144e2:	6812      	ldr	r2, [r2, #0]
+        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 80144e4:	8812      	ldrh	r2, [r2, #0]
+ 80144e6:	b292      	uxth	r2, r2
+ 80144e8:	9202      	str	r2, [sp, #8]
+ 80144ea:	9301      	str	r3, [sp, #4]
+ 80144ec:	4b95      	ldr	r3, [pc, #596]	; (8014744 <tcp_process+0x5b8>)
+ 80144ee:	9300      	str	r3, [sp, #0]
+ 80144f0:	4b95      	ldr	r3, [pc, #596]	; (8014748 <tcp_process+0x5bc>)
+ 80144f2:	4602      	mov	r2, r0
+ 80144f4:	6878      	ldr	r0, [r7, #4]
+ 80144f6:	f002 fc93 	bl	8016e20 <tcp_rst>
+        if (pcb->nrtx < TCP_SYNMAXRTX) {
+ 80144fa:	687b      	ldr	r3, [r7, #4]
+ 80144fc:	f893 3042 	ldrb.w	r3, [r3, #66]	; 0x42
+ 8014500:	2b05      	cmp	r3, #5
+ 8014502:	f200 8215 	bhi.w	8014930 <tcp_process+0x7a4>
+          pcb->rtime = 0;
+ 8014506:	687b      	ldr	r3, [r7, #4]
+ 8014508:	2200      	movs	r2, #0
+ 801450a:	861a      	strh	r2, [r3, #48]	; 0x30
+          tcp_rexmit_rto(pcb);
+ 801450c:	6878      	ldr	r0, [r7, #4]
+ 801450e:	f002 fa51 	bl	80169b4 <tcp_rexmit_rto>
+      break;
+ 8014512:	e20d      	b.n	8014930 <tcp_process+0x7a4>
+    case SYN_RCVD:
+      if (flags & TCP_ACK) {
+ 8014514:	4b86      	ldr	r3, [pc, #536]	; (8014730 <tcp_process+0x5a4>)
+ 8014516:	781b      	ldrb	r3, [r3, #0]
+ 8014518:	f003 0310 	and.w	r3, r3, #16
+ 801451c:	2b00      	cmp	r3, #0
+ 801451e:	f000 80a1 	beq.w	8014664 <tcp_process+0x4d8>
+        /* expected ACK number? */
+        if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
+ 8014522:	4b84      	ldr	r3, [pc, #528]	; (8014734 <tcp_process+0x5a8>)
+ 8014524:	681a      	ldr	r2, [r3, #0]
+ 8014526:	687b      	ldr	r3, [r7, #4]
+ 8014528:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 801452a:	1ad3      	subs	r3, r2, r3
+ 801452c:	3b01      	subs	r3, #1
+ 801452e:	2b00      	cmp	r3, #0
+ 8014530:	db7e      	blt.n	8014630 <tcp_process+0x4a4>
+ 8014532:	4b80      	ldr	r3, [pc, #512]	; (8014734 <tcp_process+0x5a8>)
+ 8014534:	681a      	ldr	r2, [r3, #0]
+ 8014536:	687b      	ldr	r3, [r7, #4]
+ 8014538:	6d1b      	ldr	r3, [r3, #80]	; 0x50
+ 801453a:	1ad3      	subs	r3, r2, r3
+ 801453c:	2b00      	cmp	r3, #0
+ 801453e:	dc77      	bgt.n	8014630 <tcp_process+0x4a4>
+          pcb->state = ESTABLISHED;
+ 8014540:	687b      	ldr	r3, [r7, #4]
+ 8014542:	2204      	movs	r2, #4
+ 8014544:	751a      	strb	r2, [r3, #20]
+          LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
+#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
+          if (pcb->listener == NULL) {
+ 8014546:	687b      	ldr	r3, [r7, #4]
+ 8014548:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
+ 801454a:	2b00      	cmp	r3, #0
+ 801454c:	d102      	bne.n	8014554 <tcp_process+0x3c8>
+            /* listen pcb might be closed by now */
+            err = ERR_VAL;
+ 801454e:	23fa      	movs	r3, #250	; 0xfa
+ 8014550:	76bb      	strb	r3, [r7, #26]
+ 8014552:	e01d      	b.n	8014590 <tcp_process+0x404>
+          } else
+#endif /* LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG */
+          {
+#if LWIP_CALLBACK_API
+            LWIP_ASSERT("pcb->listener->accept != NULL", pcb->listener->accept != NULL);
+ 8014554:	687b      	ldr	r3, [r7, #4]
+ 8014556:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
+ 8014558:	699b      	ldr	r3, [r3, #24]
+ 801455a:	2b00      	cmp	r3, #0
+ 801455c:	d106      	bne.n	801456c <tcp_process+0x3e0>
+ 801455e:	4b7b      	ldr	r3, [pc, #492]	; (801474c <tcp_process+0x5c0>)
+ 8014560:	f44f 726a 	mov.w	r2, #936	; 0x3a8
+ 8014564:	497a      	ldr	r1, [pc, #488]	; (8014750 <tcp_process+0x5c4>)
+ 8014566:	487b      	ldr	r0, [pc, #492]	; (8014754 <tcp_process+0x5c8>)
+ 8014568:	f007 ff46 	bl	801c3f8 <iprintf>
+#endif
+            tcp_backlog_accepted(pcb);
+            /* Call the accept function. */
+            TCP_EVENT_ACCEPT(pcb->listener, pcb, pcb->callback_arg, ERR_OK, err);
+ 801456c:	687b      	ldr	r3, [r7, #4]
+ 801456e:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
+ 8014570:	699b      	ldr	r3, [r3, #24]
+ 8014572:	2b00      	cmp	r3, #0
+ 8014574:	d00a      	beq.n	801458c <tcp_process+0x400>
+ 8014576:	687b      	ldr	r3, [r7, #4]
+ 8014578:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
+ 801457a:	699b      	ldr	r3, [r3, #24]
+ 801457c:	687a      	ldr	r2, [r7, #4]
+ 801457e:	6910      	ldr	r0, [r2, #16]
+ 8014580:	2200      	movs	r2, #0
+ 8014582:	6879      	ldr	r1, [r7, #4]
+ 8014584:	4798      	blx	r3
+ 8014586:	4603      	mov	r3, r0
+ 8014588:	76bb      	strb	r3, [r7, #26]
+ 801458a:	e001      	b.n	8014590 <tcp_process+0x404>
+ 801458c:	23f0      	movs	r3, #240	; 0xf0
+ 801458e:	76bb      	strb	r3, [r7, #26]
+          }
+          if (err != ERR_OK) {
+ 8014590:	f997 301a 	ldrsb.w	r3, [r7, #26]
+ 8014594:	2b00      	cmp	r3, #0
+ 8014596:	d00a      	beq.n	80145ae <tcp_process+0x422>
+            /* If the accept function returns with an error, we abort
+             * the connection. */
+            /* Already aborted? */
+            if (err != ERR_ABRT) {
+ 8014598:	f997 301a 	ldrsb.w	r3, [r7, #26]
+ 801459c:	f113 0f0d 	cmn.w	r3, #13
+ 80145a0:	d002      	beq.n	80145a8 <tcp_process+0x41c>
+              tcp_abort(pcb);
+ 80145a2:	6878      	ldr	r0, [r7, #4]
+ 80145a4:	f7fd ff94 	bl	80124d0 <tcp_abort>
+            }
+            return ERR_ABRT;
+ 80145a8:	f06f 030c 	mvn.w	r3, #12
+ 80145ac:	e1ce      	b.n	801494c <tcp_process+0x7c0>
+          }
+          /* If there was any data contained within this ACK,
+           * we'd better pass it on to the application as well. */
+          tcp_receive(pcb);
+ 80145ae:	6878      	ldr	r0, [r7, #4]
+ 80145b0:	f000 fae0 	bl	8014b74 <tcp_receive>
+
+          /* Prevent ACK for SYN to generate a sent event */
+          if (recv_acked != 0) {
+ 80145b4:	4b68      	ldr	r3, [pc, #416]	; (8014758 <tcp_process+0x5cc>)
+ 80145b6:	881b      	ldrh	r3, [r3, #0]
+ 80145b8:	2b00      	cmp	r3, #0
+ 80145ba:	d005      	beq.n	80145c8 <tcp_process+0x43c>
+            recv_acked--;
+ 80145bc:	4b66      	ldr	r3, [pc, #408]	; (8014758 <tcp_process+0x5cc>)
+ 80145be:	881b      	ldrh	r3, [r3, #0]
+ 80145c0:	3b01      	subs	r3, #1
+ 80145c2:	b29a      	uxth	r2, r3
+ 80145c4:	4b64      	ldr	r3, [pc, #400]	; (8014758 <tcp_process+0x5cc>)
+ 80145c6:	801a      	strh	r2, [r3, #0]
+          }
+
+          pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
+ 80145c8:	687b      	ldr	r3, [r7, #4]
+ 80145ca:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 80145cc:	009a      	lsls	r2, r3, #2
+ 80145ce:	687b      	ldr	r3, [r7, #4]
+ 80145d0:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 80145d2:	005b      	lsls	r3, r3, #1
+ 80145d4:	f241 111c 	movw	r1, #4380	; 0x111c
+ 80145d8:	428b      	cmp	r3, r1
+ 80145da:	bf38      	it	cc
+ 80145dc:	460b      	movcc	r3, r1
+ 80145de:	429a      	cmp	r2, r3
+ 80145e0:	d204      	bcs.n	80145ec <tcp_process+0x460>
+ 80145e2:	687b      	ldr	r3, [r7, #4]
+ 80145e4:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 80145e6:	009b      	lsls	r3, r3, #2
+ 80145e8:	b29b      	uxth	r3, r3
+ 80145ea:	e00d      	b.n	8014608 <tcp_process+0x47c>
+ 80145ec:	687b      	ldr	r3, [r7, #4]
+ 80145ee:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 80145f0:	005b      	lsls	r3, r3, #1
+ 80145f2:	f241 121c 	movw	r2, #4380	; 0x111c
+ 80145f6:	4293      	cmp	r3, r2
+ 80145f8:	d904      	bls.n	8014604 <tcp_process+0x478>
+ 80145fa:	687b      	ldr	r3, [r7, #4]
+ 80145fc:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 80145fe:	005b      	lsls	r3, r3, #1
+ 8014600:	b29b      	uxth	r3, r3
+ 8014602:	e001      	b.n	8014608 <tcp_process+0x47c>
+ 8014604:	f241 131c 	movw	r3, #4380	; 0x111c
+ 8014608:	687a      	ldr	r2, [r7, #4]
+ 801460a:	f8a2 3048 	strh.w	r3, [r2, #72]	; 0x48
+          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SYN_RCVD): cwnd %"TCPWNDSIZE_F
+                                       " ssthresh %"TCPWNDSIZE_F"\n",
+                                       pcb->cwnd, pcb->ssthresh));
+
+          if (recv_flags & TF_GOT_FIN) {
+ 801460e:	4b53      	ldr	r3, [pc, #332]	; (801475c <tcp_process+0x5d0>)
+ 8014610:	781b      	ldrb	r3, [r3, #0]
+ 8014612:	f003 0320 	and.w	r3, r3, #32
+ 8014616:	2b00      	cmp	r3, #0
+ 8014618:	d037      	beq.n	801468a <tcp_process+0x4fe>
+            tcp_ack_now(pcb);
+ 801461a:	687b      	ldr	r3, [r7, #4]
+ 801461c:	8b5b      	ldrh	r3, [r3, #26]
+ 801461e:	f043 0302 	orr.w	r3, r3, #2
+ 8014622:	b29a      	uxth	r2, r3
+ 8014624:	687b      	ldr	r3, [r7, #4]
+ 8014626:	835a      	strh	r2, [r3, #26]
+            pcb->state = CLOSE_WAIT;
+ 8014628:	687b      	ldr	r3, [r7, #4]
+ 801462a:	2207      	movs	r2, #7
+ 801462c:	751a      	strb	r2, [r3, #20]
+          if (recv_flags & TF_GOT_FIN) {
+ 801462e:	e02c      	b.n	801468a <tcp_process+0x4fe>
+          }
+        } else {
+          /* incorrect ACK number, send RST */
+          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 8014630:	4b40      	ldr	r3, [pc, #256]	; (8014734 <tcp_process+0x5a8>)
+ 8014632:	6819      	ldr	r1, [r3, #0]
+ 8014634:	4b40      	ldr	r3, [pc, #256]	; (8014738 <tcp_process+0x5ac>)
+ 8014636:	881b      	ldrh	r3, [r3, #0]
+ 8014638:	461a      	mov	r2, r3
+ 801463a:	4b40      	ldr	r3, [pc, #256]	; (801473c <tcp_process+0x5b0>)
+ 801463c:	681b      	ldr	r3, [r3, #0]
+ 801463e:	18d0      	adds	r0, r2, r3
+                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
+ 8014640:	4b3f      	ldr	r3, [pc, #252]	; (8014740 <tcp_process+0x5b4>)
+ 8014642:	681b      	ldr	r3, [r3, #0]
+          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 8014644:	885b      	ldrh	r3, [r3, #2]
+ 8014646:	b29b      	uxth	r3, r3
+                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
+ 8014648:	4a3d      	ldr	r2, [pc, #244]	; (8014740 <tcp_process+0x5b4>)
+ 801464a:	6812      	ldr	r2, [r2, #0]
+          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
+ 801464c:	8812      	ldrh	r2, [r2, #0]
+ 801464e:	b292      	uxth	r2, r2
+ 8014650:	9202      	str	r2, [sp, #8]
+ 8014652:	9301      	str	r3, [sp, #4]
+ 8014654:	4b3b      	ldr	r3, [pc, #236]	; (8014744 <tcp_process+0x5b8>)
+ 8014656:	9300      	str	r3, [sp, #0]
+ 8014658:	4b3b      	ldr	r3, [pc, #236]	; (8014748 <tcp_process+0x5bc>)
+ 801465a:	4602      	mov	r2, r0
+ 801465c:	6878      	ldr	r0, [r7, #4]
+ 801465e:	f002 fbdf 	bl	8016e20 <tcp_rst>
+        }
+      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
+        /* Looks like another copy of the SYN - retransmit our SYN-ACK */
+        tcp_rexmit(pcb);
+      }
+      break;
+ 8014662:	e167      	b.n	8014934 <tcp_process+0x7a8>
+      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
+ 8014664:	4b32      	ldr	r3, [pc, #200]	; (8014730 <tcp_process+0x5a4>)
+ 8014666:	781b      	ldrb	r3, [r3, #0]
+ 8014668:	f003 0302 	and.w	r3, r3, #2
+ 801466c:	2b00      	cmp	r3, #0
+ 801466e:	f000 8161 	beq.w	8014934 <tcp_process+0x7a8>
+ 8014672:	687b      	ldr	r3, [r7, #4]
+ 8014674:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8014676:	1e5a      	subs	r2, r3, #1
+ 8014678:	4b30      	ldr	r3, [pc, #192]	; (801473c <tcp_process+0x5b0>)
+ 801467a:	681b      	ldr	r3, [r3, #0]
+ 801467c:	429a      	cmp	r2, r3
+ 801467e:	f040 8159 	bne.w	8014934 <tcp_process+0x7a8>
+        tcp_rexmit(pcb);
+ 8014682:	6878      	ldr	r0, [r7, #4]
+ 8014684:	f002 f9b8 	bl	80169f8 <tcp_rexmit>
+      break;
+ 8014688:	e154      	b.n	8014934 <tcp_process+0x7a8>
+ 801468a:	e153      	b.n	8014934 <tcp_process+0x7a8>
+    case CLOSE_WAIT:
+    /* FALLTHROUGH */
+    case ESTABLISHED:
+      tcp_receive(pcb);
+ 801468c:	6878      	ldr	r0, [r7, #4]
+ 801468e:	f000 fa71 	bl	8014b74 <tcp_receive>
+      if (recv_flags & TF_GOT_FIN) { /* passive close */
+ 8014692:	4b32      	ldr	r3, [pc, #200]	; (801475c <tcp_process+0x5d0>)
+ 8014694:	781b      	ldrb	r3, [r3, #0]
+ 8014696:	f003 0320 	and.w	r3, r3, #32
+ 801469a:	2b00      	cmp	r3, #0
+ 801469c:	f000 814c 	beq.w	8014938 <tcp_process+0x7ac>
+        tcp_ack_now(pcb);
+ 80146a0:	687b      	ldr	r3, [r7, #4]
+ 80146a2:	8b5b      	ldrh	r3, [r3, #26]
+ 80146a4:	f043 0302 	orr.w	r3, r3, #2
+ 80146a8:	b29a      	uxth	r2, r3
+ 80146aa:	687b      	ldr	r3, [r7, #4]
+ 80146ac:	835a      	strh	r2, [r3, #26]
+        pcb->state = CLOSE_WAIT;
+ 80146ae:	687b      	ldr	r3, [r7, #4]
+ 80146b0:	2207      	movs	r2, #7
+ 80146b2:	751a      	strb	r2, [r3, #20]
+      }
+      break;
+ 80146b4:	e140      	b.n	8014938 <tcp_process+0x7ac>
+    case FIN_WAIT_1:
+      tcp_receive(pcb);
+ 80146b6:	6878      	ldr	r0, [r7, #4]
+ 80146b8:	f000 fa5c 	bl	8014b74 <tcp_receive>
+      if (recv_flags & TF_GOT_FIN) {
+ 80146bc:	4b27      	ldr	r3, [pc, #156]	; (801475c <tcp_process+0x5d0>)
+ 80146be:	781b      	ldrb	r3, [r3, #0]
+ 80146c0:	f003 0320 	and.w	r3, r3, #32
+ 80146c4:	2b00      	cmp	r3, #0
+ 80146c6:	d071      	beq.n	80147ac <tcp_process+0x620>
+        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
+ 80146c8:	4b19      	ldr	r3, [pc, #100]	; (8014730 <tcp_process+0x5a4>)
+ 80146ca:	781b      	ldrb	r3, [r3, #0]
+ 80146cc:	f003 0310 	and.w	r3, r3, #16
+ 80146d0:	2b00      	cmp	r3, #0
+ 80146d2:	d060      	beq.n	8014796 <tcp_process+0x60a>
+ 80146d4:	687b      	ldr	r3, [r7, #4]
+ 80146d6:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 80146d8:	4b16      	ldr	r3, [pc, #88]	; (8014734 <tcp_process+0x5a8>)
+ 80146da:	681b      	ldr	r3, [r3, #0]
+ 80146dc:	429a      	cmp	r2, r3
+ 80146de:	d15a      	bne.n	8014796 <tcp_process+0x60a>
+            pcb->unsent == NULL) {
+ 80146e0:	687b      	ldr	r3, [r7, #4]
+ 80146e2:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
+ 80146e4:	2b00      	cmp	r3, #0
+ 80146e6:	d156      	bne.n	8014796 <tcp_process+0x60a>
+          LWIP_DEBUGF(TCP_DEBUG,
+                      ("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
+          tcp_ack_now(pcb);
+ 80146e8:	687b      	ldr	r3, [r7, #4]
+ 80146ea:	8b5b      	ldrh	r3, [r3, #26]
+ 80146ec:	f043 0302 	orr.w	r3, r3, #2
+ 80146f0:	b29a      	uxth	r2, r3
+ 80146f2:	687b      	ldr	r3, [r7, #4]
+ 80146f4:	835a      	strh	r2, [r3, #26]
+          tcp_pcb_purge(pcb);
+ 80146f6:	6878      	ldr	r0, [r7, #4]
+ 80146f8:	f7fe fdbe 	bl	8013278 <tcp_pcb_purge>
+          TCP_RMV_ACTIVE(pcb);
+ 80146fc:	4b18      	ldr	r3, [pc, #96]	; (8014760 <tcp_process+0x5d4>)
+ 80146fe:	681b      	ldr	r3, [r3, #0]
+ 8014700:	687a      	ldr	r2, [r7, #4]
+ 8014702:	429a      	cmp	r2, r3
+ 8014704:	d105      	bne.n	8014712 <tcp_process+0x586>
+ 8014706:	4b16      	ldr	r3, [pc, #88]	; (8014760 <tcp_process+0x5d4>)
+ 8014708:	681b      	ldr	r3, [r3, #0]
+ 801470a:	68db      	ldr	r3, [r3, #12]
+ 801470c:	4a14      	ldr	r2, [pc, #80]	; (8014760 <tcp_process+0x5d4>)
+ 801470e:	6013      	str	r3, [r2, #0]
+ 8014710:	e02e      	b.n	8014770 <tcp_process+0x5e4>
+ 8014712:	4b13      	ldr	r3, [pc, #76]	; (8014760 <tcp_process+0x5d4>)
+ 8014714:	681b      	ldr	r3, [r3, #0]
+ 8014716:	617b      	str	r3, [r7, #20]
+ 8014718:	e027      	b.n	801476a <tcp_process+0x5de>
+ 801471a:	697b      	ldr	r3, [r7, #20]
+ 801471c:	68db      	ldr	r3, [r3, #12]
+ 801471e:	687a      	ldr	r2, [r7, #4]
+ 8014720:	429a      	cmp	r2, r3
+ 8014722:	d11f      	bne.n	8014764 <tcp_process+0x5d8>
+ 8014724:	687b      	ldr	r3, [r7, #4]
+ 8014726:	68da      	ldr	r2, [r3, #12]
+ 8014728:	697b      	ldr	r3, [r7, #20]
+ 801472a:	60da      	str	r2, [r3, #12]
+ 801472c:	e020      	b.n	8014770 <tcp_process+0x5e4>
+ 801472e:	bf00      	nop
+ 8014730:	20008744 	.word	0x20008744
+ 8014734:	2000873c 	.word	0x2000873c
+ 8014738:	20008742 	.word	0x20008742
+ 801473c:	20008738 	.word	0x20008738
+ 8014740:	20008728 	.word	0x20008728
+ 8014744:	2000c0c4 	.word	0x2000c0c4
+ 8014748:	2000c0c8 	.word	0x2000c0c8
+ 801474c:	0801e9e0 	.word	0x0801e9e0
+ 8014750:	0801ec80 	.word	0x0801ec80
+ 8014754:	0801ea2c 	.word	0x0801ea2c
+ 8014758:	20008740 	.word	0x20008740
+ 801475c:	20008745 	.word	0x20008745
+ 8014760:	2000f7e8 	.word	0x2000f7e8
+ 8014764:	697b      	ldr	r3, [r7, #20]
+ 8014766:	68db      	ldr	r3, [r3, #12]
+ 8014768:	617b      	str	r3, [r7, #20]
+ 801476a:	697b      	ldr	r3, [r7, #20]
+ 801476c:	2b00      	cmp	r3, #0
+ 801476e:	d1d4      	bne.n	801471a <tcp_process+0x58e>
+ 8014770:	687b      	ldr	r3, [r7, #4]
+ 8014772:	2200      	movs	r2, #0
+ 8014774:	60da      	str	r2, [r3, #12]
+ 8014776:	4b77      	ldr	r3, [pc, #476]	; (8014954 <tcp_process+0x7c8>)
+ 8014778:	2201      	movs	r2, #1
+ 801477a:	701a      	strb	r2, [r3, #0]
+          pcb->state = TIME_WAIT;
+ 801477c:	687b      	ldr	r3, [r7, #4]
+ 801477e:	220a      	movs	r2, #10
+ 8014780:	751a      	strb	r2, [r3, #20]
+          TCP_REG(&tcp_tw_pcbs, pcb);
+ 8014782:	4b75      	ldr	r3, [pc, #468]	; (8014958 <tcp_process+0x7cc>)
+ 8014784:	681a      	ldr	r2, [r3, #0]
+ 8014786:	687b      	ldr	r3, [r7, #4]
+ 8014788:	60da      	str	r2, [r3, #12]
+ 801478a:	4a73      	ldr	r2, [pc, #460]	; (8014958 <tcp_process+0x7cc>)
+ 801478c:	687b      	ldr	r3, [r7, #4]
+ 801478e:	6013      	str	r3, [r2, #0]
+ 8014790:	f002 fd08 	bl	80171a4 <tcp_timer_needed>
+        }
+      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
+                 pcb->unsent == NULL) {
+        pcb->state = FIN_WAIT_2;
+      }
+      break;
+ 8014794:	e0d2      	b.n	801493c <tcp_process+0x7b0>
+          tcp_ack_now(pcb);
+ 8014796:	687b      	ldr	r3, [r7, #4]
+ 8014798:	8b5b      	ldrh	r3, [r3, #26]
+ 801479a:	f043 0302 	orr.w	r3, r3, #2
+ 801479e:	b29a      	uxth	r2, r3
+ 80147a0:	687b      	ldr	r3, [r7, #4]
+ 80147a2:	835a      	strh	r2, [r3, #26]
+          pcb->state = CLOSING;
+ 80147a4:	687b      	ldr	r3, [r7, #4]
+ 80147a6:	2208      	movs	r2, #8
+ 80147a8:	751a      	strb	r2, [r3, #20]
+      break;
+ 80147aa:	e0c7      	b.n	801493c <tcp_process+0x7b0>
+      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
+ 80147ac:	4b6b      	ldr	r3, [pc, #428]	; (801495c <tcp_process+0x7d0>)
+ 80147ae:	781b      	ldrb	r3, [r3, #0]
+ 80147b0:	f003 0310 	and.w	r3, r3, #16
+ 80147b4:	2b00      	cmp	r3, #0
+ 80147b6:	f000 80c1 	beq.w	801493c <tcp_process+0x7b0>
+ 80147ba:	687b      	ldr	r3, [r7, #4]
+ 80147bc:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 80147be:	4b68      	ldr	r3, [pc, #416]	; (8014960 <tcp_process+0x7d4>)
+ 80147c0:	681b      	ldr	r3, [r3, #0]
+ 80147c2:	429a      	cmp	r2, r3
+ 80147c4:	f040 80ba 	bne.w	801493c <tcp_process+0x7b0>
+                 pcb->unsent == NULL) {
+ 80147c8:	687b      	ldr	r3, [r7, #4]
+ 80147ca:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
+ 80147cc:	2b00      	cmp	r3, #0
+ 80147ce:	f040 80b5 	bne.w	801493c <tcp_process+0x7b0>
+        pcb->state = FIN_WAIT_2;
+ 80147d2:	687b      	ldr	r3, [r7, #4]
+ 80147d4:	2206      	movs	r2, #6
+ 80147d6:	751a      	strb	r2, [r3, #20]
+      break;
+ 80147d8:	e0b0      	b.n	801493c <tcp_process+0x7b0>
+    case FIN_WAIT_2:
+      tcp_receive(pcb);
+ 80147da:	6878      	ldr	r0, [r7, #4]
+ 80147dc:	f000 f9ca 	bl	8014b74 <tcp_receive>
+      if (recv_flags & TF_GOT_FIN) {
+ 80147e0:	4b60      	ldr	r3, [pc, #384]	; (8014964 <tcp_process+0x7d8>)
+ 80147e2:	781b      	ldrb	r3, [r3, #0]
+ 80147e4:	f003 0320 	and.w	r3, r3, #32
+ 80147e8:	2b00      	cmp	r3, #0
+ 80147ea:	f000 80a9 	beq.w	8014940 <tcp_process+0x7b4>
+        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
+        tcp_ack_now(pcb);
+ 80147ee:	687b      	ldr	r3, [r7, #4]
+ 80147f0:	8b5b      	ldrh	r3, [r3, #26]
+ 80147f2:	f043 0302 	orr.w	r3, r3, #2
+ 80147f6:	b29a      	uxth	r2, r3
+ 80147f8:	687b      	ldr	r3, [r7, #4]
+ 80147fa:	835a      	strh	r2, [r3, #26]
+        tcp_pcb_purge(pcb);
+ 80147fc:	6878      	ldr	r0, [r7, #4]
+ 80147fe:	f7fe fd3b 	bl	8013278 <tcp_pcb_purge>
+        TCP_RMV_ACTIVE(pcb);
+ 8014802:	4b59      	ldr	r3, [pc, #356]	; (8014968 <tcp_process+0x7dc>)
+ 8014804:	681b      	ldr	r3, [r3, #0]
+ 8014806:	687a      	ldr	r2, [r7, #4]
+ 8014808:	429a      	cmp	r2, r3
+ 801480a:	d105      	bne.n	8014818 <tcp_process+0x68c>
+ 801480c:	4b56      	ldr	r3, [pc, #344]	; (8014968 <tcp_process+0x7dc>)
+ 801480e:	681b      	ldr	r3, [r3, #0]
+ 8014810:	68db      	ldr	r3, [r3, #12]
+ 8014812:	4a55      	ldr	r2, [pc, #340]	; (8014968 <tcp_process+0x7dc>)
+ 8014814:	6013      	str	r3, [r2, #0]
+ 8014816:	e013      	b.n	8014840 <tcp_process+0x6b4>
+ 8014818:	4b53      	ldr	r3, [pc, #332]	; (8014968 <tcp_process+0x7dc>)
+ 801481a:	681b      	ldr	r3, [r3, #0]
+ 801481c:	613b      	str	r3, [r7, #16]
+ 801481e:	e00c      	b.n	801483a <tcp_process+0x6ae>
+ 8014820:	693b      	ldr	r3, [r7, #16]
+ 8014822:	68db      	ldr	r3, [r3, #12]
+ 8014824:	687a      	ldr	r2, [r7, #4]
+ 8014826:	429a      	cmp	r2, r3
+ 8014828:	d104      	bne.n	8014834 <tcp_process+0x6a8>
+ 801482a:	687b      	ldr	r3, [r7, #4]
+ 801482c:	68da      	ldr	r2, [r3, #12]
+ 801482e:	693b      	ldr	r3, [r7, #16]
+ 8014830:	60da      	str	r2, [r3, #12]
+ 8014832:	e005      	b.n	8014840 <tcp_process+0x6b4>
+ 8014834:	693b      	ldr	r3, [r7, #16]
+ 8014836:	68db      	ldr	r3, [r3, #12]
+ 8014838:	613b      	str	r3, [r7, #16]
+ 801483a:	693b      	ldr	r3, [r7, #16]
+ 801483c:	2b00      	cmp	r3, #0
+ 801483e:	d1ef      	bne.n	8014820 <tcp_process+0x694>
+ 8014840:	687b      	ldr	r3, [r7, #4]
+ 8014842:	2200      	movs	r2, #0
+ 8014844:	60da      	str	r2, [r3, #12]
+ 8014846:	4b43      	ldr	r3, [pc, #268]	; (8014954 <tcp_process+0x7c8>)
+ 8014848:	2201      	movs	r2, #1
+ 801484a:	701a      	strb	r2, [r3, #0]
+        pcb->state = TIME_WAIT;
+ 801484c:	687b      	ldr	r3, [r7, #4]
+ 801484e:	220a      	movs	r2, #10
+ 8014850:	751a      	strb	r2, [r3, #20]
+        TCP_REG(&tcp_tw_pcbs, pcb);
+ 8014852:	4b41      	ldr	r3, [pc, #260]	; (8014958 <tcp_process+0x7cc>)
+ 8014854:	681a      	ldr	r2, [r3, #0]
+ 8014856:	687b      	ldr	r3, [r7, #4]
+ 8014858:	60da      	str	r2, [r3, #12]
+ 801485a:	4a3f      	ldr	r2, [pc, #252]	; (8014958 <tcp_process+0x7cc>)
+ 801485c:	687b      	ldr	r3, [r7, #4]
+ 801485e:	6013      	str	r3, [r2, #0]
+ 8014860:	f002 fca0 	bl	80171a4 <tcp_timer_needed>
+      }
+      break;
+ 8014864:	e06c      	b.n	8014940 <tcp_process+0x7b4>
+    case CLOSING:
+      tcp_receive(pcb);
+ 8014866:	6878      	ldr	r0, [r7, #4]
+ 8014868:	f000 f984 	bl	8014b74 <tcp_receive>
+      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
+ 801486c:	4b3b      	ldr	r3, [pc, #236]	; (801495c <tcp_process+0x7d0>)
+ 801486e:	781b      	ldrb	r3, [r3, #0]
+ 8014870:	f003 0310 	and.w	r3, r3, #16
+ 8014874:	2b00      	cmp	r3, #0
+ 8014876:	d065      	beq.n	8014944 <tcp_process+0x7b8>
+ 8014878:	687b      	ldr	r3, [r7, #4]
+ 801487a:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 801487c:	4b38      	ldr	r3, [pc, #224]	; (8014960 <tcp_process+0x7d4>)
+ 801487e:	681b      	ldr	r3, [r3, #0]
+ 8014880:	429a      	cmp	r2, r3
+ 8014882:	d15f      	bne.n	8014944 <tcp_process+0x7b8>
+ 8014884:	687b      	ldr	r3, [r7, #4]
+ 8014886:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8014888:	2b00      	cmp	r3, #0
+ 801488a:	d15b      	bne.n	8014944 <tcp_process+0x7b8>
+        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
+        tcp_pcb_purge(pcb);
+ 801488c:	6878      	ldr	r0, [r7, #4]
+ 801488e:	f7fe fcf3 	bl	8013278 <tcp_pcb_purge>
+        TCP_RMV_ACTIVE(pcb);
+ 8014892:	4b35      	ldr	r3, [pc, #212]	; (8014968 <tcp_process+0x7dc>)
+ 8014894:	681b      	ldr	r3, [r3, #0]
+ 8014896:	687a      	ldr	r2, [r7, #4]
+ 8014898:	429a      	cmp	r2, r3
+ 801489a:	d105      	bne.n	80148a8 <tcp_process+0x71c>
+ 801489c:	4b32      	ldr	r3, [pc, #200]	; (8014968 <tcp_process+0x7dc>)
+ 801489e:	681b      	ldr	r3, [r3, #0]
+ 80148a0:	68db      	ldr	r3, [r3, #12]
+ 80148a2:	4a31      	ldr	r2, [pc, #196]	; (8014968 <tcp_process+0x7dc>)
+ 80148a4:	6013      	str	r3, [r2, #0]
+ 80148a6:	e013      	b.n	80148d0 <tcp_process+0x744>
+ 80148a8:	4b2f      	ldr	r3, [pc, #188]	; (8014968 <tcp_process+0x7dc>)
+ 80148aa:	681b      	ldr	r3, [r3, #0]
+ 80148ac:	60fb      	str	r3, [r7, #12]
+ 80148ae:	e00c      	b.n	80148ca <tcp_process+0x73e>
+ 80148b0:	68fb      	ldr	r3, [r7, #12]
+ 80148b2:	68db      	ldr	r3, [r3, #12]
+ 80148b4:	687a      	ldr	r2, [r7, #4]
+ 80148b6:	429a      	cmp	r2, r3
+ 80148b8:	d104      	bne.n	80148c4 <tcp_process+0x738>
+ 80148ba:	687b      	ldr	r3, [r7, #4]
+ 80148bc:	68da      	ldr	r2, [r3, #12]
+ 80148be:	68fb      	ldr	r3, [r7, #12]
+ 80148c0:	60da      	str	r2, [r3, #12]
+ 80148c2:	e005      	b.n	80148d0 <tcp_process+0x744>
+ 80148c4:	68fb      	ldr	r3, [r7, #12]
+ 80148c6:	68db      	ldr	r3, [r3, #12]
+ 80148c8:	60fb      	str	r3, [r7, #12]
+ 80148ca:	68fb      	ldr	r3, [r7, #12]
+ 80148cc:	2b00      	cmp	r3, #0
+ 80148ce:	d1ef      	bne.n	80148b0 <tcp_process+0x724>
+ 80148d0:	687b      	ldr	r3, [r7, #4]
+ 80148d2:	2200      	movs	r2, #0
+ 80148d4:	60da      	str	r2, [r3, #12]
+ 80148d6:	4b1f      	ldr	r3, [pc, #124]	; (8014954 <tcp_process+0x7c8>)
+ 80148d8:	2201      	movs	r2, #1
+ 80148da:	701a      	strb	r2, [r3, #0]
+        pcb->state = TIME_WAIT;
+ 80148dc:	687b      	ldr	r3, [r7, #4]
+ 80148de:	220a      	movs	r2, #10
+ 80148e0:	751a      	strb	r2, [r3, #20]
+        TCP_REG(&tcp_tw_pcbs, pcb);
+ 80148e2:	4b1d      	ldr	r3, [pc, #116]	; (8014958 <tcp_process+0x7cc>)
+ 80148e4:	681a      	ldr	r2, [r3, #0]
+ 80148e6:	687b      	ldr	r3, [r7, #4]
+ 80148e8:	60da      	str	r2, [r3, #12]
+ 80148ea:	4a1b      	ldr	r2, [pc, #108]	; (8014958 <tcp_process+0x7cc>)
+ 80148ec:	687b      	ldr	r3, [r7, #4]
+ 80148ee:	6013      	str	r3, [r2, #0]
+ 80148f0:	f002 fc58 	bl	80171a4 <tcp_timer_needed>
+      }
+      break;
+ 80148f4:	e026      	b.n	8014944 <tcp_process+0x7b8>
+    case LAST_ACK:
+      tcp_receive(pcb);
+ 80148f6:	6878      	ldr	r0, [r7, #4]
+ 80148f8:	f000 f93c 	bl	8014b74 <tcp_receive>
+      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
+ 80148fc:	4b17      	ldr	r3, [pc, #92]	; (801495c <tcp_process+0x7d0>)
+ 80148fe:	781b      	ldrb	r3, [r3, #0]
+ 8014900:	f003 0310 	and.w	r3, r3, #16
+ 8014904:	2b00      	cmp	r3, #0
+ 8014906:	d01f      	beq.n	8014948 <tcp_process+0x7bc>
+ 8014908:	687b      	ldr	r3, [r7, #4]
+ 801490a:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 801490c:	4b14      	ldr	r3, [pc, #80]	; (8014960 <tcp_process+0x7d4>)
+ 801490e:	681b      	ldr	r3, [r3, #0]
+ 8014910:	429a      	cmp	r2, r3
+ 8014912:	d119      	bne.n	8014948 <tcp_process+0x7bc>
+ 8014914:	687b      	ldr	r3, [r7, #4]
+ 8014916:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8014918:	2b00      	cmp	r3, #0
+ 801491a:	d115      	bne.n	8014948 <tcp_process+0x7bc>
+        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
+        /* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */
+        recv_flags |= TF_CLOSED;
+ 801491c:	4b11      	ldr	r3, [pc, #68]	; (8014964 <tcp_process+0x7d8>)
+ 801491e:	781b      	ldrb	r3, [r3, #0]
+ 8014920:	f043 0310 	orr.w	r3, r3, #16
+ 8014924:	b2da      	uxtb	r2, r3
+ 8014926:	4b0f      	ldr	r3, [pc, #60]	; (8014964 <tcp_process+0x7d8>)
+ 8014928:	701a      	strb	r2, [r3, #0]
+      }
+      break;
+ 801492a:	e00d      	b.n	8014948 <tcp_process+0x7bc>
+    default:
+      break;
+ 801492c:	bf00      	nop
+ 801492e:	e00c      	b.n	801494a <tcp_process+0x7be>
+      break;
+ 8014930:	bf00      	nop
+ 8014932:	e00a      	b.n	801494a <tcp_process+0x7be>
+      break;
+ 8014934:	bf00      	nop
+ 8014936:	e008      	b.n	801494a <tcp_process+0x7be>
+      break;
+ 8014938:	bf00      	nop
+ 801493a:	e006      	b.n	801494a <tcp_process+0x7be>
+      break;
+ 801493c:	bf00      	nop
+ 801493e:	e004      	b.n	801494a <tcp_process+0x7be>
+      break;
+ 8014940:	bf00      	nop
+ 8014942:	e002      	b.n	801494a <tcp_process+0x7be>
+      break;
+ 8014944:	bf00      	nop
+ 8014946:	e000      	b.n	801494a <tcp_process+0x7be>
+      break;
+ 8014948:	bf00      	nop
+  }
+  return ERR_OK;
+ 801494a:	2300      	movs	r3, #0
+}
+ 801494c:	4618      	mov	r0, r3
+ 801494e:	3724      	adds	r7, #36	; 0x24
+ 8014950:	46bd      	mov	sp, r7
+ 8014952:	bd90      	pop	{r4, r7, pc}
+ 8014954:	2000f7e4 	.word	0x2000f7e4
+ 8014958:	2000f7f8 	.word	0x2000f7f8
+ 801495c:	20008744 	.word	0x20008744
+ 8014960:	2000873c 	.word	0x2000873c
+ 8014964:	20008745 	.word	0x20008745
+ 8014968:	2000f7e8 	.word	0x2000f7e8
+
+0801496c <tcp_oos_insert_segment>:
+ *
+ * Called from tcp_receive()
+ */
+static void
+tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next)
+{
+ 801496c:	b590      	push	{r4, r7, lr}
+ 801496e:	b085      	sub	sp, #20
+ 8014970:	af00      	add	r7, sp, #0
+ 8014972:	6078      	str	r0, [r7, #4]
+ 8014974:	6039      	str	r1, [r7, #0]
+  struct tcp_seg *old_seg;
+
+  LWIP_ASSERT("tcp_oos_insert_segment: invalid cseg", cseg != NULL);
+ 8014976:	687b      	ldr	r3, [r7, #4]
+ 8014978:	2b00      	cmp	r3, #0
+ 801497a:	d106      	bne.n	801498a <tcp_oos_insert_segment+0x1e>
+ 801497c:	4b3b      	ldr	r3, [pc, #236]	; (8014a6c <tcp_oos_insert_segment+0x100>)
+ 801497e:	f240 421f 	movw	r2, #1055	; 0x41f
+ 8014982:	493b      	ldr	r1, [pc, #236]	; (8014a70 <tcp_oos_insert_segment+0x104>)
+ 8014984:	483b      	ldr	r0, [pc, #236]	; (8014a74 <tcp_oos_insert_segment+0x108>)
+ 8014986:	f007 fd37 	bl	801c3f8 <iprintf>
+
+  if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
+ 801498a:	687b      	ldr	r3, [r7, #4]
+ 801498c:	68db      	ldr	r3, [r3, #12]
+ 801498e:	899b      	ldrh	r3, [r3, #12]
+ 8014990:	b29b      	uxth	r3, r3
+ 8014992:	4618      	mov	r0, r3
+ 8014994:	f7fb fc4c 	bl	8010230 <lwip_htons>
+ 8014998:	4603      	mov	r3, r0
+ 801499a:	b2db      	uxtb	r3, r3
+ 801499c:	f003 0301 	and.w	r3, r3, #1
+ 80149a0:	2b00      	cmp	r3, #0
+ 80149a2:	d028      	beq.n	80149f6 <tcp_oos_insert_segment+0x8a>
+    /* received segment overlaps all following segments */
+    tcp_segs_free(next);
+ 80149a4:	6838      	ldr	r0, [r7, #0]
+ 80149a6:	f7fe fa67 	bl	8012e78 <tcp_segs_free>
+    next = NULL;
+ 80149aa:	2300      	movs	r3, #0
+ 80149ac:	603b      	str	r3, [r7, #0]
+ 80149ae:	e056      	b.n	8014a5e <tcp_oos_insert_segment+0xf2>
+       oos queue may have segments with FIN flag */
+    while (next &&
+           TCP_SEQ_GEQ((seqno + cseg->len),
+                       (next->tcphdr->seqno + next->len))) {
+      /* cseg with FIN already processed */
+      if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
+ 80149b0:	683b      	ldr	r3, [r7, #0]
+ 80149b2:	68db      	ldr	r3, [r3, #12]
+ 80149b4:	899b      	ldrh	r3, [r3, #12]
+ 80149b6:	b29b      	uxth	r3, r3
+ 80149b8:	4618      	mov	r0, r3
+ 80149ba:	f7fb fc39 	bl	8010230 <lwip_htons>
+ 80149be:	4603      	mov	r3, r0
+ 80149c0:	b2db      	uxtb	r3, r3
+ 80149c2:	f003 0301 	and.w	r3, r3, #1
+ 80149c6:	2b00      	cmp	r3, #0
+ 80149c8:	d00d      	beq.n	80149e6 <tcp_oos_insert_segment+0x7a>
+        TCPH_SET_FLAG(cseg->tcphdr, TCP_FIN);
+ 80149ca:	687b      	ldr	r3, [r7, #4]
+ 80149cc:	68db      	ldr	r3, [r3, #12]
+ 80149ce:	899b      	ldrh	r3, [r3, #12]
+ 80149d0:	b29c      	uxth	r4, r3
+ 80149d2:	2001      	movs	r0, #1
+ 80149d4:	f7fb fc2c 	bl	8010230 <lwip_htons>
+ 80149d8:	4603      	mov	r3, r0
+ 80149da:	461a      	mov	r2, r3
+ 80149dc:	687b      	ldr	r3, [r7, #4]
+ 80149de:	68db      	ldr	r3, [r3, #12]
+ 80149e0:	4322      	orrs	r2, r4
+ 80149e2:	b292      	uxth	r2, r2
+ 80149e4:	819a      	strh	r2, [r3, #12]
+      }
+      old_seg = next;
+ 80149e6:	683b      	ldr	r3, [r7, #0]
+ 80149e8:	60fb      	str	r3, [r7, #12]
+      next = next->next;
+ 80149ea:	683b      	ldr	r3, [r7, #0]
+ 80149ec:	681b      	ldr	r3, [r3, #0]
+ 80149ee:	603b      	str	r3, [r7, #0]
+      tcp_seg_free(old_seg);
+ 80149f0:	68f8      	ldr	r0, [r7, #12]
+ 80149f2:	f7fe fa55 	bl	8012ea0 <tcp_seg_free>
+    while (next &&
+ 80149f6:	683b      	ldr	r3, [r7, #0]
+ 80149f8:	2b00      	cmp	r3, #0
+ 80149fa:	d00e      	beq.n	8014a1a <tcp_oos_insert_segment+0xae>
+           TCP_SEQ_GEQ((seqno + cseg->len),
+ 80149fc:	687b      	ldr	r3, [r7, #4]
+ 80149fe:	891b      	ldrh	r3, [r3, #8]
+ 8014a00:	461a      	mov	r2, r3
+ 8014a02:	4b1d      	ldr	r3, [pc, #116]	; (8014a78 <tcp_oos_insert_segment+0x10c>)
+ 8014a04:	681b      	ldr	r3, [r3, #0]
+ 8014a06:	441a      	add	r2, r3
+ 8014a08:	683b      	ldr	r3, [r7, #0]
+ 8014a0a:	68db      	ldr	r3, [r3, #12]
+ 8014a0c:	685b      	ldr	r3, [r3, #4]
+ 8014a0e:	6839      	ldr	r1, [r7, #0]
+ 8014a10:	8909      	ldrh	r1, [r1, #8]
+ 8014a12:	440b      	add	r3, r1
+ 8014a14:	1ad3      	subs	r3, r2, r3
+    while (next &&
+ 8014a16:	2b00      	cmp	r3, #0
+ 8014a18:	daca      	bge.n	80149b0 <tcp_oos_insert_segment+0x44>
+    }
+    if (next &&
+ 8014a1a:	683b      	ldr	r3, [r7, #0]
+ 8014a1c:	2b00      	cmp	r3, #0
+ 8014a1e:	d01e      	beq.n	8014a5e <tcp_oos_insert_segment+0xf2>
+        TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) {
+ 8014a20:	687b      	ldr	r3, [r7, #4]
+ 8014a22:	891b      	ldrh	r3, [r3, #8]
+ 8014a24:	461a      	mov	r2, r3
+ 8014a26:	4b14      	ldr	r3, [pc, #80]	; (8014a78 <tcp_oos_insert_segment+0x10c>)
+ 8014a28:	681b      	ldr	r3, [r3, #0]
+ 8014a2a:	441a      	add	r2, r3
+ 8014a2c:	683b      	ldr	r3, [r7, #0]
+ 8014a2e:	68db      	ldr	r3, [r3, #12]
+ 8014a30:	685b      	ldr	r3, [r3, #4]
+ 8014a32:	1ad3      	subs	r3, r2, r3
+    if (next &&
+ 8014a34:	2b00      	cmp	r3, #0
+ 8014a36:	dd12      	ble.n	8014a5e <tcp_oos_insert_segment+0xf2>
+      /* We need to trim the incoming segment. */
+      cseg->len = (u16_t)(next->tcphdr->seqno - seqno);
+ 8014a38:	683b      	ldr	r3, [r7, #0]
+ 8014a3a:	68db      	ldr	r3, [r3, #12]
+ 8014a3c:	685b      	ldr	r3, [r3, #4]
+ 8014a3e:	b29a      	uxth	r2, r3
+ 8014a40:	4b0d      	ldr	r3, [pc, #52]	; (8014a78 <tcp_oos_insert_segment+0x10c>)
+ 8014a42:	681b      	ldr	r3, [r3, #0]
+ 8014a44:	b29b      	uxth	r3, r3
+ 8014a46:	1ad3      	subs	r3, r2, r3
+ 8014a48:	b29a      	uxth	r2, r3
+ 8014a4a:	687b      	ldr	r3, [r7, #4]
+ 8014a4c:	811a      	strh	r2, [r3, #8]
+      pbuf_realloc(cseg->p, cseg->len);
+ 8014a4e:	687b      	ldr	r3, [r7, #4]
+ 8014a50:	685a      	ldr	r2, [r3, #4]
+ 8014a52:	687b      	ldr	r3, [r7, #4]
+ 8014a54:	891b      	ldrh	r3, [r3, #8]
+ 8014a56:	4619      	mov	r1, r3
+ 8014a58:	4610      	mov	r0, r2
+ 8014a5a:	f7fc fe17 	bl	801168c <pbuf_realloc>
+    }
+  }
+  cseg->next = next;
+ 8014a5e:	687b      	ldr	r3, [r7, #4]
+ 8014a60:	683a      	ldr	r2, [r7, #0]
+ 8014a62:	601a      	str	r2, [r3, #0]
+}
+ 8014a64:	bf00      	nop
+ 8014a66:	3714      	adds	r7, #20
+ 8014a68:	46bd      	mov	sp, r7
+ 8014a6a:	bd90      	pop	{r4, r7, pc}
+ 8014a6c:	0801e9e0 	.word	0x0801e9e0
+ 8014a70:	0801eca0 	.word	0x0801eca0
+ 8014a74:	0801ea2c 	.word	0x0801ea2c
+ 8014a78:	20008738 	.word	0x20008738
+
+08014a7c <tcp_free_acked_segments>:
+
+/** Remove segments from a list if the incoming ACK acknowledges them */
+static struct tcp_seg *
+tcp_free_acked_segments(struct tcp_pcb *pcb, struct tcp_seg *seg_list, const char *dbg_list_name,
+                        struct tcp_seg *dbg_other_seg_list)
+{
+ 8014a7c:	b5b0      	push	{r4, r5, r7, lr}
+ 8014a7e:	b086      	sub	sp, #24
+ 8014a80:	af00      	add	r7, sp, #0
+ 8014a82:	60f8      	str	r0, [r7, #12]
+ 8014a84:	60b9      	str	r1, [r7, #8]
+ 8014a86:	607a      	str	r2, [r7, #4]
+ 8014a88:	603b      	str	r3, [r7, #0]
+  u16_t clen;
+
+  LWIP_UNUSED_ARG(dbg_list_name);
+  LWIP_UNUSED_ARG(dbg_other_seg_list);
+
+  while (seg_list != NULL &&
+ 8014a8a:	e03e      	b.n	8014b0a <tcp_free_acked_segments+0x8e>
+    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->%s\n",
+                                  lwip_ntohl(seg_list->tcphdr->seqno),
+                                  lwip_ntohl(seg_list->tcphdr->seqno) + TCP_TCPLEN(seg_list),
+                                  dbg_list_name));
+
+    next = seg_list;
+ 8014a8c:	68bb      	ldr	r3, [r7, #8]
+ 8014a8e:	617b      	str	r3, [r7, #20]
+    seg_list = seg_list->next;
+ 8014a90:	68bb      	ldr	r3, [r7, #8]
+ 8014a92:	681b      	ldr	r3, [r3, #0]
+ 8014a94:	60bb      	str	r3, [r7, #8]
+
+    clen = pbuf_clen(next->p);
+ 8014a96:	697b      	ldr	r3, [r7, #20]
+ 8014a98:	685b      	ldr	r3, [r3, #4]
+ 8014a9a:	4618      	mov	r0, r3
+ 8014a9c:	f7fd f80a 	bl	8011ab4 <pbuf_clen>
+ 8014aa0:	4603      	mov	r3, r0
+ 8014aa2:	827b      	strh	r3, [r7, #18]
+    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"TCPWNDSIZE_F" ... ",
+                                 (tcpwnd_size_t)pcb->snd_queuelen));
+    LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= clen));
+ 8014aa4:	68fb      	ldr	r3, [r7, #12]
+ 8014aa6:	f8b3 3066 	ldrh.w	r3, [r3, #102]	; 0x66
+ 8014aaa:	8a7a      	ldrh	r2, [r7, #18]
+ 8014aac:	429a      	cmp	r2, r3
+ 8014aae:	d906      	bls.n	8014abe <tcp_free_acked_segments+0x42>
+ 8014ab0:	4b2a      	ldr	r3, [pc, #168]	; (8014b5c <tcp_free_acked_segments+0xe0>)
+ 8014ab2:	f240 4257 	movw	r2, #1111	; 0x457
+ 8014ab6:	492a      	ldr	r1, [pc, #168]	; (8014b60 <tcp_free_acked_segments+0xe4>)
+ 8014ab8:	482a      	ldr	r0, [pc, #168]	; (8014b64 <tcp_free_acked_segments+0xe8>)
+ 8014aba:	f007 fc9d 	bl	801c3f8 <iprintf>
+
+    pcb->snd_queuelen = (u16_t)(pcb->snd_queuelen - clen);
+ 8014abe:	68fb      	ldr	r3, [r7, #12]
+ 8014ac0:	f8b3 2066 	ldrh.w	r2, [r3, #102]	; 0x66
+ 8014ac4:	8a7b      	ldrh	r3, [r7, #18]
+ 8014ac6:	1ad3      	subs	r3, r2, r3
+ 8014ac8:	b29a      	uxth	r2, r3
+ 8014aca:	68fb      	ldr	r3, [r7, #12]
+ 8014acc:	f8a3 2066 	strh.w	r2, [r3, #102]	; 0x66
+    recv_acked = (tcpwnd_size_t)(recv_acked + next->len);
+ 8014ad0:	697b      	ldr	r3, [r7, #20]
+ 8014ad2:	891a      	ldrh	r2, [r3, #8]
+ 8014ad4:	4b24      	ldr	r3, [pc, #144]	; (8014b68 <tcp_free_acked_segments+0xec>)
+ 8014ad6:	881b      	ldrh	r3, [r3, #0]
+ 8014ad8:	4413      	add	r3, r2
+ 8014ada:	b29a      	uxth	r2, r3
+ 8014adc:	4b22      	ldr	r3, [pc, #136]	; (8014b68 <tcp_free_acked_segments+0xec>)
+ 8014ade:	801a      	strh	r2, [r3, #0]
+    tcp_seg_free(next);
+ 8014ae0:	6978      	ldr	r0, [r7, #20]
+ 8014ae2:	f7fe f9dd 	bl	8012ea0 <tcp_seg_free>
+
+    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"TCPWNDSIZE_F" (after freeing %s)\n",
+                                 (tcpwnd_size_t)pcb->snd_queuelen,
+                                 dbg_list_name));
+    if (pcb->snd_queuelen != 0) {
+ 8014ae6:	68fb      	ldr	r3, [r7, #12]
+ 8014ae8:	f8b3 3066 	ldrh.w	r3, [r3, #102]	; 0x66
+ 8014aec:	2b00      	cmp	r3, #0
+ 8014aee:	d00c      	beq.n	8014b0a <tcp_free_acked_segments+0x8e>
+      LWIP_ASSERT("tcp_receive: valid queue length",
+ 8014af0:	68bb      	ldr	r3, [r7, #8]
+ 8014af2:	2b00      	cmp	r3, #0
+ 8014af4:	d109      	bne.n	8014b0a <tcp_free_acked_segments+0x8e>
+ 8014af6:	683b      	ldr	r3, [r7, #0]
+ 8014af8:	2b00      	cmp	r3, #0
+ 8014afa:	d106      	bne.n	8014b0a <tcp_free_acked_segments+0x8e>
+ 8014afc:	4b17      	ldr	r3, [pc, #92]	; (8014b5c <tcp_free_acked_segments+0xe0>)
+ 8014afe:	f240 4262 	movw	r2, #1122	; 0x462
+ 8014b02:	491a      	ldr	r1, [pc, #104]	; (8014b6c <tcp_free_acked_segments+0xf0>)
+ 8014b04:	4817      	ldr	r0, [pc, #92]	; (8014b64 <tcp_free_acked_segments+0xe8>)
+ 8014b06:	f007 fc77 	bl	801c3f8 <iprintf>
+  while (seg_list != NULL &&
+ 8014b0a:	68bb      	ldr	r3, [r7, #8]
+ 8014b0c:	2b00      	cmp	r3, #0
+ 8014b0e:	d020      	beq.n	8014b52 <tcp_free_acked_segments+0xd6>
+         TCP_SEQ_LEQ(lwip_ntohl(seg_list->tcphdr->seqno) +
+ 8014b10:	68bb      	ldr	r3, [r7, #8]
+ 8014b12:	68db      	ldr	r3, [r3, #12]
+ 8014b14:	685b      	ldr	r3, [r3, #4]
+ 8014b16:	4618      	mov	r0, r3
+ 8014b18:	f7fb fb9f 	bl	801025a <lwip_htonl>
+ 8014b1c:	4604      	mov	r4, r0
+ 8014b1e:	68bb      	ldr	r3, [r7, #8]
+ 8014b20:	891b      	ldrh	r3, [r3, #8]
+ 8014b22:	461d      	mov	r5, r3
+ 8014b24:	68bb      	ldr	r3, [r7, #8]
+ 8014b26:	68db      	ldr	r3, [r3, #12]
+ 8014b28:	899b      	ldrh	r3, [r3, #12]
+ 8014b2a:	b29b      	uxth	r3, r3
+ 8014b2c:	4618      	mov	r0, r3
+ 8014b2e:	f7fb fb7f 	bl	8010230 <lwip_htons>
+ 8014b32:	4603      	mov	r3, r0
+ 8014b34:	b2db      	uxtb	r3, r3
+ 8014b36:	f003 0303 	and.w	r3, r3, #3
+ 8014b3a:	2b00      	cmp	r3, #0
+ 8014b3c:	d001      	beq.n	8014b42 <tcp_free_acked_segments+0xc6>
+ 8014b3e:	2301      	movs	r3, #1
+ 8014b40:	e000      	b.n	8014b44 <tcp_free_acked_segments+0xc8>
+ 8014b42:	2300      	movs	r3, #0
+ 8014b44:	442b      	add	r3, r5
+ 8014b46:	18e2      	adds	r2, r4, r3
+ 8014b48:	4b09      	ldr	r3, [pc, #36]	; (8014b70 <tcp_free_acked_segments+0xf4>)
+ 8014b4a:	681b      	ldr	r3, [r3, #0]
+ 8014b4c:	1ad3      	subs	r3, r2, r3
+  while (seg_list != NULL &&
+ 8014b4e:	2b00      	cmp	r3, #0
+ 8014b50:	dd9c      	ble.n	8014a8c <tcp_free_acked_segments+0x10>
+                  seg_list != NULL || dbg_other_seg_list != NULL);
+    }
+  }
+  return seg_list;
+ 8014b52:	68bb      	ldr	r3, [r7, #8]
+}
+ 8014b54:	4618      	mov	r0, r3
+ 8014b56:	3718      	adds	r7, #24
+ 8014b58:	46bd      	mov	sp, r7
+ 8014b5a:	bdb0      	pop	{r4, r5, r7, pc}
+ 8014b5c:	0801e9e0 	.word	0x0801e9e0
+ 8014b60:	0801ecc8 	.word	0x0801ecc8
+ 8014b64:	0801ea2c 	.word	0x0801ea2c
+ 8014b68:	20008740 	.word	0x20008740
+ 8014b6c:	0801ecf0 	.word	0x0801ecf0
+ 8014b70:	2000873c 	.word	0x2000873c
+
+08014b74 <tcp_receive>:
+ *
+ * Called from tcp_process().
+ */
+static void
+tcp_receive(struct tcp_pcb *pcb)
+{
+ 8014b74:	b5b0      	push	{r4, r5, r7, lr}
+ 8014b76:	b094      	sub	sp, #80	; 0x50
+ 8014b78:	af00      	add	r7, sp, #0
+ 8014b7a:	6078      	str	r0, [r7, #4]
+  s16_t m;
+  u32_t right_wnd_edge;
+  int found_dupack = 0;
+ 8014b7c:	2300      	movs	r3, #0
+ 8014b7e:	64bb      	str	r3, [r7, #72]	; 0x48
+
+  LWIP_ASSERT("tcp_receive: invalid pcb", pcb != NULL);
+ 8014b80:	687b      	ldr	r3, [r7, #4]
+ 8014b82:	2b00      	cmp	r3, #0
+ 8014b84:	d106      	bne.n	8014b94 <tcp_receive+0x20>
+ 8014b86:	4ba6      	ldr	r3, [pc, #664]	; (8014e20 <tcp_receive+0x2ac>)
+ 8014b88:	f240 427b 	movw	r2, #1147	; 0x47b
+ 8014b8c:	49a5      	ldr	r1, [pc, #660]	; (8014e24 <tcp_receive+0x2b0>)
+ 8014b8e:	48a6      	ldr	r0, [pc, #664]	; (8014e28 <tcp_receive+0x2b4>)
+ 8014b90:	f007 fc32 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("tcp_receive: wrong state", pcb->state >= ESTABLISHED);
+ 8014b94:	687b      	ldr	r3, [r7, #4]
+ 8014b96:	7d1b      	ldrb	r3, [r3, #20]
+ 8014b98:	2b03      	cmp	r3, #3
+ 8014b9a:	d806      	bhi.n	8014baa <tcp_receive+0x36>
+ 8014b9c:	4ba0      	ldr	r3, [pc, #640]	; (8014e20 <tcp_receive+0x2ac>)
+ 8014b9e:	f240 427c 	movw	r2, #1148	; 0x47c
+ 8014ba2:	49a2      	ldr	r1, [pc, #648]	; (8014e2c <tcp_receive+0x2b8>)
+ 8014ba4:	48a0      	ldr	r0, [pc, #640]	; (8014e28 <tcp_receive+0x2b4>)
+ 8014ba6:	f007 fc27 	bl	801c3f8 <iprintf>
+
+  if (flags & TCP_ACK) {
+ 8014baa:	4ba1      	ldr	r3, [pc, #644]	; (8014e30 <tcp_receive+0x2bc>)
+ 8014bac:	781b      	ldrb	r3, [r3, #0]
+ 8014bae:	f003 0310 	and.w	r3, r3, #16
+ 8014bb2:	2b00      	cmp	r3, #0
+ 8014bb4:	f000 8263 	beq.w	801507e <tcp_receive+0x50a>
+    right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2;
+ 8014bb8:	687b      	ldr	r3, [r7, #4]
+ 8014bba:	f8b3 3060 	ldrh.w	r3, [r3, #96]	; 0x60
+ 8014bbe:	461a      	mov	r2, r3
+ 8014bc0:	687b      	ldr	r3, [r7, #4]
+ 8014bc2:	6d9b      	ldr	r3, [r3, #88]	; 0x58
+ 8014bc4:	4413      	add	r3, r2
+ 8014bc6:	633b      	str	r3, [r7, #48]	; 0x30
+
+    /* Update window. */
+    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
+ 8014bc8:	687b      	ldr	r3, [r7, #4]
+ 8014bca:	6d5a      	ldr	r2, [r3, #84]	; 0x54
+ 8014bcc:	4b99      	ldr	r3, [pc, #612]	; (8014e34 <tcp_receive+0x2c0>)
+ 8014bce:	681b      	ldr	r3, [r3, #0]
+ 8014bd0:	1ad3      	subs	r3, r2, r3
+ 8014bd2:	2b00      	cmp	r3, #0
+ 8014bd4:	db1b      	blt.n	8014c0e <tcp_receive+0x9a>
+        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
+ 8014bd6:	687b      	ldr	r3, [r7, #4]
+ 8014bd8:	6d5a      	ldr	r2, [r3, #84]	; 0x54
+ 8014bda:	4b96      	ldr	r3, [pc, #600]	; (8014e34 <tcp_receive+0x2c0>)
+ 8014bdc:	681b      	ldr	r3, [r3, #0]
+    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
+ 8014bde:	429a      	cmp	r2, r3
+ 8014be0:	d106      	bne.n	8014bf0 <tcp_receive+0x7c>
+        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
+ 8014be2:	687b      	ldr	r3, [r7, #4]
+ 8014be4:	6d9a      	ldr	r2, [r3, #88]	; 0x58
+ 8014be6:	4b94      	ldr	r3, [pc, #592]	; (8014e38 <tcp_receive+0x2c4>)
+ 8014be8:	681b      	ldr	r3, [r3, #0]
+ 8014bea:	1ad3      	subs	r3, r2, r3
+ 8014bec:	2b00      	cmp	r3, #0
+ 8014bee:	db0e      	blt.n	8014c0e <tcp_receive+0x9a>
+        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
+ 8014bf0:	687b      	ldr	r3, [r7, #4]
+ 8014bf2:	6d9a      	ldr	r2, [r3, #88]	; 0x58
+ 8014bf4:	4b90      	ldr	r3, [pc, #576]	; (8014e38 <tcp_receive+0x2c4>)
+ 8014bf6:	681b      	ldr	r3, [r3, #0]
+        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
+ 8014bf8:	429a      	cmp	r2, r3
+ 8014bfa:	d125      	bne.n	8014c48 <tcp_receive+0xd4>
+        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
+ 8014bfc:	4b8f      	ldr	r3, [pc, #572]	; (8014e3c <tcp_receive+0x2c8>)
+ 8014bfe:	681b      	ldr	r3, [r3, #0]
+ 8014c00:	89db      	ldrh	r3, [r3, #14]
+ 8014c02:	b29a      	uxth	r2, r3
+ 8014c04:	687b      	ldr	r3, [r7, #4]
+ 8014c06:	f8b3 3060 	ldrh.w	r3, [r3, #96]	; 0x60
+ 8014c0a:	429a      	cmp	r2, r3
+ 8014c0c:	d91c      	bls.n	8014c48 <tcp_receive+0xd4>
+      pcb->snd_wnd = SND_WND_SCALE(pcb, tcphdr->wnd);
+ 8014c0e:	4b8b      	ldr	r3, [pc, #556]	; (8014e3c <tcp_receive+0x2c8>)
+ 8014c10:	681b      	ldr	r3, [r3, #0]
+ 8014c12:	89db      	ldrh	r3, [r3, #14]
+ 8014c14:	b29a      	uxth	r2, r3
+ 8014c16:	687b      	ldr	r3, [r7, #4]
+ 8014c18:	f8a3 2060 	strh.w	r2, [r3, #96]	; 0x60
+      /* keep track of the biggest window announced by the remote host to calculate
+         the maximum segment size */
+      if (pcb->snd_wnd_max < pcb->snd_wnd) {
+ 8014c1c:	687b      	ldr	r3, [r7, #4]
+ 8014c1e:	f8b3 2062 	ldrh.w	r2, [r3, #98]	; 0x62
+ 8014c22:	687b      	ldr	r3, [r7, #4]
+ 8014c24:	f8b3 3060 	ldrh.w	r3, [r3, #96]	; 0x60
+ 8014c28:	429a      	cmp	r2, r3
+ 8014c2a:	d205      	bcs.n	8014c38 <tcp_receive+0xc4>
+        pcb->snd_wnd_max = pcb->snd_wnd;
+ 8014c2c:	687b      	ldr	r3, [r7, #4]
+ 8014c2e:	f8b3 2060 	ldrh.w	r2, [r3, #96]	; 0x60
+ 8014c32:	687b      	ldr	r3, [r7, #4]
+ 8014c34:	f8a3 2062 	strh.w	r2, [r3, #98]	; 0x62
+      }
+      pcb->snd_wl1 = seqno;
+ 8014c38:	4b7e      	ldr	r3, [pc, #504]	; (8014e34 <tcp_receive+0x2c0>)
+ 8014c3a:	681a      	ldr	r2, [r3, #0]
+ 8014c3c:	687b      	ldr	r3, [r7, #4]
+ 8014c3e:	655a      	str	r2, [r3, #84]	; 0x54
+      pcb->snd_wl2 = ackno;
+ 8014c40:	4b7d      	ldr	r3, [pc, #500]	; (8014e38 <tcp_receive+0x2c4>)
+ 8014c42:	681a      	ldr	r2, [r3, #0]
+ 8014c44:	687b      	ldr	r3, [r7, #4]
+ 8014c46:	659a      	str	r2, [r3, #88]	; 0x58
+     * If it only passes 1, should reset dupack counter
+     *
+     */
+
+    /* Clause 1 */
+    if (TCP_SEQ_LEQ(ackno, pcb->lastack)) {
+ 8014c48:	4b7b      	ldr	r3, [pc, #492]	; (8014e38 <tcp_receive+0x2c4>)
+ 8014c4a:	681a      	ldr	r2, [r3, #0]
+ 8014c4c:	687b      	ldr	r3, [r7, #4]
+ 8014c4e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8014c50:	1ad3      	subs	r3, r2, r3
+ 8014c52:	2b00      	cmp	r3, #0
+ 8014c54:	dc58      	bgt.n	8014d08 <tcp_receive+0x194>
+      /* Clause 2 */
+      if (tcplen == 0) {
+ 8014c56:	4b7a      	ldr	r3, [pc, #488]	; (8014e40 <tcp_receive+0x2cc>)
+ 8014c58:	881b      	ldrh	r3, [r3, #0]
+ 8014c5a:	2b00      	cmp	r3, #0
+ 8014c5c:	d14b      	bne.n	8014cf6 <tcp_receive+0x182>
+        /* Clause 3 */
+        if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge) {
+ 8014c5e:	687b      	ldr	r3, [r7, #4]
+ 8014c60:	6d9b      	ldr	r3, [r3, #88]	; 0x58
+ 8014c62:	687a      	ldr	r2, [r7, #4]
+ 8014c64:	f8b2 2060 	ldrh.w	r2, [r2, #96]	; 0x60
+ 8014c68:	4413      	add	r3, r2
+ 8014c6a:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 8014c6c:	429a      	cmp	r2, r3
+ 8014c6e:	d142      	bne.n	8014cf6 <tcp_receive+0x182>
+          /* Clause 4 */
+          if (pcb->rtime >= 0) {
+ 8014c70:	687b      	ldr	r3, [r7, #4]
+ 8014c72:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	; 0x30
+ 8014c76:	2b00      	cmp	r3, #0
+ 8014c78:	db3d      	blt.n	8014cf6 <tcp_receive+0x182>
+            /* Clause 5 */
+            if (pcb->lastack == ackno) {
+ 8014c7a:	687b      	ldr	r3, [r7, #4]
+ 8014c7c:	6c5a      	ldr	r2, [r3, #68]	; 0x44
+ 8014c7e:	4b6e      	ldr	r3, [pc, #440]	; (8014e38 <tcp_receive+0x2c4>)
+ 8014c80:	681b      	ldr	r3, [r3, #0]
+ 8014c82:	429a      	cmp	r2, r3
+ 8014c84:	d137      	bne.n	8014cf6 <tcp_receive+0x182>
+              found_dupack = 1;
+ 8014c86:	2301      	movs	r3, #1
+ 8014c88:	64bb      	str	r3, [r7, #72]	; 0x48
+              if ((u8_t)(pcb->dupacks + 1) > pcb->dupacks) {
+ 8014c8a:	687b      	ldr	r3, [r7, #4]
+ 8014c8c:	f893 3043 	ldrb.w	r3, [r3, #67]	; 0x43
+ 8014c90:	2bff      	cmp	r3, #255	; 0xff
+ 8014c92:	d007      	beq.n	8014ca4 <tcp_receive+0x130>
+                ++pcb->dupacks;
+ 8014c94:	687b      	ldr	r3, [r7, #4]
+ 8014c96:	f893 3043 	ldrb.w	r3, [r3, #67]	; 0x43
+ 8014c9a:	3301      	adds	r3, #1
+ 8014c9c:	b2da      	uxtb	r2, r3
+ 8014c9e:	687b      	ldr	r3, [r7, #4]
+ 8014ca0:	f883 2043 	strb.w	r2, [r3, #67]	; 0x43
+              }
+              if (pcb->dupacks > 3) {
+ 8014ca4:	687b      	ldr	r3, [r7, #4]
+ 8014ca6:	f893 3043 	ldrb.w	r3, [r3, #67]	; 0x43
+ 8014caa:	2b03      	cmp	r3, #3
+ 8014cac:	d91b      	bls.n	8014ce6 <tcp_receive+0x172>
+                /* Inflate the congestion window */
+                TCP_WND_INC(pcb->cwnd, pcb->mss);
+ 8014cae:	687b      	ldr	r3, [r7, #4]
+ 8014cb0:	f8b3 2048 	ldrh.w	r2, [r3, #72]	; 0x48
+ 8014cb4:	687b      	ldr	r3, [r7, #4]
+ 8014cb6:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8014cb8:	4413      	add	r3, r2
+ 8014cba:	b29a      	uxth	r2, r3
+ 8014cbc:	687b      	ldr	r3, [r7, #4]
+ 8014cbe:	f8b3 3048 	ldrh.w	r3, [r3, #72]	; 0x48
+ 8014cc2:	429a      	cmp	r2, r3
+ 8014cc4:	d30a      	bcc.n	8014cdc <tcp_receive+0x168>
+ 8014cc6:	687b      	ldr	r3, [r7, #4]
+ 8014cc8:	f8b3 2048 	ldrh.w	r2, [r3, #72]	; 0x48
+ 8014ccc:	687b      	ldr	r3, [r7, #4]
+ 8014cce:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8014cd0:	4413      	add	r3, r2
+ 8014cd2:	b29a      	uxth	r2, r3
+ 8014cd4:	687b      	ldr	r3, [r7, #4]
+ 8014cd6:	f8a3 2048 	strh.w	r2, [r3, #72]	; 0x48
+ 8014cda:	e004      	b.n	8014ce6 <tcp_receive+0x172>
+ 8014cdc:	687b      	ldr	r3, [r7, #4]
+ 8014cde:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8014ce2:	f8a3 2048 	strh.w	r2, [r3, #72]	; 0x48
+              }
+              if (pcb->dupacks >= 3) {
+ 8014ce6:	687b      	ldr	r3, [r7, #4]
+ 8014ce8:	f893 3043 	ldrb.w	r3, [r3, #67]	; 0x43
+ 8014cec:	2b02      	cmp	r3, #2
+ 8014cee:	d902      	bls.n	8014cf6 <tcp_receive+0x182>
+                /* Do fast retransmit (checked via TF_INFR, not via dupacks count) */
+                tcp_rexmit_fast(pcb);
+ 8014cf0:	6878      	ldr	r0, [r7, #4]
+ 8014cf2:	f001 feed 	bl	8016ad0 <tcp_rexmit_fast>
+          }
+        }
+      }
+      /* If Clause (1) or more is true, but not a duplicate ack, reset
+       * count of consecutive duplicate acks */
+      if (!found_dupack) {
+ 8014cf6:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8014cf8:	2b00      	cmp	r3, #0
+ 8014cfa:	f040 8160 	bne.w	8014fbe <tcp_receive+0x44a>
+        pcb->dupacks = 0;
+ 8014cfe:	687b      	ldr	r3, [r7, #4]
+ 8014d00:	2200      	movs	r2, #0
+ 8014d02:	f883 2043 	strb.w	r2, [r3, #67]	; 0x43
+ 8014d06:	e15a      	b.n	8014fbe <tcp_receive+0x44a>
+      }
+    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
+ 8014d08:	4b4b      	ldr	r3, [pc, #300]	; (8014e38 <tcp_receive+0x2c4>)
+ 8014d0a:	681a      	ldr	r2, [r3, #0]
+ 8014d0c:	687b      	ldr	r3, [r7, #4]
+ 8014d0e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8014d10:	1ad3      	subs	r3, r2, r3
+ 8014d12:	3b01      	subs	r3, #1
+ 8014d14:	2b00      	cmp	r3, #0
+ 8014d16:	f2c0 814d 	blt.w	8014fb4 <tcp_receive+0x440>
+ 8014d1a:	4b47      	ldr	r3, [pc, #284]	; (8014e38 <tcp_receive+0x2c4>)
+ 8014d1c:	681a      	ldr	r2, [r3, #0]
+ 8014d1e:	687b      	ldr	r3, [r7, #4]
+ 8014d20:	6d1b      	ldr	r3, [r3, #80]	; 0x50
+ 8014d22:	1ad3      	subs	r3, r2, r3
+ 8014d24:	2b00      	cmp	r3, #0
+ 8014d26:	f300 8145 	bgt.w	8014fb4 <tcp_receive+0x440>
+      tcpwnd_size_t acked;
+
+      /* Reset the "IN Fast Retransmit" flag, since we are no longer
+         in fast retransmit. Also reset the congestion window to the
+         slow start threshold. */
+      if (pcb->flags & TF_INFR) {
+ 8014d2a:	687b      	ldr	r3, [r7, #4]
+ 8014d2c:	8b5b      	ldrh	r3, [r3, #26]
+ 8014d2e:	f003 0304 	and.w	r3, r3, #4
+ 8014d32:	2b00      	cmp	r3, #0
+ 8014d34:	d010      	beq.n	8014d58 <tcp_receive+0x1e4>
+        tcp_clear_flags(pcb, TF_INFR);
+ 8014d36:	687b      	ldr	r3, [r7, #4]
+ 8014d38:	8b5b      	ldrh	r3, [r3, #26]
+ 8014d3a:	f023 0304 	bic.w	r3, r3, #4
+ 8014d3e:	b29a      	uxth	r2, r3
+ 8014d40:	687b      	ldr	r3, [r7, #4]
+ 8014d42:	835a      	strh	r2, [r3, #26]
+        pcb->cwnd = pcb->ssthresh;
+ 8014d44:	687b      	ldr	r3, [r7, #4]
+ 8014d46:	f8b3 204a 	ldrh.w	r2, [r3, #74]	; 0x4a
+ 8014d4a:	687b      	ldr	r3, [r7, #4]
+ 8014d4c:	f8a3 2048 	strh.w	r2, [r3, #72]	; 0x48
+        pcb->bytes_acked = 0;
+ 8014d50:	687b      	ldr	r3, [r7, #4]
+ 8014d52:	2200      	movs	r2, #0
+ 8014d54:	f8a3 206a 	strh.w	r2, [r3, #106]	; 0x6a
+      }
+
+      /* Reset the number of retransmissions. */
+      pcb->nrtx = 0;
+ 8014d58:	687b      	ldr	r3, [r7, #4]
+ 8014d5a:	2200      	movs	r2, #0
+ 8014d5c:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+
+      /* Reset the retransmission time-out. */
+      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
+ 8014d60:	687b      	ldr	r3, [r7, #4]
+ 8014d62:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	; 0x3c
+ 8014d66:	10db      	asrs	r3, r3, #3
+ 8014d68:	b21b      	sxth	r3, r3
+ 8014d6a:	b29a      	uxth	r2, r3
+ 8014d6c:	687b      	ldr	r3, [r7, #4]
+ 8014d6e:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	; 0x3e
+ 8014d72:	b29b      	uxth	r3, r3
+ 8014d74:	4413      	add	r3, r2
+ 8014d76:	b29b      	uxth	r3, r3
+ 8014d78:	b21a      	sxth	r2, r3
+ 8014d7a:	687b      	ldr	r3, [r7, #4]
+ 8014d7c:	f8a3 2040 	strh.w	r2, [r3, #64]	; 0x40
+
+      /* Record how much data this ACK acks */
+      acked = (tcpwnd_size_t)(ackno - pcb->lastack);
+ 8014d80:	4b2d      	ldr	r3, [pc, #180]	; (8014e38 <tcp_receive+0x2c4>)
+ 8014d82:	681b      	ldr	r3, [r3, #0]
+ 8014d84:	b29a      	uxth	r2, r3
+ 8014d86:	687b      	ldr	r3, [r7, #4]
+ 8014d88:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8014d8a:	b29b      	uxth	r3, r3
+ 8014d8c:	1ad3      	subs	r3, r2, r3
+ 8014d8e:	85fb      	strh	r3, [r7, #46]	; 0x2e
+
+      /* Reset the fast retransmit variables. */
+      pcb->dupacks = 0;
+ 8014d90:	687b      	ldr	r3, [r7, #4]
+ 8014d92:	2200      	movs	r2, #0
+ 8014d94:	f883 2043 	strb.w	r2, [r3, #67]	; 0x43
+      pcb->lastack = ackno;
+ 8014d98:	4b27      	ldr	r3, [pc, #156]	; (8014e38 <tcp_receive+0x2c4>)
+ 8014d9a:	681a      	ldr	r2, [r3, #0]
+ 8014d9c:	687b      	ldr	r3, [r7, #4]
+ 8014d9e:	645a      	str	r2, [r3, #68]	; 0x44
+
+      /* Update the congestion control variables (cwnd and
+         ssthresh). */
+      if (pcb->state >= ESTABLISHED) {
+ 8014da0:	687b      	ldr	r3, [r7, #4]
+ 8014da2:	7d1b      	ldrb	r3, [r3, #20]
+ 8014da4:	2b03      	cmp	r3, #3
+ 8014da6:	f240 8096 	bls.w	8014ed6 <tcp_receive+0x362>
+        if (pcb->cwnd < pcb->ssthresh) {
+ 8014daa:	687b      	ldr	r3, [r7, #4]
+ 8014dac:	f8b3 2048 	ldrh.w	r2, [r3, #72]	; 0x48
+ 8014db0:	687b      	ldr	r3, [r7, #4]
+ 8014db2:	f8b3 304a 	ldrh.w	r3, [r3, #74]	; 0x4a
+ 8014db6:	429a      	cmp	r2, r3
+ 8014db8:	d244      	bcs.n	8014e44 <tcp_receive+0x2d0>
+          tcpwnd_size_t increase;
+          /* limit to 1 SMSS segment during period following RTO */
+          u8_t num_seg = (pcb->flags & TF_RTO) ? 1 : 2;
+ 8014dba:	687b      	ldr	r3, [r7, #4]
+ 8014dbc:	8b5b      	ldrh	r3, [r3, #26]
+ 8014dbe:	f403 6300 	and.w	r3, r3, #2048	; 0x800
+ 8014dc2:	2b00      	cmp	r3, #0
+ 8014dc4:	d001      	beq.n	8014dca <tcp_receive+0x256>
+ 8014dc6:	2301      	movs	r3, #1
+ 8014dc8:	e000      	b.n	8014dcc <tcp_receive+0x258>
+ 8014dca:	2302      	movs	r3, #2
+ 8014dcc:	f887 302d 	strb.w	r3, [r7, #45]	; 0x2d
+          /* RFC 3465, section 2.2 Slow Start */
+          increase = LWIP_MIN(acked, (tcpwnd_size_t)(num_seg * pcb->mss));
+ 8014dd0:	f897 302d 	ldrb.w	r3, [r7, #45]	; 0x2d
+ 8014dd4:	b29a      	uxth	r2, r3
+ 8014dd6:	687b      	ldr	r3, [r7, #4]
+ 8014dd8:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8014dda:	fb12 f303 	smulbb	r3, r2, r3
+ 8014dde:	b29b      	uxth	r3, r3
+ 8014de0:	8dfa      	ldrh	r2, [r7, #46]	; 0x2e
+ 8014de2:	4293      	cmp	r3, r2
+ 8014de4:	bf28      	it	cs
+ 8014de6:	4613      	movcs	r3, r2
+ 8014de8:	857b      	strh	r3, [r7, #42]	; 0x2a
+          TCP_WND_INC(pcb->cwnd, increase);
+ 8014dea:	687b      	ldr	r3, [r7, #4]
+ 8014dec:	f8b3 2048 	ldrh.w	r2, [r3, #72]	; 0x48
+ 8014df0:	8d7b      	ldrh	r3, [r7, #42]	; 0x2a
+ 8014df2:	4413      	add	r3, r2
+ 8014df4:	b29a      	uxth	r2, r3
+ 8014df6:	687b      	ldr	r3, [r7, #4]
+ 8014df8:	f8b3 3048 	ldrh.w	r3, [r3, #72]	; 0x48
+ 8014dfc:	429a      	cmp	r2, r3
+ 8014dfe:	d309      	bcc.n	8014e14 <tcp_receive+0x2a0>
+ 8014e00:	687b      	ldr	r3, [r7, #4]
+ 8014e02:	f8b3 2048 	ldrh.w	r2, [r3, #72]	; 0x48
+ 8014e06:	8d7b      	ldrh	r3, [r7, #42]	; 0x2a
+ 8014e08:	4413      	add	r3, r2
+ 8014e0a:	b29a      	uxth	r2, r3
+ 8014e0c:	687b      	ldr	r3, [r7, #4]
+ 8014e0e:	f8a3 2048 	strh.w	r2, [r3, #72]	; 0x48
+ 8014e12:	e060      	b.n	8014ed6 <tcp_receive+0x362>
+ 8014e14:	687b      	ldr	r3, [r7, #4]
+ 8014e16:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8014e1a:	f8a3 2048 	strh.w	r2, [r3, #72]	; 0x48
+ 8014e1e:	e05a      	b.n	8014ed6 <tcp_receive+0x362>
+ 8014e20:	0801e9e0 	.word	0x0801e9e0
+ 8014e24:	0801ed10 	.word	0x0801ed10
+ 8014e28:	0801ea2c 	.word	0x0801ea2c
+ 8014e2c:	0801ed2c 	.word	0x0801ed2c
+ 8014e30:	20008744 	.word	0x20008744
+ 8014e34:	20008738 	.word	0x20008738
+ 8014e38:	2000873c 	.word	0x2000873c
+ 8014e3c:	20008728 	.word	0x20008728
+ 8014e40:	20008742 	.word	0x20008742
+          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"TCPWNDSIZE_F"\n", pcb->cwnd));
+        } else {
+          /* RFC 3465, section 2.1 Congestion Avoidance */
+          TCP_WND_INC(pcb->bytes_acked, acked);
+ 8014e44:	687b      	ldr	r3, [r7, #4]
+ 8014e46:	f8b3 206a 	ldrh.w	r2, [r3, #106]	; 0x6a
+ 8014e4a:	8dfb      	ldrh	r3, [r7, #46]	; 0x2e
+ 8014e4c:	4413      	add	r3, r2
+ 8014e4e:	b29a      	uxth	r2, r3
+ 8014e50:	687b      	ldr	r3, [r7, #4]
+ 8014e52:	f8b3 306a 	ldrh.w	r3, [r3, #106]	; 0x6a
+ 8014e56:	429a      	cmp	r2, r3
+ 8014e58:	d309      	bcc.n	8014e6e <tcp_receive+0x2fa>
+ 8014e5a:	687b      	ldr	r3, [r7, #4]
+ 8014e5c:	f8b3 206a 	ldrh.w	r2, [r3, #106]	; 0x6a
+ 8014e60:	8dfb      	ldrh	r3, [r7, #46]	; 0x2e
+ 8014e62:	4413      	add	r3, r2
+ 8014e64:	b29a      	uxth	r2, r3
+ 8014e66:	687b      	ldr	r3, [r7, #4]
+ 8014e68:	f8a3 206a 	strh.w	r2, [r3, #106]	; 0x6a
+ 8014e6c:	e004      	b.n	8014e78 <tcp_receive+0x304>
+ 8014e6e:	687b      	ldr	r3, [r7, #4]
+ 8014e70:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8014e74:	f8a3 206a 	strh.w	r2, [r3, #106]	; 0x6a
+          if (pcb->bytes_acked >= pcb->cwnd) {
+ 8014e78:	687b      	ldr	r3, [r7, #4]
+ 8014e7a:	f8b3 206a 	ldrh.w	r2, [r3, #106]	; 0x6a
+ 8014e7e:	687b      	ldr	r3, [r7, #4]
+ 8014e80:	f8b3 3048 	ldrh.w	r3, [r3, #72]	; 0x48
+ 8014e84:	429a      	cmp	r2, r3
+ 8014e86:	d326      	bcc.n	8014ed6 <tcp_receive+0x362>
+            pcb->bytes_acked = (tcpwnd_size_t)(pcb->bytes_acked - pcb->cwnd);
+ 8014e88:	687b      	ldr	r3, [r7, #4]
+ 8014e8a:	f8b3 206a 	ldrh.w	r2, [r3, #106]	; 0x6a
+ 8014e8e:	687b      	ldr	r3, [r7, #4]
+ 8014e90:	f8b3 3048 	ldrh.w	r3, [r3, #72]	; 0x48
+ 8014e94:	1ad3      	subs	r3, r2, r3
+ 8014e96:	b29a      	uxth	r2, r3
+ 8014e98:	687b      	ldr	r3, [r7, #4]
+ 8014e9a:	f8a3 206a 	strh.w	r2, [r3, #106]	; 0x6a
+            TCP_WND_INC(pcb->cwnd, pcb->mss);
+ 8014e9e:	687b      	ldr	r3, [r7, #4]
+ 8014ea0:	f8b3 2048 	ldrh.w	r2, [r3, #72]	; 0x48
+ 8014ea4:	687b      	ldr	r3, [r7, #4]
+ 8014ea6:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8014ea8:	4413      	add	r3, r2
+ 8014eaa:	b29a      	uxth	r2, r3
+ 8014eac:	687b      	ldr	r3, [r7, #4]
+ 8014eae:	f8b3 3048 	ldrh.w	r3, [r3, #72]	; 0x48
+ 8014eb2:	429a      	cmp	r2, r3
+ 8014eb4:	d30a      	bcc.n	8014ecc <tcp_receive+0x358>
+ 8014eb6:	687b      	ldr	r3, [r7, #4]
+ 8014eb8:	f8b3 2048 	ldrh.w	r2, [r3, #72]	; 0x48
+ 8014ebc:	687b      	ldr	r3, [r7, #4]
+ 8014ebe:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8014ec0:	4413      	add	r3, r2
+ 8014ec2:	b29a      	uxth	r2, r3
+ 8014ec4:	687b      	ldr	r3, [r7, #4]
+ 8014ec6:	f8a3 2048 	strh.w	r2, [r3, #72]	; 0x48
+ 8014eca:	e004      	b.n	8014ed6 <tcp_receive+0x362>
+ 8014ecc:	687b      	ldr	r3, [r7, #4]
+ 8014ece:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8014ed2:	f8a3 2048 	strh.w	r2, [r3, #72]	; 0x48
+                                    pcb->unacked != NULL ?
+                                    lwip_ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked) : 0));
+
+      /* Remove segment from the unacknowledged list if the incoming
+         ACK acknowledges them. */
+      pcb->unacked = tcp_free_acked_segments(pcb, pcb->unacked, "unacked", pcb->unsent);
+ 8014ed6:	687b      	ldr	r3, [r7, #4]
+ 8014ed8:	6f19      	ldr	r1, [r3, #112]	; 0x70
+ 8014eda:	687b      	ldr	r3, [r7, #4]
+ 8014edc:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8014ede:	4a98      	ldr	r2, [pc, #608]	; (8015140 <tcp_receive+0x5cc>)
+ 8014ee0:	6878      	ldr	r0, [r7, #4]
+ 8014ee2:	f7ff fdcb 	bl	8014a7c <tcp_free_acked_segments>
+ 8014ee6:	4602      	mov	r2, r0
+ 8014ee8:	687b      	ldr	r3, [r7, #4]
+ 8014eea:	671a      	str	r2, [r3, #112]	; 0x70
+         on the list are acknowledged by the ACK. This may seem
+         strange since an "unsent" segment shouldn't be acked. The
+         rationale is that lwIP puts all outstanding segments on the
+         ->unsent list after a retransmission, so these segments may
+         in fact have been sent once. */
+      pcb->unsent = tcp_free_acked_segments(pcb, pcb->unsent, "unsent", pcb->unacked);
+ 8014eec:	687b      	ldr	r3, [r7, #4]
+ 8014eee:	6ed9      	ldr	r1, [r3, #108]	; 0x6c
+ 8014ef0:	687b      	ldr	r3, [r7, #4]
+ 8014ef2:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8014ef4:	4a93      	ldr	r2, [pc, #588]	; (8015144 <tcp_receive+0x5d0>)
+ 8014ef6:	6878      	ldr	r0, [r7, #4]
+ 8014ef8:	f7ff fdc0 	bl	8014a7c <tcp_free_acked_segments>
+ 8014efc:	4602      	mov	r2, r0
+ 8014efe:	687b      	ldr	r3, [r7, #4]
+ 8014f00:	66da      	str	r2, [r3, #108]	; 0x6c
+
+      /* If there's nothing left to acknowledge, stop the retransmit
+         timer, otherwise reset it to start again */
+      if (pcb->unacked == NULL) {
+ 8014f02:	687b      	ldr	r3, [r7, #4]
+ 8014f04:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8014f06:	2b00      	cmp	r3, #0
+ 8014f08:	d104      	bne.n	8014f14 <tcp_receive+0x3a0>
+        pcb->rtime = -1;
+ 8014f0a:	687b      	ldr	r3, [r7, #4]
+ 8014f0c:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8014f10:	861a      	strh	r2, [r3, #48]	; 0x30
+ 8014f12:	e002      	b.n	8014f1a <tcp_receive+0x3a6>
+      } else {
+        pcb->rtime = 0;
+ 8014f14:	687b      	ldr	r3, [r7, #4]
+ 8014f16:	2200      	movs	r2, #0
+ 8014f18:	861a      	strh	r2, [r3, #48]	; 0x30
+      }
+
+      pcb->polltmr = 0;
+ 8014f1a:	687b      	ldr	r3, [r7, #4]
+ 8014f1c:	2200      	movs	r2, #0
+ 8014f1e:	771a      	strb	r2, [r3, #28]
+
+#if TCP_OVERSIZE
+      if (pcb->unsent == NULL) {
+ 8014f20:	687b      	ldr	r3, [r7, #4]
+ 8014f22:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8014f24:	2b00      	cmp	r3, #0
+ 8014f26:	d103      	bne.n	8014f30 <tcp_receive+0x3bc>
+        pcb->unsent_oversize = 0;
+ 8014f28:	687b      	ldr	r3, [r7, #4]
+ 8014f2a:	2200      	movs	r2, #0
+ 8014f2c:	f8a3 2068 	strh.w	r2, [r3, #104]	; 0x68
+        /* Inform neighbor reachability of forward progress. */
+        nd6_reachability_hint(ip6_current_src_addr());
+      }
+#endif /* LWIP_IPV6 && LWIP_ND6_TCP_REACHABILITY_HINTS*/
+
+      pcb->snd_buf = (tcpwnd_size_t)(pcb->snd_buf + recv_acked);
+ 8014f30:	687b      	ldr	r3, [r7, #4]
+ 8014f32:	f8b3 2064 	ldrh.w	r2, [r3, #100]	; 0x64
+ 8014f36:	4b84      	ldr	r3, [pc, #528]	; (8015148 <tcp_receive+0x5d4>)
+ 8014f38:	881b      	ldrh	r3, [r3, #0]
+ 8014f3a:	4413      	add	r3, r2
+ 8014f3c:	b29a      	uxth	r2, r3
+ 8014f3e:	687b      	ldr	r3, [r7, #4]
+ 8014f40:	f8a3 2064 	strh.w	r2, [r3, #100]	; 0x64
+      /* check if this ACK ends our retransmission of in-flight data */
+      if (pcb->flags & TF_RTO) {
+ 8014f44:	687b      	ldr	r3, [r7, #4]
+ 8014f46:	8b5b      	ldrh	r3, [r3, #26]
+ 8014f48:	f403 6300 	and.w	r3, r3, #2048	; 0x800
+ 8014f4c:	2b00      	cmp	r3, #0
+ 8014f4e:	d035      	beq.n	8014fbc <tcp_receive+0x448>
+        /* RTO is done if
+            1) both queues are empty or
+            2) unacked is empty and unsent head contains data not part of RTO or
+            3) unacked head contains data not part of RTO */
+        if (pcb->unacked == NULL) {
+ 8014f50:	687b      	ldr	r3, [r7, #4]
+ 8014f52:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8014f54:	2b00      	cmp	r3, #0
+ 8014f56:	d118      	bne.n	8014f8a <tcp_receive+0x416>
+          if ((pcb->unsent == NULL) ||
+ 8014f58:	687b      	ldr	r3, [r7, #4]
+ 8014f5a:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8014f5c:	2b00      	cmp	r3, #0
+ 8014f5e:	d00c      	beq.n	8014f7a <tcp_receive+0x406>
+              (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unsent->tcphdr->seqno)))) {
+ 8014f60:	687b      	ldr	r3, [r7, #4]
+ 8014f62:	6cdc      	ldr	r4, [r3, #76]	; 0x4c
+ 8014f64:	687b      	ldr	r3, [r7, #4]
+ 8014f66:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8014f68:	68db      	ldr	r3, [r3, #12]
+ 8014f6a:	685b      	ldr	r3, [r3, #4]
+ 8014f6c:	4618      	mov	r0, r3
+ 8014f6e:	f7fb f974 	bl	801025a <lwip_htonl>
+ 8014f72:	4603      	mov	r3, r0
+ 8014f74:	1ae3      	subs	r3, r4, r3
+          if ((pcb->unsent == NULL) ||
+ 8014f76:	2b00      	cmp	r3, #0
+ 8014f78:	dc20      	bgt.n	8014fbc <tcp_receive+0x448>
+            tcp_clear_flags(pcb, TF_RTO);
+ 8014f7a:	687b      	ldr	r3, [r7, #4]
+ 8014f7c:	8b5b      	ldrh	r3, [r3, #26]
+ 8014f7e:	f423 6300 	bic.w	r3, r3, #2048	; 0x800
+ 8014f82:	b29a      	uxth	r2, r3
+ 8014f84:	687b      	ldr	r3, [r7, #4]
+ 8014f86:	835a      	strh	r2, [r3, #26]
+    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
+ 8014f88:	e018      	b.n	8014fbc <tcp_receive+0x448>
+          }
+        } else if (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unacked->tcphdr->seqno))) {
+ 8014f8a:	687b      	ldr	r3, [r7, #4]
+ 8014f8c:	6cdc      	ldr	r4, [r3, #76]	; 0x4c
+ 8014f8e:	687b      	ldr	r3, [r7, #4]
+ 8014f90:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8014f92:	68db      	ldr	r3, [r3, #12]
+ 8014f94:	685b      	ldr	r3, [r3, #4]
+ 8014f96:	4618      	mov	r0, r3
+ 8014f98:	f7fb f95f 	bl	801025a <lwip_htonl>
+ 8014f9c:	4603      	mov	r3, r0
+ 8014f9e:	1ae3      	subs	r3, r4, r3
+ 8014fa0:	2b00      	cmp	r3, #0
+ 8014fa2:	dc0b      	bgt.n	8014fbc <tcp_receive+0x448>
+          tcp_clear_flags(pcb, TF_RTO);
+ 8014fa4:	687b      	ldr	r3, [r7, #4]
+ 8014fa6:	8b5b      	ldrh	r3, [r3, #26]
+ 8014fa8:	f423 6300 	bic.w	r3, r3, #2048	; 0x800
+ 8014fac:	b29a      	uxth	r2, r3
+ 8014fae:	687b      	ldr	r3, [r7, #4]
+ 8014fb0:	835a      	strh	r2, [r3, #26]
+    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
+ 8014fb2:	e003      	b.n	8014fbc <tcp_receive+0x448>
+        }
+      }
+      /* End of ACK for new data processing. */
+    } else {
+      /* Out of sequence ACK, didn't really ack anything */
+      tcp_send_empty_ack(pcb);
+ 8014fb4:	6878      	ldr	r0, [r7, #4]
+ 8014fb6:	f001 ff85 	bl	8016ec4 <tcp_send_empty_ack>
+ 8014fba:	e000      	b.n	8014fbe <tcp_receive+0x44a>
+    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
+ 8014fbc:	bf00      	nop
+                                pcb->rttest, pcb->rtseq, ackno));
+
+    /* RTT estimation calculations. This is done by checking if the
+       incoming segment acknowledges the segment we use to take a
+       round-trip time measurement. */
+    if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) {
+ 8014fbe:	687b      	ldr	r3, [r7, #4]
+ 8014fc0:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8014fc2:	2b00      	cmp	r3, #0
+ 8014fc4:	d05b      	beq.n	801507e <tcp_receive+0x50a>
+ 8014fc6:	687b      	ldr	r3, [r7, #4]
+ 8014fc8:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 8014fca:	4b60      	ldr	r3, [pc, #384]	; (801514c <tcp_receive+0x5d8>)
+ 8014fcc:	681b      	ldr	r3, [r3, #0]
+ 8014fce:	1ad3      	subs	r3, r2, r3
+ 8014fd0:	2b00      	cmp	r3, #0
+ 8014fd2:	da54      	bge.n	801507e <tcp_receive+0x50a>
+      /* diff between this shouldn't exceed 32K since this are tcp timer ticks
+         and a round-trip shouldn't be that long... */
+      m = (s16_t)(tcp_ticks - pcb->rttest);
+ 8014fd4:	4b5e      	ldr	r3, [pc, #376]	; (8015150 <tcp_receive+0x5dc>)
+ 8014fd6:	681b      	ldr	r3, [r3, #0]
+ 8014fd8:	b29a      	uxth	r2, r3
+ 8014fda:	687b      	ldr	r3, [r7, #4]
+ 8014fdc:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8014fde:	b29b      	uxth	r3, r3
+ 8014fe0:	1ad3      	subs	r3, r2, r3
+ 8014fe2:	b29b      	uxth	r3, r3
+ 8014fe4:	f8a7 304e 	strh.w	r3, [r7, #78]	; 0x4e
+
+      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n",
+                                  m, (u16_t)(m * TCP_SLOW_INTERVAL)));
+
+      /* This is taken directly from VJs original code in his paper */
+      m = (s16_t)(m - (pcb->sa >> 3));
+ 8014fe8:	f8b7 204e 	ldrh.w	r2, [r7, #78]	; 0x4e
+ 8014fec:	687b      	ldr	r3, [r7, #4]
+ 8014fee:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	; 0x3c
+ 8014ff2:	10db      	asrs	r3, r3, #3
+ 8014ff4:	b21b      	sxth	r3, r3
+ 8014ff6:	b29b      	uxth	r3, r3
+ 8014ff8:	1ad3      	subs	r3, r2, r3
+ 8014ffa:	b29b      	uxth	r3, r3
+ 8014ffc:	f8a7 304e 	strh.w	r3, [r7, #78]	; 0x4e
+      pcb->sa = (s16_t)(pcb->sa + m);
+ 8015000:	687b      	ldr	r3, [r7, #4]
+ 8015002:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	; 0x3c
+ 8015006:	b29a      	uxth	r2, r3
+ 8015008:	f8b7 304e 	ldrh.w	r3, [r7, #78]	; 0x4e
+ 801500c:	4413      	add	r3, r2
+ 801500e:	b29b      	uxth	r3, r3
+ 8015010:	b21a      	sxth	r2, r3
+ 8015012:	687b      	ldr	r3, [r7, #4]
+ 8015014:	879a      	strh	r2, [r3, #60]	; 0x3c
+      if (m < 0) {
+ 8015016:	f9b7 304e 	ldrsh.w	r3, [r7, #78]	; 0x4e
+ 801501a:	2b00      	cmp	r3, #0
+ 801501c:	da05      	bge.n	801502a <tcp_receive+0x4b6>
+        m = (s16_t) - m;
+ 801501e:	f8b7 304e 	ldrh.w	r3, [r7, #78]	; 0x4e
+ 8015022:	425b      	negs	r3, r3
+ 8015024:	b29b      	uxth	r3, r3
+ 8015026:	f8a7 304e 	strh.w	r3, [r7, #78]	; 0x4e
+      }
+      m = (s16_t)(m - (pcb->sv >> 2));
+ 801502a:	f8b7 204e 	ldrh.w	r2, [r7, #78]	; 0x4e
+ 801502e:	687b      	ldr	r3, [r7, #4]
+ 8015030:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	; 0x3e
+ 8015034:	109b      	asrs	r3, r3, #2
+ 8015036:	b21b      	sxth	r3, r3
+ 8015038:	b29b      	uxth	r3, r3
+ 801503a:	1ad3      	subs	r3, r2, r3
+ 801503c:	b29b      	uxth	r3, r3
+ 801503e:	f8a7 304e 	strh.w	r3, [r7, #78]	; 0x4e
+      pcb->sv = (s16_t)(pcb->sv + m);
+ 8015042:	687b      	ldr	r3, [r7, #4]
+ 8015044:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	; 0x3e
+ 8015048:	b29a      	uxth	r2, r3
+ 801504a:	f8b7 304e 	ldrh.w	r3, [r7, #78]	; 0x4e
+ 801504e:	4413      	add	r3, r2
+ 8015050:	b29b      	uxth	r3, r3
+ 8015052:	b21a      	sxth	r2, r3
+ 8015054:	687b      	ldr	r3, [r7, #4]
+ 8015056:	87da      	strh	r2, [r3, #62]	; 0x3e
+      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
+ 8015058:	687b      	ldr	r3, [r7, #4]
+ 801505a:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	; 0x3c
+ 801505e:	10db      	asrs	r3, r3, #3
+ 8015060:	b21b      	sxth	r3, r3
+ 8015062:	b29a      	uxth	r2, r3
+ 8015064:	687b      	ldr	r3, [r7, #4]
+ 8015066:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	; 0x3e
+ 801506a:	b29b      	uxth	r3, r3
+ 801506c:	4413      	add	r3, r2
+ 801506e:	b29b      	uxth	r3, r3
+ 8015070:	b21a      	sxth	r2, r3
+ 8015072:	687b      	ldr	r3, [r7, #4]
+ 8015074:	f8a3 2040 	strh.w	r2, [r3, #64]	; 0x40
+
+      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n",
+                                  pcb->rto, (u16_t)(pcb->rto * TCP_SLOW_INTERVAL)));
+
+      pcb->rttest = 0;
+ 8015078:	687b      	ldr	r3, [r7, #4]
+ 801507a:	2200      	movs	r2, #0
+ 801507c:	635a      	str	r2, [r3, #52]	; 0x34
+
+  /* If the incoming segment contains data, we must process it
+     further unless the pcb already received a FIN.
+     (RFC 793, chapter 3.9, "SEGMENT ARRIVES" in states CLOSE-WAIT, CLOSING,
+     LAST-ACK and TIME-WAIT: "Ignore the segment text.") */
+  if ((tcplen > 0) && (pcb->state < CLOSE_WAIT)) {
+ 801507e:	4b35      	ldr	r3, [pc, #212]	; (8015154 <tcp_receive+0x5e0>)
+ 8015080:	881b      	ldrh	r3, [r3, #0]
+ 8015082:	2b00      	cmp	r3, #0
+ 8015084:	f000 84e1 	beq.w	8015a4a <tcp_receive+0xed6>
+ 8015088:	687b      	ldr	r3, [r7, #4]
+ 801508a:	7d1b      	ldrb	r3, [r3, #20]
+ 801508c:	2b06      	cmp	r3, #6
+ 801508e:	f200 84dc 	bhi.w	8015a4a <tcp_receive+0xed6>
+       this if the sequence number of the incoming segment is less
+       than rcv_nxt, and the sequence number plus the length of the
+       segment is larger than rcv_nxt. */
+    /*    if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
+          if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/
+    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
+ 8015092:	687b      	ldr	r3, [r7, #4]
+ 8015094:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 8015096:	4b30      	ldr	r3, [pc, #192]	; (8015158 <tcp_receive+0x5e4>)
+ 8015098:	681b      	ldr	r3, [r3, #0]
+ 801509a:	1ad3      	subs	r3, r2, r3
+ 801509c:	3b01      	subs	r3, #1
+ 801509e:	2b00      	cmp	r3, #0
+ 80150a0:	f2c0 808e 	blt.w	80151c0 <tcp_receive+0x64c>
+ 80150a4:	687b      	ldr	r3, [r7, #4]
+ 80150a6:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 80150a8:	4b2a      	ldr	r3, [pc, #168]	; (8015154 <tcp_receive+0x5e0>)
+ 80150aa:	881b      	ldrh	r3, [r3, #0]
+ 80150ac:	4619      	mov	r1, r3
+ 80150ae:	4b2a      	ldr	r3, [pc, #168]	; (8015158 <tcp_receive+0x5e4>)
+ 80150b0:	681b      	ldr	r3, [r3, #0]
+ 80150b2:	440b      	add	r3, r1
+ 80150b4:	1ad3      	subs	r3, r2, r3
+ 80150b6:	3301      	adds	r3, #1
+ 80150b8:	2b00      	cmp	r3, #0
+ 80150ba:	f300 8081 	bgt.w	80151c0 <tcp_receive+0x64c>
+
+         After we are done with adjusting the pbuf pointers we must
+         adjust the ->data pointer in the seg and the segment
+         length.*/
+
+      struct pbuf *p = inseg.p;
+ 80150be:	4b27      	ldr	r3, [pc, #156]	; (801515c <tcp_receive+0x5e8>)
+ 80150c0:	685b      	ldr	r3, [r3, #4]
+ 80150c2:	647b      	str	r3, [r7, #68]	; 0x44
+      u32_t off32 = pcb->rcv_nxt - seqno;
+ 80150c4:	687b      	ldr	r3, [r7, #4]
+ 80150c6:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 80150c8:	4b23      	ldr	r3, [pc, #140]	; (8015158 <tcp_receive+0x5e4>)
+ 80150ca:	681b      	ldr	r3, [r3, #0]
+ 80150cc:	1ad3      	subs	r3, r2, r3
+ 80150ce:	627b      	str	r3, [r7, #36]	; 0x24
+      u16_t new_tot_len, off;
+      LWIP_ASSERT("inseg.p != NULL", inseg.p);
+ 80150d0:	4b22      	ldr	r3, [pc, #136]	; (801515c <tcp_receive+0x5e8>)
+ 80150d2:	685b      	ldr	r3, [r3, #4]
+ 80150d4:	2b00      	cmp	r3, #0
+ 80150d6:	d106      	bne.n	80150e6 <tcp_receive+0x572>
+ 80150d8:	4b21      	ldr	r3, [pc, #132]	; (8015160 <tcp_receive+0x5ec>)
+ 80150da:	f240 5294 	movw	r2, #1428	; 0x594
+ 80150de:	4921      	ldr	r1, [pc, #132]	; (8015164 <tcp_receive+0x5f0>)
+ 80150e0:	4821      	ldr	r0, [pc, #132]	; (8015168 <tcp_receive+0x5f4>)
+ 80150e2:	f007 f989 	bl	801c3f8 <iprintf>
+      LWIP_ASSERT("insane offset!", (off32 < 0xffff));
+ 80150e6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80150e8:	f64f 72fe 	movw	r2, #65534	; 0xfffe
+ 80150ec:	4293      	cmp	r3, r2
+ 80150ee:	d906      	bls.n	80150fe <tcp_receive+0x58a>
+ 80150f0:	4b1b      	ldr	r3, [pc, #108]	; (8015160 <tcp_receive+0x5ec>)
+ 80150f2:	f240 5295 	movw	r2, #1429	; 0x595
+ 80150f6:	491d      	ldr	r1, [pc, #116]	; (801516c <tcp_receive+0x5f8>)
+ 80150f8:	481b      	ldr	r0, [pc, #108]	; (8015168 <tcp_receive+0x5f4>)
+ 80150fa:	f007 f97d 	bl	801c3f8 <iprintf>
+      off = (u16_t)off32;
+ 80150fe:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8015100:	f8a7 3042 	strh.w	r3, [r7, #66]	; 0x42
+      LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off));
+ 8015104:	4b15      	ldr	r3, [pc, #84]	; (801515c <tcp_receive+0x5e8>)
+ 8015106:	685b      	ldr	r3, [r3, #4]
+ 8015108:	891b      	ldrh	r3, [r3, #8]
+ 801510a:	f8b7 2042 	ldrh.w	r2, [r7, #66]	; 0x42
+ 801510e:	429a      	cmp	r2, r3
+ 8015110:	d906      	bls.n	8015120 <tcp_receive+0x5ac>
+ 8015112:	4b13      	ldr	r3, [pc, #76]	; (8015160 <tcp_receive+0x5ec>)
+ 8015114:	f240 5297 	movw	r2, #1431	; 0x597
+ 8015118:	4915      	ldr	r1, [pc, #84]	; (8015170 <tcp_receive+0x5fc>)
+ 801511a:	4813      	ldr	r0, [pc, #76]	; (8015168 <tcp_receive+0x5f4>)
+ 801511c:	f007 f96c 	bl	801c3f8 <iprintf>
+      inseg.len -= off;
+ 8015120:	4b0e      	ldr	r3, [pc, #56]	; (801515c <tcp_receive+0x5e8>)
+ 8015122:	891a      	ldrh	r2, [r3, #8]
+ 8015124:	f8b7 3042 	ldrh.w	r3, [r7, #66]	; 0x42
+ 8015128:	1ad3      	subs	r3, r2, r3
+ 801512a:	b29a      	uxth	r2, r3
+ 801512c:	4b0b      	ldr	r3, [pc, #44]	; (801515c <tcp_receive+0x5e8>)
+ 801512e:	811a      	strh	r2, [r3, #8]
+      new_tot_len = (u16_t)(inseg.p->tot_len - off);
+ 8015130:	4b0a      	ldr	r3, [pc, #40]	; (801515c <tcp_receive+0x5e8>)
+ 8015132:	685b      	ldr	r3, [r3, #4]
+ 8015134:	891a      	ldrh	r2, [r3, #8]
+ 8015136:	f8b7 3042 	ldrh.w	r3, [r7, #66]	; 0x42
+ 801513a:	1ad3      	subs	r3, r2, r3
+ 801513c:	847b      	strh	r3, [r7, #34]	; 0x22
+      while (p->len < off) {
+ 801513e:	e029      	b.n	8015194 <tcp_receive+0x620>
+ 8015140:	0801ed48 	.word	0x0801ed48
+ 8015144:	0801ed50 	.word	0x0801ed50
+ 8015148:	20008740 	.word	0x20008740
+ 801514c:	2000873c 	.word	0x2000873c
+ 8015150:	2000f7ec 	.word	0x2000f7ec
+ 8015154:	20008742 	.word	0x20008742
+ 8015158:	20008738 	.word	0x20008738
+ 801515c:	20008718 	.word	0x20008718
+ 8015160:	0801e9e0 	.word	0x0801e9e0
+ 8015164:	0801ed58 	.word	0x0801ed58
+ 8015168:	0801ea2c 	.word	0x0801ea2c
+ 801516c:	0801ed68 	.word	0x0801ed68
+ 8015170:	0801ed78 	.word	0x0801ed78
+        off -= p->len;
+ 8015174:	6c7b      	ldr	r3, [r7, #68]	; 0x44
+ 8015176:	895b      	ldrh	r3, [r3, #10]
+ 8015178:	f8b7 2042 	ldrh.w	r2, [r7, #66]	; 0x42
+ 801517c:	1ad3      	subs	r3, r2, r3
+ 801517e:	f8a7 3042 	strh.w	r3, [r7, #66]	; 0x42
+        /* all pbufs up to and including this one have len==0, so tot_len is equal */
+        p->tot_len = new_tot_len;
+ 8015182:	6c7b      	ldr	r3, [r7, #68]	; 0x44
+ 8015184:	8c7a      	ldrh	r2, [r7, #34]	; 0x22
+ 8015186:	811a      	strh	r2, [r3, #8]
+        p->len = 0;
+ 8015188:	6c7b      	ldr	r3, [r7, #68]	; 0x44
+ 801518a:	2200      	movs	r2, #0
+ 801518c:	815a      	strh	r2, [r3, #10]
+        p = p->next;
+ 801518e:	6c7b      	ldr	r3, [r7, #68]	; 0x44
+ 8015190:	681b      	ldr	r3, [r3, #0]
+ 8015192:	647b      	str	r3, [r7, #68]	; 0x44
+      while (p->len < off) {
+ 8015194:	6c7b      	ldr	r3, [r7, #68]	; 0x44
+ 8015196:	895b      	ldrh	r3, [r3, #10]
+ 8015198:	f8b7 2042 	ldrh.w	r2, [r7, #66]	; 0x42
+ 801519c:	429a      	cmp	r2, r3
+ 801519e:	d8e9      	bhi.n	8015174 <tcp_receive+0x600>
+      }
+      /* cannot fail... */
+      pbuf_remove_header(p, off);
+ 80151a0:	f8b7 3042 	ldrh.w	r3, [r7, #66]	; 0x42
+ 80151a4:	4619      	mov	r1, r3
+ 80151a6:	6c78      	ldr	r0, [r7, #68]	; 0x44
+ 80151a8:	f7fc fb70 	bl	801188c <pbuf_remove_header>
+      inseg.tcphdr->seqno = seqno = pcb->rcv_nxt;
+ 80151ac:	687b      	ldr	r3, [r7, #4]
+ 80151ae:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80151b0:	4a91      	ldr	r2, [pc, #580]	; (80153f8 <tcp_receive+0x884>)
+ 80151b2:	6013      	str	r3, [r2, #0]
+ 80151b4:	4b91      	ldr	r3, [pc, #580]	; (80153fc <tcp_receive+0x888>)
+ 80151b6:	68db      	ldr	r3, [r3, #12]
+ 80151b8:	4a8f      	ldr	r2, [pc, #572]	; (80153f8 <tcp_receive+0x884>)
+ 80151ba:	6812      	ldr	r2, [r2, #0]
+ 80151bc:	605a      	str	r2, [r3, #4]
+    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
+ 80151be:	e00d      	b.n	80151dc <tcp_receive+0x668>
+    } else {
+      if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
+ 80151c0:	4b8d      	ldr	r3, [pc, #564]	; (80153f8 <tcp_receive+0x884>)
+ 80151c2:	681a      	ldr	r2, [r3, #0]
+ 80151c4:	687b      	ldr	r3, [r7, #4]
+ 80151c6:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80151c8:	1ad3      	subs	r3, r2, r3
+ 80151ca:	2b00      	cmp	r3, #0
+ 80151cc:	da06      	bge.n	80151dc <tcp_receive+0x668>
+        /* the whole segment is < rcv_nxt */
+        /* must be a duplicate of a packet that has already been correctly handled */
+
+        LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno));
+        tcp_ack_now(pcb);
+ 80151ce:	687b      	ldr	r3, [r7, #4]
+ 80151d0:	8b5b      	ldrh	r3, [r3, #26]
+ 80151d2:	f043 0302 	orr.w	r3, r3, #2
+ 80151d6:	b29a      	uxth	r2, r3
+ 80151d8:	687b      	ldr	r3, [r7, #4]
+ 80151da:	835a      	strh	r2, [r3, #26]
+    }
+
+    /* The sequence number must be within the window (above rcv_nxt
+       and below rcv_nxt + rcv_wnd) in order to be further
+       processed. */
+    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
+ 80151dc:	4b86      	ldr	r3, [pc, #536]	; (80153f8 <tcp_receive+0x884>)
+ 80151de:	681a      	ldr	r2, [r3, #0]
+ 80151e0:	687b      	ldr	r3, [r7, #4]
+ 80151e2:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80151e4:	1ad3      	subs	r3, r2, r3
+ 80151e6:	2b00      	cmp	r3, #0
+ 80151e8:	f2c0 842a 	blt.w	8015a40 <tcp_receive+0xecc>
+ 80151ec:	4b82      	ldr	r3, [pc, #520]	; (80153f8 <tcp_receive+0x884>)
+ 80151ee:	681a      	ldr	r2, [r3, #0]
+ 80151f0:	687b      	ldr	r3, [r7, #4]
+ 80151f2:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80151f4:	6879      	ldr	r1, [r7, #4]
+ 80151f6:	8d09      	ldrh	r1, [r1, #40]	; 0x28
+ 80151f8:	440b      	add	r3, r1
+ 80151fa:	1ad3      	subs	r3, r2, r3
+ 80151fc:	3301      	adds	r3, #1
+ 80151fe:	2b00      	cmp	r3, #0
+ 8015200:	f300 841e 	bgt.w	8015a40 <tcp_receive+0xecc>
+                        pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
+      if (pcb->rcv_nxt == seqno) {
+ 8015204:	687b      	ldr	r3, [r7, #4]
+ 8015206:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 8015208:	4b7b      	ldr	r3, [pc, #492]	; (80153f8 <tcp_receive+0x884>)
+ 801520a:	681b      	ldr	r3, [r3, #0]
+ 801520c:	429a      	cmp	r2, r3
+ 801520e:	f040 829a 	bne.w	8015746 <tcp_receive+0xbd2>
+        /* The incoming segment is the next in sequence. We check if
+           we have to trim the end of the segment and update rcv_nxt
+           and pass the data to the application. */
+        tcplen = TCP_TCPLEN(&inseg);
+ 8015212:	4b7a      	ldr	r3, [pc, #488]	; (80153fc <tcp_receive+0x888>)
+ 8015214:	891c      	ldrh	r4, [r3, #8]
+ 8015216:	4b79      	ldr	r3, [pc, #484]	; (80153fc <tcp_receive+0x888>)
+ 8015218:	68db      	ldr	r3, [r3, #12]
+ 801521a:	899b      	ldrh	r3, [r3, #12]
+ 801521c:	b29b      	uxth	r3, r3
+ 801521e:	4618      	mov	r0, r3
+ 8015220:	f7fb f806 	bl	8010230 <lwip_htons>
+ 8015224:	4603      	mov	r3, r0
+ 8015226:	b2db      	uxtb	r3, r3
+ 8015228:	f003 0303 	and.w	r3, r3, #3
+ 801522c:	2b00      	cmp	r3, #0
+ 801522e:	d001      	beq.n	8015234 <tcp_receive+0x6c0>
+ 8015230:	2301      	movs	r3, #1
+ 8015232:	e000      	b.n	8015236 <tcp_receive+0x6c2>
+ 8015234:	2300      	movs	r3, #0
+ 8015236:	4423      	add	r3, r4
+ 8015238:	b29a      	uxth	r2, r3
+ 801523a:	4b71      	ldr	r3, [pc, #452]	; (8015400 <tcp_receive+0x88c>)
+ 801523c:	801a      	strh	r2, [r3, #0]
+
+        if (tcplen > pcb->rcv_wnd) {
+ 801523e:	687b      	ldr	r3, [r7, #4]
+ 8015240:	8d1a      	ldrh	r2, [r3, #40]	; 0x28
+ 8015242:	4b6f      	ldr	r3, [pc, #444]	; (8015400 <tcp_receive+0x88c>)
+ 8015244:	881b      	ldrh	r3, [r3, #0]
+ 8015246:	429a      	cmp	r2, r3
+ 8015248:	d275      	bcs.n	8015336 <tcp_receive+0x7c2>
+          LWIP_DEBUGF(TCP_INPUT_DEBUG,
+                      ("tcp_receive: other end overran receive window"
+                       "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
+                       seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
+          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
+ 801524a:	4b6c      	ldr	r3, [pc, #432]	; (80153fc <tcp_receive+0x888>)
+ 801524c:	68db      	ldr	r3, [r3, #12]
+ 801524e:	899b      	ldrh	r3, [r3, #12]
+ 8015250:	b29b      	uxth	r3, r3
+ 8015252:	4618      	mov	r0, r3
+ 8015254:	f7fa ffec 	bl	8010230 <lwip_htons>
+ 8015258:	4603      	mov	r3, r0
+ 801525a:	b2db      	uxtb	r3, r3
+ 801525c:	f003 0301 	and.w	r3, r3, #1
+ 8015260:	2b00      	cmp	r3, #0
+ 8015262:	d01f      	beq.n	80152a4 <tcp_receive+0x730>
+            /* Must remove the FIN from the header as we're trimming
+             * that byte of sequence-space from the packet */
+            TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) & ~(unsigned int)TCP_FIN);
+ 8015264:	4b65      	ldr	r3, [pc, #404]	; (80153fc <tcp_receive+0x888>)
+ 8015266:	68db      	ldr	r3, [r3, #12]
+ 8015268:	899b      	ldrh	r3, [r3, #12]
+ 801526a:	b29b      	uxth	r3, r3
+ 801526c:	b21b      	sxth	r3, r3
+ 801526e:	f423 537c 	bic.w	r3, r3, #16128	; 0x3f00
+ 8015272:	b21c      	sxth	r4, r3
+ 8015274:	4b61      	ldr	r3, [pc, #388]	; (80153fc <tcp_receive+0x888>)
+ 8015276:	68db      	ldr	r3, [r3, #12]
+ 8015278:	899b      	ldrh	r3, [r3, #12]
+ 801527a:	b29b      	uxth	r3, r3
+ 801527c:	4618      	mov	r0, r3
+ 801527e:	f7fa ffd7 	bl	8010230 <lwip_htons>
+ 8015282:	4603      	mov	r3, r0
+ 8015284:	b2db      	uxtb	r3, r3
+ 8015286:	b29b      	uxth	r3, r3
+ 8015288:	f003 033e 	and.w	r3, r3, #62	; 0x3e
+ 801528c:	b29b      	uxth	r3, r3
+ 801528e:	4618      	mov	r0, r3
+ 8015290:	f7fa ffce 	bl	8010230 <lwip_htons>
+ 8015294:	4603      	mov	r3, r0
+ 8015296:	b21b      	sxth	r3, r3
+ 8015298:	4323      	orrs	r3, r4
+ 801529a:	b21a      	sxth	r2, r3
+ 801529c:	4b57      	ldr	r3, [pc, #348]	; (80153fc <tcp_receive+0x888>)
+ 801529e:	68db      	ldr	r3, [r3, #12]
+ 80152a0:	b292      	uxth	r2, r2
+ 80152a2:	819a      	strh	r2, [r3, #12]
+          }
+          /* Adjust length of segment to fit in the window. */
+          TCPWND_CHECK16(pcb->rcv_wnd);
+          inseg.len = (u16_t)pcb->rcv_wnd;
+ 80152a4:	687b      	ldr	r3, [r7, #4]
+ 80152a6:	8d1a      	ldrh	r2, [r3, #40]	; 0x28
+ 80152a8:	4b54      	ldr	r3, [pc, #336]	; (80153fc <tcp_receive+0x888>)
+ 80152aa:	811a      	strh	r2, [r3, #8]
+          if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
+ 80152ac:	4b53      	ldr	r3, [pc, #332]	; (80153fc <tcp_receive+0x888>)
+ 80152ae:	68db      	ldr	r3, [r3, #12]
+ 80152b0:	899b      	ldrh	r3, [r3, #12]
+ 80152b2:	b29b      	uxth	r3, r3
+ 80152b4:	4618      	mov	r0, r3
+ 80152b6:	f7fa ffbb 	bl	8010230 <lwip_htons>
+ 80152ba:	4603      	mov	r3, r0
+ 80152bc:	b2db      	uxtb	r3, r3
+ 80152be:	f003 0302 	and.w	r3, r3, #2
+ 80152c2:	2b00      	cmp	r3, #0
+ 80152c4:	d005      	beq.n	80152d2 <tcp_receive+0x75e>
+            inseg.len -= 1;
+ 80152c6:	4b4d      	ldr	r3, [pc, #308]	; (80153fc <tcp_receive+0x888>)
+ 80152c8:	891b      	ldrh	r3, [r3, #8]
+ 80152ca:	3b01      	subs	r3, #1
+ 80152cc:	b29a      	uxth	r2, r3
+ 80152ce:	4b4b      	ldr	r3, [pc, #300]	; (80153fc <tcp_receive+0x888>)
+ 80152d0:	811a      	strh	r2, [r3, #8]
+          }
+          pbuf_realloc(inseg.p, inseg.len);
+ 80152d2:	4b4a      	ldr	r3, [pc, #296]	; (80153fc <tcp_receive+0x888>)
+ 80152d4:	685a      	ldr	r2, [r3, #4]
+ 80152d6:	4b49      	ldr	r3, [pc, #292]	; (80153fc <tcp_receive+0x888>)
+ 80152d8:	891b      	ldrh	r3, [r3, #8]
+ 80152da:	4619      	mov	r1, r3
+ 80152dc:	4610      	mov	r0, r2
+ 80152de:	f7fc f9d5 	bl	801168c <pbuf_realloc>
+          tcplen = TCP_TCPLEN(&inseg);
+ 80152e2:	4b46      	ldr	r3, [pc, #280]	; (80153fc <tcp_receive+0x888>)
+ 80152e4:	891c      	ldrh	r4, [r3, #8]
+ 80152e6:	4b45      	ldr	r3, [pc, #276]	; (80153fc <tcp_receive+0x888>)
+ 80152e8:	68db      	ldr	r3, [r3, #12]
+ 80152ea:	899b      	ldrh	r3, [r3, #12]
+ 80152ec:	b29b      	uxth	r3, r3
+ 80152ee:	4618      	mov	r0, r3
+ 80152f0:	f7fa ff9e 	bl	8010230 <lwip_htons>
+ 80152f4:	4603      	mov	r3, r0
+ 80152f6:	b2db      	uxtb	r3, r3
+ 80152f8:	f003 0303 	and.w	r3, r3, #3
+ 80152fc:	2b00      	cmp	r3, #0
+ 80152fe:	d001      	beq.n	8015304 <tcp_receive+0x790>
+ 8015300:	2301      	movs	r3, #1
+ 8015302:	e000      	b.n	8015306 <tcp_receive+0x792>
+ 8015304:	2300      	movs	r3, #0
+ 8015306:	4423      	add	r3, r4
+ 8015308:	b29a      	uxth	r2, r3
+ 801530a:	4b3d      	ldr	r3, [pc, #244]	; (8015400 <tcp_receive+0x88c>)
+ 801530c:	801a      	strh	r2, [r3, #0]
+          LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
+ 801530e:	4b3c      	ldr	r3, [pc, #240]	; (8015400 <tcp_receive+0x88c>)
+ 8015310:	881b      	ldrh	r3, [r3, #0]
+ 8015312:	461a      	mov	r2, r3
+ 8015314:	4b38      	ldr	r3, [pc, #224]	; (80153f8 <tcp_receive+0x884>)
+ 8015316:	681b      	ldr	r3, [r3, #0]
+ 8015318:	441a      	add	r2, r3
+ 801531a:	687b      	ldr	r3, [r7, #4]
+ 801531c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 801531e:	6879      	ldr	r1, [r7, #4]
+ 8015320:	8d09      	ldrh	r1, [r1, #40]	; 0x28
+ 8015322:	440b      	add	r3, r1
+ 8015324:	429a      	cmp	r2, r3
+ 8015326:	d006      	beq.n	8015336 <tcp_receive+0x7c2>
+ 8015328:	4b36      	ldr	r3, [pc, #216]	; (8015404 <tcp_receive+0x890>)
+ 801532a:	f240 52cc 	movw	r2, #1484	; 0x5cc
+ 801532e:	4936      	ldr	r1, [pc, #216]	; (8015408 <tcp_receive+0x894>)
+ 8015330:	4836      	ldr	r0, [pc, #216]	; (801540c <tcp_receive+0x898>)
+ 8015332:	f007 f861 	bl	801c3f8 <iprintf>
+        }
+#if TCP_QUEUE_OOSEQ
+        /* Received in-sequence data, adjust ooseq data if:
+           - FIN has been received or
+           - inseq overlaps with ooseq */
+        if (pcb->ooseq != NULL) {
+ 8015336:	687b      	ldr	r3, [r7, #4]
+ 8015338:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 801533a:	2b00      	cmp	r3, #0
+ 801533c:	f000 80e7 	beq.w	801550e <tcp_receive+0x99a>
+          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
+ 8015340:	4b2e      	ldr	r3, [pc, #184]	; (80153fc <tcp_receive+0x888>)
+ 8015342:	68db      	ldr	r3, [r3, #12]
+ 8015344:	899b      	ldrh	r3, [r3, #12]
+ 8015346:	b29b      	uxth	r3, r3
+ 8015348:	4618      	mov	r0, r3
+ 801534a:	f7fa ff71 	bl	8010230 <lwip_htons>
+ 801534e:	4603      	mov	r3, r0
+ 8015350:	b2db      	uxtb	r3, r3
+ 8015352:	f003 0301 	and.w	r3, r3, #1
+ 8015356:	2b00      	cmp	r3, #0
+ 8015358:	d010      	beq.n	801537c <tcp_receive+0x808>
+            LWIP_DEBUGF(TCP_INPUT_DEBUG,
+                        ("tcp_receive: received in-order FIN, binning ooseq queue\n"));
+            /* Received in-order FIN means anything that was received
+             * out of order must now have been received in-order, so
+             * bin the ooseq queue */
+            while (pcb->ooseq != NULL) {
+ 801535a:	e00a      	b.n	8015372 <tcp_receive+0x7fe>
+              struct tcp_seg *old_ooseq = pcb->ooseq;
+ 801535c:	687b      	ldr	r3, [r7, #4]
+ 801535e:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8015360:	60fb      	str	r3, [r7, #12]
+              pcb->ooseq = pcb->ooseq->next;
+ 8015362:	687b      	ldr	r3, [r7, #4]
+ 8015364:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8015366:	681a      	ldr	r2, [r3, #0]
+ 8015368:	687b      	ldr	r3, [r7, #4]
+ 801536a:	675a      	str	r2, [r3, #116]	; 0x74
+              tcp_seg_free(old_ooseq);
+ 801536c:	68f8      	ldr	r0, [r7, #12]
+ 801536e:	f7fd fd97 	bl	8012ea0 <tcp_seg_free>
+            while (pcb->ooseq != NULL) {
+ 8015372:	687b      	ldr	r3, [r7, #4]
+ 8015374:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8015376:	2b00      	cmp	r3, #0
+ 8015378:	d1f0      	bne.n	801535c <tcp_receive+0x7e8>
+ 801537a:	e0c8      	b.n	801550e <tcp_receive+0x99a>
+            }
+          } else {
+            struct tcp_seg *next = pcb->ooseq;
+ 801537c:	687b      	ldr	r3, [r7, #4]
+ 801537e:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8015380:	63fb      	str	r3, [r7, #60]	; 0x3c
+            /* Remove all segments on ooseq that are covered by inseg already.
+             * FIN is copied from ooseq to inseg if present. */
+            while (next &&
+ 8015382:	e052      	b.n	801542a <tcp_receive+0x8b6>
+                   TCP_SEQ_GEQ(seqno + tcplen,
+                               next->tcphdr->seqno + next->len)) {
+              struct tcp_seg *tmp;
+              /* inseg cannot have FIN here (already processed above) */
+              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
+ 8015384:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 8015386:	68db      	ldr	r3, [r3, #12]
+ 8015388:	899b      	ldrh	r3, [r3, #12]
+ 801538a:	b29b      	uxth	r3, r3
+ 801538c:	4618      	mov	r0, r3
+ 801538e:	f7fa ff4f 	bl	8010230 <lwip_htons>
+ 8015392:	4603      	mov	r3, r0
+ 8015394:	b2db      	uxtb	r3, r3
+ 8015396:	f003 0301 	and.w	r3, r3, #1
+ 801539a:	2b00      	cmp	r3, #0
+ 801539c:	d03d      	beq.n	801541a <tcp_receive+0x8a6>
+                  (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) {
+ 801539e:	4b17      	ldr	r3, [pc, #92]	; (80153fc <tcp_receive+0x888>)
+ 80153a0:	68db      	ldr	r3, [r3, #12]
+ 80153a2:	899b      	ldrh	r3, [r3, #12]
+ 80153a4:	b29b      	uxth	r3, r3
+ 80153a6:	4618      	mov	r0, r3
+ 80153a8:	f7fa ff42 	bl	8010230 <lwip_htons>
+ 80153ac:	4603      	mov	r3, r0
+ 80153ae:	b2db      	uxtb	r3, r3
+ 80153b0:	f003 0302 	and.w	r3, r3, #2
+              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
+ 80153b4:	2b00      	cmp	r3, #0
+ 80153b6:	d130      	bne.n	801541a <tcp_receive+0x8a6>
+                TCPH_SET_FLAG(inseg.tcphdr, TCP_FIN);
+ 80153b8:	4b10      	ldr	r3, [pc, #64]	; (80153fc <tcp_receive+0x888>)
+ 80153ba:	68db      	ldr	r3, [r3, #12]
+ 80153bc:	899b      	ldrh	r3, [r3, #12]
+ 80153be:	b29c      	uxth	r4, r3
+ 80153c0:	2001      	movs	r0, #1
+ 80153c2:	f7fa ff35 	bl	8010230 <lwip_htons>
+ 80153c6:	4603      	mov	r3, r0
+ 80153c8:	461a      	mov	r2, r3
+ 80153ca:	4b0c      	ldr	r3, [pc, #48]	; (80153fc <tcp_receive+0x888>)
+ 80153cc:	68db      	ldr	r3, [r3, #12]
+ 80153ce:	4322      	orrs	r2, r4
+ 80153d0:	b292      	uxth	r2, r2
+ 80153d2:	819a      	strh	r2, [r3, #12]
+                tcplen = TCP_TCPLEN(&inseg);
+ 80153d4:	4b09      	ldr	r3, [pc, #36]	; (80153fc <tcp_receive+0x888>)
+ 80153d6:	891c      	ldrh	r4, [r3, #8]
+ 80153d8:	4b08      	ldr	r3, [pc, #32]	; (80153fc <tcp_receive+0x888>)
+ 80153da:	68db      	ldr	r3, [r3, #12]
+ 80153dc:	899b      	ldrh	r3, [r3, #12]
+ 80153de:	b29b      	uxth	r3, r3
+ 80153e0:	4618      	mov	r0, r3
+ 80153e2:	f7fa ff25 	bl	8010230 <lwip_htons>
+ 80153e6:	4603      	mov	r3, r0
+ 80153e8:	b2db      	uxtb	r3, r3
+ 80153ea:	f003 0303 	and.w	r3, r3, #3
+ 80153ee:	2b00      	cmp	r3, #0
+ 80153f0:	d00e      	beq.n	8015410 <tcp_receive+0x89c>
+ 80153f2:	2301      	movs	r3, #1
+ 80153f4:	e00d      	b.n	8015412 <tcp_receive+0x89e>
+ 80153f6:	bf00      	nop
+ 80153f8:	20008738 	.word	0x20008738
+ 80153fc:	20008718 	.word	0x20008718
+ 8015400:	20008742 	.word	0x20008742
+ 8015404:	0801e9e0 	.word	0x0801e9e0
+ 8015408:	0801ed88 	.word	0x0801ed88
+ 801540c:	0801ea2c 	.word	0x0801ea2c
+ 8015410:	2300      	movs	r3, #0
+ 8015412:	4423      	add	r3, r4
+ 8015414:	b29a      	uxth	r2, r3
+ 8015416:	4b98      	ldr	r3, [pc, #608]	; (8015678 <tcp_receive+0xb04>)
+ 8015418:	801a      	strh	r2, [r3, #0]
+              }
+              tmp = next;
+ 801541a:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 801541c:	613b      	str	r3, [r7, #16]
+              next = next->next;
+ 801541e:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 8015420:	681b      	ldr	r3, [r3, #0]
+ 8015422:	63fb      	str	r3, [r7, #60]	; 0x3c
+              tcp_seg_free(tmp);
+ 8015424:	6938      	ldr	r0, [r7, #16]
+ 8015426:	f7fd fd3b 	bl	8012ea0 <tcp_seg_free>
+            while (next &&
+ 801542a:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 801542c:	2b00      	cmp	r3, #0
+ 801542e:	d00e      	beq.n	801544e <tcp_receive+0x8da>
+                   TCP_SEQ_GEQ(seqno + tcplen,
+ 8015430:	4b91      	ldr	r3, [pc, #580]	; (8015678 <tcp_receive+0xb04>)
+ 8015432:	881b      	ldrh	r3, [r3, #0]
+ 8015434:	461a      	mov	r2, r3
+ 8015436:	4b91      	ldr	r3, [pc, #580]	; (801567c <tcp_receive+0xb08>)
+ 8015438:	681b      	ldr	r3, [r3, #0]
+ 801543a:	441a      	add	r2, r3
+ 801543c:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 801543e:	68db      	ldr	r3, [r3, #12]
+ 8015440:	685b      	ldr	r3, [r3, #4]
+ 8015442:	6bf9      	ldr	r1, [r7, #60]	; 0x3c
+ 8015444:	8909      	ldrh	r1, [r1, #8]
+ 8015446:	440b      	add	r3, r1
+ 8015448:	1ad3      	subs	r3, r2, r3
+            while (next &&
+ 801544a:	2b00      	cmp	r3, #0
+ 801544c:	da9a      	bge.n	8015384 <tcp_receive+0x810>
+            }
+            /* Now trim right side of inseg if it overlaps with the first
+             * segment on ooseq */
+            if (next &&
+ 801544e:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 8015450:	2b00      	cmp	r3, #0
+ 8015452:	d059      	beq.n	8015508 <tcp_receive+0x994>
+                TCP_SEQ_GT(seqno + tcplen,
+ 8015454:	4b88      	ldr	r3, [pc, #544]	; (8015678 <tcp_receive+0xb04>)
+ 8015456:	881b      	ldrh	r3, [r3, #0]
+ 8015458:	461a      	mov	r2, r3
+ 801545a:	4b88      	ldr	r3, [pc, #544]	; (801567c <tcp_receive+0xb08>)
+ 801545c:	681b      	ldr	r3, [r3, #0]
+ 801545e:	441a      	add	r2, r3
+ 8015460:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 8015462:	68db      	ldr	r3, [r3, #12]
+ 8015464:	685b      	ldr	r3, [r3, #4]
+ 8015466:	1ad3      	subs	r3, r2, r3
+            if (next &&
+ 8015468:	2b00      	cmp	r3, #0
+ 801546a:	dd4d      	ble.n	8015508 <tcp_receive+0x994>
+                           next->tcphdr->seqno)) {
+              /* inseg cannot have FIN here (already processed above) */
+              inseg.len = (u16_t)(next->tcphdr->seqno - seqno);
+ 801546c:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 801546e:	68db      	ldr	r3, [r3, #12]
+ 8015470:	685b      	ldr	r3, [r3, #4]
+ 8015472:	b29a      	uxth	r2, r3
+ 8015474:	4b81      	ldr	r3, [pc, #516]	; (801567c <tcp_receive+0xb08>)
+ 8015476:	681b      	ldr	r3, [r3, #0]
+ 8015478:	b29b      	uxth	r3, r3
+ 801547a:	1ad3      	subs	r3, r2, r3
+ 801547c:	b29a      	uxth	r2, r3
+ 801547e:	4b80      	ldr	r3, [pc, #512]	; (8015680 <tcp_receive+0xb0c>)
+ 8015480:	811a      	strh	r2, [r3, #8]
+              if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
+ 8015482:	4b7f      	ldr	r3, [pc, #508]	; (8015680 <tcp_receive+0xb0c>)
+ 8015484:	68db      	ldr	r3, [r3, #12]
+ 8015486:	899b      	ldrh	r3, [r3, #12]
+ 8015488:	b29b      	uxth	r3, r3
+ 801548a:	4618      	mov	r0, r3
+ 801548c:	f7fa fed0 	bl	8010230 <lwip_htons>
+ 8015490:	4603      	mov	r3, r0
+ 8015492:	b2db      	uxtb	r3, r3
+ 8015494:	f003 0302 	and.w	r3, r3, #2
+ 8015498:	2b00      	cmp	r3, #0
+ 801549a:	d005      	beq.n	80154a8 <tcp_receive+0x934>
+                inseg.len -= 1;
+ 801549c:	4b78      	ldr	r3, [pc, #480]	; (8015680 <tcp_receive+0xb0c>)
+ 801549e:	891b      	ldrh	r3, [r3, #8]
+ 80154a0:	3b01      	subs	r3, #1
+ 80154a2:	b29a      	uxth	r2, r3
+ 80154a4:	4b76      	ldr	r3, [pc, #472]	; (8015680 <tcp_receive+0xb0c>)
+ 80154a6:	811a      	strh	r2, [r3, #8]
+              }
+              pbuf_realloc(inseg.p, inseg.len);
+ 80154a8:	4b75      	ldr	r3, [pc, #468]	; (8015680 <tcp_receive+0xb0c>)
+ 80154aa:	685a      	ldr	r2, [r3, #4]
+ 80154ac:	4b74      	ldr	r3, [pc, #464]	; (8015680 <tcp_receive+0xb0c>)
+ 80154ae:	891b      	ldrh	r3, [r3, #8]
+ 80154b0:	4619      	mov	r1, r3
+ 80154b2:	4610      	mov	r0, r2
+ 80154b4:	f7fc f8ea 	bl	801168c <pbuf_realloc>
+              tcplen = TCP_TCPLEN(&inseg);
+ 80154b8:	4b71      	ldr	r3, [pc, #452]	; (8015680 <tcp_receive+0xb0c>)
+ 80154ba:	891c      	ldrh	r4, [r3, #8]
+ 80154bc:	4b70      	ldr	r3, [pc, #448]	; (8015680 <tcp_receive+0xb0c>)
+ 80154be:	68db      	ldr	r3, [r3, #12]
+ 80154c0:	899b      	ldrh	r3, [r3, #12]
+ 80154c2:	b29b      	uxth	r3, r3
+ 80154c4:	4618      	mov	r0, r3
+ 80154c6:	f7fa feb3 	bl	8010230 <lwip_htons>
+ 80154ca:	4603      	mov	r3, r0
+ 80154cc:	b2db      	uxtb	r3, r3
+ 80154ce:	f003 0303 	and.w	r3, r3, #3
+ 80154d2:	2b00      	cmp	r3, #0
+ 80154d4:	d001      	beq.n	80154da <tcp_receive+0x966>
+ 80154d6:	2301      	movs	r3, #1
+ 80154d8:	e000      	b.n	80154dc <tcp_receive+0x968>
+ 80154da:	2300      	movs	r3, #0
+ 80154dc:	4423      	add	r3, r4
+ 80154de:	b29a      	uxth	r2, r3
+ 80154e0:	4b65      	ldr	r3, [pc, #404]	; (8015678 <tcp_receive+0xb04>)
+ 80154e2:	801a      	strh	r2, [r3, #0]
+              LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n",
+ 80154e4:	4b64      	ldr	r3, [pc, #400]	; (8015678 <tcp_receive+0xb04>)
+ 80154e6:	881b      	ldrh	r3, [r3, #0]
+ 80154e8:	461a      	mov	r2, r3
+ 80154ea:	4b64      	ldr	r3, [pc, #400]	; (801567c <tcp_receive+0xb08>)
+ 80154ec:	681b      	ldr	r3, [r3, #0]
+ 80154ee:	441a      	add	r2, r3
+ 80154f0:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 80154f2:	68db      	ldr	r3, [r3, #12]
+ 80154f4:	685b      	ldr	r3, [r3, #4]
+ 80154f6:	429a      	cmp	r2, r3
+ 80154f8:	d006      	beq.n	8015508 <tcp_receive+0x994>
+ 80154fa:	4b62      	ldr	r3, [pc, #392]	; (8015684 <tcp_receive+0xb10>)
+ 80154fc:	f240 52fd 	movw	r2, #1533	; 0x5fd
+ 8015500:	4961      	ldr	r1, [pc, #388]	; (8015688 <tcp_receive+0xb14>)
+ 8015502:	4862      	ldr	r0, [pc, #392]	; (801568c <tcp_receive+0xb18>)
+ 8015504:	f006 ff78 	bl	801c3f8 <iprintf>
+                          (seqno + tcplen) == next->tcphdr->seqno);
+            }
+            pcb->ooseq = next;
+ 8015508:	687b      	ldr	r3, [r7, #4]
+ 801550a:	6bfa      	ldr	r2, [r7, #60]	; 0x3c
+ 801550c:	675a      	str	r2, [r3, #116]	; 0x74
+          }
+        }
+#endif /* TCP_QUEUE_OOSEQ */
+
+        pcb->rcv_nxt = seqno + tcplen;
+ 801550e:	4b5a      	ldr	r3, [pc, #360]	; (8015678 <tcp_receive+0xb04>)
+ 8015510:	881b      	ldrh	r3, [r3, #0]
+ 8015512:	461a      	mov	r2, r3
+ 8015514:	4b59      	ldr	r3, [pc, #356]	; (801567c <tcp_receive+0xb08>)
+ 8015516:	681b      	ldr	r3, [r3, #0]
+ 8015518:	441a      	add	r2, r3
+ 801551a:	687b      	ldr	r3, [r7, #4]
+ 801551c:	625a      	str	r2, [r3, #36]	; 0x24
+
+        /* Update the receiver's (our) window. */
+        LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen);
+ 801551e:	687b      	ldr	r3, [r7, #4]
+ 8015520:	8d1a      	ldrh	r2, [r3, #40]	; 0x28
+ 8015522:	4b55      	ldr	r3, [pc, #340]	; (8015678 <tcp_receive+0xb04>)
+ 8015524:	881b      	ldrh	r3, [r3, #0]
+ 8015526:	429a      	cmp	r2, r3
+ 8015528:	d206      	bcs.n	8015538 <tcp_receive+0x9c4>
+ 801552a:	4b56      	ldr	r3, [pc, #344]	; (8015684 <tcp_receive+0xb10>)
+ 801552c:	f240 6207 	movw	r2, #1543	; 0x607
+ 8015530:	4957      	ldr	r1, [pc, #348]	; (8015690 <tcp_receive+0xb1c>)
+ 8015532:	4856      	ldr	r0, [pc, #344]	; (801568c <tcp_receive+0xb18>)
+ 8015534:	f006 ff60 	bl	801c3f8 <iprintf>
+        pcb->rcv_wnd -= tcplen;
+ 8015538:	687b      	ldr	r3, [r7, #4]
+ 801553a:	8d1a      	ldrh	r2, [r3, #40]	; 0x28
+ 801553c:	4b4e      	ldr	r3, [pc, #312]	; (8015678 <tcp_receive+0xb04>)
+ 801553e:	881b      	ldrh	r3, [r3, #0]
+ 8015540:	1ad3      	subs	r3, r2, r3
+ 8015542:	b29a      	uxth	r2, r3
+ 8015544:	687b      	ldr	r3, [r7, #4]
+ 8015546:	851a      	strh	r2, [r3, #40]	; 0x28
+
+        tcp_update_rcv_ann_wnd(pcb);
+ 8015548:	6878      	ldr	r0, [r7, #4]
+ 801554a:	f7fc ffcd 	bl	80124e8 <tcp_update_rcv_ann_wnd>
+           chains its data on this pbuf as well.
+
+           If the segment was a FIN, we set the TF_GOT_FIN flag that will
+           be used to indicate to the application that the remote side has
+           closed its end of the connection. */
+        if (inseg.p->tot_len > 0) {
+ 801554e:	4b4c      	ldr	r3, [pc, #304]	; (8015680 <tcp_receive+0xb0c>)
+ 8015550:	685b      	ldr	r3, [r3, #4]
+ 8015552:	891b      	ldrh	r3, [r3, #8]
+ 8015554:	2b00      	cmp	r3, #0
+ 8015556:	d006      	beq.n	8015566 <tcp_receive+0x9f2>
+          recv_data = inseg.p;
+ 8015558:	4b49      	ldr	r3, [pc, #292]	; (8015680 <tcp_receive+0xb0c>)
+ 801555a:	685b      	ldr	r3, [r3, #4]
+ 801555c:	4a4d      	ldr	r2, [pc, #308]	; (8015694 <tcp_receive+0xb20>)
+ 801555e:	6013      	str	r3, [r2, #0]
+          /* Since this pbuf now is the responsibility of the
+             application, we delete our reference to it so that we won't
+             (mistakingly) deallocate it. */
+          inseg.p = NULL;
+ 8015560:	4b47      	ldr	r3, [pc, #284]	; (8015680 <tcp_receive+0xb0c>)
+ 8015562:	2200      	movs	r2, #0
+ 8015564:	605a      	str	r2, [r3, #4]
+        }
+        if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
+ 8015566:	4b46      	ldr	r3, [pc, #280]	; (8015680 <tcp_receive+0xb0c>)
+ 8015568:	68db      	ldr	r3, [r3, #12]
+ 801556a:	899b      	ldrh	r3, [r3, #12]
+ 801556c:	b29b      	uxth	r3, r3
+ 801556e:	4618      	mov	r0, r3
+ 8015570:	f7fa fe5e 	bl	8010230 <lwip_htons>
+ 8015574:	4603      	mov	r3, r0
+ 8015576:	b2db      	uxtb	r3, r3
+ 8015578:	f003 0301 	and.w	r3, r3, #1
+ 801557c:	2b00      	cmp	r3, #0
+ 801557e:	f000 80b8 	beq.w	80156f2 <tcp_receive+0xb7e>
+          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n"));
+          recv_flags |= TF_GOT_FIN;
+ 8015582:	4b45      	ldr	r3, [pc, #276]	; (8015698 <tcp_receive+0xb24>)
+ 8015584:	781b      	ldrb	r3, [r3, #0]
+ 8015586:	f043 0320 	orr.w	r3, r3, #32
+ 801558a:	b2da      	uxtb	r2, r3
+ 801558c:	4b42      	ldr	r3, [pc, #264]	; (8015698 <tcp_receive+0xb24>)
+ 801558e:	701a      	strb	r2, [r3, #0]
+        }
+
+#if TCP_QUEUE_OOSEQ
+        /* We now check if we have segments on the ->ooseq queue that
+           are now in sequence. */
+        while (pcb->ooseq != NULL &&
+ 8015590:	e0af      	b.n	80156f2 <tcp_receive+0xb7e>
+               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {
+
+          struct tcp_seg *cseg = pcb->ooseq;
+ 8015592:	687b      	ldr	r3, [r7, #4]
+ 8015594:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8015596:	60bb      	str	r3, [r7, #8]
+          seqno = pcb->ooseq->tcphdr->seqno;
+ 8015598:	687b      	ldr	r3, [r7, #4]
+ 801559a:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 801559c:	68db      	ldr	r3, [r3, #12]
+ 801559e:	685b      	ldr	r3, [r3, #4]
+ 80155a0:	4a36      	ldr	r2, [pc, #216]	; (801567c <tcp_receive+0xb08>)
+ 80155a2:	6013      	str	r3, [r2, #0]
+
+          pcb->rcv_nxt += TCP_TCPLEN(cseg);
+ 80155a4:	68bb      	ldr	r3, [r7, #8]
+ 80155a6:	891b      	ldrh	r3, [r3, #8]
+ 80155a8:	461c      	mov	r4, r3
+ 80155aa:	68bb      	ldr	r3, [r7, #8]
+ 80155ac:	68db      	ldr	r3, [r3, #12]
+ 80155ae:	899b      	ldrh	r3, [r3, #12]
+ 80155b0:	b29b      	uxth	r3, r3
+ 80155b2:	4618      	mov	r0, r3
+ 80155b4:	f7fa fe3c 	bl	8010230 <lwip_htons>
+ 80155b8:	4603      	mov	r3, r0
+ 80155ba:	b2db      	uxtb	r3, r3
+ 80155bc:	f003 0303 	and.w	r3, r3, #3
+ 80155c0:	2b00      	cmp	r3, #0
+ 80155c2:	d001      	beq.n	80155c8 <tcp_receive+0xa54>
+ 80155c4:	2301      	movs	r3, #1
+ 80155c6:	e000      	b.n	80155ca <tcp_receive+0xa56>
+ 80155c8:	2300      	movs	r3, #0
+ 80155ca:	191a      	adds	r2, r3, r4
+ 80155cc:	687b      	ldr	r3, [r7, #4]
+ 80155ce:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80155d0:	441a      	add	r2, r3
+ 80155d2:	687b      	ldr	r3, [r7, #4]
+ 80155d4:	625a      	str	r2, [r3, #36]	; 0x24
+          LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n",
+ 80155d6:	687b      	ldr	r3, [r7, #4]
+ 80155d8:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 80155da:	461c      	mov	r4, r3
+ 80155dc:	68bb      	ldr	r3, [r7, #8]
+ 80155de:	891b      	ldrh	r3, [r3, #8]
+ 80155e0:	461d      	mov	r5, r3
+ 80155e2:	68bb      	ldr	r3, [r7, #8]
+ 80155e4:	68db      	ldr	r3, [r3, #12]
+ 80155e6:	899b      	ldrh	r3, [r3, #12]
+ 80155e8:	b29b      	uxth	r3, r3
+ 80155ea:	4618      	mov	r0, r3
+ 80155ec:	f7fa fe20 	bl	8010230 <lwip_htons>
+ 80155f0:	4603      	mov	r3, r0
+ 80155f2:	b2db      	uxtb	r3, r3
+ 80155f4:	f003 0303 	and.w	r3, r3, #3
+ 80155f8:	2b00      	cmp	r3, #0
+ 80155fa:	d001      	beq.n	8015600 <tcp_receive+0xa8c>
+ 80155fc:	2301      	movs	r3, #1
+ 80155fe:	e000      	b.n	8015602 <tcp_receive+0xa8e>
+ 8015600:	2300      	movs	r3, #0
+ 8015602:	442b      	add	r3, r5
+ 8015604:	429c      	cmp	r4, r3
+ 8015606:	d206      	bcs.n	8015616 <tcp_receive+0xaa2>
+ 8015608:	4b1e      	ldr	r3, [pc, #120]	; (8015684 <tcp_receive+0xb10>)
+ 801560a:	f240 622c 	movw	r2, #1580	; 0x62c
+ 801560e:	4923      	ldr	r1, [pc, #140]	; (801569c <tcp_receive+0xb28>)
+ 8015610:	481e      	ldr	r0, [pc, #120]	; (801568c <tcp_receive+0xb18>)
+ 8015612:	f006 fef1 	bl	801c3f8 <iprintf>
+                      pcb->rcv_wnd >= TCP_TCPLEN(cseg));
+          pcb->rcv_wnd -= TCP_TCPLEN(cseg);
+ 8015616:	68bb      	ldr	r3, [r7, #8]
+ 8015618:	891b      	ldrh	r3, [r3, #8]
+ 801561a:	461c      	mov	r4, r3
+ 801561c:	68bb      	ldr	r3, [r7, #8]
+ 801561e:	68db      	ldr	r3, [r3, #12]
+ 8015620:	899b      	ldrh	r3, [r3, #12]
+ 8015622:	b29b      	uxth	r3, r3
+ 8015624:	4618      	mov	r0, r3
+ 8015626:	f7fa fe03 	bl	8010230 <lwip_htons>
+ 801562a:	4603      	mov	r3, r0
+ 801562c:	b2db      	uxtb	r3, r3
+ 801562e:	f003 0303 	and.w	r3, r3, #3
+ 8015632:	2b00      	cmp	r3, #0
+ 8015634:	d001      	beq.n	801563a <tcp_receive+0xac6>
+ 8015636:	2301      	movs	r3, #1
+ 8015638:	e000      	b.n	801563c <tcp_receive+0xac8>
+ 801563a:	2300      	movs	r3, #0
+ 801563c:	1919      	adds	r1, r3, r4
+ 801563e:	687b      	ldr	r3, [r7, #4]
+ 8015640:	8d1a      	ldrh	r2, [r3, #40]	; 0x28
+ 8015642:	b28b      	uxth	r3, r1
+ 8015644:	1ad3      	subs	r3, r2, r3
+ 8015646:	b29a      	uxth	r2, r3
+ 8015648:	687b      	ldr	r3, [r7, #4]
+ 801564a:	851a      	strh	r2, [r3, #40]	; 0x28
+
+          tcp_update_rcv_ann_wnd(pcb);
+ 801564c:	6878      	ldr	r0, [r7, #4]
+ 801564e:	f7fc ff4b 	bl	80124e8 <tcp_update_rcv_ann_wnd>
+
+          if (cseg->p->tot_len > 0) {
+ 8015652:	68bb      	ldr	r3, [r7, #8]
+ 8015654:	685b      	ldr	r3, [r3, #4]
+ 8015656:	891b      	ldrh	r3, [r3, #8]
+ 8015658:	2b00      	cmp	r3, #0
+ 801565a:	d028      	beq.n	80156ae <tcp_receive+0xb3a>
+            /* Chain this pbuf onto the pbuf that we will pass to
+               the application. */
+            /* With window scaling, this can overflow recv_data->tot_len, but
+               that's not a problem since we explicitly fix that before passing
+               recv_data to the application. */
+            if (recv_data) {
+ 801565c:	4b0d      	ldr	r3, [pc, #52]	; (8015694 <tcp_receive+0xb20>)
+ 801565e:	681b      	ldr	r3, [r3, #0]
+ 8015660:	2b00      	cmp	r3, #0
+ 8015662:	d01d      	beq.n	80156a0 <tcp_receive+0xb2c>
+              pbuf_cat(recv_data, cseg->p);
+ 8015664:	4b0b      	ldr	r3, [pc, #44]	; (8015694 <tcp_receive+0xb20>)
+ 8015666:	681a      	ldr	r2, [r3, #0]
+ 8015668:	68bb      	ldr	r3, [r7, #8]
+ 801566a:	685b      	ldr	r3, [r3, #4]
+ 801566c:	4619      	mov	r1, r3
+ 801566e:	4610      	mov	r0, r2
+ 8015670:	f7fc fa60 	bl	8011b34 <pbuf_cat>
+ 8015674:	e018      	b.n	80156a8 <tcp_receive+0xb34>
+ 8015676:	bf00      	nop
+ 8015678:	20008742 	.word	0x20008742
+ 801567c:	20008738 	.word	0x20008738
+ 8015680:	20008718 	.word	0x20008718
+ 8015684:	0801e9e0 	.word	0x0801e9e0
+ 8015688:	0801edc0 	.word	0x0801edc0
+ 801568c:	0801ea2c 	.word	0x0801ea2c
+ 8015690:	0801edfc 	.word	0x0801edfc
+ 8015694:	20008748 	.word	0x20008748
+ 8015698:	20008745 	.word	0x20008745
+ 801569c:	0801ee1c 	.word	0x0801ee1c
+            } else {
+              recv_data = cseg->p;
+ 80156a0:	68bb      	ldr	r3, [r7, #8]
+ 80156a2:	685b      	ldr	r3, [r3, #4]
+ 80156a4:	4a70      	ldr	r2, [pc, #448]	; (8015868 <tcp_receive+0xcf4>)
+ 80156a6:	6013      	str	r3, [r2, #0]
+            }
+            cseg->p = NULL;
+ 80156a8:	68bb      	ldr	r3, [r7, #8]
+ 80156aa:	2200      	movs	r2, #0
+ 80156ac:	605a      	str	r2, [r3, #4]
+          }
+          if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
+ 80156ae:	68bb      	ldr	r3, [r7, #8]
+ 80156b0:	68db      	ldr	r3, [r3, #12]
+ 80156b2:	899b      	ldrh	r3, [r3, #12]
+ 80156b4:	b29b      	uxth	r3, r3
+ 80156b6:	4618      	mov	r0, r3
+ 80156b8:	f7fa fdba 	bl	8010230 <lwip_htons>
+ 80156bc:	4603      	mov	r3, r0
+ 80156be:	b2db      	uxtb	r3, r3
+ 80156c0:	f003 0301 	and.w	r3, r3, #1
+ 80156c4:	2b00      	cmp	r3, #0
+ 80156c6:	d00d      	beq.n	80156e4 <tcp_receive+0xb70>
+            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n"));
+            recv_flags |= TF_GOT_FIN;
+ 80156c8:	4b68      	ldr	r3, [pc, #416]	; (801586c <tcp_receive+0xcf8>)
+ 80156ca:	781b      	ldrb	r3, [r3, #0]
+ 80156cc:	f043 0320 	orr.w	r3, r3, #32
+ 80156d0:	b2da      	uxtb	r2, r3
+ 80156d2:	4b66      	ldr	r3, [pc, #408]	; (801586c <tcp_receive+0xcf8>)
+ 80156d4:	701a      	strb	r2, [r3, #0]
+            if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */
+ 80156d6:	687b      	ldr	r3, [r7, #4]
+ 80156d8:	7d1b      	ldrb	r3, [r3, #20]
+ 80156da:	2b04      	cmp	r3, #4
+ 80156dc:	d102      	bne.n	80156e4 <tcp_receive+0xb70>
+              pcb->state = CLOSE_WAIT;
+ 80156de:	687b      	ldr	r3, [r7, #4]
+ 80156e0:	2207      	movs	r2, #7
+ 80156e2:	751a      	strb	r2, [r3, #20]
+            }
+          }
+
+          pcb->ooseq = cseg->next;
+ 80156e4:	68bb      	ldr	r3, [r7, #8]
+ 80156e6:	681a      	ldr	r2, [r3, #0]
+ 80156e8:	687b      	ldr	r3, [r7, #4]
+ 80156ea:	675a      	str	r2, [r3, #116]	; 0x74
+          tcp_seg_free(cseg);
+ 80156ec:	68b8      	ldr	r0, [r7, #8]
+ 80156ee:	f7fd fbd7 	bl	8012ea0 <tcp_seg_free>
+        while (pcb->ooseq != NULL &&
+ 80156f2:	687b      	ldr	r3, [r7, #4]
+ 80156f4:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 80156f6:	2b00      	cmp	r3, #0
+ 80156f8:	d008      	beq.n	801570c <tcp_receive+0xb98>
+               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {
+ 80156fa:	687b      	ldr	r3, [r7, #4]
+ 80156fc:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 80156fe:	68db      	ldr	r3, [r3, #12]
+ 8015700:	685a      	ldr	r2, [r3, #4]
+ 8015702:	687b      	ldr	r3, [r7, #4]
+ 8015704:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+        while (pcb->ooseq != NULL &&
+ 8015706:	429a      	cmp	r2, r3
+ 8015708:	f43f af43 	beq.w	8015592 <tcp_receive+0xa1e>
+#endif /* LWIP_TCP_SACK_OUT */
+#endif /* TCP_QUEUE_OOSEQ */
+
+
+        /* Acknowledge the segment(s). */
+        tcp_ack(pcb);
+ 801570c:	687b      	ldr	r3, [r7, #4]
+ 801570e:	8b5b      	ldrh	r3, [r3, #26]
+ 8015710:	f003 0301 	and.w	r3, r3, #1
+ 8015714:	2b00      	cmp	r3, #0
+ 8015716:	d00e      	beq.n	8015736 <tcp_receive+0xbc2>
+ 8015718:	687b      	ldr	r3, [r7, #4]
+ 801571a:	8b5b      	ldrh	r3, [r3, #26]
+ 801571c:	f023 0301 	bic.w	r3, r3, #1
+ 8015720:	b29a      	uxth	r2, r3
+ 8015722:	687b      	ldr	r3, [r7, #4]
+ 8015724:	835a      	strh	r2, [r3, #26]
+ 8015726:	687b      	ldr	r3, [r7, #4]
+ 8015728:	8b5b      	ldrh	r3, [r3, #26]
+ 801572a:	f043 0302 	orr.w	r3, r3, #2
+ 801572e:	b29a      	uxth	r2, r3
+ 8015730:	687b      	ldr	r3, [r7, #4]
+ 8015732:	835a      	strh	r2, [r3, #26]
+      if (pcb->rcv_nxt == seqno) {
+ 8015734:	e188      	b.n	8015a48 <tcp_receive+0xed4>
+        tcp_ack(pcb);
+ 8015736:	687b      	ldr	r3, [r7, #4]
+ 8015738:	8b5b      	ldrh	r3, [r3, #26]
+ 801573a:	f043 0301 	orr.w	r3, r3, #1
+ 801573e:	b29a      	uxth	r2, r3
+ 8015740:	687b      	ldr	r3, [r7, #4]
+ 8015742:	835a      	strh	r2, [r3, #26]
+      if (pcb->rcv_nxt == seqno) {
+ 8015744:	e180      	b.n	8015a48 <tcp_receive+0xed4>
+      } else {
+        /* We get here if the incoming segment is out-of-sequence. */
+
+#if TCP_QUEUE_OOSEQ
+        /* We queue the segment on the ->ooseq queue. */
+        if (pcb->ooseq == NULL) {
+ 8015746:	687b      	ldr	r3, [r7, #4]
+ 8015748:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 801574a:	2b00      	cmp	r3, #0
+ 801574c:	d106      	bne.n	801575c <tcp_receive+0xbe8>
+          pcb->ooseq = tcp_seg_copy(&inseg);
+ 801574e:	4848      	ldr	r0, [pc, #288]	; (8015870 <tcp_receive+0xcfc>)
+ 8015750:	f7fd fbbe 	bl	8012ed0 <tcp_seg_copy>
+ 8015754:	4602      	mov	r2, r0
+ 8015756:	687b      	ldr	r3, [r7, #4]
+ 8015758:	675a      	str	r2, [r3, #116]	; 0x74
+ 801575a:	e16d      	b.n	8015a38 <tcp_receive+0xec4>
+#if LWIP_TCP_SACK_OUT
+          /* This is the left edge of the lowest possible SACK range.
+             It may start before the newly received segment (possibly adjusted below). */
+          u32_t sackbeg = TCP_SEQ_LT(seqno, pcb->ooseq->tcphdr->seqno) ? seqno : pcb->ooseq->tcphdr->seqno;
+#endif /* LWIP_TCP_SACK_OUT */
+          struct tcp_seg *next, *prev = NULL;
+ 801575c:	2300      	movs	r3, #0
+ 801575e:	637b      	str	r3, [r7, #52]	; 0x34
+          for (next = pcb->ooseq; next != NULL; next = next->next) {
+ 8015760:	687b      	ldr	r3, [r7, #4]
+ 8015762:	6f5b      	ldr	r3, [r3, #116]	; 0x74
+ 8015764:	63bb      	str	r3, [r7, #56]	; 0x38
+ 8015766:	e157      	b.n	8015a18 <tcp_receive+0xea4>
+            if (seqno == next->tcphdr->seqno) {
+ 8015768:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 801576a:	68db      	ldr	r3, [r3, #12]
+ 801576c:	685a      	ldr	r2, [r3, #4]
+ 801576e:	4b41      	ldr	r3, [pc, #260]	; (8015874 <tcp_receive+0xd00>)
+ 8015770:	681b      	ldr	r3, [r3, #0]
+ 8015772:	429a      	cmp	r2, r3
+ 8015774:	d11d      	bne.n	80157b2 <tcp_receive+0xc3e>
+              /* The sequence number of the incoming segment is the
+                 same as the sequence number of the segment on
+                 ->ooseq. We check the lengths to see which one to
+                 discard. */
+              if (inseg.len > next->len) {
+ 8015776:	4b3e      	ldr	r3, [pc, #248]	; (8015870 <tcp_receive+0xcfc>)
+ 8015778:	891a      	ldrh	r2, [r3, #8]
+ 801577a:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 801577c:	891b      	ldrh	r3, [r3, #8]
+ 801577e:	429a      	cmp	r2, r3
+ 8015780:	f240 814f 	bls.w	8015a22 <tcp_receive+0xeae>
+                /* The incoming segment is larger than the old
+                   segment. We replace some segments with the new
+                   one. */
+                struct tcp_seg *cseg = tcp_seg_copy(&inseg);
+ 8015784:	483a      	ldr	r0, [pc, #232]	; (8015870 <tcp_receive+0xcfc>)
+ 8015786:	f7fd fba3 	bl	8012ed0 <tcp_seg_copy>
+ 801578a:	6178      	str	r0, [r7, #20]
+                if (cseg != NULL) {
+ 801578c:	697b      	ldr	r3, [r7, #20]
+ 801578e:	2b00      	cmp	r3, #0
+ 8015790:	f000 8149 	beq.w	8015a26 <tcp_receive+0xeb2>
+                  if (prev != NULL) {
+ 8015794:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 8015796:	2b00      	cmp	r3, #0
+ 8015798:	d003      	beq.n	80157a2 <tcp_receive+0xc2e>
+                    prev->next = cseg;
+ 801579a:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 801579c:	697a      	ldr	r2, [r7, #20]
+ 801579e:	601a      	str	r2, [r3, #0]
+ 80157a0:	e002      	b.n	80157a8 <tcp_receive+0xc34>
+                  } else {
+                    pcb->ooseq = cseg;
+ 80157a2:	687b      	ldr	r3, [r7, #4]
+ 80157a4:	697a      	ldr	r2, [r7, #20]
+ 80157a6:	675a      	str	r2, [r3, #116]	; 0x74
+                  }
+                  tcp_oos_insert_segment(cseg, next);
+ 80157a8:	6bb9      	ldr	r1, [r7, #56]	; 0x38
+ 80157aa:	6978      	ldr	r0, [r7, #20]
+ 80157ac:	f7ff f8de 	bl	801496c <tcp_oos_insert_segment>
+                }
+                break;
+ 80157b0:	e139      	b.n	8015a26 <tcp_receive+0xeb2>
+                   segment was smaller than the old one; in either
+                   case, we ditch the incoming segment. */
+                break;
+              }
+            } else {
+              if (prev == NULL) {
+ 80157b2:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 80157b4:	2b00      	cmp	r3, #0
+ 80157b6:	d117      	bne.n	80157e8 <tcp_receive+0xc74>
+                if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {
+ 80157b8:	4b2e      	ldr	r3, [pc, #184]	; (8015874 <tcp_receive+0xd00>)
+ 80157ba:	681a      	ldr	r2, [r3, #0]
+ 80157bc:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80157be:	68db      	ldr	r3, [r3, #12]
+ 80157c0:	685b      	ldr	r3, [r3, #4]
+ 80157c2:	1ad3      	subs	r3, r2, r3
+ 80157c4:	2b00      	cmp	r3, #0
+ 80157c6:	da57      	bge.n	8015878 <tcp_receive+0xd04>
+                  /* The sequence number of the incoming segment is lower
+                     than the sequence number of the first segment on the
+                     queue. We put the incoming segment first on the
+                     queue. */
+                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
+ 80157c8:	4829      	ldr	r0, [pc, #164]	; (8015870 <tcp_receive+0xcfc>)
+ 80157ca:	f7fd fb81 	bl	8012ed0 <tcp_seg_copy>
+ 80157ce:	61b8      	str	r0, [r7, #24]
+                  if (cseg != NULL) {
+ 80157d0:	69bb      	ldr	r3, [r7, #24]
+ 80157d2:	2b00      	cmp	r3, #0
+ 80157d4:	f000 8129 	beq.w	8015a2a <tcp_receive+0xeb6>
+                    pcb->ooseq = cseg;
+ 80157d8:	687b      	ldr	r3, [r7, #4]
+ 80157da:	69ba      	ldr	r2, [r7, #24]
+ 80157dc:	675a      	str	r2, [r3, #116]	; 0x74
+                    tcp_oos_insert_segment(cseg, next);
+ 80157de:	6bb9      	ldr	r1, [r7, #56]	; 0x38
+ 80157e0:	69b8      	ldr	r0, [r7, #24]
+ 80157e2:	f7ff f8c3 	bl	801496c <tcp_oos_insert_segment>
+                  }
+                  break;
+ 80157e6:	e120      	b.n	8015a2a <tcp_receive+0xeb6>
+                }
+              } else {
+                /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) &&
+                  TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/
+                if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno + 1, next->tcphdr->seqno - 1)) {
+ 80157e8:	4b22      	ldr	r3, [pc, #136]	; (8015874 <tcp_receive+0xd00>)
+ 80157ea:	681a      	ldr	r2, [r3, #0]
+ 80157ec:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 80157ee:	68db      	ldr	r3, [r3, #12]
+ 80157f0:	685b      	ldr	r3, [r3, #4]
+ 80157f2:	1ad3      	subs	r3, r2, r3
+ 80157f4:	3b01      	subs	r3, #1
+ 80157f6:	2b00      	cmp	r3, #0
+ 80157f8:	db3e      	blt.n	8015878 <tcp_receive+0xd04>
+ 80157fa:	4b1e      	ldr	r3, [pc, #120]	; (8015874 <tcp_receive+0xd00>)
+ 80157fc:	681a      	ldr	r2, [r3, #0]
+ 80157fe:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 8015800:	68db      	ldr	r3, [r3, #12]
+ 8015802:	685b      	ldr	r3, [r3, #4]
+ 8015804:	1ad3      	subs	r3, r2, r3
+ 8015806:	3301      	adds	r3, #1
+ 8015808:	2b00      	cmp	r3, #0
+ 801580a:	dc35      	bgt.n	8015878 <tcp_receive+0xd04>
+                  /* The sequence number of the incoming segment is in
+                     between the sequence numbers of the previous and
+                     the next segment on ->ooseq. We trim trim the previous
+                     segment, delete next segments that included in received segment
+                     and trim received, if needed. */
+                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
+ 801580c:	4818      	ldr	r0, [pc, #96]	; (8015870 <tcp_receive+0xcfc>)
+ 801580e:	f7fd fb5f 	bl	8012ed0 <tcp_seg_copy>
+ 8015812:	61f8      	str	r0, [r7, #28]
+                  if (cseg != NULL) {
+ 8015814:	69fb      	ldr	r3, [r7, #28]
+ 8015816:	2b00      	cmp	r3, #0
+ 8015818:	f000 8109 	beq.w	8015a2e <tcp_receive+0xeba>
+                    if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) {
+ 801581c:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 801581e:	68db      	ldr	r3, [r3, #12]
+ 8015820:	685b      	ldr	r3, [r3, #4]
+ 8015822:	6b7a      	ldr	r2, [r7, #52]	; 0x34
+ 8015824:	8912      	ldrh	r2, [r2, #8]
+ 8015826:	441a      	add	r2, r3
+ 8015828:	4b12      	ldr	r3, [pc, #72]	; (8015874 <tcp_receive+0xd00>)
+ 801582a:	681b      	ldr	r3, [r3, #0]
+ 801582c:	1ad3      	subs	r3, r2, r3
+ 801582e:	2b00      	cmp	r3, #0
+ 8015830:	dd12      	ble.n	8015858 <tcp_receive+0xce4>
+                      /* We need to trim the prev segment. */
+                      prev->len = (u16_t)(seqno - prev->tcphdr->seqno);
+ 8015832:	4b10      	ldr	r3, [pc, #64]	; (8015874 <tcp_receive+0xd00>)
+ 8015834:	681b      	ldr	r3, [r3, #0]
+ 8015836:	b29a      	uxth	r2, r3
+ 8015838:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 801583a:	68db      	ldr	r3, [r3, #12]
+ 801583c:	685b      	ldr	r3, [r3, #4]
+ 801583e:	b29b      	uxth	r3, r3
+ 8015840:	1ad3      	subs	r3, r2, r3
+ 8015842:	b29a      	uxth	r2, r3
+ 8015844:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 8015846:	811a      	strh	r2, [r3, #8]
+                      pbuf_realloc(prev->p, prev->len);
+ 8015848:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 801584a:	685a      	ldr	r2, [r3, #4]
+ 801584c:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 801584e:	891b      	ldrh	r3, [r3, #8]
+ 8015850:	4619      	mov	r1, r3
+ 8015852:	4610      	mov	r0, r2
+ 8015854:	f7fb ff1a 	bl	801168c <pbuf_realloc>
+                    }
+                    prev->next = cseg;
+ 8015858:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 801585a:	69fa      	ldr	r2, [r7, #28]
+ 801585c:	601a      	str	r2, [r3, #0]
+                    tcp_oos_insert_segment(cseg, next);
+ 801585e:	6bb9      	ldr	r1, [r7, #56]	; 0x38
+ 8015860:	69f8      	ldr	r0, [r7, #28]
+ 8015862:	f7ff f883 	bl	801496c <tcp_oos_insert_segment>
+                  }
+                  break;
+ 8015866:	e0e2      	b.n	8015a2e <tcp_receive+0xeba>
+ 8015868:	20008748 	.word	0x20008748
+ 801586c:	20008745 	.word	0x20008745
+ 8015870:	20008718 	.word	0x20008718
+ 8015874:	20008738 	.word	0x20008738
+#endif /* LWIP_TCP_SACK_OUT */
+
+              /* We don't use 'prev' below, so let's set it to current 'next'.
+                 This way even if we break the loop below, 'prev' will be pointing
+                 at the segment right in front of the newly added one. */
+              prev = next;
+ 8015878:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 801587a:	637b      	str	r3, [r7, #52]	; 0x34
+
+              /* If the "next" segment is the last segment on the
+                 ooseq queue, we add the incoming segment to the end
+                 of the list. */
+              if (next->next == NULL &&
+ 801587c:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 801587e:	681b      	ldr	r3, [r3, #0]
+ 8015880:	2b00      	cmp	r3, #0
+ 8015882:	f040 80c6 	bne.w	8015a12 <tcp_receive+0xe9e>
+                  TCP_SEQ_GT(seqno, next->tcphdr->seqno)) {
+ 8015886:	4b80      	ldr	r3, [pc, #512]	; (8015a88 <tcp_receive+0xf14>)
+ 8015888:	681a      	ldr	r2, [r3, #0]
+ 801588a:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 801588c:	68db      	ldr	r3, [r3, #12]
+ 801588e:	685b      	ldr	r3, [r3, #4]
+ 8015890:	1ad3      	subs	r3, r2, r3
+              if (next->next == NULL &&
+ 8015892:	2b00      	cmp	r3, #0
+ 8015894:	f340 80bd 	ble.w	8015a12 <tcp_receive+0xe9e>
+                if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
+ 8015898:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 801589a:	68db      	ldr	r3, [r3, #12]
+ 801589c:	899b      	ldrh	r3, [r3, #12]
+ 801589e:	b29b      	uxth	r3, r3
+ 80158a0:	4618      	mov	r0, r3
+ 80158a2:	f7fa fcc5 	bl	8010230 <lwip_htons>
+ 80158a6:	4603      	mov	r3, r0
+ 80158a8:	b2db      	uxtb	r3, r3
+ 80158aa:	f003 0301 	and.w	r3, r3, #1
+ 80158ae:	2b00      	cmp	r3, #0
+ 80158b0:	f040 80bf 	bne.w	8015a32 <tcp_receive+0xebe>
+                  /* segment "next" already contains all data */
+                  break;
+                }
+                next->next = tcp_seg_copy(&inseg);
+ 80158b4:	4875      	ldr	r0, [pc, #468]	; (8015a8c <tcp_receive+0xf18>)
+ 80158b6:	f7fd fb0b 	bl	8012ed0 <tcp_seg_copy>
+ 80158ba:	4602      	mov	r2, r0
+ 80158bc:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80158be:	601a      	str	r2, [r3, #0]
+                if (next->next != NULL) {
+ 80158c0:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80158c2:	681b      	ldr	r3, [r3, #0]
+ 80158c4:	2b00      	cmp	r3, #0
+ 80158c6:	f000 80b6 	beq.w	8015a36 <tcp_receive+0xec2>
+                  if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) {
+ 80158ca:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80158cc:	68db      	ldr	r3, [r3, #12]
+ 80158ce:	685b      	ldr	r3, [r3, #4]
+ 80158d0:	6bba      	ldr	r2, [r7, #56]	; 0x38
+ 80158d2:	8912      	ldrh	r2, [r2, #8]
+ 80158d4:	441a      	add	r2, r3
+ 80158d6:	4b6c      	ldr	r3, [pc, #432]	; (8015a88 <tcp_receive+0xf14>)
+ 80158d8:	681b      	ldr	r3, [r3, #0]
+ 80158da:	1ad3      	subs	r3, r2, r3
+ 80158dc:	2b00      	cmp	r3, #0
+ 80158de:	dd12      	ble.n	8015906 <tcp_receive+0xd92>
+                    /* We need to trim the last segment. */
+                    next->len = (u16_t)(seqno - next->tcphdr->seqno);
+ 80158e0:	4b69      	ldr	r3, [pc, #420]	; (8015a88 <tcp_receive+0xf14>)
+ 80158e2:	681b      	ldr	r3, [r3, #0]
+ 80158e4:	b29a      	uxth	r2, r3
+ 80158e6:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80158e8:	68db      	ldr	r3, [r3, #12]
+ 80158ea:	685b      	ldr	r3, [r3, #4]
+ 80158ec:	b29b      	uxth	r3, r3
+ 80158ee:	1ad3      	subs	r3, r2, r3
+ 80158f0:	b29a      	uxth	r2, r3
+ 80158f2:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80158f4:	811a      	strh	r2, [r3, #8]
+                    pbuf_realloc(next->p, next->len);
+ 80158f6:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80158f8:	685a      	ldr	r2, [r3, #4]
+ 80158fa:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80158fc:	891b      	ldrh	r3, [r3, #8]
+ 80158fe:	4619      	mov	r1, r3
+ 8015900:	4610      	mov	r0, r2
+ 8015902:	f7fb fec3 	bl	801168c <pbuf_realloc>
+                  }
+                  /* check if the remote side overruns our receive window */
+                  if (TCP_SEQ_GT((u32_t)tcplen + seqno, pcb->rcv_nxt + (u32_t)pcb->rcv_wnd)) {
+ 8015906:	4b62      	ldr	r3, [pc, #392]	; (8015a90 <tcp_receive+0xf1c>)
+ 8015908:	881b      	ldrh	r3, [r3, #0]
+ 801590a:	461a      	mov	r2, r3
+ 801590c:	4b5e      	ldr	r3, [pc, #376]	; (8015a88 <tcp_receive+0xf14>)
+ 801590e:	681b      	ldr	r3, [r3, #0]
+ 8015910:	441a      	add	r2, r3
+ 8015912:	687b      	ldr	r3, [r7, #4]
+ 8015914:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8015916:	6879      	ldr	r1, [r7, #4]
+ 8015918:	8d09      	ldrh	r1, [r1, #40]	; 0x28
+ 801591a:	440b      	add	r3, r1
+ 801591c:	1ad3      	subs	r3, r2, r3
+ 801591e:	2b00      	cmp	r3, #0
+ 8015920:	f340 8089 	ble.w	8015a36 <tcp_receive+0xec2>
+                    LWIP_DEBUGF(TCP_INPUT_DEBUG,
+                                ("tcp_receive: other end overran receive window"
+                                 "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
+                                 seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
+                    if (TCPH_FLAGS(next->next->tcphdr) & TCP_FIN) {
+ 8015924:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 8015926:	681b      	ldr	r3, [r3, #0]
+ 8015928:	68db      	ldr	r3, [r3, #12]
+ 801592a:	899b      	ldrh	r3, [r3, #12]
+ 801592c:	b29b      	uxth	r3, r3
+ 801592e:	4618      	mov	r0, r3
+ 8015930:	f7fa fc7e 	bl	8010230 <lwip_htons>
+ 8015934:	4603      	mov	r3, r0
+ 8015936:	b2db      	uxtb	r3, r3
+ 8015938:	f003 0301 	and.w	r3, r3, #1
+ 801593c:	2b00      	cmp	r3, #0
+ 801593e:	d022      	beq.n	8015986 <tcp_receive+0xe12>
+                      /* Must remove the FIN from the header as we're trimming
+                       * that byte of sequence-space from the packet */
+                      TCPH_FLAGS_SET(next->next->tcphdr, TCPH_FLAGS(next->next->tcphdr) & ~TCP_FIN);
+ 8015940:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 8015942:	681b      	ldr	r3, [r3, #0]
+ 8015944:	68db      	ldr	r3, [r3, #12]
+ 8015946:	899b      	ldrh	r3, [r3, #12]
+ 8015948:	b29b      	uxth	r3, r3
+ 801594a:	b21b      	sxth	r3, r3
+ 801594c:	f423 537c 	bic.w	r3, r3, #16128	; 0x3f00
+ 8015950:	b21c      	sxth	r4, r3
+ 8015952:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 8015954:	681b      	ldr	r3, [r3, #0]
+ 8015956:	68db      	ldr	r3, [r3, #12]
+ 8015958:	899b      	ldrh	r3, [r3, #12]
+ 801595a:	b29b      	uxth	r3, r3
+ 801595c:	4618      	mov	r0, r3
+ 801595e:	f7fa fc67 	bl	8010230 <lwip_htons>
+ 8015962:	4603      	mov	r3, r0
+ 8015964:	b2db      	uxtb	r3, r3
+ 8015966:	b29b      	uxth	r3, r3
+ 8015968:	f003 033e 	and.w	r3, r3, #62	; 0x3e
+ 801596c:	b29b      	uxth	r3, r3
+ 801596e:	4618      	mov	r0, r3
+ 8015970:	f7fa fc5e 	bl	8010230 <lwip_htons>
+ 8015974:	4603      	mov	r3, r0
+ 8015976:	b21b      	sxth	r3, r3
+ 8015978:	4323      	orrs	r3, r4
+ 801597a:	b21a      	sxth	r2, r3
+ 801597c:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 801597e:	681b      	ldr	r3, [r3, #0]
+ 8015980:	68db      	ldr	r3, [r3, #12]
+ 8015982:	b292      	uxth	r2, r2
+ 8015984:	819a      	strh	r2, [r3, #12]
+                    }
+                    /* Adjust length of segment to fit in the window. */
+                    next->next->len = (u16_t)(pcb->rcv_nxt + pcb->rcv_wnd - seqno);
+ 8015986:	687b      	ldr	r3, [r7, #4]
+ 8015988:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 801598a:	b29a      	uxth	r2, r3
+ 801598c:	687b      	ldr	r3, [r7, #4]
+ 801598e:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8015990:	4413      	add	r3, r2
+ 8015992:	b299      	uxth	r1, r3
+ 8015994:	4b3c      	ldr	r3, [pc, #240]	; (8015a88 <tcp_receive+0xf14>)
+ 8015996:	681b      	ldr	r3, [r3, #0]
+ 8015998:	b29a      	uxth	r2, r3
+ 801599a:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 801599c:	681b      	ldr	r3, [r3, #0]
+ 801599e:	1a8a      	subs	r2, r1, r2
+ 80159a0:	b292      	uxth	r2, r2
+ 80159a2:	811a      	strh	r2, [r3, #8]
+                    pbuf_realloc(next->next->p, next->next->len);
+ 80159a4:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80159a6:	681b      	ldr	r3, [r3, #0]
+ 80159a8:	685a      	ldr	r2, [r3, #4]
+ 80159aa:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80159ac:	681b      	ldr	r3, [r3, #0]
+ 80159ae:	891b      	ldrh	r3, [r3, #8]
+ 80159b0:	4619      	mov	r1, r3
+ 80159b2:	4610      	mov	r0, r2
+ 80159b4:	f7fb fe6a 	bl	801168c <pbuf_realloc>
+                    tcplen = TCP_TCPLEN(next->next);
+ 80159b8:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80159ba:	681b      	ldr	r3, [r3, #0]
+ 80159bc:	891c      	ldrh	r4, [r3, #8]
+ 80159be:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 80159c0:	681b      	ldr	r3, [r3, #0]
+ 80159c2:	68db      	ldr	r3, [r3, #12]
+ 80159c4:	899b      	ldrh	r3, [r3, #12]
+ 80159c6:	b29b      	uxth	r3, r3
+ 80159c8:	4618      	mov	r0, r3
+ 80159ca:	f7fa fc31 	bl	8010230 <lwip_htons>
+ 80159ce:	4603      	mov	r3, r0
+ 80159d0:	b2db      	uxtb	r3, r3
+ 80159d2:	f003 0303 	and.w	r3, r3, #3
+ 80159d6:	2b00      	cmp	r3, #0
+ 80159d8:	d001      	beq.n	80159de <tcp_receive+0xe6a>
+ 80159da:	2301      	movs	r3, #1
+ 80159dc:	e000      	b.n	80159e0 <tcp_receive+0xe6c>
+ 80159de:	2300      	movs	r3, #0
+ 80159e0:	4423      	add	r3, r4
+ 80159e2:	b29a      	uxth	r2, r3
+ 80159e4:	4b2a      	ldr	r3, [pc, #168]	; (8015a90 <tcp_receive+0xf1c>)
+ 80159e6:	801a      	strh	r2, [r3, #0]
+                    LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
+ 80159e8:	4b29      	ldr	r3, [pc, #164]	; (8015a90 <tcp_receive+0xf1c>)
+ 80159ea:	881b      	ldrh	r3, [r3, #0]
+ 80159ec:	461a      	mov	r2, r3
+ 80159ee:	4b26      	ldr	r3, [pc, #152]	; (8015a88 <tcp_receive+0xf14>)
+ 80159f0:	681b      	ldr	r3, [r3, #0]
+ 80159f2:	441a      	add	r2, r3
+ 80159f4:	687b      	ldr	r3, [r7, #4]
+ 80159f6:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80159f8:	6879      	ldr	r1, [r7, #4]
+ 80159fa:	8d09      	ldrh	r1, [r1, #40]	; 0x28
+ 80159fc:	440b      	add	r3, r1
+ 80159fe:	429a      	cmp	r2, r3
+ 8015a00:	d019      	beq.n	8015a36 <tcp_receive+0xec2>
+ 8015a02:	4b24      	ldr	r3, [pc, #144]	; (8015a94 <tcp_receive+0xf20>)
+ 8015a04:	f240 62f9 	movw	r2, #1785	; 0x6f9
+ 8015a08:	4923      	ldr	r1, [pc, #140]	; (8015a98 <tcp_receive+0xf24>)
+ 8015a0a:	4824      	ldr	r0, [pc, #144]	; (8015a9c <tcp_receive+0xf28>)
+ 8015a0c:	f006 fcf4 	bl	801c3f8 <iprintf>
+                                (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd));
+                  }
+                }
+                break;
+ 8015a10:	e011      	b.n	8015a36 <tcp_receive+0xec2>
+          for (next = pcb->ooseq; next != NULL; next = next->next) {
+ 8015a12:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 8015a14:	681b      	ldr	r3, [r3, #0]
+ 8015a16:	63bb      	str	r3, [r7, #56]	; 0x38
+ 8015a18:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 8015a1a:	2b00      	cmp	r3, #0
+ 8015a1c:	f47f aea4 	bne.w	8015768 <tcp_receive+0xbf4>
+ 8015a20:	e00a      	b.n	8015a38 <tcp_receive+0xec4>
+                break;
+ 8015a22:	bf00      	nop
+ 8015a24:	e008      	b.n	8015a38 <tcp_receive+0xec4>
+                break;
+ 8015a26:	bf00      	nop
+ 8015a28:	e006      	b.n	8015a38 <tcp_receive+0xec4>
+                  break;
+ 8015a2a:	bf00      	nop
+ 8015a2c:	e004      	b.n	8015a38 <tcp_receive+0xec4>
+                  break;
+ 8015a2e:	bf00      	nop
+ 8015a30:	e002      	b.n	8015a38 <tcp_receive+0xec4>
+                  break;
+ 8015a32:	bf00      	nop
+ 8015a34:	e000      	b.n	8015a38 <tcp_receive+0xec4>
+                break;
+ 8015a36:	bf00      	nop
+#endif /* TCP_OOSEQ_BYTES_LIMIT || TCP_OOSEQ_PBUFS_LIMIT */
+#endif /* TCP_QUEUE_OOSEQ */
+
+        /* We send the ACK packet after we've (potentially) dealt with SACKs,
+           so they can be included in the acknowledgment. */
+        tcp_send_empty_ack(pcb);
+ 8015a38:	6878      	ldr	r0, [r7, #4]
+ 8015a3a:	f001 fa43 	bl	8016ec4 <tcp_send_empty_ack>
+      if (pcb->rcv_nxt == seqno) {
+ 8015a3e:	e003      	b.n	8015a48 <tcp_receive+0xed4>
+      }
+    } else {
+      /* The incoming segment is not within the window. */
+      tcp_send_empty_ack(pcb);
+ 8015a40:	6878      	ldr	r0, [r7, #4]
+ 8015a42:	f001 fa3f 	bl	8016ec4 <tcp_send_empty_ack>
+    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
+ 8015a46:	e01a      	b.n	8015a7e <tcp_receive+0xf0a>
+ 8015a48:	e019      	b.n	8015a7e <tcp_receive+0xf0a>
+    }
+  } else {
+    /* Segments with length 0 is taken care of here. Segments that
+       fall out of the window are ACKed. */
+    if (!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
+ 8015a4a:	4b0f      	ldr	r3, [pc, #60]	; (8015a88 <tcp_receive+0xf14>)
+ 8015a4c:	681a      	ldr	r2, [r3, #0]
+ 8015a4e:	687b      	ldr	r3, [r7, #4]
+ 8015a50:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8015a52:	1ad3      	subs	r3, r2, r3
+ 8015a54:	2b00      	cmp	r3, #0
+ 8015a56:	db0a      	blt.n	8015a6e <tcp_receive+0xefa>
+ 8015a58:	4b0b      	ldr	r3, [pc, #44]	; (8015a88 <tcp_receive+0xf14>)
+ 8015a5a:	681a      	ldr	r2, [r3, #0]
+ 8015a5c:	687b      	ldr	r3, [r7, #4]
+ 8015a5e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8015a60:	6879      	ldr	r1, [r7, #4]
+ 8015a62:	8d09      	ldrh	r1, [r1, #40]	; 0x28
+ 8015a64:	440b      	add	r3, r1
+ 8015a66:	1ad3      	subs	r3, r2, r3
+ 8015a68:	3301      	adds	r3, #1
+ 8015a6a:	2b00      	cmp	r3, #0
+ 8015a6c:	dd07      	ble.n	8015a7e <tcp_receive+0xf0a>
+      tcp_ack_now(pcb);
+ 8015a6e:	687b      	ldr	r3, [r7, #4]
+ 8015a70:	8b5b      	ldrh	r3, [r3, #26]
+ 8015a72:	f043 0302 	orr.w	r3, r3, #2
+ 8015a76:	b29a      	uxth	r2, r3
+ 8015a78:	687b      	ldr	r3, [r7, #4]
+ 8015a7a:	835a      	strh	r2, [r3, #26]
+    }
+  }
+}
+ 8015a7c:	e7ff      	b.n	8015a7e <tcp_receive+0xf0a>
+ 8015a7e:	bf00      	nop
+ 8015a80:	3750      	adds	r7, #80	; 0x50
+ 8015a82:	46bd      	mov	sp, r7
+ 8015a84:	bdb0      	pop	{r4, r5, r7, pc}
+ 8015a86:	bf00      	nop
+ 8015a88:	20008738 	.word	0x20008738
+ 8015a8c:	20008718 	.word	0x20008718
+ 8015a90:	20008742 	.word	0x20008742
+ 8015a94:	0801e9e0 	.word	0x0801e9e0
+ 8015a98:	0801ed88 	.word	0x0801ed88
+ 8015a9c:	0801ea2c 	.word	0x0801ea2c
+
+08015aa0 <tcp_get_next_optbyte>:
+
+static u8_t
+tcp_get_next_optbyte(void)
+{
+ 8015aa0:	b480      	push	{r7}
+ 8015aa2:	b083      	sub	sp, #12
+ 8015aa4:	af00      	add	r7, sp, #0
+  u16_t optidx = tcp_optidx++;
+ 8015aa6:	4b15      	ldr	r3, [pc, #84]	; (8015afc <tcp_get_next_optbyte+0x5c>)
+ 8015aa8:	881b      	ldrh	r3, [r3, #0]
+ 8015aaa:	1c5a      	adds	r2, r3, #1
+ 8015aac:	b291      	uxth	r1, r2
+ 8015aae:	4a13      	ldr	r2, [pc, #76]	; (8015afc <tcp_get_next_optbyte+0x5c>)
+ 8015ab0:	8011      	strh	r1, [r2, #0]
+ 8015ab2:	80fb      	strh	r3, [r7, #6]
+  if ((tcphdr_opt2 == NULL) || (optidx < tcphdr_opt1len)) {
+ 8015ab4:	4b12      	ldr	r3, [pc, #72]	; (8015b00 <tcp_get_next_optbyte+0x60>)
+ 8015ab6:	681b      	ldr	r3, [r3, #0]
+ 8015ab8:	2b00      	cmp	r3, #0
+ 8015aba:	d004      	beq.n	8015ac6 <tcp_get_next_optbyte+0x26>
+ 8015abc:	4b11      	ldr	r3, [pc, #68]	; (8015b04 <tcp_get_next_optbyte+0x64>)
+ 8015abe:	881b      	ldrh	r3, [r3, #0]
+ 8015ac0:	88fa      	ldrh	r2, [r7, #6]
+ 8015ac2:	429a      	cmp	r2, r3
+ 8015ac4:	d208      	bcs.n	8015ad8 <tcp_get_next_optbyte+0x38>
+    u8_t *opts = (u8_t *)tcphdr + TCP_HLEN;
+ 8015ac6:	4b10      	ldr	r3, [pc, #64]	; (8015b08 <tcp_get_next_optbyte+0x68>)
+ 8015ac8:	681b      	ldr	r3, [r3, #0]
+ 8015aca:	3314      	adds	r3, #20
+ 8015acc:	603b      	str	r3, [r7, #0]
+    return opts[optidx];
+ 8015ace:	88fb      	ldrh	r3, [r7, #6]
+ 8015ad0:	683a      	ldr	r2, [r7, #0]
+ 8015ad2:	4413      	add	r3, r2
+ 8015ad4:	781b      	ldrb	r3, [r3, #0]
+ 8015ad6:	e00b      	b.n	8015af0 <tcp_get_next_optbyte+0x50>
+  } else {
+    u8_t idx = (u8_t)(optidx - tcphdr_opt1len);
+ 8015ad8:	88fb      	ldrh	r3, [r7, #6]
+ 8015ada:	b2da      	uxtb	r2, r3
+ 8015adc:	4b09      	ldr	r3, [pc, #36]	; (8015b04 <tcp_get_next_optbyte+0x64>)
+ 8015ade:	881b      	ldrh	r3, [r3, #0]
+ 8015ae0:	b2db      	uxtb	r3, r3
+ 8015ae2:	1ad3      	subs	r3, r2, r3
+ 8015ae4:	717b      	strb	r3, [r7, #5]
+    return tcphdr_opt2[idx];
+ 8015ae6:	4b06      	ldr	r3, [pc, #24]	; (8015b00 <tcp_get_next_optbyte+0x60>)
+ 8015ae8:	681a      	ldr	r2, [r3, #0]
+ 8015aea:	797b      	ldrb	r3, [r7, #5]
+ 8015aec:	4413      	add	r3, r2
+ 8015aee:	781b      	ldrb	r3, [r3, #0]
+  }
+}
+ 8015af0:	4618      	mov	r0, r3
+ 8015af2:	370c      	adds	r7, #12
+ 8015af4:	46bd      	mov	sp, r7
+ 8015af6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8015afa:	4770      	bx	lr
+ 8015afc:	20008734 	.word	0x20008734
+ 8015b00:	20008730 	.word	0x20008730
+ 8015b04:	2000872e 	.word	0x2000872e
+ 8015b08:	20008728 	.word	0x20008728
+
+08015b0c <tcp_parseopt>:
+ *
+ * @param pcb the tcp_pcb for which a segment arrived
+ */
+static void
+tcp_parseopt(struct tcp_pcb *pcb)
+{
+ 8015b0c:	b580      	push	{r7, lr}
+ 8015b0e:	b084      	sub	sp, #16
+ 8015b10:	af00      	add	r7, sp, #0
+ 8015b12:	6078      	str	r0, [r7, #4]
+  u16_t mss;
+#if LWIP_TCP_TIMESTAMPS
+  u32_t tsval;
+#endif
+
+  LWIP_ASSERT("tcp_parseopt: invalid pcb", pcb != NULL);
+ 8015b14:	687b      	ldr	r3, [r7, #4]
+ 8015b16:	2b00      	cmp	r3, #0
+ 8015b18:	d106      	bne.n	8015b28 <tcp_parseopt+0x1c>
+ 8015b1a:	4b31      	ldr	r3, [pc, #196]	; (8015be0 <tcp_parseopt+0xd4>)
+ 8015b1c:	f240 727d 	movw	r2, #1917	; 0x77d
+ 8015b20:	4930      	ldr	r1, [pc, #192]	; (8015be4 <tcp_parseopt+0xd8>)
+ 8015b22:	4831      	ldr	r0, [pc, #196]	; (8015be8 <tcp_parseopt+0xdc>)
+ 8015b24:	f006 fc68 	bl	801c3f8 <iprintf>
+
+  /* Parse the TCP MSS option, if present. */
+  if (tcphdr_optlen != 0) {
+ 8015b28:	4b30      	ldr	r3, [pc, #192]	; (8015bec <tcp_parseopt+0xe0>)
+ 8015b2a:	881b      	ldrh	r3, [r3, #0]
+ 8015b2c:	2b00      	cmp	r3, #0
+ 8015b2e:	d053      	beq.n	8015bd8 <tcp_parseopt+0xcc>
+    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
+ 8015b30:	4b2f      	ldr	r3, [pc, #188]	; (8015bf0 <tcp_parseopt+0xe4>)
+ 8015b32:	2200      	movs	r2, #0
+ 8015b34:	801a      	strh	r2, [r3, #0]
+ 8015b36:	e043      	b.n	8015bc0 <tcp_parseopt+0xb4>
+      u8_t opt = tcp_get_next_optbyte();
+ 8015b38:	f7ff ffb2 	bl	8015aa0 <tcp_get_next_optbyte>
+ 8015b3c:	4603      	mov	r3, r0
+ 8015b3e:	73fb      	strb	r3, [r7, #15]
+      switch (opt) {
+ 8015b40:	7bfb      	ldrb	r3, [r7, #15]
+ 8015b42:	2b01      	cmp	r3, #1
+ 8015b44:	d03c      	beq.n	8015bc0 <tcp_parseopt+0xb4>
+ 8015b46:	2b02      	cmp	r3, #2
+ 8015b48:	d002      	beq.n	8015b50 <tcp_parseopt+0x44>
+ 8015b4a:	2b00      	cmp	r3, #0
+ 8015b4c:	d03f      	beq.n	8015bce <tcp_parseopt+0xc2>
+ 8015b4e:	e026      	b.n	8015b9e <tcp_parseopt+0x92>
+          /* NOP option. */
+          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n"));
+          break;
+        case LWIP_TCP_OPT_MSS:
+          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n"));
+          if (tcp_get_next_optbyte() != LWIP_TCP_OPT_LEN_MSS || (tcp_optidx - 2 + LWIP_TCP_OPT_LEN_MSS) > tcphdr_optlen) {
+ 8015b50:	f7ff ffa6 	bl	8015aa0 <tcp_get_next_optbyte>
+ 8015b54:	4603      	mov	r3, r0
+ 8015b56:	2b04      	cmp	r3, #4
+ 8015b58:	d13b      	bne.n	8015bd2 <tcp_parseopt+0xc6>
+ 8015b5a:	4b25      	ldr	r3, [pc, #148]	; (8015bf0 <tcp_parseopt+0xe4>)
+ 8015b5c:	881b      	ldrh	r3, [r3, #0]
+ 8015b5e:	3302      	adds	r3, #2
+ 8015b60:	4a22      	ldr	r2, [pc, #136]	; (8015bec <tcp_parseopt+0xe0>)
+ 8015b62:	8812      	ldrh	r2, [r2, #0]
+ 8015b64:	4293      	cmp	r3, r2
+ 8015b66:	dc34      	bgt.n	8015bd2 <tcp_parseopt+0xc6>
+            /* Bad length */
+            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n"));
+            return;
+          }
+          /* An MSS option with the right option length. */
+          mss = (u16_t)(tcp_get_next_optbyte() << 8);
+ 8015b68:	f7ff ff9a 	bl	8015aa0 <tcp_get_next_optbyte>
+ 8015b6c:	4603      	mov	r3, r0
+ 8015b6e:	b29b      	uxth	r3, r3
+ 8015b70:	021b      	lsls	r3, r3, #8
+ 8015b72:	81bb      	strh	r3, [r7, #12]
+          mss |= tcp_get_next_optbyte();
+ 8015b74:	f7ff ff94 	bl	8015aa0 <tcp_get_next_optbyte>
+ 8015b78:	4603      	mov	r3, r0
+ 8015b7a:	b29a      	uxth	r2, r3
+ 8015b7c:	89bb      	ldrh	r3, [r7, #12]
+ 8015b7e:	4313      	orrs	r3, r2
+ 8015b80:	81bb      	strh	r3, [r7, #12]
+          /* Limit the mss to the configured TCP_MSS and prevent division by zero */
+          pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss;
+ 8015b82:	89bb      	ldrh	r3, [r7, #12]
+ 8015b84:	f5b3 7f06 	cmp.w	r3, #536	; 0x218
+ 8015b88:	d804      	bhi.n	8015b94 <tcp_parseopt+0x88>
+ 8015b8a:	89bb      	ldrh	r3, [r7, #12]
+ 8015b8c:	2b00      	cmp	r3, #0
+ 8015b8e:	d001      	beq.n	8015b94 <tcp_parseopt+0x88>
+ 8015b90:	89ba      	ldrh	r2, [r7, #12]
+ 8015b92:	e001      	b.n	8015b98 <tcp_parseopt+0x8c>
+ 8015b94:	f44f 7206 	mov.w	r2, #536	; 0x218
+ 8015b98:	687b      	ldr	r3, [r7, #4]
+ 8015b9a:	865a      	strh	r2, [r3, #50]	; 0x32
+          break;
+ 8015b9c:	e010      	b.n	8015bc0 <tcp_parseopt+0xb4>
+          }
+          break;
+#endif /* LWIP_TCP_SACK_OUT */
+        default:
+          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n"));
+          data = tcp_get_next_optbyte();
+ 8015b9e:	f7ff ff7f 	bl	8015aa0 <tcp_get_next_optbyte>
+ 8015ba2:	4603      	mov	r3, r0
+ 8015ba4:	72fb      	strb	r3, [r7, #11]
+          if (data < 2) {
+ 8015ba6:	7afb      	ldrb	r3, [r7, #11]
+ 8015ba8:	2b01      	cmp	r3, #1
+ 8015baa:	d914      	bls.n	8015bd6 <tcp_parseopt+0xca>
+               and we don't process them further. */
+            return;
+          }
+          /* All other options have a length field, so that we easily
+             can skip past them. */
+          tcp_optidx += data - 2;
+ 8015bac:	7afb      	ldrb	r3, [r7, #11]
+ 8015bae:	b29a      	uxth	r2, r3
+ 8015bb0:	4b0f      	ldr	r3, [pc, #60]	; (8015bf0 <tcp_parseopt+0xe4>)
+ 8015bb2:	881b      	ldrh	r3, [r3, #0]
+ 8015bb4:	4413      	add	r3, r2
+ 8015bb6:	b29b      	uxth	r3, r3
+ 8015bb8:	3b02      	subs	r3, #2
+ 8015bba:	b29a      	uxth	r2, r3
+ 8015bbc:	4b0c      	ldr	r3, [pc, #48]	; (8015bf0 <tcp_parseopt+0xe4>)
+ 8015bbe:	801a      	strh	r2, [r3, #0]
+    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
+ 8015bc0:	4b0b      	ldr	r3, [pc, #44]	; (8015bf0 <tcp_parseopt+0xe4>)
+ 8015bc2:	881a      	ldrh	r2, [r3, #0]
+ 8015bc4:	4b09      	ldr	r3, [pc, #36]	; (8015bec <tcp_parseopt+0xe0>)
+ 8015bc6:	881b      	ldrh	r3, [r3, #0]
+ 8015bc8:	429a      	cmp	r2, r3
+ 8015bca:	d3b5      	bcc.n	8015b38 <tcp_parseopt+0x2c>
+ 8015bcc:	e004      	b.n	8015bd8 <tcp_parseopt+0xcc>
+          return;
+ 8015bce:	bf00      	nop
+ 8015bd0:	e002      	b.n	8015bd8 <tcp_parseopt+0xcc>
+            return;
+ 8015bd2:	bf00      	nop
+ 8015bd4:	e000      	b.n	8015bd8 <tcp_parseopt+0xcc>
+            return;
+ 8015bd6:	bf00      	nop
+      }
+    }
+  }
+}
+ 8015bd8:	3710      	adds	r7, #16
+ 8015bda:	46bd      	mov	sp, r7
+ 8015bdc:	bd80      	pop	{r7, pc}
+ 8015bde:	bf00      	nop
+ 8015be0:	0801e9e0 	.word	0x0801e9e0
+ 8015be4:	0801ee44 	.word	0x0801ee44
+ 8015be8:	0801ea2c 	.word	0x0801ea2c
+ 8015bec:	2000872c 	.word	0x2000872c
+ 8015bf0:	20008734 	.word	0x20008734
+
+08015bf4 <tcp_trigger_input_pcb_close>:
+
+void
+tcp_trigger_input_pcb_close(void)
+{
+ 8015bf4:	b480      	push	{r7}
+ 8015bf6:	af00      	add	r7, sp, #0
+  recv_flags |= TF_CLOSED;
+ 8015bf8:	4b05      	ldr	r3, [pc, #20]	; (8015c10 <tcp_trigger_input_pcb_close+0x1c>)
+ 8015bfa:	781b      	ldrb	r3, [r3, #0]
+ 8015bfc:	f043 0310 	orr.w	r3, r3, #16
+ 8015c00:	b2da      	uxtb	r2, r3
+ 8015c02:	4b03      	ldr	r3, [pc, #12]	; (8015c10 <tcp_trigger_input_pcb_close+0x1c>)
+ 8015c04:	701a      	strb	r2, [r3, #0]
+}
+ 8015c06:	bf00      	nop
+ 8015c08:	46bd      	mov	sp, r7
+ 8015c0a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8015c0e:	4770      	bx	lr
+ 8015c10:	20008745 	.word	0x20008745
+
+08015c14 <tcp_route>:
+static err_t tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif);
+
+/* tcp_route: common code that returns a fixed bound netif or calls ip_route */
+static struct netif *
+tcp_route(const struct tcp_pcb *pcb, const ip_addr_t *src, const ip_addr_t *dst)
+{
+ 8015c14:	b580      	push	{r7, lr}
+ 8015c16:	b084      	sub	sp, #16
+ 8015c18:	af00      	add	r7, sp, #0
+ 8015c1a:	60f8      	str	r0, [r7, #12]
+ 8015c1c:	60b9      	str	r1, [r7, #8]
+ 8015c1e:	607a      	str	r2, [r7, #4]
+  LWIP_UNUSED_ARG(src); /* in case IPv4-only and source-based routing is disabled */
+
+  if ((pcb != NULL) && (pcb->netif_idx != NETIF_NO_INDEX)) {
+ 8015c20:	68fb      	ldr	r3, [r7, #12]
+ 8015c22:	2b00      	cmp	r3, #0
+ 8015c24:	d00a      	beq.n	8015c3c <tcp_route+0x28>
+ 8015c26:	68fb      	ldr	r3, [r7, #12]
+ 8015c28:	7a1b      	ldrb	r3, [r3, #8]
+ 8015c2a:	2b00      	cmp	r3, #0
+ 8015c2c:	d006      	beq.n	8015c3c <tcp_route+0x28>
+    return netif_get_by_index(pcb->netif_idx);
+ 8015c2e:	68fb      	ldr	r3, [r7, #12]
+ 8015c30:	7a1b      	ldrb	r3, [r3, #8]
+ 8015c32:	4618      	mov	r0, r3
+ 8015c34:	f7fb fb26 	bl	8011284 <netif_get_by_index>
+ 8015c38:	4603      	mov	r3, r0
+ 8015c3a:	e003      	b.n	8015c44 <tcp_route+0x30>
+  } else {
+    return ip_route(src, dst);
+ 8015c3c:	6878      	ldr	r0, [r7, #4]
+ 8015c3e:	f005 f867 	bl	801ad10 <ip4_route>
+ 8015c42:	4603      	mov	r3, r0
+  }
+}
+ 8015c44:	4618      	mov	r0, r3
+ 8015c46:	3710      	adds	r7, #16
+ 8015c48:	46bd      	mov	sp, r7
+ 8015c4a:	bd80      	pop	{r7, pc}
+
+08015c4c <tcp_create_segment>:
+ * The TCP header is filled in except ackno and wnd.
+ * p is freed on failure.
+ */
+static struct tcp_seg *
+tcp_create_segment(const struct tcp_pcb *pcb, struct pbuf *p, u8_t hdrflags, u32_t seqno, u8_t optflags)
+{
+ 8015c4c:	b590      	push	{r4, r7, lr}
+ 8015c4e:	b087      	sub	sp, #28
+ 8015c50:	af00      	add	r7, sp, #0
+ 8015c52:	60f8      	str	r0, [r7, #12]
+ 8015c54:	60b9      	str	r1, [r7, #8]
+ 8015c56:	603b      	str	r3, [r7, #0]
+ 8015c58:	4613      	mov	r3, r2
+ 8015c5a:	71fb      	strb	r3, [r7, #7]
+  struct tcp_seg *seg;
+  u8_t optlen;
+
+  LWIP_ASSERT("tcp_create_segment: invalid pcb", pcb != NULL);
+ 8015c5c:	68fb      	ldr	r3, [r7, #12]
+ 8015c5e:	2b00      	cmp	r3, #0
+ 8015c60:	d105      	bne.n	8015c6e <tcp_create_segment+0x22>
+ 8015c62:	4b44      	ldr	r3, [pc, #272]	; (8015d74 <tcp_create_segment+0x128>)
+ 8015c64:	22a3      	movs	r2, #163	; 0xa3
+ 8015c66:	4944      	ldr	r1, [pc, #272]	; (8015d78 <tcp_create_segment+0x12c>)
+ 8015c68:	4844      	ldr	r0, [pc, #272]	; (8015d7c <tcp_create_segment+0x130>)
+ 8015c6a:	f006 fbc5 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("tcp_create_segment: invalid pbuf", p != NULL);
+ 8015c6e:	68bb      	ldr	r3, [r7, #8]
+ 8015c70:	2b00      	cmp	r3, #0
+ 8015c72:	d105      	bne.n	8015c80 <tcp_create_segment+0x34>
+ 8015c74:	4b3f      	ldr	r3, [pc, #252]	; (8015d74 <tcp_create_segment+0x128>)
+ 8015c76:	22a4      	movs	r2, #164	; 0xa4
+ 8015c78:	4941      	ldr	r1, [pc, #260]	; (8015d80 <tcp_create_segment+0x134>)
+ 8015c7a:	4840      	ldr	r0, [pc, #256]	; (8015d7c <tcp_create_segment+0x130>)
+ 8015c7c:	f006 fbbc 	bl	801c3f8 <iprintf>
+
+  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
+ 8015c80:	f897 3028 	ldrb.w	r3, [r7, #40]	; 0x28
+ 8015c84:	009b      	lsls	r3, r3, #2
+ 8015c86:	b2db      	uxtb	r3, r3
+ 8015c88:	f003 0304 	and.w	r3, r3, #4
+ 8015c8c:	75fb      	strb	r3, [r7, #23]
+
+  if ((seg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG)) == NULL) {
+ 8015c8e:	2003      	movs	r0, #3
+ 8015c90:	f7fa ff84 	bl	8010b9c <memp_malloc>
+ 8015c94:	6138      	str	r0, [r7, #16]
+ 8015c96:	693b      	ldr	r3, [r7, #16]
+ 8015c98:	2b00      	cmp	r3, #0
+ 8015c9a:	d104      	bne.n	8015ca6 <tcp_create_segment+0x5a>
+    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no memory.\n"));
+    pbuf_free(p);
+ 8015c9c:	68b8      	ldr	r0, [r7, #8]
+ 8015c9e:	f7fb fe7b 	bl	8011998 <pbuf_free>
+    return NULL;
+ 8015ca2:	2300      	movs	r3, #0
+ 8015ca4:	e061      	b.n	8015d6a <tcp_create_segment+0x11e>
+  }
+  seg->flags = optflags;
+ 8015ca6:	693b      	ldr	r3, [r7, #16]
+ 8015ca8:	f897 2028 	ldrb.w	r2, [r7, #40]	; 0x28
+ 8015cac:	729a      	strb	r2, [r3, #10]
+  seg->next = NULL;
+ 8015cae:	693b      	ldr	r3, [r7, #16]
+ 8015cb0:	2200      	movs	r2, #0
+ 8015cb2:	601a      	str	r2, [r3, #0]
+  seg->p = p;
+ 8015cb4:	693b      	ldr	r3, [r7, #16]
+ 8015cb6:	68ba      	ldr	r2, [r7, #8]
+ 8015cb8:	605a      	str	r2, [r3, #4]
+  LWIP_ASSERT("p->tot_len >= optlen", p->tot_len >= optlen);
+ 8015cba:	68bb      	ldr	r3, [r7, #8]
+ 8015cbc:	891a      	ldrh	r2, [r3, #8]
+ 8015cbe:	7dfb      	ldrb	r3, [r7, #23]
+ 8015cc0:	b29b      	uxth	r3, r3
+ 8015cc2:	429a      	cmp	r2, r3
+ 8015cc4:	d205      	bcs.n	8015cd2 <tcp_create_segment+0x86>
+ 8015cc6:	4b2b      	ldr	r3, [pc, #172]	; (8015d74 <tcp_create_segment+0x128>)
+ 8015cc8:	22b0      	movs	r2, #176	; 0xb0
+ 8015cca:	492e      	ldr	r1, [pc, #184]	; (8015d84 <tcp_create_segment+0x138>)
+ 8015ccc:	482b      	ldr	r0, [pc, #172]	; (8015d7c <tcp_create_segment+0x130>)
+ 8015cce:	f006 fb93 	bl	801c3f8 <iprintf>
+  seg->len = p->tot_len - optlen;
+ 8015cd2:	68bb      	ldr	r3, [r7, #8]
+ 8015cd4:	891a      	ldrh	r2, [r3, #8]
+ 8015cd6:	7dfb      	ldrb	r3, [r7, #23]
+ 8015cd8:	b29b      	uxth	r3, r3
+ 8015cda:	1ad3      	subs	r3, r2, r3
+ 8015cdc:	b29a      	uxth	r2, r3
+ 8015cde:	693b      	ldr	r3, [r7, #16]
+ 8015ce0:	811a      	strh	r2, [r3, #8]
+  LWIP_ASSERT("invalid optflags passed: TF_SEG_DATA_CHECKSUMMED",
+              (optflags & TF_SEG_DATA_CHECKSUMMED) == 0);
+#endif /* TCP_CHECKSUM_ON_COPY */
+
+  /* build TCP header */
+  if (pbuf_add_header(p, TCP_HLEN)) {
+ 8015ce2:	2114      	movs	r1, #20
+ 8015ce4:	68b8      	ldr	r0, [r7, #8]
+ 8015ce6:	f7fb fdc1 	bl	801186c <pbuf_add_header>
+ 8015cea:	4603      	mov	r3, r0
+ 8015cec:	2b00      	cmp	r3, #0
+ 8015cee:	d004      	beq.n	8015cfa <tcp_create_segment+0xae>
+    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no room for TCP header in pbuf.\n"));
+    TCP_STATS_INC(tcp.err);
+    tcp_seg_free(seg);
+ 8015cf0:	6938      	ldr	r0, [r7, #16]
+ 8015cf2:	f7fd f8d5 	bl	8012ea0 <tcp_seg_free>
+    return NULL;
+ 8015cf6:	2300      	movs	r3, #0
+ 8015cf8:	e037      	b.n	8015d6a <tcp_create_segment+0x11e>
+  }
+  seg->tcphdr = (struct tcp_hdr *)seg->p->payload;
+ 8015cfa:	693b      	ldr	r3, [r7, #16]
+ 8015cfc:	685b      	ldr	r3, [r3, #4]
+ 8015cfe:	685a      	ldr	r2, [r3, #4]
+ 8015d00:	693b      	ldr	r3, [r7, #16]
+ 8015d02:	60da      	str	r2, [r3, #12]
+  seg->tcphdr->src = lwip_htons(pcb->local_port);
+ 8015d04:	68fb      	ldr	r3, [r7, #12]
+ 8015d06:	8ada      	ldrh	r2, [r3, #22]
+ 8015d08:	693b      	ldr	r3, [r7, #16]
+ 8015d0a:	68dc      	ldr	r4, [r3, #12]
+ 8015d0c:	4610      	mov	r0, r2
+ 8015d0e:	f7fa fa8f 	bl	8010230 <lwip_htons>
+ 8015d12:	4603      	mov	r3, r0
+ 8015d14:	8023      	strh	r3, [r4, #0]
+  seg->tcphdr->dest = lwip_htons(pcb->remote_port);
+ 8015d16:	68fb      	ldr	r3, [r7, #12]
+ 8015d18:	8b1a      	ldrh	r2, [r3, #24]
+ 8015d1a:	693b      	ldr	r3, [r7, #16]
+ 8015d1c:	68dc      	ldr	r4, [r3, #12]
+ 8015d1e:	4610      	mov	r0, r2
+ 8015d20:	f7fa fa86 	bl	8010230 <lwip_htons>
+ 8015d24:	4603      	mov	r3, r0
+ 8015d26:	8063      	strh	r3, [r4, #2]
+  seg->tcphdr->seqno = lwip_htonl(seqno);
+ 8015d28:	693b      	ldr	r3, [r7, #16]
+ 8015d2a:	68dc      	ldr	r4, [r3, #12]
+ 8015d2c:	6838      	ldr	r0, [r7, #0]
+ 8015d2e:	f7fa fa94 	bl	801025a <lwip_htonl>
+ 8015d32:	4603      	mov	r3, r0
+ 8015d34:	6063      	str	r3, [r4, #4]
+  /* ackno is set in tcp_output */
+  TCPH_HDRLEN_FLAGS_SET(seg->tcphdr, (5 + optlen / 4), hdrflags);
+ 8015d36:	7dfb      	ldrb	r3, [r7, #23]
+ 8015d38:	089b      	lsrs	r3, r3, #2
+ 8015d3a:	b2db      	uxtb	r3, r3
+ 8015d3c:	b29b      	uxth	r3, r3
+ 8015d3e:	3305      	adds	r3, #5
+ 8015d40:	b29b      	uxth	r3, r3
+ 8015d42:	031b      	lsls	r3, r3, #12
+ 8015d44:	b29a      	uxth	r2, r3
+ 8015d46:	79fb      	ldrb	r3, [r7, #7]
+ 8015d48:	b29b      	uxth	r3, r3
+ 8015d4a:	4313      	orrs	r3, r2
+ 8015d4c:	b29a      	uxth	r2, r3
+ 8015d4e:	693b      	ldr	r3, [r7, #16]
+ 8015d50:	68dc      	ldr	r4, [r3, #12]
+ 8015d52:	4610      	mov	r0, r2
+ 8015d54:	f7fa fa6c 	bl	8010230 <lwip_htons>
+ 8015d58:	4603      	mov	r3, r0
+ 8015d5a:	81a3      	strh	r3, [r4, #12]
+  /* wnd and chksum are set in tcp_output */
+  seg->tcphdr->urgp = 0;
+ 8015d5c:	693b      	ldr	r3, [r7, #16]
+ 8015d5e:	68db      	ldr	r3, [r3, #12]
+ 8015d60:	2200      	movs	r2, #0
+ 8015d62:	749a      	strb	r2, [r3, #18]
+ 8015d64:	2200      	movs	r2, #0
+ 8015d66:	74da      	strb	r2, [r3, #19]
+  return seg;
+ 8015d68:	693b      	ldr	r3, [r7, #16]
+}
+ 8015d6a:	4618      	mov	r0, r3
+ 8015d6c:	371c      	adds	r7, #28
+ 8015d6e:	46bd      	mov	sp, r7
+ 8015d70:	bd90      	pop	{r4, r7, pc}
+ 8015d72:	bf00      	nop
+ 8015d74:	0801ee60 	.word	0x0801ee60
+ 8015d78:	0801ee94 	.word	0x0801ee94
+ 8015d7c:	0801eeb4 	.word	0x0801eeb4
+ 8015d80:	0801eedc 	.word	0x0801eedc
+ 8015d84:	0801ef00 	.word	0x0801ef00
+
+08015d88 <tcp_split_unsent_seg>:
+ * @param pcb the tcp_pcb for which to split the unsent head
+ * @param split the amount of payload to remain in the head
+ */
+err_t
+tcp_split_unsent_seg(struct tcp_pcb *pcb, u16_t split)
+{
+ 8015d88:	b590      	push	{r4, r7, lr}
+ 8015d8a:	b08b      	sub	sp, #44	; 0x2c
+ 8015d8c:	af02      	add	r7, sp, #8
+ 8015d8e:	6078      	str	r0, [r7, #4]
+ 8015d90:	460b      	mov	r3, r1
+ 8015d92:	807b      	strh	r3, [r7, #2]
+  struct tcp_seg *seg = NULL, *useg = NULL;
+ 8015d94:	2300      	movs	r3, #0
+ 8015d96:	61fb      	str	r3, [r7, #28]
+ 8015d98:	2300      	movs	r3, #0
+ 8015d9a:	617b      	str	r3, [r7, #20]
+  struct pbuf *p = NULL;
+ 8015d9c:	2300      	movs	r3, #0
+ 8015d9e:	613b      	str	r3, [r7, #16]
+  u16_t chksum = 0;
+  u8_t chksum_swapped = 0;
+  struct pbuf *q;
+#endif /* TCP_CHECKSUM_ON_COPY */
+
+  LWIP_ASSERT("tcp_split_unsent_seg: invalid pcb", pcb != NULL);
+ 8015da0:	687b      	ldr	r3, [r7, #4]
+ 8015da2:	2b00      	cmp	r3, #0
+ 8015da4:	d106      	bne.n	8015db4 <tcp_split_unsent_seg+0x2c>
+ 8015da6:	4b95      	ldr	r3, [pc, #596]	; (8015ffc <tcp_split_unsent_seg+0x274>)
+ 8015da8:	f240 324b 	movw	r2, #843	; 0x34b
+ 8015dac:	4994      	ldr	r1, [pc, #592]	; (8016000 <tcp_split_unsent_seg+0x278>)
+ 8015dae:	4895      	ldr	r0, [pc, #596]	; (8016004 <tcp_split_unsent_seg+0x27c>)
+ 8015db0:	f006 fb22 	bl	801c3f8 <iprintf>
+
+  useg = pcb->unsent;
+ 8015db4:	687b      	ldr	r3, [r7, #4]
+ 8015db6:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8015db8:	617b      	str	r3, [r7, #20]
+  if (useg == NULL) {
+ 8015dba:	697b      	ldr	r3, [r7, #20]
+ 8015dbc:	2b00      	cmp	r3, #0
+ 8015dbe:	d102      	bne.n	8015dc6 <tcp_split_unsent_seg+0x3e>
+    return ERR_MEM;
+ 8015dc0:	f04f 33ff 	mov.w	r3, #4294967295
+ 8015dc4:	e116      	b.n	8015ff4 <tcp_split_unsent_seg+0x26c>
+  }
+
+  if (split == 0) {
+ 8015dc6:	887b      	ldrh	r3, [r7, #2]
+ 8015dc8:	2b00      	cmp	r3, #0
+ 8015dca:	d109      	bne.n	8015de0 <tcp_split_unsent_seg+0x58>
+    LWIP_ASSERT("Can't split segment into length 0", 0);
+ 8015dcc:	4b8b      	ldr	r3, [pc, #556]	; (8015ffc <tcp_split_unsent_seg+0x274>)
+ 8015dce:	f240 3253 	movw	r2, #851	; 0x353
+ 8015dd2:	498d      	ldr	r1, [pc, #564]	; (8016008 <tcp_split_unsent_seg+0x280>)
+ 8015dd4:	488b      	ldr	r0, [pc, #556]	; (8016004 <tcp_split_unsent_seg+0x27c>)
+ 8015dd6:	f006 fb0f 	bl	801c3f8 <iprintf>
+    return ERR_VAL;
+ 8015dda:	f06f 0305 	mvn.w	r3, #5
+ 8015dde:	e109      	b.n	8015ff4 <tcp_split_unsent_seg+0x26c>
+  }
+
+  if (useg->len <= split) {
+ 8015de0:	697b      	ldr	r3, [r7, #20]
+ 8015de2:	891b      	ldrh	r3, [r3, #8]
+ 8015de4:	887a      	ldrh	r2, [r7, #2]
+ 8015de6:	429a      	cmp	r2, r3
+ 8015de8:	d301      	bcc.n	8015dee <tcp_split_unsent_seg+0x66>
+    return ERR_OK;
+ 8015dea:	2300      	movs	r3, #0
+ 8015dec:	e102      	b.n	8015ff4 <tcp_split_unsent_seg+0x26c>
+  }
+
+  LWIP_ASSERT("split <= mss", split <= pcb->mss);
+ 8015dee:	687b      	ldr	r3, [r7, #4]
+ 8015df0:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8015df2:	887a      	ldrh	r2, [r7, #2]
+ 8015df4:	429a      	cmp	r2, r3
+ 8015df6:	d906      	bls.n	8015e06 <tcp_split_unsent_seg+0x7e>
+ 8015df8:	4b80      	ldr	r3, [pc, #512]	; (8015ffc <tcp_split_unsent_seg+0x274>)
+ 8015dfa:	f240 325b 	movw	r2, #859	; 0x35b
+ 8015dfe:	4983      	ldr	r1, [pc, #524]	; (801600c <tcp_split_unsent_seg+0x284>)
+ 8015e00:	4880      	ldr	r0, [pc, #512]	; (8016004 <tcp_split_unsent_seg+0x27c>)
+ 8015e02:	f006 faf9 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("useg->len > 0", useg->len > 0);
+ 8015e06:	697b      	ldr	r3, [r7, #20]
+ 8015e08:	891b      	ldrh	r3, [r3, #8]
+ 8015e0a:	2b00      	cmp	r3, #0
+ 8015e0c:	d106      	bne.n	8015e1c <tcp_split_unsent_seg+0x94>
+ 8015e0e:	4b7b      	ldr	r3, [pc, #492]	; (8015ffc <tcp_split_unsent_seg+0x274>)
+ 8015e10:	f44f 7257 	mov.w	r2, #860	; 0x35c
+ 8015e14:	497e      	ldr	r1, [pc, #504]	; (8016010 <tcp_split_unsent_seg+0x288>)
+ 8015e16:	487b      	ldr	r0, [pc, #492]	; (8016004 <tcp_split_unsent_seg+0x27c>)
+ 8015e18:	f006 faee 	bl	801c3f8 <iprintf>
+   * to split this packet so we may actually exceed the max value by
+   * one!
+   */
+  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: split_unsent_seg: %u\n", (unsigned int)pcb->snd_queuelen));
+
+  optflags = useg->flags;
+ 8015e1c:	697b      	ldr	r3, [r7, #20]
+ 8015e1e:	7a9b      	ldrb	r3, [r3, #10]
+ 8015e20:	73fb      	strb	r3, [r7, #15]
+#if TCP_CHECKSUM_ON_COPY
+  /* Remove since checksum is not stored until after tcp_create_segment() */
+  optflags &= ~TF_SEG_DATA_CHECKSUMMED;
+#endif /* TCP_CHECKSUM_ON_COPY */
+  optlen = LWIP_TCP_OPT_LENGTH(optflags);
+ 8015e22:	7bfb      	ldrb	r3, [r7, #15]
+ 8015e24:	009b      	lsls	r3, r3, #2
+ 8015e26:	b2db      	uxtb	r3, r3
+ 8015e28:	f003 0304 	and.w	r3, r3, #4
+ 8015e2c:	73bb      	strb	r3, [r7, #14]
+  remainder = useg->len - split;
+ 8015e2e:	697b      	ldr	r3, [r7, #20]
+ 8015e30:	891a      	ldrh	r2, [r3, #8]
+ 8015e32:	887b      	ldrh	r3, [r7, #2]
+ 8015e34:	1ad3      	subs	r3, r2, r3
+ 8015e36:	81bb      	strh	r3, [r7, #12]
+
+  /* Create new pbuf for the remainder of the split */
+  p = pbuf_alloc(PBUF_TRANSPORT, remainder + optlen, PBUF_RAM);
+ 8015e38:	7bbb      	ldrb	r3, [r7, #14]
+ 8015e3a:	b29a      	uxth	r2, r3
+ 8015e3c:	89bb      	ldrh	r3, [r7, #12]
+ 8015e3e:	4413      	add	r3, r2
+ 8015e40:	b29b      	uxth	r3, r3
+ 8015e42:	f44f 7220 	mov.w	r2, #640	; 0x280
+ 8015e46:	4619      	mov	r1, r3
+ 8015e48:	2036      	movs	r0, #54	; 0x36
+ 8015e4a:	f7fb fac5 	bl	80113d8 <pbuf_alloc>
+ 8015e4e:	6138      	str	r0, [r7, #16]
+  if (p == NULL) {
+ 8015e50:	693b      	ldr	r3, [r7, #16]
+ 8015e52:	2b00      	cmp	r3, #0
+ 8015e54:	f000 80b7 	beq.w	8015fc6 <tcp_split_unsent_seg+0x23e>
+                ("tcp_split_unsent_seg: could not allocate memory for pbuf remainder %u\n", remainder));
+    goto memerr;
+  }
+
+  /* Offset into the original pbuf is past TCP/IP headers, options, and split amount */
+  offset = useg->p->tot_len - useg->len + split;
+ 8015e58:	697b      	ldr	r3, [r7, #20]
+ 8015e5a:	685b      	ldr	r3, [r3, #4]
+ 8015e5c:	891a      	ldrh	r2, [r3, #8]
+ 8015e5e:	697b      	ldr	r3, [r7, #20]
+ 8015e60:	891b      	ldrh	r3, [r3, #8]
+ 8015e62:	1ad3      	subs	r3, r2, r3
+ 8015e64:	b29a      	uxth	r2, r3
+ 8015e66:	887b      	ldrh	r3, [r7, #2]
+ 8015e68:	4413      	add	r3, r2
+ 8015e6a:	817b      	strh	r3, [r7, #10]
+  /* Copy remainder into new pbuf, headers and options will not be filled out */
+  if (pbuf_copy_partial(useg->p, (u8_t *)p->payload + optlen, remainder, offset ) != remainder) {
+ 8015e6c:	697b      	ldr	r3, [r7, #20]
+ 8015e6e:	6858      	ldr	r0, [r3, #4]
+ 8015e70:	693b      	ldr	r3, [r7, #16]
+ 8015e72:	685a      	ldr	r2, [r3, #4]
+ 8015e74:	7bbb      	ldrb	r3, [r7, #14]
+ 8015e76:	18d1      	adds	r1, r2, r3
+ 8015e78:	897b      	ldrh	r3, [r7, #10]
+ 8015e7a:	89ba      	ldrh	r2, [r7, #12]
+ 8015e7c:	f7fb ff92 	bl	8011da4 <pbuf_copy_partial>
+ 8015e80:	4603      	mov	r3, r0
+ 8015e82:	461a      	mov	r2, r3
+ 8015e84:	89bb      	ldrh	r3, [r7, #12]
+ 8015e86:	4293      	cmp	r3, r2
+ 8015e88:	f040 809f 	bne.w	8015fca <tcp_split_unsent_seg+0x242>
+#endif /* TCP_CHECKSUM_ON_COPY */
+
+  /* Options are created when calling tcp_output() */
+
+  /* Migrate flags from original segment */
+  split_flags = TCPH_FLAGS(useg->tcphdr);
+ 8015e8c:	697b      	ldr	r3, [r7, #20]
+ 8015e8e:	68db      	ldr	r3, [r3, #12]
+ 8015e90:	899b      	ldrh	r3, [r3, #12]
+ 8015e92:	b29b      	uxth	r3, r3
+ 8015e94:	4618      	mov	r0, r3
+ 8015e96:	f7fa f9cb 	bl	8010230 <lwip_htons>
+ 8015e9a:	4603      	mov	r3, r0
+ 8015e9c:	b2db      	uxtb	r3, r3
+ 8015e9e:	f003 033f 	and.w	r3, r3, #63	; 0x3f
+ 8015ea2:	76fb      	strb	r3, [r7, #27]
+  remainder_flags = 0; /* ACK added in tcp_output() */
+ 8015ea4:	2300      	movs	r3, #0
+ 8015ea6:	76bb      	strb	r3, [r7, #26]
+
+  if (split_flags & TCP_PSH) {
+ 8015ea8:	7efb      	ldrb	r3, [r7, #27]
+ 8015eaa:	f003 0308 	and.w	r3, r3, #8
+ 8015eae:	2b00      	cmp	r3, #0
+ 8015eb0:	d007      	beq.n	8015ec2 <tcp_split_unsent_seg+0x13a>
+    split_flags &= ~TCP_PSH;
+ 8015eb2:	7efb      	ldrb	r3, [r7, #27]
+ 8015eb4:	f023 0308 	bic.w	r3, r3, #8
+ 8015eb8:	76fb      	strb	r3, [r7, #27]
+    remainder_flags |= TCP_PSH;
+ 8015eba:	7ebb      	ldrb	r3, [r7, #26]
+ 8015ebc:	f043 0308 	orr.w	r3, r3, #8
+ 8015ec0:	76bb      	strb	r3, [r7, #26]
+  }
+  if (split_flags & TCP_FIN) {
+ 8015ec2:	7efb      	ldrb	r3, [r7, #27]
+ 8015ec4:	f003 0301 	and.w	r3, r3, #1
+ 8015ec8:	2b00      	cmp	r3, #0
+ 8015eca:	d007      	beq.n	8015edc <tcp_split_unsent_seg+0x154>
+    split_flags &= ~TCP_FIN;
+ 8015ecc:	7efb      	ldrb	r3, [r7, #27]
+ 8015ece:	f023 0301 	bic.w	r3, r3, #1
+ 8015ed2:	76fb      	strb	r3, [r7, #27]
+    remainder_flags |= TCP_FIN;
+ 8015ed4:	7ebb      	ldrb	r3, [r7, #26]
+ 8015ed6:	f043 0301 	orr.w	r3, r3, #1
+ 8015eda:	76bb      	strb	r3, [r7, #26]
+  }
+  /* SYN should be left on split, RST should not be present with data */
+
+  seg = tcp_create_segment(pcb, p, remainder_flags, lwip_ntohl(useg->tcphdr->seqno) + split, optflags);
+ 8015edc:	697b      	ldr	r3, [r7, #20]
+ 8015ede:	68db      	ldr	r3, [r3, #12]
+ 8015ee0:	685b      	ldr	r3, [r3, #4]
+ 8015ee2:	4618      	mov	r0, r3
+ 8015ee4:	f7fa f9b9 	bl	801025a <lwip_htonl>
+ 8015ee8:	4602      	mov	r2, r0
+ 8015eea:	887b      	ldrh	r3, [r7, #2]
+ 8015eec:	18d1      	adds	r1, r2, r3
+ 8015eee:	7eba      	ldrb	r2, [r7, #26]
+ 8015ef0:	7bfb      	ldrb	r3, [r7, #15]
+ 8015ef2:	9300      	str	r3, [sp, #0]
+ 8015ef4:	460b      	mov	r3, r1
+ 8015ef6:	6939      	ldr	r1, [r7, #16]
+ 8015ef8:	6878      	ldr	r0, [r7, #4]
+ 8015efa:	f7ff fea7 	bl	8015c4c <tcp_create_segment>
+ 8015efe:	61f8      	str	r0, [r7, #28]
+  if (seg == NULL) {
+ 8015f00:	69fb      	ldr	r3, [r7, #28]
+ 8015f02:	2b00      	cmp	r3, #0
+ 8015f04:	d063      	beq.n	8015fce <tcp_split_unsent_seg+0x246>
+  seg->chksum_swapped = chksum_swapped;
+  seg->flags |= TF_SEG_DATA_CHECKSUMMED;
+#endif /* TCP_CHECKSUM_ON_COPY */
+
+  /* Remove this segment from the queue since trimming it may free pbufs */
+  pcb->snd_queuelen -= pbuf_clen(useg->p);
+ 8015f06:	697b      	ldr	r3, [r7, #20]
+ 8015f08:	685b      	ldr	r3, [r3, #4]
+ 8015f0a:	4618      	mov	r0, r3
+ 8015f0c:	f7fb fdd2 	bl	8011ab4 <pbuf_clen>
+ 8015f10:	4603      	mov	r3, r0
+ 8015f12:	461a      	mov	r2, r3
+ 8015f14:	687b      	ldr	r3, [r7, #4]
+ 8015f16:	f8b3 3066 	ldrh.w	r3, [r3, #102]	; 0x66
+ 8015f1a:	1a9b      	subs	r3, r3, r2
+ 8015f1c:	b29a      	uxth	r2, r3
+ 8015f1e:	687b      	ldr	r3, [r7, #4]
+ 8015f20:	f8a3 2066 	strh.w	r2, [r3, #102]	; 0x66
+
+  /* Trim the original pbuf into our split size.  At this point our remainder segment must be setup
+  successfully because we are modifying the original segment */
+  pbuf_realloc(useg->p, useg->p->tot_len - remainder);
+ 8015f24:	697b      	ldr	r3, [r7, #20]
+ 8015f26:	6858      	ldr	r0, [r3, #4]
+ 8015f28:	697b      	ldr	r3, [r7, #20]
+ 8015f2a:	685b      	ldr	r3, [r3, #4]
+ 8015f2c:	891a      	ldrh	r2, [r3, #8]
+ 8015f2e:	89bb      	ldrh	r3, [r7, #12]
+ 8015f30:	1ad3      	subs	r3, r2, r3
+ 8015f32:	b29b      	uxth	r3, r3
+ 8015f34:	4619      	mov	r1, r3
+ 8015f36:	f7fb fba9 	bl	801168c <pbuf_realloc>
+  useg->len -= remainder;
+ 8015f3a:	697b      	ldr	r3, [r7, #20]
+ 8015f3c:	891a      	ldrh	r2, [r3, #8]
+ 8015f3e:	89bb      	ldrh	r3, [r7, #12]
+ 8015f40:	1ad3      	subs	r3, r2, r3
+ 8015f42:	b29a      	uxth	r2, r3
+ 8015f44:	697b      	ldr	r3, [r7, #20]
+ 8015f46:	811a      	strh	r2, [r3, #8]
+  TCPH_SET_FLAG(useg->tcphdr, split_flags);
+ 8015f48:	697b      	ldr	r3, [r7, #20]
+ 8015f4a:	68db      	ldr	r3, [r3, #12]
+ 8015f4c:	899b      	ldrh	r3, [r3, #12]
+ 8015f4e:	b29c      	uxth	r4, r3
+ 8015f50:	7efb      	ldrb	r3, [r7, #27]
+ 8015f52:	b29b      	uxth	r3, r3
+ 8015f54:	4618      	mov	r0, r3
+ 8015f56:	f7fa f96b 	bl	8010230 <lwip_htons>
+ 8015f5a:	4603      	mov	r3, r0
+ 8015f5c:	461a      	mov	r2, r3
+ 8015f5e:	697b      	ldr	r3, [r7, #20]
+ 8015f60:	68db      	ldr	r3, [r3, #12]
+ 8015f62:	4322      	orrs	r2, r4
+ 8015f64:	b292      	uxth	r2, r2
+ 8015f66:	819a      	strh	r2, [r3, #12]
+  /* By trimming, realloc may have actually shrunk the pbuf, so clear oversize_left */
+  useg->oversize_left = 0;
+#endif /* TCP_OVERSIZE_DBGCHECK */
+
+  /* Add back to the queue with new trimmed pbuf */
+  pcb->snd_queuelen += pbuf_clen(useg->p);
+ 8015f68:	697b      	ldr	r3, [r7, #20]
+ 8015f6a:	685b      	ldr	r3, [r3, #4]
+ 8015f6c:	4618      	mov	r0, r3
+ 8015f6e:	f7fb fda1 	bl	8011ab4 <pbuf_clen>
+ 8015f72:	4603      	mov	r3, r0
+ 8015f74:	461a      	mov	r2, r3
+ 8015f76:	687b      	ldr	r3, [r7, #4]
+ 8015f78:	f8b3 3066 	ldrh.w	r3, [r3, #102]	; 0x66
+ 8015f7c:	4413      	add	r3, r2
+ 8015f7e:	b29a      	uxth	r2, r3
+ 8015f80:	687b      	ldr	r3, [r7, #4]
+ 8015f82:	f8a3 2066 	strh.w	r2, [r3, #102]	; 0x66
+#endif /* TCP_CHECKSUM_ON_COPY */
+
+  /* Update number of segments on the queues. Note that length now may
+   * exceed TCP_SND_QUEUELEN! We don't have to touch pcb->snd_buf
+   * because the total amount of data is constant when packet is split */
+  pcb->snd_queuelen += pbuf_clen(seg->p);
+ 8015f86:	69fb      	ldr	r3, [r7, #28]
+ 8015f88:	685b      	ldr	r3, [r3, #4]
+ 8015f8a:	4618      	mov	r0, r3
+ 8015f8c:	f7fb fd92 	bl	8011ab4 <pbuf_clen>
+ 8015f90:	4603      	mov	r3, r0
+ 8015f92:	461a      	mov	r2, r3
+ 8015f94:	687b      	ldr	r3, [r7, #4]
+ 8015f96:	f8b3 3066 	ldrh.w	r3, [r3, #102]	; 0x66
+ 8015f9a:	4413      	add	r3, r2
+ 8015f9c:	b29a      	uxth	r2, r3
+ 8015f9e:	687b      	ldr	r3, [r7, #4]
+ 8015fa0:	f8a3 2066 	strh.w	r2, [r3, #102]	; 0x66
+
+  /* Finally insert remainder into queue after split (which stays head) */
+  seg->next = useg->next;
+ 8015fa4:	697b      	ldr	r3, [r7, #20]
+ 8015fa6:	681a      	ldr	r2, [r3, #0]
+ 8015fa8:	69fb      	ldr	r3, [r7, #28]
+ 8015faa:	601a      	str	r2, [r3, #0]
+  useg->next = seg;
+ 8015fac:	697b      	ldr	r3, [r7, #20]
+ 8015fae:	69fa      	ldr	r2, [r7, #28]
+ 8015fb0:	601a      	str	r2, [r3, #0]
+
+#if TCP_OVERSIZE
+  /* If remainder is last segment on the unsent, ensure we clear the oversize amount
+   * because the remainder is always sized to the exact remaining amount */
+  if (seg->next == NULL) {
+ 8015fb2:	69fb      	ldr	r3, [r7, #28]
+ 8015fb4:	681b      	ldr	r3, [r3, #0]
+ 8015fb6:	2b00      	cmp	r3, #0
+ 8015fb8:	d103      	bne.n	8015fc2 <tcp_split_unsent_seg+0x23a>
+    pcb->unsent_oversize = 0;
+ 8015fba:	687b      	ldr	r3, [r7, #4]
+ 8015fbc:	2200      	movs	r2, #0
+ 8015fbe:	f8a3 2068 	strh.w	r2, [r3, #104]	; 0x68
+  }
+#endif /* TCP_OVERSIZE */
+
+  return ERR_OK;
+ 8015fc2:	2300      	movs	r3, #0
+ 8015fc4:	e016      	b.n	8015ff4 <tcp_split_unsent_seg+0x26c>
+    goto memerr;
+ 8015fc6:	bf00      	nop
+ 8015fc8:	e002      	b.n	8015fd0 <tcp_split_unsent_seg+0x248>
+    goto memerr;
+ 8015fca:	bf00      	nop
+ 8015fcc:	e000      	b.n	8015fd0 <tcp_split_unsent_seg+0x248>
+    goto memerr;
+ 8015fce:	bf00      	nop
+memerr:
+  TCP_STATS_INC(tcp.memerr);
+
+  LWIP_ASSERT("seg == NULL", seg == NULL);
+ 8015fd0:	69fb      	ldr	r3, [r7, #28]
+ 8015fd2:	2b00      	cmp	r3, #0
+ 8015fd4:	d006      	beq.n	8015fe4 <tcp_split_unsent_seg+0x25c>
+ 8015fd6:	4b09      	ldr	r3, [pc, #36]	; (8015ffc <tcp_split_unsent_seg+0x274>)
+ 8015fd8:	f44f 7276 	mov.w	r2, #984	; 0x3d8
+ 8015fdc:	490d      	ldr	r1, [pc, #52]	; (8016014 <tcp_split_unsent_seg+0x28c>)
+ 8015fde:	4809      	ldr	r0, [pc, #36]	; (8016004 <tcp_split_unsent_seg+0x27c>)
+ 8015fe0:	f006 fa0a 	bl	801c3f8 <iprintf>
+  if (p != NULL) {
+ 8015fe4:	693b      	ldr	r3, [r7, #16]
+ 8015fe6:	2b00      	cmp	r3, #0
+ 8015fe8:	d002      	beq.n	8015ff0 <tcp_split_unsent_seg+0x268>
+    pbuf_free(p);
+ 8015fea:	6938      	ldr	r0, [r7, #16]
+ 8015fec:	f7fb fcd4 	bl	8011998 <pbuf_free>
+  }
+
+  return ERR_MEM;
+ 8015ff0:	f04f 33ff 	mov.w	r3, #4294967295
+}
+ 8015ff4:	4618      	mov	r0, r3
+ 8015ff6:	3724      	adds	r7, #36	; 0x24
+ 8015ff8:	46bd      	mov	sp, r7
+ 8015ffa:	bd90      	pop	{r4, r7, pc}
+ 8015ffc:	0801ee60 	.word	0x0801ee60
+ 8016000:	0801f1f4 	.word	0x0801f1f4
+ 8016004:	0801eeb4 	.word	0x0801eeb4
+ 8016008:	0801f218 	.word	0x0801f218
+ 801600c:	0801f23c 	.word	0x0801f23c
+ 8016010:	0801f24c 	.word	0x0801f24c
+ 8016014:	0801f25c 	.word	0x0801f25c
+
+08016018 <tcp_send_fin>:
+ * @param pcb the tcp_pcb over which to send a segment
+ * @return ERR_OK if sent, another err_t otherwise
+ */
+err_t
+tcp_send_fin(struct tcp_pcb *pcb)
+{
+ 8016018:	b590      	push	{r4, r7, lr}
+ 801601a:	b085      	sub	sp, #20
+ 801601c:	af00      	add	r7, sp, #0
+ 801601e:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT("tcp_send_fin: invalid pcb", pcb != NULL);
+ 8016020:	687b      	ldr	r3, [r7, #4]
+ 8016022:	2b00      	cmp	r3, #0
+ 8016024:	d106      	bne.n	8016034 <tcp_send_fin+0x1c>
+ 8016026:	4b21      	ldr	r3, [pc, #132]	; (80160ac <tcp_send_fin+0x94>)
+ 8016028:	f240 32eb 	movw	r2, #1003	; 0x3eb
+ 801602c:	4920      	ldr	r1, [pc, #128]	; (80160b0 <tcp_send_fin+0x98>)
+ 801602e:	4821      	ldr	r0, [pc, #132]	; (80160b4 <tcp_send_fin+0x9c>)
+ 8016030:	f006 f9e2 	bl	801c3f8 <iprintf>
+
+  /* first, try to add the fin to the last unsent segment */
+  if (pcb->unsent != NULL) {
+ 8016034:	687b      	ldr	r3, [r7, #4]
+ 8016036:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8016038:	2b00      	cmp	r3, #0
+ 801603a:	d02e      	beq.n	801609a <tcp_send_fin+0x82>
+    struct tcp_seg *last_unsent;
+    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
+ 801603c:	687b      	ldr	r3, [r7, #4]
+ 801603e:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8016040:	60fb      	str	r3, [r7, #12]
+ 8016042:	e002      	b.n	801604a <tcp_send_fin+0x32>
+         last_unsent = last_unsent->next);
+ 8016044:	68fb      	ldr	r3, [r7, #12]
+ 8016046:	681b      	ldr	r3, [r3, #0]
+ 8016048:	60fb      	str	r3, [r7, #12]
+    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
+ 801604a:	68fb      	ldr	r3, [r7, #12]
+ 801604c:	681b      	ldr	r3, [r3, #0]
+ 801604e:	2b00      	cmp	r3, #0
+ 8016050:	d1f8      	bne.n	8016044 <tcp_send_fin+0x2c>
+
+    if ((TCPH_FLAGS(last_unsent->tcphdr) & (TCP_SYN | TCP_FIN | TCP_RST)) == 0) {
+ 8016052:	68fb      	ldr	r3, [r7, #12]
+ 8016054:	68db      	ldr	r3, [r3, #12]
+ 8016056:	899b      	ldrh	r3, [r3, #12]
+ 8016058:	b29b      	uxth	r3, r3
+ 801605a:	4618      	mov	r0, r3
+ 801605c:	f7fa f8e8 	bl	8010230 <lwip_htons>
+ 8016060:	4603      	mov	r3, r0
+ 8016062:	b2db      	uxtb	r3, r3
+ 8016064:	f003 0307 	and.w	r3, r3, #7
+ 8016068:	2b00      	cmp	r3, #0
+ 801606a:	d116      	bne.n	801609a <tcp_send_fin+0x82>
+      /* no SYN/FIN/RST flag in the header, we can add the FIN flag */
+      TCPH_SET_FLAG(last_unsent->tcphdr, TCP_FIN);
+ 801606c:	68fb      	ldr	r3, [r7, #12]
+ 801606e:	68db      	ldr	r3, [r3, #12]
+ 8016070:	899b      	ldrh	r3, [r3, #12]
+ 8016072:	b29c      	uxth	r4, r3
+ 8016074:	2001      	movs	r0, #1
+ 8016076:	f7fa f8db 	bl	8010230 <lwip_htons>
+ 801607a:	4603      	mov	r3, r0
+ 801607c:	461a      	mov	r2, r3
+ 801607e:	68fb      	ldr	r3, [r7, #12]
+ 8016080:	68db      	ldr	r3, [r3, #12]
+ 8016082:	4322      	orrs	r2, r4
+ 8016084:	b292      	uxth	r2, r2
+ 8016086:	819a      	strh	r2, [r3, #12]
+      tcp_set_flags(pcb, TF_FIN);
+ 8016088:	687b      	ldr	r3, [r7, #4]
+ 801608a:	8b5b      	ldrh	r3, [r3, #26]
+ 801608c:	f043 0320 	orr.w	r3, r3, #32
+ 8016090:	b29a      	uxth	r2, r3
+ 8016092:	687b      	ldr	r3, [r7, #4]
+ 8016094:	835a      	strh	r2, [r3, #26]
+      return ERR_OK;
+ 8016096:	2300      	movs	r3, #0
+ 8016098:	e004      	b.n	80160a4 <tcp_send_fin+0x8c>
+    }
+  }
+  /* no data, no length, flags, copy=1, no optdata */
+  return tcp_enqueue_flags(pcb, TCP_FIN);
+ 801609a:	2101      	movs	r1, #1
+ 801609c:	6878      	ldr	r0, [r7, #4]
+ 801609e:	f000 f80b 	bl	80160b8 <tcp_enqueue_flags>
+ 80160a2:	4603      	mov	r3, r0
+}
+ 80160a4:	4618      	mov	r0, r3
+ 80160a6:	3714      	adds	r7, #20
+ 80160a8:	46bd      	mov	sp, r7
+ 80160aa:	bd90      	pop	{r4, r7, pc}
+ 80160ac:	0801ee60 	.word	0x0801ee60
+ 80160b0:	0801f268 	.word	0x0801f268
+ 80160b4:	0801eeb4 	.word	0x0801eeb4
+
+080160b8 <tcp_enqueue_flags>:
+ * @param pcb Protocol control block for the TCP connection.
+ * @param flags TCP header flags to set in the outgoing segment.
+ */
+err_t
+tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags)
+{
+ 80160b8:	b580      	push	{r7, lr}
+ 80160ba:	b08a      	sub	sp, #40	; 0x28
+ 80160bc:	af02      	add	r7, sp, #8
+ 80160be:	6078      	str	r0, [r7, #4]
+ 80160c0:	460b      	mov	r3, r1
+ 80160c2:	70fb      	strb	r3, [r7, #3]
+  struct pbuf *p;
+  struct tcp_seg *seg;
+  u8_t optflags = 0;
+ 80160c4:	2300      	movs	r3, #0
+ 80160c6:	77fb      	strb	r3, [r7, #31]
+  u8_t optlen = 0;
+ 80160c8:	2300      	movs	r3, #0
+ 80160ca:	75fb      	strb	r3, [r7, #23]
+
+  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen));
+
+  LWIP_ASSERT("tcp_enqueue_flags: need either TCP_SYN or TCP_FIN in flags (programmer violates API)",
+ 80160cc:	78fb      	ldrb	r3, [r7, #3]
+ 80160ce:	f003 0303 	and.w	r3, r3, #3
+ 80160d2:	2b00      	cmp	r3, #0
+ 80160d4:	d106      	bne.n	80160e4 <tcp_enqueue_flags+0x2c>
+ 80160d6:	4b67      	ldr	r3, [pc, #412]	; (8016274 <tcp_enqueue_flags+0x1bc>)
+ 80160d8:	f240 4212 	movw	r2, #1042	; 0x412
+ 80160dc:	4966      	ldr	r1, [pc, #408]	; (8016278 <tcp_enqueue_flags+0x1c0>)
+ 80160de:	4867      	ldr	r0, [pc, #412]	; (801627c <tcp_enqueue_flags+0x1c4>)
+ 80160e0:	f006 f98a 	bl	801c3f8 <iprintf>
+              (flags & (TCP_SYN | TCP_FIN)) != 0);
+  LWIP_ASSERT("tcp_enqueue_flags: invalid pcb", pcb != NULL);
+ 80160e4:	687b      	ldr	r3, [r7, #4]
+ 80160e6:	2b00      	cmp	r3, #0
+ 80160e8:	d106      	bne.n	80160f8 <tcp_enqueue_flags+0x40>
+ 80160ea:	4b62      	ldr	r3, [pc, #392]	; (8016274 <tcp_enqueue_flags+0x1bc>)
+ 80160ec:	f240 4213 	movw	r2, #1043	; 0x413
+ 80160f0:	4963      	ldr	r1, [pc, #396]	; (8016280 <tcp_enqueue_flags+0x1c8>)
+ 80160f2:	4862      	ldr	r0, [pc, #392]	; (801627c <tcp_enqueue_flags+0x1c4>)
+ 80160f4:	f006 f980 	bl	801c3f8 <iprintf>
+
+  /* No need to check pcb->snd_queuelen if only SYN or FIN are allowed! */
+
+  /* Get options for this segment. This is a special case since this is the
+     only place where a SYN can be sent. */
+  if (flags & TCP_SYN) {
+ 80160f8:	78fb      	ldrb	r3, [r7, #3]
+ 80160fa:	f003 0302 	and.w	r3, r3, #2
+ 80160fe:	2b00      	cmp	r3, #0
+ 8016100:	d001      	beq.n	8016106 <tcp_enqueue_flags+0x4e>
+    optflags = TF_SEG_OPTS_MSS;
+ 8016102:	2301      	movs	r3, #1
+ 8016104:	77fb      	strb	r3, [r7, #31]
+    /* Make sure the timestamp option is only included in data segments if we
+       agreed about it with the remote host (and in active open SYN segments). */
+    optflags |= TF_SEG_OPTS_TS;
+  }
+#endif /* LWIP_TCP_TIMESTAMPS */
+  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
+ 8016106:	7ffb      	ldrb	r3, [r7, #31]
+ 8016108:	009b      	lsls	r3, r3, #2
+ 801610a:	b2db      	uxtb	r3, r3
+ 801610c:	f003 0304 	and.w	r3, r3, #4
+ 8016110:	75fb      	strb	r3, [r7, #23]
+
+  /* Allocate pbuf with room for TCP header + options */
+  if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
+ 8016112:	7dfb      	ldrb	r3, [r7, #23]
+ 8016114:	b29b      	uxth	r3, r3
+ 8016116:	f44f 7220 	mov.w	r2, #640	; 0x280
+ 801611a:	4619      	mov	r1, r3
+ 801611c:	2036      	movs	r0, #54	; 0x36
+ 801611e:	f7fb f95b 	bl	80113d8 <pbuf_alloc>
+ 8016122:	6138      	str	r0, [r7, #16]
+ 8016124:	693b      	ldr	r3, [r7, #16]
+ 8016126:	2b00      	cmp	r3, #0
+ 8016128:	d109      	bne.n	801613e <tcp_enqueue_flags+0x86>
+    tcp_set_flags(pcb, TF_NAGLEMEMERR);
+ 801612a:	687b      	ldr	r3, [r7, #4]
+ 801612c:	8b5b      	ldrh	r3, [r3, #26]
+ 801612e:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 8016132:	b29a      	uxth	r2, r3
+ 8016134:	687b      	ldr	r3, [r7, #4]
+ 8016136:	835a      	strh	r2, [r3, #26]
+    TCP_STATS_INC(tcp.memerr);
+    return ERR_MEM;
+ 8016138:	f04f 33ff 	mov.w	r3, #4294967295
+ 801613c:	e095      	b.n	801626a <tcp_enqueue_flags+0x1b2>
+  }
+  LWIP_ASSERT("tcp_enqueue_flags: check that first pbuf can hold optlen",
+ 801613e:	693b      	ldr	r3, [r7, #16]
+ 8016140:	895a      	ldrh	r2, [r3, #10]
+ 8016142:	7dfb      	ldrb	r3, [r7, #23]
+ 8016144:	b29b      	uxth	r3, r3
+ 8016146:	429a      	cmp	r2, r3
+ 8016148:	d206      	bcs.n	8016158 <tcp_enqueue_flags+0xa0>
+ 801614a:	4b4a      	ldr	r3, [pc, #296]	; (8016274 <tcp_enqueue_flags+0x1bc>)
+ 801614c:	f240 423a 	movw	r2, #1082	; 0x43a
+ 8016150:	494c      	ldr	r1, [pc, #304]	; (8016284 <tcp_enqueue_flags+0x1cc>)
+ 8016152:	484a      	ldr	r0, [pc, #296]	; (801627c <tcp_enqueue_flags+0x1c4>)
+ 8016154:	f006 f950 	bl	801c3f8 <iprintf>
+              (p->len >= optlen));
+
+  /* Allocate memory for tcp_seg, and fill in fields. */
+  if ((seg = tcp_create_segment(pcb, p, flags, pcb->snd_lbb, optflags)) == NULL) {
+ 8016158:	687b      	ldr	r3, [r7, #4]
+ 801615a:	6dd9      	ldr	r1, [r3, #92]	; 0x5c
+ 801615c:	78fa      	ldrb	r2, [r7, #3]
+ 801615e:	7ffb      	ldrb	r3, [r7, #31]
+ 8016160:	9300      	str	r3, [sp, #0]
+ 8016162:	460b      	mov	r3, r1
+ 8016164:	6939      	ldr	r1, [r7, #16]
+ 8016166:	6878      	ldr	r0, [r7, #4]
+ 8016168:	f7ff fd70 	bl	8015c4c <tcp_create_segment>
+ 801616c:	60f8      	str	r0, [r7, #12]
+ 801616e:	68fb      	ldr	r3, [r7, #12]
+ 8016170:	2b00      	cmp	r3, #0
+ 8016172:	d109      	bne.n	8016188 <tcp_enqueue_flags+0xd0>
+    tcp_set_flags(pcb, TF_NAGLEMEMERR);
+ 8016174:	687b      	ldr	r3, [r7, #4]
+ 8016176:	8b5b      	ldrh	r3, [r3, #26]
+ 8016178:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 801617c:	b29a      	uxth	r2, r3
+ 801617e:	687b      	ldr	r3, [r7, #4]
+ 8016180:	835a      	strh	r2, [r3, #26]
+    TCP_STATS_INC(tcp.memerr);
+    return ERR_MEM;
+ 8016182:	f04f 33ff 	mov.w	r3, #4294967295
+ 8016186:	e070      	b.n	801626a <tcp_enqueue_flags+0x1b2>
+  }
+  LWIP_ASSERT("seg->tcphdr not aligned", ((mem_ptr_t)seg->tcphdr % LWIP_MIN(MEM_ALIGNMENT, 4)) == 0);
+ 8016188:	68fb      	ldr	r3, [r7, #12]
+ 801618a:	68db      	ldr	r3, [r3, #12]
+ 801618c:	f003 0303 	and.w	r3, r3, #3
+ 8016190:	2b00      	cmp	r3, #0
+ 8016192:	d006      	beq.n	80161a2 <tcp_enqueue_flags+0xea>
+ 8016194:	4b37      	ldr	r3, [pc, #220]	; (8016274 <tcp_enqueue_flags+0x1bc>)
+ 8016196:	f240 4242 	movw	r2, #1090	; 0x442
+ 801619a:	493b      	ldr	r1, [pc, #236]	; (8016288 <tcp_enqueue_flags+0x1d0>)
+ 801619c:	4837      	ldr	r0, [pc, #220]	; (801627c <tcp_enqueue_flags+0x1c4>)
+ 801619e:	f006 f92b 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("tcp_enqueue_flags: invalid segment length", seg->len == 0);
+ 80161a2:	68fb      	ldr	r3, [r7, #12]
+ 80161a4:	891b      	ldrh	r3, [r3, #8]
+ 80161a6:	2b00      	cmp	r3, #0
+ 80161a8:	d006      	beq.n	80161b8 <tcp_enqueue_flags+0x100>
+ 80161aa:	4b32      	ldr	r3, [pc, #200]	; (8016274 <tcp_enqueue_flags+0x1bc>)
+ 80161ac:	f240 4243 	movw	r2, #1091	; 0x443
+ 80161b0:	4936      	ldr	r1, [pc, #216]	; (801628c <tcp_enqueue_flags+0x1d4>)
+ 80161b2:	4832      	ldr	r0, [pc, #200]	; (801627c <tcp_enqueue_flags+0x1c4>)
+ 80161b4:	f006 f920 	bl	801c3f8 <iprintf>
+               lwip_ntohl(seg->tcphdr->seqno),
+               lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg),
+               (u16_t)flags));
+
+  /* Now append seg to pcb->unsent queue */
+  if (pcb->unsent == NULL) {
+ 80161b8:	687b      	ldr	r3, [r7, #4]
+ 80161ba:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 80161bc:	2b00      	cmp	r3, #0
+ 80161be:	d103      	bne.n	80161c8 <tcp_enqueue_flags+0x110>
+    pcb->unsent = seg;
+ 80161c0:	687b      	ldr	r3, [r7, #4]
+ 80161c2:	68fa      	ldr	r2, [r7, #12]
+ 80161c4:	66da      	str	r2, [r3, #108]	; 0x6c
+ 80161c6:	e00d      	b.n	80161e4 <tcp_enqueue_flags+0x12c>
+  } else {
+    struct tcp_seg *useg;
+    for (useg = pcb->unsent; useg->next != NULL; useg = useg->next);
+ 80161c8:	687b      	ldr	r3, [r7, #4]
+ 80161ca:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 80161cc:	61bb      	str	r3, [r7, #24]
+ 80161ce:	e002      	b.n	80161d6 <tcp_enqueue_flags+0x11e>
+ 80161d0:	69bb      	ldr	r3, [r7, #24]
+ 80161d2:	681b      	ldr	r3, [r3, #0]
+ 80161d4:	61bb      	str	r3, [r7, #24]
+ 80161d6:	69bb      	ldr	r3, [r7, #24]
+ 80161d8:	681b      	ldr	r3, [r3, #0]
+ 80161da:	2b00      	cmp	r3, #0
+ 80161dc:	d1f8      	bne.n	80161d0 <tcp_enqueue_flags+0x118>
+    useg->next = seg;
+ 80161de:	69bb      	ldr	r3, [r7, #24]
+ 80161e0:	68fa      	ldr	r2, [r7, #12]
+ 80161e2:	601a      	str	r2, [r3, #0]
+  }
+#if TCP_OVERSIZE
+  /* The new unsent tail has no space */
+  pcb->unsent_oversize = 0;
+ 80161e4:	687b      	ldr	r3, [r7, #4]
+ 80161e6:	2200      	movs	r2, #0
+ 80161e8:	f8a3 2068 	strh.w	r2, [r3, #104]	; 0x68
+#endif /* TCP_OVERSIZE */
+
+  /* SYN and FIN bump the sequence number */
+  if ((flags & TCP_SYN) || (flags & TCP_FIN)) {
+ 80161ec:	78fb      	ldrb	r3, [r7, #3]
+ 80161ee:	f003 0302 	and.w	r3, r3, #2
+ 80161f2:	2b00      	cmp	r3, #0
+ 80161f4:	d104      	bne.n	8016200 <tcp_enqueue_flags+0x148>
+ 80161f6:	78fb      	ldrb	r3, [r7, #3]
+ 80161f8:	f003 0301 	and.w	r3, r3, #1
+ 80161fc:	2b00      	cmp	r3, #0
+ 80161fe:	d004      	beq.n	801620a <tcp_enqueue_flags+0x152>
+    pcb->snd_lbb++;
+ 8016200:	687b      	ldr	r3, [r7, #4]
+ 8016202:	6ddb      	ldr	r3, [r3, #92]	; 0x5c
+ 8016204:	1c5a      	adds	r2, r3, #1
+ 8016206:	687b      	ldr	r3, [r7, #4]
+ 8016208:	65da      	str	r2, [r3, #92]	; 0x5c
+    /* optlen does not influence snd_buf */
+  }
+  if (flags & TCP_FIN) {
+ 801620a:	78fb      	ldrb	r3, [r7, #3]
+ 801620c:	f003 0301 	and.w	r3, r3, #1
+ 8016210:	2b00      	cmp	r3, #0
+ 8016212:	d006      	beq.n	8016222 <tcp_enqueue_flags+0x16a>
+    tcp_set_flags(pcb, TF_FIN);
+ 8016214:	687b      	ldr	r3, [r7, #4]
+ 8016216:	8b5b      	ldrh	r3, [r3, #26]
+ 8016218:	f043 0320 	orr.w	r3, r3, #32
+ 801621c:	b29a      	uxth	r2, r3
+ 801621e:	687b      	ldr	r3, [r7, #4]
+ 8016220:	835a      	strh	r2, [r3, #26]
+  }
+
+  /* update number of segments on the queues */
+  pcb->snd_queuelen += pbuf_clen(seg->p);
+ 8016222:	68fb      	ldr	r3, [r7, #12]
+ 8016224:	685b      	ldr	r3, [r3, #4]
+ 8016226:	4618      	mov	r0, r3
+ 8016228:	f7fb fc44 	bl	8011ab4 <pbuf_clen>
+ 801622c:	4603      	mov	r3, r0
+ 801622e:	461a      	mov	r2, r3
+ 8016230:	687b      	ldr	r3, [r7, #4]
+ 8016232:	f8b3 3066 	ldrh.w	r3, [r3, #102]	; 0x66
+ 8016236:	4413      	add	r3, r2
+ 8016238:	b29a      	uxth	r2, r3
+ 801623a:	687b      	ldr	r3, [r7, #4]
+ 801623c:	f8a3 2066 	strh.w	r2, [r3, #102]	; 0x66
+  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: %"S16_F" (after enqueued)\n", pcb->snd_queuelen));
+  if (pcb->snd_queuelen != 0) {
+ 8016240:	687b      	ldr	r3, [r7, #4]
+ 8016242:	f8b3 3066 	ldrh.w	r3, [r3, #102]	; 0x66
+ 8016246:	2b00      	cmp	r3, #0
+ 8016248:	d00e      	beq.n	8016268 <tcp_enqueue_flags+0x1b0>
+    LWIP_ASSERT("tcp_enqueue_flags: invalid queue length",
+ 801624a:	687b      	ldr	r3, [r7, #4]
+ 801624c:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 801624e:	2b00      	cmp	r3, #0
+ 8016250:	d10a      	bne.n	8016268 <tcp_enqueue_flags+0x1b0>
+ 8016252:	687b      	ldr	r3, [r7, #4]
+ 8016254:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8016256:	2b00      	cmp	r3, #0
+ 8016258:	d106      	bne.n	8016268 <tcp_enqueue_flags+0x1b0>
+ 801625a:	4b06      	ldr	r3, [pc, #24]	; (8016274 <tcp_enqueue_flags+0x1bc>)
+ 801625c:	f240 4266 	movw	r2, #1126	; 0x466
+ 8016260:	490b      	ldr	r1, [pc, #44]	; (8016290 <tcp_enqueue_flags+0x1d8>)
+ 8016262:	4806      	ldr	r0, [pc, #24]	; (801627c <tcp_enqueue_flags+0x1c4>)
+ 8016264:	f006 f8c8 	bl	801c3f8 <iprintf>
+                pcb->unacked != NULL || pcb->unsent != NULL);
+  }
+
+  return ERR_OK;
+ 8016268:	2300      	movs	r3, #0
+}
+ 801626a:	4618      	mov	r0, r3
+ 801626c:	3720      	adds	r7, #32
+ 801626e:	46bd      	mov	sp, r7
+ 8016270:	bd80      	pop	{r7, pc}
+ 8016272:	bf00      	nop
+ 8016274:	0801ee60 	.word	0x0801ee60
+ 8016278:	0801f284 	.word	0x0801f284
+ 801627c:	0801eeb4 	.word	0x0801eeb4
+ 8016280:	0801f2dc 	.word	0x0801f2dc
+ 8016284:	0801f2fc 	.word	0x0801f2fc
+ 8016288:	0801f338 	.word	0x0801f338
+ 801628c:	0801f350 	.word	0x0801f350
+ 8016290:	0801f37c 	.word	0x0801f37c
+
+08016294 <tcp_output>:
+ * @return ERR_OK if data has been sent or nothing to send
+ *         another err_t on error
+ */
+err_t
+tcp_output(struct tcp_pcb *pcb)
+{
+ 8016294:	b5b0      	push	{r4, r5, r7, lr}
+ 8016296:	b08a      	sub	sp, #40	; 0x28
+ 8016298:	af00      	add	r7, sp, #0
+ 801629a:	6078      	str	r0, [r7, #4]
+  s16_t i = 0;
+#endif /* TCP_CWND_DEBUG */
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ASSERT("tcp_output: invalid pcb", pcb != NULL);
+ 801629c:	687b      	ldr	r3, [r7, #4]
+ 801629e:	2b00      	cmp	r3, #0
+ 80162a0:	d106      	bne.n	80162b0 <tcp_output+0x1c>
+ 80162a2:	4ba0      	ldr	r3, [pc, #640]	; (8016524 <tcp_output+0x290>)
+ 80162a4:	f240 42e1 	movw	r2, #1249	; 0x4e1
+ 80162a8:	499f      	ldr	r1, [pc, #636]	; (8016528 <tcp_output+0x294>)
+ 80162aa:	48a0      	ldr	r0, [pc, #640]	; (801652c <tcp_output+0x298>)
+ 80162ac:	f006 f8a4 	bl	801c3f8 <iprintf>
+  /* pcb->state LISTEN not allowed here */
+  LWIP_ASSERT("don't call tcp_output for listen-pcbs",
+ 80162b0:	687b      	ldr	r3, [r7, #4]
+ 80162b2:	7d1b      	ldrb	r3, [r3, #20]
+ 80162b4:	2b01      	cmp	r3, #1
+ 80162b6:	d106      	bne.n	80162c6 <tcp_output+0x32>
+ 80162b8:	4b9a      	ldr	r3, [pc, #616]	; (8016524 <tcp_output+0x290>)
+ 80162ba:	f240 42e4 	movw	r2, #1252	; 0x4e4
+ 80162be:	499c      	ldr	r1, [pc, #624]	; (8016530 <tcp_output+0x29c>)
+ 80162c0:	489a      	ldr	r0, [pc, #616]	; (801652c <tcp_output+0x298>)
+ 80162c2:	f006 f899 	bl	801c3f8 <iprintf>
+
+  /* First, check if we are invoked by the TCP input processing
+     code. If so, we do not output anything. Instead, we rely on the
+     input processing code to call us when input processing is done
+     with. */
+  if (tcp_input_pcb == pcb) {
+ 80162c6:	4b9b      	ldr	r3, [pc, #620]	; (8016534 <tcp_output+0x2a0>)
+ 80162c8:	681b      	ldr	r3, [r3, #0]
+ 80162ca:	687a      	ldr	r2, [r7, #4]
+ 80162cc:	429a      	cmp	r2, r3
+ 80162ce:	d101      	bne.n	80162d4 <tcp_output+0x40>
+    return ERR_OK;
+ 80162d0:	2300      	movs	r3, #0
+ 80162d2:	e1d2      	b.n	801667a <tcp_output+0x3e6>
+  }
+
+  wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd);
+ 80162d4:	687b      	ldr	r3, [r7, #4]
+ 80162d6:	f8b3 2060 	ldrh.w	r2, [r3, #96]	; 0x60
+ 80162da:	687b      	ldr	r3, [r7, #4]
+ 80162dc:	f8b3 3048 	ldrh.w	r3, [r3, #72]	; 0x48
+ 80162e0:	429a      	cmp	r2, r3
+ 80162e2:	d203      	bcs.n	80162ec <tcp_output+0x58>
+ 80162e4:	687b      	ldr	r3, [r7, #4]
+ 80162e6:	f8b3 3060 	ldrh.w	r3, [r3, #96]	; 0x60
+ 80162ea:	e002      	b.n	80162f2 <tcp_output+0x5e>
+ 80162ec:	687b      	ldr	r3, [r7, #4]
+ 80162ee:	f8b3 3048 	ldrh.w	r3, [r3, #72]	; 0x48
+ 80162f2:	61bb      	str	r3, [r7, #24]
+
+  seg = pcb->unsent;
+ 80162f4:	687b      	ldr	r3, [r7, #4]
+ 80162f6:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 80162f8:	627b      	str	r3, [r7, #36]	; 0x24
+
+  if (seg == NULL) {
+ 80162fa:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80162fc:	2b00      	cmp	r3, #0
+ 80162fe:	d10b      	bne.n	8016318 <tcp_output+0x84>
+                                 ", seg == NULL, ack %"U32_F"\n",
+                                 pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack));
+
+    /* If the TF_ACK_NOW flag is set and the ->unsent queue is empty, construct
+     * an empty ACK segment and send it. */
+    if (pcb->flags & TF_ACK_NOW) {
+ 8016300:	687b      	ldr	r3, [r7, #4]
+ 8016302:	8b5b      	ldrh	r3, [r3, #26]
+ 8016304:	f003 0302 	and.w	r3, r3, #2
+ 8016308:	2b00      	cmp	r3, #0
+ 801630a:	f000 81a9 	beq.w	8016660 <tcp_output+0x3cc>
+      return tcp_send_empty_ack(pcb);
+ 801630e:	6878      	ldr	r0, [r7, #4]
+ 8016310:	f000 fdd8 	bl	8016ec4 <tcp_send_empty_ack>
+ 8016314:	4603      	mov	r3, r0
+ 8016316:	e1b0      	b.n	801667a <tcp_output+0x3e6>
+                 pcb->snd_wnd, pcb->cwnd, wnd,
+                 lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len,
+                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack));
+  }
+
+  netif = tcp_route(pcb, &pcb->local_ip, &pcb->remote_ip);
+ 8016318:	6879      	ldr	r1, [r7, #4]
+ 801631a:	687b      	ldr	r3, [r7, #4]
+ 801631c:	3304      	adds	r3, #4
+ 801631e:	461a      	mov	r2, r3
+ 8016320:	6878      	ldr	r0, [r7, #4]
+ 8016322:	f7ff fc77 	bl	8015c14 <tcp_route>
+ 8016326:	6178      	str	r0, [r7, #20]
+  if (netif == NULL) {
+ 8016328:	697b      	ldr	r3, [r7, #20]
+ 801632a:	2b00      	cmp	r3, #0
+ 801632c:	d102      	bne.n	8016334 <tcp_output+0xa0>
+    return ERR_RTE;
+ 801632e:	f06f 0303 	mvn.w	r3, #3
+ 8016332:	e1a2      	b.n	801667a <tcp_output+0x3e6>
+  }
+
+  /* If we don't have a local IP address, we get one from netif */
+  if (ip_addr_isany(&pcb->local_ip)) {
+ 8016334:	687b      	ldr	r3, [r7, #4]
+ 8016336:	2b00      	cmp	r3, #0
+ 8016338:	d003      	beq.n	8016342 <tcp_output+0xae>
+ 801633a:	687b      	ldr	r3, [r7, #4]
+ 801633c:	681b      	ldr	r3, [r3, #0]
+ 801633e:	2b00      	cmp	r3, #0
+ 8016340:	d111      	bne.n	8016366 <tcp_output+0xd2>
+    const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, &pcb->remote_ip);
+ 8016342:	697b      	ldr	r3, [r7, #20]
+ 8016344:	2b00      	cmp	r3, #0
+ 8016346:	d002      	beq.n	801634e <tcp_output+0xba>
+ 8016348:	697b      	ldr	r3, [r7, #20]
+ 801634a:	3304      	adds	r3, #4
+ 801634c:	e000      	b.n	8016350 <tcp_output+0xbc>
+ 801634e:	2300      	movs	r3, #0
+ 8016350:	613b      	str	r3, [r7, #16]
+    if (local_ip == NULL) {
+ 8016352:	693b      	ldr	r3, [r7, #16]
+ 8016354:	2b00      	cmp	r3, #0
+ 8016356:	d102      	bne.n	801635e <tcp_output+0xca>
+      return ERR_RTE;
+ 8016358:	f06f 0303 	mvn.w	r3, #3
+ 801635c:	e18d      	b.n	801667a <tcp_output+0x3e6>
+    }
+    ip_addr_copy(pcb->local_ip, *local_ip);
+ 801635e:	693b      	ldr	r3, [r7, #16]
+ 8016360:	681a      	ldr	r2, [r3, #0]
+ 8016362:	687b      	ldr	r3, [r7, #4]
+ 8016364:	601a      	str	r2, [r3, #0]
+  }
+
+  /* Handle the current segment not fitting within the window */
+  if (lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd) {
+ 8016366:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8016368:	68db      	ldr	r3, [r3, #12]
+ 801636a:	685b      	ldr	r3, [r3, #4]
+ 801636c:	4618      	mov	r0, r3
+ 801636e:	f7f9 ff74 	bl	801025a <lwip_htonl>
+ 8016372:	4602      	mov	r2, r0
+ 8016374:	687b      	ldr	r3, [r7, #4]
+ 8016376:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8016378:	1ad3      	subs	r3, r2, r3
+ 801637a:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 801637c:	8912      	ldrh	r2, [r2, #8]
+ 801637e:	4413      	add	r3, r2
+ 8016380:	69ba      	ldr	r2, [r7, #24]
+ 8016382:	429a      	cmp	r2, r3
+ 8016384:	d227      	bcs.n	80163d6 <tcp_output+0x142>
+     * within the remaining (could be 0) send window and RTO timer is not running (we
+     * have no in-flight data). If window is still too small after persist timer fires,
+     * then we split the segment. We don't consider the congestion window since a cwnd
+     * smaller than 1 SMSS implies in-flight data
+     */
+    if (wnd == pcb->snd_wnd && pcb->unacked == NULL && pcb->persist_backoff == 0) {
+ 8016386:	687b      	ldr	r3, [r7, #4]
+ 8016388:	f8b3 3060 	ldrh.w	r3, [r3, #96]	; 0x60
+ 801638c:	461a      	mov	r2, r3
+ 801638e:	69bb      	ldr	r3, [r7, #24]
+ 8016390:	4293      	cmp	r3, r2
+ 8016392:	d114      	bne.n	80163be <tcp_output+0x12a>
+ 8016394:	687b      	ldr	r3, [r7, #4]
+ 8016396:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8016398:	2b00      	cmp	r3, #0
+ 801639a:	d110      	bne.n	80163be <tcp_output+0x12a>
+ 801639c:	687b      	ldr	r3, [r7, #4]
+ 801639e:	f893 3099 	ldrb.w	r3, [r3, #153]	; 0x99
+ 80163a2:	2b00      	cmp	r3, #0
+ 80163a4:	d10b      	bne.n	80163be <tcp_output+0x12a>
+      pcb->persist_cnt = 0;
+ 80163a6:	687b      	ldr	r3, [r7, #4]
+ 80163a8:	2200      	movs	r2, #0
+ 80163aa:	f883 2098 	strb.w	r2, [r3, #152]	; 0x98
+      pcb->persist_backoff = 1;
+ 80163ae:	687b      	ldr	r3, [r7, #4]
+ 80163b0:	2201      	movs	r2, #1
+ 80163b2:	f883 2099 	strb.w	r2, [r3, #153]	; 0x99
+      pcb->persist_probe = 0;
+ 80163b6:	687b      	ldr	r3, [r7, #4]
+ 80163b8:	2200      	movs	r2, #0
+ 80163ba:	f883 209a 	strb.w	r2, [r3, #154]	; 0x9a
+    }
+    /* We need an ACK, but can't send data now, so send an empty ACK */
+    if (pcb->flags & TF_ACK_NOW) {
+ 80163be:	687b      	ldr	r3, [r7, #4]
+ 80163c0:	8b5b      	ldrh	r3, [r3, #26]
+ 80163c2:	f003 0302 	and.w	r3, r3, #2
+ 80163c6:	2b00      	cmp	r3, #0
+ 80163c8:	f000 814c 	beq.w	8016664 <tcp_output+0x3d0>
+      return tcp_send_empty_ack(pcb);
+ 80163cc:	6878      	ldr	r0, [r7, #4]
+ 80163ce:	f000 fd79 	bl	8016ec4 <tcp_send_empty_ack>
+ 80163d2:	4603      	mov	r3, r0
+ 80163d4:	e151      	b.n	801667a <tcp_output+0x3e6>
+    }
+    goto output_done;
+  }
+  /* Stop persist timer, above conditions are not active */
+  pcb->persist_backoff = 0;
+ 80163d6:	687b      	ldr	r3, [r7, #4]
+ 80163d8:	2200      	movs	r2, #0
+ 80163da:	f883 2099 	strb.w	r2, [r3, #153]	; 0x99
+
+  /* useg should point to last segment on unacked queue */
+  useg = pcb->unacked;
+ 80163de:	687b      	ldr	r3, [r7, #4]
+ 80163e0:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80163e2:	623b      	str	r3, [r7, #32]
+  if (useg != NULL) {
+ 80163e4:	6a3b      	ldr	r3, [r7, #32]
+ 80163e6:	2b00      	cmp	r3, #0
+ 80163e8:	f000 811b 	beq.w	8016622 <tcp_output+0x38e>
+    for (; useg->next != NULL; useg = useg->next);
+ 80163ec:	e002      	b.n	80163f4 <tcp_output+0x160>
+ 80163ee:	6a3b      	ldr	r3, [r7, #32]
+ 80163f0:	681b      	ldr	r3, [r3, #0]
+ 80163f2:	623b      	str	r3, [r7, #32]
+ 80163f4:	6a3b      	ldr	r3, [r7, #32]
+ 80163f6:	681b      	ldr	r3, [r3, #0]
+ 80163f8:	2b00      	cmp	r3, #0
+ 80163fa:	d1f8      	bne.n	80163ee <tcp_output+0x15a>
+  }
+  /* data available and window allows it to be sent? */
+  while (seg != NULL &&
+ 80163fc:	e111      	b.n	8016622 <tcp_output+0x38e>
+         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
+    LWIP_ASSERT("RST not expected here!",
+ 80163fe:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8016400:	68db      	ldr	r3, [r3, #12]
+ 8016402:	899b      	ldrh	r3, [r3, #12]
+ 8016404:	b29b      	uxth	r3, r3
+ 8016406:	4618      	mov	r0, r3
+ 8016408:	f7f9 ff12 	bl	8010230 <lwip_htons>
+ 801640c:	4603      	mov	r3, r0
+ 801640e:	b2db      	uxtb	r3, r3
+ 8016410:	f003 0304 	and.w	r3, r3, #4
+ 8016414:	2b00      	cmp	r3, #0
+ 8016416:	d006      	beq.n	8016426 <tcp_output+0x192>
+ 8016418:	4b42      	ldr	r3, [pc, #264]	; (8016524 <tcp_output+0x290>)
+ 801641a:	f240 5237 	movw	r2, #1335	; 0x537
+ 801641e:	4946      	ldr	r1, [pc, #280]	; (8016538 <tcp_output+0x2a4>)
+ 8016420:	4842      	ldr	r0, [pc, #264]	; (801652c <tcp_output+0x298>)
+ 8016422:	f005 ffe9 	bl	801c3f8 <iprintf>
+     * - if tcp_write had a memory error before (prevent delayed ACK timeout) or
+     * - if FIN was already enqueued for this PCB (SYN is always alone in a segment -
+     *   either seg->next != NULL or pcb->unacked == NULL;
+     *   RST is no sent using tcp_write/tcp_output.
+     */
+    if ((tcp_do_output_nagle(pcb) == 0) &&
+ 8016426:	687b      	ldr	r3, [r7, #4]
+ 8016428:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 801642a:	2b00      	cmp	r3, #0
+ 801642c:	d01f      	beq.n	801646e <tcp_output+0x1da>
+ 801642e:	687b      	ldr	r3, [r7, #4]
+ 8016430:	8b5b      	ldrh	r3, [r3, #26]
+ 8016432:	f003 0344 	and.w	r3, r3, #68	; 0x44
+ 8016436:	2b00      	cmp	r3, #0
+ 8016438:	d119      	bne.n	801646e <tcp_output+0x1da>
+ 801643a:	687b      	ldr	r3, [r7, #4]
+ 801643c:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 801643e:	2b00      	cmp	r3, #0
+ 8016440:	d00b      	beq.n	801645a <tcp_output+0x1c6>
+ 8016442:	687b      	ldr	r3, [r7, #4]
+ 8016444:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8016446:	681b      	ldr	r3, [r3, #0]
+ 8016448:	2b00      	cmp	r3, #0
+ 801644a:	d110      	bne.n	801646e <tcp_output+0x1da>
+ 801644c:	687b      	ldr	r3, [r7, #4]
+ 801644e:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8016450:	891a      	ldrh	r2, [r3, #8]
+ 8016452:	687b      	ldr	r3, [r7, #4]
+ 8016454:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8016456:	429a      	cmp	r2, r3
+ 8016458:	d209      	bcs.n	801646e <tcp_output+0x1da>
+ 801645a:	687b      	ldr	r3, [r7, #4]
+ 801645c:	f8b3 3064 	ldrh.w	r3, [r3, #100]	; 0x64
+ 8016460:	2b00      	cmp	r3, #0
+ 8016462:	d004      	beq.n	801646e <tcp_output+0x1da>
+ 8016464:	687b      	ldr	r3, [r7, #4]
+ 8016466:	f8b3 3066 	ldrh.w	r3, [r3, #102]	; 0x66
+ 801646a:	2b08      	cmp	r3, #8
+ 801646c:	d901      	bls.n	8016472 <tcp_output+0x1de>
+ 801646e:	2301      	movs	r3, #1
+ 8016470:	e000      	b.n	8016474 <tcp_output+0x1e0>
+ 8016472:	2300      	movs	r3, #0
+ 8016474:	2b00      	cmp	r3, #0
+ 8016476:	d106      	bne.n	8016486 <tcp_output+0x1f2>
+        ((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)) {
+ 8016478:	687b      	ldr	r3, [r7, #4]
+ 801647a:	8b5b      	ldrh	r3, [r3, #26]
+ 801647c:	f003 03a0 	and.w	r3, r3, #160	; 0xa0
+    if ((tcp_do_output_nagle(pcb) == 0) &&
+ 8016480:	2b00      	cmp	r3, #0
+ 8016482:	f000 80e3 	beq.w	801664c <tcp_output+0x3b8>
+                                 pcb->lastack,
+                                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack, i));
+    ++i;
+#endif /* TCP_CWND_DEBUG */
+
+    if (pcb->state != SYN_SENT) {
+ 8016486:	687b      	ldr	r3, [r7, #4]
+ 8016488:	7d1b      	ldrb	r3, [r3, #20]
+ 801648a:	2b02      	cmp	r3, #2
+ 801648c:	d00d      	beq.n	80164aa <tcp_output+0x216>
+      TCPH_SET_FLAG(seg->tcphdr, TCP_ACK);
+ 801648e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8016490:	68db      	ldr	r3, [r3, #12]
+ 8016492:	899b      	ldrh	r3, [r3, #12]
+ 8016494:	b29c      	uxth	r4, r3
+ 8016496:	2010      	movs	r0, #16
+ 8016498:	f7f9 feca 	bl	8010230 <lwip_htons>
+ 801649c:	4603      	mov	r3, r0
+ 801649e:	461a      	mov	r2, r3
+ 80164a0:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80164a2:	68db      	ldr	r3, [r3, #12]
+ 80164a4:	4322      	orrs	r2, r4
+ 80164a6:	b292      	uxth	r2, r2
+ 80164a8:	819a      	strh	r2, [r3, #12]
+    }
+
+    err = tcp_output_segment(seg, pcb, netif);
+ 80164aa:	697a      	ldr	r2, [r7, #20]
+ 80164ac:	6879      	ldr	r1, [r7, #4]
+ 80164ae:	6a78      	ldr	r0, [r7, #36]	; 0x24
+ 80164b0:	f000 f908 	bl	80166c4 <tcp_output_segment>
+ 80164b4:	4603      	mov	r3, r0
+ 80164b6:	73fb      	strb	r3, [r7, #15]
+    if (err != ERR_OK) {
+ 80164b8:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 80164bc:	2b00      	cmp	r3, #0
+ 80164be:	d009      	beq.n	80164d4 <tcp_output+0x240>
+      /* segment could not be sent, for whatever reason */
+      tcp_set_flags(pcb, TF_NAGLEMEMERR);
+ 80164c0:	687b      	ldr	r3, [r7, #4]
+ 80164c2:	8b5b      	ldrh	r3, [r3, #26]
+ 80164c4:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 80164c8:	b29a      	uxth	r2, r3
+ 80164ca:	687b      	ldr	r3, [r7, #4]
+ 80164cc:	835a      	strh	r2, [r3, #26]
+      return err;
+ 80164ce:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 80164d2:	e0d2      	b.n	801667a <tcp_output+0x3e6>
+    }
+#if TCP_OVERSIZE_DBGCHECK
+    seg->oversize_left = 0;
+#endif /* TCP_OVERSIZE_DBGCHECK */
+    pcb->unsent = seg->next;
+ 80164d4:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80164d6:	681a      	ldr	r2, [r3, #0]
+ 80164d8:	687b      	ldr	r3, [r7, #4]
+ 80164da:	66da      	str	r2, [r3, #108]	; 0x6c
+    if (pcb->state != SYN_SENT) {
+ 80164dc:	687b      	ldr	r3, [r7, #4]
+ 80164de:	7d1b      	ldrb	r3, [r3, #20]
+ 80164e0:	2b02      	cmp	r3, #2
+ 80164e2:	d006      	beq.n	80164f2 <tcp_output+0x25e>
+      tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
+ 80164e4:	687b      	ldr	r3, [r7, #4]
+ 80164e6:	8b5b      	ldrh	r3, [r3, #26]
+ 80164e8:	f023 0303 	bic.w	r3, r3, #3
+ 80164ec:	b29a      	uxth	r2, r3
+ 80164ee:	687b      	ldr	r3, [r7, #4]
+ 80164f0:	835a      	strh	r2, [r3, #26]
+    }
+    snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
+ 80164f2:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80164f4:	68db      	ldr	r3, [r3, #12]
+ 80164f6:	685b      	ldr	r3, [r3, #4]
+ 80164f8:	4618      	mov	r0, r3
+ 80164fa:	f7f9 feae 	bl	801025a <lwip_htonl>
+ 80164fe:	4604      	mov	r4, r0
+ 8016500:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8016502:	891b      	ldrh	r3, [r3, #8]
+ 8016504:	461d      	mov	r5, r3
+ 8016506:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8016508:	68db      	ldr	r3, [r3, #12]
+ 801650a:	899b      	ldrh	r3, [r3, #12]
+ 801650c:	b29b      	uxth	r3, r3
+ 801650e:	4618      	mov	r0, r3
+ 8016510:	f7f9 fe8e 	bl	8010230 <lwip_htons>
+ 8016514:	4603      	mov	r3, r0
+ 8016516:	b2db      	uxtb	r3, r3
+ 8016518:	f003 0303 	and.w	r3, r3, #3
+ 801651c:	2b00      	cmp	r3, #0
+ 801651e:	d00d      	beq.n	801653c <tcp_output+0x2a8>
+ 8016520:	2301      	movs	r3, #1
+ 8016522:	e00c      	b.n	801653e <tcp_output+0x2aa>
+ 8016524:	0801ee60 	.word	0x0801ee60
+ 8016528:	0801f3a4 	.word	0x0801f3a4
+ 801652c:	0801eeb4 	.word	0x0801eeb4
+ 8016530:	0801f3bc 	.word	0x0801f3bc
+ 8016534:	2000f7fc 	.word	0x2000f7fc
+ 8016538:	0801f3e4 	.word	0x0801f3e4
+ 801653c:	2300      	movs	r3, #0
+ 801653e:	442b      	add	r3, r5
+ 8016540:	4423      	add	r3, r4
+ 8016542:	60bb      	str	r3, [r7, #8]
+    if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
+ 8016544:	687b      	ldr	r3, [r7, #4]
+ 8016546:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 8016548:	68bb      	ldr	r3, [r7, #8]
+ 801654a:	1ad3      	subs	r3, r2, r3
+ 801654c:	2b00      	cmp	r3, #0
+ 801654e:	da02      	bge.n	8016556 <tcp_output+0x2c2>
+      pcb->snd_nxt = snd_nxt;
+ 8016550:	687b      	ldr	r3, [r7, #4]
+ 8016552:	68ba      	ldr	r2, [r7, #8]
+ 8016554:	651a      	str	r2, [r3, #80]	; 0x50
+    }
+    /* put segment on unacknowledged list if length > 0 */
+    if (TCP_TCPLEN(seg) > 0) {
+ 8016556:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8016558:	891b      	ldrh	r3, [r3, #8]
+ 801655a:	461c      	mov	r4, r3
+ 801655c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801655e:	68db      	ldr	r3, [r3, #12]
+ 8016560:	899b      	ldrh	r3, [r3, #12]
+ 8016562:	b29b      	uxth	r3, r3
+ 8016564:	4618      	mov	r0, r3
+ 8016566:	f7f9 fe63 	bl	8010230 <lwip_htons>
+ 801656a:	4603      	mov	r3, r0
+ 801656c:	b2db      	uxtb	r3, r3
+ 801656e:	f003 0303 	and.w	r3, r3, #3
+ 8016572:	2b00      	cmp	r3, #0
+ 8016574:	d001      	beq.n	801657a <tcp_output+0x2e6>
+ 8016576:	2301      	movs	r3, #1
+ 8016578:	e000      	b.n	801657c <tcp_output+0x2e8>
+ 801657a:	2300      	movs	r3, #0
+ 801657c:	4423      	add	r3, r4
+ 801657e:	2b00      	cmp	r3, #0
+ 8016580:	d049      	beq.n	8016616 <tcp_output+0x382>
+      seg->next = NULL;
+ 8016582:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8016584:	2200      	movs	r2, #0
+ 8016586:	601a      	str	r2, [r3, #0]
+      /* unacked list is empty? */
+      if (pcb->unacked == NULL) {
+ 8016588:	687b      	ldr	r3, [r7, #4]
+ 801658a:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 801658c:	2b00      	cmp	r3, #0
+ 801658e:	d105      	bne.n	801659c <tcp_output+0x308>
+        pcb->unacked = seg;
+ 8016590:	687b      	ldr	r3, [r7, #4]
+ 8016592:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 8016594:	671a      	str	r2, [r3, #112]	; 0x70
+        useg = seg;
+ 8016596:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8016598:	623b      	str	r3, [r7, #32]
+ 801659a:	e03f      	b.n	801661c <tcp_output+0x388>
+        /* unacked list is not empty? */
+      } else {
+        /* In the case of fast retransmit, the packet should not go to the tail
+         * of the unacked queue, but rather somewhere before it. We need to check for
+         * this case. -STJ Jul 27, 2004 */
+        if (TCP_SEQ_LT(lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(useg->tcphdr->seqno))) {
+ 801659c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801659e:	68db      	ldr	r3, [r3, #12]
+ 80165a0:	685b      	ldr	r3, [r3, #4]
+ 80165a2:	4618      	mov	r0, r3
+ 80165a4:	f7f9 fe59 	bl	801025a <lwip_htonl>
+ 80165a8:	4604      	mov	r4, r0
+ 80165aa:	6a3b      	ldr	r3, [r7, #32]
+ 80165ac:	68db      	ldr	r3, [r3, #12]
+ 80165ae:	685b      	ldr	r3, [r3, #4]
+ 80165b0:	4618      	mov	r0, r3
+ 80165b2:	f7f9 fe52 	bl	801025a <lwip_htonl>
+ 80165b6:	4603      	mov	r3, r0
+ 80165b8:	1ae3      	subs	r3, r4, r3
+ 80165ba:	2b00      	cmp	r3, #0
+ 80165bc:	da24      	bge.n	8016608 <tcp_output+0x374>
+          /* add segment to before tail of unacked list, keeping the list sorted */
+          struct tcp_seg **cur_seg = &(pcb->unacked);
+ 80165be:	687b      	ldr	r3, [r7, #4]
+ 80165c0:	3370      	adds	r3, #112	; 0x70
+ 80165c2:	61fb      	str	r3, [r7, #28]
+          while (*cur_seg &&
+ 80165c4:	e002      	b.n	80165cc <tcp_output+0x338>
+                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
+            cur_seg = &((*cur_seg)->next );
+ 80165c6:	69fb      	ldr	r3, [r7, #28]
+ 80165c8:	681b      	ldr	r3, [r3, #0]
+ 80165ca:	61fb      	str	r3, [r7, #28]
+          while (*cur_seg &&
+ 80165cc:	69fb      	ldr	r3, [r7, #28]
+ 80165ce:	681b      	ldr	r3, [r3, #0]
+ 80165d0:	2b00      	cmp	r3, #0
+ 80165d2:	d011      	beq.n	80165f8 <tcp_output+0x364>
+                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
+ 80165d4:	69fb      	ldr	r3, [r7, #28]
+ 80165d6:	681b      	ldr	r3, [r3, #0]
+ 80165d8:	68db      	ldr	r3, [r3, #12]
+ 80165da:	685b      	ldr	r3, [r3, #4]
+ 80165dc:	4618      	mov	r0, r3
+ 80165de:	f7f9 fe3c 	bl	801025a <lwip_htonl>
+ 80165e2:	4604      	mov	r4, r0
+ 80165e4:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80165e6:	68db      	ldr	r3, [r3, #12]
+ 80165e8:	685b      	ldr	r3, [r3, #4]
+ 80165ea:	4618      	mov	r0, r3
+ 80165ec:	f7f9 fe35 	bl	801025a <lwip_htonl>
+ 80165f0:	4603      	mov	r3, r0
+ 80165f2:	1ae3      	subs	r3, r4, r3
+          while (*cur_seg &&
+ 80165f4:	2b00      	cmp	r3, #0
+ 80165f6:	dbe6      	blt.n	80165c6 <tcp_output+0x332>
+          }
+          seg->next = (*cur_seg);
+ 80165f8:	69fb      	ldr	r3, [r7, #28]
+ 80165fa:	681a      	ldr	r2, [r3, #0]
+ 80165fc:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80165fe:	601a      	str	r2, [r3, #0]
+          (*cur_seg) = seg;
+ 8016600:	69fb      	ldr	r3, [r7, #28]
+ 8016602:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 8016604:	601a      	str	r2, [r3, #0]
+ 8016606:	e009      	b.n	801661c <tcp_output+0x388>
+        } else {
+          /* add segment to tail of unacked list */
+          useg->next = seg;
+ 8016608:	6a3b      	ldr	r3, [r7, #32]
+ 801660a:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 801660c:	601a      	str	r2, [r3, #0]
+          useg = useg->next;
+ 801660e:	6a3b      	ldr	r3, [r7, #32]
+ 8016610:	681b      	ldr	r3, [r3, #0]
+ 8016612:	623b      	str	r3, [r7, #32]
+ 8016614:	e002      	b.n	801661c <tcp_output+0x388>
+        }
+      }
+      /* do not queue empty segments on the unacked list */
+    } else {
+      tcp_seg_free(seg);
+ 8016616:	6a78      	ldr	r0, [r7, #36]	; 0x24
+ 8016618:	f7fc fc42 	bl	8012ea0 <tcp_seg_free>
+    }
+    seg = pcb->unsent;
+ 801661c:	687b      	ldr	r3, [r7, #4]
+ 801661e:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8016620:	627b      	str	r3, [r7, #36]	; 0x24
+  while (seg != NULL &&
+ 8016622:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8016624:	2b00      	cmp	r3, #0
+ 8016626:	d012      	beq.n	801664e <tcp_output+0x3ba>
+         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
+ 8016628:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801662a:	68db      	ldr	r3, [r3, #12]
+ 801662c:	685b      	ldr	r3, [r3, #4]
+ 801662e:	4618      	mov	r0, r3
+ 8016630:	f7f9 fe13 	bl	801025a <lwip_htonl>
+ 8016634:	4602      	mov	r2, r0
+ 8016636:	687b      	ldr	r3, [r7, #4]
+ 8016638:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 801663a:	1ad3      	subs	r3, r2, r3
+ 801663c:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 801663e:	8912      	ldrh	r2, [r2, #8]
+ 8016640:	4413      	add	r3, r2
+  while (seg != NULL &&
+ 8016642:	69ba      	ldr	r2, [r7, #24]
+ 8016644:	429a      	cmp	r2, r3
+ 8016646:	f4bf aeda 	bcs.w	80163fe <tcp_output+0x16a>
+ 801664a:	e000      	b.n	801664e <tcp_output+0x3ba>
+      break;
+ 801664c:	bf00      	nop
+  }
+#if TCP_OVERSIZE
+  if (pcb->unsent == NULL) {
+ 801664e:	687b      	ldr	r3, [r7, #4]
+ 8016650:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 8016652:	2b00      	cmp	r3, #0
+ 8016654:	d108      	bne.n	8016668 <tcp_output+0x3d4>
+    /* last unsent has been removed, reset unsent_oversize */
+    pcb->unsent_oversize = 0;
+ 8016656:	687b      	ldr	r3, [r7, #4]
+ 8016658:	2200      	movs	r2, #0
+ 801665a:	f8a3 2068 	strh.w	r2, [r3, #104]	; 0x68
+ 801665e:	e004      	b.n	801666a <tcp_output+0x3d6>
+    goto output_done;
+ 8016660:	bf00      	nop
+ 8016662:	e002      	b.n	801666a <tcp_output+0x3d6>
+    goto output_done;
+ 8016664:	bf00      	nop
+ 8016666:	e000      	b.n	801666a <tcp_output+0x3d6>
+  }
+#endif /* TCP_OVERSIZE */
+
+output_done:
+ 8016668:	bf00      	nop
+  tcp_clear_flags(pcb, TF_NAGLEMEMERR);
+ 801666a:	687b      	ldr	r3, [r7, #4]
+ 801666c:	8b5b      	ldrh	r3, [r3, #26]
+ 801666e:	f023 0380 	bic.w	r3, r3, #128	; 0x80
+ 8016672:	b29a      	uxth	r2, r3
+ 8016674:	687b      	ldr	r3, [r7, #4]
+ 8016676:	835a      	strh	r2, [r3, #26]
+  return ERR_OK;
+ 8016678:	2300      	movs	r3, #0
+}
+ 801667a:	4618      	mov	r0, r3
+ 801667c:	3728      	adds	r7, #40	; 0x28
+ 801667e:	46bd      	mov	sp, r7
+ 8016680:	bdb0      	pop	{r4, r5, r7, pc}
+ 8016682:	bf00      	nop
+
+08016684 <tcp_output_segment_busy>:
+ * @arg seg the tcp segment to check
+ * @return 1 if ref != 1, 0 if ref == 1
+ */
+static int
+tcp_output_segment_busy(const struct tcp_seg *seg)
+{
+ 8016684:	b580      	push	{r7, lr}
+ 8016686:	b082      	sub	sp, #8
+ 8016688:	af00      	add	r7, sp, #0
+ 801668a:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT("tcp_output_segment_busy: invalid seg", seg != NULL);
+ 801668c:	687b      	ldr	r3, [r7, #4]
+ 801668e:	2b00      	cmp	r3, #0
+ 8016690:	d106      	bne.n	80166a0 <tcp_output_segment_busy+0x1c>
+ 8016692:	4b09      	ldr	r3, [pc, #36]	; (80166b8 <tcp_output_segment_busy+0x34>)
+ 8016694:	f240 529a 	movw	r2, #1434	; 0x59a
+ 8016698:	4908      	ldr	r1, [pc, #32]	; (80166bc <tcp_output_segment_busy+0x38>)
+ 801669a:	4809      	ldr	r0, [pc, #36]	; (80166c0 <tcp_output_segment_busy+0x3c>)
+ 801669c:	f005 feac 	bl	801c3f8 <iprintf>
+
+  /* We only need to check the first pbuf here:
+     If a pbuf is queued for transmission, a driver calls pbuf_ref(),
+     which only changes the ref count of the first pbuf */
+  if (seg->p->ref != 1) {
+ 80166a0:	687b      	ldr	r3, [r7, #4]
+ 80166a2:	685b      	ldr	r3, [r3, #4]
+ 80166a4:	7b9b      	ldrb	r3, [r3, #14]
+ 80166a6:	2b01      	cmp	r3, #1
+ 80166a8:	d001      	beq.n	80166ae <tcp_output_segment_busy+0x2a>
+    /* other reference found */
+    return 1;
+ 80166aa:	2301      	movs	r3, #1
+ 80166ac:	e000      	b.n	80166b0 <tcp_output_segment_busy+0x2c>
+  }
+  /* no other references found */
+  return 0;
+ 80166ae:	2300      	movs	r3, #0
+}
+ 80166b0:	4618      	mov	r0, r3
+ 80166b2:	3708      	adds	r7, #8
+ 80166b4:	46bd      	mov	sp, r7
+ 80166b6:	bd80      	pop	{r7, pc}
+ 80166b8:	0801ee60 	.word	0x0801ee60
+ 80166bc:	0801f3fc 	.word	0x0801f3fc
+ 80166c0:	0801eeb4 	.word	0x0801eeb4
+
+080166c4 <tcp_output_segment>:
+ * @param pcb the tcp_pcb for the TCP connection used to send the segment
+ * @param netif the netif used to send the segment
+ */
+static err_t
+tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif)
+{
+ 80166c4:	b5b0      	push	{r4, r5, r7, lr}
+ 80166c6:	b08c      	sub	sp, #48	; 0x30
+ 80166c8:	af04      	add	r7, sp, #16
+ 80166ca:	60f8      	str	r0, [r7, #12]
+ 80166cc:	60b9      	str	r1, [r7, #8]
+ 80166ce:	607a      	str	r2, [r7, #4]
+  u32_t *opts;
+#if TCP_CHECKSUM_ON_COPY
+  int seg_chksum_was_swapped = 0;
+#endif
+
+  LWIP_ASSERT("tcp_output_segment: invalid seg", seg != NULL);
+ 80166d0:	68fb      	ldr	r3, [r7, #12]
+ 80166d2:	2b00      	cmp	r3, #0
+ 80166d4:	d106      	bne.n	80166e4 <tcp_output_segment+0x20>
+ 80166d6:	4b64      	ldr	r3, [pc, #400]	; (8016868 <tcp_output_segment+0x1a4>)
+ 80166d8:	f44f 62b7 	mov.w	r2, #1464	; 0x5b8
+ 80166dc:	4963      	ldr	r1, [pc, #396]	; (801686c <tcp_output_segment+0x1a8>)
+ 80166de:	4864      	ldr	r0, [pc, #400]	; (8016870 <tcp_output_segment+0x1ac>)
+ 80166e0:	f005 fe8a 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("tcp_output_segment: invalid pcb", pcb != NULL);
+ 80166e4:	68bb      	ldr	r3, [r7, #8]
+ 80166e6:	2b00      	cmp	r3, #0
+ 80166e8:	d106      	bne.n	80166f8 <tcp_output_segment+0x34>
+ 80166ea:	4b5f      	ldr	r3, [pc, #380]	; (8016868 <tcp_output_segment+0x1a4>)
+ 80166ec:	f240 52b9 	movw	r2, #1465	; 0x5b9
+ 80166f0:	4960      	ldr	r1, [pc, #384]	; (8016874 <tcp_output_segment+0x1b0>)
+ 80166f2:	485f      	ldr	r0, [pc, #380]	; (8016870 <tcp_output_segment+0x1ac>)
+ 80166f4:	f005 fe80 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("tcp_output_segment: invalid netif", netif != NULL);
+ 80166f8:	687b      	ldr	r3, [r7, #4]
+ 80166fa:	2b00      	cmp	r3, #0
+ 80166fc:	d106      	bne.n	801670c <tcp_output_segment+0x48>
+ 80166fe:	4b5a      	ldr	r3, [pc, #360]	; (8016868 <tcp_output_segment+0x1a4>)
+ 8016700:	f240 52ba 	movw	r2, #1466	; 0x5ba
+ 8016704:	495c      	ldr	r1, [pc, #368]	; (8016878 <tcp_output_segment+0x1b4>)
+ 8016706:	485a      	ldr	r0, [pc, #360]	; (8016870 <tcp_output_segment+0x1ac>)
+ 8016708:	f005 fe76 	bl	801c3f8 <iprintf>
+
+  if (tcp_output_segment_busy(seg)) {
+ 801670c:	68f8      	ldr	r0, [r7, #12]
+ 801670e:	f7ff ffb9 	bl	8016684 <tcp_output_segment_busy>
+ 8016712:	4603      	mov	r3, r0
+ 8016714:	2b00      	cmp	r3, #0
+ 8016716:	d001      	beq.n	801671c <tcp_output_segment+0x58>
+    /* This should not happen: rexmit functions should have checked this.
+       However, since this function modifies p->len, we must not continue in this case. */
+    LWIP_DEBUGF(TCP_RTO_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_output_segment: segment busy\n"));
+    return ERR_OK;
+ 8016718:	2300      	movs	r3, #0
+ 801671a:	e0a0      	b.n	801685e <tcp_output_segment+0x19a>
+  }
+
+  /* The TCP header has already been constructed, but the ackno and
+   wnd fields remain. */
+  seg->tcphdr->ackno = lwip_htonl(pcb->rcv_nxt);
+ 801671c:	68bb      	ldr	r3, [r7, #8]
+ 801671e:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 8016720:	68fb      	ldr	r3, [r7, #12]
+ 8016722:	68dc      	ldr	r4, [r3, #12]
+ 8016724:	4610      	mov	r0, r2
+ 8016726:	f7f9 fd98 	bl	801025a <lwip_htonl>
+ 801672a:	4603      	mov	r3, r0
+ 801672c:	60a3      	str	r3, [r4, #8]
+       the window scale option) is never scaled. */
+    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(pcb->rcv_ann_wnd));
+  } else
+#endif /* LWIP_WND_SCALE */
+  {
+    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
+ 801672e:	68bb      	ldr	r3, [r7, #8]
+ 8016730:	8d5a      	ldrh	r2, [r3, #42]	; 0x2a
+ 8016732:	68fb      	ldr	r3, [r7, #12]
+ 8016734:	68dc      	ldr	r4, [r3, #12]
+ 8016736:	4610      	mov	r0, r2
+ 8016738:	f7f9 fd7a 	bl	8010230 <lwip_htons>
+ 801673c:	4603      	mov	r3, r0
+ 801673e:	81e3      	strh	r3, [r4, #14]
+  }
+
+  pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
+ 8016740:	68bb      	ldr	r3, [r7, #8]
+ 8016742:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8016744:	68ba      	ldr	r2, [r7, #8]
+ 8016746:	8d52      	ldrh	r2, [r2, #42]	; 0x2a
+ 8016748:	441a      	add	r2, r3
+ 801674a:	68bb      	ldr	r3, [r7, #8]
+ 801674c:	62da      	str	r2, [r3, #44]	; 0x2c
+
+  /* Add any requested options.  NB MSS option is only set on SYN
+     packets, so ignore it here */
+  /* cast through void* to get rid of alignment warnings */
+  opts = (u32_t *)(void *)(seg->tcphdr + 1);
+ 801674e:	68fb      	ldr	r3, [r7, #12]
+ 8016750:	68db      	ldr	r3, [r3, #12]
+ 8016752:	3314      	adds	r3, #20
+ 8016754:	61fb      	str	r3, [r7, #28]
+  if (seg->flags & TF_SEG_OPTS_MSS) {
+ 8016756:	68fb      	ldr	r3, [r7, #12]
+ 8016758:	7a9b      	ldrb	r3, [r3, #10]
+ 801675a:	f003 0301 	and.w	r3, r3, #1
+ 801675e:	2b00      	cmp	r3, #0
+ 8016760:	d015      	beq.n	801678e <tcp_output_segment+0xca>
+    u16_t mss;
+#if TCP_CALCULATE_EFF_SEND_MSS
+    mss = tcp_eff_send_mss_netif(TCP_MSS, netif, &pcb->remote_ip);
+ 8016762:	68bb      	ldr	r3, [r7, #8]
+ 8016764:	3304      	adds	r3, #4
+ 8016766:	461a      	mov	r2, r3
+ 8016768:	6879      	ldr	r1, [r7, #4]
+ 801676a:	f44f 7006 	mov.w	r0, #536	; 0x218
+ 801676e:	f7fc fe8d 	bl	801348c <tcp_eff_send_mss_netif>
+ 8016772:	4603      	mov	r3, r0
+ 8016774:	837b      	strh	r3, [r7, #26]
+#else /* TCP_CALCULATE_EFF_SEND_MSS */
+    mss = TCP_MSS;
+#endif /* TCP_CALCULATE_EFF_SEND_MSS */
+    *opts = TCP_BUILD_MSS_OPTION(mss);
+ 8016776:	8b7b      	ldrh	r3, [r7, #26]
+ 8016778:	f043 7301 	orr.w	r3, r3, #33816576	; 0x2040000
+ 801677c:	4618      	mov	r0, r3
+ 801677e:	f7f9 fd6c 	bl	801025a <lwip_htonl>
+ 8016782:	4602      	mov	r2, r0
+ 8016784:	69fb      	ldr	r3, [r7, #28]
+ 8016786:	601a      	str	r2, [r3, #0]
+    opts += 1;
+ 8016788:	69fb      	ldr	r3, [r7, #28]
+ 801678a:	3304      	adds	r3, #4
+ 801678c:	61fb      	str	r3, [r7, #28]
+  }
+#endif
+
+  /* Set retransmission timer running if it is not currently enabled
+     This must be set before checking the route. */
+  if (pcb->rtime < 0) {
+ 801678e:	68bb      	ldr	r3, [r7, #8]
+ 8016790:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	; 0x30
+ 8016794:	2b00      	cmp	r3, #0
+ 8016796:	da02      	bge.n	801679e <tcp_output_segment+0xda>
+    pcb->rtime = 0;
+ 8016798:	68bb      	ldr	r3, [r7, #8]
+ 801679a:	2200      	movs	r2, #0
+ 801679c:	861a      	strh	r2, [r3, #48]	; 0x30
+  }
+
+  if (pcb->rttest == 0) {
+ 801679e:	68bb      	ldr	r3, [r7, #8]
+ 80167a0:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 80167a2:	2b00      	cmp	r3, #0
+ 80167a4:	d10c      	bne.n	80167c0 <tcp_output_segment+0xfc>
+    pcb->rttest = tcp_ticks;
+ 80167a6:	4b35      	ldr	r3, [pc, #212]	; (801687c <tcp_output_segment+0x1b8>)
+ 80167a8:	681a      	ldr	r2, [r3, #0]
+ 80167aa:	68bb      	ldr	r3, [r7, #8]
+ 80167ac:	635a      	str	r2, [r3, #52]	; 0x34
+    pcb->rtseq = lwip_ntohl(seg->tcphdr->seqno);
+ 80167ae:	68fb      	ldr	r3, [r7, #12]
+ 80167b0:	68db      	ldr	r3, [r3, #12]
+ 80167b2:	685b      	ldr	r3, [r3, #4]
+ 80167b4:	4618      	mov	r0, r3
+ 80167b6:	f7f9 fd50 	bl	801025a <lwip_htonl>
+ 80167ba:	4602      	mov	r2, r0
+ 80167bc:	68bb      	ldr	r3, [r7, #8]
+ 80167be:	639a      	str	r2, [r3, #56]	; 0x38
+  }
+  LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n",
+                                 lwip_htonl(seg->tcphdr->seqno), lwip_htonl(seg->tcphdr->seqno) +
+                                 seg->len));
+
+  len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload);
+ 80167c0:	68fb      	ldr	r3, [r7, #12]
+ 80167c2:	68db      	ldr	r3, [r3, #12]
+ 80167c4:	461a      	mov	r2, r3
+ 80167c6:	68fb      	ldr	r3, [r7, #12]
+ 80167c8:	685b      	ldr	r3, [r3, #4]
+ 80167ca:	685b      	ldr	r3, [r3, #4]
+ 80167cc:	1ad3      	subs	r3, r2, r3
+ 80167ce:	833b      	strh	r3, [r7, #24]
+  if (len == 0) {
+    /** Exclude retransmitted segments from this count. */
+    MIB2_STATS_INC(mib2.tcpoutsegs);
+  }
+
+  seg->p->len -= len;
+ 80167d0:	68fb      	ldr	r3, [r7, #12]
+ 80167d2:	685b      	ldr	r3, [r3, #4]
+ 80167d4:	8959      	ldrh	r1, [r3, #10]
+ 80167d6:	68fb      	ldr	r3, [r7, #12]
+ 80167d8:	685b      	ldr	r3, [r3, #4]
+ 80167da:	8b3a      	ldrh	r2, [r7, #24]
+ 80167dc:	1a8a      	subs	r2, r1, r2
+ 80167de:	b292      	uxth	r2, r2
+ 80167e0:	815a      	strh	r2, [r3, #10]
+  seg->p->tot_len -= len;
+ 80167e2:	68fb      	ldr	r3, [r7, #12]
+ 80167e4:	685b      	ldr	r3, [r3, #4]
+ 80167e6:	8919      	ldrh	r1, [r3, #8]
+ 80167e8:	68fb      	ldr	r3, [r7, #12]
+ 80167ea:	685b      	ldr	r3, [r3, #4]
+ 80167ec:	8b3a      	ldrh	r2, [r7, #24]
+ 80167ee:	1a8a      	subs	r2, r1, r2
+ 80167f0:	b292      	uxth	r2, r2
+ 80167f2:	811a      	strh	r2, [r3, #8]
+
+  seg->p->payload = seg->tcphdr;
+ 80167f4:	68fb      	ldr	r3, [r7, #12]
+ 80167f6:	685b      	ldr	r3, [r3, #4]
+ 80167f8:	68fa      	ldr	r2, [r7, #12]
+ 80167fa:	68d2      	ldr	r2, [r2, #12]
+ 80167fc:	605a      	str	r2, [r3, #4]
+
+  seg->tcphdr->chksum = 0;
+ 80167fe:	68fb      	ldr	r3, [r7, #12]
+ 8016800:	68db      	ldr	r3, [r3, #12]
+ 8016802:	2200      	movs	r2, #0
+ 8016804:	741a      	strb	r2, [r3, #16]
+ 8016806:	2200      	movs	r2, #0
+ 8016808:	745a      	strb	r2, [r3, #17]
+
+#ifdef LWIP_HOOK_TCP_OUT_ADD_TCPOPTS
+  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(seg->p, seg->tcphdr, pcb, opts);
+#endif
+  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(seg->tcphdr + 1)) + LWIP_TCP_OPT_LENGTH_SEGMENT(seg->flags, pcb));
+ 801680a:	68fb      	ldr	r3, [r7, #12]
+ 801680c:	68db      	ldr	r3, [r3, #12]
+ 801680e:	f103 0214 	add.w	r2, r3, #20
+ 8016812:	68fb      	ldr	r3, [r7, #12]
+ 8016814:	7a9b      	ldrb	r3, [r3, #10]
+ 8016816:	009b      	lsls	r3, r3, #2
+ 8016818:	f003 0304 	and.w	r3, r3, #4
+ 801681c:	4413      	add	r3, r2
+ 801681e:	69fa      	ldr	r2, [r7, #28]
+ 8016820:	429a      	cmp	r2, r3
+ 8016822:	d006      	beq.n	8016832 <tcp_output_segment+0x16e>
+ 8016824:	4b10      	ldr	r3, [pc, #64]	; (8016868 <tcp_output_segment+0x1a4>)
+ 8016826:	f240 621c 	movw	r2, #1564	; 0x61c
+ 801682a:	4915      	ldr	r1, [pc, #84]	; (8016880 <tcp_output_segment+0x1bc>)
+ 801682c:	4810      	ldr	r0, [pc, #64]	; (8016870 <tcp_output_segment+0x1ac>)
+ 801682e:	f005 fde3 	bl	801c3f8 <iprintf>
+  }
+#endif /* CHECKSUM_GEN_TCP */
+  TCP_STATS_INC(tcp.xmit);
+
+  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
+  err = ip_output_if(seg->p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl,
+ 8016832:	68fb      	ldr	r3, [r7, #12]
+ 8016834:	6858      	ldr	r0, [r3, #4]
+ 8016836:	68b9      	ldr	r1, [r7, #8]
+ 8016838:	68bb      	ldr	r3, [r7, #8]
+ 801683a:	1d1c      	adds	r4, r3, #4
+ 801683c:	68bb      	ldr	r3, [r7, #8]
+ 801683e:	7add      	ldrb	r5, [r3, #11]
+ 8016840:	68bb      	ldr	r3, [r7, #8]
+ 8016842:	7a9b      	ldrb	r3, [r3, #10]
+ 8016844:	687a      	ldr	r2, [r7, #4]
+ 8016846:	9202      	str	r2, [sp, #8]
+ 8016848:	2206      	movs	r2, #6
+ 801684a:	9201      	str	r2, [sp, #4]
+ 801684c:	9300      	str	r3, [sp, #0]
+ 801684e:	462b      	mov	r3, r5
+ 8016850:	4622      	mov	r2, r4
+ 8016852:	f004 fc37 	bl	801b0c4 <ip4_output_if>
+ 8016856:	4603      	mov	r3, r0
+ 8016858:	75fb      	strb	r3, [r7, #23]
+    seg->chksum = SWAP_BYTES_IN_WORD(seg->chksum);
+    seg->chksum_swapped = 1;
+  }
+#endif
+
+  return err;
+ 801685a:	f997 3017 	ldrsb.w	r3, [r7, #23]
+}
+ 801685e:	4618      	mov	r0, r3
+ 8016860:	3720      	adds	r7, #32
+ 8016862:	46bd      	mov	sp, r7
+ 8016864:	bdb0      	pop	{r4, r5, r7, pc}
+ 8016866:	bf00      	nop
+ 8016868:	0801ee60 	.word	0x0801ee60
+ 801686c:	0801f424 	.word	0x0801f424
+ 8016870:	0801eeb4 	.word	0x0801eeb4
+ 8016874:	0801f444 	.word	0x0801f444
+ 8016878:	0801f464 	.word	0x0801f464
+ 801687c:	2000f7ec 	.word	0x2000f7ec
+ 8016880:	0801f488 	.word	0x0801f488
+
+08016884 <tcp_rexmit_rto_prepare>:
+ *
+ * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
+ */
+err_t
+tcp_rexmit_rto_prepare(struct tcp_pcb *pcb)
+{
+ 8016884:	b5b0      	push	{r4, r5, r7, lr}
+ 8016886:	b084      	sub	sp, #16
+ 8016888:	af00      	add	r7, sp, #0
+ 801688a:	6078      	str	r0, [r7, #4]
+  struct tcp_seg *seg;
+
+  LWIP_ASSERT("tcp_rexmit_rto_prepare: invalid pcb", pcb != NULL);
+ 801688c:	687b      	ldr	r3, [r7, #4]
+ 801688e:	2b00      	cmp	r3, #0
+ 8016890:	d106      	bne.n	80168a0 <tcp_rexmit_rto_prepare+0x1c>
+ 8016892:	4b31      	ldr	r3, [pc, #196]	; (8016958 <tcp_rexmit_rto_prepare+0xd4>)
+ 8016894:	f240 6263 	movw	r2, #1635	; 0x663
+ 8016898:	4930      	ldr	r1, [pc, #192]	; (801695c <tcp_rexmit_rto_prepare+0xd8>)
+ 801689a:	4831      	ldr	r0, [pc, #196]	; (8016960 <tcp_rexmit_rto_prepare+0xdc>)
+ 801689c:	f005 fdac 	bl	801c3f8 <iprintf>
+
+  if (pcb->unacked == NULL) {
+ 80168a0:	687b      	ldr	r3, [r7, #4]
+ 80168a2:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80168a4:	2b00      	cmp	r3, #0
+ 80168a6:	d102      	bne.n	80168ae <tcp_rexmit_rto_prepare+0x2a>
+    return ERR_VAL;
+ 80168a8:	f06f 0305 	mvn.w	r3, #5
+ 80168ac:	e050      	b.n	8016950 <tcp_rexmit_rto_prepare+0xcc>
+
+  /* Move all unacked segments to the head of the unsent queue.
+     However, give up if any of the unsent pbufs are still referenced by the
+     netif driver due to deferred transmission. No point loading the link further
+     if it is struggling to flush its buffered writes. */
+  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
+ 80168ae:	687b      	ldr	r3, [r7, #4]
+ 80168b0:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 80168b2:	60fb      	str	r3, [r7, #12]
+ 80168b4:	e00b      	b.n	80168ce <tcp_rexmit_rto_prepare+0x4a>
+    if (tcp_output_segment_busy(seg)) {
+ 80168b6:	68f8      	ldr	r0, [r7, #12]
+ 80168b8:	f7ff fee4 	bl	8016684 <tcp_output_segment_busy>
+ 80168bc:	4603      	mov	r3, r0
+ 80168be:	2b00      	cmp	r3, #0
+ 80168c0:	d002      	beq.n	80168c8 <tcp_rexmit_rto_prepare+0x44>
+      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
+      return ERR_VAL;
+ 80168c2:	f06f 0305 	mvn.w	r3, #5
+ 80168c6:	e043      	b.n	8016950 <tcp_rexmit_rto_prepare+0xcc>
+  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
+ 80168c8:	68fb      	ldr	r3, [r7, #12]
+ 80168ca:	681b      	ldr	r3, [r3, #0]
+ 80168cc:	60fb      	str	r3, [r7, #12]
+ 80168ce:	68fb      	ldr	r3, [r7, #12]
+ 80168d0:	681b      	ldr	r3, [r3, #0]
+ 80168d2:	2b00      	cmp	r3, #0
+ 80168d4:	d1ef      	bne.n	80168b6 <tcp_rexmit_rto_prepare+0x32>
+    }
+  }
+  if (tcp_output_segment_busy(seg)) {
+ 80168d6:	68f8      	ldr	r0, [r7, #12]
+ 80168d8:	f7ff fed4 	bl	8016684 <tcp_output_segment_busy>
+ 80168dc:	4603      	mov	r3, r0
+ 80168de:	2b00      	cmp	r3, #0
+ 80168e0:	d002      	beq.n	80168e8 <tcp_rexmit_rto_prepare+0x64>
+    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
+    return ERR_VAL;
+ 80168e2:	f06f 0305 	mvn.w	r3, #5
+ 80168e6:	e033      	b.n	8016950 <tcp_rexmit_rto_prepare+0xcc>
+  }
+  /* concatenate unsent queue after unacked queue */
+  seg->next = pcb->unsent;
+ 80168e8:	687b      	ldr	r3, [r7, #4]
+ 80168ea:	6eda      	ldr	r2, [r3, #108]	; 0x6c
+ 80168ec:	68fb      	ldr	r3, [r7, #12]
+ 80168ee:	601a      	str	r2, [r3, #0]
+  if (pcb->unsent == NULL) {
+    pcb->unsent_oversize = seg->oversize_left;
+  }
+#endif /* TCP_OVERSIZE_DBGCHECK */
+  /* unsent queue is the concatenated queue (of unacked, unsent) */
+  pcb->unsent = pcb->unacked;
+ 80168f0:	687b      	ldr	r3, [r7, #4]
+ 80168f2:	6f1a      	ldr	r2, [r3, #112]	; 0x70
+ 80168f4:	687b      	ldr	r3, [r7, #4]
+ 80168f6:	66da      	str	r2, [r3, #108]	; 0x6c
+  /* unacked queue is now empty */
+  pcb->unacked = NULL;
+ 80168f8:	687b      	ldr	r3, [r7, #4]
+ 80168fa:	2200      	movs	r2, #0
+ 80168fc:	671a      	str	r2, [r3, #112]	; 0x70
+
+  /* Mark RTO in-progress */
+  tcp_set_flags(pcb, TF_RTO);
+ 80168fe:	687b      	ldr	r3, [r7, #4]
+ 8016900:	8b5b      	ldrh	r3, [r3, #26]
+ 8016902:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
+ 8016906:	b29a      	uxth	r2, r3
+ 8016908:	687b      	ldr	r3, [r7, #4]
+ 801690a:	835a      	strh	r2, [r3, #26]
+  /* Record the next byte following retransmit */
+  pcb->rto_end = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
+ 801690c:	68fb      	ldr	r3, [r7, #12]
+ 801690e:	68db      	ldr	r3, [r3, #12]
+ 8016910:	685b      	ldr	r3, [r3, #4]
+ 8016912:	4618      	mov	r0, r3
+ 8016914:	f7f9 fca1 	bl	801025a <lwip_htonl>
+ 8016918:	4604      	mov	r4, r0
+ 801691a:	68fb      	ldr	r3, [r7, #12]
+ 801691c:	891b      	ldrh	r3, [r3, #8]
+ 801691e:	461d      	mov	r5, r3
+ 8016920:	68fb      	ldr	r3, [r7, #12]
+ 8016922:	68db      	ldr	r3, [r3, #12]
+ 8016924:	899b      	ldrh	r3, [r3, #12]
+ 8016926:	b29b      	uxth	r3, r3
+ 8016928:	4618      	mov	r0, r3
+ 801692a:	f7f9 fc81 	bl	8010230 <lwip_htons>
+ 801692e:	4603      	mov	r3, r0
+ 8016930:	b2db      	uxtb	r3, r3
+ 8016932:	f003 0303 	and.w	r3, r3, #3
+ 8016936:	2b00      	cmp	r3, #0
+ 8016938:	d001      	beq.n	801693e <tcp_rexmit_rto_prepare+0xba>
+ 801693a:	2301      	movs	r3, #1
+ 801693c:	e000      	b.n	8016940 <tcp_rexmit_rto_prepare+0xbc>
+ 801693e:	2300      	movs	r3, #0
+ 8016940:	442b      	add	r3, r5
+ 8016942:	18e2      	adds	r2, r4, r3
+ 8016944:	687b      	ldr	r3, [r7, #4]
+ 8016946:	64da      	str	r2, [r3, #76]	; 0x4c
+  /* Don't take any RTT measurements after retransmitting. */
+  pcb->rttest = 0;
+ 8016948:	687b      	ldr	r3, [r7, #4]
+ 801694a:	2200      	movs	r2, #0
+ 801694c:	635a      	str	r2, [r3, #52]	; 0x34
+
+  return ERR_OK;
+ 801694e:	2300      	movs	r3, #0
+}
+ 8016950:	4618      	mov	r0, r3
+ 8016952:	3710      	adds	r7, #16
+ 8016954:	46bd      	mov	sp, r7
+ 8016956:	bdb0      	pop	{r4, r5, r7, pc}
+ 8016958:	0801ee60 	.word	0x0801ee60
+ 801695c:	0801f49c 	.word	0x0801f49c
+ 8016960:	0801eeb4 	.word	0x0801eeb4
+
+08016964 <tcp_rexmit_rto_commit>:
+ *
+ * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
+ */
+void
+tcp_rexmit_rto_commit(struct tcp_pcb *pcb)
+{
+ 8016964:	b580      	push	{r7, lr}
+ 8016966:	b082      	sub	sp, #8
+ 8016968:	af00      	add	r7, sp, #0
+ 801696a:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT("tcp_rexmit_rto_commit: invalid pcb", pcb != NULL);
+ 801696c:	687b      	ldr	r3, [r7, #4]
+ 801696e:	2b00      	cmp	r3, #0
+ 8016970:	d106      	bne.n	8016980 <tcp_rexmit_rto_commit+0x1c>
+ 8016972:	4b0d      	ldr	r3, [pc, #52]	; (80169a8 <tcp_rexmit_rto_commit+0x44>)
+ 8016974:	f44f 62d3 	mov.w	r2, #1688	; 0x698
+ 8016978:	490c      	ldr	r1, [pc, #48]	; (80169ac <tcp_rexmit_rto_commit+0x48>)
+ 801697a:	480d      	ldr	r0, [pc, #52]	; (80169b0 <tcp_rexmit_rto_commit+0x4c>)
+ 801697c:	f005 fd3c 	bl	801c3f8 <iprintf>
+
+  /* increment number of retransmissions */
+  if (pcb->nrtx < 0xFF) {
+ 8016980:	687b      	ldr	r3, [r7, #4]
+ 8016982:	f893 3042 	ldrb.w	r3, [r3, #66]	; 0x42
+ 8016986:	2bff      	cmp	r3, #255	; 0xff
+ 8016988:	d007      	beq.n	801699a <tcp_rexmit_rto_commit+0x36>
+    ++pcb->nrtx;
+ 801698a:	687b      	ldr	r3, [r7, #4]
+ 801698c:	f893 3042 	ldrb.w	r3, [r3, #66]	; 0x42
+ 8016990:	3301      	adds	r3, #1
+ 8016992:	b2da      	uxtb	r2, r3
+ 8016994:	687b      	ldr	r3, [r7, #4]
+ 8016996:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+  }
+  /* Do the actual retransmission */
+  tcp_output(pcb);
+ 801699a:	6878      	ldr	r0, [r7, #4]
+ 801699c:	f7ff fc7a 	bl	8016294 <tcp_output>
+}
+ 80169a0:	bf00      	nop
+ 80169a2:	3708      	adds	r7, #8
+ 80169a4:	46bd      	mov	sp, r7
+ 80169a6:	bd80      	pop	{r7, pc}
+ 80169a8:	0801ee60 	.word	0x0801ee60
+ 80169ac:	0801f4c0 	.word	0x0801f4c0
+ 80169b0:	0801eeb4 	.word	0x0801eeb4
+
+080169b4 <tcp_rexmit_rto>:
+ *
+ * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
+ */
+void
+tcp_rexmit_rto(struct tcp_pcb *pcb)
+{
+ 80169b4:	b580      	push	{r7, lr}
+ 80169b6:	b082      	sub	sp, #8
+ 80169b8:	af00      	add	r7, sp, #0
+ 80169ba:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT("tcp_rexmit_rto: invalid pcb", pcb != NULL);
+ 80169bc:	687b      	ldr	r3, [r7, #4]
+ 80169be:	2b00      	cmp	r3, #0
+ 80169c0:	d106      	bne.n	80169d0 <tcp_rexmit_rto+0x1c>
+ 80169c2:	4b0a      	ldr	r3, [pc, #40]	; (80169ec <tcp_rexmit_rto+0x38>)
+ 80169c4:	f240 62ad 	movw	r2, #1709	; 0x6ad
+ 80169c8:	4909      	ldr	r1, [pc, #36]	; (80169f0 <tcp_rexmit_rto+0x3c>)
+ 80169ca:	480a      	ldr	r0, [pc, #40]	; (80169f4 <tcp_rexmit_rto+0x40>)
+ 80169cc:	f005 fd14 	bl	801c3f8 <iprintf>
+
+  if (tcp_rexmit_rto_prepare(pcb) == ERR_OK) {
+ 80169d0:	6878      	ldr	r0, [r7, #4]
+ 80169d2:	f7ff ff57 	bl	8016884 <tcp_rexmit_rto_prepare>
+ 80169d6:	4603      	mov	r3, r0
+ 80169d8:	2b00      	cmp	r3, #0
+ 80169da:	d102      	bne.n	80169e2 <tcp_rexmit_rto+0x2e>
+    tcp_rexmit_rto_commit(pcb);
+ 80169dc:	6878      	ldr	r0, [r7, #4]
+ 80169de:	f7ff ffc1 	bl	8016964 <tcp_rexmit_rto_commit>
+  }
+}
+ 80169e2:	bf00      	nop
+ 80169e4:	3708      	adds	r7, #8
+ 80169e6:	46bd      	mov	sp, r7
+ 80169e8:	bd80      	pop	{r7, pc}
+ 80169ea:	bf00      	nop
+ 80169ec:	0801ee60 	.word	0x0801ee60
+ 80169f0:	0801f4e4 	.word	0x0801f4e4
+ 80169f4:	0801eeb4 	.word	0x0801eeb4
+
+080169f8 <tcp_rexmit>:
+ *
+ * @param pcb the tcp_pcb for which to retransmit the first unacked segment
+ */
+err_t
+tcp_rexmit(struct tcp_pcb *pcb)
+{
+ 80169f8:	b590      	push	{r4, r7, lr}
+ 80169fa:	b085      	sub	sp, #20
+ 80169fc:	af00      	add	r7, sp, #0
+ 80169fe:	6078      	str	r0, [r7, #4]
+  struct tcp_seg *seg;
+  struct tcp_seg **cur_seg;
+
+  LWIP_ASSERT("tcp_rexmit: invalid pcb", pcb != NULL);
+ 8016a00:	687b      	ldr	r3, [r7, #4]
+ 8016a02:	2b00      	cmp	r3, #0
+ 8016a04:	d106      	bne.n	8016a14 <tcp_rexmit+0x1c>
+ 8016a06:	4b2f      	ldr	r3, [pc, #188]	; (8016ac4 <tcp_rexmit+0xcc>)
+ 8016a08:	f240 62c1 	movw	r2, #1729	; 0x6c1
+ 8016a0c:	492e      	ldr	r1, [pc, #184]	; (8016ac8 <tcp_rexmit+0xd0>)
+ 8016a0e:	482f      	ldr	r0, [pc, #188]	; (8016acc <tcp_rexmit+0xd4>)
+ 8016a10:	f005 fcf2 	bl	801c3f8 <iprintf>
+
+  if (pcb->unacked == NULL) {
+ 8016a14:	687b      	ldr	r3, [r7, #4]
+ 8016a16:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8016a18:	2b00      	cmp	r3, #0
+ 8016a1a:	d102      	bne.n	8016a22 <tcp_rexmit+0x2a>
+    return ERR_VAL;
+ 8016a1c:	f06f 0305 	mvn.w	r3, #5
+ 8016a20:	e04c      	b.n	8016abc <tcp_rexmit+0xc4>
+  }
+
+  seg = pcb->unacked;
+ 8016a22:	687b      	ldr	r3, [r7, #4]
+ 8016a24:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8016a26:	60bb      	str	r3, [r7, #8]
+
+  /* Give up if the segment is still referenced by the netif driver
+     due to deferred transmission. */
+  if (tcp_output_segment_busy(seg)) {
+ 8016a28:	68b8      	ldr	r0, [r7, #8]
+ 8016a2a:	f7ff fe2b 	bl	8016684 <tcp_output_segment_busy>
+ 8016a2e:	4603      	mov	r3, r0
+ 8016a30:	2b00      	cmp	r3, #0
+ 8016a32:	d002      	beq.n	8016a3a <tcp_rexmit+0x42>
+    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit busy\n"));
+    return ERR_VAL;
+ 8016a34:	f06f 0305 	mvn.w	r3, #5
+ 8016a38:	e040      	b.n	8016abc <tcp_rexmit+0xc4>
+  }
+
+  /* Move the first unacked segment to the unsent queue */
+  /* Keep the unsent queue sorted. */
+  pcb->unacked = seg->next;
+ 8016a3a:	68bb      	ldr	r3, [r7, #8]
+ 8016a3c:	681a      	ldr	r2, [r3, #0]
+ 8016a3e:	687b      	ldr	r3, [r7, #4]
+ 8016a40:	671a      	str	r2, [r3, #112]	; 0x70
+
+  cur_seg = &(pcb->unsent);
+ 8016a42:	687b      	ldr	r3, [r7, #4]
+ 8016a44:	336c      	adds	r3, #108	; 0x6c
+ 8016a46:	60fb      	str	r3, [r7, #12]
+  while (*cur_seg &&
+ 8016a48:	e002      	b.n	8016a50 <tcp_rexmit+0x58>
+         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
+    cur_seg = &((*cur_seg)->next );
+ 8016a4a:	68fb      	ldr	r3, [r7, #12]
+ 8016a4c:	681b      	ldr	r3, [r3, #0]
+ 8016a4e:	60fb      	str	r3, [r7, #12]
+  while (*cur_seg &&
+ 8016a50:	68fb      	ldr	r3, [r7, #12]
+ 8016a52:	681b      	ldr	r3, [r3, #0]
+ 8016a54:	2b00      	cmp	r3, #0
+ 8016a56:	d011      	beq.n	8016a7c <tcp_rexmit+0x84>
+         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
+ 8016a58:	68fb      	ldr	r3, [r7, #12]
+ 8016a5a:	681b      	ldr	r3, [r3, #0]
+ 8016a5c:	68db      	ldr	r3, [r3, #12]
+ 8016a5e:	685b      	ldr	r3, [r3, #4]
+ 8016a60:	4618      	mov	r0, r3
+ 8016a62:	f7f9 fbfa 	bl	801025a <lwip_htonl>
+ 8016a66:	4604      	mov	r4, r0
+ 8016a68:	68bb      	ldr	r3, [r7, #8]
+ 8016a6a:	68db      	ldr	r3, [r3, #12]
+ 8016a6c:	685b      	ldr	r3, [r3, #4]
+ 8016a6e:	4618      	mov	r0, r3
+ 8016a70:	f7f9 fbf3 	bl	801025a <lwip_htonl>
+ 8016a74:	4603      	mov	r3, r0
+ 8016a76:	1ae3      	subs	r3, r4, r3
+  while (*cur_seg &&
+ 8016a78:	2b00      	cmp	r3, #0
+ 8016a7a:	dbe6      	blt.n	8016a4a <tcp_rexmit+0x52>
+  }
+  seg->next = *cur_seg;
+ 8016a7c:	68fb      	ldr	r3, [r7, #12]
+ 8016a7e:	681a      	ldr	r2, [r3, #0]
+ 8016a80:	68bb      	ldr	r3, [r7, #8]
+ 8016a82:	601a      	str	r2, [r3, #0]
+  *cur_seg = seg;
+ 8016a84:	68fb      	ldr	r3, [r7, #12]
+ 8016a86:	68ba      	ldr	r2, [r7, #8]
+ 8016a88:	601a      	str	r2, [r3, #0]
+#if TCP_OVERSIZE
+  if (seg->next == NULL) {
+ 8016a8a:	68bb      	ldr	r3, [r7, #8]
+ 8016a8c:	681b      	ldr	r3, [r3, #0]
+ 8016a8e:	2b00      	cmp	r3, #0
+ 8016a90:	d103      	bne.n	8016a9a <tcp_rexmit+0xa2>
+    /* the retransmitted segment is last in unsent, so reset unsent_oversize */
+    pcb->unsent_oversize = 0;
+ 8016a92:	687b      	ldr	r3, [r7, #4]
+ 8016a94:	2200      	movs	r2, #0
+ 8016a96:	f8a3 2068 	strh.w	r2, [r3, #104]	; 0x68
+  }
+#endif /* TCP_OVERSIZE */
+
+  if (pcb->nrtx < 0xFF) {
+ 8016a9a:	687b      	ldr	r3, [r7, #4]
+ 8016a9c:	f893 3042 	ldrb.w	r3, [r3, #66]	; 0x42
+ 8016aa0:	2bff      	cmp	r3, #255	; 0xff
+ 8016aa2:	d007      	beq.n	8016ab4 <tcp_rexmit+0xbc>
+    ++pcb->nrtx;
+ 8016aa4:	687b      	ldr	r3, [r7, #4]
+ 8016aa6:	f893 3042 	ldrb.w	r3, [r3, #66]	; 0x42
+ 8016aaa:	3301      	adds	r3, #1
+ 8016aac:	b2da      	uxtb	r2, r3
+ 8016aae:	687b      	ldr	r3, [r7, #4]
+ 8016ab0:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
+  }
+
+  /* Don't take any rtt measurements after retransmitting. */
+  pcb->rttest = 0;
+ 8016ab4:	687b      	ldr	r3, [r7, #4]
+ 8016ab6:	2200      	movs	r2, #0
+ 8016ab8:	635a      	str	r2, [r3, #52]	; 0x34
+
+  /* Do the actual retransmission. */
+  MIB2_STATS_INC(mib2.tcpretranssegs);
+  /* No need to call tcp_output: we are always called from tcp_input()
+     and thus tcp_output directly returns. */
+  return ERR_OK;
+ 8016aba:	2300      	movs	r3, #0
+}
+ 8016abc:	4618      	mov	r0, r3
+ 8016abe:	3714      	adds	r7, #20
+ 8016ac0:	46bd      	mov	sp, r7
+ 8016ac2:	bd90      	pop	{r4, r7, pc}
+ 8016ac4:	0801ee60 	.word	0x0801ee60
+ 8016ac8:	0801f500 	.word	0x0801f500
+ 8016acc:	0801eeb4 	.word	0x0801eeb4
+
+08016ad0 <tcp_rexmit_fast>:
+ *
+ * @param pcb the tcp_pcb for which to retransmit the first unacked segment
+ */
+void
+tcp_rexmit_fast(struct tcp_pcb *pcb)
+{
+ 8016ad0:	b580      	push	{r7, lr}
+ 8016ad2:	b082      	sub	sp, #8
+ 8016ad4:	af00      	add	r7, sp, #0
+ 8016ad6:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT("tcp_rexmit_fast: invalid pcb", pcb != NULL);
+ 8016ad8:	687b      	ldr	r3, [r7, #4]
+ 8016ada:	2b00      	cmp	r3, #0
+ 8016adc:	d106      	bne.n	8016aec <tcp_rexmit_fast+0x1c>
+ 8016ade:	4b2f      	ldr	r3, [pc, #188]	; (8016b9c <tcp_rexmit_fast+0xcc>)
+ 8016ae0:	f240 62f9 	movw	r2, #1785	; 0x6f9
+ 8016ae4:	492e      	ldr	r1, [pc, #184]	; (8016ba0 <tcp_rexmit_fast+0xd0>)
+ 8016ae6:	482f      	ldr	r0, [pc, #188]	; (8016ba4 <tcp_rexmit_fast+0xd4>)
+ 8016ae8:	f005 fc86 	bl	801c3f8 <iprintf>
+
+  if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) {
+ 8016aec:	687b      	ldr	r3, [r7, #4]
+ 8016aee:	6f1b      	ldr	r3, [r3, #112]	; 0x70
+ 8016af0:	2b00      	cmp	r3, #0
+ 8016af2:	d04f      	beq.n	8016b94 <tcp_rexmit_fast+0xc4>
+ 8016af4:	687b      	ldr	r3, [r7, #4]
+ 8016af6:	8b5b      	ldrh	r3, [r3, #26]
+ 8016af8:	f003 0304 	and.w	r3, r3, #4
+ 8016afc:	2b00      	cmp	r3, #0
+ 8016afe:	d149      	bne.n	8016b94 <tcp_rexmit_fast+0xc4>
+    LWIP_DEBUGF(TCP_FR_DEBUG,
+                ("tcp_receive: dupacks %"U16_F" (%"U32_F
+                 "), fast retransmit %"U32_F"\n",
+                 (u16_t)pcb->dupacks, pcb->lastack,
+                 lwip_ntohl(pcb->unacked->tcphdr->seqno)));
+    if (tcp_rexmit(pcb) == ERR_OK) {
+ 8016b00:	6878      	ldr	r0, [r7, #4]
+ 8016b02:	f7ff ff79 	bl	80169f8 <tcp_rexmit>
+ 8016b06:	4603      	mov	r3, r0
+ 8016b08:	2b00      	cmp	r3, #0
+ 8016b0a:	d143      	bne.n	8016b94 <tcp_rexmit_fast+0xc4>
+      /* Set ssthresh to half of the minimum of the current
+       * cwnd and the advertised window */
+      pcb->ssthresh = LWIP_MIN(pcb->cwnd, pcb->snd_wnd) / 2;
+ 8016b0c:	687b      	ldr	r3, [r7, #4]
+ 8016b0e:	f8b3 2048 	ldrh.w	r2, [r3, #72]	; 0x48
+ 8016b12:	687b      	ldr	r3, [r7, #4]
+ 8016b14:	f8b3 3060 	ldrh.w	r3, [r3, #96]	; 0x60
+ 8016b18:	429a      	cmp	r2, r3
+ 8016b1a:	d208      	bcs.n	8016b2e <tcp_rexmit_fast+0x5e>
+ 8016b1c:	687b      	ldr	r3, [r7, #4]
+ 8016b1e:	f8b3 3048 	ldrh.w	r3, [r3, #72]	; 0x48
+ 8016b22:	2b00      	cmp	r3, #0
+ 8016b24:	da00      	bge.n	8016b28 <tcp_rexmit_fast+0x58>
+ 8016b26:	3301      	adds	r3, #1
+ 8016b28:	105b      	asrs	r3, r3, #1
+ 8016b2a:	b29b      	uxth	r3, r3
+ 8016b2c:	e007      	b.n	8016b3e <tcp_rexmit_fast+0x6e>
+ 8016b2e:	687b      	ldr	r3, [r7, #4]
+ 8016b30:	f8b3 3060 	ldrh.w	r3, [r3, #96]	; 0x60
+ 8016b34:	2b00      	cmp	r3, #0
+ 8016b36:	da00      	bge.n	8016b3a <tcp_rexmit_fast+0x6a>
+ 8016b38:	3301      	adds	r3, #1
+ 8016b3a:	105b      	asrs	r3, r3, #1
+ 8016b3c:	b29b      	uxth	r3, r3
+ 8016b3e:	687a      	ldr	r2, [r7, #4]
+ 8016b40:	f8a2 304a 	strh.w	r3, [r2, #74]	; 0x4a
+
+      /* The minimum value for ssthresh should be 2 MSS */
+      if (pcb->ssthresh < (2U * pcb->mss)) {
+ 8016b44:	687b      	ldr	r3, [r7, #4]
+ 8016b46:	f8b3 304a 	ldrh.w	r3, [r3, #74]	; 0x4a
+ 8016b4a:	461a      	mov	r2, r3
+ 8016b4c:	687b      	ldr	r3, [r7, #4]
+ 8016b4e:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8016b50:	005b      	lsls	r3, r3, #1
+ 8016b52:	429a      	cmp	r2, r3
+ 8016b54:	d206      	bcs.n	8016b64 <tcp_rexmit_fast+0x94>
+        LWIP_DEBUGF(TCP_FR_DEBUG,
+                    ("tcp_receive: The minimum value for ssthresh %"TCPWNDSIZE_F
+                     " should be min 2 mss %"U16_F"...\n",
+                     pcb->ssthresh, (u16_t)(2 * pcb->mss)));
+        pcb->ssthresh = 2 * pcb->mss;
+ 8016b56:	687b      	ldr	r3, [r7, #4]
+ 8016b58:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8016b5a:	005b      	lsls	r3, r3, #1
+ 8016b5c:	b29a      	uxth	r2, r3
+ 8016b5e:	687b      	ldr	r3, [r7, #4]
+ 8016b60:	f8a3 204a 	strh.w	r2, [r3, #74]	; 0x4a
+      }
+
+      pcb->cwnd = pcb->ssthresh + 3 * pcb->mss;
+ 8016b64:	687b      	ldr	r3, [r7, #4]
+ 8016b66:	f8b3 204a 	ldrh.w	r2, [r3, #74]	; 0x4a
+ 8016b6a:	687b      	ldr	r3, [r7, #4]
+ 8016b6c:	8e5b      	ldrh	r3, [r3, #50]	; 0x32
+ 8016b6e:	4619      	mov	r1, r3
+ 8016b70:	0049      	lsls	r1, r1, #1
+ 8016b72:	440b      	add	r3, r1
+ 8016b74:	b29b      	uxth	r3, r3
+ 8016b76:	4413      	add	r3, r2
+ 8016b78:	b29a      	uxth	r2, r3
+ 8016b7a:	687b      	ldr	r3, [r7, #4]
+ 8016b7c:	f8a3 2048 	strh.w	r2, [r3, #72]	; 0x48
+      tcp_set_flags(pcb, TF_INFR);
+ 8016b80:	687b      	ldr	r3, [r7, #4]
+ 8016b82:	8b5b      	ldrh	r3, [r3, #26]
+ 8016b84:	f043 0304 	orr.w	r3, r3, #4
+ 8016b88:	b29a      	uxth	r2, r3
+ 8016b8a:	687b      	ldr	r3, [r7, #4]
+ 8016b8c:	835a      	strh	r2, [r3, #26]
+
+      /* Reset the retransmission timer to prevent immediate rto retransmissions */
+      pcb->rtime = 0;
+ 8016b8e:	687b      	ldr	r3, [r7, #4]
+ 8016b90:	2200      	movs	r2, #0
+ 8016b92:	861a      	strh	r2, [r3, #48]	; 0x30
+    }
+  }
+}
+ 8016b94:	bf00      	nop
+ 8016b96:	3708      	adds	r7, #8
+ 8016b98:	46bd      	mov	sp, r7
+ 8016b9a:	bd80      	pop	{r7, pc}
+ 8016b9c:	0801ee60 	.word	0x0801ee60
+ 8016ba0:	0801f518 	.word	0x0801f518
+ 8016ba4:	0801eeb4 	.word	0x0801eeb4
+
+08016ba8 <tcp_output_alloc_header_common>:
+
+static struct pbuf *
+tcp_output_alloc_header_common(u32_t ackno, u16_t optlen, u16_t datalen,
+                        u32_t seqno_be /* already in network byte order */,
+                        u16_t src_port, u16_t dst_port, u8_t flags, u16_t wnd)
+{
+ 8016ba8:	b580      	push	{r7, lr}
+ 8016baa:	b086      	sub	sp, #24
+ 8016bac:	af00      	add	r7, sp, #0
+ 8016bae:	60f8      	str	r0, [r7, #12]
+ 8016bb0:	607b      	str	r3, [r7, #4]
+ 8016bb2:	460b      	mov	r3, r1
+ 8016bb4:	817b      	strh	r3, [r7, #10]
+ 8016bb6:	4613      	mov	r3, r2
+ 8016bb8:	813b      	strh	r3, [r7, #8]
+  struct tcp_hdr *tcphdr;
+  struct pbuf *p;
+
+  p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen + datalen, PBUF_RAM);
+ 8016bba:	897a      	ldrh	r2, [r7, #10]
+ 8016bbc:	893b      	ldrh	r3, [r7, #8]
+ 8016bbe:	4413      	add	r3, r2
+ 8016bc0:	b29b      	uxth	r3, r3
+ 8016bc2:	3314      	adds	r3, #20
+ 8016bc4:	b29b      	uxth	r3, r3
+ 8016bc6:	f44f 7220 	mov.w	r2, #640	; 0x280
+ 8016bca:	4619      	mov	r1, r3
+ 8016bcc:	2022      	movs	r0, #34	; 0x22
+ 8016bce:	f7fa fc03 	bl	80113d8 <pbuf_alloc>
+ 8016bd2:	6178      	str	r0, [r7, #20]
+  if (p != NULL) {
+ 8016bd4:	697b      	ldr	r3, [r7, #20]
+ 8016bd6:	2b00      	cmp	r3, #0
+ 8016bd8:	d04e      	beq.n	8016c78 <tcp_output_alloc_header_common+0xd0>
+    LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr",
+ 8016bda:	697b      	ldr	r3, [r7, #20]
+ 8016bdc:	895b      	ldrh	r3, [r3, #10]
+ 8016bde:	461a      	mov	r2, r3
+ 8016be0:	897b      	ldrh	r3, [r7, #10]
+ 8016be2:	3314      	adds	r3, #20
+ 8016be4:	429a      	cmp	r2, r3
+ 8016be6:	da06      	bge.n	8016bf6 <tcp_output_alloc_header_common+0x4e>
+ 8016be8:	4b26      	ldr	r3, [pc, #152]	; (8016c84 <tcp_output_alloc_header_common+0xdc>)
+ 8016bea:	f240 7224 	movw	r2, #1828	; 0x724
+ 8016bee:	4926      	ldr	r1, [pc, #152]	; (8016c88 <tcp_output_alloc_header_common+0xe0>)
+ 8016bf0:	4826      	ldr	r0, [pc, #152]	; (8016c8c <tcp_output_alloc_header_common+0xe4>)
+ 8016bf2:	f005 fc01 	bl	801c3f8 <iprintf>
+                (p->len >= TCP_HLEN + optlen));
+    tcphdr = (struct tcp_hdr *)p->payload;
+ 8016bf6:	697b      	ldr	r3, [r7, #20]
+ 8016bf8:	685b      	ldr	r3, [r3, #4]
+ 8016bfa:	613b      	str	r3, [r7, #16]
+    tcphdr->src = lwip_htons(src_port);
+ 8016bfc:	8c3b      	ldrh	r3, [r7, #32]
+ 8016bfe:	4618      	mov	r0, r3
+ 8016c00:	f7f9 fb16 	bl	8010230 <lwip_htons>
+ 8016c04:	4603      	mov	r3, r0
+ 8016c06:	461a      	mov	r2, r3
+ 8016c08:	693b      	ldr	r3, [r7, #16]
+ 8016c0a:	801a      	strh	r2, [r3, #0]
+    tcphdr->dest = lwip_htons(dst_port);
+ 8016c0c:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
+ 8016c0e:	4618      	mov	r0, r3
+ 8016c10:	f7f9 fb0e 	bl	8010230 <lwip_htons>
+ 8016c14:	4603      	mov	r3, r0
+ 8016c16:	461a      	mov	r2, r3
+ 8016c18:	693b      	ldr	r3, [r7, #16]
+ 8016c1a:	805a      	strh	r2, [r3, #2]
+    tcphdr->seqno = seqno_be;
+ 8016c1c:	693b      	ldr	r3, [r7, #16]
+ 8016c1e:	687a      	ldr	r2, [r7, #4]
+ 8016c20:	605a      	str	r2, [r3, #4]
+    tcphdr->ackno = lwip_htonl(ackno);
+ 8016c22:	68f8      	ldr	r0, [r7, #12]
+ 8016c24:	f7f9 fb19 	bl	801025a <lwip_htonl>
+ 8016c28:	4602      	mov	r2, r0
+ 8016c2a:	693b      	ldr	r3, [r7, #16]
+ 8016c2c:	609a      	str	r2, [r3, #8]
+    TCPH_HDRLEN_FLAGS_SET(tcphdr, (5 + optlen / 4), flags);
+ 8016c2e:	897b      	ldrh	r3, [r7, #10]
+ 8016c30:	089b      	lsrs	r3, r3, #2
+ 8016c32:	b29b      	uxth	r3, r3
+ 8016c34:	3305      	adds	r3, #5
+ 8016c36:	b29b      	uxth	r3, r3
+ 8016c38:	031b      	lsls	r3, r3, #12
+ 8016c3a:	b29a      	uxth	r2, r3
+ 8016c3c:	f897 3028 	ldrb.w	r3, [r7, #40]	; 0x28
+ 8016c40:	b29b      	uxth	r3, r3
+ 8016c42:	4313      	orrs	r3, r2
+ 8016c44:	b29b      	uxth	r3, r3
+ 8016c46:	4618      	mov	r0, r3
+ 8016c48:	f7f9 faf2 	bl	8010230 <lwip_htons>
+ 8016c4c:	4603      	mov	r3, r0
+ 8016c4e:	461a      	mov	r2, r3
+ 8016c50:	693b      	ldr	r3, [r7, #16]
+ 8016c52:	819a      	strh	r2, [r3, #12]
+    tcphdr->wnd = lwip_htons(wnd);
+ 8016c54:	8dbb      	ldrh	r3, [r7, #44]	; 0x2c
+ 8016c56:	4618      	mov	r0, r3
+ 8016c58:	f7f9 faea 	bl	8010230 <lwip_htons>
+ 8016c5c:	4603      	mov	r3, r0
+ 8016c5e:	461a      	mov	r2, r3
+ 8016c60:	693b      	ldr	r3, [r7, #16]
+ 8016c62:	81da      	strh	r2, [r3, #14]
+    tcphdr->chksum = 0;
+ 8016c64:	693b      	ldr	r3, [r7, #16]
+ 8016c66:	2200      	movs	r2, #0
+ 8016c68:	741a      	strb	r2, [r3, #16]
+ 8016c6a:	2200      	movs	r2, #0
+ 8016c6c:	745a      	strb	r2, [r3, #17]
+    tcphdr->urgp = 0;
+ 8016c6e:	693b      	ldr	r3, [r7, #16]
+ 8016c70:	2200      	movs	r2, #0
+ 8016c72:	749a      	strb	r2, [r3, #18]
+ 8016c74:	2200      	movs	r2, #0
+ 8016c76:	74da      	strb	r2, [r3, #19]
+  }
+  return p;
+ 8016c78:	697b      	ldr	r3, [r7, #20]
+}
+ 8016c7a:	4618      	mov	r0, r3
+ 8016c7c:	3718      	adds	r7, #24
+ 8016c7e:	46bd      	mov	sp, r7
+ 8016c80:	bd80      	pop	{r7, pc}
+ 8016c82:	bf00      	nop
+ 8016c84:	0801ee60 	.word	0x0801ee60
+ 8016c88:	0801f538 	.word	0x0801f538
+ 8016c8c:	0801eeb4 	.word	0x0801eeb4
+
+08016c90 <tcp_output_alloc_header>:
+ * @return pbuf with p->payload being the tcp_hdr
+ */
+static struct pbuf *
+tcp_output_alloc_header(struct tcp_pcb *pcb, u16_t optlen, u16_t datalen,
+                        u32_t seqno_be /* already in network byte order */)
+{
+ 8016c90:	b5b0      	push	{r4, r5, r7, lr}
+ 8016c92:	b08a      	sub	sp, #40	; 0x28
+ 8016c94:	af04      	add	r7, sp, #16
+ 8016c96:	60f8      	str	r0, [r7, #12]
+ 8016c98:	607b      	str	r3, [r7, #4]
+ 8016c9a:	460b      	mov	r3, r1
+ 8016c9c:	817b      	strh	r3, [r7, #10]
+ 8016c9e:	4613      	mov	r3, r2
+ 8016ca0:	813b      	strh	r3, [r7, #8]
+  struct pbuf *p;
+
+  LWIP_ASSERT("tcp_output_alloc_header: invalid pcb", pcb != NULL);
+ 8016ca2:	68fb      	ldr	r3, [r7, #12]
+ 8016ca4:	2b00      	cmp	r3, #0
+ 8016ca6:	d106      	bne.n	8016cb6 <tcp_output_alloc_header+0x26>
+ 8016ca8:	4b15      	ldr	r3, [pc, #84]	; (8016d00 <tcp_output_alloc_header+0x70>)
+ 8016caa:	f240 7242 	movw	r2, #1858	; 0x742
+ 8016cae:	4915      	ldr	r1, [pc, #84]	; (8016d04 <tcp_output_alloc_header+0x74>)
+ 8016cb0:	4815      	ldr	r0, [pc, #84]	; (8016d08 <tcp_output_alloc_header+0x78>)
+ 8016cb2:	f005 fba1 	bl	801c3f8 <iprintf>
+
+  p = tcp_output_alloc_header_common(pcb->rcv_nxt, optlen, datalen,
+ 8016cb6:	68fb      	ldr	r3, [r7, #12]
+ 8016cb8:	6a58      	ldr	r0, [r3, #36]	; 0x24
+ 8016cba:	68fb      	ldr	r3, [r7, #12]
+ 8016cbc:	8adb      	ldrh	r3, [r3, #22]
+ 8016cbe:	68fa      	ldr	r2, [r7, #12]
+ 8016cc0:	8b12      	ldrh	r2, [r2, #24]
+ 8016cc2:	68f9      	ldr	r1, [r7, #12]
+ 8016cc4:	8d49      	ldrh	r1, [r1, #42]	; 0x2a
+ 8016cc6:	893d      	ldrh	r5, [r7, #8]
+ 8016cc8:	897c      	ldrh	r4, [r7, #10]
+ 8016cca:	9103      	str	r1, [sp, #12]
+ 8016ccc:	2110      	movs	r1, #16
+ 8016cce:	9102      	str	r1, [sp, #8]
+ 8016cd0:	9201      	str	r2, [sp, #4]
+ 8016cd2:	9300      	str	r3, [sp, #0]
+ 8016cd4:	687b      	ldr	r3, [r7, #4]
+ 8016cd6:	462a      	mov	r2, r5
+ 8016cd8:	4621      	mov	r1, r4
+ 8016cda:	f7ff ff65 	bl	8016ba8 <tcp_output_alloc_header_common>
+ 8016cde:	6178      	str	r0, [r7, #20]
+    seqno_be, pcb->local_port, pcb->remote_port, TCP_ACK,
+    TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
+  if (p != NULL) {
+ 8016ce0:	697b      	ldr	r3, [r7, #20]
+ 8016ce2:	2b00      	cmp	r3, #0
+ 8016ce4:	d006      	beq.n	8016cf4 <tcp_output_alloc_header+0x64>
+    /* If we're sending a packet, update the announced right window edge */
+    pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
+ 8016ce6:	68fb      	ldr	r3, [r7, #12]
+ 8016ce8:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8016cea:	68fa      	ldr	r2, [r7, #12]
+ 8016cec:	8d52      	ldrh	r2, [r2, #42]	; 0x2a
+ 8016cee:	441a      	add	r2, r3
+ 8016cf0:	68fb      	ldr	r3, [r7, #12]
+ 8016cf2:	62da      	str	r2, [r3, #44]	; 0x2c
+  }
+  return p;
+ 8016cf4:	697b      	ldr	r3, [r7, #20]
+}
+ 8016cf6:	4618      	mov	r0, r3
+ 8016cf8:	3718      	adds	r7, #24
+ 8016cfa:	46bd      	mov	sp, r7
+ 8016cfc:	bdb0      	pop	{r4, r5, r7, pc}
+ 8016cfe:	bf00      	nop
+ 8016d00:	0801ee60 	.word	0x0801ee60
+ 8016d04:	0801f568 	.word	0x0801f568
+ 8016d08:	0801eeb4 	.word	0x0801eeb4
+
+08016d0c <tcp_output_fill_options>:
+
+/* Fill in options for control segments */
+static void
+tcp_output_fill_options(const struct tcp_pcb *pcb, struct pbuf *p, u8_t optflags, u8_t num_sacks)
+{
+ 8016d0c:	b580      	push	{r7, lr}
+ 8016d0e:	b088      	sub	sp, #32
+ 8016d10:	af00      	add	r7, sp, #0
+ 8016d12:	60f8      	str	r0, [r7, #12]
+ 8016d14:	60b9      	str	r1, [r7, #8]
+ 8016d16:	4611      	mov	r1, r2
+ 8016d18:	461a      	mov	r2, r3
+ 8016d1a:	460b      	mov	r3, r1
+ 8016d1c:	71fb      	strb	r3, [r7, #7]
+ 8016d1e:	4613      	mov	r3, r2
+ 8016d20:	71bb      	strb	r3, [r7, #6]
+  struct tcp_hdr *tcphdr;
+  u32_t *opts;
+  u16_t sacks_len = 0;
+ 8016d22:	2300      	movs	r3, #0
+ 8016d24:	83fb      	strh	r3, [r7, #30]
+
+  LWIP_ASSERT("tcp_output_fill_options: invalid pbuf", p != NULL);
+ 8016d26:	68bb      	ldr	r3, [r7, #8]
+ 8016d28:	2b00      	cmp	r3, #0
+ 8016d2a:	d106      	bne.n	8016d3a <tcp_output_fill_options+0x2e>
+ 8016d2c:	4b13      	ldr	r3, [pc, #76]	; (8016d7c <tcp_output_fill_options+0x70>)
+ 8016d2e:	f240 7256 	movw	r2, #1878	; 0x756
+ 8016d32:	4913      	ldr	r1, [pc, #76]	; (8016d80 <tcp_output_fill_options+0x74>)
+ 8016d34:	4813      	ldr	r0, [pc, #76]	; (8016d84 <tcp_output_fill_options+0x78>)
+ 8016d36:	f005 fb5f 	bl	801c3f8 <iprintf>
+
+  tcphdr = (struct tcp_hdr *)p->payload;
+ 8016d3a:	68bb      	ldr	r3, [r7, #8]
+ 8016d3c:	685b      	ldr	r3, [r3, #4]
+ 8016d3e:	61bb      	str	r3, [r7, #24]
+  opts = (u32_t *)(void *)(tcphdr + 1);
+ 8016d40:	69bb      	ldr	r3, [r7, #24]
+ 8016d42:	3314      	adds	r3, #20
+ 8016d44:	617b      	str	r3, [r7, #20]
+  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(p, tcphdr, pcb, opts);
+#endif
+
+  LWIP_UNUSED_ARG(pcb);
+  LWIP_UNUSED_ARG(sacks_len);
+  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(tcphdr + 1)) + sacks_len * 4 + LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb));
+ 8016d46:	69bb      	ldr	r3, [r7, #24]
+ 8016d48:	f103 0214 	add.w	r2, r3, #20
+ 8016d4c:	8bfb      	ldrh	r3, [r7, #30]
+ 8016d4e:	009b      	lsls	r3, r3, #2
+ 8016d50:	4619      	mov	r1, r3
+ 8016d52:	79fb      	ldrb	r3, [r7, #7]
+ 8016d54:	009b      	lsls	r3, r3, #2
+ 8016d56:	f003 0304 	and.w	r3, r3, #4
+ 8016d5a:	440b      	add	r3, r1
+ 8016d5c:	4413      	add	r3, r2
+ 8016d5e:	697a      	ldr	r2, [r7, #20]
+ 8016d60:	429a      	cmp	r2, r3
+ 8016d62:	d006      	beq.n	8016d72 <tcp_output_fill_options+0x66>
+ 8016d64:	4b05      	ldr	r3, [pc, #20]	; (8016d7c <tcp_output_fill_options+0x70>)
+ 8016d66:	f240 7275 	movw	r2, #1909	; 0x775
+ 8016d6a:	4907      	ldr	r1, [pc, #28]	; (8016d88 <tcp_output_fill_options+0x7c>)
+ 8016d6c:	4805      	ldr	r0, [pc, #20]	; (8016d84 <tcp_output_fill_options+0x78>)
+ 8016d6e:	f005 fb43 	bl	801c3f8 <iprintf>
+  LWIP_UNUSED_ARG(optflags); /* for LWIP_NOASSERT */
+  LWIP_UNUSED_ARG(opts); /* for LWIP_NOASSERT */
+}
+ 8016d72:	bf00      	nop
+ 8016d74:	3720      	adds	r7, #32
+ 8016d76:	46bd      	mov	sp, r7
+ 8016d78:	bd80      	pop	{r7, pc}
+ 8016d7a:	bf00      	nop
+ 8016d7c:	0801ee60 	.word	0x0801ee60
+ 8016d80:	0801f590 	.word	0x0801f590
+ 8016d84:	0801eeb4 	.word	0x0801eeb4
+ 8016d88:	0801f488 	.word	0x0801f488
+
+08016d8c <tcp_output_control_segment>:
+ * header checksum and calling ip_output_if while handling netif hints and stats.
+ */
+static err_t
+tcp_output_control_segment(const struct tcp_pcb *pcb, struct pbuf *p,
+                           const ip_addr_t *src, const ip_addr_t *dst)
+{
+ 8016d8c:	b580      	push	{r7, lr}
+ 8016d8e:	b08a      	sub	sp, #40	; 0x28
+ 8016d90:	af04      	add	r7, sp, #16
+ 8016d92:	60f8      	str	r0, [r7, #12]
+ 8016d94:	60b9      	str	r1, [r7, #8]
+ 8016d96:	607a      	str	r2, [r7, #4]
+ 8016d98:	603b      	str	r3, [r7, #0]
+  err_t err;
+  struct netif *netif;
+
+  LWIP_ASSERT("tcp_output_control_segment: invalid pbuf", p != NULL);
+ 8016d9a:	68bb      	ldr	r3, [r7, #8]
+ 8016d9c:	2b00      	cmp	r3, #0
+ 8016d9e:	d106      	bne.n	8016dae <tcp_output_control_segment+0x22>
+ 8016da0:	4b1c      	ldr	r3, [pc, #112]	; (8016e14 <tcp_output_control_segment+0x88>)
+ 8016da2:	f240 7287 	movw	r2, #1927	; 0x787
+ 8016da6:	491c      	ldr	r1, [pc, #112]	; (8016e18 <tcp_output_control_segment+0x8c>)
+ 8016da8:	481c      	ldr	r0, [pc, #112]	; (8016e1c <tcp_output_control_segment+0x90>)
+ 8016daa:	f005 fb25 	bl	801c3f8 <iprintf>
+
+  netif = tcp_route(pcb, src, dst);
+ 8016dae:	683a      	ldr	r2, [r7, #0]
+ 8016db0:	6879      	ldr	r1, [r7, #4]
+ 8016db2:	68f8      	ldr	r0, [r7, #12]
+ 8016db4:	f7fe ff2e 	bl	8015c14 <tcp_route>
+ 8016db8:	6138      	str	r0, [r7, #16]
+  if (netif == NULL) {
+ 8016dba:	693b      	ldr	r3, [r7, #16]
+ 8016dbc:	2b00      	cmp	r3, #0
+ 8016dbe:	d102      	bne.n	8016dc6 <tcp_output_control_segment+0x3a>
+    err = ERR_RTE;
+ 8016dc0:	23fc      	movs	r3, #252	; 0xfc
+ 8016dc2:	75fb      	strb	r3, [r7, #23]
+ 8016dc4:	e01c      	b.n	8016e00 <tcp_output_control_segment+0x74>
+      struct tcp_hdr *tcphdr = (struct tcp_hdr *)p->payload;
+      tcphdr->chksum = ip_chksum_pseudo(p, IP_PROTO_TCP, p->tot_len,
+                                        src, dst);
+    }
+#endif
+    if (pcb != NULL) {
+ 8016dc6:	68fb      	ldr	r3, [r7, #12]
+ 8016dc8:	2b00      	cmp	r3, #0
+ 8016dca:	d006      	beq.n	8016dda <tcp_output_control_segment+0x4e>
+      NETIF_SET_HINTS(netif, LWIP_CONST_CAST(struct netif_hint*, &(pcb->netif_hints)));
+      ttl = pcb->ttl;
+ 8016dcc:	68fb      	ldr	r3, [r7, #12]
+ 8016dce:	7adb      	ldrb	r3, [r3, #11]
+ 8016dd0:	75bb      	strb	r3, [r7, #22]
+      tos = pcb->tos;
+ 8016dd2:	68fb      	ldr	r3, [r7, #12]
+ 8016dd4:	7a9b      	ldrb	r3, [r3, #10]
+ 8016dd6:	757b      	strb	r3, [r7, #21]
+ 8016dd8:	e003      	b.n	8016de2 <tcp_output_control_segment+0x56>
+    } else {
+      /* Send output with hardcoded TTL/HL since we have no access to the pcb */
+      ttl = TCP_TTL;
+ 8016dda:	23ff      	movs	r3, #255	; 0xff
+ 8016ddc:	75bb      	strb	r3, [r7, #22]
+      tos = 0;
+ 8016dde:	2300      	movs	r3, #0
+ 8016de0:	757b      	strb	r3, [r7, #21]
+    }
+    TCP_STATS_INC(tcp.xmit);
+    err = ip_output_if(p, src, dst, ttl, tos, IP_PROTO_TCP, netif);
+ 8016de2:	7dba      	ldrb	r2, [r7, #22]
+ 8016de4:	693b      	ldr	r3, [r7, #16]
+ 8016de6:	9302      	str	r3, [sp, #8]
+ 8016de8:	2306      	movs	r3, #6
+ 8016dea:	9301      	str	r3, [sp, #4]
+ 8016dec:	7d7b      	ldrb	r3, [r7, #21]
+ 8016dee:	9300      	str	r3, [sp, #0]
+ 8016df0:	4613      	mov	r3, r2
+ 8016df2:	683a      	ldr	r2, [r7, #0]
+ 8016df4:	6879      	ldr	r1, [r7, #4]
+ 8016df6:	68b8      	ldr	r0, [r7, #8]
+ 8016df8:	f004 f964 	bl	801b0c4 <ip4_output_if>
+ 8016dfc:	4603      	mov	r3, r0
+ 8016dfe:	75fb      	strb	r3, [r7, #23]
+    NETIF_RESET_HINTS(netif);
+  }
+  pbuf_free(p);
+ 8016e00:	68b8      	ldr	r0, [r7, #8]
+ 8016e02:	f7fa fdc9 	bl	8011998 <pbuf_free>
+  return err;
+ 8016e06:	f997 3017 	ldrsb.w	r3, [r7, #23]
+}
+ 8016e0a:	4618      	mov	r0, r3
+ 8016e0c:	3718      	adds	r7, #24
+ 8016e0e:	46bd      	mov	sp, r7
+ 8016e10:	bd80      	pop	{r7, pc}
+ 8016e12:	bf00      	nop
+ 8016e14:	0801ee60 	.word	0x0801ee60
+ 8016e18:	0801f5b8 	.word	0x0801f5b8
+ 8016e1c:	0801eeb4 	.word	0x0801eeb4
+
+08016e20 <tcp_rst>:
+ */
+void
+tcp_rst(const struct tcp_pcb *pcb, u32_t seqno, u32_t ackno,
+        const ip_addr_t *local_ip, const ip_addr_t *remote_ip,
+        u16_t local_port, u16_t remote_port)
+{
+ 8016e20:	b590      	push	{r4, r7, lr}
+ 8016e22:	b08b      	sub	sp, #44	; 0x2c
+ 8016e24:	af04      	add	r7, sp, #16
+ 8016e26:	60f8      	str	r0, [r7, #12]
+ 8016e28:	60b9      	str	r1, [r7, #8]
+ 8016e2a:	607a      	str	r2, [r7, #4]
+ 8016e2c:	603b      	str	r3, [r7, #0]
+  struct pbuf *p;
+  u16_t wnd;
+  u8_t optlen;
+
+  LWIP_ASSERT("tcp_rst: invalid local_ip", local_ip != NULL);
+ 8016e2e:	683b      	ldr	r3, [r7, #0]
+ 8016e30:	2b00      	cmp	r3, #0
+ 8016e32:	d106      	bne.n	8016e42 <tcp_rst+0x22>
+ 8016e34:	4b1f      	ldr	r3, [pc, #124]	; (8016eb4 <tcp_rst+0x94>)
+ 8016e36:	f240 72c4 	movw	r2, #1988	; 0x7c4
+ 8016e3a:	491f      	ldr	r1, [pc, #124]	; (8016eb8 <tcp_rst+0x98>)
+ 8016e3c:	481f      	ldr	r0, [pc, #124]	; (8016ebc <tcp_rst+0x9c>)
+ 8016e3e:	f005 fadb 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("tcp_rst: invalid remote_ip", remote_ip != NULL);
+ 8016e42:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8016e44:	2b00      	cmp	r3, #0
+ 8016e46:	d106      	bne.n	8016e56 <tcp_rst+0x36>
+ 8016e48:	4b1a      	ldr	r3, [pc, #104]	; (8016eb4 <tcp_rst+0x94>)
+ 8016e4a:	f240 72c5 	movw	r2, #1989	; 0x7c5
+ 8016e4e:	491c      	ldr	r1, [pc, #112]	; (8016ec0 <tcp_rst+0xa0>)
+ 8016e50:	481a      	ldr	r0, [pc, #104]	; (8016ebc <tcp_rst+0x9c>)
+ 8016e52:	f005 fad1 	bl	801c3f8 <iprintf>
+
+  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
+ 8016e56:	2300      	movs	r3, #0
+ 8016e58:	75fb      	strb	r3, [r7, #23]
+
+#if LWIP_WND_SCALE
+  wnd = PP_HTONS(((TCP_WND >> TCP_RCV_SCALE) & 0xFFFF));
+#else
+  wnd = PP_HTONS(TCP_WND);
+ 8016e5a:	f246 0308 	movw	r3, #24584	; 0x6008
+ 8016e5e:	82bb      	strh	r3, [r7, #20]
+#endif
+
+  p = tcp_output_alloc_header_common(ackno, optlen, 0, lwip_htonl(seqno), local_port,
+ 8016e60:	7dfb      	ldrb	r3, [r7, #23]
+ 8016e62:	b29c      	uxth	r4, r3
+ 8016e64:	68b8      	ldr	r0, [r7, #8]
+ 8016e66:	f7f9 f9f8 	bl	801025a <lwip_htonl>
+ 8016e6a:	4602      	mov	r2, r0
+ 8016e6c:	8abb      	ldrh	r3, [r7, #20]
+ 8016e6e:	9303      	str	r3, [sp, #12]
+ 8016e70:	2314      	movs	r3, #20
+ 8016e72:	9302      	str	r3, [sp, #8]
+ 8016e74:	8e3b      	ldrh	r3, [r7, #48]	; 0x30
+ 8016e76:	9301      	str	r3, [sp, #4]
+ 8016e78:	8dbb      	ldrh	r3, [r7, #44]	; 0x2c
+ 8016e7a:	9300      	str	r3, [sp, #0]
+ 8016e7c:	4613      	mov	r3, r2
+ 8016e7e:	2200      	movs	r2, #0
+ 8016e80:	4621      	mov	r1, r4
+ 8016e82:	6878      	ldr	r0, [r7, #4]
+ 8016e84:	f7ff fe90 	bl	8016ba8 <tcp_output_alloc_header_common>
+ 8016e88:	6138      	str	r0, [r7, #16]
+    remote_port, TCP_RST | TCP_ACK, wnd);
+  if (p == NULL) {
+ 8016e8a:	693b      	ldr	r3, [r7, #16]
+ 8016e8c:	2b00      	cmp	r3, #0
+ 8016e8e:	d00c      	beq.n	8016eaa <tcp_rst+0x8a>
+    LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n"));
+    return;
+  }
+  tcp_output_fill_options(pcb, p, 0, optlen);
+ 8016e90:	7dfb      	ldrb	r3, [r7, #23]
+ 8016e92:	2200      	movs	r2, #0
+ 8016e94:	6939      	ldr	r1, [r7, #16]
+ 8016e96:	68f8      	ldr	r0, [r7, #12]
+ 8016e98:	f7ff ff38 	bl	8016d0c <tcp_output_fill_options>
+
+  MIB2_STATS_INC(mib2.tcpoutrsts);
+
+  tcp_output_control_segment(pcb, p, local_ip, remote_ip);
+ 8016e9c:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8016e9e:	683a      	ldr	r2, [r7, #0]
+ 8016ea0:	6939      	ldr	r1, [r7, #16]
+ 8016ea2:	68f8      	ldr	r0, [r7, #12]
+ 8016ea4:	f7ff ff72 	bl	8016d8c <tcp_output_control_segment>
+ 8016ea8:	e000      	b.n	8016eac <tcp_rst+0x8c>
+    return;
+ 8016eaa:	bf00      	nop
+  LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno));
+}
+ 8016eac:	371c      	adds	r7, #28
+ 8016eae:	46bd      	mov	sp, r7
+ 8016eb0:	bd90      	pop	{r4, r7, pc}
+ 8016eb2:	bf00      	nop
+ 8016eb4:	0801ee60 	.word	0x0801ee60
+ 8016eb8:	0801f5e4 	.word	0x0801f5e4
+ 8016ebc:	0801eeb4 	.word	0x0801eeb4
+ 8016ec0:	0801f600 	.word	0x0801f600
+
+08016ec4 <tcp_send_empty_ack>:
+ *
+ * @param pcb Protocol control block for the TCP connection to send the ACK
+ */
+err_t
+tcp_send_empty_ack(struct tcp_pcb *pcb)
+{
+ 8016ec4:	b590      	push	{r4, r7, lr}
+ 8016ec6:	b087      	sub	sp, #28
+ 8016ec8:	af00      	add	r7, sp, #0
+ 8016eca:	6078      	str	r0, [r7, #4]
+  err_t err;
+  struct pbuf *p;
+  u8_t optlen, optflags = 0;
+ 8016ecc:	2300      	movs	r3, #0
+ 8016ece:	75fb      	strb	r3, [r7, #23]
+  u8_t num_sacks = 0;
+ 8016ed0:	2300      	movs	r3, #0
+ 8016ed2:	75bb      	strb	r3, [r7, #22]
+
+  LWIP_ASSERT("tcp_send_empty_ack: invalid pcb", pcb != NULL);
+ 8016ed4:	687b      	ldr	r3, [r7, #4]
+ 8016ed6:	2b00      	cmp	r3, #0
+ 8016ed8:	d106      	bne.n	8016ee8 <tcp_send_empty_ack+0x24>
+ 8016eda:	4b28      	ldr	r3, [pc, #160]	; (8016f7c <tcp_send_empty_ack+0xb8>)
+ 8016edc:	f240 72ea 	movw	r2, #2026	; 0x7ea
+ 8016ee0:	4927      	ldr	r1, [pc, #156]	; (8016f80 <tcp_send_empty_ack+0xbc>)
+ 8016ee2:	4828      	ldr	r0, [pc, #160]	; (8016f84 <tcp_send_empty_ack+0xc0>)
+ 8016ee4:	f005 fa88 	bl	801c3f8 <iprintf>
+#if LWIP_TCP_TIMESTAMPS
+  if (pcb->flags & TF_TIMESTAMP) {
+    optflags = TF_SEG_OPTS_TS;
+  }
+#endif
+  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
+ 8016ee8:	7dfb      	ldrb	r3, [r7, #23]
+ 8016eea:	009b      	lsls	r3, r3, #2
+ 8016eec:	b2db      	uxtb	r3, r3
+ 8016eee:	f003 0304 	and.w	r3, r3, #4
+ 8016ef2:	757b      	strb	r3, [r7, #21]
+  if ((num_sacks = tcp_get_num_sacks(pcb, optlen)) > 0) {
+    optlen += 4 + num_sacks * 8; /* 4 bytes for header (including 2*NOP), plus 8B for each SACK */
+  }
+#endif
+
+  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt));
+ 8016ef4:	7d7b      	ldrb	r3, [r7, #21]
+ 8016ef6:	b29c      	uxth	r4, r3
+ 8016ef8:	687b      	ldr	r3, [r7, #4]
+ 8016efa:	6d1b      	ldr	r3, [r3, #80]	; 0x50
+ 8016efc:	4618      	mov	r0, r3
+ 8016efe:	f7f9 f9ac 	bl	801025a <lwip_htonl>
+ 8016f02:	4603      	mov	r3, r0
+ 8016f04:	2200      	movs	r2, #0
+ 8016f06:	4621      	mov	r1, r4
+ 8016f08:	6878      	ldr	r0, [r7, #4]
+ 8016f0a:	f7ff fec1 	bl	8016c90 <tcp_output_alloc_header>
+ 8016f0e:	6138      	str	r0, [r7, #16]
+  if (p == NULL) {
+ 8016f10:	693b      	ldr	r3, [r7, #16]
+ 8016f12:	2b00      	cmp	r3, #0
+ 8016f14:	d109      	bne.n	8016f2a <tcp_send_empty_ack+0x66>
+    /* let tcp_fasttmr retry sending this ACK */
+    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
+ 8016f16:	687b      	ldr	r3, [r7, #4]
+ 8016f18:	8b5b      	ldrh	r3, [r3, #26]
+ 8016f1a:	f043 0303 	orr.w	r3, r3, #3
+ 8016f1e:	b29a      	uxth	r2, r3
+ 8016f20:	687b      	ldr	r3, [r7, #4]
+ 8016f22:	835a      	strh	r2, [r3, #26]
+    LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n"));
+    return ERR_BUF;
+ 8016f24:	f06f 0301 	mvn.w	r3, #1
+ 8016f28:	e023      	b.n	8016f72 <tcp_send_empty_ack+0xae>
+  }
+  tcp_output_fill_options(pcb, p, optflags, num_sacks);
+ 8016f2a:	7dbb      	ldrb	r3, [r7, #22]
+ 8016f2c:	7dfa      	ldrb	r2, [r7, #23]
+ 8016f2e:	6939      	ldr	r1, [r7, #16]
+ 8016f30:	6878      	ldr	r0, [r7, #4]
+ 8016f32:	f7ff feeb 	bl	8016d0c <tcp_output_fill_options>
+  pcb->ts_lastacksent = pcb->rcv_nxt;
+#endif
+
+  LWIP_DEBUGF(TCP_OUTPUT_DEBUG,
+              ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt));
+  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
+ 8016f36:	687a      	ldr	r2, [r7, #4]
+ 8016f38:	687b      	ldr	r3, [r7, #4]
+ 8016f3a:	3304      	adds	r3, #4
+ 8016f3c:	6939      	ldr	r1, [r7, #16]
+ 8016f3e:	6878      	ldr	r0, [r7, #4]
+ 8016f40:	f7ff ff24 	bl	8016d8c <tcp_output_control_segment>
+ 8016f44:	4603      	mov	r3, r0
+ 8016f46:	73fb      	strb	r3, [r7, #15]
+  if (err != ERR_OK) {
+ 8016f48:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 8016f4c:	2b00      	cmp	r3, #0
+ 8016f4e:	d007      	beq.n	8016f60 <tcp_send_empty_ack+0x9c>
+    /* let tcp_fasttmr retry sending this ACK */
+    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
+ 8016f50:	687b      	ldr	r3, [r7, #4]
+ 8016f52:	8b5b      	ldrh	r3, [r3, #26]
+ 8016f54:	f043 0303 	orr.w	r3, r3, #3
+ 8016f58:	b29a      	uxth	r2, r3
+ 8016f5a:	687b      	ldr	r3, [r7, #4]
+ 8016f5c:	835a      	strh	r2, [r3, #26]
+ 8016f5e:	e006      	b.n	8016f6e <tcp_send_empty_ack+0xaa>
+  } else {
+    /* remove ACK flags from the PCB, as we sent an empty ACK now */
+    tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
+ 8016f60:	687b      	ldr	r3, [r7, #4]
+ 8016f62:	8b5b      	ldrh	r3, [r3, #26]
+ 8016f64:	f023 0303 	bic.w	r3, r3, #3
+ 8016f68:	b29a      	uxth	r2, r3
+ 8016f6a:	687b      	ldr	r3, [r7, #4]
+ 8016f6c:	835a      	strh	r2, [r3, #26]
+  }
+
+  return err;
+ 8016f6e:	f997 300f 	ldrsb.w	r3, [r7, #15]
+}
+ 8016f72:	4618      	mov	r0, r3
+ 8016f74:	371c      	adds	r7, #28
+ 8016f76:	46bd      	mov	sp, r7
+ 8016f78:	bd90      	pop	{r4, r7, pc}
+ 8016f7a:	bf00      	nop
+ 8016f7c:	0801ee60 	.word	0x0801ee60
+ 8016f80:	0801f61c 	.word	0x0801f61c
+ 8016f84:	0801eeb4 	.word	0x0801eeb4
+
+08016f88 <tcp_keepalive>:
+ *
+ * @param pcb the tcp_pcb for which to send a keepalive packet
+ */
+err_t
+tcp_keepalive(struct tcp_pcb *pcb)
+{
+ 8016f88:	b590      	push	{r4, r7, lr}
+ 8016f8a:	b087      	sub	sp, #28
+ 8016f8c:	af00      	add	r7, sp, #0
+ 8016f8e:	6078      	str	r0, [r7, #4]
+  err_t err;
+  struct pbuf *p;
+  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
+ 8016f90:	2300      	movs	r3, #0
+ 8016f92:	75fb      	strb	r3, [r7, #23]
+
+  LWIP_ASSERT("tcp_keepalive: invalid pcb", pcb != NULL);
+ 8016f94:	687b      	ldr	r3, [r7, #4]
+ 8016f96:	2b00      	cmp	r3, #0
+ 8016f98:	d106      	bne.n	8016fa8 <tcp_keepalive+0x20>
+ 8016f9a:	4b18      	ldr	r3, [pc, #96]	; (8016ffc <tcp_keepalive+0x74>)
+ 8016f9c:	f640 0224 	movw	r2, #2084	; 0x824
+ 8016fa0:	4917      	ldr	r1, [pc, #92]	; (8017000 <tcp_keepalive+0x78>)
+ 8016fa2:	4818      	ldr	r0, [pc, #96]	; (8017004 <tcp_keepalive+0x7c>)
+ 8016fa4:	f005 fa28 	bl	801c3f8 <iprintf>
+  LWIP_DEBUGF(TCP_DEBUG, ("\n"));
+
+  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F"   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
+                          tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));
+
+  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt - 1));
+ 8016fa8:	7dfb      	ldrb	r3, [r7, #23]
+ 8016faa:	b29c      	uxth	r4, r3
+ 8016fac:	687b      	ldr	r3, [r7, #4]
+ 8016fae:	6d1b      	ldr	r3, [r3, #80]	; 0x50
+ 8016fb0:	3b01      	subs	r3, #1
+ 8016fb2:	4618      	mov	r0, r3
+ 8016fb4:	f7f9 f951 	bl	801025a <lwip_htonl>
+ 8016fb8:	4603      	mov	r3, r0
+ 8016fba:	2200      	movs	r2, #0
+ 8016fbc:	4621      	mov	r1, r4
+ 8016fbe:	6878      	ldr	r0, [r7, #4]
+ 8016fc0:	f7ff fe66 	bl	8016c90 <tcp_output_alloc_header>
+ 8016fc4:	6138      	str	r0, [r7, #16]
+  if (p == NULL) {
+ 8016fc6:	693b      	ldr	r3, [r7, #16]
+ 8016fc8:	2b00      	cmp	r3, #0
+ 8016fca:	d102      	bne.n	8016fd2 <tcp_keepalive+0x4a>
+    LWIP_DEBUGF(TCP_DEBUG,
+                ("tcp_keepalive: could not allocate memory for pbuf\n"));
+    return ERR_MEM;
+ 8016fcc:	f04f 33ff 	mov.w	r3, #4294967295
+ 8016fd0:	e010      	b.n	8016ff4 <tcp_keepalive+0x6c>
+  }
+  tcp_output_fill_options(pcb, p, 0, optlen);
+ 8016fd2:	7dfb      	ldrb	r3, [r7, #23]
+ 8016fd4:	2200      	movs	r2, #0
+ 8016fd6:	6939      	ldr	r1, [r7, #16]
+ 8016fd8:	6878      	ldr	r0, [r7, #4]
+ 8016fda:	f7ff fe97 	bl	8016d0c <tcp_output_fill_options>
+  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
+ 8016fde:	687a      	ldr	r2, [r7, #4]
+ 8016fe0:	687b      	ldr	r3, [r7, #4]
+ 8016fe2:	3304      	adds	r3, #4
+ 8016fe4:	6939      	ldr	r1, [r7, #16]
+ 8016fe6:	6878      	ldr	r0, [r7, #4]
+ 8016fe8:	f7ff fed0 	bl	8016d8c <tcp_output_control_segment>
+ 8016fec:	4603      	mov	r3, r0
+ 8016fee:	73fb      	strb	r3, [r7, #15]
+
+  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F" err %d.\n",
+                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
+  return err;
+ 8016ff0:	f997 300f 	ldrsb.w	r3, [r7, #15]
+}
+ 8016ff4:	4618      	mov	r0, r3
+ 8016ff6:	371c      	adds	r7, #28
+ 8016ff8:	46bd      	mov	sp, r7
+ 8016ffa:	bd90      	pop	{r4, r7, pc}
+ 8016ffc:	0801ee60 	.word	0x0801ee60
+ 8017000:	0801f63c 	.word	0x0801f63c
+ 8017004:	0801eeb4 	.word	0x0801eeb4
+
+08017008 <tcp_zero_window_probe>:
+ *
+ * @param pcb the tcp_pcb for which to send a zero-window probe packet
+ */
+err_t
+tcp_zero_window_probe(struct tcp_pcb *pcb)
+{
+ 8017008:	b590      	push	{r4, r7, lr}
+ 801700a:	b08b      	sub	sp, #44	; 0x2c
+ 801700c:	af00      	add	r7, sp, #0
+ 801700e:	6078      	str	r0, [r7, #4]
+  struct tcp_hdr *tcphdr;
+  struct tcp_seg *seg;
+  u16_t len;
+  u8_t is_fin;
+  u32_t snd_nxt;
+  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
+ 8017010:	2300      	movs	r3, #0
+ 8017012:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+
+  LWIP_ASSERT("tcp_zero_window_probe: invalid pcb", pcb != NULL);
+ 8017016:	687b      	ldr	r3, [r7, #4]
+ 8017018:	2b00      	cmp	r3, #0
+ 801701a:	d106      	bne.n	801702a <tcp_zero_window_probe+0x22>
+ 801701c:	4b4c      	ldr	r3, [pc, #304]	; (8017150 <tcp_zero_window_probe+0x148>)
+ 801701e:	f640 024f 	movw	r2, #2127	; 0x84f
+ 8017022:	494c      	ldr	r1, [pc, #304]	; (8017154 <tcp_zero_window_probe+0x14c>)
+ 8017024:	484c      	ldr	r0, [pc, #304]	; (8017158 <tcp_zero_window_probe+0x150>)
+ 8017026:	f005 f9e7 	bl	801c3f8 <iprintf>
+              ("tcp_zero_window_probe: tcp_ticks %"U32_F
+               "   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
+               tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));
+
+  /* Only consider unsent, persist timer should be off when there is data in-flight */
+  seg = pcb->unsent;
+ 801702a:	687b      	ldr	r3, [r7, #4]
+ 801702c:	6edb      	ldr	r3, [r3, #108]	; 0x6c
+ 801702e:	623b      	str	r3, [r7, #32]
+  if (seg == NULL) {
+ 8017030:	6a3b      	ldr	r3, [r7, #32]
+ 8017032:	2b00      	cmp	r3, #0
+ 8017034:	d101      	bne.n	801703a <tcp_zero_window_probe+0x32>
+    /* Not expected, persist timer should be off when the send buffer is empty */
+    return ERR_OK;
+ 8017036:	2300      	movs	r3, #0
+ 8017038:	e086      	b.n	8017148 <tcp_zero_window_probe+0x140>
+
+  /* increment probe count. NOTE: we record probe even if it fails
+     to actually transmit due to an error. This ensures memory exhaustion/
+     routing problem doesn't leave a zero-window pcb as an indefinite zombie.
+     RTO mechanism has similar behavior, see pcb->nrtx */
+  if (pcb->persist_probe < 0xFF) {
+ 801703a:	687b      	ldr	r3, [r7, #4]
+ 801703c:	f893 309a 	ldrb.w	r3, [r3, #154]	; 0x9a
+ 8017040:	2bff      	cmp	r3, #255	; 0xff
+ 8017042:	d007      	beq.n	8017054 <tcp_zero_window_probe+0x4c>
+    ++pcb->persist_probe;
+ 8017044:	687b      	ldr	r3, [r7, #4]
+ 8017046:	f893 309a 	ldrb.w	r3, [r3, #154]	; 0x9a
+ 801704a:	3301      	adds	r3, #1
+ 801704c:	b2da      	uxtb	r2, r3
+ 801704e:	687b      	ldr	r3, [r7, #4]
+ 8017050:	f883 209a 	strb.w	r2, [r3, #154]	; 0x9a
+  }
+
+  is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0);
+ 8017054:	6a3b      	ldr	r3, [r7, #32]
+ 8017056:	68db      	ldr	r3, [r3, #12]
+ 8017058:	899b      	ldrh	r3, [r3, #12]
+ 801705a:	b29b      	uxth	r3, r3
+ 801705c:	4618      	mov	r0, r3
+ 801705e:	f7f9 f8e7 	bl	8010230 <lwip_htons>
+ 8017062:	4603      	mov	r3, r0
+ 8017064:	b2db      	uxtb	r3, r3
+ 8017066:	f003 0301 	and.w	r3, r3, #1
+ 801706a:	2b00      	cmp	r3, #0
+ 801706c:	d005      	beq.n	801707a <tcp_zero_window_probe+0x72>
+ 801706e:	6a3b      	ldr	r3, [r7, #32]
+ 8017070:	891b      	ldrh	r3, [r3, #8]
+ 8017072:	2b00      	cmp	r3, #0
+ 8017074:	d101      	bne.n	801707a <tcp_zero_window_probe+0x72>
+ 8017076:	2301      	movs	r3, #1
+ 8017078:	e000      	b.n	801707c <tcp_zero_window_probe+0x74>
+ 801707a:	2300      	movs	r3, #0
+ 801707c:	77fb      	strb	r3, [r7, #31]
+  /* we want to send one seqno: either FIN or data (no options) */
+  len = is_fin ? 0 : 1;
+ 801707e:	7ffb      	ldrb	r3, [r7, #31]
+ 8017080:	2b00      	cmp	r3, #0
+ 8017082:	bf0c      	ite	eq
+ 8017084:	2301      	moveq	r3, #1
+ 8017086:	2300      	movne	r3, #0
+ 8017088:	b2db      	uxtb	r3, r3
+ 801708a:	83bb      	strh	r3, [r7, #28]
+
+  p = tcp_output_alloc_header(pcb, optlen, len, seg->tcphdr->seqno);
+ 801708c:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 8017090:	b299      	uxth	r1, r3
+ 8017092:	6a3b      	ldr	r3, [r7, #32]
+ 8017094:	68db      	ldr	r3, [r3, #12]
+ 8017096:	685b      	ldr	r3, [r3, #4]
+ 8017098:	8bba      	ldrh	r2, [r7, #28]
+ 801709a:	6878      	ldr	r0, [r7, #4]
+ 801709c:	f7ff fdf8 	bl	8016c90 <tcp_output_alloc_header>
+ 80170a0:	61b8      	str	r0, [r7, #24]
+  if (p == NULL) {
+ 80170a2:	69bb      	ldr	r3, [r7, #24]
+ 80170a4:	2b00      	cmp	r3, #0
+ 80170a6:	d102      	bne.n	80170ae <tcp_zero_window_probe+0xa6>
+    LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n"));
+    return ERR_MEM;
+ 80170a8:	f04f 33ff 	mov.w	r3, #4294967295
+ 80170ac:	e04c      	b.n	8017148 <tcp_zero_window_probe+0x140>
+  }
+  tcphdr = (struct tcp_hdr *)p->payload;
+ 80170ae:	69bb      	ldr	r3, [r7, #24]
+ 80170b0:	685b      	ldr	r3, [r3, #4]
+ 80170b2:	617b      	str	r3, [r7, #20]
+
+  if (is_fin) {
+ 80170b4:	7ffb      	ldrb	r3, [r7, #31]
+ 80170b6:	2b00      	cmp	r3, #0
+ 80170b8:	d011      	beq.n	80170de <tcp_zero_window_probe+0xd6>
+    /* FIN segment, no data */
+    TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN);
+ 80170ba:	697b      	ldr	r3, [r7, #20]
+ 80170bc:	899b      	ldrh	r3, [r3, #12]
+ 80170be:	b29b      	uxth	r3, r3
+ 80170c0:	b21b      	sxth	r3, r3
+ 80170c2:	f423 537c 	bic.w	r3, r3, #16128	; 0x3f00
+ 80170c6:	b21c      	sxth	r4, r3
+ 80170c8:	2011      	movs	r0, #17
+ 80170ca:	f7f9 f8b1 	bl	8010230 <lwip_htons>
+ 80170ce:	4603      	mov	r3, r0
+ 80170d0:	b21b      	sxth	r3, r3
+ 80170d2:	4323      	orrs	r3, r4
+ 80170d4:	b21b      	sxth	r3, r3
+ 80170d6:	b29a      	uxth	r2, r3
+ 80170d8:	697b      	ldr	r3, [r7, #20]
+ 80170da:	819a      	strh	r2, [r3, #12]
+ 80170dc:	e010      	b.n	8017100 <tcp_zero_window_probe+0xf8>
+  } else {
+    /* Data segment, copy in one byte from the head of the unacked queue */
+    char *d = ((char *)p->payload + TCP_HLEN);
+ 80170de:	69bb      	ldr	r3, [r7, #24]
+ 80170e0:	685b      	ldr	r3, [r3, #4]
+ 80170e2:	3314      	adds	r3, #20
+ 80170e4:	613b      	str	r3, [r7, #16]
+    /* Depending on whether the segment has already been sent (unacked) or not
+       (unsent), seg->p->payload points to the IP header or TCP header.
+       Ensure we copy the first TCP data byte: */
+    pbuf_copy_partial(seg->p, d, 1, seg->p->tot_len - seg->len);
+ 80170e6:	6a3b      	ldr	r3, [r7, #32]
+ 80170e8:	6858      	ldr	r0, [r3, #4]
+ 80170ea:	6a3b      	ldr	r3, [r7, #32]
+ 80170ec:	685b      	ldr	r3, [r3, #4]
+ 80170ee:	891a      	ldrh	r2, [r3, #8]
+ 80170f0:	6a3b      	ldr	r3, [r7, #32]
+ 80170f2:	891b      	ldrh	r3, [r3, #8]
+ 80170f4:	1ad3      	subs	r3, r2, r3
+ 80170f6:	b29b      	uxth	r3, r3
+ 80170f8:	2201      	movs	r2, #1
+ 80170fa:	6939      	ldr	r1, [r7, #16]
+ 80170fc:	f7fa fe52 	bl	8011da4 <pbuf_copy_partial>
+  }
+
+  /* The byte may be acknowledged without the window being opened. */
+  snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + 1;
+ 8017100:	6a3b      	ldr	r3, [r7, #32]
+ 8017102:	68db      	ldr	r3, [r3, #12]
+ 8017104:	685b      	ldr	r3, [r3, #4]
+ 8017106:	4618      	mov	r0, r3
+ 8017108:	f7f9 f8a7 	bl	801025a <lwip_htonl>
+ 801710c:	4603      	mov	r3, r0
+ 801710e:	3301      	adds	r3, #1
+ 8017110:	60fb      	str	r3, [r7, #12]
+  if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
+ 8017112:	687b      	ldr	r3, [r7, #4]
+ 8017114:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 8017116:	68fb      	ldr	r3, [r7, #12]
+ 8017118:	1ad3      	subs	r3, r2, r3
+ 801711a:	2b00      	cmp	r3, #0
+ 801711c:	da02      	bge.n	8017124 <tcp_zero_window_probe+0x11c>
+    pcb->snd_nxt = snd_nxt;
+ 801711e:	687b      	ldr	r3, [r7, #4]
+ 8017120:	68fa      	ldr	r2, [r7, #12]
+ 8017122:	651a      	str	r2, [r3, #80]	; 0x50
+  }
+  tcp_output_fill_options(pcb, p, 0, optlen);
+ 8017124:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 8017128:	2200      	movs	r2, #0
+ 801712a:	69b9      	ldr	r1, [r7, #24]
+ 801712c:	6878      	ldr	r0, [r7, #4]
+ 801712e:	f7ff fded 	bl	8016d0c <tcp_output_fill_options>
+
+  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
+ 8017132:	687a      	ldr	r2, [r7, #4]
+ 8017134:	687b      	ldr	r3, [r7, #4]
+ 8017136:	3304      	adds	r3, #4
+ 8017138:	69b9      	ldr	r1, [r7, #24]
+ 801713a:	6878      	ldr	r0, [r7, #4]
+ 801713c:	f7ff fe26 	bl	8016d8c <tcp_output_control_segment>
+ 8017140:	4603      	mov	r3, r0
+ 8017142:	72fb      	strb	r3, [r7, #11]
+
+  LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F
+                          " ackno %"U32_F" err %d.\n",
+                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
+  return err;
+ 8017144:	f997 300b 	ldrsb.w	r3, [r7, #11]
+}
+ 8017148:	4618      	mov	r0, r3
+ 801714a:	372c      	adds	r7, #44	; 0x2c
+ 801714c:	46bd      	mov	sp, r7
+ 801714e:	bd90      	pop	{r4, r7, pc}
+ 8017150:	0801ee60 	.word	0x0801ee60
+ 8017154:	0801f658 	.word	0x0801f658
+ 8017158:	0801eeb4 	.word	0x0801eeb4
+
+0801715c <tcpip_tcp_timer>:
+ *
+ * @param arg unused argument
+ */
+static void
+tcpip_tcp_timer(void *arg)
+{
+ 801715c:	b580      	push	{r7, lr}
+ 801715e:	b082      	sub	sp, #8
+ 8017160:	af00      	add	r7, sp, #0
+ 8017162:	6078      	str	r0, [r7, #4]
+  LWIP_UNUSED_ARG(arg);
+
+  /* call TCP timer handler */
+  tcp_tmr();
+ 8017164:	f7fa ff0c 	bl	8011f80 <tcp_tmr>
+  /* timer still needed? */
+  if (tcp_active_pcbs || tcp_tw_pcbs) {
+ 8017168:	4b0a      	ldr	r3, [pc, #40]	; (8017194 <tcpip_tcp_timer+0x38>)
+ 801716a:	681b      	ldr	r3, [r3, #0]
+ 801716c:	2b00      	cmp	r3, #0
+ 801716e:	d103      	bne.n	8017178 <tcpip_tcp_timer+0x1c>
+ 8017170:	4b09      	ldr	r3, [pc, #36]	; (8017198 <tcpip_tcp_timer+0x3c>)
+ 8017172:	681b      	ldr	r3, [r3, #0]
+ 8017174:	2b00      	cmp	r3, #0
+ 8017176:	d005      	beq.n	8017184 <tcpip_tcp_timer+0x28>
+    /* restart timer */
+    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
+ 8017178:	2200      	movs	r2, #0
+ 801717a:	4908      	ldr	r1, [pc, #32]	; (801719c <tcpip_tcp_timer+0x40>)
+ 801717c:	20fa      	movs	r0, #250	; 0xfa
+ 801717e:	f000 f8f1 	bl	8017364 <sys_timeout>
+ 8017182:	e002      	b.n	801718a <tcpip_tcp_timer+0x2e>
+  } else {
+    /* disable timer */
+    tcpip_tcp_timer_active = 0;
+ 8017184:	4b06      	ldr	r3, [pc, #24]	; (80171a0 <tcpip_tcp_timer+0x44>)
+ 8017186:	2200      	movs	r2, #0
+ 8017188:	601a      	str	r2, [r3, #0]
+  }
+}
+ 801718a:	bf00      	nop
+ 801718c:	3708      	adds	r7, #8
+ 801718e:	46bd      	mov	sp, r7
+ 8017190:	bd80      	pop	{r7, pc}
+ 8017192:	bf00      	nop
+ 8017194:	2000f7e8 	.word	0x2000f7e8
+ 8017198:	2000f7f8 	.word	0x2000f7f8
+ 801719c:	0801715d 	.word	0x0801715d
+ 80171a0:	20008754 	.word	0x20008754
+
+080171a4 <tcp_timer_needed>:
+ * the reason is to have the TCP timer only running when
+ * there are active (or time-wait) PCBs.
+ */
+void
+tcp_timer_needed(void)
+{
+ 80171a4:	b580      	push	{r7, lr}
+ 80171a6:	af00      	add	r7, sp, #0
+  LWIP_ASSERT_CORE_LOCKED();
+
+  /* timer is off but needed again? */
+  if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) {
+ 80171a8:	4b0a      	ldr	r3, [pc, #40]	; (80171d4 <tcp_timer_needed+0x30>)
+ 80171aa:	681b      	ldr	r3, [r3, #0]
+ 80171ac:	2b00      	cmp	r3, #0
+ 80171ae:	d10f      	bne.n	80171d0 <tcp_timer_needed+0x2c>
+ 80171b0:	4b09      	ldr	r3, [pc, #36]	; (80171d8 <tcp_timer_needed+0x34>)
+ 80171b2:	681b      	ldr	r3, [r3, #0]
+ 80171b4:	2b00      	cmp	r3, #0
+ 80171b6:	d103      	bne.n	80171c0 <tcp_timer_needed+0x1c>
+ 80171b8:	4b08      	ldr	r3, [pc, #32]	; (80171dc <tcp_timer_needed+0x38>)
+ 80171ba:	681b      	ldr	r3, [r3, #0]
+ 80171bc:	2b00      	cmp	r3, #0
+ 80171be:	d007      	beq.n	80171d0 <tcp_timer_needed+0x2c>
+    /* enable and start timer */
+    tcpip_tcp_timer_active = 1;
+ 80171c0:	4b04      	ldr	r3, [pc, #16]	; (80171d4 <tcp_timer_needed+0x30>)
+ 80171c2:	2201      	movs	r2, #1
+ 80171c4:	601a      	str	r2, [r3, #0]
+    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
+ 80171c6:	2200      	movs	r2, #0
+ 80171c8:	4905      	ldr	r1, [pc, #20]	; (80171e0 <tcp_timer_needed+0x3c>)
+ 80171ca:	20fa      	movs	r0, #250	; 0xfa
+ 80171cc:	f000 f8ca 	bl	8017364 <sys_timeout>
+  }
+}
+ 80171d0:	bf00      	nop
+ 80171d2:	bd80      	pop	{r7, pc}
+ 80171d4:	20008754 	.word	0x20008754
+ 80171d8:	2000f7e8 	.word	0x2000f7e8
+ 80171dc:	2000f7f8 	.word	0x2000f7f8
+ 80171e0:	0801715d 	.word	0x0801715d
+
+080171e4 <sys_timeout_abs>:
+#if LWIP_DEBUG_TIMERNAMES
+sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg, const char *handler_name)
+#else /* LWIP_DEBUG_TIMERNAMES */
+sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg)
+#endif
+{
+ 80171e4:	b580      	push	{r7, lr}
+ 80171e6:	b086      	sub	sp, #24
+ 80171e8:	af00      	add	r7, sp, #0
+ 80171ea:	60f8      	str	r0, [r7, #12]
+ 80171ec:	60b9      	str	r1, [r7, #8]
+ 80171ee:	607a      	str	r2, [r7, #4]
+  struct sys_timeo *timeout, *t;
+
+  timeout = (struct sys_timeo *)memp_malloc(MEMP_SYS_TIMEOUT);
+ 80171f0:	200a      	movs	r0, #10
+ 80171f2:	f7f9 fcd3 	bl	8010b9c <memp_malloc>
+ 80171f6:	6138      	str	r0, [r7, #16]
+  if (timeout == NULL) {
+ 80171f8:	693b      	ldr	r3, [r7, #16]
+ 80171fa:	2b00      	cmp	r3, #0
+ 80171fc:	d109      	bne.n	8017212 <sys_timeout_abs+0x2e>
+    LWIP_ASSERT("sys_timeout: timeout != NULL, pool MEMP_SYS_TIMEOUT is empty", timeout != NULL);
+ 80171fe:	693b      	ldr	r3, [r7, #16]
+ 8017200:	2b00      	cmp	r3, #0
+ 8017202:	d151      	bne.n	80172a8 <sys_timeout_abs+0xc4>
+ 8017204:	4b2a      	ldr	r3, [pc, #168]	; (80172b0 <sys_timeout_abs+0xcc>)
+ 8017206:	22be      	movs	r2, #190	; 0xbe
+ 8017208:	492a      	ldr	r1, [pc, #168]	; (80172b4 <sys_timeout_abs+0xd0>)
+ 801720a:	482b      	ldr	r0, [pc, #172]	; (80172b8 <sys_timeout_abs+0xd4>)
+ 801720c:	f005 f8f4 	bl	801c3f8 <iprintf>
+    return;
+ 8017210:	e04a      	b.n	80172a8 <sys_timeout_abs+0xc4>
+  }
+
+  timeout->next = NULL;
+ 8017212:	693b      	ldr	r3, [r7, #16]
+ 8017214:	2200      	movs	r2, #0
+ 8017216:	601a      	str	r2, [r3, #0]
+  timeout->h = handler;
+ 8017218:	693b      	ldr	r3, [r7, #16]
+ 801721a:	68ba      	ldr	r2, [r7, #8]
+ 801721c:	609a      	str	r2, [r3, #8]
+  timeout->arg = arg;
+ 801721e:	693b      	ldr	r3, [r7, #16]
+ 8017220:	687a      	ldr	r2, [r7, #4]
+ 8017222:	60da      	str	r2, [r3, #12]
+  timeout->time = abs_time;
+ 8017224:	693b      	ldr	r3, [r7, #16]
+ 8017226:	68fa      	ldr	r2, [r7, #12]
+ 8017228:	605a      	str	r2, [r3, #4]
+  timeout->handler_name = handler_name;
+  LWIP_DEBUGF(TIMERS_DEBUG, ("sys_timeout: %p abs_time=%"U32_F" handler=%s arg=%p\n",
+                             (void *)timeout, abs_time, handler_name, (void *)arg));
+#endif /* LWIP_DEBUG_TIMERNAMES */
+
+  if (next_timeout == NULL) {
+ 801722a:	4b24      	ldr	r3, [pc, #144]	; (80172bc <sys_timeout_abs+0xd8>)
+ 801722c:	681b      	ldr	r3, [r3, #0]
+ 801722e:	2b00      	cmp	r3, #0
+ 8017230:	d103      	bne.n	801723a <sys_timeout_abs+0x56>
+    next_timeout = timeout;
+ 8017232:	4a22      	ldr	r2, [pc, #136]	; (80172bc <sys_timeout_abs+0xd8>)
+ 8017234:	693b      	ldr	r3, [r7, #16]
+ 8017236:	6013      	str	r3, [r2, #0]
+    return;
+ 8017238:	e037      	b.n	80172aa <sys_timeout_abs+0xc6>
+  }
+  if (TIME_LESS_THAN(timeout->time, next_timeout->time)) {
+ 801723a:	693b      	ldr	r3, [r7, #16]
+ 801723c:	685a      	ldr	r2, [r3, #4]
+ 801723e:	4b1f      	ldr	r3, [pc, #124]	; (80172bc <sys_timeout_abs+0xd8>)
+ 8017240:	681b      	ldr	r3, [r3, #0]
+ 8017242:	685b      	ldr	r3, [r3, #4]
+ 8017244:	1ad3      	subs	r3, r2, r3
+ 8017246:	0fdb      	lsrs	r3, r3, #31
+ 8017248:	f003 0301 	and.w	r3, r3, #1
+ 801724c:	b2db      	uxtb	r3, r3
+ 801724e:	2b00      	cmp	r3, #0
+ 8017250:	d007      	beq.n	8017262 <sys_timeout_abs+0x7e>
+    timeout->next = next_timeout;
+ 8017252:	4b1a      	ldr	r3, [pc, #104]	; (80172bc <sys_timeout_abs+0xd8>)
+ 8017254:	681a      	ldr	r2, [r3, #0]
+ 8017256:	693b      	ldr	r3, [r7, #16]
+ 8017258:	601a      	str	r2, [r3, #0]
+    next_timeout = timeout;
+ 801725a:	4a18      	ldr	r2, [pc, #96]	; (80172bc <sys_timeout_abs+0xd8>)
+ 801725c:	693b      	ldr	r3, [r7, #16]
+ 801725e:	6013      	str	r3, [r2, #0]
+ 8017260:	e023      	b.n	80172aa <sys_timeout_abs+0xc6>
+  } else {
+    for (t = next_timeout; t != NULL; t = t->next) {
+ 8017262:	4b16      	ldr	r3, [pc, #88]	; (80172bc <sys_timeout_abs+0xd8>)
+ 8017264:	681b      	ldr	r3, [r3, #0]
+ 8017266:	617b      	str	r3, [r7, #20]
+ 8017268:	e01a      	b.n	80172a0 <sys_timeout_abs+0xbc>
+      if ((t->next == NULL) || TIME_LESS_THAN(timeout->time, t->next->time)) {
+ 801726a:	697b      	ldr	r3, [r7, #20]
+ 801726c:	681b      	ldr	r3, [r3, #0]
+ 801726e:	2b00      	cmp	r3, #0
+ 8017270:	d00b      	beq.n	801728a <sys_timeout_abs+0xa6>
+ 8017272:	693b      	ldr	r3, [r7, #16]
+ 8017274:	685a      	ldr	r2, [r3, #4]
+ 8017276:	697b      	ldr	r3, [r7, #20]
+ 8017278:	681b      	ldr	r3, [r3, #0]
+ 801727a:	685b      	ldr	r3, [r3, #4]
+ 801727c:	1ad3      	subs	r3, r2, r3
+ 801727e:	0fdb      	lsrs	r3, r3, #31
+ 8017280:	f003 0301 	and.w	r3, r3, #1
+ 8017284:	b2db      	uxtb	r3, r3
+ 8017286:	2b00      	cmp	r3, #0
+ 8017288:	d007      	beq.n	801729a <sys_timeout_abs+0xb6>
+        timeout->next = t->next;
+ 801728a:	697b      	ldr	r3, [r7, #20]
+ 801728c:	681a      	ldr	r2, [r3, #0]
+ 801728e:	693b      	ldr	r3, [r7, #16]
+ 8017290:	601a      	str	r2, [r3, #0]
+        t->next = timeout;
+ 8017292:	697b      	ldr	r3, [r7, #20]
+ 8017294:	693a      	ldr	r2, [r7, #16]
+ 8017296:	601a      	str	r2, [r3, #0]
+        break;
+ 8017298:	e007      	b.n	80172aa <sys_timeout_abs+0xc6>
+    for (t = next_timeout; t != NULL; t = t->next) {
+ 801729a:	697b      	ldr	r3, [r7, #20]
+ 801729c:	681b      	ldr	r3, [r3, #0]
+ 801729e:	617b      	str	r3, [r7, #20]
+ 80172a0:	697b      	ldr	r3, [r7, #20]
+ 80172a2:	2b00      	cmp	r3, #0
+ 80172a4:	d1e1      	bne.n	801726a <sys_timeout_abs+0x86>
+ 80172a6:	e000      	b.n	80172aa <sys_timeout_abs+0xc6>
+    return;
+ 80172a8:	bf00      	nop
+      }
+    }
+  }
+}
+ 80172aa:	3718      	adds	r7, #24
+ 80172ac:	46bd      	mov	sp, r7
+ 80172ae:	bd80      	pop	{r7, pc}
+ 80172b0:	0801f67c 	.word	0x0801f67c
+ 80172b4:	0801f6b0 	.word	0x0801f6b0
+ 80172b8:	0801f6f0 	.word	0x0801f6f0
+ 80172bc:	2000874c 	.word	0x2000874c
+
+080172c0 <lwip_cyclic_timer>:
+#if !LWIP_TESTMODE
+static
+#endif
+void
+lwip_cyclic_timer(void *arg)
+{
+ 80172c0:	b580      	push	{r7, lr}
+ 80172c2:	b086      	sub	sp, #24
+ 80172c4:	af00      	add	r7, sp, #0
+ 80172c6:	6078      	str	r0, [r7, #4]
+  u32_t now;
+  u32_t next_timeout_time;
+  const struct lwip_cyclic_timer *cyclic = (const struct lwip_cyclic_timer *)arg;
+ 80172c8:	687b      	ldr	r3, [r7, #4]
+ 80172ca:	617b      	str	r3, [r7, #20]
+
+#if LWIP_DEBUG_TIMERNAMES
+  LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: %s()\n", cyclic->handler_name));
+#endif
+  cyclic->handler();
+ 80172cc:	697b      	ldr	r3, [r7, #20]
+ 80172ce:	685b      	ldr	r3, [r3, #4]
+ 80172d0:	4798      	blx	r3
+
+  now = sys_now();
+ 80172d2:	f7f5 fced 	bl	800ccb0 <sys_now>
+ 80172d6:	6138      	str	r0, [r7, #16]
+  next_timeout_time = (u32_t)(current_timeout_due_time + cyclic->interval_ms);  /* overflow handled by TIME_LESS_THAN macro */ 
+ 80172d8:	697b      	ldr	r3, [r7, #20]
+ 80172da:	681a      	ldr	r2, [r3, #0]
+ 80172dc:	4b0f      	ldr	r3, [pc, #60]	; (801731c <lwip_cyclic_timer+0x5c>)
+ 80172de:	681b      	ldr	r3, [r3, #0]
+ 80172e0:	4413      	add	r3, r2
+ 80172e2:	60fb      	str	r3, [r7, #12]
+  if (TIME_LESS_THAN(next_timeout_time, now)) {
+ 80172e4:	68fa      	ldr	r2, [r7, #12]
+ 80172e6:	693b      	ldr	r3, [r7, #16]
+ 80172e8:	1ad3      	subs	r3, r2, r3
+ 80172ea:	0fdb      	lsrs	r3, r3, #31
+ 80172ec:	f003 0301 	and.w	r3, r3, #1
+ 80172f0:	b2db      	uxtb	r3, r3
+ 80172f2:	2b00      	cmp	r3, #0
+ 80172f4:	d009      	beq.n	801730a <lwip_cyclic_timer+0x4a>
+    /* timer would immediately expire again -> "overload" -> restart without any correction */
+#if LWIP_DEBUG_TIMERNAMES
+    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg, cyclic->handler_name);
+#else
+    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg);
+ 80172f6:	697b      	ldr	r3, [r7, #20]
+ 80172f8:	681a      	ldr	r2, [r3, #0]
+ 80172fa:	693b      	ldr	r3, [r7, #16]
+ 80172fc:	4413      	add	r3, r2
+ 80172fe:	687a      	ldr	r2, [r7, #4]
+ 8017300:	4907      	ldr	r1, [pc, #28]	; (8017320 <lwip_cyclic_timer+0x60>)
+ 8017302:	4618      	mov	r0, r3
+ 8017304:	f7ff ff6e 	bl	80171e4 <sys_timeout_abs>
+    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg, cyclic->handler_name);
+#else
+    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
+#endif
+  }
+}
+ 8017308:	e004      	b.n	8017314 <lwip_cyclic_timer+0x54>
+    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
+ 801730a:	687a      	ldr	r2, [r7, #4]
+ 801730c:	4904      	ldr	r1, [pc, #16]	; (8017320 <lwip_cyclic_timer+0x60>)
+ 801730e:	68f8      	ldr	r0, [r7, #12]
+ 8017310:	f7ff ff68 	bl	80171e4 <sys_timeout_abs>
+}
+ 8017314:	bf00      	nop
+ 8017316:	3718      	adds	r7, #24
+ 8017318:	46bd      	mov	sp, r7
+ 801731a:	bd80      	pop	{r7, pc}
+ 801731c:	20008750 	.word	0x20008750
+ 8017320:	080172c1 	.word	0x080172c1
+
+08017324 <sys_timeouts_init>:
+
+/** Initialize this module */
+void sys_timeouts_init(void)
+{
+ 8017324:	b580      	push	{r7, lr}
+ 8017326:	b082      	sub	sp, #8
+ 8017328:	af00      	add	r7, sp, #0
+  size_t i;
+  /* tcp_tmr() at index 0 is started on demand */
+  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
+ 801732a:	2301      	movs	r3, #1
+ 801732c:	607b      	str	r3, [r7, #4]
+ 801732e:	e00e      	b.n	801734e <sys_timeouts_init+0x2a>
+    /* we have to cast via size_t to get rid of const warning
+      (this is OK as cyclic_timer() casts back to const* */
+    sys_timeout(lwip_cyclic_timers[i].interval_ms, lwip_cyclic_timer, LWIP_CONST_CAST(void *, &lwip_cyclic_timers[i]));
+ 8017330:	4a0a      	ldr	r2, [pc, #40]	; (801735c <sys_timeouts_init+0x38>)
+ 8017332:	687b      	ldr	r3, [r7, #4]
+ 8017334:	f852 0033 	ldr.w	r0, [r2, r3, lsl #3]
+ 8017338:	687b      	ldr	r3, [r7, #4]
+ 801733a:	00db      	lsls	r3, r3, #3
+ 801733c:	4a07      	ldr	r2, [pc, #28]	; (801735c <sys_timeouts_init+0x38>)
+ 801733e:	4413      	add	r3, r2
+ 8017340:	461a      	mov	r2, r3
+ 8017342:	4907      	ldr	r1, [pc, #28]	; (8017360 <sys_timeouts_init+0x3c>)
+ 8017344:	f000 f80e 	bl	8017364 <sys_timeout>
+  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
+ 8017348:	687b      	ldr	r3, [r7, #4]
+ 801734a:	3301      	adds	r3, #1
+ 801734c:	607b      	str	r3, [r7, #4]
+ 801734e:	687b      	ldr	r3, [r7, #4]
+ 8017350:	2b04      	cmp	r3, #4
+ 8017352:	d9ed      	bls.n	8017330 <sys_timeouts_init+0xc>
+  }
+}
+ 8017354:	bf00      	nop
+ 8017356:	3708      	adds	r7, #8
+ 8017358:	46bd      	mov	sp, r7
+ 801735a:	bd80      	pop	{r7, pc}
+ 801735c:	08022570 	.word	0x08022570
+ 8017360:	080172c1 	.word	0x080172c1
+
+08017364 <sys_timeout>:
+sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char *handler_name)
+#else /* LWIP_DEBUG_TIMERNAMES */
+void
+sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg)
+#endif /* LWIP_DEBUG_TIMERNAMES */
+{
+ 8017364:	b580      	push	{r7, lr}
+ 8017366:	b086      	sub	sp, #24
+ 8017368:	af00      	add	r7, sp, #0
+ 801736a:	60f8      	str	r0, [r7, #12]
+ 801736c:	60b9      	str	r1, [r7, #8]
+ 801736e:	607a      	str	r2, [r7, #4]
+  u32_t next_timeout_time;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ASSERT("Timeout time too long, max is LWIP_UINT32_MAX/4 msecs", msecs <= (LWIP_UINT32_MAX / 4));
+ 8017370:	68fb      	ldr	r3, [r7, #12]
+ 8017372:	f1b3 4f80 	cmp.w	r3, #1073741824	; 0x40000000
+ 8017376:	d306      	bcc.n	8017386 <sys_timeout+0x22>
+ 8017378:	4b0a      	ldr	r3, [pc, #40]	; (80173a4 <sys_timeout+0x40>)
+ 801737a:	f240 1229 	movw	r2, #297	; 0x129
+ 801737e:	490a      	ldr	r1, [pc, #40]	; (80173a8 <sys_timeout+0x44>)
+ 8017380:	480a      	ldr	r0, [pc, #40]	; (80173ac <sys_timeout+0x48>)
+ 8017382:	f005 f839 	bl	801c3f8 <iprintf>
+
+  next_timeout_time = (u32_t)(sys_now() + msecs); /* overflow handled by TIME_LESS_THAN macro */ 
+ 8017386:	f7f5 fc93 	bl	800ccb0 <sys_now>
+ 801738a:	4602      	mov	r2, r0
+ 801738c:	68fb      	ldr	r3, [r7, #12]
+ 801738e:	4413      	add	r3, r2
+ 8017390:	617b      	str	r3, [r7, #20]
+
+#if LWIP_DEBUG_TIMERNAMES
+  sys_timeout_abs(next_timeout_time, handler, arg, handler_name);
+#else
+  sys_timeout_abs(next_timeout_time, handler, arg);
+ 8017392:	687a      	ldr	r2, [r7, #4]
+ 8017394:	68b9      	ldr	r1, [r7, #8]
+ 8017396:	6978      	ldr	r0, [r7, #20]
+ 8017398:	f7ff ff24 	bl	80171e4 <sys_timeout_abs>
+#endif
+}
+ 801739c:	bf00      	nop
+ 801739e:	3718      	adds	r7, #24
+ 80173a0:	46bd      	mov	sp, r7
+ 80173a2:	bd80      	pop	{r7, pc}
+ 80173a4:	0801f67c 	.word	0x0801f67c
+ 80173a8:	0801f718 	.word	0x0801f718
+ 80173ac:	0801f6f0 	.word	0x0801f6f0
+
+080173b0 <sys_check_timeouts>:
+ *
+ * Must be called periodically from your main loop.
+ */
+void
+sys_check_timeouts(void)
+{
+ 80173b0:	b580      	push	{r7, lr}
+ 80173b2:	b084      	sub	sp, #16
+ 80173b4:	af00      	add	r7, sp, #0
+  u32_t now;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  /* Process only timers expired at the start of the function. */
+  now = sys_now();
+ 80173b6:	f7f5 fc7b 	bl	800ccb0 <sys_now>
+ 80173ba:	60f8      	str	r0, [r7, #12]
+    sys_timeout_handler handler;
+    void *arg;
+
+    PBUF_CHECK_FREE_OOSEQ();
+
+    tmptimeout = next_timeout;
+ 80173bc:	4b17      	ldr	r3, [pc, #92]	; (801741c <sys_check_timeouts+0x6c>)
+ 80173be:	681b      	ldr	r3, [r3, #0]
+ 80173c0:	60bb      	str	r3, [r7, #8]
+    if (tmptimeout == NULL) {
+ 80173c2:	68bb      	ldr	r3, [r7, #8]
+ 80173c4:	2b00      	cmp	r3, #0
+ 80173c6:	d022      	beq.n	801740e <sys_check_timeouts+0x5e>
+      return;
+    }
+
+    if (TIME_LESS_THAN(now, tmptimeout->time)) {
+ 80173c8:	68bb      	ldr	r3, [r7, #8]
+ 80173ca:	685b      	ldr	r3, [r3, #4]
+ 80173cc:	68fa      	ldr	r2, [r7, #12]
+ 80173ce:	1ad3      	subs	r3, r2, r3
+ 80173d0:	0fdb      	lsrs	r3, r3, #31
+ 80173d2:	f003 0301 	and.w	r3, r3, #1
+ 80173d6:	b2db      	uxtb	r3, r3
+ 80173d8:	2b00      	cmp	r3, #0
+ 80173da:	d11a      	bne.n	8017412 <sys_check_timeouts+0x62>
+      return;
+    }
+
+    /* Timeout has expired */
+    next_timeout = tmptimeout->next;
+ 80173dc:	68bb      	ldr	r3, [r7, #8]
+ 80173de:	681b      	ldr	r3, [r3, #0]
+ 80173e0:	4a0e      	ldr	r2, [pc, #56]	; (801741c <sys_check_timeouts+0x6c>)
+ 80173e2:	6013      	str	r3, [r2, #0]
+    handler = tmptimeout->h;
+ 80173e4:	68bb      	ldr	r3, [r7, #8]
+ 80173e6:	689b      	ldr	r3, [r3, #8]
+ 80173e8:	607b      	str	r3, [r7, #4]
+    arg = tmptimeout->arg;
+ 80173ea:	68bb      	ldr	r3, [r7, #8]
+ 80173ec:	68db      	ldr	r3, [r3, #12]
+ 80173ee:	603b      	str	r3, [r7, #0]
+    current_timeout_due_time = tmptimeout->time;
+ 80173f0:	68bb      	ldr	r3, [r7, #8]
+ 80173f2:	685b      	ldr	r3, [r3, #4]
+ 80173f4:	4a0a      	ldr	r2, [pc, #40]	; (8017420 <sys_check_timeouts+0x70>)
+ 80173f6:	6013      	str	r3, [r2, #0]
+    if (handler != NULL) {
+      LWIP_DEBUGF(TIMERS_DEBUG, ("sct calling h=%s t=%"U32_F" arg=%p\n",
+                                 tmptimeout->handler_name, sys_now() - tmptimeout->time, arg));
+    }
+#endif /* LWIP_DEBUG_TIMERNAMES */
+    memp_free(MEMP_SYS_TIMEOUT, tmptimeout);
+ 80173f8:	68b9      	ldr	r1, [r7, #8]
+ 80173fa:	200a      	movs	r0, #10
+ 80173fc:	f7f9 fc20 	bl	8010c40 <memp_free>
+    if (handler != NULL) {
+ 8017400:	687b      	ldr	r3, [r7, #4]
+ 8017402:	2b00      	cmp	r3, #0
+ 8017404:	d0da      	beq.n	80173bc <sys_check_timeouts+0xc>
+      handler(arg);
+ 8017406:	687b      	ldr	r3, [r7, #4]
+ 8017408:	6838      	ldr	r0, [r7, #0]
+ 801740a:	4798      	blx	r3
+  do {
+ 801740c:	e7d6      	b.n	80173bc <sys_check_timeouts+0xc>
+      return;
+ 801740e:	bf00      	nop
+ 8017410:	e000      	b.n	8017414 <sys_check_timeouts+0x64>
+      return;
+ 8017412:	bf00      	nop
+    }
+    LWIP_TCPIP_THREAD_ALIVE();
+
+    /* Repeat until all expired timers have been called */
+  } while (1);
+}
+ 8017414:	3710      	adds	r7, #16
+ 8017416:	46bd      	mov	sp, r7
+ 8017418:	bd80      	pop	{r7, pc}
+ 801741a:	bf00      	nop
+ 801741c:	2000874c 	.word	0x2000874c
+ 8017420:	20008750 	.word	0x20008750
+
+08017424 <sys_timeouts_sleeptime>:
+/** Return the time left before the next timeout is due. If no timeouts are
+ * enqueued, returns 0xffffffff
+ */
+u32_t
+sys_timeouts_sleeptime(void)
+{
+ 8017424:	b580      	push	{r7, lr}
+ 8017426:	b082      	sub	sp, #8
+ 8017428:	af00      	add	r7, sp, #0
+  u32_t now;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  if (next_timeout == NULL) {
+ 801742a:	4b16      	ldr	r3, [pc, #88]	; (8017484 <sys_timeouts_sleeptime+0x60>)
+ 801742c:	681b      	ldr	r3, [r3, #0]
+ 801742e:	2b00      	cmp	r3, #0
+ 8017430:	d102      	bne.n	8017438 <sys_timeouts_sleeptime+0x14>
+    return SYS_TIMEOUTS_SLEEPTIME_INFINITE;
+ 8017432:	f04f 33ff 	mov.w	r3, #4294967295
+ 8017436:	e020      	b.n	801747a <sys_timeouts_sleeptime+0x56>
+  }
+  now = sys_now();
+ 8017438:	f7f5 fc3a 	bl	800ccb0 <sys_now>
+ 801743c:	6078      	str	r0, [r7, #4]
+  if (TIME_LESS_THAN(next_timeout->time, now)) {
+ 801743e:	4b11      	ldr	r3, [pc, #68]	; (8017484 <sys_timeouts_sleeptime+0x60>)
+ 8017440:	681b      	ldr	r3, [r3, #0]
+ 8017442:	685a      	ldr	r2, [r3, #4]
+ 8017444:	687b      	ldr	r3, [r7, #4]
+ 8017446:	1ad3      	subs	r3, r2, r3
+ 8017448:	0fdb      	lsrs	r3, r3, #31
+ 801744a:	f003 0301 	and.w	r3, r3, #1
+ 801744e:	b2db      	uxtb	r3, r3
+ 8017450:	2b00      	cmp	r3, #0
+ 8017452:	d001      	beq.n	8017458 <sys_timeouts_sleeptime+0x34>
+    return 0;
+ 8017454:	2300      	movs	r3, #0
+ 8017456:	e010      	b.n	801747a <sys_timeouts_sleeptime+0x56>
+  } else {
+    u32_t ret = (u32_t)(next_timeout->time - now);
+ 8017458:	4b0a      	ldr	r3, [pc, #40]	; (8017484 <sys_timeouts_sleeptime+0x60>)
+ 801745a:	681b      	ldr	r3, [r3, #0]
+ 801745c:	685a      	ldr	r2, [r3, #4]
+ 801745e:	687b      	ldr	r3, [r7, #4]
+ 8017460:	1ad3      	subs	r3, r2, r3
+ 8017462:	603b      	str	r3, [r7, #0]
+    LWIP_ASSERT("invalid sleeptime", ret <= LWIP_MAX_TIMEOUT);
+ 8017464:	683b      	ldr	r3, [r7, #0]
+ 8017466:	2b00      	cmp	r3, #0
+ 8017468:	da06      	bge.n	8017478 <sys_timeouts_sleeptime+0x54>
+ 801746a:	4b07      	ldr	r3, [pc, #28]	; (8017488 <sys_timeouts_sleeptime+0x64>)
+ 801746c:	f44f 72dc 	mov.w	r2, #440	; 0x1b8
+ 8017470:	4906      	ldr	r1, [pc, #24]	; (801748c <sys_timeouts_sleeptime+0x68>)
+ 8017472:	4807      	ldr	r0, [pc, #28]	; (8017490 <sys_timeouts_sleeptime+0x6c>)
+ 8017474:	f004 ffc0 	bl	801c3f8 <iprintf>
+    return ret;
+ 8017478:	683b      	ldr	r3, [r7, #0]
+  }
+}
+ 801747a:	4618      	mov	r0, r3
+ 801747c:	3708      	adds	r7, #8
+ 801747e:	46bd      	mov	sp, r7
+ 8017480:	bd80      	pop	{r7, pc}
+ 8017482:	bf00      	nop
+ 8017484:	2000874c 	.word	0x2000874c
+ 8017488:	0801f67c 	.word	0x0801f67c
+ 801748c:	0801f750 	.word	0x0801f750
+ 8017490:	0801f6f0 	.word	0x0801f6f0
+
+08017494 <udp_init>:
+/**
+ * Initialize this module.
+ */
+void
+udp_init(void)
+{
+ 8017494:	b580      	push	{r7, lr}
+ 8017496:	af00      	add	r7, sp, #0
+#ifdef LWIP_RAND
+  udp_port = UDP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
+ 8017498:	f004 ffc6 	bl	801c428 <rand>
+ 801749c:	4603      	mov	r3, r0
+ 801749e:	b29b      	uxth	r3, r3
+ 80174a0:	f3c3 030d 	ubfx	r3, r3, #0, #14
+ 80174a4:	b29b      	uxth	r3, r3
+ 80174a6:	f5a3 4380 	sub.w	r3, r3, #16384	; 0x4000
+ 80174aa:	b29a      	uxth	r2, r3
+ 80174ac:	4b01      	ldr	r3, [pc, #4]	; (80174b4 <udp_init+0x20>)
+ 80174ae:	801a      	strh	r2, [r3, #0]
+#endif /* LWIP_RAND */
+}
+ 80174b0:	bf00      	nop
+ 80174b2:	bd80      	pop	{r7, pc}
+ 80174b4:	20000068 	.word	0x20000068
+
+080174b8 <udp_new_port>:
+ *
+ * @return a new (free) local UDP port number
+ */
+static u16_t
+udp_new_port(void)
+{
+ 80174b8:	b480      	push	{r7}
+ 80174ba:	b083      	sub	sp, #12
+ 80174bc:	af00      	add	r7, sp, #0
+  u16_t n = 0;
+ 80174be:	2300      	movs	r3, #0
+ 80174c0:	80fb      	strh	r3, [r7, #6]
+  struct udp_pcb *pcb;
+
+again:
+  if (udp_port++ == UDP_LOCAL_PORT_RANGE_END) {
+ 80174c2:	4b17      	ldr	r3, [pc, #92]	; (8017520 <udp_new_port+0x68>)
+ 80174c4:	881b      	ldrh	r3, [r3, #0]
+ 80174c6:	1c5a      	adds	r2, r3, #1
+ 80174c8:	b291      	uxth	r1, r2
+ 80174ca:	4a15      	ldr	r2, [pc, #84]	; (8017520 <udp_new_port+0x68>)
+ 80174cc:	8011      	strh	r1, [r2, #0]
+ 80174ce:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 80174d2:	4293      	cmp	r3, r2
+ 80174d4:	d103      	bne.n	80174de <udp_new_port+0x26>
+    udp_port = UDP_LOCAL_PORT_RANGE_START;
+ 80174d6:	4b12      	ldr	r3, [pc, #72]	; (8017520 <udp_new_port+0x68>)
+ 80174d8:	f44f 4240 	mov.w	r2, #49152	; 0xc000
+ 80174dc:	801a      	strh	r2, [r3, #0]
+  }
+  /* Check all PCBs. */
+  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
+ 80174de:	4b11      	ldr	r3, [pc, #68]	; (8017524 <udp_new_port+0x6c>)
+ 80174e0:	681b      	ldr	r3, [r3, #0]
+ 80174e2:	603b      	str	r3, [r7, #0]
+ 80174e4:	e011      	b.n	801750a <udp_new_port+0x52>
+    if (pcb->local_port == udp_port) {
+ 80174e6:	683b      	ldr	r3, [r7, #0]
+ 80174e8:	8a5a      	ldrh	r2, [r3, #18]
+ 80174ea:	4b0d      	ldr	r3, [pc, #52]	; (8017520 <udp_new_port+0x68>)
+ 80174ec:	881b      	ldrh	r3, [r3, #0]
+ 80174ee:	429a      	cmp	r2, r3
+ 80174f0:	d108      	bne.n	8017504 <udp_new_port+0x4c>
+      if (++n > (UDP_LOCAL_PORT_RANGE_END - UDP_LOCAL_PORT_RANGE_START)) {
+ 80174f2:	88fb      	ldrh	r3, [r7, #6]
+ 80174f4:	3301      	adds	r3, #1
+ 80174f6:	80fb      	strh	r3, [r7, #6]
+ 80174f8:	88fb      	ldrh	r3, [r7, #6]
+ 80174fa:	f5b3 4f80 	cmp.w	r3, #16384	; 0x4000
+ 80174fe:	d3e0      	bcc.n	80174c2 <udp_new_port+0xa>
+        return 0;
+ 8017500:	2300      	movs	r3, #0
+ 8017502:	e007      	b.n	8017514 <udp_new_port+0x5c>
+  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
+ 8017504:	683b      	ldr	r3, [r7, #0]
+ 8017506:	68db      	ldr	r3, [r3, #12]
+ 8017508:	603b      	str	r3, [r7, #0]
+ 801750a:	683b      	ldr	r3, [r7, #0]
+ 801750c:	2b00      	cmp	r3, #0
+ 801750e:	d1ea      	bne.n	80174e6 <udp_new_port+0x2e>
+      }
+      goto again;
+    }
+  }
+  return udp_port;
+ 8017510:	4b03      	ldr	r3, [pc, #12]	; (8017520 <udp_new_port+0x68>)
+ 8017512:	881b      	ldrh	r3, [r3, #0]
+}
+ 8017514:	4618      	mov	r0, r3
+ 8017516:	370c      	adds	r7, #12
+ 8017518:	46bd      	mov	sp, r7
+ 801751a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 801751e:	4770      	bx	lr
+ 8017520:	20000068 	.word	0x20000068
+ 8017524:	2000f800 	.word	0x2000f800
+
+08017528 <udp_input_local_match>:
+ * @param broadcast 1 if his is an IPv4 broadcast (global or subnet-only), 0 otherwise (only used for IPv4)
+ * @return 1 on match, 0 otherwise
+ */
+static u8_t
+udp_input_local_match(struct udp_pcb *pcb, struct netif *inp, u8_t broadcast)
+{
+ 8017528:	b580      	push	{r7, lr}
+ 801752a:	b084      	sub	sp, #16
+ 801752c:	af00      	add	r7, sp, #0
+ 801752e:	60f8      	str	r0, [r7, #12]
+ 8017530:	60b9      	str	r1, [r7, #8]
+ 8017532:	4613      	mov	r3, r2
+ 8017534:	71fb      	strb	r3, [r7, #7]
+  LWIP_UNUSED_ARG(inp);       /* in IPv6 only case */
+  LWIP_UNUSED_ARG(broadcast); /* in IPv6 only case */
+
+  LWIP_ASSERT("udp_input_local_match: invalid pcb", pcb != NULL);
+ 8017536:	68fb      	ldr	r3, [r7, #12]
+ 8017538:	2b00      	cmp	r3, #0
+ 801753a:	d105      	bne.n	8017548 <udp_input_local_match+0x20>
+ 801753c:	4b27      	ldr	r3, [pc, #156]	; (80175dc <udp_input_local_match+0xb4>)
+ 801753e:	2287      	movs	r2, #135	; 0x87
+ 8017540:	4927      	ldr	r1, [pc, #156]	; (80175e0 <udp_input_local_match+0xb8>)
+ 8017542:	4828      	ldr	r0, [pc, #160]	; (80175e4 <udp_input_local_match+0xbc>)
+ 8017544:	f004 ff58 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("udp_input_local_match: invalid netif", inp != NULL);
+ 8017548:	68bb      	ldr	r3, [r7, #8]
+ 801754a:	2b00      	cmp	r3, #0
+ 801754c:	d105      	bne.n	801755a <udp_input_local_match+0x32>
+ 801754e:	4b23      	ldr	r3, [pc, #140]	; (80175dc <udp_input_local_match+0xb4>)
+ 8017550:	2288      	movs	r2, #136	; 0x88
+ 8017552:	4925      	ldr	r1, [pc, #148]	; (80175e8 <udp_input_local_match+0xc0>)
+ 8017554:	4823      	ldr	r0, [pc, #140]	; (80175e4 <udp_input_local_match+0xbc>)
+ 8017556:	f004 ff4f 	bl	801c3f8 <iprintf>
+
+  /* check if PCB is bound to specific netif */
+  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
+ 801755a:	68fb      	ldr	r3, [r7, #12]
+ 801755c:	7a1b      	ldrb	r3, [r3, #8]
+ 801755e:	2b00      	cmp	r3, #0
+ 8017560:	d00b      	beq.n	801757a <udp_input_local_match+0x52>
+      (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
+ 8017562:	68fb      	ldr	r3, [r7, #12]
+ 8017564:	7a1a      	ldrb	r2, [r3, #8]
+ 8017566:	4b21      	ldr	r3, [pc, #132]	; (80175ec <udp_input_local_match+0xc4>)
+ 8017568:	685b      	ldr	r3, [r3, #4]
+ 801756a:	f893 3034 	ldrb.w	r3, [r3, #52]	; 0x34
+ 801756e:	3301      	adds	r3, #1
+ 8017570:	b2db      	uxtb	r3, r3
+  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
+ 8017572:	429a      	cmp	r2, r3
+ 8017574:	d001      	beq.n	801757a <udp_input_local_match+0x52>
+    return 0;
+ 8017576:	2300      	movs	r3, #0
+ 8017578:	e02b      	b.n	80175d2 <udp_input_local_match+0xaa>
+  /* Only need to check PCB if incoming IP version matches PCB IP version */
+  if (IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ip_current_dest_addr())) {
+#if LWIP_IPV4
+    /* Special case: IPv4 broadcast: all or broadcasts in my subnet
+     * Note: broadcast variable can only be 1 if it is an IPv4 broadcast */
+    if (broadcast != 0) {
+ 801757a:	79fb      	ldrb	r3, [r7, #7]
+ 801757c:	2b00      	cmp	r3, #0
+ 801757e:	d018      	beq.n	80175b2 <udp_input_local_match+0x8a>
+#if IP_SOF_BROADCAST_RECV
+      if (ip_get_option(pcb, SOF_BROADCAST))
+#endif /* IP_SOF_BROADCAST_RECV */
+      {
+        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
+ 8017580:	68fb      	ldr	r3, [r7, #12]
+ 8017582:	2b00      	cmp	r3, #0
+ 8017584:	d013      	beq.n	80175ae <udp_input_local_match+0x86>
+ 8017586:	68fb      	ldr	r3, [r7, #12]
+ 8017588:	681b      	ldr	r3, [r3, #0]
+ 801758a:	2b00      	cmp	r3, #0
+ 801758c:	d00f      	beq.n	80175ae <udp_input_local_match+0x86>
+            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
+ 801758e:	4b17      	ldr	r3, [pc, #92]	; (80175ec <udp_input_local_match+0xc4>)
+ 8017590:	695b      	ldr	r3, [r3, #20]
+        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
+ 8017592:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 8017596:	d00a      	beq.n	80175ae <udp_input_local_match+0x86>
+            ip4_addr_netcmp(ip_2_ip4(&pcb->local_ip), ip4_current_dest_addr(), netif_ip4_netmask(inp))) {
+ 8017598:	68fb      	ldr	r3, [r7, #12]
+ 801759a:	681a      	ldr	r2, [r3, #0]
+ 801759c:	4b13      	ldr	r3, [pc, #76]	; (80175ec <udp_input_local_match+0xc4>)
+ 801759e:	695b      	ldr	r3, [r3, #20]
+ 80175a0:	405a      	eors	r2, r3
+ 80175a2:	68bb      	ldr	r3, [r7, #8]
+ 80175a4:	3308      	adds	r3, #8
+ 80175a6:	681b      	ldr	r3, [r3, #0]
+ 80175a8:	4013      	ands	r3, r2
+            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
+ 80175aa:	2b00      	cmp	r3, #0
+ 80175ac:	d110      	bne.n	80175d0 <udp_input_local_match+0xa8>
+          return 1;
+ 80175ae:	2301      	movs	r3, #1
+ 80175b0:	e00f      	b.n	80175d2 <udp_input_local_match+0xaa>
+        }
+      }
+    } else
+#endif /* LWIP_IPV4 */
+      /* Handle IPv4 and IPv6: all or exact match */
+      if (ip_addr_isany(&pcb->local_ip) || ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
+ 80175b2:	68fb      	ldr	r3, [r7, #12]
+ 80175b4:	2b00      	cmp	r3, #0
+ 80175b6:	d009      	beq.n	80175cc <udp_input_local_match+0xa4>
+ 80175b8:	68fb      	ldr	r3, [r7, #12]
+ 80175ba:	681b      	ldr	r3, [r3, #0]
+ 80175bc:	2b00      	cmp	r3, #0
+ 80175be:	d005      	beq.n	80175cc <udp_input_local_match+0xa4>
+ 80175c0:	68fb      	ldr	r3, [r7, #12]
+ 80175c2:	681a      	ldr	r2, [r3, #0]
+ 80175c4:	4b09      	ldr	r3, [pc, #36]	; (80175ec <udp_input_local_match+0xc4>)
+ 80175c6:	695b      	ldr	r3, [r3, #20]
+ 80175c8:	429a      	cmp	r2, r3
+ 80175ca:	d101      	bne.n	80175d0 <udp_input_local_match+0xa8>
+        return 1;
+ 80175cc:	2301      	movs	r3, #1
+ 80175ce:	e000      	b.n	80175d2 <udp_input_local_match+0xaa>
+      }
+  }
+
+  return 0;
+ 80175d0:	2300      	movs	r3, #0
+}
+ 80175d2:	4618      	mov	r0, r3
+ 80175d4:	3710      	adds	r7, #16
+ 80175d6:	46bd      	mov	sp, r7
+ 80175d8:	bd80      	pop	{r7, pc}
+ 80175da:	bf00      	nop
+ 80175dc:	0801f764 	.word	0x0801f764
+ 80175e0:	0801f794 	.word	0x0801f794
+ 80175e4:	0801f7b8 	.word	0x0801f7b8
+ 80175e8:	0801f7e0 	.word	0x0801f7e0
+ 80175ec:	2000c0b4 	.word	0x2000c0b4
+
+080175f0 <udp_input>:
+ * @param inp network interface on which the datagram was received.
+ *
+ */
+void
+udp_input(struct pbuf *p, struct netif *inp)
+{
+ 80175f0:	b590      	push	{r4, r7, lr}
+ 80175f2:	b08d      	sub	sp, #52	; 0x34
+ 80175f4:	af02      	add	r7, sp, #8
+ 80175f6:	6078      	str	r0, [r7, #4]
+ 80175f8:	6039      	str	r1, [r7, #0]
+  struct udp_hdr *udphdr;
+  struct udp_pcb *pcb, *prev;
+  struct udp_pcb *uncon_pcb;
+  u16_t src, dest;
+  u8_t broadcast;
+  u8_t for_us = 0;
+ 80175fa:	2300      	movs	r3, #0
+ 80175fc:	76fb      	strb	r3, [r7, #27]
+
+  LWIP_UNUSED_ARG(inp);
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ASSERT("udp_input: invalid pbuf", p != NULL);
+ 80175fe:	687b      	ldr	r3, [r7, #4]
+ 8017600:	2b00      	cmp	r3, #0
+ 8017602:	d105      	bne.n	8017610 <udp_input+0x20>
+ 8017604:	4b7c      	ldr	r3, [pc, #496]	; (80177f8 <udp_input+0x208>)
+ 8017606:	22cf      	movs	r2, #207	; 0xcf
+ 8017608:	497c      	ldr	r1, [pc, #496]	; (80177fc <udp_input+0x20c>)
+ 801760a:	487d      	ldr	r0, [pc, #500]	; (8017800 <udp_input+0x210>)
+ 801760c:	f004 fef4 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("udp_input: invalid netif", inp != NULL);
+ 8017610:	683b      	ldr	r3, [r7, #0]
+ 8017612:	2b00      	cmp	r3, #0
+ 8017614:	d105      	bne.n	8017622 <udp_input+0x32>
+ 8017616:	4b78      	ldr	r3, [pc, #480]	; (80177f8 <udp_input+0x208>)
+ 8017618:	22d0      	movs	r2, #208	; 0xd0
+ 801761a:	497a      	ldr	r1, [pc, #488]	; (8017804 <udp_input+0x214>)
+ 801761c:	4878      	ldr	r0, [pc, #480]	; (8017800 <udp_input+0x210>)
+ 801761e:	f004 feeb 	bl	801c3f8 <iprintf>
+  PERF_START;
+
+  UDP_STATS_INC(udp.recv);
+
+  /* Check minimum length (UDP header) */
+  if (p->len < UDP_HLEN) {
+ 8017622:	687b      	ldr	r3, [r7, #4]
+ 8017624:	895b      	ldrh	r3, [r3, #10]
+ 8017626:	2b07      	cmp	r3, #7
+ 8017628:	d803      	bhi.n	8017632 <udp_input+0x42>
+    LWIP_DEBUGF(UDP_DEBUG,
+                ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len));
+    UDP_STATS_INC(udp.lenerr);
+    UDP_STATS_INC(udp.drop);
+    MIB2_STATS_INC(mib2.udpinerrors);
+    pbuf_free(p);
+ 801762a:	6878      	ldr	r0, [r7, #4]
+ 801762c:	f7fa f9b4 	bl	8011998 <pbuf_free>
+    goto end;
+ 8017630:	e0de      	b.n	80177f0 <udp_input+0x200>
+  }
+
+  udphdr = (struct udp_hdr *)p->payload;
+ 8017632:	687b      	ldr	r3, [r7, #4]
+ 8017634:	685b      	ldr	r3, [r3, #4]
+ 8017636:	617b      	str	r3, [r7, #20]
+
+  /* is broadcast packet ? */
+  broadcast = ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif());
+ 8017638:	4b73      	ldr	r3, [pc, #460]	; (8017808 <udp_input+0x218>)
+ 801763a:	695a      	ldr	r2, [r3, #20]
+ 801763c:	4b72      	ldr	r3, [pc, #456]	; (8017808 <udp_input+0x218>)
+ 801763e:	681b      	ldr	r3, [r3, #0]
+ 8017640:	4619      	mov	r1, r3
+ 8017642:	4610      	mov	r0, r2
+ 8017644:	f003 fe16 	bl	801b274 <ip4_addr_isbroadcast_u32>
+ 8017648:	4603      	mov	r3, r0
+ 801764a:	74fb      	strb	r3, [r7, #19]
+
+  LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len));
+
+  /* convert src and dest ports to host byte order */
+  src = lwip_ntohs(udphdr->src);
+ 801764c:	697b      	ldr	r3, [r7, #20]
+ 801764e:	881b      	ldrh	r3, [r3, #0]
+ 8017650:	b29b      	uxth	r3, r3
+ 8017652:	4618      	mov	r0, r3
+ 8017654:	f7f8 fdec 	bl	8010230 <lwip_htons>
+ 8017658:	4603      	mov	r3, r0
+ 801765a:	823b      	strh	r3, [r7, #16]
+  dest = lwip_ntohs(udphdr->dest);
+ 801765c:	697b      	ldr	r3, [r7, #20]
+ 801765e:	885b      	ldrh	r3, [r3, #2]
+ 8017660:	b29b      	uxth	r3, r3
+ 8017662:	4618      	mov	r0, r3
+ 8017664:	f7f8 fde4 	bl	8010230 <lwip_htons>
+ 8017668:	4603      	mov	r3, r0
+ 801766a:	81fb      	strh	r3, [r7, #14]
+  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_dest_addr());
+  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", lwip_ntohs(udphdr->dest)));
+  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_src_addr());
+  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", lwip_ntohs(udphdr->src)));
+
+  pcb = NULL;
+ 801766c:	2300      	movs	r3, #0
+ 801766e:	627b      	str	r3, [r7, #36]	; 0x24
+  prev = NULL;
+ 8017670:	2300      	movs	r3, #0
+ 8017672:	623b      	str	r3, [r7, #32]
+  uncon_pcb = NULL;
+ 8017674:	2300      	movs	r3, #0
+ 8017676:	61fb      	str	r3, [r7, #28]
+  /* Iterate through the UDP pcb list for a matching pcb.
+   * 'Perfect match' pcbs (connected to the remote port & ip address) are
+   * preferred. If no perfect match is found, the first unconnected pcb that
+   * matches the local port and ip address gets the datagram. */
+  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
+ 8017678:	4b64      	ldr	r3, [pc, #400]	; (801780c <udp_input+0x21c>)
+ 801767a:	681b      	ldr	r3, [r3, #0]
+ 801767c:	627b      	str	r3, [r7, #36]	; 0x24
+ 801767e:	e054      	b.n	801772a <udp_input+0x13a>
+    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", pcb->local_port));
+    ip_addr_debug_print_val(UDP_DEBUG, pcb->remote_ip);
+    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", pcb->remote_port));
+
+    /* compare PCB local addr+port to UDP destination addr+port */
+    if ((pcb->local_port == dest) &&
+ 8017680:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8017682:	8a5b      	ldrh	r3, [r3, #18]
+ 8017684:	89fa      	ldrh	r2, [r7, #14]
+ 8017686:	429a      	cmp	r2, r3
+ 8017688:	d14a      	bne.n	8017720 <udp_input+0x130>
+        (udp_input_local_match(pcb, inp, broadcast) != 0)) {
+ 801768a:	7cfb      	ldrb	r3, [r7, #19]
+ 801768c:	461a      	mov	r2, r3
+ 801768e:	6839      	ldr	r1, [r7, #0]
+ 8017690:	6a78      	ldr	r0, [r7, #36]	; 0x24
+ 8017692:	f7ff ff49 	bl	8017528 <udp_input_local_match>
+ 8017696:	4603      	mov	r3, r0
+    if ((pcb->local_port == dest) &&
+ 8017698:	2b00      	cmp	r3, #0
+ 801769a:	d041      	beq.n	8017720 <udp_input+0x130>
+      if ((pcb->flags & UDP_FLAGS_CONNECTED) == 0) {
+ 801769c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801769e:	7c1b      	ldrb	r3, [r3, #16]
+ 80176a0:	f003 0304 	and.w	r3, r3, #4
+ 80176a4:	2b00      	cmp	r3, #0
+ 80176a6:	d11d      	bne.n	80176e4 <udp_input+0xf4>
+        if (uncon_pcb == NULL) {
+ 80176a8:	69fb      	ldr	r3, [r7, #28]
+ 80176aa:	2b00      	cmp	r3, #0
+ 80176ac:	d102      	bne.n	80176b4 <udp_input+0xc4>
+          /* the first unconnected matching PCB */
+          uncon_pcb = pcb;
+ 80176ae:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80176b0:	61fb      	str	r3, [r7, #28]
+ 80176b2:	e017      	b.n	80176e4 <udp_input+0xf4>
+#if LWIP_IPV4
+        } else if (broadcast && ip4_current_dest_addr()->addr == IPADDR_BROADCAST) {
+ 80176b4:	7cfb      	ldrb	r3, [r7, #19]
+ 80176b6:	2b00      	cmp	r3, #0
+ 80176b8:	d014      	beq.n	80176e4 <udp_input+0xf4>
+ 80176ba:	4b53      	ldr	r3, [pc, #332]	; (8017808 <udp_input+0x218>)
+ 80176bc:	695b      	ldr	r3, [r3, #20]
+ 80176be:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 80176c2:	d10f      	bne.n	80176e4 <udp_input+0xf4>
+          /* global broadcast address (only valid for IPv4; match was checked before) */
+          if (!IP_IS_V4_VAL(uncon_pcb->local_ip) || !ip4_addr_cmp(ip_2_ip4(&uncon_pcb->local_ip), netif_ip4_addr(inp))) {
+ 80176c4:	69fb      	ldr	r3, [r7, #28]
+ 80176c6:	681a      	ldr	r2, [r3, #0]
+ 80176c8:	683b      	ldr	r3, [r7, #0]
+ 80176ca:	3304      	adds	r3, #4
+ 80176cc:	681b      	ldr	r3, [r3, #0]
+ 80176ce:	429a      	cmp	r2, r3
+ 80176d0:	d008      	beq.n	80176e4 <udp_input+0xf4>
+            /* uncon_pcb does not match the input netif, check this pcb */
+            if (IP_IS_V4_VAL(pcb->local_ip) && ip4_addr_cmp(ip_2_ip4(&pcb->local_ip), netif_ip4_addr(inp))) {
+ 80176d2:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80176d4:	681a      	ldr	r2, [r3, #0]
+ 80176d6:	683b      	ldr	r3, [r7, #0]
+ 80176d8:	3304      	adds	r3, #4
+ 80176da:	681b      	ldr	r3, [r3, #0]
+ 80176dc:	429a      	cmp	r2, r3
+ 80176de:	d101      	bne.n	80176e4 <udp_input+0xf4>
+              /* better match */
+              uncon_pcb = pcb;
+ 80176e0:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80176e2:	61fb      	str	r3, [r7, #28]
+        }
+#endif /* SO_REUSE */
+      }
+
+      /* compare PCB remote addr+port to UDP source addr+port */
+      if ((pcb->remote_port == src) &&
+ 80176e4:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80176e6:	8a9b      	ldrh	r3, [r3, #20]
+ 80176e8:	8a3a      	ldrh	r2, [r7, #16]
+ 80176ea:	429a      	cmp	r2, r3
+ 80176ec:	d118      	bne.n	8017720 <udp_input+0x130>
+          (ip_addr_isany_val(pcb->remote_ip) ||
+ 80176ee:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80176f0:	685b      	ldr	r3, [r3, #4]
+      if ((pcb->remote_port == src) &&
+ 80176f2:	2b00      	cmp	r3, #0
+ 80176f4:	d005      	beq.n	8017702 <udp_input+0x112>
+           ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()))) {
+ 80176f6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80176f8:	685a      	ldr	r2, [r3, #4]
+ 80176fa:	4b43      	ldr	r3, [pc, #268]	; (8017808 <udp_input+0x218>)
+ 80176fc:	691b      	ldr	r3, [r3, #16]
+          (ip_addr_isany_val(pcb->remote_ip) ||
+ 80176fe:	429a      	cmp	r2, r3
+ 8017700:	d10e      	bne.n	8017720 <udp_input+0x130>
+        /* the first fully matching PCB */
+        if (prev != NULL) {
+ 8017702:	6a3b      	ldr	r3, [r7, #32]
+ 8017704:	2b00      	cmp	r3, #0
+ 8017706:	d014      	beq.n	8017732 <udp_input+0x142>
+          /* move the pcb to the front of udp_pcbs so that is
+             found faster next time */
+          prev->next = pcb->next;
+ 8017708:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801770a:	68da      	ldr	r2, [r3, #12]
+ 801770c:	6a3b      	ldr	r3, [r7, #32]
+ 801770e:	60da      	str	r2, [r3, #12]
+          pcb->next = udp_pcbs;
+ 8017710:	4b3e      	ldr	r3, [pc, #248]	; (801780c <udp_input+0x21c>)
+ 8017712:	681a      	ldr	r2, [r3, #0]
+ 8017714:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8017716:	60da      	str	r2, [r3, #12]
+          udp_pcbs = pcb;
+ 8017718:	4a3c      	ldr	r2, [pc, #240]	; (801780c <udp_input+0x21c>)
+ 801771a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801771c:	6013      	str	r3, [r2, #0]
+        } else {
+          UDP_STATS_INC(udp.cachehit);
+        }
+        break;
+ 801771e:	e008      	b.n	8017732 <udp_input+0x142>
+      }
+    }
+
+    prev = pcb;
+ 8017720:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8017722:	623b      	str	r3, [r7, #32]
+  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
+ 8017724:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8017726:	68db      	ldr	r3, [r3, #12]
+ 8017728:	627b      	str	r3, [r7, #36]	; 0x24
+ 801772a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801772c:	2b00      	cmp	r3, #0
+ 801772e:	d1a7      	bne.n	8017680 <udp_input+0x90>
+ 8017730:	e000      	b.n	8017734 <udp_input+0x144>
+        break;
+ 8017732:	bf00      	nop
+  }
+  /* no fully matching pcb found? then look for an unconnected pcb */
+  if (pcb == NULL) {
+ 8017734:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8017736:	2b00      	cmp	r3, #0
+ 8017738:	d101      	bne.n	801773e <udp_input+0x14e>
+    pcb = uncon_pcb;
+ 801773a:	69fb      	ldr	r3, [r7, #28]
+ 801773c:	627b      	str	r3, [r7, #36]	; 0x24
+  }
+
+  /* Check checksum if this is a match or if it was directed at us. */
+  if (pcb != NULL) {
+ 801773e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8017740:	2b00      	cmp	r3, #0
+ 8017742:	d002      	beq.n	801774a <udp_input+0x15a>
+    for_us = 1;
+ 8017744:	2301      	movs	r3, #1
+ 8017746:	76fb      	strb	r3, [r7, #27]
+ 8017748:	e00a      	b.n	8017760 <udp_input+0x170>
+      for_us = netif_get_ip6_addr_match(inp, ip6_current_dest_addr()) >= 0;
+    }
+#endif /* LWIP_IPV6 */
+#if LWIP_IPV4
+    if (!ip_current_is_v6()) {
+      for_us = ip4_addr_cmp(netif_ip4_addr(inp), ip4_current_dest_addr());
+ 801774a:	683b      	ldr	r3, [r7, #0]
+ 801774c:	3304      	adds	r3, #4
+ 801774e:	681a      	ldr	r2, [r3, #0]
+ 8017750:	4b2d      	ldr	r3, [pc, #180]	; (8017808 <udp_input+0x218>)
+ 8017752:	695b      	ldr	r3, [r3, #20]
+ 8017754:	429a      	cmp	r2, r3
+ 8017756:	bf0c      	ite	eq
+ 8017758:	2301      	moveq	r3, #1
+ 801775a:	2300      	movne	r3, #0
+ 801775c:	b2db      	uxtb	r3, r3
+ 801775e:	76fb      	strb	r3, [r7, #27]
+    }
+#endif /* LWIP_IPV4 */
+  }
+
+  if (for_us) {
+ 8017760:	7efb      	ldrb	r3, [r7, #27]
+ 8017762:	2b00      	cmp	r3, #0
+ 8017764:	d041      	beq.n	80177ea <udp_input+0x1fa>
+          }
+        }
+      }
+    }
+#endif /* CHECKSUM_CHECK_UDP */
+    if (pbuf_remove_header(p, UDP_HLEN)) {
+ 8017766:	2108      	movs	r1, #8
+ 8017768:	6878      	ldr	r0, [r7, #4]
+ 801776a:	f7fa f88f 	bl	801188c <pbuf_remove_header>
+ 801776e:	4603      	mov	r3, r0
+ 8017770:	2b00      	cmp	r3, #0
+ 8017772:	d00a      	beq.n	801778a <udp_input+0x19a>
+      /* Can we cope with this failing? Just assert for now */
+      LWIP_ASSERT("pbuf_remove_header failed\n", 0);
+ 8017774:	4b20      	ldr	r3, [pc, #128]	; (80177f8 <udp_input+0x208>)
+ 8017776:	f44f 72b8 	mov.w	r2, #368	; 0x170
+ 801777a:	4925      	ldr	r1, [pc, #148]	; (8017810 <udp_input+0x220>)
+ 801777c:	4820      	ldr	r0, [pc, #128]	; (8017800 <udp_input+0x210>)
+ 801777e:	f004 fe3b 	bl	801c3f8 <iprintf>
+      UDP_STATS_INC(udp.drop);
+      MIB2_STATS_INC(mib2.udpinerrors);
+      pbuf_free(p);
+ 8017782:	6878      	ldr	r0, [r7, #4]
+ 8017784:	f7fa f908 	bl	8011998 <pbuf_free>
+      goto end;
+ 8017788:	e032      	b.n	80177f0 <udp_input+0x200>
+    }
+
+    if (pcb != NULL) {
+ 801778a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801778c:	2b00      	cmp	r3, #0
+ 801778e:	d012      	beq.n	80177b6 <udp_input+0x1c6>
+          }
+        }
+      }
+#endif /* SO_REUSE && SO_REUSE_RXTOALL */
+      /* callback */
+      if (pcb->recv != NULL) {
+ 8017790:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8017792:	699b      	ldr	r3, [r3, #24]
+ 8017794:	2b00      	cmp	r3, #0
+ 8017796:	d00a      	beq.n	80177ae <udp_input+0x1be>
+        /* now the recv function is responsible for freeing p */
+        pcb->recv(pcb->recv_arg, pcb, p, ip_current_src_addr(), src);
+ 8017798:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801779a:	699c      	ldr	r4, [r3, #24]
+ 801779c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801779e:	69d8      	ldr	r0, [r3, #28]
+ 80177a0:	8a3b      	ldrh	r3, [r7, #16]
+ 80177a2:	9300      	str	r3, [sp, #0]
+ 80177a4:	4b1b      	ldr	r3, [pc, #108]	; (8017814 <udp_input+0x224>)
+ 80177a6:	687a      	ldr	r2, [r7, #4]
+ 80177a8:	6a79      	ldr	r1, [r7, #36]	; 0x24
+ 80177aa:	47a0      	blx	r4
+  } else {
+    pbuf_free(p);
+  }
+end:
+  PERF_STOP("udp_input");
+  return;
+ 80177ac:	e021      	b.n	80177f2 <udp_input+0x202>
+        pbuf_free(p);
+ 80177ae:	6878      	ldr	r0, [r7, #4]
+ 80177b0:	f7fa f8f2 	bl	8011998 <pbuf_free>
+        goto end;
+ 80177b4:	e01c      	b.n	80177f0 <udp_input+0x200>
+      if (!broadcast && !ip_addr_ismulticast(ip_current_dest_addr())) {
+ 80177b6:	7cfb      	ldrb	r3, [r7, #19]
+ 80177b8:	2b00      	cmp	r3, #0
+ 80177ba:	d112      	bne.n	80177e2 <udp_input+0x1f2>
+ 80177bc:	4b12      	ldr	r3, [pc, #72]	; (8017808 <udp_input+0x218>)
+ 80177be:	695b      	ldr	r3, [r3, #20]
+ 80177c0:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
+ 80177c4:	2be0      	cmp	r3, #224	; 0xe0
+ 80177c6:	d00c      	beq.n	80177e2 <udp_input+0x1f2>
+        pbuf_header_force(p, (s16_t)(ip_current_header_tot_len() + UDP_HLEN));
+ 80177c8:	4b0f      	ldr	r3, [pc, #60]	; (8017808 <udp_input+0x218>)
+ 80177ca:	899b      	ldrh	r3, [r3, #12]
+ 80177cc:	3308      	adds	r3, #8
+ 80177ce:	b29b      	uxth	r3, r3
+ 80177d0:	b21b      	sxth	r3, r3
+ 80177d2:	4619      	mov	r1, r3
+ 80177d4:	6878      	ldr	r0, [r7, #4]
+ 80177d6:	f7fa f8cc 	bl	8011972 <pbuf_header_force>
+        icmp_port_unreach(ip_current_is_v6(), p);
+ 80177da:	2103      	movs	r1, #3
+ 80177dc:	6878      	ldr	r0, [r7, #4]
+ 80177de:	f003 fa0d 	bl	801abfc <icmp_dest_unreach>
+      pbuf_free(p);
+ 80177e2:	6878      	ldr	r0, [r7, #4]
+ 80177e4:	f7fa f8d8 	bl	8011998 <pbuf_free>
+  return;
+ 80177e8:	e003      	b.n	80177f2 <udp_input+0x202>
+    pbuf_free(p);
+ 80177ea:	6878      	ldr	r0, [r7, #4]
+ 80177ec:	f7fa f8d4 	bl	8011998 <pbuf_free>
+  return;
+ 80177f0:	bf00      	nop
+  UDP_STATS_INC(udp.drop);
+  MIB2_STATS_INC(mib2.udpinerrors);
+  pbuf_free(p);
+  PERF_STOP("udp_input");
+#endif /* CHECKSUM_CHECK_UDP */
+}
+ 80177f2:	372c      	adds	r7, #44	; 0x2c
+ 80177f4:	46bd      	mov	sp, r7
+ 80177f6:	bd90      	pop	{r4, r7, pc}
+ 80177f8:	0801f764 	.word	0x0801f764
+ 80177fc:	0801f808 	.word	0x0801f808
+ 8017800:	0801f7b8 	.word	0x0801f7b8
+ 8017804:	0801f820 	.word	0x0801f820
+ 8017808:	2000c0b4 	.word	0x2000c0b4
+ 801780c:	2000f800 	.word	0x2000f800
+ 8017810:	0801f83c 	.word	0x0801f83c
+ 8017814:	2000c0c4 	.word	0x2000c0c4
+
+08017818 <udp_sendto_if>:
+ * @see udp_disconnect() udp_send()
+ */
+err_t
+udp_sendto_if(struct udp_pcb *pcb, struct pbuf *p,
+              const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif)
+{
+ 8017818:	b580      	push	{r7, lr}
+ 801781a:	b088      	sub	sp, #32
+ 801781c:	af02      	add	r7, sp, #8
+ 801781e:	60f8      	str	r0, [r7, #12]
+ 8017820:	60b9      	str	r1, [r7, #8]
+ 8017822:	607a      	str	r2, [r7, #4]
+ 8017824:	807b      	strh	r3, [r7, #2]
+                     u16_t chksum)
+{
+#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
+  const ip_addr_t *src_ip;
+
+  LWIP_ERROR("udp_sendto_if: invalid pcb", pcb != NULL, return ERR_ARG);
+ 8017826:	68fb      	ldr	r3, [r7, #12]
+ 8017828:	2b00      	cmp	r3, #0
+ 801782a:	d109      	bne.n	8017840 <udp_sendto_if+0x28>
+ 801782c:	4b2e      	ldr	r3, [pc, #184]	; (80178e8 <udp_sendto_if+0xd0>)
+ 801782e:	f44f 7220 	mov.w	r2, #640	; 0x280
+ 8017832:	492e      	ldr	r1, [pc, #184]	; (80178ec <udp_sendto_if+0xd4>)
+ 8017834:	482e      	ldr	r0, [pc, #184]	; (80178f0 <udp_sendto_if+0xd8>)
+ 8017836:	f004 fddf 	bl	801c3f8 <iprintf>
+ 801783a:	f06f 030f 	mvn.w	r3, #15
+ 801783e:	e04f      	b.n	80178e0 <udp_sendto_if+0xc8>
+  LWIP_ERROR("udp_sendto_if: invalid pbuf", p != NULL, return ERR_ARG);
+ 8017840:	68bb      	ldr	r3, [r7, #8]
+ 8017842:	2b00      	cmp	r3, #0
+ 8017844:	d109      	bne.n	801785a <udp_sendto_if+0x42>
+ 8017846:	4b28      	ldr	r3, [pc, #160]	; (80178e8 <udp_sendto_if+0xd0>)
+ 8017848:	f240 2281 	movw	r2, #641	; 0x281
+ 801784c:	4929      	ldr	r1, [pc, #164]	; (80178f4 <udp_sendto_if+0xdc>)
+ 801784e:	4828      	ldr	r0, [pc, #160]	; (80178f0 <udp_sendto_if+0xd8>)
+ 8017850:	f004 fdd2 	bl	801c3f8 <iprintf>
+ 8017854:	f06f 030f 	mvn.w	r3, #15
+ 8017858:	e042      	b.n	80178e0 <udp_sendto_if+0xc8>
+  LWIP_ERROR("udp_sendto_if: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
+ 801785a:	687b      	ldr	r3, [r7, #4]
+ 801785c:	2b00      	cmp	r3, #0
+ 801785e:	d109      	bne.n	8017874 <udp_sendto_if+0x5c>
+ 8017860:	4b21      	ldr	r3, [pc, #132]	; (80178e8 <udp_sendto_if+0xd0>)
+ 8017862:	f240 2282 	movw	r2, #642	; 0x282
+ 8017866:	4924      	ldr	r1, [pc, #144]	; (80178f8 <udp_sendto_if+0xe0>)
+ 8017868:	4821      	ldr	r0, [pc, #132]	; (80178f0 <udp_sendto_if+0xd8>)
+ 801786a:	f004 fdc5 	bl	801c3f8 <iprintf>
+ 801786e:	f06f 030f 	mvn.w	r3, #15
+ 8017872:	e035      	b.n	80178e0 <udp_sendto_if+0xc8>
+  LWIP_ERROR("udp_sendto_if: invalid netif", netif != NULL, return ERR_ARG);
+ 8017874:	6a3b      	ldr	r3, [r7, #32]
+ 8017876:	2b00      	cmp	r3, #0
+ 8017878:	d109      	bne.n	801788e <udp_sendto_if+0x76>
+ 801787a:	4b1b      	ldr	r3, [pc, #108]	; (80178e8 <udp_sendto_if+0xd0>)
+ 801787c:	f240 2283 	movw	r2, #643	; 0x283
+ 8017880:	491e      	ldr	r1, [pc, #120]	; (80178fc <udp_sendto_if+0xe4>)
+ 8017882:	481b      	ldr	r0, [pc, #108]	; (80178f0 <udp_sendto_if+0xd8>)
+ 8017884:	f004 fdb8 	bl	801c3f8 <iprintf>
+ 8017888:	f06f 030f 	mvn.w	r3, #15
+ 801788c:	e028      	b.n	80178e0 <udp_sendto_if+0xc8>
+#endif /* LWIP_IPV6 */
+#if LWIP_IPV4 && LWIP_IPV6
+  else
+#endif /* LWIP_IPV4 && LWIP_IPV6 */
+#if LWIP_IPV4
+    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
+ 801788e:	68fb      	ldr	r3, [r7, #12]
+ 8017890:	2b00      	cmp	r3, #0
+ 8017892:	d009      	beq.n	80178a8 <udp_sendto_if+0x90>
+ 8017894:	68fb      	ldr	r3, [r7, #12]
+ 8017896:	681b      	ldr	r3, [r3, #0]
+ 8017898:	2b00      	cmp	r3, #0
+ 801789a:	d005      	beq.n	80178a8 <udp_sendto_if+0x90>
+        ip4_addr_ismulticast(ip_2_ip4(&pcb->local_ip))) {
+ 801789c:	68fb      	ldr	r3, [r7, #12]
+ 801789e:	681b      	ldr	r3, [r3, #0]
+ 80178a0:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
+    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
+ 80178a4:	2be0      	cmp	r3, #224	; 0xe0
+ 80178a6:	d103      	bne.n	80178b0 <udp_sendto_if+0x98>
+      /* if the local_ip is any or multicast
+       * use the outgoing network interface IP address as source address */
+      src_ip = netif_ip_addr4(netif);
+ 80178a8:	6a3b      	ldr	r3, [r7, #32]
+ 80178aa:	3304      	adds	r3, #4
+ 80178ac:	617b      	str	r3, [r7, #20]
+ 80178ae:	e00b      	b.n	80178c8 <udp_sendto_if+0xb0>
+    } else {
+      /* check if UDP PCB local IP address is correct
+       * this could be an old address if netif->ip_addr has changed */
+      if (!ip4_addr_cmp(ip_2_ip4(&(pcb->local_ip)), netif_ip4_addr(netif))) {
+ 80178b0:	68fb      	ldr	r3, [r7, #12]
+ 80178b2:	681a      	ldr	r2, [r3, #0]
+ 80178b4:	6a3b      	ldr	r3, [r7, #32]
+ 80178b6:	3304      	adds	r3, #4
+ 80178b8:	681b      	ldr	r3, [r3, #0]
+ 80178ba:	429a      	cmp	r2, r3
+ 80178bc:	d002      	beq.n	80178c4 <udp_sendto_if+0xac>
+        /* local_ip doesn't match, drop the packet */
+        return ERR_RTE;
+ 80178be:	f06f 0303 	mvn.w	r3, #3
+ 80178c2:	e00d      	b.n	80178e0 <udp_sendto_if+0xc8>
+      }
+      /* use UDP PCB local IP address as source address */
+      src_ip = &pcb->local_ip;
+ 80178c4:	68fb      	ldr	r3, [r7, #12]
+ 80178c6:	617b      	str	r3, [r7, #20]
+    }
+#endif /* LWIP_IPV4 */
+#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
+  return udp_sendto_if_src_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum, src_ip);
+#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
+  return udp_sendto_if_src(pcb, p, dst_ip, dst_port, netif, src_ip);
+ 80178c8:	887a      	ldrh	r2, [r7, #2]
+ 80178ca:	697b      	ldr	r3, [r7, #20]
+ 80178cc:	9301      	str	r3, [sp, #4]
+ 80178ce:	6a3b      	ldr	r3, [r7, #32]
+ 80178d0:	9300      	str	r3, [sp, #0]
+ 80178d2:	4613      	mov	r3, r2
+ 80178d4:	687a      	ldr	r2, [r7, #4]
+ 80178d6:	68b9      	ldr	r1, [r7, #8]
+ 80178d8:	68f8      	ldr	r0, [r7, #12]
+ 80178da:	f000 f811 	bl	8017900 <udp_sendto_if_src>
+ 80178de:	4603      	mov	r3, r0
+#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
+}
+ 80178e0:	4618      	mov	r0, r3
+ 80178e2:	3718      	adds	r7, #24
+ 80178e4:	46bd      	mov	sp, r7
+ 80178e6:	bd80      	pop	{r7, pc}
+ 80178e8:	0801f764 	.word	0x0801f764
+ 80178ec:	0801f8d8 	.word	0x0801f8d8
+ 80178f0:	0801f7b8 	.word	0x0801f7b8
+ 80178f4:	0801f8f4 	.word	0x0801f8f4
+ 80178f8:	0801f910 	.word	0x0801f910
+ 80178fc:	0801f930 	.word	0x0801f930
+
+08017900 <udp_sendto_if_src>:
+/** @ingroup udp_raw
+ * Same as @ref udp_sendto_if, but with source address */
+err_t
+udp_sendto_if_src(struct udp_pcb *pcb, struct pbuf *p,
+                  const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif, const ip_addr_t *src_ip)
+{
+ 8017900:	b580      	push	{r7, lr}
+ 8017902:	b08c      	sub	sp, #48	; 0x30
+ 8017904:	af04      	add	r7, sp, #16
+ 8017906:	60f8      	str	r0, [r7, #12]
+ 8017908:	60b9      	str	r1, [r7, #8]
+ 801790a:	607a      	str	r2, [r7, #4]
+ 801790c:	807b      	strh	r3, [r7, #2]
+  u8_t ip_proto;
+  u8_t ttl;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("udp_sendto_if_src: invalid pcb", pcb != NULL, return ERR_ARG);
+ 801790e:	68fb      	ldr	r3, [r7, #12]
+ 8017910:	2b00      	cmp	r3, #0
+ 8017912:	d109      	bne.n	8017928 <udp_sendto_if_src+0x28>
+ 8017914:	4b65      	ldr	r3, [pc, #404]	; (8017aac <udp_sendto_if_src+0x1ac>)
+ 8017916:	f240 22d1 	movw	r2, #721	; 0x2d1
+ 801791a:	4965      	ldr	r1, [pc, #404]	; (8017ab0 <udp_sendto_if_src+0x1b0>)
+ 801791c:	4865      	ldr	r0, [pc, #404]	; (8017ab4 <udp_sendto_if_src+0x1b4>)
+ 801791e:	f004 fd6b 	bl	801c3f8 <iprintf>
+ 8017922:	f06f 030f 	mvn.w	r3, #15
+ 8017926:	e0bc      	b.n	8017aa2 <udp_sendto_if_src+0x1a2>
+  LWIP_ERROR("udp_sendto_if_src: invalid pbuf", p != NULL, return ERR_ARG);
+ 8017928:	68bb      	ldr	r3, [r7, #8]
+ 801792a:	2b00      	cmp	r3, #0
+ 801792c:	d109      	bne.n	8017942 <udp_sendto_if_src+0x42>
+ 801792e:	4b5f      	ldr	r3, [pc, #380]	; (8017aac <udp_sendto_if_src+0x1ac>)
+ 8017930:	f240 22d2 	movw	r2, #722	; 0x2d2
+ 8017934:	4960      	ldr	r1, [pc, #384]	; (8017ab8 <udp_sendto_if_src+0x1b8>)
+ 8017936:	485f      	ldr	r0, [pc, #380]	; (8017ab4 <udp_sendto_if_src+0x1b4>)
+ 8017938:	f004 fd5e 	bl	801c3f8 <iprintf>
+ 801793c:	f06f 030f 	mvn.w	r3, #15
+ 8017940:	e0af      	b.n	8017aa2 <udp_sendto_if_src+0x1a2>
+  LWIP_ERROR("udp_sendto_if_src: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
+ 8017942:	687b      	ldr	r3, [r7, #4]
+ 8017944:	2b00      	cmp	r3, #0
+ 8017946:	d109      	bne.n	801795c <udp_sendto_if_src+0x5c>
+ 8017948:	4b58      	ldr	r3, [pc, #352]	; (8017aac <udp_sendto_if_src+0x1ac>)
+ 801794a:	f240 22d3 	movw	r2, #723	; 0x2d3
+ 801794e:	495b      	ldr	r1, [pc, #364]	; (8017abc <udp_sendto_if_src+0x1bc>)
+ 8017950:	4858      	ldr	r0, [pc, #352]	; (8017ab4 <udp_sendto_if_src+0x1b4>)
+ 8017952:	f004 fd51 	bl	801c3f8 <iprintf>
+ 8017956:	f06f 030f 	mvn.w	r3, #15
+ 801795a:	e0a2      	b.n	8017aa2 <udp_sendto_if_src+0x1a2>
+  LWIP_ERROR("udp_sendto_if_src: invalid src_ip", src_ip != NULL, return ERR_ARG);
+ 801795c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801795e:	2b00      	cmp	r3, #0
+ 8017960:	d109      	bne.n	8017976 <udp_sendto_if_src+0x76>
+ 8017962:	4b52      	ldr	r3, [pc, #328]	; (8017aac <udp_sendto_if_src+0x1ac>)
+ 8017964:	f44f 7235 	mov.w	r2, #724	; 0x2d4
+ 8017968:	4955      	ldr	r1, [pc, #340]	; (8017ac0 <udp_sendto_if_src+0x1c0>)
+ 801796a:	4852      	ldr	r0, [pc, #328]	; (8017ab4 <udp_sendto_if_src+0x1b4>)
+ 801796c:	f004 fd44 	bl	801c3f8 <iprintf>
+ 8017970:	f06f 030f 	mvn.w	r3, #15
+ 8017974:	e095      	b.n	8017aa2 <udp_sendto_if_src+0x1a2>
+  LWIP_ERROR("udp_sendto_if_src: invalid netif", netif != NULL, return ERR_ARG);
+ 8017976:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8017978:	2b00      	cmp	r3, #0
+ 801797a:	d109      	bne.n	8017990 <udp_sendto_if_src+0x90>
+ 801797c:	4b4b      	ldr	r3, [pc, #300]	; (8017aac <udp_sendto_if_src+0x1ac>)
+ 801797e:	f240 22d5 	movw	r2, #725	; 0x2d5
+ 8017982:	4950      	ldr	r1, [pc, #320]	; (8017ac4 <udp_sendto_if_src+0x1c4>)
+ 8017984:	484b      	ldr	r0, [pc, #300]	; (8017ab4 <udp_sendto_if_src+0x1b4>)
+ 8017986:	f004 fd37 	bl	801c3f8 <iprintf>
+ 801798a:	f06f 030f 	mvn.w	r3, #15
+ 801798e:	e088      	b.n	8017aa2 <udp_sendto_if_src+0x1a2>
+    return ERR_VAL;
+  }
+#endif /* LWIP_IPV4 && IP_SOF_BROADCAST */
+
+  /* if the PCB is not yet bound to a port, bind it here */
+  if (pcb->local_port == 0) {
+ 8017990:	68fb      	ldr	r3, [r7, #12]
+ 8017992:	8a5b      	ldrh	r3, [r3, #18]
+ 8017994:	2b00      	cmp	r3, #0
+ 8017996:	d10f      	bne.n	80179b8 <udp_sendto_if_src+0xb8>
+    LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send: not yet bound to a port, binding now\n"));
+    err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
+ 8017998:	68f9      	ldr	r1, [r7, #12]
+ 801799a:	68fb      	ldr	r3, [r7, #12]
+ 801799c:	8a5b      	ldrh	r3, [r3, #18]
+ 801799e:	461a      	mov	r2, r3
+ 80179a0:	68f8      	ldr	r0, [r7, #12]
+ 80179a2:	f000 f893 	bl	8017acc <udp_bind>
+ 80179a6:	4603      	mov	r3, r0
+ 80179a8:	76fb      	strb	r3, [r7, #27]
+    if (err != ERR_OK) {
+ 80179aa:	f997 301b 	ldrsb.w	r3, [r7, #27]
+ 80179ae:	2b00      	cmp	r3, #0
+ 80179b0:	d002      	beq.n	80179b8 <udp_sendto_if_src+0xb8>
+      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: forced port bind failed\n"));
+      return err;
+ 80179b2:	f997 301b 	ldrsb.w	r3, [r7, #27]
+ 80179b6:	e074      	b.n	8017aa2 <udp_sendto_if_src+0x1a2>
+    }
+  }
+
+  /* packet too large to add a UDP header without causing an overflow? */
+  if ((u16_t)(p->tot_len + UDP_HLEN) < p->tot_len) {
+ 80179b8:	68bb      	ldr	r3, [r7, #8]
+ 80179ba:	891b      	ldrh	r3, [r3, #8]
+ 80179bc:	f64f 72f7 	movw	r2, #65527	; 0xfff7
+ 80179c0:	4293      	cmp	r3, r2
+ 80179c2:	d902      	bls.n	80179ca <udp_sendto_if_src+0xca>
+    return ERR_MEM;
+ 80179c4:	f04f 33ff 	mov.w	r3, #4294967295
+ 80179c8:	e06b      	b.n	8017aa2 <udp_sendto_if_src+0x1a2>
+  }
+  /* not enough space to add an UDP header to first pbuf in given p chain? */
+  if (pbuf_add_header(p, UDP_HLEN)) {
+ 80179ca:	2108      	movs	r1, #8
+ 80179cc:	68b8      	ldr	r0, [r7, #8]
+ 80179ce:	f7f9 ff4d 	bl	801186c <pbuf_add_header>
+ 80179d2:	4603      	mov	r3, r0
+ 80179d4:	2b00      	cmp	r3, #0
+ 80179d6:	d015      	beq.n	8017a04 <udp_sendto_if_src+0x104>
+    /* allocate header in a separate new pbuf */
+    q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM);
+ 80179d8:	f44f 7220 	mov.w	r2, #640	; 0x280
+ 80179dc:	2108      	movs	r1, #8
+ 80179de:	2022      	movs	r0, #34	; 0x22
+ 80179e0:	f7f9 fcfa 	bl	80113d8 <pbuf_alloc>
+ 80179e4:	61f8      	str	r0, [r7, #28]
+    /* new header pbuf could not be allocated? */
+    if (q == NULL) {
+ 80179e6:	69fb      	ldr	r3, [r7, #28]
+ 80179e8:	2b00      	cmp	r3, #0
+ 80179ea:	d102      	bne.n	80179f2 <udp_sendto_if_src+0xf2>
+      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: could not allocate header\n"));
+      return ERR_MEM;
+ 80179ec:	f04f 33ff 	mov.w	r3, #4294967295
+ 80179f0:	e057      	b.n	8017aa2 <udp_sendto_if_src+0x1a2>
+    }
+    if (p->tot_len != 0) {
+ 80179f2:	68bb      	ldr	r3, [r7, #8]
+ 80179f4:	891b      	ldrh	r3, [r3, #8]
+ 80179f6:	2b00      	cmp	r3, #0
+ 80179f8:	d006      	beq.n	8017a08 <udp_sendto_if_src+0x108>
+      /* chain header q in front of given pbuf p (only if p contains data) */
+      pbuf_chain(q, p);
+ 80179fa:	68b9      	ldr	r1, [r7, #8]
+ 80179fc:	69f8      	ldr	r0, [r7, #28]
+ 80179fe:	f7fa f8ef 	bl	8011be0 <pbuf_chain>
+ 8017a02:	e001      	b.n	8017a08 <udp_sendto_if_src+0x108>
+    LWIP_DEBUGF(UDP_DEBUG,
+                ("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p));
+  } else {
+    /* adding space for header within p succeeded */
+    /* first pbuf q equals given pbuf */
+    q = p;
+ 8017a04:	68bb      	ldr	r3, [r7, #8]
+ 8017a06:	61fb      	str	r3, [r7, #28]
+    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p));
+  }
+  LWIP_ASSERT("check that first pbuf can hold struct udp_hdr",
+ 8017a08:	69fb      	ldr	r3, [r7, #28]
+ 8017a0a:	895b      	ldrh	r3, [r3, #10]
+ 8017a0c:	2b07      	cmp	r3, #7
+ 8017a0e:	d806      	bhi.n	8017a1e <udp_sendto_if_src+0x11e>
+ 8017a10:	4b26      	ldr	r3, [pc, #152]	; (8017aac <udp_sendto_if_src+0x1ac>)
+ 8017a12:	f240 320e 	movw	r2, #782	; 0x30e
+ 8017a16:	492c      	ldr	r1, [pc, #176]	; (8017ac8 <udp_sendto_if_src+0x1c8>)
+ 8017a18:	4826      	ldr	r0, [pc, #152]	; (8017ab4 <udp_sendto_if_src+0x1b4>)
+ 8017a1a:	f004 fced 	bl	801c3f8 <iprintf>
+              (q->len >= sizeof(struct udp_hdr)));
+  /* q now represents the packet to be sent */
+  udphdr = (struct udp_hdr *)q->payload;
+ 8017a1e:	69fb      	ldr	r3, [r7, #28]
+ 8017a20:	685b      	ldr	r3, [r3, #4]
+ 8017a22:	617b      	str	r3, [r7, #20]
+  udphdr->src = lwip_htons(pcb->local_port);
+ 8017a24:	68fb      	ldr	r3, [r7, #12]
+ 8017a26:	8a5b      	ldrh	r3, [r3, #18]
+ 8017a28:	4618      	mov	r0, r3
+ 8017a2a:	f7f8 fc01 	bl	8010230 <lwip_htons>
+ 8017a2e:	4603      	mov	r3, r0
+ 8017a30:	461a      	mov	r2, r3
+ 8017a32:	697b      	ldr	r3, [r7, #20]
+ 8017a34:	801a      	strh	r2, [r3, #0]
+  udphdr->dest = lwip_htons(dst_port);
+ 8017a36:	887b      	ldrh	r3, [r7, #2]
+ 8017a38:	4618      	mov	r0, r3
+ 8017a3a:	f7f8 fbf9 	bl	8010230 <lwip_htons>
+ 8017a3e:	4603      	mov	r3, r0
+ 8017a40:	461a      	mov	r2, r3
+ 8017a42:	697b      	ldr	r3, [r7, #20]
+ 8017a44:	805a      	strh	r2, [r3, #2]
+  /* in UDP, 0 checksum means 'no checksum' */
+  udphdr->chksum = 0x0000;
+ 8017a46:	697b      	ldr	r3, [r7, #20]
+ 8017a48:	2200      	movs	r2, #0
+ 8017a4a:	719a      	strb	r2, [r3, #6]
+ 8017a4c:	2200      	movs	r2, #0
+ 8017a4e:	71da      	strb	r2, [r3, #7]
+    ip_proto = IP_PROTO_UDPLITE;
+  } else
+#endif /* LWIP_UDPLITE */
+  {      /* UDP */
+    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len));
+    udphdr->len = lwip_htons(q->tot_len);
+ 8017a50:	69fb      	ldr	r3, [r7, #28]
+ 8017a52:	891b      	ldrh	r3, [r3, #8]
+ 8017a54:	4618      	mov	r0, r3
+ 8017a56:	f7f8 fbeb 	bl	8010230 <lwip_htons>
+ 8017a5a:	4603      	mov	r3, r0
+ 8017a5c:	461a      	mov	r2, r3
+ 8017a5e:	697b      	ldr	r3, [r7, #20]
+ 8017a60:	809a      	strh	r2, [r3, #4]
+        }
+        udphdr->chksum = udpchksum;
+      }
+    }
+#endif /* CHECKSUM_GEN_UDP */
+    ip_proto = IP_PROTO_UDP;
+ 8017a62:	2311      	movs	r3, #17
+ 8017a64:	74fb      	strb	r3, [r7, #19]
+
+  /* Determine TTL to use */
+#if LWIP_MULTICAST_TX_OPTIONS
+  ttl = (ip_addr_ismulticast(dst_ip) ? udp_get_multicast_ttl(pcb) : pcb->ttl);
+#else /* LWIP_MULTICAST_TX_OPTIONS */
+  ttl = pcb->ttl;
+ 8017a66:	68fb      	ldr	r3, [r7, #12]
+ 8017a68:	7adb      	ldrb	r3, [r3, #11]
+ 8017a6a:	74bb      	strb	r3, [r7, #18]
+
+  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum));
+  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,0x%02"X16_F",)\n", (u16_t)ip_proto));
+  /* output to IP */
+  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
+  err = ip_output_if_src(q, src_ip, dst_ip, ttl, pcb->tos, ip_proto, netif);
+ 8017a6c:	68fb      	ldr	r3, [r7, #12]
+ 8017a6e:	7a9b      	ldrb	r3, [r3, #10]
+ 8017a70:	7cb9      	ldrb	r1, [r7, #18]
+ 8017a72:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 8017a74:	9202      	str	r2, [sp, #8]
+ 8017a76:	7cfa      	ldrb	r2, [r7, #19]
+ 8017a78:	9201      	str	r2, [sp, #4]
+ 8017a7a:	9300      	str	r3, [sp, #0]
+ 8017a7c:	460b      	mov	r3, r1
+ 8017a7e:	687a      	ldr	r2, [r7, #4]
+ 8017a80:	6af9      	ldr	r1, [r7, #44]	; 0x2c
+ 8017a82:	69f8      	ldr	r0, [r7, #28]
+ 8017a84:	f003 fb48 	bl	801b118 <ip4_output_if_src>
+ 8017a88:	4603      	mov	r3, r0
+ 8017a8a:	76fb      	strb	r3, [r7, #27]
+
+  /* @todo: must this be increased even if error occurred? */
+  MIB2_STATS_INC(mib2.udpoutdatagrams);
+
+  /* did we chain a separate header pbuf earlier? */
+  if (q != p) {
+ 8017a8c:	69fa      	ldr	r2, [r7, #28]
+ 8017a8e:	68bb      	ldr	r3, [r7, #8]
+ 8017a90:	429a      	cmp	r2, r3
+ 8017a92:	d004      	beq.n	8017a9e <udp_sendto_if_src+0x19e>
+    /* free the header pbuf */
+    pbuf_free(q);
+ 8017a94:	69f8      	ldr	r0, [r7, #28]
+ 8017a96:	f7f9 ff7f 	bl	8011998 <pbuf_free>
+    q = NULL;
+ 8017a9a:	2300      	movs	r3, #0
+ 8017a9c:	61fb      	str	r3, [r7, #28]
+    /* p is still referenced by the caller, and will live on */
+  }
+
+  UDP_STATS_INC(udp.xmit);
+  return err;
+ 8017a9e:	f997 301b 	ldrsb.w	r3, [r7, #27]
+}
+ 8017aa2:	4618      	mov	r0, r3
+ 8017aa4:	3720      	adds	r7, #32
+ 8017aa6:	46bd      	mov	sp, r7
+ 8017aa8:	bd80      	pop	{r7, pc}
+ 8017aaa:	bf00      	nop
+ 8017aac:	0801f764 	.word	0x0801f764
+ 8017ab0:	0801f950 	.word	0x0801f950
+ 8017ab4:	0801f7b8 	.word	0x0801f7b8
+ 8017ab8:	0801f970 	.word	0x0801f970
+ 8017abc:	0801f990 	.word	0x0801f990
+ 8017ac0:	0801f9b4 	.word	0x0801f9b4
+ 8017ac4:	0801f9d8 	.word	0x0801f9d8
+ 8017ac8:	0801f9fc 	.word	0x0801f9fc
+
+08017acc <udp_bind>:
+ *
+ * @see udp_disconnect()
+ */
+err_t
+udp_bind(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
+{
+ 8017acc:	b580      	push	{r7, lr}
+ 8017ace:	b086      	sub	sp, #24
+ 8017ad0:	af00      	add	r7, sp, #0
+ 8017ad2:	60f8      	str	r0, [r7, #12]
+ 8017ad4:	60b9      	str	r1, [r7, #8]
+ 8017ad6:	4613      	mov	r3, r2
+ 8017ad8:	80fb      	strh	r3, [r7, #6]
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+#if LWIP_IPV4
+  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
+  if (ipaddr == NULL) {
+ 8017ada:	68bb      	ldr	r3, [r7, #8]
+ 8017adc:	2b00      	cmp	r3, #0
+ 8017ade:	d101      	bne.n	8017ae4 <udp_bind+0x18>
+    ipaddr = IP4_ADDR_ANY;
+ 8017ae0:	4b39      	ldr	r3, [pc, #228]	; (8017bc8 <udp_bind+0xfc>)
+ 8017ae2:	60bb      	str	r3, [r7, #8]
+  }
+#else /* LWIP_IPV4 */
+  LWIP_ERROR("udp_bind: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
+#endif /* LWIP_IPV4 */
+
+  LWIP_ERROR("udp_bind: invalid pcb", pcb != NULL, return ERR_ARG);
+ 8017ae4:	68fb      	ldr	r3, [r7, #12]
+ 8017ae6:	2b00      	cmp	r3, #0
+ 8017ae8:	d109      	bne.n	8017afe <udp_bind+0x32>
+ 8017aea:	4b38      	ldr	r3, [pc, #224]	; (8017bcc <udp_bind+0x100>)
+ 8017aec:	f240 32b7 	movw	r2, #951	; 0x3b7
+ 8017af0:	4937      	ldr	r1, [pc, #220]	; (8017bd0 <udp_bind+0x104>)
+ 8017af2:	4838      	ldr	r0, [pc, #224]	; (8017bd4 <udp_bind+0x108>)
+ 8017af4:	f004 fc80 	bl	801c3f8 <iprintf>
+ 8017af8:	f06f 030f 	mvn.w	r3, #15
+ 8017afc:	e060      	b.n	8017bc0 <udp_bind+0xf4>
+
+  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_bind(ipaddr = "));
+  ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_TRACE, ipaddr);
+  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, (", port = %"U16_F")\n", port));
+
+  rebind = 0;
+ 8017afe:	2300      	movs	r3, #0
+ 8017b00:	74fb      	strb	r3, [r7, #19]
+  /* Check for double bind and rebind of the same pcb */
+  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
+ 8017b02:	4b35      	ldr	r3, [pc, #212]	; (8017bd8 <udp_bind+0x10c>)
+ 8017b04:	681b      	ldr	r3, [r3, #0]
+ 8017b06:	617b      	str	r3, [r7, #20]
+ 8017b08:	e009      	b.n	8017b1e <udp_bind+0x52>
+    /* is this UDP PCB already on active list? */
+    if (pcb == ipcb) {
+ 8017b0a:	68fa      	ldr	r2, [r7, #12]
+ 8017b0c:	697b      	ldr	r3, [r7, #20]
+ 8017b0e:	429a      	cmp	r2, r3
+ 8017b10:	d102      	bne.n	8017b18 <udp_bind+0x4c>
+      rebind = 1;
+ 8017b12:	2301      	movs	r3, #1
+ 8017b14:	74fb      	strb	r3, [r7, #19]
+      break;
+ 8017b16:	e005      	b.n	8017b24 <udp_bind+0x58>
+  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
+ 8017b18:	697b      	ldr	r3, [r7, #20]
+ 8017b1a:	68db      	ldr	r3, [r3, #12]
+ 8017b1c:	617b      	str	r3, [r7, #20]
+ 8017b1e:	697b      	ldr	r3, [r7, #20]
+ 8017b20:	2b00      	cmp	r3, #0
+ 8017b22:	d1f2      	bne.n	8017b0a <udp_bind+0x3e>
+    ipaddr = &zoned_ipaddr;
+  }
+#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */
+
+  /* no port specified? */
+  if (port == 0) {
+ 8017b24:	88fb      	ldrh	r3, [r7, #6]
+ 8017b26:	2b00      	cmp	r3, #0
+ 8017b28:	d109      	bne.n	8017b3e <udp_bind+0x72>
+    port = udp_new_port();
+ 8017b2a:	f7ff fcc5 	bl	80174b8 <udp_new_port>
+ 8017b2e:	4603      	mov	r3, r0
+ 8017b30:	80fb      	strh	r3, [r7, #6]
+    if (port == 0) {
+ 8017b32:	88fb      	ldrh	r3, [r7, #6]
+ 8017b34:	2b00      	cmp	r3, #0
+ 8017b36:	d12c      	bne.n	8017b92 <udp_bind+0xc6>
+      /* no more ports available in local range */
+      LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n"));
+      return ERR_USE;
+ 8017b38:	f06f 0307 	mvn.w	r3, #7
+ 8017b3c:	e040      	b.n	8017bc0 <udp_bind+0xf4>
+    }
+  } else {
+    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
+ 8017b3e:	4b26      	ldr	r3, [pc, #152]	; (8017bd8 <udp_bind+0x10c>)
+ 8017b40:	681b      	ldr	r3, [r3, #0]
+ 8017b42:	617b      	str	r3, [r7, #20]
+ 8017b44:	e022      	b.n	8017b8c <udp_bind+0xc0>
+      if (pcb != ipcb) {
+ 8017b46:	68fa      	ldr	r2, [r7, #12]
+ 8017b48:	697b      	ldr	r3, [r7, #20]
+ 8017b4a:	429a      	cmp	r2, r3
+ 8017b4c:	d01b      	beq.n	8017b86 <udp_bind+0xba>
+        if (!ip_get_option(pcb, SOF_REUSEADDR) ||
+            !ip_get_option(ipcb, SOF_REUSEADDR))
+#endif /* SO_REUSE */
+        {
+          /* port matches that of PCB in list and REUSEADDR not set -> reject */
+          if ((ipcb->local_port == port) &&
+ 8017b4e:	697b      	ldr	r3, [r7, #20]
+ 8017b50:	8a5b      	ldrh	r3, [r3, #18]
+ 8017b52:	88fa      	ldrh	r2, [r7, #6]
+ 8017b54:	429a      	cmp	r2, r3
+ 8017b56:	d116      	bne.n	8017b86 <udp_bind+0xba>
+              /* IP address matches or any IP used? */
+              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
+ 8017b58:	697b      	ldr	r3, [r7, #20]
+ 8017b5a:	681a      	ldr	r2, [r3, #0]
+ 8017b5c:	68bb      	ldr	r3, [r7, #8]
+ 8017b5e:	681b      	ldr	r3, [r3, #0]
+          if ((ipcb->local_port == port) &&
+ 8017b60:	429a      	cmp	r2, r3
+ 8017b62:	d00d      	beq.n	8017b80 <udp_bind+0xb4>
+              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
+ 8017b64:	68bb      	ldr	r3, [r7, #8]
+ 8017b66:	2b00      	cmp	r3, #0
+ 8017b68:	d00a      	beq.n	8017b80 <udp_bind+0xb4>
+ 8017b6a:	68bb      	ldr	r3, [r7, #8]
+ 8017b6c:	681b      	ldr	r3, [r3, #0]
+ 8017b6e:	2b00      	cmp	r3, #0
+ 8017b70:	d006      	beq.n	8017b80 <udp_bind+0xb4>
+              ip_addr_isany(&ipcb->local_ip))) {
+ 8017b72:	697b      	ldr	r3, [r7, #20]
+              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
+ 8017b74:	2b00      	cmp	r3, #0
+ 8017b76:	d003      	beq.n	8017b80 <udp_bind+0xb4>
+              ip_addr_isany(&ipcb->local_ip))) {
+ 8017b78:	697b      	ldr	r3, [r7, #20]
+ 8017b7a:	681b      	ldr	r3, [r3, #0]
+ 8017b7c:	2b00      	cmp	r3, #0
+ 8017b7e:	d102      	bne.n	8017b86 <udp_bind+0xba>
+            /* other PCB already binds to this local IP and port */
+            LWIP_DEBUGF(UDP_DEBUG,
+                        ("udp_bind: local port %"U16_F" already bound by another pcb\n", port));
+            return ERR_USE;
+ 8017b80:	f06f 0307 	mvn.w	r3, #7
+ 8017b84:	e01c      	b.n	8017bc0 <udp_bind+0xf4>
+    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
+ 8017b86:	697b      	ldr	r3, [r7, #20]
+ 8017b88:	68db      	ldr	r3, [r3, #12]
+ 8017b8a:	617b      	str	r3, [r7, #20]
+ 8017b8c:	697b      	ldr	r3, [r7, #20]
+ 8017b8e:	2b00      	cmp	r3, #0
+ 8017b90:	d1d9      	bne.n	8017b46 <udp_bind+0x7a>
+        }
+      }
+    }
+  }
+
+  ip_addr_set_ipaddr(&pcb->local_ip, ipaddr);
+ 8017b92:	68bb      	ldr	r3, [r7, #8]
+ 8017b94:	2b00      	cmp	r3, #0
+ 8017b96:	d002      	beq.n	8017b9e <udp_bind+0xd2>
+ 8017b98:	68bb      	ldr	r3, [r7, #8]
+ 8017b9a:	681b      	ldr	r3, [r3, #0]
+ 8017b9c:	e000      	b.n	8017ba0 <udp_bind+0xd4>
+ 8017b9e:	2300      	movs	r3, #0
+ 8017ba0:	68fa      	ldr	r2, [r7, #12]
+ 8017ba2:	6013      	str	r3, [r2, #0]
+
+  pcb->local_port = port;
+ 8017ba4:	68fb      	ldr	r3, [r7, #12]
+ 8017ba6:	88fa      	ldrh	r2, [r7, #6]
+ 8017ba8:	825a      	strh	r2, [r3, #18]
+  mib2_udp_bind(pcb);
+  /* pcb not active yet? */
+  if (rebind == 0) {
+ 8017baa:	7cfb      	ldrb	r3, [r7, #19]
+ 8017bac:	2b00      	cmp	r3, #0
+ 8017bae:	d106      	bne.n	8017bbe <udp_bind+0xf2>
+    /* place the PCB on the active list if not already there */
+    pcb->next = udp_pcbs;
+ 8017bb0:	4b09      	ldr	r3, [pc, #36]	; (8017bd8 <udp_bind+0x10c>)
+ 8017bb2:	681a      	ldr	r2, [r3, #0]
+ 8017bb4:	68fb      	ldr	r3, [r7, #12]
+ 8017bb6:	60da      	str	r2, [r3, #12]
+    udp_pcbs = pcb;
+ 8017bb8:	4a07      	ldr	r2, [pc, #28]	; (8017bd8 <udp_bind+0x10c>)
+ 8017bba:	68fb      	ldr	r3, [r7, #12]
+ 8017bbc:	6013      	str	r3, [r2, #0]
+  }
+  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("udp_bind: bound to "));
+  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, pcb->local_ip);
+  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->local_port));
+  return ERR_OK;
+ 8017bbe:	2300      	movs	r3, #0
+}
+ 8017bc0:	4618      	mov	r0, r3
+ 8017bc2:	3718      	adds	r7, #24
+ 8017bc4:	46bd      	mov	sp, r7
+ 8017bc6:	bd80      	pop	{r7, pc}
+ 8017bc8:	08022598 	.word	0x08022598
+ 8017bcc:	0801f764 	.word	0x0801f764
+ 8017bd0:	0801fa2c 	.word	0x0801fa2c
+ 8017bd4:	0801f7b8 	.word	0x0801f7b8
+ 8017bd8:	2000f800 	.word	0x2000f800
+
+08017bdc <udp_connect>:
+ *
+ * @see udp_disconnect()
+ */
+err_t
+udp_connect(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
+{
+ 8017bdc:	b580      	push	{r7, lr}
+ 8017bde:	b086      	sub	sp, #24
+ 8017be0:	af00      	add	r7, sp, #0
+ 8017be2:	60f8      	str	r0, [r7, #12]
+ 8017be4:	60b9      	str	r1, [r7, #8]
+ 8017be6:	4613      	mov	r3, r2
+ 8017be8:	80fb      	strh	r3, [r7, #6]
+  struct udp_pcb *ipcb;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("udp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
+ 8017bea:	68fb      	ldr	r3, [r7, #12]
+ 8017bec:	2b00      	cmp	r3, #0
+ 8017bee:	d109      	bne.n	8017c04 <udp_connect+0x28>
+ 8017bf0:	4b2c      	ldr	r3, [pc, #176]	; (8017ca4 <udp_connect+0xc8>)
+ 8017bf2:	f240 4235 	movw	r2, #1077	; 0x435
+ 8017bf6:	492c      	ldr	r1, [pc, #176]	; (8017ca8 <udp_connect+0xcc>)
+ 8017bf8:	482c      	ldr	r0, [pc, #176]	; (8017cac <udp_connect+0xd0>)
+ 8017bfa:	f004 fbfd 	bl	801c3f8 <iprintf>
+ 8017bfe:	f06f 030f 	mvn.w	r3, #15
+ 8017c02:	e04b      	b.n	8017c9c <udp_connect+0xc0>
+  LWIP_ERROR("udp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
+ 8017c04:	68bb      	ldr	r3, [r7, #8]
+ 8017c06:	2b00      	cmp	r3, #0
+ 8017c08:	d109      	bne.n	8017c1e <udp_connect+0x42>
+ 8017c0a:	4b26      	ldr	r3, [pc, #152]	; (8017ca4 <udp_connect+0xc8>)
+ 8017c0c:	f240 4236 	movw	r2, #1078	; 0x436
+ 8017c10:	4927      	ldr	r1, [pc, #156]	; (8017cb0 <udp_connect+0xd4>)
+ 8017c12:	4826      	ldr	r0, [pc, #152]	; (8017cac <udp_connect+0xd0>)
+ 8017c14:	f004 fbf0 	bl	801c3f8 <iprintf>
+ 8017c18:	f06f 030f 	mvn.w	r3, #15
+ 8017c1c:	e03e      	b.n	8017c9c <udp_connect+0xc0>
+
+  if (pcb->local_port == 0) {
+ 8017c1e:	68fb      	ldr	r3, [r7, #12]
+ 8017c20:	8a5b      	ldrh	r3, [r3, #18]
+ 8017c22:	2b00      	cmp	r3, #0
+ 8017c24:	d10f      	bne.n	8017c46 <udp_connect+0x6a>
+    err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
+ 8017c26:	68f9      	ldr	r1, [r7, #12]
+ 8017c28:	68fb      	ldr	r3, [r7, #12]
+ 8017c2a:	8a5b      	ldrh	r3, [r3, #18]
+ 8017c2c:	461a      	mov	r2, r3
+ 8017c2e:	68f8      	ldr	r0, [r7, #12]
+ 8017c30:	f7ff ff4c 	bl	8017acc <udp_bind>
+ 8017c34:	4603      	mov	r3, r0
+ 8017c36:	74fb      	strb	r3, [r7, #19]
+    if (err != ERR_OK) {
+ 8017c38:	f997 3013 	ldrsb.w	r3, [r7, #19]
+ 8017c3c:	2b00      	cmp	r3, #0
+ 8017c3e:	d002      	beq.n	8017c46 <udp_connect+0x6a>
+      return err;
+ 8017c40:	f997 3013 	ldrsb.w	r3, [r7, #19]
+ 8017c44:	e02a      	b.n	8017c9c <udp_connect+0xc0>
+    }
+  }
+
+  ip_addr_set_ipaddr(&pcb->remote_ip, ipaddr);
+ 8017c46:	68bb      	ldr	r3, [r7, #8]
+ 8017c48:	2b00      	cmp	r3, #0
+ 8017c4a:	d002      	beq.n	8017c52 <udp_connect+0x76>
+ 8017c4c:	68bb      	ldr	r3, [r7, #8]
+ 8017c4e:	681b      	ldr	r3, [r3, #0]
+ 8017c50:	e000      	b.n	8017c54 <udp_connect+0x78>
+ 8017c52:	2300      	movs	r3, #0
+ 8017c54:	68fa      	ldr	r2, [r7, #12]
+ 8017c56:	6053      	str	r3, [r2, #4]
+      ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNKNOWN)) {
+    ip6_addr_select_zone(ip_2_ip6(&pcb->remote_ip), ip_2_ip6(&pcb->local_ip));
+  }
+#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */
+
+  pcb->remote_port = port;
+ 8017c58:	68fb      	ldr	r3, [r7, #12]
+ 8017c5a:	88fa      	ldrh	r2, [r7, #6]
+ 8017c5c:	829a      	strh	r2, [r3, #20]
+  pcb->flags |= UDP_FLAGS_CONNECTED;
+ 8017c5e:	68fb      	ldr	r3, [r7, #12]
+ 8017c60:	7c1b      	ldrb	r3, [r3, #16]
+ 8017c62:	f043 0304 	orr.w	r3, r3, #4
+ 8017c66:	b2da      	uxtb	r2, r3
+ 8017c68:	68fb      	ldr	r3, [r7, #12]
+ 8017c6a:	741a      	strb	r2, [r3, #16]
+  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
+                          pcb->remote_ip);
+  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->remote_port));
+
+  /* Insert UDP PCB into the list of active UDP PCBs. */
+  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
+ 8017c6c:	4b11      	ldr	r3, [pc, #68]	; (8017cb4 <udp_connect+0xd8>)
+ 8017c6e:	681b      	ldr	r3, [r3, #0]
+ 8017c70:	617b      	str	r3, [r7, #20]
+ 8017c72:	e008      	b.n	8017c86 <udp_connect+0xaa>
+    if (pcb == ipcb) {
+ 8017c74:	68fa      	ldr	r2, [r7, #12]
+ 8017c76:	697b      	ldr	r3, [r7, #20]
+ 8017c78:	429a      	cmp	r2, r3
+ 8017c7a:	d101      	bne.n	8017c80 <udp_connect+0xa4>
+      /* already on the list, just return */
+      return ERR_OK;
+ 8017c7c:	2300      	movs	r3, #0
+ 8017c7e:	e00d      	b.n	8017c9c <udp_connect+0xc0>
+  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
+ 8017c80:	697b      	ldr	r3, [r7, #20]
+ 8017c82:	68db      	ldr	r3, [r3, #12]
+ 8017c84:	617b      	str	r3, [r7, #20]
+ 8017c86:	697b      	ldr	r3, [r7, #20]
+ 8017c88:	2b00      	cmp	r3, #0
+ 8017c8a:	d1f3      	bne.n	8017c74 <udp_connect+0x98>
+    }
+  }
+  /* PCB not yet on the list, add PCB now */
+  pcb->next = udp_pcbs;
+ 8017c8c:	4b09      	ldr	r3, [pc, #36]	; (8017cb4 <udp_connect+0xd8>)
+ 8017c8e:	681a      	ldr	r2, [r3, #0]
+ 8017c90:	68fb      	ldr	r3, [r7, #12]
+ 8017c92:	60da      	str	r2, [r3, #12]
+  udp_pcbs = pcb;
+ 8017c94:	4a07      	ldr	r2, [pc, #28]	; (8017cb4 <udp_connect+0xd8>)
+ 8017c96:	68fb      	ldr	r3, [r7, #12]
+ 8017c98:	6013      	str	r3, [r2, #0]
+  return ERR_OK;
+ 8017c9a:	2300      	movs	r3, #0
+}
+ 8017c9c:	4618      	mov	r0, r3
+ 8017c9e:	3718      	adds	r7, #24
+ 8017ca0:	46bd      	mov	sp, r7
+ 8017ca2:	bd80      	pop	{r7, pc}
+ 8017ca4:	0801f764 	.word	0x0801f764
+ 8017ca8:	0801fa44 	.word	0x0801fa44
+ 8017cac:	0801f7b8 	.word	0x0801f7b8
+ 8017cb0:	0801fa60 	.word	0x0801fa60
+ 8017cb4:	2000f800 	.word	0x2000f800
+
+08017cb8 <udp_recv>:
+ * @param recv function pointer of the callback function
+ * @param recv_arg additional argument to pass to the callback function
+ */
+void
+udp_recv(struct udp_pcb *pcb, udp_recv_fn recv, void *recv_arg)
+{
+ 8017cb8:	b580      	push	{r7, lr}
+ 8017cba:	b084      	sub	sp, #16
+ 8017cbc:	af00      	add	r7, sp, #0
+ 8017cbe:	60f8      	str	r0, [r7, #12]
+ 8017cc0:	60b9      	str	r1, [r7, #8]
+ 8017cc2:	607a      	str	r2, [r7, #4]
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("udp_recv: invalid pcb", pcb != NULL, return);
+ 8017cc4:	68fb      	ldr	r3, [r7, #12]
+ 8017cc6:	2b00      	cmp	r3, #0
+ 8017cc8:	d107      	bne.n	8017cda <udp_recv+0x22>
+ 8017cca:	4b08      	ldr	r3, [pc, #32]	; (8017cec <udp_recv+0x34>)
+ 8017ccc:	f240 428a 	movw	r2, #1162	; 0x48a
+ 8017cd0:	4907      	ldr	r1, [pc, #28]	; (8017cf0 <udp_recv+0x38>)
+ 8017cd2:	4808      	ldr	r0, [pc, #32]	; (8017cf4 <udp_recv+0x3c>)
+ 8017cd4:	f004 fb90 	bl	801c3f8 <iprintf>
+ 8017cd8:	e005      	b.n	8017ce6 <udp_recv+0x2e>
+
+  /* remember recv() callback and user data */
+  pcb->recv = recv;
+ 8017cda:	68fb      	ldr	r3, [r7, #12]
+ 8017cdc:	68ba      	ldr	r2, [r7, #8]
+ 8017cde:	619a      	str	r2, [r3, #24]
+  pcb->recv_arg = recv_arg;
+ 8017ce0:	68fb      	ldr	r3, [r7, #12]
+ 8017ce2:	687a      	ldr	r2, [r7, #4]
+ 8017ce4:	61da      	str	r2, [r3, #28]
+}
+ 8017ce6:	3710      	adds	r7, #16
+ 8017ce8:	46bd      	mov	sp, r7
+ 8017cea:	bd80      	pop	{r7, pc}
+ 8017cec:	0801f764 	.word	0x0801f764
+ 8017cf0:	0801fa98 	.word	0x0801fa98
+ 8017cf4:	0801f7b8 	.word	0x0801f7b8
+
+08017cf8 <udp_remove>:
+ *
+ * @see udp_new()
+ */
+void
+udp_remove(struct udp_pcb *pcb)
+{
+ 8017cf8:	b580      	push	{r7, lr}
+ 8017cfa:	b084      	sub	sp, #16
+ 8017cfc:	af00      	add	r7, sp, #0
+ 8017cfe:	6078      	str	r0, [r7, #4]
+  struct udp_pcb *pcb2;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("udp_remove: invalid pcb", pcb != NULL, return);
+ 8017d00:	687b      	ldr	r3, [r7, #4]
+ 8017d02:	2b00      	cmp	r3, #0
+ 8017d04:	d107      	bne.n	8017d16 <udp_remove+0x1e>
+ 8017d06:	4b19      	ldr	r3, [pc, #100]	; (8017d6c <udp_remove+0x74>)
+ 8017d08:	f240 42a1 	movw	r2, #1185	; 0x4a1
+ 8017d0c:	4918      	ldr	r1, [pc, #96]	; (8017d70 <udp_remove+0x78>)
+ 8017d0e:	4819      	ldr	r0, [pc, #100]	; (8017d74 <udp_remove+0x7c>)
+ 8017d10:	f004 fb72 	bl	801c3f8 <iprintf>
+ 8017d14:	e026      	b.n	8017d64 <udp_remove+0x6c>
+
+  mib2_udp_unbind(pcb);
+  /* pcb to be removed is first in list? */
+  if (udp_pcbs == pcb) {
+ 8017d16:	4b18      	ldr	r3, [pc, #96]	; (8017d78 <udp_remove+0x80>)
+ 8017d18:	681b      	ldr	r3, [r3, #0]
+ 8017d1a:	687a      	ldr	r2, [r7, #4]
+ 8017d1c:	429a      	cmp	r2, r3
+ 8017d1e:	d105      	bne.n	8017d2c <udp_remove+0x34>
+    /* make list start at 2nd pcb */
+    udp_pcbs = udp_pcbs->next;
+ 8017d20:	4b15      	ldr	r3, [pc, #84]	; (8017d78 <udp_remove+0x80>)
+ 8017d22:	681b      	ldr	r3, [r3, #0]
+ 8017d24:	68db      	ldr	r3, [r3, #12]
+ 8017d26:	4a14      	ldr	r2, [pc, #80]	; (8017d78 <udp_remove+0x80>)
+ 8017d28:	6013      	str	r3, [r2, #0]
+ 8017d2a:	e017      	b.n	8017d5c <udp_remove+0x64>
+    /* pcb not 1st in list */
+  } else {
+    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
+ 8017d2c:	4b12      	ldr	r3, [pc, #72]	; (8017d78 <udp_remove+0x80>)
+ 8017d2e:	681b      	ldr	r3, [r3, #0]
+ 8017d30:	60fb      	str	r3, [r7, #12]
+ 8017d32:	e010      	b.n	8017d56 <udp_remove+0x5e>
+      /* find pcb in udp_pcbs list */
+      if (pcb2->next != NULL && pcb2->next == pcb) {
+ 8017d34:	68fb      	ldr	r3, [r7, #12]
+ 8017d36:	68db      	ldr	r3, [r3, #12]
+ 8017d38:	2b00      	cmp	r3, #0
+ 8017d3a:	d009      	beq.n	8017d50 <udp_remove+0x58>
+ 8017d3c:	68fb      	ldr	r3, [r7, #12]
+ 8017d3e:	68db      	ldr	r3, [r3, #12]
+ 8017d40:	687a      	ldr	r2, [r7, #4]
+ 8017d42:	429a      	cmp	r2, r3
+ 8017d44:	d104      	bne.n	8017d50 <udp_remove+0x58>
+        /* remove pcb from list */
+        pcb2->next = pcb->next;
+ 8017d46:	687b      	ldr	r3, [r7, #4]
+ 8017d48:	68da      	ldr	r2, [r3, #12]
+ 8017d4a:	68fb      	ldr	r3, [r7, #12]
+ 8017d4c:	60da      	str	r2, [r3, #12]
+        break;
+ 8017d4e:	e005      	b.n	8017d5c <udp_remove+0x64>
+    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
+ 8017d50:	68fb      	ldr	r3, [r7, #12]
+ 8017d52:	68db      	ldr	r3, [r3, #12]
+ 8017d54:	60fb      	str	r3, [r7, #12]
+ 8017d56:	68fb      	ldr	r3, [r7, #12]
+ 8017d58:	2b00      	cmp	r3, #0
+ 8017d5a:	d1eb      	bne.n	8017d34 <udp_remove+0x3c>
+      }
+    }
+  }
+  memp_free(MEMP_UDP_PCB, pcb);
+ 8017d5c:	6879      	ldr	r1, [r7, #4]
+ 8017d5e:	2000      	movs	r0, #0
+ 8017d60:	f7f8 ff6e 	bl	8010c40 <memp_free>
+}
+ 8017d64:	3710      	adds	r7, #16
+ 8017d66:	46bd      	mov	sp, r7
+ 8017d68:	bd80      	pop	{r7, pc}
+ 8017d6a:	bf00      	nop
+ 8017d6c:	0801f764 	.word	0x0801f764
+ 8017d70:	0801fab0 	.word	0x0801fab0
+ 8017d74:	0801f7b8 	.word	0x0801f7b8
+ 8017d78:	2000f800 	.word	0x2000f800
+
+08017d7c <udp_new>:
+ *
+ * @see udp_remove()
+ */
+struct udp_pcb *
+udp_new(void)
+{
+ 8017d7c:	b580      	push	{r7, lr}
+ 8017d7e:	b082      	sub	sp, #8
+ 8017d80:	af00      	add	r7, sp, #0
+  struct udp_pcb *pcb;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  pcb = (struct udp_pcb *)memp_malloc(MEMP_UDP_PCB);
+ 8017d82:	2000      	movs	r0, #0
+ 8017d84:	f7f8 ff0a 	bl	8010b9c <memp_malloc>
+ 8017d88:	6078      	str	r0, [r7, #4]
+  /* could allocate UDP PCB? */
+  if (pcb != NULL) {
+ 8017d8a:	687b      	ldr	r3, [r7, #4]
+ 8017d8c:	2b00      	cmp	r3, #0
+ 8017d8e:	d007      	beq.n	8017da0 <udp_new+0x24>
+    /* UDP Lite: by initializing to all zeroes, chksum_len is set to 0
+     * which means checksum is generated over the whole datagram per default
+     * (recommended as default by RFC 3828). */
+    /* initialize PCB to all zeroes */
+    memset(pcb, 0, sizeof(struct udp_pcb));
+ 8017d90:	2220      	movs	r2, #32
+ 8017d92:	2100      	movs	r1, #0
+ 8017d94:	6878      	ldr	r0, [r7, #4]
+ 8017d96:	f004 fb26 	bl	801c3e6 <memset>
+    pcb->ttl = UDP_TTL;
+ 8017d9a:	687b      	ldr	r3, [r7, #4]
+ 8017d9c:	22ff      	movs	r2, #255	; 0xff
+ 8017d9e:	72da      	strb	r2, [r3, #11]
+#if LWIP_MULTICAST_TX_OPTIONS
+    udp_set_multicast_ttl(pcb, UDP_TTL);
+#endif /* LWIP_MULTICAST_TX_OPTIONS */
+  }
+  return pcb;
+ 8017da0:	687b      	ldr	r3, [r7, #4]
+}
+ 8017da2:	4618      	mov	r0, r3
+ 8017da4:	3708      	adds	r7, #8
+ 8017da6:	46bd      	mov	sp, r7
+ 8017da8:	bd80      	pop	{r7, pc}
+	...
+
+08017dac <udp_netif_ip_addr_changed>:
+ *
+ * @param old_addr IP address of the netif before change
+ * @param new_addr IP address of the netif after change
+ */
+void udp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
+{
+ 8017dac:	b480      	push	{r7}
+ 8017dae:	b085      	sub	sp, #20
+ 8017db0:	af00      	add	r7, sp, #0
+ 8017db2:	6078      	str	r0, [r7, #4]
+ 8017db4:	6039      	str	r1, [r7, #0]
+  struct udp_pcb *upcb;
+
+  if (!ip_addr_isany(old_addr) && !ip_addr_isany(new_addr)) {
+ 8017db6:	687b      	ldr	r3, [r7, #4]
+ 8017db8:	2b00      	cmp	r3, #0
+ 8017dba:	d01e      	beq.n	8017dfa <udp_netif_ip_addr_changed+0x4e>
+ 8017dbc:	687b      	ldr	r3, [r7, #4]
+ 8017dbe:	681b      	ldr	r3, [r3, #0]
+ 8017dc0:	2b00      	cmp	r3, #0
+ 8017dc2:	d01a      	beq.n	8017dfa <udp_netif_ip_addr_changed+0x4e>
+ 8017dc4:	683b      	ldr	r3, [r7, #0]
+ 8017dc6:	2b00      	cmp	r3, #0
+ 8017dc8:	d017      	beq.n	8017dfa <udp_netif_ip_addr_changed+0x4e>
+ 8017dca:	683b      	ldr	r3, [r7, #0]
+ 8017dcc:	681b      	ldr	r3, [r3, #0]
+ 8017dce:	2b00      	cmp	r3, #0
+ 8017dd0:	d013      	beq.n	8017dfa <udp_netif_ip_addr_changed+0x4e>
+    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
+ 8017dd2:	4b0d      	ldr	r3, [pc, #52]	; (8017e08 <udp_netif_ip_addr_changed+0x5c>)
+ 8017dd4:	681b      	ldr	r3, [r3, #0]
+ 8017dd6:	60fb      	str	r3, [r7, #12]
+ 8017dd8:	e00c      	b.n	8017df4 <udp_netif_ip_addr_changed+0x48>
+      /* PCB bound to current local interface address? */
+      if (ip_addr_cmp(&upcb->local_ip, old_addr)) {
+ 8017dda:	68fb      	ldr	r3, [r7, #12]
+ 8017ddc:	681a      	ldr	r2, [r3, #0]
+ 8017dde:	687b      	ldr	r3, [r7, #4]
+ 8017de0:	681b      	ldr	r3, [r3, #0]
+ 8017de2:	429a      	cmp	r2, r3
+ 8017de4:	d103      	bne.n	8017dee <udp_netif_ip_addr_changed+0x42>
+        /* The PCB is bound to the old ipaddr and
+         * is set to bound to the new one instead */
+        ip_addr_copy(upcb->local_ip, *new_addr);
+ 8017de6:	683b      	ldr	r3, [r7, #0]
+ 8017de8:	681a      	ldr	r2, [r3, #0]
+ 8017dea:	68fb      	ldr	r3, [r7, #12]
+ 8017dec:	601a      	str	r2, [r3, #0]
+    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
+ 8017dee:	68fb      	ldr	r3, [r7, #12]
+ 8017df0:	68db      	ldr	r3, [r3, #12]
+ 8017df2:	60fb      	str	r3, [r7, #12]
+ 8017df4:	68fb      	ldr	r3, [r7, #12]
+ 8017df6:	2b00      	cmp	r3, #0
+ 8017df8:	d1ef      	bne.n	8017dda <udp_netif_ip_addr_changed+0x2e>
+      }
+    }
+  }
+}
+ 8017dfa:	bf00      	nop
+ 8017dfc:	3714      	adds	r7, #20
+ 8017dfe:	46bd      	mov	sp, r7
+ 8017e00:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8017e04:	4770      	bx	lr
+ 8017e06:	bf00      	nop
+ 8017e08:	2000f800 	.word	0x2000f800
+
+08017e0c <dhcp_inc_pcb_refcount>:
+static void dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out);
+
+/** Ensure DHCP PCB is allocated and bound */
+static err_t
+dhcp_inc_pcb_refcount(void)
+{
+ 8017e0c:	b580      	push	{r7, lr}
+ 8017e0e:	af00      	add	r7, sp, #0
+  if (dhcp_pcb_refcount == 0) {
+ 8017e10:	4b20      	ldr	r3, [pc, #128]	; (8017e94 <dhcp_inc_pcb_refcount+0x88>)
+ 8017e12:	781b      	ldrb	r3, [r3, #0]
+ 8017e14:	2b00      	cmp	r3, #0
+ 8017e16:	d133      	bne.n	8017e80 <dhcp_inc_pcb_refcount+0x74>
+    LWIP_ASSERT("dhcp_inc_pcb_refcount(): memory leak", dhcp_pcb == NULL);
+ 8017e18:	4b1f      	ldr	r3, [pc, #124]	; (8017e98 <dhcp_inc_pcb_refcount+0x8c>)
+ 8017e1a:	681b      	ldr	r3, [r3, #0]
+ 8017e1c:	2b00      	cmp	r3, #0
+ 8017e1e:	d005      	beq.n	8017e2c <dhcp_inc_pcb_refcount+0x20>
+ 8017e20:	4b1e      	ldr	r3, [pc, #120]	; (8017e9c <dhcp_inc_pcb_refcount+0x90>)
+ 8017e22:	22e5      	movs	r2, #229	; 0xe5
+ 8017e24:	491e      	ldr	r1, [pc, #120]	; (8017ea0 <dhcp_inc_pcb_refcount+0x94>)
+ 8017e26:	481f      	ldr	r0, [pc, #124]	; (8017ea4 <dhcp_inc_pcb_refcount+0x98>)
+ 8017e28:	f004 fae6 	bl	801c3f8 <iprintf>
+
+    /* allocate UDP PCB */
+    dhcp_pcb = udp_new();
+ 8017e2c:	f7ff ffa6 	bl	8017d7c <udp_new>
+ 8017e30:	4602      	mov	r2, r0
+ 8017e32:	4b19      	ldr	r3, [pc, #100]	; (8017e98 <dhcp_inc_pcb_refcount+0x8c>)
+ 8017e34:	601a      	str	r2, [r3, #0]
+
+    if (dhcp_pcb == NULL) {
+ 8017e36:	4b18      	ldr	r3, [pc, #96]	; (8017e98 <dhcp_inc_pcb_refcount+0x8c>)
+ 8017e38:	681b      	ldr	r3, [r3, #0]
+ 8017e3a:	2b00      	cmp	r3, #0
+ 8017e3c:	d102      	bne.n	8017e44 <dhcp_inc_pcb_refcount+0x38>
+      return ERR_MEM;
+ 8017e3e:	f04f 33ff 	mov.w	r3, #4294967295
+ 8017e42:	e024      	b.n	8017e8e <dhcp_inc_pcb_refcount+0x82>
+    }
+
+    ip_set_option(dhcp_pcb, SOF_BROADCAST);
+ 8017e44:	4b14      	ldr	r3, [pc, #80]	; (8017e98 <dhcp_inc_pcb_refcount+0x8c>)
+ 8017e46:	681b      	ldr	r3, [r3, #0]
+ 8017e48:	7a5a      	ldrb	r2, [r3, #9]
+ 8017e4a:	4b13      	ldr	r3, [pc, #76]	; (8017e98 <dhcp_inc_pcb_refcount+0x8c>)
+ 8017e4c:	681b      	ldr	r3, [r3, #0]
+ 8017e4e:	f042 0220 	orr.w	r2, r2, #32
+ 8017e52:	b2d2      	uxtb	r2, r2
+ 8017e54:	725a      	strb	r2, [r3, #9]
+
+    /* set up local and remote port for the pcb -> listen on all interfaces on all src/dest IPs */
+    udp_bind(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_CLIENT);
+ 8017e56:	4b10      	ldr	r3, [pc, #64]	; (8017e98 <dhcp_inc_pcb_refcount+0x8c>)
+ 8017e58:	681b      	ldr	r3, [r3, #0]
+ 8017e5a:	2244      	movs	r2, #68	; 0x44
+ 8017e5c:	4912      	ldr	r1, [pc, #72]	; (8017ea8 <dhcp_inc_pcb_refcount+0x9c>)
+ 8017e5e:	4618      	mov	r0, r3
+ 8017e60:	f7ff fe34 	bl	8017acc <udp_bind>
+    udp_connect(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_SERVER);
+ 8017e64:	4b0c      	ldr	r3, [pc, #48]	; (8017e98 <dhcp_inc_pcb_refcount+0x8c>)
+ 8017e66:	681b      	ldr	r3, [r3, #0]
+ 8017e68:	2243      	movs	r2, #67	; 0x43
+ 8017e6a:	490f      	ldr	r1, [pc, #60]	; (8017ea8 <dhcp_inc_pcb_refcount+0x9c>)
+ 8017e6c:	4618      	mov	r0, r3
+ 8017e6e:	f7ff feb5 	bl	8017bdc <udp_connect>
+    udp_recv(dhcp_pcb, dhcp_recv, NULL);
+ 8017e72:	4b09      	ldr	r3, [pc, #36]	; (8017e98 <dhcp_inc_pcb_refcount+0x8c>)
+ 8017e74:	681b      	ldr	r3, [r3, #0]
+ 8017e76:	2200      	movs	r2, #0
+ 8017e78:	490c      	ldr	r1, [pc, #48]	; (8017eac <dhcp_inc_pcb_refcount+0xa0>)
+ 8017e7a:	4618      	mov	r0, r3
+ 8017e7c:	f7ff ff1c 	bl	8017cb8 <udp_recv>
+  }
+
+  dhcp_pcb_refcount++;
+ 8017e80:	4b04      	ldr	r3, [pc, #16]	; (8017e94 <dhcp_inc_pcb_refcount+0x88>)
+ 8017e82:	781b      	ldrb	r3, [r3, #0]
+ 8017e84:	3301      	adds	r3, #1
+ 8017e86:	b2da      	uxtb	r2, r3
+ 8017e88:	4b02      	ldr	r3, [pc, #8]	; (8017e94 <dhcp_inc_pcb_refcount+0x88>)
+ 8017e8a:	701a      	strb	r2, [r3, #0]
+
+  return ERR_OK;
+ 8017e8c:	2300      	movs	r3, #0
+}
+ 8017e8e:	4618      	mov	r0, r3
+ 8017e90:	bd80      	pop	{r7, pc}
+ 8017e92:	bf00      	nop
+ 8017e94:	2000875c 	.word	0x2000875c
+ 8017e98:	20008758 	.word	0x20008758
+ 8017e9c:	0801fac8 	.word	0x0801fac8
+ 8017ea0:	0801fb00 	.word	0x0801fb00
+ 8017ea4:	0801fb28 	.word	0x0801fb28
+ 8017ea8:	08022598 	.word	0x08022598
+ 8017eac:	08019769 	.word	0x08019769
+
+08017eb0 <dhcp_dec_pcb_refcount>:
+
+/** Free DHCP PCB if the last netif stops using it */
+static void
+dhcp_dec_pcb_refcount(void)
+{
+ 8017eb0:	b580      	push	{r7, lr}
+ 8017eb2:	af00      	add	r7, sp, #0
+  LWIP_ASSERT("dhcp_pcb_refcount(): refcount error", (dhcp_pcb_refcount > 0));
+ 8017eb4:	4b0e      	ldr	r3, [pc, #56]	; (8017ef0 <dhcp_dec_pcb_refcount+0x40>)
+ 8017eb6:	781b      	ldrb	r3, [r3, #0]
+ 8017eb8:	2b00      	cmp	r3, #0
+ 8017eba:	d105      	bne.n	8017ec8 <dhcp_dec_pcb_refcount+0x18>
+ 8017ebc:	4b0d      	ldr	r3, [pc, #52]	; (8017ef4 <dhcp_dec_pcb_refcount+0x44>)
+ 8017ebe:	22ff      	movs	r2, #255	; 0xff
+ 8017ec0:	490d      	ldr	r1, [pc, #52]	; (8017ef8 <dhcp_dec_pcb_refcount+0x48>)
+ 8017ec2:	480e      	ldr	r0, [pc, #56]	; (8017efc <dhcp_dec_pcb_refcount+0x4c>)
+ 8017ec4:	f004 fa98 	bl	801c3f8 <iprintf>
+  dhcp_pcb_refcount--;
+ 8017ec8:	4b09      	ldr	r3, [pc, #36]	; (8017ef0 <dhcp_dec_pcb_refcount+0x40>)
+ 8017eca:	781b      	ldrb	r3, [r3, #0]
+ 8017ecc:	3b01      	subs	r3, #1
+ 8017ece:	b2da      	uxtb	r2, r3
+ 8017ed0:	4b07      	ldr	r3, [pc, #28]	; (8017ef0 <dhcp_dec_pcb_refcount+0x40>)
+ 8017ed2:	701a      	strb	r2, [r3, #0]
+
+  if (dhcp_pcb_refcount == 0) {
+ 8017ed4:	4b06      	ldr	r3, [pc, #24]	; (8017ef0 <dhcp_dec_pcb_refcount+0x40>)
+ 8017ed6:	781b      	ldrb	r3, [r3, #0]
+ 8017ed8:	2b00      	cmp	r3, #0
+ 8017eda:	d107      	bne.n	8017eec <dhcp_dec_pcb_refcount+0x3c>
+    udp_remove(dhcp_pcb);
+ 8017edc:	4b08      	ldr	r3, [pc, #32]	; (8017f00 <dhcp_dec_pcb_refcount+0x50>)
+ 8017ede:	681b      	ldr	r3, [r3, #0]
+ 8017ee0:	4618      	mov	r0, r3
+ 8017ee2:	f7ff ff09 	bl	8017cf8 <udp_remove>
+    dhcp_pcb = NULL;
+ 8017ee6:	4b06      	ldr	r3, [pc, #24]	; (8017f00 <dhcp_dec_pcb_refcount+0x50>)
+ 8017ee8:	2200      	movs	r2, #0
+ 8017eea:	601a      	str	r2, [r3, #0]
+  }
+}
+ 8017eec:	bf00      	nop
+ 8017eee:	bd80      	pop	{r7, pc}
+ 8017ef0:	2000875c 	.word	0x2000875c
+ 8017ef4:	0801fac8 	.word	0x0801fac8
+ 8017ef8:	0801fb50 	.word	0x0801fb50
+ 8017efc:	0801fb28 	.word	0x0801fb28
+ 8017f00:	20008758 	.word	0x20008758
+
+08017f04 <dhcp_handle_nak>:
+ *
+ * @param netif the netif under DHCP control
+ */
+static void
+dhcp_handle_nak(struct netif *netif)
+{
+ 8017f04:	b580      	push	{r7, lr}
+ 8017f06:	b084      	sub	sp, #16
+ 8017f08:	af00      	add	r7, sp, #0
+ 8017f0a:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 8017f0c:	687b      	ldr	r3, [r7, #4]
+ 8017f0e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8017f10:	60fb      	str	r3, [r7, #12]
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n",
+              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
+  /* Change to a defined state - set this before assigning the address
+     to ensure the callback can use dhcp_supplied_address() */
+  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
+ 8017f12:	210c      	movs	r1, #12
+ 8017f14:	68f8      	ldr	r0, [r7, #12]
+ 8017f16:	f001 f869 	bl	8018fec <dhcp_set_state>
+  /* remove IP address from interface (must no longer be used, as per RFC2131) */
+  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
+ 8017f1a:	4b06      	ldr	r3, [pc, #24]	; (8017f34 <dhcp_handle_nak+0x30>)
+ 8017f1c:	4a05      	ldr	r2, [pc, #20]	; (8017f34 <dhcp_handle_nak+0x30>)
+ 8017f1e:	4905      	ldr	r1, [pc, #20]	; (8017f34 <dhcp_handle_nak+0x30>)
+ 8017f20:	6878      	ldr	r0, [r7, #4]
+ 8017f22:	f7f9 f82f 	bl	8010f84 <netif_set_addr>
+  /* We can immediately restart discovery */
+  dhcp_discover(netif);
+ 8017f26:	6878      	ldr	r0, [r7, #4]
+ 8017f28:	f000 fc5c 	bl	80187e4 <dhcp_discover>
+}
+ 8017f2c:	bf00      	nop
+ 8017f2e:	3710      	adds	r7, #16
+ 8017f30:	46bd      	mov	sp, r7
+ 8017f32:	bd80      	pop	{r7, pc}
+ 8017f34:	08022598 	.word	0x08022598
+
+08017f38 <dhcp_check>:
+ *
+ * @param netif the netif under DHCP control
+ */
+static void
+dhcp_check(struct netif *netif)
+{
+ 8017f38:	b580      	push	{r7, lr}
+ 8017f3a:	b084      	sub	sp, #16
+ 8017f3c:	af00      	add	r7, sp, #0
+ 8017f3e:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 8017f40:	687b      	ldr	r3, [r7, #4]
+ 8017f42:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8017f44:	60fb      	str	r3, [r7, #12]
+  err_t result;
+  u16_t msecs;
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0],
+              (s16_t)netif->name[1]));
+  dhcp_set_state(dhcp, DHCP_STATE_CHECKING);
+ 8017f46:	2108      	movs	r1, #8
+ 8017f48:	68f8      	ldr	r0, [r7, #12]
+ 8017f4a:	f001 f84f 	bl	8018fec <dhcp_set_state>
+  /* create an ARP query for the offered IP address, expecting that no host
+     responds, as the IP address should not be in use. */
+  result = etharp_query(netif, &dhcp->offered_ip_addr, NULL);
+ 8017f4e:	68fb      	ldr	r3, [r7, #12]
+ 8017f50:	331c      	adds	r3, #28
+ 8017f52:	2200      	movs	r2, #0
+ 8017f54:	4619      	mov	r1, r3
+ 8017f56:	6878      	ldr	r0, [r7, #4]
+ 8017f58:	f002 fb4e 	bl	801a5f8 <etharp_query>
+ 8017f5c:	4603      	mov	r3, r0
+ 8017f5e:	72fb      	strb	r3, [r7, #11]
+  if (result != ERR_OK) {
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_check: could not perform ARP query\n"));
+  }
+  if (dhcp->tries < 255) {
+ 8017f60:	68fb      	ldr	r3, [r7, #12]
+ 8017f62:	799b      	ldrb	r3, [r3, #6]
+ 8017f64:	2bff      	cmp	r3, #255	; 0xff
+ 8017f66:	d005      	beq.n	8017f74 <dhcp_check+0x3c>
+    dhcp->tries++;
+ 8017f68:	68fb      	ldr	r3, [r7, #12]
+ 8017f6a:	799b      	ldrb	r3, [r3, #6]
+ 8017f6c:	3301      	adds	r3, #1
+ 8017f6e:	b2da      	uxtb	r2, r3
+ 8017f70:	68fb      	ldr	r3, [r7, #12]
+ 8017f72:	719a      	strb	r2, [r3, #6]
+  }
+  msecs = 500;
+ 8017f74:	f44f 73fa 	mov.w	r3, #500	; 0x1f4
+ 8017f78:	813b      	strh	r3, [r7, #8]
+  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
+ 8017f7a:	893b      	ldrh	r3, [r7, #8]
+ 8017f7c:	f203 13f3 	addw	r3, r3, #499	; 0x1f3
+ 8017f80:	4a06      	ldr	r2, [pc, #24]	; (8017f9c <dhcp_check+0x64>)
+ 8017f82:	fb82 1203 	smull	r1, r2, r2, r3
+ 8017f86:	1152      	asrs	r2, r2, #5
+ 8017f88:	17db      	asrs	r3, r3, #31
+ 8017f8a:	1ad3      	subs	r3, r2, r3
+ 8017f8c:	b29a      	uxth	r2, r3
+ 8017f8e:	68fb      	ldr	r3, [r7, #12]
+ 8017f90:	811a      	strh	r2, [r3, #8]
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs));
+}
+ 8017f92:	bf00      	nop
+ 8017f94:	3710      	adds	r7, #16
+ 8017f96:	46bd      	mov	sp, r7
+ 8017f98:	bd80      	pop	{r7, pc}
+ 8017f9a:	bf00      	nop
+ 8017f9c:	10624dd3 	.word	0x10624dd3
+
+08017fa0 <dhcp_handle_offer>:
+ *
+ * @param netif the netif under DHCP control
+ */
+static void
+dhcp_handle_offer(struct netif *netif, struct dhcp_msg *msg_in)
+{
+ 8017fa0:	b580      	push	{r7, lr}
+ 8017fa2:	b084      	sub	sp, #16
+ 8017fa4:	af00      	add	r7, sp, #0
+ 8017fa6:	6078      	str	r0, [r7, #4]
+ 8017fa8:	6039      	str	r1, [r7, #0]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 8017faa:	687b      	ldr	r3, [r7, #4]
+ 8017fac:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8017fae:	60fb      	str	r3, [r7, #12]
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n",
+              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
+  /* obtain the server address */
+  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SERVER_ID)) {
+ 8017fb0:	4b0c      	ldr	r3, [pc, #48]	; (8017fe4 <dhcp_handle_offer+0x44>)
+ 8017fb2:	789b      	ldrb	r3, [r3, #2]
+ 8017fb4:	2b00      	cmp	r3, #0
+ 8017fb6:	d011      	beq.n	8017fdc <dhcp_handle_offer+0x3c>
+    dhcp->request_timeout = 0; /* stop timer */
+ 8017fb8:	68fb      	ldr	r3, [r7, #12]
+ 8017fba:	2200      	movs	r2, #0
+ 8017fbc:	811a      	strh	r2, [r3, #8]
+
+    ip_addr_set_ip4_u32(&dhcp->server_ip_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SERVER_ID)));
+ 8017fbe:	4b0a      	ldr	r3, [pc, #40]	; (8017fe8 <dhcp_handle_offer+0x48>)
+ 8017fc0:	689b      	ldr	r3, [r3, #8]
+ 8017fc2:	4618      	mov	r0, r3
+ 8017fc4:	f7f8 f949 	bl	801025a <lwip_htonl>
+ 8017fc8:	4602      	mov	r2, r0
+ 8017fca:	68fb      	ldr	r3, [r7, #12]
+ 8017fcc:	619a      	str	r2, [r3, #24]
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n",
+                ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
+    /* remember offered address */
+    ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
+ 8017fce:	683b      	ldr	r3, [r7, #0]
+ 8017fd0:	691a      	ldr	r2, [r3, #16]
+ 8017fd2:	68fb      	ldr	r3, [r7, #12]
+ 8017fd4:	61da      	str	r2, [r3, #28]
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n",
+                ip4_addr_get_u32(&dhcp->offered_ip_addr)));
+
+    dhcp_select(netif);
+ 8017fd6:	6878      	ldr	r0, [r7, #4]
+ 8017fd8:	f000 f808 	bl	8017fec <dhcp_select>
+  } else {
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
+                ("dhcp_handle_offer(netif=%p) did not get server ID!\n", (void *)netif));
+  }
+}
+ 8017fdc:	bf00      	nop
+ 8017fde:	3710      	adds	r7, #16
+ 8017fe0:	46bd      	mov	sp, r7
+ 8017fe2:	bd80      	pop	{r7, pc}
+ 8017fe4:	2000f804 	.word	0x2000f804
+ 8017fe8:	2000f80c 	.word	0x2000f80c
+
+08017fec <dhcp_select>:
+ * @param netif the netif under DHCP control
+ * @return lwIP specific error (see error.h)
+ */
+static err_t
+dhcp_select(struct netif *netif)
+{
+ 8017fec:	b5b0      	push	{r4, r5, r7, lr}
+ 8017fee:	b08a      	sub	sp, #40	; 0x28
+ 8017ff0:	af02      	add	r7, sp, #8
+ 8017ff2:	6078      	str	r0, [r7, #4]
+  u16_t msecs;
+  u8_t i;
+  struct pbuf *p_out;
+  u16_t options_out_len;
+
+  LWIP_ERROR("dhcp_select: netif != NULL", (netif != NULL), return ERR_ARG;);
+ 8017ff4:	687b      	ldr	r3, [r7, #4]
+ 8017ff6:	2b00      	cmp	r3, #0
+ 8017ff8:	d109      	bne.n	801800e <dhcp_select+0x22>
+ 8017ffa:	4b71      	ldr	r3, [pc, #452]	; (80181c0 <dhcp_select+0x1d4>)
+ 8017ffc:	f240 1277 	movw	r2, #375	; 0x177
+ 8018000:	4970      	ldr	r1, [pc, #448]	; (80181c4 <dhcp_select+0x1d8>)
+ 8018002:	4871      	ldr	r0, [pc, #452]	; (80181c8 <dhcp_select+0x1dc>)
+ 8018004:	f004 f9f8 	bl	801c3f8 <iprintf>
+ 8018008:	f06f 030f 	mvn.w	r3, #15
+ 801800c:	e0d3      	b.n	80181b6 <dhcp_select+0x1ca>
+  dhcp = netif_dhcp_data(netif);
+ 801800e:	687b      	ldr	r3, [r7, #4]
+ 8018010:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8018012:	61bb      	str	r3, [r7, #24]
+  LWIP_ERROR("dhcp_select: dhcp != NULL", (dhcp != NULL), return ERR_VAL;);
+ 8018014:	69bb      	ldr	r3, [r7, #24]
+ 8018016:	2b00      	cmp	r3, #0
+ 8018018:	d109      	bne.n	801802e <dhcp_select+0x42>
+ 801801a:	4b69      	ldr	r3, [pc, #420]	; (80181c0 <dhcp_select+0x1d4>)
+ 801801c:	f240 1279 	movw	r2, #377	; 0x179
+ 8018020:	496a      	ldr	r1, [pc, #424]	; (80181cc <dhcp_select+0x1e0>)
+ 8018022:	4869      	ldr	r0, [pc, #420]	; (80181c8 <dhcp_select+0x1dc>)
+ 8018024:	f004 f9e8 	bl	801c3f8 <iprintf>
+ 8018028:	f06f 0305 	mvn.w	r3, #5
+ 801802c:	e0c3      	b.n	80181b6 <dhcp_select+0x1ca>
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
+  dhcp_set_state(dhcp, DHCP_STATE_REQUESTING);
+ 801802e:	2101      	movs	r1, #1
+ 8018030:	69b8      	ldr	r0, [r7, #24]
+ 8018032:	f000 ffdb 	bl	8018fec <dhcp_set_state>
+
+  /* create and initialize the DHCP message header */
+  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
+ 8018036:	f107 030c 	add.w	r3, r7, #12
+ 801803a:	2203      	movs	r2, #3
+ 801803c:	69b9      	ldr	r1, [r7, #24]
+ 801803e:	6878      	ldr	r0, [r7, #4]
+ 8018040:	f001 fc5e 	bl	8019900 <dhcp_create_msg>
+ 8018044:	6178      	str	r0, [r7, #20]
+  if (p_out != NULL) {
+ 8018046:	697b      	ldr	r3, [r7, #20]
+ 8018048:	2b00      	cmp	r3, #0
+ 801804a:	f000 8085 	beq.w	8018158 <dhcp_select+0x16c>
+    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
+ 801804e:	697b      	ldr	r3, [r7, #20]
+ 8018050:	685b      	ldr	r3, [r3, #4]
+ 8018052:	613b      	str	r3, [r7, #16]
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
+ 8018054:	89b8      	ldrh	r0, [r7, #12]
+ 8018056:	693b      	ldr	r3, [r7, #16]
+ 8018058:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 801805c:	2302      	movs	r3, #2
+ 801805e:	2239      	movs	r2, #57	; 0x39
+ 8018060:	f000 ffde 	bl	8019020 <dhcp_option>
+ 8018064:	4603      	mov	r3, r0
+ 8018066:	81bb      	strh	r3, [r7, #12]
+    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
+ 8018068:	89b8      	ldrh	r0, [r7, #12]
+ 801806a:	693b      	ldr	r3, [r7, #16]
+ 801806c:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018070:	687b      	ldr	r3, [r7, #4]
+ 8018072:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8018074:	461a      	mov	r2, r3
+ 8018076:	f001 f82d 	bl	80190d4 <dhcp_option_short>
+ 801807a:	4603      	mov	r3, r0
+ 801807c:	81bb      	strh	r3, [r7, #12]
+
+    /* MUST request the offered IP address */
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
+ 801807e:	89b8      	ldrh	r0, [r7, #12]
+ 8018080:	693b      	ldr	r3, [r7, #16]
+ 8018082:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018086:	2304      	movs	r3, #4
+ 8018088:	2232      	movs	r2, #50	; 0x32
+ 801808a:	f000 ffc9 	bl	8019020 <dhcp_option>
+ 801808e:	4603      	mov	r3, r0
+ 8018090:	81bb      	strh	r3, [r7, #12]
+    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
+ 8018092:	89bc      	ldrh	r4, [r7, #12]
+ 8018094:	693b      	ldr	r3, [r7, #16]
+ 8018096:	f103 05f0 	add.w	r5, r3, #240	; 0xf0
+ 801809a:	69bb      	ldr	r3, [r7, #24]
+ 801809c:	69db      	ldr	r3, [r3, #28]
+ 801809e:	4618      	mov	r0, r3
+ 80180a0:	f7f8 f8db 	bl	801025a <lwip_htonl>
+ 80180a4:	4603      	mov	r3, r0
+ 80180a6:	461a      	mov	r2, r3
+ 80180a8:	4629      	mov	r1, r5
+ 80180aa:	4620      	mov	r0, r4
+ 80180ac:	f001 f844 	bl	8019138 <dhcp_option_long>
+ 80180b0:	4603      	mov	r3, r0
+ 80180b2:	81bb      	strh	r3, [r7, #12]
+
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
+ 80180b4:	89b8      	ldrh	r0, [r7, #12]
+ 80180b6:	693b      	ldr	r3, [r7, #16]
+ 80180b8:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 80180bc:	2304      	movs	r3, #4
+ 80180be:	2236      	movs	r2, #54	; 0x36
+ 80180c0:	f000 ffae 	bl	8019020 <dhcp_option>
+ 80180c4:	4603      	mov	r3, r0
+ 80180c6:	81bb      	strh	r3, [r7, #12]
+    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
+ 80180c8:	89bc      	ldrh	r4, [r7, #12]
+ 80180ca:	693b      	ldr	r3, [r7, #16]
+ 80180cc:	f103 05f0 	add.w	r5, r3, #240	; 0xf0
+ 80180d0:	69bb      	ldr	r3, [r7, #24]
+ 80180d2:	699b      	ldr	r3, [r3, #24]
+ 80180d4:	4618      	mov	r0, r3
+ 80180d6:	f7f8 f8c0 	bl	801025a <lwip_htonl>
+ 80180da:	4603      	mov	r3, r0
+ 80180dc:	461a      	mov	r2, r3
+ 80180de:	4629      	mov	r1, r5
+ 80180e0:	4620      	mov	r0, r4
+ 80180e2:	f001 f829 	bl	8019138 <dhcp_option_long>
+ 80180e6:	4603      	mov	r3, r0
+ 80180e8:	81bb      	strh	r3, [r7, #12]
+
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
+ 80180ea:	89b8      	ldrh	r0, [r7, #12]
+ 80180ec:	693b      	ldr	r3, [r7, #16]
+ 80180ee:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 80180f2:	2303      	movs	r3, #3
+ 80180f4:	2237      	movs	r2, #55	; 0x37
+ 80180f6:	f000 ff93 	bl	8019020 <dhcp_option>
+ 80180fa:	4603      	mov	r3, r0
+ 80180fc:	81bb      	strh	r3, [r7, #12]
+    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
+ 80180fe:	2300      	movs	r3, #0
+ 8018100:	77bb      	strb	r3, [r7, #30]
+ 8018102:	e00e      	b.n	8018122 <dhcp_select+0x136>
+      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
+ 8018104:	89b8      	ldrh	r0, [r7, #12]
+ 8018106:	693b      	ldr	r3, [r7, #16]
+ 8018108:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 801810c:	7fbb      	ldrb	r3, [r7, #30]
+ 801810e:	4a30      	ldr	r2, [pc, #192]	; (80181d0 <dhcp_select+0x1e4>)
+ 8018110:	5cd3      	ldrb	r3, [r2, r3]
+ 8018112:	461a      	mov	r2, r3
+ 8018114:	f000 ffb8 	bl	8019088 <dhcp_option_byte>
+ 8018118:	4603      	mov	r3, r0
+ 801811a:	81bb      	strh	r3, [r7, #12]
+    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
+ 801811c:	7fbb      	ldrb	r3, [r7, #30]
+ 801811e:	3301      	adds	r3, #1
+ 8018120:	77bb      	strb	r3, [r7, #30]
+ 8018122:	7fbb      	ldrb	r3, [r7, #30]
+ 8018124:	2b02      	cmp	r3, #2
+ 8018126:	d9ed      	bls.n	8018104 <dhcp_select+0x118>
+#if LWIP_NETIF_HOSTNAME
+    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
+#endif /* LWIP_NETIF_HOSTNAME */
+
+    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REQUESTING, msg_out, DHCP_REQUEST, &options_out_len);
+    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
+ 8018128:	89b8      	ldrh	r0, [r7, #12]
+ 801812a:	693b      	ldr	r3, [r7, #16]
+ 801812c:	33f0      	adds	r3, #240	; 0xf0
+ 801812e:	697a      	ldr	r2, [r7, #20]
+ 8018130:	4619      	mov	r1, r3
+ 8018132:	f001 fcbb 	bl	8019aac <dhcp_option_trailer>
+
+    /* send broadcast to any DHCP server */
+    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
+ 8018136:	4b27      	ldr	r3, [pc, #156]	; (80181d4 <dhcp_select+0x1e8>)
+ 8018138:	6818      	ldr	r0, [r3, #0]
+ 801813a:	4b27      	ldr	r3, [pc, #156]	; (80181d8 <dhcp_select+0x1ec>)
+ 801813c:	9301      	str	r3, [sp, #4]
+ 801813e:	687b      	ldr	r3, [r7, #4]
+ 8018140:	9300      	str	r3, [sp, #0]
+ 8018142:	2343      	movs	r3, #67	; 0x43
+ 8018144:	4a25      	ldr	r2, [pc, #148]	; (80181dc <dhcp_select+0x1f0>)
+ 8018146:	6979      	ldr	r1, [r7, #20]
+ 8018148:	f7ff fbda 	bl	8017900 <udp_sendto_if_src>
+ 801814c:	4603      	mov	r3, r0
+ 801814e:	77fb      	strb	r3, [r7, #31]
+    pbuf_free(p_out);
+ 8018150:	6978      	ldr	r0, [r7, #20]
+ 8018152:	f7f9 fc21 	bl	8011998 <pbuf_free>
+ 8018156:	e001      	b.n	801815c <dhcp_select+0x170>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_select: REQUESTING\n"));
+  } else {
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_select: could not allocate DHCP request\n"));
+    result = ERR_MEM;
+ 8018158:	23ff      	movs	r3, #255	; 0xff
+ 801815a:	77fb      	strb	r3, [r7, #31]
+  }
+  if (dhcp->tries < 255) {
+ 801815c:	69bb      	ldr	r3, [r7, #24]
+ 801815e:	799b      	ldrb	r3, [r3, #6]
+ 8018160:	2bff      	cmp	r3, #255	; 0xff
+ 8018162:	d005      	beq.n	8018170 <dhcp_select+0x184>
+    dhcp->tries++;
+ 8018164:	69bb      	ldr	r3, [r7, #24]
+ 8018166:	799b      	ldrb	r3, [r3, #6]
+ 8018168:	3301      	adds	r3, #1
+ 801816a:	b2da      	uxtb	r2, r3
+ 801816c:	69bb      	ldr	r3, [r7, #24]
+ 801816e:	719a      	strb	r2, [r3, #6]
+  }
+  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
+ 8018170:	69bb      	ldr	r3, [r7, #24]
+ 8018172:	799b      	ldrb	r3, [r3, #6]
+ 8018174:	2b05      	cmp	r3, #5
+ 8018176:	d80d      	bhi.n	8018194 <dhcp_select+0x1a8>
+ 8018178:	69bb      	ldr	r3, [r7, #24]
+ 801817a:	799b      	ldrb	r3, [r3, #6]
+ 801817c:	461a      	mov	r2, r3
+ 801817e:	2301      	movs	r3, #1
+ 8018180:	4093      	lsls	r3, r2
+ 8018182:	b29b      	uxth	r3, r3
+ 8018184:	461a      	mov	r2, r3
+ 8018186:	0152      	lsls	r2, r2, #5
+ 8018188:	1ad2      	subs	r2, r2, r3
+ 801818a:	0092      	lsls	r2, r2, #2
+ 801818c:	4413      	add	r3, r2
+ 801818e:	00db      	lsls	r3, r3, #3
+ 8018190:	b29b      	uxth	r3, r3
+ 8018192:	e001      	b.n	8018198 <dhcp_select+0x1ac>
+ 8018194:	f64e 2360 	movw	r3, #60000	; 0xea60
+ 8018198:	81fb      	strh	r3, [r7, #14]
+  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
+ 801819a:	89fb      	ldrh	r3, [r7, #14]
+ 801819c:	f203 13f3 	addw	r3, r3, #499	; 0x1f3
+ 80181a0:	4a0f      	ldr	r2, [pc, #60]	; (80181e0 <dhcp_select+0x1f4>)
+ 80181a2:	fb82 1203 	smull	r1, r2, r2, r3
+ 80181a6:	1152      	asrs	r2, r2, #5
+ 80181a8:	17db      	asrs	r3, r3, #31
+ 80181aa:	1ad3      	subs	r3, r2, r3
+ 80181ac:	b29a      	uxth	r2, r3
+ 80181ae:	69bb      	ldr	r3, [r7, #24]
+ 80181b0:	811a      	strh	r2, [r3, #8]
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_select(): set request timeout %"U16_F" msecs\n", msecs));
+  return result;
+ 80181b2:	f997 301f 	ldrsb.w	r3, [r7, #31]
+}
+ 80181b6:	4618      	mov	r0, r3
+ 80181b8:	3720      	adds	r7, #32
+ 80181ba:	46bd      	mov	sp, r7
+ 80181bc:	bdb0      	pop	{r4, r5, r7, pc}
+ 80181be:	bf00      	nop
+ 80181c0:	0801fac8 	.word	0x0801fac8
+ 80181c4:	0801fb74 	.word	0x0801fb74
+ 80181c8:	0801fb28 	.word	0x0801fb28
+ 80181cc:	0801fb90 	.word	0x0801fb90
+ 80181d0:	2000006c 	.word	0x2000006c
+ 80181d4:	20008758 	.word	0x20008758
+ 80181d8:	08022598 	.word	0x08022598
+ 80181dc:	0802259c 	.word	0x0802259c
+ 80181e0:	10624dd3 	.word	0x10624dd3
+
+080181e4 <dhcp_coarse_tmr>:
+ * The DHCP timer that checks for lease renewal/rebind timeouts.
+ * Must be called once a minute (see @ref DHCP_COARSE_TIMER_SECS).
+ */
+void
+dhcp_coarse_tmr(void)
+{
+ 80181e4:	b580      	push	{r7, lr}
+ 80181e6:	b082      	sub	sp, #8
+ 80181e8:	af00      	add	r7, sp, #0
+  struct netif *netif;
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_coarse_tmr()\n"));
+  /* iterate through all network interfaces */
+  NETIF_FOREACH(netif) {
+ 80181ea:	4b27      	ldr	r3, [pc, #156]	; (8018288 <dhcp_coarse_tmr+0xa4>)
+ 80181ec:	681b      	ldr	r3, [r3, #0]
+ 80181ee:	607b      	str	r3, [r7, #4]
+ 80181f0:	e042      	b.n	8018278 <dhcp_coarse_tmr+0x94>
+    /* only act on DHCP configured interfaces */
+    struct dhcp *dhcp = netif_dhcp_data(netif);
+ 80181f2:	687b      	ldr	r3, [r7, #4]
+ 80181f4:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80181f6:	603b      	str	r3, [r7, #0]
+    if ((dhcp != NULL) && (dhcp->state != DHCP_STATE_OFF)) {
+ 80181f8:	683b      	ldr	r3, [r7, #0]
+ 80181fa:	2b00      	cmp	r3, #0
+ 80181fc:	d039      	beq.n	8018272 <dhcp_coarse_tmr+0x8e>
+ 80181fe:	683b      	ldr	r3, [r7, #0]
+ 8018200:	795b      	ldrb	r3, [r3, #5]
+ 8018202:	2b00      	cmp	r3, #0
+ 8018204:	d035      	beq.n	8018272 <dhcp_coarse_tmr+0x8e>
+      /* compare lease time to expire timeout */
+      if (dhcp->t0_timeout && (++dhcp->lease_used == dhcp->t0_timeout)) {
+ 8018206:	683b      	ldr	r3, [r7, #0]
+ 8018208:	8a9b      	ldrh	r3, [r3, #20]
+ 801820a:	2b00      	cmp	r3, #0
+ 801820c:	d012      	beq.n	8018234 <dhcp_coarse_tmr+0x50>
+ 801820e:	683b      	ldr	r3, [r7, #0]
+ 8018210:	8a5b      	ldrh	r3, [r3, #18]
+ 8018212:	3301      	adds	r3, #1
+ 8018214:	b29a      	uxth	r2, r3
+ 8018216:	683b      	ldr	r3, [r7, #0]
+ 8018218:	825a      	strh	r2, [r3, #18]
+ 801821a:	683b      	ldr	r3, [r7, #0]
+ 801821c:	8a5a      	ldrh	r2, [r3, #18]
+ 801821e:	683b      	ldr	r3, [r7, #0]
+ 8018220:	8a9b      	ldrh	r3, [r3, #20]
+ 8018222:	429a      	cmp	r2, r3
+ 8018224:	d106      	bne.n	8018234 <dhcp_coarse_tmr+0x50>
+        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t0 timeout\n"));
+        /* this clients' lease time has expired */
+        dhcp_release_and_stop(netif);
+ 8018226:	6878      	ldr	r0, [r7, #4]
+ 8018228:	f000 fe46 	bl	8018eb8 <dhcp_release_and_stop>
+        dhcp_start(netif);
+ 801822c:	6878      	ldr	r0, [r7, #4]
+ 801822e:	f000 f96b 	bl	8018508 <dhcp_start>
+ 8018232:	e01e      	b.n	8018272 <dhcp_coarse_tmr+0x8e>
+        /* timer is active (non zero), and triggers (zeroes) now? */
+      } else if (dhcp->t2_rebind_time && (dhcp->t2_rebind_time-- == 1)) {
+ 8018234:	683b      	ldr	r3, [r7, #0]
+ 8018236:	8a1b      	ldrh	r3, [r3, #16]
+ 8018238:	2b00      	cmp	r3, #0
+ 801823a:	d00b      	beq.n	8018254 <dhcp_coarse_tmr+0x70>
+ 801823c:	683b      	ldr	r3, [r7, #0]
+ 801823e:	8a1b      	ldrh	r3, [r3, #16]
+ 8018240:	1e5a      	subs	r2, r3, #1
+ 8018242:	b291      	uxth	r1, r2
+ 8018244:	683a      	ldr	r2, [r7, #0]
+ 8018246:	8211      	strh	r1, [r2, #16]
+ 8018248:	2b01      	cmp	r3, #1
+ 801824a:	d103      	bne.n	8018254 <dhcp_coarse_tmr+0x70>
+        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n"));
+        /* this clients' rebind timeout triggered */
+        dhcp_t2_timeout(netif);
+ 801824c:	6878      	ldr	r0, [r7, #4]
+ 801824e:	f000 f8c7 	bl	80183e0 <dhcp_t2_timeout>
+ 8018252:	e00e      	b.n	8018272 <dhcp_coarse_tmr+0x8e>
+        /* timer is active (non zero), and triggers (zeroes) now */
+      } else if (dhcp->t1_renew_time && (dhcp->t1_renew_time-- == 1)) {
+ 8018254:	683b      	ldr	r3, [r7, #0]
+ 8018256:	89db      	ldrh	r3, [r3, #14]
+ 8018258:	2b00      	cmp	r3, #0
+ 801825a:	d00a      	beq.n	8018272 <dhcp_coarse_tmr+0x8e>
+ 801825c:	683b      	ldr	r3, [r7, #0]
+ 801825e:	89db      	ldrh	r3, [r3, #14]
+ 8018260:	1e5a      	subs	r2, r3, #1
+ 8018262:	b291      	uxth	r1, r2
+ 8018264:	683a      	ldr	r2, [r7, #0]
+ 8018266:	81d1      	strh	r1, [r2, #14]
+ 8018268:	2b01      	cmp	r3, #1
+ 801826a:	d102      	bne.n	8018272 <dhcp_coarse_tmr+0x8e>
+        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n"));
+        /* this clients' renewal timeout triggered */
+        dhcp_t1_timeout(netif);
+ 801826c:	6878      	ldr	r0, [r7, #4]
+ 801826e:	f000 f888 	bl	8018382 <dhcp_t1_timeout>
+  NETIF_FOREACH(netif) {
+ 8018272:	687b      	ldr	r3, [r7, #4]
+ 8018274:	681b      	ldr	r3, [r3, #0]
+ 8018276:	607b      	str	r3, [r7, #4]
+ 8018278:	687b      	ldr	r3, [r7, #4]
+ 801827a:	2b00      	cmp	r3, #0
+ 801827c:	d1b9      	bne.n	80181f2 <dhcp_coarse_tmr+0xe>
+      }
+    }
+  }
+}
+ 801827e:	bf00      	nop
+ 8018280:	3708      	adds	r7, #8
+ 8018282:	46bd      	mov	sp, r7
+ 8018284:	bd80      	pop	{r7, pc}
+ 8018286:	bf00      	nop
+ 8018288:	2000f7d8 	.word	0x2000f7d8
+
+0801828c <dhcp_fine_tmr>:
+ * A DHCP server is expected to respond within a short period of time.
+ * This timer checks whether an outstanding DHCP request is timed out.
+ */
+void
+dhcp_fine_tmr(void)
+{
+ 801828c:	b580      	push	{r7, lr}
+ 801828e:	b082      	sub	sp, #8
+ 8018290:	af00      	add	r7, sp, #0
+  struct netif *netif;
+  /* loop through netif's */
+  NETIF_FOREACH(netif) {
+ 8018292:	4b16      	ldr	r3, [pc, #88]	; (80182ec <dhcp_fine_tmr+0x60>)
+ 8018294:	681b      	ldr	r3, [r3, #0]
+ 8018296:	607b      	str	r3, [r7, #4]
+ 8018298:	e020      	b.n	80182dc <dhcp_fine_tmr+0x50>
+    struct dhcp *dhcp = netif_dhcp_data(netif);
+ 801829a:	687b      	ldr	r3, [r7, #4]
+ 801829c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 801829e:	603b      	str	r3, [r7, #0]
+    /* only act on DHCP configured interfaces */
+    if (dhcp != NULL) {
+ 80182a0:	683b      	ldr	r3, [r7, #0]
+ 80182a2:	2b00      	cmp	r3, #0
+ 80182a4:	d017      	beq.n	80182d6 <dhcp_fine_tmr+0x4a>
+      /* timer is active (non zero), and is about to trigger now */
+      if (dhcp->request_timeout > 1) {
+ 80182a6:	683b      	ldr	r3, [r7, #0]
+ 80182a8:	891b      	ldrh	r3, [r3, #8]
+ 80182aa:	2b01      	cmp	r3, #1
+ 80182ac:	d906      	bls.n	80182bc <dhcp_fine_tmr+0x30>
+        dhcp->request_timeout--;
+ 80182ae:	683b      	ldr	r3, [r7, #0]
+ 80182b0:	891b      	ldrh	r3, [r3, #8]
+ 80182b2:	3b01      	subs	r3, #1
+ 80182b4:	b29a      	uxth	r2, r3
+ 80182b6:	683b      	ldr	r3, [r7, #0]
+ 80182b8:	811a      	strh	r2, [r3, #8]
+ 80182ba:	e00c      	b.n	80182d6 <dhcp_fine_tmr+0x4a>
+      } else if (dhcp->request_timeout == 1) {
+ 80182bc:	683b      	ldr	r3, [r7, #0]
+ 80182be:	891b      	ldrh	r3, [r3, #8]
+ 80182c0:	2b01      	cmp	r3, #1
+ 80182c2:	d108      	bne.n	80182d6 <dhcp_fine_tmr+0x4a>
+        dhcp->request_timeout--;
+ 80182c4:	683b      	ldr	r3, [r7, #0]
+ 80182c6:	891b      	ldrh	r3, [r3, #8]
+ 80182c8:	3b01      	subs	r3, #1
+ 80182ca:	b29a      	uxth	r2, r3
+ 80182cc:	683b      	ldr	r3, [r7, #0]
+ 80182ce:	811a      	strh	r2, [r3, #8]
+        /* { dhcp->request_timeout == 0 } */
+        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_fine_tmr(): request timeout\n"));
+        /* this client's request timeout triggered */
+        dhcp_timeout(netif);
+ 80182d0:	6878      	ldr	r0, [r7, #4]
+ 80182d2:	f000 f80d 	bl	80182f0 <dhcp_timeout>
+  NETIF_FOREACH(netif) {
+ 80182d6:	687b      	ldr	r3, [r7, #4]
+ 80182d8:	681b      	ldr	r3, [r3, #0]
+ 80182da:	607b      	str	r3, [r7, #4]
+ 80182dc:	687b      	ldr	r3, [r7, #4]
+ 80182de:	2b00      	cmp	r3, #0
+ 80182e0:	d1db      	bne.n	801829a <dhcp_fine_tmr+0xe>
+      }
+    }
+  }
+}
+ 80182e2:	bf00      	nop
+ 80182e4:	3708      	adds	r7, #8
+ 80182e6:	46bd      	mov	sp, r7
+ 80182e8:	bd80      	pop	{r7, pc}
+ 80182ea:	bf00      	nop
+ 80182ec:	2000f7d8 	.word	0x2000f7d8
+
+080182f0 <dhcp_timeout>:
+ *
+ * @param netif the netif under DHCP control
+ */
+static void
+dhcp_timeout(struct netif *netif)
+{
+ 80182f0:	b580      	push	{r7, lr}
+ 80182f2:	b084      	sub	sp, #16
+ 80182f4:	af00      	add	r7, sp, #0
+ 80182f6:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 80182f8:	687b      	ldr	r3, [r7, #4]
+ 80182fa:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80182fc:	60fb      	str	r3, [r7, #12]
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout()\n"));
+  /* back-off period has passed, or server selection timed out */
+  if ((dhcp->state == DHCP_STATE_BACKING_OFF) || (dhcp->state == DHCP_STATE_SELECTING)) {
+ 80182fe:	68fb      	ldr	r3, [r7, #12]
+ 8018300:	795b      	ldrb	r3, [r3, #5]
+ 8018302:	2b0c      	cmp	r3, #12
+ 8018304:	d003      	beq.n	801830e <dhcp_timeout+0x1e>
+ 8018306:	68fb      	ldr	r3, [r7, #12]
+ 8018308:	795b      	ldrb	r3, [r3, #5]
+ 801830a:	2b06      	cmp	r3, #6
+ 801830c:	d103      	bne.n	8018316 <dhcp_timeout+0x26>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout(): restarting discovery\n"));
+    dhcp_discover(netif);
+ 801830e:	6878      	ldr	r0, [r7, #4]
+ 8018310:	f000 fa68 	bl	80187e4 <dhcp_discover>
+      dhcp_reboot(netif);
+    } else {
+      dhcp_discover(netif);
+    }
+  }
+}
+ 8018314:	e031      	b.n	801837a <dhcp_timeout+0x8a>
+  } else if (dhcp->state == DHCP_STATE_REQUESTING) {
+ 8018316:	68fb      	ldr	r3, [r7, #12]
+ 8018318:	795b      	ldrb	r3, [r3, #5]
+ 801831a:	2b01      	cmp	r3, #1
+ 801831c:	d10e      	bne.n	801833c <dhcp_timeout+0x4c>
+    if (dhcp->tries <= 5) {
+ 801831e:	68fb      	ldr	r3, [r7, #12]
+ 8018320:	799b      	ldrb	r3, [r3, #6]
+ 8018322:	2b05      	cmp	r3, #5
+ 8018324:	d803      	bhi.n	801832e <dhcp_timeout+0x3e>
+      dhcp_select(netif);
+ 8018326:	6878      	ldr	r0, [r7, #4]
+ 8018328:	f7ff fe60 	bl	8017fec <dhcp_select>
+}
+ 801832c:	e025      	b.n	801837a <dhcp_timeout+0x8a>
+      dhcp_release_and_stop(netif);
+ 801832e:	6878      	ldr	r0, [r7, #4]
+ 8018330:	f000 fdc2 	bl	8018eb8 <dhcp_release_and_stop>
+      dhcp_start(netif);
+ 8018334:	6878      	ldr	r0, [r7, #4]
+ 8018336:	f000 f8e7 	bl	8018508 <dhcp_start>
+}
+ 801833a:	e01e      	b.n	801837a <dhcp_timeout+0x8a>
+  } else if (dhcp->state == DHCP_STATE_CHECKING) {
+ 801833c:	68fb      	ldr	r3, [r7, #12]
+ 801833e:	795b      	ldrb	r3, [r3, #5]
+ 8018340:	2b08      	cmp	r3, #8
+ 8018342:	d10b      	bne.n	801835c <dhcp_timeout+0x6c>
+    if (dhcp->tries <= 1) {
+ 8018344:	68fb      	ldr	r3, [r7, #12]
+ 8018346:	799b      	ldrb	r3, [r3, #6]
+ 8018348:	2b01      	cmp	r3, #1
+ 801834a:	d803      	bhi.n	8018354 <dhcp_timeout+0x64>
+      dhcp_check(netif);
+ 801834c:	6878      	ldr	r0, [r7, #4]
+ 801834e:	f7ff fdf3 	bl	8017f38 <dhcp_check>
+}
+ 8018352:	e012      	b.n	801837a <dhcp_timeout+0x8a>
+      dhcp_bind(netif);
+ 8018354:	6878      	ldr	r0, [r7, #4]
+ 8018356:	f000 fae7 	bl	8018928 <dhcp_bind>
+}
+ 801835a:	e00e      	b.n	801837a <dhcp_timeout+0x8a>
+  } else if (dhcp->state == DHCP_STATE_REBOOTING) {
+ 801835c:	68fb      	ldr	r3, [r7, #12]
+ 801835e:	795b      	ldrb	r3, [r3, #5]
+ 8018360:	2b03      	cmp	r3, #3
+ 8018362:	d10a      	bne.n	801837a <dhcp_timeout+0x8a>
+    if (dhcp->tries < REBOOT_TRIES) {
+ 8018364:	68fb      	ldr	r3, [r7, #12]
+ 8018366:	799b      	ldrb	r3, [r3, #6]
+ 8018368:	2b01      	cmp	r3, #1
+ 801836a:	d803      	bhi.n	8018374 <dhcp_timeout+0x84>
+      dhcp_reboot(netif);
+ 801836c:	6878      	ldr	r0, [r7, #4]
+ 801836e:	f000 fced 	bl	8018d4c <dhcp_reboot>
+}
+ 8018372:	e002      	b.n	801837a <dhcp_timeout+0x8a>
+      dhcp_discover(netif);
+ 8018374:	6878      	ldr	r0, [r7, #4]
+ 8018376:	f000 fa35 	bl	80187e4 <dhcp_discover>
+}
+ 801837a:	bf00      	nop
+ 801837c:	3710      	adds	r7, #16
+ 801837e:	46bd      	mov	sp, r7
+ 8018380:	bd80      	pop	{r7, pc}
+
+08018382 <dhcp_t1_timeout>:
+ *
+ * @param netif the netif under DHCP control
+ */
+static void
+dhcp_t1_timeout(struct netif *netif)
+{
+ 8018382:	b580      	push	{r7, lr}
+ 8018384:	b084      	sub	sp, #16
+ 8018386:	af00      	add	r7, sp, #0
+ 8018388:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 801838a:	687b      	ldr	r3, [r7, #4]
+ 801838c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 801838e:	60fb      	str	r3, [r7, #12]
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_t1_timeout()\n"));
+  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
+ 8018390:	68fb      	ldr	r3, [r7, #12]
+ 8018392:	795b      	ldrb	r3, [r3, #5]
+ 8018394:	2b01      	cmp	r3, #1
+ 8018396:	d007      	beq.n	80183a8 <dhcp_t1_timeout+0x26>
+ 8018398:	68fb      	ldr	r3, [r7, #12]
+ 801839a:	795b      	ldrb	r3, [r3, #5]
+ 801839c:	2b0a      	cmp	r3, #10
+ 801839e:	d003      	beq.n	80183a8 <dhcp_t1_timeout+0x26>
+      (dhcp->state == DHCP_STATE_RENEWING)) {
+ 80183a0:	68fb      	ldr	r3, [r7, #12]
+ 80183a2:	795b      	ldrb	r3, [r3, #5]
+  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
+ 80183a4:	2b05      	cmp	r3, #5
+ 80183a6:	d117      	bne.n	80183d8 <dhcp_t1_timeout+0x56>
+     * eventually time-out if renew tries fail. */
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
+                ("dhcp_t1_timeout(): must renew\n"));
+    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
+       DHCP_STATE_RENEWING, not DHCP_STATE_BOUND */
+    dhcp_renew(netif);
+ 80183a8:	6878      	ldr	r0, [r7, #4]
+ 80183aa:	f000 fb97 	bl	8018adc <dhcp_renew>
+    /* Calculate next timeout */
+    if (((dhcp->t2_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
+ 80183ae:	68fb      	ldr	r3, [r7, #12]
+ 80183b0:	899b      	ldrh	r3, [r3, #12]
+ 80183b2:	461a      	mov	r2, r3
+ 80183b4:	68fb      	ldr	r3, [r7, #12]
+ 80183b6:	8a5b      	ldrh	r3, [r3, #18]
+ 80183b8:	1ad3      	subs	r3, r2, r3
+ 80183ba:	2b01      	cmp	r3, #1
+ 80183bc:	dd0c      	ble.n	80183d8 <dhcp_t1_timeout+0x56>
+      dhcp->t1_renew_time = (u16_t)((dhcp->t2_timeout - dhcp->lease_used) / 2);
+ 80183be:	68fb      	ldr	r3, [r7, #12]
+ 80183c0:	899b      	ldrh	r3, [r3, #12]
+ 80183c2:	461a      	mov	r2, r3
+ 80183c4:	68fb      	ldr	r3, [r7, #12]
+ 80183c6:	8a5b      	ldrh	r3, [r3, #18]
+ 80183c8:	1ad3      	subs	r3, r2, r3
+ 80183ca:	2b00      	cmp	r3, #0
+ 80183cc:	da00      	bge.n	80183d0 <dhcp_t1_timeout+0x4e>
+ 80183ce:	3301      	adds	r3, #1
+ 80183d0:	105b      	asrs	r3, r3, #1
+ 80183d2:	b29a      	uxth	r2, r3
+ 80183d4:	68fb      	ldr	r3, [r7, #12]
+ 80183d6:	81da      	strh	r2, [r3, #14]
+    }
+  }
+}
+ 80183d8:	bf00      	nop
+ 80183da:	3710      	adds	r7, #16
+ 80183dc:	46bd      	mov	sp, r7
+ 80183de:	bd80      	pop	{r7, pc}
+
+080183e0 <dhcp_t2_timeout>:
+ *
+ * @param netif the netif under DHCP control
+ */
+static void
+dhcp_t2_timeout(struct netif *netif)
+{
+ 80183e0:	b580      	push	{r7, lr}
+ 80183e2:	b084      	sub	sp, #16
+ 80183e4:	af00      	add	r7, sp, #0
+ 80183e6:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 80183e8:	687b      	ldr	r3, [r7, #4]
+ 80183ea:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80183ec:	60fb      	str	r3, [r7, #12]
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout()\n"));
+  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
+ 80183ee:	68fb      	ldr	r3, [r7, #12]
+ 80183f0:	795b      	ldrb	r3, [r3, #5]
+ 80183f2:	2b01      	cmp	r3, #1
+ 80183f4:	d00b      	beq.n	801840e <dhcp_t2_timeout+0x2e>
+ 80183f6:	68fb      	ldr	r3, [r7, #12]
+ 80183f8:	795b      	ldrb	r3, [r3, #5]
+ 80183fa:	2b0a      	cmp	r3, #10
+ 80183fc:	d007      	beq.n	801840e <dhcp_t2_timeout+0x2e>
+      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
+ 80183fe:	68fb      	ldr	r3, [r7, #12]
+ 8018400:	795b      	ldrb	r3, [r3, #5]
+  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
+ 8018402:	2b05      	cmp	r3, #5
+ 8018404:	d003      	beq.n	801840e <dhcp_t2_timeout+0x2e>
+      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
+ 8018406:	68fb      	ldr	r3, [r7, #12]
+ 8018408:	795b      	ldrb	r3, [r3, #5]
+ 801840a:	2b04      	cmp	r3, #4
+ 801840c:	d117      	bne.n	801843e <dhcp_t2_timeout+0x5e>
+    /* just retry to rebind */
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
+                ("dhcp_t2_timeout(): must rebind\n"));
+    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
+       DHCP_STATE_REBINDING, not DHCP_STATE_BOUND */
+    dhcp_rebind(netif);
+ 801840e:	6878      	ldr	r0, [r7, #4]
+ 8018410:	f000 fc00 	bl	8018c14 <dhcp_rebind>
+    /* Calculate next timeout */
+    if (((dhcp->t0_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
+ 8018414:	68fb      	ldr	r3, [r7, #12]
+ 8018416:	8a9b      	ldrh	r3, [r3, #20]
+ 8018418:	461a      	mov	r2, r3
+ 801841a:	68fb      	ldr	r3, [r7, #12]
+ 801841c:	8a5b      	ldrh	r3, [r3, #18]
+ 801841e:	1ad3      	subs	r3, r2, r3
+ 8018420:	2b01      	cmp	r3, #1
+ 8018422:	dd0c      	ble.n	801843e <dhcp_t2_timeout+0x5e>
+      dhcp->t2_rebind_time = (u16_t)((dhcp->t0_timeout - dhcp->lease_used) / 2);
+ 8018424:	68fb      	ldr	r3, [r7, #12]
+ 8018426:	8a9b      	ldrh	r3, [r3, #20]
+ 8018428:	461a      	mov	r2, r3
+ 801842a:	68fb      	ldr	r3, [r7, #12]
+ 801842c:	8a5b      	ldrh	r3, [r3, #18]
+ 801842e:	1ad3      	subs	r3, r2, r3
+ 8018430:	2b00      	cmp	r3, #0
+ 8018432:	da00      	bge.n	8018436 <dhcp_t2_timeout+0x56>
+ 8018434:	3301      	adds	r3, #1
+ 8018436:	105b      	asrs	r3, r3, #1
+ 8018438:	b29a      	uxth	r2, r3
+ 801843a:	68fb      	ldr	r3, [r7, #12]
+ 801843c:	821a      	strh	r2, [r3, #16]
+    }
+  }
+}
+ 801843e:	bf00      	nop
+ 8018440:	3710      	adds	r7, #16
+ 8018442:	46bd      	mov	sp, r7
+ 8018444:	bd80      	pop	{r7, pc}
+	...
+
+08018448 <dhcp_handle_ack>:
+ *
+ * @param netif the netif under DHCP control
+ */
+static void
+dhcp_handle_ack(struct netif *netif, struct dhcp_msg *msg_in)
+{
+ 8018448:	b580      	push	{r7, lr}
+ 801844a:	b084      	sub	sp, #16
+ 801844c:	af00      	add	r7, sp, #0
+ 801844e:	6078      	str	r0, [r7, #4]
+ 8018450:	6039      	str	r1, [r7, #0]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 8018452:	687b      	ldr	r3, [r7, #4]
+ 8018454:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8018456:	60fb      	str	r3, [r7, #12]
+#if LWIP_DHCP_GET_NTP_SRV
+  ip4_addr_t ntp_server_addrs[LWIP_DHCP_MAX_NTP_SERVERS];
+#endif
+
+  /* clear options we might not get from the ACK */
+  ip4_addr_set_zero(&dhcp->offered_sn_mask);
+ 8018458:	68fb      	ldr	r3, [r7, #12]
+ 801845a:	2200      	movs	r2, #0
+ 801845c:	621a      	str	r2, [r3, #32]
+  ip4_addr_set_zero(&dhcp->offered_gw_addr);
+ 801845e:	68fb      	ldr	r3, [r7, #12]
+ 8018460:	2200      	movs	r2, #0
+ 8018462:	625a      	str	r2, [r3, #36]	; 0x24
+#if LWIP_DHCP_BOOTP_FILE
+  ip4_addr_set_zero(&dhcp->offered_si_addr);
+#endif /* LWIP_DHCP_BOOTP_FILE */
+
+  /* lease time given? */
+  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_LEASE_TIME)) {
+ 8018464:	4b26      	ldr	r3, [pc, #152]	; (8018500 <dhcp_handle_ack+0xb8>)
+ 8018466:	78db      	ldrb	r3, [r3, #3]
+ 8018468:	2b00      	cmp	r3, #0
+ 801846a:	d003      	beq.n	8018474 <dhcp_handle_ack+0x2c>
+    /* remember offered lease time */
+    dhcp->offered_t0_lease = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_LEASE_TIME);
+ 801846c:	4b25      	ldr	r3, [pc, #148]	; (8018504 <dhcp_handle_ack+0xbc>)
+ 801846e:	68da      	ldr	r2, [r3, #12]
+ 8018470:	68fb      	ldr	r3, [r7, #12]
+ 8018472:	629a      	str	r2, [r3, #40]	; 0x28
+  }
+  /* renewal period given? */
+  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T1)) {
+ 8018474:	4b22      	ldr	r3, [pc, #136]	; (8018500 <dhcp_handle_ack+0xb8>)
+ 8018476:	791b      	ldrb	r3, [r3, #4]
+ 8018478:	2b00      	cmp	r3, #0
+ 801847a:	d004      	beq.n	8018486 <dhcp_handle_ack+0x3e>
+    /* remember given renewal period */
+    dhcp->offered_t1_renew = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T1);
+ 801847c:	4b21      	ldr	r3, [pc, #132]	; (8018504 <dhcp_handle_ack+0xbc>)
+ 801847e:	691a      	ldr	r2, [r3, #16]
+ 8018480:	68fb      	ldr	r3, [r7, #12]
+ 8018482:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8018484:	e004      	b.n	8018490 <dhcp_handle_ack+0x48>
+  } else {
+    /* calculate safe periods for renewal */
+    dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2;
+ 8018486:	68fb      	ldr	r3, [r7, #12]
+ 8018488:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 801848a:	085a      	lsrs	r2, r3, #1
+ 801848c:	68fb      	ldr	r3, [r7, #12]
+ 801848e:	62da      	str	r2, [r3, #44]	; 0x2c
+  }
+
+  /* renewal period given? */
+  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T2)) {
+ 8018490:	4b1b      	ldr	r3, [pc, #108]	; (8018500 <dhcp_handle_ack+0xb8>)
+ 8018492:	795b      	ldrb	r3, [r3, #5]
+ 8018494:	2b00      	cmp	r3, #0
+ 8018496:	d004      	beq.n	80184a2 <dhcp_handle_ack+0x5a>
+    /* remember given rebind period */
+    dhcp->offered_t2_rebind = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T2);
+ 8018498:	4b1a      	ldr	r3, [pc, #104]	; (8018504 <dhcp_handle_ack+0xbc>)
+ 801849a:	695a      	ldr	r2, [r3, #20]
+ 801849c:	68fb      	ldr	r3, [r7, #12]
+ 801849e:	631a      	str	r2, [r3, #48]	; 0x30
+ 80184a0:	e007      	b.n	80184b2 <dhcp_handle_ack+0x6a>
+  } else {
+    /* calculate safe periods for rebinding (offered_t0_lease * 0.875 -> 87.5%)*/
+    dhcp->offered_t2_rebind = (dhcp->offered_t0_lease * 7U) / 8U;
+ 80184a2:	68fb      	ldr	r3, [r7, #12]
+ 80184a4:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 80184a6:	4613      	mov	r3, r2
+ 80184a8:	00db      	lsls	r3, r3, #3
+ 80184aa:	1a9b      	subs	r3, r3, r2
+ 80184ac:	08da      	lsrs	r2, r3, #3
+ 80184ae:	68fb      	ldr	r3, [r7, #12]
+ 80184b0:	631a      	str	r2, [r3, #48]	; 0x30
+  }
+
+  /* (y)our internet address */
+  ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
+ 80184b2:	683b      	ldr	r3, [r7, #0]
+ 80184b4:	691a      	ldr	r2, [r3, #16]
+ 80184b6:	68fb      	ldr	r3, [r7, #12]
+ 80184b8:	61da      	str	r2, [r3, #28]
+     boot file name copied in dhcp_parse_reply if not overloaded */
+  ip4_addr_copy(dhcp->offered_si_addr, msg_in->siaddr);
+#endif /* LWIP_DHCP_BOOTP_FILE */
+
+  /* subnet mask given? */
+  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)) {
+ 80184ba:	4b11      	ldr	r3, [pc, #68]	; (8018500 <dhcp_handle_ack+0xb8>)
+ 80184bc:	799b      	ldrb	r3, [r3, #6]
+ 80184be:	2b00      	cmp	r3, #0
+ 80184c0:	d00b      	beq.n	80184da <dhcp_handle_ack+0x92>
+    /* remember given subnet mask */
+    ip4_addr_set_u32(&dhcp->offered_sn_mask, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)));
+ 80184c2:	4b10      	ldr	r3, [pc, #64]	; (8018504 <dhcp_handle_ack+0xbc>)
+ 80184c4:	699b      	ldr	r3, [r3, #24]
+ 80184c6:	4618      	mov	r0, r3
+ 80184c8:	f7f7 fec7 	bl	801025a <lwip_htonl>
+ 80184cc:	4602      	mov	r2, r0
+ 80184ce:	68fb      	ldr	r3, [r7, #12]
+ 80184d0:	621a      	str	r2, [r3, #32]
+    dhcp->subnet_mask_given = 1;
+ 80184d2:	68fb      	ldr	r3, [r7, #12]
+ 80184d4:	2201      	movs	r2, #1
+ 80184d6:	71da      	strb	r2, [r3, #7]
+ 80184d8:	e002      	b.n	80184e0 <dhcp_handle_ack+0x98>
+  } else {
+    dhcp->subnet_mask_given = 0;
+ 80184da:	68fb      	ldr	r3, [r7, #12]
+ 80184dc:	2200      	movs	r2, #0
+ 80184de:	71da      	strb	r2, [r3, #7]
+  }
+
+  /* gateway router */
+  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_ROUTER)) {
+ 80184e0:	4b07      	ldr	r3, [pc, #28]	; (8018500 <dhcp_handle_ack+0xb8>)
+ 80184e2:	79db      	ldrb	r3, [r3, #7]
+ 80184e4:	2b00      	cmp	r3, #0
+ 80184e6:	d007      	beq.n	80184f8 <dhcp_handle_ack+0xb0>
+    ip4_addr_set_u32(&dhcp->offered_gw_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_ROUTER)));
+ 80184e8:	4b06      	ldr	r3, [pc, #24]	; (8018504 <dhcp_handle_ack+0xbc>)
+ 80184ea:	69db      	ldr	r3, [r3, #28]
+ 80184ec:	4618      	mov	r0, r3
+ 80184ee:	f7f7 feb4 	bl	801025a <lwip_htonl>
+ 80184f2:	4602      	mov	r2, r0
+ 80184f4:	68fb      	ldr	r3, [r7, #12]
+ 80184f6:	625a      	str	r2, [r3, #36]	; 0x24
+    ip_addr_t dns_addr;
+    ip_addr_set_ip4_u32_val(dns_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_DNS_SERVER + n)));
+    dns_setserver(n, &dns_addr);
+  }
+#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
+}
+ 80184f8:	bf00      	nop
+ 80184fa:	3710      	adds	r7, #16
+ 80184fc:	46bd      	mov	sp, r7
+ 80184fe:	bd80      	pop	{r7, pc}
+ 8018500:	2000f804 	.word	0x2000f804
+ 8018504:	2000f80c 	.word	0x2000f80c
+
+08018508 <dhcp_start>:
+ * - ERR_OK - No error
+ * - ERR_MEM - Out of memory
+ */
+err_t
+dhcp_start(struct netif *netif)
+{
+ 8018508:	b580      	push	{r7, lr}
+ 801850a:	b084      	sub	sp, #16
+ 801850c:	af00      	add	r7, sp, #0
+ 801850e:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp;
+  err_t result;
+
+  LWIP_ASSERT_CORE_LOCKED();
+  LWIP_ERROR("netif != NULL", (netif != NULL), return ERR_ARG;);
+ 8018510:	687b      	ldr	r3, [r7, #4]
+ 8018512:	2b00      	cmp	r3, #0
+ 8018514:	d109      	bne.n	801852a <dhcp_start+0x22>
+ 8018516:	4b37      	ldr	r3, [pc, #220]	; (80185f4 <dhcp_start+0xec>)
+ 8018518:	f240 22e7 	movw	r2, #743	; 0x2e7
+ 801851c:	4936      	ldr	r1, [pc, #216]	; (80185f8 <dhcp_start+0xf0>)
+ 801851e:	4837      	ldr	r0, [pc, #220]	; (80185fc <dhcp_start+0xf4>)
+ 8018520:	f003 ff6a 	bl	801c3f8 <iprintf>
+ 8018524:	f06f 030f 	mvn.w	r3, #15
+ 8018528:	e060      	b.n	80185ec <dhcp_start+0xe4>
+  LWIP_ERROR("netif is not up, old style port?", netif_is_up(netif), return ERR_ARG;);
+ 801852a:	687b      	ldr	r3, [r7, #4]
+ 801852c:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 8018530:	f003 0301 	and.w	r3, r3, #1
+ 8018534:	2b00      	cmp	r3, #0
+ 8018536:	d109      	bne.n	801854c <dhcp_start+0x44>
+ 8018538:	4b2e      	ldr	r3, [pc, #184]	; (80185f4 <dhcp_start+0xec>)
+ 801853a:	f44f 723a 	mov.w	r2, #744	; 0x2e8
+ 801853e:	4930      	ldr	r1, [pc, #192]	; (8018600 <dhcp_start+0xf8>)
+ 8018540:	482e      	ldr	r0, [pc, #184]	; (80185fc <dhcp_start+0xf4>)
+ 8018542:	f003 ff59 	bl	801c3f8 <iprintf>
+ 8018546:	f06f 030f 	mvn.w	r3, #15
+ 801854a:	e04f      	b.n	80185ec <dhcp_start+0xe4>
+  dhcp = netif_dhcp_data(netif);
+ 801854c:	687b      	ldr	r3, [r7, #4]
+ 801854e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8018550:	60fb      	str	r3, [r7, #12]
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
+
+  /* check MTU of the netif */
+  if (netif->mtu < DHCP_MAX_MSG_LEN_MIN_REQUIRED) {
+ 8018552:	687b      	ldr	r3, [r7, #4]
+ 8018554:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8018556:	f5b3 7f10 	cmp.w	r3, #576	; 0x240
+ 801855a:	d202      	bcs.n	8018562 <dhcp_start+0x5a>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): Cannot use this netif with DHCP: MTU is too small\n"));
+    return ERR_MEM;
+ 801855c:	f04f 33ff 	mov.w	r3, #4294967295
+ 8018560:	e044      	b.n	80185ec <dhcp_start+0xe4>
+  }
+
+  /* no DHCP client attached yet? */
+  if (dhcp == NULL) {
+ 8018562:	68fb      	ldr	r3, [r7, #12]
+ 8018564:	2b00      	cmp	r3, #0
+ 8018566:	d10d      	bne.n	8018584 <dhcp_start+0x7c>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): mallocing new DHCP client\n"));
+    dhcp = (struct dhcp *)mem_malloc(sizeof(struct dhcp));
+ 8018568:	2034      	movs	r0, #52	; 0x34
+ 801856a:	f7f8 f995 	bl	8010898 <mem_malloc>
+ 801856e:	60f8      	str	r0, [r7, #12]
+    if (dhcp == NULL) {
+ 8018570:	68fb      	ldr	r3, [r7, #12]
+ 8018572:	2b00      	cmp	r3, #0
+ 8018574:	d102      	bne.n	801857c <dhcp_start+0x74>
+      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n"));
+      return ERR_MEM;
+ 8018576:	f04f 33ff 	mov.w	r3, #4294967295
+ 801857a:	e037      	b.n	80185ec <dhcp_start+0xe4>
+    }
+
+    /* store this dhcp client in the netif */
+    netif_set_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP, dhcp);
+ 801857c:	687b      	ldr	r3, [r7, #4]
+ 801857e:	68fa      	ldr	r2, [r7, #12]
+ 8018580:	625a      	str	r2, [r3, #36]	; 0x24
+ 8018582:	e005      	b.n	8018590 <dhcp_start+0x88>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): allocated dhcp"));
+    /* already has DHCP client attached */
+  } else {
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(): restarting DHCP configuration\n"));
+
+    if (dhcp->pcb_allocated != 0) {
+ 8018584:	68fb      	ldr	r3, [r7, #12]
+ 8018586:	791b      	ldrb	r3, [r3, #4]
+ 8018588:	2b00      	cmp	r3, #0
+ 801858a:	d001      	beq.n	8018590 <dhcp_start+0x88>
+      dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
+ 801858c:	f7ff fc90 	bl	8017eb0 <dhcp_dec_pcb_refcount>
+    }
+    /* dhcp is cleared below, no need to reset flag*/
+  }
+
+  /* clear data structure */
+  memset(dhcp, 0, sizeof(struct dhcp));
+ 8018590:	2234      	movs	r2, #52	; 0x34
+ 8018592:	2100      	movs	r1, #0
+ 8018594:	68f8      	ldr	r0, [r7, #12]
+ 8018596:	f003 ff26 	bl	801c3e6 <memset>
+  /* dhcp_set_state(&dhcp, DHCP_STATE_OFF); */
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n"));
+
+  if (dhcp_inc_pcb_refcount() != ERR_OK) { /* ensure DHCP PCB is allocated */
+ 801859a:	f7ff fc37 	bl	8017e0c <dhcp_inc_pcb_refcount>
+ 801859e:	4603      	mov	r3, r0
+ 80185a0:	2b00      	cmp	r3, #0
+ 80185a2:	d002      	beq.n	80185aa <dhcp_start+0xa2>
+    return ERR_MEM;
+ 80185a4:	f04f 33ff 	mov.w	r3, #4294967295
+ 80185a8:	e020      	b.n	80185ec <dhcp_start+0xe4>
+  }
+  dhcp->pcb_allocated = 1;
+ 80185aa:	68fb      	ldr	r3, [r7, #12]
+ 80185ac:	2201      	movs	r2, #1
+ 80185ae:	711a      	strb	r2, [r3, #4]
+
+  if (!netif_is_link_up(netif)) {
+ 80185b0:	687b      	ldr	r3, [r7, #4]
+ 80185b2:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 80185b6:	f003 0304 	and.w	r3, r3, #4
+ 80185ba:	2b00      	cmp	r3, #0
+ 80185bc:	d105      	bne.n	80185ca <dhcp_start+0xc2>
+    /* set state INIT and wait for dhcp_network_changed() to call dhcp_discover() */
+    dhcp_set_state(dhcp, DHCP_STATE_INIT);
+ 80185be:	2102      	movs	r1, #2
+ 80185c0:	68f8      	ldr	r0, [r7, #12]
+ 80185c2:	f000 fd13 	bl	8018fec <dhcp_set_state>
+    return ERR_OK;
+ 80185c6:	2300      	movs	r3, #0
+ 80185c8:	e010      	b.n	80185ec <dhcp_start+0xe4>
+  }
+
+  /* (re)start the DHCP negotiation */
+  result = dhcp_discover(netif);
+ 80185ca:	6878      	ldr	r0, [r7, #4]
+ 80185cc:	f000 f90a 	bl	80187e4 <dhcp_discover>
+ 80185d0:	4603      	mov	r3, r0
+ 80185d2:	72fb      	strb	r3, [r7, #11]
+  if (result != ERR_OK) {
+ 80185d4:	f997 300b 	ldrsb.w	r3, [r7, #11]
+ 80185d8:	2b00      	cmp	r3, #0
+ 80185da:	d005      	beq.n	80185e8 <dhcp_start+0xe0>
+    /* free resources allocated above */
+    dhcp_release_and_stop(netif);
+ 80185dc:	6878      	ldr	r0, [r7, #4]
+ 80185de:	f000 fc6b 	bl	8018eb8 <dhcp_release_and_stop>
+    return ERR_MEM;
+ 80185e2:	f04f 33ff 	mov.w	r3, #4294967295
+ 80185e6:	e001      	b.n	80185ec <dhcp_start+0xe4>
+  }
+  return result;
+ 80185e8:	f997 300b 	ldrsb.w	r3, [r7, #11]
+}
+ 80185ec:	4618      	mov	r0, r3
+ 80185ee:	3710      	adds	r7, #16
+ 80185f0:	46bd      	mov	sp, r7
+ 80185f2:	bd80      	pop	{r7, pc}
+ 80185f4:	0801fac8 	.word	0x0801fac8
+ 80185f8:	0801fbac 	.word	0x0801fbac
+ 80185fc:	0801fb28 	.word	0x0801fb28
+ 8018600:	0801fbf0 	.word	0x0801fbf0
+
+08018604 <dhcp_network_changed>:
+ * This enters the REBOOTING state to verify that the currently bound
+ * address is still valid.
+ */
+void
+dhcp_network_changed(struct netif *netif)
+{
+ 8018604:	b580      	push	{r7, lr}
+ 8018606:	b084      	sub	sp, #16
+ 8018608:	af00      	add	r7, sp, #0
+ 801860a:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 801860c:	687b      	ldr	r3, [r7, #4]
+ 801860e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8018610:	60fb      	str	r3, [r7, #12]
+
+  if (!dhcp) {
+ 8018612:	68fb      	ldr	r3, [r7, #12]
+ 8018614:	2b00      	cmp	r3, #0
+ 8018616:	d037      	beq.n	8018688 <dhcp_network_changed+0x84>
+    return;
+  }
+  switch (dhcp->state) {
+ 8018618:	68fb      	ldr	r3, [r7, #12]
+ 801861a:	795b      	ldrb	r3, [r3, #5]
+ 801861c:	2b0a      	cmp	r3, #10
+ 801861e:	d820      	bhi.n	8018662 <dhcp_network_changed+0x5e>
+ 8018620:	a201      	add	r2, pc, #4	; (adr r2, 8018628 <dhcp_network_changed+0x24>)
+ 8018622:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 8018626:	bf00      	nop
+ 8018628:	0801868d 	.word	0x0801868d
+ 801862c:	08018663 	.word	0x08018663
+ 8018630:	08018663 	.word	0x08018663
+ 8018634:	08018655 	.word	0x08018655
+ 8018638:	08018655 	.word	0x08018655
+ 801863c:	08018655 	.word	0x08018655
+ 8018640:	08018663 	.word	0x08018663
+ 8018644:	08018663 	.word	0x08018663
+ 8018648:	08018663 	.word	0x08018663
+ 801864c:	08018663 	.word	0x08018663
+ 8018650:	08018655 	.word	0x08018655
+    case DHCP_STATE_REBINDING:
+    case DHCP_STATE_RENEWING:
+    case DHCP_STATE_BOUND:
+    case DHCP_STATE_REBOOTING:
+      dhcp->tries = 0;
+ 8018654:	68fb      	ldr	r3, [r7, #12]
+ 8018656:	2200      	movs	r2, #0
+ 8018658:	719a      	strb	r2, [r3, #6]
+      dhcp_reboot(netif);
+ 801865a:	6878      	ldr	r0, [r7, #4]
+ 801865c:	f000 fb76 	bl	8018d4c <dhcp_reboot>
+      break;
+ 8018660:	e015      	b.n	801868e <dhcp_network_changed+0x8a>
+    case DHCP_STATE_OFF:
+      /* stay off */
+      break;
+    default:
+      LWIP_ASSERT("invalid dhcp->state", dhcp->state <= DHCP_STATE_BACKING_OFF);
+ 8018662:	68fb      	ldr	r3, [r7, #12]
+ 8018664:	795b      	ldrb	r3, [r3, #5]
+ 8018666:	2b0c      	cmp	r3, #12
+ 8018668:	d906      	bls.n	8018678 <dhcp_network_changed+0x74>
+ 801866a:	4b0a      	ldr	r3, [pc, #40]	; (8018694 <dhcp_network_changed+0x90>)
+ 801866c:	f240 326d 	movw	r2, #877	; 0x36d
+ 8018670:	4909      	ldr	r1, [pc, #36]	; (8018698 <dhcp_network_changed+0x94>)
+ 8018672:	480a      	ldr	r0, [pc, #40]	; (801869c <dhcp_network_changed+0x98>)
+ 8018674:	f003 fec0 	bl	801c3f8 <iprintf>
+        autoip_stop(netif);
+        dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
+      }
+#endif /* LWIP_DHCP_AUTOIP_COOP */
+      /* ensure we start with short timeouts, even if already discovering */
+      dhcp->tries = 0;
+ 8018678:	68fb      	ldr	r3, [r7, #12]
+ 801867a:	2200      	movs	r2, #0
+ 801867c:	719a      	strb	r2, [r3, #6]
+      dhcp_discover(netif);
+ 801867e:	6878      	ldr	r0, [r7, #4]
+ 8018680:	f000 f8b0 	bl	80187e4 <dhcp_discover>
+      break;
+ 8018684:	bf00      	nop
+ 8018686:	e002      	b.n	801868e <dhcp_network_changed+0x8a>
+    return;
+ 8018688:	bf00      	nop
+ 801868a:	e000      	b.n	801868e <dhcp_network_changed+0x8a>
+      break;
+ 801868c:	bf00      	nop
+  }
+}
+ 801868e:	3710      	adds	r7, #16
+ 8018690:	46bd      	mov	sp, r7
+ 8018692:	bd80      	pop	{r7, pc}
+ 8018694:	0801fac8 	.word	0x0801fac8
+ 8018698:	0801fc14 	.word	0x0801fc14
+ 801869c:	0801fb28 	.word	0x0801fb28
+
+080186a0 <dhcp_arp_reply>:
+ * @param netif the network interface on which the reply was received
+ * @param addr The IP address we received a reply from
+ */
+void
+dhcp_arp_reply(struct netif *netif, const ip4_addr_t *addr)
+{
+ 80186a0:	b580      	push	{r7, lr}
+ 80186a2:	b084      	sub	sp, #16
+ 80186a4:	af00      	add	r7, sp, #0
+ 80186a6:	6078      	str	r0, [r7, #4]
+ 80186a8:	6039      	str	r1, [r7, #0]
+  struct dhcp *dhcp;
+
+  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
+ 80186aa:	687b      	ldr	r3, [r7, #4]
+ 80186ac:	2b00      	cmp	r3, #0
+ 80186ae:	d107      	bne.n	80186c0 <dhcp_arp_reply+0x20>
+ 80186b0:	4b0e      	ldr	r3, [pc, #56]	; (80186ec <dhcp_arp_reply+0x4c>)
+ 80186b2:	f240 328b 	movw	r2, #907	; 0x38b
+ 80186b6:	490e      	ldr	r1, [pc, #56]	; (80186f0 <dhcp_arp_reply+0x50>)
+ 80186b8:	480e      	ldr	r0, [pc, #56]	; (80186f4 <dhcp_arp_reply+0x54>)
+ 80186ba:	f003 fe9d 	bl	801c3f8 <iprintf>
+ 80186be:	e012      	b.n	80186e6 <dhcp_arp_reply+0x46>
+  dhcp = netif_dhcp_data(netif);
+ 80186c0:	687b      	ldr	r3, [r7, #4]
+ 80186c2:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80186c4:	60fb      	str	r3, [r7, #12]
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_arp_reply()\n"));
+  /* is a DHCP client doing an ARP check? */
+  if ((dhcp != NULL) && (dhcp->state == DHCP_STATE_CHECKING)) {
+ 80186c6:	68fb      	ldr	r3, [r7, #12]
+ 80186c8:	2b00      	cmp	r3, #0
+ 80186ca:	d00c      	beq.n	80186e6 <dhcp_arp_reply+0x46>
+ 80186cc:	68fb      	ldr	r3, [r7, #12]
+ 80186ce:	795b      	ldrb	r3, [r3, #5]
+ 80186d0:	2b08      	cmp	r3, #8
+ 80186d2:	d108      	bne.n	80186e6 <dhcp_arp_reply+0x46>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n",
+                ip4_addr_get_u32(addr)));
+    /* did a host respond with the address we
+       were offered by the DHCP server? */
+    if (ip4_addr_cmp(addr, &dhcp->offered_ip_addr)) {
+ 80186d4:	683b      	ldr	r3, [r7, #0]
+ 80186d6:	681a      	ldr	r2, [r3, #0]
+ 80186d8:	68fb      	ldr	r3, [r7, #12]
+ 80186da:	69db      	ldr	r3, [r3, #28]
+ 80186dc:	429a      	cmp	r2, r3
+ 80186de:	d102      	bne.n	80186e6 <dhcp_arp_reply+0x46>
+      /* we will not accept the offered address */
+      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING,
+                  ("dhcp_arp_reply(): arp reply matched with offered address, declining\n"));
+      dhcp_decline(netif);
+ 80186e0:	6878      	ldr	r0, [r7, #4]
+ 80186e2:	f000 f809 	bl	80186f8 <dhcp_decline>
+    }
+  }
+}
+ 80186e6:	3710      	adds	r7, #16
+ 80186e8:	46bd      	mov	sp, r7
+ 80186ea:	bd80      	pop	{r7, pc}
+ 80186ec:	0801fac8 	.word	0x0801fac8
+ 80186f0:	0801fbac 	.word	0x0801fbac
+ 80186f4:	0801fb28 	.word	0x0801fb28
+
+080186f8 <dhcp_decline>:
+ *
+ * @param netif the netif under DHCP control
+ */
+static err_t
+dhcp_decline(struct netif *netif)
+{
+ 80186f8:	b5b0      	push	{r4, r5, r7, lr}
+ 80186fa:	b08a      	sub	sp, #40	; 0x28
+ 80186fc:	af02      	add	r7, sp, #8
+ 80186fe:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 8018700:	687b      	ldr	r3, [r7, #4]
+ 8018702:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8018704:	61bb      	str	r3, [r7, #24]
+  u16_t msecs;
+  struct pbuf *p_out;
+  u16_t options_out_len;
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline()\n"));
+  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
+ 8018706:	210c      	movs	r1, #12
+ 8018708:	69b8      	ldr	r0, [r7, #24]
+ 801870a:	f000 fc6f 	bl	8018fec <dhcp_set_state>
+  /* create and initialize the DHCP message header */
+  p_out = dhcp_create_msg(netif, dhcp, DHCP_DECLINE, &options_out_len);
+ 801870e:	f107 030c 	add.w	r3, r7, #12
+ 8018712:	2204      	movs	r2, #4
+ 8018714:	69b9      	ldr	r1, [r7, #24]
+ 8018716:	6878      	ldr	r0, [r7, #4]
+ 8018718:	f001 f8f2 	bl	8019900 <dhcp_create_msg>
+ 801871c:	6178      	str	r0, [r7, #20]
+  if (p_out != NULL) {
+ 801871e:	697b      	ldr	r3, [r7, #20]
+ 8018720:	2b00      	cmp	r3, #0
+ 8018722:	d035      	beq.n	8018790 <dhcp_decline+0x98>
+    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
+ 8018724:	697b      	ldr	r3, [r7, #20]
+ 8018726:	685b      	ldr	r3, [r3, #4]
+ 8018728:	613b      	str	r3, [r7, #16]
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
+ 801872a:	89b8      	ldrh	r0, [r7, #12]
+ 801872c:	693b      	ldr	r3, [r7, #16]
+ 801872e:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018732:	2304      	movs	r3, #4
+ 8018734:	2232      	movs	r2, #50	; 0x32
+ 8018736:	f000 fc73 	bl	8019020 <dhcp_option>
+ 801873a:	4603      	mov	r3, r0
+ 801873c:	81bb      	strh	r3, [r7, #12]
+    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
+ 801873e:	89bc      	ldrh	r4, [r7, #12]
+ 8018740:	693b      	ldr	r3, [r7, #16]
+ 8018742:	f103 05f0 	add.w	r5, r3, #240	; 0xf0
+ 8018746:	69bb      	ldr	r3, [r7, #24]
+ 8018748:	69db      	ldr	r3, [r3, #28]
+ 801874a:	4618      	mov	r0, r3
+ 801874c:	f7f7 fd85 	bl	801025a <lwip_htonl>
+ 8018750:	4603      	mov	r3, r0
+ 8018752:	461a      	mov	r2, r3
+ 8018754:	4629      	mov	r1, r5
+ 8018756:	4620      	mov	r0, r4
+ 8018758:	f000 fcee 	bl	8019138 <dhcp_option_long>
+ 801875c:	4603      	mov	r3, r0
+ 801875e:	81bb      	strh	r3, [r7, #12]
+
+    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_BACKING_OFF, msg_out, DHCP_DECLINE, &options_out_len);
+    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
+ 8018760:	89b8      	ldrh	r0, [r7, #12]
+ 8018762:	693b      	ldr	r3, [r7, #16]
+ 8018764:	33f0      	adds	r3, #240	; 0xf0
+ 8018766:	697a      	ldr	r2, [r7, #20]
+ 8018768:	4619      	mov	r1, r3
+ 801876a:	f001 f99f 	bl	8019aac <dhcp_option_trailer>
+
+    /* per section 4.4.4, broadcast DECLINE messages */
+    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
+ 801876e:	4b19      	ldr	r3, [pc, #100]	; (80187d4 <dhcp_decline+0xdc>)
+ 8018770:	6818      	ldr	r0, [r3, #0]
+ 8018772:	4b19      	ldr	r3, [pc, #100]	; (80187d8 <dhcp_decline+0xe0>)
+ 8018774:	9301      	str	r3, [sp, #4]
+ 8018776:	687b      	ldr	r3, [r7, #4]
+ 8018778:	9300      	str	r3, [sp, #0]
+ 801877a:	2343      	movs	r3, #67	; 0x43
+ 801877c:	4a17      	ldr	r2, [pc, #92]	; (80187dc <dhcp_decline+0xe4>)
+ 801877e:	6979      	ldr	r1, [r7, #20]
+ 8018780:	f7ff f8be 	bl	8017900 <udp_sendto_if_src>
+ 8018784:	4603      	mov	r3, r0
+ 8018786:	77fb      	strb	r3, [r7, #31]
+    pbuf_free(p_out);
+ 8018788:	6978      	ldr	r0, [r7, #20]
+ 801878a:	f7f9 f905 	bl	8011998 <pbuf_free>
+ 801878e:	e001      	b.n	8018794 <dhcp_decline+0x9c>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_decline: BACKING OFF\n"));
+  } else {
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
+                ("dhcp_decline: could not allocate DHCP request\n"));
+    result = ERR_MEM;
+ 8018790:	23ff      	movs	r3, #255	; 0xff
+ 8018792:	77fb      	strb	r3, [r7, #31]
+  }
+  if (dhcp->tries < 255) {
+ 8018794:	69bb      	ldr	r3, [r7, #24]
+ 8018796:	799b      	ldrb	r3, [r3, #6]
+ 8018798:	2bff      	cmp	r3, #255	; 0xff
+ 801879a:	d005      	beq.n	80187a8 <dhcp_decline+0xb0>
+    dhcp->tries++;
+ 801879c:	69bb      	ldr	r3, [r7, #24]
+ 801879e:	799b      	ldrb	r3, [r3, #6]
+ 80187a0:	3301      	adds	r3, #1
+ 80187a2:	b2da      	uxtb	r2, r3
+ 80187a4:	69bb      	ldr	r3, [r7, #24]
+ 80187a6:	719a      	strb	r2, [r3, #6]
+  }
+  msecs = 10 * 1000;
+ 80187a8:	f242 7310 	movw	r3, #10000	; 0x2710
+ 80187ac:	81fb      	strh	r3, [r7, #14]
+  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
+ 80187ae:	89fb      	ldrh	r3, [r7, #14]
+ 80187b0:	f203 13f3 	addw	r3, r3, #499	; 0x1f3
+ 80187b4:	4a0a      	ldr	r2, [pc, #40]	; (80187e0 <dhcp_decline+0xe8>)
+ 80187b6:	fb82 1203 	smull	r1, r2, r2, r3
+ 80187ba:	1152      	asrs	r2, r2, #5
+ 80187bc:	17db      	asrs	r3, r3, #31
+ 80187be:	1ad3      	subs	r3, r2, r3
+ 80187c0:	b29a      	uxth	r2, r3
+ 80187c2:	69bb      	ldr	r3, [r7, #24]
+ 80187c4:	811a      	strh	r2, [r3, #8]
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs));
+  return result;
+ 80187c6:	f997 301f 	ldrsb.w	r3, [r7, #31]
+}
+ 80187ca:	4618      	mov	r0, r3
+ 80187cc:	3720      	adds	r7, #32
+ 80187ce:	46bd      	mov	sp, r7
+ 80187d0:	bdb0      	pop	{r4, r5, r7, pc}
+ 80187d2:	bf00      	nop
+ 80187d4:	20008758 	.word	0x20008758
+ 80187d8:	08022598 	.word	0x08022598
+ 80187dc:	0802259c 	.word	0x0802259c
+ 80187e0:	10624dd3 	.word	0x10624dd3
+
+080187e4 <dhcp_discover>:
+ *
+ * @param netif the netif under DHCP control
+ */
+static err_t
+dhcp_discover(struct netif *netif)
+{
+ 80187e4:	b580      	push	{r7, lr}
+ 80187e6:	b08a      	sub	sp, #40	; 0x28
+ 80187e8:	af02      	add	r7, sp, #8
+ 80187ea:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 80187ec:	687b      	ldr	r3, [r7, #4]
+ 80187ee:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80187f0:	61bb      	str	r3, [r7, #24]
+  err_t result = ERR_OK;
+ 80187f2:	2300      	movs	r3, #0
+ 80187f4:	75fb      	strb	r3, [r7, #23]
+  struct pbuf *p_out;
+  u16_t options_out_len;
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover()\n"));
+
+  ip4_addr_set_any(&dhcp->offered_ip_addr);
+ 80187f6:	69bb      	ldr	r3, [r7, #24]
+ 80187f8:	2200      	movs	r2, #0
+ 80187fa:	61da      	str	r2, [r3, #28]
+  dhcp_set_state(dhcp, DHCP_STATE_SELECTING);
+ 80187fc:	2106      	movs	r1, #6
+ 80187fe:	69b8      	ldr	r0, [r7, #24]
+ 8018800:	f000 fbf4 	bl	8018fec <dhcp_set_state>
+  /* create and initialize the DHCP message header */
+  p_out = dhcp_create_msg(netif, dhcp, DHCP_DISCOVER, &options_out_len);
+ 8018804:	f107 0308 	add.w	r3, r7, #8
+ 8018808:	2201      	movs	r2, #1
+ 801880a:	69b9      	ldr	r1, [r7, #24]
+ 801880c:	6878      	ldr	r0, [r7, #4]
+ 801880e:	f001 f877 	bl	8019900 <dhcp_create_msg>
+ 8018812:	6138      	str	r0, [r7, #16]
+  if (p_out != NULL) {
+ 8018814:	693b      	ldr	r3, [r7, #16]
+ 8018816:	2b00      	cmp	r3, #0
+ 8018818:	d04b      	beq.n	80188b2 <dhcp_discover+0xce>
+    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
+ 801881a:	693b      	ldr	r3, [r7, #16]
+ 801881c:	685b      	ldr	r3, [r3, #4]
+ 801881e:	60fb      	str	r3, [r7, #12]
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: making request\n"));
+
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
+ 8018820:	8938      	ldrh	r0, [r7, #8]
+ 8018822:	68fb      	ldr	r3, [r7, #12]
+ 8018824:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018828:	2302      	movs	r3, #2
+ 801882a:	2239      	movs	r2, #57	; 0x39
+ 801882c:	f000 fbf8 	bl	8019020 <dhcp_option>
+ 8018830:	4603      	mov	r3, r0
+ 8018832:	813b      	strh	r3, [r7, #8]
+    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
+ 8018834:	8938      	ldrh	r0, [r7, #8]
+ 8018836:	68fb      	ldr	r3, [r7, #12]
+ 8018838:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 801883c:	687b      	ldr	r3, [r7, #4]
+ 801883e:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8018840:	461a      	mov	r2, r3
+ 8018842:	f000 fc47 	bl	80190d4 <dhcp_option_short>
+ 8018846:	4603      	mov	r3, r0
+ 8018848:	813b      	strh	r3, [r7, #8]
+
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
+ 801884a:	8938      	ldrh	r0, [r7, #8]
+ 801884c:	68fb      	ldr	r3, [r7, #12]
+ 801884e:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018852:	2303      	movs	r3, #3
+ 8018854:	2237      	movs	r2, #55	; 0x37
+ 8018856:	f000 fbe3 	bl	8019020 <dhcp_option>
+ 801885a:	4603      	mov	r3, r0
+ 801885c:	813b      	strh	r3, [r7, #8]
+    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
+ 801885e:	2300      	movs	r3, #0
+ 8018860:	77fb      	strb	r3, [r7, #31]
+ 8018862:	e00e      	b.n	8018882 <dhcp_discover+0x9e>
+      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
+ 8018864:	8938      	ldrh	r0, [r7, #8]
+ 8018866:	68fb      	ldr	r3, [r7, #12]
+ 8018868:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 801886c:	7ffb      	ldrb	r3, [r7, #31]
+ 801886e:	4a29      	ldr	r2, [pc, #164]	; (8018914 <dhcp_discover+0x130>)
+ 8018870:	5cd3      	ldrb	r3, [r2, r3]
+ 8018872:	461a      	mov	r2, r3
+ 8018874:	f000 fc08 	bl	8019088 <dhcp_option_byte>
+ 8018878:	4603      	mov	r3, r0
+ 801887a:	813b      	strh	r3, [r7, #8]
+    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
+ 801887c:	7ffb      	ldrb	r3, [r7, #31]
+ 801887e:	3301      	adds	r3, #1
+ 8018880:	77fb      	strb	r3, [r7, #31]
+ 8018882:	7ffb      	ldrb	r3, [r7, #31]
+ 8018884:	2b02      	cmp	r3, #2
+ 8018886:	d9ed      	bls.n	8018864 <dhcp_discover+0x80>
+    }
+    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_SELECTING, msg_out, DHCP_DISCOVER, &options_out_len);
+    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
+ 8018888:	8938      	ldrh	r0, [r7, #8]
+ 801888a:	68fb      	ldr	r3, [r7, #12]
+ 801888c:	33f0      	adds	r3, #240	; 0xf0
+ 801888e:	693a      	ldr	r2, [r7, #16]
+ 8018890:	4619      	mov	r1, r3
+ 8018892:	f001 f90b 	bl	8019aac <dhcp_option_trailer>
+
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER)\n"));
+    udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
+ 8018896:	4b20      	ldr	r3, [pc, #128]	; (8018918 <dhcp_discover+0x134>)
+ 8018898:	6818      	ldr	r0, [r3, #0]
+ 801889a:	4b20      	ldr	r3, [pc, #128]	; (801891c <dhcp_discover+0x138>)
+ 801889c:	9301      	str	r3, [sp, #4]
+ 801889e:	687b      	ldr	r3, [r7, #4]
+ 80188a0:	9300      	str	r3, [sp, #0]
+ 80188a2:	2343      	movs	r3, #67	; 0x43
+ 80188a4:	4a1e      	ldr	r2, [pc, #120]	; (8018920 <dhcp_discover+0x13c>)
+ 80188a6:	6939      	ldr	r1, [r7, #16]
+ 80188a8:	f7ff f82a 	bl	8017900 <udp_sendto_if_src>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: deleting()ing\n"));
+    pbuf_free(p_out);
+ 80188ac:	6938      	ldr	r0, [r7, #16]
+ 80188ae:	f7f9 f873 	bl	8011998 <pbuf_free>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover: SELECTING\n"));
+  } else {
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_discover: could not allocate DHCP request\n"));
+  }
+  if (dhcp->tries < 255) {
+ 80188b2:	69bb      	ldr	r3, [r7, #24]
+ 80188b4:	799b      	ldrb	r3, [r3, #6]
+ 80188b6:	2bff      	cmp	r3, #255	; 0xff
+ 80188b8:	d005      	beq.n	80188c6 <dhcp_discover+0xe2>
+    dhcp->tries++;
+ 80188ba:	69bb      	ldr	r3, [r7, #24]
+ 80188bc:	799b      	ldrb	r3, [r3, #6]
+ 80188be:	3301      	adds	r3, #1
+ 80188c0:	b2da      	uxtb	r2, r3
+ 80188c2:	69bb      	ldr	r3, [r7, #24]
+ 80188c4:	719a      	strb	r2, [r3, #6]
+  if (dhcp->tries >= LWIP_DHCP_AUTOIP_COOP_TRIES && dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_OFF) {
+    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_ON;
+    autoip_start(netif);
+  }
+#endif /* LWIP_DHCP_AUTOIP_COOP */
+  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
+ 80188c6:	69bb      	ldr	r3, [r7, #24]
+ 80188c8:	799b      	ldrb	r3, [r3, #6]
+ 80188ca:	2b05      	cmp	r3, #5
+ 80188cc:	d80d      	bhi.n	80188ea <dhcp_discover+0x106>
+ 80188ce:	69bb      	ldr	r3, [r7, #24]
+ 80188d0:	799b      	ldrb	r3, [r3, #6]
+ 80188d2:	461a      	mov	r2, r3
+ 80188d4:	2301      	movs	r3, #1
+ 80188d6:	4093      	lsls	r3, r2
+ 80188d8:	b29b      	uxth	r3, r3
+ 80188da:	461a      	mov	r2, r3
+ 80188dc:	0152      	lsls	r2, r2, #5
+ 80188de:	1ad2      	subs	r2, r2, r3
+ 80188e0:	0092      	lsls	r2, r2, #2
+ 80188e2:	4413      	add	r3, r2
+ 80188e4:	00db      	lsls	r3, r3, #3
+ 80188e6:	b29b      	uxth	r3, r3
+ 80188e8:	e001      	b.n	80188ee <dhcp_discover+0x10a>
+ 80188ea:	f64e 2360 	movw	r3, #60000	; 0xea60
+ 80188ee:	817b      	strh	r3, [r7, #10]
+  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
+ 80188f0:	897b      	ldrh	r3, [r7, #10]
+ 80188f2:	f203 13f3 	addw	r3, r3, #499	; 0x1f3
+ 80188f6:	4a0b      	ldr	r2, [pc, #44]	; (8018924 <dhcp_discover+0x140>)
+ 80188f8:	fb82 1203 	smull	r1, r2, r2, r3
+ 80188fc:	1152      	asrs	r2, r2, #5
+ 80188fe:	17db      	asrs	r3, r3, #31
+ 8018900:	1ad3      	subs	r3, r2, r3
+ 8018902:	b29a      	uxth	r2, r3
+ 8018904:	69bb      	ldr	r3, [r7, #24]
+ 8018906:	811a      	strh	r2, [r3, #8]
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs));
+  return result;
+ 8018908:	f997 3017 	ldrsb.w	r3, [r7, #23]
+}
+ 801890c:	4618      	mov	r0, r3
+ 801890e:	3720      	adds	r7, #32
+ 8018910:	46bd      	mov	sp, r7
+ 8018912:	bd80      	pop	{r7, pc}
+ 8018914:	2000006c 	.word	0x2000006c
+ 8018918:	20008758 	.word	0x20008758
+ 801891c:	08022598 	.word	0x08022598
+ 8018920:	0802259c 	.word	0x0802259c
+ 8018924:	10624dd3 	.word	0x10624dd3
+
+08018928 <dhcp_bind>:
+ *
+ * @param netif network interface to bind to the offered address
+ */
+static void
+dhcp_bind(struct netif *netif)
+{
+ 8018928:	b580      	push	{r7, lr}
+ 801892a:	b088      	sub	sp, #32
+ 801892c:	af00      	add	r7, sp, #0
+ 801892e:	6078      	str	r0, [r7, #4]
+  u32_t timeout;
+  struct dhcp *dhcp;
+  ip4_addr_t sn_mask, gw_addr;
+  LWIP_ERROR("dhcp_bind: netif != NULL", (netif != NULL), return;);
+ 8018930:	687b      	ldr	r3, [r7, #4]
+ 8018932:	2b00      	cmp	r3, #0
+ 8018934:	d107      	bne.n	8018946 <dhcp_bind+0x1e>
+ 8018936:	4b64      	ldr	r3, [pc, #400]	; (8018ac8 <dhcp_bind+0x1a0>)
+ 8018938:	f240 4215 	movw	r2, #1045	; 0x415
+ 801893c:	4963      	ldr	r1, [pc, #396]	; (8018acc <dhcp_bind+0x1a4>)
+ 801893e:	4864      	ldr	r0, [pc, #400]	; (8018ad0 <dhcp_bind+0x1a8>)
+ 8018940:	f003 fd5a 	bl	801c3f8 <iprintf>
+ 8018944:	e0bc      	b.n	8018ac0 <dhcp_bind+0x198>
+  dhcp = netif_dhcp_data(netif);
+ 8018946:	687b      	ldr	r3, [r7, #4]
+ 8018948:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 801894a:	61bb      	str	r3, [r7, #24]
+  LWIP_ERROR("dhcp_bind: dhcp != NULL", (dhcp != NULL), return;);
+ 801894c:	69bb      	ldr	r3, [r7, #24]
+ 801894e:	2b00      	cmp	r3, #0
+ 8018950:	d107      	bne.n	8018962 <dhcp_bind+0x3a>
+ 8018952:	4b5d      	ldr	r3, [pc, #372]	; (8018ac8 <dhcp_bind+0x1a0>)
+ 8018954:	f240 4217 	movw	r2, #1047	; 0x417
+ 8018958:	495e      	ldr	r1, [pc, #376]	; (8018ad4 <dhcp_bind+0x1ac>)
+ 801895a:	485d      	ldr	r0, [pc, #372]	; (8018ad0 <dhcp_bind+0x1a8>)
+ 801895c:	f003 fd4c 	bl	801c3f8 <iprintf>
+ 8018960:	e0ae      	b.n	8018ac0 <dhcp_bind+0x198>
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
+
+  /* reset time used of lease */
+  dhcp->lease_used = 0;
+ 8018962:	69bb      	ldr	r3, [r7, #24]
+ 8018964:	2200      	movs	r2, #0
+ 8018966:	825a      	strh	r2, [r3, #18]
+
+  if (dhcp->offered_t0_lease != 0xffffffffUL) {
+ 8018968:	69bb      	ldr	r3, [r7, #24]
+ 801896a:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 801896c:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 8018970:	d019      	beq.n	80189a6 <dhcp_bind+0x7e>
+    /* set renewal period timer */
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t0 renewal timer %"U32_F" secs\n", dhcp->offered_t0_lease));
+    timeout = (dhcp->offered_t0_lease + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
+ 8018972:	69bb      	ldr	r3, [r7, #24]
+ 8018974:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 8018976:	331e      	adds	r3, #30
+ 8018978:	4a57      	ldr	r2, [pc, #348]	; (8018ad8 <dhcp_bind+0x1b0>)
+ 801897a:	fba2 2303 	umull	r2, r3, r2, r3
+ 801897e:	095b      	lsrs	r3, r3, #5
+ 8018980:	61fb      	str	r3, [r7, #28]
+    if (timeout > 0xffff) {
+ 8018982:	69fb      	ldr	r3, [r7, #28]
+ 8018984:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 8018988:	d302      	bcc.n	8018990 <dhcp_bind+0x68>
+      timeout = 0xffff;
+ 801898a:	f64f 73ff 	movw	r3, #65535	; 0xffff
+ 801898e:	61fb      	str	r3, [r7, #28]
+    }
+    dhcp->t0_timeout = (u16_t)timeout;
+ 8018990:	69fb      	ldr	r3, [r7, #28]
+ 8018992:	b29a      	uxth	r2, r3
+ 8018994:	69bb      	ldr	r3, [r7, #24]
+ 8018996:	829a      	strh	r2, [r3, #20]
+    if (dhcp->t0_timeout == 0) {
+ 8018998:	69bb      	ldr	r3, [r7, #24]
+ 801899a:	8a9b      	ldrh	r3, [r3, #20]
+ 801899c:	2b00      	cmp	r3, #0
+ 801899e:	d102      	bne.n	80189a6 <dhcp_bind+0x7e>
+      dhcp->t0_timeout = 1;
+ 80189a0:	69bb      	ldr	r3, [r7, #24]
+ 80189a2:	2201      	movs	r2, #1
+ 80189a4:	829a      	strh	r2, [r3, #20]
+    }
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t0_lease * 1000));
+  }
+
+  /* temporary DHCP lease? */
+  if (dhcp->offered_t1_renew != 0xffffffffUL) {
+ 80189a6:	69bb      	ldr	r3, [r7, #24]
+ 80189a8:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80189aa:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 80189ae:	d01d      	beq.n	80189ec <dhcp_bind+0xc4>
+    /* set renewal period timer */
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew));
+    timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
+ 80189b0:	69bb      	ldr	r3, [r7, #24]
+ 80189b2:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80189b4:	331e      	adds	r3, #30
+ 80189b6:	4a48      	ldr	r2, [pc, #288]	; (8018ad8 <dhcp_bind+0x1b0>)
+ 80189b8:	fba2 2303 	umull	r2, r3, r2, r3
+ 80189bc:	095b      	lsrs	r3, r3, #5
+ 80189be:	61fb      	str	r3, [r7, #28]
+    if (timeout > 0xffff) {
+ 80189c0:	69fb      	ldr	r3, [r7, #28]
+ 80189c2:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 80189c6:	d302      	bcc.n	80189ce <dhcp_bind+0xa6>
+      timeout = 0xffff;
+ 80189c8:	f64f 73ff 	movw	r3, #65535	; 0xffff
+ 80189cc:	61fb      	str	r3, [r7, #28]
+    }
+    dhcp->t1_timeout = (u16_t)timeout;
+ 80189ce:	69fb      	ldr	r3, [r7, #28]
+ 80189d0:	b29a      	uxth	r2, r3
+ 80189d2:	69bb      	ldr	r3, [r7, #24]
+ 80189d4:	815a      	strh	r2, [r3, #10]
+    if (dhcp->t1_timeout == 0) {
+ 80189d6:	69bb      	ldr	r3, [r7, #24]
+ 80189d8:	895b      	ldrh	r3, [r3, #10]
+ 80189da:	2b00      	cmp	r3, #0
+ 80189dc:	d102      	bne.n	80189e4 <dhcp_bind+0xbc>
+      dhcp->t1_timeout = 1;
+ 80189de:	69bb      	ldr	r3, [r7, #24]
+ 80189e0:	2201      	movs	r2, #1
+ 80189e2:	815a      	strh	r2, [r3, #10]
+    }
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew * 1000));
+    dhcp->t1_renew_time = dhcp->t1_timeout;
+ 80189e4:	69bb      	ldr	r3, [r7, #24]
+ 80189e6:	895a      	ldrh	r2, [r3, #10]
+ 80189e8:	69bb      	ldr	r3, [r7, #24]
+ 80189ea:	81da      	strh	r2, [r3, #14]
+  }
+  /* set renewal period timer */
+  if (dhcp->offered_t2_rebind != 0xffffffffUL) {
+ 80189ec:	69bb      	ldr	r3, [r7, #24]
+ 80189ee:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80189f0:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 80189f4:	d01d      	beq.n	8018a32 <dhcp_bind+0x10a>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind));
+    timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
+ 80189f6:	69bb      	ldr	r3, [r7, #24]
+ 80189f8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80189fa:	331e      	adds	r3, #30
+ 80189fc:	4a36      	ldr	r2, [pc, #216]	; (8018ad8 <dhcp_bind+0x1b0>)
+ 80189fe:	fba2 2303 	umull	r2, r3, r2, r3
+ 8018a02:	095b      	lsrs	r3, r3, #5
+ 8018a04:	61fb      	str	r3, [r7, #28]
+    if (timeout > 0xffff) {
+ 8018a06:	69fb      	ldr	r3, [r7, #28]
+ 8018a08:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 8018a0c:	d302      	bcc.n	8018a14 <dhcp_bind+0xec>
+      timeout = 0xffff;
+ 8018a0e:	f64f 73ff 	movw	r3, #65535	; 0xffff
+ 8018a12:	61fb      	str	r3, [r7, #28]
+    }
+    dhcp->t2_timeout = (u16_t)timeout;
+ 8018a14:	69fb      	ldr	r3, [r7, #28]
+ 8018a16:	b29a      	uxth	r2, r3
+ 8018a18:	69bb      	ldr	r3, [r7, #24]
+ 8018a1a:	819a      	strh	r2, [r3, #12]
+    if (dhcp->t2_timeout == 0) {
+ 8018a1c:	69bb      	ldr	r3, [r7, #24]
+ 8018a1e:	899b      	ldrh	r3, [r3, #12]
+ 8018a20:	2b00      	cmp	r3, #0
+ 8018a22:	d102      	bne.n	8018a2a <dhcp_bind+0x102>
+      dhcp->t2_timeout = 1;
+ 8018a24:	69bb      	ldr	r3, [r7, #24]
+ 8018a26:	2201      	movs	r2, #1
+ 8018a28:	819a      	strh	r2, [r3, #12]
+    }
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind * 1000));
+    dhcp->t2_rebind_time = dhcp->t2_timeout;
+ 8018a2a:	69bb      	ldr	r3, [r7, #24]
+ 8018a2c:	899a      	ldrh	r2, [r3, #12]
+ 8018a2e:	69bb      	ldr	r3, [r7, #24]
+ 8018a30:	821a      	strh	r2, [r3, #16]
+  }
+
+  /* If we have sub 1 minute lease, t2 and t1 will kick in at the same time. */
+  if ((dhcp->t1_timeout >= dhcp->t2_timeout) && (dhcp->t2_timeout > 0)) {
+ 8018a32:	69bb      	ldr	r3, [r7, #24]
+ 8018a34:	895a      	ldrh	r2, [r3, #10]
+ 8018a36:	69bb      	ldr	r3, [r7, #24]
+ 8018a38:	899b      	ldrh	r3, [r3, #12]
+ 8018a3a:	429a      	cmp	r2, r3
+ 8018a3c:	d306      	bcc.n	8018a4c <dhcp_bind+0x124>
+ 8018a3e:	69bb      	ldr	r3, [r7, #24]
+ 8018a40:	899b      	ldrh	r3, [r3, #12]
+ 8018a42:	2b00      	cmp	r3, #0
+ 8018a44:	d002      	beq.n	8018a4c <dhcp_bind+0x124>
+    dhcp->t1_timeout = 0;
+ 8018a46:	69bb      	ldr	r3, [r7, #24]
+ 8018a48:	2200      	movs	r2, #0
+ 8018a4a:	815a      	strh	r2, [r3, #10]
+  }
+
+  if (dhcp->subnet_mask_given) {
+ 8018a4c:	69bb      	ldr	r3, [r7, #24]
+ 8018a4e:	79db      	ldrb	r3, [r3, #7]
+ 8018a50:	2b00      	cmp	r3, #0
+ 8018a52:	d003      	beq.n	8018a5c <dhcp_bind+0x134>
+    /* copy offered network mask */
+    ip4_addr_copy(sn_mask, dhcp->offered_sn_mask);
+ 8018a54:	69bb      	ldr	r3, [r7, #24]
+ 8018a56:	6a1b      	ldr	r3, [r3, #32]
+ 8018a58:	613b      	str	r3, [r7, #16]
+ 8018a5a:	e014      	b.n	8018a86 <dhcp_bind+0x15e>
+  } else {
+    /* subnet mask not given, choose a safe subnet mask given the network class */
+    u8_t first_octet = ip4_addr1(&dhcp->offered_ip_addr);
+ 8018a5c:	69bb      	ldr	r3, [r7, #24]
+ 8018a5e:	331c      	adds	r3, #28
+ 8018a60:	781b      	ldrb	r3, [r3, #0]
+ 8018a62:	75fb      	strb	r3, [r7, #23]
+    if (first_octet <= 127) {
+ 8018a64:	f997 3017 	ldrsb.w	r3, [r7, #23]
+ 8018a68:	2b00      	cmp	r3, #0
+ 8018a6a:	db02      	blt.n	8018a72 <dhcp_bind+0x14a>
+      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xff000000UL));
+ 8018a6c:	23ff      	movs	r3, #255	; 0xff
+ 8018a6e:	613b      	str	r3, [r7, #16]
+ 8018a70:	e009      	b.n	8018a86 <dhcp_bind+0x15e>
+    } else if (first_octet >= 192) {
+ 8018a72:	7dfb      	ldrb	r3, [r7, #23]
+ 8018a74:	2bbf      	cmp	r3, #191	; 0xbf
+ 8018a76:	d903      	bls.n	8018a80 <dhcp_bind+0x158>
+      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffffff00UL));
+ 8018a78:	f06f 437f 	mvn.w	r3, #4278190080	; 0xff000000
+ 8018a7c:	613b      	str	r3, [r7, #16]
+ 8018a7e:	e002      	b.n	8018a86 <dhcp_bind+0x15e>
+    } else {
+      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffff0000UL));
+ 8018a80:	f64f 73ff 	movw	r3, #65535	; 0xffff
+ 8018a84:	613b      	str	r3, [r7, #16]
+    }
+  }
+
+  ip4_addr_copy(gw_addr, dhcp->offered_gw_addr);
+ 8018a86:	69bb      	ldr	r3, [r7, #24]
+ 8018a88:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8018a8a:	60fb      	str	r3, [r7, #12]
+  /* gateway address not given? */
+  if (ip4_addr_isany_val(gw_addr)) {
+ 8018a8c:	68fb      	ldr	r3, [r7, #12]
+ 8018a8e:	2b00      	cmp	r3, #0
+ 8018a90:	d108      	bne.n	8018aa4 <dhcp_bind+0x17c>
+    /* copy network address */
+    ip4_addr_get_network(&gw_addr, &dhcp->offered_ip_addr, &sn_mask);
+ 8018a92:	69bb      	ldr	r3, [r7, #24]
+ 8018a94:	69da      	ldr	r2, [r3, #28]
+ 8018a96:	693b      	ldr	r3, [r7, #16]
+ 8018a98:	4013      	ands	r3, r2
+ 8018a9a:	60fb      	str	r3, [r7, #12]
+    /* use first host address on network as gateway */
+    ip4_addr_set_u32(&gw_addr, ip4_addr_get_u32(&gw_addr) | PP_HTONL(0x00000001UL));
+ 8018a9c:	68fb      	ldr	r3, [r7, #12]
+ 8018a9e:	f043 7380 	orr.w	r3, r3, #16777216	; 0x1000000
+ 8018aa2:	60fb      	str	r3, [r7, #12]
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F" SN: 0x%08"X32_F" GW: 0x%08"X32_F"\n",
+              ip4_addr_get_u32(&dhcp->offered_ip_addr), ip4_addr_get_u32(&sn_mask), ip4_addr_get_u32(&gw_addr)));
+  /* netif is now bound to DHCP leased address - set this before assigning the address
+     to ensure the callback can use dhcp_supplied_address() */
+  dhcp_set_state(dhcp, DHCP_STATE_BOUND);
+ 8018aa4:	210a      	movs	r1, #10
+ 8018aa6:	69b8      	ldr	r0, [r7, #24]
+ 8018aa8:	f000 faa0 	bl	8018fec <dhcp_set_state>
+
+  netif_set_addr(netif, &dhcp->offered_ip_addr, &sn_mask, &gw_addr);
+ 8018aac:	69bb      	ldr	r3, [r7, #24]
+ 8018aae:	f103 011c 	add.w	r1, r3, #28
+ 8018ab2:	f107 030c 	add.w	r3, r7, #12
+ 8018ab6:	f107 0210 	add.w	r2, r7, #16
+ 8018aba:	6878      	ldr	r0, [r7, #4]
+ 8018abc:	f7f8 fa62 	bl	8010f84 <netif_set_addr>
+  /* interface is used by routing now that an address is set */
+}
+ 8018ac0:	3720      	adds	r7, #32
+ 8018ac2:	46bd      	mov	sp, r7
+ 8018ac4:	bd80      	pop	{r7, pc}
+ 8018ac6:	bf00      	nop
+ 8018ac8:	0801fac8 	.word	0x0801fac8
+ 8018acc:	0801fc28 	.word	0x0801fc28
+ 8018ad0:	0801fb28 	.word	0x0801fb28
+ 8018ad4:	0801fc44 	.word	0x0801fc44
+ 8018ad8:	88888889 	.word	0x88888889
+
+08018adc <dhcp_renew>:
+ *
+ * @param netif network interface which must renew its lease
+ */
+err_t
+dhcp_renew(struct netif *netif)
+{
+ 8018adc:	b580      	push	{r7, lr}
+ 8018ade:	b08a      	sub	sp, #40	; 0x28
+ 8018ae0:	af02      	add	r7, sp, #8
+ 8018ae2:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 8018ae4:	687b      	ldr	r3, [r7, #4]
+ 8018ae6:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8018ae8:	61bb      	str	r3, [r7, #24]
+  struct pbuf *p_out;
+  u16_t options_out_len;
+
+  LWIP_ASSERT_CORE_LOCKED();
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_renew()\n"));
+  dhcp_set_state(dhcp, DHCP_STATE_RENEWING);
+ 8018aea:	2105      	movs	r1, #5
+ 8018aec:	69b8      	ldr	r0, [r7, #24]
+ 8018aee:	f000 fa7d 	bl	8018fec <dhcp_set_state>
+
+  /* create and initialize the DHCP message header */
+  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
+ 8018af2:	f107 030c 	add.w	r3, r7, #12
+ 8018af6:	2203      	movs	r2, #3
+ 8018af8:	69b9      	ldr	r1, [r7, #24]
+ 8018afa:	6878      	ldr	r0, [r7, #4]
+ 8018afc:	f000 ff00 	bl	8019900 <dhcp_create_msg>
+ 8018b00:	6178      	str	r0, [r7, #20]
+  if (p_out != NULL) {
+ 8018b02:	697b      	ldr	r3, [r7, #20]
+ 8018b04:	2b00      	cmp	r3, #0
+ 8018b06:	d04e      	beq.n	8018ba6 <dhcp_renew+0xca>
+    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
+ 8018b08:	697b      	ldr	r3, [r7, #20]
+ 8018b0a:	685b      	ldr	r3, [r3, #4]
+ 8018b0c:	613b      	str	r3, [r7, #16]
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
+ 8018b0e:	89b8      	ldrh	r0, [r7, #12]
+ 8018b10:	693b      	ldr	r3, [r7, #16]
+ 8018b12:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018b16:	2302      	movs	r3, #2
+ 8018b18:	2239      	movs	r2, #57	; 0x39
+ 8018b1a:	f000 fa81 	bl	8019020 <dhcp_option>
+ 8018b1e:	4603      	mov	r3, r0
+ 8018b20:	81bb      	strh	r3, [r7, #12]
+    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
+ 8018b22:	89b8      	ldrh	r0, [r7, #12]
+ 8018b24:	693b      	ldr	r3, [r7, #16]
+ 8018b26:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018b2a:	687b      	ldr	r3, [r7, #4]
+ 8018b2c:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8018b2e:	461a      	mov	r2, r3
+ 8018b30:	f000 fad0 	bl	80190d4 <dhcp_option_short>
+ 8018b34:	4603      	mov	r3, r0
+ 8018b36:	81bb      	strh	r3, [r7, #12]
+
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
+ 8018b38:	89b8      	ldrh	r0, [r7, #12]
+ 8018b3a:	693b      	ldr	r3, [r7, #16]
+ 8018b3c:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018b40:	2303      	movs	r3, #3
+ 8018b42:	2237      	movs	r2, #55	; 0x37
+ 8018b44:	f000 fa6c 	bl	8019020 <dhcp_option>
+ 8018b48:	4603      	mov	r3, r0
+ 8018b4a:	81bb      	strh	r3, [r7, #12]
+    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
+ 8018b4c:	2300      	movs	r3, #0
+ 8018b4e:	77bb      	strb	r3, [r7, #30]
+ 8018b50:	e00e      	b.n	8018b70 <dhcp_renew+0x94>
+      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
+ 8018b52:	89b8      	ldrh	r0, [r7, #12]
+ 8018b54:	693b      	ldr	r3, [r7, #16]
+ 8018b56:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018b5a:	7fbb      	ldrb	r3, [r7, #30]
+ 8018b5c:	4a2a      	ldr	r2, [pc, #168]	; (8018c08 <dhcp_renew+0x12c>)
+ 8018b5e:	5cd3      	ldrb	r3, [r2, r3]
+ 8018b60:	461a      	mov	r2, r3
+ 8018b62:	f000 fa91 	bl	8019088 <dhcp_option_byte>
+ 8018b66:	4603      	mov	r3, r0
+ 8018b68:	81bb      	strh	r3, [r7, #12]
+    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
+ 8018b6a:	7fbb      	ldrb	r3, [r7, #30]
+ 8018b6c:	3301      	adds	r3, #1
+ 8018b6e:	77bb      	strb	r3, [r7, #30]
+ 8018b70:	7fbb      	ldrb	r3, [r7, #30]
+ 8018b72:	2b02      	cmp	r3, #2
+ 8018b74:	d9ed      	bls.n	8018b52 <dhcp_renew+0x76>
+#if LWIP_NETIF_HOSTNAME
+    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
+#endif /* LWIP_NETIF_HOSTNAME */
+
+    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_RENEWING, msg_out, DHCP_REQUEST, &options_out_len);
+    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
+ 8018b76:	89b8      	ldrh	r0, [r7, #12]
+ 8018b78:	693b      	ldr	r3, [r7, #16]
+ 8018b7a:	33f0      	adds	r3, #240	; 0xf0
+ 8018b7c:	697a      	ldr	r2, [r7, #20]
+ 8018b7e:	4619      	mov	r1, r3
+ 8018b80:	f000 ff94 	bl	8019aac <dhcp_option_trailer>
+
+    result = udp_sendto_if(dhcp_pcb, p_out, &dhcp->server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
+ 8018b84:	4b21      	ldr	r3, [pc, #132]	; (8018c0c <dhcp_renew+0x130>)
+ 8018b86:	6818      	ldr	r0, [r3, #0]
+ 8018b88:	69bb      	ldr	r3, [r7, #24]
+ 8018b8a:	f103 0218 	add.w	r2, r3, #24
+ 8018b8e:	687b      	ldr	r3, [r7, #4]
+ 8018b90:	9300      	str	r3, [sp, #0]
+ 8018b92:	2343      	movs	r3, #67	; 0x43
+ 8018b94:	6979      	ldr	r1, [r7, #20]
+ 8018b96:	f7fe fe3f 	bl	8017818 <udp_sendto_if>
+ 8018b9a:	4603      	mov	r3, r0
+ 8018b9c:	77fb      	strb	r3, [r7, #31]
+    pbuf_free(p_out);
+ 8018b9e:	6978      	ldr	r0, [r7, #20]
+ 8018ba0:	f7f8 fefa 	bl	8011998 <pbuf_free>
+ 8018ba4:	e001      	b.n	8018baa <dhcp_renew+0xce>
+
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew: RENEWING\n"));
+  } else {
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_renew: could not allocate DHCP request\n"));
+    result = ERR_MEM;
+ 8018ba6:	23ff      	movs	r3, #255	; 0xff
+ 8018ba8:	77fb      	strb	r3, [r7, #31]
+  }
+  if (dhcp->tries < 255) {
+ 8018baa:	69bb      	ldr	r3, [r7, #24]
+ 8018bac:	799b      	ldrb	r3, [r3, #6]
+ 8018bae:	2bff      	cmp	r3, #255	; 0xff
+ 8018bb0:	d005      	beq.n	8018bbe <dhcp_renew+0xe2>
+    dhcp->tries++;
+ 8018bb2:	69bb      	ldr	r3, [r7, #24]
+ 8018bb4:	799b      	ldrb	r3, [r3, #6]
+ 8018bb6:	3301      	adds	r3, #1
+ 8018bb8:	b2da      	uxtb	r2, r3
+ 8018bba:	69bb      	ldr	r3, [r7, #24]
+ 8018bbc:	719a      	strb	r2, [r3, #6]
+  }
+  /* back-off on retries, but to a maximum of 20 seconds */
+  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000);
+ 8018bbe:	69bb      	ldr	r3, [r7, #24]
+ 8018bc0:	799b      	ldrb	r3, [r3, #6]
+ 8018bc2:	2b09      	cmp	r3, #9
+ 8018bc4:	d80a      	bhi.n	8018bdc <dhcp_renew+0x100>
+ 8018bc6:	69bb      	ldr	r3, [r7, #24]
+ 8018bc8:	799b      	ldrb	r3, [r3, #6]
+ 8018bca:	b29b      	uxth	r3, r3
+ 8018bcc:	461a      	mov	r2, r3
+ 8018bce:	0152      	lsls	r2, r2, #5
+ 8018bd0:	1ad2      	subs	r2, r2, r3
+ 8018bd2:	0092      	lsls	r2, r2, #2
+ 8018bd4:	4413      	add	r3, r2
+ 8018bd6:	011b      	lsls	r3, r3, #4
+ 8018bd8:	b29b      	uxth	r3, r3
+ 8018bda:	e001      	b.n	8018be0 <dhcp_renew+0x104>
+ 8018bdc:	f644 6320 	movw	r3, #20000	; 0x4e20
+ 8018be0:	81fb      	strh	r3, [r7, #14]
+  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
+ 8018be2:	89fb      	ldrh	r3, [r7, #14]
+ 8018be4:	f203 13f3 	addw	r3, r3, #499	; 0x1f3
+ 8018be8:	4a09      	ldr	r2, [pc, #36]	; (8018c10 <dhcp_renew+0x134>)
+ 8018bea:	fb82 1203 	smull	r1, r2, r2, r3
+ 8018bee:	1152      	asrs	r2, r2, #5
+ 8018bf0:	17db      	asrs	r3, r3, #31
+ 8018bf2:	1ad3      	subs	r3, r2, r3
+ 8018bf4:	b29a      	uxth	r2, r3
+ 8018bf6:	69bb      	ldr	r3, [r7, #24]
+ 8018bf8:	811a      	strh	r2, [r3, #8]
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs));
+  return result;
+ 8018bfa:	f997 301f 	ldrsb.w	r3, [r7, #31]
+}
+ 8018bfe:	4618      	mov	r0, r3
+ 8018c00:	3720      	adds	r7, #32
+ 8018c02:	46bd      	mov	sp, r7
+ 8018c04:	bd80      	pop	{r7, pc}
+ 8018c06:	bf00      	nop
+ 8018c08:	2000006c 	.word	0x2000006c
+ 8018c0c:	20008758 	.word	0x20008758
+ 8018c10:	10624dd3 	.word	0x10624dd3
+
+08018c14 <dhcp_rebind>:
+ *
+ * @param netif network interface which must rebind with a DHCP server
+ */
+static err_t
+dhcp_rebind(struct netif *netif)
+{
+ 8018c14:	b580      	push	{r7, lr}
+ 8018c16:	b08a      	sub	sp, #40	; 0x28
+ 8018c18:	af02      	add	r7, sp, #8
+ 8018c1a:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 8018c1c:	687b      	ldr	r3, [r7, #4]
+ 8018c1e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8018c20:	61bb      	str	r3, [r7, #24]
+  u8_t i;
+  struct pbuf *p_out;
+  u16_t options_out_len;
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind()\n"));
+  dhcp_set_state(dhcp, DHCP_STATE_REBINDING);
+ 8018c22:	2104      	movs	r1, #4
+ 8018c24:	69b8      	ldr	r0, [r7, #24]
+ 8018c26:	f000 f9e1 	bl	8018fec <dhcp_set_state>
+
+  /* create and initialize the DHCP message header */
+  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
+ 8018c2a:	f107 030c 	add.w	r3, r7, #12
+ 8018c2e:	2203      	movs	r2, #3
+ 8018c30:	69b9      	ldr	r1, [r7, #24]
+ 8018c32:	6878      	ldr	r0, [r7, #4]
+ 8018c34:	f000 fe64 	bl	8019900 <dhcp_create_msg>
+ 8018c38:	6178      	str	r0, [r7, #20]
+  if (p_out != NULL) {
+ 8018c3a:	697b      	ldr	r3, [r7, #20]
+ 8018c3c:	2b00      	cmp	r3, #0
+ 8018c3e:	d04c      	beq.n	8018cda <dhcp_rebind+0xc6>
+    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
+ 8018c40:	697b      	ldr	r3, [r7, #20]
+ 8018c42:	685b      	ldr	r3, [r3, #4]
+ 8018c44:	613b      	str	r3, [r7, #16]
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
+ 8018c46:	89b8      	ldrh	r0, [r7, #12]
+ 8018c48:	693b      	ldr	r3, [r7, #16]
+ 8018c4a:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018c4e:	2302      	movs	r3, #2
+ 8018c50:	2239      	movs	r2, #57	; 0x39
+ 8018c52:	f000 f9e5 	bl	8019020 <dhcp_option>
+ 8018c56:	4603      	mov	r3, r0
+ 8018c58:	81bb      	strh	r3, [r7, #12]
+    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
+ 8018c5a:	89b8      	ldrh	r0, [r7, #12]
+ 8018c5c:	693b      	ldr	r3, [r7, #16]
+ 8018c5e:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018c62:	687b      	ldr	r3, [r7, #4]
+ 8018c64:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 8018c66:	461a      	mov	r2, r3
+ 8018c68:	f000 fa34 	bl	80190d4 <dhcp_option_short>
+ 8018c6c:	4603      	mov	r3, r0
+ 8018c6e:	81bb      	strh	r3, [r7, #12]
+
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
+ 8018c70:	89b8      	ldrh	r0, [r7, #12]
+ 8018c72:	693b      	ldr	r3, [r7, #16]
+ 8018c74:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018c78:	2303      	movs	r3, #3
+ 8018c7a:	2237      	movs	r2, #55	; 0x37
+ 8018c7c:	f000 f9d0 	bl	8019020 <dhcp_option>
+ 8018c80:	4603      	mov	r3, r0
+ 8018c82:	81bb      	strh	r3, [r7, #12]
+    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
+ 8018c84:	2300      	movs	r3, #0
+ 8018c86:	77bb      	strb	r3, [r7, #30]
+ 8018c88:	e00e      	b.n	8018ca8 <dhcp_rebind+0x94>
+      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
+ 8018c8a:	89b8      	ldrh	r0, [r7, #12]
+ 8018c8c:	693b      	ldr	r3, [r7, #16]
+ 8018c8e:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018c92:	7fbb      	ldrb	r3, [r7, #30]
+ 8018c94:	4a29      	ldr	r2, [pc, #164]	; (8018d3c <dhcp_rebind+0x128>)
+ 8018c96:	5cd3      	ldrb	r3, [r2, r3]
+ 8018c98:	461a      	mov	r2, r3
+ 8018c9a:	f000 f9f5 	bl	8019088 <dhcp_option_byte>
+ 8018c9e:	4603      	mov	r3, r0
+ 8018ca0:	81bb      	strh	r3, [r7, #12]
+    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
+ 8018ca2:	7fbb      	ldrb	r3, [r7, #30]
+ 8018ca4:	3301      	adds	r3, #1
+ 8018ca6:	77bb      	strb	r3, [r7, #30]
+ 8018ca8:	7fbb      	ldrb	r3, [r7, #30]
+ 8018caa:	2b02      	cmp	r3, #2
+ 8018cac:	d9ed      	bls.n	8018c8a <dhcp_rebind+0x76>
+#if LWIP_NETIF_HOSTNAME
+    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
+#endif /* LWIP_NETIF_HOSTNAME */
+
+    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBINDING, msg_out, DHCP_DISCOVER, &options_out_len);
+    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
+ 8018cae:	89b8      	ldrh	r0, [r7, #12]
+ 8018cb0:	693b      	ldr	r3, [r7, #16]
+ 8018cb2:	33f0      	adds	r3, #240	; 0xf0
+ 8018cb4:	697a      	ldr	r2, [r7, #20]
+ 8018cb6:	4619      	mov	r1, r3
+ 8018cb8:	f000 fef8 	bl	8019aac <dhcp_option_trailer>
+
+    /* broadcast to server */
+    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
+ 8018cbc:	4b20      	ldr	r3, [pc, #128]	; (8018d40 <dhcp_rebind+0x12c>)
+ 8018cbe:	6818      	ldr	r0, [r3, #0]
+ 8018cc0:	687b      	ldr	r3, [r7, #4]
+ 8018cc2:	9300      	str	r3, [sp, #0]
+ 8018cc4:	2343      	movs	r3, #67	; 0x43
+ 8018cc6:	4a1f      	ldr	r2, [pc, #124]	; (8018d44 <dhcp_rebind+0x130>)
+ 8018cc8:	6979      	ldr	r1, [r7, #20]
+ 8018cca:	f7fe fda5 	bl	8017818 <udp_sendto_if>
+ 8018cce:	4603      	mov	r3, r0
+ 8018cd0:	77fb      	strb	r3, [r7, #31]
+    pbuf_free(p_out);
+ 8018cd2:	6978      	ldr	r0, [r7, #20]
+ 8018cd4:	f7f8 fe60 	bl	8011998 <pbuf_free>
+ 8018cd8:	e001      	b.n	8018cde <dhcp_rebind+0xca>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind: REBINDING\n"));
+  } else {
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_rebind: could not allocate DHCP request\n"));
+    result = ERR_MEM;
+ 8018cda:	23ff      	movs	r3, #255	; 0xff
+ 8018cdc:	77fb      	strb	r3, [r7, #31]
+  }
+  if (dhcp->tries < 255) {
+ 8018cde:	69bb      	ldr	r3, [r7, #24]
+ 8018ce0:	799b      	ldrb	r3, [r3, #6]
+ 8018ce2:	2bff      	cmp	r3, #255	; 0xff
+ 8018ce4:	d005      	beq.n	8018cf2 <dhcp_rebind+0xde>
+    dhcp->tries++;
+ 8018ce6:	69bb      	ldr	r3, [r7, #24]
+ 8018ce8:	799b      	ldrb	r3, [r3, #6]
+ 8018cea:	3301      	adds	r3, #1
+ 8018cec:	b2da      	uxtb	r2, r3
+ 8018cee:	69bb      	ldr	r3, [r7, #24]
+ 8018cf0:	719a      	strb	r2, [r3, #6]
+  }
+  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
+ 8018cf2:	69bb      	ldr	r3, [r7, #24]
+ 8018cf4:	799b      	ldrb	r3, [r3, #6]
+ 8018cf6:	2b09      	cmp	r3, #9
+ 8018cf8:	d80a      	bhi.n	8018d10 <dhcp_rebind+0xfc>
+ 8018cfa:	69bb      	ldr	r3, [r7, #24]
+ 8018cfc:	799b      	ldrb	r3, [r3, #6]
+ 8018cfe:	b29b      	uxth	r3, r3
+ 8018d00:	461a      	mov	r2, r3
+ 8018d02:	0152      	lsls	r2, r2, #5
+ 8018d04:	1ad2      	subs	r2, r2, r3
+ 8018d06:	0092      	lsls	r2, r2, #2
+ 8018d08:	4413      	add	r3, r2
+ 8018d0a:	00db      	lsls	r3, r3, #3
+ 8018d0c:	b29b      	uxth	r3, r3
+ 8018d0e:	e001      	b.n	8018d14 <dhcp_rebind+0x100>
+ 8018d10:	f242 7310 	movw	r3, #10000	; 0x2710
+ 8018d14:	81fb      	strh	r3, [r7, #14]
+  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
+ 8018d16:	89fb      	ldrh	r3, [r7, #14]
+ 8018d18:	f203 13f3 	addw	r3, r3, #499	; 0x1f3
+ 8018d1c:	4a0a      	ldr	r2, [pc, #40]	; (8018d48 <dhcp_rebind+0x134>)
+ 8018d1e:	fb82 1203 	smull	r1, r2, r2, r3
+ 8018d22:	1152      	asrs	r2, r2, #5
+ 8018d24:	17db      	asrs	r3, r3, #31
+ 8018d26:	1ad3      	subs	r3, r2, r3
+ 8018d28:	b29a      	uxth	r2, r3
+ 8018d2a:	69bb      	ldr	r3, [r7, #24]
+ 8018d2c:	811a      	strh	r2, [r3, #8]
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs));
+  return result;
+ 8018d2e:	f997 301f 	ldrsb.w	r3, [r7, #31]
+}
+ 8018d32:	4618      	mov	r0, r3
+ 8018d34:	3720      	adds	r7, #32
+ 8018d36:	46bd      	mov	sp, r7
+ 8018d38:	bd80      	pop	{r7, pc}
+ 8018d3a:	bf00      	nop
+ 8018d3c:	2000006c 	.word	0x2000006c
+ 8018d40:	20008758 	.word	0x20008758
+ 8018d44:	0802259c 	.word	0x0802259c
+ 8018d48:	10624dd3 	.word	0x10624dd3
+
+08018d4c <dhcp_reboot>:
+ *
+ * @param netif network interface which must reboot
+ */
+static err_t
+dhcp_reboot(struct netif *netif)
+{
+ 8018d4c:	b5b0      	push	{r4, r5, r7, lr}
+ 8018d4e:	b08a      	sub	sp, #40	; 0x28
+ 8018d50:	af02      	add	r7, sp, #8
+ 8018d52:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 8018d54:	687b      	ldr	r3, [r7, #4]
+ 8018d56:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8018d58:	61bb      	str	r3, [r7, #24]
+  u8_t i;
+  struct pbuf *p_out;
+  u16_t options_out_len;
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot()\n"));
+  dhcp_set_state(dhcp, DHCP_STATE_REBOOTING);
+ 8018d5a:	2103      	movs	r1, #3
+ 8018d5c:	69b8      	ldr	r0, [r7, #24]
+ 8018d5e:	f000 f945 	bl	8018fec <dhcp_set_state>
+
+  /* create and initialize the DHCP message header */
+  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
+ 8018d62:	f107 030c 	add.w	r3, r7, #12
+ 8018d66:	2203      	movs	r2, #3
+ 8018d68:	69b9      	ldr	r1, [r7, #24]
+ 8018d6a:	6878      	ldr	r0, [r7, #4]
+ 8018d6c:	f000 fdc8 	bl	8019900 <dhcp_create_msg>
+ 8018d70:	6178      	str	r0, [r7, #20]
+  if (p_out != NULL) {
+ 8018d72:	697b      	ldr	r3, [r7, #20]
+ 8018d74:	2b00      	cmp	r3, #0
+ 8018d76:	d066      	beq.n	8018e46 <dhcp_reboot+0xfa>
+    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
+ 8018d78:	697b      	ldr	r3, [r7, #20]
+ 8018d7a:	685b      	ldr	r3, [r3, #4]
+ 8018d7c:	613b      	str	r3, [r7, #16]
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
+ 8018d7e:	89b8      	ldrh	r0, [r7, #12]
+ 8018d80:	693b      	ldr	r3, [r7, #16]
+ 8018d82:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018d86:	2302      	movs	r3, #2
+ 8018d88:	2239      	movs	r2, #57	; 0x39
+ 8018d8a:	f000 f949 	bl	8019020 <dhcp_option>
+ 8018d8e:	4603      	mov	r3, r0
+ 8018d90:	81bb      	strh	r3, [r7, #12]
+    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN_MIN_REQUIRED);
+ 8018d92:	89b8      	ldrh	r0, [r7, #12]
+ 8018d94:	693b      	ldr	r3, [r7, #16]
+ 8018d96:	33f0      	adds	r3, #240	; 0xf0
+ 8018d98:	f44f 7210 	mov.w	r2, #576	; 0x240
+ 8018d9c:	4619      	mov	r1, r3
+ 8018d9e:	f000 f999 	bl	80190d4 <dhcp_option_short>
+ 8018da2:	4603      	mov	r3, r0
+ 8018da4:	81bb      	strh	r3, [r7, #12]
+
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
+ 8018da6:	89b8      	ldrh	r0, [r7, #12]
+ 8018da8:	693b      	ldr	r3, [r7, #16]
+ 8018daa:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018dae:	2304      	movs	r3, #4
+ 8018db0:	2232      	movs	r2, #50	; 0x32
+ 8018db2:	f000 f935 	bl	8019020 <dhcp_option>
+ 8018db6:	4603      	mov	r3, r0
+ 8018db8:	81bb      	strh	r3, [r7, #12]
+    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
+ 8018dba:	89bc      	ldrh	r4, [r7, #12]
+ 8018dbc:	693b      	ldr	r3, [r7, #16]
+ 8018dbe:	f103 05f0 	add.w	r5, r3, #240	; 0xf0
+ 8018dc2:	69bb      	ldr	r3, [r7, #24]
+ 8018dc4:	69db      	ldr	r3, [r3, #28]
+ 8018dc6:	4618      	mov	r0, r3
+ 8018dc8:	f7f7 fa47 	bl	801025a <lwip_htonl>
+ 8018dcc:	4603      	mov	r3, r0
+ 8018dce:	461a      	mov	r2, r3
+ 8018dd0:	4629      	mov	r1, r5
+ 8018dd2:	4620      	mov	r0, r4
+ 8018dd4:	f000 f9b0 	bl	8019138 <dhcp_option_long>
+ 8018dd8:	4603      	mov	r3, r0
+ 8018dda:	81bb      	strh	r3, [r7, #12]
+
+    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
+ 8018ddc:	89b8      	ldrh	r0, [r7, #12]
+ 8018dde:	693b      	ldr	r3, [r7, #16]
+ 8018de0:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018de4:	2303      	movs	r3, #3
+ 8018de6:	2237      	movs	r2, #55	; 0x37
+ 8018de8:	f000 f91a 	bl	8019020 <dhcp_option>
+ 8018dec:	4603      	mov	r3, r0
+ 8018dee:	81bb      	strh	r3, [r7, #12]
+    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
+ 8018df0:	2300      	movs	r3, #0
+ 8018df2:	77bb      	strb	r3, [r7, #30]
+ 8018df4:	e00e      	b.n	8018e14 <dhcp_reboot+0xc8>
+      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
+ 8018df6:	89b8      	ldrh	r0, [r7, #12]
+ 8018df8:	693b      	ldr	r3, [r7, #16]
+ 8018dfa:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018dfe:	7fbb      	ldrb	r3, [r7, #30]
+ 8018e00:	4a29      	ldr	r2, [pc, #164]	; (8018ea8 <dhcp_reboot+0x15c>)
+ 8018e02:	5cd3      	ldrb	r3, [r2, r3]
+ 8018e04:	461a      	mov	r2, r3
+ 8018e06:	f000 f93f 	bl	8019088 <dhcp_option_byte>
+ 8018e0a:	4603      	mov	r3, r0
+ 8018e0c:	81bb      	strh	r3, [r7, #12]
+    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
+ 8018e0e:	7fbb      	ldrb	r3, [r7, #30]
+ 8018e10:	3301      	adds	r3, #1
+ 8018e12:	77bb      	strb	r3, [r7, #30]
+ 8018e14:	7fbb      	ldrb	r3, [r7, #30]
+ 8018e16:	2b02      	cmp	r3, #2
+ 8018e18:	d9ed      	bls.n	8018df6 <dhcp_reboot+0xaa>
+#if LWIP_NETIF_HOSTNAME
+    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
+#endif /* LWIP_NETIF_HOSTNAME */
+
+    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBOOTING, msg_out, DHCP_REQUEST, &options_out_len);
+    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
+ 8018e1a:	89b8      	ldrh	r0, [r7, #12]
+ 8018e1c:	693b      	ldr	r3, [r7, #16]
+ 8018e1e:	33f0      	adds	r3, #240	; 0xf0
+ 8018e20:	697a      	ldr	r2, [r7, #20]
+ 8018e22:	4619      	mov	r1, r3
+ 8018e24:	f000 fe42 	bl	8019aac <dhcp_option_trailer>
+
+    /* broadcast to server */
+    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
+ 8018e28:	4b20      	ldr	r3, [pc, #128]	; (8018eac <dhcp_reboot+0x160>)
+ 8018e2a:	6818      	ldr	r0, [r3, #0]
+ 8018e2c:	687b      	ldr	r3, [r7, #4]
+ 8018e2e:	9300      	str	r3, [sp, #0]
+ 8018e30:	2343      	movs	r3, #67	; 0x43
+ 8018e32:	4a1f      	ldr	r2, [pc, #124]	; (8018eb0 <dhcp_reboot+0x164>)
+ 8018e34:	6979      	ldr	r1, [r7, #20]
+ 8018e36:	f7fe fcef 	bl	8017818 <udp_sendto_if>
+ 8018e3a:	4603      	mov	r3, r0
+ 8018e3c:	77fb      	strb	r3, [r7, #31]
+    pbuf_free(p_out);
+ 8018e3e:	6978      	ldr	r0, [r7, #20]
+ 8018e40:	f7f8 fdaa 	bl	8011998 <pbuf_free>
+ 8018e44:	e001      	b.n	8018e4a <dhcp_reboot+0xfe>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot: REBOOTING\n"));
+  } else {
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_reboot: could not allocate DHCP request\n"));
+    result = ERR_MEM;
+ 8018e46:	23ff      	movs	r3, #255	; 0xff
+ 8018e48:	77fb      	strb	r3, [r7, #31]
+  }
+  if (dhcp->tries < 255) {
+ 8018e4a:	69bb      	ldr	r3, [r7, #24]
+ 8018e4c:	799b      	ldrb	r3, [r3, #6]
+ 8018e4e:	2bff      	cmp	r3, #255	; 0xff
+ 8018e50:	d005      	beq.n	8018e5e <dhcp_reboot+0x112>
+    dhcp->tries++;
+ 8018e52:	69bb      	ldr	r3, [r7, #24]
+ 8018e54:	799b      	ldrb	r3, [r3, #6]
+ 8018e56:	3301      	adds	r3, #1
+ 8018e58:	b2da      	uxtb	r2, r3
+ 8018e5a:	69bb      	ldr	r3, [r7, #24]
+ 8018e5c:	719a      	strb	r2, [r3, #6]
+  }
+  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
+ 8018e5e:	69bb      	ldr	r3, [r7, #24]
+ 8018e60:	799b      	ldrb	r3, [r3, #6]
+ 8018e62:	2b09      	cmp	r3, #9
+ 8018e64:	d80a      	bhi.n	8018e7c <dhcp_reboot+0x130>
+ 8018e66:	69bb      	ldr	r3, [r7, #24]
+ 8018e68:	799b      	ldrb	r3, [r3, #6]
+ 8018e6a:	b29b      	uxth	r3, r3
+ 8018e6c:	461a      	mov	r2, r3
+ 8018e6e:	0152      	lsls	r2, r2, #5
+ 8018e70:	1ad2      	subs	r2, r2, r3
+ 8018e72:	0092      	lsls	r2, r2, #2
+ 8018e74:	4413      	add	r3, r2
+ 8018e76:	00db      	lsls	r3, r3, #3
+ 8018e78:	b29b      	uxth	r3, r3
+ 8018e7a:	e001      	b.n	8018e80 <dhcp_reboot+0x134>
+ 8018e7c:	f242 7310 	movw	r3, #10000	; 0x2710
+ 8018e80:	81fb      	strh	r3, [r7, #14]
+  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
+ 8018e82:	89fb      	ldrh	r3, [r7, #14]
+ 8018e84:	f203 13f3 	addw	r3, r3, #499	; 0x1f3
+ 8018e88:	4a0a      	ldr	r2, [pc, #40]	; (8018eb4 <dhcp_reboot+0x168>)
+ 8018e8a:	fb82 1203 	smull	r1, r2, r2, r3
+ 8018e8e:	1152      	asrs	r2, r2, #5
+ 8018e90:	17db      	asrs	r3, r3, #31
+ 8018e92:	1ad3      	subs	r3, r2, r3
+ 8018e94:	b29a      	uxth	r2, r3
+ 8018e96:	69bb      	ldr	r3, [r7, #24]
+ 8018e98:	811a      	strh	r2, [r3, #8]
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot(): set request timeout %"U16_F" msecs\n", msecs));
+  return result;
+ 8018e9a:	f997 301f 	ldrsb.w	r3, [r7, #31]
+}
+ 8018e9e:	4618      	mov	r0, r3
+ 8018ea0:	3720      	adds	r7, #32
+ 8018ea2:	46bd      	mov	sp, r7
+ 8018ea4:	bdb0      	pop	{r4, r5, r7, pc}
+ 8018ea6:	bf00      	nop
+ 8018ea8:	2000006c 	.word	0x2000006c
+ 8018eac:	20008758 	.word	0x20008758
+ 8018eb0:	0802259c 	.word	0x0802259c
+ 8018eb4:	10624dd3 	.word	0x10624dd3
+
+08018eb8 <dhcp_release_and_stop>:
+ *
+ * @param netif network interface
+ */
+void
+dhcp_release_and_stop(struct netif *netif)
+{
+ 8018eb8:	b5b0      	push	{r4, r5, r7, lr}
+ 8018eba:	b08a      	sub	sp, #40	; 0x28
+ 8018ebc:	af02      	add	r7, sp, #8
+ 8018ebe:	6078      	str	r0, [r7, #4]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 8018ec0:	687b      	ldr	r3, [r7, #4]
+ 8018ec2:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8018ec4:	61fb      	str	r3, [r7, #28]
+  ip_addr_t server_ip_addr;
+
+  LWIP_ASSERT_CORE_LOCKED();
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_release_and_stop()\n"));
+  if (dhcp == NULL) {
+ 8018ec6:	69fb      	ldr	r3, [r7, #28]
+ 8018ec8:	2b00      	cmp	r3, #0
+ 8018eca:	f000 8084 	beq.w	8018fd6 <dhcp_release_and_stop+0x11e>
+    return;
+  }
+
+  /* already off? -> nothing to do */
+  if (dhcp->state == DHCP_STATE_OFF) {
+ 8018ece:	69fb      	ldr	r3, [r7, #28]
+ 8018ed0:	795b      	ldrb	r3, [r3, #5]
+ 8018ed2:	2b00      	cmp	r3, #0
+ 8018ed4:	f000 8081 	beq.w	8018fda <dhcp_release_and_stop+0x122>
+    return;
+  }
+
+  ip_addr_copy(server_ip_addr, dhcp->server_ip_addr);
+ 8018ed8:	69fb      	ldr	r3, [r7, #28]
+ 8018eda:	699b      	ldr	r3, [r3, #24]
+ 8018edc:	613b      	str	r3, [r7, #16]
+
+  /* clean old DHCP offer */
+  ip_addr_set_zero_ip4(&dhcp->server_ip_addr);
+ 8018ede:	69fb      	ldr	r3, [r7, #28]
+ 8018ee0:	2200      	movs	r2, #0
+ 8018ee2:	619a      	str	r2, [r3, #24]
+  ip4_addr_set_zero(&dhcp->offered_ip_addr);
+ 8018ee4:	69fb      	ldr	r3, [r7, #28]
+ 8018ee6:	2200      	movs	r2, #0
+ 8018ee8:	61da      	str	r2, [r3, #28]
+  ip4_addr_set_zero(&dhcp->offered_sn_mask);
+ 8018eea:	69fb      	ldr	r3, [r7, #28]
+ 8018eec:	2200      	movs	r2, #0
+ 8018eee:	621a      	str	r2, [r3, #32]
+  ip4_addr_set_zero(&dhcp->offered_gw_addr);
+ 8018ef0:	69fb      	ldr	r3, [r7, #28]
+ 8018ef2:	2200      	movs	r2, #0
+ 8018ef4:	625a      	str	r2, [r3, #36]	; 0x24
+#if LWIP_DHCP_BOOTP_FILE
+  ip4_addr_set_zero(&dhcp->offered_si_addr);
+#endif /* LWIP_DHCP_BOOTP_FILE */
+  dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0;
+ 8018ef6:	69fb      	ldr	r3, [r7, #28]
+ 8018ef8:	2200      	movs	r2, #0
+ 8018efa:	631a      	str	r2, [r3, #48]	; 0x30
+ 8018efc:	69fb      	ldr	r3, [r7, #28]
+ 8018efe:	6b1a      	ldr	r2, [r3, #48]	; 0x30
+ 8018f00:	69fb      	ldr	r3, [r7, #28]
+ 8018f02:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8018f04:	69fb      	ldr	r3, [r7, #28]
+ 8018f06:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8018f08:	69fb      	ldr	r3, [r7, #28]
+ 8018f0a:	629a      	str	r2, [r3, #40]	; 0x28
+  dhcp->t1_renew_time = dhcp->t2_rebind_time = dhcp->lease_used = dhcp->t0_timeout = 0;
+ 8018f0c:	69fb      	ldr	r3, [r7, #28]
+ 8018f0e:	2200      	movs	r2, #0
+ 8018f10:	829a      	strh	r2, [r3, #20]
+ 8018f12:	69fb      	ldr	r3, [r7, #28]
+ 8018f14:	8a9a      	ldrh	r2, [r3, #20]
+ 8018f16:	69fb      	ldr	r3, [r7, #28]
+ 8018f18:	825a      	strh	r2, [r3, #18]
+ 8018f1a:	69fb      	ldr	r3, [r7, #28]
+ 8018f1c:	8a5a      	ldrh	r2, [r3, #18]
+ 8018f1e:	69fb      	ldr	r3, [r7, #28]
+ 8018f20:	821a      	strh	r2, [r3, #16]
+ 8018f22:	69fb      	ldr	r3, [r7, #28]
+ 8018f24:	8a1a      	ldrh	r2, [r3, #16]
+ 8018f26:	69fb      	ldr	r3, [r7, #28]
+ 8018f28:	81da      	strh	r2, [r3, #14]
+
+  /* send release message when current IP was assigned via DHCP */
+  if (dhcp_supplied_address(netif)) {
+ 8018f2a:	6878      	ldr	r0, [r7, #4]
+ 8018f2c:	f000 fdec 	bl	8019b08 <dhcp_supplied_address>
+ 8018f30:	4603      	mov	r3, r0
+ 8018f32:	2b00      	cmp	r3, #0
+ 8018f34:	d03b      	beq.n	8018fae <dhcp_release_and_stop+0xf6>
+    /* create and initialize the DHCP message header */
+    struct pbuf *p_out;
+    u16_t options_out_len;
+    p_out = dhcp_create_msg(netif, dhcp, DHCP_RELEASE, &options_out_len);
+ 8018f36:	f107 030e 	add.w	r3, r7, #14
+ 8018f3a:	2207      	movs	r2, #7
+ 8018f3c:	69f9      	ldr	r1, [r7, #28]
+ 8018f3e:	6878      	ldr	r0, [r7, #4]
+ 8018f40:	f000 fcde 	bl	8019900 <dhcp_create_msg>
+ 8018f44:	61b8      	str	r0, [r7, #24]
+    if (p_out != NULL) {
+ 8018f46:	69bb      	ldr	r3, [r7, #24]
+ 8018f48:	2b00      	cmp	r3, #0
+ 8018f4a:	d030      	beq.n	8018fae <dhcp_release_and_stop+0xf6>
+      struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
+ 8018f4c:	69bb      	ldr	r3, [r7, #24]
+ 8018f4e:	685b      	ldr	r3, [r3, #4]
+ 8018f50:	617b      	str	r3, [r7, #20]
+      options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
+ 8018f52:	89f8      	ldrh	r0, [r7, #14]
+ 8018f54:	697b      	ldr	r3, [r7, #20]
+ 8018f56:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8018f5a:	2304      	movs	r3, #4
+ 8018f5c:	2236      	movs	r2, #54	; 0x36
+ 8018f5e:	f000 f85f 	bl	8019020 <dhcp_option>
+ 8018f62:	4603      	mov	r3, r0
+ 8018f64:	81fb      	strh	r3, [r7, #14]
+      options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&server_ip_addr))));
+ 8018f66:	89fc      	ldrh	r4, [r7, #14]
+ 8018f68:	697b      	ldr	r3, [r7, #20]
+ 8018f6a:	f103 05f0 	add.w	r5, r3, #240	; 0xf0
+ 8018f6e:	693b      	ldr	r3, [r7, #16]
+ 8018f70:	4618      	mov	r0, r3
+ 8018f72:	f7f7 f972 	bl	801025a <lwip_htonl>
+ 8018f76:	4603      	mov	r3, r0
+ 8018f78:	461a      	mov	r2, r3
+ 8018f7a:	4629      	mov	r1, r5
+ 8018f7c:	4620      	mov	r0, r4
+ 8018f7e:	f000 f8db 	bl	8019138 <dhcp_option_long>
+ 8018f82:	4603      	mov	r3, r0
+ 8018f84:	81fb      	strh	r3, [r7, #14]
+
+      LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, dhcp->state, msg_out, DHCP_RELEASE, &options_out_len);
+      dhcp_option_trailer(options_out_len, msg_out->options, p_out);
+ 8018f86:	89f8      	ldrh	r0, [r7, #14]
+ 8018f88:	697b      	ldr	r3, [r7, #20]
+ 8018f8a:	33f0      	adds	r3, #240	; 0xf0
+ 8018f8c:	69ba      	ldr	r2, [r7, #24]
+ 8018f8e:	4619      	mov	r1, r3
+ 8018f90:	f000 fd8c 	bl	8019aac <dhcp_option_trailer>
+
+      udp_sendto_if(dhcp_pcb, p_out, &server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
+ 8018f94:	4b13      	ldr	r3, [pc, #76]	; (8018fe4 <dhcp_release_and_stop+0x12c>)
+ 8018f96:	6818      	ldr	r0, [r3, #0]
+ 8018f98:	f107 0210 	add.w	r2, r7, #16
+ 8018f9c:	687b      	ldr	r3, [r7, #4]
+ 8018f9e:	9300      	str	r3, [sp, #0]
+ 8018fa0:	2343      	movs	r3, #67	; 0x43
+ 8018fa2:	69b9      	ldr	r1, [r7, #24]
+ 8018fa4:	f7fe fc38 	bl	8017818 <udp_sendto_if>
+      pbuf_free(p_out);
+ 8018fa8:	69b8      	ldr	r0, [r7, #24]
+ 8018faa:	f7f8 fcf5 	bl	8011998 <pbuf_free>
+      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_release: could not allocate DHCP request\n"));
+    }
+  }
+
+  /* remove IP address from interface (prevents routing from selecting this interface) */
+  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
+ 8018fae:	4b0e      	ldr	r3, [pc, #56]	; (8018fe8 <dhcp_release_and_stop+0x130>)
+ 8018fb0:	4a0d      	ldr	r2, [pc, #52]	; (8018fe8 <dhcp_release_and_stop+0x130>)
+ 8018fb2:	490d      	ldr	r1, [pc, #52]	; (8018fe8 <dhcp_release_and_stop+0x130>)
+ 8018fb4:	6878      	ldr	r0, [r7, #4]
+ 8018fb6:	f7f7 ffe5 	bl	8010f84 <netif_set_addr>
+    autoip_stop(netif);
+    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
+  }
+#endif /* LWIP_DHCP_AUTOIP_COOP */
+
+  dhcp_set_state(dhcp, DHCP_STATE_OFF);
+ 8018fba:	2100      	movs	r1, #0
+ 8018fbc:	69f8      	ldr	r0, [r7, #28]
+ 8018fbe:	f000 f815 	bl	8018fec <dhcp_set_state>
+
+  if (dhcp->pcb_allocated != 0) {
+ 8018fc2:	69fb      	ldr	r3, [r7, #28]
+ 8018fc4:	791b      	ldrb	r3, [r3, #4]
+ 8018fc6:	2b00      	cmp	r3, #0
+ 8018fc8:	d008      	beq.n	8018fdc <dhcp_release_and_stop+0x124>
+    dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
+ 8018fca:	f7fe ff71 	bl	8017eb0 <dhcp_dec_pcb_refcount>
+    dhcp->pcb_allocated = 0;
+ 8018fce:	69fb      	ldr	r3, [r7, #28]
+ 8018fd0:	2200      	movs	r2, #0
+ 8018fd2:	711a      	strb	r2, [r3, #4]
+ 8018fd4:	e002      	b.n	8018fdc <dhcp_release_and_stop+0x124>
+    return;
+ 8018fd6:	bf00      	nop
+ 8018fd8:	e000      	b.n	8018fdc <dhcp_release_and_stop+0x124>
+    return;
+ 8018fda:	bf00      	nop
+  }
+}
+ 8018fdc:	3720      	adds	r7, #32
+ 8018fde:	46bd      	mov	sp, r7
+ 8018fe0:	bdb0      	pop	{r4, r5, r7, pc}
+ 8018fe2:	bf00      	nop
+ 8018fe4:	20008758 	.word	0x20008758
+ 8018fe8:	08022598 	.word	0x08022598
+
+08018fec <dhcp_set_state>:
+ *
+ * If the state changed, reset the number of tries.
+ */
+static void
+dhcp_set_state(struct dhcp *dhcp, u8_t new_state)
+{
+ 8018fec:	b480      	push	{r7}
+ 8018fee:	b083      	sub	sp, #12
+ 8018ff0:	af00      	add	r7, sp, #0
+ 8018ff2:	6078      	str	r0, [r7, #4]
+ 8018ff4:	460b      	mov	r3, r1
+ 8018ff6:	70fb      	strb	r3, [r7, #3]
+  if (new_state != dhcp->state) {
+ 8018ff8:	687b      	ldr	r3, [r7, #4]
+ 8018ffa:	795b      	ldrb	r3, [r3, #5]
+ 8018ffc:	78fa      	ldrb	r2, [r7, #3]
+ 8018ffe:	429a      	cmp	r2, r3
+ 8019000:	d008      	beq.n	8019014 <dhcp_set_state+0x28>
+    dhcp->state = new_state;
+ 8019002:	687b      	ldr	r3, [r7, #4]
+ 8019004:	78fa      	ldrb	r2, [r7, #3]
+ 8019006:	715a      	strb	r2, [r3, #5]
+    dhcp->tries = 0;
+ 8019008:	687b      	ldr	r3, [r7, #4]
+ 801900a:	2200      	movs	r2, #0
+ 801900c:	719a      	strb	r2, [r3, #6]
+    dhcp->request_timeout = 0;
+ 801900e:	687b      	ldr	r3, [r7, #4]
+ 8019010:	2200      	movs	r2, #0
+ 8019012:	811a      	strh	r2, [r3, #8]
+  }
+}
+ 8019014:	bf00      	nop
+ 8019016:	370c      	adds	r7, #12
+ 8019018:	46bd      	mov	sp, r7
+ 801901a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 801901e:	4770      	bx	lr
+
+08019020 <dhcp_option>:
+ * DHCP message.
+ *
+ */
+static u16_t
+dhcp_option(u16_t options_out_len, u8_t *options, u8_t option_type, u8_t option_len)
+{
+ 8019020:	b580      	push	{r7, lr}
+ 8019022:	b082      	sub	sp, #8
+ 8019024:	af00      	add	r7, sp, #0
+ 8019026:	6039      	str	r1, [r7, #0]
+ 8019028:	4611      	mov	r1, r2
+ 801902a:	461a      	mov	r2, r3
+ 801902c:	4603      	mov	r3, r0
+ 801902e:	80fb      	strh	r3, [r7, #6]
+ 8019030:	460b      	mov	r3, r1
+ 8019032:	717b      	strb	r3, [r7, #5]
+ 8019034:	4613      	mov	r3, r2
+ 8019036:	713b      	strb	r3, [r7, #4]
+  LWIP_ASSERT("dhcp_option: options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", options_out_len + 2U + option_len <= DHCP_OPTIONS_LEN);
+ 8019038:	88fa      	ldrh	r2, [r7, #6]
+ 801903a:	793b      	ldrb	r3, [r7, #4]
+ 801903c:	4413      	add	r3, r2
+ 801903e:	3302      	adds	r3, #2
+ 8019040:	2b44      	cmp	r3, #68	; 0x44
+ 8019042:	d906      	bls.n	8019052 <dhcp_option+0x32>
+ 8019044:	4b0d      	ldr	r3, [pc, #52]	; (801907c <dhcp_option+0x5c>)
+ 8019046:	f240 529a 	movw	r2, #1434	; 0x59a
+ 801904a:	490d      	ldr	r1, [pc, #52]	; (8019080 <dhcp_option+0x60>)
+ 801904c:	480d      	ldr	r0, [pc, #52]	; (8019084 <dhcp_option+0x64>)
+ 801904e:	f003 f9d3 	bl	801c3f8 <iprintf>
+  options[options_out_len++] = option_type;
+ 8019052:	88fb      	ldrh	r3, [r7, #6]
+ 8019054:	1c5a      	adds	r2, r3, #1
+ 8019056:	80fa      	strh	r2, [r7, #6]
+ 8019058:	461a      	mov	r2, r3
+ 801905a:	683b      	ldr	r3, [r7, #0]
+ 801905c:	4413      	add	r3, r2
+ 801905e:	797a      	ldrb	r2, [r7, #5]
+ 8019060:	701a      	strb	r2, [r3, #0]
+  options[options_out_len++] = option_len;
+ 8019062:	88fb      	ldrh	r3, [r7, #6]
+ 8019064:	1c5a      	adds	r2, r3, #1
+ 8019066:	80fa      	strh	r2, [r7, #6]
+ 8019068:	461a      	mov	r2, r3
+ 801906a:	683b      	ldr	r3, [r7, #0]
+ 801906c:	4413      	add	r3, r2
+ 801906e:	793a      	ldrb	r2, [r7, #4]
+ 8019070:	701a      	strb	r2, [r3, #0]
+  return options_out_len;
+ 8019072:	88fb      	ldrh	r3, [r7, #6]
+}
+ 8019074:	4618      	mov	r0, r3
+ 8019076:	3708      	adds	r7, #8
+ 8019078:	46bd      	mov	sp, r7
+ 801907a:	bd80      	pop	{r7, pc}
+ 801907c:	0801fac8 	.word	0x0801fac8
+ 8019080:	0801fc5c 	.word	0x0801fc5c
+ 8019084:	0801fb28 	.word	0x0801fb28
+
+08019088 <dhcp_option_byte>:
+ * Concatenate a single byte to the outgoing DHCP message.
+ *
+ */
+static u16_t
+dhcp_option_byte(u16_t options_out_len, u8_t *options, u8_t value)
+{
+ 8019088:	b580      	push	{r7, lr}
+ 801908a:	b082      	sub	sp, #8
+ 801908c:	af00      	add	r7, sp, #0
+ 801908e:	4603      	mov	r3, r0
+ 8019090:	6039      	str	r1, [r7, #0]
+ 8019092:	80fb      	strh	r3, [r7, #6]
+ 8019094:	4613      	mov	r3, r2
+ 8019096:	717b      	strb	r3, [r7, #5]
+  LWIP_ASSERT("dhcp_option_byte: options_out_len < DHCP_OPTIONS_LEN", options_out_len < DHCP_OPTIONS_LEN);
+ 8019098:	88fb      	ldrh	r3, [r7, #6]
+ 801909a:	2b43      	cmp	r3, #67	; 0x43
+ 801909c:	d906      	bls.n	80190ac <dhcp_option_byte+0x24>
+ 801909e:	4b0a      	ldr	r3, [pc, #40]	; (80190c8 <dhcp_option_byte+0x40>)
+ 80190a0:	f240 52a6 	movw	r2, #1446	; 0x5a6
+ 80190a4:	4909      	ldr	r1, [pc, #36]	; (80190cc <dhcp_option_byte+0x44>)
+ 80190a6:	480a      	ldr	r0, [pc, #40]	; (80190d0 <dhcp_option_byte+0x48>)
+ 80190a8:	f003 f9a6 	bl	801c3f8 <iprintf>
+  options[options_out_len++] = value;
+ 80190ac:	88fb      	ldrh	r3, [r7, #6]
+ 80190ae:	1c5a      	adds	r2, r3, #1
+ 80190b0:	80fa      	strh	r2, [r7, #6]
+ 80190b2:	461a      	mov	r2, r3
+ 80190b4:	683b      	ldr	r3, [r7, #0]
+ 80190b6:	4413      	add	r3, r2
+ 80190b8:	797a      	ldrb	r2, [r7, #5]
+ 80190ba:	701a      	strb	r2, [r3, #0]
+  return options_out_len;
+ 80190bc:	88fb      	ldrh	r3, [r7, #6]
+}
+ 80190be:	4618      	mov	r0, r3
+ 80190c0:	3708      	adds	r7, #8
+ 80190c2:	46bd      	mov	sp, r7
+ 80190c4:	bd80      	pop	{r7, pc}
+ 80190c6:	bf00      	nop
+ 80190c8:	0801fac8 	.word	0x0801fac8
+ 80190cc:	0801fca0 	.word	0x0801fca0
+ 80190d0:	0801fb28 	.word	0x0801fb28
+
+080190d4 <dhcp_option_short>:
+
+static u16_t
+dhcp_option_short(u16_t options_out_len, u8_t *options, u16_t value)
+{
+ 80190d4:	b580      	push	{r7, lr}
+ 80190d6:	b082      	sub	sp, #8
+ 80190d8:	af00      	add	r7, sp, #0
+ 80190da:	4603      	mov	r3, r0
+ 80190dc:	6039      	str	r1, [r7, #0]
+ 80190de:	80fb      	strh	r3, [r7, #6]
+ 80190e0:	4613      	mov	r3, r2
+ 80190e2:	80bb      	strh	r3, [r7, #4]
+  LWIP_ASSERT("dhcp_option_short: options_out_len + 2 <= DHCP_OPTIONS_LEN", options_out_len + 2U <= DHCP_OPTIONS_LEN);
+ 80190e4:	88fb      	ldrh	r3, [r7, #6]
+ 80190e6:	3302      	adds	r3, #2
+ 80190e8:	2b44      	cmp	r3, #68	; 0x44
+ 80190ea:	d906      	bls.n	80190fa <dhcp_option_short+0x26>
+ 80190ec:	4b0f      	ldr	r3, [pc, #60]	; (801912c <dhcp_option_short+0x58>)
+ 80190ee:	f240 52ae 	movw	r2, #1454	; 0x5ae
+ 80190f2:	490f      	ldr	r1, [pc, #60]	; (8019130 <dhcp_option_short+0x5c>)
+ 80190f4:	480f      	ldr	r0, [pc, #60]	; (8019134 <dhcp_option_short+0x60>)
+ 80190f6:	f003 f97f 	bl	801c3f8 <iprintf>
+  options[options_out_len++] = (u8_t)((value & 0xff00U) >> 8);
+ 80190fa:	88bb      	ldrh	r3, [r7, #4]
+ 80190fc:	0a1b      	lsrs	r3, r3, #8
+ 80190fe:	b29a      	uxth	r2, r3
+ 8019100:	88fb      	ldrh	r3, [r7, #6]
+ 8019102:	1c59      	adds	r1, r3, #1
+ 8019104:	80f9      	strh	r1, [r7, #6]
+ 8019106:	4619      	mov	r1, r3
+ 8019108:	683b      	ldr	r3, [r7, #0]
+ 801910a:	440b      	add	r3, r1
+ 801910c:	b2d2      	uxtb	r2, r2
+ 801910e:	701a      	strb	r2, [r3, #0]
+  options[options_out_len++] = (u8_t) (value & 0x00ffU);
+ 8019110:	88fb      	ldrh	r3, [r7, #6]
+ 8019112:	1c5a      	adds	r2, r3, #1
+ 8019114:	80fa      	strh	r2, [r7, #6]
+ 8019116:	461a      	mov	r2, r3
+ 8019118:	683b      	ldr	r3, [r7, #0]
+ 801911a:	4413      	add	r3, r2
+ 801911c:	88ba      	ldrh	r2, [r7, #4]
+ 801911e:	b2d2      	uxtb	r2, r2
+ 8019120:	701a      	strb	r2, [r3, #0]
+  return options_out_len;
+ 8019122:	88fb      	ldrh	r3, [r7, #6]
+}
+ 8019124:	4618      	mov	r0, r3
+ 8019126:	3708      	adds	r7, #8
+ 8019128:	46bd      	mov	sp, r7
+ 801912a:	bd80      	pop	{r7, pc}
+ 801912c:	0801fac8 	.word	0x0801fac8
+ 8019130:	0801fcd8 	.word	0x0801fcd8
+ 8019134:	0801fb28 	.word	0x0801fb28
+
+08019138 <dhcp_option_long>:
+
+static u16_t
+dhcp_option_long(u16_t options_out_len, u8_t *options, u32_t value)
+{
+ 8019138:	b580      	push	{r7, lr}
+ 801913a:	b084      	sub	sp, #16
+ 801913c:	af00      	add	r7, sp, #0
+ 801913e:	4603      	mov	r3, r0
+ 8019140:	60b9      	str	r1, [r7, #8]
+ 8019142:	607a      	str	r2, [r7, #4]
+ 8019144:	81fb      	strh	r3, [r7, #14]
+  LWIP_ASSERT("dhcp_option_long: options_out_len + 4 <= DHCP_OPTIONS_LEN", options_out_len + 4U <= DHCP_OPTIONS_LEN);
+ 8019146:	89fb      	ldrh	r3, [r7, #14]
+ 8019148:	3304      	adds	r3, #4
+ 801914a:	2b44      	cmp	r3, #68	; 0x44
+ 801914c:	d906      	bls.n	801915c <dhcp_option_long+0x24>
+ 801914e:	4b19      	ldr	r3, [pc, #100]	; (80191b4 <dhcp_option_long+0x7c>)
+ 8019150:	f240 52b7 	movw	r2, #1463	; 0x5b7
+ 8019154:	4918      	ldr	r1, [pc, #96]	; (80191b8 <dhcp_option_long+0x80>)
+ 8019156:	4819      	ldr	r0, [pc, #100]	; (80191bc <dhcp_option_long+0x84>)
+ 8019158:	f003 f94e 	bl	801c3f8 <iprintf>
+  options[options_out_len++] = (u8_t)((value & 0xff000000UL) >> 24);
+ 801915c:	687b      	ldr	r3, [r7, #4]
+ 801915e:	0e1a      	lsrs	r2, r3, #24
+ 8019160:	89fb      	ldrh	r3, [r7, #14]
+ 8019162:	1c59      	adds	r1, r3, #1
+ 8019164:	81f9      	strh	r1, [r7, #14]
+ 8019166:	4619      	mov	r1, r3
+ 8019168:	68bb      	ldr	r3, [r7, #8]
+ 801916a:	440b      	add	r3, r1
+ 801916c:	b2d2      	uxtb	r2, r2
+ 801916e:	701a      	strb	r2, [r3, #0]
+  options[options_out_len++] = (u8_t)((value & 0x00ff0000UL) >> 16);
+ 8019170:	687b      	ldr	r3, [r7, #4]
+ 8019172:	0c1a      	lsrs	r2, r3, #16
+ 8019174:	89fb      	ldrh	r3, [r7, #14]
+ 8019176:	1c59      	adds	r1, r3, #1
+ 8019178:	81f9      	strh	r1, [r7, #14]
+ 801917a:	4619      	mov	r1, r3
+ 801917c:	68bb      	ldr	r3, [r7, #8]
+ 801917e:	440b      	add	r3, r1
+ 8019180:	b2d2      	uxtb	r2, r2
+ 8019182:	701a      	strb	r2, [r3, #0]
+  options[options_out_len++] = (u8_t)((value & 0x0000ff00UL) >> 8);
+ 8019184:	687b      	ldr	r3, [r7, #4]
+ 8019186:	0a1a      	lsrs	r2, r3, #8
+ 8019188:	89fb      	ldrh	r3, [r7, #14]
+ 801918a:	1c59      	adds	r1, r3, #1
+ 801918c:	81f9      	strh	r1, [r7, #14]
+ 801918e:	4619      	mov	r1, r3
+ 8019190:	68bb      	ldr	r3, [r7, #8]
+ 8019192:	440b      	add	r3, r1
+ 8019194:	b2d2      	uxtb	r2, r2
+ 8019196:	701a      	strb	r2, [r3, #0]
+  options[options_out_len++] = (u8_t)((value & 0x000000ffUL));
+ 8019198:	89fb      	ldrh	r3, [r7, #14]
+ 801919a:	1c5a      	adds	r2, r3, #1
+ 801919c:	81fa      	strh	r2, [r7, #14]
+ 801919e:	461a      	mov	r2, r3
+ 80191a0:	68bb      	ldr	r3, [r7, #8]
+ 80191a2:	4413      	add	r3, r2
+ 80191a4:	687a      	ldr	r2, [r7, #4]
+ 80191a6:	b2d2      	uxtb	r2, r2
+ 80191a8:	701a      	strb	r2, [r3, #0]
+  return options_out_len;
+ 80191aa:	89fb      	ldrh	r3, [r7, #14]
+}
+ 80191ac:	4618      	mov	r0, r3
+ 80191ae:	3710      	adds	r7, #16
+ 80191b0:	46bd      	mov	sp, r7
+ 80191b2:	bd80      	pop	{r7, pc}
+ 80191b4:	0801fac8 	.word	0x0801fac8
+ 80191b8:	0801fd14 	.word	0x0801fd14
+ 80191bc:	0801fb28 	.word	0x0801fb28
+
+080191c0 <dhcp_parse_reply>:
+ * use that further on.
+ *
+ */
+static err_t
+dhcp_parse_reply(struct pbuf *p, struct dhcp *dhcp)
+{
+ 80191c0:	b580      	push	{r7, lr}
+ 80191c2:	b090      	sub	sp, #64	; 0x40
+ 80191c4:	af00      	add	r7, sp, #0
+ 80191c6:	6078      	str	r0, [r7, #4]
+ 80191c8:	6039      	str	r1, [r7, #0]
+  u16_t offset;
+  u16_t offset_max;
+  u16_t options_idx;
+  u16_t options_idx_max;
+  struct pbuf *q;
+  int parse_file_as_options = 0;
+ 80191ca:	2300      	movs	r3, #0
+ 80191cc:	62fb      	str	r3, [r7, #44]	; 0x2c
+  int parse_sname_as_options = 0;
+ 80191ce:	2300      	movs	r3, #0
+ 80191d0:	62bb      	str	r3, [r7, #40]	; 0x28
+#endif
+
+  LWIP_UNUSED_ARG(dhcp);
+
+  /* clear received options */
+  dhcp_clear_all_options(dhcp);
+ 80191d2:	2208      	movs	r2, #8
+ 80191d4:	2100      	movs	r1, #0
+ 80191d6:	48be      	ldr	r0, [pc, #760]	; (80194d0 <dhcp_parse_reply+0x310>)
+ 80191d8:	f003 f905 	bl	801c3e6 <memset>
+  /* check that beginning of dhcp_msg (up to and including chaddr) is in first pbuf */
+  if (p->len < DHCP_SNAME_OFS) {
+ 80191dc:	687b      	ldr	r3, [r7, #4]
+ 80191de:	895b      	ldrh	r3, [r3, #10]
+ 80191e0:	2b2b      	cmp	r3, #43	; 0x2b
+ 80191e2:	d802      	bhi.n	80191ea <dhcp_parse_reply+0x2a>
+    return ERR_BUF;
+ 80191e4:	f06f 0301 	mvn.w	r3, #1
+ 80191e8:	e2a8      	b.n	801973c <dhcp_parse_reply+0x57c>
+  }
+  msg_in = (struct dhcp_msg *)p->payload;
+ 80191ea:	687b      	ldr	r3, [r7, #4]
+ 80191ec:	685b      	ldr	r3, [r3, #4]
+ 80191ee:	61bb      	str	r3, [r7, #24]
+#endif /* LWIP_DHCP_BOOTP_FILE */
+
+  /* parse options */
+
+  /* start with options field */
+  options_idx = DHCP_OPTIONS_OFS;
+ 80191f0:	23f0      	movs	r3, #240	; 0xf0
+ 80191f2:	86fb      	strh	r3, [r7, #54]	; 0x36
+  /* parse options to the end of the received packet */
+  options_idx_max = p->tot_len;
+ 80191f4:	687b      	ldr	r3, [r7, #4]
+ 80191f6:	891b      	ldrh	r3, [r3, #8]
+ 80191f8:	86bb      	strh	r3, [r7, #52]	; 0x34
+again:
+  q = p;
+ 80191fa:	687b      	ldr	r3, [r7, #4]
+ 80191fc:	633b      	str	r3, [r7, #48]	; 0x30
+  while ((q != NULL) && (options_idx >= q->len)) {
+ 80191fe:	e00c      	b.n	801921a <dhcp_parse_reply+0x5a>
+    options_idx = (u16_t)(options_idx - q->len);
+ 8019200:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 8019202:	895b      	ldrh	r3, [r3, #10]
+ 8019204:	8efa      	ldrh	r2, [r7, #54]	; 0x36
+ 8019206:	1ad3      	subs	r3, r2, r3
+ 8019208:	86fb      	strh	r3, [r7, #54]	; 0x36
+    options_idx_max = (u16_t)(options_idx_max - q->len);
+ 801920a:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801920c:	895b      	ldrh	r3, [r3, #10]
+ 801920e:	8eba      	ldrh	r2, [r7, #52]	; 0x34
+ 8019210:	1ad3      	subs	r3, r2, r3
+ 8019212:	86bb      	strh	r3, [r7, #52]	; 0x34
+    q = q->next;
+ 8019214:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 8019216:	681b      	ldr	r3, [r3, #0]
+ 8019218:	633b      	str	r3, [r7, #48]	; 0x30
+  while ((q != NULL) && (options_idx >= q->len)) {
+ 801921a:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801921c:	2b00      	cmp	r3, #0
+ 801921e:	d004      	beq.n	801922a <dhcp_parse_reply+0x6a>
+ 8019220:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 8019222:	895b      	ldrh	r3, [r3, #10]
+ 8019224:	8efa      	ldrh	r2, [r7, #54]	; 0x36
+ 8019226:	429a      	cmp	r2, r3
+ 8019228:	d2ea      	bcs.n	8019200 <dhcp_parse_reply+0x40>
+  }
+  if (q == NULL) {
+ 801922a:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801922c:	2b00      	cmp	r3, #0
+ 801922e:	d102      	bne.n	8019236 <dhcp_parse_reply+0x76>
+    return ERR_BUF;
+ 8019230:	f06f 0301 	mvn.w	r3, #1
+ 8019234:	e282      	b.n	801973c <dhcp_parse_reply+0x57c>
+  }
+  offset = options_idx;
+ 8019236:	8efb      	ldrh	r3, [r7, #54]	; 0x36
+ 8019238:	877b      	strh	r3, [r7, #58]	; 0x3a
+  offset_max = options_idx_max;
+ 801923a:	8ebb      	ldrh	r3, [r7, #52]	; 0x34
+ 801923c:	873b      	strh	r3, [r7, #56]	; 0x38
+  options = (u8_t *)q->payload;
+ 801923e:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 8019240:	685b      	ldr	r3, [r3, #4]
+ 8019242:	63fb      	str	r3, [r7, #60]	; 0x3c
+  /* at least 1 byte to read and no end marker, then at least 3 bytes to read? */
+  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
+ 8019244:	e23a      	b.n	80196bc <dhcp_parse_reply+0x4fc>
+    u8_t op = options[offset];
+ 8019246:	8f7b      	ldrh	r3, [r7, #58]	; 0x3a
+ 8019248:	6bfa      	ldr	r2, [r7, #60]	; 0x3c
+ 801924a:	4413      	add	r3, r2
+ 801924c:	781b      	ldrb	r3, [r3, #0]
+ 801924e:	75fb      	strb	r3, [r7, #23]
+    u8_t len;
+    u8_t decode_len = 0;
+ 8019250:	2300      	movs	r3, #0
+ 8019252:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
+    int decode_idx = -1;
+ 8019256:	f04f 33ff 	mov.w	r3, #4294967295
+ 801925a:	623b      	str	r3, [r7, #32]
+    u16_t val_offset = (u16_t)(offset + 2);
+ 801925c:	8f7b      	ldrh	r3, [r7, #58]	; 0x3a
+ 801925e:	3302      	adds	r3, #2
+ 8019260:	83fb      	strh	r3, [r7, #30]
+    if (val_offset < offset) {
+ 8019262:	8bfa      	ldrh	r2, [r7, #30]
+ 8019264:	8f7b      	ldrh	r3, [r7, #58]	; 0x3a
+ 8019266:	429a      	cmp	r2, r3
+ 8019268:	d202      	bcs.n	8019270 <dhcp_parse_reply+0xb0>
+      /* overflow */
+      return ERR_BUF;
+ 801926a:	f06f 0301 	mvn.w	r3, #1
+ 801926e:	e265      	b.n	801973c <dhcp_parse_reply+0x57c>
+    }
+    /* len byte might be in the next pbuf */
+    if ((offset + 1) < q->len) {
+ 8019270:	8f7b      	ldrh	r3, [r7, #58]	; 0x3a
+ 8019272:	3301      	adds	r3, #1
+ 8019274:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 8019276:	8952      	ldrh	r2, [r2, #10]
+ 8019278:	4293      	cmp	r3, r2
+ 801927a:	da07      	bge.n	801928c <dhcp_parse_reply+0xcc>
+      len = options[offset + 1];
+ 801927c:	8f7b      	ldrh	r3, [r7, #58]	; 0x3a
+ 801927e:	3301      	adds	r3, #1
+ 8019280:	6bfa      	ldr	r2, [r7, #60]	; 0x3c
+ 8019282:	4413      	add	r3, r2
+ 8019284:	781b      	ldrb	r3, [r3, #0]
+ 8019286:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+ 801928a:	e00b      	b.n	80192a4 <dhcp_parse_reply+0xe4>
+    } else {
+      len = (q->next != NULL ? ((u8_t *)q->next->payload)[0] : 0);
+ 801928c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801928e:	681b      	ldr	r3, [r3, #0]
+ 8019290:	2b00      	cmp	r3, #0
+ 8019292:	d004      	beq.n	801929e <dhcp_parse_reply+0xde>
+ 8019294:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 8019296:	681b      	ldr	r3, [r3, #0]
+ 8019298:	685b      	ldr	r3, [r3, #4]
+ 801929a:	781b      	ldrb	r3, [r3, #0]
+ 801929c:	e000      	b.n	80192a0 <dhcp_parse_reply+0xe0>
+ 801929e:	2300      	movs	r3, #0
+ 80192a0:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+    }
+    /* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */
+    decode_len = len;
+ 80192a4:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 80192a8:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
+    switch (op) {
+ 80192ac:	7dfb      	ldrb	r3, [r7, #23]
+ 80192ae:	2b3b      	cmp	r3, #59	; 0x3b
+ 80192b0:	f200 812d 	bhi.w	801950e <dhcp_parse_reply+0x34e>
+ 80192b4:	a201      	add	r2, pc, #4	; (adr r2, 80192bc <dhcp_parse_reply+0xfc>)
+ 80192b6:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 80192ba:	bf00      	nop
+ 80192bc:	080193ad 	.word	0x080193ad
+ 80192c0:	080193bd 	.word	0x080193bd
+ 80192c4:	0801950f 	.word	0x0801950f
+ 80192c8:	080193df 	.word	0x080193df
+ 80192cc:	0801950f 	.word	0x0801950f
+ 80192d0:	0801950f 	.word	0x0801950f
+ 80192d4:	0801950f 	.word	0x0801950f
+ 80192d8:	0801950f 	.word	0x0801950f
+ 80192dc:	0801950f 	.word	0x0801950f
+ 80192e0:	0801950f 	.word	0x0801950f
+ 80192e4:	0801950f 	.word	0x0801950f
+ 80192e8:	0801950f 	.word	0x0801950f
+ 80192ec:	0801950f 	.word	0x0801950f
+ 80192f0:	0801950f 	.word	0x0801950f
+ 80192f4:	0801950f 	.word	0x0801950f
+ 80192f8:	0801950f 	.word	0x0801950f
+ 80192fc:	0801950f 	.word	0x0801950f
+ 8019300:	0801950f 	.word	0x0801950f
+ 8019304:	0801950f 	.word	0x0801950f
+ 8019308:	0801950f 	.word	0x0801950f
+ 801930c:	0801950f 	.word	0x0801950f
+ 8019310:	0801950f 	.word	0x0801950f
+ 8019314:	0801950f 	.word	0x0801950f
+ 8019318:	0801950f 	.word	0x0801950f
+ 801931c:	0801950f 	.word	0x0801950f
+ 8019320:	0801950f 	.word	0x0801950f
+ 8019324:	0801950f 	.word	0x0801950f
+ 8019328:	0801950f 	.word	0x0801950f
+ 801932c:	0801950f 	.word	0x0801950f
+ 8019330:	0801950f 	.word	0x0801950f
+ 8019334:	0801950f 	.word	0x0801950f
+ 8019338:	0801950f 	.word	0x0801950f
+ 801933c:	0801950f 	.word	0x0801950f
+ 8019340:	0801950f 	.word	0x0801950f
+ 8019344:	0801950f 	.word	0x0801950f
+ 8019348:	0801950f 	.word	0x0801950f
+ 801934c:	0801950f 	.word	0x0801950f
+ 8019350:	0801950f 	.word	0x0801950f
+ 8019354:	0801950f 	.word	0x0801950f
+ 8019358:	0801950f 	.word	0x0801950f
+ 801935c:	0801950f 	.word	0x0801950f
+ 8019360:	0801950f 	.word	0x0801950f
+ 8019364:	0801950f 	.word	0x0801950f
+ 8019368:	0801950f 	.word	0x0801950f
+ 801936c:	0801950f 	.word	0x0801950f
+ 8019370:	0801950f 	.word	0x0801950f
+ 8019374:	0801950f 	.word	0x0801950f
+ 8019378:	0801950f 	.word	0x0801950f
+ 801937c:	0801950f 	.word	0x0801950f
+ 8019380:	0801950f 	.word	0x0801950f
+ 8019384:	0801950f 	.word	0x0801950f
+ 8019388:	0801940b 	.word	0x0801940b
+ 801938c:	0801942d 	.word	0x0801942d
+ 8019390:	08019469 	.word	0x08019469
+ 8019394:	0801948b 	.word	0x0801948b
+ 8019398:	0801950f 	.word	0x0801950f
+ 801939c:	0801950f 	.word	0x0801950f
+ 80193a0:	0801950f 	.word	0x0801950f
+ 80193a4:	080194ad 	.word	0x080194ad
+ 80193a8:	080194ed 	.word	0x080194ed
+      /* case(DHCP_OPTION_END): handled above */
+      case (DHCP_OPTION_PAD):
+        /* special option: no len encoded */
+        decode_len = len = 0;
+ 80193ac:	2300      	movs	r3, #0
+ 80193ae:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+ 80193b2:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 80193b6:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
+        /* will be increased below */
+        break;
+ 80193ba:	e0ac      	b.n	8019516 <dhcp_parse_reply+0x356>
+      case (DHCP_OPTION_SUBNET_MASK):
+        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
+ 80193bc:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 80193c0:	2b04      	cmp	r3, #4
+ 80193c2:	d009      	beq.n	80193d8 <dhcp_parse_reply+0x218>
+ 80193c4:	4b43      	ldr	r3, [pc, #268]	; (80194d4 <dhcp_parse_reply+0x314>)
+ 80193c6:	f240 622e 	movw	r2, #1582	; 0x62e
+ 80193ca:	4943      	ldr	r1, [pc, #268]	; (80194d8 <dhcp_parse_reply+0x318>)
+ 80193cc:	4843      	ldr	r0, [pc, #268]	; (80194dc <dhcp_parse_reply+0x31c>)
+ 80193ce:	f003 f813 	bl	801c3f8 <iprintf>
+ 80193d2:	f06f 0305 	mvn.w	r3, #5
+ 80193d6:	e1b1      	b.n	801973c <dhcp_parse_reply+0x57c>
+        decode_idx = DHCP_OPTION_IDX_SUBNET_MASK;
+ 80193d8:	2306      	movs	r3, #6
+ 80193da:	623b      	str	r3, [r7, #32]
+        break;
+ 80193dc:	e09b      	b.n	8019516 <dhcp_parse_reply+0x356>
+      case (DHCP_OPTION_ROUTER):
+        decode_len = 4; /* only copy the first given router */
+ 80193de:	2304      	movs	r3, #4
+ 80193e0:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
+        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
+ 80193e4:	f897 2027 	ldrb.w	r2, [r7, #39]	; 0x27
+ 80193e8:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
+ 80193ec:	429a      	cmp	r2, r3
+ 80193ee:	d209      	bcs.n	8019404 <dhcp_parse_reply+0x244>
+ 80193f0:	4b38      	ldr	r3, [pc, #224]	; (80194d4 <dhcp_parse_reply+0x314>)
+ 80193f2:	f240 6233 	movw	r2, #1587	; 0x633
+ 80193f6:	493a      	ldr	r1, [pc, #232]	; (80194e0 <dhcp_parse_reply+0x320>)
+ 80193f8:	4838      	ldr	r0, [pc, #224]	; (80194dc <dhcp_parse_reply+0x31c>)
+ 80193fa:	f002 fffd 	bl	801c3f8 <iprintf>
+ 80193fe:	f06f 0305 	mvn.w	r3, #5
+ 8019402:	e19b      	b.n	801973c <dhcp_parse_reply+0x57c>
+        decode_idx = DHCP_OPTION_IDX_ROUTER;
+ 8019404:	2307      	movs	r3, #7
+ 8019406:	623b      	str	r3, [r7, #32]
+        break;
+ 8019408:	e085      	b.n	8019516 <dhcp_parse_reply+0x356>
+        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
+        decode_idx = DHCP_OPTION_IDX_DNS_SERVER;
+        break;
+#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
+      case (DHCP_OPTION_LEASE_TIME):
+        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
+ 801940a:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 801940e:	2b04      	cmp	r3, #4
+ 8019410:	d009      	beq.n	8019426 <dhcp_parse_reply+0x266>
+ 8019412:	4b30      	ldr	r3, [pc, #192]	; (80194d4 <dhcp_parse_reply+0x314>)
+ 8019414:	f240 6241 	movw	r2, #1601	; 0x641
+ 8019418:	492f      	ldr	r1, [pc, #188]	; (80194d8 <dhcp_parse_reply+0x318>)
+ 801941a:	4830      	ldr	r0, [pc, #192]	; (80194dc <dhcp_parse_reply+0x31c>)
+ 801941c:	f002 ffec 	bl	801c3f8 <iprintf>
+ 8019420:	f06f 0305 	mvn.w	r3, #5
+ 8019424:	e18a      	b.n	801973c <dhcp_parse_reply+0x57c>
+        decode_idx = DHCP_OPTION_IDX_LEASE_TIME;
+ 8019426:	2303      	movs	r3, #3
+ 8019428:	623b      	str	r3, [r7, #32]
+        break;
+ 801942a:	e074      	b.n	8019516 <dhcp_parse_reply+0x356>
+        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
+        decode_idx = DHCP_OPTION_IDX_NTP_SERVER;
+        break;
+#endif /* LWIP_DHCP_GET_NTP_SRV*/
+      case (DHCP_OPTION_OVERLOAD):
+        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
+ 801942c:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 8019430:	2b01      	cmp	r3, #1
+ 8019432:	d009      	beq.n	8019448 <dhcp_parse_reply+0x288>
+ 8019434:	4b27      	ldr	r3, [pc, #156]	; (80194d4 <dhcp_parse_reply+0x314>)
+ 8019436:	f240 624f 	movw	r2, #1615	; 0x64f
+ 801943a:	492a      	ldr	r1, [pc, #168]	; (80194e4 <dhcp_parse_reply+0x324>)
+ 801943c:	4827      	ldr	r0, [pc, #156]	; (80194dc <dhcp_parse_reply+0x31c>)
+ 801943e:	f002 ffdb 	bl	801c3f8 <iprintf>
+ 8019442:	f06f 0305 	mvn.w	r3, #5
+ 8019446:	e179      	b.n	801973c <dhcp_parse_reply+0x57c>
+        /* decode overload only in options, not in file/sname: invalid packet */
+        LWIP_ERROR("overload in file/sname", options_idx == DHCP_OPTIONS_OFS, return ERR_VAL;);
+ 8019448:	8efb      	ldrh	r3, [r7, #54]	; 0x36
+ 801944a:	2bf0      	cmp	r3, #240	; 0xf0
+ 801944c:	d009      	beq.n	8019462 <dhcp_parse_reply+0x2a2>
+ 801944e:	4b21      	ldr	r3, [pc, #132]	; (80194d4 <dhcp_parse_reply+0x314>)
+ 8019450:	f240 6251 	movw	r2, #1617	; 0x651
+ 8019454:	4924      	ldr	r1, [pc, #144]	; (80194e8 <dhcp_parse_reply+0x328>)
+ 8019456:	4821      	ldr	r0, [pc, #132]	; (80194dc <dhcp_parse_reply+0x31c>)
+ 8019458:	f002 ffce 	bl	801c3f8 <iprintf>
+ 801945c:	f06f 0305 	mvn.w	r3, #5
+ 8019460:	e16c      	b.n	801973c <dhcp_parse_reply+0x57c>
+        decode_idx = DHCP_OPTION_IDX_OVERLOAD;
+ 8019462:	2300      	movs	r3, #0
+ 8019464:	623b      	str	r3, [r7, #32]
+        break;
+ 8019466:	e056      	b.n	8019516 <dhcp_parse_reply+0x356>
+      case (DHCP_OPTION_MESSAGE_TYPE):
+        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
+ 8019468:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 801946c:	2b01      	cmp	r3, #1
+ 801946e:	d009      	beq.n	8019484 <dhcp_parse_reply+0x2c4>
+ 8019470:	4b18      	ldr	r3, [pc, #96]	; (80194d4 <dhcp_parse_reply+0x314>)
+ 8019472:	f240 6255 	movw	r2, #1621	; 0x655
+ 8019476:	491b      	ldr	r1, [pc, #108]	; (80194e4 <dhcp_parse_reply+0x324>)
+ 8019478:	4818      	ldr	r0, [pc, #96]	; (80194dc <dhcp_parse_reply+0x31c>)
+ 801947a:	f002 ffbd 	bl	801c3f8 <iprintf>
+ 801947e:	f06f 0305 	mvn.w	r3, #5
+ 8019482:	e15b      	b.n	801973c <dhcp_parse_reply+0x57c>
+        decode_idx = DHCP_OPTION_IDX_MSG_TYPE;
+ 8019484:	2301      	movs	r3, #1
+ 8019486:	623b      	str	r3, [r7, #32]
+        break;
+ 8019488:	e045      	b.n	8019516 <dhcp_parse_reply+0x356>
+      case (DHCP_OPTION_SERVER_ID):
+        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
+ 801948a:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 801948e:	2b04      	cmp	r3, #4
+ 8019490:	d009      	beq.n	80194a6 <dhcp_parse_reply+0x2e6>
+ 8019492:	4b10      	ldr	r3, [pc, #64]	; (80194d4 <dhcp_parse_reply+0x314>)
+ 8019494:	f240 6259 	movw	r2, #1625	; 0x659
+ 8019498:	490f      	ldr	r1, [pc, #60]	; (80194d8 <dhcp_parse_reply+0x318>)
+ 801949a:	4810      	ldr	r0, [pc, #64]	; (80194dc <dhcp_parse_reply+0x31c>)
+ 801949c:	f002 ffac 	bl	801c3f8 <iprintf>
+ 80194a0:	f06f 0305 	mvn.w	r3, #5
+ 80194a4:	e14a      	b.n	801973c <dhcp_parse_reply+0x57c>
+        decode_idx = DHCP_OPTION_IDX_SERVER_ID;
+ 80194a6:	2302      	movs	r3, #2
+ 80194a8:	623b      	str	r3, [r7, #32]
+        break;
+ 80194aa:	e034      	b.n	8019516 <dhcp_parse_reply+0x356>
+      case (DHCP_OPTION_T1):
+        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
+ 80194ac:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 80194b0:	2b04      	cmp	r3, #4
+ 80194b2:	d009      	beq.n	80194c8 <dhcp_parse_reply+0x308>
+ 80194b4:	4b07      	ldr	r3, [pc, #28]	; (80194d4 <dhcp_parse_reply+0x314>)
+ 80194b6:	f240 625d 	movw	r2, #1629	; 0x65d
+ 80194ba:	4907      	ldr	r1, [pc, #28]	; (80194d8 <dhcp_parse_reply+0x318>)
+ 80194bc:	4807      	ldr	r0, [pc, #28]	; (80194dc <dhcp_parse_reply+0x31c>)
+ 80194be:	f002 ff9b 	bl	801c3f8 <iprintf>
+ 80194c2:	f06f 0305 	mvn.w	r3, #5
+ 80194c6:	e139      	b.n	801973c <dhcp_parse_reply+0x57c>
+        decode_idx = DHCP_OPTION_IDX_T1;
+ 80194c8:	2304      	movs	r3, #4
+ 80194ca:	623b      	str	r3, [r7, #32]
+        break;
+ 80194cc:	e023      	b.n	8019516 <dhcp_parse_reply+0x356>
+ 80194ce:	bf00      	nop
+ 80194d0:	2000f804 	.word	0x2000f804
+ 80194d4:	0801fac8 	.word	0x0801fac8
+ 80194d8:	0801fd50 	.word	0x0801fd50
+ 80194dc:	0801fb28 	.word	0x0801fb28
+ 80194e0:	0801fd5c 	.word	0x0801fd5c
+ 80194e4:	0801fd70 	.word	0x0801fd70
+ 80194e8:	0801fd7c 	.word	0x0801fd7c
+      case (DHCP_OPTION_T2):
+        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
+ 80194ec:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 80194f0:	2b04      	cmp	r3, #4
+ 80194f2:	d009      	beq.n	8019508 <dhcp_parse_reply+0x348>
+ 80194f4:	4b93      	ldr	r3, [pc, #588]	; (8019744 <dhcp_parse_reply+0x584>)
+ 80194f6:	f240 6261 	movw	r2, #1633	; 0x661
+ 80194fa:	4993      	ldr	r1, [pc, #588]	; (8019748 <dhcp_parse_reply+0x588>)
+ 80194fc:	4893      	ldr	r0, [pc, #588]	; (801974c <dhcp_parse_reply+0x58c>)
+ 80194fe:	f002 ff7b 	bl	801c3f8 <iprintf>
+ 8019502:	f06f 0305 	mvn.w	r3, #5
+ 8019506:	e119      	b.n	801973c <dhcp_parse_reply+0x57c>
+        decode_idx = DHCP_OPTION_IDX_T2;
+ 8019508:	2305      	movs	r3, #5
+ 801950a:	623b      	str	r3, [r7, #32]
+        break;
+ 801950c:	e003      	b.n	8019516 <dhcp_parse_reply+0x356>
+      default:
+        decode_len = 0;
+ 801950e:	2300      	movs	r3, #0
+ 8019510:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
+        LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", (u16_t)op));
+        LWIP_HOOK_DHCP_PARSE_OPTION(ip_current_netif(), dhcp, dhcp->state, msg_in,
+                                    dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE) ? (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE) : 0,
+                                    op, len, q, val_offset);
+        break;
+ 8019514:	bf00      	nop
+    }
+    if (op == DHCP_OPTION_PAD) {
+ 8019516:	7dfb      	ldrb	r3, [r7, #23]
+ 8019518:	2b00      	cmp	r3, #0
+ 801951a:	d103      	bne.n	8019524 <dhcp_parse_reply+0x364>
+      offset++;
+ 801951c:	8f7b      	ldrh	r3, [r7, #58]	; 0x3a
+ 801951e:	3301      	adds	r3, #1
+ 8019520:	877b      	strh	r3, [r7, #58]	; 0x3a
+ 8019522:	e0a1      	b.n	8019668 <dhcp_parse_reply+0x4a8>
+    } else {
+      if (offset + len + 2 > 0xFFFF) {
+ 8019524:	8f7a      	ldrh	r2, [r7, #58]	; 0x3a
+ 8019526:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 801952a:	4413      	add	r3, r2
+ 801952c:	3302      	adds	r3, #2
+ 801952e:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 8019532:	db02      	blt.n	801953a <dhcp_parse_reply+0x37a>
+        /* overflow */
+        return ERR_BUF;
+ 8019534:	f06f 0301 	mvn.w	r3, #1
+ 8019538:	e100      	b.n	801973c <dhcp_parse_reply+0x57c>
+      }
+      offset = (u16_t)(offset + len + 2);
+ 801953a:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 801953e:	b29a      	uxth	r2, r3
+ 8019540:	8f7b      	ldrh	r3, [r7, #58]	; 0x3a
+ 8019542:	4413      	add	r3, r2
+ 8019544:	b29b      	uxth	r3, r3
+ 8019546:	3302      	adds	r3, #2
+ 8019548:	877b      	strh	r3, [r7, #58]	; 0x3a
+      if (decode_len > 0) {
+ 801954a:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
+ 801954e:	2b00      	cmp	r3, #0
+ 8019550:	f000 808a 	beq.w	8019668 <dhcp_parse_reply+0x4a8>
+        u32_t value = 0;
+ 8019554:	2300      	movs	r3, #0
+ 8019556:	60bb      	str	r3, [r7, #8]
+        u16_t copy_len;
+decode_next:
+        LWIP_ASSERT("check decode_idx", decode_idx >= 0 && decode_idx < DHCP_OPTION_IDX_MAX);
+ 8019558:	6a3b      	ldr	r3, [r7, #32]
+ 801955a:	2b00      	cmp	r3, #0
+ 801955c:	db02      	blt.n	8019564 <dhcp_parse_reply+0x3a4>
+ 801955e:	6a3b      	ldr	r3, [r7, #32]
+ 8019560:	2b07      	cmp	r3, #7
+ 8019562:	dd06      	ble.n	8019572 <dhcp_parse_reply+0x3b2>
+ 8019564:	4b77      	ldr	r3, [pc, #476]	; (8019744 <dhcp_parse_reply+0x584>)
+ 8019566:	f44f 62cf 	mov.w	r2, #1656	; 0x678
+ 801956a:	4979      	ldr	r1, [pc, #484]	; (8019750 <dhcp_parse_reply+0x590>)
+ 801956c:	4877      	ldr	r0, [pc, #476]	; (801974c <dhcp_parse_reply+0x58c>)
+ 801956e:	f002 ff43 	bl	801c3f8 <iprintf>
+        if (!dhcp_option_given(dhcp, decode_idx)) {
+ 8019572:	4a78      	ldr	r2, [pc, #480]	; (8019754 <dhcp_parse_reply+0x594>)
+ 8019574:	6a3b      	ldr	r3, [r7, #32]
+ 8019576:	4413      	add	r3, r2
+ 8019578:	781b      	ldrb	r3, [r3, #0]
+ 801957a:	2b00      	cmp	r3, #0
+ 801957c:	d174      	bne.n	8019668 <dhcp_parse_reply+0x4a8>
+          copy_len = LWIP_MIN(decode_len, 4);
+ 801957e:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
+ 8019582:	2b04      	cmp	r3, #4
+ 8019584:	bf28      	it	cs
+ 8019586:	2304      	movcs	r3, #4
+ 8019588:	b2db      	uxtb	r3, r3
+ 801958a:	82bb      	strh	r3, [r7, #20]
+          if (pbuf_copy_partial(q, &value, copy_len, val_offset) != copy_len) {
+ 801958c:	8bfb      	ldrh	r3, [r7, #30]
+ 801958e:	8aba      	ldrh	r2, [r7, #20]
+ 8019590:	f107 0108 	add.w	r1, r7, #8
+ 8019594:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 8019596:	f7f8 fc05 	bl	8011da4 <pbuf_copy_partial>
+ 801959a:	4603      	mov	r3, r0
+ 801959c:	461a      	mov	r2, r3
+ 801959e:	8abb      	ldrh	r3, [r7, #20]
+ 80195a0:	4293      	cmp	r3, r2
+ 80195a2:	d002      	beq.n	80195aa <dhcp_parse_reply+0x3ea>
+            return ERR_BUF;
+ 80195a4:	f06f 0301 	mvn.w	r3, #1
+ 80195a8:	e0c8      	b.n	801973c <dhcp_parse_reply+0x57c>
+          }
+          if (decode_len > 4) {
+ 80195aa:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
+ 80195ae:	2b04      	cmp	r3, #4
+ 80195b0:	d933      	bls.n	801961a <dhcp_parse_reply+0x45a>
+            /* decode more than one u32_t */
+            u16_t next_val_offset;
+            LWIP_ERROR("decode_len %% 4 == 0", decode_len % 4 == 0, return ERR_VAL;);
+ 80195b2:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
+ 80195b6:	f003 0303 	and.w	r3, r3, #3
+ 80195ba:	b2db      	uxtb	r3, r3
+ 80195bc:	2b00      	cmp	r3, #0
+ 80195be:	d009      	beq.n	80195d4 <dhcp_parse_reply+0x414>
+ 80195c0:	4b60      	ldr	r3, [pc, #384]	; (8019744 <dhcp_parse_reply+0x584>)
+ 80195c2:	f240 6281 	movw	r2, #1665	; 0x681
+ 80195c6:	4964      	ldr	r1, [pc, #400]	; (8019758 <dhcp_parse_reply+0x598>)
+ 80195c8:	4860      	ldr	r0, [pc, #384]	; (801974c <dhcp_parse_reply+0x58c>)
+ 80195ca:	f002 ff15 	bl	801c3f8 <iprintf>
+ 80195ce:	f06f 0305 	mvn.w	r3, #5
+ 80195d2:	e0b3      	b.n	801973c <dhcp_parse_reply+0x57c>
+            dhcp_got_option(dhcp, decode_idx);
+ 80195d4:	4a5f      	ldr	r2, [pc, #380]	; (8019754 <dhcp_parse_reply+0x594>)
+ 80195d6:	6a3b      	ldr	r3, [r7, #32]
+ 80195d8:	4413      	add	r3, r2
+ 80195da:	2201      	movs	r2, #1
+ 80195dc:	701a      	strb	r2, [r3, #0]
+            dhcp_set_option_value(dhcp, decode_idx, lwip_htonl(value));
+ 80195de:	68bb      	ldr	r3, [r7, #8]
+ 80195e0:	4618      	mov	r0, r3
+ 80195e2:	f7f6 fe3a 	bl	801025a <lwip_htonl>
+ 80195e6:	4601      	mov	r1, r0
+ 80195e8:	4a5c      	ldr	r2, [pc, #368]	; (801975c <dhcp_parse_reply+0x59c>)
+ 80195ea:	6a3b      	ldr	r3, [r7, #32]
+ 80195ec:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
+            decode_len = (u8_t)(decode_len - 4);
+ 80195f0:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
+ 80195f4:	3b04      	subs	r3, #4
+ 80195f6:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
+            next_val_offset = (u16_t)(val_offset + 4);
+ 80195fa:	8bfb      	ldrh	r3, [r7, #30]
+ 80195fc:	3304      	adds	r3, #4
+ 80195fe:	827b      	strh	r3, [r7, #18]
+            if (next_val_offset < val_offset) {
+ 8019600:	8a7a      	ldrh	r2, [r7, #18]
+ 8019602:	8bfb      	ldrh	r3, [r7, #30]
+ 8019604:	429a      	cmp	r2, r3
+ 8019606:	d202      	bcs.n	801960e <dhcp_parse_reply+0x44e>
+              /* overflow */
+              return ERR_BUF;
+ 8019608:	f06f 0301 	mvn.w	r3, #1
+ 801960c:	e096      	b.n	801973c <dhcp_parse_reply+0x57c>
+            }
+            val_offset = next_val_offset;
+ 801960e:	8a7b      	ldrh	r3, [r7, #18]
+ 8019610:	83fb      	strh	r3, [r7, #30]
+            decode_idx++;
+ 8019612:	6a3b      	ldr	r3, [r7, #32]
+ 8019614:	3301      	adds	r3, #1
+ 8019616:	623b      	str	r3, [r7, #32]
+            goto decode_next;
+ 8019618:	e79e      	b.n	8019558 <dhcp_parse_reply+0x398>
+          } else if (decode_len == 4) {
+ 801961a:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
+ 801961e:	2b04      	cmp	r3, #4
+ 8019620:	d106      	bne.n	8019630 <dhcp_parse_reply+0x470>
+            value = lwip_ntohl(value);
+ 8019622:	68bb      	ldr	r3, [r7, #8]
+ 8019624:	4618      	mov	r0, r3
+ 8019626:	f7f6 fe18 	bl	801025a <lwip_htonl>
+ 801962a:	4603      	mov	r3, r0
+ 801962c:	60bb      	str	r3, [r7, #8]
+ 801962e:	e011      	b.n	8019654 <dhcp_parse_reply+0x494>
+          } else {
+            LWIP_ERROR("invalid decode_len", decode_len == 1, return ERR_VAL;);
+ 8019630:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
+ 8019634:	2b01      	cmp	r3, #1
+ 8019636:	d009      	beq.n	801964c <dhcp_parse_reply+0x48c>
+ 8019638:	4b42      	ldr	r3, [pc, #264]	; (8019744 <dhcp_parse_reply+0x584>)
+ 801963a:	f44f 62d2 	mov.w	r2, #1680	; 0x690
+ 801963e:	4948      	ldr	r1, [pc, #288]	; (8019760 <dhcp_parse_reply+0x5a0>)
+ 8019640:	4842      	ldr	r0, [pc, #264]	; (801974c <dhcp_parse_reply+0x58c>)
+ 8019642:	f002 fed9 	bl	801c3f8 <iprintf>
+ 8019646:	f06f 0305 	mvn.w	r3, #5
+ 801964a:	e077      	b.n	801973c <dhcp_parse_reply+0x57c>
+            value = ((u8_t *)&value)[0];
+ 801964c:	f107 0308 	add.w	r3, r7, #8
+ 8019650:	781b      	ldrb	r3, [r3, #0]
+ 8019652:	60bb      	str	r3, [r7, #8]
+          }
+          dhcp_got_option(dhcp, decode_idx);
+ 8019654:	4a3f      	ldr	r2, [pc, #252]	; (8019754 <dhcp_parse_reply+0x594>)
+ 8019656:	6a3b      	ldr	r3, [r7, #32]
+ 8019658:	4413      	add	r3, r2
+ 801965a:	2201      	movs	r2, #1
+ 801965c:	701a      	strb	r2, [r3, #0]
+          dhcp_set_option_value(dhcp, decode_idx, value);
+ 801965e:	68ba      	ldr	r2, [r7, #8]
+ 8019660:	493e      	ldr	r1, [pc, #248]	; (801975c <dhcp_parse_reply+0x59c>)
+ 8019662:	6a3b      	ldr	r3, [r7, #32]
+ 8019664:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
+        }
+      }
+    }
+    if (offset >= q->len) {
+ 8019668:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801966a:	895b      	ldrh	r3, [r3, #10]
+ 801966c:	8f7a      	ldrh	r2, [r7, #58]	; 0x3a
+ 801966e:	429a      	cmp	r2, r3
+ 8019670:	d324      	bcc.n	80196bc <dhcp_parse_reply+0x4fc>
+      offset = (u16_t)(offset - q->len);
+ 8019672:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 8019674:	895b      	ldrh	r3, [r3, #10]
+ 8019676:	8f7a      	ldrh	r2, [r7, #58]	; 0x3a
+ 8019678:	1ad3      	subs	r3, r2, r3
+ 801967a:	877b      	strh	r3, [r7, #58]	; 0x3a
+      offset_max = (u16_t)(offset_max - q->len);
+ 801967c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801967e:	895b      	ldrh	r3, [r3, #10]
+ 8019680:	8f3a      	ldrh	r2, [r7, #56]	; 0x38
+ 8019682:	1ad3      	subs	r3, r2, r3
+ 8019684:	873b      	strh	r3, [r7, #56]	; 0x38
+      if (offset < offset_max) {
+ 8019686:	8f7a      	ldrh	r2, [r7, #58]	; 0x3a
+ 8019688:	8f3b      	ldrh	r3, [r7, #56]	; 0x38
+ 801968a:	429a      	cmp	r2, r3
+ 801968c:	d213      	bcs.n	80196b6 <dhcp_parse_reply+0x4f6>
+        q = q->next;
+ 801968e:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 8019690:	681b      	ldr	r3, [r3, #0]
+ 8019692:	633b      	str	r3, [r7, #48]	; 0x30
+        LWIP_ERROR("next pbuf was null", q != NULL, return ERR_VAL;);
+ 8019694:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 8019696:	2b00      	cmp	r3, #0
+ 8019698:	d109      	bne.n	80196ae <dhcp_parse_reply+0x4ee>
+ 801969a:	4b2a      	ldr	r3, [pc, #168]	; (8019744 <dhcp_parse_reply+0x584>)
+ 801969c:	f240 629d 	movw	r2, #1693	; 0x69d
+ 80196a0:	4930      	ldr	r1, [pc, #192]	; (8019764 <dhcp_parse_reply+0x5a4>)
+ 80196a2:	482a      	ldr	r0, [pc, #168]	; (801974c <dhcp_parse_reply+0x58c>)
+ 80196a4:	f002 fea8 	bl	801c3f8 <iprintf>
+ 80196a8:	f06f 0305 	mvn.w	r3, #5
+ 80196ac:	e046      	b.n	801973c <dhcp_parse_reply+0x57c>
+        options = (u8_t *)q->payload;
+ 80196ae:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 80196b0:	685b      	ldr	r3, [r3, #4]
+ 80196b2:	63fb      	str	r3, [r7, #60]	; 0x3c
+ 80196b4:	e002      	b.n	80196bc <dhcp_parse_reply+0x4fc>
+      } else {
+        /* We've run out of bytes, probably no end marker. Don't proceed. */
+        return ERR_BUF;
+ 80196b6:	f06f 0301 	mvn.w	r3, #1
+ 80196ba:	e03f      	b.n	801973c <dhcp_parse_reply+0x57c>
+  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
+ 80196bc:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 80196be:	2b00      	cmp	r3, #0
+ 80196c0:	d00a      	beq.n	80196d8 <dhcp_parse_reply+0x518>
+ 80196c2:	8f7a      	ldrh	r2, [r7, #58]	; 0x3a
+ 80196c4:	8f3b      	ldrh	r3, [r7, #56]	; 0x38
+ 80196c6:	429a      	cmp	r2, r3
+ 80196c8:	d206      	bcs.n	80196d8 <dhcp_parse_reply+0x518>
+ 80196ca:	8f7b      	ldrh	r3, [r7, #58]	; 0x3a
+ 80196cc:	6bfa      	ldr	r2, [r7, #60]	; 0x3c
+ 80196ce:	4413      	add	r3, r2
+ 80196d0:	781b      	ldrb	r3, [r3, #0]
+ 80196d2:	2bff      	cmp	r3, #255	; 0xff
+ 80196d4:	f47f adb7 	bne.w	8019246 <dhcp_parse_reply+0x86>
+      }
+    }
+  }
+  /* is this an overloaded message? */
+  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_OVERLOAD)) {
+ 80196d8:	4b1e      	ldr	r3, [pc, #120]	; (8019754 <dhcp_parse_reply+0x594>)
+ 80196da:	781b      	ldrb	r3, [r3, #0]
+ 80196dc:	2b00      	cmp	r3, #0
+ 80196de:	d018      	beq.n	8019712 <dhcp_parse_reply+0x552>
+    u32_t overload = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_OVERLOAD);
+ 80196e0:	4b1e      	ldr	r3, [pc, #120]	; (801975c <dhcp_parse_reply+0x59c>)
+ 80196e2:	681b      	ldr	r3, [r3, #0]
+ 80196e4:	60fb      	str	r3, [r7, #12]
+    dhcp_clear_option(dhcp, DHCP_OPTION_IDX_OVERLOAD);
+ 80196e6:	4b1b      	ldr	r3, [pc, #108]	; (8019754 <dhcp_parse_reply+0x594>)
+ 80196e8:	2200      	movs	r2, #0
+ 80196ea:	701a      	strb	r2, [r3, #0]
+    if (overload == DHCP_OVERLOAD_FILE) {
+ 80196ec:	68fb      	ldr	r3, [r7, #12]
+ 80196ee:	2b01      	cmp	r3, #1
+ 80196f0:	d102      	bne.n	80196f8 <dhcp_parse_reply+0x538>
+      parse_file_as_options = 1;
+ 80196f2:	2301      	movs	r3, #1
+ 80196f4:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 80196f6:	e00c      	b.n	8019712 <dhcp_parse_reply+0x552>
+      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded file field\n"));
+    } else if (overload == DHCP_OVERLOAD_SNAME) {
+ 80196f8:	68fb      	ldr	r3, [r7, #12]
+ 80196fa:	2b02      	cmp	r3, #2
+ 80196fc:	d102      	bne.n	8019704 <dhcp_parse_reply+0x544>
+      parse_sname_as_options = 1;
+ 80196fe:	2301      	movs	r3, #1
+ 8019700:	62bb      	str	r3, [r7, #40]	; 0x28
+ 8019702:	e006      	b.n	8019712 <dhcp_parse_reply+0x552>
+      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname field\n"));
+    } else if (overload == DHCP_OVERLOAD_SNAME_FILE) {
+ 8019704:	68fb      	ldr	r3, [r7, #12]
+ 8019706:	2b03      	cmp	r3, #3
+ 8019708:	d103      	bne.n	8019712 <dhcp_parse_reply+0x552>
+      parse_sname_as_options = 1;
+ 801970a:	2301      	movs	r3, #1
+ 801970c:	62bb      	str	r3, [r7, #40]	; 0x28
+      parse_file_as_options = 1;
+ 801970e:	2301      	movs	r3, #1
+ 8019710:	62fb      	str	r3, [r7, #44]	; 0x2c
+      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname and file field\n"));
+    } else {
+      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("invalid overload option: %d\n", (int)overload));
+    }
+  }
+  if (parse_file_as_options) {
+ 8019712:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8019714:	2b00      	cmp	r3, #0
+ 8019716:	d006      	beq.n	8019726 <dhcp_parse_reply+0x566>
+    /* if both are overloaded, parse file first and then sname (RFC 2131 ch. 4.1) */
+    parse_file_as_options = 0;
+ 8019718:	2300      	movs	r3, #0
+ 801971a:	62fb      	str	r3, [r7, #44]	; 0x2c
+    options_idx = DHCP_FILE_OFS;
+ 801971c:	236c      	movs	r3, #108	; 0x6c
+ 801971e:	86fb      	strh	r3, [r7, #54]	; 0x36
+    options_idx_max = DHCP_FILE_OFS + DHCP_FILE_LEN;
+ 8019720:	23ec      	movs	r3, #236	; 0xec
+ 8019722:	86bb      	strh	r3, [r7, #52]	; 0x34
+#if LWIP_DHCP_BOOTP_FILE
+    file_overloaded = 1;
+#endif
+    goto again;
+ 8019724:	e569      	b.n	80191fa <dhcp_parse_reply+0x3a>
+  } else if (parse_sname_as_options) {
+ 8019726:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8019728:	2b00      	cmp	r3, #0
+ 801972a:	d006      	beq.n	801973a <dhcp_parse_reply+0x57a>
+    parse_sname_as_options = 0;
+ 801972c:	2300      	movs	r3, #0
+ 801972e:	62bb      	str	r3, [r7, #40]	; 0x28
+    options_idx = DHCP_SNAME_OFS;
+ 8019730:	232c      	movs	r3, #44	; 0x2c
+ 8019732:	86fb      	strh	r3, [r7, #54]	; 0x36
+    options_idx_max = DHCP_SNAME_OFS + DHCP_SNAME_LEN;
+ 8019734:	236c      	movs	r3, #108	; 0x6c
+ 8019736:	86bb      	strh	r3, [r7, #52]	; 0x34
+    goto again;
+ 8019738:	e55f      	b.n	80191fa <dhcp_parse_reply+0x3a>
+    }
+    /* make sure the string is really NULL-terminated */
+    dhcp->boot_file_name[DHCP_FILE_LEN-1] = 0;
+  }
+#endif /* LWIP_DHCP_BOOTP_FILE */ 
+  return ERR_OK;
+ 801973a:	2300      	movs	r3, #0
+}
+ 801973c:	4618      	mov	r0, r3
+ 801973e:	3740      	adds	r7, #64	; 0x40
+ 8019740:	46bd      	mov	sp, r7
+ 8019742:	bd80      	pop	{r7, pc}
+ 8019744:	0801fac8 	.word	0x0801fac8
+ 8019748:	0801fd50 	.word	0x0801fd50
+ 801974c:	0801fb28 	.word	0x0801fb28
+ 8019750:	0801fd94 	.word	0x0801fd94
+ 8019754:	2000f804 	.word	0x2000f804
+ 8019758:	0801fda8 	.word	0x0801fda8
+ 801975c:	2000f80c 	.word	0x2000f80c
+ 8019760:	0801fdc0 	.word	0x0801fdc0
+ 8019764:	0801fdd4 	.word	0x0801fdd4
+
+08019768 <dhcp_recv>:
+/**
+ * If an incoming DHCP message is in response to us, then trigger the state machine
+ */
+static void
+dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port)
+{
+ 8019768:	b580      	push	{r7, lr}
+ 801976a:	b08a      	sub	sp, #40	; 0x28
+ 801976c:	af00      	add	r7, sp, #0
+ 801976e:	60f8      	str	r0, [r7, #12]
+ 8019770:	60b9      	str	r1, [r7, #8]
+ 8019772:	607a      	str	r2, [r7, #4]
+ 8019774:	603b      	str	r3, [r7, #0]
+  struct netif *netif = ip_current_input_netif();
+ 8019776:	4b5f      	ldr	r3, [pc, #380]	; (80198f4 <dhcp_recv+0x18c>)
+ 8019778:	685b      	ldr	r3, [r3, #4]
+ 801977a:	623b      	str	r3, [r7, #32]
+  struct dhcp *dhcp = netif_dhcp_data(netif);
+ 801977c:	6a3b      	ldr	r3, [r7, #32]
+ 801977e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8019780:	61fb      	str	r3, [r7, #28]
+  struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload;
+ 8019782:	687b      	ldr	r3, [r7, #4]
+ 8019784:	685b      	ldr	r3, [r3, #4]
+ 8019786:	61bb      	str	r3, [r7, #24]
+  struct dhcp_msg *msg_in;
+
+  LWIP_UNUSED_ARG(arg);
+
+  /* Caught DHCP message from netif that does not have DHCP enabled? -> not interested */
+  if ((dhcp == NULL) || (dhcp->pcb_allocated == 0)) {
+ 8019788:	69fb      	ldr	r3, [r7, #28]
+ 801978a:	2b00      	cmp	r3, #0
+ 801978c:	f000 809d 	beq.w	80198ca <dhcp_recv+0x162>
+ 8019790:	69fb      	ldr	r3, [r7, #28]
+ 8019792:	791b      	ldrb	r3, [r3, #4]
+ 8019794:	2b00      	cmp	r3, #0
+ 8019796:	f000 8098 	beq.w	80198ca <dhcp_recv+0x162>
+  /* prevent warnings about unused arguments */
+  LWIP_UNUSED_ARG(pcb);
+  LWIP_UNUSED_ARG(addr);
+  LWIP_UNUSED_ARG(port);
+
+  if (p->len < DHCP_MIN_REPLY_LEN) {
+ 801979a:	687b      	ldr	r3, [r7, #4]
+ 801979c:	895b      	ldrh	r3, [r3, #10]
+ 801979e:	2b2b      	cmp	r3, #43	; 0x2b
+ 80197a0:	f240 8095 	bls.w	80198ce <dhcp_recv+0x166>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP reply message or pbuf too short\n"));
+    goto free_pbuf_and_return;
+  }
+
+  if (reply_msg->op != DHCP_BOOTREPLY) {
+ 80197a4:	69bb      	ldr	r3, [r7, #24]
+ 80197a6:	781b      	ldrb	r3, [r3, #0]
+ 80197a8:	2b02      	cmp	r3, #2
+ 80197aa:	f040 8092 	bne.w	80198d2 <dhcp_recv+0x16a>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op));
+    goto free_pbuf_and_return;
+  }
+  /* iterate through hardware address and match against DHCP message */
+  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
+ 80197ae:	2300      	movs	r3, #0
+ 80197b0:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+ 80197b4:	e012      	b.n	80197dc <dhcp_recv+0x74>
+    if (netif->hwaddr[i] != reply_msg->chaddr[i]) {
+ 80197b6:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 80197ba:	6a3a      	ldr	r2, [r7, #32]
+ 80197bc:	4413      	add	r3, r2
+ 80197be:	f893 202a 	ldrb.w	r2, [r3, #42]	; 0x2a
+ 80197c2:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 80197c6:	69b9      	ldr	r1, [r7, #24]
+ 80197c8:	440b      	add	r3, r1
+ 80197ca:	7f1b      	ldrb	r3, [r3, #28]
+ 80197cc:	429a      	cmp	r2, r3
+ 80197ce:	f040 8082 	bne.w	80198d6 <dhcp_recv+0x16e>
+  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
+ 80197d2:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 80197d6:	3301      	adds	r3, #1
+ 80197d8:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+ 80197dc:	6a3b      	ldr	r3, [r7, #32]
+ 80197de:	f893 3030 	ldrb.w	r3, [r3, #48]	; 0x30
+ 80197e2:	f897 2027 	ldrb.w	r2, [r7, #39]	; 0x27
+ 80197e6:	429a      	cmp	r2, r3
+ 80197e8:	d203      	bcs.n	80197f2 <dhcp_recv+0x8a>
+ 80197ea:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
+ 80197ee:	2b05      	cmp	r3, #5
+ 80197f0:	d9e1      	bls.n	80197b6 <dhcp_recv+0x4e>
+                   (u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i]));
+      goto free_pbuf_and_return;
+    }
+  }
+  /* match transaction ID against what we expected */
+  if (lwip_ntohl(reply_msg->xid) != dhcp->xid) {
+ 80197f2:	69bb      	ldr	r3, [r7, #24]
+ 80197f4:	685b      	ldr	r3, [r3, #4]
+ 80197f6:	4618      	mov	r0, r3
+ 80197f8:	f7f6 fd2f 	bl	801025a <lwip_htonl>
+ 80197fc:	4602      	mov	r2, r0
+ 80197fe:	69fb      	ldr	r3, [r7, #28]
+ 8019800:	681b      	ldr	r3, [r3, #0]
+ 8019802:	429a      	cmp	r2, r3
+ 8019804:	d169      	bne.n	80198da <dhcp_recv+0x172>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
+                ("transaction id mismatch reply_msg->xid(%"X32_F")!=dhcp->xid(%"X32_F")\n", lwip_ntohl(reply_msg->xid), dhcp->xid));
+    goto free_pbuf_and_return;
+  }
+  /* option fields could be unfold? */
+  if (dhcp_parse_reply(p, dhcp) != ERR_OK) {
+ 8019806:	69f9      	ldr	r1, [r7, #28]
+ 8019808:	6878      	ldr	r0, [r7, #4]
+ 801980a:	f7ff fcd9 	bl	80191c0 <dhcp_parse_reply>
+ 801980e:	4603      	mov	r3, r0
+ 8019810:	2b00      	cmp	r3, #0
+ 8019812:	d164      	bne.n	80198de <dhcp_recv+0x176>
+    goto free_pbuf_and_return;
+  }
+
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n"));
+  /* obtain pointer to DHCP message type */
+  if (!dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE)) {
+ 8019814:	4b38      	ldr	r3, [pc, #224]	; (80198f8 <dhcp_recv+0x190>)
+ 8019816:	785b      	ldrb	r3, [r3, #1]
+ 8019818:	2b00      	cmp	r3, #0
+ 801981a:	d062      	beq.n	80198e2 <dhcp_recv+0x17a>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP_OPTION_MESSAGE_TYPE option not found\n"));
+    goto free_pbuf_and_return;
+  }
+
+  msg_in = (struct dhcp_msg *)p->payload;
+ 801981c:	687b      	ldr	r3, [r7, #4]
+ 801981e:	685b      	ldr	r3, [r3, #4]
+ 8019820:	617b      	str	r3, [r7, #20]
+  /* read DHCP message type */
+  msg_type = (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE);
+ 8019822:	4b36      	ldr	r3, [pc, #216]	; (80198fc <dhcp_recv+0x194>)
+ 8019824:	685b      	ldr	r3, [r3, #4]
+ 8019826:	74fb      	strb	r3, [r7, #19]
+  /* message type is DHCP ACK? */
+  if (msg_type == DHCP_ACK) {
+ 8019828:	7cfb      	ldrb	r3, [r7, #19]
+ 801982a:	2b05      	cmp	r3, #5
+ 801982c:	d12a      	bne.n	8019884 <dhcp_recv+0x11c>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_ACK received\n"));
+    /* in requesting state? */
+    if (dhcp->state == DHCP_STATE_REQUESTING) {
+ 801982e:	69fb      	ldr	r3, [r7, #28]
+ 8019830:	795b      	ldrb	r3, [r3, #5]
+ 8019832:	2b01      	cmp	r3, #1
+ 8019834:	d112      	bne.n	801985c <dhcp_recv+0xf4>
+      dhcp_handle_ack(netif, msg_in);
+ 8019836:	6979      	ldr	r1, [r7, #20]
+ 8019838:	6a38      	ldr	r0, [r7, #32]
+ 801983a:	f7fe fe05 	bl	8018448 <dhcp_handle_ack>
+#if DHCP_DOES_ARP_CHECK
+      if ((netif->flags & NETIF_FLAG_ETHARP) != 0) {
+ 801983e:	6a3b      	ldr	r3, [r7, #32]
+ 8019840:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 8019844:	f003 0308 	and.w	r3, r3, #8
+ 8019848:	2b00      	cmp	r3, #0
+ 801984a:	d003      	beq.n	8019854 <dhcp_recv+0xec>
+        /* check if the acknowledged lease address is already in use */
+        dhcp_check(netif);
+ 801984c:	6a38      	ldr	r0, [r7, #32]
+ 801984e:	f7fe fb73 	bl	8017f38 <dhcp_check>
+ 8019852:	e047      	b.n	80198e4 <dhcp_recv+0x17c>
+      } else {
+        /* bind interface to the acknowledged lease address */
+        dhcp_bind(netif);
+ 8019854:	6a38      	ldr	r0, [r7, #32]
+ 8019856:	f7ff f867 	bl	8018928 <dhcp_bind>
+ 801985a:	e043      	b.n	80198e4 <dhcp_recv+0x17c>
+      /* bind interface to the acknowledged lease address */
+      dhcp_bind(netif);
+#endif
+    }
+    /* already bound to the given lease address? */
+    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
+ 801985c:	69fb      	ldr	r3, [r7, #28]
+ 801985e:	795b      	ldrb	r3, [r3, #5]
+ 8019860:	2b03      	cmp	r3, #3
+ 8019862:	d007      	beq.n	8019874 <dhcp_recv+0x10c>
+ 8019864:	69fb      	ldr	r3, [r7, #28]
+ 8019866:	795b      	ldrb	r3, [r3, #5]
+ 8019868:	2b04      	cmp	r3, #4
+ 801986a:	d003      	beq.n	8019874 <dhcp_recv+0x10c>
+             (dhcp->state == DHCP_STATE_RENEWING)) {
+ 801986c:	69fb      	ldr	r3, [r7, #28]
+ 801986e:	795b      	ldrb	r3, [r3, #5]
+    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
+ 8019870:	2b05      	cmp	r3, #5
+ 8019872:	d137      	bne.n	80198e4 <dhcp_recv+0x17c>
+      dhcp_handle_ack(netif, msg_in);
+ 8019874:	6979      	ldr	r1, [r7, #20]
+ 8019876:	6a38      	ldr	r0, [r7, #32]
+ 8019878:	f7fe fde6 	bl	8018448 <dhcp_handle_ack>
+      dhcp_bind(netif);
+ 801987c:	6a38      	ldr	r0, [r7, #32]
+ 801987e:	f7ff f853 	bl	8018928 <dhcp_bind>
+ 8019882:	e02f      	b.n	80198e4 <dhcp_recv+0x17c>
+    }
+  }
+  /* received a DHCP_NAK in appropriate state? */
+  else if ((msg_type == DHCP_NAK) &&
+ 8019884:	7cfb      	ldrb	r3, [r7, #19]
+ 8019886:	2b06      	cmp	r3, #6
+ 8019888:	d113      	bne.n	80198b2 <dhcp_recv+0x14a>
+           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
+ 801988a:	69fb      	ldr	r3, [r7, #28]
+ 801988c:	795b      	ldrb	r3, [r3, #5]
+  else if ((msg_type == DHCP_NAK) &&
+ 801988e:	2b03      	cmp	r3, #3
+ 8019890:	d00b      	beq.n	80198aa <dhcp_recv+0x142>
+           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
+ 8019892:	69fb      	ldr	r3, [r7, #28]
+ 8019894:	795b      	ldrb	r3, [r3, #5]
+ 8019896:	2b01      	cmp	r3, #1
+ 8019898:	d007      	beq.n	80198aa <dhcp_recv+0x142>
+            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
+ 801989a:	69fb      	ldr	r3, [r7, #28]
+ 801989c:	795b      	ldrb	r3, [r3, #5]
+           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
+ 801989e:	2b04      	cmp	r3, #4
+ 80198a0:	d003      	beq.n	80198aa <dhcp_recv+0x142>
+            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
+ 80198a2:	69fb      	ldr	r3, [r7, #28]
+ 80198a4:	795b      	ldrb	r3, [r3, #5]
+ 80198a6:	2b05      	cmp	r3, #5
+ 80198a8:	d103      	bne.n	80198b2 <dhcp_recv+0x14a>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_NAK received\n"));
+    dhcp_handle_nak(netif);
+ 80198aa:	6a38      	ldr	r0, [r7, #32]
+ 80198ac:	f7fe fb2a 	bl	8017f04 <dhcp_handle_nak>
+ 80198b0:	e018      	b.n	80198e4 <dhcp_recv+0x17c>
+  }
+  /* received a DHCP_OFFER in DHCP_STATE_SELECTING state? */
+  else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_STATE_SELECTING)) {
+ 80198b2:	7cfb      	ldrb	r3, [r7, #19]
+ 80198b4:	2b02      	cmp	r3, #2
+ 80198b6:	d108      	bne.n	80198ca <dhcp_recv+0x162>
+ 80198b8:	69fb      	ldr	r3, [r7, #28]
+ 80198ba:	795b      	ldrb	r3, [r3, #5]
+ 80198bc:	2b06      	cmp	r3, #6
+ 80198be:	d104      	bne.n	80198ca <dhcp_recv+0x162>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_OFFER received in DHCP_STATE_SELECTING state\n"));
+    /* remember offered lease */
+    dhcp_handle_offer(netif, msg_in);
+ 80198c0:	6979      	ldr	r1, [r7, #20]
+ 80198c2:	6a38      	ldr	r0, [r7, #32]
+ 80198c4:	f7fe fb6c 	bl	8017fa0 <dhcp_handle_offer>
+ 80198c8:	e00c      	b.n	80198e4 <dhcp_recv+0x17c>
+  }
+
+free_pbuf_and_return:
+ 80198ca:	bf00      	nop
+ 80198cc:	e00a      	b.n	80198e4 <dhcp_recv+0x17c>
+    goto free_pbuf_and_return;
+ 80198ce:	bf00      	nop
+ 80198d0:	e008      	b.n	80198e4 <dhcp_recv+0x17c>
+    goto free_pbuf_and_return;
+ 80198d2:	bf00      	nop
+ 80198d4:	e006      	b.n	80198e4 <dhcp_recv+0x17c>
+      goto free_pbuf_and_return;
+ 80198d6:	bf00      	nop
+ 80198d8:	e004      	b.n	80198e4 <dhcp_recv+0x17c>
+    goto free_pbuf_and_return;
+ 80198da:	bf00      	nop
+ 80198dc:	e002      	b.n	80198e4 <dhcp_recv+0x17c>
+    goto free_pbuf_and_return;
+ 80198de:	bf00      	nop
+ 80198e0:	e000      	b.n	80198e4 <dhcp_recv+0x17c>
+    goto free_pbuf_and_return;
+ 80198e2:	bf00      	nop
+  pbuf_free(p);
+ 80198e4:	6878      	ldr	r0, [r7, #4]
+ 80198e6:	f7f8 f857 	bl	8011998 <pbuf_free>
+}
+ 80198ea:	bf00      	nop
+ 80198ec:	3728      	adds	r7, #40	; 0x28
+ 80198ee:	46bd      	mov	sp, r7
+ 80198f0:	bd80      	pop	{r7, pc}
+ 80198f2:	bf00      	nop
+ 80198f4:	2000c0b4 	.word	0x2000c0b4
+ 80198f8:	2000f804 	.word	0x2000f804
+ 80198fc:	2000f80c 	.word	0x2000f80c
+
+08019900 <dhcp_create_msg>:
+ * @param dhcp dhcp control struct
+ * @param message_type message type of the request
+ */
+static struct pbuf *
+dhcp_create_msg(struct netif *netif, struct dhcp *dhcp, u8_t message_type, u16_t *options_out_len)
+{
+ 8019900:	b580      	push	{r7, lr}
+ 8019902:	b088      	sub	sp, #32
+ 8019904:	af00      	add	r7, sp, #0
+ 8019906:	60f8      	str	r0, [r7, #12]
+ 8019908:	60b9      	str	r1, [r7, #8]
+ 801990a:	603b      	str	r3, [r7, #0]
+ 801990c:	4613      	mov	r3, r2
+ 801990e:	71fb      	strb	r3, [r7, #7]
+  if (!xid_initialised) {
+    xid = DHCP_GLOBAL_XID;
+    xid_initialised = !xid_initialised;
+  }
+#endif
+  LWIP_ERROR("dhcp_create_msg: netif != NULL", (netif != NULL), return NULL;);
+ 8019910:	68fb      	ldr	r3, [r7, #12]
+ 8019912:	2b00      	cmp	r3, #0
+ 8019914:	d108      	bne.n	8019928 <dhcp_create_msg+0x28>
+ 8019916:	4b5f      	ldr	r3, [pc, #380]	; (8019a94 <dhcp_create_msg+0x194>)
+ 8019918:	f240 7269 	movw	r2, #1897	; 0x769
+ 801991c:	495e      	ldr	r1, [pc, #376]	; (8019a98 <dhcp_create_msg+0x198>)
+ 801991e:	485f      	ldr	r0, [pc, #380]	; (8019a9c <dhcp_create_msg+0x19c>)
+ 8019920:	f002 fd6a 	bl	801c3f8 <iprintf>
+ 8019924:	2300      	movs	r3, #0
+ 8019926:	e0b1      	b.n	8019a8c <dhcp_create_msg+0x18c>
+  LWIP_ERROR("dhcp_create_msg: dhcp != NULL", (dhcp != NULL), return NULL;);
+ 8019928:	68bb      	ldr	r3, [r7, #8]
+ 801992a:	2b00      	cmp	r3, #0
+ 801992c:	d108      	bne.n	8019940 <dhcp_create_msg+0x40>
+ 801992e:	4b59      	ldr	r3, [pc, #356]	; (8019a94 <dhcp_create_msg+0x194>)
+ 8019930:	f240 726a 	movw	r2, #1898	; 0x76a
+ 8019934:	495a      	ldr	r1, [pc, #360]	; (8019aa0 <dhcp_create_msg+0x1a0>)
+ 8019936:	4859      	ldr	r0, [pc, #356]	; (8019a9c <dhcp_create_msg+0x19c>)
+ 8019938:	f002 fd5e 	bl	801c3f8 <iprintf>
+ 801993c:	2300      	movs	r3, #0
+ 801993e:	e0a5      	b.n	8019a8c <dhcp_create_msg+0x18c>
+  p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM);
+ 8019940:	f44f 7220 	mov.w	r2, #640	; 0x280
+ 8019944:	f44f 719a 	mov.w	r1, #308	; 0x134
+ 8019948:	2036      	movs	r0, #54	; 0x36
+ 801994a:	f7f7 fd45 	bl	80113d8 <pbuf_alloc>
+ 801994e:	61b8      	str	r0, [r7, #24]
+  if (p_out == NULL) {
+ 8019950:	69bb      	ldr	r3, [r7, #24]
+ 8019952:	2b00      	cmp	r3, #0
+ 8019954:	d101      	bne.n	801995a <dhcp_create_msg+0x5a>
+    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
+                ("dhcp_create_msg(): could not allocate pbuf\n"));
+    return NULL;
+ 8019956:	2300      	movs	r3, #0
+ 8019958:	e098      	b.n	8019a8c <dhcp_create_msg+0x18c>
+  }
+  LWIP_ASSERT("dhcp_create_msg: check that first pbuf can hold struct dhcp_msg",
+ 801995a:	69bb      	ldr	r3, [r7, #24]
+ 801995c:	895b      	ldrh	r3, [r3, #10]
+ 801995e:	f5b3 7f9a 	cmp.w	r3, #308	; 0x134
+ 8019962:	d206      	bcs.n	8019972 <dhcp_create_msg+0x72>
+ 8019964:	4b4b      	ldr	r3, [pc, #300]	; (8019a94 <dhcp_create_msg+0x194>)
+ 8019966:	f240 7272 	movw	r2, #1906	; 0x772
+ 801996a:	494e      	ldr	r1, [pc, #312]	; (8019aa4 <dhcp_create_msg+0x1a4>)
+ 801996c:	484b      	ldr	r0, [pc, #300]	; (8019a9c <dhcp_create_msg+0x19c>)
+ 801996e:	f002 fd43 	bl	801c3f8 <iprintf>
+              (p_out->len >= sizeof(struct dhcp_msg)));
+
+  /* DHCP_REQUEST should reuse 'xid' from DHCPOFFER */
+  if ((message_type != DHCP_REQUEST) || (dhcp->state == DHCP_STATE_REBOOTING)) {
+ 8019972:	79fb      	ldrb	r3, [r7, #7]
+ 8019974:	2b03      	cmp	r3, #3
+ 8019976:	d103      	bne.n	8019980 <dhcp_create_msg+0x80>
+ 8019978:	68bb      	ldr	r3, [r7, #8]
+ 801997a:	795b      	ldrb	r3, [r3, #5]
+ 801997c:	2b03      	cmp	r3, #3
+ 801997e:	d10d      	bne.n	801999c <dhcp_create_msg+0x9c>
+    /* reuse transaction identifier in retransmissions */
+    if (dhcp->tries == 0) {
+ 8019980:	68bb      	ldr	r3, [r7, #8]
+ 8019982:	799b      	ldrb	r3, [r3, #6]
+ 8019984:	2b00      	cmp	r3, #0
+ 8019986:	d105      	bne.n	8019994 <dhcp_create_msg+0x94>
+#if DHCP_CREATE_RAND_XID && defined(LWIP_RAND)
+      xid = LWIP_RAND();
+ 8019988:	f002 fd4e 	bl	801c428 <rand>
+ 801998c:	4603      	mov	r3, r0
+ 801998e:	461a      	mov	r2, r3
+ 8019990:	4b45      	ldr	r3, [pc, #276]	; (8019aa8 <dhcp_create_msg+0x1a8>)
+ 8019992:	601a      	str	r2, [r3, #0]
+#else /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
+      xid++;
+#endif /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
+    }
+    dhcp->xid = xid;
+ 8019994:	4b44      	ldr	r3, [pc, #272]	; (8019aa8 <dhcp_create_msg+0x1a8>)
+ 8019996:	681a      	ldr	r2, [r3, #0]
+ 8019998:	68bb      	ldr	r3, [r7, #8]
+ 801999a:	601a      	str	r2, [r3, #0]
+  }
+  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE,
+              ("transaction id xid(%"X32_F")\n", xid));
+
+  msg_out = (struct dhcp_msg *)p_out->payload;
+ 801999c:	69bb      	ldr	r3, [r7, #24]
+ 801999e:	685b      	ldr	r3, [r3, #4]
+ 80199a0:	617b      	str	r3, [r7, #20]
+  memset(msg_out, 0, sizeof(struct dhcp_msg));
+ 80199a2:	f44f 729a 	mov.w	r2, #308	; 0x134
+ 80199a6:	2100      	movs	r1, #0
+ 80199a8:	6978      	ldr	r0, [r7, #20]
+ 80199aa:	f002 fd1c 	bl	801c3e6 <memset>
+
+  msg_out->op = DHCP_BOOTREQUEST;
+ 80199ae:	697b      	ldr	r3, [r7, #20]
+ 80199b0:	2201      	movs	r2, #1
+ 80199b2:	701a      	strb	r2, [r3, #0]
+  /* @todo: make link layer independent */
+  msg_out->htype = LWIP_IANA_HWTYPE_ETHERNET;
+ 80199b4:	697b      	ldr	r3, [r7, #20]
+ 80199b6:	2201      	movs	r2, #1
+ 80199b8:	705a      	strb	r2, [r3, #1]
+  msg_out->hlen = netif->hwaddr_len;
+ 80199ba:	68fb      	ldr	r3, [r7, #12]
+ 80199bc:	f893 2030 	ldrb.w	r2, [r3, #48]	; 0x30
+ 80199c0:	697b      	ldr	r3, [r7, #20]
+ 80199c2:	709a      	strb	r2, [r3, #2]
+  msg_out->xid = lwip_htonl(dhcp->xid);
+ 80199c4:	68bb      	ldr	r3, [r7, #8]
+ 80199c6:	681b      	ldr	r3, [r3, #0]
+ 80199c8:	4618      	mov	r0, r3
+ 80199ca:	f7f6 fc46 	bl	801025a <lwip_htonl>
+ 80199ce:	4602      	mov	r2, r0
+ 80199d0:	697b      	ldr	r3, [r7, #20]
+ 80199d2:	605a      	str	r2, [r3, #4]
+  /* we don't need the broadcast flag since we can receive unicast traffic
+     before being fully configured! */
+  /* set ciaddr to netif->ip_addr based on message_type and state */
+  if ((message_type == DHCP_INFORM) || (message_type == DHCP_DECLINE) || (message_type == DHCP_RELEASE) ||
+ 80199d4:	79fb      	ldrb	r3, [r7, #7]
+ 80199d6:	2b08      	cmp	r3, #8
+ 80199d8:	d010      	beq.n	80199fc <dhcp_create_msg+0xfc>
+ 80199da:	79fb      	ldrb	r3, [r7, #7]
+ 80199dc:	2b04      	cmp	r3, #4
+ 80199de:	d00d      	beq.n	80199fc <dhcp_create_msg+0xfc>
+ 80199e0:	79fb      	ldrb	r3, [r7, #7]
+ 80199e2:	2b07      	cmp	r3, #7
+ 80199e4:	d00a      	beq.n	80199fc <dhcp_create_msg+0xfc>
+ 80199e6:	79fb      	ldrb	r3, [r7, #7]
+ 80199e8:	2b03      	cmp	r3, #3
+ 80199ea:	d10c      	bne.n	8019a06 <dhcp_create_msg+0x106>
+      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
+       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
+ 80199ec:	68bb      	ldr	r3, [r7, #8]
+ 80199ee:	795b      	ldrb	r3, [r3, #5]
+      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
+ 80199f0:	2b05      	cmp	r3, #5
+ 80199f2:	d003      	beq.n	80199fc <dhcp_create_msg+0xfc>
+       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
+ 80199f4:	68bb      	ldr	r3, [r7, #8]
+ 80199f6:	795b      	ldrb	r3, [r3, #5]
+ 80199f8:	2b04      	cmp	r3, #4
+ 80199fa:	d104      	bne.n	8019a06 <dhcp_create_msg+0x106>
+    ip4_addr_copy(msg_out->ciaddr, *netif_ip4_addr(netif));
+ 80199fc:	68fb      	ldr	r3, [r7, #12]
+ 80199fe:	3304      	adds	r3, #4
+ 8019a00:	681a      	ldr	r2, [r3, #0]
+ 8019a02:	697b      	ldr	r3, [r7, #20]
+ 8019a04:	60da      	str	r2, [r3, #12]
+  }
+  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
+ 8019a06:	2300      	movs	r3, #0
+ 8019a08:	83fb      	strh	r3, [r7, #30]
+ 8019a0a:	e00c      	b.n	8019a26 <dhcp_create_msg+0x126>
+    /* copy netif hardware address (padded with zeroes through memset already) */
+    msg_out->chaddr[i] = netif->hwaddr[i];
+ 8019a0c:	8bfa      	ldrh	r2, [r7, #30]
+ 8019a0e:	8bfb      	ldrh	r3, [r7, #30]
+ 8019a10:	68f9      	ldr	r1, [r7, #12]
+ 8019a12:	440a      	add	r2, r1
+ 8019a14:	f892 102a 	ldrb.w	r1, [r2, #42]	; 0x2a
+ 8019a18:	697a      	ldr	r2, [r7, #20]
+ 8019a1a:	4413      	add	r3, r2
+ 8019a1c:	460a      	mov	r2, r1
+ 8019a1e:	771a      	strb	r2, [r3, #28]
+  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
+ 8019a20:	8bfb      	ldrh	r3, [r7, #30]
+ 8019a22:	3301      	adds	r3, #1
+ 8019a24:	83fb      	strh	r3, [r7, #30]
+ 8019a26:	8bfb      	ldrh	r3, [r7, #30]
+ 8019a28:	2b05      	cmp	r3, #5
+ 8019a2a:	d9ef      	bls.n	8019a0c <dhcp_create_msg+0x10c>
+  }
+  msg_out->cookie = PP_HTONL(DHCP_MAGIC_COOKIE);
+ 8019a2c:	697b      	ldr	r3, [r7, #20]
+ 8019a2e:	2200      	movs	r2, #0
+ 8019a30:	f042 0263 	orr.w	r2, r2, #99	; 0x63
+ 8019a34:	f883 20ec 	strb.w	r2, [r3, #236]	; 0xec
+ 8019a38:	2200      	movs	r2, #0
+ 8019a3a:	f062 027d 	orn	r2, r2, #125	; 0x7d
+ 8019a3e:	f883 20ed 	strb.w	r2, [r3, #237]	; 0xed
+ 8019a42:	2200      	movs	r2, #0
+ 8019a44:	f042 0253 	orr.w	r2, r2, #83	; 0x53
+ 8019a48:	f883 20ee 	strb.w	r2, [r3, #238]	; 0xee
+ 8019a4c:	2200      	movs	r2, #0
+ 8019a4e:	f042 0263 	orr.w	r2, r2, #99	; 0x63
+ 8019a52:	f883 20ef 	strb.w	r2, [r3, #239]	; 0xef
+  /* Add option MESSAGE_TYPE */
+  options_out_len_loc = dhcp_option(0, msg_out->options, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN);
+ 8019a56:	697b      	ldr	r3, [r7, #20]
+ 8019a58:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8019a5c:	2301      	movs	r3, #1
+ 8019a5e:	2235      	movs	r2, #53	; 0x35
+ 8019a60:	2000      	movs	r0, #0
+ 8019a62:	f7ff fadd 	bl	8019020 <dhcp_option>
+ 8019a66:	4603      	mov	r3, r0
+ 8019a68:	827b      	strh	r3, [r7, #18]
+  options_out_len_loc = dhcp_option_byte(options_out_len_loc, msg_out->options, message_type);
+ 8019a6a:	697b      	ldr	r3, [r7, #20]
+ 8019a6c:	f103 01f0 	add.w	r1, r3, #240	; 0xf0
+ 8019a70:	79fa      	ldrb	r2, [r7, #7]
+ 8019a72:	8a7b      	ldrh	r3, [r7, #18]
+ 8019a74:	4618      	mov	r0, r3
+ 8019a76:	f7ff fb07 	bl	8019088 <dhcp_option_byte>
+ 8019a7a:	4603      	mov	r3, r0
+ 8019a7c:	827b      	strh	r3, [r7, #18]
+  if (options_out_len) {
+ 8019a7e:	683b      	ldr	r3, [r7, #0]
+ 8019a80:	2b00      	cmp	r3, #0
+ 8019a82:	d002      	beq.n	8019a8a <dhcp_create_msg+0x18a>
+    *options_out_len = options_out_len_loc;
+ 8019a84:	683b      	ldr	r3, [r7, #0]
+ 8019a86:	8a7a      	ldrh	r2, [r7, #18]
+ 8019a88:	801a      	strh	r2, [r3, #0]
+  }
+  return p_out;
+ 8019a8a:	69bb      	ldr	r3, [r7, #24]
+}
+ 8019a8c:	4618      	mov	r0, r3
+ 8019a8e:	3720      	adds	r7, #32
+ 8019a90:	46bd      	mov	sp, r7
+ 8019a92:	bd80      	pop	{r7, pc}
+ 8019a94:	0801fac8 	.word	0x0801fac8
+ 8019a98:	0801fde8 	.word	0x0801fde8
+ 8019a9c:	0801fb28 	.word	0x0801fb28
+ 8019aa0:	0801fe08 	.word	0x0801fe08
+ 8019aa4:	0801fe28 	.word	0x0801fe28
+ 8019aa8:	20008760 	.word	0x20008760
+
+08019aac <dhcp_option_trailer>:
+ * Adds the END option to the DHCP message, and if
+ * necessary, up to three padding bytes.
+ */
+static void
+dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out)
+{
+ 8019aac:	b580      	push	{r7, lr}
+ 8019aae:	b084      	sub	sp, #16
+ 8019ab0:	af00      	add	r7, sp, #0
+ 8019ab2:	4603      	mov	r3, r0
+ 8019ab4:	60b9      	str	r1, [r7, #8]
+ 8019ab6:	607a      	str	r2, [r7, #4]
+ 8019ab8:	81fb      	strh	r3, [r7, #14]
+  options[options_out_len++] = DHCP_OPTION_END;
+ 8019aba:	89fb      	ldrh	r3, [r7, #14]
+ 8019abc:	1c5a      	adds	r2, r3, #1
+ 8019abe:	81fa      	strh	r2, [r7, #14]
+ 8019ac0:	461a      	mov	r2, r3
+ 8019ac2:	68bb      	ldr	r3, [r7, #8]
+ 8019ac4:	4413      	add	r3, r2
+ 8019ac6:	22ff      	movs	r2, #255	; 0xff
+ 8019ac8:	701a      	strb	r2, [r3, #0]
+  /* packet is too small, or not 4 byte aligned? */
+  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
+ 8019aca:	e007      	b.n	8019adc <dhcp_option_trailer+0x30>
+         (options_out_len < DHCP_OPTIONS_LEN)) {
+    /* add a fill/padding byte */
+    options[options_out_len++] = 0;
+ 8019acc:	89fb      	ldrh	r3, [r7, #14]
+ 8019ace:	1c5a      	adds	r2, r3, #1
+ 8019ad0:	81fa      	strh	r2, [r7, #14]
+ 8019ad2:	461a      	mov	r2, r3
+ 8019ad4:	68bb      	ldr	r3, [r7, #8]
+ 8019ad6:	4413      	add	r3, r2
+ 8019ad8:	2200      	movs	r2, #0
+ 8019ada:	701a      	strb	r2, [r3, #0]
+  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
+ 8019adc:	89fb      	ldrh	r3, [r7, #14]
+ 8019ade:	2b43      	cmp	r3, #67	; 0x43
+ 8019ae0:	d904      	bls.n	8019aec <dhcp_option_trailer+0x40>
+ 8019ae2:	89fb      	ldrh	r3, [r7, #14]
+ 8019ae4:	f003 0303 	and.w	r3, r3, #3
+ 8019ae8:	2b00      	cmp	r3, #0
+ 8019aea:	d002      	beq.n	8019af2 <dhcp_option_trailer+0x46>
+ 8019aec:	89fb      	ldrh	r3, [r7, #14]
+ 8019aee:	2b43      	cmp	r3, #67	; 0x43
+ 8019af0:	d9ec      	bls.n	8019acc <dhcp_option_trailer+0x20>
+  }
+  /* shrink the pbuf to the actual content length */
+  pbuf_realloc(p_out, (u16_t)(sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + options_out_len));
+ 8019af2:	89fb      	ldrh	r3, [r7, #14]
+ 8019af4:	33f0      	adds	r3, #240	; 0xf0
+ 8019af6:	b29b      	uxth	r3, r3
+ 8019af8:	4619      	mov	r1, r3
+ 8019afa:	6878      	ldr	r0, [r7, #4]
+ 8019afc:	f7f7 fdc6 	bl	801168c <pbuf_realloc>
+}
+ 8019b00:	bf00      	nop
+ 8019b02:	3710      	adds	r7, #16
+ 8019b04:	46bd      	mov	sp, r7
+ 8019b06:	bd80      	pop	{r7, pc}
+
+08019b08 <dhcp_supplied_address>:
+ * @return 1 if DHCP supplied netif->ip_addr (states BOUND or RENEWING),
+ *         0 otherwise
+ */
+u8_t
+dhcp_supplied_address(const struct netif *netif)
+{
+ 8019b08:	b480      	push	{r7}
+ 8019b0a:	b085      	sub	sp, #20
+ 8019b0c:	af00      	add	r7, sp, #0
+ 8019b0e:	6078      	str	r0, [r7, #4]
+  if ((netif != NULL) && (netif_dhcp_data(netif) != NULL)) {
+ 8019b10:	687b      	ldr	r3, [r7, #4]
+ 8019b12:	2b00      	cmp	r3, #0
+ 8019b14:	d017      	beq.n	8019b46 <dhcp_supplied_address+0x3e>
+ 8019b16:	687b      	ldr	r3, [r7, #4]
+ 8019b18:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8019b1a:	2b00      	cmp	r3, #0
+ 8019b1c:	d013      	beq.n	8019b46 <dhcp_supplied_address+0x3e>
+    struct dhcp *dhcp = netif_dhcp_data(netif);
+ 8019b1e:	687b      	ldr	r3, [r7, #4]
+ 8019b20:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8019b22:	60fb      	str	r3, [r7, #12]
+    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
+ 8019b24:	68fb      	ldr	r3, [r7, #12]
+ 8019b26:	795b      	ldrb	r3, [r3, #5]
+ 8019b28:	2b0a      	cmp	r3, #10
+ 8019b2a:	d007      	beq.n	8019b3c <dhcp_supplied_address+0x34>
+ 8019b2c:	68fb      	ldr	r3, [r7, #12]
+ 8019b2e:	795b      	ldrb	r3, [r3, #5]
+ 8019b30:	2b05      	cmp	r3, #5
+ 8019b32:	d003      	beq.n	8019b3c <dhcp_supplied_address+0x34>
+           (dhcp->state == DHCP_STATE_REBINDING);
+ 8019b34:	68fb      	ldr	r3, [r7, #12]
+ 8019b36:	795b      	ldrb	r3, [r3, #5]
+    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
+ 8019b38:	2b04      	cmp	r3, #4
+ 8019b3a:	d101      	bne.n	8019b40 <dhcp_supplied_address+0x38>
+ 8019b3c:	2301      	movs	r3, #1
+ 8019b3e:	e000      	b.n	8019b42 <dhcp_supplied_address+0x3a>
+ 8019b40:	2300      	movs	r3, #0
+ 8019b42:	b2db      	uxtb	r3, r3
+ 8019b44:	e000      	b.n	8019b48 <dhcp_supplied_address+0x40>
+  }
+  return 0;
+ 8019b46:	2300      	movs	r3, #0
+}
+ 8019b48:	4618      	mov	r0, r3
+ 8019b4a:	3714      	adds	r7, #20
+ 8019b4c:	46bd      	mov	sp, r7
+ 8019b4e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8019b52:	4770      	bx	lr
+
+08019b54 <etharp_free_entry>:
+#endif /* ARP_QUEUEING */
+
+/** Clean up ARP table entries */
+static void
+etharp_free_entry(int i)
+{
+ 8019b54:	b580      	push	{r7, lr}
+ 8019b56:	b082      	sub	sp, #8
+ 8019b58:	af00      	add	r7, sp, #0
+ 8019b5a:	6078      	str	r0, [r7, #4]
+  /* remove from SNMP ARP index tree */
+  mib2_remove_arp_entry(arp_table[i].netif, &arp_table[i].ipaddr);
+  /* and empty packet queue */
+  if (arp_table[i].q != NULL) {
+ 8019b5c:	4915      	ldr	r1, [pc, #84]	; (8019bb4 <etharp_free_entry+0x60>)
+ 8019b5e:	687a      	ldr	r2, [r7, #4]
+ 8019b60:	4613      	mov	r3, r2
+ 8019b62:	005b      	lsls	r3, r3, #1
+ 8019b64:	4413      	add	r3, r2
+ 8019b66:	00db      	lsls	r3, r3, #3
+ 8019b68:	440b      	add	r3, r1
+ 8019b6a:	681b      	ldr	r3, [r3, #0]
+ 8019b6c:	2b00      	cmp	r3, #0
+ 8019b6e:	d013      	beq.n	8019b98 <etharp_free_entry+0x44>
+    /* remove all queued packets */
+    LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_free_entry: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q)));
+    free_etharp_q(arp_table[i].q);
+ 8019b70:	4910      	ldr	r1, [pc, #64]	; (8019bb4 <etharp_free_entry+0x60>)
+ 8019b72:	687a      	ldr	r2, [r7, #4]
+ 8019b74:	4613      	mov	r3, r2
+ 8019b76:	005b      	lsls	r3, r3, #1
+ 8019b78:	4413      	add	r3, r2
+ 8019b7a:	00db      	lsls	r3, r3, #3
+ 8019b7c:	440b      	add	r3, r1
+ 8019b7e:	681b      	ldr	r3, [r3, #0]
+ 8019b80:	4618      	mov	r0, r3
+ 8019b82:	f7f7 ff09 	bl	8011998 <pbuf_free>
+    arp_table[i].q = NULL;
+ 8019b86:	490b      	ldr	r1, [pc, #44]	; (8019bb4 <etharp_free_entry+0x60>)
+ 8019b88:	687a      	ldr	r2, [r7, #4]
+ 8019b8a:	4613      	mov	r3, r2
+ 8019b8c:	005b      	lsls	r3, r3, #1
+ 8019b8e:	4413      	add	r3, r2
+ 8019b90:	00db      	lsls	r3, r3, #3
+ 8019b92:	440b      	add	r3, r1
+ 8019b94:	2200      	movs	r2, #0
+ 8019b96:	601a      	str	r2, [r3, #0]
+  }
+  /* recycle entry for re-use */
+  arp_table[i].state = ETHARP_STATE_EMPTY;
+ 8019b98:	4906      	ldr	r1, [pc, #24]	; (8019bb4 <etharp_free_entry+0x60>)
+ 8019b9a:	687a      	ldr	r2, [r7, #4]
+ 8019b9c:	4613      	mov	r3, r2
+ 8019b9e:	005b      	lsls	r3, r3, #1
+ 8019ba0:	4413      	add	r3, r2
+ 8019ba2:	00db      	lsls	r3, r3, #3
+ 8019ba4:	440b      	add	r3, r1
+ 8019ba6:	3314      	adds	r3, #20
+ 8019ba8:	2200      	movs	r2, #0
+ 8019baa:	701a      	strb	r2, [r3, #0]
+  arp_table[i].ctime = 0;
+  arp_table[i].netif = NULL;
+  ip4_addr_set_zero(&arp_table[i].ipaddr);
+  arp_table[i].ethaddr = ethzero;
+#endif /* LWIP_DEBUG */
+}
+ 8019bac:	bf00      	nop
+ 8019bae:	3708      	adds	r7, #8
+ 8019bb0:	46bd      	mov	sp, r7
+ 8019bb2:	bd80      	pop	{r7, pc}
+ 8019bb4:	20008764 	.word	0x20008764
+
+08019bb8 <etharp_tmr>:
+ * This function should be called every ARP_TMR_INTERVAL milliseconds (1 second),
+ * in order to expire entries in the ARP table.
+ */
+void
+etharp_tmr(void)
+{
+ 8019bb8:	b580      	push	{r7, lr}
+ 8019bba:	b082      	sub	sp, #8
+ 8019bbc:	af00      	add	r7, sp, #0
+  int i;
+
+  LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n"));
+  /* remove expired entries from the ARP table */
+  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
+ 8019bbe:	2300      	movs	r3, #0
+ 8019bc0:	607b      	str	r3, [r7, #4]
+ 8019bc2:	e096      	b.n	8019cf2 <etharp_tmr+0x13a>
+    u8_t state = arp_table[i].state;
+ 8019bc4:	494f      	ldr	r1, [pc, #316]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019bc6:	687a      	ldr	r2, [r7, #4]
+ 8019bc8:	4613      	mov	r3, r2
+ 8019bca:	005b      	lsls	r3, r3, #1
+ 8019bcc:	4413      	add	r3, r2
+ 8019bce:	00db      	lsls	r3, r3, #3
+ 8019bd0:	440b      	add	r3, r1
+ 8019bd2:	3314      	adds	r3, #20
+ 8019bd4:	781b      	ldrb	r3, [r3, #0]
+ 8019bd6:	70fb      	strb	r3, [r7, #3]
+    if (state != ETHARP_STATE_EMPTY
+ 8019bd8:	78fb      	ldrb	r3, [r7, #3]
+ 8019bda:	2b00      	cmp	r3, #0
+ 8019bdc:	f000 8086 	beq.w	8019cec <etharp_tmr+0x134>
+#if ETHARP_SUPPORT_STATIC_ENTRIES
+        && (state != ETHARP_STATE_STATIC)
+#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
+       ) {
+      arp_table[i].ctime++;
+ 8019be0:	4948      	ldr	r1, [pc, #288]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019be2:	687a      	ldr	r2, [r7, #4]
+ 8019be4:	4613      	mov	r3, r2
+ 8019be6:	005b      	lsls	r3, r3, #1
+ 8019be8:	4413      	add	r3, r2
+ 8019bea:	00db      	lsls	r3, r3, #3
+ 8019bec:	440b      	add	r3, r1
+ 8019bee:	3312      	adds	r3, #18
+ 8019bf0:	881b      	ldrh	r3, [r3, #0]
+ 8019bf2:	3301      	adds	r3, #1
+ 8019bf4:	b298      	uxth	r0, r3
+ 8019bf6:	4943      	ldr	r1, [pc, #268]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019bf8:	687a      	ldr	r2, [r7, #4]
+ 8019bfa:	4613      	mov	r3, r2
+ 8019bfc:	005b      	lsls	r3, r3, #1
+ 8019bfe:	4413      	add	r3, r2
+ 8019c00:	00db      	lsls	r3, r3, #3
+ 8019c02:	440b      	add	r3, r1
+ 8019c04:	3312      	adds	r3, #18
+ 8019c06:	4602      	mov	r2, r0
+ 8019c08:	801a      	strh	r2, [r3, #0]
+      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
+ 8019c0a:	493e      	ldr	r1, [pc, #248]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019c0c:	687a      	ldr	r2, [r7, #4]
+ 8019c0e:	4613      	mov	r3, r2
+ 8019c10:	005b      	lsls	r3, r3, #1
+ 8019c12:	4413      	add	r3, r2
+ 8019c14:	00db      	lsls	r3, r3, #3
+ 8019c16:	440b      	add	r3, r1
+ 8019c18:	3312      	adds	r3, #18
+ 8019c1a:	881b      	ldrh	r3, [r3, #0]
+ 8019c1c:	f5b3 7f96 	cmp.w	r3, #300	; 0x12c
+ 8019c20:	d215      	bcs.n	8019c4e <etharp_tmr+0x96>
+          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
+ 8019c22:	4938      	ldr	r1, [pc, #224]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019c24:	687a      	ldr	r2, [r7, #4]
+ 8019c26:	4613      	mov	r3, r2
+ 8019c28:	005b      	lsls	r3, r3, #1
+ 8019c2a:	4413      	add	r3, r2
+ 8019c2c:	00db      	lsls	r3, r3, #3
+ 8019c2e:	440b      	add	r3, r1
+ 8019c30:	3314      	adds	r3, #20
+ 8019c32:	781b      	ldrb	r3, [r3, #0]
+      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
+ 8019c34:	2b01      	cmp	r3, #1
+ 8019c36:	d10e      	bne.n	8019c56 <etharp_tmr+0x9e>
+           (arp_table[i].ctime >= ARP_MAXPENDING))) {
+ 8019c38:	4932      	ldr	r1, [pc, #200]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019c3a:	687a      	ldr	r2, [r7, #4]
+ 8019c3c:	4613      	mov	r3, r2
+ 8019c3e:	005b      	lsls	r3, r3, #1
+ 8019c40:	4413      	add	r3, r2
+ 8019c42:	00db      	lsls	r3, r3, #3
+ 8019c44:	440b      	add	r3, r1
+ 8019c46:	3312      	adds	r3, #18
+ 8019c48:	881b      	ldrh	r3, [r3, #0]
+          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
+ 8019c4a:	2b04      	cmp	r3, #4
+ 8019c4c:	d903      	bls.n	8019c56 <etharp_tmr+0x9e>
+        /* pending or stable entry has become old! */
+        LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %d.\n",
+                                   arp_table[i].state >= ETHARP_STATE_STABLE ? "stable" : "pending", i));
+        /* clean up entries that have just been expired */
+        etharp_free_entry(i);
+ 8019c4e:	6878      	ldr	r0, [r7, #4]
+ 8019c50:	f7ff ff80 	bl	8019b54 <etharp_free_entry>
+ 8019c54:	e04a      	b.n	8019cec <etharp_tmr+0x134>
+      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_1) {
+ 8019c56:	492b      	ldr	r1, [pc, #172]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019c58:	687a      	ldr	r2, [r7, #4]
+ 8019c5a:	4613      	mov	r3, r2
+ 8019c5c:	005b      	lsls	r3, r3, #1
+ 8019c5e:	4413      	add	r3, r2
+ 8019c60:	00db      	lsls	r3, r3, #3
+ 8019c62:	440b      	add	r3, r1
+ 8019c64:	3314      	adds	r3, #20
+ 8019c66:	781b      	ldrb	r3, [r3, #0]
+ 8019c68:	2b03      	cmp	r3, #3
+ 8019c6a:	d10a      	bne.n	8019c82 <etharp_tmr+0xca>
+        /* Don't send more than one request every 2 seconds. */
+        arp_table[i].state = ETHARP_STATE_STABLE_REREQUESTING_2;
+ 8019c6c:	4925      	ldr	r1, [pc, #148]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019c6e:	687a      	ldr	r2, [r7, #4]
+ 8019c70:	4613      	mov	r3, r2
+ 8019c72:	005b      	lsls	r3, r3, #1
+ 8019c74:	4413      	add	r3, r2
+ 8019c76:	00db      	lsls	r3, r3, #3
+ 8019c78:	440b      	add	r3, r1
+ 8019c7a:	3314      	adds	r3, #20
+ 8019c7c:	2204      	movs	r2, #4
+ 8019c7e:	701a      	strb	r2, [r3, #0]
+ 8019c80:	e034      	b.n	8019cec <etharp_tmr+0x134>
+      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_2) {
+ 8019c82:	4920      	ldr	r1, [pc, #128]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019c84:	687a      	ldr	r2, [r7, #4]
+ 8019c86:	4613      	mov	r3, r2
+ 8019c88:	005b      	lsls	r3, r3, #1
+ 8019c8a:	4413      	add	r3, r2
+ 8019c8c:	00db      	lsls	r3, r3, #3
+ 8019c8e:	440b      	add	r3, r1
+ 8019c90:	3314      	adds	r3, #20
+ 8019c92:	781b      	ldrb	r3, [r3, #0]
+ 8019c94:	2b04      	cmp	r3, #4
+ 8019c96:	d10a      	bne.n	8019cae <etharp_tmr+0xf6>
+        /* Reset state to stable, so that the next transmitted packet will
+           re-send an ARP request. */
+        arp_table[i].state = ETHARP_STATE_STABLE;
+ 8019c98:	491a      	ldr	r1, [pc, #104]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019c9a:	687a      	ldr	r2, [r7, #4]
+ 8019c9c:	4613      	mov	r3, r2
+ 8019c9e:	005b      	lsls	r3, r3, #1
+ 8019ca0:	4413      	add	r3, r2
+ 8019ca2:	00db      	lsls	r3, r3, #3
+ 8019ca4:	440b      	add	r3, r1
+ 8019ca6:	3314      	adds	r3, #20
+ 8019ca8:	2202      	movs	r2, #2
+ 8019caa:	701a      	strb	r2, [r3, #0]
+ 8019cac:	e01e      	b.n	8019cec <etharp_tmr+0x134>
+      } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
+ 8019cae:	4915      	ldr	r1, [pc, #84]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019cb0:	687a      	ldr	r2, [r7, #4]
+ 8019cb2:	4613      	mov	r3, r2
+ 8019cb4:	005b      	lsls	r3, r3, #1
+ 8019cb6:	4413      	add	r3, r2
+ 8019cb8:	00db      	lsls	r3, r3, #3
+ 8019cba:	440b      	add	r3, r1
+ 8019cbc:	3314      	adds	r3, #20
+ 8019cbe:	781b      	ldrb	r3, [r3, #0]
+ 8019cc0:	2b01      	cmp	r3, #1
+ 8019cc2:	d113      	bne.n	8019cec <etharp_tmr+0x134>
+        /* still pending, resend an ARP query */
+        etharp_request(arp_table[i].netif, &arp_table[i].ipaddr);
+ 8019cc4:	490f      	ldr	r1, [pc, #60]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019cc6:	687a      	ldr	r2, [r7, #4]
+ 8019cc8:	4613      	mov	r3, r2
+ 8019cca:	005b      	lsls	r3, r3, #1
+ 8019ccc:	4413      	add	r3, r2
+ 8019cce:	00db      	lsls	r3, r3, #3
+ 8019cd0:	440b      	add	r3, r1
+ 8019cd2:	3308      	adds	r3, #8
+ 8019cd4:	6818      	ldr	r0, [r3, #0]
+ 8019cd6:	687a      	ldr	r2, [r7, #4]
+ 8019cd8:	4613      	mov	r3, r2
+ 8019cda:	005b      	lsls	r3, r3, #1
+ 8019cdc:	4413      	add	r3, r2
+ 8019cde:	00db      	lsls	r3, r3, #3
+ 8019ce0:	4a08      	ldr	r2, [pc, #32]	; (8019d04 <etharp_tmr+0x14c>)
+ 8019ce2:	4413      	add	r3, r2
+ 8019ce4:	3304      	adds	r3, #4
+ 8019ce6:	4619      	mov	r1, r3
+ 8019ce8:	f000 fe72 	bl	801a9d0 <etharp_request>
+  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
+ 8019cec:	687b      	ldr	r3, [r7, #4]
+ 8019cee:	3301      	adds	r3, #1
+ 8019cf0:	607b      	str	r3, [r7, #4]
+ 8019cf2:	687b      	ldr	r3, [r7, #4]
+ 8019cf4:	2b09      	cmp	r3, #9
+ 8019cf6:	f77f af65 	ble.w	8019bc4 <etharp_tmr+0xc>
+      }
+    }
+  }
+}
+ 8019cfa:	bf00      	nop
+ 8019cfc:	3708      	adds	r7, #8
+ 8019cfe:	46bd      	mov	sp, r7
+ 8019d00:	bd80      	pop	{r7, pc}
+ 8019d02:	bf00      	nop
+ 8019d04:	20008764 	.word	0x20008764
+
+08019d08 <etharp_find_entry>:
+ * @return The ARP entry index that matched or is created, ERR_MEM if no
+ * entry is found or could be recycled.
+ */
+static s16_t
+etharp_find_entry(const ip4_addr_t *ipaddr, u8_t flags, struct netif *netif)
+{
+ 8019d08:	b580      	push	{r7, lr}
+ 8019d0a:	b08a      	sub	sp, #40	; 0x28
+ 8019d0c:	af00      	add	r7, sp, #0
+ 8019d0e:	60f8      	str	r0, [r7, #12]
+ 8019d10:	460b      	mov	r3, r1
+ 8019d12:	607a      	str	r2, [r7, #4]
+ 8019d14:	72fb      	strb	r3, [r7, #11]
+  s16_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE;
+ 8019d16:	230a      	movs	r3, #10
+ 8019d18:	84fb      	strh	r3, [r7, #38]	; 0x26
+ 8019d1a:	230a      	movs	r3, #10
+ 8019d1c:	84bb      	strh	r3, [r7, #36]	; 0x24
+  s16_t empty = ARP_TABLE_SIZE;
+ 8019d1e:	230a      	movs	r3, #10
+ 8019d20:	847b      	strh	r3, [r7, #34]	; 0x22
+  s16_t i = 0;
+ 8019d22:	2300      	movs	r3, #0
+ 8019d24:	843b      	strh	r3, [r7, #32]
+  /* oldest entry with packets on queue */
+  s16_t old_queue = ARP_TABLE_SIZE;
+ 8019d26:	230a      	movs	r3, #10
+ 8019d28:	83fb      	strh	r3, [r7, #30]
+  /* its age */
+  u16_t age_queue = 0, age_pending = 0, age_stable = 0;
+ 8019d2a:	2300      	movs	r3, #0
+ 8019d2c:	83bb      	strh	r3, [r7, #28]
+ 8019d2e:	2300      	movs	r3, #0
+ 8019d30:	837b      	strh	r3, [r7, #26]
+ 8019d32:	2300      	movs	r3, #0
+ 8019d34:	833b      	strh	r3, [r7, #24]
+   * 4) remember the oldest pending entry with queued packets (if any)
+   * 5) search for a matching IP entry, either pending or stable
+   *    until 5 matches, or all entries are searched for.
+   */
+
+  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
+ 8019d36:	2300      	movs	r3, #0
+ 8019d38:	843b      	strh	r3, [r7, #32]
+ 8019d3a:	e0ae      	b.n	8019e9a <etharp_find_entry+0x192>
+    u8_t state = arp_table[i].state;
+ 8019d3c:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019d40:	49a6      	ldr	r1, [pc, #664]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019d42:	4613      	mov	r3, r2
+ 8019d44:	005b      	lsls	r3, r3, #1
+ 8019d46:	4413      	add	r3, r2
+ 8019d48:	00db      	lsls	r3, r3, #3
+ 8019d4a:	440b      	add	r3, r1
+ 8019d4c:	3314      	adds	r3, #20
+ 8019d4e:	781b      	ldrb	r3, [r3, #0]
+ 8019d50:	75fb      	strb	r3, [r7, #23]
+    /* no empty entry found yet and now we do find one? */
+    if ((empty == ARP_TABLE_SIZE) && (state == ETHARP_STATE_EMPTY)) {
+ 8019d52:	f9b7 3022 	ldrsh.w	r3, [r7, #34]	; 0x22
+ 8019d56:	2b0a      	cmp	r3, #10
+ 8019d58:	d105      	bne.n	8019d66 <etharp_find_entry+0x5e>
+ 8019d5a:	7dfb      	ldrb	r3, [r7, #23]
+ 8019d5c:	2b00      	cmp	r3, #0
+ 8019d5e:	d102      	bne.n	8019d66 <etharp_find_entry+0x5e>
+      LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_find_entry: found empty entry %d\n", (int)i));
+      /* remember first empty entry */
+      empty = i;
+ 8019d60:	8c3b      	ldrh	r3, [r7, #32]
+ 8019d62:	847b      	strh	r3, [r7, #34]	; 0x22
+ 8019d64:	e095      	b.n	8019e92 <etharp_find_entry+0x18a>
+    } else if (state != ETHARP_STATE_EMPTY) {
+ 8019d66:	7dfb      	ldrb	r3, [r7, #23]
+ 8019d68:	2b00      	cmp	r3, #0
+ 8019d6a:	f000 8092 	beq.w	8019e92 <etharp_find_entry+0x18a>
+      LWIP_ASSERT("state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE",
+ 8019d6e:	7dfb      	ldrb	r3, [r7, #23]
+ 8019d70:	2b01      	cmp	r3, #1
+ 8019d72:	d009      	beq.n	8019d88 <etharp_find_entry+0x80>
+ 8019d74:	7dfb      	ldrb	r3, [r7, #23]
+ 8019d76:	2b01      	cmp	r3, #1
+ 8019d78:	d806      	bhi.n	8019d88 <etharp_find_entry+0x80>
+ 8019d7a:	4b99      	ldr	r3, [pc, #612]	; (8019fe0 <etharp_find_entry+0x2d8>)
+ 8019d7c:	f44f 7292 	mov.w	r2, #292	; 0x124
+ 8019d80:	4998      	ldr	r1, [pc, #608]	; (8019fe4 <etharp_find_entry+0x2dc>)
+ 8019d82:	4899      	ldr	r0, [pc, #612]	; (8019fe8 <etharp_find_entry+0x2e0>)
+ 8019d84:	f002 fb38 	bl	801c3f8 <iprintf>
+                  state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE);
+      /* if given, does IP address match IP address in ARP entry? */
+      if (ipaddr && ip4_addr_cmp(ipaddr, &arp_table[i].ipaddr)
+ 8019d88:	68fb      	ldr	r3, [r7, #12]
+ 8019d8a:	2b00      	cmp	r3, #0
+ 8019d8c:	d020      	beq.n	8019dd0 <etharp_find_entry+0xc8>
+ 8019d8e:	68fb      	ldr	r3, [r7, #12]
+ 8019d90:	6819      	ldr	r1, [r3, #0]
+ 8019d92:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019d96:	4891      	ldr	r0, [pc, #580]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019d98:	4613      	mov	r3, r2
+ 8019d9a:	005b      	lsls	r3, r3, #1
+ 8019d9c:	4413      	add	r3, r2
+ 8019d9e:	00db      	lsls	r3, r3, #3
+ 8019da0:	4403      	add	r3, r0
+ 8019da2:	3304      	adds	r3, #4
+ 8019da4:	681b      	ldr	r3, [r3, #0]
+ 8019da6:	4299      	cmp	r1, r3
+ 8019da8:	d112      	bne.n	8019dd0 <etharp_find_entry+0xc8>
+#if ETHARP_TABLE_MATCH_NETIF
+          && ((netif == NULL) || (netif == arp_table[i].netif))
+ 8019daa:	687b      	ldr	r3, [r7, #4]
+ 8019dac:	2b00      	cmp	r3, #0
+ 8019dae:	d00c      	beq.n	8019dca <etharp_find_entry+0xc2>
+ 8019db0:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019db4:	4989      	ldr	r1, [pc, #548]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019db6:	4613      	mov	r3, r2
+ 8019db8:	005b      	lsls	r3, r3, #1
+ 8019dba:	4413      	add	r3, r2
+ 8019dbc:	00db      	lsls	r3, r3, #3
+ 8019dbe:	440b      	add	r3, r1
+ 8019dc0:	3308      	adds	r3, #8
+ 8019dc2:	681b      	ldr	r3, [r3, #0]
+ 8019dc4:	687a      	ldr	r2, [r7, #4]
+ 8019dc6:	429a      	cmp	r2, r3
+ 8019dc8:	d102      	bne.n	8019dd0 <etharp_find_entry+0xc8>
+#endif /* ETHARP_TABLE_MATCH_NETIF */
+         ) {
+        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: found matching entry %d\n", (int)i));
+        /* found exact IP address match, simply bail out */
+        return i;
+ 8019dca:	f9b7 3020 	ldrsh.w	r3, [r7, #32]
+ 8019dce:	e100      	b.n	8019fd2 <etharp_find_entry+0x2ca>
+      }
+      /* pending entry? */
+      if (state == ETHARP_STATE_PENDING) {
+ 8019dd0:	7dfb      	ldrb	r3, [r7, #23]
+ 8019dd2:	2b01      	cmp	r3, #1
+ 8019dd4:	d140      	bne.n	8019e58 <etharp_find_entry+0x150>
+        /* pending with queued packets? */
+        if (arp_table[i].q != NULL) {
+ 8019dd6:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019dda:	4980      	ldr	r1, [pc, #512]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019ddc:	4613      	mov	r3, r2
+ 8019dde:	005b      	lsls	r3, r3, #1
+ 8019de0:	4413      	add	r3, r2
+ 8019de2:	00db      	lsls	r3, r3, #3
+ 8019de4:	440b      	add	r3, r1
+ 8019de6:	681b      	ldr	r3, [r3, #0]
+ 8019de8:	2b00      	cmp	r3, #0
+ 8019dea:	d01a      	beq.n	8019e22 <etharp_find_entry+0x11a>
+          if (arp_table[i].ctime >= age_queue) {
+ 8019dec:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019df0:	497a      	ldr	r1, [pc, #488]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019df2:	4613      	mov	r3, r2
+ 8019df4:	005b      	lsls	r3, r3, #1
+ 8019df6:	4413      	add	r3, r2
+ 8019df8:	00db      	lsls	r3, r3, #3
+ 8019dfa:	440b      	add	r3, r1
+ 8019dfc:	3312      	adds	r3, #18
+ 8019dfe:	881b      	ldrh	r3, [r3, #0]
+ 8019e00:	8bba      	ldrh	r2, [r7, #28]
+ 8019e02:	429a      	cmp	r2, r3
+ 8019e04:	d845      	bhi.n	8019e92 <etharp_find_entry+0x18a>
+            old_queue = i;
+ 8019e06:	8c3b      	ldrh	r3, [r7, #32]
+ 8019e08:	83fb      	strh	r3, [r7, #30]
+            age_queue = arp_table[i].ctime;
+ 8019e0a:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019e0e:	4973      	ldr	r1, [pc, #460]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019e10:	4613      	mov	r3, r2
+ 8019e12:	005b      	lsls	r3, r3, #1
+ 8019e14:	4413      	add	r3, r2
+ 8019e16:	00db      	lsls	r3, r3, #3
+ 8019e18:	440b      	add	r3, r1
+ 8019e1a:	3312      	adds	r3, #18
+ 8019e1c:	881b      	ldrh	r3, [r3, #0]
+ 8019e1e:	83bb      	strh	r3, [r7, #28]
+ 8019e20:	e037      	b.n	8019e92 <etharp_find_entry+0x18a>
+          }
+        } else
+          /* pending without queued packets? */
+        {
+          if (arp_table[i].ctime >= age_pending) {
+ 8019e22:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019e26:	496d      	ldr	r1, [pc, #436]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019e28:	4613      	mov	r3, r2
+ 8019e2a:	005b      	lsls	r3, r3, #1
+ 8019e2c:	4413      	add	r3, r2
+ 8019e2e:	00db      	lsls	r3, r3, #3
+ 8019e30:	440b      	add	r3, r1
+ 8019e32:	3312      	adds	r3, #18
+ 8019e34:	881b      	ldrh	r3, [r3, #0]
+ 8019e36:	8b7a      	ldrh	r2, [r7, #26]
+ 8019e38:	429a      	cmp	r2, r3
+ 8019e3a:	d82a      	bhi.n	8019e92 <etharp_find_entry+0x18a>
+            old_pending = i;
+ 8019e3c:	8c3b      	ldrh	r3, [r7, #32]
+ 8019e3e:	84fb      	strh	r3, [r7, #38]	; 0x26
+            age_pending = arp_table[i].ctime;
+ 8019e40:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019e44:	4965      	ldr	r1, [pc, #404]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019e46:	4613      	mov	r3, r2
+ 8019e48:	005b      	lsls	r3, r3, #1
+ 8019e4a:	4413      	add	r3, r2
+ 8019e4c:	00db      	lsls	r3, r3, #3
+ 8019e4e:	440b      	add	r3, r1
+ 8019e50:	3312      	adds	r3, #18
+ 8019e52:	881b      	ldrh	r3, [r3, #0]
+ 8019e54:	837b      	strh	r3, [r7, #26]
+ 8019e56:	e01c      	b.n	8019e92 <etharp_find_entry+0x18a>
+          }
+        }
+        /* stable entry? */
+      } else if (state >= ETHARP_STATE_STABLE) {
+ 8019e58:	7dfb      	ldrb	r3, [r7, #23]
+ 8019e5a:	2b01      	cmp	r3, #1
+ 8019e5c:	d919      	bls.n	8019e92 <etharp_find_entry+0x18a>
+        /* don't record old_stable for static entries since they never expire */
+        if (state < ETHARP_STATE_STATIC)
+#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
+        {
+          /* remember entry with oldest stable entry in oldest, its age in maxtime */
+          if (arp_table[i].ctime >= age_stable) {
+ 8019e5e:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019e62:	495e      	ldr	r1, [pc, #376]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019e64:	4613      	mov	r3, r2
+ 8019e66:	005b      	lsls	r3, r3, #1
+ 8019e68:	4413      	add	r3, r2
+ 8019e6a:	00db      	lsls	r3, r3, #3
+ 8019e6c:	440b      	add	r3, r1
+ 8019e6e:	3312      	adds	r3, #18
+ 8019e70:	881b      	ldrh	r3, [r3, #0]
+ 8019e72:	8b3a      	ldrh	r2, [r7, #24]
+ 8019e74:	429a      	cmp	r2, r3
+ 8019e76:	d80c      	bhi.n	8019e92 <etharp_find_entry+0x18a>
+            old_stable = i;
+ 8019e78:	8c3b      	ldrh	r3, [r7, #32]
+ 8019e7a:	84bb      	strh	r3, [r7, #36]	; 0x24
+            age_stable = arp_table[i].ctime;
+ 8019e7c:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019e80:	4956      	ldr	r1, [pc, #344]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019e82:	4613      	mov	r3, r2
+ 8019e84:	005b      	lsls	r3, r3, #1
+ 8019e86:	4413      	add	r3, r2
+ 8019e88:	00db      	lsls	r3, r3, #3
+ 8019e8a:	440b      	add	r3, r1
+ 8019e8c:	3312      	adds	r3, #18
+ 8019e8e:	881b      	ldrh	r3, [r3, #0]
+ 8019e90:	833b      	strh	r3, [r7, #24]
+  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
+ 8019e92:	8c3b      	ldrh	r3, [r7, #32]
+ 8019e94:	3301      	adds	r3, #1
+ 8019e96:	b29b      	uxth	r3, r3
+ 8019e98:	843b      	strh	r3, [r7, #32]
+ 8019e9a:	f9b7 3020 	ldrsh.w	r3, [r7, #32]
+ 8019e9e:	2b09      	cmp	r3, #9
+ 8019ea0:	f77f af4c 	ble.w	8019d3c <etharp_find_entry+0x34>
+    }
+  }
+  /* { we have no match } => try to create a new entry */
+
+  /* don't create new entry, only search? */
+  if (((flags & ETHARP_FLAG_FIND_ONLY) != 0) ||
+ 8019ea4:	7afb      	ldrb	r3, [r7, #11]
+ 8019ea6:	f003 0302 	and.w	r3, r3, #2
+ 8019eaa:	2b00      	cmp	r3, #0
+ 8019eac:	d108      	bne.n	8019ec0 <etharp_find_entry+0x1b8>
+ 8019eae:	f9b7 3022 	ldrsh.w	r3, [r7, #34]	; 0x22
+ 8019eb2:	2b0a      	cmp	r3, #10
+ 8019eb4:	d107      	bne.n	8019ec6 <etharp_find_entry+0x1be>
+      /* or no empty entry found and not allowed to recycle? */
+      ((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_FLAG_TRY_HARD) == 0))) {
+ 8019eb6:	7afb      	ldrb	r3, [r7, #11]
+ 8019eb8:	f003 0301 	and.w	r3, r3, #1
+ 8019ebc:	2b00      	cmp	r3, #0
+ 8019ebe:	d102      	bne.n	8019ec6 <etharp_find_entry+0x1be>
+    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty entry found and not allowed to recycle\n"));
+    return (s16_t)ERR_MEM;
+ 8019ec0:	f04f 33ff 	mov.w	r3, #4294967295
+ 8019ec4:	e085      	b.n	8019fd2 <etharp_find_entry+0x2ca>
+   *
+   * { ETHARP_FLAG_TRY_HARD is set at this point }
+   */
+
+  /* 1) empty entry available? */
+  if (empty < ARP_TABLE_SIZE) {
+ 8019ec6:	f9b7 3022 	ldrsh.w	r3, [r7, #34]	; 0x22
+ 8019eca:	2b09      	cmp	r3, #9
+ 8019ecc:	dc02      	bgt.n	8019ed4 <etharp_find_entry+0x1cc>
+    i = empty;
+ 8019ece:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 8019ed0:	843b      	strh	r3, [r7, #32]
+ 8019ed2:	e039      	b.n	8019f48 <etharp_find_entry+0x240>
+    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting empty entry %d\n", (int)i));
+  } else {
+    /* 2) found recyclable stable entry? */
+    if (old_stable < ARP_TABLE_SIZE) {
+ 8019ed4:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	; 0x24
+ 8019ed8:	2b09      	cmp	r3, #9
+ 8019eda:	dc14      	bgt.n	8019f06 <etharp_find_entry+0x1fe>
+      /* recycle oldest stable*/
+      i = old_stable;
+ 8019edc:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
+ 8019ede:	843b      	strh	r3, [r7, #32]
+      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest stable entry %d\n", (int)i));
+      /* no queued packets should exist on stable entries */
+      LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL);
+ 8019ee0:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019ee4:	493d      	ldr	r1, [pc, #244]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019ee6:	4613      	mov	r3, r2
+ 8019ee8:	005b      	lsls	r3, r3, #1
+ 8019eea:	4413      	add	r3, r2
+ 8019eec:	00db      	lsls	r3, r3, #3
+ 8019eee:	440b      	add	r3, r1
+ 8019ef0:	681b      	ldr	r3, [r3, #0]
+ 8019ef2:	2b00      	cmp	r3, #0
+ 8019ef4:	d018      	beq.n	8019f28 <etharp_find_entry+0x220>
+ 8019ef6:	4b3a      	ldr	r3, [pc, #232]	; (8019fe0 <etharp_find_entry+0x2d8>)
+ 8019ef8:	f240 126d 	movw	r2, #365	; 0x16d
+ 8019efc:	493b      	ldr	r1, [pc, #236]	; (8019fec <etharp_find_entry+0x2e4>)
+ 8019efe:	483a      	ldr	r0, [pc, #232]	; (8019fe8 <etharp_find_entry+0x2e0>)
+ 8019f00:	f002 fa7a 	bl	801c3f8 <iprintf>
+ 8019f04:	e010      	b.n	8019f28 <etharp_find_entry+0x220>
+      /* 3) found recyclable pending entry without queued packets? */
+    } else if (old_pending < ARP_TABLE_SIZE) {
+ 8019f06:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	; 0x26
+ 8019f0a:	2b09      	cmp	r3, #9
+ 8019f0c:	dc02      	bgt.n	8019f14 <etharp_find_entry+0x20c>
+      /* recycle oldest pending */
+      i = old_pending;
+ 8019f0e:	8cfb      	ldrh	r3, [r7, #38]	; 0x26
+ 8019f10:	843b      	strh	r3, [r7, #32]
+ 8019f12:	e009      	b.n	8019f28 <etharp_find_entry+0x220>
+      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d (without queue)\n", (int)i));
+      /* 4) found recyclable pending entry with queued packets? */
+    } else if (old_queue < ARP_TABLE_SIZE) {
+ 8019f14:	f9b7 301e 	ldrsh.w	r3, [r7, #30]
+ 8019f18:	2b09      	cmp	r3, #9
+ 8019f1a:	dc02      	bgt.n	8019f22 <etharp_find_entry+0x21a>
+      /* recycle oldest pending (queued packets are free in etharp_free_entry) */
+      i = old_queue;
+ 8019f1c:	8bfb      	ldrh	r3, [r7, #30]
+ 8019f1e:	843b      	strh	r3, [r7, #32]
+ 8019f20:	e002      	b.n	8019f28 <etharp_find_entry+0x220>
+      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d, freeing packet queue %p\n", (int)i, (void *)(arp_table[i].q)));
+      /* no empty or recyclable entries found */
+    } else {
+      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty or recyclable entries found\n"));
+      return (s16_t)ERR_MEM;
+ 8019f22:	f04f 33ff 	mov.w	r3, #4294967295
+ 8019f26:	e054      	b.n	8019fd2 <etharp_find_entry+0x2ca>
+    }
+
+    /* { empty or recyclable entry found } */
+    LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
+ 8019f28:	f9b7 3020 	ldrsh.w	r3, [r7, #32]
+ 8019f2c:	2b09      	cmp	r3, #9
+ 8019f2e:	dd06      	ble.n	8019f3e <etharp_find_entry+0x236>
+ 8019f30:	4b2b      	ldr	r3, [pc, #172]	; (8019fe0 <etharp_find_entry+0x2d8>)
+ 8019f32:	f240 127f 	movw	r2, #383	; 0x17f
+ 8019f36:	492e      	ldr	r1, [pc, #184]	; (8019ff0 <etharp_find_entry+0x2e8>)
+ 8019f38:	482b      	ldr	r0, [pc, #172]	; (8019fe8 <etharp_find_entry+0x2e0>)
+ 8019f3a:	f002 fa5d 	bl	801c3f8 <iprintf>
+    etharp_free_entry(i);
+ 8019f3e:	f9b7 3020 	ldrsh.w	r3, [r7, #32]
+ 8019f42:	4618      	mov	r0, r3
+ 8019f44:	f7ff fe06 	bl	8019b54 <etharp_free_entry>
+  }
+
+  LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
+ 8019f48:	f9b7 3020 	ldrsh.w	r3, [r7, #32]
+ 8019f4c:	2b09      	cmp	r3, #9
+ 8019f4e:	dd06      	ble.n	8019f5e <etharp_find_entry+0x256>
+ 8019f50:	4b23      	ldr	r3, [pc, #140]	; (8019fe0 <etharp_find_entry+0x2d8>)
+ 8019f52:	f240 1283 	movw	r2, #387	; 0x183
+ 8019f56:	4926      	ldr	r1, [pc, #152]	; (8019ff0 <etharp_find_entry+0x2e8>)
+ 8019f58:	4823      	ldr	r0, [pc, #140]	; (8019fe8 <etharp_find_entry+0x2e0>)
+ 8019f5a:	f002 fa4d 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("arp_table[i].state == ETHARP_STATE_EMPTY",
+ 8019f5e:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019f62:	491e      	ldr	r1, [pc, #120]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019f64:	4613      	mov	r3, r2
+ 8019f66:	005b      	lsls	r3, r3, #1
+ 8019f68:	4413      	add	r3, r2
+ 8019f6a:	00db      	lsls	r3, r3, #3
+ 8019f6c:	440b      	add	r3, r1
+ 8019f6e:	3314      	adds	r3, #20
+ 8019f70:	781b      	ldrb	r3, [r3, #0]
+ 8019f72:	2b00      	cmp	r3, #0
+ 8019f74:	d006      	beq.n	8019f84 <etharp_find_entry+0x27c>
+ 8019f76:	4b1a      	ldr	r3, [pc, #104]	; (8019fe0 <etharp_find_entry+0x2d8>)
+ 8019f78:	f240 1285 	movw	r2, #389	; 0x185
+ 8019f7c:	491d      	ldr	r1, [pc, #116]	; (8019ff4 <etharp_find_entry+0x2ec>)
+ 8019f7e:	481a      	ldr	r0, [pc, #104]	; (8019fe8 <etharp_find_entry+0x2e0>)
+ 8019f80:	f002 fa3a 	bl	801c3f8 <iprintf>
+              arp_table[i].state == ETHARP_STATE_EMPTY);
+
+  /* IP address given? */
+  if (ipaddr != NULL) {
+ 8019f84:	68fb      	ldr	r3, [r7, #12]
+ 8019f86:	2b00      	cmp	r3, #0
+ 8019f88:	d00b      	beq.n	8019fa2 <etharp_find_entry+0x29a>
+    /* set IP address */
+    ip4_addr_copy(arp_table[i].ipaddr, *ipaddr);
+ 8019f8a:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019f8e:	68fb      	ldr	r3, [r7, #12]
+ 8019f90:	6819      	ldr	r1, [r3, #0]
+ 8019f92:	4812      	ldr	r0, [pc, #72]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019f94:	4613      	mov	r3, r2
+ 8019f96:	005b      	lsls	r3, r3, #1
+ 8019f98:	4413      	add	r3, r2
+ 8019f9a:	00db      	lsls	r3, r3, #3
+ 8019f9c:	4403      	add	r3, r0
+ 8019f9e:	3304      	adds	r3, #4
+ 8019fa0:	6019      	str	r1, [r3, #0]
+  }
+  arp_table[i].ctime = 0;
+ 8019fa2:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019fa6:	490d      	ldr	r1, [pc, #52]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019fa8:	4613      	mov	r3, r2
+ 8019faa:	005b      	lsls	r3, r3, #1
+ 8019fac:	4413      	add	r3, r2
+ 8019fae:	00db      	lsls	r3, r3, #3
+ 8019fb0:	440b      	add	r3, r1
+ 8019fb2:	3312      	adds	r3, #18
+ 8019fb4:	2200      	movs	r2, #0
+ 8019fb6:	801a      	strh	r2, [r3, #0]
+#if ETHARP_TABLE_MATCH_NETIF
+  arp_table[i].netif = netif;
+ 8019fb8:	f9b7 2020 	ldrsh.w	r2, [r7, #32]
+ 8019fbc:	4907      	ldr	r1, [pc, #28]	; (8019fdc <etharp_find_entry+0x2d4>)
+ 8019fbe:	4613      	mov	r3, r2
+ 8019fc0:	005b      	lsls	r3, r3, #1
+ 8019fc2:	4413      	add	r3, r2
+ 8019fc4:	00db      	lsls	r3, r3, #3
+ 8019fc6:	440b      	add	r3, r1
+ 8019fc8:	3308      	adds	r3, #8
+ 8019fca:	687a      	ldr	r2, [r7, #4]
+ 8019fcc:	601a      	str	r2, [r3, #0]
+#endif /* ETHARP_TABLE_MATCH_NETIF */
+  return (s16_t)i;
+ 8019fce:	f9b7 3020 	ldrsh.w	r3, [r7, #32]
+}
+ 8019fd2:	4618      	mov	r0, r3
+ 8019fd4:	3728      	adds	r7, #40	; 0x28
+ 8019fd6:	46bd      	mov	sp, r7
+ 8019fd8:	bd80      	pop	{r7, pc}
+ 8019fda:	bf00      	nop
+ 8019fdc:	20008764 	.word	0x20008764
+ 8019fe0:	0801fe68 	.word	0x0801fe68
+ 8019fe4:	0801fea0 	.word	0x0801fea0
+ 8019fe8:	0801fee0 	.word	0x0801fee0
+ 8019fec:	0801ff08 	.word	0x0801ff08
+ 8019ff0:	0801ff20 	.word	0x0801ff20
+ 8019ff4:	0801ff34 	.word	0x0801ff34
+
+08019ff8 <etharp_update_arp_entry>:
+ *
+ * @see pbuf_free()
+ */
+static err_t
+etharp_update_arp_entry(struct netif *netif, const ip4_addr_t *ipaddr, struct eth_addr *ethaddr, u8_t flags)
+{
+ 8019ff8:	b580      	push	{r7, lr}
+ 8019ffa:	b088      	sub	sp, #32
+ 8019ffc:	af02      	add	r7, sp, #8
+ 8019ffe:	60f8      	str	r0, [r7, #12]
+ 801a000:	60b9      	str	r1, [r7, #8]
+ 801a002:	607a      	str	r2, [r7, #4]
+ 801a004:	70fb      	strb	r3, [r7, #3]
+  s16_t i;
+  LWIP_ASSERT("netif->hwaddr_len == ETH_HWADDR_LEN", netif->hwaddr_len == ETH_HWADDR_LEN);
+ 801a006:	68fb      	ldr	r3, [r7, #12]
+ 801a008:	f893 3030 	ldrb.w	r3, [r3, #48]	; 0x30
+ 801a00c:	2b06      	cmp	r3, #6
+ 801a00e:	d006      	beq.n	801a01e <etharp_update_arp_entry+0x26>
+ 801a010:	4b48      	ldr	r3, [pc, #288]	; (801a134 <etharp_update_arp_entry+0x13c>)
+ 801a012:	f240 12a9 	movw	r2, #425	; 0x1a9
+ 801a016:	4948      	ldr	r1, [pc, #288]	; (801a138 <etharp_update_arp_entry+0x140>)
+ 801a018:	4848      	ldr	r0, [pc, #288]	; (801a13c <etharp_update_arp_entry+0x144>)
+ 801a01a:	f002 f9ed 	bl	801c3f8 <iprintf>
+  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n",
+              ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr),
+              (u16_t)ethaddr->addr[0], (u16_t)ethaddr->addr[1], (u16_t)ethaddr->addr[2],
+              (u16_t)ethaddr->addr[3], (u16_t)ethaddr->addr[4], (u16_t)ethaddr->addr[5]));
+  /* non-unicast address? */
+  if (ip4_addr_isany(ipaddr) ||
+ 801a01e:	68bb      	ldr	r3, [r7, #8]
+ 801a020:	2b00      	cmp	r3, #0
+ 801a022:	d012      	beq.n	801a04a <etharp_update_arp_entry+0x52>
+ 801a024:	68bb      	ldr	r3, [r7, #8]
+ 801a026:	681b      	ldr	r3, [r3, #0]
+ 801a028:	2b00      	cmp	r3, #0
+ 801a02a:	d00e      	beq.n	801a04a <etharp_update_arp_entry+0x52>
+      ip4_addr_isbroadcast(ipaddr, netif) ||
+ 801a02c:	68bb      	ldr	r3, [r7, #8]
+ 801a02e:	681b      	ldr	r3, [r3, #0]
+ 801a030:	68f9      	ldr	r1, [r7, #12]
+ 801a032:	4618      	mov	r0, r3
+ 801a034:	f001 f91e 	bl	801b274 <ip4_addr_isbroadcast_u32>
+ 801a038:	4603      	mov	r3, r0
+  if (ip4_addr_isany(ipaddr) ||
+ 801a03a:	2b00      	cmp	r3, #0
+ 801a03c:	d105      	bne.n	801a04a <etharp_update_arp_entry+0x52>
+      ip4_addr_ismulticast(ipaddr)) {
+ 801a03e:	68bb      	ldr	r3, [r7, #8]
+ 801a040:	681b      	ldr	r3, [r3, #0]
+ 801a042:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
+      ip4_addr_isbroadcast(ipaddr, netif) ||
+ 801a046:	2be0      	cmp	r3, #224	; 0xe0
+ 801a048:	d102      	bne.n	801a050 <etharp_update_arp_entry+0x58>
+    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: will not add non-unicast IP address to ARP cache\n"));
+    return ERR_ARG;
+ 801a04a:	f06f 030f 	mvn.w	r3, #15
+ 801a04e:	e06c      	b.n	801a12a <etharp_update_arp_entry+0x132>
+  }
+  /* find or create ARP entry */
+  i = etharp_find_entry(ipaddr, flags, netif);
+ 801a050:	78fb      	ldrb	r3, [r7, #3]
+ 801a052:	68fa      	ldr	r2, [r7, #12]
+ 801a054:	4619      	mov	r1, r3
+ 801a056:	68b8      	ldr	r0, [r7, #8]
+ 801a058:	f7ff fe56 	bl	8019d08 <etharp_find_entry>
+ 801a05c:	4603      	mov	r3, r0
+ 801a05e:	82fb      	strh	r3, [r7, #22]
+  /* bail out if no entry could be found */
+  if (i < 0) {
+ 801a060:	f9b7 3016 	ldrsh.w	r3, [r7, #22]
+ 801a064:	2b00      	cmp	r3, #0
+ 801a066:	da02      	bge.n	801a06e <etharp_update_arp_entry+0x76>
+    return (err_t)i;
+ 801a068:	8afb      	ldrh	r3, [r7, #22]
+ 801a06a:	b25b      	sxtb	r3, r3
+ 801a06c:	e05d      	b.n	801a12a <etharp_update_arp_entry+0x132>
+    return ERR_VAL;
+  } else
+#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
+  {
+    /* mark it stable */
+    arp_table[i].state = ETHARP_STATE_STABLE;
+ 801a06e:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
+ 801a072:	4933      	ldr	r1, [pc, #204]	; (801a140 <etharp_update_arp_entry+0x148>)
+ 801a074:	4613      	mov	r3, r2
+ 801a076:	005b      	lsls	r3, r3, #1
+ 801a078:	4413      	add	r3, r2
+ 801a07a:	00db      	lsls	r3, r3, #3
+ 801a07c:	440b      	add	r3, r1
+ 801a07e:	3314      	adds	r3, #20
+ 801a080:	2202      	movs	r2, #2
+ 801a082:	701a      	strb	r2, [r3, #0]
+  }
+
+  /* record network interface */
+  arp_table[i].netif = netif;
+ 801a084:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
+ 801a088:	492d      	ldr	r1, [pc, #180]	; (801a140 <etharp_update_arp_entry+0x148>)
+ 801a08a:	4613      	mov	r3, r2
+ 801a08c:	005b      	lsls	r3, r3, #1
+ 801a08e:	4413      	add	r3, r2
+ 801a090:	00db      	lsls	r3, r3, #3
+ 801a092:	440b      	add	r3, r1
+ 801a094:	3308      	adds	r3, #8
+ 801a096:	68fa      	ldr	r2, [r7, #12]
+ 801a098:	601a      	str	r2, [r3, #0]
+  /* insert in SNMP ARP index tree */
+  mib2_add_arp_entry(netif, &arp_table[i].ipaddr);
+
+  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: updating stable entry %"S16_F"\n", i));
+  /* update address */
+  SMEMCPY(&arp_table[i].ethaddr, ethaddr, ETH_HWADDR_LEN);
+ 801a09a:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
+ 801a09e:	4613      	mov	r3, r2
+ 801a0a0:	005b      	lsls	r3, r3, #1
+ 801a0a2:	4413      	add	r3, r2
+ 801a0a4:	00db      	lsls	r3, r3, #3
+ 801a0a6:	3308      	adds	r3, #8
+ 801a0a8:	4a25      	ldr	r2, [pc, #148]	; (801a140 <etharp_update_arp_entry+0x148>)
+ 801a0aa:	4413      	add	r3, r2
+ 801a0ac:	3304      	adds	r3, #4
+ 801a0ae:	2206      	movs	r2, #6
+ 801a0b0:	6879      	ldr	r1, [r7, #4]
+ 801a0b2:	4618      	mov	r0, r3
+ 801a0b4:	f002 f973 	bl	801c39e <memcpy>
+  /* reset time stamp */
+  arp_table[i].ctime = 0;
+ 801a0b8:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
+ 801a0bc:	4920      	ldr	r1, [pc, #128]	; (801a140 <etharp_update_arp_entry+0x148>)
+ 801a0be:	4613      	mov	r3, r2
+ 801a0c0:	005b      	lsls	r3, r3, #1
+ 801a0c2:	4413      	add	r3, r2
+ 801a0c4:	00db      	lsls	r3, r3, #3
+ 801a0c6:	440b      	add	r3, r1
+ 801a0c8:	3312      	adds	r3, #18
+ 801a0ca:	2200      	movs	r2, #0
+ 801a0cc:	801a      	strh	r2, [r3, #0]
+    /* get the packet pointer */
+    p = q->p;
+    /* now queue entry can be freed */
+    memp_free(MEMP_ARP_QUEUE, q);
+#else /* ARP_QUEUEING */
+  if (arp_table[i].q != NULL) {
+ 801a0ce:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
+ 801a0d2:	491b      	ldr	r1, [pc, #108]	; (801a140 <etharp_update_arp_entry+0x148>)
+ 801a0d4:	4613      	mov	r3, r2
+ 801a0d6:	005b      	lsls	r3, r3, #1
+ 801a0d8:	4413      	add	r3, r2
+ 801a0da:	00db      	lsls	r3, r3, #3
+ 801a0dc:	440b      	add	r3, r1
+ 801a0de:	681b      	ldr	r3, [r3, #0]
+ 801a0e0:	2b00      	cmp	r3, #0
+ 801a0e2:	d021      	beq.n	801a128 <etharp_update_arp_entry+0x130>
+    struct pbuf *p = arp_table[i].q;
+ 801a0e4:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
+ 801a0e8:	4915      	ldr	r1, [pc, #84]	; (801a140 <etharp_update_arp_entry+0x148>)
+ 801a0ea:	4613      	mov	r3, r2
+ 801a0ec:	005b      	lsls	r3, r3, #1
+ 801a0ee:	4413      	add	r3, r2
+ 801a0f0:	00db      	lsls	r3, r3, #3
+ 801a0f2:	440b      	add	r3, r1
+ 801a0f4:	681b      	ldr	r3, [r3, #0]
+ 801a0f6:	613b      	str	r3, [r7, #16]
+    arp_table[i].q = NULL;
+ 801a0f8:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
+ 801a0fc:	4910      	ldr	r1, [pc, #64]	; (801a140 <etharp_update_arp_entry+0x148>)
+ 801a0fe:	4613      	mov	r3, r2
+ 801a100:	005b      	lsls	r3, r3, #1
+ 801a102:	4413      	add	r3, r2
+ 801a104:	00db      	lsls	r3, r3, #3
+ 801a106:	440b      	add	r3, r1
+ 801a108:	2200      	movs	r2, #0
+ 801a10a:	601a      	str	r2, [r3, #0]
+#endif /* ARP_QUEUEING */
+    /* send the queued IP packet */
+    ethernet_output(netif, p, (struct eth_addr *)(netif->hwaddr), ethaddr, ETHTYPE_IP);
+ 801a10c:	68fb      	ldr	r3, [r7, #12]
+ 801a10e:	f103 022a 	add.w	r2, r3, #42	; 0x2a
+ 801a112:	f44f 6300 	mov.w	r3, #2048	; 0x800
+ 801a116:	9300      	str	r3, [sp, #0]
+ 801a118:	687b      	ldr	r3, [r7, #4]
+ 801a11a:	6939      	ldr	r1, [r7, #16]
+ 801a11c:	68f8      	ldr	r0, [r7, #12]
+ 801a11e:	f001 ffad 	bl	801c07c <ethernet_output>
+    /* free the queued IP packet */
+    pbuf_free(p);
+ 801a122:	6938      	ldr	r0, [r7, #16]
+ 801a124:	f7f7 fc38 	bl	8011998 <pbuf_free>
+  }
+  return ERR_OK;
+ 801a128:	2300      	movs	r3, #0
+}
+ 801a12a:	4618      	mov	r0, r3
+ 801a12c:	3718      	adds	r7, #24
+ 801a12e:	46bd      	mov	sp, r7
+ 801a130:	bd80      	pop	{r7, pc}
+ 801a132:	bf00      	nop
+ 801a134:	0801fe68 	.word	0x0801fe68
+ 801a138:	0801ff60 	.word	0x0801ff60
+ 801a13c:	0801fee0 	.word	0x0801fee0
+ 801a140:	20008764 	.word	0x20008764
+
+0801a144 <etharp_cleanup_netif>:
+ *
+ * @param netif points to a network interface
+ */
+void
+etharp_cleanup_netif(struct netif *netif)
+{
+ 801a144:	b580      	push	{r7, lr}
+ 801a146:	b084      	sub	sp, #16
+ 801a148:	af00      	add	r7, sp, #0
+ 801a14a:	6078      	str	r0, [r7, #4]
+  int i;
+
+  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
+ 801a14c:	2300      	movs	r3, #0
+ 801a14e:	60fb      	str	r3, [r7, #12]
+ 801a150:	e01e      	b.n	801a190 <etharp_cleanup_netif+0x4c>
+    u8_t state = arp_table[i].state;
+ 801a152:	4913      	ldr	r1, [pc, #76]	; (801a1a0 <etharp_cleanup_netif+0x5c>)
+ 801a154:	68fa      	ldr	r2, [r7, #12]
+ 801a156:	4613      	mov	r3, r2
+ 801a158:	005b      	lsls	r3, r3, #1
+ 801a15a:	4413      	add	r3, r2
+ 801a15c:	00db      	lsls	r3, r3, #3
+ 801a15e:	440b      	add	r3, r1
+ 801a160:	3314      	adds	r3, #20
+ 801a162:	781b      	ldrb	r3, [r3, #0]
+ 801a164:	72fb      	strb	r3, [r7, #11]
+    if ((state != ETHARP_STATE_EMPTY) && (arp_table[i].netif == netif)) {
+ 801a166:	7afb      	ldrb	r3, [r7, #11]
+ 801a168:	2b00      	cmp	r3, #0
+ 801a16a:	d00e      	beq.n	801a18a <etharp_cleanup_netif+0x46>
+ 801a16c:	490c      	ldr	r1, [pc, #48]	; (801a1a0 <etharp_cleanup_netif+0x5c>)
+ 801a16e:	68fa      	ldr	r2, [r7, #12]
+ 801a170:	4613      	mov	r3, r2
+ 801a172:	005b      	lsls	r3, r3, #1
+ 801a174:	4413      	add	r3, r2
+ 801a176:	00db      	lsls	r3, r3, #3
+ 801a178:	440b      	add	r3, r1
+ 801a17a:	3308      	adds	r3, #8
+ 801a17c:	681b      	ldr	r3, [r3, #0]
+ 801a17e:	687a      	ldr	r2, [r7, #4]
+ 801a180:	429a      	cmp	r2, r3
+ 801a182:	d102      	bne.n	801a18a <etharp_cleanup_netif+0x46>
+      etharp_free_entry(i);
+ 801a184:	68f8      	ldr	r0, [r7, #12]
+ 801a186:	f7ff fce5 	bl	8019b54 <etharp_free_entry>
+  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
+ 801a18a:	68fb      	ldr	r3, [r7, #12]
+ 801a18c:	3301      	adds	r3, #1
+ 801a18e:	60fb      	str	r3, [r7, #12]
+ 801a190:	68fb      	ldr	r3, [r7, #12]
+ 801a192:	2b09      	cmp	r3, #9
+ 801a194:	dddd      	ble.n	801a152 <etharp_cleanup_netif+0xe>
+    }
+  }
+}
+ 801a196:	bf00      	nop
+ 801a198:	3710      	adds	r7, #16
+ 801a19a:	46bd      	mov	sp, r7
+ 801a19c:	bd80      	pop	{r7, pc}
+ 801a19e:	bf00      	nop
+ 801a1a0:	20008764 	.word	0x20008764
+
+0801a1a4 <etharp_input>:
+ *
+ * @see pbuf_free()
+ */
+void
+etharp_input(struct pbuf *p, struct netif *netif)
+{
+ 801a1a4:	b5b0      	push	{r4, r5, r7, lr}
+ 801a1a6:	b08a      	sub	sp, #40	; 0x28
+ 801a1a8:	af04      	add	r7, sp, #16
+ 801a1aa:	6078      	str	r0, [r7, #4]
+ 801a1ac:	6039      	str	r1, [r7, #0]
+  ip4_addr_t sipaddr, dipaddr;
+  u8_t for_us;
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
+ 801a1ae:	683b      	ldr	r3, [r7, #0]
+ 801a1b0:	2b00      	cmp	r3, #0
+ 801a1b2:	d107      	bne.n	801a1c4 <etharp_input+0x20>
+ 801a1b4:	4b3f      	ldr	r3, [pc, #252]	; (801a2b4 <etharp_input+0x110>)
+ 801a1b6:	f240 228a 	movw	r2, #650	; 0x28a
+ 801a1ba:	493f      	ldr	r1, [pc, #252]	; (801a2b8 <etharp_input+0x114>)
+ 801a1bc:	483f      	ldr	r0, [pc, #252]	; (801a2bc <etharp_input+0x118>)
+ 801a1be:	f002 f91b 	bl	801c3f8 <iprintf>
+ 801a1c2:	e074      	b.n	801a2ae <etharp_input+0x10a>
+
+  hdr = (struct etharp_hdr *)p->payload;
+ 801a1c4:	687b      	ldr	r3, [r7, #4]
+ 801a1c6:	685b      	ldr	r3, [r3, #4]
+ 801a1c8:	613b      	str	r3, [r7, #16]
+
+  /* RFC 826 "Packet Reception": */
+  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
+ 801a1ca:	693b      	ldr	r3, [r7, #16]
+ 801a1cc:	881b      	ldrh	r3, [r3, #0]
+ 801a1ce:	b29b      	uxth	r3, r3
+ 801a1d0:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
+ 801a1d4:	d10c      	bne.n	801a1f0 <etharp_input+0x4c>
+      (hdr->hwlen != ETH_HWADDR_LEN) ||
+ 801a1d6:	693b      	ldr	r3, [r7, #16]
+ 801a1d8:	791b      	ldrb	r3, [r3, #4]
+  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
+ 801a1da:	2b06      	cmp	r3, #6
+ 801a1dc:	d108      	bne.n	801a1f0 <etharp_input+0x4c>
+      (hdr->protolen != sizeof(ip4_addr_t)) ||
+ 801a1de:	693b      	ldr	r3, [r7, #16]
+ 801a1e0:	795b      	ldrb	r3, [r3, #5]
+      (hdr->hwlen != ETH_HWADDR_LEN) ||
+ 801a1e2:	2b04      	cmp	r3, #4
+ 801a1e4:	d104      	bne.n	801a1f0 <etharp_input+0x4c>
+      (hdr->proto != PP_HTONS(ETHTYPE_IP)))  {
+ 801a1e6:	693b      	ldr	r3, [r7, #16]
+ 801a1e8:	885b      	ldrh	r3, [r3, #2]
+ 801a1ea:	b29b      	uxth	r3, r3
+      (hdr->protolen != sizeof(ip4_addr_t)) ||
+ 801a1ec:	2b08      	cmp	r3, #8
+ 801a1ee:	d003      	beq.n	801a1f8 <etharp_input+0x54>
+    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
+                ("etharp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n",
+                 hdr->hwtype, (u16_t)hdr->hwlen, hdr->proto, (u16_t)hdr->protolen));
+    ETHARP_STATS_INC(etharp.proterr);
+    ETHARP_STATS_INC(etharp.drop);
+    pbuf_free(p);
+ 801a1f0:	6878      	ldr	r0, [r7, #4]
+ 801a1f2:	f7f7 fbd1 	bl	8011998 <pbuf_free>
+    return;
+ 801a1f6:	e05a      	b.n	801a2ae <etharp_input+0x10a>
+  autoip_arp_reply(netif, hdr);
+#endif /* LWIP_AUTOIP */
+
+  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
+   * structure packing (not using structure copy which breaks strict-aliasing rules). */
+  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&sipaddr, &hdr->sipaddr);
+ 801a1f8:	693b      	ldr	r3, [r7, #16]
+ 801a1fa:	330e      	adds	r3, #14
+ 801a1fc:	681b      	ldr	r3, [r3, #0]
+ 801a1fe:	60fb      	str	r3, [r7, #12]
+  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&dipaddr, &hdr->dipaddr);
+ 801a200:	693b      	ldr	r3, [r7, #16]
+ 801a202:	3318      	adds	r3, #24
+ 801a204:	681b      	ldr	r3, [r3, #0]
+ 801a206:	60bb      	str	r3, [r7, #8]
+
+  /* this interface is not configured? */
+  if (ip4_addr_isany_val(*netif_ip4_addr(netif))) {
+ 801a208:	683b      	ldr	r3, [r7, #0]
+ 801a20a:	3304      	adds	r3, #4
+ 801a20c:	681b      	ldr	r3, [r3, #0]
+ 801a20e:	2b00      	cmp	r3, #0
+ 801a210:	d102      	bne.n	801a218 <etharp_input+0x74>
+    for_us = 0;
+ 801a212:	2300      	movs	r3, #0
+ 801a214:	75fb      	strb	r3, [r7, #23]
+ 801a216:	e009      	b.n	801a22c <etharp_input+0x88>
+  } else {
+    /* ARP packet directed to us? */
+    for_us = (u8_t)ip4_addr_cmp(&dipaddr, netif_ip4_addr(netif));
+ 801a218:	68ba      	ldr	r2, [r7, #8]
+ 801a21a:	683b      	ldr	r3, [r7, #0]
+ 801a21c:	3304      	adds	r3, #4
+ 801a21e:	681b      	ldr	r3, [r3, #0]
+ 801a220:	429a      	cmp	r2, r3
+ 801a222:	bf0c      	ite	eq
+ 801a224:	2301      	moveq	r3, #1
+ 801a226:	2300      	movne	r3, #0
+ 801a228:	b2db      	uxtb	r3, r3
+ 801a22a:	75fb      	strb	r3, [r7, #23]
+  /* ARP message directed to us?
+      -> add IP address in ARP cache; assume requester wants to talk to us,
+         can result in directly sending the queued packets for this host.
+     ARP message not directed to us?
+      ->  update the source IP address in the cache, if present */
+  etharp_update_arp_entry(netif, &sipaddr, &(hdr->shwaddr),
+ 801a22c:	693b      	ldr	r3, [r7, #16]
+ 801a22e:	f103 0208 	add.w	r2, r3, #8
+ 801a232:	7dfb      	ldrb	r3, [r7, #23]
+ 801a234:	2b00      	cmp	r3, #0
+ 801a236:	d001      	beq.n	801a23c <etharp_input+0x98>
+ 801a238:	2301      	movs	r3, #1
+ 801a23a:	e000      	b.n	801a23e <etharp_input+0x9a>
+ 801a23c:	2302      	movs	r3, #2
+ 801a23e:	f107 010c 	add.w	r1, r7, #12
+ 801a242:	6838      	ldr	r0, [r7, #0]
+ 801a244:	f7ff fed8 	bl	8019ff8 <etharp_update_arp_entry>
+                          for_us ? ETHARP_FLAG_TRY_HARD : ETHARP_FLAG_FIND_ONLY);
+
+  /* now act on the message itself */
+  switch (hdr->opcode) {
+ 801a248:	693b      	ldr	r3, [r7, #16]
+ 801a24a:	88db      	ldrh	r3, [r3, #6]
+ 801a24c:	b29b      	uxth	r3, r3
+ 801a24e:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
+ 801a252:	d003      	beq.n	801a25c <etharp_input+0xb8>
+ 801a254:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
+ 801a258:	d01e      	beq.n	801a298 <etharp_input+0xf4>
+#endif /* (LWIP_DHCP && DHCP_DOES_ARP_CHECK) */
+      break;
+    default:
+      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_input: ARP unknown opcode type %"S16_F"\n", lwip_htons(hdr->opcode)));
+      ETHARP_STATS_INC(etharp.err);
+      break;
+ 801a25a:	e025      	b.n	801a2a8 <etharp_input+0x104>
+      if (for_us) {
+ 801a25c:	7dfb      	ldrb	r3, [r7, #23]
+ 801a25e:	2b00      	cmp	r3, #0
+ 801a260:	d021      	beq.n	801a2a6 <etharp_input+0x102>
+                   (struct eth_addr *)netif->hwaddr, &hdr->shwaddr,
+ 801a262:	683b      	ldr	r3, [r7, #0]
+ 801a264:	f103 002a 	add.w	r0, r3, #42	; 0x2a
+ 801a268:	693b      	ldr	r3, [r7, #16]
+ 801a26a:	f103 0408 	add.w	r4, r3, #8
+                   (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif),
+ 801a26e:	683b      	ldr	r3, [r7, #0]
+ 801a270:	f103 052a 	add.w	r5, r3, #42	; 0x2a
+ 801a274:	683b      	ldr	r3, [r7, #0]
+ 801a276:	3304      	adds	r3, #4
+                   &hdr->shwaddr, &sipaddr,
+ 801a278:	693a      	ldr	r2, [r7, #16]
+ 801a27a:	3208      	adds	r2, #8
+        etharp_raw(netif,
+ 801a27c:	2102      	movs	r1, #2
+ 801a27e:	9103      	str	r1, [sp, #12]
+ 801a280:	f107 010c 	add.w	r1, r7, #12
+ 801a284:	9102      	str	r1, [sp, #8]
+ 801a286:	9201      	str	r2, [sp, #4]
+ 801a288:	9300      	str	r3, [sp, #0]
+ 801a28a:	462b      	mov	r3, r5
+ 801a28c:	4622      	mov	r2, r4
+ 801a28e:	4601      	mov	r1, r0
+ 801a290:	6838      	ldr	r0, [r7, #0]
+ 801a292:	f000 faef 	bl	801a874 <etharp_raw>
+      break;
+ 801a296:	e006      	b.n	801a2a6 <etharp_input+0x102>
+      dhcp_arp_reply(netif, &sipaddr);
+ 801a298:	f107 030c 	add.w	r3, r7, #12
+ 801a29c:	4619      	mov	r1, r3
+ 801a29e:	6838      	ldr	r0, [r7, #0]
+ 801a2a0:	f7fe f9fe 	bl	80186a0 <dhcp_arp_reply>
+      break;
+ 801a2a4:	e000      	b.n	801a2a8 <etharp_input+0x104>
+      break;
+ 801a2a6:	bf00      	nop
+  }
+  /* free ARP packet */
+  pbuf_free(p);
+ 801a2a8:	6878      	ldr	r0, [r7, #4]
+ 801a2aa:	f7f7 fb75 	bl	8011998 <pbuf_free>
+}
+ 801a2ae:	3718      	adds	r7, #24
+ 801a2b0:	46bd      	mov	sp, r7
+ 801a2b2:	bdb0      	pop	{r4, r5, r7, pc}
+ 801a2b4:	0801fe68 	.word	0x0801fe68
+ 801a2b8:	0801ffb8 	.word	0x0801ffb8
+ 801a2bc:	0801fee0 	.word	0x0801fee0
+
+0801a2c0 <etharp_output_to_arp_index>:
+/** Just a small helper function that sends a pbuf to an ethernet address
+ * in the arp_table specified by the index 'arp_idx'.
+ */
+static err_t
+etharp_output_to_arp_index(struct netif *netif, struct pbuf *q, netif_addr_idx_t arp_idx)
+{
+ 801a2c0:	b580      	push	{r7, lr}
+ 801a2c2:	b086      	sub	sp, #24
+ 801a2c4:	af02      	add	r7, sp, #8
+ 801a2c6:	60f8      	str	r0, [r7, #12]
+ 801a2c8:	60b9      	str	r1, [r7, #8]
+ 801a2ca:	4613      	mov	r3, r2
+ 801a2cc:	71fb      	strb	r3, [r7, #7]
+  LWIP_ASSERT("arp_table[arp_idx].state >= ETHARP_STATE_STABLE",
+ 801a2ce:	79fa      	ldrb	r2, [r7, #7]
+ 801a2d0:	4944      	ldr	r1, [pc, #272]	; (801a3e4 <etharp_output_to_arp_index+0x124>)
+ 801a2d2:	4613      	mov	r3, r2
+ 801a2d4:	005b      	lsls	r3, r3, #1
+ 801a2d6:	4413      	add	r3, r2
+ 801a2d8:	00db      	lsls	r3, r3, #3
+ 801a2da:	440b      	add	r3, r1
+ 801a2dc:	3314      	adds	r3, #20
+ 801a2de:	781b      	ldrb	r3, [r3, #0]
+ 801a2e0:	2b01      	cmp	r3, #1
+ 801a2e2:	d806      	bhi.n	801a2f2 <etharp_output_to_arp_index+0x32>
+ 801a2e4:	4b40      	ldr	r3, [pc, #256]	; (801a3e8 <etharp_output_to_arp_index+0x128>)
+ 801a2e6:	f240 22ef 	movw	r2, #751	; 0x2ef
+ 801a2ea:	4940      	ldr	r1, [pc, #256]	; (801a3ec <etharp_output_to_arp_index+0x12c>)
+ 801a2ec:	4840      	ldr	r0, [pc, #256]	; (801a3f0 <etharp_output_to_arp_index+0x130>)
+ 801a2ee:	f002 f883 	bl	801c3f8 <iprintf>
+              arp_table[arp_idx].state >= ETHARP_STATE_STABLE);
+  /* if arp table entry is about to expire: re-request it,
+     but only if its state is ETHARP_STATE_STABLE to prevent flooding the
+     network with ARP requests if this address is used frequently. */
+  if (arp_table[arp_idx].state == ETHARP_STATE_STABLE) {
+ 801a2f2:	79fa      	ldrb	r2, [r7, #7]
+ 801a2f4:	493b      	ldr	r1, [pc, #236]	; (801a3e4 <etharp_output_to_arp_index+0x124>)
+ 801a2f6:	4613      	mov	r3, r2
+ 801a2f8:	005b      	lsls	r3, r3, #1
+ 801a2fa:	4413      	add	r3, r2
+ 801a2fc:	00db      	lsls	r3, r3, #3
+ 801a2fe:	440b      	add	r3, r1
+ 801a300:	3314      	adds	r3, #20
+ 801a302:	781b      	ldrb	r3, [r3, #0]
+ 801a304:	2b02      	cmp	r3, #2
+ 801a306:	d153      	bne.n	801a3b0 <etharp_output_to_arp_index+0xf0>
+    if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_BROADCAST) {
+ 801a308:	79fa      	ldrb	r2, [r7, #7]
+ 801a30a:	4936      	ldr	r1, [pc, #216]	; (801a3e4 <etharp_output_to_arp_index+0x124>)
+ 801a30c:	4613      	mov	r3, r2
+ 801a30e:	005b      	lsls	r3, r3, #1
+ 801a310:	4413      	add	r3, r2
+ 801a312:	00db      	lsls	r3, r3, #3
+ 801a314:	440b      	add	r3, r1
+ 801a316:	3312      	adds	r3, #18
+ 801a318:	881b      	ldrh	r3, [r3, #0]
+ 801a31a:	f5b3 7f8e 	cmp.w	r3, #284	; 0x11c
+ 801a31e:	d919      	bls.n	801a354 <etharp_output_to_arp_index+0x94>
+      /* issue a standard request using broadcast */
+      if (etharp_request(netif, &arp_table[arp_idx].ipaddr) == ERR_OK) {
+ 801a320:	79fa      	ldrb	r2, [r7, #7]
+ 801a322:	4613      	mov	r3, r2
+ 801a324:	005b      	lsls	r3, r3, #1
+ 801a326:	4413      	add	r3, r2
+ 801a328:	00db      	lsls	r3, r3, #3
+ 801a32a:	4a2e      	ldr	r2, [pc, #184]	; (801a3e4 <etharp_output_to_arp_index+0x124>)
+ 801a32c:	4413      	add	r3, r2
+ 801a32e:	3304      	adds	r3, #4
+ 801a330:	4619      	mov	r1, r3
+ 801a332:	68f8      	ldr	r0, [r7, #12]
+ 801a334:	f000 fb4c 	bl	801a9d0 <etharp_request>
+ 801a338:	4603      	mov	r3, r0
+ 801a33a:	2b00      	cmp	r3, #0
+ 801a33c:	d138      	bne.n	801a3b0 <etharp_output_to_arp_index+0xf0>
+        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
+ 801a33e:	79fa      	ldrb	r2, [r7, #7]
+ 801a340:	4928      	ldr	r1, [pc, #160]	; (801a3e4 <etharp_output_to_arp_index+0x124>)
+ 801a342:	4613      	mov	r3, r2
+ 801a344:	005b      	lsls	r3, r3, #1
+ 801a346:	4413      	add	r3, r2
+ 801a348:	00db      	lsls	r3, r3, #3
+ 801a34a:	440b      	add	r3, r1
+ 801a34c:	3314      	adds	r3, #20
+ 801a34e:	2203      	movs	r2, #3
+ 801a350:	701a      	strb	r2, [r3, #0]
+ 801a352:	e02d      	b.n	801a3b0 <etharp_output_to_arp_index+0xf0>
+      }
+    } else if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_UNICAST) {
+ 801a354:	79fa      	ldrb	r2, [r7, #7]
+ 801a356:	4923      	ldr	r1, [pc, #140]	; (801a3e4 <etharp_output_to_arp_index+0x124>)
+ 801a358:	4613      	mov	r3, r2
+ 801a35a:	005b      	lsls	r3, r3, #1
+ 801a35c:	4413      	add	r3, r2
+ 801a35e:	00db      	lsls	r3, r3, #3
+ 801a360:	440b      	add	r3, r1
+ 801a362:	3312      	adds	r3, #18
+ 801a364:	881b      	ldrh	r3, [r3, #0]
+ 801a366:	f5b3 7f87 	cmp.w	r3, #270	; 0x10e
+ 801a36a:	d321      	bcc.n	801a3b0 <etharp_output_to_arp_index+0xf0>
+      /* issue a unicast request (for 15 seconds) to prevent unnecessary broadcast */
+      if (etharp_request_dst(netif, &arp_table[arp_idx].ipaddr, &arp_table[arp_idx].ethaddr) == ERR_OK) {
+ 801a36c:	79fa      	ldrb	r2, [r7, #7]
+ 801a36e:	4613      	mov	r3, r2
+ 801a370:	005b      	lsls	r3, r3, #1
+ 801a372:	4413      	add	r3, r2
+ 801a374:	00db      	lsls	r3, r3, #3
+ 801a376:	4a1b      	ldr	r2, [pc, #108]	; (801a3e4 <etharp_output_to_arp_index+0x124>)
+ 801a378:	4413      	add	r3, r2
+ 801a37a:	1d19      	adds	r1, r3, #4
+ 801a37c:	79fa      	ldrb	r2, [r7, #7]
+ 801a37e:	4613      	mov	r3, r2
+ 801a380:	005b      	lsls	r3, r3, #1
+ 801a382:	4413      	add	r3, r2
+ 801a384:	00db      	lsls	r3, r3, #3
+ 801a386:	3308      	adds	r3, #8
+ 801a388:	4a16      	ldr	r2, [pc, #88]	; (801a3e4 <etharp_output_to_arp_index+0x124>)
+ 801a38a:	4413      	add	r3, r2
+ 801a38c:	3304      	adds	r3, #4
+ 801a38e:	461a      	mov	r2, r3
+ 801a390:	68f8      	ldr	r0, [r7, #12]
+ 801a392:	f000 fafb 	bl	801a98c <etharp_request_dst>
+ 801a396:	4603      	mov	r3, r0
+ 801a398:	2b00      	cmp	r3, #0
+ 801a39a:	d109      	bne.n	801a3b0 <etharp_output_to_arp_index+0xf0>
+        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
+ 801a39c:	79fa      	ldrb	r2, [r7, #7]
+ 801a39e:	4911      	ldr	r1, [pc, #68]	; (801a3e4 <etharp_output_to_arp_index+0x124>)
+ 801a3a0:	4613      	mov	r3, r2
+ 801a3a2:	005b      	lsls	r3, r3, #1
+ 801a3a4:	4413      	add	r3, r2
+ 801a3a6:	00db      	lsls	r3, r3, #3
+ 801a3a8:	440b      	add	r3, r1
+ 801a3aa:	3314      	adds	r3, #20
+ 801a3ac:	2203      	movs	r2, #3
+ 801a3ae:	701a      	strb	r2, [r3, #0]
+      }
+    }
+  }
+
+  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), &arp_table[arp_idx].ethaddr, ETHTYPE_IP);
+ 801a3b0:	68fb      	ldr	r3, [r7, #12]
+ 801a3b2:	f103 012a 	add.w	r1, r3, #42	; 0x2a
+ 801a3b6:	79fa      	ldrb	r2, [r7, #7]
+ 801a3b8:	4613      	mov	r3, r2
+ 801a3ba:	005b      	lsls	r3, r3, #1
+ 801a3bc:	4413      	add	r3, r2
+ 801a3be:	00db      	lsls	r3, r3, #3
+ 801a3c0:	3308      	adds	r3, #8
+ 801a3c2:	4a08      	ldr	r2, [pc, #32]	; (801a3e4 <etharp_output_to_arp_index+0x124>)
+ 801a3c4:	4413      	add	r3, r2
+ 801a3c6:	1d1a      	adds	r2, r3, #4
+ 801a3c8:	f44f 6300 	mov.w	r3, #2048	; 0x800
+ 801a3cc:	9300      	str	r3, [sp, #0]
+ 801a3ce:	4613      	mov	r3, r2
+ 801a3d0:	460a      	mov	r2, r1
+ 801a3d2:	68b9      	ldr	r1, [r7, #8]
+ 801a3d4:	68f8      	ldr	r0, [r7, #12]
+ 801a3d6:	f001 fe51 	bl	801c07c <ethernet_output>
+ 801a3da:	4603      	mov	r3, r0
+}
+ 801a3dc:	4618      	mov	r0, r3
+ 801a3de:	3710      	adds	r7, #16
+ 801a3e0:	46bd      	mov	sp, r7
+ 801a3e2:	bd80      	pop	{r7, pc}
+ 801a3e4:	20008764 	.word	0x20008764
+ 801a3e8:	0801fe68 	.word	0x0801fe68
+ 801a3ec:	0801ffd8 	.word	0x0801ffd8
+ 801a3f0:	0801fee0 	.word	0x0801fee0
+
+0801a3f4 <etharp_output>:
+ * - ERR_RTE No route to destination (no gateway to external networks),
+ * or the return type of either etharp_query() or ethernet_output().
+ */
+err_t
+etharp_output(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr)
+{
+ 801a3f4:	b580      	push	{r7, lr}
+ 801a3f6:	b08a      	sub	sp, #40	; 0x28
+ 801a3f8:	af02      	add	r7, sp, #8
+ 801a3fa:	60f8      	str	r0, [r7, #12]
+ 801a3fc:	60b9      	str	r1, [r7, #8]
+ 801a3fe:	607a      	str	r2, [r7, #4]
+  const struct eth_addr *dest;
+  struct eth_addr mcastaddr;
+  const ip4_addr_t *dst_addr = ipaddr;
+ 801a400:	687b      	ldr	r3, [r7, #4]
+ 801a402:	61bb      	str	r3, [r7, #24]
+
+  LWIP_ASSERT_CORE_LOCKED();
+  LWIP_ASSERT("netif != NULL", netif != NULL);
+ 801a404:	68fb      	ldr	r3, [r7, #12]
+ 801a406:	2b00      	cmp	r3, #0
+ 801a408:	d106      	bne.n	801a418 <etharp_output+0x24>
+ 801a40a:	4b73      	ldr	r3, [pc, #460]	; (801a5d8 <etharp_output+0x1e4>)
+ 801a40c:	f240 321e 	movw	r2, #798	; 0x31e
+ 801a410:	4972      	ldr	r1, [pc, #456]	; (801a5dc <etharp_output+0x1e8>)
+ 801a412:	4873      	ldr	r0, [pc, #460]	; (801a5e0 <etharp_output+0x1ec>)
+ 801a414:	f001 fff0 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("q != NULL", q != NULL);
+ 801a418:	68bb      	ldr	r3, [r7, #8]
+ 801a41a:	2b00      	cmp	r3, #0
+ 801a41c:	d106      	bne.n	801a42c <etharp_output+0x38>
+ 801a41e:	4b6e      	ldr	r3, [pc, #440]	; (801a5d8 <etharp_output+0x1e4>)
+ 801a420:	f240 321f 	movw	r2, #799	; 0x31f
+ 801a424:	496f      	ldr	r1, [pc, #444]	; (801a5e4 <etharp_output+0x1f0>)
+ 801a426:	486e      	ldr	r0, [pc, #440]	; (801a5e0 <etharp_output+0x1ec>)
+ 801a428:	f001 ffe6 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("ipaddr != NULL", ipaddr != NULL);
+ 801a42c:	687b      	ldr	r3, [r7, #4]
+ 801a42e:	2b00      	cmp	r3, #0
+ 801a430:	d106      	bne.n	801a440 <etharp_output+0x4c>
+ 801a432:	4b69      	ldr	r3, [pc, #420]	; (801a5d8 <etharp_output+0x1e4>)
+ 801a434:	f44f 7248 	mov.w	r2, #800	; 0x320
+ 801a438:	496b      	ldr	r1, [pc, #428]	; (801a5e8 <etharp_output+0x1f4>)
+ 801a43a:	4869      	ldr	r0, [pc, #420]	; (801a5e0 <etharp_output+0x1ec>)
+ 801a43c:	f001 ffdc 	bl	801c3f8 <iprintf>
+
+  /* Determine on destination hardware address. Broadcasts and multicasts
+   * are special, other IP addresses are looked up in the ARP table. */
+
+  /* broadcast destination IP address? */
+  if (ip4_addr_isbroadcast(ipaddr, netif)) {
+ 801a440:	687b      	ldr	r3, [r7, #4]
+ 801a442:	681b      	ldr	r3, [r3, #0]
+ 801a444:	68f9      	ldr	r1, [r7, #12]
+ 801a446:	4618      	mov	r0, r3
+ 801a448:	f000 ff14 	bl	801b274 <ip4_addr_isbroadcast_u32>
+ 801a44c:	4603      	mov	r3, r0
+ 801a44e:	2b00      	cmp	r3, #0
+ 801a450:	d002      	beq.n	801a458 <etharp_output+0x64>
+    /* broadcast on Ethernet also */
+    dest = (const struct eth_addr *)&ethbroadcast;
+ 801a452:	4b66      	ldr	r3, [pc, #408]	; (801a5ec <etharp_output+0x1f8>)
+ 801a454:	61fb      	str	r3, [r7, #28]
+ 801a456:	e0af      	b.n	801a5b8 <etharp_output+0x1c4>
+    /* multicast destination IP address? */
+  } else if (ip4_addr_ismulticast(ipaddr)) {
+ 801a458:	687b      	ldr	r3, [r7, #4]
+ 801a45a:	681b      	ldr	r3, [r3, #0]
+ 801a45c:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
+ 801a460:	2be0      	cmp	r3, #224	; 0xe0
+ 801a462:	d118      	bne.n	801a496 <etharp_output+0xa2>
+    /* Hash IP multicast address to MAC address.*/
+    mcastaddr.addr[0] = LL_IP4_MULTICAST_ADDR_0;
+ 801a464:	2301      	movs	r3, #1
+ 801a466:	743b      	strb	r3, [r7, #16]
+    mcastaddr.addr[1] = LL_IP4_MULTICAST_ADDR_1;
+ 801a468:	2300      	movs	r3, #0
+ 801a46a:	747b      	strb	r3, [r7, #17]
+    mcastaddr.addr[2] = LL_IP4_MULTICAST_ADDR_2;
+ 801a46c:	235e      	movs	r3, #94	; 0x5e
+ 801a46e:	74bb      	strb	r3, [r7, #18]
+    mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f;
+ 801a470:	687b      	ldr	r3, [r7, #4]
+ 801a472:	3301      	adds	r3, #1
+ 801a474:	781b      	ldrb	r3, [r3, #0]
+ 801a476:	f003 037f 	and.w	r3, r3, #127	; 0x7f
+ 801a47a:	b2db      	uxtb	r3, r3
+ 801a47c:	74fb      	strb	r3, [r7, #19]
+    mcastaddr.addr[4] = ip4_addr3(ipaddr);
+ 801a47e:	687b      	ldr	r3, [r7, #4]
+ 801a480:	3302      	adds	r3, #2
+ 801a482:	781b      	ldrb	r3, [r3, #0]
+ 801a484:	753b      	strb	r3, [r7, #20]
+    mcastaddr.addr[5] = ip4_addr4(ipaddr);
+ 801a486:	687b      	ldr	r3, [r7, #4]
+ 801a488:	3303      	adds	r3, #3
+ 801a48a:	781b      	ldrb	r3, [r3, #0]
+ 801a48c:	757b      	strb	r3, [r7, #21]
+    /* destination Ethernet address is multicast */
+    dest = &mcastaddr;
+ 801a48e:	f107 0310 	add.w	r3, r7, #16
+ 801a492:	61fb      	str	r3, [r7, #28]
+ 801a494:	e090      	b.n	801a5b8 <etharp_output+0x1c4>
+    /* unicast destination IP address? */
+  } else {
+    netif_addr_idx_t i;
+    /* outside local network? if so, this can neither be a global broadcast nor
+       a subnet broadcast. */
+    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
+ 801a496:	687b      	ldr	r3, [r7, #4]
+ 801a498:	681a      	ldr	r2, [r3, #0]
+ 801a49a:	68fb      	ldr	r3, [r7, #12]
+ 801a49c:	3304      	adds	r3, #4
+ 801a49e:	681b      	ldr	r3, [r3, #0]
+ 801a4a0:	405a      	eors	r2, r3
+ 801a4a2:	68fb      	ldr	r3, [r7, #12]
+ 801a4a4:	3308      	adds	r3, #8
+ 801a4a6:	681b      	ldr	r3, [r3, #0]
+ 801a4a8:	4013      	ands	r3, r2
+ 801a4aa:	2b00      	cmp	r3, #0
+ 801a4ac:	d012      	beq.n	801a4d4 <etharp_output+0xe0>
+        !ip4_addr_islinklocal(ipaddr)) {
+ 801a4ae:	687b      	ldr	r3, [r7, #4]
+ 801a4b0:	681b      	ldr	r3, [r3, #0]
+ 801a4b2:	b29b      	uxth	r3, r3
+    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
+ 801a4b4:	f64f 62a9 	movw	r2, #65193	; 0xfea9
+ 801a4b8:	4293      	cmp	r3, r2
+ 801a4ba:	d00b      	beq.n	801a4d4 <etharp_output+0xe0>
+        dst_addr = LWIP_HOOK_ETHARP_GET_GW(netif, ipaddr);
+        if (dst_addr == NULL)
+#endif /* LWIP_HOOK_ETHARP_GET_GW */
+        {
+          /* interface has default gateway? */
+          if (!ip4_addr_isany_val(*netif_ip4_gw(netif))) {
+ 801a4bc:	68fb      	ldr	r3, [r7, #12]
+ 801a4be:	330c      	adds	r3, #12
+ 801a4c0:	681b      	ldr	r3, [r3, #0]
+ 801a4c2:	2b00      	cmp	r3, #0
+ 801a4c4:	d003      	beq.n	801a4ce <etharp_output+0xda>
+            /* send to hardware address of default gateway IP address */
+            dst_addr = netif_ip4_gw(netif);
+ 801a4c6:	68fb      	ldr	r3, [r7, #12]
+ 801a4c8:	330c      	adds	r3, #12
+ 801a4ca:	61bb      	str	r3, [r7, #24]
+ 801a4cc:	e002      	b.n	801a4d4 <etharp_output+0xe0>
+            /* no default gateway available */
+          } else {
+            /* no route to destination error (default gateway missing) */
+            return ERR_RTE;
+ 801a4ce:	f06f 0303 	mvn.w	r3, #3
+ 801a4d2:	e07d      	b.n	801a5d0 <etharp_output+0x1dc>
+    if (netif->hints != NULL) {
+      /* per-pcb cached entry was given */
+      netif_addr_idx_t etharp_cached_entry = netif->hints->addr_hint;
+      if (etharp_cached_entry < ARP_TABLE_SIZE) {
+#endif /* LWIP_NETIF_HWADDRHINT */
+        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
+ 801a4d4:	4b46      	ldr	r3, [pc, #280]	; (801a5f0 <etharp_output+0x1fc>)
+ 801a4d6:	781b      	ldrb	r3, [r3, #0]
+ 801a4d8:	4619      	mov	r1, r3
+ 801a4da:	4a46      	ldr	r2, [pc, #280]	; (801a5f4 <etharp_output+0x200>)
+ 801a4dc:	460b      	mov	r3, r1
+ 801a4de:	005b      	lsls	r3, r3, #1
+ 801a4e0:	440b      	add	r3, r1
+ 801a4e2:	00db      	lsls	r3, r3, #3
+ 801a4e4:	4413      	add	r3, r2
+ 801a4e6:	3314      	adds	r3, #20
+ 801a4e8:	781b      	ldrb	r3, [r3, #0]
+ 801a4ea:	2b01      	cmp	r3, #1
+ 801a4ec:	d925      	bls.n	801a53a <etharp_output+0x146>
+#if ETHARP_TABLE_MATCH_NETIF
+            (arp_table[etharp_cached_entry].netif == netif) &&
+ 801a4ee:	4b40      	ldr	r3, [pc, #256]	; (801a5f0 <etharp_output+0x1fc>)
+ 801a4f0:	781b      	ldrb	r3, [r3, #0]
+ 801a4f2:	4619      	mov	r1, r3
+ 801a4f4:	4a3f      	ldr	r2, [pc, #252]	; (801a5f4 <etharp_output+0x200>)
+ 801a4f6:	460b      	mov	r3, r1
+ 801a4f8:	005b      	lsls	r3, r3, #1
+ 801a4fa:	440b      	add	r3, r1
+ 801a4fc:	00db      	lsls	r3, r3, #3
+ 801a4fe:	4413      	add	r3, r2
+ 801a500:	3308      	adds	r3, #8
+ 801a502:	681b      	ldr	r3, [r3, #0]
+        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
+ 801a504:	68fa      	ldr	r2, [r7, #12]
+ 801a506:	429a      	cmp	r2, r3
+ 801a508:	d117      	bne.n	801a53a <etharp_output+0x146>
+#endif
+            (ip4_addr_cmp(dst_addr, &arp_table[etharp_cached_entry].ipaddr))) {
+ 801a50a:	69bb      	ldr	r3, [r7, #24]
+ 801a50c:	681a      	ldr	r2, [r3, #0]
+ 801a50e:	4b38      	ldr	r3, [pc, #224]	; (801a5f0 <etharp_output+0x1fc>)
+ 801a510:	781b      	ldrb	r3, [r3, #0]
+ 801a512:	4618      	mov	r0, r3
+ 801a514:	4937      	ldr	r1, [pc, #220]	; (801a5f4 <etharp_output+0x200>)
+ 801a516:	4603      	mov	r3, r0
+ 801a518:	005b      	lsls	r3, r3, #1
+ 801a51a:	4403      	add	r3, r0
+ 801a51c:	00db      	lsls	r3, r3, #3
+ 801a51e:	440b      	add	r3, r1
+ 801a520:	3304      	adds	r3, #4
+ 801a522:	681b      	ldr	r3, [r3, #0]
+            (arp_table[etharp_cached_entry].netif == netif) &&
+ 801a524:	429a      	cmp	r2, r3
+ 801a526:	d108      	bne.n	801a53a <etharp_output+0x146>
+          /* the per-pcb-cached entry is stable and the right one! */
+          ETHARP_STATS_INC(etharp.cachehit);
+          return etharp_output_to_arp_index(netif, q, etharp_cached_entry);
+ 801a528:	4b31      	ldr	r3, [pc, #196]	; (801a5f0 <etharp_output+0x1fc>)
+ 801a52a:	781b      	ldrb	r3, [r3, #0]
+ 801a52c:	461a      	mov	r2, r3
+ 801a52e:	68b9      	ldr	r1, [r7, #8]
+ 801a530:	68f8      	ldr	r0, [r7, #12]
+ 801a532:	f7ff fec5 	bl	801a2c0 <etharp_output_to_arp_index>
+ 801a536:	4603      	mov	r3, r0
+ 801a538:	e04a      	b.n	801a5d0 <etharp_output+0x1dc>
+    }
+#endif /* LWIP_NETIF_HWADDRHINT */
+
+    /* find stable entry: do this here since this is a critical path for
+       throughput and etharp_find_entry() is kind of slow */
+    for (i = 0; i < ARP_TABLE_SIZE; i++) {
+ 801a53a:	2300      	movs	r3, #0
+ 801a53c:	75fb      	strb	r3, [r7, #23]
+ 801a53e:	e031      	b.n	801a5a4 <etharp_output+0x1b0>
+      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
+ 801a540:	7dfa      	ldrb	r2, [r7, #23]
+ 801a542:	492c      	ldr	r1, [pc, #176]	; (801a5f4 <etharp_output+0x200>)
+ 801a544:	4613      	mov	r3, r2
+ 801a546:	005b      	lsls	r3, r3, #1
+ 801a548:	4413      	add	r3, r2
+ 801a54a:	00db      	lsls	r3, r3, #3
+ 801a54c:	440b      	add	r3, r1
+ 801a54e:	3314      	adds	r3, #20
+ 801a550:	781b      	ldrb	r3, [r3, #0]
+ 801a552:	2b01      	cmp	r3, #1
+ 801a554:	d923      	bls.n	801a59e <etharp_output+0x1aa>
+#if ETHARP_TABLE_MATCH_NETIF
+          (arp_table[i].netif == netif) &&
+ 801a556:	7dfa      	ldrb	r2, [r7, #23]
+ 801a558:	4926      	ldr	r1, [pc, #152]	; (801a5f4 <etharp_output+0x200>)
+ 801a55a:	4613      	mov	r3, r2
+ 801a55c:	005b      	lsls	r3, r3, #1
+ 801a55e:	4413      	add	r3, r2
+ 801a560:	00db      	lsls	r3, r3, #3
+ 801a562:	440b      	add	r3, r1
+ 801a564:	3308      	adds	r3, #8
+ 801a566:	681b      	ldr	r3, [r3, #0]
+      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
+ 801a568:	68fa      	ldr	r2, [r7, #12]
+ 801a56a:	429a      	cmp	r2, r3
+ 801a56c:	d117      	bne.n	801a59e <etharp_output+0x1aa>
+#endif
+          (ip4_addr_cmp(dst_addr, &arp_table[i].ipaddr))) {
+ 801a56e:	69bb      	ldr	r3, [r7, #24]
+ 801a570:	6819      	ldr	r1, [r3, #0]
+ 801a572:	7dfa      	ldrb	r2, [r7, #23]
+ 801a574:	481f      	ldr	r0, [pc, #124]	; (801a5f4 <etharp_output+0x200>)
+ 801a576:	4613      	mov	r3, r2
+ 801a578:	005b      	lsls	r3, r3, #1
+ 801a57a:	4413      	add	r3, r2
+ 801a57c:	00db      	lsls	r3, r3, #3
+ 801a57e:	4403      	add	r3, r0
+ 801a580:	3304      	adds	r3, #4
+ 801a582:	681b      	ldr	r3, [r3, #0]
+          (arp_table[i].netif == netif) &&
+ 801a584:	4299      	cmp	r1, r3
+ 801a586:	d10a      	bne.n	801a59e <etharp_output+0x1aa>
+        /* found an existing, stable entry */
+        ETHARP_SET_ADDRHINT(netif, i);
+ 801a588:	4a19      	ldr	r2, [pc, #100]	; (801a5f0 <etharp_output+0x1fc>)
+ 801a58a:	7dfb      	ldrb	r3, [r7, #23]
+ 801a58c:	7013      	strb	r3, [r2, #0]
+        return etharp_output_to_arp_index(netif, q, i);
+ 801a58e:	7dfb      	ldrb	r3, [r7, #23]
+ 801a590:	461a      	mov	r2, r3
+ 801a592:	68b9      	ldr	r1, [r7, #8]
+ 801a594:	68f8      	ldr	r0, [r7, #12]
+ 801a596:	f7ff fe93 	bl	801a2c0 <etharp_output_to_arp_index>
+ 801a59a:	4603      	mov	r3, r0
+ 801a59c:	e018      	b.n	801a5d0 <etharp_output+0x1dc>
+    for (i = 0; i < ARP_TABLE_SIZE; i++) {
+ 801a59e:	7dfb      	ldrb	r3, [r7, #23]
+ 801a5a0:	3301      	adds	r3, #1
+ 801a5a2:	75fb      	strb	r3, [r7, #23]
+ 801a5a4:	7dfb      	ldrb	r3, [r7, #23]
+ 801a5a6:	2b09      	cmp	r3, #9
+ 801a5a8:	d9ca      	bls.n	801a540 <etharp_output+0x14c>
+      }
+    }
+    /* no stable entry found, use the (slower) query function:
+       queue on destination Ethernet address belonging to ipaddr */
+    return etharp_query(netif, dst_addr, q);
+ 801a5aa:	68ba      	ldr	r2, [r7, #8]
+ 801a5ac:	69b9      	ldr	r1, [r7, #24]
+ 801a5ae:	68f8      	ldr	r0, [r7, #12]
+ 801a5b0:	f000 f822 	bl	801a5f8 <etharp_query>
+ 801a5b4:	4603      	mov	r3, r0
+ 801a5b6:	e00b      	b.n	801a5d0 <etharp_output+0x1dc>
+  }
+
+  /* continuation for multicast/broadcast destinations */
+  /* obtain source Ethernet address of the given interface */
+  /* send packet directly on the link */
+  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), dest, ETHTYPE_IP);
+ 801a5b8:	68fb      	ldr	r3, [r7, #12]
+ 801a5ba:	f103 022a 	add.w	r2, r3, #42	; 0x2a
+ 801a5be:	f44f 6300 	mov.w	r3, #2048	; 0x800
+ 801a5c2:	9300      	str	r3, [sp, #0]
+ 801a5c4:	69fb      	ldr	r3, [r7, #28]
+ 801a5c6:	68b9      	ldr	r1, [r7, #8]
+ 801a5c8:	68f8      	ldr	r0, [r7, #12]
+ 801a5ca:	f001 fd57 	bl	801c07c <ethernet_output>
+ 801a5ce:	4603      	mov	r3, r0
+}
+ 801a5d0:	4618      	mov	r0, r3
+ 801a5d2:	3720      	adds	r7, #32
+ 801a5d4:	46bd      	mov	sp, r7
+ 801a5d6:	bd80      	pop	{r7, pc}
+ 801a5d8:	0801fe68 	.word	0x0801fe68
+ 801a5dc:	0801ffb8 	.word	0x0801ffb8
+ 801a5e0:	0801fee0 	.word	0x0801fee0
+ 801a5e4:	08020008 	.word	0x08020008
+ 801a5e8:	0801ffa8 	.word	0x0801ffa8
+ 801a5ec:	080225a0 	.word	0x080225a0
+ 801a5f0:	20008854 	.word	0x20008854
+ 801a5f4:	20008764 	.word	0x20008764
+
+0801a5f8 <etharp_query>:
+ * - ERR_ARG Non-unicast address given, those will not appear in ARP cache.
+ *
+ */
+err_t
+etharp_query(struct netif *netif, const ip4_addr_t *ipaddr, struct pbuf *q)
+{
+ 801a5f8:	b580      	push	{r7, lr}
+ 801a5fa:	b08c      	sub	sp, #48	; 0x30
+ 801a5fc:	af02      	add	r7, sp, #8
+ 801a5fe:	60f8      	str	r0, [r7, #12]
+ 801a600:	60b9      	str	r1, [r7, #8]
+ 801a602:	607a      	str	r2, [r7, #4]
+  struct eth_addr *srcaddr = (struct eth_addr *)netif->hwaddr;
+ 801a604:	68fb      	ldr	r3, [r7, #12]
+ 801a606:	332a      	adds	r3, #42	; 0x2a
+ 801a608:	617b      	str	r3, [r7, #20]
+  err_t result = ERR_MEM;
+ 801a60a:	23ff      	movs	r3, #255	; 0xff
+ 801a60c:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+  int is_new_entry = 0;
+ 801a610:	2300      	movs	r3, #0
+ 801a612:	623b      	str	r3, [r7, #32]
+  s16_t i_err;
+  netif_addr_idx_t i;
+
+  /* non-unicast address? */
+  if (ip4_addr_isbroadcast(ipaddr, netif) ||
+ 801a614:	68bb      	ldr	r3, [r7, #8]
+ 801a616:	681b      	ldr	r3, [r3, #0]
+ 801a618:	68f9      	ldr	r1, [r7, #12]
+ 801a61a:	4618      	mov	r0, r3
+ 801a61c:	f000 fe2a 	bl	801b274 <ip4_addr_isbroadcast_u32>
+ 801a620:	4603      	mov	r3, r0
+ 801a622:	2b00      	cmp	r3, #0
+ 801a624:	d10c      	bne.n	801a640 <etharp_query+0x48>
+      ip4_addr_ismulticast(ipaddr) ||
+ 801a626:	68bb      	ldr	r3, [r7, #8]
+ 801a628:	681b      	ldr	r3, [r3, #0]
+ 801a62a:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
+  if (ip4_addr_isbroadcast(ipaddr, netif) ||
+ 801a62e:	2be0      	cmp	r3, #224	; 0xe0
+ 801a630:	d006      	beq.n	801a640 <etharp_query+0x48>
+      ip4_addr_ismulticast(ipaddr) ||
+ 801a632:	68bb      	ldr	r3, [r7, #8]
+ 801a634:	2b00      	cmp	r3, #0
+ 801a636:	d003      	beq.n	801a640 <etharp_query+0x48>
+      ip4_addr_isany(ipaddr)) {
+ 801a638:	68bb      	ldr	r3, [r7, #8]
+ 801a63a:	681b      	ldr	r3, [r3, #0]
+ 801a63c:	2b00      	cmp	r3, #0
+ 801a63e:	d102      	bne.n	801a646 <etharp_query+0x4e>
+    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n"));
+    return ERR_ARG;
+ 801a640:	f06f 030f 	mvn.w	r3, #15
+ 801a644:	e102      	b.n	801a84c <etharp_query+0x254>
+  }
+
+  /* find entry in ARP cache, ask to create entry if queueing packet */
+  i_err = etharp_find_entry(ipaddr, ETHARP_FLAG_TRY_HARD, netif);
+ 801a646:	68fa      	ldr	r2, [r7, #12]
+ 801a648:	2101      	movs	r1, #1
+ 801a64a:	68b8      	ldr	r0, [r7, #8]
+ 801a64c:	f7ff fb5c 	bl	8019d08 <etharp_find_entry>
+ 801a650:	4603      	mov	r3, r0
+ 801a652:	827b      	strh	r3, [r7, #18]
+
+  /* could not find or create entry? */
+  if (i_err < 0) {
+ 801a654:	f9b7 3012 	ldrsh.w	r3, [r7, #18]
+ 801a658:	2b00      	cmp	r3, #0
+ 801a65a:	da02      	bge.n	801a662 <etharp_query+0x6a>
+    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n"));
+    if (q) {
+      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n"));
+      ETHARP_STATS_INC(etharp.memerr);
+    }
+    return (err_t)i_err;
+ 801a65c:	8a7b      	ldrh	r3, [r7, #18]
+ 801a65e:	b25b      	sxtb	r3, r3
+ 801a660:	e0f4      	b.n	801a84c <etharp_query+0x254>
+  }
+  LWIP_ASSERT("type overflow", (size_t)i_err < NETIF_ADDR_IDX_MAX);
+ 801a662:	8a7b      	ldrh	r3, [r7, #18]
+ 801a664:	2b7e      	cmp	r3, #126	; 0x7e
+ 801a666:	d906      	bls.n	801a676 <etharp_query+0x7e>
+ 801a668:	4b7a      	ldr	r3, [pc, #488]	; (801a854 <etharp_query+0x25c>)
+ 801a66a:	f240 32c1 	movw	r2, #961	; 0x3c1
+ 801a66e:	497a      	ldr	r1, [pc, #488]	; (801a858 <etharp_query+0x260>)
+ 801a670:	487a      	ldr	r0, [pc, #488]	; (801a85c <etharp_query+0x264>)
+ 801a672:	f001 fec1 	bl	801c3f8 <iprintf>
+  i = (netif_addr_idx_t)i_err;
+ 801a676:	8a7b      	ldrh	r3, [r7, #18]
+ 801a678:	747b      	strb	r3, [r7, #17]
+
+  /* mark a fresh entry as pending (we just sent a request) */
+  if (arp_table[i].state == ETHARP_STATE_EMPTY) {
+ 801a67a:	7c7a      	ldrb	r2, [r7, #17]
+ 801a67c:	4978      	ldr	r1, [pc, #480]	; (801a860 <etharp_query+0x268>)
+ 801a67e:	4613      	mov	r3, r2
+ 801a680:	005b      	lsls	r3, r3, #1
+ 801a682:	4413      	add	r3, r2
+ 801a684:	00db      	lsls	r3, r3, #3
+ 801a686:	440b      	add	r3, r1
+ 801a688:	3314      	adds	r3, #20
+ 801a68a:	781b      	ldrb	r3, [r3, #0]
+ 801a68c:	2b00      	cmp	r3, #0
+ 801a68e:	d115      	bne.n	801a6bc <etharp_query+0xc4>
+    is_new_entry = 1;
+ 801a690:	2301      	movs	r3, #1
+ 801a692:	623b      	str	r3, [r7, #32]
+    arp_table[i].state = ETHARP_STATE_PENDING;
+ 801a694:	7c7a      	ldrb	r2, [r7, #17]
+ 801a696:	4972      	ldr	r1, [pc, #456]	; (801a860 <etharp_query+0x268>)
+ 801a698:	4613      	mov	r3, r2
+ 801a69a:	005b      	lsls	r3, r3, #1
+ 801a69c:	4413      	add	r3, r2
+ 801a69e:	00db      	lsls	r3, r3, #3
+ 801a6a0:	440b      	add	r3, r1
+ 801a6a2:	3314      	adds	r3, #20
+ 801a6a4:	2201      	movs	r2, #1
+ 801a6a6:	701a      	strb	r2, [r3, #0]
+    /* record network interface for re-sending arp request in etharp_tmr */
+    arp_table[i].netif = netif;
+ 801a6a8:	7c7a      	ldrb	r2, [r7, #17]
+ 801a6aa:	496d      	ldr	r1, [pc, #436]	; (801a860 <etharp_query+0x268>)
+ 801a6ac:	4613      	mov	r3, r2
+ 801a6ae:	005b      	lsls	r3, r3, #1
+ 801a6b0:	4413      	add	r3, r2
+ 801a6b2:	00db      	lsls	r3, r3, #3
+ 801a6b4:	440b      	add	r3, r1
+ 801a6b6:	3308      	adds	r3, #8
+ 801a6b8:	68fa      	ldr	r2, [r7, #12]
+ 801a6ba:	601a      	str	r2, [r3, #0]
+  }
+
+  /* { i is either a STABLE or (new or existing) PENDING entry } */
+  LWIP_ASSERT("arp_table[i].state == PENDING or STABLE",
+ 801a6bc:	7c7a      	ldrb	r2, [r7, #17]
+ 801a6be:	4968      	ldr	r1, [pc, #416]	; (801a860 <etharp_query+0x268>)
+ 801a6c0:	4613      	mov	r3, r2
+ 801a6c2:	005b      	lsls	r3, r3, #1
+ 801a6c4:	4413      	add	r3, r2
+ 801a6c6:	00db      	lsls	r3, r3, #3
+ 801a6c8:	440b      	add	r3, r1
+ 801a6ca:	3314      	adds	r3, #20
+ 801a6cc:	781b      	ldrb	r3, [r3, #0]
+ 801a6ce:	2b01      	cmp	r3, #1
+ 801a6d0:	d011      	beq.n	801a6f6 <etharp_query+0xfe>
+ 801a6d2:	7c7a      	ldrb	r2, [r7, #17]
+ 801a6d4:	4962      	ldr	r1, [pc, #392]	; (801a860 <etharp_query+0x268>)
+ 801a6d6:	4613      	mov	r3, r2
+ 801a6d8:	005b      	lsls	r3, r3, #1
+ 801a6da:	4413      	add	r3, r2
+ 801a6dc:	00db      	lsls	r3, r3, #3
+ 801a6de:	440b      	add	r3, r1
+ 801a6e0:	3314      	adds	r3, #20
+ 801a6e2:	781b      	ldrb	r3, [r3, #0]
+ 801a6e4:	2b01      	cmp	r3, #1
+ 801a6e6:	d806      	bhi.n	801a6f6 <etharp_query+0xfe>
+ 801a6e8:	4b5a      	ldr	r3, [pc, #360]	; (801a854 <etharp_query+0x25c>)
+ 801a6ea:	f240 32cf 	movw	r2, #975	; 0x3cf
+ 801a6ee:	495d      	ldr	r1, [pc, #372]	; (801a864 <etharp_query+0x26c>)
+ 801a6f0:	485a      	ldr	r0, [pc, #360]	; (801a85c <etharp_query+0x264>)
+ 801a6f2:	f001 fe81 	bl	801c3f8 <iprintf>
+              ((arp_table[i].state == ETHARP_STATE_PENDING) ||
+               (arp_table[i].state >= ETHARP_STATE_STABLE)));
+
+  /* do we have a new entry? or an implicit query request? */
+  if (is_new_entry || (q == NULL)) {
+ 801a6f6:	6a3b      	ldr	r3, [r7, #32]
+ 801a6f8:	2b00      	cmp	r3, #0
+ 801a6fa:	d102      	bne.n	801a702 <etharp_query+0x10a>
+ 801a6fc:	687b      	ldr	r3, [r7, #4]
+ 801a6fe:	2b00      	cmp	r3, #0
+ 801a700:	d10c      	bne.n	801a71c <etharp_query+0x124>
+    /* try to resolve it; send out ARP request */
+    result = etharp_request(netif, ipaddr);
+ 801a702:	68b9      	ldr	r1, [r7, #8]
+ 801a704:	68f8      	ldr	r0, [r7, #12]
+ 801a706:	f000 f963 	bl	801a9d0 <etharp_request>
+ 801a70a:	4603      	mov	r3, r0
+ 801a70c:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+      /* ARP request couldn't be sent */
+      /* We don't re-send arp request in etharp_tmr, but we still queue packets,
+         since this failure could be temporary, and the next packet calling
+         etharp_query again could lead to sending the queued packets. */
+    }
+    if (q == NULL) {
+ 801a710:	687b      	ldr	r3, [r7, #4]
+ 801a712:	2b00      	cmp	r3, #0
+ 801a714:	d102      	bne.n	801a71c <etharp_query+0x124>
+      return result;
+ 801a716:	f997 3027 	ldrsb.w	r3, [r7, #39]	; 0x27
+ 801a71a:	e097      	b.n	801a84c <etharp_query+0x254>
+    }
+  }
+
+  /* packet given? */
+  LWIP_ASSERT("q != NULL", q != NULL);
+ 801a71c:	687b      	ldr	r3, [r7, #4]
+ 801a71e:	2b00      	cmp	r3, #0
+ 801a720:	d106      	bne.n	801a730 <etharp_query+0x138>
+ 801a722:	4b4c      	ldr	r3, [pc, #304]	; (801a854 <etharp_query+0x25c>)
+ 801a724:	f240 32e1 	movw	r2, #993	; 0x3e1
+ 801a728:	494f      	ldr	r1, [pc, #316]	; (801a868 <etharp_query+0x270>)
+ 801a72a:	484c      	ldr	r0, [pc, #304]	; (801a85c <etharp_query+0x264>)
+ 801a72c:	f001 fe64 	bl	801c3f8 <iprintf>
+  /* stable entry? */
+  if (arp_table[i].state >= ETHARP_STATE_STABLE) {
+ 801a730:	7c7a      	ldrb	r2, [r7, #17]
+ 801a732:	494b      	ldr	r1, [pc, #300]	; (801a860 <etharp_query+0x268>)
+ 801a734:	4613      	mov	r3, r2
+ 801a736:	005b      	lsls	r3, r3, #1
+ 801a738:	4413      	add	r3, r2
+ 801a73a:	00db      	lsls	r3, r3, #3
+ 801a73c:	440b      	add	r3, r1
+ 801a73e:	3314      	adds	r3, #20
+ 801a740:	781b      	ldrb	r3, [r3, #0]
+ 801a742:	2b01      	cmp	r3, #1
+ 801a744:	d918      	bls.n	801a778 <etharp_query+0x180>
+    /* we have a valid IP->Ethernet address mapping */
+    ETHARP_SET_ADDRHINT(netif, i);
+ 801a746:	4a49      	ldr	r2, [pc, #292]	; (801a86c <etharp_query+0x274>)
+ 801a748:	7c7b      	ldrb	r3, [r7, #17]
+ 801a74a:	7013      	strb	r3, [r2, #0]
+    /* send the packet */
+    result = ethernet_output(netif, q, srcaddr, &(arp_table[i].ethaddr), ETHTYPE_IP);
+ 801a74c:	7c7a      	ldrb	r2, [r7, #17]
+ 801a74e:	4613      	mov	r3, r2
+ 801a750:	005b      	lsls	r3, r3, #1
+ 801a752:	4413      	add	r3, r2
+ 801a754:	00db      	lsls	r3, r3, #3
+ 801a756:	3308      	adds	r3, #8
+ 801a758:	4a41      	ldr	r2, [pc, #260]	; (801a860 <etharp_query+0x268>)
+ 801a75a:	4413      	add	r3, r2
+ 801a75c:	1d1a      	adds	r2, r3, #4
+ 801a75e:	f44f 6300 	mov.w	r3, #2048	; 0x800
+ 801a762:	9300      	str	r3, [sp, #0]
+ 801a764:	4613      	mov	r3, r2
+ 801a766:	697a      	ldr	r2, [r7, #20]
+ 801a768:	6879      	ldr	r1, [r7, #4]
+ 801a76a:	68f8      	ldr	r0, [r7, #12]
+ 801a76c:	f001 fc86 	bl	801c07c <ethernet_output>
+ 801a770:	4603      	mov	r3, r0
+ 801a772:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+ 801a776:	e067      	b.n	801a848 <etharp_query+0x250>
+    /* pending entry? (either just created or already pending */
+  } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
+ 801a778:	7c7a      	ldrb	r2, [r7, #17]
+ 801a77a:	4939      	ldr	r1, [pc, #228]	; (801a860 <etharp_query+0x268>)
+ 801a77c:	4613      	mov	r3, r2
+ 801a77e:	005b      	lsls	r3, r3, #1
+ 801a780:	4413      	add	r3, r2
+ 801a782:	00db      	lsls	r3, r3, #3
+ 801a784:	440b      	add	r3, r1
+ 801a786:	3314      	adds	r3, #20
+ 801a788:	781b      	ldrb	r3, [r3, #0]
+ 801a78a:	2b01      	cmp	r3, #1
+ 801a78c:	d15c      	bne.n	801a848 <etharp_query+0x250>
+    /* entry is still pending, queue the given packet 'q' */
+    struct pbuf *p;
+    int copy_needed = 0;
+ 801a78e:	2300      	movs	r3, #0
+ 801a790:	61bb      	str	r3, [r7, #24]
+    /* IF q includes a pbuf that must be copied, copy the whole chain into a
+     * new PBUF_RAM. See the definition of PBUF_NEEDS_COPY for details. */
+    p = q;
+ 801a792:	687b      	ldr	r3, [r7, #4]
+ 801a794:	61fb      	str	r3, [r7, #28]
+    while (p) {
+ 801a796:	e01c      	b.n	801a7d2 <etharp_query+0x1da>
+      LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0));
+ 801a798:	69fb      	ldr	r3, [r7, #28]
+ 801a79a:	895a      	ldrh	r2, [r3, #10]
+ 801a79c:	69fb      	ldr	r3, [r7, #28]
+ 801a79e:	891b      	ldrh	r3, [r3, #8]
+ 801a7a0:	429a      	cmp	r2, r3
+ 801a7a2:	d10a      	bne.n	801a7ba <etharp_query+0x1c2>
+ 801a7a4:	69fb      	ldr	r3, [r7, #28]
+ 801a7a6:	681b      	ldr	r3, [r3, #0]
+ 801a7a8:	2b00      	cmp	r3, #0
+ 801a7aa:	d006      	beq.n	801a7ba <etharp_query+0x1c2>
+ 801a7ac:	4b29      	ldr	r3, [pc, #164]	; (801a854 <etharp_query+0x25c>)
+ 801a7ae:	f240 32f1 	movw	r2, #1009	; 0x3f1
+ 801a7b2:	492f      	ldr	r1, [pc, #188]	; (801a870 <etharp_query+0x278>)
+ 801a7b4:	4829      	ldr	r0, [pc, #164]	; (801a85c <etharp_query+0x264>)
+ 801a7b6:	f001 fe1f 	bl	801c3f8 <iprintf>
+      if (PBUF_NEEDS_COPY(p)) {
+ 801a7ba:	69fb      	ldr	r3, [r7, #28]
+ 801a7bc:	7b1b      	ldrb	r3, [r3, #12]
+ 801a7be:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 801a7c2:	2b00      	cmp	r3, #0
+ 801a7c4:	d002      	beq.n	801a7cc <etharp_query+0x1d4>
+        copy_needed = 1;
+ 801a7c6:	2301      	movs	r3, #1
+ 801a7c8:	61bb      	str	r3, [r7, #24]
+        break;
+ 801a7ca:	e005      	b.n	801a7d8 <etharp_query+0x1e0>
+      }
+      p = p->next;
+ 801a7cc:	69fb      	ldr	r3, [r7, #28]
+ 801a7ce:	681b      	ldr	r3, [r3, #0]
+ 801a7d0:	61fb      	str	r3, [r7, #28]
+    while (p) {
+ 801a7d2:	69fb      	ldr	r3, [r7, #28]
+ 801a7d4:	2b00      	cmp	r3, #0
+ 801a7d6:	d1df      	bne.n	801a798 <etharp_query+0x1a0>
+    }
+    if (copy_needed) {
+ 801a7d8:	69bb      	ldr	r3, [r7, #24]
+ 801a7da:	2b00      	cmp	r3, #0
+ 801a7dc:	d007      	beq.n	801a7ee <etharp_query+0x1f6>
+      /* copy the whole packet into new pbufs */
+      p = pbuf_clone(PBUF_LINK, PBUF_RAM, q);
+ 801a7de:	687a      	ldr	r2, [r7, #4]
+ 801a7e0:	f44f 7120 	mov.w	r1, #640	; 0x280
+ 801a7e4:	200e      	movs	r0, #14
+ 801a7e6:	f7f7 fb4f 	bl	8011e88 <pbuf_clone>
+ 801a7ea:	61f8      	str	r0, [r7, #28]
+ 801a7ec:	e004      	b.n	801a7f8 <etharp_query+0x200>
+    } else {
+      /* referencing the old pbuf is enough */
+      p = q;
+ 801a7ee:	687b      	ldr	r3, [r7, #4]
+ 801a7f0:	61fb      	str	r3, [r7, #28]
+      pbuf_ref(p);
+ 801a7f2:	69f8      	ldr	r0, [r7, #28]
+ 801a7f4:	f7f7 f976 	bl	8011ae4 <pbuf_ref>
+    }
+    /* packet could be taken over? */
+    if (p != NULL) {
+ 801a7f8:	69fb      	ldr	r3, [r7, #28]
+ 801a7fa:	2b00      	cmp	r3, #0
+ 801a7fc:	d021      	beq.n	801a842 <etharp_query+0x24a>
+        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
+        result = ERR_MEM;
+      }
+#else /* ARP_QUEUEING */
+      /* always queue one packet per ARP request only, freeing a previously queued packet */
+      if (arp_table[i].q != NULL) {
+ 801a7fe:	7c7a      	ldrb	r2, [r7, #17]
+ 801a800:	4917      	ldr	r1, [pc, #92]	; (801a860 <etharp_query+0x268>)
+ 801a802:	4613      	mov	r3, r2
+ 801a804:	005b      	lsls	r3, r3, #1
+ 801a806:	4413      	add	r3, r2
+ 801a808:	00db      	lsls	r3, r3, #3
+ 801a80a:	440b      	add	r3, r1
+ 801a80c:	681b      	ldr	r3, [r3, #0]
+ 801a80e:	2b00      	cmp	r3, #0
+ 801a810:	d00a      	beq.n	801a828 <etharp_query+0x230>
+        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: dropped previously queued packet %p for ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
+        pbuf_free(arp_table[i].q);
+ 801a812:	7c7a      	ldrb	r2, [r7, #17]
+ 801a814:	4912      	ldr	r1, [pc, #72]	; (801a860 <etharp_query+0x268>)
+ 801a816:	4613      	mov	r3, r2
+ 801a818:	005b      	lsls	r3, r3, #1
+ 801a81a:	4413      	add	r3, r2
+ 801a81c:	00db      	lsls	r3, r3, #3
+ 801a81e:	440b      	add	r3, r1
+ 801a820:	681b      	ldr	r3, [r3, #0]
+ 801a822:	4618      	mov	r0, r3
+ 801a824:	f7f7 f8b8 	bl	8011998 <pbuf_free>
+      }
+      arp_table[i].q = p;
+ 801a828:	7c7a      	ldrb	r2, [r7, #17]
+ 801a82a:	490d      	ldr	r1, [pc, #52]	; (801a860 <etharp_query+0x268>)
+ 801a82c:	4613      	mov	r3, r2
+ 801a82e:	005b      	lsls	r3, r3, #1
+ 801a830:	4413      	add	r3, r2
+ 801a832:	00db      	lsls	r3, r3, #3
+ 801a834:	440b      	add	r3, r1
+ 801a836:	69fa      	ldr	r2, [r7, #28]
+ 801a838:	601a      	str	r2, [r3, #0]
+      result = ERR_OK;
+ 801a83a:	2300      	movs	r3, #0
+ 801a83c:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+ 801a840:	e002      	b.n	801a848 <etharp_query+0x250>
+      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
+#endif /* ARP_QUEUEING */
+    } else {
+      ETHARP_STATS_INC(etharp.memerr);
+      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
+      result = ERR_MEM;
+ 801a842:	23ff      	movs	r3, #255	; 0xff
+ 801a844:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
+    }
+  }
+  return result;
+ 801a848:	f997 3027 	ldrsb.w	r3, [r7, #39]	; 0x27
+}
+ 801a84c:	4618      	mov	r0, r3
+ 801a84e:	3728      	adds	r7, #40	; 0x28
+ 801a850:	46bd      	mov	sp, r7
+ 801a852:	bd80      	pop	{r7, pc}
+ 801a854:	0801fe68 	.word	0x0801fe68
+ 801a858:	08020014 	.word	0x08020014
+ 801a85c:	0801fee0 	.word	0x0801fee0
+ 801a860:	20008764 	.word	0x20008764
+ 801a864:	08020024 	.word	0x08020024
+ 801a868:	08020008 	.word	0x08020008
+ 801a86c:	20008854 	.word	0x20008854
+ 801a870:	0802004c 	.word	0x0802004c
+
+0801a874 <etharp_raw>:
+etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr,
+           const struct eth_addr *ethdst_addr,
+           const struct eth_addr *hwsrc_addr, const ip4_addr_t *ipsrc_addr,
+           const struct eth_addr *hwdst_addr, const ip4_addr_t *ipdst_addr,
+           const u16_t opcode)
+{
+ 801a874:	b580      	push	{r7, lr}
+ 801a876:	b08a      	sub	sp, #40	; 0x28
+ 801a878:	af02      	add	r7, sp, #8
+ 801a87a:	60f8      	str	r0, [r7, #12]
+ 801a87c:	60b9      	str	r1, [r7, #8]
+ 801a87e:	607a      	str	r2, [r7, #4]
+ 801a880:	603b      	str	r3, [r7, #0]
+  struct pbuf *p;
+  err_t result = ERR_OK;
+ 801a882:	2300      	movs	r3, #0
+ 801a884:	77fb      	strb	r3, [r7, #31]
+  struct etharp_hdr *hdr;
+
+  LWIP_ASSERT("netif != NULL", netif != NULL);
+ 801a886:	68fb      	ldr	r3, [r7, #12]
+ 801a888:	2b00      	cmp	r3, #0
+ 801a88a:	d106      	bne.n	801a89a <etharp_raw+0x26>
+ 801a88c:	4b3a      	ldr	r3, [pc, #232]	; (801a978 <etharp_raw+0x104>)
+ 801a88e:	f240 4257 	movw	r2, #1111	; 0x457
+ 801a892:	493a      	ldr	r1, [pc, #232]	; (801a97c <etharp_raw+0x108>)
+ 801a894:	483a      	ldr	r0, [pc, #232]	; (801a980 <etharp_raw+0x10c>)
+ 801a896:	f001 fdaf 	bl	801c3f8 <iprintf>
+
+  /* allocate a pbuf for the outgoing ARP request packet */
+  p = pbuf_alloc(PBUF_LINK, SIZEOF_ETHARP_HDR, PBUF_RAM);
+ 801a89a:	f44f 7220 	mov.w	r2, #640	; 0x280
+ 801a89e:	211c      	movs	r1, #28
+ 801a8a0:	200e      	movs	r0, #14
+ 801a8a2:	f7f6 fd99 	bl	80113d8 <pbuf_alloc>
+ 801a8a6:	61b8      	str	r0, [r7, #24]
+  /* could allocate a pbuf for an ARP request? */
+  if (p == NULL) {
+ 801a8a8:	69bb      	ldr	r3, [r7, #24]
+ 801a8aa:	2b00      	cmp	r3, #0
+ 801a8ac:	d102      	bne.n	801a8b4 <etharp_raw+0x40>
+    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
+                ("etharp_raw: could not allocate pbuf for ARP request.\n"));
+    ETHARP_STATS_INC(etharp.memerr);
+    return ERR_MEM;
+ 801a8ae:	f04f 33ff 	mov.w	r3, #4294967295
+ 801a8b2:	e05d      	b.n	801a970 <etharp_raw+0xfc>
+  }
+  LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr",
+ 801a8b4:	69bb      	ldr	r3, [r7, #24]
+ 801a8b6:	895b      	ldrh	r3, [r3, #10]
+ 801a8b8:	2b1b      	cmp	r3, #27
+ 801a8ba:	d806      	bhi.n	801a8ca <etharp_raw+0x56>
+ 801a8bc:	4b2e      	ldr	r3, [pc, #184]	; (801a978 <etharp_raw+0x104>)
+ 801a8be:	f240 4263 	movw	r2, #1123	; 0x463
+ 801a8c2:	4930      	ldr	r1, [pc, #192]	; (801a984 <etharp_raw+0x110>)
+ 801a8c4:	482e      	ldr	r0, [pc, #184]	; (801a980 <etharp_raw+0x10c>)
+ 801a8c6:	f001 fd97 	bl	801c3f8 <iprintf>
+              (p->len >= SIZEOF_ETHARP_HDR));
+
+  hdr = (struct etharp_hdr *)p->payload;
+ 801a8ca:	69bb      	ldr	r3, [r7, #24]
+ 801a8cc:	685b      	ldr	r3, [r3, #4]
+ 801a8ce:	617b      	str	r3, [r7, #20]
+  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n"));
+  hdr->opcode = lwip_htons(opcode);
+ 801a8d0:	8ebb      	ldrh	r3, [r7, #52]	; 0x34
+ 801a8d2:	4618      	mov	r0, r3
+ 801a8d4:	f7f5 fcac 	bl	8010230 <lwip_htons>
+ 801a8d8:	4603      	mov	r3, r0
+ 801a8da:	461a      	mov	r2, r3
+ 801a8dc:	697b      	ldr	r3, [r7, #20]
+ 801a8de:	80da      	strh	r2, [r3, #6]
+
+  LWIP_ASSERT("netif->hwaddr_len must be the same as ETH_HWADDR_LEN for etharp!",
+ 801a8e0:	68fb      	ldr	r3, [r7, #12]
+ 801a8e2:	f893 3030 	ldrb.w	r3, [r3, #48]	; 0x30
+ 801a8e6:	2b06      	cmp	r3, #6
+ 801a8e8:	d006      	beq.n	801a8f8 <etharp_raw+0x84>
+ 801a8ea:	4b23      	ldr	r3, [pc, #140]	; (801a978 <etharp_raw+0x104>)
+ 801a8ec:	f240 426a 	movw	r2, #1130	; 0x46a
+ 801a8f0:	4925      	ldr	r1, [pc, #148]	; (801a988 <etharp_raw+0x114>)
+ 801a8f2:	4823      	ldr	r0, [pc, #140]	; (801a980 <etharp_raw+0x10c>)
+ 801a8f4:	f001 fd80 	bl	801c3f8 <iprintf>
+              (netif->hwaddr_len == ETH_HWADDR_LEN));
+
+  /* Write the ARP MAC-Addresses */
+  SMEMCPY(&hdr->shwaddr, hwsrc_addr, ETH_HWADDR_LEN);
+ 801a8f8:	697b      	ldr	r3, [r7, #20]
+ 801a8fa:	3308      	adds	r3, #8
+ 801a8fc:	2206      	movs	r2, #6
+ 801a8fe:	6839      	ldr	r1, [r7, #0]
+ 801a900:	4618      	mov	r0, r3
+ 801a902:	f001 fd4c 	bl	801c39e <memcpy>
+  SMEMCPY(&hdr->dhwaddr, hwdst_addr, ETH_HWADDR_LEN);
+ 801a906:	697b      	ldr	r3, [r7, #20]
+ 801a908:	3312      	adds	r3, #18
+ 801a90a:	2206      	movs	r2, #6
+ 801a90c:	6af9      	ldr	r1, [r7, #44]	; 0x2c
+ 801a90e:	4618      	mov	r0, r3
+ 801a910:	f001 fd45 	bl	801c39e <memcpy>
+  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
+   * structure packing. */
+  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->sipaddr, ipsrc_addr);
+ 801a914:	697b      	ldr	r3, [r7, #20]
+ 801a916:	330e      	adds	r3, #14
+ 801a918:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 801a91a:	6812      	ldr	r2, [r2, #0]
+ 801a91c:	601a      	str	r2, [r3, #0]
+  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->dipaddr, ipdst_addr);
+ 801a91e:	697b      	ldr	r3, [r7, #20]
+ 801a920:	3318      	adds	r3, #24
+ 801a922:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 801a924:	6812      	ldr	r2, [r2, #0]
+ 801a926:	601a      	str	r2, [r3, #0]
+
+  hdr->hwtype = PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET);
+ 801a928:	697b      	ldr	r3, [r7, #20]
+ 801a92a:	2200      	movs	r2, #0
+ 801a92c:	701a      	strb	r2, [r3, #0]
+ 801a92e:	2200      	movs	r2, #0
+ 801a930:	f042 0201 	orr.w	r2, r2, #1
+ 801a934:	705a      	strb	r2, [r3, #1]
+  hdr->proto = PP_HTONS(ETHTYPE_IP);
+ 801a936:	697b      	ldr	r3, [r7, #20]
+ 801a938:	2200      	movs	r2, #0
+ 801a93a:	f042 0208 	orr.w	r2, r2, #8
+ 801a93e:	709a      	strb	r2, [r3, #2]
+ 801a940:	2200      	movs	r2, #0
+ 801a942:	70da      	strb	r2, [r3, #3]
+  /* set hwlen and protolen */
+  hdr->hwlen = ETH_HWADDR_LEN;
+ 801a944:	697b      	ldr	r3, [r7, #20]
+ 801a946:	2206      	movs	r2, #6
+ 801a948:	711a      	strb	r2, [r3, #4]
+  hdr->protolen = sizeof(ip4_addr_t);
+ 801a94a:	697b      	ldr	r3, [r7, #20]
+ 801a94c:	2204      	movs	r2, #4
+ 801a94e:	715a      	strb	r2, [r3, #5]
+  if (ip4_addr_islinklocal(ipsrc_addr)) {
+    ethernet_output(netif, p, ethsrc_addr, &ethbroadcast, ETHTYPE_ARP);
+  } else
+#endif /* LWIP_AUTOIP */
+  {
+    ethernet_output(netif, p, ethsrc_addr, ethdst_addr, ETHTYPE_ARP);
+ 801a950:	f640 0306 	movw	r3, #2054	; 0x806
+ 801a954:	9300      	str	r3, [sp, #0]
+ 801a956:	687b      	ldr	r3, [r7, #4]
+ 801a958:	68ba      	ldr	r2, [r7, #8]
+ 801a95a:	69b9      	ldr	r1, [r7, #24]
+ 801a95c:	68f8      	ldr	r0, [r7, #12]
+ 801a95e:	f001 fb8d 	bl	801c07c <ethernet_output>
+  }
+
+  ETHARP_STATS_INC(etharp.xmit);
+  /* free ARP query packet */
+  pbuf_free(p);
+ 801a962:	69b8      	ldr	r0, [r7, #24]
+ 801a964:	f7f7 f818 	bl	8011998 <pbuf_free>
+  p = NULL;
+ 801a968:	2300      	movs	r3, #0
+ 801a96a:	61bb      	str	r3, [r7, #24]
+  /* could not allocate pbuf for ARP request */
+
+  return result;
+ 801a96c:	f997 301f 	ldrsb.w	r3, [r7, #31]
+}
+ 801a970:	4618      	mov	r0, r3
+ 801a972:	3720      	adds	r7, #32
+ 801a974:	46bd      	mov	sp, r7
+ 801a976:	bd80      	pop	{r7, pc}
+ 801a978:	0801fe68 	.word	0x0801fe68
+ 801a97c:	0801ffb8 	.word	0x0801ffb8
+ 801a980:	0801fee0 	.word	0x0801fee0
+ 801a984:	08020068 	.word	0x08020068
+ 801a988:	0802009c 	.word	0x0802009c
+
+0801a98c <etharp_request_dst>:
+ *         ERR_MEM if the ARP packet couldn't be allocated
+ *         any other err_t on failure
+ */
+static err_t
+etharp_request_dst(struct netif *netif, const ip4_addr_t *ipaddr, const struct eth_addr *hw_dst_addr)
+{
+ 801a98c:	b580      	push	{r7, lr}
+ 801a98e:	b088      	sub	sp, #32
+ 801a990:	af04      	add	r7, sp, #16
+ 801a992:	60f8      	str	r0, [r7, #12]
+ 801a994:	60b9      	str	r1, [r7, #8]
+ 801a996:	607a      	str	r2, [r7, #4]
+  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
+ 801a998:	68fb      	ldr	r3, [r7, #12]
+ 801a99a:	f103 012a 	add.w	r1, r3, #42	; 0x2a
+                    (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif), &ethzero,
+ 801a99e:	68fb      	ldr	r3, [r7, #12]
+ 801a9a0:	f103 002a 	add.w	r0, r3, #42	; 0x2a
+ 801a9a4:	68fb      	ldr	r3, [r7, #12]
+ 801a9a6:	3304      	adds	r3, #4
+  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
+ 801a9a8:	2201      	movs	r2, #1
+ 801a9aa:	9203      	str	r2, [sp, #12]
+ 801a9ac:	68ba      	ldr	r2, [r7, #8]
+ 801a9ae:	9202      	str	r2, [sp, #8]
+ 801a9b0:	4a06      	ldr	r2, [pc, #24]	; (801a9cc <etharp_request_dst+0x40>)
+ 801a9b2:	9201      	str	r2, [sp, #4]
+ 801a9b4:	9300      	str	r3, [sp, #0]
+ 801a9b6:	4603      	mov	r3, r0
+ 801a9b8:	687a      	ldr	r2, [r7, #4]
+ 801a9ba:	68f8      	ldr	r0, [r7, #12]
+ 801a9bc:	f7ff ff5a 	bl	801a874 <etharp_raw>
+ 801a9c0:	4603      	mov	r3, r0
+                    ipaddr, ARP_REQUEST);
+}
+ 801a9c2:	4618      	mov	r0, r3
+ 801a9c4:	3710      	adds	r7, #16
+ 801a9c6:	46bd      	mov	sp, r7
+ 801a9c8:	bd80      	pop	{r7, pc}
+ 801a9ca:	bf00      	nop
+ 801a9cc:	080225a8 	.word	0x080225a8
+
+0801a9d0 <etharp_request>:
+ *         ERR_MEM if the ARP packet couldn't be allocated
+ *         any other err_t on failure
+ */
+err_t
+etharp_request(struct netif *netif, const ip4_addr_t *ipaddr)
+{
+ 801a9d0:	b580      	push	{r7, lr}
+ 801a9d2:	b082      	sub	sp, #8
+ 801a9d4:	af00      	add	r7, sp, #0
+ 801a9d6:	6078      	str	r0, [r7, #4]
+ 801a9d8:	6039      	str	r1, [r7, #0]
+  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n"));
+  return etharp_request_dst(netif, ipaddr, &ethbroadcast);
+ 801a9da:	4a05      	ldr	r2, [pc, #20]	; (801a9f0 <etharp_request+0x20>)
+ 801a9dc:	6839      	ldr	r1, [r7, #0]
+ 801a9de:	6878      	ldr	r0, [r7, #4]
+ 801a9e0:	f7ff ffd4 	bl	801a98c <etharp_request_dst>
+ 801a9e4:	4603      	mov	r3, r0
+}
+ 801a9e6:	4618      	mov	r0, r3
+ 801a9e8:	3708      	adds	r7, #8
+ 801a9ea:	46bd      	mov	sp, r7
+ 801a9ec:	bd80      	pop	{r7, pc}
+ 801a9ee:	bf00      	nop
+ 801a9f0:	080225a0 	.word	0x080225a0
+
+0801a9f4 <icmp_input>:
+ * @param p the icmp echo request packet, p->payload pointing to the icmp header
+ * @param inp the netif on which this packet was received
+ */
+void
+icmp_input(struct pbuf *p, struct netif *inp)
+{
+ 801a9f4:	b580      	push	{r7, lr}
+ 801a9f6:	b08e      	sub	sp, #56	; 0x38
+ 801a9f8:	af04      	add	r7, sp, #16
+ 801a9fa:	6078      	str	r0, [r7, #4]
+ 801a9fc:	6039      	str	r1, [r7, #0]
+  const ip4_addr_t *src;
+
+  ICMP_STATS_INC(icmp.recv);
+  MIB2_STATS_INC(mib2.icmpinmsgs);
+
+  iphdr_in = ip4_current_header();
+ 801a9fe:	4b79      	ldr	r3, [pc, #484]	; (801abe4 <icmp_input+0x1f0>)
+ 801aa00:	689b      	ldr	r3, [r3, #8]
+ 801aa02:	627b      	str	r3, [r7, #36]	; 0x24
+  hlen = IPH_HL_BYTES(iphdr_in);
+ 801aa04:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801aa06:	781b      	ldrb	r3, [r3, #0]
+ 801aa08:	f003 030f 	and.w	r3, r3, #15
+ 801aa0c:	b2db      	uxtb	r3, r3
+ 801aa0e:	009b      	lsls	r3, r3, #2
+ 801aa10:	b2db      	uxtb	r3, r3
+ 801aa12:	847b      	strh	r3, [r7, #34]	; 0x22
+  if (hlen < IP_HLEN) {
+ 801aa14:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 801aa16:	2b13      	cmp	r3, #19
+ 801aa18:	f240 80cd 	bls.w	801abb6 <icmp_input+0x1c2>
+    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short IP header (%"S16_F" bytes) received\n", hlen));
+    goto lenerr;
+  }
+  if (p->len < sizeof(u16_t) * 2) {
+ 801aa1c:	687b      	ldr	r3, [r7, #4]
+ 801aa1e:	895b      	ldrh	r3, [r3, #10]
+ 801aa20:	2b03      	cmp	r3, #3
+ 801aa22:	f240 80ca 	bls.w	801abba <icmp_input+0x1c6>
+    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len));
+    goto lenerr;
+  }
+
+  type = *((u8_t *)p->payload);
+ 801aa26:	687b      	ldr	r3, [r7, #4]
+ 801aa28:	685b      	ldr	r3, [r3, #4]
+ 801aa2a:	781b      	ldrb	r3, [r3, #0]
+ 801aa2c:	f887 3021 	strb.w	r3, [r7, #33]	; 0x21
+#ifdef LWIP_DEBUG
+  code = *(((u8_t *)p->payload) + 1);
+  /* if debug is enabled but debug statement below is somehow disabled: */
+  LWIP_UNUSED_ARG(code);
+#endif /* LWIP_DEBUG */
+  switch (type) {
+ 801aa30:	f897 3021 	ldrb.w	r3, [r7, #33]	; 0x21
+ 801aa34:	2b00      	cmp	r3, #0
+ 801aa36:	f000 80b7 	beq.w	801aba8 <icmp_input+0x1b4>
+ 801aa3a:	2b08      	cmp	r3, #8
+ 801aa3c:	f040 80b7 	bne.w	801abae <icmp_input+0x1ba>
+         (as obviously, an echo request has been sent, too). */
+      MIB2_STATS_INC(mib2.icmpinechoreps);
+      break;
+    case ICMP_ECHO:
+      MIB2_STATS_INC(mib2.icmpinechos);
+      src = ip4_current_dest_addr();
+ 801aa40:	4b69      	ldr	r3, [pc, #420]	; (801abe8 <icmp_input+0x1f4>)
+ 801aa42:	61fb      	str	r3, [r7, #28]
+      /* multicast destination address? */
+      if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
+ 801aa44:	4b67      	ldr	r3, [pc, #412]	; (801abe4 <icmp_input+0x1f0>)
+ 801aa46:	695b      	ldr	r3, [r3, #20]
+ 801aa48:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
+ 801aa4c:	2be0      	cmp	r3, #224	; 0xe0
+ 801aa4e:	f000 80bb 	beq.w	801abc8 <icmp_input+0x1d4>
+        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast pings\n"));
+        goto icmperr;
+#endif /* LWIP_MULTICAST_PING */
+      }
+      /* broadcast destination address? */
+      if (ip4_addr_isbroadcast(ip4_current_dest_addr(), ip_current_netif())) {
+ 801aa52:	4b64      	ldr	r3, [pc, #400]	; (801abe4 <icmp_input+0x1f0>)
+ 801aa54:	695a      	ldr	r2, [r3, #20]
+ 801aa56:	4b63      	ldr	r3, [pc, #396]	; (801abe4 <icmp_input+0x1f0>)
+ 801aa58:	681b      	ldr	r3, [r3, #0]
+ 801aa5a:	4619      	mov	r1, r3
+ 801aa5c:	4610      	mov	r0, r2
+ 801aa5e:	f000 fc09 	bl	801b274 <ip4_addr_isbroadcast_u32>
+ 801aa62:	4603      	mov	r3, r0
+ 801aa64:	2b00      	cmp	r3, #0
+ 801aa66:	f040 80b1 	bne.w	801abcc <icmp_input+0x1d8>
+        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to broadcast pings\n"));
+        goto icmperr;
+#endif /* LWIP_BROADCAST_PING */
+      }
+      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n"));
+      if (p->tot_len < sizeof(struct icmp_echo_hdr)) {
+ 801aa6a:	687b      	ldr	r3, [r7, #4]
+ 801aa6c:	891b      	ldrh	r3, [r3, #8]
+ 801aa6e:	2b07      	cmp	r3, #7
+ 801aa70:	f240 80a5 	bls.w	801abbe <icmp_input+0x1ca>
+          return;
+        }
+      }
+#endif
+#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN
+      if (pbuf_add_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
+ 801aa74:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 801aa76:	330e      	adds	r3, #14
+ 801aa78:	4619      	mov	r1, r3
+ 801aa7a:	6878      	ldr	r0, [r7, #4]
+ 801aa7c:	f7f6 fef6 	bl	801186c <pbuf_add_header>
+ 801aa80:	4603      	mov	r3, r0
+ 801aa82:	2b00      	cmp	r3, #0
+ 801aa84:	d04b      	beq.n	801ab1e <icmp_input+0x12a>
+        /* p is not big enough to contain link headers
+         * allocate a new one and copy p into it
+         */
+        struct pbuf *r;
+        u16_t alloc_len = (u16_t)(p->tot_len + hlen);
+ 801aa86:	687b      	ldr	r3, [r7, #4]
+ 801aa88:	891a      	ldrh	r2, [r3, #8]
+ 801aa8a:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 801aa8c:	4413      	add	r3, r2
+ 801aa8e:	837b      	strh	r3, [r7, #26]
+        if (alloc_len < p->tot_len) {
+ 801aa90:	687b      	ldr	r3, [r7, #4]
+ 801aa92:	891b      	ldrh	r3, [r3, #8]
+ 801aa94:	8b7a      	ldrh	r2, [r7, #26]
+ 801aa96:	429a      	cmp	r2, r3
+ 801aa98:	f0c0 809a 	bcc.w	801abd0 <icmp_input+0x1dc>
+          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed (tot_len overflow)\n"));
+          goto icmperr;
+        }
+        /* allocate new packet buffer with space for link headers */
+        r = pbuf_alloc(PBUF_LINK, alloc_len, PBUF_RAM);
+ 801aa9c:	8b7b      	ldrh	r3, [r7, #26]
+ 801aa9e:	f44f 7220 	mov.w	r2, #640	; 0x280
+ 801aaa2:	4619      	mov	r1, r3
+ 801aaa4:	200e      	movs	r0, #14
+ 801aaa6:	f7f6 fc97 	bl	80113d8 <pbuf_alloc>
+ 801aaaa:	6178      	str	r0, [r7, #20]
+        if (r == NULL) {
+ 801aaac:	697b      	ldr	r3, [r7, #20]
+ 801aaae:	2b00      	cmp	r3, #0
+ 801aab0:	f000 8090 	beq.w	801abd4 <icmp_input+0x1e0>
+          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n"));
+          goto icmperr;
+        }
+        if (r->len < hlen + sizeof(struct icmp_echo_hdr)) {
+ 801aab4:	697b      	ldr	r3, [r7, #20]
+ 801aab6:	895b      	ldrh	r3, [r3, #10]
+ 801aab8:	461a      	mov	r2, r3
+ 801aaba:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 801aabc:	3308      	adds	r3, #8
+ 801aabe:	429a      	cmp	r2, r3
+ 801aac0:	d203      	bcs.n	801aaca <icmp_input+0xd6>
+          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("first pbuf cannot hold the ICMP header"));
+          pbuf_free(r);
+ 801aac2:	6978      	ldr	r0, [r7, #20]
+ 801aac4:	f7f6 ff68 	bl	8011998 <pbuf_free>
+          goto icmperr;
+ 801aac8:	e085      	b.n	801abd6 <icmp_input+0x1e2>
+        }
+        /* copy the ip header */
+        MEMCPY(r->payload, iphdr_in, hlen);
+ 801aaca:	697b      	ldr	r3, [r7, #20]
+ 801aacc:	685b      	ldr	r3, [r3, #4]
+ 801aace:	8c7a      	ldrh	r2, [r7, #34]	; 0x22
+ 801aad0:	6a79      	ldr	r1, [r7, #36]	; 0x24
+ 801aad2:	4618      	mov	r0, r3
+ 801aad4:	f001 fc63 	bl	801c39e <memcpy>
+        /* switch r->payload back to icmp header (cannot fail) */
+        if (pbuf_remove_header(r, hlen)) {
+ 801aad8:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 801aada:	4619      	mov	r1, r3
+ 801aadc:	6978      	ldr	r0, [r7, #20]
+ 801aade:	f7f6 fed5 	bl	801188c <pbuf_remove_header>
+ 801aae2:	4603      	mov	r3, r0
+ 801aae4:	2b00      	cmp	r3, #0
+ 801aae6:	d009      	beq.n	801aafc <icmp_input+0x108>
+          LWIP_ASSERT("icmp_input: moving r->payload to icmp header failed\n", 0);
+ 801aae8:	4b40      	ldr	r3, [pc, #256]	; (801abec <icmp_input+0x1f8>)
+ 801aaea:	22b6      	movs	r2, #182	; 0xb6
+ 801aaec:	4940      	ldr	r1, [pc, #256]	; (801abf0 <icmp_input+0x1fc>)
+ 801aaee:	4841      	ldr	r0, [pc, #260]	; (801abf4 <icmp_input+0x200>)
+ 801aaf0:	f001 fc82 	bl	801c3f8 <iprintf>
+          pbuf_free(r);
+ 801aaf4:	6978      	ldr	r0, [r7, #20]
+ 801aaf6:	f7f6 ff4f 	bl	8011998 <pbuf_free>
+          goto icmperr;
+ 801aafa:	e06c      	b.n	801abd6 <icmp_input+0x1e2>
+        }
+        /* copy the rest of the packet without ip header */
+        if (pbuf_copy(r, p) != ERR_OK) {
+ 801aafc:	6879      	ldr	r1, [r7, #4]
+ 801aafe:	6978      	ldr	r0, [r7, #20]
+ 801ab00:	f7f7 f87e 	bl	8011c00 <pbuf_copy>
+ 801ab04:	4603      	mov	r3, r0
+ 801ab06:	2b00      	cmp	r3, #0
+ 801ab08:	d003      	beq.n	801ab12 <icmp_input+0x11e>
+          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("icmp_input: copying to new pbuf failed"));
+          pbuf_free(r);
+ 801ab0a:	6978      	ldr	r0, [r7, #20]
+ 801ab0c:	f7f6 ff44 	bl	8011998 <pbuf_free>
+          goto icmperr;
+ 801ab10:	e061      	b.n	801abd6 <icmp_input+0x1e2>
+        }
+        /* free the original p */
+        pbuf_free(p);
+ 801ab12:	6878      	ldr	r0, [r7, #4]
+ 801ab14:	f7f6 ff40 	bl	8011998 <pbuf_free>
+        /* we now have an identical copy of p that has room for link headers */
+        p = r;
+ 801ab18:	697b      	ldr	r3, [r7, #20]
+ 801ab1a:	607b      	str	r3, [r7, #4]
+ 801ab1c:	e00f      	b.n	801ab3e <icmp_input+0x14a>
+      } else {
+        /* restore p->payload to point to icmp header (cannot fail) */
+        if (pbuf_remove_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
+ 801ab1e:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 801ab20:	330e      	adds	r3, #14
+ 801ab22:	4619      	mov	r1, r3
+ 801ab24:	6878      	ldr	r0, [r7, #4]
+ 801ab26:	f7f6 feb1 	bl	801188c <pbuf_remove_header>
+ 801ab2a:	4603      	mov	r3, r0
+ 801ab2c:	2b00      	cmp	r3, #0
+ 801ab2e:	d006      	beq.n	801ab3e <icmp_input+0x14a>
+          LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0);
+ 801ab30:	4b2e      	ldr	r3, [pc, #184]	; (801abec <icmp_input+0x1f8>)
+ 801ab32:	22c7      	movs	r2, #199	; 0xc7
+ 801ab34:	4930      	ldr	r1, [pc, #192]	; (801abf8 <icmp_input+0x204>)
+ 801ab36:	482f      	ldr	r0, [pc, #188]	; (801abf4 <icmp_input+0x200>)
+ 801ab38:	f001 fc5e 	bl	801c3f8 <iprintf>
+          goto icmperr;
+ 801ab3c:	e04b      	b.n	801abd6 <icmp_input+0x1e2>
+      }
+#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */
+      /* At this point, all checks are OK. */
+      /* We generate an answer by switching the dest and src ip addresses,
+       * setting the icmp type to ECHO_RESPONSE and updating the checksum. */
+      iecho = (struct icmp_echo_hdr *)p->payload;
+ 801ab3e:	687b      	ldr	r3, [r7, #4]
+ 801ab40:	685b      	ldr	r3, [r3, #4]
+ 801ab42:	613b      	str	r3, [r7, #16]
+      if (pbuf_add_header(p, hlen)) {
+ 801ab44:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
+ 801ab46:	4619      	mov	r1, r3
+ 801ab48:	6878      	ldr	r0, [r7, #4]
+ 801ab4a:	f7f6 fe8f 	bl	801186c <pbuf_add_header>
+ 801ab4e:	4603      	mov	r3, r0
+ 801ab50:	2b00      	cmp	r3, #0
+ 801ab52:	d12b      	bne.n	801abac <icmp_input+0x1b8>
+        LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Can't move over header in packet"));
+      } else {
+        err_t ret;
+        struct ip_hdr *iphdr = (struct ip_hdr *)p->payload;
+ 801ab54:	687b      	ldr	r3, [r7, #4]
+ 801ab56:	685b      	ldr	r3, [r3, #4]
+ 801ab58:	60fb      	str	r3, [r7, #12]
+        ip4_addr_copy(iphdr->src, *src);
+ 801ab5a:	69fb      	ldr	r3, [r7, #28]
+ 801ab5c:	681a      	ldr	r2, [r3, #0]
+ 801ab5e:	68fb      	ldr	r3, [r7, #12]
+ 801ab60:	60da      	str	r2, [r3, #12]
+        ip4_addr_copy(iphdr->dest, *ip4_current_src_addr());
+ 801ab62:	4b20      	ldr	r3, [pc, #128]	; (801abe4 <icmp_input+0x1f0>)
+ 801ab64:	691a      	ldr	r2, [r3, #16]
+ 801ab66:	68fb      	ldr	r3, [r7, #12]
+ 801ab68:	611a      	str	r2, [r3, #16]
+        ICMPH_TYPE_SET(iecho, ICMP_ER);
+ 801ab6a:	693b      	ldr	r3, [r7, #16]
+ 801ab6c:	2200      	movs	r2, #0
+ 801ab6e:	701a      	strb	r2, [r3, #0]
+        else {
+          iecho->chksum = 0;
+        }
+#endif /* LWIP_CHECKSUM_CTRL_PER_NETIF */
+#else /* CHECKSUM_GEN_ICMP */
+        iecho->chksum = 0;
+ 801ab70:	693b      	ldr	r3, [r7, #16]
+ 801ab72:	2200      	movs	r2, #0
+ 801ab74:	709a      	strb	r2, [r3, #2]
+ 801ab76:	2200      	movs	r2, #0
+ 801ab78:	70da      	strb	r2, [r3, #3]
+#endif /* CHECKSUM_GEN_ICMP */
+
+        /* Set the correct TTL and recalculate the header checksum. */
+        IPH_TTL_SET(iphdr, ICMP_TTL);
+ 801ab7a:	68fb      	ldr	r3, [r7, #12]
+ 801ab7c:	22ff      	movs	r2, #255	; 0xff
+ 801ab7e:	721a      	strb	r2, [r3, #8]
+        IPH_CHKSUM_SET(iphdr, 0);
+ 801ab80:	68fb      	ldr	r3, [r7, #12]
+ 801ab82:	2200      	movs	r2, #0
+ 801ab84:	729a      	strb	r2, [r3, #10]
+ 801ab86:	2200      	movs	r2, #0
+ 801ab88:	72da      	strb	r2, [r3, #11]
+        MIB2_STATS_INC(mib2.icmpoutmsgs);
+        /* increase number of echo replies attempted to send */
+        MIB2_STATS_INC(mib2.icmpoutechoreps);
+
+        /* send an ICMP packet */
+        ret = ip4_output_if(p, src, LWIP_IP_HDRINCL,
+ 801ab8a:	683b      	ldr	r3, [r7, #0]
+ 801ab8c:	9302      	str	r3, [sp, #8]
+ 801ab8e:	2301      	movs	r3, #1
+ 801ab90:	9301      	str	r3, [sp, #4]
+ 801ab92:	2300      	movs	r3, #0
+ 801ab94:	9300      	str	r3, [sp, #0]
+ 801ab96:	23ff      	movs	r3, #255	; 0xff
+ 801ab98:	2200      	movs	r2, #0
+ 801ab9a:	69f9      	ldr	r1, [r7, #28]
+ 801ab9c:	6878      	ldr	r0, [r7, #4]
+ 801ab9e:	f000 fa91 	bl	801b0c4 <ip4_output_if>
+ 801aba2:	4603      	mov	r3, r0
+ 801aba4:	72fb      	strb	r3, [r7, #11]
+                            ICMP_TTL, 0, IP_PROTO_ICMP, inp);
+        if (ret != ERR_OK) {
+          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %s\n", lwip_strerr(ret)));
+        }
+      }
+      break;
+ 801aba6:	e001      	b.n	801abac <icmp_input+0x1b8>
+      break;
+ 801aba8:	bf00      	nop
+ 801abaa:	e000      	b.n	801abae <icmp_input+0x1ba>
+      break;
+ 801abac:	bf00      	nop
+      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n",
+                               (s16_t)type, (s16_t)code));
+      ICMP_STATS_INC(icmp.proterr);
+      ICMP_STATS_INC(icmp.drop);
+  }
+  pbuf_free(p);
+ 801abae:	6878      	ldr	r0, [r7, #4]
+ 801abb0:	f7f6 fef2 	bl	8011998 <pbuf_free>
+  return;
+ 801abb4:	e013      	b.n	801abde <icmp_input+0x1ea>
+    goto lenerr;
+ 801abb6:	bf00      	nop
+ 801abb8:	e002      	b.n	801abc0 <icmp_input+0x1cc>
+    goto lenerr;
+ 801abba:	bf00      	nop
+ 801abbc:	e000      	b.n	801abc0 <icmp_input+0x1cc>
+        goto lenerr;
+ 801abbe:	bf00      	nop
+lenerr:
+  pbuf_free(p);
+ 801abc0:	6878      	ldr	r0, [r7, #4]
+ 801abc2:	f7f6 fee9 	bl	8011998 <pbuf_free>
+  ICMP_STATS_INC(icmp.lenerr);
+  MIB2_STATS_INC(mib2.icmpinerrors);
+  return;
+ 801abc6:	e00a      	b.n	801abde <icmp_input+0x1ea>
+        goto icmperr;
+ 801abc8:	bf00      	nop
+ 801abca:	e004      	b.n	801abd6 <icmp_input+0x1e2>
+        goto icmperr;
+ 801abcc:	bf00      	nop
+ 801abce:	e002      	b.n	801abd6 <icmp_input+0x1e2>
+          goto icmperr;
+ 801abd0:	bf00      	nop
+ 801abd2:	e000      	b.n	801abd6 <icmp_input+0x1e2>
+          goto icmperr;
+ 801abd4:	bf00      	nop
+#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING
+icmperr:
+  pbuf_free(p);
+ 801abd6:	6878      	ldr	r0, [r7, #4]
+ 801abd8:	f7f6 fede 	bl	8011998 <pbuf_free>
+  ICMP_STATS_INC(icmp.err);
+  MIB2_STATS_INC(mib2.icmpinerrors);
+  return;
+ 801abdc:	bf00      	nop
+#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */
+}
+ 801abde:	3728      	adds	r7, #40	; 0x28
+ 801abe0:	46bd      	mov	sp, r7
+ 801abe2:	bd80      	pop	{r7, pc}
+ 801abe4:	2000c0b4 	.word	0x2000c0b4
+ 801abe8:	2000c0c8 	.word	0x2000c0c8
+ 801abec:	080200e0 	.word	0x080200e0
+ 801abf0:	08020118 	.word	0x08020118
+ 801abf4:	08020150 	.word	0x08020150
+ 801abf8:	08020178 	.word	0x08020178
+
+0801abfc <icmp_dest_unreach>:
+ *          p->payload pointing to the IP header
+ * @param t type of the 'unreachable' packet
+ */
+void
+icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t)
+{
+ 801abfc:	b580      	push	{r7, lr}
+ 801abfe:	b082      	sub	sp, #8
+ 801ac00:	af00      	add	r7, sp, #0
+ 801ac02:	6078      	str	r0, [r7, #4]
+ 801ac04:	460b      	mov	r3, r1
+ 801ac06:	70fb      	strb	r3, [r7, #3]
+  MIB2_STATS_INC(mib2.icmpoutdestunreachs);
+  icmp_send_response(p, ICMP_DUR, t);
+ 801ac08:	78fb      	ldrb	r3, [r7, #3]
+ 801ac0a:	461a      	mov	r2, r3
+ 801ac0c:	2103      	movs	r1, #3
+ 801ac0e:	6878      	ldr	r0, [r7, #4]
+ 801ac10:	f000 f814 	bl	801ac3c <icmp_send_response>
+}
+ 801ac14:	bf00      	nop
+ 801ac16:	3708      	adds	r7, #8
+ 801ac18:	46bd      	mov	sp, r7
+ 801ac1a:	bd80      	pop	{r7, pc}
+
+0801ac1c <icmp_time_exceeded>:
+ *          p->payload pointing to the IP header
+ * @param t type of the 'time exceeded' packet
+ */
+void
+icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t)
+{
+ 801ac1c:	b580      	push	{r7, lr}
+ 801ac1e:	b082      	sub	sp, #8
+ 801ac20:	af00      	add	r7, sp, #0
+ 801ac22:	6078      	str	r0, [r7, #4]
+ 801ac24:	460b      	mov	r3, r1
+ 801ac26:	70fb      	strb	r3, [r7, #3]
+  MIB2_STATS_INC(mib2.icmpouttimeexcds);
+  icmp_send_response(p, ICMP_TE, t);
+ 801ac28:	78fb      	ldrb	r3, [r7, #3]
+ 801ac2a:	461a      	mov	r2, r3
+ 801ac2c:	210b      	movs	r1, #11
+ 801ac2e:	6878      	ldr	r0, [r7, #4]
+ 801ac30:	f000 f804 	bl	801ac3c <icmp_send_response>
+}
+ 801ac34:	bf00      	nop
+ 801ac36:	3708      	adds	r7, #8
+ 801ac38:	46bd      	mov	sp, r7
+ 801ac3a:	bd80      	pop	{r7, pc}
+
+0801ac3c <icmp_send_response>:
+ * @param type Type of the ICMP header
+ * @param code Code of the ICMP header
+ */
+static void
+icmp_send_response(struct pbuf *p, u8_t type, u8_t code)
+{
+ 801ac3c:	b580      	push	{r7, lr}
+ 801ac3e:	b08c      	sub	sp, #48	; 0x30
+ 801ac40:	af04      	add	r7, sp, #16
+ 801ac42:	6078      	str	r0, [r7, #4]
+ 801ac44:	460b      	mov	r3, r1
+ 801ac46:	70fb      	strb	r3, [r7, #3]
+ 801ac48:	4613      	mov	r3, r2
+ 801ac4a:	70bb      	strb	r3, [r7, #2]
+
+  /* increase number of messages attempted to send */
+  MIB2_STATS_INC(mib2.icmpoutmsgs);
+
+  /* ICMP header + IP header + 8 bytes of data */
+  q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE,
+ 801ac4c:	f44f 7220 	mov.w	r2, #640	; 0x280
+ 801ac50:	2124      	movs	r1, #36	; 0x24
+ 801ac52:	2022      	movs	r0, #34	; 0x22
+ 801ac54:	f7f6 fbc0 	bl	80113d8 <pbuf_alloc>
+ 801ac58:	61f8      	str	r0, [r7, #28]
+                 PBUF_RAM);
+  if (q == NULL) {
+ 801ac5a:	69fb      	ldr	r3, [r7, #28]
+ 801ac5c:	2b00      	cmp	r3, #0
+ 801ac5e:	d04c      	beq.n	801acfa <icmp_send_response+0xbe>
+    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n"));
+    MIB2_STATS_INC(mib2.icmpouterrors);
+    return;
+  }
+  LWIP_ASSERT("check that first pbuf can hold icmp message",
+ 801ac60:	69fb      	ldr	r3, [r7, #28]
+ 801ac62:	895b      	ldrh	r3, [r3, #10]
+ 801ac64:	2b23      	cmp	r3, #35	; 0x23
+ 801ac66:	d806      	bhi.n	801ac76 <icmp_send_response+0x3a>
+ 801ac68:	4b26      	ldr	r3, [pc, #152]	; (801ad04 <icmp_send_response+0xc8>)
+ 801ac6a:	f240 1269 	movw	r2, #361	; 0x169
+ 801ac6e:	4926      	ldr	r1, [pc, #152]	; (801ad08 <icmp_send_response+0xcc>)
+ 801ac70:	4826      	ldr	r0, [pc, #152]	; (801ad0c <icmp_send_response+0xd0>)
+ 801ac72:	f001 fbc1 	bl	801c3f8 <iprintf>
+              (q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE)));
+
+  iphdr = (struct ip_hdr *)p->payload;
+ 801ac76:	687b      	ldr	r3, [r7, #4]
+ 801ac78:	685b      	ldr	r3, [r3, #4]
+ 801ac7a:	61bb      	str	r3, [r7, #24]
+  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->src);
+  LWIP_DEBUGF(ICMP_DEBUG, (" to "));
+  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->dest);
+  LWIP_DEBUGF(ICMP_DEBUG, ("\n"));
+
+  icmphdr = (struct icmp_echo_hdr *)q->payload;
+ 801ac7c:	69fb      	ldr	r3, [r7, #28]
+ 801ac7e:	685b      	ldr	r3, [r3, #4]
+ 801ac80:	617b      	str	r3, [r7, #20]
+  icmphdr->type = type;
+ 801ac82:	697b      	ldr	r3, [r7, #20]
+ 801ac84:	78fa      	ldrb	r2, [r7, #3]
+ 801ac86:	701a      	strb	r2, [r3, #0]
+  icmphdr->code = code;
+ 801ac88:	697b      	ldr	r3, [r7, #20]
+ 801ac8a:	78ba      	ldrb	r2, [r7, #2]
+ 801ac8c:	705a      	strb	r2, [r3, #1]
+  icmphdr->id = 0;
+ 801ac8e:	697b      	ldr	r3, [r7, #20]
+ 801ac90:	2200      	movs	r2, #0
+ 801ac92:	711a      	strb	r2, [r3, #4]
+ 801ac94:	2200      	movs	r2, #0
+ 801ac96:	715a      	strb	r2, [r3, #5]
+  icmphdr->seqno = 0;
+ 801ac98:	697b      	ldr	r3, [r7, #20]
+ 801ac9a:	2200      	movs	r2, #0
+ 801ac9c:	719a      	strb	r2, [r3, #6]
+ 801ac9e:	2200      	movs	r2, #0
+ 801aca0:	71da      	strb	r2, [r3, #7]
+
+  /* copy fields from original packet */
+  SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload,
+ 801aca2:	69fb      	ldr	r3, [r7, #28]
+ 801aca4:	685b      	ldr	r3, [r3, #4]
+ 801aca6:	f103 0008 	add.w	r0, r3, #8
+ 801acaa:	687b      	ldr	r3, [r7, #4]
+ 801acac:	685b      	ldr	r3, [r3, #4]
+ 801acae:	221c      	movs	r2, #28
+ 801acb0:	4619      	mov	r1, r3
+ 801acb2:	f001 fb74 	bl	801c39e <memcpy>
+          IP_HLEN + ICMP_DEST_UNREACH_DATASIZE);
+
+  ip4_addr_copy(iphdr_src, iphdr->src);
+ 801acb6:	69bb      	ldr	r3, [r7, #24]
+ 801acb8:	68db      	ldr	r3, [r3, #12]
+ 801acba:	60fb      	str	r3, [r7, #12]
+    ip4_addr_t iphdr_dst;
+    ip4_addr_copy(iphdr_dst, iphdr->dest);
+    netif = ip4_route_src(&iphdr_dst, &iphdr_src);
+  }
+#else
+  netif = ip4_route(&iphdr_src);
+ 801acbc:	f107 030c 	add.w	r3, r7, #12
+ 801acc0:	4618      	mov	r0, r3
+ 801acc2:	f000 f825 	bl	801ad10 <ip4_route>
+ 801acc6:	6138      	str	r0, [r7, #16]
+#endif
+  if (netif != NULL) {
+ 801acc8:	693b      	ldr	r3, [r7, #16]
+ 801acca:	2b00      	cmp	r3, #0
+ 801accc:	d011      	beq.n	801acf2 <icmp_send_response+0xb6>
+    /* calculate checksum */
+    icmphdr->chksum = 0;
+ 801acce:	697b      	ldr	r3, [r7, #20]
+ 801acd0:	2200      	movs	r2, #0
+ 801acd2:	709a      	strb	r2, [r3, #2]
+ 801acd4:	2200      	movs	r2, #0
+ 801acd6:	70da      	strb	r2, [r3, #3]
+    IF__NETIF_CHECKSUM_ENABLED(netif, NETIF_CHECKSUM_GEN_ICMP) {
+      icmphdr->chksum = inet_chksum(icmphdr, q->len);
+    }
+#endif
+    ICMP_STATS_INC(icmp.xmit);
+    ip4_output_if(q, NULL, &iphdr_src, ICMP_TTL, 0, IP_PROTO_ICMP, netif);
+ 801acd8:	f107 020c 	add.w	r2, r7, #12
+ 801acdc:	693b      	ldr	r3, [r7, #16]
+ 801acde:	9302      	str	r3, [sp, #8]
+ 801ace0:	2301      	movs	r3, #1
+ 801ace2:	9301      	str	r3, [sp, #4]
+ 801ace4:	2300      	movs	r3, #0
+ 801ace6:	9300      	str	r3, [sp, #0]
+ 801ace8:	23ff      	movs	r3, #255	; 0xff
+ 801acea:	2100      	movs	r1, #0
+ 801acec:	69f8      	ldr	r0, [r7, #28]
+ 801acee:	f000 f9e9 	bl	801b0c4 <ip4_output_if>
+  }
+  pbuf_free(q);
+ 801acf2:	69f8      	ldr	r0, [r7, #28]
+ 801acf4:	f7f6 fe50 	bl	8011998 <pbuf_free>
+ 801acf8:	e000      	b.n	801acfc <icmp_send_response+0xc0>
+    return;
+ 801acfa:	bf00      	nop
+}
+ 801acfc:	3720      	adds	r7, #32
+ 801acfe:	46bd      	mov	sp, r7
+ 801ad00:	bd80      	pop	{r7, pc}
+ 801ad02:	bf00      	nop
+ 801ad04:	080200e0 	.word	0x080200e0
+ 801ad08:	080201ac 	.word	0x080201ac
+ 801ad0c:	08020150 	.word	0x08020150
+
+0801ad10 <ip4_route>:
+ * @param dest the destination IP address for which to find the route
+ * @return the netif on which to send to reach dest
+ */
+struct netif *
+ip4_route(const ip4_addr_t *dest)
+{
+ 801ad10:	b480      	push	{r7}
+ 801ad12:	b085      	sub	sp, #20
+ 801ad14:	af00      	add	r7, sp, #0
+ 801ad16:	6078      	str	r0, [r7, #4]
+
+  /* bug #54569: in case LWIP_SINGLE_NETIF=1 and LWIP_DEBUGF() disabled, the following loop is optimized away */
+  LWIP_UNUSED_ARG(dest);
+
+  /* iterate through netifs */
+  NETIF_FOREACH(netif) {
+ 801ad18:	4b33      	ldr	r3, [pc, #204]	; (801ade8 <ip4_route+0xd8>)
+ 801ad1a:	681b      	ldr	r3, [r3, #0]
+ 801ad1c:	60fb      	str	r3, [r7, #12]
+ 801ad1e:	e036      	b.n	801ad8e <ip4_route+0x7e>
+    /* is the netif up, does it have a link and a valid address? */
+    if (netif_is_up(netif) && netif_is_link_up(netif) && !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
+ 801ad20:	68fb      	ldr	r3, [r7, #12]
+ 801ad22:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801ad26:	f003 0301 	and.w	r3, r3, #1
+ 801ad2a:	b2db      	uxtb	r3, r3
+ 801ad2c:	2b00      	cmp	r3, #0
+ 801ad2e:	d02b      	beq.n	801ad88 <ip4_route+0x78>
+ 801ad30:	68fb      	ldr	r3, [r7, #12]
+ 801ad32:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801ad36:	089b      	lsrs	r3, r3, #2
+ 801ad38:	f003 0301 	and.w	r3, r3, #1
+ 801ad3c:	b2db      	uxtb	r3, r3
+ 801ad3e:	2b00      	cmp	r3, #0
+ 801ad40:	d022      	beq.n	801ad88 <ip4_route+0x78>
+ 801ad42:	68fb      	ldr	r3, [r7, #12]
+ 801ad44:	3304      	adds	r3, #4
+ 801ad46:	681b      	ldr	r3, [r3, #0]
+ 801ad48:	2b00      	cmp	r3, #0
+ 801ad4a:	d01d      	beq.n	801ad88 <ip4_route+0x78>
+      /* network mask matches? */
+      if (ip4_addr_netcmp(dest, netif_ip4_addr(netif), netif_ip4_netmask(netif))) {
+ 801ad4c:	687b      	ldr	r3, [r7, #4]
+ 801ad4e:	681a      	ldr	r2, [r3, #0]
+ 801ad50:	68fb      	ldr	r3, [r7, #12]
+ 801ad52:	3304      	adds	r3, #4
+ 801ad54:	681b      	ldr	r3, [r3, #0]
+ 801ad56:	405a      	eors	r2, r3
+ 801ad58:	68fb      	ldr	r3, [r7, #12]
+ 801ad5a:	3308      	adds	r3, #8
+ 801ad5c:	681b      	ldr	r3, [r3, #0]
+ 801ad5e:	4013      	ands	r3, r2
+ 801ad60:	2b00      	cmp	r3, #0
+ 801ad62:	d101      	bne.n	801ad68 <ip4_route+0x58>
+        /* return netif on which to forward IP packet */
+        return netif;
+ 801ad64:	68fb      	ldr	r3, [r7, #12]
+ 801ad66:	e038      	b.n	801adda <ip4_route+0xca>
+      }
+      /* gateway matches on a non broadcast interface? (i.e. peer in a point to point interface) */
+      if (((netif->flags & NETIF_FLAG_BROADCAST) == 0) && ip4_addr_cmp(dest, netif_ip4_gw(netif))) {
+ 801ad68:	68fb      	ldr	r3, [r7, #12]
+ 801ad6a:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801ad6e:	f003 0302 	and.w	r3, r3, #2
+ 801ad72:	2b00      	cmp	r3, #0
+ 801ad74:	d108      	bne.n	801ad88 <ip4_route+0x78>
+ 801ad76:	687b      	ldr	r3, [r7, #4]
+ 801ad78:	681a      	ldr	r2, [r3, #0]
+ 801ad7a:	68fb      	ldr	r3, [r7, #12]
+ 801ad7c:	330c      	adds	r3, #12
+ 801ad7e:	681b      	ldr	r3, [r3, #0]
+ 801ad80:	429a      	cmp	r2, r3
+ 801ad82:	d101      	bne.n	801ad88 <ip4_route+0x78>
+        /* return netif on which to forward IP packet */
+        return netif;
+ 801ad84:	68fb      	ldr	r3, [r7, #12]
+ 801ad86:	e028      	b.n	801adda <ip4_route+0xca>
+  NETIF_FOREACH(netif) {
+ 801ad88:	68fb      	ldr	r3, [r7, #12]
+ 801ad8a:	681b      	ldr	r3, [r3, #0]
+ 801ad8c:	60fb      	str	r3, [r7, #12]
+ 801ad8e:	68fb      	ldr	r3, [r7, #12]
+ 801ad90:	2b00      	cmp	r3, #0
+ 801ad92:	d1c5      	bne.n	801ad20 <ip4_route+0x10>
+    return netif;
+  }
+#endif
+#endif /* !LWIP_SINGLE_NETIF */
+
+  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
+ 801ad94:	4b15      	ldr	r3, [pc, #84]	; (801adec <ip4_route+0xdc>)
+ 801ad96:	681b      	ldr	r3, [r3, #0]
+ 801ad98:	2b00      	cmp	r3, #0
+ 801ad9a:	d01a      	beq.n	801add2 <ip4_route+0xc2>
+ 801ad9c:	4b13      	ldr	r3, [pc, #76]	; (801adec <ip4_route+0xdc>)
+ 801ad9e:	681b      	ldr	r3, [r3, #0]
+ 801ada0:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801ada4:	f003 0301 	and.w	r3, r3, #1
+ 801ada8:	2b00      	cmp	r3, #0
+ 801adaa:	d012      	beq.n	801add2 <ip4_route+0xc2>
+ 801adac:	4b0f      	ldr	r3, [pc, #60]	; (801adec <ip4_route+0xdc>)
+ 801adae:	681b      	ldr	r3, [r3, #0]
+ 801adb0:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801adb4:	f003 0304 	and.w	r3, r3, #4
+ 801adb8:	2b00      	cmp	r3, #0
+ 801adba:	d00a      	beq.n	801add2 <ip4_route+0xc2>
+      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
+ 801adbc:	4b0b      	ldr	r3, [pc, #44]	; (801adec <ip4_route+0xdc>)
+ 801adbe:	681b      	ldr	r3, [r3, #0]
+ 801adc0:	3304      	adds	r3, #4
+ 801adc2:	681b      	ldr	r3, [r3, #0]
+  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
+ 801adc4:	2b00      	cmp	r3, #0
+ 801adc6:	d004      	beq.n	801add2 <ip4_route+0xc2>
+      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
+ 801adc8:	687b      	ldr	r3, [r7, #4]
+ 801adca:	681b      	ldr	r3, [r3, #0]
+ 801adcc:	b2db      	uxtb	r3, r3
+ 801adce:	2b7f      	cmp	r3, #127	; 0x7f
+ 801add0:	d101      	bne.n	801add6 <ip4_route+0xc6>
+       If this is not good enough for you, use LWIP_HOOK_IP4_ROUTE() */
+    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_route: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n",
+                ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest)));
+    IP_STATS_INC(ip.rterr);
+    MIB2_STATS_INC(mib2.ipoutnoroutes);
+    return NULL;
+ 801add2:	2300      	movs	r3, #0
+ 801add4:	e001      	b.n	801adda <ip4_route+0xca>
+  }
+
+  return netif_default;
+ 801add6:	4b05      	ldr	r3, [pc, #20]	; (801adec <ip4_route+0xdc>)
+ 801add8:	681b      	ldr	r3, [r3, #0]
+}
+ 801adda:	4618      	mov	r0, r3
+ 801addc:	3714      	adds	r7, #20
+ 801adde:	46bd      	mov	sp, r7
+ 801ade0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 801ade4:	4770      	bx	lr
+ 801ade6:	bf00      	nop
+ 801ade8:	2000f7d8 	.word	0x2000f7d8
+ 801adec:	2000f7dc 	.word	0x2000f7dc
+
+0801adf0 <ip4_input_accept>:
+#endif /* IP_FORWARD */
+
+/** Return true if the current input packet should be accepted on this netif */
+static int
+ip4_input_accept(struct netif *netif)
+{
+ 801adf0:	b580      	push	{r7, lr}
+ 801adf2:	b082      	sub	sp, #8
+ 801adf4:	af00      	add	r7, sp, #0
+ 801adf6:	6078      	str	r0, [r7, #4]
+                         ip4_addr_get_u32(ip4_current_dest_addr()) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
+                         ip4_addr_get_u32(netif_ip4_addr(netif)) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
+                         ip4_addr_get_u32(ip4_current_dest_addr()) & ~ip4_addr_get_u32(netif_ip4_netmask(netif))));
+
+  /* interface is up and configured? */
+  if ((netif_is_up(netif)) && (!ip4_addr_isany_val(*netif_ip4_addr(netif)))) {
+ 801adf8:	687b      	ldr	r3, [r7, #4]
+ 801adfa:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801adfe:	f003 0301 	and.w	r3, r3, #1
+ 801ae02:	b2db      	uxtb	r3, r3
+ 801ae04:	2b00      	cmp	r3, #0
+ 801ae06:	d016      	beq.n	801ae36 <ip4_input_accept+0x46>
+ 801ae08:	687b      	ldr	r3, [r7, #4]
+ 801ae0a:	3304      	adds	r3, #4
+ 801ae0c:	681b      	ldr	r3, [r3, #0]
+ 801ae0e:	2b00      	cmp	r3, #0
+ 801ae10:	d011      	beq.n	801ae36 <ip4_input_accept+0x46>
+    /* unicast to this interface address? */
+    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
+ 801ae12:	4b0b      	ldr	r3, [pc, #44]	; (801ae40 <ip4_input_accept+0x50>)
+ 801ae14:	695a      	ldr	r2, [r3, #20]
+ 801ae16:	687b      	ldr	r3, [r7, #4]
+ 801ae18:	3304      	adds	r3, #4
+ 801ae1a:	681b      	ldr	r3, [r3, #0]
+ 801ae1c:	429a      	cmp	r2, r3
+ 801ae1e:	d008      	beq.n	801ae32 <ip4_input_accept+0x42>
+        /* or broadcast on this interface network address? */
+        ip4_addr_isbroadcast(ip4_current_dest_addr(), netif)
+ 801ae20:	4b07      	ldr	r3, [pc, #28]	; (801ae40 <ip4_input_accept+0x50>)
+ 801ae22:	695b      	ldr	r3, [r3, #20]
+ 801ae24:	6879      	ldr	r1, [r7, #4]
+ 801ae26:	4618      	mov	r0, r3
+ 801ae28:	f000 fa24 	bl	801b274 <ip4_addr_isbroadcast_u32>
+ 801ae2c:	4603      	mov	r3, r0
+    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
+ 801ae2e:	2b00      	cmp	r3, #0
+ 801ae30:	d001      	beq.n	801ae36 <ip4_input_accept+0x46>
+#endif /* LWIP_NETIF_LOOPBACK && !LWIP_HAVE_LOOPIF */
+       ) {
+      LWIP_DEBUGF(IP_DEBUG, ("ip4_input: packet accepted on interface %c%c\n",
+                             netif->name[0], netif->name[1]));
+      /* accept on this netif */
+      return 1;
+ 801ae32:	2301      	movs	r3, #1
+ 801ae34:	e000      	b.n	801ae38 <ip4_input_accept+0x48>
+      /* accept on this netif */
+      return 1;
+    }
+#endif /* LWIP_AUTOIP */
+  }
+  return 0;
+ 801ae36:	2300      	movs	r3, #0
+}
+ 801ae38:	4618      	mov	r0, r3
+ 801ae3a:	3708      	adds	r7, #8
+ 801ae3c:	46bd      	mov	sp, r7
+ 801ae3e:	bd80      	pop	{r7, pc}
+ 801ae40:	2000c0b4 	.word	0x2000c0b4
+
+0801ae44 <ip4_input>:
+ * @return ERR_OK if the packet was processed (could return ERR_* if it wasn't
+ *         processed, but currently always returns ERR_OK)
+ */
+err_t
+ip4_input(struct pbuf *p, struct netif *inp)
+{
+ 801ae44:	b580      	push	{r7, lr}
+ 801ae46:	b088      	sub	sp, #32
+ 801ae48:	af00      	add	r7, sp, #0
+ 801ae4a:	6078      	str	r0, [r7, #4]
+ 801ae4c:	6039      	str	r1, [r7, #0]
+  const struct ip_hdr *iphdr;
+  struct netif *netif;
+  u16_t iphdr_hlen;
+  u16_t iphdr_len;
+#if IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP
+  int check_ip_src = 1;
+ 801ae4e:	2301      	movs	r3, #1
+ 801ae50:	617b      	str	r3, [r7, #20]
+
+  IP_STATS_INC(ip.recv);
+  MIB2_STATS_INC(mib2.ipinreceives);
+
+  /* identify the IP header */
+  iphdr = (struct ip_hdr *)p->payload;
+ 801ae52:	687b      	ldr	r3, [r7, #4]
+ 801ae54:	685b      	ldr	r3, [r3, #4]
+ 801ae56:	61fb      	str	r3, [r7, #28]
+  if (IPH_V(iphdr) != 4) {
+ 801ae58:	69fb      	ldr	r3, [r7, #28]
+ 801ae5a:	781b      	ldrb	r3, [r3, #0]
+ 801ae5c:	091b      	lsrs	r3, r3, #4
+ 801ae5e:	b2db      	uxtb	r3, r3
+ 801ae60:	2b04      	cmp	r3, #4
+ 801ae62:	d004      	beq.n	801ae6e <ip4_input+0x2a>
+    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", (u16_t)IPH_V(iphdr)));
+    ip4_debug_print(p);
+    pbuf_free(p);
+ 801ae64:	6878      	ldr	r0, [r7, #4]
+ 801ae66:	f7f6 fd97 	bl	8011998 <pbuf_free>
+    IP_STATS_INC(ip.err);
+    IP_STATS_INC(ip.drop);
+    MIB2_STATS_INC(mib2.ipinhdrerrors);
+    return ERR_OK;
+ 801ae6a:	2300      	movs	r3, #0
+ 801ae6c:	e121      	b.n	801b0b2 <ip4_input+0x26e>
+    return ERR_OK;
+  }
+#endif
+
+  /* obtain IP header length in bytes */
+  iphdr_hlen = IPH_HL_BYTES(iphdr);
+ 801ae6e:	69fb      	ldr	r3, [r7, #28]
+ 801ae70:	781b      	ldrb	r3, [r3, #0]
+ 801ae72:	f003 030f 	and.w	r3, r3, #15
+ 801ae76:	b2db      	uxtb	r3, r3
+ 801ae78:	009b      	lsls	r3, r3, #2
+ 801ae7a:	b2db      	uxtb	r3, r3
+ 801ae7c:	827b      	strh	r3, [r7, #18]
+  /* obtain ip length in bytes */
+  iphdr_len = lwip_ntohs(IPH_LEN(iphdr));
+ 801ae7e:	69fb      	ldr	r3, [r7, #28]
+ 801ae80:	885b      	ldrh	r3, [r3, #2]
+ 801ae82:	b29b      	uxth	r3, r3
+ 801ae84:	4618      	mov	r0, r3
+ 801ae86:	f7f5 f9d3 	bl	8010230 <lwip_htons>
+ 801ae8a:	4603      	mov	r3, r0
+ 801ae8c:	823b      	strh	r3, [r7, #16]
+
+  /* Trim pbuf. This is especially required for packets < 60 bytes. */
+  if (iphdr_len < p->tot_len) {
+ 801ae8e:	687b      	ldr	r3, [r7, #4]
+ 801ae90:	891b      	ldrh	r3, [r3, #8]
+ 801ae92:	8a3a      	ldrh	r2, [r7, #16]
+ 801ae94:	429a      	cmp	r2, r3
+ 801ae96:	d204      	bcs.n	801aea2 <ip4_input+0x5e>
+    pbuf_realloc(p, iphdr_len);
+ 801ae98:	8a3b      	ldrh	r3, [r7, #16]
+ 801ae9a:	4619      	mov	r1, r3
+ 801ae9c:	6878      	ldr	r0, [r7, #4]
+ 801ae9e:	f7f6 fbf5 	bl	801168c <pbuf_realloc>
+  }
+
+  /* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */
+  if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len) || (iphdr_hlen < IP_HLEN)) {
+ 801aea2:	687b      	ldr	r3, [r7, #4]
+ 801aea4:	895b      	ldrh	r3, [r3, #10]
+ 801aea6:	8a7a      	ldrh	r2, [r7, #18]
+ 801aea8:	429a      	cmp	r2, r3
+ 801aeaa:	d807      	bhi.n	801aebc <ip4_input+0x78>
+ 801aeac:	687b      	ldr	r3, [r7, #4]
+ 801aeae:	891b      	ldrh	r3, [r3, #8]
+ 801aeb0:	8a3a      	ldrh	r2, [r7, #16]
+ 801aeb2:	429a      	cmp	r2, r3
+ 801aeb4:	d802      	bhi.n	801aebc <ip4_input+0x78>
+ 801aeb6:	8a7b      	ldrh	r3, [r7, #18]
+ 801aeb8:	2b13      	cmp	r3, #19
+ 801aeba:	d804      	bhi.n	801aec6 <ip4_input+0x82>
+      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
+                  ("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n",
+                   iphdr_len, p->tot_len));
+    }
+    /* free (drop) packet pbufs */
+    pbuf_free(p);
+ 801aebc:	6878      	ldr	r0, [r7, #4]
+ 801aebe:	f7f6 fd6b 	bl	8011998 <pbuf_free>
+    IP_STATS_INC(ip.lenerr);
+    IP_STATS_INC(ip.drop);
+    MIB2_STATS_INC(mib2.ipindiscards);
+    return ERR_OK;
+ 801aec2:	2300      	movs	r3, #0
+ 801aec4:	e0f5      	b.n	801b0b2 <ip4_input+0x26e>
+    }
+  }
+#endif
+
+  /* copy IP addresses to aligned ip_addr_t */
+  ip_addr_copy_from_ip4(ip_data.current_iphdr_dest, iphdr->dest);
+ 801aec6:	69fb      	ldr	r3, [r7, #28]
+ 801aec8:	691b      	ldr	r3, [r3, #16]
+ 801aeca:	4a7c      	ldr	r2, [pc, #496]	; (801b0bc <ip4_input+0x278>)
+ 801aecc:	6153      	str	r3, [r2, #20]
+  ip_addr_copy_from_ip4(ip_data.current_iphdr_src, iphdr->src);
+ 801aece:	69fb      	ldr	r3, [r7, #28]
+ 801aed0:	68db      	ldr	r3, [r3, #12]
+ 801aed2:	4a7a      	ldr	r2, [pc, #488]	; (801b0bc <ip4_input+0x278>)
+ 801aed4:	6113      	str	r3, [r2, #16]
+
+  /* match packet against an interface, i.e. is this packet for us? */
+  if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
+ 801aed6:	4b79      	ldr	r3, [pc, #484]	; (801b0bc <ip4_input+0x278>)
+ 801aed8:	695b      	ldr	r3, [r3, #20]
+ 801aeda:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
+ 801aede:	2be0      	cmp	r3, #224	; 0xe0
+ 801aee0:	d112      	bne.n	801af08 <ip4_input+0xc4>
+      netif = inp;
+    } else {
+      netif = NULL;
+    }
+#else /* LWIP_IGMP */
+    if ((netif_is_up(inp)) && (!ip4_addr_isany_val(*netif_ip4_addr(inp)))) {
+ 801aee2:	683b      	ldr	r3, [r7, #0]
+ 801aee4:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801aee8:	f003 0301 	and.w	r3, r3, #1
+ 801aeec:	b2db      	uxtb	r3, r3
+ 801aeee:	2b00      	cmp	r3, #0
+ 801aef0:	d007      	beq.n	801af02 <ip4_input+0xbe>
+ 801aef2:	683b      	ldr	r3, [r7, #0]
+ 801aef4:	3304      	adds	r3, #4
+ 801aef6:	681b      	ldr	r3, [r3, #0]
+ 801aef8:	2b00      	cmp	r3, #0
+ 801aefa:	d002      	beq.n	801af02 <ip4_input+0xbe>
+      netif = inp;
+ 801aefc:	683b      	ldr	r3, [r7, #0]
+ 801aefe:	61bb      	str	r3, [r7, #24]
+ 801af00:	e02a      	b.n	801af58 <ip4_input+0x114>
+    } else {
+      netif = NULL;
+ 801af02:	2300      	movs	r3, #0
+ 801af04:	61bb      	str	r3, [r7, #24]
+ 801af06:	e027      	b.n	801af58 <ip4_input+0x114>
+    }
+#endif /* LWIP_IGMP */
+  } else {
+    /* start trying with inp. if that's not acceptable, start walking the
+       list of configured netifs. */
+    if (ip4_input_accept(inp)) {
+ 801af08:	6838      	ldr	r0, [r7, #0]
+ 801af0a:	f7ff ff71 	bl	801adf0 <ip4_input_accept>
+ 801af0e:	4603      	mov	r3, r0
+ 801af10:	2b00      	cmp	r3, #0
+ 801af12:	d002      	beq.n	801af1a <ip4_input+0xd6>
+      netif = inp;
+ 801af14:	683b      	ldr	r3, [r7, #0]
+ 801af16:	61bb      	str	r3, [r7, #24]
+ 801af18:	e01e      	b.n	801af58 <ip4_input+0x114>
+    } else {
+      netif = NULL;
+ 801af1a:	2300      	movs	r3, #0
+ 801af1c:	61bb      	str	r3, [r7, #24]
+#if !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF
+      /* Packets sent to the loopback address must not be accepted on an
+       * interface that does not have the loopback address assigned to it,
+       * unless a non-loopback interface is used for loopback traffic. */
+      if (!ip4_addr_isloopback(ip4_current_dest_addr()))
+ 801af1e:	4b67      	ldr	r3, [pc, #412]	; (801b0bc <ip4_input+0x278>)
+ 801af20:	695b      	ldr	r3, [r3, #20]
+ 801af22:	b2db      	uxtb	r3, r3
+ 801af24:	2b7f      	cmp	r3, #127	; 0x7f
+ 801af26:	d017      	beq.n	801af58 <ip4_input+0x114>
+#endif /* !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF */
+      {
+#if !LWIP_SINGLE_NETIF
+        NETIF_FOREACH(netif) {
+ 801af28:	4b65      	ldr	r3, [pc, #404]	; (801b0c0 <ip4_input+0x27c>)
+ 801af2a:	681b      	ldr	r3, [r3, #0]
+ 801af2c:	61bb      	str	r3, [r7, #24]
+ 801af2e:	e00e      	b.n	801af4e <ip4_input+0x10a>
+          if (netif == inp) {
+ 801af30:	69ba      	ldr	r2, [r7, #24]
+ 801af32:	683b      	ldr	r3, [r7, #0]
+ 801af34:	429a      	cmp	r2, r3
+ 801af36:	d006      	beq.n	801af46 <ip4_input+0x102>
+            /* we checked that before already */
+            continue;
+          }
+          if (ip4_input_accept(netif)) {
+ 801af38:	69b8      	ldr	r0, [r7, #24]
+ 801af3a:	f7ff ff59 	bl	801adf0 <ip4_input_accept>
+ 801af3e:	4603      	mov	r3, r0
+ 801af40:	2b00      	cmp	r3, #0
+ 801af42:	d108      	bne.n	801af56 <ip4_input+0x112>
+ 801af44:	e000      	b.n	801af48 <ip4_input+0x104>
+            continue;
+ 801af46:	bf00      	nop
+        NETIF_FOREACH(netif) {
+ 801af48:	69bb      	ldr	r3, [r7, #24]
+ 801af4a:	681b      	ldr	r3, [r3, #0]
+ 801af4c:	61bb      	str	r3, [r7, #24]
+ 801af4e:	69bb      	ldr	r3, [r7, #24]
+ 801af50:	2b00      	cmp	r3, #0
+ 801af52:	d1ed      	bne.n	801af30 <ip4_input+0xec>
+ 801af54:	e000      	b.n	801af58 <ip4_input+0x114>
+            break;
+ 801af56:	bf00      	nop
+   * If you want to accept private broadcast communication while a netif is down,
+   * define LWIP_IP_ACCEPT_UDP_PORT(dst_port), e.g.:
+   *
+   * #define LWIP_IP_ACCEPT_UDP_PORT(dst_port) ((dst_port) == PP_NTOHS(12345))
+   */
+  if (netif == NULL) {
+ 801af58:	69bb      	ldr	r3, [r7, #24]
+ 801af5a:	2b00      	cmp	r3, #0
+ 801af5c:	d111      	bne.n	801af82 <ip4_input+0x13e>
+    /* remote port is DHCP server? */
+    if (IPH_PROTO(iphdr) == IP_PROTO_UDP) {
+ 801af5e:	69fb      	ldr	r3, [r7, #28]
+ 801af60:	7a5b      	ldrb	r3, [r3, #9]
+ 801af62:	2b11      	cmp	r3, #17
+ 801af64:	d10d      	bne.n	801af82 <ip4_input+0x13e>
+      const struct udp_hdr *udphdr = (const struct udp_hdr *)((const u8_t *)iphdr + iphdr_hlen);
+ 801af66:	8a7b      	ldrh	r3, [r7, #18]
+ 801af68:	69fa      	ldr	r2, [r7, #28]
+ 801af6a:	4413      	add	r3, r2
+ 801af6c:	60fb      	str	r3, [r7, #12]
+      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: UDP packet to DHCP client port %"U16_F"\n",
+                                              lwip_ntohs(udphdr->dest)));
+      if (IP_ACCEPT_LINK_LAYER_ADDRESSED_PORT(udphdr->dest)) {
+ 801af6e:	68fb      	ldr	r3, [r7, #12]
+ 801af70:	885b      	ldrh	r3, [r3, #2]
+ 801af72:	b29b      	uxth	r3, r3
+ 801af74:	f5b3 4f88 	cmp.w	r3, #17408	; 0x4400
+ 801af78:	d103      	bne.n	801af82 <ip4_input+0x13e>
+        LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: DHCP packet accepted.\n"));
+        netif = inp;
+ 801af7a:	683b      	ldr	r3, [r7, #0]
+ 801af7c:	61bb      	str	r3, [r7, #24]
+        check_ip_src = 0;
+ 801af7e:	2300      	movs	r3, #0
+ 801af80:	617b      	str	r3, [r7, #20]
+  }
+#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */
+
+  /* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */
+#if LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING
+  if (check_ip_src
+ 801af82:	697b      	ldr	r3, [r7, #20]
+ 801af84:	2b00      	cmp	r3, #0
+ 801af86:	d017      	beq.n	801afb8 <ip4_input+0x174>
+#if IP_ACCEPT_LINK_LAYER_ADDRESSING
+      /* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */
+      && !ip4_addr_isany_val(*ip4_current_src_addr())
+ 801af88:	4b4c      	ldr	r3, [pc, #304]	; (801b0bc <ip4_input+0x278>)
+ 801af8a:	691b      	ldr	r3, [r3, #16]
+ 801af8c:	2b00      	cmp	r3, #0
+ 801af8e:	d013      	beq.n	801afb8 <ip4_input+0x174>
+#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */
+     )
+#endif /* LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING */
+  {
+    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
+ 801af90:	4b4a      	ldr	r3, [pc, #296]	; (801b0bc <ip4_input+0x278>)
+ 801af92:	691b      	ldr	r3, [r3, #16]
+ 801af94:	6839      	ldr	r1, [r7, #0]
+ 801af96:	4618      	mov	r0, r3
+ 801af98:	f000 f96c 	bl	801b274 <ip4_addr_isbroadcast_u32>
+ 801af9c:	4603      	mov	r3, r0
+ 801af9e:	2b00      	cmp	r3, #0
+ 801afa0:	d105      	bne.n	801afae <ip4_input+0x16a>
+        (ip4_addr_ismulticast(ip4_current_src_addr()))) {
+ 801afa2:	4b46      	ldr	r3, [pc, #280]	; (801b0bc <ip4_input+0x278>)
+ 801afa4:	691b      	ldr	r3, [r3, #16]
+ 801afa6:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
+    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
+ 801afaa:	2be0      	cmp	r3, #224	; 0xe0
+ 801afac:	d104      	bne.n	801afb8 <ip4_input+0x174>
+      /* packet source is not valid */
+      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip4_input: packet source is not valid.\n"));
+      /* free (drop) packet pbufs */
+      pbuf_free(p);
+ 801afae:	6878      	ldr	r0, [r7, #4]
+ 801afb0:	f7f6 fcf2 	bl	8011998 <pbuf_free>
+      IP_STATS_INC(ip.drop);
+      MIB2_STATS_INC(mib2.ipinaddrerrors);
+      MIB2_STATS_INC(mib2.ipindiscards);
+      return ERR_OK;
+ 801afb4:	2300      	movs	r3, #0
+ 801afb6:	e07c      	b.n	801b0b2 <ip4_input+0x26e>
+    }
+  }
+
+  /* packet not for us? */
+  if (netif == NULL) {
+ 801afb8:	69bb      	ldr	r3, [r7, #24]
+ 801afba:	2b00      	cmp	r3, #0
+ 801afbc:	d104      	bne.n	801afc8 <ip4_input+0x184>
+    {
+      IP_STATS_INC(ip.drop);
+      MIB2_STATS_INC(mib2.ipinaddrerrors);
+      MIB2_STATS_INC(mib2.ipindiscards);
+    }
+    pbuf_free(p);
+ 801afbe:	6878      	ldr	r0, [r7, #4]
+ 801afc0:	f7f6 fcea 	bl	8011998 <pbuf_free>
+    return ERR_OK;
+ 801afc4:	2300      	movs	r3, #0
+ 801afc6:	e074      	b.n	801b0b2 <ip4_input+0x26e>
+  }
+  /* packet consists of multiple fragments? */
+  if ((IPH_OFFSET(iphdr) & PP_HTONS(IP_OFFMASK | IP_MF)) != 0) {
+ 801afc8:	69fb      	ldr	r3, [r7, #28]
+ 801afca:	88db      	ldrh	r3, [r3, #6]
+ 801afcc:	b29b      	uxth	r3, r3
+ 801afce:	461a      	mov	r2, r3
+ 801afd0:	f64f 733f 	movw	r3, #65343	; 0xff3f
+ 801afd4:	4013      	ands	r3, r2
+ 801afd6:	2b00      	cmp	r3, #0
+ 801afd8:	d00b      	beq.n	801aff2 <ip4_input+0x1ae>
+#if IP_REASSEMBLY /* packet fragment reassembly code present? */
+    LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip4_reass()\n",
+                           lwip_ntohs(IPH_ID(iphdr)), p->tot_len, lwip_ntohs(IPH_LEN(iphdr)), (u16_t)!!(IPH_OFFSET(iphdr) & PP_HTONS(IP_MF)), (u16_t)((lwip_ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK) * 8)));
+    /* reassemble the packet*/
+    p = ip4_reass(p);
+ 801afda:	6878      	ldr	r0, [r7, #4]
+ 801afdc:	f000 fc90 	bl	801b900 <ip4_reass>
+ 801afe0:	6078      	str	r0, [r7, #4]
+    /* packet not fully reassembled yet? */
+    if (p == NULL) {
+ 801afe2:	687b      	ldr	r3, [r7, #4]
+ 801afe4:	2b00      	cmp	r3, #0
+ 801afe6:	d101      	bne.n	801afec <ip4_input+0x1a8>
+      return ERR_OK;
+ 801afe8:	2300      	movs	r3, #0
+ 801afea:	e062      	b.n	801b0b2 <ip4_input+0x26e>
+    }
+    iphdr = (const struct ip_hdr *)p->payload;
+ 801afec:	687b      	ldr	r3, [r7, #4]
+ 801afee:	685b      	ldr	r3, [r3, #4]
+ 801aff0:	61fb      	str	r3, [r7, #28]
+  /* send to upper layers */
+  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: \n"));
+  ip4_debug_print(p);
+  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len));
+
+  ip_data.current_netif = netif;
+ 801aff2:	4a32      	ldr	r2, [pc, #200]	; (801b0bc <ip4_input+0x278>)
+ 801aff4:	69bb      	ldr	r3, [r7, #24]
+ 801aff6:	6013      	str	r3, [r2, #0]
+  ip_data.current_input_netif = inp;
+ 801aff8:	4a30      	ldr	r2, [pc, #192]	; (801b0bc <ip4_input+0x278>)
+ 801affa:	683b      	ldr	r3, [r7, #0]
+ 801affc:	6053      	str	r3, [r2, #4]
+  ip_data.current_ip4_header = iphdr;
+ 801affe:	4a2f      	ldr	r2, [pc, #188]	; (801b0bc <ip4_input+0x278>)
+ 801b000:	69fb      	ldr	r3, [r7, #28]
+ 801b002:	6093      	str	r3, [r2, #8]
+  ip_data.current_ip_header_tot_len = IPH_HL_BYTES(iphdr);
+ 801b004:	69fb      	ldr	r3, [r7, #28]
+ 801b006:	781b      	ldrb	r3, [r3, #0]
+ 801b008:	f003 030f 	and.w	r3, r3, #15
+ 801b00c:	b2db      	uxtb	r3, r3
+ 801b00e:	009b      	lsls	r3, r3, #2
+ 801b010:	b2db      	uxtb	r3, r3
+ 801b012:	b29a      	uxth	r2, r3
+ 801b014:	4b29      	ldr	r3, [pc, #164]	; (801b0bc <ip4_input+0x278>)
+ 801b016:	819a      	strh	r2, [r3, #12]
+  /* raw input did not eat the packet? */
+  raw_status = raw_input(p, inp);
+  if (raw_status != RAW_INPUT_EATEN)
+#endif /* LWIP_RAW */
+  {
+    pbuf_remove_header(p, iphdr_hlen); /* Move to payload, no check necessary. */
+ 801b018:	8a7b      	ldrh	r3, [r7, #18]
+ 801b01a:	4619      	mov	r1, r3
+ 801b01c:	6878      	ldr	r0, [r7, #4]
+ 801b01e:	f7f6 fc35 	bl	801188c <pbuf_remove_header>
+
+    switch (IPH_PROTO(iphdr)) {
+ 801b022:	69fb      	ldr	r3, [r7, #28]
+ 801b024:	7a5b      	ldrb	r3, [r3, #9]
+ 801b026:	2b06      	cmp	r3, #6
+ 801b028:	d009      	beq.n	801b03e <ip4_input+0x1fa>
+ 801b02a:	2b11      	cmp	r3, #17
+ 801b02c:	d002      	beq.n	801b034 <ip4_input+0x1f0>
+ 801b02e:	2b01      	cmp	r3, #1
+ 801b030:	d00a      	beq.n	801b048 <ip4_input+0x204>
+ 801b032:	e00e      	b.n	801b052 <ip4_input+0x20e>
+      case IP_PROTO_UDP:
+#if LWIP_UDPLITE
+      case IP_PROTO_UDPLITE:
+#endif /* LWIP_UDPLITE */
+        MIB2_STATS_INC(mib2.ipindelivers);
+        udp_input(p, inp);
+ 801b034:	6839      	ldr	r1, [r7, #0]
+ 801b036:	6878      	ldr	r0, [r7, #4]
+ 801b038:	f7fc fada 	bl	80175f0 <udp_input>
+        break;
+ 801b03c:	e026      	b.n	801b08c <ip4_input+0x248>
+#endif /* LWIP_UDP */
+#if LWIP_TCP
+      case IP_PROTO_TCP:
+        MIB2_STATS_INC(mib2.ipindelivers);
+        tcp_input(p, inp);
+ 801b03e:	6839      	ldr	r1, [r7, #0]
+ 801b040:	6878      	ldr	r0, [r7, #4]
+ 801b042:	f7f8 fae1 	bl	8013608 <tcp_input>
+        break;
+ 801b046:	e021      	b.n	801b08c <ip4_input+0x248>
+#endif /* LWIP_TCP */
+#if LWIP_ICMP
+      case IP_PROTO_ICMP:
+        MIB2_STATS_INC(mib2.ipindelivers);
+        icmp_input(p, inp);
+ 801b048:	6839      	ldr	r1, [r7, #0]
+ 801b04a:	6878      	ldr	r0, [r7, #4]
+ 801b04c:	f7ff fcd2 	bl	801a9f4 <icmp_input>
+        break;
+ 801b050:	e01c      	b.n	801b08c <ip4_input+0x248>
+        } else
+#endif /* LWIP_RAW */
+        {
+#if LWIP_ICMP
+          /* send ICMP destination protocol unreachable unless is was a broadcast */
+          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
+ 801b052:	4b1a      	ldr	r3, [pc, #104]	; (801b0bc <ip4_input+0x278>)
+ 801b054:	695b      	ldr	r3, [r3, #20]
+ 801b056:	69b9      	ldr	r1, [r7, #24]
+ 801b058:	4618      	mov	r0, r3
+ 801b05a:	f000 f90b 	bl	801b274 <ip4_addr_isbroadcast_u32>
+ 801b05e:	4603      	mov	r3, r0
+ 801b060:	2b00      	cmp	r3, #0
+ 801b062:	d10f      	bne.n	801b084 <ip4_input+0x240>
+              !ip4_addr_ismulticast(ip4_current_dest_addr())) {
+ 801b064:	4b15      	ldr	r3, [pc, #84]	; (801b0bc <ip4_input+0x278>)
+ 801b066:	695b      	ldr	r3, [r3, #20]
+ 801b068:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
+          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
+ 801b06c:	2be0      	cmp	r3, #224	; 0xe0
+ 801b06e:	d009      	beq.n	801b084 <ip4_input+0x240>
+            pbuf_header_force(p, (s16_t)iphdr_hlen); /* Move to ip header, no check necessary. */
+ 801b070:	f9b7 3012 	ldrsh.w	r3, [r7, #18]
+ 801b074:	4619      	mov	r1, r3
+ 801b076:	6878      	ldr	r0, [r7, #4]
+ 801b078:	f7f6 fc7b 	bl	8011972 <pbuf_header_force>
+            icmp_dest_unreach(p, ICMP_DUR_PROTO);
+ 801b07c:	2102      	movs	r1, #2
+ 801b07e:	6878      	ldr	r0, [r7, #4]
+ 801b080:	f7ff fdbc 	bl	801abfc <icmp_dest_unreach>
+
+          IP_STATS_INC(ip.proterr);
+          IP_STATS_INC(ip.drop);
+          MIB2_STATS_INC(mib2.ipinunknownprotos);
+        }
+        pbuf_free(p);
+ 801b084:	6878      	ldr	r0, [r7, #4]
+ 801b086:	f7f6 fc87 	bl	8011998 <pbuf_free>
+        break;
+ 801b08a:	bf00      	nop
+    }
+  }
+
+  /* @todo: this is not really necessary... */
+  ip_data.current_netif = NULL;
+ 801b08c:	4b0b      	ldr	r3, [pc, #44]	; (801b0bc <ip4_input+0x278>)
+ 801b08e:	2200      	movs	r2, #0
+ 801b090:	601a      	str	r2, [r3, #0]
+  ip_data.current_input_netif = NULL;
+ 801b092:	4b0a      	ldr	r3, [pc, #40]	; (801b0bc <ip4_input+0x278>)
+ 801b094:	2200      	movs	r2, #0
+ 801b096:	605a      	str	r2, [r3, #4]
+  ip_data.current_ip4_header = NULL;
+ 801b098:	4b08      	ldr	r3, [pc, #32]	; (801b0bc <ip4_input+0x278>)
+ 801b09a:	2200      	movs	r2, #0
+ 801b09c:	609a      	str	r2, [r3, #8]
+  ip_data.current_ip_header_tot_len = 0;
+ 801b09e:	4b07      	ldr	r3, [pc, #28]	; (801b0bc <ip4_input+0x278>)
+ 801b0a0:	2200      	movs	r2, #0
+ 801b0a2:	819a      	strh	r2, [r3, #12]
+  ip4_addr_set_any(ip4_current_src_addr());
+ 801b0a4:	4b05      	ldr	r3, [pc, #20]	; (801b0bc <ip4_input+0x278>)
+ 801b0a6:	2200      	movs	r2, #0
+ 801b0a8:	611a      	str	r2, [r3, #16]
+  ip4_addr_set_any(ip4_current_dest_addr());
+ 801b0aa:	4b04      	ldr	r3, [pc, #16]	; (801b0bc <ip4_input+0x278>)
+ 801b0ac:	2200      	movs	r2, #0
+ 801b0ae:	615a      	str	r2, [r3, #20]
+
+  return ERR_OK;
+ 801b0b0:	2300      	movs	r3, #0
+}
+ 801b0b2:	4618      	mov	r0, r3
+ 801b0b4:	3720      	adds	r7, #32
+ 801b0b6:	46bd      	mov	sp, r7
+ 801b0b8:	bd80      	pop	{r7, pc}
+ 801b0ba:	bf00      	nop
+ 801b0bc:	2000c0b4 	.word	0x2000c0b4
+ 801b0c0:	2000f7d8 	.word	0x2000f7d8
+
+0801b0c4 <ip4_output_if>:
+ */
+err_t
+ip4_output_if(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
+              u8_t ttl, u8_t tos,
+              u8_t proto, struct netif *netif)
+{
+ 801b0c4:	b580      	push	{r7, lr}
+ 801b0c6:	b08a      	sub	sp, #40	; 0x28
+ 801b0c8:	af04      	add	r7, sp, #16
+ 801b0ca:	60f8      	str	r0, [r7, #12]
+ 801b0cc:	60b9      	str	r1, [r7, #8]
+ 801b0ce:	607a      	str	r2, [r7, #4]
+ 801b0d0:	70fb      	strb	r3, [r7, #3]
+ip4_output_if_opt(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
+                  u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options,
+                  u16_t optlen)
+{
+#endif /* IP_OPTIONS_SEND */
+  const ip4_addr_t *src_used = src;
+ 801b0d2:	68bb      	ldr	r3, [r7, #8]
+ 801b0d4:	617b      	str	r3, [r7, #20]
+  if (dest != LWIP_IP_HDRINCL) {
+ 801b0d6:	687b      	ldr	r3, [r7, #4]
+ 801b0d8:	2b00      	cmp	r3, #0
+ 801b0da:	d009      	beq.n	801b0f0 <ip4_output_if+0x2c>
+    if (ip4_addr_isany(src)) {
+ 801b0dc:	68bb      	ldr	r3, [r7, #8]
+ 801b0de:	2b00      	cmp	r3, #0
+ 801b0e0:	d003      	beq.n	801b0ea <ip4_output_if+0x26>
+ 801b0e2:	68bb      	ldr	r3, [r7, #8]
+ 801b0e4:	681b      	ldr	r3, [r3, #0]
+ 801b0e6:	2b00      	cmp	r3, #0
+ 801b0e8:	d102      	bne.n	801b0f0 <ip4_output_if+0x2c>
+      src_used = netif_ip4_addr(netif);
+ 801b0ea:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b0ec:	3304      	adds	r3, #4
+ 801b0ee:	617b      	str	r3, [r7, #20]
+
+#if IP_OPTIONS_SEND
+  return ip4_output_if_opt_src(p, src_used, dest, ttl, tos, proto, netif,
+                               ip_options, optlen);
+#else /* IP_OPTIONS_SEND */
+  return ip4_output_if_src(p, src_used, dest, ttl, tos, proto, netif);
+ 801b0f0:	78fa      	ldrb	r2, [r7, #3]
+ 801b0f2:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b0f4:	9302      	str	r3, [sp, #8]
+ 801b0f6:	f897 3024 	ldrb.w	r3, [r7, #36]	; 0x24
+ 801b0fa:	9301      	str	r3, [sp, #4]
+ 801b0fc:	f897 3020 	ldrb.w	r3, [r7, #32]
+ 801b100:	9300      	str	r3, [sp, #0]
+ 801b102:	4613      	mov	r3, r2
+ 801b104:	687a      	ldr	r2, [r7, #4]
+ 801b106:	6979      	ldr	r1, [r7, #20]
+ 801b108:	68f8      	ldr	r0, [r7, #12]
+ 801b10a:	f000 f805 	bl	801b118 <ip4_output_if_src>
+ 801b10e:	4603      	mov	r3, r0
+#endif /* IP_OPTIONS_SEND */
+}
+ 801b110:	4618      	mov	r0, r3
+ 801b112:	3718      	adds	r7, #24
+ 801b114:	46bd      	mov	sp, r7
+ 801b116:	bd80      	pop	{r7, pc}
+
+0801b118 <ip4_output_if_src>:
+ */
+err_t
+ip4_output_if_src(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
+                  u8_t ttl, u8_t tos,
+                  u8_t proto, struct netif *netif)
+{
+ 801b118:	b580      	push	{r7, lr}
+ 801b11a:	b088      	sub	sp, #32
+ 801b11c:	af00      	add	r7, sp, #0
+ 801b11e:	60f8      	str	r0, [r7, #12]
+ 801b120:	60b9      	str	r1, [r7, #8]
+ 801b122:	607a      	str	r2, [r7, #4]
+ 801b124:	70fb      	strb	r3, [r7, #3]
+#if CHECKSUM_GEN_IP_INLINE
+  u32_t chk_sum = 0;
+#endif /* CHECKSUM_GEN_IP_INLINE */
+
+  LWIP_ASSERT_CORE_LOCKED();
+  LWIP_IP_CHECK_PBUF_REF_COUNT_FOR_TX(p);
+ 801b126:	68fb      	ldr	r3, [r7, #12]
+ 801b128:	7b9b      	ldrb	r3, [r3, #14]
+ 801b12a:	2b01      	cmp	r3, #1
+ 801b12c:	d006      	beq.n	801b13c <ip4_output_if_src+0x24>
+ 801b12e:	4b4b      	ldr	r3, [pc, #300]	; (801b25c <ip4_output_if_src+0x144>)
+ 801b130:	f44f 7255 	mov.w	r2, #852	; 0x354
+ 801b134:	494a      	ldr	r1, [pc, #296]	; (801b260 <ip4_output_if_src+0x148>)
+ 801b136:	484b      	ldr	r0, [pc, #300]	; (801b264 <ip4_output_if_src+0x14c>)
+ 801b138:	f001 f95e 	bl	801c3f8 <iprintf>
+
+  MIB2_STATS_INC(mib2.ipoutrequests);
+
+  /* Should the IP header be generated or is it already included in p? */
+  if (dest != LWIP_IP_HDRINCL) {
+ 801b13c:	687b      	ldr	r3, [r7, #4]
+ 801b13e:	2b00      	cmp	r3, #0
+ 801b140:	d060      	beq.n	801b204 <ip4_output_if_src+0xec>
+    u16_t ip_hlen = IP_HLEN;
+ 801b142:	2314      	movs	r3, #20
+ 801b144:	837b      	strh	r3, [r7, #26]
+      }
+#endif /* CHECKSUM_GEN_IP_INLINE */
+    }
+#endif /* IP_OPTIONS_SEND */
+    /* generate IP header */
+    if (pbuf_add_header(p, IP_HLEN)) {
+ 801b146:	2114      	movs	r1, #20
+ 801b148:	68f8      	ldr	r0, [r7, #12]
+ 801b14a:	f7f6 fb8f 	bl	801186c <pbuf_add_header>
+ 801b14e:	4603      	mov	r3, r0
+ 801b150:	2b00      	cmp	r3, #0
+ 801b152:	d002      	beq.n	801b15a <ip4_output_if_src+0x42>
+      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: not enough room for IP header in pbuf\n"));
+
+      IP_STATS_INC(ip.err);
+      MIB2_STATS_INC(mib2.ipoutdiscards);
+      return ERR_BUF;
+ 801b154:	f06f 0301 	mvn.w	r3, #1
+ 801b158:	e07c      	b.n	801b254 <ip4_output_if_src+0x13c>
+    }
+
+    iphdr = (struct ip_hdr *)p->payload;
+ 801b15a:	68fb      	ldr	r3, [r7, #12]
+ 801b15c:	685b      	ldr	r3, [r3, #4]
+ 801b15e:	61fb      	str	r3, [r7, #28]
+    LWIP_ASSERT("check that first pbuf can hold struct ip_hdr",
+ 801b160:	68fb      	ldr	r3, [r7, #12]
+ 801b162:	895b      	ldrh	r3, [r3, #10]
+ 801b164:	2b13      	cmp	r3, #19
+ 801b166:	d806      	bhi.n	801b176 <ip4_output_if_src+0x5e>
+ 801b168:	4b3c      	ldr	r3, [pc, #240]	; (801b25c <ip4_output_if_src+0x144>)
+ 801b16a:	f240 3289 	movw	r2, #905	; 0x389
+ 801b16e:	493e      	ldr	r1, [pc, #248]	; (801b268 <ip4_output_if_src+0x150>)
+ 801b170:	483c      	ldr	r0, [pc, #240]	; (801b264 <ip4_output_if_src+0x14c>)
+ 801b172:	f001 f941 	bl	801c3f8 <iprintf>
+                (p->len >= sizeof(struct ip_hdr)));
+
+    IPH_TTL_SET(iphdr, ttl);
+ 801b176:	69fb      	ldr	r3, [r7, #28]
+ 801b178:	78fa      	ldrb	r2, [r7, #3]
+ 801b17a:	721a      	strb	r2, [r3, #8]
+    IPH_PROTO_SET(iphdr, proto);
+ 801b17c:	69fb      	ldr	r3, [r7, #28]
+ 801b17e:	f897 202c 	ldrb.w	r2, [r7, #44]	; 0x2c
+ 801b182:	725a      	strb	r2, [r3, #9]
+#if CHECKSUM_GEN_IP_INLINE
+    chk_sum += PP_NTOHS(proto | (ttl << 8));
+#endif /* CHECKSUM_GEN_IP_INLINE */
+
+    /* dest cannot be NULL here */
+    ip4_addr_copy(iphdr->dest, *dest);
+ 801b184:	687b      	ldr	r3, [r7, #4]
+ 801b186:	681a      	ldr	r2, [r3, #0]
+ 801b188:	69fb      	ldr	r3, [r7, #28]
+ 801b18a:	611a      	str	r2, [r3, #16]
+#if CHECKSUM_GEN_IP_INLINE
+    chk_sum += ip4_addr_get_u32(&iphdr->dest) & 0xFFFF;
+    chk_sum += ip4_addr_get_u32(&iphdr->dest) >> 16;
+#endif /* CHECKSUM_GEN_IP_INLINE */
+
+    IPH_VHL_SET(iphdr, 4, ip_hlen / 4);
+ 801b18c:	8b7b      	ldrh	r3, [r7, #26]
+ 801b18e:	089b      	lsrs	r3, r3, #2
+ 801b190:	b29b      	uxth	r3, r3
+ 801b192:	b2db      	uxtb	r3, r3
+ 801b194:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 801b198:	b2da      	uxtb	r2, r3
+ 801b19a:	69fb      	ldr	r3, [r7, #28]
+ 801b19c:	701a      	strb	r2, [r3, #0]
+    IPH_TOS_SET(iphdr, tos);
+ 801b19e:	69fb      	ldr	r3, [r7, #28]
+ 801b1a0:	f897 2028 	ldrb.w	r2, [r7, #40]	; 0x28
+ 801b1a4:	705a      	strb	r2, [r3, #1]
+#if CHECKSUM_GEN_IP_INLINE
+    chk_sum += PP_NTOHS(tos | (iphdr->_v_hl << 8));
+#endif /* CHECKSUM_GEN_IP_INLINE */
+    IPH_LEN_SET(iphdr, lwip_htons(p->tot_len));
+ 801b1a6:	68fb      	ldr	r3, [r7, #12]
+ 801b1a8:	891b      	ldrh	r3, [r3, #8]
+ 801b1aa:	4618      	mov	r0, r3
+ 801b1ac:	f7f5 f840 	bl	8010230 <lwip_htons>
+ 801b1b0:	4603      	mov	r3, r0
+ 801b1b2:	461a      	mov	r2, r3
+ 801b1b4:	69fb      	ldr	r3, [r7, #28]
+ 801b1b6:	805a      	strh	r2, [r3, #2]
+#if CHECKSUM_GEN_IP_INLINE
+    chk_sum += iphdr->_len;
+#endif /* CHECKSUM_GEN_IP_INLINE */
+    IPH_OFFSET_SET(iphdr, 0);
+ 801b1b8:	69fb      	ldr	r3, [r7, #28]
+ 801b1ba:	2200      	movs	r2, #0
+ 801b1bc:	719a      	strb	r2, [r3, #6]
+ 801b1be:	2200      	movs	r2, #0
+ 801b1c0:	71da      	strb	r2, [r3, #7]
+    IPH_ID_SET(iphdr, lwip_htons(ip_id));
+ 801b1c2:	4b2a      	ldr	r3, [pc, #168]	; (801b26c <ip4_output_if_src+0x154>)
+ 801b1c4:	881b      	ldrh	r3, [r3, #0]
+ 801b1c6:	4618      	mov	r0, r3
+ 801b1c8:	f7f5 f832 	bl	8010230 <lwip_htons>
+ 801b1cc:	4603      	mov	r3, r0
+ 801b1ce:	461a      	mov	r2, r3
+ 801b1d0:	69fb      	ldr	r3, [r7, #28]
+ 801b1d2:	809a      	strh	r2, [r3, #4]
+#if CHECKSUM_GEN_IP_INLINE
+    chk_sum += iphdr->_id;
+#endif /* CHECKSUM_GEN_IP_INLINE */
+    ++ip_id;
+ 801b1d4:	4b25      	ldr	r3, [pc, #148]	; (801b26c <ip4_output_if_src+0x154>)
+ 801b1d6:	881b      	ldrh	r3, [r3, #0]
+ 801b1d8:	3301      	adds	r3, #1
+ 801b1da:	b29a      	uxth	r2, r3
+ 801b1dc:	4b23      	ldr	r3, [pc, #140]	; (801b26c <ip4_output_if_src+0x154>)
+ 801b1de:	801a      	strh	r2, [r3, #0]
+
+    if (src == NULL) {
+ 801b1e0:	68bb      	ldr	r3, [r7, #8]
+ 801b1e2:	2b00      	cmp	r3, #0
+ 801b1e4:	d104      	bne.n	801b1f0 <ip4_output_if_src+0xd8>
+      ip4_addr_copy(iphdr->src, *IP4_ADDR_ANY4);
+ 801b1e6:	4b22      	ldr	r3, [pc, #136]	; (801b270 <ip4_output_if_src+0x158>)
+ 801b1e8:	681a      	ldr	r2, [r3, #0]
+ 801b1ea:	69fb      	ldr	r3, [r7, #28]
+ 801b1ec:	60da      	str	r2, [r3, #12]
+ 801b1ee:	e003      	b.n	801b1f8 <ip4_output_if_src+0xe0>
+    } else {
+      /* src cannot be NULL here */
+      ip4_addr_copy(iphdr->src, *src);
+ 801b1f0:	68bb      	ldr	r3, [r7, #8]
+ 801b1f2:	681a      	ldr	r2, [r3, #0]
+ 801b1f4:	69fb      	ldr	r3, [r7, #28]
+ 801b1f6:	60da      	str	r2, [r3, #12]
+    else {
+      IPH_CHKSUM_SET(iphdr, 0);
+    }
+#endif /* LWIP_CHECKSUM_CTRL_PER_NETIF*/
+#else /* CHECKSUM_GEN_IP_INLINE */
+    IPH_CHKSUM_SET(iphdr, 0);
+ 801b1f8:	69fb      	ldr	r3, [r7, #28]
+ 801b1fa:	2200      	movs	r2, #0
+ 801b1fc:	729a      	strb	r2, [r3, #10]
+ 801b1fe:	2200      	movs	r2, #0
+ 801b200:	72da      	strb	r2, [r3, #11]
+ 801b202:	e00f      	b.n	801b224 <ip4_output_if_src+0x10c>
+    }
+#endif /* CHECKSUM_GEN_IP */
+#endif /* CHECKSUM_GEN_IP_INLINE */
+  } else {
+    /* IP header already included in p */
+    if (p->len < IP_HLEN) {
+ 801b204:	68fb      	ldr	r3, [r7, #12]
+ 801b206:	895b      	ldrh	r3, [r3, #10]
+ 801b208:	2b13      	cmp	r3, #19
+ 801b20a:	d802      	bhi.n	801b212 <ip4_output_if_src+0xfa>
+      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: LWIP_IP_HDRINCL but pbuf is too short\n"));
+      IP_STATS_INC(ip.err);
+      MIB2_STATS_INC(mib2.ipoutdiscards);
+      return ERR_BUF;
+ 801b20c:	f06f 0301 	mvn.w	r3, #1
+ 801b210:	e020      	b.n	801b254 <ip4_output_if_src+0x13c>
+    }
+    iphdr = (struct ip_hdr *)p->payload;
+ 801b212:	68fb      	ldr	r3, [r7, #12]
+ 801b214:	685b      	ldr	r3, [r3, #4]
+ 801b216:	61fb      	str	r3, [r7, #28]
+    ip4_addr_copy(dest_addr, iphdr->dest);
+ 801b218:	69fb      	ldr	r3, [r7, #28]
+ 801b21a:	691b      	ldr	r3, [r3, #16]
+ 801b21c:	617b      	str	r3, [r7, #20]
+    dest = &dest_addr;
+ 801b21e:	f107 0314 	add.w	r3, r7, #20
+ 801b222:	607b      	str	r3, [r7, #4]
+  }
+#endif /* LWIP_MULTICAST_TX_OPTIONS */
+#endif /* ENABLE_LOOPBACK */
+#if IP_FRAG
+  /* don't fragment if interface has mtu set to 0 [loopif] */
+  if (netif->mtu && (p->tot_len > netif->mtu)) {
+ 801b224:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801b226:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 801b228:	2b00      	cmp	r3, #0
+ 801b22a:	d00c      	beq.n	801b246 <ip4_output_if_src+0x12e>
+ 801b22c:	68fb      	ldr	r3, [r7, #12]
+ 801b22e:	891a      	ldrh	r2, [r3, #8]
+ 801b230:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801b232:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 801b234:	429a      	cmp	r2, r3
+ 801b236:	d906      	bls.n	801b246 <ip4_output_if_src+0x12e>
+    return ip4_frag(p, netif, dest);
+ 801b238:	687a      	ldr	r2, [r7, #4]
+ 801b23a:	6b39      	ldr	r1, [r7, #48]	; 0x30
+ 801b23c:	68f8      	ldr	r0, [r7, #12]
+ 801b23e:	f000 fd4b 	bl	801bcd8 <ip4_frag>
+ 801b242:	4603      	mov	r3, r0
+ 801b244:	e006      	b.n	801b254 <ip4_output_if_src+0x13c>
+  }
+#endif /* IP_FRAG */
+
+  LWIP_DEBUGF(IP_DEBUG, ("ip4_output_if: call netif->output()\n"));
+  return netif->output(netif, p, dest);
+ 801b246:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801b248:	695b      	ldr	r3, [r3, #20]
+ 801b24a:	687a      	ldr	r2, [r7, #4]
+ 801b24c:	68f9      	ldr	r1, [r7, #12]
+ 801b24e:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 801b250:	4798      	blx	r3
+ 801b252:	4603      	mov	r3, r0
+}
+ 801b254:	4618      	mov	r0, r3
+ 801b256:	3720      	adds	r7, #32
+ 801b258:	46bd      	mov	sp, r7
+ 801b25a:	bd80      	pop	{r7, pc}
+ 801b25c:	080201d8 	.word	0x080201d8
+ 801b260:	0802020c 	.word	0x0802020c
+ 801b264:	08020218 	.word	0x08020218
+ 801b268:	08020240 	.word	0x08020240
+ 801b26c:	20008856 	.word	0x20008856
+ 801b270:	08022598 	.word	0x08022598
+
+0801b274 <ip4_addr_isbroadcast_u32>:
+ * @param netif the network interface against which the address is checked
+ * @return returns non-zero if the address is a broadcast address
+ */
+u8_t
+ip4_addr_isbroadcast_u32(u32_t addr, const struct netif *netif)
+{
+ 801b274:	b480      	push	{r7}
+ 801b276:	b085      	sub	sp, #20
+ 801b278:	af00      	add	r7, sp, #0
+ 801b27a:	6078      	str	r0, [r7, #4]
+ 801b27c:	6039      	str	r1, [r7, #0]
+  ip4_addr_t ipaddr;
+  ip4_addr_set_u32(&ipaddr, addr);
+ 801b27e:	687b      	ldr	r3, [r7, #4]
+ 801b280:	60fb      	str	r3, [r7, #12]
+
+  /* all ones (broadcast) or all zeroes (old skool broadcast) */
+  if ((~addr == IPADDR_ANY) ||
+ 801b282:	687b      	ldr	r3, [r7, #4]
+ 801b284:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 801b288:	d002      	beq.n	801b290 <ip4_addr_isbroadcast_u32+0x1c>
+ 801b28a:	687b      	ldr	r3, [r7, #4]
+ 801b28c:	2b00      	cmp	r3, #0
+ 801b28e:	d101      	bne.n	801b294 <ip4_addr_isbroadcast_u32+0x20>
+      (addr == IPADDR_ANY)) {
+    return 1;
+ 801b290:	2301      	movs	r3, #1
+ 801b292:	e02a      	b.n	801b2ea <ip4_addr_isbroadcast_u32+0x76>
+    /* no broadcast support on this network interface? */
+  } else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) {
+ 801b294:	683b      	ldr	r3, [r7, #0]
+ 801b296:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801b29a:	f003 0302 	and.w	r3, r3, #2
+ 801b29e:	2b00      	cmp	r3, #0
+ 801b2a0:	d101      	bne.n	801b2a6 <ip4_addr_isbroadcast_u32+0x32>
+    /* the given address cannot be a broadcast address
+     * nor can we check against any broadcast addresses */
+    return 0;
+ 801b2a2:	2300      	movs	r3, #0
+ 801b2a4:	e021      	b.n	801b2ea <ip4_addr_isbroadcast_u32+0x76>
+    /* address matches network interface address exactly? => no broadcast */
+  } else if (addr == ip4_addr_get_u32(netif_ip4_addr(netif))) {
+ 801b2a6:	683b      	ldr	r3, [r7, #0]
+ 801b2a8:	3304      	adds	r3, #4
+ 801b2aa:	681b      	ldr	r3, [r3, #0]
+ 801b2ac:	687a      	ldr	r2, [r7, #4]
+ 801b2ae:	429a      	cmp	r2, r3
+ 801b2b0:	d101      	bne.n	801b2b6 <ip4_addr_isbroadcast_u32+0x42>
+    return 0;
+ 801b2b2:	2300      	movs	r3, #0
+ 801b2b4:	e019      	b.n	801b2ea <ip4_addr_isbroadcast_u32+0x76>
+    /*  on the same (sub) network... */
+  } else if (ip4_addr_netcmp(&ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif))
+ 801b2b6:	68fa      	ldr	r2, [r7, #12]
+ 801b2b8:	683b      	ldr	r3, [r7, #0]
+ 801b2ba:	3304      	adds	r3, #4
+ 801b2bc:	681b      	ldr	r3, [r3, #0]
+ 801b2be:	405a      	eors	r2, r3
+ 801b2c0:	683b      	ldr	r3, [r7, #0]
+ 801b2c2:	3308      	adds	r3, #8
+ 801b2c4:	681b      	ldr	r3, [r3, #0]
+ 801b2c6:	4013      	ands	r3, r2
+ 801b2c8:	2b00      	cmp	r3, #0
+ 801b2ca:	d10d      	bne.n	801b2e8 <ip4_addr_isbroadcast_u32+0x74>
+             /* ...and host identifier bits are all ones? =>... */
+             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
+ 801b2cc:	683b      	ldr	r3, [r7, #0]
+ 801b2ce:	3308      	adds	r3, #8
+ 801b2d0:	681b      	ldr	r3, [r3, #0]
+ 801b2d2:	43da      	mvns	r2, r3
+ 801b2d4:	687b      	ldr	r3, [r7, #4]
+ 801b2d6:	401a      	ands	r2, r3
+                 (IPADDR_BROADCAST & ~ip4_addr_get_u32(netif_ip4_netmask(netif))))) {
+ 801b2d8:	683b      	ldr	r3, [r7, #0]
+ 801b2da:	3308      	adds	r3, #8
+ 801b2dc:	681b      	ldr	r3, [r3, #0]
+ 801b2de:	43db      	mvns	r3, r3
+             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
+ 801b2e0:	429a      	cmp	r2, r3
+ 801b2e2:	d101      	bne.n	801b2e8 <ip4_addr_isbroadcast_u32+0x74>
+    /* => network broadcast address */
+    return 1;
+ 801b2e4:	2301      	movs	r3, #1
+ 801b2e6:	e000      	b.n	801b2ea <ip4_addr_isbroadcast_u32+0x76>
+  } else {
+    return 0;
+ 801b2e8:	2300      	movs	r3, #0
+  }
+}
+ 801b2ea:	4618      	mov	r0, r3
+ 801b2ec:	3714      	adds	r7, #20
+ 801b2ee:	46bd      	mov	sp, r7
+ 801b2f0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 801b2f4:	4770      	bx	lr
+	...
+
+0801b2f8 <ip_reass_tmr>:
+ *
+ * Should be called every 1000 msec (defined by IP_TMR_INTERVAL).
+ */
+void
+ip_reass_tmr(void)
+{
+ 801b2f8:	b580      	push	{r7, lr}
+ 801b2fa:	b084      	sub	sp, #16
+ 801b2fc:	af00      	add	r7, sp, #0
+  struct ip_reassdata *r, *prev = NULL;
+ 801b2fe:	2300      	movs	r3, #0
+ 801b300:	60bb      	str	r3, [r7, #8]
+
+  r = reassdatagrams;
+ 801b302:	4b12      	ldr	r3, [pc, #72]	; (801b34c <ip_reass_tmr+0x54>)
+ 801b304:	681b      	ldr	r3, [r3, #0]
+ 801b306:	60fb      	str	r3, [r7, #12]
+  while (r != NULL) {
+ 801b308:	e018      	b.n	801b33c <ip_reass_tmr+0x44>
+    /* Decrement the timer. Once it reaches 0,
+     * clean up the incomplete fragment assembly */
+    if (r->timer > 0) {
+ 801b30a:	68fb      	ldr	r3, [r7, #12]
+ 801b30c:	7fdb      	ldrb	r3, [r3, #31]
+ 801b30e:	2b00      	cmp	r3, #0
+ 801b310:	d00b      	beq.n	801b32a <ip_reass_tmr+0x32>
+      r->timer--;
+ 801b312:	68fb      	ldr	r3, [r7, #12]
+ 801b314:	7fdb      	ldrb	r3, [r3, #31]
+ 801b316:	3b01      	subs	r3, #1
+ 801b318:	b2da      	uxtb	r2, r3
+ 801b31a:	68fb      	ldr	r3, [r7, #12]
+ 801b31c:	77da      	strb	r2, [r3, #31]
+      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n", (u16_t)r->timer));
+      prev = r;
+ 801b31e:	68fb      	ldr	r3, [r7, #12]
+ 801b320:	60bb      	str	r3, [r7, #8]
+      r = r->next;
+ 801b322:	68fb      	ldr	r3, [r7, #12]
+ 801b324:	681b      	ldr	r3, [r3, #0]
+ 801b326:	60fb      	str	r3, [r7, #12]
+ 801b328:	e008      	b.n	801b33c <ip_reass_tmr+0x44>
+    } else {
+      /* reassembly timed out */
+      struct ip_reassdata *tmp;
+      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n"));
+      tmp = r;
+ 801b32a:	68fb      	ldr	r3, [r7, #12]
+ 801b32c:	607b      	str	r3, [r7, #4]
+      /* get the next pointer before freeing */
+      r = r->next;
+ 801b32e:	68fb      	ldr	r3, [r7, #12]
+ 801b330:	681b      	ldr	r3, [r3, #0]
+ 801b332:	60fb      	str	r3, [r7, #12]
+      /* free the helper struct and all enqueued pbufs */
+      ip_reass_free_complete_datagram(tmp, prev);
+ 801b334:	68b9      	ldr	r1, [r7, #8]
+ 801b336:	6878      	ldr	r0, [r7, #4]
+ 801b338:	f000 f80a 	bl	801b350 <ip_reass_free_complete_datagram>
+  while (r != NULL) {
+ 801b33c:	68fb      	ldr	r3, [r7, #12]
+ 801b33e:	2b00      	cmp	r3, #0
+ 801b340:	d1e3      	bne.n	801b30a <ip_reass_tmr+0x12>
+    }
+  }
+}
+ 801b342:	bf00      	nop
+ 801b344:	3710      	adds	r7, #16
+ 801b346:	46bd      	mov	sp, r7
+ 801b348:	bd80      	pop	{r7, pc}
+ 801b34a:	bf00      	nop
+ 801b34c:	20008858 	.word	0x20008858
+
+0801b350 <ip_reass_free_complete_datagram>:
+ * @param prev the previous datagram in the linked list
+ * @return the number of pbufs freed
+ */
+static int
+ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
+{
+ 801b350:	b580      	push	{r7, lr}
+ 801b352:	b088      	sub	sp, #32
+ 801b354:	af00      	add	r7, sp, #0
+ 801b356:	6078      	str	r0, [r7, #4]
+ 801b358:	6039      	str	r1, [r7, #0]
+  u16_t pbufs_freed = 0;
+ 801b35a:	2300      	movs	r3, #0
+ 801b35c:	83fb      	strh	r3, [r7, #30]
+  u16_t clen;
+  struct pbuf *p;
+  struct ip_reass_helper *iprh;
+
+  LWIP_ASSERT("prev != ipr", prev != ipr);
+ 801b35e:	683a      	ldr	r2, [r7, #0]
+ 801b360:	687b      	ldr	r3, [r7, #4]
+ 801b362:	429a      	cmp	r2, r3
+ 801b364:	d105      	bne.n	801b372 <ip_reass_free_complete_datagram+0x22>
+ 801b366:	4b45      	ldr	r3, [pc, #276]	; (801b47c <ip_reass_free_complete_datagram+0x12c>)
+ 801b368:	22ab      	movs	r2, #171	; 0xab
+ 801b36a:	4945      	ldr	r1, [pc, #276]	; (801b480 <ip_reass_free_complete_datagram+0x130>)
+ 801b36c:	4845      	ldr	r0, [pc, #276]	; (801b484 <ip_reass_free_complete_datagram+0x134>)
+ 801b36e:	f001 f843 	bl	801c3f8 <iprintf>
+  if (prev != NULL) {
+ 801b372:	683b      	ldr	r3, [r7, #0]
+ 801b374:	2b00      	cmp	r3, #0
+ 801b376:	d00a      	beq.n	801b38e <ip_reass_free_complete_datagram+0x3e>
+    LWIP_ASSERT("prev->next == ipr", prev->next == ipr);
+ 801b378:	683b      	ldr	r3, [r7, #0]
+ 801b37a:	681b      	ldr	r3, [r3, #0]
+ 801b37c:	687a      	ldr	r2, [r7, #4]
+ 801b37e:	429a      	cmp	r2, r3
+ 801b380:	d005      	beq.n	801b38e <ip_reass_free_complete_datagram+0x3e>
+ 801b382:	4b3e      	ldr	r3, [pc, #248]	; (801b47c <ip_reass_free_complete_datagram+0x12c>)
+ 801b384:	22ad      	movs	r2, #173	; 0xad
+ 801b386:	4940      	ldr	r1, [pc, #256]	; (801b488 <ip_reass_free_complete_datagram+0x138>)
+ 801b388:	483e      	ldr	r0, [pc, #248]	; (801b484 <ip_reass_free_complete_datagram+0x134>)
+ 801b38a:	f001 f835 	bl	801c3f8 <iprintf>
+  }
+
+  MIB2_STATS_INC(mib2.ipreasmfails);
+#if LWIP_ICMP
+  iprh = (struct ip_reass_helper *)ipr->p->payload;
+ 801b38e:	687b      	ldr	r3, [r7, #4]
+ 801b390:	685b      	ldr	r3, [r3, #4]
+ 801b392:	685b      	ldr	r3, [r3, #4]
+ 801b394:	617b      	str	r3, [r7, #20]
+  if (iprh->start == 0) {
+ 801b396:	697b      	ldr	r3, [r7, #20]
+ 801b398:	889b      	ldrh	r3, [r3, #4]
+ 801b39a:	b29b      	uxth	r3, r3
+ 801b39c:	2b00      	cmp	r3, #0
+ 801b39e:	d12a      	bne.n	801b3f6 <ip_reass_free_complete_datagram+0xa6>
+    /* The first fragment was received, send ICMP time exceeded. */
+    /* First, de-queue the first pbuf from r->p. */
+    p = ipr->p;
+ 801b3a0:	687b      	ldr	r3, [r7, #4]
+ 801b3a2:	685b      	ldr	r3, [r3, #4]
+ 801b3a4:	61bb      	str	r3, [r7, #24]
+    ipr->p = iprh->next_pbuf;
+ 801b3a6:	697b      	ldr	r3, [r7, #20]
+ 801b3a8:	681a      	ldr	r2, [r3, #0]
+ 801b3aa:	687b      	ldr	r3, [r7, #4]
+ 801b3ac:	605a      	str	r2, [r3, #4]
+    /* Then, copy the original header into it. */
+    SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN);
+ 801b3ae:	69bb      	ldr	r3, [r7, #24]
+ 801b3b0:	6858      	ldr	r0, [r3, #4]
+ 801b3b2:	687b      	ldr	r3, [r7, #4]
+ 801b3b4:	3308      	adds	r3, #8
+ 801b3b6:	2214      	movs	r2, #20
+ 801b3b8:	4619      	mov	r1, r3
+ 801b3ba:	f000 fff0 	bl	801c39e <memcpy>
+    icmp_time_exceeded(p, ICMP_TE_FRAG);
+ 801b3be:	2101      	movs	r1, #1
+ 801b3c0:	69b8      	ldr	r0, [r7, #24]
+ 801b3c2:	f7ff fc2b 	bl	801ac1c <icmp_time_exceeded>
+    clen = pbuf_clen(p);
+ 801b3c6:	69b8      	ldr	r0, [r7, #24]
+ 801b3c8:	f7f6 fb74 	bl	8011ab4 <pbuf_clen>
+ 801b3cc:	4603      	mov	r3, r0
+ 801b3ce:	827b      	strh	r3, [r7, #18]
+    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
+ 801b3d0:	8bfa      	ldrh	r2, [r7, #30]
+ 801b3d2:	8a7b      	ldrh	r3, [r7, #18]
+ 801b3d4:	4413      	add	r3, r2
+ 801b3d6:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 801b3da:	db05      	blt.n	801b3e8 <ip_reass_free_complete_datagram+0x98>
+ 801b3dc:	4b27      	ldr	r3, [pc, #156]	; (801b47c <ip_reass_free_complete_datagram+0x12c>)
+ 801b3de:	22bc      	movs	r2, #188	; 0xbc
+ 801b3e0:	492a      	ldr	r1, [pc, #168]	; (801b48c <ip_reass_free_complete_datagram+0x13c>)
+ 801b3e2:	4828      	ldr	r0, [pc, #160]	; (801b484 <ip_reass_free_complete_datagram+0x134>)
+ 801b3e4:	f001 f808 	bl	801c3f8 <iprintf>
+    pbufs_freed = (u16_t)(pbufs_freed + clen);
+ 801b3e8:	8bfa      	ldrh	r2, [r7, #30]
+ 801b3ea:	8a7b      	ldrh	r3, [r7, #18]
+ 801b3ec:	4413      	add	r3, r2
+ 801b3ee:	83fb      	strh	r3, [r7, #30]
+    pbuf_free(p);
+ 801b3f0:	69b8      	ldr	r0, [r7, #24]
+ 801b3f2:	f7f6 fad1 	bl	8011998 <pbuf_free>
+  }
+#endif /* LWIP_ICMP */
+
+  /* First, free all received pbufs.  The individual pbufs need to be released
+     separately as they have not yet been chained */
+  p = ipr->p;
+ 801b3f6:	687b      	ldr	r3, [r7, #4]
+ 801b3f8:	685b      	ldr	r3, [r3, #4]
+ 801b3fa:	61bb      	str	r3, [r7, #24]
+  while (p != NULL) {
+ 801b3fc:	e01f      	b.n	801b43e <ip_reass_free_complete_datagram+0xee>
+    struct pbuf *pcur;
+    iprh = (struct ip_reass_helper *)p->payload;
+ 801b3fe:	69bb      	ldr	r3, [r7, #24]
+ 801b400:	685b      	ldr	r3, [r3, #4]
+ 801b402:	617b      	str	r3, [r7, #20]
+    pcur = p;
+ 801b404:	69bb      	ldr	r3, [r7, #24]
+ 801b406:	60fb      	str	r3, [r7, #12]
+    /* get the next pointer before freeing */
+    p = iprh->next_pbuf;
+ 801b408:	697b      	ldr	r3, [r7, #20]
+ 801b40a:	681b      	ldr	r3, [r3, #0]
+ 801b40c:	61bb      	str	r3, [r7, #24]
+    clen = pbuf_clen(pcur);
+ 801b40e:	68f8      	ldr	r0, [r7, #12]
+ 801b410:	f7f6 fb50 	bl	8011ab4 <pbuf_clen>
+ 801b414:	4603      	mov	r3, r0
+ 801b416:	827b      	strh	r3, [r7, #18]
+    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
+ 801b418:	8bfa      	ldrh	r2, [r7, #30]
+ 801b41a:	8a7b      	ldrh	r3, [r7, #18]
+ 801b41c:	4413      	add	r3, r2
+ 801b41e:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 801b422:	db05      	blt.n	801b430 <ip_reass_free_complete_datagram+0xe0>
+ 801b424:	4b15      	ldr	r3, [pc, #84]	; (801b47c <ip_reass_free_complete_datagram+0x12c>)
+ 801b426:	22cc      	movs	r2, #204	; 0xcc
+ 801b428:	4918      	ldr	r1, [pc, #96]	; (801b48c <ip_reass_free_complete_datagram+0x13c>)
+ 801b42a:	4816      	ldr	r0, [pc, #88]	; (801b484 <ip_reass_free_complete_datagram+0x134>)
+ 801b42c:	f000 ffe4 	bl	801c3f8 <iprintf>
+    pbufs_freed = (u16_t)(pbufs_freed + clen);
+ 801b430:	8bfa      	ldrh	r2, [r7, #30]
+ 801b432:	8a7b      	ldrh	r3, [r7, #18]
+ 801b434:	4413      	add	r3, r2
+ 801b436:	83fb      	strh	r3, [r7, #30]
+    pbuf_free(pcur);
+ 801b438:	68f8      	ldr	r0, [r7, #12]
+ 801b43a:	f7f6 faad 	bl	8011998 <pbuf_free>
+  while (p != NULL) {
+ 801b43e:	69bb      	ldr	r3, [r7, #24]
+ 801b440:	2b00      	cmp	r3, #0
+ 801b442:	d1dc      	bne.n	801b3fe <ip_reass_free_complete_datagram+0xae>
+  }
+  /* Then, unchain the struct ip_reassdata from the list and free it. */
+  ip_reass_dequeue_datagram(ipr, prev);
+ 801b444:	6839      	ldr	r1, [r7, #0]
+ 801b446:	6878      	ldr	r0, [r7, #4]
+ 801b448:	f000 f8c2 	bl	801b5d0 <ip_reass_dequeue_datagram>
+  LWIP_ASSERT("ip_reass_pbufcount >= pbufs_freed", ip_reass_pbufcount >= pbufs_freed);
+ 801b44c:	4b10      	ldr	r3, [pc, #64]	; (801b490 <ip_reass_free_complete_datagram+0x140>)
+ 801b44e:	881b      	ldrh	r3, [r3, #0]
+ 801b450:	8bfa      	ldrh	r2, [r7, #30]
+ 801b452:	429a      	cmp	r2, r3
+ 801b454:	d905      	bls.n	801b462 <ip_reass_free_complete_datagram+0x112>
+ 801b456:	4b09      	ldr	r3, [pc, #36]	; (801b47c <ip_reass_free_complete_datagram+0x12c>)
+ 801b458:	22d2      	movs	r2, #210	; 0xd2
+ 801b45a:	490e      	ldr	r1, [pc, #56]	; (801b494 <ip_reass_free_complete_datagram+0x144>)
+ 801b45c:	4809      	ldr	r0, [pc, #36]	; (801b484 <ip_reass_free_complete_datagram+0x134>)
+ 801b45e:	f000 ffcb 	bl	801c3f8 <iprintf>
+  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - pbufs_freed);
+ 801b462:	4b0b      	ldr	r3, [pc, #44]	; (801b490 <ip_reass_free_complete_datagram+0x140>)
+ 801b464:	881a      	ldrh	r2, [r3, #0]
+ 801b466:	8bfb      	ldrh	r3, [r7, #30]
+ 801b468:	1ad3      	subs	r3, r2, r3
+ 801b46a:	b29a      	uxth	r2, r3
+ 801b46c:	4b08      	ldr	r3, [pc, #32]	; (801b490 <ip_reass_free_complete_datagram+0x140>)
+ 801b46e:	801a      	strh	r2, [r3, #0]
+
+  return pbufs_freed;
+ 801b470:	8bfb      	ldrh	r3, [r7, #30]
+}
+ 801b472:	4618      	mov	r0, r3
+ 801b474:	3720      	adds	r7, #32
+ 801b476:	46bd      	mov	sp, r7
+ 801b478:	bd80      	pop	{r7, pc}
+ 801b47a:	bf00      	nop
+ 801b47c:	08020270 	.word	0x08020270
+ 801b480:	080202ac 	.word	0x080202ac
+ 801b484:	080202b8 	.word	0x080202b8
+ 801b488:	080202e0 	.word	0x080202e0
+ 801b48c:	080202f4 	.word	0x080202f4
+ 801b490:	2000885c 	.word	0x2000885c
+ 801b494:	08020314 	.word	0x08020314
+
+0801b498 <ip_reass_remove_oldest_datagram>:
+ *        (used for freeing other datagrams if not enough space)
+ * @return the number of pbufs freed
+ */
+static int
+ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed)
+{
+ 801b498:	b580      	push	{r7, lr}
+ 801b49a:	b08a      	sub	sp, #40	; 0x28
+ 801b49c:	af00      	add	r7, sp, #0
+ 801b49e:	6078      	str	r0, [r7, #4]
+ 801b4a0:	6039      	str	r1, [r7, #0]
+  /* @todo Can't we simply remove the last datagram in the
+   *       linked list behind reassdatagrams?
+   */
+  struct ip_reassdata *r, *oldest, *prev, *oldest_prev;
+  int pbufs_freed = 0, pbufs_freed_current;
+ 801b4a2:	2300      	movs	r3, #0
+ 801b4a4:	617b      	str	r3, [r7, #20]
+  int other_datagrams;
+
+  /* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs,
+   * but don't free the datagram that 'fraghdr' belongs to! */
+  do {
+    oldest = NULL;
+ 801b4a6:	2300      	movs	r3, #0
+ 801b4a8:	623b      	str	r3, [r7, #32]
+    prev = NULL;
+ 801b4aa:	2300      	movs	r3, #0
+ 801b4ac:	61fb      	str	r3, [r7, #28]
+    oldest_prev = NULL;
+ 801b4ae:	2300      	movs	r3, #0
+ 801b4b0:	61bb      	str	r3, [r7, #24]
+    other_datagrams = 0;
+ 801b4b2:	2300      	movs	r3, #0
+ 801b4b4:	613b      	str	r3, [r7, #16]
+    r = reassdatagrams;
+ 801b4b6:	4b28      	ldr	r3, [pc, #160]	; (801b558 <ip_reass_remove_oldest_datagram+0xc0>)
+ 801b4b8:	681b      	ldr	r3, [r3, #0]
+ 801b4ba:	627b      	str	r3, [r7, #36]	; 0x24
+    while (r != NULL) {
+ 801b4bc:	e030      	b.n	801b520 <ip_reass_remove_oldest_datagram+0x88>
+      if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) {
+ 801b4be:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b4c0:	695a      	ldr	r2, [r3, #20]
+ 801b4c2:	687b      	ldr	r3, [r7, #4]
+ 801b4c4:	68db      	ldr	r3, [r3, #12]
+ 801b4c6:	429a      	cmp	r2, r3
+ 801b4c8:	d10c      	bne.n	801b4e4 <ip_reass_remove_oldest_datagram+0x4c>
+ 801b4ca:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b4cc:	699a      	ldr	r2, [r3, #24]
+ 801b4ce:	687b      	ldr	r3, [r7, #4]
+ 801b4d0:	691b      	ldr	r3, [r3, #16]
+ 801b4d2:	429a      	cmp	r2, r3
+ 801b4d4:	d106      	bne.n	801b4e4 <ip_reass_remove_oldest_datagram+0x4c>
+ 801b4d6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b4d8:	899a      	ldrh	r2, [r3, #12]
+ 801b4da:	687b      	ldr	r3, [r7, #4]
+ 801b4dc:	889b      	ldrh	r3, [r3, #4]
+ 801b4de:	b29b      	uxth	r3, r3
+ 801b4e0:	429a      	cmp	r2, r3
+ 801b4e2:	d014      	beq.n	801b50e <ip_reass_remove_oldest_datagram+0x76>
+        /* Not the same datagram as fraghdr */
+        other_datagrams++;
+ 801b4e4:	693b      	ldr	r3, [r7, #16]
+ 801b4e6:	3301      	adds	r3, #1
+ 801b4e8:	613b      	str	r3, [r7, #16]
+        if (oldest == NULL) {
+ 801b4ea:	6a3b      	ldr	r3, [r7, #32]
+ 801b4ec:	2b00      	cmp	r3, #0
+ 801b4ee:	d104      	bne.n	801b4fa <ip_reass_remove_oldest_datagram+0x62>
+          oldest = r;
+ 801b4f0:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b4f2:	623b      	str	r3, [r7, #32]
+          oldest_prev = prev;
+ 801b4f4:	69fb      	ldr	r3, [r7, #28]
+ 801b4f6:	61bb      	str	r3, [r7, #24]
+ 801b4f8:	e009      	b.n	801b50e <ip_reass_remove_oldest_datagram+0x76>
+        } else if (r->timer <= oldest->timer) {
+ 801b4fa:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b4fc:	7fda      	ldrb	r2, [r3, #31]
+ 801b4fe:	6a3b      	ldr	r3, [r7, #32]
+ 801b500:	7fdb      	ldrb	r3, [r3, #31]
+ 801b502:	429a      	cmp	r2, r3
+ 801b504:	d803      	bhi.n	801b50e <ip_reass_remove_oldest_datagram+0x76>
+          /* older than the previous oldest */
+          oldest = r;
+ 801b506:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b508:	623b      	str	r3, [r7, #32]
+          oldest_prev = prev;
+ 801b50a:	69fb      	ldr	r3, [r7, #28]
+ 801b50c:	61bb      	str	r3, [r7, #24]
+        }
+      }
+      if (r->next != NULL) {
+ 801b50e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b510:	681b      	ldr	r3, [r3, #0]
+ 801b512:	2b00      	cmp	r3, #0
+ 801b514:	d001      	beq.n	801b51a <ip_reass_remove_oldest_datagram+0x82>
+        prev = r;
+ 801b516:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b518:	61fb      	str	r3, [r7, #28]
+      }
+      r = r->next;
+ 801b51a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b51c:	681b      	ldr	r3, [r3, #0]
+ 801b51e:	627b      	str	r3, [r7, #36]	; 0x24
+    while (r != NULL) {
+ 801b520:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b522:	2b00      	cmp	r3, #0
+ 801b524:	d1cb      	bne.n	801b4be <ip_reass_remove_oldest_datagram+0x26>
+    }
+    if (oldest != NULL) {
+ 801b526:	6a3b      	ldr	r3, [r7, #32]
+ 801b528:	2b00      	cmp	r3, #0
+ 801b52a:	d008      	beq.n	801b53e <ip_reass_remove_oldest_datagram+0xa6>
+      pbufs_freed_current = ip_reass_free_complete_datagram(oldest, oldest_prev);
+ 801b52c:	69b9      	ldr	r1, [r7, #24]
+ 801b52e:	6a38      	ldr	r0, [r7, #32]
+ 801b530:	f7ff ff0e 	bl	801b350 <ip_reass_free_complete_datagram>
+ 801b534:	60f8      	str	r0, [r7, #12]
+      pbufs_freed += pbufs_freed_current;
+ 801b536:	697a      	ldr	r2, [r7, #20]
+ 801b538:	68fb      	ldr	r3, [r7, #12]
+ 801b53a:	4413      	add	r3, r2
+ 801b53c:	617b      	str	r3, [r7, #20]
+    }
+  } while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1));
+ 801b53e:	697a      	ldr	r2, [r7, #20]
+ 801b540:	683b      	ldr	r3, [r7, #0]
+ 801b542:	429a      	cmp	r2, r3
+ 801b544:	da02      	bge.n	801b54c <ip_reass_remove_oldest_datagram+0xb4>
+ 801b546:	693b      	ldr	r3, [r7, #16]
+ 801b548:	2b01      	cmp	r3, #1
+ 801b54a:	dcac      	bgt.n	801b4a6 <ip_reass_remove_oldest_datagram+0xe>
+  return pbufs_freed;
+ 801b54c:	697b      	ldr	r3, [r7, #20]
+}
+ 801b54e:	4618      	mov	r0, r3
+ 801b550:	3728      	adds	r7, #40	; 0x28
+ 801b552:	46bd      	mov	sp, r7
+ 801b554:	bd80      	pop	{r7, pc}
+ 801b556:	bf00      	nop
+ 801b558:	20008858 	.word	0x20008858
+
+0801b55c <ip_reass_enqueue_new_datagram>:
+ * @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space)
+ * @return A pointer to the queue location into which the fragment was enqueued
+ */
+static struct ip_reassdata *
+ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen)
+{
+ 801b55c:	b580      	push	{r7, lr}
+ 801b55e:	b084      	sub	sp, #16
+ 801b560:	af00      	add	r7, sp, #0
+ 801b562:	6078      	str	r0, [r7, #4]
+ 801b564:	6039      	str	r1, [r7, #0]
+#if ! IP_REASS_FREE_OLDEST
+  LWIP_UNUSED_ARG(clen);
+#endif
+
+  /* No matching previous fragment found, allocate a new reassdata struct */
+  ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
+ 801b566:	2004      	movs	r0, #4
+ 801b568:	f7f5 fb18 	bl	8010b9c <memp_malloc>
+ 801b56c:	60f8      	str	r0, [r7, #12]
+  if (ipr == NULL) {
+ 801b56e:	68fb      	ldr	r3, [r7, #12]
+ 801b570:	2b00      	cmp	r3, #0
+ 801b572:	d110      	bne.n	801b596 <ip_reass_enqueue_new_datagram+0x3a>
+#if IP_REASS_FREE_OLDEST
+    if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) {
+ 801b574:	6839      	ldr	r1, [r7, #0]
+ 801b576:	6878      	ldr	r0, [r7, #4]
+ 801b578:	f7ff ff8e 	bl	801b498 <ip_reass_remove_oldest_datagram>
+ 801b57c:	4602      	mov	r2, r0
+ 801b57e:	683b      	ldr	r3, [r7, #0]
+ 801b580:	4293      	cmp	r3, r2
+ 801b582:	dc03      	bgt.n	801b58c <ip_reass_enqueue_new_datagram+0x30>
+      ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
+ 801b584:	2004      	movs	r0, #4
+ 801b586:	f7f5 fb09 	bl	8010b9c <memp_malloc>
+ 801b58a:	60f8      	str	r0, [r7, #12]
+    }
+    if (ipr == NULL)
+ 801b58c:	68fb      	ldr	r3, [r7, #12]
+ 801b58e:	2b00      	cmp	r3, #0
+ 801b590:	d101      	bne.n	801b596 <ip_reass_enqueue_new_datagram+0x3a>
+#endif /* IP_REASS_FREE_OLDEST */
+    {
+      IPFRAG_STATS_INC(ip_frag.memerr);
+      LWIP_DEBUGF(IP_REASS_DEBUG, ("Failed to alloc reassdata struct\n"));
+      return NULL;
+ 801b592:	2300      	movs	r3, #0
+ 801b594:	e016      	b.n	801b5c4 <ip_reass_enqueue_new_datagram+0x68>
+    }
+  }
+  memset(ipr, 0, sizeof(struct ip_reassdata));
+ 801b596:	2220      	movs	r2, #32
+ 801b598:	2100      	movs	r1, #0
+ 801b59a:	68f8      	ldr	r0, [r7, #12]
+ 801b59c:	f000 ff23 	bl	801c3e6 <memset>
+  ipr->timer = IP_REASS_MAXAGE;
+ 801b5a0:	68fb      	ldr	r3, [r7, #12]
+ 801b5a2:	220f      	movs	r2, #15
+ 801b5a4:	77da      	strb	r2, [r3, #31]
+
+  /* enqueue the new structure to the front of the list */
+  ipr->next = reassdatagrams;
+ 801b5a6:	4b09      	ldr	r3, [pc, #36]	; (801b5cc <ip_reass_enqueue_new_datagram+0x70>)
+ 801b5a8:	681a      	ldr	r2, [r3, #0]
+ 801b5aa:	68fb      	ldr	r3, [r7, #12]
+ 801b5ac:	601a      	str	r2, [r3, #0]
+  reassdatagrams = ipr;
+ 801b5ae:	4a07      	ldr	r2, [pc, #28]	; (801b5cc <ip_reass_enqueue_new_datagram+0x70>)
+ 801b5b0:	68fb      	ldr	r3, [r7, #12]
+ 801b5b2:	6013      	str	r3, [r2, #0]
+  /* copy the ip header for later tests and input */
+  /* @todo: no ip options supported? */
+  SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN);
+ 801b5b4:	68fb      	ldr	r3, [r7, #12]
+ 801b5b6:	3308      	adds	r3, #8
+ 801b5b8:	2214      	movs	r2, #20
+ 801b5ba:	6879      	ldr	r1, [r7, #4]
+ 801b5bc:	4618      	mov	r0, r3
+ 801b5be:	f000 feee 	bl	801c39e <memcpy>
+  return ipr;
+ 801b5c2:	68fb      	ldr	r3, [r7, #12]
+}
+ 801b5c4:	4618      	mov	r0, r3
+ 801b5c6:	3710      	adds	r7, #16
+ 801b5c8:	46bd      	mov	sp, r7
+ 801b5ca:	bd80      	pop	{r7, pc}
+ 801b5cc:	20008858 	.word	0x20008858
+
+0801b5d0 <ip_reass_dequeue_datagram>:
+ * Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs.
+ * @param ipr points to the queue entry to dequeue
+ */
+static void
+ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
+{
+ 801b5d0:	b580      	push	{r7, lr}
+ 801b5d2:	b082      	sub	sp, #8
+ 801b5d4:	af00      	add	r7, sp, #0
+ 801b5d6:	6078      	str	r0, [r7, #4]
+ 801b5d8:	6039      	str	r1, [r7, #0]
+  /* dequeue the reass struct  */
+  if (reassdatagrams == ipr) {
+ 801b5da:	4b10      	ldr	r3, [pc, #64]	; (801b61c <ip_reass_dequeue_datagram+0x4c>)
+ 801b5dc:	681b      	ldr	r3, [r3, #0]
+ 801b5de:	687a      	ldr	r2, [r7, #4]
+ 801b5e0:	429a      	cmp	r2, r3
+ 801b5e2:	d104      	bne.n	801b5ee <ip_reass_dequeue_datagram+0x1e>
+    /* it was the first in the list */
+    reassdatagrams = ipr->next;
+ 801b5e4:	687b      	ldr	r3, [r7, #4]
+ 801b5e6:	681b      	ldr	r3, [r3, #0]
+ 801b5e8:	4a0c      	ldr	r2, [pc, #48]	; (801b61c <ip_reass_dequeue_datagram+0x4c>)
+ 801b5ea:	6013      	str	r3, [r2, #0]
+ 801b5ec:	e00d      	b.n	801b60a <ip_reass_dequeue_datagram+0x3a>
+  } else {
+    /* it wasn't the first, so it must have a valid 'prev' */
+    LWIP_ASSERT("sanity check linked list", prev != NULL);
+ 801b5ee:	683b      	ldr	r3, [r7, #0]
+ 801b5f0:	2b00      	cmp	r3, #0
+ 801b5f2:	d106      	bne.n	801b602 <ip_reass_dequeue_datagram+0x32>
+ 801b5f4:	4b0a      	ldr	r3, [pc, #40]	; (801b620 <ip_reass_dequeue_datagram+0x50>)
+ 801b5f6:	f240 1245 	movw	r2, #325	; 0x145
+ 801b5fa:	490a      	ldr	r1, [pc, #40]	; (801b624 <ip_reass_dequeue_datagram+0x54>)
+ 801b5fc:	480a      	ldr	r0, [pc, #40]	; (801b628 <ip_reass_dequeue_datagram+0x58>)
+ 801b5fe:	f000 fefb 	bl	801c3f8 <iprintf>
+    prev->next = ipr->next;
+ 801b602:	687b      	ldr	r3, [r7, #4]
+ 801b604:	681a      	ldr	r2, [r3, #0]
+ 801b606:	683b      	ldr	r3, [r7, #0]
+ 801b608:	601a      	str	r2, [r3, #0]
+  }
+
+  /* now we can free the ip_reassdata struct */
+  memp_free(MEMP_REASSDATA, ipr);
+ 801b60a:	6879      	ldr	r1, [r7, #4]
+ 801b60c:	2004      	movs	r0, #4
+ 801b60e:	f7f5 fb17 	bl	8010c40 <memp_free>
+}
+ 801b612:	bf00      	nop
+ 801b614:	3708      	adds	r7, #8
+ 801b616:	46bd      	mov	sp, r7
+ 801b618:	bd80      	pop	{r7, pc}
+ 801b61a:	bf00      	nop
+ 801b61c:	20008858 	.word	0x20008858
+ 801b620:	08020270 	.word	0x08020270
+ 801b624:	08020338 	.word	0x08020338
+ 801b628:	080202b8 	.word	0x080202b8
+
+0801b62c <ip_reass_chain_frag_into_datagram_and_validate>:
+ * @param is_last is 1 if this pbuf has MF==0 (ipr->flags not updated yet)
+ * @return see IP_REASS_VALIDATE_* defines
+ */
+static int
+ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p, int is_last)
+{
+ 801b62c:	b580      	push	{r7, lr}
+ 801b62e:	b08c      	sub	sp, #48	; 0x30
+ 801b630:	af00      	add	r7, sp, #0
+ 801b632:	60f8      	str	r0, [r7, #12]
+ 801b634:	60b9      	str	r1, [r7, #8]
+ 801b636:	607a      	str	r2, [r7, #4]
+  struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev = NULL;
+ 801b638:	2300      	movs	r3, #0
+ 801b63a:	62bb      	str	r3, [r7, #40]	; 0x28
+  struct pbuf *q;
+  u16_t offset, len;
+  u8_t hlen;
+  struct ip_hdr *fraghdr;
+  int valid = 1;
+ 801b63c:	2301      	movs	r3, #1
+ 801b63e:	623b      	str	r3, [r7, #32]
+
+  /* Extract length and fragment offset from current fragment */
+  fraghdr = (struct ip_hdr *)new_p->payload;
+ 801b640:	68bb      	ldr	r3, [r7, #8]
+ 801b642:	685b      	ldr	r3, [r3, #4]
+ 801b644:	61fb      	str	r3, [r7, #28]
+  len = lwip_ntohs(IPH_LEN(fraghdr));
+ 801b646:	69fb      	ldr	r3, [r7, #28]
+ 801b648:	885b      	ldrh	r3, [r3, #2]
+ 801b64a:	b29b      	uxth	r3, r3
+ 801b64c:	4618      	mov	r0, r3
+ 801b64e:	f7f4 fdef 	bl	8010230 <lwip_htons>
+ 801b652:	4603      	mov	r3, r0
+ 801b654:	837b      	strh	r3, [r7, #26]
+  hlen = IPH_HL_BYTES(fraghdr);
+ 801b656:	69fb      	ldr	r3, [r7, #28]
+ 801b658:	781b      	ldrb	r3, [r3, #0]
+ 801b65a:	f003 030f 	and.w	r3, r3, #15
+ 801b65e:	b2db      	uxtb	r3, r3
+ 801b660:	009b      	lsls	r3, r3, #2
+ 801b662:	767b      	strb	r3, [r7, #25]
+  if (hlen > len) {
+ 801b664:	7e7b      	ldrb	r3, [r7, #25]
+ 801b666:	b29b      	uxth	r3, r3
+ 801b668:	8b7a      	ldrh	r2, [r7, #26]
+ 801b66a:	429a      	cmp	r2, r3
+ 801b66c:	d202      	bcs.n	801b674 <ip_reass_chain_frag_into_datagram_and_validate+0x48>
+    /* invalid datagram */
+    return IP_REASS_VALIDATE_PBUF_DROPPED;
+ 801b66e:	f04f 33ff 	mov.w	r3, #4294967295
+ 801b672:	e135      	b.n	801b8e0 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
+  }
+  len = (u16_t)(len - hlen);
+ 801b674:	7e7b      	ldrb	r3, [r7, #25]
+ 801b676:	b29b      	uxth	r3, r3
+ 801b678:	8b7a      	ldrh	r2, [r7, #26]
+ 801b67a:	1ad3      	subs	r3, r2, r3
+ 801b67c:	837b      	strh	r3, [r7, #26]
+  offset = IPH_OFFSET_BYTES(fraghdr);
+ 801b67e:	69fb      	ldr	r3, [r7, #28]
+ 801b680:	88db      	ldrh	r3, [r3, #6]
+ 801b682:	b29b      	uxth	r3, r3
+ 801b684:	4618      	mov	r0, r3
+ 801b686:	f7f4 fdd3 	bl	8010230 <lwip_htons>
+ 801b68a:	4603      	mov	r3, r0
+ 801b68c:	f3c3 030c 	ubfx	r3, r3, #0, #13
+ 801b690:	b29b      	uxth	r3, r3
+ 801b692:	00db      	lsls	r3, r3, #3
+ 801b694:	82fb      	strh	r3, [r7, #22]
+  /* overwrite the fragment's ip header from the pbuf with our helper struct,
+   * and setup the embedded helper structure. */
+  /* make sure the struct ip_reass_helper fits into the IP header */
+  LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN",
+              sizeof(struct ip_reass_helper) <= IP_HLEN);
+  iprh = (struct ip_reass_helper *)new_p->payload;
+ 801b696:	68bb      	ldr	r3, [r7, #8]
+ 801b698:	685b      	ldr	r3, [r3, #4]
+ 801b69a:	62fb      	str	r3, [r7, #44]	; 0x2c
+  iprh->next_pbuf = NULL;
+ 801b69c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b69e:	2200      	movs	r2, #0
+ 801b6a0:	701a      	strb	r2, [r3, #0]
+ 801b6a2:	2200      	movs	r2, #0
+ 801b6a4:	705a      	strb	r2, [r3, #1]
+ 801b6a6:	2200      	movs	r2, #0
+ 801b6a8:	709a      	strb	r2, [r3, #2]
+ 801b6aa:	2200      	movs	r2, #0
+ 801b6ac:	70da      	strb	r2, [r3, #3]
+  iprh->start = offset;
+ 801b6ae:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b6b0:	8afa      	ldrh	r2, [r7, #22]
+ 801b6b2:	809a      	strh	r2, [r3, #4]
+  iprh->end = (u16_t)(offset + len);
+ 801b6b4:	8afa      	ldrh	r2, [r7, #22]
+ 801b6b6:	8b7b      	ldrh	r3, [r7, #26]
+ 801b6b8:	4413      	add	r3, r2
+ 801b6ba:	b29a      	uxth	r2, r3
+ 801b6bc:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b6be:	80da      	strh	r2, [r3, #6]
+  if (iprh->end < offset) {
+ 801b6c0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b6c2:	88db      	ldrh	r3, [r3, #6]
+ 801b6c4:	b29b      	uxth	r3, r3
+ 801b6c6:	8afa      	ldrh	r2, [r7, #22]
+ 801b6c8:	429a      	cmp	r2, r3
+ 801b6ca:	d902      	bls.n	801b6d2 <ip_reass_chain_frag_into_datagram_and_validate+0xa6>
+    /* u16_t overflow, cannot handle this */
+    return IP_REASS_VALIDATE_PBUF_DROPPED;
+ 801b6cc:	f04f 33ff 	mov.w	r3, #4294967295
+ 801b6d0:	e106      	b.n	801b8e0 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
+  }
+
+  /* Iterate through until we either get to the end of the list (append),
+   * or we find one with a larger offset (insert). */
+  for (q = ipr->p; q != NULL;) {
+ 801b6d2:	68fb      	ldr	r3, [r7, #12]
+ 801b6d4:	685b      	ldr	r3, [r3, #4]
+ 801b6d6:	627b      	str	r3, [r7, #36]	; 0x24
+ 801b6d8:	e068      	b.n	801b7ac <ip_reass_chain_frag_into_datagram_and_validate+0x180>
+    iprh_tmp = (struct ip_reass_helper *)q->payload;
+ 801b6da:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b6dc:	685b      	ldr	r3, [r3, #4]
+ 801b6de:	613b      	str	r3, [r7, #16]
+    if (iprh->start < iprh_tmp->start) {
+ 801b6e0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b6e2:	889b      	ldrh	r3, [r3, #4]
+ 801b6e4:	b29a      	uxth	r2, r3
+ 801b6e6:	693b      	ldr	r3, [r7, #16]
+ 801b6e8:	889b      	ldrh	r3, [r3, #4]
+ 801b6ea:	b29b      	uxth	r3, r3
+ 801b6ec:	429a      	cmp	r2, r3
+ 801b6ee:	d235      	bcs.n	801b75c <ip_reass_chain_frag_into_datagram_and_validate+0x130>
+      /* the new pbuf should be inserted before this */
+      iprh->next_pbuf = q;
+ 801b6f0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b6f2:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 801b6f4:	601a      	str	r2, [r3, #0]
+      if (iprh_prev != NULL) {
+ 801b6f6:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b6f8:	2b00      	cmp	r3, #0
+ 801b6fa:	d020      	beq.n	801b73e <ip_reass_chain_frag_into_datagram_and_validate+0x112>
+        /* not the fragment with the lowest offset */
+#if IP_REASS_CHECK_OVERLAP
+        if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) {
+ 801b6fc:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b6fe:	889b      	ldrh	r3, [r3, #4]
+ 801b700:	b29a      	uxth	r2, r3
+ 801b702:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b704:	88db      	ldrh	r3, [r3, #6]
+ 801b706:	b29b      	uxth	r3, r3
+ 801b708:	429a      	cmp	r2, r3
+ 801b70a:	d307      	bcc.n	801b71c <ip_reass_chain_frag_into_datagram_and_validate+0xf0>
+ 801b70c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b70e:	88db      	ldrh	r3, [r3, #6]
+ 801b710:	b29a      	uxth	r2, r3
+ 801b712:	693b      	ldr	r3, [r7, #16]
+ 801b714:	889b      	ldrh	r3, [r3, #4]
+ 801b716:	b29b      	uxth	r3, r3
+ 801b718:	429a      	cmp	r2, r3
+ 801b71a:	d902      	bls.n	801b722 <ip_reass_chain_frag_into_datagram_and_validate+0xf6>
+          /* fragment overlaps with previous or following, throw away */
+          return IP_REASS_VALIDATE_PBUF_DROPPED;
+ 801b71c:	f04f 33ff 	mov.w	r3, #4294967295
+ 801b720:	e0de      	b.n	801b8e0 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
+        }
+#endif /* IP_REASS_CHECK_OVERLAP */
+        iprh_prev->next_pbuf = new_p;
+ 801b722:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b724:	68ba      	ldr	r2, [r7, #8]
+ 801b726:	601a      	str	r2, [r3, #0]
+        if (iprh_prev->end != iprh->start) {
+ 801b728:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b72a:	88db      	ldrh	r3, [r3, #6]
+ 801b72c:	b29a      	uxth	r2, r3
+ 801b72e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b730:	889b      	ldrh	r3, [r3, #4]
+ 801b732:	b29b      	uxth	r3, r3
+ 801b734:	429a      	cmp	r2, r3
+ 801b736:	d03d      	beq.n	801b7b4 <ip_reass_chain_frag_into_datagram_and_validate+0x188>
+          /* There is a fragment missing between the current
+           * and the previous fragment */
+          valid = 0;
+ 801b738:	2300      	movs	r3, #0
+ 801b73a:	623b      	str	r3, [r7, #32]
+        }
+#endif /* IP_REASS_CHECK_OVERLAP */
+        /* fragment with the lowest offset */
+        ipr->p = new_p;
+      }
+      break;
+ 801b73c:	e03a      	b.n	801b7b4 <ip_reass_chain_frag_into_datagram_and_validate+0x188>
+        if (iprh->end > iprh_tmp->start) {
+ 801b73e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b740:	88db      	ldrh	r3, [r3, #6]
+ 801b742:	b29a      	uxth	r2, r3
+ 801b744:	693b      	ldr	r3, [r7, #16]
+ 801b746:	889b      	ldrh	r3, [r3, #4]
+ 801b748:	b29b      	uxth	r3, r3
+ 801b74a:	429a      	cmp	r2, r3
+ 801b74c:	d902      	bls.n	801b754 <ip_reass_chain_frag_into_datagram_and_validate+0x128>
+          return IP_REASS_VALIDATE_PBUF_DROPPED;
+ 801b74e:	f04f 33ff 	mov.w	r3, #4294967295
+ 801b752:	e0c5      	b.n	801b8e0 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
+        ipr->p = new_p;
+ 801b754:	68fb      	ldr	r3, [r7, #12]
+ 801b756:	68ba      	ldr	r2, [r7, #8]
+ 801b758:	605a      	str	r2, [r3, #4]
+      break;
+ 801b75a:	e02b      	b.n	801b7b4 <ip_reass_chain_frag_into_datagram_and_validate+0x188>
+    } else if (iprh->start == iprh_tmp->start) {
+ 801b75c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b75e:	889b      	ldrh	r3, [r3, #4]
+ 801b760:	b29a      	uxth	r2, r3
+ 801b762:	693b      	ldr	r3, [r7, #16]
+ 801b764:	889b      	ldrh	r3, [r3, #4]
+ 801b766:	b29b      	uxth	r3, r3
+ 801b768:	429a      	cmp	r2, r3
+ 801b76a:	d102      	bne.n	801b772 <ip_reass_chain_frag_into_datagram_and_validate+0x146>
+      /* received the same datagram twice: no need to keep the datagram */
+      return IP_REASS_VALIDATE_PBUF_DROPPED;
+ 801b76c:	f04f 33ff 	mov.w	r3, #4294967295
+ 801b770:	e0b6      	b.n	801b8e0 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
+#if IP_REASS_CHECK_OVERLAP
+    } else if (iprh->start < iprh_tmp->end) {
+ 801b772:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b774:	889b      	ldrh	r3, [r3, #4]
+ 801b776:	b29a      	uxth	r2, r3
+ 801b778:	693b      	ldr	r3, [r7, #16]
+ 801b77a:	88db      	ldrh	r3, [r3, #6]
+ 801b77c:	b29b      	uxth	r3, r3
+ 801b77e:	429a      	cmp	r2, r3
+ 801b780:	d202      	bcs.n	801b788 <ip_reass_chain_frag_into_datagram_and_validate+0x15c>
+      /* overlap: no need to keep the new datagram */
+      return IP_REASS_VALIDATE_PBUF_DROPPED;
+ 801b782:	f04f 33ff 	mov.w	r3, #4294967295
+ 801b786:	e0ab      	b.n	801b8e0 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
+#endif /* IP_REASS_CHECK_OVERLAP */
+    } else {
+      /* Check if the fragments received so far have no holes. */
+      if (iprh_prev != NULL) {
+ 801b788:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b78a:	2b00      	cmp	r3, #0
+ 801b78c:	d009      	beq.n	801b7a2 <ip_reass_chain_frag_into_datagram_and_validate+0x176>
+        if (iprh_prev->end != iprh_tmp->start) {
+ 801b78e:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b790:	88db      	ldrh	r3, [r3, #6]
+ 801b792:	b29a      	uxth	r2, r3
+ 801b794:	693b      	ldr	r3, [r7, #16]
+ 801b796:	889b      	ldrh	r3, [r3, #4]
+ 801b798:	b29b      	uxth	r3, r3
+ 801b79a:	429a      	cmp	r2, r3
+ 801b79c:	d001      	beq.n	801b7a2 <ip_reass_chain_frag_into_datagram_and_validate+0x176>
+          /* There is a fragment missing between the current
+           * and the previous fragment */
+          valid = 0;
+ 801b79e:	2300      	movs	r3, #0
+ 801b7a0:	623b      	str	r3, [r7, #32]
+        }
+      }
+    }
+    q = iprh_tmp->next_pbuf;
+ 801b7a2:	693b      	ldr	r3, [r7, #16]
+ 801b7a4:	681b      	ldr	r3, [r3, #0]
+ 801b7a6:	627b      	str	r3, [r7, #36]	; 0x24
+    iprh_prev = iprh_tmp;
+ 801b7a8:	693b      	ldr	r3, [r7, #16]
+ 801b7aa:	62bb      	str	r3, [r7, #40]	; 0x28
+  for (q = ipr->p; q != NULL;) {
+ 801b7ac:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b7ae:	2b00      	cmp	r3, #0
+ 801b7b0:	d193      	bne.n	801b6da <ip_reass_chain_frag_into_datagram_and_validate+0xae>
+ 801b7b2:	e000      	b.n	801b7b6 <ip_reass_chain_frag_into_datagram_and_validate+0x18a>
+      break;
+ 801b7b4:	bf00      	nop
+  }
+
+  /* If q is NULL, then we made it to the end of the list. Determine what to do now */
+  if (q == NULL) {
+ 801b7b6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b7b8:	2b00      	cmp	r3, #0
+ 801b7ba:	d12d      	bne.n	801b818 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
+    if (iprh_prev != NULL) {
+ 801b7bc:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b7be:	2b00      	cmp	r3, #0
+ 801b7c0:	d01c      	beq.n	801b7fc <ip_reass_chain_frag_into_datagram_and_validate+0x1d0>
+      /* this is (for now), the fragment with the highest offset:
+       * chain it to the last fragment */
+#if IP_REASS_CHECK_OVERLAP
+      LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start);
+ 801b7c2:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b7c4:	88db      	ldrh	r3, [r3, #6]
+ 801b7c6:	b29a      	uxth	r2, r3
+ 801b7c8:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b7ca:	889b      	ldrh	r3, [r3, #4]
+ 801b7cc:	b29b      	uxth	r3, r3
+ 801b7ce:	429a      	cmp	r2, r3
+ 801b7d0:	d906      	bls.n	801b7e0 <ip_reass_chain_frag_into_datagram_and_validate+0x1b4>
+ 801b7d2:	4b45      	ldr	r3, [pc, #276]	; (801b8e8 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
+ 801b7d4:	f44f 72db 	mov.w	r2, #438	; 0x1b6
+ 801b7d8:	4944      	ldr	r1, [pc, #272]	; (801b8ec <ip_reass_chain_frag_into_datagram_and_validate+0x2c0>)
+ 801b7da:	4845      	ldr	r0, [pc, #276]	; (801b8f0 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
+ 801b7dc:	f000 fe0c 	bl	801c3f8 <iprintf>
+#endif /* IP_REASS_CHECK_OVERLAP */
+      iprh_prev->next_pbuf = new_p;
+ 801b7e0:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b7e2:	68ba      	ldr	r2, [r7, #8]
+ 801b7e4:	601a      	str	r2, [r3, #0]
+      if (iprh_prev->end != iprh->start) {
+ 801b7e6:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b7e8:	88db      	ldrh	r3, [r3, #6]
+ 801b7ea:	b29a      	uxth	r2, r3
+ 801b7ec:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b7ee:	889b      	ldrh	r3, [r3, #4]
+ 801b7f0:	b29b      	uxth	r3, r3
+ 801b7f2:	429a      	cmp	r2, r3
+ 801b7f4:	d010      	beq.n	801b818 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
+        valid = 0;
+ 801b7f6:	2300      	movs	r3, #0
+ 801b7f8:	623b      	str	r3, [r7, #32]
+ 801b7fa:	e00d      	b.n	801b818 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
+      }
+    } else {
+#if IP_REASS_CHECK_OVERLAP
+      LWIP_ASSERT("no previous fragment, this must be the first fragment!",
+ 801b7fc:	68fb      	ldr	r3, [r7, #12]
+ 801b7fe:	685b      	ldr	r3, [r3, #4]
+ 801b800:	2b00      	cmp	r3, #0
+ 801b802:	d006      	beq.n	801b812 <ip_reass_chain_frag_into_datagram_and_validate+0x1e6>
+ 801b804:	4b38      	ldr	r3, [pc, #224]	; (801b8e8 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
+ 801b806:	f240 12bf 	movw	r2, #447	; 0x1bf
+ 801b80a:	493a      	ldr	r1, [pc, #232]	; (801b8f4 <ip_reass_chain_frag_into_datagram_and_validate+0x2c8>)
+ 801b80c:	4838      	ldr	r0, [pc, #224]	; (801b8f0 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
+ 801b80e:	f000 fdf3 	bl	801c3f8 <iprintf>
+                  ipr->p == NULL);
+#endif /* IP_REASS_CHECK_OVERLAP */
+      /* this is the first fragment we ever received for this ip datagram */
+      ipr->p = new_p;
+ 801b812:	68fb      	ldr	r3, [r7, #12]
+ 801b814:	68ba      	ldr	r2, [r7, #8]
+ 801b816:	605a      	str	r2, [r3, #4]
+    }
+  }
+
+  /* At this point, the validation part begins: */
+  /* If we already received the last fragment */
+  if (is_last || ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0)) {
+ 801b818:	687b      	ldr	r3, [r7, #4]
+ 801b81a:	2b00      	cmp	r3, #0
+ 801b81c:	d105      	bne.n	801b82a <ip_reass_chain_frag_into_datagram_and_validate+0x1fe>
+ 801b81e:	68fb      	ldr	r3, [r7, #12]
+ 801b820:	7f9b      	ldrb	r3, [r3, #30]
+ 801b822:	f003 0301 	and.w	r3, r3, #1
+ 801b826:	2b00      	cmp	r3, #0
+ 801b828:	d059      	beq.n	801b8de <ip_reass_chain_frag_into_datagram_and_validate+0x2b2>
+    /* and had no holes so far */
+    if (valid) {
+ 801b82a:	6a3b      	ldr	r3, [r7, #32]
+ 801b82c:	2b00      	cmp	r3, #0
+ 801b82e:	d04f      	beq.n	801b8d0 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
+      /* then check if the rest of the fragments is here */
+      /* Check if the queue starts with the first datagram */
+      if ((ipr->p == NULL) || (((struct ip_reass_helper *)ipr->p->payload)->start != 0)) {
+ 801b830:	68fb      	ldr	r3, [r7, #12]
+ 801b832:	685b      	ldr	r3, [r3, #4]
+ 801b834:	2b00      	cmp	r3, #0
+ 801b836:	d006      	beq.n	801b846 <ip_reass_chain_frag_into_datagram_and_validate+0x21a>
+ 801b838:	68fb      	ldr	r3, [r7, #12]
+ 801b83a:	685b      	ldr	r3, [r3, #4]
+ 801b83c:	685b      	ldr	r3, [r3, #4]
+ 801b83e:	889b      	ldrh	r3, [r3, #4]
+ 801b840:	b29b      	uxth	r3, r3
+ 801b842:	2b00      	cmp	r3, #0
+ 801b844:	d002      	beq.n	801b84c <ip_reass_chain_frag_into_datagram_and_validate+0x220>
+        valid = 0;
+ 801b846:	2300      	movs	r3, #0
+ 801b848:	623b      	str	r3, [r7, #32]
+ 801b84a:	e041      	b.n	801b8d0 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
+      } else {
+        /* and check that there are no holes after this datagram */
+        iprh_prev = iprh;
+ 801b84c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b84e:	62bb      	str	r3, [r7, #40]	; 0x28
+        q = iprh->next_pbuf;
+ 801b850:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b852:	681b      	ldr	r3, [r3, #0]
+ 801b854:	627b      	str	r3, [r7, #36]	; 0x24
+        while (q != NULL) {
+ 801b856:	e012      	b.n	801b87e <ip_reass_chain_frag_into_datagram_and_validate+0x252>
+          iprh = (struct ip_reass_helper *)q->payload;
+ 801b858:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b85a:	685b      	ldr	r3, [r3, #4]
+ 801b85c:	62fb      	str	r3, [r7, #44]	; 0x2c
+          if (iprh_prev->end != iprh->start) {
+ 801b85e:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b860:	88db      	ldrh	r3, [r3, #6]
+ 801b862:	b29a      	uxth	r2, r3
+ 801b864:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b866:	889b      	ldrh	r3, [r3, #4]
+ 801b868:	b29b      	uxth	r3, r3
+ 801b86a:	429a      	cmp	r2, r3
+ 801b86c:	d002      	beq.n	801b874 <ip_reass_chain_frag_into_datagram_and_validate+0x248>
+            valid = 0;
+ 801b86e:	2300      	movs	r3, #0
+ 801b870:	623b      	str	r3, [r7, #32]
+            break;
+ 801b872:	e007      	b.n	801b884 <ip_reass_chain_frag_into_datagram_and_validate+0x258>
+          }
+          iprh_prev = iprh;
+ 801b874:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b876:	62bb      	str	r3, [r7, #40]	; 0x28
+          q = iprh->next_pbuf;
+ 801b878:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b87a:	681b      	ldr	r3, [r3, #0]
+ 801b87c:	627b      	str	r3, [r7, #36]	; 0x24
+        while (q != NULL) {
+ 801b87e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801b880:	2b00      	cmp	r3, #0
+ 801b882:	d1e9      	bne.n	801b858 <ip_reass_chain_frag_into_datagram_and_validate+0x22c>
+        }
+        /* if still valid, all fragments are received
+         * (because to the MF==0 already arrived */
+        if (valid) {
+ 801b884:	6a3b      	ldr	r3, [r7, #32]
+ 801b886:	2b00      	cmp	r3, #0
+ 801b888:	d022      	beq.n	801b8d0 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
+          LWIP_ASSERT("sanity check", ipr->p != NULL);
+ 801b88a:	68fb      	ldr	r3, [r7, #12]
+ 801b88c:	685b      	ldr	r3, [r3, #4]
+ 801b88e:	2b00      	cmp	r3, #0
+ 801b890:	d106      	bne.n	801b8a0 <ip_reass_chain_frag_into_datagram_and_validate+0x274>
+ 801b892:	4b15      	ldr	r3, [pc, #84]	; (801b8e8 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
+ 801b894:	f240 12df 	movw	r2, #479	; 0x1df
+ 801b898:	4917      	ldr	r1, [pc, #92]	; (801b8f8 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
+ 801b89a:	4815      	ldr	r0, [pc, #84]	; (801b8f0 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
+ 801b89c:	f000 fdac 	bl	801c3f8 <iprintf>
+          LWIP_ASSERT("sanity check",
+ 801b8a0:	68fb      	ldr	r3, [r7, #12]
+ 801b8a2:	685b      	ldr	r3, [r3, #4]
+ 801b8a4:	685b      	ldr	r3, [r3, #4]
+ 801b8a6:	6afa      	ldr	r2, [r7, #44]	; 0x2c
+ 801b8a8:	429a      	cmp	r2, r3
+ 801b8aa:	d106      	bne.n	801b8ba <ip_reass_chain_frag_into_datagram_and_validate+0x28e>
+ 801b8ac:	4b0e      	ldr	r3, [pc, #56]	; (801b8e8 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
+ 801b8ae:	f240 12e1 	movw	r2, #481	; 0x1e1
+ 801b8b2:	4911      	ldr	r1, [pc, #68]	; (801b8f8 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
+ 801b8b4:	480e      	ldr	r0, [pc, #56]	; (801b8f0 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
+ 801b8b6:	f000 fd9f 	bl	801c3f8 <iprintf>
+                      ((struct ip_reass_helper *)ipr->p->payload) != iprh);
+          LWIP_ASSERT("validate_datagram:next_pbuf!=NULL",
+ 801b8ba:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801b8bc:	681b      	ldr	r3, [r3, #0]
+ 801b8be:	2b00      	cmp	r3, #0
+ 801b8c0:	d006      	beq.n	801b8d0 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
+ 801b8c2:	4b09      	ldr	r3, [pc, #36]	; (801b8e8 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
+ 801b8c4:	f240 12e3 	movw	r2, #483	; 0x1e3
+ 801b8c8:	490c      	ldr	r1, [pc, #48]	; (801b8fc <ip_reass_chain_frag_into_datagram_and_validate+0x2d0>)
+ 801b8ca:	4809      	ldr	r0, [pc, #36]	; (801b8f0 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
+ 801b8cc:	f000 fd94 	bl	801c3f8 <iprintf>
+      }
+    }
+    /* If valid is 0 here, there are some fragments missing in the middle
+     * (since MF == 0 has already arrived). Such datagrams simply time out if
+     * no more fragments are received... */
+    return valid ? IP_REASS_VALIDATE_TELEGRAM_FINISHED : IP_REASS_VALIDATE_PBUF_QUEUED;
+ 801b8d0:	6a3b      	ldr	r3, [r7, #32]
+ 801b8d2:	2b00      	cmp	r3, #0
+ 801b8d4:	bf14      	ite	ne
+ 801b8d6:	2301      	movne	r3, #1
+ 801b8d8:	2300      	moveq	r3, #0
+ 801b8da:	b2db      	uxtb	r3, r3
+ 801b8dc:	e000      	b.n	801b8e0 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
+  }
+  /* If we come here, not all fragments were received, yet! */
+  return IP_REASS_VALIDATE_PBUF_QUEUED; /* not yet valid! */
+ 801b8de:	2300      	movs	r3, #0
+}
+ 801b8e0:	4618      	mov	r0, r3
+ 801b8e2:	3730      	adds	r7, #48	; 0x30
+ 801b8e4:	46bd      	mov	sp, r7
+ 801b8e6:	bd80      	pop	{r7, pc}
+ 801b8e8:	08020270 	.word	0x08020270
+ 801b8ec:	08020354 	.word	0x08020354
+ 801b8f0:	080202b8 	.word	0x080202b8
+ 801b8f4:	08020374 	.word	0x08020374
+ 801b8f8:	080203ac 	.word	0x080203ac
+ 801b8fc:	080203bc 	.word	0x080203bc
+
+0801b900 <ip4_reass>:
+ * @param p points to a pbuf chain of the fragment
+ * @return NULL if reassembly is incomplete, ? otherwise
+ */
+struct pbuf *
+ip4_reass(struct pbuf *p)
+{
+ 801b900:	b580      	push	{r7, lr}
+ 801b902:	b08e      	sub	sp, #56	; 0x38
+ 801b904:	af00      	add	r7, sp, #0
+ 801b906:	6078      	str	r0, [r7, #4]
+  int is_last;
+
+  IPFRAG_STATS_INC(ip_frag.recv);
+  MIB2_STATS_INC(mib2.ipreasmreqds);
+
+  fraghdr = (struct ip_hdr *)p->payload;
+ 801b908:	687b      	ldr	r3, [r7, #4]
+ 801b90a:	685b      	ldr	r3, [r3, #4]
+ 801b90c:	62bb      	str	r3, [r7, #40]	; 0x28
+
+  if (IPH_HL_BYTES(fraghdr) != IP_HLEN) {
+ 801b90e:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b910:	781b      	ldrb	r3, [r3, #0]
+ 801b912:	f003 030f 	and.w	r3, r3, #15
+ 801b916:	b2db      	uxtb	r3, r3
+ 801b918:	009b      	lsls	r3, r3, #2
+ 801b91a:	b2db      	uxtb	r3, r3
+ 801b91c:	2b14      	cmp	r3, #20
+ 801b91e:	f040 8167 	bne.w	801bbf0 <ip4_reass+0x2f0>
+    LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: IP options currently not supported!\n"));
+    IPFRAG_STATS_INC(ip_frag.err);
+    goto nullreturn;
+  }
+
+  offset = IPH_OFFSET_BYTES(fraghdr);
+ 801b922:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b924:	88db      	ldrh	r3, [r3, #6]
+ 801b926:	b29b      	uxth	r3, r3
+ 801b928:	4618      	mov	r0, r3
+ 801b92a:	f7f4 fc81 	bl	8010230 <lwip_htons>
+ 801b92e:	4603      	mov	r3, r0
+ 801b930:	f3c3 030c 	ubfx	r3, r3, #0, #13
+ 801b934:	b29b      	uxth	r3, r3
+ 801b936:	00db      	lsls	r3, r3, #3
+ 801b938:	84fb      	strh	r3, [r7, #38]	; 0x26
+  len = lwip_ntohs(IPH_LEN(fraghdr));
+ 801b93a:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b93c:	885b      	ldrh	r3, [r3, #2]
+ 801b93e:	b29b      	uxth	r3, r3
+ 801b940:	4618      	mov	r0, r3
+ 801b942:	f7f4 fc75 	bl	8010230 <lwip_htons>
+ 801b946:	4603      	mov	r3, r0
+ 801b948:	84bb      	strh	r3, [r7, #36]	; 0x24
+  hlen = IPH_HL_BYTES(fraghdr);
+ 801b94a:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b94c:	781b      	ldrb	r3, [r3, #0]
+ 801b94e:	f003 030f 	and.w	r3, r3, #15
+ 801b952:	b2db      	uxtb	r3, r3
+ 801b954:	009b      	lsls	r3, r3, #2
+ 801b956:	f887 3023 	strb.w	r3, [r7, #35]	; 0x23
+  if (hlen > len) {
+ 801b95a:	f897 3023 	ldrb.w	r3, [r7, #35]	; 0x23
+ 801b95e:	b29b      	uxth	r3, r3
+ 801b960:	8cba      	ldrh	r2, [r7, #36]	; 0x24
+ 801b962:	429a      	cmp	r2, r3
+ 801b964:	f0c0 8146 	bcc.w	801bbf4 <ip4_reass+0x2f4>
+    /* invalid datagram */
+    goto nullreturn;
+  }
+  len = (u16_t)(len - hlen);
+ 801b968:	f897 3023 	ldrb.w	r3, [r7, #35]	; 0x23
+ 801b96c:	b29b      	uxth	r3, r3
+ 801b96e:	8cba      	ldrh	r2, [r7, #36]	; 0x24
+ 801b970:	1ad3      	subs	r3, r2, r3
+ 801b972:	84bb      	strh	r3, [r7, #36]	; 0x24
+
+  /* Check if we are allowed to enqueue more datagrams. */
+  clen = pbuf_clen(p);
+ 801b974:	6878      	ldr	r0, [r7, #4]
+ 801b976:	f7f6 f89d 	bl	8011ab4 <pbuf_clen>
+ 801b97a:	4603      	mov	r3, r0
+ 801b97c:	843b      	strh	r3, [r7, #32]
+  if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) {
+ 801b97e:	4ba3      	ldr	r3, [pc, #652]	; (801bc0c <ip4_reass+0x30c>)
+ 801b980:	881b      	ldrh	r3, [r3, #0]
+ 801b982:	461a      	mov	r2, r3
+ 801b984:	8c3b      	ldrh	r3, [r7, #32]
+ 801b986:	4413      	add	r3, r2
+ 801b988:	2b0a      	cmp	r3, #10
+ 801b98a:	dd10      	ble.n	801b9ae <ip4_reass+0xae>
+#if IP_REASS_FREE_OLDEST
+    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
+ 801b98c:	8c3b      	ldrh	r3, [r7, #32]
+ 801b98e:	4619      	mov	r1, r3
+ 801b990:	6ab8      	ldr	r0, [r7, #40]	; 0x28
+ 801b992:	f7ff fd81 	bl	801b498 <ip_reass_remove_oldest_datagram>
+ 801b996:	4603      	mov	r3, r0
+ 801b998:	2b00      	cmp	r3, #0
+ 801b99a:	f000 812d 	beq.w	801bbf8 <ip4_reass+0x2f8>
+        ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS))
+ 801b99e:	4b9b      	ldr	r3, [pc, #620]	; (801bc0c <ip4_reass+0x30c>)
+ 801b9a0:	881b      	ldrh	r3, [r3, #0]
+ 801b9a2:	461a      	mov	r2, r3
+ 801b9a4:	8c3b      	ldrh	r3, [r7, #32]
+ 801b9a6:	4413      	add	r3, r2
+    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
+ 801b9a8:	2b0a      	cmp	r3, #10
+ 801b9aa:	f300 8125 	bgt.w	801bbf8 <ip4_reass+0x2f8>
+    }
+  }
+
+  /* Look for the datagram the fragment belongs to in the current datagram queue,
+   * remembering the previous in the queue for later dequeueing. */
+  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
+ 801b9ae:	4b98      	ldr	r3, [pc, #608]	; (801bc10 <ip4_reass+0x310>)
+ 801b9b0:	681b      	ldr	r3, [r3, #0]
+ 801b9b2:	633b      	str	r3, [r7, #48]	; 0x30
+ 801b9b4:	e015      	b.n	801b9e2 <ip4_reass+0xe2>
+    /* Check if the incoming fragment matches the one currently present
+       in the reassembly buffer. If so, we proceed with copying the
+       fragment into the buffer. */
+    if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) {
+ 801b9b6:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801b9b8:	695a      	ldr	r2, [r3, #20]
+ 801b9ba:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b9bc:	68db      	ldr	r3, [r3, #12]
+ 801b9be:	429a      	cmp	r2, r3
+ 801b9c0:	d10c      	bne.n	801b9dc <ip4_reass+0xdc>
+ 801b9c2:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801b9c4:	699a      	ldr	r2, [r3, #24]
+ 801b9c6:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b9c8:	691b      	ldr	r3, [r3, #16]
+ 801b9ca:	429a      	cmp	r2, r3
+ 801b9cc:	d106      	bne.n	801b9dc <ip4_reass+0xdc>
+ 801b9ce:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801b9d0:	899a      	ldrh	r2, [r3, #12]
+ 801b9d2:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801b9d4:	889b      	ldrh	r3, [r3, #4]
+ 801b9d6:	b29b      	uxth	r3, r3
+ 801b9d8:	429a      	cmp	r2, r3
+ 801b9da:	d006      	beq.n	801b9ea <ip4_reass+0xea>
+  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
+ 801b9dc:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801b9de:	681b      	ldr	r3, [r3, #0]
+ 801b9e0:	633b      	str	r3, [r7, #48]	; 0x30
+ 801b9e2:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801b9e4:	2b00      	cmp	r3, #0
+ 801b9e6:	d1e6      	bne.n	801b9b6 <ip4_reass+0xb6>
+ 801b9e8:	e000      	b.n	801b9ec <ip4_reass+0xec>
+      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: matching previous fragment ID=%"X16_F"\n",
+                                   lwip_ntohs(IPH_ID(fraghdr))));
+      IPFRAG_STATS_INC(ip_frag.cachehit);
+      break;
+ 801b9ea:	bf00      	nop
+    }
+  }
+
+  if (ipr == NULL) {
+ 801b9ec:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801b9ee:	2b00      	cmp	r3, #0
+ 801b9f0:	d109      	bne.n	801ba06 <ip4_reass+0x106>
+    /* Enqueue a new datagram into the datagram queue */
+    ipr = ip_reass_enqueue_new_datagram(fraghdr, clen);
+ 801b9f2:	8c3b      	ldrh	r3, [r7, #32]
+ 801b9f4:	4619      	mov	r1, r3
+ 801b9f6:	6ab8      	ldr	r0, [r7, #40]	; 0x28
+ 801b9f8:	f7ff fdb0 	bl	801b55c <ip_reass_enqueue_new_datagram>
+ 801b9fc:	6338      	str	r0, [r7, #48]	; 0x30
+    /* Bail if unable to enqueue */
+    if (ipr == NULL) {
+ 801b9fe:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801ba00:	2b00      	cmp	r3, #0
+ 801ba02:	d11c      	bne.n	801ba3e <ip4_reass+0x13e>
+      goto nullreturn;
+ 801ba04:	e0f9      	b.n	801bbfa <ip4_reass+0x2fa>
+    }
+  } else {
+    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
+ 801ba06:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801ba08:	88db      	ldrh	r3, [r3, #6]
+ 801ba0a:	b29b      	uxth	r3, r3
+ 801ba0c:	4618      	mov	r0, r3
+ 801ba0e:	f7f4 fc0f 	bl	8010230 <lwip_htons>
+ 801ba12:	4603      	mov	r3, r0
+ 801ba14:	f3c3 030c 	ubfx	r3, r3, #0, #13
+ 801ba18:	2b00      	cmp	r3, #0
+ 801ba1a:	d110      	bne.n	801ba3e <ip4_reass+0x13e>
+        ((lwip_ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) {
+ 801ba1c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801ba1e:	89db      	ldrh	r3, [r3, #14]
+ 801ba20:	4618      	mov	r0, r3
+ 801ba22:	f7f4 fc05 	bl	8010230 <lwip_htons>
+ 801ba26:	4603      	mov	r3, r0
+ 801ba28:	f3c3 030c 	ubfx	r3, r3, #0, #13
+    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
+ 801ba2c:	2b00      	cmp	r3, #0
+ 801ba2e:	d006      	beq.n	801ba3e <ip4_reass+0x13e>
+      /* ipr->iphdr is not the header from the first fragment, but fraghdr is
+       * -> copy fraghdr into ipr->iphdr since we want to have the header
+       * of the first fragment (for ICMP time exceeded and later, for copying
+       * all options, if supported)*/
+      SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN);
+ 801ba30:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801ba32:	3308      	adds	r3, #8
+ 801ba34:	2214      	movs	r2, #20
+ 801ba36:	6ab9      	ldr	r1, [r7, #40]	; 0x28
+ 801ba38:	4618      	mov	r0, r3
+ 801ba3a:	f000 fcb0 	bl	801c39e <memcpy>
+
+  /* At this point, we have either created a new entry or pointing
+   * to an existing one */
+
+  /* check for 'no more fragments', and update queue entry*/
+  is_last = (IPH_OFFSET(fraghdr) & PP_NTOHS(IP_MF)) == 0;
+ 801ba3e:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801ba40:	88db      	ldrh	r3, [r3, #6]
+ 801ba42:	b29b      	uxth	r3, r3
+ 801ba44:	f003 0320 	and.w	r3, r3, #32
+ 801ba48:	2b00      	cmp	r3, #0
+ 801ba4a:	bf0c      	ite	eq
+ 801ba4c:	2301      	moveq	r3, #1
+ 801ba4e:	2300      	movne	r3, #0
+ 801ba50:	b2db      	uxtb	r3, r3
+ 801ba52:	61fb      	str	r3, [r7, #28]
+  if (is_last) {
+ 801ba54:	69fb      	ldr	r3, [r7, #28]
+ 801ba56:	2b00      	cmp	r3, #0
+ 801ba58:	d00e      	beq.n	801ba78 <ip4_reass+0x178>
+    u16_t datagram_len = (u16_t)(offset + len);
+ 801ba5a:	8cfa      	ldrh	r2, [r7, #38]	; 0x26
+ 801ba5c:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
+ 801ba5e:	4413      	add	r3, r2
+ 801ba60:	837b      	strh	r3, [r7, #26]
+    if ((datagram_len < offset) || (datagram_len > (0xFFFF - IP_HLEN))) {
+ 801ba62:	8b7a      	ldrh	r2, [r7, #26]
+ 801ba64:	8cfb      	ldrh	r3, [r7, #38]	; 0x26
+ 801ba66:	429a      	cmp	r2, r3
+ 801ba68:	f0c0 80a0 	bcc.w	801bbac <ip4_reass+0x2ac>
+ 801ba6c:	8b7b      	ldrh	r3, [r7, #26]
+ 801ba6e:	f64f 72eb 	movw	r2, #65515	; 0xffeb
+ 801ba72:	4293      	cmp	r3, r2
+ 801ba74:	f200 809a 	bhi.w	801bbac <ip4_reass+0x2ac>
+      goto nullreturn_ipr;
+    }
+  }
+  /* find the right place to insert this pbuf */
+  /* @todo: trim pbufs if fragments are overlapping */
+  valid = ip_reass_chain_frag_into_datagram_and_validate(ipr, p, is_last);
+ 801ba78:	69fa      	ldr	r2, [r7, #28]
+ 801ba7a:	6879      	ldr	r1, [r7, #4]
+ 801ba7c:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 801ba7e:	f7ff fdd5 	bl	801b62c <ip_reass_chain_frag_into_datagram_and_validate>
+ 801ba82:	6178      	str	r0, [r7, #20]
+  if (valid == IP_REASS_VALIDATE_PBUF_DROPPED) {
+ 801ba84:	697b      	ldr	r3, [r7, #20]
+ 801ba86:	f1b3 3fff 	cmp.w	r3, #4294967295
+ 801ba8a:	f000 8091 	beq.w	801bbb0 <ip4_reass+0x2b0>
+  /* if we come here, the pbuf has been enqueued */
+
+  /* Track the current number of pbufs current 'in-flight', in order to limit
+     the number of fragments that may be enqueued at any one time
+     (overflow checked by testing against IP_REASS_MAX_PBUFS) */
+  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount + clen);
+ 801ba8e:	4b5f      	ldr	r3, [pc, #380]	; (801bc0c <ip4_reass+0x30c>)
+ 801ba90:	881a      	ldrh	r2, [r3, #0]
+ 801ba92:	8c3b      	ldrh	r3, [r7, #32]
+ 801ba94:	4413      	add	r3, r2
+ 801ba96:	b29a      	uxth	r2, r3
+ 801ba98:	4b5c      	ldr	r3, [pc, #368]	; (801bc0c <ip4_reass+0x30c>)
+ 801ba9a:	801a      	strh	r2, [r3, #0]
+  if (is_last) {
+ 801ba9c:	69fb      	ldr	r3, [r7, #28]
+ 801ba9e:	2b00      	cmp	r3, #0
+ 801baa0:	d00d      	beq.n	801babe <ip4_reass+0x1be>
+    u16_t datagram_len = (u16_t)(offset + len);
+ 801baa2:	8cfa      	ldrh	r2, [r7, #38]	; 0x26
+ 801baa4:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
+ 801baa6:	4413      	add	r3, r2
+ 801baa8:	827b      	strh	r3, [r7, #18]
+    ipr->datagram_len = datagram_len;
+ 801baaa:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801baac:	8a7a      	ldrh	r2, [r7, #18]
+ 801baae:	839a      	strh	r2, [r3, #28]
+    ipr->flags |= IP_REASS_FLAG_LASTFRAG;
+ 801bab0:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bab2:	7f9b      	ldrb	r3, [r3, #30]
+ 801bab4:	f043 0301 	orr.w	r3, r3, #1
+ 801bab8:	b2da      	uxtb	r2, r3
+ 801baba:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801babc:	779a      	strb	r2, [r3, #30]
+    LWIP_DEBUGF(IP_REASS_DEBUG,
+                ("ip4_reass: last fragment seen, total len %"S16_F"\n",
+                 ipr->datagram_len));
+  }
+
+  if (valid == IP_REASS_VALIDATE_TELEGRAM_FINISHED) {
+ 801babe:	697b      	ldr	r3, [r7, #20]
+ 801bac0:	2b01      	cmp	r3, #1
+ 801bac2:	d171      	bne.n	801bba8 <ip4_reass+0x2a8>
+    struct ip_reassdata *ipr_prev;
+    /* the totally last fragment (flag more fragments = 0) was received at least
+     * once AND all fragments are received */
+    u16_t datagram_len = (u16_t)(ipr->datagram_len + IP_HLEN);
+ 801bac4:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bac6:	8b9b      	ldrh	r3, [r3, #28]
+ 801bac8:	3314      	adds	r3, #20
+ 801baca:	823b      	strh	r3, [r7, #16]
+
+    /* save the second pbuf before copying the header over the pointer */
+    r = ((struct ip_reass_helper *)ipr->p->payload)->next_pbuf;
+ 801bacc:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bace:	685b      	ldr	r3, [r3, #4]
+ 801bad0:	685b      	ldr	r3, [r3, #4]
+ 801bad2:	681b      	ldr	r3, [r3, #0]
+ 801bad4:	637b      	str	r3, [r7, #52]	; 0x34
+
+    /* copy the original ip header back to the first pbuf */
+    fraghdr = (struct ip_hdr *)(ipr->p->payload);
+ 801bad6:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bad8:	685b      	ldr	r3, [r3, #4]
+ 801bada:	685b      	ldr	r3, [r3, #4]
+ 801badc:	62bb      	str	r3, [r7, #40]	; 0x28
+    SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN);
+ 801bade:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bae0:	3308      	adds	r3, #8
+ 801bae2:	2214      	movs	r2, #20
+ 801bae4:	4619      	mov	r1, r3
+ 801bae6:	6ab8      	ldr	r0, [r7, #40]	; 0x28
+ 801bae8:	f000 fc59 	bl	801c39e <memcpy>
+    IPH_LEN_SET(fraghdr, lwip_htons(datagram_len));
+ 801baec:	8a3b      	ldrh	r3, [r7, #16]
+ 801baee:	4618      	mov	r0, r3
+ 801baf0:	f7f4 fb9e 	bl	8010230 <lwip_htons>
+ 801baf4:	4603      	mov	r3, r0
+ 801baf6:	461a      	mov	r2, r3
+ 801baf8:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801bafa:	805a      	strh	r2, [r3, #2]
+    IPH_OFFSET_SET(fraghdr, 0);
+ 801bafc:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801bafe:	2200      	movs	r2, #0
+ 801bb00:	719a      	strb	r2, [r3, #6]
+ 801bb02:	2200      	movs	r2, #0
+ 801bb04:	71da      	strb	r2, [r3, #7]
+    IPH_CHKSUM_SET(fraghdr, 0);
+ 801bb06:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 801bb08:	2200      	movs	r2, #0
+ 801bb0a:	729a      	strb	r2, [r3, #10]
+ 801bb0c:	2200      	movs	r2, #0
+ 801bb0e:	72da      	strb	r2, [r3, #11]
+    IF__NETIF_CHECKSUM_ENABLED(ip_current_input_netif(), NETIF_CHECKSUM_GEN_IP) {
+      IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN));
+    }
+#endif /* CHECKSUM_GEN_IP */
+
+    p = ipr->p;
+ 801bb10:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bb12:	685b      	ldr	r3, [r3, #4]
+ 801bb14:	607b      	str	r3, [r7, #4]
+
+    /* chain together the pbufs contained within the reass_data list. */
+    while (r != NULL) {
+ 801bb16:	e00d      	b.n	801bb34 <ip4_reass+0x234>
+      iprh = (struct ip_reass_helper *)r->payload;
+ 801bb18:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 801bb1a:	685b      	ldr	r3, [r3, #4]
+ 801bb1c:	60fb      	str	r3, [r7, #12]
+
+      /* hide the ip header for every succeeding fragment */
+      pbuf_remove_header(r, IP_HLEN);
+ 801bb1e:	2114      	movs	r1, #20
+ 801bb20:	6b78      	ldr	r0, [r7, #52]	; 0x34
+ 801bb22:	f7f5 feb3 	bl	801188c <pbuf_remove_header>
+      pbuf_cat(p, r);
+ 801bb26:	6b79      	ldr	r1, [r7, #52]	; 0x34
+ 801bb28:	6878      	ldr	r0, [r7, #4]
+ 801bb2a:	f7f6 f803 	bl	8011b34 <pbuf_cat>
+      r = iprh->next_pbuf;
+ 801bb2e:	68fb      	ldr	r3, [r7, #12]
+ 801bb30:	681b      	ldr	r3, [r3, #0]
+ 801bb32:	637b      	str	r3, [r7, #52]	; 0x34
+    while (r != NULL) {
+ 801bb34:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 801bb36:	2b00      	cmp	r3, #0
+ 801bb38:	d1ee      	bne.n	801bb18 <ip4_reass+0x218>
+    }
+
+    /* find the previous entry in the linked list */
+    if (ipr == reassdatagrams) {
+ 801bb3a:	4b35      	ldr	r3, [pc, #212]	; (801bc10 <ip4_reass+0x310>)
+ 801bb3c:	681b      	ldr	r3, [r3, #0]
+ 801bb3e:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 801bb40:	429a      	cmp	r2, r3
+ 801bb42:	d102      	bne.n	801bb4a <ip4_reass+0x24a>
+      ipr_prev = NULL;
+ 801bb44:	2300      	movs	r3, #0
+ 801bb46:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 801bb48:	e010      	b.n	801bb6c <ip4_reass+0x26c>
+    } else {
+      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
+ 801bb4a:	4b31      	ldr	r3, [pc, #196]	; (801bc10 <ip4_reass+0x310>)
+ 801bb4c:	681b      	ldr	r3, [r3, #0]
+ 801bb4e:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 801bb50:	e007      	b.n	801bb62 <ip4_reass+0x262>
+        if (ipr_prev->next == ipr) {
+ 801bb52:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801bb54:	681b      	ldr	r3, [r3, #0]
+ 801bb56:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 801bb58:	429a      	cmp	r2, r3
+ 801bb5a:	d006      	beq.n	801bb6a <ip4_reass+0x26a>
+      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
+ 801bb5c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801bb5e:	681b      	ldr	r3, [r3, #0]
+ 801bb60:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 801bb62:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801bb64:	2b00      	cmp	r3, #0
+ 801bb66:	d1f4      	bne.n	801bb52 <ip4_reass+0x252>
+ 801bb68:	e000      	b.n	801bb6c <ip4_reass+0x26c>
+          break;
+ 801bb6a:	bf00      	nop
+        }
+      }
+    }
+
+    /* release the sources allocate for the fragment queue entry */
+    ip_reass_dequeue_datagram(ipr, ipr_prev);
+ 801bb6c:	6af9      	ldr	r1, [r7, #44]	; 0x2c
+ 801bb6e:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 801bb70:	f7ff fd2e 	bl	801b5d0 <ip_reass_dequeue_datagram>
+
+    /* and adjust the number of pbufs currently queued for reassembly. */
+    clen = pbuf_clen(p);
+ 801bb74:	6878      	ldr	r0, [r7, #4]
+ 801bb76:	f7f5 ff9d 	bl	8011ab4 <pbuf_clen>
+ 801bb7a:	4603      	mov	r3, r0
+ 801bb7c:	843b      	strh	r3, [r7, #32]
+    LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= clen);
+ 801bb7e:	4b23      	ldr	r3, [pc, #140]	; (801bc0c <ip4_reass+0x30c>)
+ 801bb80:	881b      	ldrh	r3, [r3, #0]
+ 801bb82:	8c3a      	ldrh	r2, [r7, #32]
+ 801bb84:	429a      	cmp	r2, r3
+ 801bb86:	d906      	bls.n	801bb96 <ip4_reass+0x296>
+ 801bb88:	4b22      	ldr	r3, [pc, #136]	; (801bc14 <ip4_reass+0x314>)
+ 801bb8a:	f240 229b 	movw	r2, #667	; 0x29b
+ 801bb8e:	4922      	ldr	r1, [pc, #136]	; (801bc18 <ip4_reass+0x318>)
+ 801bb90:	4822      	ldr	r0, [pc, #136]	; (801bc1c <ip4_reass+0x31c>)
+ 801bb92:	f000 fc31 	bl	801c3f8 <iprintf>
+    ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - clen);
+ 801bb96:	4b1d      	ldr	r3, [pc, #116]	; (801bc0c <ip4_reass+0x30c>)
+ 801bb98:	881a      	ldrh	r2, [r3, #0]
+ 801bb9a:	8c3b      	ldrh	r3, [r7, #32]
+ 801bb9c:	1ad3      	subs	r3, r2, r3
+ 801bb9e:	b29a      	uxth	r2, r3
+ 801bba0:	4b1a      	ldr	r3, [pc, #104]	; (801bc0c <ip4_reass+0x30c>)
+ 801bba2:	801a      	strh	r2, [r3, #0]
+
+    MIB2_STATS_INC(mib2.ipreasmoks);
+
+    /* Return the pbuf chain */
+    return p;
+ 801bba4:	687b      	ldr	r3, [r7, #4]
+ 801bba6:	e02c      	b.n	801bc02 <ip4_reass+0x302>
+  }
+  /* the datagram is not (yet?) reassembled completely */
+  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount));
+  return NULL;
+ 801bba8:	2300      	movs	r3, #0
+ 801bbaa:	e02a      	b.n	801bc02 <ip4_reass+0x302>
+
+nullreturn_ipr:
+ 801bbac:	bf00      	nop
+ 801bbae:	e000      	b.n	801bbb2 <ip4_reass+0x2b2>
+    goto nullreturn_ipr;
+ 801bbb0:	bf00      	nop
+  LWIP_ASSERT("ipr != NULL", ipr != NULL);
+ 801bbb2:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bbb4:	2b00      	cmp	r3, #0
+ 801bbb6:	d106      	bne.n	801bbc6 <ip4_reass+0x2c6>
+ 801bbb8:	4b16      	ldr	r3, [pc, #88]	; (801bc14 <ip4_reass+0x314>)
+ 801bbba:	f44f 722a 	mov.w	r2, #680	; 0x2a8
+ 801bbbe:	4918      	ldr	r1, [pc, #96]	; (801bc20 <ip4_reass+0x320>)
+ 801bbc0:	4816      	ldr	r0, [pc, #88]	; (801bc1c <ip4_reass+0x31c>)
+ 801bbc2:	f000 fc19 	bl	801c3f8 <iprintf>
+  if (ipr->p == NULL) {
+ 801bbc6:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bbc8:	685b      	ldr	r3, [r3, #4]
+ 801bbca:	2b00      	cmp	r3, #0
+ 801bbcc:	d114      	bne.n	801bbf8 <ip4_reass+0x2f8>
+    /* dropped pbuf after creating a new datagram entry: remove the entry, too */
+    LWIP_ASSERT("not firstalthough just enqueued", ipr == reassdatagrams);
+ 801bbce:	4b10      	ldr	r3, [pc, #64]	; (801bc10 <ip4_reass+0x310>)
+ 801bbd0:	681b      	ldr	r3, [r3, #0]
+ 801bbd2:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 801bbd4:	429a      	cmp	r2, r3
+ 801bbd6:	d006      	beq.n	801bbe6 <ip4_reass+0x2e6>
+ 801bbd8:	4b0e      	ldr	r3, [pc, #56]	; (801bc14 <ip4_reass+0x314>)
+ 801bbda:	f240 22ab 	movw	r2, #683	; 0x2ab
+ 801bbde:	4911      	ldr	r1, [pc, #68]	; (801bc24 <ip4_reass+0x324>)
+ 801bbe0:	480e      	ldr	r0, [pc, #56]	; (801bc1c <ip4_reass+0x31c>)
+ 801bbe2:	f000 fc09 	bl	801c3f8 <iprintf>
+    ip_reass_dequeue_datagram(ipr, NULL);
+ 801bbe6:	2100      	movs	r1, #0
+ 801bbe8:	6b38      	ldr	r0, [r7, #48]	; 0x30
+ 801bbea:	f7ff fcf1 	bl	801b5d0 <ip_reass_dequeue_datagram>
+ 801bbee:	e004      	b.n	801bbfa <ip4_reass+0x2fa>
+    goto nullreturn;
+ 801bbf0:	bf00      	nop
+ 801bbf2:	e002      	b.n	801bbfa <ip4_reass+0x2fa>
+    goto nullreturn;
+ 801bbf4:	bf00      	nop
+ 801bbf6:	e000      	b.n	801bbfa <ip4_reass+0x2fa>
+  }
+
+nullreturn:
+ 801bbf8:	bf00      	nop
+  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: nullreturn\n"));
+  IPFRAG_STATS_INC(ip_frag.drop);
+  pbuf_free(p);
+ 801bbfa:	6878      	ldr	r0, [r7, #4]
+ 801bbfc:	f7f5 fecc 	bl	8011998 <pbuf_free>
+  return NULL;
+ 801bc00:	2300      	movs	r3, #0
+}
+ 801bc02:	4618      	mov	r0, r3
+ 801bc04:	3738      	adds	r7, #56	; 0x38
+ 801bc06:	46bd      	mov	sp, r7
+ 801bc08:	bd80      	pop	{r7, pc}
+ 801bc0a:	bf00      	nop
+ 801bc0c:	2000885c 	.word	0x2000885c
+ 801bc10:	20008858 	.word	0x20008858
+ 801bc14:	08020270 	.word	0x08020270
+ 801bc18:	080203e0 	.word	0x080203e0
+ 801bc1c:	080202b8 	.word	0x080202b8
+ 801bc20:	080203fc 	.word	0x080203fc
+ 801bc24:	08020408 	.word	0x08020408
+
+0801bc28 <ip_frag_alloc_pbuf_custom_ref>:
+#if IP_FRAG
+#if !LWIP_NETIF_TX_SINGLE_PBUF
+/** Allocate a new struct pbuf_custom_ref */
+static struct pbuf_custom_ref *
+ip_frag_alloc_pbuf_custom_ref(void)
+{
+ 801bc28:	b580      	push	{r7, lr}
+ 801bc2a:	af00      	add	r7, sp, #0
+  return (struct pbuf_custom_ref *)memp_malloc(MEMP_FRAG_PBUF);
+ 801bc2c:	2005      	movs	r0, #5
+ 801bc2e:	f7f4 ffb5 	bl	8010b9c <memp_malloc>
+ 801bc32:	4603      	mov	r3, r0
+}
+ 801bc34:	4618      	mov	r0, r3
+ 801bc36:	bd80      	pop	{r7, pc}
+
+0801bc38 <ip_frag_free_pbuf_custom_ref>:
+
+/** Free a struct pbuf_custom_ref */
+static void
+ip_frag_free_pbuf_custom_ref(struct pbuf_custom_ref *p)
+{
+ 801bc38:	b580      	push	{r7, lr}
+ 801bc3a:	b082      	sub	sp, #8
+ 801bc3c:	af00      	add	r7, sp, #0
+ 801bc3e:	6078      	str	r0, [r7, #4]
+  LWIP_ASSERT("p != NULL", p != NULL);
+ 801bc40:	687b      	ldr	r3, [r7, #4]
+ 801bc42:	2b00      	cmp	r3, #0
+ 801bc44:	d106      	bne.n	801bc54 <ip_frag_free_pbuf_custom_ref+0x1c>
+ 801bc46:	4b07      	ldr	r3, [pc, #28]	; (801bc64 <ip_frag_free_pbuf_custom_ref+0x2c>)
+ 801bc48:	f44f 7231 	mov.w	r2, #708	; 0x2c4
+ 801bc4c:	4906      	ldr	r1, [pc, #24]	; (801bc68 <ip_frag_free_pbuf_custom_ref+0x30>)
+ 801bc4e:	4807      	ldr	r0, [pc, #28]	; (801bc6c <ip_frag_free_pbuf_custom_ref+0x34>)
+ 801bc50:	f000 fbd2 	bl	801c3f8 <iprintf>
+  memp_free(MEMP_FRAG_PBUF, p);
+ 801bc54:	6879      	ldr	r1, [r7, #4]
+ 801bc56:	2005      	movs	r0, #5
+ 801bc58:	f7f4 fff2 	bl	8010c40 <memp_free>
+}
+ 801bc5c:	bf00      	nop
+ 801bc5e:	3708      	adds	r7, #8
+ 801bc60:	46bd      	mov	sp, r7
+ 801bc62:	bd80      	pop	{r7, pc}
+ 801bc64:	08020270 	.word	0x08020270
+ 801bc68:	08020428 	.word	0x08020428
+ 801bc6c:	080202b8 	.word	0x080202b8
+
+0801bc70 <ipfrag_free_pbuf_custom>:
+
+/** Free-callback function to free a 'struct pbuf_custom_ref', called by
+ * pbuf_free. */
+static void
+ipfrag_free_pbuf_custom(struct pbuf *p)
+{
+ 801bc70:	b580      	push	{r7, lr}
+ 801bc72:	b084      	sub	sp, #16
+ 801bc74:	af00      	add	r7, sp, #0
+ 801bc76:	6078      	str	r0, [r7, #4]
+  struct pbuf_custom_ref *pcr = (struct pbuf_custom_ref *)p;
+ 801bc78:	687b      	ldr	r3, [r7, #4]
+ 801bc7a:	60fb      	str	r3, [r7, #12]
+  LWIP_ASSERT("pcr != NULL", pcr != NULL);
+ 801bc7c:	68fb      	ldr	r3, [r7, #12]
+ 801bc7e:	2b00      	cmp	r3, #0
+ 801bc80:	d106      	bne.n	801bc90 <ipfrag_free_pbuf_custom+0x20>
+ 801bc82:	4b11      	ldr	r3, [pc, #68]	; (801bcc8 <ipfrag_free_pbuf_custom+0x58>)
+ 801bc84:	f240 22ce 	movw	r2, #718	; 0x2ce
+ 801bc88:	4910      	ldr	r1, [pc, #64]	; (801bccc <ipfrag_free_pbuf_custom+0x5c>)
+ 801bc8a:	4811      	ldr	r0, [pc, #68]	; (801bcd0 <ipfrag_free_pbuf_custom+0x60>)
+ 801bc8c:	f000 fbb4 	bl	801c3f8 <iprintf>
+  LWIP_ASSERT("pcr == p", (void *)pcr == (void *)p);
+ 801bc90:	68fa      	ldr	r2, [r7, #12]
+ 801bc92:	687b      	ldr	r3, [r7, #4]
+ 801bc94:	429a      	cmp	r2, r3
+ 801bc96:	d006      	beq.n	801bca6 <ipfrag_free_pbuf_custom+0x36>
+ 801bc98:	4b0b      	ldr	r3, [pc, #44]	; (801bcc8 <ipfrag_free_pbuf_custom+0x58>)
+ 801bc9a:	f240 22cf 	movw	r2, #719	; 0x2cf
+ 801bc9e:	490d      	ldr	r1, [pc, #52]	; (801bcd4 <ipfrag_free_pbuf_custom+0x64>)
+ 801bca0:	480b      	ldr	r0, [pc, #44]	; (801bcd0 <ipfrag_free_pbuf_custom+0x60>)
+ 801bca2:	f000 fba9 	bl	801c3f8 <iprintf>
+  if (pcr->original != NULL) {
+ 801bca6:	68fb      	ldr	r3, [r7, #12]
+ 801bca8:	695b      	ldr	r3, [r3, #20]
+ 801bcaa:	2b00      	cmp	r3, #0
+ 801bcac:	d004      	beq.n	801bcb8 <ipfrag_free_pbuf_custom+0x48>
+    pbuf_free(pcr->original);
+ 801bcae:	68fb      	ldr	r3, [r7, #12]
+ 801bcb0:	695b      	ldr	r3, [r3, #20]
+ 801bcb2:	4618      	mov	r0, r3
+ 801bcb4:	f7f5 fe70 	bl	8011998 <pbuf_free>
+  }
+  ip_frag_free_pbuf_custom_ref(pcr);
+ 801bcb8:	68f8      	ldr	r0, [r7, #12]
+ 801bcba:	f7ff ffbd 	bl	801bc38 <ip_frag_free_pbuf_custom_ref>
+}
+ 801bcbe:	bf00      	nop
+ 801bcc0:	3710      	adds	r7, #16
+ 801bcc2:	46bd      	mov	sp, r7
+ 801bcc4:	bd80      	pop	{r7, pc}
+ 801bcc6:	bf00      	nop
+ 801bcc8:	08020270 	.word	0x08020270
+ 801bccc:	08020434 	.word	0x08020434
+ 801bcd0:	080202b8 	.word	0x080202b8
+ 801bcd4:	08020440 	.word	0x08020440
+
+0801bcd8 <ip4_frag>:
+ *
+ * @return ERR_OK if sent successfully, err_t otherwise
+ */
+err_t
+ip4_frag(struct pbuf *p, struct netif *netif, const ip4_addr_t *dest)
+{
+ 801bcd8:	b580      	push	{r7, lr}
+ 801bcda:	b094      	sub	sp, #80	; 0x50
+ 801bcdc:	af02      	add	r7, sp, #8
+ 801bcde:	60f8      	str	r0, [r7, #12]
+ 801bce0:	60b9      	str	r1, [r7, #8]
+ 801bce2:	607a      	str	r2, [r7, #4]
+  struct pbuf *rambuf;
+#if !LWIP_NETIF_TX_SINGLE_PBUF
+  struct pbuf *newpbuf;
+  u16_t newpbuflen = 0;
+ 801bce4:	2300      	movs	r3, #0
+ 801bce6:	f8a7 3046 	strh.w	r3, [r7, #70]	; 0x46
+  u16_t left_to_copy;
+#endif
+  struct ip_hdr *original_iphdr;
+  struct ip_hdr *iphdr;
+  const u16_t nfb = (u16_t)((netif->mtu - IP_HLEN) / 8);
+ 801bcea:	68bb      	ldr	r3, [r7, #8]
+ 801bcec:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 801bcee:	3b14      	subs	r3, #20
+ 801bcf0:	2b00      	cmp	r3, #0
+ 801bcf2:	da00      	bge.n	801bcf6 <ip4_frag+0x1e>
+ 801bcf4:	3307      	adds	r3, #7
+ 801bcf6:	10db      	asrs	r3, r3, #3
+ 801bcf8:	877b      	strh	r3, [r7, #58]	; 0x3a
+  u16_t left, fragsize;
+  u16_t ofo;
+  int last;
+  u16_t poff = IP_HLEN;
+ 801bcfa:	2314      	movs	r3, #20
+ 801bcfc:	87fb      	strh	r3, [r7, #62]	; 0x3e
+  u16_t tmp;
+  int mf_set;
+
+  original_iphdr = (struct ip_hdr *)p->payload;
+ 801bcfe:	68fb      	ldr	r3, [r7, #12]
+ 801bd00:	685b      	ldr	r3, [r3, #4]
+ 801bd02:	637b      	str	r3, [r7, #52]	; 0x34
+  iphdr = original_iphdr;
+ 801bd04:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 801bd06:	633b      	str	r3, [r7, #48]	; 0x30
+  if (IPH_HL_BYTES(iphdr) != IP_HLEN) {
+ 801bd08:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bd0a:	781b      	ldrb	r3, [r3, #0]
+ 801bd0c:	f003 030f 	and.w	r3, r3, #15
+ 801bd10:	b2db      	uxtb	r3, r3
+ 801bd12:	009b      	lsls	r3, r3, #2
+ 801bd14:	b2db      	uxtb	r3, r3
+ 801bd16:	2b14      	cmp	r3, #20
+ 801bd18:	d002      	beq.n	801bd20 <ip4_frag+0x48>
+    /* ip4_frag() does not support IP options */
+    return ERR_VAL;
+ 801bd1a:	f06f 0305 	mvn.w	r3, #5
+ 801bd1e:	e10f      	b.n	801bf40 <ip4_frag+0x268>
+  }
+  LWIP_ERROR("ip4_frag(): pbuf too short", p->len >= IP_HLEN, return ERR_VAL);
+ 801bd20:	68fb      	ldr	r3, [r7, #12]
+ 801bd22:	895b      	ldrh	r3, [r3, #10]
+ 801bd24:	2b13      	cmp	r3, #19
+ 801bd26:	d809      	bhi.n	801bd3c <ip4_frag+0x64>
+ 801bd28:	4b87      	ldr	r3, [pc, #540]	; (801bf48 <ip4_frag+0x270>)
+ 801bd2a:	f44f 723f 	mov.w	r2, #764	; 0x2fc
+ 801bd2e:	4987      	ldr	r1, [pc, #540]	; (801bf4c <ip4_frag+0x274>)
+ 801bd30:	4887      	ldr	r0, [pc, #540]	; (801bf50 <ip4_frag+0x278>)
+ 801bd32:	f000 fb61 	bl	801c3f8 <iprintf>
+ 801bd36:	f06f 0305 	mvn.w	r3, #5
+ 801bd3a:	e101      	b.n	801bf40 <ip4_frag+0x268>
+
+  /* Save original offset */
+  tmp = lwip_ntohs(IPH_OFFSET(iphdr));
+ 801bd3c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bd3e:	88db      	ldrh	r3, [r3, #6]
+ 801bd40:	b29b      	uxth	r3, r3
+ 801bd42:	4618      	mov	r0, r3
+ 801bd44:	f7f4 fa74 	bl	8010230 <lwip_htons>
+ 801bd48:	4603      	mov	r3, r0
+ 801bd4a:	87bb      	strh	r3, [r7, #60]	; 0x3c
+  ofo = tmp & IP_OFFMASK;
+ 801bd4c:	8fbb      	ldrh	r3, [r7, #60]	; 0x3c
+ 801bd4e:	f3c3 030c 	ubfx	r3, r3, #0, #13
+ 801bd52:	f8a7 3040 	strh.w	r3, [r7, #64]	; 0x40
+  /* already fragmented? if so, the last fragment we create must have MF, too */
+  mf_set = tmp & IP_MF;
+ 801bd56:	8fbb      	ldrh	r3, [r7, #60]	; 0x3c
+ 801bd58:	f403 5300 	and.w	r3, r3, #8192	; 0x2000
+ 801bd5c:	62fb      	str	r3, [r7, #44]	; 0x2c
+
+  left = (u16_t)(p->tot_len - IP_HLEN);
+ 801bd5e:	68fb      	ldr	r3, [r7, #12]
+ 801bd60:	891b      	ldrh	r3, [r3, #8]
+ 801bd62:	3b14      	subs	r3, #20
+ 801bd64:	f8a7 3042 	strh.w	r3, [r7, #66]	; 0x42
+
+  while (left) {
+ 801bd68:	e0e0      	b.n	801bf2c <ip4_frag+0x254>
+    /* Fill this fragment */
+    fragsize = LWIP_MIN(left, (u16_t)(nfb * 8));
+ 801bd6a:	8f7b      	ldrh	r3, [r7, #58]	; 0x3a
+ 801bd6c:	00db      	lsls	r3, r3, #3
+ 801bd6e:	b29b      	uxth	r3, r3
+ 801bd70:	f8b7 2042 	ldrh.w	r2, [r7, #66]	; 0x42
+ 801bd74:	4293      	cmp	r3, r2
+ 801bd76:	bf28      	it	cs
+ 801bd78:	4613      	movcs	r3, r2
+ 801bd7a:	857b      	strh	r3, [r7, #42]	; 0x2a
+    /* When not using a static buffer, create a chain of pbufs.
+     * The first will be a PBUF_RAM holding the link and IP header.
+     * The rest will be PBUF_REFs mirroring the pbuf chain to be fragged,
+     * but limited to the size of an mtu.
+     */
+    rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM);
+ 801bd7c:	f44f 7220 	mov.w	r2, #640	; 0x280
+ 801bd80:	2114      	movs	r1, #20
+ 801bd82:	200e      	movs	r0, #14
+ 801bd84:	f7f5 fb28 	bl	80113d8 <pbuf_alloc>
+ 801bd88:	6278      	str	r0, [r7, #36]	; 0x24
+    if (rambuf == NULL) {
+ 801bd8a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801bd8c:	2b00      	cmp	r3, #0
+ 801bd8e:	f000 80d4 	beq.w	801bf3a <ip4_frag+0x262>
+      goto memerr;
+    }
+    LWIP_ASSERT("this needs a pbuf in one piece!",
+ 801bd92:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801bd94:	895b      	ldrh	r3, [r3, #10]
+ 801bd96:	2b13      	cmp	r3, #19
+ 801bd98:	d806      	bhi.n	801bda8 <ip4_frag+0xd0>
+ 801bd9a:	4b6b      	ldr	r3, [pc, #428]	; (801bf48 <ip4_frag+0x270>)
+ 801bd9c:	f240 3225 	movw	r2, #805	; 0x325
+ 801bda0:	496c      	ldr	r1, [pc, #432]	; (801bf54 <ip4_frag+0x27c>)
+ 801bda2:	486b      	ldr	r0, [pc, #428]	; (801bf50 <ip4_frag+0x278>)
+ 801bda4:	f000 fb28 	bl	801c3f8 <iprintf>
+                (rambuf->len >= (IP_HLEN)));
+    SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN);
+ 801bda8:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801bdaa:	685b      	ldr	r3, [r3, #4]
+ 801bdac:	2214      	movs	r2, #20
+ 801bdae:	6b79      	ldr	r1, [r7, #52]	; 0x34
+ 801bdb0:	4618      	mov	r0, r3
+ 801bdb2:	f000 faf4 	bl	801c39e <memcpy>
+    iphdr = (struct ip_hdr *)rambuf->payload;
+ 801bdb6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801bdb8:	685b      	ldr	r3, [r3, #4]
+ 801bdba:	633b      	str	r3, [r7, #48]	; 0x30
+
+    left_to_copy = fragsize;
+ 801bdbc:	8d7b      	ldrh	r3, [r7, #42]	; 0x2a
+ 801bdbe:	f8a7 3044 	strh.w	r3, [r7, #68]	; 0x44
+    while (left_to_copy) {
+ 801bdc2:	e064      	b.n	801be8e <ip4_frag+0x1b6>
+      struct pbuf_custom_ref *pcr;
+      u16_t plen = (u16_t)(p->len - poff);
+ 801bdc4:	68fb      	ldr	r3, [r7, #12]
+ 801bdc6:	895a      	ldrh	r2, [r3, #10]
+ 801bdc8:	8ffb      	ldrh	r3, [r7, #62]	; 0x3e
+ 801bdca:	1ad3      	subs	r3, r2, r3
+ 801bdcc:	83fb      	strh	r3, [r7, #30]
+      LWIP_ASSERT("p->len >= poff", p->len >= poff);
+ 801bdce:	68fb      	ldr	r3, [r7, #12]
+ 801bdd0:	895b      	ldrh	r3, [r3, #10]
+ 801bdd2:	8ffa      	ldrh	r2, [r7, #62]	; 0x3e
+ 801bdd4:	429a      	cmp	r2, r3
+ 801bdd6:	d906      	bls.n	801bde6 <ip4_frag+0x10e>
+ 801bdd8:	4b5b      	ldr	r3, [pc, #364]	; (801bf48 <ip4_frag+0x270>)
+ 801bdda:	f240 322d 	movw	r2, #813	; 0x32d
+ 801bdde:	495e      	ldr	r1, [pc, #376]	; (801bf58 <ip4_frag+0x280>)
+ 801bde0:	485b      	ldr	r0, [pc, #364]	; (801bf50 <ip4_frag+0x278>)
+ 801bde2:	f000 fb09 	bl	801c3f8 <iprintf>
+      newpbuflen = LWIP_MIN(left_to_copy, plen);
+ 801bde6:	8bfa      	ldrh	r2, [r7, #30]
+ 801bde8:	f8b7 3044 	ldrh.w	r3, [r7, #68]	; 0x44
+ 801bdec:	4293      	cmp	r3, r2
+ 801bdee:	bf28      	it	cs
+ 801bdf0:	4613      	movcs	r3, r2
+ 801bdf2:	f8a7 3046 	strh.w	r3, [r7, #70]	; 0x46
+      /* Is this pbuf already empty? */
+      if (!newpbuflen) {
+ 801bdf6:	f8b7 3046 	ldrh.w	r3, [r7, #70]	; 0x46
+ 801bdfa:	2b00      	cmp	r3, #0
+ 801bdfc:	d105      	bne.n	801be0a <ip4_frag+0x132>
+        poff = 0;
+ 801bdfe:	2300      	movs	r3, #0
+ 801be00:	87fb      	strh	r3, [r7, #62]	; 0x3e
+        p = p->next;
+ 801be02:	68fb      	ldr	r3, [r7, #12]
+ 801be04:	681b      	ldr	r3, [r3, #0]
+ 801be06:	60fb      	str	r3, [r7, #12]
+        continue;
+ 801be08:	e041      	b.n	801be8e <ip4_frag+0x1b6>
+      }
+      pcr = ip_frag_alloc_pbuf_custom_ref();
+ 801be0a:	f7ff ff0d 	bl	801bc28 <ip_frag_alloc_pbuf_custom_ref>
+ 801be0e:	61b8      	str	r0, [r7, #24]
+      if (pcr == NULL) {
+ 801be10:	69bb      	ldr	r3, [r7, #24]
+ 801be12:	2b00      	cmp	r3, #0
+ 801be14:	d103      	bne.n	801be1e <ip4_frag+0x146>
+        pbuf_free(rambuf);
+ 801be16:	6a78      	ldr	r0, [r7, #36]	; 0x24
+ 801be18:	f7f5 fdbe 	bl	8011998 <pbuf_free>
+        goto memerr;
+ 801be1c:	e08e      	b.n	801bf3c <ip4_frag+0x264>
+      }
+      /* Mirror this pbuf, although we might not need all of it. */
+      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
+ 801be1e:	69b8      	ldr	r0, [r7, #24]
+                                    (u8_t *)p->payload + poff, newpbuflen);
+ 801be20:	68fb      	ldr	r3, [r7, #12]
+ 801be22:	685a      	ldr	r2, [r3, #4]
+      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
+ 801be24:	8ffb      	ldrh	r3, [r7, #62]	; 0x3e
+ 801be26:	4413      	add	r3, r2
+ 801be28:	f8b7 1046 	ldrh.w	r1, [r7, #70]	; 0x46
+ 801be2c:	f8b7 2046 	ldrh.w	r2, [r7, #70]	; 0x46
+ 801be30:	9201      	str	r2, [sp, #4]
+ 801be32:	9300      	str	r3, [sp, #0]
+ 801be34:	4603      	mov	r3, r0
+ 801be36:	2241      	movs	r2, #65	; 0x41
+ 801be38:	2000      	movs	r0, #0
+ 801be3a:	f7f5 fbf3 	bl	8011624 <pbuf_alloced_custom>
+ 801be3e:	6178      	str	r0, [r7, #20]
+      if (newpbuf == NULL) {
+ 801be40:	697b      	ldr	r3, [r7, #20]
+ 801be42:	2b00      	cmp	r3, #0
+ 801be44:	d106      	bne.n	801be54 <ip4_frag+0x17c>
+        ip_frag_free_pbuf_custom_ref(pcr);
+ 801be46:	69b8      	ldr	r0, [r7, #24]
+ 801be48:	f7ff fef6 	bl	801bc38 <ip_frag_free_pbuf_custom_ref>
+        pbuf_free(rambuf);
+ 801be4c:	6a78      	ldr	r0, [r7, #36]	; 0x24
+ 801be4e:	f7f5 fda3 	bl	8011998 <pbuf_free>
+        goto memerr;
+ 801be52:	e073      	b.n	801bf3c <ip4_frag+0x264>
+      }
+      pbuf_ref(p);
+ 801be54:	68f8      	ldr	r0, [r7, #12]
+ 801be56:	f7f5 fe45 	bl	8011ae4 <pbuf_ref>
+      pcr->original = p;
+ 801be5a:	69bb      	ldr	r3, [r7, #24]
+ 801be5c:	68fa      	ldr	r2, [r7, #12]
+ 801be5e:	615a      	str	r2, [r3, #20]
+      pcr->pc.custom_free_function = ipfrag_free_pbuf_custom;
+ 801be60:	69bb      	ldr	r3, [r7, #24]
+ 801be62:	4a3e      	ldr	r2, [pc, #248]	; (801bf5c <ip4_frag+0x284>)
+ 801be64:	611a      	str	r2, [r3, #16]
+
+      /* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain
+       * so that it is removed when pbuf_dechain is later called on rambuf.
+       */
+      pbuf_cat(rambuf, newpbuf);
+ 801be66:	6979      	ldr	r1, [r7, #20]
+ 801be68:	6a78      	ldr	r0, [r7, #36]	; 0x24
+ 801be6a:	f7f5 fe63 	bl	8011b34 <pbuf_cat>
+      left_to_copy = (u16_t)(left_to_copy - newpbuflen);
+ 801be6e:	f8b7 2044 	ldrh.w	r2, [r7, #68]	; 0x44
+ 801be72:	f8b7 3046 	ldrh.w	r3, [r7, #70]	; 0x46
+ 801be76:	1ad3      	subs	r3, r2, r3
+ 801be78:	f8a7 3044 	strh.w	r3, [r7, #68]	; 0x44
+      if (left_to_copy) {
+ 801be7c:	f8b7 3044 	ldrh.w	r3, [r7, #68]	; 0x44
+ 801be80:	2b00      	cmp	r3, #0
+ 801be82:	d004      	beq.n	801be8e <ip4_frag+0x1b6>
+        poff = 0;
+ 801be84:	2300      	movs	r3, #0
+ 801be86:	87fb      	strh	r3, [r7, #62]	; 0x3e
+        p = p->next;
+ 801be88:	68fb      	ldr	r3, [r7, #12]
+ 801be8a:	681b      	ldr	r3, [r3, #0]
+ 801be8c:	60fb      	str	r3, [r7, #12]
+    while (left_to_copy) {
+ 801be8e:	f8b7 3044 	ldrh.w	r3, [r7, #68]	; 0x44
+ 801be92:	2b00      	cmp	r3, #0
+ 801be94:	d196      	bne.n	801bdc4 <ip4_frag+0xec>
+      }
+    }
+    poff = (u16_t)(poff + newpbuflen);
+ 801be96:	8ffa      	ldrh	r2, [r7, #62]	; 0x3e
+ 801be98:	f8b7 3046 	ldrh.w	r3, [r7, #70]	; 0x46
+ 801be9c:	4413      	add	r3, r2
+ 801be9e:	87fb      	strh	r3, [r7, #62]	; 0x3e
+#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
+
+    /* Correct header */
+    last = (left <= netif->mtu - IP_HLEN);
+ 801bea0:	f8b7 2042 	ldrh.w	r2, [r7, #66]	; 0x42
+ 801bea4:	68bb      	ldr	r3, [r7, #8]
+ 801bea6:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
+ 801bea8:	3b14      	subs	r3, #20
+ 801beaa:	429a      	cmp	r2, r3
+ 801beac:	bfd4      	ite	le
+ 801beae:	2301      	movle	r3, #1
+ 801beb0:	2300      	movgt	r3, #0
+ 801beb2:	b2db      	uxtb	r3, r3
+ 801beb4:	623b      	str	r3, [r7, #32]
+
+    /* Set new offset and MF flag */
+    tmp = (IP_OFFMASK & (ofo));
+ 801beb6:	f8b7 3040 	ldrh.w	r3, [r7, #64]	; 0x40
+ 801beba:	f3c3 030c 	ubfx	r3, r3, #0, #13
+ 801bebe:	87bb      	strh	r3, [r7, #60]	; 0x3c
+    if (!last || mf_set) {
+ 801bec0:	6a3b      	ldr	r3, [r7, #32]
+ 801bec2:	2b00      	cmp	r3, #0
+ 801bec4:	d002      	beq.n	801becc <ip4_frag+0x1f4>
+ 801bec6:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801bec8:	2b00      	cmp	r3, #0
+ 801beca:	d003      	beq.n	801bed4 <ip4_frag+0x1fc>
+      /* the last fragment has MF set if the input frame had it */
+      tmp = tmp | IP_MF;
+ 801becc:	8fbb      	ldrh	r3, [r7, #60]	; 0x3c
+ 801bece:	f443 5300 	orr.w	r3, r3, #8192	; 0x2000
+ 801bed2:	87bb      	strh	r3, [r7, #60]	; 0x3c
+    }
+    IPH_OFFSET_SET(iphdr, lwip_htons(tmp));
+ 801bed4:	8fbb      	ldrh	r3, [r7, #60]	; 0x3c
+ 801bed6:	4618      	mov	r0, r3
+ 801bed8:	f7f4 f9aa 	bl	8010230 <lwip_htons>
+ 801bedc:	4603      	mov	r3, r0
+ 801bede:	461a      	mov	r2, r3
+ 801bee0:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bee2:	80da      	strh	r2, [r3, #6]
+    IPH_LEN_SET(iphdr, lwip_htons((u16_t)(fragsize + IP_HLEN)));
+ 801bee4:	8d7b      	ldrh	r3, [r7, #42]	; 0x2a
+ 801bee6:	3314      	adds	r3, #20
+ 801bee8:	b29b      	uxth	r3, r3
+ 801beea:	4618      	mov	r0, r3
+ 801beec:	f7f4 f9a0 	bl	8010230 <lwip_htons>
+ 801bef0:	4603      	mov	r3, r0
+ 801bef2:	461a      	mov	r2, r3
+ 801bef4:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801bef6:	805a      	strh	r2, [r3, #2]
+    IPH_CHKSUM_SET(iphdr, 0);
+ 801bef8:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 801befa:	2200      	movs	r2, #0
+ 801befc:	729a      	strb	r2, [r3, #10]
+ 801befe:	2200      	movs	r2, #0
+ 801bf00:	72da      	strb	r2, [r3, #11]
+#endif /* CHECKSUM_GEN_IP */
+
+    /* No need for separate header pbuf - we allowed room for it in rambuf
+     * when allocated.
+     */
+    netif->output(netif, rambuf, dest);
+ 801bf02:	68bb      	ldr	r3, [r7, #8]
+ 801bf04:	695b      	ldr	r3, [r3, #20]
+ 801bf06:	687a      	ldr	r2, [r7, #4]
+ 801bf08:	6a79      	ldr	r1, [r7, #36]	; 0x24
+ 801bf0a:	68b8      	ldr	r0, [r7, #8]
+ 801bf0c:	4798      	blx	r3
+     * recreate it next time round the loop. If we're lucky the hardware
+     * will have already sent the packet, the free will really free, and
+     * there will be zero memory penalty.
+     */
+
+    pbuf_free(rambuf);
+ 801bf0e:	6a78      	ldr	r0, [r7, #36]	; 0x24
+ 801bf10:	f7f5 fd42 	bl	8011998 <pbuf_free>
+    left = (u16_t)(left - fragsize);
+ 801bf14:	f8b7 2042 	ldrh.w	r2, [r7, #66]	; 0x42
+ 801bf18:	8d7b      	ldrh	r3, [r7, #42]	; 0x2a
+ 801bf1a:	1ad3      	subs	r3, r2, r3
+ 801bf1c:	f8a7 3042 	strh.w	r3, [r7, #66]	; 0x42
+    ofo = (u16_t)(ofo + nfb);
+ 801bf20:	f8b7 2040 	ldrh.w	r2, [r7, #64]	; 0x40
+ 801bf24:	8f7b      	ldrh	r3, [r7, #58]	; 0x3a
+ 801bf26:	4413      	add	r3, r2
+ 801bf28:	f8a7 3040 	strh.w	r3, [r7, #64]	; 0x40
+  while (left) {
+ 801bf2c:	f8b7 3042 	ldrh.w	r3, [r7, #66]	; 0x42
+ 801bf30:	2b00      	cmp	r3, #0
+ 801bf32:	f47f af1a 	bne.w	801bd6a <ip4_frag+0x92>
+  }
+  MIB2_STATS_INC(mib2.ipfragoks);
+  return ERR_OK;
+ 801bf36:	2300      	movs	r3, #0
+ 801bf38:	e002      	b.n	801bf40 <ip4_frag+0x268>
+      goto memerr;
+ 801bf3a:	bf00      	nop
+memerr:
+  MIB2_STATS_INC(mib2.ipfragfails);
+  return ERR_MEM;
+ 801bf3c:	f04f 33ff 	mov.w	r3, #4294967295
+}
+ 801bf40:	4618      	mov	r0, r3
+ 801bf42:	3748      	adds	r7, #72	; 0x48
+ 801bf44:	46bd      	mov	sp, r7
+ 801bf46:	bd80      	pop	{r7, pc}
+ 801bf48:	08020270 	.word	0x08020270
+ 801bf4c:	0802044c 	.word	0x0802044c
+ 801bf50:	080202b8 	.word	0x080202b8
+ 801bf54:	08020468 	.word	0x08020468
+ 801bf58:	08020488 	.word	0x08020488
+ 801bf5c:	0801bc71 	.word	0x0801bc71
+
+0801bf60 <ethernet_input>:
+ * @see ETHARP_SUPPORT_VLAN
+ * @see LWIP_HOOK_VLAN_CHECK
+ */
+err_t
+ethernet_input(struct pbuf *p, struct netif *netif)
+{
+ 801bf60:	b580      	push	{r7, lr}
+ 801bf62:	b086      	sub	sp, #24
+ 801bf64:	af00      	add	r7, sp, #0
+ 801bf66:	6078      	str	r0, [r7, #4]
+ 801bf68:	6039      	str	r1, [r7, #0]
+  struct eth_hdr *ethhdr;
+  u16_t type;
+#if LWIP_ARP || ETHARP_SUPPORT_VLAN || LWIP_IPV6
+  u16_t next_hdr_offset = SIZEOF_ETH_HDR;
+ 801bf6a:	230e      	movs	r3, #14
+ 801bf6c:	82fb      	strh	r3, [r7, #22]
+#endif /* LWIP_ARP || ETHARP_SUPPORT_VLAN */
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  if (p->len <= SIZEOF_ETH_HDR) {
+ 801bf6e:	687b      	ldr	r3, [r7, #4]
+ 801bf70:	895b      	ldrh	r3, [r3, #10]
+ 801bf72:	2b0e      	cmp	r3, #14
+ 801bf74:	d96e      	bls.n	801c054 <ethernet_input+0xf4>
+    ETHARP_STATS_INC(etharp.drop);
+    MIB2_STATS_NETIF_INC(netif, ifinerrors);
+    goto free_and_return;
+  }
+
+  if (p->if_idx == NETIF_NO_INDEX) {
+ 801bf76:	687b      	ldr	r3, [r7, #4]
+ 801bf78:	7bdb      	ldrb	r3, [r3, #15]
+ 801bf7a:	2b00      	cmp	r3, #0
+ 801bf7c:	d106      	bne.n	801bf8c <ethernet_input+0x2c>
+    p->if_idx = netif_get_index(netif);
+ 801bf7e:	683b      	ldr	r3, [r7, #0]
+ 801bf80:	f893 3034 	ldrb.w	r3, [r3, #52]	; 0x34
+ 801bf84:	3301      	adds	r3, #1
+ 801bf86:	b2da      	uxtb	r2, r3
+ 801bf88:	687b      	ldr	r3, [r7, #4]
+ 801bf8a:	73da      	strb	r2, [r3, #15]
+  }
+
+  /* points to packet payload, which starts with an Ethernet header */
+  ethhdr = (struct eth_hdr *)p->payload;
+ 801bf8c:	687b      	ldr	r3, [r7, #4]
+ 801bf8e:	685b      	ldr	r3, [r3, #4]
+ 801bf90:	613b      	str	r3, [r7, #16]
+               (unsigned char)ethhdr->dest.addr[3], (unsigned char)ethhdr->dest.addr[4], (unsigned char)ethhdr->dest.addr[5],
+               (unsigned char)ethhdr->src.addr[0],  (unsigned char)ethhdr->src.addr[1],  (unsigned char)ethhdr->src.addr[2],
+               (unsigned char)ethhdr->src.addr[3],  (unsigned char)ethhdr->src.addr[4],  (unsigned char)ethhdr->src.addr[5],
+               lwip_htons(ethhdr->type)));
+
+  type = ethhdr->type;
+ 801bf92:	693b      	ldr	r3, [r7, #16]
+ 801bf94:	7b1a      	ldrb	r2, [r3, #12]
+ 801bf96:	7b5b      	ldrb	r3, [r3, #13]
+ 801bf98:	021b      	lsls	r3, r3, #8
+ 801bf9a:	4313      	orrs	r3, r2
+ 801bf9c:	81fb      	strh	r3, [r7, #14]
+
+#if LWIP_ARP_FILTER_NETIF
+  netif = LWIP_ARP_FILTER_NETIF_FN(p, netif, lwip_htons(type));
+#endif /* LWIP_ARP_FILTER_NETIF*/
+
+  if (ethhdr->dest.addr[0] & 1) {
+ 801bf9e:	693b      	ldr	r3, [r7, #16]
+ 801bfa0:	781b      	ldrb	r3, [r3, #0]
+ 801bfa2:	f003 0301 	and.w	r3, r3, #1
+ 801bfa6:	2b00      	cmp	r3, #0
+ 801bfa8:	d023      	beq.n	801bff2 <ethernet_input+0x92>
+    /* this might be a multicast or broadcast packet */
+    if (ethhdr->dest.addr[0] == LL_IP4_MULTICAST_ADDR_0) {
+ 801bfaa:	693b      	ldr	r3, [r7, #16]
+ 801bfac:	781b      	ldrb	r3, [r3, #0]
+ 801bfae:	2b01      	cmp	r3, #1
+ 801bfb0:	d10f      	bne.n	801bfd2 <ethernet_input+0x72>
+#if LWIP_IPV4
+      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
+ 801bfb2:	693b      	ldr	r3, [r7, #16]
+ 801bfb4:	785b      	ldrb	r3, [r3, #1]
+ 801bfb6:	2b00      	cmp	r3, #0
+ 801bfb8:	d11b      	bne.n	801bff2 <ethernet_input+0x92>
+          (ethhdr->dest.addr[2] == LL_IP4_MULTICAST_ADDR_2)) {
+ 801bfba:	693b      	ldr	r3, [r7, #16]
+ 801bfbc:	789b      	ldrb	r3, [r3, #2]
+      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
+ 801bfbe:	2b5e      	cmp	r3, #94	; 0x5e
+ 801bfc0:	d117      	bne.n	801bff2 <ethernet_input+0x92>
+        /* mark the pbuf as link-layer multicast */
+        p->flags |= PBUF_FLAG_LLMCAST;
+ 801bfc2:	687b      	ldr	r3, [r7, #4]
+ 801bfc4:	7b5b      	ldrb	r3, [r3, #13]
+ 801bfc6:	f043 0310 	orr.w	r3, r3, #16
+ 801bfca:	b2da      	uxtb	r2, r3
+ 801bfcc:	687b      	ldr	r3, [r7, #4]
+ 801bfce:	735a      	strb	r2, [r3, #13]
+ 801bfd0:	e00f      	b.n	801bff2 <ethernet_input+0x92>
+             (ethhdr->dest.addr[1] == LL_IP6_MULTICAST_ADDR_1)) {
+      /* mark the pbuf as link-layer multicast */
+      p->flags |= PBUF_FLAG_LLMCAST;
+    }
+#endif /* LWIP_IPV6 */
+    else if (eth_addr_cmp(&ethhdr->dest, &ethbroadcast)) {
+ 801bfd2:	693b      	ldr	r3, [r7, #16]
+ 801bfd4:	2206      	movs	r2, #6
+ 801bfd6:	4928      	ldr	r1, [pc, #160]	; (801c078 <ethernet_input+0x118>)
+ 801bfd8:	4618      	mov	r0, r3
+ 801bfda:	f000 f9d1 	bl	801c380 <memcmp>
+ 801bfde:	4603      	mov	r3, r0
+ 801bfe0:	2b00      	cmp	r3, #0
+ 801bfe2:	d106      	bne.n	801bff2 <ethernet_input+0x92>
+      /* mark the pbuf as link-layer broadcast */
+      p->flags |= PBUF_FLAG_LLBCAST;
+ 801bfe4:	687b      	ldr	r3, [r7, #4]
+ 801bfe6:	7b5b      	ldrb	r3, [r3, #13]
+ 801bfe8:	f043 0308 	orr.w	r3, r3, #8
+ 801bfec:	b2da      	uxtb	r2, r3
+ 801bfee:	687b      	ldr	r3, [r7, #4]
+ 801bff0:	735a      	strb	r2, [r3, #13]
+    }
+  }
+
+  switch (type) {
+ 801bff2:	89fb      	ldrh	r3, [r7, #14]
+ 801bff4:	2b08      	cmp	r3, #8
+ 801bff6:	d003      	beq.n	801c000 <ethernet_input+0xa0>
+ 801bff8:	f5b3 6fc1 	cmp.w	r3, #1544	; 0x608
+ 801bffc:	d014      	beq.n	801c028 <ethernet_input+0xc8>
+      }
+#endif
+      ETHARP_STATS_INC(etharp.proterr);
+      ETHARP_STATS_INC(etharp.drop);
+      MIB2_STATS_NETIF_INC(netif, ifinunknownprotos);
+      goto free_and_return;
+ 801bffe:	e032      	b.n	801c066 <ethernet_input+0x106>
+      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
+ 801c000:	683b      	ldr	r3, [r7, #0]
+ 801c002:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801c006:	f003 0308 	and.w	r3, r3, #8
+ 801c00a:	2b00      	cmp	r3, #0
+ 801c00c:	d024      	beq.n	801c058 <ethernet_input+0xf8>
+      if (pbuf_remove_header(p, next_hdr_offset)) {
+ 801c00e:	8afb      	ldrh	r3, [r7, #22]
+ 801c010:	4619      	mov	r1, r3
+ 801c012:	6878      	ldr	r0, [r7, #4]
+ 801c014:	f7f5 fc3a 	bl	801188c <pbuf_remove_header>
+ 801c018:	4603      	mov	r3, r0
+ 801c01a:	2b00      	cmp	r3, #0
+ 801c01c:	d11e      	bne.n	801c05c <ethernet_input+0xfc>
+        ip4_input(p, netif);
+ 801c01e:	6839      	ldr	r1, [r7, #0]
+ 801c020:	6878      	ldr	r0, [r7, #4]
+ 801c022:	f7fe ff0f 	bl	801ae44 <ip4_input>
+      break;
+ 801c026:	e013      	b.n	801c050 <ethernet_input+0xf0>
+      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
+ 801c028:	683b      	ldr	r3, [r7, #0]
+ 801c02a:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
+ 801c02e:	f003 0308 	and.w	r3, r3, #8
+ 801c032:	2b00      	cmp	r3, #0
+ 801c034:	d014      	beq.n	801c060 <ethernet_input+0x100>
+      if (pbuf_remove_header(p, next_hdr_offset)) {
+ 801c036:	8afb      	ldrh	r3, [r7, #22]
+ 801c038:	4619      	mov	r1, r3
+ 801c03a:	6878      	ldr	r0, [r7, #4]
+ 801c03c:	f7f5 fc26 	bl	801188c <pbuf_remove_header>
+ 801c040:	4603      	mov	r3, r0
+ 801c042:	2b00      	cmp	r3, #0
+ 801c044:	d10e      	bne.n	801c064 <ethernet_input+0x104>
+        etharp_input(p, netif);
+ 801c046:	6839      	ldr	r1, [r7, #0]
+ 801c048:	6878      	ldr	r0, [r7, #4]
+ 801c04a:	f7fe f8ab 	bl	801a1a4 <etharp_input>
+      break;
+ 801c04e:	bf00      	nop
+  }
+
+  /* This means the pbuf is freed or consumed,
+     so the caller doesn't have to free it again */
+  return ERR_OK;
+ 801c050:	2300      	movs	r3, #0
+ 801c052:	e00c      	b.n	801c06e <ethernet_input+0x10e>
+    goto free_and_return;
+ 801c054:	bf00      	nop
+ 801c056:	e006      	b.n	801c066 <ethernet_input+0x106>
+        goto free_and_return;
+ 801c058:	bf00      	nop
+ 801c05a:	e004      	b.n	801c066 <ethernet_input+0x106>
+        goto free_and_return;
+ 801c05c:	bf00      	nop
+ 801c05e:	e002      	b.n	801c066 <ethernet_input+0x106>
+        goto free_and_return;
+ 801c060:	bf00      	nop
+ 801c062:	e000      	b.n	801c066 <ethernet_input+0x106>
+        goto free_and_return;
+ 801c064:	bf00      	nop
+
+free_and_return:
+  pbuf_free(p);
+ 801c066:	6878      	ldr	r0, [r7, #4]
+ 801c068:	f7f5 fc96 	bl	8011998 <pbuf_free>
+  return ERR_OK;
+ 801c06c:	2300      	movs	r3, #0
+}
+ 801c06e:	4618      	mov	r0, r3
+ 801c070:	3718      	adds	r7, #24
+ 801c072:	46bd      	mov	sp, r7
+ 801c074:	bd80      	pop	{r7, pc}
+ 801c076:	bf00      	nop
+ 801c078:	080225a0 	.word	0x080225a0
+
+0801c07c <ethernet_output>:
+ * @return ERR_OK if the packet was sent, any other err_t on failure
+ */
+err_t
+ethernet_output(struct netif * netif, struct pbuf * p,
+                const struct eth_addr * src, const struct eth_addr * dst,
+                u16_t eth_type) {
+ 801c07c:	b580      	push	{r7, lr}
+ 801c07e:	b086      	sub	sp, #24
+ 801c080:	af00      	add	r7, sp, #0
+ 801c082:	60f8      	str	r0, [r7, #12]
+ 801c084:	60b9      	str	r1, [r7, #8]
+ 801c086:	607a      	str	r2, [r7, #4]
+ 801c088:	603b      	str	r3, [r7, #0]
+  struct eth_hdr *ethhdr;
+  u16_t eth_type_be = lwip_htons(eth_type);
+ 801c08a:	8c3b      	ldrh	r3, [r7, #32]
+ 801c08c:	4618      	mov	r0, r3
+ 801c08e:	f7f4 f8cf 	bl	8010230 <lwip_htons>
+ 801c092:	4603      	mov	r3, r0
+ 801c094:	82fb      	strh	r3, [r7, #22]
+
+    eth_type_be = PP_HTONS(ETHTYPE_VLAN);
+  } else
+#endif /* ETHARP_SUPPORT_VLAN && defined(LWIP_HOOK_VLAN_SET) */
+  {
+    if (pbuf_add_header(p, SIZEOF_ETH_HDR) != 0) {
+ 801c096:	210e      	movs	r1, #14
+ 801c098:	68b8      	ldr	r0, [r7, #8]
+ 801c09a:	f7f5 fbe7 	bl	801186c <pbuf_add_header>
+ 801c09e:	4603      	mov	r3, r0
+ 801c0a0:	2b00      	cmp	r3, #0
+ 801c0a2:	d125      	bne.n	801c0f0 <ethernet_output+0x74>
+    }
+  }
+
+  LWIP_ASSERT_CORE_LOCKED();
+
+  ethhdr = (struct eth_hdr *)p->payload;
+ 801c0a4:	68bb      	ldr	r3, [r7, #8]
+ 801c0a6:	685b      	ldr	r3, [r3, #4]
+ 801c0a8:	613b      	str	r3, [r7, #16]
+  ethhdr->type = eth_type_be;
+ 801c0aa:	693b      	ldr	r3, [r7, #16]
+ 801c0ac:	8afa      	ldrh	r2, [r7, #22]
+ 801c0ae:	819a      	strh	r2, [r3, #12]
+  SMEMCPY(&ethhdr->dest, dst, ETH_HWADDR_LEN);
+ 801c0b0:	693b      	ldr	r3, [r7, #16]
+ 801c0b2:	2206      	movs	r2, #6
+ 801c0b4:	6839      	ldr	r1, [r7, #0]
+ 801c0b6:	4618      	mov	r0, r3
+ 801c0b8:	f000 f971 	bl	801c39e <memcpy>
+  SMEMCPY(&ethhdr->src,  src, ETH_HWADDR_LEN);
+ 801c0bc:	693b      	ldr	r3, [r7, #16]
+ 801c0be:	3306      	adds	r3, #6
+ 801c0c0:	2206      	movs	r2, #6
+ 801c0c2:	6879      	ldr	r1, [r7, #4]
+ 801c0c4:	4618      	mov	r0, r3
+ 801c0c6:	f000 f96a 	bl	801c39e <memcpy>
+
+  LWIP_ASSERT("netif->hwaddr_len must be 6 for ethernet_output!",
+ 801c0ca:	68fb      	ldr	r3, [r7, #12]
+ 801c0cc:	f893 3030 	ldrb.w	r3, [r3, #48]	; 0x30
+ 801c0d0:	2b06      	cmp	r3, #6
+ 801c0d2:	d006      	beq.n	801c0e2 <ethernet_output+0x66>
+ 801c0d4:	4b0a      	ldr	r3, [pc, #40]	; (801c100 <ethernet_output+0x84>)
+ 801c0d6:	f240 1233 	movw	r2, #307	; 0x133
+ 801c0da:	490a      	ldr	r1, [pc, #40]	; (801c104 <ethernet_output+0x88>)
+ 801c0dc:	480a      	ldr	r0, [pc, #40]	; (801c108 <ethernet_output+0x8c>)
+ 801c0de:	f000 f98b 	bl	801c3f8 <iprintf>
+              (netif->hwaddr_len == ETH_HWADDR_LEN));
+  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE,
+              ("ethernet_output: sending packet %p\n", (void *)p));
+
+  /* send the packet */
+  return netif->linkoutput(netif, p);
+ 801c0e2:	68fb      	ldr	r3, [r7, #12]
+ 801c0e4:	699b      	ldr	r3, [r3, #24]
+ 801c0e6:	68b9      	ldr	r1, [r7, #8]
+ 801c0e8:	68f8      	ldr	r0, [r7, #12]
+ 801c0ea:	4798      	blx	r3
+ 801c0ec:	4603      	mov	r3, r0
+ 801c0ee:	e002      	b.n	801c0f6 <ethernet_output+0x7a>
+      goto pbuf_header_failed;
+ 801c0f0:	bf00      	nop
+
+pbuf_header_failed:
+  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
+              ("ethernet_output: could not allocate room for header.\n"));
+  LINK_STATS_INC(link.lenerr);
+  return ERR_BUF;
+ 801c0f2:	f06f 0301 	mvn.w	r3, #1
+}
+ 801c0f6:	4618      	mov	r0, r3
+ 801c0f8:	3718      	adds	r7, #24
+ 801c0fa:	46bd      	mov	sp, r7
+ 801c0fc:	bd80      	pop	{r7, pc}
+ 801c0fe:	bf00      	nop
+ 801c100:	08020498 	.word	0x08020498
+ 801c104:	080204d0 	.word	0x080204d0
+ 801c108:	08020504 	.word	0x08020504
+
+0801c10c <sys_mbox_new>:
+#endif
+
+/*-----------------------------------------------------------------------------------*/
+//  Creates an empty mailbox.
+err_t sys_mbox_new(sys_mbox_t *mbox, int size)
+{
+ 801c10c:	b580      	push	{r7, lr}
+ 801c10e:	b086      	sub	sp, #24
+ 801c110:	af00      	add	r7, sp, #0
+ 801c112:	6078      	str	r0, [r7, #4]
+ 801c114:	6039      	str	r1, [r7, #0]
+#if (osCMSIS < 0x20000U)
+  osMessageQDef(QUEUE, size, void *);
+ 801c116:	683b      	ldr	r3, [r7, #0]
+ 801c118:	60bb      	str	r3, [r7, #8]
+ 801c11a:	2304      	movs	r3, #4
+ 801c11c:	60fb      	str	r3, [r7, #12]
+ 801c11e:	2300      	movs	r3, #0
+ 801c120:	613b      	str	r3, [r7, #16]
+ 801c122:	2300      	movs	r3, #0
+ 801c124:	617b      	str	r3, [r7, #20]
+  *mbox = osMessageCreate(osMessageQ(QUEUE), NULL);
+ 801c126:	f107 0308 	add.w	r3, r7, #8
+ 801c12a:	2100      	movs	r1, #0
+ 801c12c:	4618      	mov	r0, r3
+ 801c12e:	f7f1 f88b 	bl	800d248 <osMessageCreate>
+ 801c132:	4602      	mov	r2, r0
+ 801c134:	687b      	ldr	r3, [r7, #4]
+ 801c136:	601a      	str	r2, [r3, #0]
+  if(lwip_stats.sys.mbox.max < lwip_stats.sys.mbox.used)
+  {
+    lwip_stats.sys.mbox.max = lwip_stats.sys.mbox.used;
+  }
+#endif /* SYS_STATS */
+  if(*mbox == NULL)
+ 801c138:	687b      	ldr	r3, [r7, #4]
+ 801c13a:	681b      	ldr	r3, [r3, #0]
+ 801c13c:	2b00      	cmp	r3, #0
+ 801c13e:	d102      	bne.n	801c146 <sys_mbox_new+0x3a>
+    return ERR_MEM;
+ 801c140:	f04f 33ff 	mov.w	r3, #4294967295
+ 801c144:	e000      	b.n	801c148 <sys_mbox_new+0x3c>
+
+  return ERR_OK;
+ 801c146:	2300      	movs	r3, #0
+}
+ 801c148:	4618      	mov	r0, r3
+ 801c14a:	3718      	adds	r7, #24
+ 801c14c:	46bd      	mov	sp, r7
+ 801c14e:	bd80      	pop	{r7, pc}
+
+0801c150 <sys_mbox_trypost>:
+
+
+/*-----------------------------------------------------------------------------------*/
+//   Try to post the "msg" to the mailbox.
+err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg)
+{
+ 801c150:	b580      	push	{r7, lr}
+ 801c152:	b084      	sub	sp, #16
+ 801c154:	af00      	add	r7, sp, #0
+ 801c156:	6078      	str	r0, [r7, #4]
+ 801c158:	6039      	str	r1, [r7, #0]
+  err_t result;
+#if (osCMSIS < 0x20000U)
+  if(osMessagePut(*mbox, (uint32_t)msg, 0) == osOK)
+ 801c15a:	687b      	ldr	r3, [r7, #4]
+ 801c15c:	681b      	ldr	r3, [r3, #0]
+ 801c15e:	6839      	ldr	r1, [r7, #0]
+ 801c160:	2200      	movs	r2, #0
+ 801c162:	4618      	mov	r0, r3
+ 801c164:	f7f1 f89a 	bl	800d29c <osMessagePut>
+ 801c168:	4603      	mov	r3, r0
+ 801c16a:	2b00      	cmp	r3, #0
+ 801c16c:	d102      	bne.n	801c174 <sys_mbox_trypost+0x24>
+#else
+  if(osMessageQueuePut(*mbox, &msg, 0, 0) == osOK)
+#endif
+  {
+    result = ERR_OK;
+ 801c16e:	2300      	movs	r3, #0
+ 801c170:	73fb      	strb	r3, [r7, #15]
+ 801c172:	e001      	b.n	801c178 <sys_mbox_trypost+0x28>
+  }
+  else
+  {
+    // could not post, queue must be full
+    result = ERR_MEM;
+ 801c174:	23ff      	movs	r3, #255	; 0xff
+ 801c176:	73fb      	strb	r3, [r7, #15]
+#if SYS_STATS
+    lwip_stats.sys.mbox.err++;
+#endif /* SYS_STATS */
+  }
+
+  return result;
+ 801c178:	f997 300f 	ldrsb.w	r3, [r7, #15]
+}
+ 801c17c:	4618      	mov	r0, r3
+ 801c17e:	3710      	adds	r7, #16
+ 801c180:	46bd      	mov	sp, r7
+ 801c182:	bd80      	pop	{r7, pc}
+
+0801c184 <sys_arch_mbox_fetch>:
+
+  Note that a function with a similar name, sys_mbox_fetch(), is
+  implemented by lwIP.
+*/
+u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout)
+{
+ 801c184:	b580      	push	{r7, lr}
+ 801c186:	b08c      	sub	sp, #48	; 0x30
+ 801c188:	af00      	add	r7, sp, #0
+ 801c18a:	61f8      	str	r0, [r7, #28]
+ 801c18c:	61b9      	str	r1, [r7, #24]
+ 801c18e:	617a      	str	r2, [r7, #20]
+#if (osCMSIS < 0x20000U)
+  osEvent event;
+  uint32_t starttime = osKernelSysTick();
+ 801c190:	f7f0 fe89 	bl	800cea6 <osKernelSysTick>
+ 801c194:	62f8      	str	r0, [r7, #44]	; 0x2c
+#else
+  osStatus_t status;
+  uint32_t starttime = osKernelGetTickCount();
+#endif
+  if(timeout != 0)
+ 801c196:	697b      	ldr	r3, [r7, #20]
+ 801c198:	2b00      	cmp	r3, #0
+ 801c19a:	d017      	beq.n	801c1cc <sys_arch_mbox_fetch+0x48>
+  {
+#if (osCMSIS < 0x20000U)
+    event = osMessageGet (*mbox, timeout);
+ 801c19c:	69fb      	ldr	r3, [r7, #28]
+ 801c19e:	6819      	ldr	r1, [r3, #0]
+ 801c1a0:	f107 0320 	add.w	r3, r7, #32
+ 801c1a4:	697a      	ldr	r2, [r7, #20]
+ 801c1a6:	4618      	mov	r0, r3
+ 801c1a8:	f7f1 f8b8 	bl	800d31c <osMessageGet>
+
+    if(event.status == osEventMessage)
+ 801c1ac:	6a3b      	ldr	r3, [r7, #32]
+ 801c1ae:	2b10      	cmp	r3, #16
+ 801c1b0:	d109      	bne.n	801c1c6 <sys_arch_mbox_fetch+0x42>
+    {
+      *msg = (void *)event.value.v;
+ 801c1b2:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801c1b4:	461a      	mov	r2, r3
+ 801c1b6:	69bb      	ldr	r3, [r7, #24]
+ 801c1b8:	601a      	str	r2, [r3, #0]
+      return (osKernelSysTick() - starttime);
+ 801c1ba:	f7f0 fe74 	bl	800cea6 <osKernelSysTick>
+ 801c1be:	4602      	mov	r2, r0
+ 801c1c0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801c1c2:	1ad3      	subs	r3, r2, r3
+ 801c1c4:	e019      	b.n	801c1fa <sys_arch_mbox_fetch+0x76>
+      return (osKernelGetTickCount() - starttime);
+    }
+#endif
+    else
+    {
+      return SYS_ARCH_TIMEOUT;
+ 801c1c6:	f04f 33ff 	mov.w	r3, #4294967295
+ 801c1ca:	e016      	b.n	801c1fa <sys_arch_mbox_fetch+0x76>
+    }
+  }
+  else
+  {
+#if (osCMSIS < 0x20000U)
+    event = osMessageGet (*mbox, osWaitForever);
+ 801c1cc:	69fb      	ldr	r3, [r7, #28]
+ 801c1ce:	6819      	ldr	r1, [r3, #0]
+ 801c1d0:	463b      	mov	r3, r7
+ 801c1d2:	f04f 32ff 	mov.w	r2, #4294967295
+ 801c1d6:	4618      	mov	r0, r3
+ 801c1d8:	f7f1 f8a0 	bl	800d31c <osMessageGet>
+ 801c1dc:	f107 0320 	add.w	r3, r7, #32
+ 801c1e0:	463a      	mov	r2, r7
+ 801c1e2:	ca07      	ldmia	r2, {r0, r1, r2}
+ 801c1e4:	e883 0007 	stmia.w	r3, {r0, r1, r2}
+    *msg = (void *)event.value.v;
+ 801c1e8:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 801c1ea:	461a      	mov	r2, r3
+ 801c1ec:	69bb      	ldr	r3, [r7, #24]
+ 801c1ee:	601a      	str	r2, [r3, #0]
+    return (osKernelSysTick() - starttime);
+ 801c1f0:	f7f0 fe59 	bl	800cea6 <osKernelSysTick>
+ 801c1f4:	4602      	mov	r2, r0
+ 801c1f6:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 801c1f8:	1ad3      	subs	r3, r2, r3
+#else
+    osMessageQueueGet(*mbox, msg, 0, osWaitForever );
+    return (osKernelGetTickCount() - starttime);
+#endif
+  }
+}
+ 801c1fa:	4618      	mov	r0, r3
+ 801c1fc:	3730      	adds	r7, #48	; 0x30
+ 801c1fe:	46bd      	mov	sp, r7
+ 801c200:	bd80      	pop	{r7, pc}
+
+0801c202 <sys_mbox_valid>:
+    return SYS_MBOX_EMPTY;
+  }
+}
+/*----------------------------------------------------------------------------------*/
+int sys_mbox_valid(sys_mbox_t *mbox)
+{
+ 801c202:	b480      	push	{r7}
+ 801c204:	b083      	sub	sp, #12
+ 801c206:	af00      	add	r7, sp, #0
+ 801c208:	6078      	str	r0, [r7, #4]
+  if (*mbox == SYS_MBOX_NULL)
+ 801c20a:	687b      	ldr	r3, [r7, #4]
+ 801c20c:	681b      	ldr	r3, [r3, #0]
+ 801c20e:	2b00      	cmp	r3, #0
+ 801c210:	d101      	bne.n	801c216 <sys_mbox_valid+0x14>
+    return 0;
+ 801c212:	2300      	movs	r3, #0
+ 801c214:	e000      	b.n	801c218 <sys_mbox_valid+0x16>
+  else
+    return 1;
+ 801c216:	2301      	movs	r3, #1
+}
+ 801c218:	4618      	mov	r0, r3
+ 801c21a:	370c      	adds	r7, #12
+ 801c21c:	46bd      	mov	sp, r7
+ 801c21e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 801c222:	4770      	bx	lr
+
+0801c224 <sys_init>:
+#else
+osMutexId_t lwip_sys_mutex;
+#endif
+// Initialize sys arch
+void sys_init(void)
+{
+ 801c224:	b580      	push	{r7, lr}
+ 801c226:	af00      	add	r7, sp, #0
+#if (osCMSIS < 0x20000U)
+  lwip_sys_mutex = osMutexCreate(osMutex(lwip_sys_mutex));
+ 801c228:	4803      	ldr	r0, [pc, #12]	; (801c238 <sys_init+0x14>)
+ 801c22a:	f7f0 feac 	bl	800cf86 <osMutexCreate>
+ 801c22e:	4602      	mov	r2, r0
+ 801c230:	4b02      	ldr	r3, [pc, #8]	; (801c23c <sys_init+0x18>)
+ 801c232:	601a      	str	r2, [r3, #0]
+#else
+  lwip_sys_mutex = osMutexNew(NULL);
+#endif
+}
+ 801c234:	bf00      	nop
+ 801c236:	bd80      	pop	{r7, pc}
+ 801c238:	080225b0 	.word	0x080225b0
+ 801c23c:	2000f830 	.word	0x2000f830
+
+0801c240 <sys_mutex_new>:
+                                      /* Mutexes*/
+/*-----------------------------------------------------------------------------------*/
+/*-----------------------------------------------------------------------------------*/
+#if LWIP_COMPAT_MUTEX == 0
+/* Create a new mutex*/
+err_t sys_mutex_new(sys_mutex_t *mutex) {
+ 801c240:	b580      	push	{r7, lr}
+ 801c242:	b084      	sub	sp, #16
+ 801c244:	af00      	add	r7, sp, #0
+ 801c246:	6078      	str	r0, [r7, #4]
+
+#if (osCMSIS < 0x20000U)
+  osMutexDef(MUTEX);
+ 801c248:	2300      	movs	r3, #0
+ 801c24a:	60bb      	str	r3, [r7, #8]
+ 801c24c:	2300      	movs	r3, #0
+ 801c24e:	60fb      	str	r3, [r7, #12]
+  *mutex = osMutexCreate(osMutex(MUTEX));
+ 801c250:	f107 0308 	add.w	r3, r7, #8
+ 801c254:	4618      	mov	r0, r3
+ 801c256:	f7f0 fe96 	bl	800cf86 <osMutexCreate>
+ 801c25a:	4602      	mov	r2, r0
+ 801c25c:	687b      	ldr	r3, [r7, #4]
+ 801c25e:	601a      	str	r2, [r3, #0]
+#else
+  *mutex = osMutexNew(NULL);
+#endif
+
+  if(*mutex == NULL)
+ 801c260:	687b      	ldr	r3, [r7, #4]
+ 801c262:	681b      	ldr	r3, [r3, #0]
+ 801c264:	2b00      	cmp	r3, #0
+ 801c266:	d102      	bne.n	801c26e <sys_mutex_new+0x2e>
+  {
+#if SYS_STATS
+    ++lwip_stats.sys.mutex.err;
+#endif /* SYS_STATS */
+    return ERR_MEM;
+ 801c268:	f04f 33ff 	mov.w	r3, #4294967295
+ 801c26c:	e000      	b.n	801c270 <sys_mutex_new+0x30>
+  ++lwip_stats.sys.mutex.used;
+  if (lwip_stats.sys.mutex.max < lwip_stats.sys.mutex.used) {
+    lwip_stats.sys.mutex.max = lwip_stats.sys.mutex.used;
+  }
+#endif /* SYS_STATS */
+  return ERR_OK;
+ 801c26e:	2300      	movs	r3, #0
+}
+ 801c270:	4618      	mov	r0, r3
+ 801c272:	3710      	adds	r7, #16
+ 801c274:	46bd      	mov	sp, r7
+ 801c276:	bd80      	pop	{r7, pc}
+
+0801c278 <sys_mutex_lock>:
+  osMutexDelete(*mutex);
+}
+/*-----------------------------------------------------------------------------------*/
+/* Lock a mutex*/
+void sys_mutex_lock(sys_mutex_t *mutex)
+{
+ 801c278:	b580      	push	{r7, lr}
+ 801c27a:	b082      	sub	sp, #8
+ 801c27c:	af00      	add	r7, sp, #0
+ 801c27e:	6078      	str	r0, [r7, #4]
+#if (osCMSIS < 0x20000U)
+  osMutexWait(*mutex, osWaitForever);
+ 801c280:	687b      	ldr	r3, [r7, #4]
+ 801c282:	681b      	ldr	r3, [r3, #0]
+ 801c284:	f04f 31ff 	mov.w	r1, #4294967295
+ 801c288:	4618      	mov	r0, r3
+ 801c28a:	f7f0 fe95 	bl	800cfb8 <osMutexWait>
+#else
+  osMutexAcquire(*mutex, osWaitForever);
+#endif
+}
+ 801c28e:	bf00      	nop
+ 801c290:	3708      	adds	r7, #8
+ 801c292:	46bd      	mov	sp, r7
+ 801c294:	bd80      	pop	{r7, pc}
+
+0801c296 <sys_mutex_unlock>:
+
+/*-----------------------------------------------------------------------------------*/
+/* Unlock a mutex*/
+void sys_mutex_unlock(sys_mutex_t *mutex)
+{
+ 801c296:	b580      	push	{r7, lr}
+ 801c298:	b082      	sub	sp, #8
+ 801c29a:	af00      	add	r7, sp, #0
+ 801c29c:	6078      	str	r0, [r7, #4]
+  osMutexRelease(*mutex);
+ 801c29e:	687b      	ldr	r3, [r7, #4]
+ 801c2a0:	681b      	ldr	r3, [r3, #0]
+ 801c2a2:	4618      	mov	r0, r3
+ 801c2a4:	f7f0 fed6 	bl	800d054 <osMutexRelease>
+}
+ 801c2a8:	bf00      	nop
+ 801c2aa:	3708      	adds	r7, #8
+ 801c2ac:	46bd      	mov	sp, r7
+ 801c2ae:	bd80      	pop	{r7, pc}
+
+0801c2b0 <sys_thread_new>:
+  function "thread()". The "arg" argument will be passed as an argument to the
+  thread() function. The id of the new thread is returned. Both the id and
+  the priority are system dependent.
+*/
+sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread , void *arg, int stacksize, int prio)
+{
+ 801c2b0:	b580      	push	{r7, lr}
+ 801c2b2:	b08c      	sub	sp, #48	; 0x30
+ 801c2b4:	af00      	add	r7, sp, #0
+ 801c2b6:	60f8      	str	r0, [r7, #12]
+ 801c2b8:	60b9      	str	r1, [r7, #8]
+ 801c2ba:	607a      	str	r2, [r7, #4]
+ 801c2bc:	603b      	str	r3, [r7, #0]
+#if (osCMSIS < 0x20000U)
+  const osThreadDef_t os_thread_def = { (char *)name, (os_pthread)thread, (osPriority)prio, 0, stacksize};
+ 801c2be:	f107 0314 	add.w	r3, r7, #20
+ 801c2c2:	2200      	movs	r2, #0
+ 801c2c4:	601a      	str	r2, [r3, #0]
+ 801c2c6:	605a      	str	r2, [r3, #4]
+ 801c2c8:	609a      	str	r2, [r3, #8]
+ 801c2ca:	60da      	str	r2, [r3, #12]
+ 801c2cc:	611a      	str	r2, [r3, #16]
+ 801c2ce:	615a      	str	r2, [r3, #20]
+ 801c2d0:	619a      	str	r2, [r3, #24]
+ 801c2d2:	68fb      	ldr	r3, [r7, #12]
+ 801c2d4:	617b      	str	r3, [r7, #20]
+ 801c2d6:	68bb      	ldr	r3, [r7, #8]
+ 801c2d8:	61bb      	str	r3, [r7, #24]
+ 801c2da:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 801c2dc:	b21b      	sxth	r3, r3
+ 801c2de:	83bb      	strh	r3, [r7, #28]
+ 801c2e0:	683b      	ldr	r3, [r7, #0]
+ 801c2e2:	627b      	str	r3, [r7, #36]	; 0x24
+  return osThreadCreate(&os_thread_def, arg);
+ 801c2e4:	f107 0314 	add.w	r3, r7, #20
+ 801c2e8:	6879      	ldr	r1, [r7, #4]
+ 801c2ea:	4618      	mov	r0, r3
+ 801c2ec:	f7f0 fdeb 	bl	800cec6 <osThreadCreate>
+ 801c2f0:	4603      	mov	r3, r0
+                        .stack_size = stacksize,
+                        .priority = (osPriority_t)prio,
+                      };
+  return osThreadNew(thread, arg, &attributes);
+#endif
+}
+ 801c2f2:	4618      	mov	r0, r3
+ 801c2f4:	3730      	adds	r7, #48	; 0x30
+ 801c2f6:	46bd      	mov	sp, r7
+ 801c2f8:	bd80      	pop	{r7, pc}
+	...
+
+0801c2fc <sys_arch_protect>:
+
+  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
+        API is available
+*/
+sys_prot_t sys_arch_protect(void)
+{
+ 801c2fc:	b580      	push	{r7, lr}
+ 801c2fe:	af00      	add	r7, sp, #0
+#if (osCMSIS < 0x20000U)
+  osMutexWait(lwip_sys_mutex, osWaitForever);
+ 801c300:	4b04      	ldr	r3, [pc, #16]	; (801c314 <sys_arch_protect+0x18>)
+ 801c302:	681b      	ldr	r3, [r3, #0]
+ 801c304:	f04f 31ff 	mov.w	r1, #4294967295
+ 801c308:	4618      	mov	r0, r3
+ 801c30a:	f7f0 fe55 	bl	800cfb8 <osMutexWait>
+#else
+  osMutexAcquire(lwip_sys_mutex, osWaitForever);
+#endif
+  return (sys_prot_t)1;
+ 801c30e:	2301      	movs	r3, #1
+}
+ 801c310:	4618      	mov	r0, r3
+ 801c312:	bd80      	pop	{r7, pc}
+ 801c314:	2000f830 	.word	0x2000f830
+
+0801c318 <sys_arch_unprotect>:
+
+  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
+        API is available
+*/
+void sys_arch_unprotect(sys_prot_t pval)
+{
+ 801c318:	b580      	push	{r7, lr}
+ 801c31a:	b082      	sub	sp, #8
+ 801c31c:	af00      	add	r7, sp, #0
+ 801c31e:	6078      	str	r0, [r7, #4]
+  ( void ) pval;
+  osMutexRelease(lwip_sys_mutex);
+ 801c320:	4b04      	ldr	r3, [pc, #16]	; (801c334 <sys_arch_unprotect+0x1c>)
+ 801c322:	681b      	ldr	r3, [r3, #0]
+ 801c324:	4618      	mov	r0, r3
+ 801c326:	f7f0 fe95 	bl	800d054 <osMutexRelease>
+}
+ 801c32a:	bf00      	nop
+ 801c32c:	3708      	adds	r7, #8
+ 801c32e:	46bd      	mov	sp, r7
+ 801c330:	bd80      	pop	{r7, pc}
+ 801c332:	bf00      	nop
+ 801c334:	2000f830 	.word	0x2000f830
+
+0801c338 <__libc_init_array>:
+ 801c338:	b570      	push	{r4, r5, r6, lr}
+ 801c33a:	4e0d      	ldr	r6, [pc, #52]	; (801c370 <__libc_init_array+0x38>)
+ 801c33c:	4c0d      	ldr	r4, [pc, #52]	; (801c374 <__libc_init_array+0x3c>)
+ 801c33e:	1ba4      	subs	r4, r4, r6
+ 801c340:	10a4      	asrs	r4, r4, #2
+ 801c342:	2500      	movs	r5, #0
+ 801c344:	42a5      	cmp	r5, r4
+ 801c346:	d109      	bne.n	801c35c <__libc_init_array+0x24>
+ 801c348:	4e0b      	ldr	r6, [pc, #44]	; (801c378 <__libc_init_array+0x40>)
+ 801c34a:	4c0c      	ldr	r4, [pc, #48]	; (801c37c <__libc_init_array+0x44>)
+ 801c34c:	f001 f914 	bl	801d578 <_init>
+ 801c350:	1ba4      	subs	r4, r4, r6
+ 801c352:	10a4      	asrs	r4, r4, #2
+ 801c354:	2500      	movs	r5, #0
+ 801c356:	42a5      	cmp	r5, r4
+ 801c358:	d105      	bne.n	801c366 <__libc_init_array+0x2e>
+ 801c35a:	bd70      	pop	{r4, r5, r6, pc}
+ 801c35c:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
+ 801c360:	4798      	blx	r3
+ 801c362:	3501      	adds	r5, #1
+ 801c364:	e7ee      	b.n	801c344 <__libc_init_array+0xc>
+ 801c366:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
+ 801c36a:	4798      	blx	r3
+ 801c36c:	3501      	adds	r5, #1
+ 801c36e:	e7f2      	b.n	801c356 <__libc_init_array+0x1e>
+ 801c370:	08022658 	.word	0x08022658
+ 801c374:	08022658 	.word	0x08022658
+ 801c378:	08022658 	.word	0x08022658
+ 801c37c:	0802265c 	.word	0x0802265c
+
+0801c380 <memcmp>:
+ 801c380:	b530      	push	{r4, r5, lr}
+ 801c382:	2400      	movs	r4, #0
+ 801c384:	42a2      	cmp	r2, r4
+ 801c386:	d101      	bne.n	801c38c <memcmp+0xc>
+ 801c388:	2000      	movs	r0, #0
+ 801c38a:	e007      	b.n	801c39c <memcmp+0x1c>
+ 801c38c:	5d03      	ldrb	r3, [r0, r4]
+ 801c38e:	3401      	adds	r4, #1
+ 801c390:	190d      	adds	r5, r1, r4
+ 801c392:	f815 5c01 	ldrb.w	r5, [r5, #-1]
+ 801c396:	42ab      	cmp	r3, r5
+ 801c398:	d0f4      	beq.n	801c384 <memcmp+0x4>
+ 801c39a:	1b58      	subs	r0, r3, r5
+ 801c39c:	bd30      	pop	{r4, r5, pc}
+
+0801c39e <memcpy>:
+ 801c39e:	b510      	push	{r4, lr}
+ 801c3a0:	1e43      	subs	r3, r0, #1
+ 801c3a2:	440a      	add	r2, r1
+ 801c3a4:	4291      	cmp	r1, r2
+ 801c3a6:	d100      	bne.n	801c3aa <memcpy+0xc>
+ 801c3a8:	bd10      	pop	{r4, pc}
+ 801c3aa:	f811 4b01 	ldrb.w	r4, [r1], #1
+ 801c3ae:	f803 4f01 	strb.w	r4, [r3, #1]!
+ 801c3b2:	e7f7      	b.n	801c3a4 <memcpy+0x6>
+
+0801c3b4 <memmove>:
+ 801c3b4:	4288      	cmp	r0, r1
+ 801c3b6:	b510      	push	{r4, lr}
+ 801c3b8:	eb01 0302 	add.w	r3, r1, r2
+ 801c3bc:	d807      	bhi.n	801c3ce <memmove+0x1a>
+ 801c3be:	1e42      	subs	r2, r0, #1
+ 801c3c0:	4299      	cmp	r1, r3
+ 801c3c2:	d00a      	beq.n	801c3da <memmove+0x26>
+ 801c3c4:	f811 4b01 	ldrb.w	r4, [r1], #1
+ 801c3c8:	f802 4f01 	strb.w	r4, [r2, #1]!
+ 801c3cc:	e7f8      	b.n	801c3c0 <memmove+0xc>
+ 801c3ce:	4283      	cmp	r3, r0
+ 801c3d0:	d9f5      	bls.n	801c3be <memmove+0xa>
+ 801c3d2:	1881      	adds	r1, r0, r2
+ 801c3d4:	1ad2      	subs	r2, r2, r3
+ 801c3d6:	42d3      	cmn	r3, r2
+ 801c3d8:	d100      	bne.n	801c3dc <memmove+0x28>
+ 801c3da:	bd10      	pop	{r4, pc}
+ 801c3dc:	f813 4d01 	ldrb.w	r4, [r3, #-1]!
+ 801c3e0:	f801 4d01 	strb.w	r4, [r1, #-1]!
+ 801c3e4:	e7f7      	b.n	801c3d6 <memmove+0x22>
+
+0801c3e6 <memset>:
+ 801c3e6:	4402      	add	r2, r0
+ 801c3e8:	4603      	mov	r3, r0
+ 801c3ea:	4293      	cmp	r3, r2
+ 801c3ec:	d100      	bne.n	801c3f0 <memset+0xa>
+ 801c3ee:	4770      	bx	lr
+ 801c3f0:	f803 1b01 	strb.w	r1, [r3], #1
+ 801c3f4:	e7f9      	b.n	801c3ea <memset+0x4>
+	...
+
+0801c3f8 <iprintf>:
+ 801c3f8:	b40f      	push	{r0, r1, r2, r3}
+ 801c3fa:	4b0a      	ldr	r3, [pc, #40]	; (801c424 <iprintf+0x2c>)
+ 801c3fc:	b513      	push	{r0, r1, r4, lr}
+ 801c3fe:	681c      	ldr	r4, [r3, #0]
+ 801c400:	b124      	cbz	r4, 801c40c <iprintf+0x14>
+ 801c402:	69a3      	ldr	r3, [r4, #24]
+ 801c404:	b913      	cbnz	r3, 801c40c <iprintf+0x14>
+ 801c406:	4620      	mov	r0, r4
+ 801c408:	f000 f8a2 	bl	801c550 <__sinit>
+ 801c40c:	ab05      	add	r3, sp, #20
+ 801c40e:	9a04      	ldr	r2, [sp, #16]
+ 801c410:	68a1      	ldr	r1, [r4, #8]
+ 801c412:	9301      	str	r3, [sp, #4]
+ 801c414:	4620      	mov	r0, r4
+ 801c416:	f000 fb51 	bl	801cabc <_vfiprintf_r>
+ 801c41a:	b002      	add	sp, #8
+ 801c41c:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
+ 801c420:	b004      	add	sp, #16
+ 801c422:	4770      	bx	lr
+ 801c424:	20000070 	.word	0x20000070
+
+0801c428 <rand>:
+ 801c428:	b538      	push	{r3, r4, r5, lr}
+ 801c42a:	4b13      	ldr	r3, [pc, #76]	; (801c478 <rand+0x50>)
+ 801c42c:	681c      	ldr	r4, [r3, #0]
+ 801c42e:	6ba3      	ldr	r3, [r4, #56]	; 0x38
+ 801c430:	b97b      	cbnz	r3, 801c452 <rand+0x2a>
+ 801c432:	2018      	movs	r0, #24
+ 801c434:	f000 f916 	bl	801c664 <malloc>
+ 801c438:	4a10      	ldr	r2, [pc, #64]	; (801c47c <rand+0x54>)
+ 801c43a:	4b11      	ldr	r3, [pc, #68]	; (801c480 <rand+0x58>)
+ 801c43c:	63a0      	str	r0, [r4, #56]	; 0x38
+ 801c43e:	e9c0 2300 	strd	r2, r3, [r0]
+ 801c442:	4b10      	ldr	r3, [pc, #64]	; (801c484 <rand+0x5c>)
+ 801c444:	6083      	str	r3, [r0, #8]
+ 801c446:	230b      	movs	r3, #11
+ 801c448:	8183      	strh	r3, [r0, #12]
+ 801c44a:	2201      	movs	r2, #1
+ 801c44c:	2300      	movs	r3, #0
+ 801c44e:	e9c0 2304 	strd	r2, r3, [r0, #16]
+ 801c452:	6ba1      	ldr	r1, [r4, #56]	; 0x38
+ 801c454:	480c      	ldr	r0, [pc, #48]	; (801c488 <rand+0x60>)
+ 801c456:	690a      	ldr	r2, [r1, #16]
+ 801c458:	694b      	ldr	r3, [r1, #20]
+ 801c45a:	4c0c      	ldr	r4, [pc, #48]	; (801c48c <rand+0x64>)
+ 801c45c:	4350      	muls	r0, r2
+ 801c45e:	fb04 0003 	mla	r0, r4, r3, r0
+ 801c462:	fba2 2304 	umull	r2, r3, r2, r4
+ 801c466:	4403      	add	r3, r0
+ 801c468:	1c54      	adds	r4, r2, #1
+ 801c46a:	f143 0500 	adc.w	r5, r3, #0
+ 801c46e:	e9c1 4504 	strd	r4, r5, [r1, #16]
+ 801c472:	f025 4000 	bic.w	r0, r5, #2147483648	; 0x80000000
+ 801c476:	bd38      	pop	{r3, r4, r5, pc}
+ 801c478:	20000070 	.word	0x20000070
+ 801c47c:	abcd330e 	.word	0xabcd330e
+ 801c480:	e66d1234 	.word	0xe66d1234
+ 801c484:	0005deec 	.word	0x0005deec
+ 801c488:	5851f42d 	.word	0x5851f42d
+ 801c48c:	4c957f2d 	.word	0x4c957f2d
+
+0801c490 <siprintf>:
+ 801c490:	b40e      	push	{r1, r2, r3}
+ 801c492:	b500      	push	{lr}
+ 801c494:	b09c      	sub	sp, #112	; 0x70
+ 801c496:	ab1d      	add	r3, sp, #116	; 0x74
+ 801c498:	9002      	str	r0, [sp, #8]
+ 801c49a:	9006      	str	r0, [sp, #24]
+ 801c49c:	f06f 4100 	mvn.w	r1, #2147483648	; 0x80000000
+ 801c4a0:	4809      	ldr	r0, [pc, #36]	; (801c4c8 <siprintf+0x38>)
+ 801c4a2:	9107      	str	r1, [sp, #28]
+ 801c4a4:	9104      	str	r1, [sp, #16]
+ 801c4a6:	4909      	ldr	r1, [pc, #36]	; (801c4cc <siprintf+0x3c>)
+ 801c4a8:	f853 2b04 	ldr.w	r2, [r3], #4
+ 801c4ac:	9105      	str	r1, [sp, #20]
+ 801c4ae:	6800      	ldr	r0, [r0, #0]
+ 801c4b0:	9301      	str	r3, [sp, #4]
+ 801c4b2:	a902      	add	r1, sp, #8
+ 801c4b4:	f000 f9e0 	bl	801c878 <_svfiprintf_r>
+ 801c4b8:	9b02      	ldr	r3, [sp, #8]
+ 801c4ba:	2200      	movs	r2, #0
+ 801c4bc:	701a      	strb	r2, [r3, #0]
+ 801c4be:	b01c      	add	sp, #112	; 0x70
+ 801c4c0:	f85d eb04 	ldr.w	lr, [sp], #4
+ 801c4c4:	b003      	add	sp, #12
+ 801c4c6:	4770      	bx	lr
+ 801c4c8:	20000070 	.word	0x20000070
+ 801c4cc:	ffff0208 	.word	0xffff0208
+
+0801c4d0 <std>:
+ 801c4d0:	2300      	movs	r3, #0
+ 801c4d2:	b510      	push	{r4, lr}
+ 801c4d4:	4604      	mov	r4, r0
+ 801c4d6:	e9c0 3300 	strd	r3, r3, [r0]
+ 801c4da:	6083      	str	r3, [r0, #8]
+ 801c4dc:	8181      	strh	r1, [r0, #12]
+ 801c4de:	6643      	str	r3, [r0, #100]	; 0x64
+ 801c4e0:	81c2      	strh	r2, [r0, #14]
+ 801c4e2:	e9c0 3304 	strd	r3, r3, [r0, #16]
+ 801c4e6:	6183      	str	r3, [r0, #24]
+ 801c4e8:	4619      	mov	r1, r3
+ 801c4ea:	2208      	movs	r2, #8
+ 801c4ec:	305c      	adds	r0, #92	; 0x5c
+ 801c4ee:	f7ff ff7a 	bl	801c3e6 <memset>
+ 801c4f2:	4b05      	ldr	r3, [pc, #20]	; (801c508 <std+0x38>)
+ 801c4f4:	6263      	str	r3, [r4, #36]	; 0x24
+ 801c4f6:	4b05      	ldr	r3, [pc, #20]	; (801c50c <std+0x3c>)
+ 801c4f8:	62a3      	str	r3, [r4, #40]	; 0x28
+ 801c4fa:	4b05      	ldr	r3, [pc, #20]	; (801c510 <std+0x40>)
+ 801c4fc:	62e3      	str	r3, [r4, #44]	; 0x2c
+ 801c4fe:	4b05      	ldr	r3, [pc, #20]	; (801c514 <std+0x44>)
+ 801c500:	6224      	str	r4, [r4, #32]
+ 801c502:	6323      	str	r3, [r4, #48]	; 0x30
+ 801c504:	bd10      	pop	{r4, pc}
+ 801c506:	bf00      	nop
+ 801c508:	0801d019 	.word	0x0801d019
+ 801c50c:	0801d03b 	.word	0x0801d03b
+ 801c510:	0801d073 	.word	0x0801d073
+ 801c514:	0801d097 	.word	0x0801d097
+
+0801c518 <_cleanup_r>:
+ 801c518:	4901      	ldr	r1, [pc, #4]	; (801c520 <_cleanup_r+0x8>)
+ 801c51a:	f000 b885 	b.w	801c628 <_fwalk_reent>
+ 801c51e:	bf00      	nop
+ 801c520:	0801d371 	.word	0x0801d371
+
+0801c524 <__sfmoreglue>:
+ 801c524:	b570      	push	{r4, r5, r6, lr}
+ 801c526:	1e4a      	subs	r2, r1, #1
+ 801c528:	2568      	movs	r5, #104	; 0x68
+ 801c52a:	4355      	muls	r5, r2
+ 801c52c:	460e      	mov	r6, r1
+ 801c52e:	f105 0174 	add.w	r1, r5, #116	; 0x74
+ 801c532:	f000 f8ed 	bl	801c710 <_malloc_r>
+ 801c536:	4604      	mov	r4, r0
+ 801c538:	b140      	cbz	r0, 801c54c <__sfmoreglue+0x28>
+ 801c53a:	2100      	movs	r1, #0
+ 801c53c:	e9c0 1600 	strd	r1, r6, [r0]
+ 801c540:	300c      	adds	r0, #12
+ 801c542:	60a0      	str	r0, [r4, #8]
+ 801c544:	f105 0268 	add.w	r2, r5, #104	; 0x68
+ 801c548:	f7ff ff4d 	bl	801c3e6 <memset>
+ 801c54c:	4620      	mov	r0, r4
+ 801c54e:	bd70      	pop	{r4, r5, r6, pc}
+
+0801c550 <__sinit>:
+ 801c550:	6983      	ldr	r3, [r0, #24]
+ 801c552:	b510      	push	{r4, lr}
+ 801c554:	4604      	mov	r4, r0
+ 801c556:	bb33      	cbnz	r3, 801c5a6 <__sinit+0x56>
+ 801c558:	e9c0 3312 	strd	r3, r3, [r0, #72]	; 0x48
+ 801c55c:	6503      	str	r3, [r0, #80]	; 0x50
+ 801c55e:	4b12      	ldr	r3, [pc, #72]	; (801c5a8 <__sinit+0x58>)
+ 801c560:	4a12      	ldr	r2, [pc, #72]	; (801c5ac <__sinit+0x5c>)
+ 801c562:	681b      	ldr	r3, [r3, #0]
+ 801c564:	6282      	str	r2, [r0, #40]	; 0x28
+ 801c566:	4298      	cmp	r0, r3
+ 801c568:	bf04      	itt	eq
+ 801c56a:	2301      	moveq	r3, #1
+ 801c56c:	6183      	streq	r3, [r0, #24]
+ 801c56e:	f000 f81f 	bl	801c5b0 <__sfp>
+ 801c572:	6060      	str	r0, [r4, #4]
+ 801c574:	4620      	mov	r0, r4
+ 801c576:	f000 f81b 	bl	801c5b0 <__sfp>
+ 801c57a:	60a0      	str	r0, [r4, #8]
+ 801c57c:	4620      	mov	r0, r4
+ 801c57e:	f000 f817 	bl	801c5b0 <__sfp>
+ 801c582:	2200      	movs	r2, #0
+ 801c584:	60e0      	str	r0, [r4, #12]
+ 801c586:	2104      	movs	r1, #4
+ 801c588:	6860      	ldr	r0, [r4, #4]
+ 801c58a:	f7ff ffa1 	bl	801c4d0 <std>
+ 801c58e:	2201      	movs	r2, #1
+ 801c590:	2109      	movs	r1, #9
+ 801c592:	68a0      	ldr	r0, [r4, #8]
+ 801c594:	f7ff ff9c 	bl	801c4d0 <std>
+ 801c598:	2202      	movs	r2, #2
+ 801c59a:	2112      	movs	r1, #18
+ 801c59c:	68e0      	ldr	r0, [r4, #12]
+ 801c59e:	f7ff ff97 	bl	801c4d0 <std>
+ 801c5a2:	2301      	movs	r3, #1
+ 801c5a4:	61a3      	str	r3, [r4, #24]
+ 801c5a6:	bd10      	pop	{r4, pc}
+ 801c5a8:	080225b8 	.word	0x080225b8
+ 801c5ac:	0801c519 	.word	0x0801c519
+
+0801c5b0 <__sfp>:
+ 801c5b0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 801c5b2:	4b1b      	ldr	r3, [pc, #108]	; (801c620 <__sfp+0x70>)
+ 801c5b4:	681e      	ldr	r6, [r3, #0]
+ 801c5b6:	69b3      	ldr	r3, [r6, #24]
+ 801c5b8:	4607      	mov	r7, r0
+ 801c5ba:	b913      	cbnz	r3, 801c5c2 <__sfp+0x12>
+ 801c5bc:	4630      	mov	r0, r6
+ 801c5be:	f7ff ffc7 	bl	801c550 <__sinit>
+ 801c5c2:	3648      	adds	r6, #72	; 0x48
+ 801c5c4:	e9d6 3401 	ldrd	r3, r4, [r6, #4]
+ 801c5c8:	3b01      	subs	r3, #1
+ 801c5ca:	d503      	bpl.n	801c5d4 <__sfp+0x24>
+ 801c5cc:	6833      	ldr	r3, [r6, #0]
+ 801c5ce:	b133      	cbz	r3, 801c5de <__sfp+0x2e>
+ 801c5d0:	6836      	ldr	r6, [r6, #0]
+ 801c5d2:	e7f7      	b.n	801c5c4 <__sfp+0x14>
+ 801c5d4:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
+ 801c5d8:	b16d      	cbz	r5, 801c5f6 <__sfp+0x46>
+ 801c5da:	3468      	adds	r4, #104	; 0x68
+ 801c5dc:	e7f4      	b.n	801c5c8 <__sfp+0x18>
+ 801c5de:	2104      	movs	r1, #4
+ 801c5e0:	4638      	mov	r0, r7
+ 801c5e2:	f7ff ff9f 	bl	801c524 <__sfmoreglue>
+ 801c5e6:	6030      	str	r0, [r6, #0]
+ 801c5e8:	2800      	cmp	r0, #0
+ 801c5ea:	d1f1      	bne.n	801c5d0 <__sfp+0x20>
+ 801c5ec:	230c      	movs	r3, #12
+ 801c5ee:	603b      	str	r3, [r7, #0]
+ 801c5f0:	4604      	mov	r4, r0
+ 801c5f2:	4620      	mov	r0, r4
+ 801c5f4:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
+ 801c5f6:	4b0b      	ldr	r3, [pc, #44]	; (801c624 <__sfp+0x74>)
+ 801c5f8:	6665      	str	r5, [r4, #100]	; 0x64
+ 801c5fa:	e9c4 5500 	strd	r5, r5, [r4]
+ 801c5fe:	60a5      	str	r5, [r4, #8]
+ 801c600:	e9c4 3503 	strd	r3, r5, [r4, #12]
+ 801c604:	e9c4 5505 	strd	r5, r5, [r4, #20]
+ 801c608:	2208      	movs	r2, #8
+ 801c60a:	4629      	mov	r1, r5
+ 801c60c:	f104 005c 	add.w	r0, r4, #92	; 0x5c
+ 801c610:	f7ff fee9 	bl	801c3e6 <memset>
+ 801c614:	e9c4 550d 	strd	r5, r5, [r4, #52]	; 0x34
+ 801c618:	e9c4 5512 	strd	r5, r5, [r4, #72]	; 0x48
+ 801c61c:	e7e9      	b.n	801c5f2 <__sfp+0x42>
+ 801c61e:	bf00      	nop
+ 801c620:	080225b8 	.word	0x080225b8
+ 801c624:	ffff0001 	.word	0xffff0001
+
+0801c628 <_fwalk_reent>:
+ 801c628:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
+ 801c62c:	4680      	mov	r8, r0
+ 801c62e:	4689      	mov	r9, r1
+ 801c630:	f100 0448 	add.w	r4, r0, #72	; 0x48
+ 801c634:	2600      	movs	r6, #0
+ 801c636:	b914      	cbnz	r4, 801c63e <_fwalk_reent+0x16>
+ 801c638:	4630      	mov	r0, r6
+ 801c63a:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
+ 801c63e:	e9d4 7501 	ldrd	r7, r5, [r4, #4]
+ 801c642:	3f01      	subs	r7, #1
+ 801c644:	d501      	bpl.n	801c64a <_fwalk_reent+0x22>
+ 801c646:	6824      	ldr	r4, [r4, #0]
+ 801c648:	e7f5      	b.n	801c636 <_fwalk_reent+0xe>
+ 801c64a:	89ab      	ldrh	r3, [r5, #12]
+ 801c64c:	2b01      	cmp	r3, #1
+ 801c64e:	d907      	bls.n	801c660 <_fwalk_reent+0x38>
+ 801c650:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
+ 801c654:	3301      	adds	r3, #1
+ 801c656:	d003      	beq.n	801c660 <_fwalk_reent+0x38>
+ 801c658:	4629      	mov	r1, r5
+ 801c65a:	4640      	mov	r0, r8
+ 801c65c:	47c8      	blx	r9
+ 801c65e:	4306      	orrs	r6, r0
+ 801c660:	3568      	adds	r5, #104	; 0x68
+ 801c662:	e7ee      	b.n	801c642 <_fwalk_reent+0x1a>
+
+0801c664 <malloc>:
+ 801c664:	4b02      	ldr	r3, [pc, #8]	; (801c670 <malloc+0xc>)
+ 801c666:	4601      	mov	r1, r0
+ 801c668:	6818      	ldr	r0, [r3, #0]
+ 801c66a:	f000 b851 	b.w	801c710 <_malloc_r>
+ 801c66e:	bf00      	nop
+ 801c670:	20000070 	.word	0x20000070
+
+0801c674 <_free_r>:
+ 801c674:	b538      	push	{r3, r4, r5, lr}
+ 801c676:	4605      	mov	r5, r0
+ 801c678:	2900      	cmp	r1, #0
+ 801c67a:	d045      	beq.n	801c708 <_free_r+0x94>
+ 801c67c:	f851 3c04 	ldr.w	r3, [r1, #-4]
+ 801c680:	1f0c      	subs	r4, r1, #4
+ 801c682:	2b00      	cmp	r3, #0
+ 801c684:	bfb8      	it	lt
+ 801c686:	18e4      	addlt	r4, r4, r3
+ 801c688:	f000 ff12 	bl	801d4b0 <__malloc_lock>
+ 801c68c:	4a1f      	ldr	r2, [pc, #124]	; (801c70c <_free_r+0x98>)
+ 801c68e:	6813      	ldr	r3, [r2, #0]
+ 801c690:	4610      	mov	r0, r2
+ 801c692:	b933      	cbnz	r3, 801c6a2 <_free_r+0x2e>
+ 801c694:	6063      	str	r3, [r4, #4]
+ 801c696:	6014      	str	r4, [r2, #0]
+ 801c698:	4628      	mov	r0, r5
+ 801c69a:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
+ 801c69e:	f000 bf08 	b.w	801d4b2 <__malloc_unlock>
+ 801c6a2:	42a3      	cmp	r3, r4
+ 801c6a4:	d90c      	bls.n	801c6c0 <_free_r+0x4c>
+ 801c6a6:	6821      	ldr	r1, [r4, #0]
+ 801c6a8:	1862      	adds	r2, r4, r1
+ 801c6aa:	4293      	cmp	r3, r2
+ 801c6ac:	bf04      	itt	eq
+ 801c6ae:	681a      	ldreq	r2, [r3, #0]
+ 801c6b0:	685b      	ldreq	r3, [r3, #4]
+ 801c6b2:	6063      	str	r3, [r4, #4]
+ 801c6b4:	bf04      	itt	eq
+ 801c6b6:	1852      	addeq	r2, r2, r1
+ 801c6b8:	6022      	streq	r2, [r4, #0]
+ 801c6ba:	6004      	str	r4, [r0, #0]
+ 801c6bc:	e7ec      	b.n	801c698 <_free_r+0x24>
+ 801c6be:	4613      	mov	r3, r2
+ 801c6c0:	685a      	ldr	r2, [r3, #4]
+ 801c6c2:	b10a      	cbz	r2, 801c6c8 <_free_r+0x54>
+ 801c6c4:	42a2      	cmp	r2, r4
+ 801c6c6:	d9fa      	bls.n	801c6be <_free_r+0x4a>
+ 801c6c8:	6819      	ldr	r1, [r3, #0]
+ 801c6ca:	1858      	adds	r0, r3, r1
+ 801c6cc:	42a0      	cmp	r0, r4
+ 801c6ce:	d10b      	bne.n	801c6e8 <_free_r+0x74>
+ 801c6d0:	6820      	ldr	r0, [r4, #0]
+ 801c6d2:	4401      	add	r1, r0
+ 801c6d4:	1858      	adds	r0, r3, r1
+ 801c6d6:	4282      	cmp	r2, r0
+ 801c6d8:	6019      	str	r1, [r3, #0]
+ 801c6da:	d1dd      	bne.n	801c698 <_free_r+0x24>
+ 801c6dc:	6810      	ldr	r0, [r2, #0]
+ 801c6de:	6852      	ldr	r2, [r2, #4]
+ 801c6e0:	605a      	str	r2, [r3, #4]
+ 801c6e2:	4401      	add	r1, r0
+ 801c6e4:	6019      	str	r1, [r3, #0]
+ 801c6e6:	e7d7      	b.n	801c698 <_free_r+0x24>
+ 801c6e8:	d902      	bls.n	801c6f0 <_free_r+0x7c>
+ 801c6ea:	230c      	movs	r3, #12
+ 801c6ec:	602b      	str	r3, [r5, #0]
+ 801c6ee:	e7d3      	b.n	801c698 <_free_r+0x24>
+ 801c6f0:	6820      	ldr	r0, [r4, #0]
+ 801c6f2:	1821      	adds	r1, r4, r0
+ 801c6f4:	428a      	cmp	r2, r1
+ 801c6f6:	bf04      	itt	eq
+ 801c6f8:	6811      	ldreq	r1, [r2, #0]
+ 801c6fa:	6852      	ldreq	r2, [r2, #4]
+ 801c6fc:	6062      	str	r2, [r4, #4]
+ 801c6fe:	bf04      	itt	eq
+ 801c700:	1809      	addeq	r1, r1, r0
+ 801c702:	6021      	streq	r1, [r4, #0]
+ 801c704:	605c      	str	r4, [r3, #4]
+ 801c706:	e7c7      	b.n	801c698 <_free_r+0x24>
+ 801c708:	bd38      	pop	{r3, r4, r5, pc}
+ 801c70a:	bf00      	nop
+ 801c70c:	20008860 	.word	0x20008860
+
+0801c710 <_malloc_r>:
+ 801c710:	b570      	push	{r4, r5, r6, lr}
+ 801c712:	1ccd      	adds	r5, r1, #3
+ 801c714:	f025 0503 	bic.w	r5, r5, #3
+ 801c718:	3508      	adds	r5, #8
+ 801c71a:	2d0c      	cmp	r5, #12
+ 801c71c:	bf38      	it	cc
+ 801c71e:	250c      	movcc	r5, #12
+ 801c720:	2d00      	cmp	r5, #0
+ 801c722:	4606      	mov	r6, r0
+ 801c724:	db01      	blt.n	801c72a <_malloc_r+0x1a>
+ 801c726:	42a9      	cmp	r1, r5
+ 801c728:	d903      	bls.n	801c732 <_malloc_r+0x22>
+ 801c72a:	230c      	movs	r3, #12
+ 801c72c:	6033      	str	r3, [r6, #0]
+ 801c72e:	2000      	movs	r0, #0
+ 801c730:	bd70      	pop	{r4, r5, r6, pc}
+ 801c732:	f000 febd 	bl	801d4b0 <__malloc_lock>
+ 801c736:	4a21      	ldr	r2, [pc, #132]	; (801c7bc <_malloc_r+0xac>)
+ 801c738:	6814      	ldr	r4, [r2, #0]
+ 801c73a:	4621      	mov	r1, r4
+ 801c73c:	b991      	cbnz	r1, 801c764 <_malloc_r+0x54>
+ 801c73e:	4c20      	ldr	r4, [pc, #128]	; (801c7c0 <_malloc_r+0xb0>)
+ 801c740:	6823      	ldr	r3, [r4, #0]
+ 801c742:	b91b      	cbnz	r3, 801c74c <_malloc_r+0x3c>
+ 801c744:	4630      	mov	r0, r6
+ 801c746:	f000 fc57 	bl	801cff8 <_sbrk_r>
+ 801c74a:	6020      	str	r0, [r4, #0]
+ 801c74c:	4629      	mov	r1, r5
+ 801c74e:	4630      	mov	r0, r6
+ 801c750:	f000 fc52 	bl	801cff8 <_sbrk_r>
+ 801c754:	1c43      	adds	r3, r0, #1
+ 801c756:	d124      	bne.n	801c7a2 <_malloc_r+0x92>
+ 801c758:	230c      	movs	r3, #12
+ 801c75a:	6033      	str	r3, [r6, #0]
+ 801c75c:	4630      	mov	r0, r6
+ 801c75e:	f000 fea8 	bl	801d4b2 <__malloc_unlock>
+ 801c762:	e7e4      	b.n	801c72e <_malloc_r+0x1e>
+ 801c764:	680b      	ldr	r3, [r1, #0]
+ 801c766:	1b5b      	subs	r3, r3, r5
+ 801c768:	d418      	bmi.n	801c79c <_malloc_r+0x8c>
+ 801c76a:	2b0b      	cmp	r3, #11
+ 801c76c:	d90f      	bls.n	801c78e <_malloc_r+0x7e>
+ 801c76e:	600b      	str	r3, [r1, #0]
+ 801c770:	50cd      	str	r5, [r1, r3]
+ 801c772:	18cc      	adds	r4, r1, r3
+ 801c774:	4630      	mov	r0, r6
+ 801c776:	f000 fe9c 	bl	801d4b2 <__malloc_unlock>
+ 801c77a:	f104 000b 	add.w	r0, r4, #11
+ 801c77e:	1d23      	adds	r3, r4, #4
+ 801c780:	f020 0007 	bic.w	r0, r0, #7
+ 801c784:	1ac3      	subs	r3, r0, r3
+ 801c786:	d0d3      	beq.n	801c730 <_malloc_r+0x20>
+ 801c788:	425a      	negs	r2, r3
+ 801c78a:	50e2      	str	r2, [r4, r3]
+ 801c78c:	e7d0      	b.n	801c730 <_malloc_r+0x20>
+ 801c78e:	428c      	cmp	r4, r1
+ 801c790:	684b      	ldr	r3, [r1, #4]
+ 801c792:	bf16      	itet	ne
+ 801c794:	6063      	strne	r3, [r4, #4]
+ 801c796:	6013      	streq	r3, [r2, #0]
+ 801c798:	460c      	movne	r4, r1
+ 801c79a:	e7eb      	b.n	801c774 <_malloc_r+0x64>
+ 801c79c:	460c      	mov	r4, r1
+ 801c79e:	6849      	ldr	r1, [r1, #4]
+ 801c7a0:	e7cc      	b.n	801c73c <_malloc_r+0x2c>
+ 801c7a2:	1cc4      	adds	r4, r0, #3
+ 801c7a4:	f024 0403 	bic.w	r4, r4, #3
+ 801c7a8:	42a0      	cmp	r0, r4
+ 801c7aa:	d005      	beq.n	801c7b8 <_malloc_r+0xa8>
+ 801c7ac:	1a21      	subs	r1, r4, r0
+ 801c7ae:	4630      	mov	r0, r6
+ 801c7b0:	f000 fc22 	bl	801cff8 <_sbrk_r>
+ 801c7b4:	3001      	adds	r0, #1
+ 801c7b6:	d0cf      	beq.n	801c758 <_malloc_r+0x48>
+ 801c7b8:	6025      	str	r5, [r4, #0]
+ 801c7ba:	e7db      	b.n	801c774 <_malloc_r+0x64>
+ 801c7bc:	20008860 	.word	0x20008860
+ 801c7c0:	20008864 	.word	0x20008864
+
+0801c7c4 <__ssputs_r>:
+ 801c7c4:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 801c7c8:	688e      	ldr	r6, [r1, #8]
+ 801c7ca:	429e      	cmp	r6, r3
+ 801c7cc:	4682      	mov	sl, r0
+ 801c7ce:	460c      	mov	r4, r1
+ 801c7d0:	4690      	mov	r8, r2
+ 801c7d2:	4699      	mov	r9, r3
+ 801c7d4:	d837      	bhi.n	801c846 <__ssputs_r+0x82>
+ 801c7d6:	898a      	ldrh	r2, [r1, #12]
+ 801c7d8:	f412 6f90 	tst.w	r2, #1152	; 0x480
+ 801c7dc:	d031      	beq.n	801c842 <__ssputs_r+0x7e>
+ 801c7de:	6825      	ldr	r5, [r4, #0]
+ 801c7e0:	6909      	ldr	r1, [r1, #16]
+ 801c7e2:	1a6f      	subs	r7, r5, r1
+ 801c7e4:	6965      	ldr	r5, [r4, #20]
+ 801c7e6:	2302      	movs	r3, #2
+ 801c7e8:	eb05 0545 	add.w	r5, r5, r5, lsl #1
+ 801c7ec:	fb95 f5f3 	sdiv	r5, r5, r3
+ 801c7f0:	f109 0301 	add.w	r3, r9, #1
+ 801c7f4:	443b      	add	r3, r7
+ 801c7f6:	429d      	cmp	r5, r3
+ 801c7f8:	bf38      	it	cc
+ 801c7fa:	461d      	movcc	r5, r3
+ 801c7fc:	0553      	lsls	r3, r2, #21
+ 801c7fe:	d530      	bpl.n	801c862 <__ssputs_r+0x9e>
+ 801c800:	4629      	mov	r1, r5
+ 801c802:	f7ff ff85 	bl	801c710 <_malloc_r>
+ 801c806:	4606      	mov	r6, r0
+ 801c808:	b950      	cbnz	r0, 801c820 <__ssputs_r+0x5c>
+ 801c80a:	230c      	movs	r3, #12
+ 801c80c:	f8ca 3000 	str.w	r3, [sl]
+ 801c810:	89a3      	ldrh	r3, [r4, #12]
+ 801c812:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 801c816:	81a3      	strh	r3, [r4, #12]
+ 801c818:	f04f 30ff 	mov.w	r0, #4294967295
+ 801c81c:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 801c820:	463a      	mov	r2, r7
+ 801c822:	6921      	ldr	r1, [r4, #16]
+ 801c824:	f7ff fdbb 	bl	801c39e <memcpy>
+ 801c828:	89a3      	ldrh	r3, [r4, #12]
+ 801c82a:	f423 6390 	bic.w	r3, r3, #1152	; 0x480
+ 801c82e:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 801c832:	81a3      	strh	r3, [r4, #12]
+ 801c834:	6126      	str	r6, [r4, #16]
+ 801c836:	6165      	str	r5, [r4, #20]
+ 801c838:	443e      	add	r6, r7
+ 801c83a:	1bed      	subs	r5, r5, r7
+ 801c83c:	6026      	str	r6, [r4, #0]
+ 801c83e:	60a5      	str	r5, [r4, #8]
+ 801c840:	464e      	mov	r6, r9
+ 801c842:	454e      	cmp	r6, r9
+ 801c844:	d900      	bls.n	801c848 <__ssputs_r+0x84>
+ 801c846:	464e      	mov	r6, r9
+ 801c848:	4632      	mov	r2, r6
+ 801c84a:	4641      	mov	r1, r8
+ 801c84c:	6820      	ldr	r0, [r4, #0]
+ 801c84e:	f7ff fdb1 	bl	801c3b4 <memmove>
+ 801c852:	68a3      	ldr	r3, [r4, #8]
+ 801c854:	1b9b      	subs	r3, r3, r6
+ 801c856:	60a3      	str	r3, [r4, #8]
+ 801c858:	6823      	ldr	r3, [r4, #0]
+ 801c85a:	441e      	add	r6, r3
+ 801c85c:	6026      	str	r6, [r4, #0]
+ 801c85e:	2000      	movs	r0, #0
+ 801c860:	e7dc      	b.n	801c81c <__ssputs_r+0x58>
+ 801c862:	462a      	mov	r2, r5
+ 801c864:	f000 fe26 	bl	801d4b4 <_realloc_r>
+ 801c868:	4606      	mov	r6, r0
+ 801c86a:	2800      	cmp	r0, #0
+ 801c86c:	d1e2      	bne.n	801c834 <__ssputs_r+0x70>
+ 801c86e:	6921      	ldr	r1, [r4, #16]
+ 801c870:	4650      	mov	r0, sl
+ 801c872:	f7ff feff 	bl	801c674 <_free_r>
+ 801c876:	e7c8      	b.n	801c80a <__ssputs_r+0x46>
+
+0801c878 <_svfiprintf_r>:
+ 801c878:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 801c87c:	461d      	mov	r5, r3
+ 801c87e:	898b      	ldrh	r3, [r1, #12]
+ 801c880:	061f      	lsls	r7, r3, #24
+ 801c882:	b09d      	sub	sp, #116	; 0x74
+ 801c884:	4680      	mov	r8, r0
+ 801c886:	460c      	mov	r4, r1
+ 801c888:	4616      	mov	r6, r2
+ 801c88a:	d50f      	bpl.n	801c8ac <_svfiprintf_r+0x34>
+ 801c88c:	690b      	ldr	r3, [r1, #16]
+ 801c88e:	b96b      	cbnz	r3, 801c8ac <_svfiprintf_r+0x34>
+ 801c890:	2140      	movs	r1, #64	; 0x40
+ 801c892:	f7ff ff3d 	bl	801c710 <_malloc_r>
+ 801c896:	6020      	str	r0, [r4, #0]
+ 801c898:	6120      	str	r0, [r4, #16]
+ 801c89a:	b928      	cbnz	r0, 801c8a8 <_svfiprintf_r+0x30>
+ 801c89c:	230c      	movs	r3, #12
+ 801c89e:	f8c8 3000 	str.w	r3, [r8]
+ 801c8a2:	f04f 30ff 	mov.w	r0, #4294967295
+ 801c8a6:	e0c8      	b.n	801ca3a <_svfiprintf_r+0x1c2>
+ 801c8a8:	2340      	movs	r3, #64	; 0x40
+ 801c8aa:	6163      	str	r3, [r4, #20]
+ 801c8ac:	2300      	movs	r3, #0
+ 801c8ae:	9309      	str	r3, [sp, #36]	; 0x24
+ 801c8b0:	2320      	movs	r3, #32
+ 801c8b2:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
+ 801c8b6:	2330      	movs	r3, #48	; 0x30
+ 801c8b8:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
+ 801c8bc:	9503      	str	r5, [sp, #12]
+ 801c8be:	f04f 0b01 	mov.w	fp, #1
+ 801c8c2:	4637      	mov	r7, r6
+ 801c8c4:	463d      	mov	r5, r7
+ 801c8c6:	f815 3b01 	ldrb.w	r3, [r5], #1
+ 801c8ca:	b10b      	cbz	r3, 801c8d0 <_svfiprintf_r+0x58>
+ 801c8cc:	2b25      	cmp	r3, #37	; 0x25
+ 801c8ce:	d13e      	bne.n	801c94e <_svfiprintf_r+0xd6>
+ 801c8d0:	ebb7 0a06 	subs.w	sl, r7, r6
+ 801c8d4:	d00b      	beq.n	801c8ee <_svfiprintf_r+0x76>
+ 801c8d6:	4653      	mov	r3, sl
+ 801c8d8:	4632      	mov	r2, r6
+ 801c8da:	4621      	mov	r1, r4
+ 801c8dc:	4640      	mov	r0, r8
+ 801c8de:	f7ff ff71 	bl	801c7c4 <__ssputs_r>
+ 801c8e2:	3001      	adds	r0, #1
+ 801c8e4:	f000 80a4 	beq.w	801ca30 <_svfiprintf_r+0x1b8>
+ 801c8e8:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 801c8ea:	4453      	add	r3, sl
+ 801c8ec:	9309      	str	r3, [sp, #36]	; 0x24
+ 801c8ee:	783b      	ldrb	r3, [r7, #0]
+ 801c8f0:	2b00      	cmp	r3, #0
+ 801c8f2:	f000 809d 	beq.w	801ca30 <_svfiprintf_r+0x1b8>
+ 801c8f6:	2300      	movs	r3, #0
+ 801c8f8:	f04f 32ff 	mov.w	r2, #4294967295
+ 801c8fc:	e9cd 2305 	strd	r2, r3, [sp, #20]
+ 801c900:	9304      	str	r3, [sp, #16]
+ 801c902:	9307      	str	r3, [sp, #28]
+ 801c904:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
+ 801c908:	931a      	str	r3, [sp, #104]	; 0x68
+ 801c90a:	462f      	mov	r7, r5
+ 801c90c:	2205      	movs	r2, #5
+ 801c90e:	f817 1b01 	ldrb.w	r1, [r7], #1
+ 801c912:	4850      	ldr	r0, [pc, #320]	; (801ca54 <_svfiprintf_r+0x1dc>)
+ 801c914:	f7e3 fc7c 	bl	8000210 <memchr>
+ 801c918:	9b04      	ldr	r3, [sp, #16]
+ 801c91a:	b9d0      	cbnz	r0, 801c952 <_svfiprintf_r+0xda>
+ 801c91c:	06d9      	lsls	r1, r3, #27
+ 801c91e:	bf44      	itt	mi
+ 801c920:	2220      	movmi	r2, #32
+ 801c922:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
+ 801c926:	071a      	lsls	r2, r3, #28
+ 801c928:	bf44      	itt	mi
+ 801c92a:	222b      	movmi	r2, #43	; 0x2b
+ 801c92c:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
+ 801c930:	782a      	ldrb	r2, [r5, #0]
+ 801c932:	2a2a      	cmp	r2, #42	; 0x2a
+ 801c934:	d015      	beq.n	801c962 <_svfiprintf_r+0xea>
+ 801c936:	9a07      	ldr	r2, [sp, #28]
+ 801c938:	462f      	mov	r7, r5
+ 801c93a:	2000      	movs	r0, #0
+ 801c93c:	250a      	movs	r5, #10
+ 801c93e:	4639      	mov	r1, r7
+ 801c940:	f811 3b01 	ldrb.w	r3, [r1], #1
+ 801c944:	3b30      	subs	r3, #48	; 0x30
+ 801c946:	2b09      	cmp	r3, #9
+ 801c948:	d94d      	bls.n	801c9e6 <_svfiprintf_r+0x16e>
+ 801c94a:	b1b8      	cbz	r0, 801c97c <_svfiprintf_r+0x104>
+ 801c94c:	e00f      	b.n	801c96e <_svfiprintf_r+0xf6>
+ 801c94e:	462f      	mov	r7, r5
+ 801c950:	e7b8      	b.n	801c8c4 <_svfiprintf_r+0x4c>
+ 801c952:	4a40      	ldr	r2, [pc, #256]	; (801ca54 <_svfiprintf_r+0x1dc>)
+ 801c954:	1a80      	subs	r0, r0, r2
+ 801c956:	fa0b f000 	lsl.w	r0, fp, r0
+ 801c95a:	4318      	orrs	r0, r3
+ 801c95c:	9004      	str	r0, [sp, #16]
+ 801c95e:	463d      	mov	r5, r7
+ 801c960:	e7d3      	b.n	801c90a <_svfiprintf_r+0x92>
+ 801c962:	9a03      	ldr	r2, [sp, #12]
+ 801c964:	1d11      	adds	r1, r2, #4
+ 801c966:	6812      	ldr	r2, [r2, #0]
+ 801c968:	9103      	str	r1, [sp, #12]
+ 801c96a:	2a00      	cmp	r2, #0
+ 801c96c:	db01      	blt.n	801c972 <_svfiprintf_r+0xfa>
+ 801c96e:	9207      	str	r2, [sp, #28]
+ 801c970:	e004      	b.n	801c97c <_svfiprintf_r+0x104>
+ 801c972:	4252      	negs	r2, r2
+ 801c974:	f043 0302 	orr.w	r3, r3, #2
+ 801c978:	9207      	str	r2, [sp, #28]
+ 801c97a:	9304      	str	r3, [sp, #16]
+ 801c97c:	783b      	ldrb	r3, [r7, #0]
+ 801c97e:	2b2e      	cmp	r3, #46	; 0x2e
+ 801c980:	d10c      	bne.n	801c99c <_svfiprintf_r+0x124>
+ 801c982:	787b      	ldrb	r3, [r7, #1]
+ 801c984:	2b2a      	cmp	r3, #42	; 0x2a
+ 801c986:	d133      	bne.n	801c9f0 <_svfiprintf_r+0x178>
+ 801c988:	9b03      	ldr	r3, [sp, #12]
+ 801c98a:	1d1a      	adds	r2, r3, #4
+ 801c98c:	681b      	ldr	r3, [r3, #0]
+ 801c98e:	9203      	str	r2, [sp, #12]
+ 801c990:	2b00      	cmp	r3, #0
+ 801c992:	bfb8      	it	lt
+ 801c994:	f04f 33ff 	movlt.w	r3, #4294967295
+ 801c998:	3702      	adds	r7, #2
+ 801c99a:	9305      	str	r3, [sp, #20]
+ 801c99c:	4d2e      	ldr	r5, [pc, #184]	; (801ca58 <_svfiprintf_r+0x1e0>)
+ 801c99e:	7839      	ldrb	r1, [r7, #0]
+ 801c9a0:	2203      	movs	r2, #3
+ 801c9a2:	4628      	mov	r0, r5
+ 801c9a4:	f7e3 fc34 	bl	8000210 <memchr>
+ 801c9a8:	b138      	cbz	r0, 801c9ba <_svfiprintf_r+0x142>
+ 801c9aa:	2340      	movs	r3, #64	; 0x40
+ 801c9ac:	1b40      	subs	r0, r0, r5
+ 801c9ae:	fa03 f000 	lsl.w	r0, r3, r0
+ 801c9b2:	9b04      	ldr	r3, [sp, #16]
+ 801c9b4:	4303      	orrs	r3, r0
+ 801c9b6:	3701      	adds	r7, #1
+ 801c9b8:	9304      	str	r3, [sp, #16]
+ 801c9ba:	7839      	ldrb	r1, [r7, #0]
+ 801c9bc:	4827      	ldr	r0, [pc, #156]	; (801ca5c <_svfiprintf_r+0x1e4>)
+ 801c9be:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
+ 801c9c2:	2206      	movs	r2, #6
+ 801c9c4:	1c7e      	adds	r6, r7, #1
+ 801c9c6:	f7e3 fc23 	bl	8000210 <memchr>
+ 801c9ca:	2800      	cmp	r0, #0
+ 801c9cc:	d038      	beq.n	801ca40 <_svfiprintf_r+0x1c8>
+ 801c9ce:	4b24      	ldr	r3, [pc, #144]	; (801ca60 <_svfiprintf_r+0x1e8>)
+ 801c9d0:	bb13      	cbnz	r3, 801ca18 <_svfiprintf_r+0x1a0>
+ 801c9d2:	9b03      	ldr	r3, [sp, #12]
+ 801c9d4:	3307      	adds	r3, #7
+ 801c9d6:	f023 0307 	bic.w	r3, r3, #7
+ 801c9da:	3308      	adds	r3, #8
+ 801c9dc:	9303      	str	r3, [sp, #12]
+ 801c9de:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 801c9e0:	444b      	add	r3, r9
+ 801c9e2:	9309      	str	r3, [sp, #36]	; 0x24
+ 801c9e4:	e76d      	b.n	801c8c2 <_svfiprintf_r+0x4a>
+ 801c9e6:	fb05 3202 	mla	r2, r5, r2, r3
+ 801c9ea:	2001      	movs	r0, #1
+ 801c9ec:	460f      	mov	r7, r1
+ 801c9ee:	e7a6      	b.n	801c93e <_svfiprintf_r+0xc6>
+ 801c9f0:	2300      	movs	r3, #0
+ 801c9f2:	3701      	adds	r7, #1
+ 801c9f4:	9305      	str	r3, [sp, #20]
+ 801c9f6:	4619      	mov	r1, r3
+ 801c9f8:	250a      	movs	r5, #10
+ 801c9fa:	4638      	mov	r0, r7
+ 801c9fc:	f810 2b01 	ldrb.w	r2, [r0], #1
+ 801ca00:	3a30      	subs	r2, #48	; 0x30
+ 801ca02:	2a09      	cmp	r2, #9
+ 801ca04:	d903      	bls.n	801ca0e <_svfiprintf_r+0x196>
+ 801ca06:	2b00      	cmp	r3, #0
+ 801ca08:	d0c8      	beq.n	801c99c <_svfiprintf_r+0x124>
+ 801ca0a:	9105      	str	r1, [sp, #20]
+ 801ca0c:	e7c6      	b.n	801c99c <_svfiprintf_r+0x124>
+ 801ca0e:	fb05 2101 	mla	r1, r5, r1, r2
+ 801ca12:	2301      	movs	r3, #1
+ 801ca14:	4607      	mov	r7, r0
+ 801ca16:	e7f0      	b.n	801c9fa <_svfiprintf_r+0x182>
+ 801ca18:	ab03      	add	r3, sp, #12
+ 801ca1a:	9300      	str	r3, [sp, #0]
+ 801ca1c:	4622      	mov	r2, r4
+ 801ca1e:	4b11      	ldr	r3, [pc, #68]	; (801ca64 <_svfiprintf_r+0x1ec>)
+ 801ca20:	a904      	add	r1, sp, #16
+ 801ca22:	4640      	mov	r0, r8
+ 801ca24:	f3af 8000 	nop.w
+ 801ca28:	f1b0 3fff 	cmp.w	r0, #4294967295
+ 801ca2c:	4681      	mov	r9, r0
+ 801ca2e:	d1d6      	bne.n	801c9de <_svfiprintf_r+0x166>
+ 801ca30:	89a3      	ldrh	r3, [r4, #12]
+ 801ca32:	065b      	lsls	r3, r3, #25
+ 801ca34:	f53f af35 	bmi.w	801c8a2 <_svfiprintf_r+0x2a>
+ 801ca38:	9809      	ldr	r0, [sp, #36]	; 0x24
+ 801ca3a:	b01d      	add	sp, #116	; 0x74
+ 801ca3c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+ 801ca40:	ab03      	add	r3, sp, #12
+ 801ca42:	9300      	str	r3, [sp, #0]
+ 801ca44:	4622      	mov	r2, r4
+ 801ca46:	4b07      	ldr	r3, [pc, #28]	; (801ca64 <_svfiprintf_r+0x1ec>)
+ 801ca48:	a904      	add	r1, sp, #16
+ 801ca4a:	4640      	mov	r0, r8
+ 801ca4c:	f000 f9c2 	bl	801cdd4 <_printf_i>
+ 801ca50:	e7ea      	b.n	801ca28 <_svfiprintf_r+0x1b0>
+ 801ca52:	bf00      	nop
+ 801ca54:	0802261c 	.word	0x0802261c
+ 801ca58:	08022622 	.word	0x08022622
+ 801ca5c:	08022626 	.word	0x08022626
+ 801ca60:	00000000 	.word	0x00000000
+ 801ca64:	0801c7c5 	.word	0x0801c7c5
+
+0801ca68 <__sfputc_r>:
+ 801ca68:	6893      	ldr	r3, [r2, #8]
+ 801ca6a:	3b01      	subs	r3, #1
+ 801ca6c:	2b00      	cmp	r3, #0
+ 801ca6e:	b410      	push	{r4}
+ 801ca70:	6093      	str	r3, [r2, #8]
+ 801ca72:	da08      	bge.n	801ca86 <__sfputc_r+0x1e>
+ 801ca74:	6994      	ldr	r4, [r2, #24]
+ 801ca76:	42a3      	cmp	r3, r4
+ 801ca78:	db01      	blt.n	801ca7e <__sfputc_r+0x16>
+ 801ca7a:	290a      	cmp	r1, #10
+ 801ca7c:	d103      	bne.n	801ca86 <__sfputc_r+0x1e>
+ 801ca7e:	f85d 4b04 	ldr.w	r4, [sp], #4
+ 801ca82:	f000 bb0d 	b.w	801d0a0 <__swbuf_r>
+ 801ca86:	6813      	ldr	r3, [r2, #0]
+ 801ca88:	1c58      	adds	r0, r3, #1
+ 801ca8a:	6010      	str	r0, [r2, #0]
+ 801ca8c:	7019      	strb	r1, [r3, #0]
+ 801ca8e:	4608      	mov	r0, r1
+ 801ca90:	f85d 4b04 	ldr.w	r4, [sp], #4
+ 801ca94:	4770      	bx	lr
+
+0801ca96 <__sfputs_r>:
+ 801ca96:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 801ca98:	4606      	mov	r6, r0
+ 801ca9a:	460f      	mov	r7, r1
+ 801ca9c:	4614      	mov	r4, r2
+ 801ca9e:	18d5      	adds	r5, r2, r3
+ 801caa0:	42ac      	cmp	r4, r5
+ 801caa2:	d101      	bne.n	801caa8 <__sfputs_r+0x12>
+ 801caa4:	2000      	movs	r0, #0
+ 801caa6:	e007      	b.n	801cab8 <__sfputs_r+0x22>
+ 801caa8:	463a      	mov	r2, r7
+ 801caaa:	f814 1b01 	ldrb.w	r1, [r4], #1
+ 801caae:	4630      	mov	r0, r6
+ 801cab0:	f7ff ffda 	bl	801ca68 <__sfputc_r>
+ 801cab4:	1c43      	adds	r3, r0, #1
+ 801cab6:	d1f3      	bne.n	801caa0 <__sfputs_r+0xa>
+ 801cab8:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
+	...
+
+0801cabc <_vfiprintf_r>:
+ 801cabc:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 801cac0:	460c      	mov	r4, r1
+ 801cac2:	b09d      	sub	sp, #116	; 0x74
+ 801cac4:	4617      	mov	r7, r2
+ 801cac6:	461d      	mov	r5, r3
+ 801cac8:	4606      	mov	r6, r0
+ 801caca:	b118      	cbz	r0, 801cad4 <_vfiprintf_r+0x18>
+ 801cacc:	6983      	ldr	r3, [r0, #24]
+ 801cace:	b90b      	cbnz	r3, 801cad4 <_vfiprintf_r+0x18>
+ 801cad0:	f7ff fd3e 	bl	801c550 <__sinit>
+ 801cad4:	4b7c      	ldr	r3, [pc, #496]	; (801ccc8 <_vfiprintf_r+0x20c>)
+ 801cad6:	429c      	cmp	r4, r3
+ 801cad8:	d158      	bne.n	801cb8c <_vfiprintf_r+0xd0>
+ 801cada:	6874      	ldr	r4, [r6, #4]
+ 801cadc:	89a3      	ldrh	r3, [r4, #12]
+ 801cade:	0718      	lsls	r0, r3, #28
+ 801cae0:	d55e      	bpl.n	801cba0 <_vfiprintf_r+0xe4>
+ 801cae2:	6923      	ldr	r3, [r4, #16]
+ 801cae4:	2b00      	cmp	r3, #0
+ 801cae6:	d05b      	beq.n	801cba0 <_vfiprintf_r+0xe4>
+ 801cae8:	2300      	movs	r3, #0
+ 801caea:	9309      	str	r3, [sp, #36]	; 0x24
+ 801caec:	2320      	movs	r3, #32
+ 801caee:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
+ 801caf2:	2330      	movs	r3, #48	; 0x30
+ 801caf4:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
+ 801caf8:	9503      	str	r5, [sp, #12]
+ 801cafa:	f04f 0b01 	mov.w	fp, #1
+ 801cafe:	46b8      	mov	r8, r7
+ 801cb00:	4645      	mov	r5, r8
+ 801cb02:	f815 3b01 	ldrb.w	r3, [r5], #1
+ 801cb06:	b10b      	cbz	r3, 801cb0c <_vfiprintf_r+0x50>
+ 801cb08:	2b25      	cmp	r3, #37	; 0x25
+ 801cb0a:	d154      	bne.n	801cbb6 <_vfiprintf_r+0xfa>
+ 801cb0c:	ebb8 0a07 	subs.w	sl, r8, r7
+ 801cb10:	d00b      	beq.n	801cb2a <_vfiprintf_r+0x6e>
+ 801cb12:	4653      	mov	r3, sl
+ 801cb14:	463a      	mov	r2, r7
+ 801cb16:	4621      	mov	r1, r4
+ 801cb18:	4630      	mov	r0, r6
+ 801cb1a:	f7ff ffbc 	bl	801ca96 <__sfputs_r>
+ 801cb1e:	3001      	adds	r0, #1
+ 801cb20:	f000 80c2 	beq.w	801cca8 <_vfiprintf_r+0x1ec>
+ 801cb24:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 801cb26:	4453      	add	r3, sl
+ 801cb28:	9309      	str	r3, [sp, #36]	; 0x24
+ 801cb2a:	f898 3000 	ldrb.w	r3, [r8]
+ 801cb2e:	2b00      	cmp	r3, #0
+ 801cb30:	f000 80ba 	beq.w	801cca8 <_vfiprintf_r+0x1ec>
+ 801cb34:	2300      	movs	r3, #0
+ 801cb36:	f04f 32ff 	mov.w	r2, #4294967295
+ 801cb3a:	e9cd 2305 	strd	r2, r3, [sp, #20]
+ 801cb3e:	9304      	str	r3, [sp, #16]
+ 801cb40:	9307      	str	r3, [sp, #28]
+ 801cb42:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
+ 801cb46:	931a      	str	r3, [sp, #104]	; 0x68
+ 801cb48:	46a8      	mov	r8, r5
+ 801cb4a:	2205      	movs	r2, #5
+ 801cb4c:	f818 1b01 	ldrb.w	r1, [r8], #1
+ 801cb50:	485e      	ldr	r0, [pc, #376]	; (801cccc <_vfiprintf_r+0x210>)
+ 801cb52:	f7e3 fb5d 	bl	8000210 <memchr>
+ 801cb56:	9b04      	ldr	r3, [sp, #16]
+ 801cb58:	bb78      	cbnz	r0, 801cbba <_vfiprintf_r+0xfe>
+ 801cb5a:	06d9      	lsls	r1, r3, #27
+ 801cb5c:	bf44      	itt	mi
+ 801cb5e:	2220      	movmi	r2, #32
+ 801cb60:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
+ 801cb64:	071a      	lsls	r2, r3, #28
+ 801cb66:	bf44      	itt	mi
+ 801cb68:	222b      	movmi	r2, #43	; 0x2b
+ 801cb6a:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
+ 801cb6e:	782a      	ldrb	r2, [r5, #0]
+ 801cb70:	2a2a      	cmp	r2, #42	; 0x2a
+ 801cb72:	d02a      	beq.n	801cbca <_vfiprintf_r+0x10e>
+ 801cb74:	9a07      	ldr	r2, [sp, #28]
+ 801cb76:	46a8      	mov	r8, r5
+ 801cb78:	2000      	movs	r0, #0
+ 801cb7a:	250a      	movs	r5, #10
+ 801cb7c:	4641      	mov	r1, r8
+ 801cb7e:	f811 3b01 	ldrb.w	r3, [r1], #1
+ 801cb82:	3b30      	subs	r3, #48	; 0x30
+ 801cb84:	2b09      	cmp	r3, #9
+ 801cb86:	d969      	bls.n	801cc5c <_vfiprintf_r+0x1a0>
+ 801cb88:	b360      	cbz	r0, 801cbe4 <_vfiprintf_r+0x128>
+ 801cb8a:	e024      	b.n	801cbd6 <_vfiprintf_r+0x11a>
+ 801cb8c:	4b50      	ldr	r3, [pc, #320]	; (801ccd0 <_vfiprintf_r+0x214>)
+ 801cb8e:	429c      	cmp	r4, r3
+ 801cb90:	d101      	bne.n	801cb96 <_vfiprintf_r+0xda>
+ 801cb92:	68b4      	ldr	r4, [r6, #8]
+ 801cb94:	e7a2      	b.n	801cadc <_vfiprintf_r+0x20>
+ 801cb96:	4b4f      	ldr	r3, [pc, #316]	; (801ccd4 <_vfiprintf_r+0x218>)
+ 801cb98:	429c      	cmp	r4, r3
+ 801cb9a:	bf08      	it	eq
+ 801cb9c:	68f4      	ldreq	r4, [r6, #12]
+ 801cb9e:	e79d      	b.n	801cadc <_vfiprintf_r+0x20>
+ 801cba0:	4621      	mov	r1, r4
+ 801cba2:	4630      	mov	r0, r6
+ 801cba4:	f000 fae0 	bl	801d168 <__swsetup_r>
+ 801cba8:	2800      	cmp	r0, #0
+ 801cbaa:	d09d      	beq.n	801cae8 <_vfiprintf_r+0x2c>
+ 801cbac:	f04f 30ff 	mov.w	r0, #4294967295
+ 801cbb0:	b01d      	add	sp, #116	; 0x74
+ 801cbb2:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+ 801cbb6:	46a8      	mov	r8, r5
+ 801cbb8:	e7a2      	b.n	801cb00 <_vfiprintf_r+0x44>
+ 801cbba:	4a44      	ldr	r2, [pc, #272]	; (801cccc <_vfiprintf_r+0x210>)
+ 801cbbc:	1a80      	subs	r0, r0, r2
+ 801cbbe:	fa0b f000 	lsl.w	r0, fp, r0
+ 801cbc2:	4318      	orrs	r0, r3
+ 801cbc4:	9004      	str	r0, [sp, #16]
+ 801cbc6:	4645      	mov	r5, r8
+ 801cbc8:	e7be      	b.n	801cb48 <_vfiprintf_r+0x8c>
+ 801cbca:	9a03      	ldr	r2, [sp, #12]
+ 801cbcc:	1d11      	adds	r1, r2, #4
+ 801cbce:	6812      	ldr	r2, [r2, #0]
+ 801cbd0:	9103      	str	r1, [sp, #12]
+ 801cbd2:	2a00      	cmp	r2, #0
+ 801cbd4:	db01      	blt.n	801cbda <_vfiprintf_r+0x11e>
+ 801cbd6:	9207      	str	r2, [sp, #28]
+ 801cbd8:	e004      	b.n	801cbe4 <_vfiprintf_r+0x128>
+ 801cbda:	4252      	negs	r2, r2
+ 801cbdc:	f043 0302 	orr.w	r3, r3, #2
+ 801cbe0:	9207      	str	r2, [sp, #28]
+ 801cbe2:	9304      	str	r3, [sp, #16]
+ 801cbe4:	f898 3000 	ldrb.w	r3, [r8]
+ 801cbe8:	2b2e      	cmp	r3, #46	; 0x2e
+ 801cbea:	d10e      	bne.n	801cc0a <_vfiprintf_r+0x14e>
+ 801cbec:	f898 3001 	ldrb.w	r3, [r8, #1]
+ 801cbf0:	2b2a      	cmp	r3, #42	; 0x2a
+ 801cbf2:	d138      	bne.n	801cc66 <_vfiprintf_r+0x1aa>
+ 801cbf4:	9b03      	ldr	r3, [sp, #12]
+ 801cbf6:	1d1a      	adds	r2, r3, #4
+ 801cbf8:	681b      	ldr	r3, [r3, #0]
+ 801cbfa:	9203      	str	r2, [sp, #12]
+ 801cbfc:	2b00      	cmp	r3, #0
+ 801cbfe:	bfb8      	it	lt
+ 801cc00:	f04f 33ff 	movlt.w	r3, #4294967295
+ 801cc04:	f108 0802 	add.w	r8, r8, #2
+ 801cc08:	9305      	str	r3, [sp, #20]
+ 801cc0a:	4d33      	ldr	r5, [pc, #204]	; (801ccd8 <_vfiprintf_r+0x21c>)
+ 801cc0c:	f898 1000 	ldrb.w	r1, [r8]
+ 801cc10:	2203      	movs	r2, #3
+ 801cc12:	4628      	mov	r0, r5
+ 801cc14:	f7e3 fafc 	bl	8000210 <memchr>
+ 801cc18:	b140      	cbz	r0, 801cc2c <_vfiprintf_r+0x170>
+ 801cc1a:	2340      	movs	r3, #64	; 0x40
+ 801cc1c:	1b40      	subs	r0, r0, r5
+ 801cc1e:	fa03 f000 	lsl.w	r0, r3, r0
+ 801cc22:	9b04      	ldr	r3, [sp, #16]
+ 801cc24:	4303      	orrs	r3, r0
+ 801cc26:	f108 0801 	add.w	r8, r8, #1
+ 801cc2a:	9304      	str	r3, [sp, #16]
+ 801cc2c:	f898 1000 	ldrb.w	r1, [r8]
+ 801cc30:	482a      	ldr	r0, [pc, #168]	; (801ccdc <_vfiprintf_r+0x220>)
+ 801cc32:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
+ 801cc36:	2206      	movs	r2, #6
+ 801cc38:	f108 0701 	add.w	r7, r8, #1
+ 801cc3c:	f7e3 fae8 	bl	8000210 <memchr>
+ 801cc40:	2800      	cmp	r0, #0
+ 801cc42:	d037      	beq.n	801ccb4 <_vfiprintf_r+0x1f8>
+ 801cc44:	4b26      	ldr	r3, [pc, #152]	; (801cce0 <_vfiprintf_r+0x224>)
+ 801cc46:	bb1b      	cbnz	r3, 801cc90 <_vfiprintf_r+0x1d4>
+ 801cc48:	9b03      	ldr	r3, [sp, #12]
+ 801cc4a:	3307      	adds	r3, #7
+ 801cc4c:	f023 0307 	bic.w	r3, r3, #7
+ 801cc50:	3308      	adds	r3, #8
+ 801cc52:	9303      	str	r3, [sp, #12]
+ 801cc54:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 801cc56:	444b      	add	r3, r9
+ 801cc58:	9309      	str	r3, [sp, #36]	; 0x24
+ 801cc5a:	e750      	b.n	801cafe <_vfiprintf_r+0x42>
+ 801cc5c:	fb05 3202 	mla	r2, r5, r2, r3
+ 801cc60:	2001      	movs	r0, #1
+ 801cc62:	4688      	mov	r8, r1
+ 801cc64:	e78a      	b.n	801cb7c <_vfiprintf_r+0xc0>
+ 801cc66:	2300      	movs	r3, #0
+ 801cc68:	f108 0801 	add.w	r8, r8, #1
+ 801cc6c:	9305      	str	r3, [sp, #20]
+ 801cc6e:	4619      	mov	r1, r3
+ 801cc70:	250a      	movs	r5, #10
+ 801cc72:	4640      	mov	r0, r8
+ 801cc74:	f810 2b01 	ldrb.w	r2, [r0], #1
+ 801cc78:	3a30      	subs	r2, #48	; 0x30
+ 801cc7a:	2a09      	cmp	r2, #9
+ 801cc7c:	d903      	bls.n	801cc86 <_vfiprintf_r+0x1ca>
+ 801cc7e:	2b00      	cmp	r3, #0
+ 801cc80:	d0c3      	beq.n	801cc0a <_vfiprintf_r+0x14e>
+ 801cc82:	9105      	str	r1, [sp, #20]
+ 801cc84:	e7c1      	b.n	801cc0a <_vfiprintf_r+0x14e>
+ 801cc86:	fb05 2101 	mla	r1, r5, r1, r2
+ 801cc8a:	2301      	movs	r3, #1
+ 801cc8c:	4680      	mov	r8, r0
+ 801cc8e:	e7f0      	b.n	801cc72 <_vfiprintf_r+0x1b6>
+ 801cc90:	ab03      	add	r3, sp, #12
+ 801cc92:	9300      	str	r3, [sp, #0]
+ 801cc94:	4622      	mov	r2, r4
+ 801cc96:	4b13      	ldr	r3, [pc, #76]	; (801cce4 <_vfiprintf_r+0x228>)
+ 801cc98:	a904      	add	r1, sp, #16
+ 801cc9a:	4630      	mov	r0, r6
+ 801cc9c:	f3af 8000 	nop.w
+ 801cca0:	f1b0 3fff 	cmp.w	r0, #4294967295
+ 801cca4:	4681      	mov	r9, r0
+ 801cca6:	d1d5      	bne.n	801cc54 <_vfiprintf_r+0x198>
+ 801cca8:	89a3      	ldrh	r3, [r4, #12]
+ 801ccaa:	065b      	lsls	r3, r3, #25
+ 801ccac:	f53f af7e 	bmi.w	801cbac <_vfiprintf_r+0xf0>
+ 801ccb0:	9809      	ldr	r0, [sp, #36]	; 0x24
+ 801ccb2:	e77d      	b.n	801cbb0 <_vfiprintf_r+0xf4>
+ 801ccb4:	ab03      	add	r3, sp, #12
+ 801ccb6:	9300      	str	r3, [sp, #0]
+ 801ccb8:	4622      	mov	r2, r4
+ 801ccba:	4b0a      	ldr	r3, [pc, #40]	; (801cce4 <_vfiprintf_r+0x228>)
+ 801ccbc:	a904      	add	r1, sp, #16
+ 801ccbe:	4630      	mov	r0, r6
+ 801ccc0:	f000 f888 	bl	801cdd4 <_printf_i>
+ 801ccc4:	e7ec      	b.n	801cca0 <_vfiprintf_r+0x1e4>
+ 801ccc6:	bf00      	nop
+ 801ccc8:	080225dc 	.word	0x080225dc
+ 801cccc:	0802261c 	.word	0x0802261c
+ 801ccd0:	080225fc 	.word	0x080225fc
+ 801ccd4:	080225bc 	.word	0x080225bc
+ 801ccd8:	08022622 	.word	0x08022622
+ 801ccdc:	08022626 	.word	0x08022626
+ 801cce0:	00000000 	.word	0x00000000
+ 801cce4:	0801ca97 	.word	0x0801ca97
+
+0801cce8 <_printf_common>:
+ 801cce8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 801ccec:	4691      	mov	r9, r2
+ 801ccee:	461f      	mov	r7, r3
+ 801ccf0:	688a      	ldr	r2, [r1, #8]
+ 801ccf2:	690b      	ldr	r3, [r1, #16]
+ 801ccf4:	f8dd 8020 	ldr.w	r8, [sp, #32]
+ 801ccf8:	4293      	cmp	r3, r2
+ 801ccfa:	bfb8      	it	lt
+ 801ccfc:	4613      	movlt	r3, r2
+ 801ccfe:	f8c9 3000 	str.w	r3, [r9]
+ 801cd02:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
+ 801cd06:	4606      	mov	r6, r0
+ 801cd08:	460c      	mov	r4, r1
+ 801cd0a:	b112      	cbz	r2, 801cd12 <_printf_common+0x2a>
+ 801cd0c:	3301      	adds	r3, #1
+ 801cd0e:	f8c9 3000 	str.w	r3, [r9]
+ 801cd12:	6823      	ldr	r3, [r4, #0]
+ 801cd14:	0699      	lsls	r1, r3, #26
+ 801cd16:	bf42      	ittt	mi
+ 801cd18:	f8d9 3000 	ldrmi.w	r3, [r9]
+ 801cd1c:	3302      	addmi	r3, #2
+ 801cd1e:	f8c9 3000 	strmi.w	r3, [r9]
+ 801cd22:	6825      	ldr	r5, [r4, #0]
+ 801cd24:	f015 0506 	ands.w	r5, r5, #6
+ 801cd28:	d107      	bne.n	801cd3a <_printf_common+0x52>
+ 801cd2a:	f104 0a19 	add.w	sl, r4, #25
+ 801cd2e:	68e3      	ldr	r3, [r4, #12]
+ 801cd30:	f8d9 2000 	ldr.w	r2, [r9]
+ 801cd34:	1a9b      	subs	r3, r3, r2
+ 801cd36:	42ab      	cmp	r3, r5
+ 801cd38:	dc28      	bgt.n	801cd8c <_printf_common+0xa4>
+ 801cd3a:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
+ 801cd3e:	6822      	ldr	r2, [r4, #0]
+ 801cd40:	3300      	adds	r3, #0
+ 801cd42:	bf18      	it	ne
+ 801cd44:	2301      	movne	r3, #1
+ 801cd46:	0692      	lsls	r2, r2, #26
+ 801cd48:	d42d      	bmi.n	801cda6 <_printf_common+0xbe>
+ 801cd4a:	f104 0243 	add.w	r2, r4, #67	; 0x43
+ 801cd4e:	4639      	mov	r1, r7
+ 801cd50:	4630      	mov	r0, r6
+ 801cd52:	47c0      	blx	r8
+ 801cd54:	3001      	adds	r0, #1
+ 801cd56:	d020      	beq.n	801cd9a <_printf_common+0xb2>
+ 801cd58:	6823      	ldr	r3, [r4, #0]
+ 801cd5a:	68e5      	ldr	r5, [r4, #12]
+ 801cd5c:	f8d9 2000 	ldr.w	r2, [r9]
+ 801cd60:	f003 0306 	and.w	r3, r3, #6
+ 801cd64:	2b04      	cmp	r3, #4
+ 801cd66:	bf08      	it	eq
+ 801cd68:	1aad      	subeq	r5, r5, r2
+ 801cd6a:	68a3      	ldr	r3, [r4, #8]
+ 801cd6c:	6922      	ldr	r2, [r4, #16]
+ 801cd6e:	bf0c      	ite	eq
+ 801cd70:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
+ 801cd74:	2500      	movne	r5, #0
+ 801cd76:	4293      	cmp	r3, r2
+ 801cd78:	bfc4      	itt	gt
+ 801cd7a:	1a9b      	subgt	r3, r3, r2
+ 801cd7c:	18ed      	addgt	r5, r5, r3
+ 801cd7e:	f04f 0900 	mov.w	r9, #0
+ 801cd82:	341a      	adds	r4, #26
+ 801cd84:	454d      	cmp	r5, r9
+ 801cd86:	d11a      	bne.n	801cdbe <_printf_common+0xd6>
+ 801cd88:	2000      	movs	r0, #0
+ 801cd8a:	e008      	b.n	801cd9e <_printf_common+0xb6>
+ 801cd8c:	2301      	movs	r3, #1
+ 801cd8e:	4652      	mov	r2, sl
+ 801cd90:	4639      	mov	r1, r7
+ 801cd92:	4630      	mov	r0, r6
+ 801cd94:	47c0      	blx	r8
+ 801cd96:	3001      	adds	r0, #1
+ 801cd98:	d103      	bne.n	801cda2 <_printf_common+0xba>
+ 801cd9a:	f04f 30ff 	mov.w	r0, #4294967295
+ 801cd9e:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 801cda2:	3501      	adds	r5, #1
+ 801cda4:	e7c3      	b.n	801cd2e <_printf_common+0x46>
+ 801cda6:	18e1      	adds	r1, r4, r3
+ 801cda8:	1c5a      	adds	r2, r3, #1
+ 801cdaa:	2030      	movs	r0, #48	; 0x30
+ 801cdac:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
+ 801cdb0:	4422      	add	r2, r4
+ 801cdb2:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
+ 801cdb6:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
+ 801cdba:	3302      	adds	r3, #2
+ 801cdbc:	e7c5      	b.n	801cd4a <_printf_common+0x62>
+ 801cdbe:	2301      	movs	r3, #1
+ 801cdc0:	4622      	mov	r2, r4
+ 801cdc2:	4639      	mov	r1, r7
+ 801cdc4:	4630      	mov	r0, r6
+ 801cdc6:	47c0      	blx	r8
+ 801cdc8:	3001      	adds	r0, #1
+ 801cdca:	d0e6      	beq.n	801cd9a <_printf_common+0xb2>
+ 801cdcc:	f109 0901 	add.w	r9, r9, #1
+ 801cdd0:	e7d8      	b.n	801cd84 <_printf_common+0x9c>
+	...
+
+0801cdd4 <_printf_i>:
+ 801cdd4:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
+ 801cdd8:	f101 0c43 	add.w	ip, r1, #67	; 0x43
+ 801cddc:	460c      	mov	r4, r1
+ 801cdde:	7e09      	ldrb	r1, [r1, #24]
+ 801cde0:	b085      	sub	sp, #20
+ 801cde2:	296e      	cmp	r1, #110	; 0x6e
+ 801cde4:	4617      	mov	r7, r2
+ 801cde6:	4606      	mov	r6, r0
+ 801cde8:	4698      	mov	r8, r3
+ 801cdea:	9a0c      	ldr	r2, [sp, #48]	; 0x30
+ 801cdec:	f000 80b3 	beq.w	801cf56 <_printf_i+0x182>
+ 801cdf0:	d822      	bhi.n	801ce38 <_printf_i+0x64>
+ 801cdf2:	2963      	cmp	r1, #99	; 0x63
+ 801cdf4:	d036      	beq.n	801ce64 <_printf_i+0x90>
+ 801cdf6:	d80a      	bhi.n	801ce0e <_printf_i+0x3a>
+ 801cdf8:	2900      	cmp	r1, #0
+ 801cdfa:	f000 80b9 	beq.w	801cf70 <_printf_i+0x19c>
+ 801cdfe:	2958      	cmp	r1, #88	; 0x58
+ 801ce00:	f000 8083 	beq.w	801cf0a <_printf_i+0x136>
+ 801ce04:	f104 0542 	add.w	r5, r4, #66	; 0x42
+ 801ce08:	f884 1042 	strb.w	r1, [r4, #66]	; 0x42
+ 801ce0c:	e032      	b.n	801ce74 <_printf_i+0xa0>
+ 801ce0e:	2964      	cmp	r1, #100	; 0x64
+ 801ce10:	d001      	beq.n	801ce16 <_printf_i+0x42>
+ 801ce12:	2969      	cmp	r1, #105	; 0x69
+ 801ce14:	d1f6      	bne.n	801ce04 <_printf_i+0x30>
+ 801ce16:	6820      	ldr	r0, [r4, #0]
+ 801ce18:	6813      	ldr	r3, [r2, #0]
+ 801ce1a:	0605      	lsls	r5, r0, #24
+ 801ce1c:	f103 0104 	add.w	r1, r3, #4
+ 801ce20:	d52a      	bpl.n	801ce78 <_printf_i+0xa4>
+ 801ce22:	681b      	ldr	r3, [r3, #0]
+ 801ce24:	6011      	str	r1, [r2, #0]
+ 801ce26:	2b00      	cmp	r3, #0
+ 801ce28:	da03      	bge.n	801ce32 <_printf_i+0x5e>
+ 801ce2a:	222d      	movs	r2, #45	; 0x2d
+ 801ce2c:	425b      	negs	r3, r3
+ 801ce2e:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
+ 801ce32:	486f      	ldr	r0, [pc, #444]	; (801cff0 <_printf_i+0x21c>)
+ 801ce34:	220a      	movs	r2, #10
+ 801ce36:	e039      	b.n	801ceac <_printf_i+0xd8>
+ 801ce38:	2973      	cmp	r1, #115	; 0x73
+ 801ce3a:	f000 809d 	beq.w	801cf78 <_printf_i+0x1a4>
+ 801ce3e:	d808      	bhi.n	801ce52 <_printf_i+0x7e>
+ 801ce40:	296f      	cmp	r1, #111	; 0x6f
+ 801ce42:	d020      	beq.n	801ce86 <_printf_i+0xb2>
+ 801ce44:	2970      	cmp	r1, #112	; 0x70
+ 801ce46:	d1dd      	bne.n	801ce04 <_printf_i+0x30>
+ 801ce48:	6823      	ldr	r3, [r4, #0]
+ 801ce4a:	f043 0320 	orr.w	r3, r3, #32
+ 801ce4e:	6023      	str	r3, [r4, #0]
+ 801ce50:	e003      	b.n	801ce5a <_printf_i+0x86>
+ 801ce52:	2975      	cmp	r1, #117	; 0x75
+ 801ce54:	d017      	beq.n	801ce86 <_printf_i+0xb2>
+ 801ce56:	2978      	cmp	r1, #120	; 0x78
+ 801ce58:	d1d4      	bne.n	801ce04 <_printf_i+0x30>
+ 801ce5a:	2378      	movs	r3, #120	; 0x78
+ 801ce5c:	f884 3045 	strb.w	r3, [r4, #69]	; 0x45
+ 801ce60:	4864      	ldr	r0, [pc, #400]	; (801cff4 <_printf_i+0x220>)
+ 801ce62:	e055      	b.n	801cf10 <_printf_i+0x13c>
+ 801ce64:	6813      	ldr	r3, [r2, #0]
+ 801ce66:	1d19      	adds	r1, r3, #4
+ 801ce68:	681b      	ldr	r3, [r3, #0]
+ 801ce6a:	6011      	str	r1, [r2, #0]
+ 801ce6c:	f104 0542 	add.w	r5, r4, #66	; 0x42
+ 801ce70:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
+ 801ce74:	2301      	movs	r3, #1
+ 801ce76:	e08c      	b.n	801cf92 <_printf_i+0x1be>
+ 801ce78:	681b      	ldr	r3, [r3, #0]
+ 801ce7a:	6011      	str	r1, [r2, #0]
+ 801ce7c:	f010 0f40 	tst.w	r0, #64	; 0x40
+ 801ce80:	bf18      	it	ne
+ 801ce82:	b21b      	sxthne	r3, r3
+ 801ce84:	e7cf      	b.n	801ce26 <_printf_i+0x52>
+ 801ce86:	6813      	ldr	r3, [r2, #0]
+ 801ce88:	6825      	ldr	r5, [r4, #0]
+ 801ce8a:	1d18      	adds	r0, r3, #4
+ 801ce8c:	6010      	str	r0, [r2, #0]
+ 801ce8e:	0628      	lsls	r0, r5, #24
+ 801ce90:	d501      	bpl.n	801ce96 <_printf_i+0xc2>
+ 801ce92:	681b      	ldr	r3, [r3, #0]
+ 801ce94:	e002      	b.n	801ce9c <_printf_i+0xc8>
+ 801ce96:	0668      	lsls	r0, r5, #25
+ 801ce98:	d5fb      	bpl.n	801ce92 <_printf_i+0xbe>
+ 801ce9a:	881b      	ldrh	r3, [r3, #0]
+ 801ce9c:	4854      	ldr	r0, [pc, #336]	; (801cff0 <_printf_i+0x21c>)
+ 801ce9e:	296f      	cmp	r1, #111	; 0x6f
+ 801cea0:	bf14      	ite	ne
+ 801cea2:	220a      	movne	r2, #10
+ 801cea4:	2208      	moveq	r2, #8
+ 801cea6:	2100      	movs	r1, #0
+ 801cea8:	f884 1043 	strb.w	r1, [r4, #67]	; 0x43
+ 801ceac:	6865      	ldr	r5, [r4, #4]
+ 801ceae:	60a5      	str	r5, [r4, #8]
+ 801ceb0:	2d00      	cmp	r5, #0
+ 801ceb2:	f2c0 8095 	blt.w	801cfe0 <_printf_i+0x20c>
+ 801ceb6:	6821      	ldr	r1, [r4, #0]
+ 801ceb8:	f021 0104 	bic.w	r1, r1, #4
+ 801cebc:	6021      	str	r1, [r4, #0]
+ 801cebe:	2b00      	cmp	r3, #0
+ 801cec0:	d13d      	bne.n	801cf3e <_printf_i+0x16a>
+ 801cec2:	2d00      	cmp	r5, #0
+ 801cec4:	f040 808e 	bne.w	801cfe4 <_printf_i+0x210>
+ 801cec8:	4665      	mov	r5, ip
+ 801ceca:	2a08      	cmp	r2, #8
+ 801cecc:	d10b      	bne.n	801cee6 <_printf_i+0x112>
+ 801cece:	6823      	ldr	r3, [r4, #0]
+ 801ced0:	07db      	lsls	r3, r3, #31
+ 801ced2:	d508      	bpl.n	801cee6 <_printf_i+0x112>
+ 801ced4:	6923      	ldr	r3, [r4, #16]
+ 801ced6:	6862      	ldr	r2, [r4, #4]
+ 801ced8:	429a      	cmp	r2, r3
+ 801ceda:	bfde      	ittt	le
+ 801cedc:	2330      	movle	r3, #48	; 0x30
+ 801cede:	f805 3c01 	strble.w	r3, [r5, #-1]
+ 801cee2:	f105 35ff 	addle.w	r5, r5, #4294967295
+ 801cee6:	ebac 0305 	sub.w	r3, ip, r5
+ 801ceea:	6123      	str	r3, [r4, #16]
+ 801ceec:	f8cd 8000 	str.w	r8, [sp]
+ 801cef0:	463b      	mov	r3, r7
+ 801cef2:	aa03      	add	r2, sp, #12
+ 801cef4:	4621      	mov	r1, r4
+ 801cef6:	4630      	mov	r0, r6
+ 801cef8:	f7ff fef6 	bl	801cce8 <_printf_common>
+ 801cefc:	3001      	adds	r0, #1
+ 801cefe:	d14d      	bne.n	801cf9c <_printf_i+0x1c8>
+ 801cf00:	f04f 30ff 	mov.w	r0, #4294967295
+ 801cf04:	b005      	add	sp, #20
+ 801cf06:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
+ 801cf0a:	4839      	ldr	r0, [pc, #228]	; (801cff0 <_printf_i+0x21c>)
+ 801cf0c:	f884 1045 	strb.w	r1, [r4, #69]	; 0x45
+ 801cf10:	6813      	ldr	r3, [r2, #0]
+ 801cf12:	6821      	ldr	r1, [r4, #0]
+ 801cf14:	1d1d      	adds	r5, r3, #4
+ 801cf16:	681b      	ldr	r3, [r3, #0]
+ 801cf18:	6015      	str	r5, [r2, #0]
+ 801cf1a:	060a      	lsls	r2, r1, #24
+ 801cf1c:	d50b      	bpl.n	801cf36 <_printf_i+0x162>
+ 801cf1e:	07ca      	lsls	r2, r1, #31
+ 801cf20:	bf44      	itt	mi
+ 801cf22:	f041 0120 	orrmi.w	r1, r1, #32
+ 801cf26:	6021      	strmi	r1, [r4, #0]
+ 801cf28:	b91b      	cbnz	r3, 801cf32 <_printf_i+0x15e>
+ 801cf2a:	6822      	ldr	r2, [r4, #0]
+ 801cf2c:	f022 0220 	bic.w	r2, r2, #32
+ 801cf30:	6022      	str	r2, [r4, #0]
+ 801cf32:	2210      	movs	r2, #16
+ 801cf34:	e7b7      	b.n	801cea6 <_printf_i+0xd2>
+ 801cf36:	064d      	lsls	r5, r1, #25
+ 801cf38:	bf48      	it	mi
+ 801cf3a:	b29b      	uxthmi	r3, r3
+ 801cf3c:	e7ef      	b.n	801cf1e <_printf_i+0x14a>
+ 801cf3e:	4665      	mov	r5, ip
+ 801cf40:	fbb3 f1f2 	udiv	r1, r3, r2
+ 801cf44:	fb02 3311 	mls	r3, r2, r1, r3
+ 801cf48:	5cc3      	ldrb	r3, [r0, r3]
+ 801cf4a:	f805 3d01 	strb.w	r3, [r5, #-1]!
+ 801cf4e:	460b      	mov	r3, r1
+ 801cf50:	2900      	cmp	r1, #0
+ 801cf52:	d1f5      	bne.n	801cf40 <_printf_i+0x16c>
+ 801cf54:	e7b9      	b.n	801ceca <_printf_i+0xf6>
+ 801cf56:	6813      	ldr	r3, [r2, #0]
+ 801cf58:	6825      	ldr	r5, [r4, #0]
+ 801cf5a:	6961      	ldr	r1, [r4, #20]
+ 801cf5c:	1d18      	adds	r0, r3, #4
+ 801cf5e:	6010      	str	r0, [r2, #0]
+ 801cf60:	0628      	lsls	r0, r5, #24
+ 801cf62:	681b      	ldr	r3, [r3, #0]
+ 801cf64:	d501      	bpl.n	801cf6a <_printf_i+0x196>
+ 801cf66:	6019      	str	r1, [r3, #0]
+ 801cf68:	e002      	b.n	801cf70 <_printf_i+0x19c>
+ 801cf6a:	066a      	lsls	r2, r5, #25
+ 801cf6c:	d5fb      	bpl.n	801cf66 <_printf_i+0x192>
+ 801cf6e:	8019      	strh	r1, [r3, #0]
+ 801cf70:	2300      	movs	r3, #0
+ 801cf72:	6123      	str	r3, [r4, #16]
+ 801cf74:	4665      	mov	r5, ip
+ 801cf76:	e7b9      	b.n	801ceec <_printf_i+0x118>
+ 801cf78:	6813      	ldr	r3, [r2, #0]
+ 801cf7a:	1d19      	adds	r1, r3, #4
+ 801cf7c:	6011      	str	r1, [r2, #0]
+ 801cf7e:	681d      	ldr	r5, [r3, #0]
+ 801cf80:	6862      	ldr	r2, [r4, #4]
+ 801cf82:	2100      	movs	r1, #0
+ 801cf84:	4628      	mov	r0, r5
+ 801cf86:	f7e3 f943 	bl	8000210 <memchr>
+ 801cf8a:	b108      	cbz	r0, 801cf90 <_printf_i+0x1bc>
+ 801cf8c:	1b40      	subs	r0, r0, r5
+ 801cf8e:	6060      	str	r0, [r4, #4]
+ 801cf90:	6863      	ldr	r3, [r4, #4]
+ 801cf92:	6123      	str	r3, [r4, #16]
+ 801cf94:	2300      	movs	r3, #0
+ 801cf96:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
+ 801cf9a:	e7a7      	b.n	801ceec <_printf_i+0x118>
+ 801cf9c:	6923      	ldr	r3, [r4, #16]
+ 801cf9e:	462a      	mov	r2, r5
+ 801cfa0:	4639      	mov	r1, r7
+ 801cfa2:	4630      	mov	r0, r6
+ 801cfa4:	47c0      	blx	r8
+ 801cfa6:	3001      	adds	r0, #1
+ 801cfa8:	d0aa      	beq.n	801cf00 <_printf_i+0x12c>
+ 801cfaa:	6823      	ldr	r3, [r4, #0]
+ 801cfac:	079b      	lsls	r3, r3, #30
+ 801cfae:	d413      	bmi.n	801cfd8 <_printf_i+0x204>
+ 801cfb0:	68e0      	ldr	r0, [r4, #12]
+ 801cfb2:	9b03      	ldr	r3, [sp, #12]
+ 801cfb4:	4298      	cmp	r0, r3
+ 801cfb6:	bfb8      	it	lt
+ 801cfb8:	4618      	movlt	r0, r3
+ 801cfba:	e7a3      	b.n	801cf04 <_printf_i+0x130>
+ 801cfbc:	2301      	movs	r3, #1
+ 801cfbe:	464a      	mov	r2, r9
+ 801cfc0:	4639      	mov	r1, r7
+ 801cfc2:	4630      	mov	r0, r6
+ 801cfc4:	47c0      	blx	r8
+ 801cfc6:	3001      	adds	r0, #1
+ 801cfc8:	d09a      	beq.n	801cf00 <_printf_i+0x12c>
+ 801cfca:	3501      	adds	r5, #1
+ 801cfcc:	68e3      	ldr	r3, [r4, #12]
+ 801cfce:	9a03      	ldr	r2, [sp, #12]
+ 801cfd0:	1a9b      	subs	r3, r3, r2
+ 801cfd2:	42ab      	cmp	r3, r5
+ 801cfd4:	dcf2      	bgt.n	801cfbc <_printf_i+0x1e8>
+ 801cfd6:	e7eb      	b.n	801cfb0 <_printf_i+0x1dc>
+ 801cfd8:	2500      	movs	r5, #0
+ 801cfda:	f104 0919 	add.w	r9, r4, #25
+ 801cfde:	e7f5      	b.n	801cfcc <_printf_i+0x1f8>
+ 801cfe0:	2b00      	cmp	r3, #0
+ 801cfe2:	d1ac      	bne.n	801cf3e <_printf_i+0x16a>
+ 801cfe4:	7803      	ldrb	r3, [r0, #0]
+ 801cfe6:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
+ 801cfea:	f104 0542 	add.w	r5, r4, #66	; 0x42
+ 801cfee:	e76c      	b.n	801ceca <_printf_i+0xf6>
+ 801cff0:	0802262d 	.word	0x0802262d
+ 801cff4:	0802263e 	.word	0x0802263e
+
+0801cff8 <_sbrk_r>:
+ 801cff8:	b538      	push	{r3, r4, r5, lr}
+ 801cffa:	4c06      	ldr	r4, [pc, #24]	; (801d014 <_sbrk_r+0x1c>)
+ 801cffc:	2300      	movs	r3, #0
+ 801cffe:	4605      	mov	r5, r0
+ 801d000:	4608      	mov	r0, r1
+ 801d002:	6023      	str	r3, [r4, #0]
+ 801d004:	f7e7 fd08 	bl	8004a18 <_sbrk>
+ 801d008:	1c43      	adds	r3, r0, #1
+ 801d00a:	d102      	bne.n	801d012 <_sbrk_r+0x1a>
+ 801d00c:	6823      	ldr	r3, [r4, #0]
+ 801d00e:	b103      	cbz	r3, 801d012 <_sbrk_r+0x1a>
+ 801d010:	602b      	str	r3, [r5, #0]
+ 801d012:	bd38      	pop	{r3, r4, r5, pc}
+ 801d014:	2000f82c 	.word	0x2000f82c
+
+0801d018 <__sread>:
+ 801d018:	b510      	push	{r4, lr}
+ 801d01a:	460c      	mov	r4, r1
+ 801d01c:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
+ 801d020:	f000 fa6e 	bl	801d500 <_read_r>
+ 801d024:	2800      	cmp	r0, #0
+ 801d026:	bfab      	itete	ge
+ 801d028:	6d63      	ldrge	r3, [r4, #84]	; 0x54
+ 801d02a:	89a3      	ldrhlt	r3, [r4, #12]
+ 801d02c:	181b      	addge	r3, r3, r0
+ 801d02e:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
+ 801d032:	bfac      	ite	ge
+ 801d034:	6563      	strge	r3, [r4, #84]	; 0x54
+ 801d036:	81a3      	strhlt	r3, [r4, #12]
+ 801d038:	bd10      	pop	{r4, pc}
+
+0801d03a <__swrite>:
+ 801d03a:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
+ 801d03e:	461f      	mov	r7, r3
+ 801d040:	898b      	ldrh	r3, [r1, #12]
+ 801d042:	05db      	lsls	r3, r3, #23
+ 801d044:	4605      	mov	r5, r0
+ 801d046:	460c      	mov	r4, r1
+ 801d048:	4616      	mov	r6, r2
+ 801d04a:	d505      	bpl.n	801d058 <__swrite+0x1e>
+ 801d04c:	2302      	movs	r3, #2
+ 801d04e:	2200      	movs	r2, #0
+ 801d050:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
+ 801d054:	f000 f9b6 	bl	801d3c4 <_lseek_r>
+ 801d058:	89a3      	ldrh	r3, [r4, #12]
+ 801d05a:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
+ 801d05e:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
+ 801d062:	81a3      	strh	r3, [r4, #12]
+ 801d064:	4632      	mov	r2, r6
+ 801d066:	463b      	mov	r3, r7
+ 801d068:	4628      	mov	r0, r5
+ 801d06a:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
+ 801d06e:	f000 b869 	b.w	801d144 <_write_r>
+
+0801d072 <__sseek>:
+ 801d072:	b510      	push	{r4, lr}
+ 801d074:	460c      	mov	r4, r1
+ 801d076:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
+ 801d07a:	f000 f9a3 	bl	801d3c4 <_lseek_r>
+ 801d07e:	1c43      	adds	r3, r0, #1
+ 801d080:	89a3      	ldrh	r3, [r4, #12]
+ 801d082:	bf15      	itete	ne
+ 801d084:	6560      	strne	r0, [r4, #84]	; 0x54
+ 801d086:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
+ 801d08a:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
+ 801d08e:	81a3      	strheq	r3, [r4, #12]
+ 801d090:	bf18      	it	ne
+ 801d092:	81a3      	strhne	r3, [r4, #12]
+ 801d094:	bd10      	pop	{r4, pc}
+
+0801d096 <__sclose>:
+ 801d096:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
+ 801d09a:	f000 b8d3 	b.w	801d244 <_close_r>
+	...
+
+0801d0a0 <__swbuf_r>:
+ 801d0a0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 801d0a2:	460e      	mov	r6, r1
+ 801d0a4:	4614      	mov	r4, r2
+ 801d0a6:	4605      	mov	r5, r0
+ 801d0a8:	b118      	cbz	r0, 801d0b2 <__swbuf_r+0x12>
+ 801d0aa:	6983      	ldr	r3, [r0, #24]
+ 801d0ac:	b90b      	cbnz	r3, 801d0b2 <__swbuf_r+0x12>
+ 801d0ae:	f7ff fa4f 	bl	801c550 <__sinit>
+ 801d0b2:	4b21      	ldr	r3, [pc, #132]	; (801d138 <__swbuf_r+0x98>)
+ 801d0b4:	429c      	cmp	r4, r3
+ 801d0b6:	d12a      	bne.n	801d10e <__swbuf_r+0x6e>
+ 801d0b8:	686c      	ldr	r4, [r5, #4]
+ 801d0ba:	69a3      	ldr	r3, [r4, #24]
+ 801d0bc:	60a3      	str	r3, [r4, #8]
+ 801d0be:	89a3      	ldrh	r3, [r4, #12]
+ 801d0c0:	071a      	lsls	r2, r3, #28
+ 801d0c2:	d52e      	bpl.n	801d122 <__swbuf_r+0x82>
+ 801d0c4:	6923      	ldr	r3, [r4, #16]
+ 801d0c6:	b363      	cbz	r3, 801d122 <__swbuf_r+0x82>
+ 801d0c8:	6923      	ldr	r3, [r4, #16]
+ 801d0ca:	6820      	ldr	r0, [r4, #0]
+ 801d0cc:	1ac0      	subs	r0, r0, r3
+ 801d0ce:	6963      	ldr	r3, [r4, #20]
+ 801d0d0:	b2f6      	uxtb	r6, r6
+ 801d0d2:	4283      	cmp	r3, r0
+ 801d0d4:	4637      	mov	r7, r6
+ 801d0d6:	dc04      	bgt.n	801d0e2 <__swbuf_r+0x42>
+ 801d0d8:	4621      	mov	r1, r4
+ 801d0da:	4628      	mov	r0, r5
+ 801d0dc:	f000 f948 	bl	801d370 <_fflush_r>
+ 801d0e0:	bb28      	cbnz	r0, 801d12e <__swbuf_r+0x8e>
+ 801d0e2:	68a3      	ldr	r3, [r4, #8]
+ 801d0e4:	3b01      	subs	r3, #1
+ 801d0e6:	60a3      	str	r3, [r4, #8]
+ 801d0e8:	6823      	ldr	r3, [r4, #0]
+ 801d0ea:	1c5a      	adds	r2, r3, #1
+ 801d0ec:	6022      	str	r2, [r4, #0]
+ 801d0ee:	701e      	strb	r6, [r3, #0]
+ 801d0f0:	6963      	ldr	r3, [r4, #20]
+ 801d0f2:	3001      	adds	r0, #1
+ 801d0f4:	4283      	cmp	r3, r0
+ 801d0f6:	d004      	beq.n	801d102 <__swbuf_r+0x62>
+ 801d0f8:	89a3      	ldrh	r3, [r4, #12]
+ 801d0fa:	07db      	lsls	r3, r3, #31
+ 801d0fc:	d519      	bpl.n	801d132 <__swbuf_r+0x92>
+ 801d0fe:	2e0a      	cmp	r6, #10
+ 801d100:	d117      	bne.n	801d132 <__swbuf_r+0x92>
+ 801d102:	4621      	mov	r1, r4
+ 801d104:	4628      	mov	r0, r5
+ 801d106:	f000 f933 	bl	801d370 <_fflush_r>
+ 801d10a:	b190      	cbz	r0, 801d132 <__swbuf_r+0x92>
+ 801d10c:	e00f      	b.n	801d12e <__swbuf_r+0x8e>
+ 801d10e:	4b0b      	ldr	r3, [pc, #44]	; (801d13c <__swbuf_r+0x9c>)
+ 801d110:	429c      	cmp	r4, r3
+ 801d112:	d101      	bne.n	801d118 <__swbuf_r+0x78>
+ 801d114:	68ac      	ldr	r4, [r5, #8]
+ 801d116:	e7d0      	b.n	801d0ba <__swbuf_r+0x1a>
+ 801d118:	4b09      	ldr	r3, [pc, #36]	; (801d140 <__swbuf_r+0xa0>)
+ 801d11a:	429c      	cmp	r4, r3
+ 801d11c:	bf08      	it	eq
+ 801d11e:	68ec      	ldreq	r4, [r5, #12]
+ 801d120:	e7cb      	b.n	801d0ba <__swbuf_r+0x1a>
+ 801d122:	4621      	mov	r1, r4
+ 801d124:	4628      	mov	r0, r5
+ 801d126:	f000 f81f 	bl	801d168 <__swsetup_r>
+ 801d12a:	2800      	cmp	r0, #0
+ 801d12c:	d0cc      	beq.n	801d0c8 <__swbuf_r+0x28>
+ 801d12e:	f04f 37ff 	mov.w	r7, #4294967295
+ 801d132:	4638      	mov	r0, r7
+ 801d134:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
+ 801d136:	bf00      	nop
+ 801d138:	080225dc 	.word	0x080225dc
+ 801d13c:	080225fc 	.word	0x080225fc
+ 801d140:	080225bc 	.word	0x080225bc
+
+0801d144 <_write_r>:
+ 801d144:	b538      	push	{r3, r4, r5, lr}
+ 801d146:	4c07      	ldr	r4, [pc, #28]	; (801d164 <_write_r+0x20>)
+ 801d148:	4605      	mov	r5, r0
+ 801d14a:	4608      	mov	r0, r1
+ 801d14c:	4611      	mov	r1, r2
+ 801d14e:	2200      	movs	r2, #0
+ 801d150:	6022      	str	r2, [r4, #0]
+ 801d152:	461a      	mov	r2, r3
+ 801d154:	f7e7 fc0f 	bl	8004976 <_write>
+ 801d158:	1c43      	adds	r3, r0, #1
+ 801d15a:	d102      	bne.n	801d162 <_write_r+0x1e>
+ 801d15c:	6823      	ldr	r3, [r4, #0]
+ 801d15e:	b103      	cbz	r3, 801d162 <_write_r+0x1e>
+ 801d160:	602b      	str	r3, [r5, #0]
+ 801d162:	bd38      	pop	{r3, r4, r5, pc}
+ 801d164:	2000f82c 	.word	0x2000f82c
+
+0801d168 <__swsetup_r>:
+ 801d168:	4b32      	ldr	r3, [pc, #200]	; (801d234 <__swsetup_r+0xcc>)
+ 801d16a:	b570      	push	{r4, r5, r6, lr}
+ 801d16c:	681d      	ldr	r5, [r3, #0]
+ 801d16e:	4606      	mov	r6, r0
+ 801d170:	460c      	mov	r4, r1
+ 801d172:	b125      	cbz	r5, 801d17e <__swsetup_r+0x16>
+ 801d174:	69ab      	ldr	r3, [r5, #24]
+ 801d176:	b913      	cbnz	r3, 801d17e <__swsetup_r+0x16>
+ 801d178:	4628      	mov	r0, r5
+ 801d17a:	f7ff f9e9 	bl	801c550 <__sinit>
+ 801d17e:	4b2e      	ldr	r3, [pc, #184]	; (801d238 <__swsetup_r+0xd0>)
+ 801d180:	429c      	cmp	r4, r3
+ 801d182:	d10f      	bne.n	801d1a4 <__swsetup_r+0x3c>
+ 801d184:	686c      	ldr	r4, [r5, #4]
+ 801d186:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
+ 801d18a:	b29a      	uxth	r2, r3
+ 801d18c:	0715      	lsls	r5, r2, #28
+ 801d18e:	d42c      	bmi.n	801d1ea <__swsetup_r+0x82>
+ 801d190:	06d0      	lsls	r0, r2, #27
+ 801d192:	d411      	bmi.n	801d1b8 <__swsetup_r+0x50>
+ 801d194:	2209      	movs	r2, #9
+ 801d196:	6032      	str	r2, [r6, #0]
+ 801d198:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 801d19c:	81a3      	strh	r3, [r4, #12]
+ 801d19e:	f04f 30ff 	mov.w	r0, #4294967295
+ 801d1a2:	e03e      	b.n	801d222 <__swsetup_r+0xba>
+ 801d1a4:	4b25      	ldr	r3, [pc, #148]	; (801d23c <__swsetup_r+0xd4>)
+ 801d1a6:	429c      	cmp	r4, r3
+ 801d1a8:	d101      	bne.n	801d1ae <__swsetup_r+0x46>
+ 801d1aa:	68ac      	ldr	r4, [r5, #8]
+ 801d1ac:	e7eb      	b.n	801d186 <__swsetup_r+0x1e>
+ 801d1ae:	4b24      	ldr	r3, [pc, #144]	; (801d240 <__swsetup_r+0xd8>)
+ 801d1b0:	429c      	cmp	r4, r3
+ 801d1b2:	bf08      	it	eq
+ 801d1b4:	68ec      	ldreq	r4, [r5, #12]
+ 801d1b6:	e7e6      	b.n	801d186 <__swsetup_r+0x1e>
+ 801d1b8:	0751      	lsls	r1, r2, #29
+ 801d1ba:	d512      	bpl.n	801d1e2 <__swsetup_r+0x7a>
+ 801d1bc:	6b61      	ldr	r1, [r4, #52]	; 0x34
+ 801d1be:	b141      	cbz	r1, 801d1d2 <__swsetup_r+0x6a>
+ 801d1c0:	f104 0344 	add.w	r3, r4, #68	; 0x44
+ 801d1c4:	4299      	cmp	r1, r3
+ 801d1c6:	d002      	beq.n	801d1ce <__swsetup_r+0x66>
+ 801d1c8:	4630      	mov	r0, r6
+ 801d1ca:	f7ff fa53 	bl	801c674 <_free_r>
+ 801d1ce:	2300      	movs	r3, #0
+ 801d1d0:	6363      	str	r3, [r4, #52]	; 0x34
+ 801d1d2:	89a3      	ldrh	r3, [r4, #12]
+ 801d1d4:	f023 0324 	bic.w	r3, r3, #36	; 0x24
+ 801d1d8:	81a3      	strh	r3, [r4, #12]
+ 801d1da:	2300      	movs	r3, #0
+ 801d1dc:	6063      	str	r3, [r4, #4]
+ 801d1de:	6923      	ldr	r3, [r4, #16]
+ 801d1e0:	6023      	str	r3, [r4, #0]
+ 801d1e2:	89a3      	ldrh	r3, [r4, #12]
+ 801d1e4:	f043 0308 	orr.w	r3, r3, #8
+ 801d1e8:	81a3      	strh	r3, [r4, #12]
+ 801d1ea:	6923      	ldr	r3, [r4, #16]
+ 801d1ec:	b94b      	cbnz	r3, 801d202 <__swsetup_r+0x9a>
+ 801d1ee:	89a3      	ldrh	r3, [r4, #12]
+ 801d1f0:	f403 7320 	and.w	r3, r3, #640	; 0x280
+ 801d1f4:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
+ 801d1f8:	d003      	beq.n	801d202 <__swsetup_r+0x9a>
+ 801d1fa:	4621      	mov	r1, r4
+ 801d1fc:	4630      	mov	r0, r6
+ 801d1fe:	f000 f917 	bl	801d430 <__smakebuf_r>
+ 801d202:	89a2      	ldrh	r2, [r4, #12]
+ 801d204:	f012 0301 	ands.w	r3, r2, #1
+ 801d208:	d00c      	beq.n	801d224 <__swsetup_r+0xbc>
+ 801d20a:	2300      	movs	r3, #0
+ 801d20c:	60a3      	str	r3, [r4, #8]
+ 801d20e:	6963      	ldr	r3, [r4, #20]
+ 801d210:	425b      	negs	r3, r3
+ 801d212:	61a3      	str	r3, [r4, #24]
+ 801d214:	6923      	ldr	r3, [r4, #16]
+ 801d216:	b953      	cbnz	r3, 801d22e <__swsetup_r+0xc6>
+ 801d218:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
+ 801d21c:	f013 0080 	ands.w	r0, r3, #128	; 0x80
+ 801d220:	d1ba      	bne.n	801d198 <__swsetup_r+0x30>
+ 801d222:	bd70      	pop	{r4, r5, r6, pc}
+ 801d224:	0792      	lsls	r2, r2, #30
+ 801d226:	bf58      	it	pl
+ 801d228:	6963      	ldrpl	r3, [r4, #20]
+ 801d22a:	60a3      	str	r3, [r4, #8]
+ 801d22c:	e7f2      	b.n	801d214 <__swsetup_r+0xac>
+ 801d22e:	2000      	movs	r0, #0
+ 801d230:	e7f7      	b.n	801d222 <__swsetup_r+0xba>
+ 801d232:	bf00      	nop
+ 801d234:	20000070 	.word	0x20000070
+ 801d238:	080225dc 	.word	0x080225dc
+ 801d23c:	080225fc 	.word	0x080225fc
+ 801d240:	080225bc 	.word	0x080225bc
+
+0801d244 <_close_r>:
+ 801d244:	b538      	push	{r3, r4, r5, lr}
+ 801d246:	4c06      	ldr	r4, [pc, #24]	; (801d260 <_close_r+0x1c>)
+ 801d248:	2300      	movs	r3, #0
+ 801d24a:	4605      	mov	r5, r0
+ 801d24c:	4608      	mov	r0, r1
+ 801d24e:	6023      	str	r3, [r4, #0]
+ 801d250:	f7e7 fbad 	bl	80049ae <_close>
+ 801d254:	1c43      	adds	r3, r0, #1
+ 801d256:	d102      	bne.n	801d25e <_close_r+0x1a>
+ 801d258:	6823      	ldr	r3, [r4, #0]
+ 801d25a:	b103      	cbz	r3, 801d25e <_close_r+0x1a>
+ 801d25c:	602b      	str	r3, [r5, #0]
+ 801d25e:	bd38      	pop	{r3, r4, r5, pc}
+ 801d260:	2000f82c 	.word	0x2000f82c
+
+0801d264 <__sflush_r>:
+ 801d264:	898a      	ldrh	r2, [r1, #12]
+ 801d266:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
+ 801d26a:	4605      	mov	r5, r0
+ 801d26c:	0710      	lsls	r0, r2, #28
+ 801d26e:	460c      	mov	r4, r1
+ 801d270:	d458      	bmi.n	801d324 <__sflush_r+0xc0>
+ 801d272:	684b      	ldr	r3, [r1, #4]
+ 801d274:	2b00      	cmp	r3, #0
+ 801d276:	dc05      	bgt.n	801d284 <__sflush_r+0x20>
+ 801d278:	6c0b      	ldr	r3, [r1, #64]	; 0x40
+ 801d27a:	2b00      	cmp	r3, #0
+ 801d27c:	dc02      	bgt.n	801d284 <__sflush_r+0x20>
+ 801d27e:	2000      	movs	r0, #0
+ 801d280:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
+ 801d284:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
+ 801d286:	2e00      	cmp	r6, #0
+ 801d288:	d0f9      	beq.n	801d27e <__sflush_r+0x1a>
+ 801d28a:	2300      	movs	r3, #0
+ 801d28c:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
+ 801d290:	682f      	ldr	r7, [r5, #0]
+ 801d292:	6a21      	ldr	r1, [r4, #32]
+ 801d294:	602b      	str	r3, [r5, #0]
+ 801d296:	d032      	beq.n	801d2fe <__sflush_r+0x9a>
+ 801d298:	6d60      	ldr	r0, [r4, #84]	; 0x54
+ 801d29a:	89a3      	ldrh	r3, [r4, #12]
+ 801d29c:	075a      	lsls	r2, r3, #29
+ 801d29e:	d505      	bpl.n	801d2ac <__sflush_r+0x48>
+ 801d2a0:	6863      	ldr	r3, [r4, #4]
+ 801d2a2:	1ac0      	subs	r0, r0, r3
+ 801d2a4:	6b63      	ldr	r3, [r4, #52]	; 0x34
+ 801d2a6:	b10b      	cbz	r3, 801d2ac <__sflush_r+0x48>
+ 801d2a8:	6c23      	ldr	r3, [r4, #64]	; 0x40
+ 801d2aa:	1ac0      	subs	r0, r0, r3
+ 801d2ac:	2300      	movs	r3, #0
+ 801d2ae:	4602      	mov	r2, r0
+ 801d2b0:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
+ 801d2b2:	6a21      	ldr	r1, [r4, #32]
+ 801d2b4:	4628      	mov	r0, r5
+ 801d2b6:	47b0      	blx	r6
+ 801d2b8:	1c43      	adds	r3, r0, #1
+ 801d2ba:	89a3      	ldrh	r3, [r4, #12]
+ 801d2bc:	d106      	bne.n	801d2cc <__sflush_r+0x68>
+ 801d2be:	6829      	ldr	r1, [r5, #0]
+ 801d2c0:	291d      	cmp	r1, #29
+ 801d2c2:	d848      	bhi.n	801d356 <__sflush_r+0xf2>
+ 801d2c4:	4a29      	ldr	r2, [pc, #164]	; (801d36c <__sflush_r+0x108>)
+ 801d2c6:	40ca      	lsrs	r2, r1
+ 801d2c8:	07d6      	lsls	r6, r2, #31
+ 801d2ca:	d544      	bpl.n	801d356 <__sflush_r+0xf2>
+ 801d2cc:	2200      	movs	r2, #0
+ 801d2ce:	6062      	str	r2, [r4, #4]
+ 801d2d0:	04d9      	lsls	r1, r3, #19
+ 801d2d2:	6922      	ldr	r2, [r4, #16]
+ 801d2d4:	6022      	str	r2, [r4, #0]
+ 801d2d6:	d504      	bpl.n	801d2e2 <__sflush_r+0x7e>
+ 801d2d8:	1c42      	adds	r2, r0, #1
+ 801d2da:	d101      	bne.n	801d2e0 <__sflush_r+0x7c>
+ 801d2dc:	682b      	ldr	r3, [r5, #0]
+ 801d2de:	b903      	cbnz	r3, 801d2e2 <__sflush_r+0x7e>
+ 801d2e0:	6560      	str	r0, [r4, #84]	; 0x54
+ 801d2e2:	6b61      	ldr	r1, [r4, #52]	; 0x34
+ 801d2e4:	602f      	str	r7, [r5, #0]
+ 801d2e6:	2900      	cmp	r1, #0
+ 801d2e8:	d0c9      	beq.n	801d27e <__sflush_r+0x1a>
+ 801d2ea:	f104 0344 	add.w	r3, r4, #68	; 0x44
+ 801d2ee:	4299      	cmp	r1, r3
+ 801d2f0:	d002      	beq.n	801d2f8 <__sflush_r+0x94>
+ 801d2f2:	4628      	mov	r0, r5
+ 801d2f4:	f7ff f9be 	bl	801c674 <_free_r>
+ 801d2f8:	2000      	movs	r0, #0
+ 801d2fa:	6360      	str	r0, [r4, #52]	; 0x34
+ 801d2fc:	e7c0      	b.n	801d280 <__sflush_r+0x1c>
+ 801d2fe:	2301      	movs	r3, #1
+ 801d300:	4628      	mov	r0, r5
+ 801d302:	47b0      	blx	r6
+ 801d304:	1c41      	adds	r1, r0, #1
+ 801d306:	d1c8      	bne.n	801d29a <__sflush_r+0x36>
+ 801d308:	682b      	ldr	r3, [r5, #0]
+ 801d30a:	2b00      	cmp	r3, #0
+ 801d30c:	d0c5      	beq.n	801d29a <__sflush_r+0x36>
+ 801d30e:	2b1d      	cmp	r3, #29
+ 801d310:	d001      	beq.n	801d316 <__sflush_r+0xb2>
+ 801d312:	2b16      	cmp	r3, #22
+ 801d314:	d101      	bne.n	801d31a <__sflush_r+0xb6>
+ 801d316:	602f      	str	r7, [r5, #0]
+ 801d318:	e7b1      	b.n	801d27e <__sflush_r+0x1a>
+ 801d31a:	89a3      	ldrh	r3, [r4, #12]
+ 801d31c:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 801d320:	81a3      	strh	r3, [r4, #12]
+ 801d322:	e7ad      	b.n	801d280 <__sflush_r+0x1c>
+ 801d324:	690f      	ldr	r7, [r1, #16]
+ 801d326:	2f00      	cmp	r7, #0
+ 801d328:	d0a9      	beq.n	801d27e <__sflush_r+0x1a>
+ 801d32a:	0793      	lsls	r3, r2, #30
+ 801d32c:	680e      	ldr	r6, [r1, #0]
+ 801d32e:	bf08      	it	eq
+ 801d330:	694b      	ldreq	r3, [r1, #20]
+ 801d332:	600f      	str	r7, [r1, #0]
+ 801d334:	bf18      	it	ne
+ 801d336:	2300      	movne	r3, #0
+ 801d338:	eba6 0807 	sub.w	r8, r6, r7
+ 801d33c:	608b      	str	r3, [r1, #8]
+ 801d33e:	f1b8 0f00 	cmp.w	r8, #0
+ 801d342:	dd9c      	ble.n	801d27e <__sflush_r+0x1a>
+ 801d344:	4643      	mov	r3, r8
+ 801d346:	463a      	mov	r2, r7
+ 801d348:	6a21      	ldr	r1, [r4, #32]
+ 801d34a:	6aa6      	ldr	r6, [r4, #40]	; 0x28
+ 801d34c:	4628      	mov	r0, r5
+ 801d34e:	47b0      	blx	r6
+ 801d350:	2800      	cmp	r0, #0
+ 801d352:	dc06      	bgt.n	801d362 <__sflush_r+0xfe>
+ 801d354:	89a3      	ldrh	r3, [r4, #12]
+ 801d356:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 801d35a:	81a3      	strh	r3, [r4, #12]
+ 801d35c:	f04f 30ff 	mov.w	r0, #4294967295
+ 801d360:	e78e      	b.n	801d280 <__sflush_r+0x1c>
+ 801d362:	4407      	add	r7, r0
+ 801d364:	eba8 0800 	sub.w	r8, r8, r0
+ 801d368:	e7e9      	b.n	801d33e <__sflush_r+0xda>
+ 801d36a:	bf00      	nop
+ 801d36c:	20400001 	.word	0x20400001
+
+0801d370 <_fflush_r>:
+ 801d370:	b538      	push	{r3, r4, r5, lr}
+ 801d372:	690b      	ldr	r3, [r1, #16]
+ 801d374:	4605      	mov	r5, r0
+ 801d376:	460c      	mov	r4, r1
+ 801d378:	b1db      	cbz	r3, 801d3b2 <_fflush_r+0x42>
+ 801d37a:	b118      	cbz	r0, 801d384 <_fflush_r+0x14>
+ 801d37c:	6983      	ldr	r3, [r0, #24]
+ 801d37e:	b90b      	cbnz	r3, 801d384 <_fflush_r+0x14>
+ 801d380:	f7ff f8e6 	bl	801c550 <__sinit>
+ 801d384:	4b0c      	ldr	r3, [pc, #48]	; (801d3b8 <_fflush_r+0x48>)
+ 801d386:	429c      	cmp	r4, r3
+ 801d388:	d109      	bne.n	801d39e <_fflush_r+0x2e>
+ 801d38a:	686c      	ldr	r4, [r5, #4]
+ 801d38c:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
+ 801d390:	b17b      	cbz	r3, 801d3b2 <_fflush_r+0x42>
+ 801d392:	4621      	mov	r1, r4
+ 801d394:	4628      	mov	r0, r5
+ 801d396:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
+ 801d39a:	f7ff bf63 	b.w	801d264 <__sflush_r>
+ 801d39e:	4b07      	ldr	r3, [pc, #28]	; (801d3bc <_fflush_r+0x4c>)
+ 801d3a0:	429c      	cmp	r4, r3
+ 801d3a2:	d101      	bne.n	801d3a8 <_fflush_r+0x38>
+ 801d3a4:	68ac      	ldr	r4, [r5, #8]
+ 801d3a6:	e7f1      	b.n	801d38c <_fflush_r+0x1c>
+ 801d3a8:	4b05      	ldr	r3, [pc, #20]	; (801d3c0 <_fflush_r+0x50>)
+ 801d3aa:	429c      	cmp	r4, r3
+ 801d3ac:	bf08      	it	eq
+ 801d3ae:	68ec      	ldreq	r4, [r5, #12]
+ 801d3b0:	e7ec      	b.n	801d38c <_fflush_r+0x1c>
+ 801d3b2:	2000      	movs	r0, #0
+ 801d3b4:	bd38      	pop	{r3, r4, r5, pc}
+ 801d3b6:	bf00      	nop
+ 801d3b8:	080225dc 	.word	0x080225dc
+ 801d3bc:	080225fc 	.word	0x080225fc
+ 801d3c0:	080225bc 	.word	0x080225bc
+
+0801d3c4 <_lseek_r>:
+ 801d3c4:	b538      	push	{r3, r4, r5, lr}
+ 801d3c6:	4c07      	ldr	r4, [pc, #28]	; (801d3e4 <_lseek_r+0x20>)
+ 801d3c8:	4605      	mov	r5, r0
+ 801d3ca:	4608      	mov	r0, r1
+ 801d3cc:	4611      	mov	r1, r2
+ 801d3ce:	2200      	movs	r2, #0
+ 801d3d0:	6022      	str	r2, [r4, #0]
+ 801d3d2:	461a      	mov	r2, r3
+ 801d3d4:	f7e7 fb12 	bl	80049fc <_lseek>
+ 801d3d8:	1c43      	adds	r3, r0, #1
+ 801d3da:	d102      	bne.n	801d3e2 <_lseek_r+0x1e>
+ 801d3dc:	6823      	ldr	r3, [r4, #0]
+ 801d3de:	b103      	cbz	r3, 801d3e2 <_lseek_r+0x1e>
+ 801d3e0:	602b      	str	r3, [r5, #0]
+ 801d3e2:	bd38      	pop	{r3, r4, r5, pc}
+ 801d3e4:	2000f82c 	.word	0x2000f82c
+
+0801d3e8 <__swhatbuf_r>:
+ 801d3e8:	b570      	push	{r4, r5, r6, lr}
+ 801d3ea:	460e      	mov	r6, r1
+ 801d3ec:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
+ 801d3f0:	2900      	cmp	r1, #0
+ 801d3f2:	b096      	sub	sp, #88	; 0x58
+ 801d3f4:	4614      	mov	r4, r2
+ 801d3f6:	461d      	mov	r5, r3
+ 801d3f8:	da07      	bge.n	801d40a <__swhatbuf_r+0x22>
+ 801d3fa:	2300      	movs	r3, #0
+ 801d3fc:	602b      	str	r3, [r5, #0]
+ 801d3fe:	89b3      	ldrh	r3, [r6, #12]
+ 801d400:	061a      	lsls	r2, r3, #24
+ 801d402:	d410      	bmi.n	801d426 <__swhatbuf_r+0x3e>
+ 801d404:	f44f 6380 	mov.w	r3, #1024	; 0x400
+ 801d408:	e00e      	b.n	801d428 <__swhatbuf_r+0x40>
+ 801d40a:	466a      	mov	r2, sp
+ 801d40c:	f000 f88a 	bl	801d524 <_fstat_r>
+ 801d410:	2800      	cmp	r0, #0
+ 801d412:	dbf2      	blt.n	801d3fa <__swhatbuf_r+0x12>
+ 801d414:	9a01      	ldr	r2, [sp, #4]
+ 801d416:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
+ 801d41a:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
+ 801d41e:	425a      	negs	r2, r3
+ 801d420:	415a      	adcs	r2, r3
+ 801d422:	602a      	str	r2, [r5, #0]
+ 801d424:	e7ee      	b.n	801d404 <__swhatbuf_r+0x1c>
+ 801d426:	2340      	movs	r3, #64	; 0x40
+ 801d428:	2000      	movs	r0, #0
+ 801d42a:	6023      	str	r3, [r4, #0]
+ 801d42c:	b016      	add	sp, #88	; 0x58
+ 801d42e:	bd70      	pop	{r4, r5, r6, pc}
+
+0801d430 <__smakebuf_r>:
+ 801d430:	898b      	ldrh	r3, [r1, #12]
+ 801d432:	b573      	push	{r0, r1, r4, r5, r6, lr}
+ 801d434:	079d      	lsls	r5, r3, #30
+ 801d436:	4606      	mov	r6, r0
+ 801d438:	460c      	mov	r4, r1
+ 801d43a:	d507      	bpl.n	801d44c <__smakebuf_r+0x1c>
+ 801d43c:	f104 0347 	add.w	r3, r4, #71	; 0x47
+ 801d440:	6023      	str	r3, [r4, #0]
+ 801d442:	6123      	str	r3, [r4, #16]
+ 801d444:	2301      	movs	r3, #1
+ 801d446:	6163      	str	r3, [r4, #20]
+ 801d448:	b002      	add	sp, #8
+ 801d44a:	bd70      	pop	{r4, r5, r6, pc}
+ 801d44c:	ab01      	add	r3, sp, #4
+ 801d44e:	466a      	mov	r2, sp
+ 801d450:	f7ff ffca 	bl	801d3e8 <__swhatbuf_r>
+ 801d454:	9900      	ldr	r1, [sp, #0]
+ 801d456:	4605      	mov	r5, r0
+ 801d458:	4630      	mov	r0, r6
+ 801d45a:	f7ff f959 	bl	801c710 <_malloc_r>
+ 801d45e:	b948      	cbnz	r0, 801d474 <__smakebuf_r+0x44>
+ 801d460:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
+ 801d464:	059a      	lsls	r2, r3, #22
+ 801d466:	d4ef      	bmi.n	801d448 <__smakebuf_r+0x18>
+ 801d468:	f023 0303 	bic.w	r3, r3, #3
+ 801d46c:	f043 0302 	orr.w	r3, r3, #2
+ 801d470:	81a3      	strh	r3, [r4, #12]
+ 801d472:	e7e3      	b.n	801d43c <__smakebuf_r+0xc>
+ 801d474:	4b0d      	ldr	r3, [pc, #52]	; (801d4ac <__smakebuf_r+0x7c>)
+ 801d476:	62b3      	str	r3, [r6, #40]	; 0x28
+ 801d478:	89a3      	ldrh	r3, [r4, #12]
+ 801d47a:	6020      	str	r0, [r4, #0]
+ 801d47c:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 801d480:	81a3      	strh	r3, [r4, #12]
+ 801d482:	9b00      	ldr	r3, [sp, #0]
+ 801d484:	6163      	str	r3, [r4, #20]
+ 801d486:	9b01      	ldr	r3, [sp, #4]
+ 801d488:	6120      	str	r0, [r4, #16]
+ 801d48a:	b15b      	cbz	r3, 801d4a4 <__smakebuf_r+0x74>
+ 801d48c:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
+ 801d490:	4630      	mov	r0, r6
+ 801d492:	f000 f859 	bl	801d548 <_isatty_r>
+ 801d496:	b128      	cbz	r0, 801d4a4 <__smakebuf_r+0x74>
+ 801d498:	89a3      	ldrh	r3, [r4, #12]
+ 801d49a:	f023 0303 	bic.w	r3, r3, #3
+ 801d49e:	f043 0301 	orr.w	r3, r3, #1
+ 801d4a2:	81a3      	strh	r3, [r4, #12]
+ 801d4a4:	89a3      	ldrh	r3, [r4, #12]
+ 801d4a6:	431d      	orrs	r5, r3
+ 801d4a8:	81a5      	strh	r5, [r4, #12]
+ 801d4aa:	e7cd      	b.n	801d448 <__smakebuf_r+0x18>
+ 801d4ac:	0801c519 	.word	0x0801c519
+
+0801d4b0 <__malloc_lock>:
+ 801d4b0:	4770      	bx	lr
+
+0801d4b2 <__malloc_unlock>:
+ 801d4b2:	4770      	bx	lr
+
+0801d4b4 <_realloc_r>:
+ 801d4b4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 801d4b6:	4607      	mov	r7, r0
+ 801d4b8:	4614      	mov	r4, r2
+ 801d4ba:	460e      	mov	r6, r1
+ 801d4bc:	b921      	cbnz	r1, 801d4c8 <_realloc_r+0x14>
+ 801d4be:	4611      	mov	r1, r2
+ 801d4c0:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
+ 801d4c4:	f7ff b924 	b.w	801c710 <_malloc_r>
+ 801d4c8:	b922      	cbnz	r2, 801d4d4 <_realloc_r+0x20>
+ 801d4ca:	f7ff f8d3 	bl	801c674 <_free_r>
+ 801d4ce:	4625      	mov	r5, r4
+ 801d4d0:	4628      	mov	r0, r5
+ 801d4d2:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
+ 801d4d4:	f000 f848 	bl	801d568 <_malloc_usable_size_r>
+ 801d4d8:	42a0      	cmp	r0, r4
+ 801d4da:	d20f      	bcs.n	801d4fc <_realloc_r+0x48>
+ 801d4dc:	4621      	mov	r1, r4
+ 801d4de:	4638      	mov	r0, r7
+ 801d4e0:	f7ff f916 	bl	801c710 <_malloc_r>
+ 801d4e4:	4605      	mov	r5, r0
+ 801d4e6:	2800      	cmp	r0, #0
+ 801d4e8:	d0f2      	beq.n	801d4d0 <_realloc_r+0x1c>
+ 801d4ea:	4631      	mov	r1, r6
+ 801d4ec:	4622      	mov	r2, r4
+ 801d4ee:	f7fe ff56 	bl	801c39e <memcpy>
+ 801d4f2:	4631      	mov	r1, r6
+ 801d4f4:	4638      	mov	r0, r7
+ 801d4f6:	f7ff f8bd 	bl	801c674 <_free_r>
+ 801d4fa:	e7e9      	b.n	801d4d0 <_realloc_r+0x1c>
+ 801d4fc:	4635      	mov	r5, r6
+ 801d4fe:	e7e7      	b.n	801d4d0 <_realloc_r+0x1c>
+
+0801d500 <_read_r>:
+ 801d500:	b538      	push	{r3, r4, r5, lr}
+ 801d502:	4c07      	ldr	r4, [pc, #28]	; (801d520 <_read_r+0x20>)
+ 801d504:	4605      	mov	r5, r0
+ 801d506:	4608      	mov	r0, r1
+ 801d508:	4611      	mov	r1, r2
+ 801d50a:	2200      	movs	r2, #0
+ 801d50c:	6022      	str	r2, [r4, #0]
+ 801d50e:	461a      	mov	r2, r3
+ 801d510:	f7e7 fa14 	bl	800493c <_read>
+ 801d514:	1c43      	adds	r3, r0, #1
+ 801d516:	d102      	bne.n	801d51e <_read_r+0x1e>
+ 801d518:	6823      	ldr	r3, [r4, #0]
+ 801d51a:	b103      	cbz	r3, 801d51e <_read_r+0x1e>
+ 801d51c:	602b      	str	r3, [r5, #0]
+ 801d51e:	bd38      	pop	{r3, r4, r5, pc}
+ 801d520:	2000f82c 	.word	0x2000f82c
+
+0801d524 <_fstat_r>:
+ 801d524:	b538      	push	{r3, r4, r5, lr}
+ 801d526:	4c07      	ldr	r4, [pc, #28]	; (801d544 <_fstat_r+0x20>)
+ 801d528:	2300      	movs	r3, #0
+ 801d52a:	4605      	mov	r5, r0
+ 801d52c:	4608      	mov	r0, r1
+ 801d52e:	4611      	mov	r1, r2
+ 801d530:	6023      	str	r3, [r4, #0]
+ 801d532:	f7e7 fa48 	bl	80049c6 <_fstat>
+ 801d536:	1c43      	adds	r3, r0, #1
+ 801d538:	d102      	bne.n	801d540 <_fstat_r+0x1c>
+ 801d53a:	6823      	ldr	r3, [r4, #0]
+ 801d53c:	b103      	cbz	r3, 801d540 <_fstat_r+0x1c>
+ 801d53e:	602b      	str	r3, [r5, #0]
+ 801d540:	bd38      	pop	{r3, r4, r5, pc}
+ 801d542:	bf00      	nop
+ 801d544:	2000f82c 	.word	0x2000f82c
+
+0801d548 <_isatty_r>:
+ 801d548:	b538      	push	{r3, r4, r5, lr}
+ 801d54a:	4c06      	ldr	r4, [pc, #24]	; (801d564 <_isatty_r+0x1c>)
+ 801d54c:	2300      	movs	r3, #0
+ 801d54e:	4605      	mov	r5, r0
+ 801d550:	4608      	mov	r0, r1
+ 801d552:	6023      	str	r3, [r4, #0]
+ 801d554:	f7e7 fa47 	bl	80049e6 <_isatty>
+ 801d558:	1c43      	adds	r3, r0, #1
+ 801d55a:	d102      	bne.n	801d562 <_isatty_r+0x1a>
+ 801d55c:	6823      	ldr	r3, [r4, #0]
+ 801d55e:	b103      	cbz	r3, 801d562 <_isatty_r+0x1a>
+ 801d560:	602b      	str	r3, [r5, #0]
+ 801d562:	bd38      	pop	{r3, r4, r5, pc}
+ 801d564:	2000f82c 	.word	0x2000f82c
+
+0801d568 <_malloc_usable_size_r>:
+ 801d568:	f851 3c04 	ldr.w	r3, [r1, #-4]
+ 801d56c:	1f18      	subs	r0, r3, #4
+ 801d56e:	2b00      	cmp	r3, #0
+ 801d570:	bfbc      	itt	lt
+ 801d572:	580b      	ldrlt	r3, [r1, r0]
+ 801d574:	18c0      	addlt	r0, r0, r3
+ 801d576:	4770      	bx	lr
+
+0801d578 <_init>:
+ 801d578:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 801d57a:	bf00      	nop
+ 801d57c:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 801d57e:	bc08      	pop	{r3}
+ 801d580:	469e      	mov	lr, r3
+ 801d582:	4770      	bx	lr
+
+0801d584 <_fini>:
+ 801d584:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 801d586:	bf00      	nop
+ 801d588:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 801d58a:	bc08      	pop	{r3}
+ 801d58c:	469e      	mov	lr, r3
+ 801d58e:	4770      	bx	lr
diff --git a/Debug/Space_Invaders.map b/Debug/Space_Invaders.map
new file mode 100644
index 0000000..ed96e0b
--- /dev/null
+++ b/Debug/Space_Invaders.map
@@ -0,0 +1,35872 @@
+Archive member included to satisfy reference by file (symbol)
+
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-atoi.o)
+                              Middlewares/Third_Party/LwIP/src/core/netif.o (atoi)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (exit)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o) (_global_impure_ptr)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (__libc_init_array)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+                              Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o (__locale_ctype_ptr)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mbtowc_r.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o) (__ascii_mbtowc)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcmp.o)
+                              Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o (memcmp)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o)
+                              LWIP/Target/ethernetif.o (memcpy)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memmove.o)
+                              Middlewares/Third_Party/LwIP/src/core/def.o (memmove)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (memset)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-printf.o)
+                              LWIP/Target/ethernetif.o (printf)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-rand.o)
+                              Middlewares/Third_Party/LwIP/src/core/tcp.o (rand)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sprintf.o)
+                              Core/Src/main.o (sprintf)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strcmp.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o) (strcmp)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strlen.o)
+                              Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o (strlen)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strncmp.o)
+                              Middlewares/Third_Party/LwIP/src/core/def.o (strncmp)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strtol.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-atoi.o) (_strtol_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wctomb_r.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o) (__ascii_wctomb)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-ctype_.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o) (_ctype_)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-printf.o) (__sinit)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fwalk.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o) (_fwalk)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-malloc.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-rand.o) (malloc)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-freer.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-malloc.o) (_free_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-mallocr.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o) (_malloc_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sprintf.o) (_svfprintf_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-printf.o) (_vfprintf_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o) (_printf_i)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sbrkr.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-mallocr.o) (_sbrk_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o) (__sread)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wbuf.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o) (__swbuf_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-writer.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o) (_write_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wsetup.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o) (__swsetup_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-closer.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o) (_close_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fflush.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o) (_fflush_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fvwrite.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o) (__sfvwrite_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-lseekr.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o) (_lseek_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-makebuf.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wsetup.o) (__smakebuf_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memchr.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o) (memchr)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mlock.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-freer.o) (__malloc_lock)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-reallocr.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o) (_realloc_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-readr.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o) (_read_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fstatr.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-makebuf.o) (_fstat_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-isattyr.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-makebuf.o) (_isatty_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-msizer.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-reallocr.o) (_malloc_usable_size_r)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_aeabi_uldivmod.o)
+                              Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o (__aeabi_uldivmod)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_udivmoddi4.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_aeabi_uldivmod.o) (__udivmoddi4)
+c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_dvmd_tls.o)
+                              c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_aeabi_uldivmod.o) (__aeabi_ldiv0)
+
+Allocating common symbols
+Common symbol       size              file
+
+link_arg            0x8               LWIP/App/lwip.o
+sdramHandle         0x34              Core/Src/stm32746g_discovery_sdram.o
+netif_list          0x4               Middlewares/Third_Party/LwIP/src/core/netif.o
+hi2c3               0x4c              Core/Src/main.o
+hspi2               0x64              Core/Src/main.o
+lock_tcpip_core     0x4               Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ip_data             0x18              Middlewares/Third_Party/LwIP/src/core/ip.o
+huart7              0x80              Core/Src/main.o
+htim8               0x40              Core/Src/main.o
+Queue_JHandle       0x4               Core/Src/main.o
+memp_memory_NETBUF_base
+                    0x23              Middlewares/Third_Party/LwIP/src/core/memp.o
+tcp_active_pcbs_changed
+                    0x1               Middlewares/Third_Party/LwIP/src/core/tcp.o
+tcp_active_pcbs     0x4               Middlewares/Third_Party/LwIP/src/core/tcp.o
+udp_pcbs            0x4               Middlewares/Third_Party/LwIP/src/core/udp.o
+errno               0x4               Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+hi2c1               0x4c              Core/Src/main.o
+memp_memory_TCPIP_MSG_INPKT_base
+                    0x83              Middlewares/Third_Party/LwIP/src/core/memp.o
+tcp_ticks           0x4               Middlewares/Third_Party/LwIP/src/core/tcp.o
+tcp_listen_pcbs     0x4               Middlewares/Third_Party/LwIP/src/core/tcp.o
+hcrc                0x24              Core/Src/main.o
+memp_memory_TCP_SEG_base
+                    0x103             Middlewares/Third_Party/LwIP/src/core/memp.o
+hLtdcHandler        0xa8              Core/Src/stm32746g_discovery_lcd.o
+gnetif              0x38              LWIP/App/lwip.o
+ipaddr              0x4               LWIP/App/lwip.o
+uwTick              0x4               Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+xQueueRegistry      0x40              Middlewares/Third_Party/FreeRTOS/Source/queue.o
+memp_memory_PBUF_POOL_base
+                    0x2603            Middlewares/Third_Party/LwIP/src/core/memp.o
+pFlash              0x1c              Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+Joueur_1Handle      0x4               Core/Src/main.o
+htim5               0x40              Core/Src/main.o
+memp_memory_FRAG_PBUF_base
+                    0x16b             Middlewares/Third_Party/LwIP/src/core/memp.o
+htim3               0x40              Core/Src/main.o
+memp_memory_TCPIP_MSG_API_base
+                    0x83              Middlewares/Third_Party/LwIP/src/core/memp.o
+hltdc               0xa8              Core/Src/main.o
+tcp_input_pcb       0x4               Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+netmask             0x4               LWIP/App/lwip.o
+hadc1               0x48              Core/Src/main.o
+hadc3               0x48              Core/Src/main.o
+Queue_NHandle       0x4               Core/Src/main.o
+DMATxDscrTab        0x80              LWIP/Target/ethernetif.o
+huart1              0x80              Core/Src/main.o
+Queue_FHandle       0x4               Core/Src/main.o
+Queue_PHandle       0x4               Core/Src/main.o
+Rx_Buff             0x17d0            LWIP/Target/ethernetif.o
+dhcp_rx_options_given
+                    0x8               Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+hdac                0x14              Core/Src/main.o
+ProjectileHandle    0x4               Core/Src/main.o
+memp_memory_PBUF_base
+                    0x103             Middlewares/Third_Party/LwIP/src/core/memp.o
+tcp_bound_pcbs      0x4               Middlewares/Third_Party/LwIP/src/core/tcp.o
+memp_memory_TCP_PCB_LISTEN_base
+                    0xe3              Middlewares/Third_Party/LwIP/src/core/memp.o
+memp_memory_REASSDATA_base
+                    0xa3              Middlewares/Third_Party/LwIP/src/core/memp.o
+hrtc                0x20              Core/Src/main.o
+htim6               0x40              Core/Src/stm32f7xx_hal_timebase_tim.o
+htim1               0x40              Core/Src/main.o
+memp_memory_UDP_PCB_base
+                    0x83              Middlewares/Third_Party/LwIP/src/core/memp.o
+pbuf_free_ooseq_pending
+                    0x1               Middlewares/Third_Party/LwIP/src/core/pbuf.o
+hrng                0x10              Core/Src/main.o
+lwip_sys_mutex      0x4               Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+DMARxDscrTab        0x80              LWIP/Target/ethernetif.o
+huart6              0x80              Core/Src/main.o
+gw                  0x4               LWIP/App/lwip.o
+GameMasterHandle    0x4               Core/Src/main.o
+hdma2d              0x40              Core/Src/main.o
+htim2               0x40              Core/Src/main.o
+tcp_tw_pcbs         0x4               Middlewares/Third_Party/LwIP/src/core/tcp.o
+memp_memory_NETCONN_base
+                    0xa3              Middlewares/Third_Party/LwIP/src/core/memp.o
+netif_default       0x4               Middlewares/Third_Party/LwIP/src/core/netif.o
+Queue_EHandle       0x4               Core/Src/main.o
+hsdram1             0x34              Core/Src/main.o
+dhcp_rx_options_val
+                    0x20              Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+memp_memory_TCP_PCB_base
+                    0x30f             Middlewares/Third_Party/LwIP/src/core/memp.o
+memp_memory_SYS_TIMEOUT_base
+                    0x53              Middlewares/Third_Party/LwIP/src/core/memp.o
+heth                0x48              LWIP/Target/ethernetif.o
+Block_EnemieHandle  0x4               Core/Src/main.o
+ram_heap            0x653             Middlewares/Third_Party/LwIP/src/core/mem.o
+Tx_Buff             0x17d0            LWIP/Target/ethernetif.o
+
+Discarded input sections
+
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
+ .data          0x0000000000000000        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+ .text          0x0000000000000000       0x74 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
+ .ARM.extab     0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
+ .ARM.exidx     0x0000000000000000        0x8 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
+ .ARM.attributes
+                0x0000000000000000       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/freertos.o
+ .text          0x0000000000000000        0x0 Core/Src/freertos.o
+ .data          0x0000000000000000        0x0 Core/Src/freertos.o
+ .bss           0x0000000000000000        0x0 Core/Src/freertos.o
+ .group         0x0000000000000000        0xc Core/Src/ft5336.o
+ .group         0x0000000000000000        0xc Core/Src/ft5336.o
+ .group         0x0000000000000000        0xc Core/Src/ft5336.o
+ .group         0x0000000000000000        0xc Core/Src/ft5336.o
+ .group         0x0000000000000000        0xc Core/Src/ft5336.o
+ .group         0x0000000000000000        0xc Core/Src/ft5336.o
+ .group         0x0000000000000000        0xc Core/Src/ft5336.o
+ .group         0x0000000000000000        0xc Core/Src/ft5336.o
+ .group         0x0000000000000000        0xc Core/Src/ft5336.o
+ .text          0x0000000000000000        0x0 Core/Src/ft5336.o
+ .data          0x0000000000000000        0x0 Core/Src/ft5336.o
+ .bss           0x0000000000000000        0x0 Core/Src/ft5336.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/ft5336.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/ft5336.o
+ .debug_macro   0x0000000000000000       0x8e Core/Src/ft5336.o
+ .debug_macro   0x0000000000000000       0x51 Core/Src/ft5336.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/ft5336.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/ft5336.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/ft5336.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/main.o
+ .text          0x0000000000000000        0x0 Core/Src/main.o
+ .data          0x0000000000000000        0x0 Core/Src/main.o
+ .bss           0x0000000000000000        0x0 Core/Src/main.o
+ .text.envoie_score
+                0x0000000000000000       0x16 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x2dd Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x3b Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x8e Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x51 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xdf Core/Src/main.o
+ .debug_macro   0x0000000000000000     0x12cd Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x11f Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/main.o
+ .debug_macro   0x0000000000000000    0x190f0 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/main.o
+ .debug_macro   0x0000000000000000     0x36b4 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x174 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x61 Core/Src/main.o
+ .debug_macro   0x0000000000000000     0x18ad Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x6c4 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x185 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x117 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x1fe Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x27 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x24f Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x41 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x58 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x236 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x416 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x153 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x107 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xd5 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x4c Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x20f Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xea Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xa0 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/main.o
+ .debug_macro   0x0000000000000000      0xccf Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x14f Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x25b Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x12 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x514 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x5a Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xa5 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x198 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x12f Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x108 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xa4 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x313 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x4ca Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x2fe Core/Src/main.o
+ .debug_macro   0x0000000000000000      0xa2f Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x59 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x53c Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x44 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x14e Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x3f9 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x15a Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xde Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x26 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x4c5 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xb5 Core/Src/main.o
+ .debug_macro   0x0000000000000000       0xaa Core/Src/main.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/main.o
+ .debug_macro   0x0000000000000000      0x39f Core/Src/main.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .text          0x0000000000000000        0x0 Core/Src/stm32746g_discovery.o
+ .data          0x0000000000000000        0x0 Core/Src/stm32746g_discovery.o
+ .bss           0x0000000000000000        0x0 Core/Src/stm32746g_discovery.o
+ .rodata.GPIO_PIN
+                0x0000000000000000        0x4 Core/Src/stm32746g_discovery.o
+ .data.BUTTON_PORT
+                0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
+ .rodata.BUTTON_PIN
+                0x0000000000000000        0x6 Core/Src/stm32746g_discovery.o
+ .rodata.BUTTON_IRQn
+                0x0000000000000000        0x6 Core/Src/stm32746g_discovery.o
+ .data.COM_USART
+                0x0000000000000000        0x4 Core/Src/stm32746g_discovery.o
+ .data.COM_TX_PORT
+                0x0000000000000000        0x4 Core/Src/stm32746g_discovery.o
+ .data.COM_RX_PORT
+                0x0000000000000000        0x4 Core/Src/stm32746g_discovery.o
+ .rodata.COM_TX_PIN
+                0x0000000000000000        0x2 Core/Src/stm32746g_discovery.o
+ .rodata.COM_RX_PIN
+                0x0000000000000000        0x2 Core/Src/stm32746g_discovery.o
+ .rodata.COM_TX_AF
+                0x0000000000000000        0x2 Core/Src/stm32746g_discovery.o
+ .rodata.COM_RX_AF
+                0x0000000000000000        0x2 Core/Src/stm32746g_discovery.o
+ .bss.hI2cExtHandler
+                0x0000000000000000       0x4c Core/Src/stm32746g_discovery.o
+ .text.BSP_GetVersion
+                0x0000000000000000       0x12 Core/Src/stm32746g_discovery.o
+ .text.BSP_LED_Init
+                0x0000000000000000       0x68 Core/Src/stm32746g_discovery.o
+ .text.BSP_LED_DeInit
+                0x0000000000000000       0x3c Core/Src/stm32746g_discovery.o
+ .text.BSP_LED_On
+                0x0000000000000000       0x30 Core/Src/stm32746g_discovery.o
+ .text.BSP_LED_Off
+                0x0000000000000000       0x30 Core/Src/stm32746g_discovery.o
+ .text.BSP_LED_Toggle
+                0x0000000000000000       0x2c Core/Src/stm32746g_discovery.o
+ .text.BSP_PB_Init
+                0x0000000000000000      0x118 Core/Src/stm32746g_discovery.o
+ .text.BSP_PB_DeInit
+                0x0000000000000000       0x4c Core/Src/stm32746g_discovery.o
+ .text.BSP_PB_GetState
+                0x0000000000000000       0x34 Core/Src/stm32746g_discovery.o
+ .text.BSP_COM_Init
+                0x0000000000000000       0xdc Core/Src/stm32746g_discovery.o
+ .text.BSP_COM_DeInit
+                0x0000000000000000       0x40 Core/Src/stm32746g_discovery.o
+ .text.I2Cx_IsDeviceReady
+                0x0000000000000000       0x26 Core/Src/stm32746g_discovery.o
+ .text.AUDIO_IO_Init
+                0x0000000000000000       0x14 Core/Src/stm32746g_discovery.o
+ .text.AUDIO_IO_DeInit
+                0x0000000000000000        0xe Core/Src/stm32746g_discovery.o
+ .text.AUDIO_IO_Write
+                0x0000000000000000       0x54 Core/Src/stm32746g_discovery.o
+ .text.AUDIO_IO_Read
+                0x0000000000000000       0x58 Core/Src/stm32746g_discovery.o
+ .text.AUDIO_IO_Delay
+                0x0000000000000000       0x16 Core/Src/stm32746g_discovery.o
+ .text.CAMERA_IO_Init
+                0x0000000000000000       0x14 Core/Src/stm32746g_discovery.o
+ .text.CAMERA_IO_Write
+                0x0000000000000000       0x34 Core/Src/stm32746g_discovery.o
+ .text.CAMERA_IO_Read
+                0x0000000000000000       0x3c Core/Src/stm32746g_discovery.o
+ .text.CAMERA_Delay
+                0x0000000000000000       0x16 Core/Src/stm32746g_discovery.o
+ .text.EEPROM_IO_Init
+                0x0000000000000000       0x14 Core/Src/stm32746g_discovery.o
+ .text.EEPROM_IO_WriteData
+                0x0000000000000000       0x38 Core/Src/stm32746g_discovery.o
+ .text.EEPROM_IO_ReadData
+                0x0000000000000000       0x38 Core/Src/stm32746g_discovery.o
+ .text.EEPROM_IO_IsDeviceReady
+                0x0000000000000000       0x28 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x2dd Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x3b Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x8e Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x51 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0xdf Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x11f Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x174 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x61 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x185 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x117 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x27 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x24f Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x41 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x58 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x236 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x416 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x153 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x107 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0xd5 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x4c Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x20f Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0xea Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0xccf Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x14f Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x25b Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x12 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x514 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x5a Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x198 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x12f Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x108 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0xa4 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x313 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x59 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x53c Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000       0x44 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x0000000000000000      0x14e Core/Src/stm32746g_discovery.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
+ .text          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_lcd.o
+ .data          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_lcd.o
+ .bss           0x0000000000000000        0x0 Core/Src/stm32746g_discovery_lcd.o
+ .rodata.Font20_Table
+                0x0000000000000000      0xed8 Core/Src/stm32746g_discovery_lcd.o
+ .data.Font20   0x0000000000000000        0x8 Core/Src/stm32746g_discovery_lcd.o
+ .rodata.Font16_Table
+                0x0000000000000000      0xbe0 Core/Src/stm32746g_discovery_lcd.o
+ .data.Font16   0x0000000000000000        0x8 Core/Src/stm32746g_discovery_lcd.o
+ .rodata.Font8_Table
+                0x0000000000000000      0x2f8 Core/Src/stm32746g_discovery_lcd.o
+ .data.Font8    0x0000000000000000        0x8 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_DeInit
+                0x0000000000000000       0x38 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetXSize
+                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetYSize
+                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_LayerRgb565Init
+                0x0000000000000000       0xc0 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetLayerVisible
+                0x0000000000000000       0x7c Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetLayerVisible_NoReload
+                0x0000000000000000       0x6c Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetTransparency
+                0x0000000000000000       0x24 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetTransparency_NoReload
+                0x0000000000000000       0x24 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetLayerAddress
+                0x0000000000000000       0x20 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetLayerAddress_NoReload
+                0x0000000000000000       0x20 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetLayerWindow
+                0x0000000000000000       0x44 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetLayerWindow_NoReload
+                0x0000000000000000       0x44 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetColorKeying
+                0x0000000000000000       0x28 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_SetColorKeying_NoReload
+                0x0000000000000000       0x28 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_ResetColorKeying
+                0x0000000000000000       0x1c Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_ResetColorKeying_NoReload
+                0x0000000000000000       0x1c Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_Reload
+                0x0000000000000000       0x1c Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_GetTextColor
+                0x0000000000000000       0x28 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_GetBackColor
+                0x0000000000000000       0x2c Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_ReadPixel
+                0x0000000000000000      0x14c Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_ClearStringLine
+                0x0000000000000000       0xc8 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_DrawVLine
+                0x0000000000000000       0xc4 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_DrawLine
+                0x0000000000000000      0x198 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_DrawRect
+                0x0000000000000000       0x62 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_DrawPolygon
+                0x0000000000000000       0x9a Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_DrawEllipse
+                0x0000000000000000      0x1f0 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_DrawBitmap
+                0x0000000000000000      0x160 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_FillPolygon
+                0x0000000000000000      0x1c8 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_FillEllipse
+                0x0000000000000000      0x172 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_DisplayOff
+                0x0000000000000000       0x3c Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_LCD_MspDeInit
+                0x0000000000000000       0x94 Core/Src/stm32746g_discovery_lcd.o
+ .text.FillTriangle
+                0x0000000000000000      0x17e Core/Src/stm32746g_discovery_lcd.o
+ .text.LL_ConvertLineToARGB8888
+                0x0000000000000000       0x88 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x40 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x2dd Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x3b Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x8e Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x51 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0xdf Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x11f Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x174 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x61 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x185 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x117 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x27 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x24f Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x41 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x58 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x236 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x416 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x153 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x107 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0xd5 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x4c Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x20f Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0xea Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0xccf Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x14f Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x25b Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x12 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x514 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x5a Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x198 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x12f Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x108 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0xa4 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x313 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x59 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x53c Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x44 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x14e Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x268 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x0000000000000000      0x12a Core/Src/stm32746g_discovery_lcd.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
+ .text          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_sdram.o
+ .data          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_sdram.o
+ .bss           0x0000000000000000        0x0 Core/Src/stm32746g_discovery_sdram.o
+ .text.BSP_SDRAM_DeInit
+                0x0000000000000000       0x40 Core/Src/stm32746g_discovery_sdram.o
+ .text.BSP_SDRAM_ReadData
+                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_sdram.o
+ .text.BSP_SDRAM_ReadData_DMA
+                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_sdram.o
+ .text.BSP_SDRAM_WriteData
+                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_sdram.o
+ .text.BSP_SDRAM_WriteData_DMA
+                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_sdram.o
+ .text.BSP_SDRAM_Sendcmd
+                0x0000000000000000       0x2c Core/Src/stm32746g_discovery_sdram.o
+ .text.BSP_SDRAM_MspDeInit
+                0x0000000000000000       0x2c Core/Src/stm32746g_discovery_sdram.o
+ .data.sdramstatus.10042
+                0x0000000000000000        0x1 Core/Src/stm32746g_discovery_sdram.o
+ .bss.dma_handle.10088
+                0x0000000000000000       0x60 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x2dd Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x3b Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x8e Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x51 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0xdf Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x11f Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x174 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x61 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x185 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x117 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x27 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x24f Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x41 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x58 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x236 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x416 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x153 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x107 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0xd5 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x4c Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x20f Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0xea Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0xccf Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x14f Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x25b Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x12 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x514 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x5a Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x198 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x12f Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x108 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0xa4 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x313 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x59 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x53c Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x44 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000      0x14e Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x0000000000000000       0x9a Core/Src/stm32746g_discovery_sdram.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
+ .text          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_ts.o
+ .data          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_ts.o
+ .bss           0x0000000000000000        0x0 Core/Src/stm32746g_discovery_ts.o
+ .text.BSP_TS_DeInit
+                0x0000000000000000       0x10 Core/Src/stm32746g_discovery_ts.o
+ .text.BSP_TS_ITConfig
+                0x0000000000000000       0x5c Core/Src/stm32746g_discovery_ts.o
+ .text.BSP_TS_ITGetStatus
+                0x0000000000000000       0x24 Core/Src/stm32746g_discovery_ts.o
+ .text.BSP_TS_ITClear
+                0x0000000000000000       0x20 Core/Src/stm32746g_discovery_ts.o
+ .text.BSP_TS_ResetTouchData
+                0x0000000000000000       0x80 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x2dd Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x3b Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x8e Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x51 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0xdf Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x11f Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x174 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x61 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x185 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x117 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x27 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x24f Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x41 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x58 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x236 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x416 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x153 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x107 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0xd5 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x4c Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x20f Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0xea Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0xccf Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x14f Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x25b Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x12 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x514 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x5a Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x198 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x12f Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x108 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0xa4 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x313 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x59 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x53c Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x44 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x14e Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x262 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000      0x39f Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/stm32746g_discovery_ts.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
+ .text          0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_msp.o
+ .data          0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_msp.o
+ .bss           0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_ADC_MspDeInit
+                0x0000000000000000       0x64 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_CRC_MspDeInit
+                0x0000000000000000       0x34 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_DAC_MspDeInit
+                0x0000000000000000       0x40 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_DMA2D_MspDeInit
+                0x0000000000000000       0x34 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_LTDC_MspDeInit
+                0x0000000000000000       0x78 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_RNG_MspDeInit
+                0x0000000000000000       0x34 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_RTC_MspDeInit
+                0x0000000000000000       0x34 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_SPI_MspDeInit
+                0x0000000000000000       0x48 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_TIM_Base_MspDeInit
+                0x0000000000000000       0xa0 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_UART_MspDeInit
+                0x0000000000000000       0x98 Core/Src/stm32f7xx_hal_msp.o
+ .bss.FMC_DeInitialized
+                0x0000000000000000        0x4 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_FMC_MspDeInit
+                0x0000000000000000       0x7c Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_SDRAM_MspDeInit
+                0x0000000000000000       0x14 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x2dd Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x3b Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x8e Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x51 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xdf Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x11f Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x174 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x61 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x185 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x117 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x27 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x24f Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x41 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x58 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x236 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x416 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x153 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x107 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xd5 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x4c Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x20f Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xea Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0xccf Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x14f Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x25b Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x12 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x514 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x5a Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x198 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x12f Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x108 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xa4 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x313 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x59 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x53c Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x44 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x14e Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x3f9 Core/Src/stm32f7xx_hal_msp.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
+ .text          0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .data          0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .bss           0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .text.HAL_SuspendTick
+                0x0000000000000000       0x24 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .text.HAL_ResumeTick
+                0x0000000000000000       0x24 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x2dd Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x3b Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x8e Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x51 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0xdf Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x11f Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x174 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x61 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x185 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x117 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x27 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x24f Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x41 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x58 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x236 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x416 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x153 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x107 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0xd5 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x4c Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x20f Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0xea Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0xccf Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x14f Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x25b Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x12 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x514 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x5a Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x198 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x12f Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x108 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0xa4 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x313 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x59 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x53c Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000       0x44 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x0000000000000000      0x14e Core/Src/stm32f7xx_hal_timebase_tim.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
+ .text          0x0000000000000000        0x0 Core/Src/stm32f7xx_it.o
+ .data          0x0000000000000000        0x0 Core/Src/stm32f7xx_it.o
+ .bss           0x0000000000000000        0x0 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x2dd Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x3b Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x8e Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x51 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0xdf Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x11f Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x174 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x61 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x185 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x117 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x27 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x24f Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x41 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x58 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x236 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x416 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x153 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x107 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0xd5 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x4c Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x20f Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0xea Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0xccf Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x14f Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x25b Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x12 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x514 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x5a Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x198 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x12f Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x108 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0xa4 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x313 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x59 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x53c Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000       0x44 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x14e Core/Src/stm32f7xx_it.o
+ .debug_macro   0x0000000000000000      0x3f9 Core/Src/stm32f7xx_it.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/syscalls.o
+ .text          0x0000000000000000        0x0 Core/Src/syscalls.o
+ .data          0x0000000000000000        0x0 Core/Src/syscalls.o
+ .bss           0x0000000000000000        0x0 Core/Src/syscalls.o
+ .bss.__env     0x0000000000000000        0x4 Core/Src/syscalls.o
+ .data.environ  0x0000000000000000        0x4 Core/Src/syscalls.o
+ .text.initialise_monitor_handles
+                0x0000000000000000        0xe Core/Src/syscalls.o
+ .text._getpid  0x0000000000000000       0x10 Core/Src/syscalls.o
+ .text._kill    0x0000000000000000       0x24 Core/Src/syscalls.o
+ .text._exit    0x0000000000000000       0x14 Core/Src/syscalls.o
+ .text._open    0x0000000000000000       0x1c Core/Src/syscalls.o
+ .text._wait    0x0000000000000000       0x24 Core/Src/syscalls.o
+ .text._unlink  0x0000000000000000       0x24 Core/Src/syscalls.o
+ .text._times   0x0000000000000000       0x18 Core/Src/syscalls.o
+ .text._stat    0x0000000000000000       0x20 Core/Src/syscalls.o
+ .text._link    0x0000000000000000       0x24 Core/Src/syscalls.o
+ .text._fork    0x0000000000000000       0x1c Core/Src/syscalls.o
+ .text._execve  0x0000000000000000       0x28 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x18 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x34 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x174 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x52 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x1f Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x20 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x1a3 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x52 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x40 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x40 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0xd7 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x3d Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x16 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x16 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x29 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x2dd Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x3b Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000     0x12cd Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x11f Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000    0x190f0 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000     0x36b4 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000     0x18ad Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x6c4 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x185 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x117 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x1fe Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x27 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x24f Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x41 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x58 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x236 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x416 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x153 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x107 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0xd5 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x4c Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x20f Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0xea Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0xa0 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0xccf Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x14f Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x25b Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x12 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x514 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x5a Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0xa5 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x198 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x12f Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x108 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0xa4 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x313 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x4ca Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x2fe Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0xa2f Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x59 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x53c Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x44 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x14e Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x3f9 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x16 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x145 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x88 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x28 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x17 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x460 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x2b Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x118 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x111 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x82 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x66 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x739 Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/sysmem.o
+ .text          0x0000000000000000        0x0 Core/Src/sysmem.o
+ .data          0x0000000000000000        0x0 Core/Src/sysmem.o
+ .bss           0x0000000000000000        0x0 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x2dd Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x3b Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x8e Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x51 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0xdf Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000     0x12cd Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x11f Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000    0x190f0 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000     0x36b4 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x174 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x61 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000     0x18ad Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x6c4 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x185 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x117 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x1fe Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x27 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x24f Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x41 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x58 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x236 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x416 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x153 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x107 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0xd5 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x4c Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x20f Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0xea Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0xa0 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0xccf Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x14f Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x25b Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x12 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x514 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x5a Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0xa5 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x198 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x12f Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x108 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0xa4 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x313 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x4ca Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x2fe Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0xa2f Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x59 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x53c Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x44 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x14e Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x3f9 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0xd0 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x16 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x18 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x46 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x34 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x16 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x52 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x1f Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x20 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x1a3 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x32a Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x16 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x29 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x52 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x40 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x40 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0xd7 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x3d Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x16 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x145 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x88 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x16 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x28 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x17 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x10 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x460 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x2b Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x118 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x111 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x82 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x66 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x739 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x31a Core/Src/sysmem.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
+ .text          0x0000000000000000        0x0 Core/Src/system_stm32f7xx.o
+ .data          0x0000000000000000        0x0 Core/Src/system_stm32f7xx.o
+ .bss           0x0000000000000000        0x0 Core/Src/system_stm32f7xx.o
+ .text.SystemCoreClockUpdate
+                0x0000000000000000       0xf4 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0xa5a Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x2e Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x3b Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x8e Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x51 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0xef Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x6a Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x1df Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x1c Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x22 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0xdf Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000     0x12cd Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x11f Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x19 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000    0x190f0 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x43 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x2dd Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000     0x36b4 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x174 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x61 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000     0x18ad Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x6c4 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x185 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x117 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x1fe Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x27 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x24f Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x41 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x58 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x236 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x416 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x153 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x107 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0xd5 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x4c Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x20f Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0xea Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0xa0 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x3c Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0xccf Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x14f Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x25b Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x12 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x514 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x22c Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x5a Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0xa5 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x198 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x12f Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x108 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x35 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0xa4 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x313 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x4ca Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0xd6 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x2fe Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0xa2f Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x59 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x53c Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000       0x44 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x0000000000000000      0x14e Core/Src/system_stm32f7xx.o
+ .text          0x0000000000000000       0x14 Core/Startup/startup_stm32f746nghx.o
+ .data          0x0000000000000000        0x0 Core/Startup/startup_stm32f746nghx.o
+ .bss           0x0000000000000000        0x0 Core/Startup/startup_stm32f746nghx.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_DeInit
+                0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_MspInit
+                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_MspDeInit
+                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_InitTick
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_GetTickPrio
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_SetTickFreq
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_GetTickFreq
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_SuspendTick
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_ResumeTick
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_GetHalVersion
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_GetREVID
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_GetDEVID
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_GetUIDw0
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_GetUIDw1
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_GetUIDw2
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_DBGMCU_EnableDBGSleepMode
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_DBGMCU_DisableDBGSleepMode
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_DBGMCU_EnableDBGStopMode
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_DBGMCU_DisableDBGStopMode
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_DBGMCU_EnableDBGStandbyMode
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_DBGMCU_DisableDBGStandbyMode
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_EnableCompensationCell
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_DisableCompensationCell
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_EnableFMCMemorySwapping
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .text.HAL_DisableFMCMemorySwapping
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_DeInit
+                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_Stop
+                0x0000000000000000       0x68 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_PollForEvent
+                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_Start_IT
+                0x0000000000000000      0x194 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_Stop_IT
+                0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_IRQHandler
+                0x0000000000000000      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_Start_DMA
+                0x0000000000000000      0x1dc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_Stop_DMA
+                0x0000000000000000       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_ConvCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_ConvHalfCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_LevelOutOfWindowCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_ErrorCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_AnalogWDGConfig
+                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_GetState
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.HAL_ADC_GetError
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.ADC_DMAConvCplt
+                0x0000000000000000       0xba Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.ADC_DMAHalfConvCplt
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.ADC_DMAError
+                0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_InjectedStart
+                0x0000000000000000      0x178 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_InjectedStart_IT
+                0x0000000000000000      0x188 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_InjectedStop
+                0x0000000000000000       0x98 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_InjectedPollForConversion
+                0x0000000000000000       0xe6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_InjectedStop_IT
+                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_InjectedGetValue
+                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_MultiModeStart_DMA
+                0x0000000000000000      0x178 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_MultiModeStop_DMA
+                0x0000000000000000       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_MultiModeGetValue
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_InjectedConvCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_InjectedConfigChannel
+                0x0000000000000000      0x31c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.HAL_ADCEx_MultiModeConfigChannel
+                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.ADC_MultiModeDMAConvCplt
+                0x0000000000000000       0xa6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.ADC_MultiModeDMAHalfConvCplt
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .text.ADC_MultiModeDMAError
+                0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_info    0x0000000000000000      0xaf9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_abbrev  0x0000000000000000      0x21c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_aranges
+                0x0000000000000000       0x90 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_ranges  0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_line    0x0000000000000000      0xb7d Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_str     0x0000000000000000   0x104262 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .debug_frame   0x0000000000000000      0x250 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.__NVIC_DisableIRQ
+                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.__NVIC_GetPendingIRQ
+                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.__NVIC_SetPendingIRQ
+                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.__NVIC_ClearPendingIRQ
+                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.__NVIC_GetActive
+                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.__NVIC_GetPriority
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.NVIC_DecodePriority
+                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.__NVIC_SystemReset
+                0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.SysTick_Config
+                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_NVIC_DisableIRQ
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_NVIC_SystemReset
+                0x0000000000000000        0x8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_SYSTICK_Config
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_MPU_Disable
+                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_MPU_Enable
+                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_MPU_ConfigRegion
+                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_NVIC_GetPriorityGrouping
+                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_NVIC_GetPriority
+                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_NVIC_SetPendingIRQ
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_NVIC_GetPendingIRQ
+                0x0000000000000000       0x1e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_NVIC_ClearPendingIRQ
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_NVIC_GetActive
+                0x0000000000000000       0x1e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_SYSTICK_CLKSourceConfig
+                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_SYSTICK_IRQHandler
+                0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_SYSTICK_Callback
+                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .text.HAL_CRC_DeInit
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .text.HAL_CRC_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .text.HAL_CRC_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .text.HAL_CRC_Accumulate
+                0x0000000000000000       0x82 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .text.HAL_CRC_Calculate
+                0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .text.HAL_CRC_GetState
+                0x0000000000000000       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .text.CRC_Handle_8
+                0x0000000000000000      0x11c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .text.CRC_Handle_16
+                0x0000000000000000       0x74 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .text.HAL_CRCEx_Input_Data_Reverse
+                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .text.HAL_CRCEx_Output_Data_Reverse
+                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_DeInit
+                0x0000000000000000       0x3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_Start
+                0x0000000000000000       0xcc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_Stop
+                0x0000000000000000       0x36 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_Start_DMA
+                0x0000000000000000      0x15c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_Stop_DMA
+                0x0000000000000000       0x82 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_GetValue
+                0x0000000000000000       0x2a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_ConvCpltCallbackCh1
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_ConvHalfCpltCallbackCh1
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_ErrorCallbackCh1
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_SetValue
+                0x0000000000000000       0x4a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_GetState
+                0x0000000000000000       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.HAL_DAC_GetError
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.DAC_DMAConvCpltCh1
+                0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.DAC_DMAHalfConvCpltCh1
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .text.DAC_DMAErrorCh1
+                0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .text.HAL_DACEx_DualGetValue
+                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .text.HAL_DACEx_TriangleWaveGenerate
+                0x0000000000000000       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .text.HAL_DACEx_NoiseWaveGenerate
+                0x0000000000000000       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .text.HAL_DACEx_DualSetValue
+                0x0000000000000000       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .text.HAL_DACEx_ConvCpltCallbackCh2
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .text.HAL_DACEx_ConvHalfCpltCallbackCh2
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .text.HAL_DACEx_ErrorCallbackCh2
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .text.DAC_DMAConvCpltCh2
+                0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .text.DAC_DMAHalfConvCpltCh2
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .text.DAC_DMAErrorCh2
+                0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.HAL_DMA_Start
+                0x0000000000000000       0x76 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.HAL_DMA_Start_IT
+                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.HAL_DMA_Abort
+                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.HAL_DMA_Abort_IT
+                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.HAL_DMA_PollForTransfer
+                0x0000000000000000      0x1be Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.HAL_DMA_IRQHandler
+                0x0000000000000000      0x314 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.HAL_DMA_RegisterCallback
+                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.HAL_DMA_UnRegisterCallback
+                0x0000000000000000       0xd4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.HAL_DMA_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.HAL_DMA_GetError
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.DMA_SetConfig
+                0x0000000000000000       0x5c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_DeInit
+                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_Start_IT
+                0x0000000000000000       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_BlendingStart
+                0x0000000000000000       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_BlendingStart_IT
+                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_Abort
+                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_Suspend
+                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_Resume
+                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_EnableCLUT
+                0x0000000000000000       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_CLUTLoad
+                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_CLUTLoad_IT
+                0x0000000000000000       0xd0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_CLUTLoading_Abort
+                0x0000000000000000       0x9e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_CLUTLoading_Suspend
+                0x0000000000000000       0xf2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_CLUTLoading_Resume
+                0x0000000000000000       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_IRQHandler
+                0x0000000000000000      0x1f8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_LineEventCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_CLUTLoadingCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_ConfigCLUT
+                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_ProgramLineEvent
+                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_EnableDeadTime
+                0x0000000000000000       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_DisableDeadTime
+                0x0000000000000000       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_ConfigDeadTime
+                0x0000000000000000       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_DMA2D_GetError
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .text.HAL_DMAEx_MultiBufferStart
+                0x0000000000000000       0x96 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .text.HAL_DMAEx_MultiBufferStart_IT
+                0x0000000000000000     0x126c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .text.HAL_DMAEx_ChangeMemory
+                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .text.DMA_MultiBufferSetConfig
+                0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_info    0x0000000000000000      0x5d3 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_abbrev  0x0000000000000000      0x1b0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_aranges
+                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_ranges  0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_line    0x0000000000000000     0x1417 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_str     0x0000000000000000   0x103e9c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .debug_frame   0x0000000000000000       0xac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_info    0x0000000000000000      0x169 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_abbrev  0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_aranges
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x2ab Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_line    0x0000000000000000      0x885 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .debug_str     0x0000000000000000   0x103b17 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.HAL_ETH_DeInit
+                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.HAL_ETH_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.HAL_ETH_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.HAL_ETH_GetReceivedFrame
+                0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.HAL_ETH_RxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.HAL_ETH_ConfigDMA
+                0x0000000000000000      0x120 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.HAL_ETH_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .text.HAL_EXTI_SetConfigLine
+                0x0000000000000000      0x150 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .text.HAL_EXTI_GetConfigLine
+                0x0000000000000000      0x104 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .text.HAL_EXTI_ClearConfigLine
+                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .text.HAL_EXTI_RegisterCallback
+                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .text.HAL_EXTI_GetHandle
+                0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .text.HAL_EXTI_IRQHandler
+                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .text.HAL_EXTI_GetPending
+                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .text.HAL_EXTI_ClearPending
+                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .text.HAL_EXTI_GenerateSWI
+                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_info    0x0000000000000000      0x5e9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_abbrev  0x0000000000000000      0x1bc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_aranges
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_ranges  0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_line    0x0000000000000000      0x987 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_str     0x0000000000000000   0x103d34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .debug_frame   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.HAL_FLASH_Program
+                0x0000000000000000       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.HAL_FLASH_Program_IT
+                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.HAL_FLASH_IRQHandler
+                0x0000000000000000      0x15c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.HAL_FLASH_EndOfOperationCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.HAL_FLASH_OperationErrorCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.HAL_FLASH_Unlock
+                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.HAL_FLASH_Lock
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.HAL_FLASH_OB_Unlock
+                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.HAL_FLASH_OB_Lock
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.HAL_FLASH_OB_Launch
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.HAL_FLASH_GetError
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.FLASH_WaitForLastOperation
+                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.FLASH_Program_DoubleWord
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.FLASH_Program_Word
+                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.FLASH_Program_HalfWord
+                0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.FLASH_Program_Byte
+                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .text.FLASH_SetErrorCode
+                0x0000000000000000       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_info    0x0000000000000000      0x646 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_abbrev  0x0000000000000000      0x248 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_aranges
+                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_ranges  0x0000000000000000       0x90 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x2b6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_line    0x0000000000000000      0xab2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_str     0x0000000000000000   0x103e9a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .debug_frame   0x0000000000000000      0x274 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ COMMON         0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.HAL_FLASHEx_Erase
+                0x0000000000000000       0xd8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.HAL_FLASHEx_Erase_IT
+                0x0000000000000000       0x9c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.HAL_FLASHEx_OBProgram
+                0x0000000000000000      0x120 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.HAL_FLASHEx_OBGetConfig
+                0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_MassErase
+                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_Erase_Sector
+                0x0000000000000000       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_OB_GetWRP
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_OB_UserConfig
+                0x0000000000000000       0x6c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_OB_GetUser
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_OB_EnableWRP
+                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_OB_DisableWRP
+                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_OB_RDP_LevelConfig
+                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_OB_BOR_LevelConfig
+                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_OB_BootAddressConfig
+                0x0000000000000000       0x5c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_OB_GetRDP
+                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_OB_GetBOR
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .text.FLASH_OB_GetBootAddress
+                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_info    0x0000000000000000      0x78c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_abbrev  0x0000000000000000      0x21d Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_aranges
+                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_ranges  0x0000000000000000       0x90 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x2b6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_line    0x0000000000000000      0xaa1 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_str     0x0000000000000000   0x103f41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .debug_frame   0x0000000000000000      0x284 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .text.HAL_GPIO_TogglePin
+                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .text.HAL_GPIO_LockPin
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .text.HAL_GPIO_EXTI_IRQHandler
+                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .text.HAL_GPIO_EXTI_Callback
+                0x0000000000000000       0x16 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Master_Transmit
+                0x0000000000000000      0x1e8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Master_Receive
+                0x0000000000000000      0x1ec Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Slave_Transmit
+                0x0000000000000000      0x212 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Slave_Receive
+                0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Master_Transmit_IT
+                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Master_Receive_IT
+                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Slave_Transmit_IT
+                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Slave_Receive_IT
+                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Master_Transmit_DMA
+                0x0000000000000000      0x1e0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Master_Receive_DMA
+                0x0000000000000000      0x1e0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Slave_Transmit_DMA
+                0x0000000000000000      0x16c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Slave_Receive_DMA
+                0x0000000000000000      0x16c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Mem_Write_IT
+                0x0000000000000000      0x128 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Mem_Read_IT
+                0x0000000000000000      0x12c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Mem_Write_DMA
+                0x0000000000000000      0x1ec Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Mem_Read_DMA
+                0x0000000000000000      0x1f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_IsDeviceReady
+                0x0000000000000000      0x210 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Master_Seq_Transmit_IT
+                0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Master_Seq_Transmit_DMA
+                0x0000000000000000      0x208 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Master_Seq_Receive_IT
+                0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Master_Seq_Receive_DMA
+                0x0000000000000000      0x208 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Slave_Seq_Transmit_IT
+                0x0000000000000000      0x144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Slave_Seq_Transmit_DMA
+                0x0000000000000000      0x26c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Slave_Seq_Receive_IT
+                0x0000000000000000      0x144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Slave_Seq_Receive_DMA
+                0x0000000000000000      0x26c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_EnableListen_IT
+                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_DisableListen_IT
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_Master_Abort_IT
+                0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_EV_IRQHandler
+                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_ER_IRQHandler
+                0x0000000000000000       0xc2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_MasterTxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_MasterRxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_SlaveTxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_SlaveRxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_AddrCallback
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_ListenCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_MemTxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_MemRxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_ErrorCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_AbortCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_GetMode
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2C_GetError
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_Master_ISR_IT
+                0x0000000000000000      0x252 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_Slave_ISR_IT
+                0x0000000000000000      0x206 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_Master_ISR_DMA
+                0x0000000000000000      0x1e6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_Slave_ISR_DMA
+                0x0000000000000000      0x190 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_ITAddrCplt
+                0x0000000000000000      0x104 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_ITMasterSeqCplt
+                0x0000000000000000       0x7a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_ITSlaveSeqCplt
+                0x0000000000000000       0x7a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_ITMasterCplt
+                0x0000000000000000      0x138 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_ITSlaveCplt
+                0x0000000000000000      0x1ac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_ITListenCplt
+                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_ITError
+                0x0000000000000000      0x180 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_DMAMasterTransmitCplt
+                0x0000000000000000       0x96 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_DMASlaveTransmitCplt
+                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_DMAMasterReceiveCplt
+                0x0000000000000000       0x96 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_DMASlaveReceiveCplt
+                0x0000000000000000       0x46 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_DMAError
+                0x0000000000000000       0x74 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_DMAAbort
+                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_WaitOnRXNEFlagUntilTimeout
+                0x0000000000000000       0xd8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_Enable_IRQ
+                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_Disable_IRQ
+                0x0000000000000000       0xca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_ConvertOtherXferOptions
+                0x0000000000000000       0x36 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_DeInit
+                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_ConfigColorKeying
+                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_ConfigCLUT
+                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_EnableColorKeying
+                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_DisableColorKeying
+                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_EnableCLUT
+                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_DisableCLUT
+                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_EnableDither
+                0x0000000000000000       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_DisableDither
+                0x0000000000000000       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetWindowSize
+                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetWindowPosition
+                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetPixelFormat
+                0x0000000000000000       0x6c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetAlpha
+                0x0000000000000000       0x6c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetAddress
+                0x0000000000000000       0x6c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetPitch
+                0x0000000000000000      0x10c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_ProgramLineEvent
+                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_Reload
+                0x0000000000000000       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_ConfigLayer_NoReload
+                0x0000000000000000       0x74 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetWindowSize_NoReload
+                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetWindowPosition_NoReload
+                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetPixelFormat_NoReload
+                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetAlpha_NoReload
+                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetAddress_NoReload
+                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_SetPitch_NoReload
+                0x0000000000000000       0xf0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_ConfigColorKeying_NoReload
+                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_EnableColorKeying_NoReload
+                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_DisableColorKeying_NoReload
+                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_EnableCLUT_NoReload
+                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_DisableCLUT_NoReload
+                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_LTDC_GetError
+                0x0000000000000000       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_info    0x0000000000000000      0x169 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_abbrev  0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_aranges
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_line    0x0000000000000000      0x889 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .debug_str     0x0000000000000000   0x103b1b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_DeInit
+                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_DisableBkUpAccess
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_ConfigPVD
+                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_EnablePVD
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_DisablePVD
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_EnableWakeUpPin
+                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_DisableWakeUpPin
+                0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_EnterSLEEPMode
+                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_EnterSTOPMode
+                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_EnterSTANDBYMode
+                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_PVD_IRQHandler
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_PVDCallback
+                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_EnableSleepOnExit
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_DisableSleepOnExit
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_EnableSEVOnPend
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .text.HAL_PWR_DisableSEVOnPend
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_EnableBkUpReg
+                0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_DisableBkUpReg
+                0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_EnableFlashPowerDown
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_DisableFlashPowerDown
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_EnableMainRegulatorLowVoltage
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_DisableMainRegulatorLowVoltage
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_EnableLowRegulatorLowVoltage
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_DisableLowRegulatorLowVoltage
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_DisableOverDrive
+                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_EnterUnderDriveSTOPMode
+                0x0000000000000000       0xc8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_GetVoltageRange
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .text.HAL_PWREx_ControlVoltageScaling
+                0x0000000000000000       0xf4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .text.HAL_RCC_DeInit
+                0x0000000000000000      0x1c0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .text.HAL_RCC_MCOConfig
+                0x0000000000000000       0xc8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .text.HAL_RCC_EnableCSS
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .text.HAL_RCC_DisableCSS
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .text.HAL_RCC_GetOscConfig
+                0x0000000000000000      0x128 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .text.HAL_RCC_NMI_IRQHandler
+                0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .text.HAL_RCC_CSSCallback
+                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .text.HAL_RCCEx_GetPeriphCLKConfig
+                0x0000000000000000      0x218 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .text.HAL_RCCEx_GetPeriphCLKFreq
+                0x0000000000000000      0x268 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .text.HAL_RCCEx_EnablePLLI2S
+                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .text.HAL_RCCEx_DisablePLLI2S
+                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .text.HAL_RCCEx_EnablePLLSAI
+                0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .text.HAL_RCCEx_DisablePLLSAI
+                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_DeInit
+                0x0000000000000000       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_GenerateRandomNumber
+                0x0000000000000000       0x9e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_GenerateRandomNumber_IT
+                0x0000000000000000       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_GetRandomNumber
+                0x0000000000000000       0x2a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_GetRandomNumber_IT
+                0x0000000000000000       0x4a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_IRQHandler
+                0x0000000000000000       0xac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_ReadLastRandomNumber
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_ReadyDataCallback
+                0x0000000000000000       0x16 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_ErrorCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_GetState
+                0x0000000000000000       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .text.HAL_RNG_GetError
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_DeInit
+                0x0000000000000000      0x158 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_GetTime
+                0x0000000000000000       0xbc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_GetDate
+                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_SetAlarm_IT
+                0x0000000000000000      0x270 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_DeactivateAlarm
+                0x0000000000000000      0x11a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_GetAlarm
+                0x0000000000000000      0x11e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_AlarmIRQHandler
+                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_AlarmAEventCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_PollForAlarmAEvent
+                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.HAL_RTC_GetState
+                0x0000000000000000       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .text.RTC_Bcd2ToByte
+                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_SetTimeStamp_IT
+                0x0000000000000000       0xe8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_DeactivateTimeStamp
+                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_SetInternalTimeStamp
+                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_DeactivateInternalTimeStamp
+                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_GetTimeStamp
+                0x0000000000000000      0x140 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_SetTamper
+                0x0000000000000000      0x168 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_SetTamper_IT
+                0x0000000000000000      0x1d8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_DeactivateTamper
+                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_TamperTimeStampIRQHandler
+                0x0000000000000000      0x104 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_TimeStampEventCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_Tamper1EventCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_Tamper2EventCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_Tamper3EventCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_PollForTimeStampEvent
+                0x0000000000000000       0x86 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_PollForTamper1Event
+                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_PollForTamper2Event
+                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_PollForTamper3Event
+                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_SetWakeUpTimer
+                0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_SetWakeUpTimer_IT
+                0x0000000000000000      0x190 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_DeactivateWakeUpTimer
+                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_GetWakeUpTimer
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_WakeUpTimerIRQHandler
+                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_WakeUpTimerEventCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_PollForWakeUpTimerEvent
+                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_BKUPWrite
+                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_BKUPRead
+                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_SetSmoothCalib
+                0x0000000000000000       0xb6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_SetSynchroShift
+                0x0000000000000000       0xf8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_SetCalibrationOutPut
+                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_DeactivateCalibrationOutPut
+                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_SetRefClock
+                0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_DeactivateRefClock
+                0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_EnableBypassShadow
+                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_DisableBypassShadow
+                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_AlarmBEventCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .text.HAL_RTCEx_PollForAlarmBEvent
+                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_DeInit
+                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_IRQHandler
+                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_RefreshErrorCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_DMA_XferCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_DMA_XferErrorCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_Read_8b
+                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_Write_8b
+                0x0000000000000000       0x86 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_Read_16b
+                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_Write_16b
+                0x0000000000000000       0x86 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_Read_32b
+                0x0000000000000000       0x7e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_Write_32b
+                0x0000000000000000       0x86 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_Read_DMA
+                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_Write_DMA
+                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_WriteProtection_Enable
+                0x0000000000000000       0x42 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_WriteProtection_Disable
+                0x0000000000000000       0x42 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_SetAutoRefreshNumber
+                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_GetModeStatus
+                0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .text.HAL_SDRAM_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_DeInit
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_Transmit
+                0x0000000000000000      0x2cc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_Receive
+                0x0000000000000000      0x250 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_TransmitReceive
+                0x0000000000000000      0x426 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_Transmit_IT
+                0x0000000000000000      0x10c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_Receive_IT
+                0x0000000000000000      0x150 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_TransmitReceive_IT
+                0x0000000000000000      0x160 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_Transmit_DMA
+                0x0000000000000000      0x1d8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_Receive_DMA
+                0x0000000000000000      0x238 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_TransmitReceive_DMA
+                0x0000000000000000      0x318 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_Abort
+                0x0000000000000000      0x240 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_Abort_IT
+                0x0000000000000000      0x1f4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_DMAPause
+                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_DMAResume
+                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_DMAStop
+                0x0000000000000000       0x7e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_IRQHandler
+                0x0000000000000000      0x200 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_TxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_RxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_TxRxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_TxHalfCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_RxHalfCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_TxRxHalfCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_ErrorCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_AbortCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.HAL_SPI_GetError
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_DMATransmitCplt
+                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_DMAReceiveCplt
+                0x0000000000000000       0x86 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_DMATransmitReceiveCplt
+                0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_DMAHalfTransmitCplt
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_DMAHalfReceiveCplt
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_DMAHalfTransmitReceiveCplt
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_DMAError
+                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_DMAAbortOnError
+                0x0000000000000000       0x2a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_DMATxAbortCallback
+                0x0000000000000000       0xde Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_DMARxAbortCallback
+                0x0000000000000000       0xe2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_2linesRxISR_8BIT
+                0x0000000000000000       0xbe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_2linesTxISR_8BIT
+                0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_2linesRxISR_16BIT
+                0x0000000000000000       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_2linesTxISR_16BIT
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_RxISR_8BIT
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_RxISR_16BIT
+                0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_TxISR_8BIT
+                0x0000000000000000       0x46 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_TxISR_16BIT
+                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_WaitFlagStateUntilTimeout
+                0x0000000000000000       0xd4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_WaitFifoStateUntilTimeout
+                0x0000000000000000       0xda Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_EndRxTransaction
+                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_EndRxTxTransaction
+                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_CloseRxTx_ISR
+                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_CloseRx_ISR
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_CloseTx_ISR
+                0x0000000000000000       0x7e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_AbortRx_ISR
+                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .text.SPI_AbortTx_ISR
+                0x0000000000000000      0x144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .text.HAL_SPIEx_FlushRxFifo
+                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_info    0x0000000000000000      0x6dc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_abbrev  0x0000000000000000      0x162 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_aranges
+                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_ranges  0x0000000000000000       0x10 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x2b0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_line    0x0000000000000000      0x8a6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_str     0x0000000000000000   0x103fe3 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .debug_frame   0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_DeInit
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_Start
+                0x0000000000000000       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_Stop
+                0x0000000000000000       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_Stop_IT
+                0x0000000000000000       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_Start_DMA
+                0x0000000000000000       0xcc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_Stop_DMA
+                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_Init
+                0x0000000000000000       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_DeInit
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_Start
+                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_Stop
+                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_Start_IT
+                0x0000000000000000      0x114 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_Stop_IT
+                0x0000000000000000      0x134 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_Start_DMA
+                0x0000000000000000      0x230 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_Stop_DMA
+                0x0000000000000000      0x164 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_DeInit
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_Start
+                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_Stop
+                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_Start_IT
+                0x0000000000000000      0x114 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_Stop_IT
+                0x0000000000000000      0x134 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_Start_DMA
+                0x0000000000000000      0x230 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_Stop_DMA
+                0x0000000000000000      0x164 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_Init
+                0x0000000000000000       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_DeInit
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_Start
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_Stop
+                0x0000000000000000       0x52 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_Start_IT
+                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_Stop_IT
+                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_Start_DMA
+                0x0000000000000000      0x1f8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_Stop_DMA
+                0x0000000000000000      0x110 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OnePulse_Init
+                0x0000000000000000       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OnePulse_DeInit
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OnePulse_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OnePulse_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OnePulse_Start
+                0x0000000000000000       0x68 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OnePulse_Stop
+                0x0000000000000000       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OnePulse_Start_IT
+                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OnePulse_Stop_IT
+                0x0000000000000000       0xd8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Encoder_Init
+                0x0000000000000000      0x124 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Encoder_DeInit
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Encoder_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Encoder_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Encoder_Start
+                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Encoder_Stop
+                0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Encoder_Start_IT
+                0x0000000000000000       0xae Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Encoder_Stop_IT
+                0x0000000000000000       0xd4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Encoder_Start_DMA
+                0x0000000000000000      0x1f4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Encoder_Stop_DMA
+                0x0000000000000000       0xfc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_ConfigChannel
+                0x0000000000000000       0xfc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_ConfigChannel
+                0x0000000000000000      0x138 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OnePulse_ConfigChannel
+                0x0000000000000000      0x184 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_DMABurst_WriteStart
+                0x0000000000000000      0x284 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_DMABurst_WriteStop
+                0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_DMABurst_ReadStart
+                0x0000000000000000      0x284 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_DMABurst_ReadStop
+                0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_GenerateEvent
+                0x0000000000000000       0x4e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_ConfigOCrefClear
+                0x0000000000000000      0x204 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_ConfigTI1Input
+                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_SlaveConfigSynchro_IT
+                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_ReadCapturedValue
+                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PeriodElapsedCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PeriodElapsedHalfCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_CaptureHalfCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_TriggerHalfCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_ErrorCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OnePulse_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Encoder_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_DMAError
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_DMADelayPulseCplt
+                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_DMADelayPulseHalfCplt
+                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_DMACaptureCplt
+                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_DMACaptureHalfCplt
+                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_DMAPeriodElapsedCplt
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_DMAPeriodElapsedHalfCplt
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_DMATriggerCplt
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_DMATriggerHalfCplt
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_TI1_SetConfig
+                0x0000000000000000       0xe8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_TI2_SetConfig
+                0x0000000000000000       0x7a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_TI3_SetConfig
+                0x0000000000000000       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_TI4_SetConfig
+                0x0000000000000000       0x7a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_CCxChannelCmd
+                0x0000000000000000       0x4a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_HallSensor_Init
+                0x0000000000000000      0x130 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_HallSensor_DeInit
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_HallSensor_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_HallSensor_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_HallSensor_Start
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_HallSensor_Stop
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_HallSensor_Start_IT
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_HallSensor_Stop_IT
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_HallSensor_Start_DMA
+                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_HallSensor_Stop_DMA
+                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_OCN_Start
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_OCN_Stop
+                0x0000000000000000       0x82 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_OCN_Start_IT
+                0x0000000000000000       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_OCN_Stop_IT
+                0x0000000000000000       0xec Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_OCN_Start_DMA
+                0x0000000000000000      0x18c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_OCN_Stop_DMA
+                0x0000000000000000       0xee Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_PWMN_Start
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_PWMN_Stop
+                0x0000000000000000       0x82 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_PWMN_Start_IT
+                0x0000000000000000       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_PWMN_Stop_IT
+                0x0000000000000000       0xec Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_PWMN_Start_DMA
+                0x0000000000000000      0x18c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_PWMN_Stop_DMA
+                0x0000000000000000       0xee Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_OnePulseN_Start
+                0x0000000000000000       0x32 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_OnePulseN_Stop
+                0x0000000000000000       0x82 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_OnePulseN_Start_IT
+                0x0000000000000000       0x52 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_OnePulseN_Stop_IT
+                0x0000000000000000       0xa2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_ConfigCommutEvent
+                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_ConfigCommutEvent_IT
+                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_ConfigCommutEvent_DMA
+                0x0000000000000000       0xe4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_RemapConfig
+                0x0000000000000000       0x46 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_GroupChannel5
+                0x0000000000000000       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_CommutHalfCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_HallSensor_GetState
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.TIMEx_DMACommutationCplt
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.TIMEx_DMACommutationHalfCplt
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .text.TIM_CCxNChannelCmd
+                0x0000000000000000       0x4a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_HalfDuplex_Init
+                0x0000000000000000       0xac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_LIN_Init
+                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_MultiProcessor_Init
+                0x0000000000000000       0xd4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_DeInit
+                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_MspInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_MspDeInit
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_Transmit
+                0x0000000000000000      0x122 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_Receive
+                0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_Transmit_IT
+                0x0000000000000000       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_Receive_IT
+                0x0000000000000000      0x144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_Transmit_DMA
+                0x0000000000000000       0xf8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_Receive_DMA
+                0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_DMAPause
+                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_DMAResume
+                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_DMAStop
+                0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_Abort
+                0x0000000000000000      0x11c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_AbortTransmit
+                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_AbortReceive
+                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_Abort_IT
+                0x0000000000000000      0x16c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_AbortTransmit_IT
+                0x0000000000000000       0xac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_AbortReceive_IT
+                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_IRQHandler
+                0x0000000000000000      0x264 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_TxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_TxHalfCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_RxCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_RxHalfCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_ErrorCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_AbortCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_AbortTransmitCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_AbortReceiveCpltCallback
+                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_ReceiverTimeout_Config
+                0x0000000000000000       0x2a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_EnableReceiverTimeout
+                0x0000000000000000       0x5c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_DisableReceiverTimeout
+                0x0000000000000000       0x5c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_MultiProcessor_EnableMuteMode
+                0x0000000000000000       0x4a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_MultiProcessor_DisableMuteMode
+                0x0000000000000000       0x4a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_MultiProcessor_EnterMuteMode
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_HalfDuplex_EnableTransmitter
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_HalfDuplex_EnableReceiver
+                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_LIN_SendBreak
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_GetState
+                0x0000000000000000       0x26 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.HAL_UART_GetError
+                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_EndTxTransfer
+                0x0000000000000000       0x2a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_EndRxTransfer
+                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_DMATransmitCplt
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_DMATxHalfCplt
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_DMAReceiveCplt
+                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_DMARxHalfCplt
+                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_DMAError
+                0x0000000000000000       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_DMAAbortOnError
+                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_DMATxAbortCallback
+                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_DMARxAbortCallback
+                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_DMATxOnlyAbortCallback
+                0x0000000000000000       0x2a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_DMARxOnlyAbortCallback
+                0x0000000000000000       0x42 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_TxISR_8BIT
+                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_TxISR_16BIT
+                0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_EndTransmit_IT
+                0x0000000000000000       0x32 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_RxISR_8BIT
+                0x0000000000000000       0xa6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .text.UART_RxISR_16BIT
+                0x0000000000000000       0xa6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .text.HAL_RS485Ex_Init
+                0x0000000000000000       0xd0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .text.HAL_MultiProcessorEx_AddressLength_Set
+                0x0000000000000000       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_info    0x0000000000000000      0x773 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_abbrev  0x0000000000000000      0x17c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_aranges
+                0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_ranges  0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_line    0x0000000000000000      0x8c8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_str     0x0000000000000000   0x104007 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .debug_frame   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NORSRAM_Init
+                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NORSRAM_DeInit
+                0x0000000000000000       0x68 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NORSRAM_Timing_Init
+                0x0000000000000000       0xa6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NORSRAM_Extended_Timing_Init
+                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NORSRAM_WriteOperation_Enable
+                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NORSRAM_WriteOperation_Disable
+                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NAND_Init
+                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NAND_CommonSpace_Timing_Init
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NAND_AttributeSpace_Timing_Init
+                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NAND_DeInit
+                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NAND_ECC_Enable
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NAND_ECC_Disable
+                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_NAND_GetECC
+                0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_SDRAM_DeInit
+                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_SDRAM_WriteProtection_Enable
+                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_SDRAM_WriteProtection_Disable
+                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_SDRAM_SetAutoRefreshNumber
+                0x0000000000000000       0x26 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .text.FMC_SDRAM_GetModeStatus
+                0x0000000000000000       0x3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x2dd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0xd5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0xccf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/App/lwip.o
+ .text          0x0000000000000000        0x0 LWIP/App/lwip.o
+ .data          0x0000000000000000        0x0 LWIP/App/lwip.o
+ .bss           0x0000000000000000        0x0 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0xa5a LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x2dd LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x2e LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x3b LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x22 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x8e LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x51 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xef LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x6a LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x1df LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x22 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xdf LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000     0x12cd LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x11f LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x19 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000    0x190f0 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x43 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000     0x36b4 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x174 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x61 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000     0x18ad LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x6c4 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x185 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x117 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x1fe LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x27 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x24f LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x41 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x58 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x236 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x416 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x153 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x107 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xd5 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x4c LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x20f LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xea LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xa0 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x3c LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0xccf LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x14f LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x25b LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x12 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x514 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x22c LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x5a LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xa5 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x198 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xd6 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x12f LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x108 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x35 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xa4 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x313 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x4ca LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xd6 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x2fe LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0xa2f LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x59 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x53c LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x44 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x14e LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x3f9 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xd0 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x18 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x46 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x3c LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x34 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x35 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x52 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x1f LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x43 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x20 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x1a3 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x32a LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x29 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x52 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x40 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x40 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xd7 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x3d LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x145 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x88 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x35 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x28 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x17 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x460 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x43 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x2b LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x118 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x19 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x111 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x82 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x66 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x739 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x3f LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x25 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x15b LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x22 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xb3 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x6a LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x1bd LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x169 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x13d LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xa0 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x28 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x46 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x22 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x2e LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xea LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x4d LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x29 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x109 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x15a LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xde LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x26 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000      0x4c5 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xb5 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xaa LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x91 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x8d LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x9a LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x19 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0xf2 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x73 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/App/lwip.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/App/lwip.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc LWIP/Target/ethernetif.o
+ .text          0x0000000000000000        0x0 LWIP/Target/ethernetif.o
+ .data          0x0000000000000000        0x0 LWIP/Target/ethernetif.o
+ .bss           0x0000000000000000        0x0 LWIP/Target/ethernetif.o
+ .text.HAL_ETH_MspDeInit
+                0x0000000000000000       0x74 LWIP/Target/ethernetif.o
+ .text.sys_jiffies
+                0x0000000000000000        0xe LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0xa5a LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x2dd LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x2e LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x3b LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x22 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x8e LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x51 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xef LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x6a LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x1df LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x22 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xdf LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000     0x12cd LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x11f LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x19 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000    0x190f0 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x43 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000     0x36b4 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x174 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x61 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000     0x18ad LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x6c4 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x185 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x117 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x1fe LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x27 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x24f LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x41 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x58 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x236 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x416 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x153 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x107 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xd5 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x4c LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x20f LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xea LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xa0 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x3c LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0xccf LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x14f LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x25b LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x12 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x514 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x22c LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x5a LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xa5 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x198 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xd6 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x12f LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x108 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x35 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xa4 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x313 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x4ca LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xd6 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x2fe LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0xa2f LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x59 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x53c LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x44 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x14e LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x3f9 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xd6 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x18 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x46 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x3c LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x34 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x35 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x52 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x1f LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x43 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x20 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x1a3 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x32a LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x29 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x52 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x40 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x40 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xd7 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x3d LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x145 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x88 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x35 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x28 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x17 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x460 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x43 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x2b LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x118 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x19 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x111 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x82 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x66 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x739 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x109 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x15a LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xde LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x26 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x4c5 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xb5 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xaa LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x91 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x8d LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x9a LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x19 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xf2 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x73 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x6a LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x169 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x10 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x3f LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x25 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x22 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x15b LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000      0x13d LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x46 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0xa0 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x28 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x22 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x16 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000000000       0x1c LWIP/Target/ethernetif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.makeCmsisPriority
+                0x0000000000000000       0x2c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osKernelRunning
+                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osThreadGetId
+                0x0000000000000000        0xe Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osThreadTerminate
+                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osThreadYield
+                0x0000000000000000       0x24 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osThreadSetPriority
+                0x0000000000000000       0x2a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osThreadGetPriority
+                0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osTimerCreate
+                0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osTimerStart
+                0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osTimerStop
+                0x0000000000000000       0x1e Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osTimerDelete
+                0x0000000000000000       0x1e Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osSignalSet
+                0x0000000000000000       0x80 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osSignalWait
+                0x0000000000000000       0x98 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osMutexDelete
+                0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osSemaphoreDelete
+                0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osPoolCreate
+                0x0000000000000000       0xba Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osPoolAlloc
+                0x0000000000000000       0xc8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osPoolCAlloc
+                0x0000000000000000       0x2a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osPoolFree
+                0x0000000000000000       0x82 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osMailCreate
+                0x0000000000000000       0xb0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osMailAlloc
+                0x0000000000000000       0x2a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osMailCAlloc
+                0x0000000000000000       0x46 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osMailPut
+                0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osMailGet
+                0x0000000000000000       0xe8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osMailFree
+                0x0000000000000000       0x2a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osSystickHandler
+                0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osThreadSuspend
+                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osThreadResume
+                0x0000000000000000       0x44 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osThreadSuspendAll
+                0x0000000000000000        0xe Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osThreadResumeAll
+                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osDelayUntil
+                0x0000000000000000       0x2c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osAbortDelay
+                0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osThreadList
+                0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osMessagePeek
+                0x0000000000000000       0x96 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osMessageWaiting
+                0x0000000000000000       0x2c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osMessageAvailableSpace
+                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osMessageDelete
+                0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osRecursiveMutexCreate
+                0x0000000000000000       0x30 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osRecursiveMutexRelease
+                0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osRecursiveMutexWait
+                0x0000000000000000       0x58 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osSemaphoreGetCount
+                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_info    0x0000000000000000       0x97 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_abbrev  0x0000000000000000       0x47 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0xe3 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_line    0x0000000000000000      0x4c2 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .debug_str     0x0000000000000000     0x8278 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text.xEventGroupCreateStatic
+                0x0000000000000000       0x72 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text.xEventGroupCreate
+                0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text.xEventGroupSync
+                0x0000000000000000      0x164 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text.xEventGroupWaitBits
+                0x0000000000000000      0x1a4 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text.xEventGroupClearBits
+                0x0000000000000000       0x74 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text.xEventGroupGetBitsFromISR
+                0x0000000000000000       0x4a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text.xEventGroupSetBits
+                0x0000000000000000      0x11a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text.vEventGroupDelete
+                0x0000000000000000       0x6c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text.vEventGroupSetBitsCallback
+                0x0000000000000000       0x1a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text.vEventGroupClearBitsCallback
+                0x0000000000000000       0x1a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .text.prvTestWaitCondition
+                0x0000000000000000       0x44 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_info    0x0000000000000000     0x123e Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_abbrev  0x0000000000000000      0x2da Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_aranges
+                0x0000000000000000       0x70 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_ranges  0x0000000000000000       0x60 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000      0x1d3 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_line    0x0000000000000000      0x8d2 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_str     0x0000000000000000     0xbbed Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .debug_frame   0x0000000000000000      0x1a4 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.xQueueGiveMutexRecursive
+                0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.xQueueTakeMutexRecursive
+                0x0000000000000000       0x6e Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.xQueuePeek
+                0x0000000000000000      0x1c8 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.xQueuePeekFromISR
+                0x0000000000000000       0xda Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.uxQueueMessagesWaiting
+                0x0000000000000000       0x3e Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.uxQueueSpacesAvailable
+                0x0000000000000000       0x48 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.uxQueueMessagesWaitingFromISR
+                0x0000000000000000       0x3e Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.vQueueDelete
+                0x0000000000000000       0x48 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.xQueueIsQueueEmptyFromISR
+                0x0000000000000000       0x4a Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.xQueueIsQueueFullFromISR
+                0x0000000000000000       0x4e Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.vQueueAddToRegistry
+                0x0000000000000000       0x50 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.pcQueueGetName
+                0x0000000000000000       0x4c Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.vQueueUnregisterQueue
+                0x0000000000000000       0x54 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ COMMON         0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferGenericCreate
+                0x0000000000000000       0xbc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferGenericCreateStatic
+                0x0000000000000000      0x10c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.vStreamBufferDelete
+                0x0000000000000000       0x50 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferReset
+                0x0000000000000000       0x6e Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferSetTriggerLevel
+                0x0000000000000000       0x5e Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferSpacesAvailable
+                0x0000000000000000       0x68 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferBytesAvailable
+                0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferSend
+                0x0000000000000000      0x172 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferSendFromISR
+                0x0000000000000000       0xe8 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.prvWriteMessageToBuffer
+                0x0000000000000000       0x7a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferReceive
+                0x0000000000000000      0x130 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferNextMessageLengthBytes
+                0x0000000000000000       0x96 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferReceiveFromISR
+                0x0000000000000000       0xe4 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.prvReadMessageFromBuffer
+                0x0000000000000000       0x64 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferIsEmpty
+                0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferIsFull
+                0x0000000000000000       0x62 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferSendCompletedFromISR
+                0x0000000000000000       0x8a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.xStreamBufferReceiveCompletedFromISR
+                0x0000000000000000       0x8a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.prvWriteBytesToBuffer
+                0x0000000000000000       0xea Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.prvReadBytesFromBuffer
+                0x0000000000000000       0xfa Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.prvBytesInBuffer
+                0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .text.prvInitialiseNewStreamBuffer
+                0x0000000000000000       0x68 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_info    0x0000000000000000     0x1b2c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_abbrev  0x0000000000000000      0x32b Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_aranges
+                0x0000000000000000       0xc8 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_ranges  0x0000000000000000       0xb8 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000      0x1d3 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_line    0x0000000000000000      0xc25 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_str     0x0000000000000000     0xbb20 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .debug_frame   0x0000000000000000      0x358 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.vTaskDelete
+                0x0000000000000000      0x120 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.uxTaskPriorityGet
+                0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.uxTaskPriorityGetFromISR
+                0x0000000000000000       0x5c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.vTaskPrioritySet
+                0x0000000000000000      0x154 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.vTaskSuspend
+                0x0000000000000000      0x128 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.prvTaskIsTaskSuspended
+                0x0000000000000000       0x64 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.vTaskResume
+                0x0000000000000000       0xbc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.xTaskResumeFromISR
+                0x0000000000000000       0xe8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.vTaskEndScheduler
+                0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.uxTaskGetNumberOfTasks
+                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.pcTaskGetName
+                0x0000000000000000       0x4c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.vTaskSetApplicationTaskTag
+                0x0000000000000000       0x38 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.xTaskGetApplicationTaskTag
+                0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.xTaskGetApplicationTaskTagFromISR
+                0x0000000000000000       0x5c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.xTaskCallApplicationTaskHook
+                0x0000000000000000       0x44 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.vTaskPlaceOnUnorderedEventList
+                0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.vTaskRemoveFromUnorderedEventList
+                0x0000000000000000       0xc8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.vTaskSetTimeOutState
+                0x0000000000000000       0x50 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.xTaskGetCurrentTaskHandle
+                0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.uxTaskResetEventItemValue
+                0x0000000000000000       0x30 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.ulTaskNotifyTake
+                0x0000000000000000       0x90 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.xTaskNotifyWait
+                0x0000000000000000       0xb4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.xTaskGenericNotify
+                0x0000000000000000      0x170 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.xTaskGenericNotifyFromISR
+                0x0000000000000000      0x1c0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.vTaskNotifyGiveFromISR
+                0x0000000000000000      0x128 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.xTaskNotifyStateClear
+                0x0000000000000000       0x4c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_info    0x0000000000000000      0x8ad Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_abbrev  0x0000000000000000      0x158 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000      0x1b1 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x87 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_macro   0x0000000000000000       0x97 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_line    0x0000000000000000      0x60f Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .debug_str     0x0000000000000000     0xbc96 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/FreeRTOS/Source/timers.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .rodata.pcInterruptPriorityRegisters
+                0x0000000000000000        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .text.vPortEndScheduler
+                0x0000000000000000       0x38 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .rodata.xHeapStructSize
+                0x0000000000000000        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .text.xPortGetFreeHeapSize
+                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .text.xPortGetMinimumEverFreeHeapSize
+                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .text.vPortInitialiseBlocks
+                0x0000000000000000        0xe Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_apimsg
+                0x0000000000000000       0x3a Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .rodata        0x0000000000000000      0x358 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_new_with_proto_and_callback
+                0x0000000000000000       0xf4 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_prepare_delete
+                0x0000000000000000       0x48 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_delete
+                0x0000000000000000       0x36 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_getaddr
+                0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_bind
+                0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_bind_if
+                0x0000000000000000       0x5c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_connect
+                0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_disconnect
+                0x0000000000000000       0x54 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_listen_with_backlog
+                0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_accept
+                0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_recv_data
+                0x0000000000000000      0x190 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_tcp_recvd_msg
+                0x0000000000000000       0x60 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_tcp_recvd
+                0x0000000000000000       0x5c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_recv_data_tcp
+                0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_recv_tcp_pbuf
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_recv_tcp_pbuf_flags
+                0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_recv_udp_raw_netbuf
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_recv_udp_raw_netbuf_flags
+                0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_recv
+                0x0000000000000000       0xf4 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_sendto
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_send
+                0x0000000000000000       0x5c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_write_partly
+                0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_write_vectors_partly
+                0x0000000000000000      0x170 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_close_shutdown
+                0x0000000000000000       0x60 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_close
+                0x0000000000000000       0x1a Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_err
+                0x0000000000000000       0x36 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .text.netconn_shutdown
+                0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_info    0x0000000000000000     0x25f2 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_abbrev  0x0000000000000000      0x2cf Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_aranges
+                0x0000000000000000       0xf8 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_ranges  0x0000000000000000       0xe8 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x841 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x3a Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xda Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x149 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x4d Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x23 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000      0x1d7 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_line    0x0000000000000000     0x14c7 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_str     0x0000000000000000   0x11b1d8 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .debug_frame   0x0000000000000000      0x400 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/api/api_lib.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .rodata.netconn_aborted
+                0x0000000000000000        0x1 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .rodata.netconn_reset
+                0x0000000000000000        0x1 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .rodata.netconn_closed
+                0x0000000000000000        0x1 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .rodata        0x0000000000000000      0x555 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_err_to_msg
+                0x0000000000000000       0x64 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_is_err_msg
+                0x0000000000000000       0x74 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.recv_udp
+                0x0000000000000000       0xfc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.recv_tcp
+                0x0000000000000000      0x10c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.poll_tcp
+                0x0000000000000000       0xc8 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.sent_tcp
+                0x0000000000000000       0xa8 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.err_tcp  0x0000000000000000      0x1ac Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.setup_tcp
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.accept_function
+                0x0000000000000000      0x178 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.pcb_new  0x0000000000000000       0xd4 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_newconn
+                0x0000000000000000       0x2a Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.netconn_alloc
+                0x0000000000000000       0xdc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.netconn_free
+                0x0000000000000000       0x94 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.netconn_drain
+                0x0000000000000000       0xfa Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_close_internal
+                0x0000000000000000      0x2cc Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_delconn
+                0x0000000000000000      0x1c8 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_bind
+                0x0000000000000000       0x76 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_bind_if
+                0x0000000000000000       0x78 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_connected
+                0x0000000000000000      0x120 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_connect
+                0x0000000000000000      0x17c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_disconnect
+                0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_listen
+                0x0000000000000000      0x130 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_send
+                0x0000000000000000       0x9c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_recv
+                0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_writemore
+                0x0000000000000000      0x398 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_write
+                0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_getaddr
+                0x0000000000000000      0x10c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .text.lwip_netconn_do_close
+                0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_info    0x0000000000000000     0x24f8 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_abbrev  0x0000000000000000      0x315 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_aranges
+                0x0000000000000000       0xf8 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_ranges  0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x81f Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xda Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x23 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x4d Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_line    0x0000000000000000     0x1808 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_str     0x0000000000000000   0x119cd6 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .debug_frame   0x0000000000000000      0x410 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/api/api_msg.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/err.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/err.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/err.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/err.o
+ .rodata.err_to_errno_table
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/err.o
+ .text.err_to_errno
+                0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_info    0x0000000000000000      0xa60 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_abbrev  0x0000000000000000      0x1ba Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_aranges
+                0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_ranges  0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x631 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_macro   0x0000000000000000      0x320 Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_line    0x0000000000000000      0xe2f Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_str     0x0000000000000000   0x113efe Middlewares/Third_Party/LwIP/src/api/err.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/api/err.o
+ .debug_frame   0x0000000000000000       0x38 Middlewares/Third_Party/LwIP/src/api/err.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/api/err.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .text.lwip_if_indextoname
+                0x0000000000000000       0x24 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .text.lwip_if_nametoindex
+                0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_info    0x0000000000000000      0xe34 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_abbrev  0x0000000000000000      0x1c7 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_aranges
+                0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_ranges  0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x735 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x320 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xf4 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x407 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_macro   0x0000000000000000       0x24 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_line    0x0000000000000000      0xf64 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_str     0x0000000000000000   0x118a5e Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .debug_frame   0x0000000000000000       0x60 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/api/if_api.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .text.netbuf_new
+                0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .text.netbuf_delete
+                0x0000000000000000       0x3e Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .rodata        0x0000000000000000      0x196 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .text.netbuf_alloc
+                0x0000000000000000       0x94 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .text.netbuf_free
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .text.netbuf_ref
+                0x0000000000000000       0x94 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .text.netbuf_chain
+                0x0000000000000000       0x68 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .text.netbuf_data
+                0x0000000000000000       0x94 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .text.netbuf_next
+                0x0000000000000000       0x60 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .text.netbuf_first
+                0x0000000000000000       0x38 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_info    0x0000000000000000      0xee0 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_abbrev  0x0000000000000000      0x216 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_aranges
+                0x0000000000000000       0x60 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_ranges  0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x616 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x3a Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_line    0x0000000000000000      0xe74 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_str     0x0000000000000000   0x11005d Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .debug_frame   0x0000000000000000      0x154 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/api/netbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x549 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_line    0x0000000000000000      0xc6d Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .debug_str     0x0000000000000000   0x10d03c Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/api/netdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_line    0x0000000000000000      0xc65 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .debug_str     0x0000000000000000   0x10d02d Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/api/netifapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .bss.sockets   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .bss.select_cb_list
+                0x0000000000000000        0x4 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_socket_thread_init
+                0x0000000000000000        0xe Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_socket_thread_cleanup
+                0x0000000000000000        0xe Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.tryget_socket_unconn_nouse
+                0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_socket_dbg_get_socket
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.tryget_socket_unconn
+                0x0000000000000000       0x1a Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.tryget_socket_unconn_locked
+                0x0000000000000000       0x1a Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.tryget_socket
+                0x0000000000000000       0x2c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.get_socket
+                0x0000000000000000       0x30 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .rodata        0x0000000000000000      0x3ce Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.alloc_socket
+                0x0000000000000000       0xd8 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.free_socket_locked
+                0x0000000000000000       0x38 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.free_socket_free_elements
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.free_socket
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_accept
+                0x0000000000000000      0x23c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_bind
+                0x0000000000000000       0xdc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_close
+                0x0000000000000000       0xac Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_connect
+                0x0000000000000000      0x100 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_listen
+                0x0000000000000000       0xa8 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_recv_tcp
+                0x0000000000000000      0x220 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_sock_make_addr
+                0x0000000000000000       0xdc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_recv_tcp_from
+                0x0000000000000000       0x64 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_recvfrom_udp_raw
+                0x0000000000000000      0x1a8 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_recvfrom
+                0x0000000000000000      0x128 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_read
+                0x0000000000000000       0x2a Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_readv
+                0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_recv
+                0x0000000000000000       0x2c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_recvmsg
+                0x0000000000000000      0x23c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_send
+                0x0000000000000000       0xbc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_sendmsg
+                0x0000000000000000      0x33c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_sendto
+                0x0000000000000000      0x164 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_socket
+                0x0000000000000000       0xb0 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_write
+                0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_writev
+                0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_link_select_cb
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_unlink_select_cb
+                0x0000000000000000       0x90 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_selscan
+                0x0000000000000000      0x2a8 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_select
+                0x0000000000000000      0x3bc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_pollscan
+                0x0000000000000000      0x218 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_poll
+                0x0000000000000000      0x14c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_poll_should_wake
+                0x0000000000000000       0x86 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.event_callback
+                0x0000000000000000      0x178 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.select_check_waiters
+                0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_shutdown
+                0x0000000000000000       0xfc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_getaddrname
+                0x0000000000000000       0xd8 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_getpeername
+                0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_getsockname
+                0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_getsockopt
+                0x0000000000000000       0x90 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_sockopt_to_ipopt
+                0x0000000000000000       0x48 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_getsockopt_impl
+                0x0000000000000000      0x30c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_setsockopt
+                0x0000000000000000       0x90 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_setsockopt_impl
+                0x0000000000000000      0x318 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_ioctl
+                0x0000000000000000       0xa8 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_fcntl
+                0x0000000000000000      0x150 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_inet_ntop
+                0x0000000000000000       0x60 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .text.lwip_inet_pton
+                0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_info    0x0000000000000000     0x3e09 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_abbrev  0x0000000000000000      0x2dc Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_aranges
+                0x0000000000000000      0x1c8 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_ranges  0x0000000000000000      0x230 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x918 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xf4 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x320 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x407 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x24 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xda Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x4d Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_line    0x0000000000000000     0x1fe2 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_str     0x0000000000000000   0x11cc22 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .debug_frame   0x0000000000000000      0x7e4 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/api/sockets.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.tcpip_callback
+                0x0000000000000000       0x6c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.tcpip_send_msg_wait_sem
+                0x0000000000000000       0x2c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.tcpip_api_call
+                0x0000000000000000       0x30 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.tcpip_callbackmsg_new
+                0x0000000000000000       0x38 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.tcpip_callbackmsg_delete
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.tcpip_callbackmsg_trycallback
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.tcpip_callbackmsg_trycallback_fromisr
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.pbuf_free_int
+                0x0000000000000000       0x1a Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.pbuf_free_callback
+                0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.mem_free_callback
+                0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x5e Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.msg_generate_packet_id
+                0x0000000000000000       0x38 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_ringbuf_put
+                0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_ringbuf_get_ptr
+                0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .rodata        0x0000000000000000      0x7ad Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_ringbuf_advance_get_idx
+                0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_ringbuf_len
+                0x0000000000000000       0x36 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_output_send
+                0x0000000000000000      0x168 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_create_request
+                0x0000000000000000       0x8c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_append_request
+                0x0000000000000000       0x98 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_delete_request
+                0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_take_request
+                0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_request_time_elapsed
+                0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_clear_requests
+                0x0000000000000000       0x54 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_init_requests
+                0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_output_append_u8
+                0x0000000000000000       0x1e Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_output_append_u16
+                0x0000000000000000       0x30 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_output_append_buf
+                0x0000000000000000       0x3a Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_output_append_string
+                0x0000000000000000       0x56 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_output_append_fixed_header
+                0x0000000000000000       0x92 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_output_check_space
+                0x0000000000000000       0x64 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_close
+                0x0000000000000000       0xc0 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_cyclic_timer
+                0x0000000000000000      0x130 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.pub_ack_rec_rel_response
+                0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_incomming_suback
+                0x0000000000000000       0x36 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_message_received
+                0x0000000000000000      0x368 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_parse_incoming
+                0x0000000000000000      0x1ac Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_tcp_recv_cb
+                0x0000000000000000       0xbc Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_tcp_sent_cb
+                0x0000000000000000       0x74 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_tcp_err_cb
+                0x0000000000000000       0x48 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_tcp_poll_cb
+                0x0000000000000000       0x2c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_tcp_connect_cb
+                0x0000000000000000       0x84 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_publish
+                0x0000000000000000      0x1a8 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_sub_unsub
+                0x0000000000000000      0x1ac Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_set_inpub_callback
+                0x0000000000000000       0x48 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_client_new
+                0x0000000000000000       0x14 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_client_free
+                0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_client_connect
+                0x0000000000000000      0x4f8 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_disconnect
+                0x0000000000000000       0x48 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .text.mqtt_client_is_connected
+                0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_info    0x0000000000000000     0x264a Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_abbrev  0x0000000000000000      0x346 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_aranges
+                0x0000000000000000      0x148 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_ranges  0x0000000000000000      0x190 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x805 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x1e Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x115 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_line    0x0000000000000000     0x17ca Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_str     0x0000000000000000   0x1198d3 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .debug_frame   0x0000000000000000      0x590 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_line    0x0000000000000000      0xc63 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .debug_str     0x0000000000000000   0x10d02b Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/altcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_line    0x0000000000000000      0xc69 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .debug_str     0x0000000000000000   0x10d031 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_line    0x0000000000000000      0xc67 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .debug_str     0x0000000000000000   0x10d02f Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/def.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/def.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/def.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/def.o
+ .text.lwip_strnstr
+                0x0000000000000000       0x6c Middlewares/Third_Party/LwIP/src/core/def.o
+ .text.lwip_stricmp
+                0x0000000000000000       0x68 Middlewares/Third_Party/LwIP/src/core/def.o
+ .text.lwip_strnicmp
+                0x0000000000000000       0x76 Middlewares/Third_Party/LwIP/src/core/def.o
+ .text.lwip_itoa
+                0x0000000000000000       0xe8 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/def.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/dns.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_line    0x0000000000000000      0xc61 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .debug_str     0x0000000000000000   0x10d029 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/dns.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/dns.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .text.lwip_standard_chksum
+                0x0000000000000000       0xba Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .text.inet_cksum_pseudo_base
+                0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .text.inet_chksum_pseudo
+                0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .text.ip_chksum_pseudo
+                0x0000000000000000       0x2c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .rodata        0x0000000000000000       0x6c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .text.inet_cksum_pseudo_partial_base
+                0x0000000000000000      0x128 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .text.inet_chksum_pseudo_partial
+                0x0000000000000000       0x7e Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .text.ip_chksum_pseudo_partial
+                0x0000000000000000       0x3a Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .text.inet_chksum
+                0x0000000000000000       0x24 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .text.inet_chksum_pbuf
+                0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_info    0x0000000000000000      0xf0e Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_abbrev  0x0000000000000000      0x242 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_aranges
+                0x0000000000000000       0x60 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_ranges  0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x5c7 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_line    0x0000000000000000      0xe17 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_str     0x0000000000000000   0x10f3da Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .debug_frame   0x0000000000000000      0x158 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/init.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/init.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/init.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x5e Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xf4 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x320 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x407 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x4d Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000      0x1d7 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000000000       0xda Middlewares/Third_Party/LwIP/src/core/init.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ip.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/mem.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .text.mem_calloc
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .text.memp_malloc_pool
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .text.memp_free_pool
+                0x0000000000000000       0x48 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x4d Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x1d7 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x23 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0xf4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x320 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000      0x407 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x24 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_input
+                0x0000000000000000       0x6c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_add_noaddr
+                0x0000000000000000       0x30 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_set_ipaddr
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_set_netmask
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_set_gw
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_remove
+                0x0000000000000000       0x9c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_name_to_index
+                0x0000000000000000       0x2c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_index_to_name
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_find
+                0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x1d7 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x4d Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_add_header_force
+                0x0000000000000000       0x1e Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_header
+                0x0000000000000000       0x24 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_free_header
+                0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_dechain
+                0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_get_contiguous
+                0x0000000000000000       0xc4 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_skip_const
+                0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_skip
+                0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_take
+                0x0000000000000000      0x124 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_take_at
+                0x0000000000000000       0xd4 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_coalesce
+                0x0000000000000000       0x42 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_get_at
+                0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_try_get_at
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_put_at
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_memcmp
+                0x0000000000000000       0xb0 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_memfind
+                0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_strstr
+                0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000      0x1d7 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/raw.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_line    0x0000000000000000      0xc61 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .debug_str     0x0000000000000000   0x10d029 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/raw.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/raw.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/stats.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_line    0x0000000000000000      0xc63 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .debug_str     0x0000000000000000   0x10d02b Middlewares/Third_Party/LwIP/src/core/stats.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/stats.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/stats.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/sys.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .text.sys_msleep
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_info    0x0000000000000000      0xb01 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_abbrev  0x0000000000000000      0x1d9 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_aranges
+                0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_ranges  0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x618 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_line    0x0000000000000000      0xe17 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_str     0x0000000000000000   0x113751 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/sys.o
+ .debug_frame   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/sys.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .rodata.tcp_state_str
+                0x0000000000000000       0x2c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_shutdown
+                0x0000000000000000       0xb4 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_bind
+                0x0000000000000000      0x130 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_bind_netif
+                0x0000000000000000       0x32 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_accept_null
+                0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_listen_with_backlog
+                0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_listen_with_backlog_and_err
+                0x0000000000000000      0x154 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_new_port
+                0x0000000000000000       0x8c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_connect
+                0x0000000000000000      0x230 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_txnow
+                0x0000000000000000       0x38 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_setprio
+                0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_new  0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_new_ip_type
+                0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_arg  0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_recv
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_sent
+                0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_err  0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_accept
+                0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_poll
+                0x0000000000000000       0x60 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_debug_state_str
+                0x0000000000000000       0x24 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_tcp_get_tcp_addrinfo
+                0x0000000000000000       0x68 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x149 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000      0x1d7 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000      0x1d7 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text.tcp_pbuf_prealloc
+                0x0000000000000000       0xf4 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text.tcp_write_checks
+                0x0000000000000000       0xf4 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text.tcp_write
+                0x0000000000000000      0x6cc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000      0x1d7 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .rodata.lwip_num_cyclic_timers
+                0x0000000000000000        0x4 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .text.sys_untimeout
+                0x0000000000000000       0x74 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .text.sys_restart_timeouts
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000      0x1d7 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x4d Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/udp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .text.udp_send
+                0x0000000000000000       0x68 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .text.udp_sendto
+                0x0000000000000000       0xb8 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .text.udp_bind_netif
+                0x0000000000000000       0x32 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .text.udp_disconnect
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .text.udp_new_ip_type
+                0x0000000000000000       0x1a Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x4d Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0xc0 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_line    0x0000000000000000      0xc69 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .debug_str     0x0000000000000000   0x10d031 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_set_struct
+                0x0000000000000000       0x74 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_cleanup
+                0x0000000000000000       0x48 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_inform
+                0x0000000000000000       0xd4 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_release
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_stop
+                0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x4d Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .text.etharp_find_addr
+                0x0000000000000000       0xa8 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .text.etharp_get_entry
+                0x0000000000000000       0xcc Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x1bd Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xc0 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x4d Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_line    0x0000000000000000      0xc67 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .debug_str     0x0000000000000000   0x10d02f Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .text.ip4_output
+                0x0000000000000000       0x6c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x4d Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0xf9 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000      0x1d7 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .text.ip4_addr_netmask_valid
+                0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .text.ipaddr_addr
+                0x0000000000000000       0x2a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .rodata        0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .text.ip4addr_aton
+                0x0000000000000000      0x264 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .text.ip4addr_ntoa
+                0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .text.ip4addr_ntoa_r
+                0x0000000000000000      0x104 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .bss.str.12179
+                0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_line    0x0000000000000000      0xc68 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .debug_str     0x0000000000000000   0x10d030 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_line    0x0000000000000000      0xc69 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .debug_str     0x0000000000000000   0x10d031 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_line    0x0000000000000000      0xc68 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .debug_str     0x0000000000000000   0x10d030 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_line    0x0000000000000000      0xc68 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .debug_str     0x0000000000000000   0x10d030 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_line    0x0000000000000000      0xc66 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .debug_str     0x0000000000000000   0x10d02e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_line    0x0000000000000000      0xc6b Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .debug_str     0x0000000000000000   0x10d033 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_info    0x0000000000000000      0xe74 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x677 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_line    0x0000000000000000      0xded Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .debug_str     0x0000000000000000   0x11131d Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_line    0x0000000000000000      0xc67 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .debug_str     0x0000000000000000   0x10d02f Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x53f Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_line    0x0000000000000000      0xc66 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .debug_str     0x0000000000000000   0x10d02e Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_info    0x0000000000000000      0xe02 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x78f Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0xc0 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_line    0x0000000000000000      0xfec Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .debug_str     0x0000000000000000   0x117c7c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .text.bridgeif_fdb_update_src
+                0x0000000000000000       0xd8 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .text.bridgeif_fdb_get_dst_ports
+                0x0000000000000000       0x70 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .text.bridgeif_fdb_age_one_second
+                0x0000000000000000       0x74 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .rodata        0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .text.bridgeif_age_tmr
+                0x0000000000000000       0x48 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .text.bridgeif_fdb_init
+                0x0000000000000000       0x78 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_info    0x0000000000000000     0x10a9 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_abbrev  0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_aranges
+                0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_ranges  0x0000000000000000       0x30 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x753 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_line    0x0000000000000000     0x10ab Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_str     0x0000000000000000   0x117368 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .debug_frame   0x0000000000000000       0xc8 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xb3 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0xc0 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x558 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_line    0x0000000000000000      0xcb7 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .debug_str     0x0000000000000000   0x10d208 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x558 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_line    0x0000000000000000      0xcbf Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .debug_str     0x0000000000000000   0x10d210 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x558 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_line    0x0000000000000000      0xcc5 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .debug_str     0x0000000000000000   0x10d216 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .rodata        0x0000000000000000       0xbc Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .text.slipif_output
+                0x0000000000000000      0x104 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .text.slipif_output_v4
+                0x0000000000000000       0x1e Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .text.slipif_rxbyte
+                0x0000000000000000      0x19c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .text.slipif_rxbyte_input
+                0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .text.slipif_loop_thread
+                0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .text.slipif_init
+                0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .text.slipif_poll
+                0x0000000000000000       0x74 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_info    0x0000000000000000     0x10c4 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_abbrev  0x0000000000000000      0x29f Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_aranges
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_ranges  0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x705 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x1c3 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x169 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xb9 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x13d Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xc0 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_line    0x0000000000000000     0x1060 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_str     0x0000000000000000   0x117206 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .debug_frame   0x0000000000000000      0x10c Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/slipif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x55c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_line    0x0000000000000000      0xcc0 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .debug_str     0x0000000000000000   0x10d218 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/zepif.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_line    0x0000000000000000      0xcab Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .debug_str     0x0000000000000000   0x10d0f1 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_line    0x0000000000000000      0xcaa Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .debug_str     0x0000000000000000   0x10d0f0 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_line    0x0000000000000000      0xcaf Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .debug_str     0x0000000000000000   0x10d0f5 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_line    0x0000000000000000      0xcaf Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .debug_str     0x0000000000000000   0x10d0f5 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_line    0x0000000000000000      0xcae Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .debug_str     0x0000000000000000   0x10d0f4 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_line    0x0000000000000000      0xcad Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .debug_str     0x0000000000000000   0x10d0f3 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_line    0x0000000000000000      0xcaa Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .debug_str     0x0000000000000000   0x10d0f0 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_line    0x0000000000000000      0xcaa Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .debug_str     0x0000000000000000   0x10d0f0 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_line    0x0000000000000000      0xcac Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .debug_str     0x0000000000000000   0x10d0f2 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_line    0x0000000000000000      0xcaa Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .debug_str     0x0000000000000000   0x10d0f0 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_line    0x0000000000000000      0xcab Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .debug_str     0x0000000000000000   0x10d0f1 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x54f Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_line    0x0000000000000000      0xcad Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .debug_str     0x0000000000000000   0x10d0f3 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_line    0x0000000000000000      0xcaa Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .debug_str     0x0000000000000000   0x10d0f0 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_line    0x0000000000000000      0xcac Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .debug_str     0x0000000000000000   0x10d0f2 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_line    0x0000000000000000      0xcab Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .debug_str     0x0000000000000000   0x10d0f1 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_line    0x0000000000000000      0xcb0 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .debug_str     0x0000000000000000   0x10d0f6 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_line    0x0000000000000000      0xcaa Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .debug_str     0x0000000000000000   0x10d0f0 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_line    0x0000000000000000      0xcad Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .debug_str     0x0000000000000000   0x10d0f3 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_line    0x0000000000000000      0xcaf Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .debug_str     0x0000000000000000   0x10d0f5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_line    0x0000000000000000      0xcac Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .debug_str     0x0000000000000000   0x10d0f2 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_line    0x0000000000000000      0xcaf Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .debug_str     0x0000000000000000   0x10d0f5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_line    0x0000000000000000      0xcac Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .debug_str     0x0000000000000000   0x10d0f2 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_line    0x0000000000000000      0xcab Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .debug_str     0x0000000000000000   0x10d0f1 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_line    0x0000000000000000      0xcac Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .debug_str     0x0000000000000000   0x10d0f2 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_info    0x0000000000000000      0x9d2 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_abbrev  0x0000000000000000      0x17e Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_aranges
+                0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x54e Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0xdf Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x61 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x32a Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x17 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_macro   0x0000000000000000       0x2f Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_line    0x0000000000000000      0xca9 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .debug_str     0x0000000000000000   0x10d0ef Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .comment       0x0000000000000000       0x7c Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .ARM.attributes
+                0x0000000000000000       0x39 Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .group         0x0000000000000000        0xc Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .data          0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .bss           0x0000000000000000        0x0 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_mbox_free
+                0x0000000000000000       0x24 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_mbox_post
+                0x0000000000000000       0x2a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_mbox_trypost_fromisr
+                0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_arch_mbox_tryfetch
+                0x0000000000000000       0x38 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_mbox_set_invalid
+                0x0000000000000000       0x1a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_sem_new
+                0x0000000000000000       0x50 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_arch_sem_wait
+                0x0000000000000000       0x62 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_sem_signal
+                0x0000000000000000       0x1a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_sem_free
+                0x0000000000000000       0x1a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_sem_valid
+                0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_sem_set_invalid
+                0x0000000000000000       0x1a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text.sys_mutex_free
+                0x0000000000000000       0x1a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xd7 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x3d Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x145 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x88 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x28 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x460 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x2b Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x118 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x111 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x82 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x2dd Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x2e Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x3b Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xd9 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000     0x12cd Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x11f Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000    0x190f0 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000     0x36b4 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x5b Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000     0x18ad Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x6c4 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x185 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x117 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x1fe Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x27 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x24f Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x41 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x58 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x236 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x416 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x153 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x107 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xd5 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x4c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x20f Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xea Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xa0 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0xccf Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x14f Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x25b Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x12 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x514 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x22c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x5a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xa5 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x198 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x12f Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x108 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xa4 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x313 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x4ca Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xd6 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x2fe Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0xa2f Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x59 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x53c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x44 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x14e Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x3f9 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xd0 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x739 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x66 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x73 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x3f Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x25 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x0000000000000000      0x15b Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-atoi.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-atoi.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-atoi.o)
+ .text.atoi     0x0000000000000000        0x8 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-atoi.o)
+ .text._atoi_r  0x0000000000000000        0x8 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-atoi.o)
+ .debug_frame   0x0000000000000000       0x30 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-atoi.o)
+ .ARM.attributes
+                0x0000000000000000       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-atoi.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o)
+ .text.exit     0x0000000000000000       0x28 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o)
+ .debug_frame   0x0000000000000000       0x28 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o)
+ .ARM.attributes
+                0x0000000000000000       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-exit.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .text._setlocale_r
+                0x0000000000000000       0x38 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .text.__locale_mb_cur_max
+                0x0000000000000000       0x1c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .text.__locale_ctype_ptr_l
+                0x0000000000000000        0x6 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .text.__locale_ctype_ptr
+                0x0000000000000000       0x1c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .text.setlocale
+                0x0000000000000000       0x10 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .bss._PathLocale
+                0x0000000000000000        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .data.__global_locale
+                0x0000000000000000      0x16c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .rodata._setlocale_r.str1.1
+                0x0000000000000000        0x9 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .rodata.str1.1
+                0x0000000000000000        0x2 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .debug_frame   0x0000000000000000       0x68 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .ARM.attributes
+                0x0000000000000000       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-locale.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mbtowc_r.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mbtowc_r.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mbtowc_r.o)
+ .text._mbtowc_r
+                0x0000000000000000       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mbtowc_r.o)
+ .text.__ascii_mbtowc
+                0x0000000000000000       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mbtowc_r.o)
+ .debug_frame   0x0000000000000000       0x48 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mbtowc_r.o)
+ .ARM.attributes
+                0x0000000000000000       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mbtowc_r.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcmp.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcmp.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcmp.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memmove.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memmove.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memmove.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-printf.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-printf.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-printf.o)
+ .text._printf_r
+                0x0000000000000000       0x28 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-printf.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-rand.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-rand.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-rand.o)
+ .text.srand    0x0000000000000000       0x48 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-rand.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sprintf.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sprintf.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sprintf.o)
+ .text._sprintf_r
+                0x0000000000000000       0x38 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sprintf.o)
+ .text          0x0000000000000000       0x14 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strcmp.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strcmp.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strcmp.o)
+ .debug_frame   0x0000000000000000       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strcmp.o)
+ .ARM.attributes
+                0x0000000000000000       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strcmp.o)
+ .text          0x0000000000000000       0x10 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strlen.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strlen.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strlen.o)
+ .ARM.attributes
+                0x0000000000000000       0x1b c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strlen.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strncmp.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strncmp.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strncmp.o)
+ .text.strncmp  0x0000000000000000       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strncmp.o)
+ .debug_frame   0x0000000000000000       0x28 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strncmp.o)
+ .ARM.attributes
+                0x0000000000000000       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strncmp.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strtol.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strtol.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strtol.o)
+ .text._strtol_l.isra.0
+                0x0000000000000000       0xf6 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strtol.o)
+ .text._strtol_r
+                0x0000000000000000       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strtol.o)
+ .text.strtol_l
+                0x0000000000000000       0x1c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strtol.o)
+ .text.strtol   0x0000000000000000       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strtol.o)
+ .debug_frame   0x0000000000000000       0x84 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strtol.o)
+ .ARM.attributes
+                0x0000000000000000       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-strtol.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wctomb_r.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wctomb_r.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wctomb_r.o)
+ .text._wctomb_r
+                0x0000000000000000       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wctomb_r.o)
+ .text.__ascii_wctomb
+                0x0000000000000000       0x1a c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wctomb_r.o)
+ .debug_frame   0x0000000000000000       0x3c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wctomb_r.o)
+ .ARM.attributes
+                0x0000000000000000       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wctomb_r.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-ctype_.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-ctype_.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-ctype_.o)
+ .rodata._ctype_
+                0x0000000000000000      0x101 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-ctype_.o)
+ .ARM.attributes
+                0x0000000000000000       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-ctype_.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .text.__fp_lock
+                0x0000000000000000        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .text.__fp_unlock
+                0x0000000000000000        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .text._cleanup
+                0x0000000000000000        0xc c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .text.__sfp_lock_acquire
+                0x0000000000000000        0x2 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .text.__sfp_lock_release
+                0x0000000000000000        0x2 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .text.__sinit_lock_acquire
+                0x0000000000000000        0x2 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .text.__sinit_lock_release
+                0x0000000000000000        0x2 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .text.__fp_lock_all
+                0x0000000000000000       0x14 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .text.__fp_unlock_all
+                0x0000000000000000       0x14 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fwalk.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fwalk.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fwalk.o)
+ .text._fwalk   0x0000000000000000       0x38 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fwalk.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-malloc.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-malloc.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-malloc.o)
+ .text.free     0x0000000000000000       0x10 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-malloc.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-freer.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-freer.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-freer.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-mallocr.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-mallocr.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-mallocr.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o)
+ .text.__ssprint_r
+                0x0000000000000000       0xf0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+ .text.__sprint_r
+                0x0000000000000000       0x1a c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+ .text.vfprintf
+                0x0000000000000000       0x14 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sbrkr.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sbrkr.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sbrkr.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
+ .text.__seofread
+                0x0000000000000000        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wbuf.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wbuf.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wbuf.o)
+ .text.__swbuf  0x0000000000000000       0x10 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wbuf.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-writer.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-writer.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-writer.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wsetup.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wsetup.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wsetup.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-closer.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-closer.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-closer.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fflush.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fflush.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fflush.o)
+ .text.fflush   0x0000000000000000       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fflush.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fvwrite.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fvwrite.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fvwrite.o)
+ .text.__sfvwrite_r
+                0x0000000000000000      0x29c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fvwrite.o)
+ .debug_frame   0x0000000000000000       0x3c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fvwrite.o)
+ .ARM.attributes
+                0x0000000000000000       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fvwrite.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-lseekr.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-lseekr.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-lseekr.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-makebuf.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-makebuf.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-makebuf.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memchr.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memchr.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mlock.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mlock.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mlock.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-reallocr.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-reallocr.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-reallocr.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-readr.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-readr.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-readr.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fstatr.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fstatr.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fstatr.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-isattyr.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-isattyr.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-isattyr.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-msizer.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-msizer.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-msizer.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_aeabi_uldivmod.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_aeabi_uldivmod.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_udivmoddi4.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_udivmoddi4.o)
+ .ARM.extab     0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_udivmoddi4.o)
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_dvmd_tls.o)
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_dvmd_tls.o)
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
+ .eh_frame      0x0000000000000000        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
+ .ARM.attributes
+                0x0000000000000000       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
+ .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
+ .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
+ .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+RAM              0x0000000020000000 0x0000000000050000 xrw
+FLASH            0x0000000008000000 0x0000000000100000 xr
+*default*        0x0000000000000000 0xffffffffffffffff
+
+Linker script and memory map
+
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
+LOAD Core/Src/freertos.o
+LOAD Core/Src/ft5336.o
+LOAD Core/Src/main.o
+LOAD Core/Src/stm32746g_discovery.o
+LOAD Core/Src/stm32746g_discovery_lcd.o
+LOAD Core/Src/stm32746g_discovery_sdram.o
+LOAD Core/Src/stm32746g_discovery_ts.o
+LOAD Core/Src/stm32f7xx_hal_msp.o
+LOAD Core/Src/stm32f7xx_hal_timebase_tim.o
+LOAD Core/Src/stm32f7xx_it.o
+LOAD Core/Src/syscalls.o
+LOAD Core/Src/sysmem.o
+LOAD Core/Src/system_stm32f7xx.o
+LOAD Core/Startup/startup_stm32f746nghx.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
+LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+LOAD LWIP/App/lwip.o
+LOAD LWIP/Target/ethernetif.o
+LOAD Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+LOAD Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+LOAD Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+LOAD Middlewares/Third_Party/FreeRTOS/Source/list.o
+LOAD Middlewares/Third_Party/FreeRTOS/Source/queue.o
+LOAD Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+LOAD Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+LOAD Middlewares/Third_Party/FreeRTOS/Source/timers.o
+LOAD Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+LOAD Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+LOAD Middlewares/Third_Party/LwIP/src/api/api_lib.o
+LOAD Middlewares/Third_Party/LwIP/src/api/api_msg.o
+LOAD Middlewares/Third_Party/LwIP/src/api/err.o
+LOAD Middlewares/Third_Party/LwIP/src/api/if_api.o
+LOAD Middlewares/Third_Party/LwIP/src/api/netbuf.o
+LOAD Middlewares/Third_Party/LwIP/src/api/netdb.o
+LOAD Middlewares/Third_Party/LwIP/src/api/netifapi.o
+LOAD Middlewares/Third_Party/LwIP/src/api/sockets.o
+LOAD Middlewares/Third_Party/LwIP/src/api/tcpip.o
+LOAD Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o
+LOAD Middlewares/Third_Party/LwIP/src/core/altcp.o
+LOAD Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o
+LOAD Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o
+LOAD Middlewares/Third_Party/LwIP/src/core/def.o
+LOAD Middlewares/Third_Party/LwIP/src/core/dns.o
+LOAD Middlewares/Third_Party/LwIP/src/core/inet_chksum.o
+LOAD Middlewares/Third_Party/LwIP/src/core/init.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ip.o
+LOAD Middlewares/Third_Party/LwIP/src/core/mem.o
+LOAD Middlewares/Third_Party/LwIP/src/core/memp.o
+LOAD Middlewares/Third_Party/LwIP/src/core/netif.o
+LOAD Middlewares/Third_Party/LwIP/src/core/pbuf.o
+LOAD Middlewares/Third_Party/LwIP/src/core/raw.o
+LOAD Middlewares/Third_Party/LwIP/src/core/stats.o
+LOAD Middlewares/Third_Party/LwIP/src/core/sys.o
+LOAD Middlewares/Third_Party/LwIP/src/core/tcp.o
+LOAD Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+LOAD Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+LOAD Middlewares/Third_Party/LwIP/src/core/timeouts.o
+LOAD Middlewares/Third_Party/LwIP/src/core/udp.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o
+LOAD Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/bridgeif.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/lowpan6.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/slipif.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/zepif.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o
+LOAD Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o
+LOAD Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+START GROUP
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libm.a
+END GROUP
+START GROUP
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a
+END GROUP
+START GROUP
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a
+END GROUP
+START GROUP
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libnosys.a
+END GROUP
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
+LOAD c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
+                0x0000000020050000                _estack = (ORIGIN (RAM) + LENGTH (RAM))
+                0x0000000000000200                _Min_Heap_Size = 0x200
+                0x0000000000000400                _Min_Stack_Size = 0x400
+
+.isr_vector     0x0000000008000000      0x1c8
+                0x0000000008000000                . = ALIGN (0x4)
+ *(.isr_vector)
+ .isr_vector    0x0000000008000000      0x1c8 Core/Startup/startup_stm32f746nghx.o
+                0x0000000008000000                g_pfnVectors
+                0x00000000080001c8                . = ALIGN (0x4)
+
+.text           0x00000000080001d0    0x1d3c0
+                0x00000000080001d0                . = ALIGN (0x4)
+ *(.text)
+ .text          0x00000000080001d0       0x40 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+ .text          0x0000000008000210       0xa0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memchr.o)
+                0x0000000008000210                memchr
+ .text          0x00000000080002b0       0x30 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_aeabi_uldivmod.o)
+                0x00000000080002b0                __aeabi_uldivmod
+ .text          0x00000000080002e0      0x2cc c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_udivmoddi4.o)
+                0x00000000080002e0                __udivmoddi4
+ .text          0x00000000080005ac        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_dvmd_tls.o)
+                0x00000000080005ac                __aeabi_idiv0
+                0x00000000080005ac                __aeabi_ldiv0
+ *(.text*)
+ .text.vApplicationIdleHook
+                0x00000000080005b0        0xe Core/Src/freertos.o
+                0x00000000080005b0                vApplicationIdleHook
+ .text.vApplicationStackOverflowHook
+                0x00000000080005be       0x16 Core/Src/freertos.o
+                0x00000000080005be                vApplicationStackOverflowHook
+ .text.vApplicationMallocFailedHook
+                0x00000000080005d4        0xe Core/Src/freertos.o
+                0x00000000080005d4                vApplicationMallocFailedHook
+ *fill*         0x00000000080005e2        0x2 
+ .text.vApplicationGetIdleTaskMemory
+                0x00000000080005e4       0x34 Core/Src/freertos.o
+                0x00000000080005e4                vApplicationGetIdleTaskMemory
+ .text.ft5336_Init
+                0x0000000008000618       0x1c Core/Src/ft5336.o
+                0x0000000008000618                ft5336_Init
+ .text.ft5336_Reset
+                0x0000000008000634       0x16 Core/Src/ft5336.o
+                0x0000000008000634                ft5336_Reset
+ .text.ft5336_ReadID
+                0x000000000800064a       0x5c Core/Src/ft5336.o
+                0x000000000800064a                ft5336_ReadID
+ .text.ft5336_TS_Start
+                0x00000000080006a6       0x22 Core/Src/ft5336.o
+                0x00000000080006a6                ft5336_TS_Start
+ .text.ft5336_TS_DetectTouch
+                0x00000000080006c8       0x54 Core/Src/ft5336.o
+                0x00000000080006c8                ft5336_TS_DetectTouch
+ .text.ft5336_TS_GetXY
+                0x000000000800071c      0x1e0 Core/Src/ft5336.o
+                0x000000000800071c                ft5336_TS_GetXY
+ .text.ft5336_TS_EnableIT
+                0x00000000080008fc       0x28 Core/Src/ft5336.o
+                0x00000000080008fc                ft5336_TS_EnableIT
+ .text.ft5336_TS_DisableIT
+                0x0000000008000924       0x28 Core/Src/ft5336.o
+                0x0000000008000924                ft5336_TS_DisableIT
+ .text.ft5336_TS_ITStatus
+                0x000000000800094c       0x18 Core/Src/ft5336.o
+                0x000000000800094c                ft5336_TS_ITStatus
+ .text.ft5336_TS_ClearIT
+                0x0000000008000964       0x16 Core/Src/ft5336.o
+                0x0000000008000964                ft5336_TS_ClearIT
+ .text.ft5336_TS_GetGestureID
+                0x000000000800097a       0x32 Core/Src/ft5336.o
+                0x000000000800097a                ft5336_TS_GetGestureID
+ .text.ft5336_TS_GetTouchInfo
+                0x00000000080009ac      0x15c Core/Src/ft5336.o
+                0x00000000080009ac                ft5336_TS_GetTouchInfo
+ .text.ft5336_Get_I2C_InitializedStatus
+                0x0000000008000b08       0x18 Core/Src/ft5336.o
+ .text.ft5336_I2C_InitializeIfRequired
+                0x0000000008000b20       0x20 Core/Src/ft5336.o
+ .text.ft5336_TS_Configure
+                0x0000000008000b40       0x1c Core/Src/ft5336.o
+ .text.main     0x0000000008000b5c      0x348 Core/Src/main.o
+                0x0000000008000b5c                main
+ .text.SystemClock_Config
+                0x0000000008000ea4      0x168 Core/Src/main.o
+                0x0000000008000ea4                SystemClock_Config
+ .text.MX_ADC1_Init
+                0x000000000800100c       0xa4 Core/Src/main.o
+ .text.MX_ADC3_Init
+                0x00000000080010b0       0xa4 Core/Src/main.o
+ .text.MX_CRC_Init
+                0x0000000008001154       0x44 Core/Src/main.o
+ .text.MX_DAC_Init
+                0x0000000008001198       0x54 Core/Src/main.o
+ .text.MX_DMA2D_Init
+                0x00000000080011ec       0x64 Core/Src/main.o
+ .text.MX_I2C1_Init
+                0x0000000008001250       0x80 Core/Src/main.o
+ .text.MX_I2C3_Init
+                0x00000000080012d0       0x80 Core/Src/main.o
+ .text.MX_LTDC_Init
+                0x0000000008001350      0x104 Core/Src/main.o
+ .text.MX_RNG_Init
+                0x0000000008001454       0x28 Core/Src/main.o
+ .text.MX_RTC_Init
+                0x000000000800147c      0x14c Core/Src/main.o
+ .text.MX_SPI2_Init
+                0x00000000080015c8       0x7c Core/Src/main.o
+ .text.MX_TIM1_Init
+                0x0000000008001644       0xa8 Core/Src/main.o
+ .text.MX_TIM2_Init
+                0x00000000080016ec       0x9c Core/Src/main.o
+ .text.MX_TIM3_Init
+                0x0000000008001788      0x11c Core/Src/main.o
+ .text.MX_TIM5_Init
+                0x00000000080018a4       0x9c Core/Src/main.o
+ .text.MX_TIM8_Init
+                0x0000000008001940      0x154 Core/Src/main.o
+ .text.MX_UART7_Init
+                0x0000000008001a94       0x60 Core/Src/main.o
+ .text.MX_USART1_UART_Init
+                0x0000000008001af4       0x60 Core/Src/main.o
+ .text.MX_USART6_UART_Init
+                0x0000000008001b54       0x60 Core/Src/main.o
+ .text.MX_FMC_Init
+                0x0000000008001bb4       0x9c Core/Src/main.o
+ .text.MX_GPIO_Init
+                0x0000000008001c50      0x3d8 Core/Src/main.o
+ .text.f_GameMaster
+                0x0000000008002028       0x1e Core/Src/main.o
+                0x0000000008002028                f_GameMaster
+ *fill*         0x0000000008002046        0x2 
+ .text.f_Joueur_1
+                0x0000000008002048      0x220 Core/Src/main.o
+                0x0000000008002048                f_Joueur_1
+ .text.f_block_enemie
+                0x0000000008002268       0x1a Core/Src/main.o
+                0x0000000008002268                f_block_enemie
+ .text.f_projectile
+                0x0000000008002282       0x22 Core/Src/main.o
+                0x0000000008002282                f_projectile
+ .text.HAL_TIM_PeriodElapsedCallback
+                0x00000000080022a4       0x24 Core/Src/main.o
+                0x00000000080022a4                HAL_TIM_PeriodElapsedCallback
+ .text.Error_Handler
+                0x00000000080022c8        0x8 Core/Src/main.o
+                0x00000000080022c8                Error_Handler
+ .text.I2Cx_MspInit
+                0x00000000080022d0      0x160 Core/Src/stm32746g_discovery.o
+ .text.I2Cx_Init
+                0x0000000008002430       0x78 Core/Src/stm32746g_discovery.o
+ .text.I2Cx_ReadMultiple
+                0x00000000080024a8       0x5a Core/Src/stm32746g_discovery.o
+ .text.I2Cx_WriteMultiple
+                0x0000000008002502       0x5a Core/Src/stm32746g_discovery.o
+ .text.I2Cx_Error
+                0x000000000800255c       0x20 Core/Src/stm32746g_discovery.o
+ .text.TS_IO_Init
+                0x000000000800257c       0x14 Core/Src/stm32746g_discovery.o
+                0x000000000800257c                TS_IO_Init
+ .text.TS_IO_Write
+                0x0000000008002590       0x34 Core/Src/stm32746g_discovery.o
+                0x0000000008002590                TS_IO_Write
+ .text.TS_IO_Read
+                0x00000000080025c4       0x3c Core/Src/stm32746g_discovery.o
+                0x00000000080025c4                TS_IO_Read
+ .text.TS_IO_Delay
+                0x0000000008002600       0x16 Core/Src/stm32746g_discovery.o
+                0x0000000008002600                TS_IO_Delay
+ *fill*         0x0000000008002616        0x2 
+ .text.BSP_LCD_Init
+                0x0000000008002618       0xe0 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002618                BSP_LCD_Init
+ .text.BSP_LCD_GetXSize
+                0x00000000080026f8       0x28 Core/Src/stm32746g_discovery_lcd.o
+                0x00000000080026f8                BSP_LCD_GetXSize
+ .text.BSP_LCD_GetYSize
+                0x0000000008002720       0x28 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002720                BSP_LCD_GetYSize
+ .text.BSP_LCD_LayerDefaultInit
+                0x0000000008002748       0xc0 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002748                BSP_LCD_LayerDefaultInit
+ .text.BSP_LCD_SelectLayer
+                0x0000000008002808       0x20 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002808                BSP_LCD_SelectLayer
+ .text.BSP_LCD_SetTextColor
+                0x0000000008002828       0x30 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002828                BSP_LCD_SetTextColor
+ .text.BSP_LCD_SetBackColor
+                0x0000000008002858       0x34 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002858                BSP_LCD_SetBackColor
+ .text.BSP_LCD_SetFont
+                0x000000000800288c       0x34 Core/Src/stm32746g_discovery_lcd.o
+                0x000000000800288c                BSP_LCD_SetFont
+ .text.BSP_LCD_GetFont
+                0x00000000080028c0       0x2c Core/Src/stm32746g_discovery_lcd.o
+                0x00000000080028c0                BSP_LCD_GetFont
+ .text.BSP_LCD_Clear
+                0x00000000080028ec       0x50 Core/Src/stm32746g_discovery_lcd.o
+                0x00000000080028ec                BSP_LCD_Clear
+ .text.BSP_LCD_DisplayChar
+                0x000000000800293c       0x88 Core/Src/stm32746g_discovery_lcd.o
+                0x000000000800293c                BSP_LCD_DisplayChar
+ .text.BSP_LCD_DisplayStringAt
+                0x00000000080029c4      0x188 Core/Src/stm32746g_discovery_lcd.o
+                0x00000000080029c4                BSP_LCD_DisplayStringAt
+ .text.BSP_LCD_DisplayStringAtLine
+                0x0000000008002b4c       0x2e Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002b4c                BSP_LCD_DisplayStringAtLine
+ *fill*         0x0000000008002b7a        0x2 
+ .text.BSP_LCD_DrawHLine
+                0x0000000008002b7c       0xbc Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002b7c                BSP_LCD_DrawHLine
+ .text.BSP_LCD_DrawCircle
+                0x0000000008002c38      0x1e0 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002c38                BSP_LCD_DrawCircle
+ .text.BSP_LCD_DrawPixel
+                0x0000000008002e18       0x90 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002e18                BSP_LCD_DrawPixel
+ .text.BSP_LCD_FillRect
+                0x0000000008002ea8       0xf4 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002ea8                BSP_LCD_FillRect
+ .text.BSP_LCD_FillCircle
+                0x0000000008002f9c      0x140 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008002f9c                BSP_LCD_FillCircle
+ .text.BSP_LCD_DisplayOn
+                0x00000000080030dc       0x3c Core/Src/stm32746g_discovery_lcd.o
+                0x00000000080030dc                BSP_LCD_DisplayOn
+ .text.BSP_LCD_MspInit
+                0x0000000008003118      0x1b4 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008003118                BSP_LCD_MspInit
+ .text.BSP_LCD_ClockConfig
+                0x00000000080032cc       0x38 Core/Src/stm32746g_discovery_lcd.o
+                0x00000000080032cc                BSP_LCD_ClockConfig
+ .text.DrawChar
+                0x0000000008003304      0x170 Core/Src/stm32746g_discovery_lcd.o
+ .text.LL_FillBuffer
+                0x0000000008003474       0x98 Core/Src/stm32746g_discovery_lcd.o
+ .text.BSP_SDRAM_Init
+                0x000000000800350c       0xbc Core/Src/stm32746g_discovery_sdram.o
+                0x000000000800350c                BSP_SDRAM_Init
+ .text.BSP_SDRAM_Initialization_sequence
+                0x00000000080035c8       0xc0 Core/Src/stm32746g_discovery_sdram.o
+                0x00000000080035c8                BSP_SDRAM_Initialization_sequence
+ .text.BSP_SDRAM_MspInit
+                0x0000000008003688      0x1f0 Core/Src/stm32746g_discovery_sdram.o
+                0x0000000008003688                BSP_SDRAM_MspInit
+ .text.BSP_TS_Init
+                0x0000000008003878       0x80 Core/Src/stm32746g_discovery_ts.o
+                0x0000000008003878                BSP_TS_Init
+ .text.BSP_TS_GetState
+                0x00000000080038f8      0x3ac Core/Src/stm32746g_discovery_ts.o
+                0x00000000080038f8                BSP_TS_GetState
+ .text.BSP_TS_Get_GestureId
+                0x0000000008003ca4       0x94 Core/Src/stm32746g_discovery_ts.o
+                0x0000000008003ca4                BSP_TS_Get_GestureId
+ .text.HAL_MspInit
+                0x0000000008003d38       0x50 Core/Src/stm32f7xx_hal_msp.o
+                0x0000000008003d38                HAL_MspInit
+ .text.HAL_ADC_MspInit
+                0x0000000008003d88       0xdc Core/Src/stm32f7xx_hal_msp.o
+                0x0000000008003d88                HAL_ADC_MspInit
+ .text.HAL_CRC_MspInit
+                0x0000000008003e64       0x40 Core/Src/stm32f7xx_hal_msp.o
+                0x0000000008003e64                HAL_CRC_MspInit
+ .text.HAL_DAC_MspInit
+                0x0000000008003ea4       0x90 Core/Src/stm32f7xx_hal_msp.o
+                0x0000000008003ea4                HAL_DAC_MspInit
+ .text.HAL_DMA2D_MspInit
+                0x0000000008003f34       0x40 Core/Src/stm32f7xx_hal_msp.o
+                0x0000000008003f34                HAL_DMA2D_MspInit
+ .text.HAL_I2C_MspInit
+                0x0000000008003f74       0xf0 Core/Src/stm32f7xx_hal_msp.o
+                0x0000000008003f74                HAL_I2C_MspInit
+ .text.HAL_I2C_MspDeInit
+                0x0000000008004064       0x78 Core/Src/stm32f7xx_hal_msp.o
+                0x0000000008004064                HAL_I2C_MspDeInit
+ .text.HAL_LTDC_MspInit
+                0x00000000080040dc      0x190 Core/Src/stm32f7xx_hal_msp.o
+                0x00000000080040dc                HAL_LTDC_MspInit
+ .text.HAL_RNG_MspInit
+                0x000000000800426c       0x40 Core/Src/stm32f7xx_hal_msp.o
+                0x000000000800426c                HAL_RNG_MspInit
+ .text.HAL_RTC_MspInit
+                0x00000000080042ac       0x34 Core/Src/stm32f7xx_hal_msp.o
+                0x00000000080042ac                HAL_RTC_MspInit
+ .text.HAL_SPI_MspInit
+                0x00000000080042e0       0xe4 Core/Src/stm32f7xx_hal_msp.o
+                0x00000000080042e0                HAL_SPI_MspInit
+ .text.HAL_TIM_Base_MspInit
+                0x00000000080043c4       0xdc Core/Src/stm32f7xx_hal_msp.o
+                0x00000000080043c4                HAL_TIM_Base_MspInit
+ .text.HAL_TIM_MspPostInit
+                0x00000000080044a0       0xbc Core/Src/stm32f7xx_hal_msp.o
+                0x00000000080044a0                HAL_TIM_MspPostInit
+ .text.HAL_UART_MspInit
+                0x000000000800455c      0x18c Core/Src/stm32f7xx_hal_msp.o
+                0x000000000800455c                HAL_UART_MspInit
+ .text.HAL_FMC_MspInit
+                0x00000000080046e8      0x120 Core/Src/stm32f7xx_hal_msp.o
+ .text.HAL_SDRAM_MspInit
+                0x0000000008004808       0x14 Core/Src/stm32f7xx_hal_msp.o
+                0x0000000008004808                HAL_SDRAM_MspInit
+ .text.HAL_InitTick
+                0x000000000800481c       0xb0 Core/Src/stm32f7xx_hal_timebase_tim.o
+                0x000000000800481c                HAL_InitTick
+ .text.NMI_Handler
+                0x00000000080048cc        0x6 Core/Src/stm32f7xx_it.o
+                0x00000000080048cc                NMI_Handler
+ .text.HardFault_Handler
+                0x00000000080048d2        0x6 Core/Src/stm32f7xx_it.o
+                0x00000000080048d2                HardFault_Handler
+ .text.MemManage_Handler
+                0x00000000080048d8        0x6 Core/Src/stm32f7xx_it.o
+                0x00000000080048d8                MemManage_Handler
+ .text.BusFault_Handler
+                0x00000000080048de        0x6 Core/Src/stm32f7xx_it.o
+                0x00000000080048de                BusFault_Handler
+ .text.UsageFault_Handler
+                0x00000000080048e4        0x6 Core/Src/stm32f7xx_it.o
+                0x00000000080048e4                UsageFault_Handler
+ .text.DebugMon_Handler
+                0x00000000080048ea        0xe Core/Src/stm32f7xx_it.o
+                0x00000000080048ea                DebugMon_Handler
+ .text.TIM6_DAC_IRQHandler
+                0x00000000080048f8       0x1c Core/Src/stm32f7xx_it.o
+                0x00000000080048f8                TIM6_DAC_IRQHandler
+ .text.ETH_IRQHandler
+                0x0000000008004914       0x14 Core/Src/stm32f7xx_it.o
+                0x0000000008004914                ETH_IRQHandler
+ .text.LTDC_IRQHandler
+                0x0000000008004928       0x14 Core/Src/stm32f7xx_it.o
+                0x0000000008004928                LTDC_IRQHandler
+ .text._read    0x000000000800493c       0x3a Core/Src/syscalls.o
+                0x000000000800493c                _read
+ .text._write   0x0000000008004976       0x38 Core/Src/syscalls.o
+                0x0000000008004976                _write
+ .text._close   0x00000000080049ae       0x18 Core/Src/syscalls.o
+                0x00000000080049ae                _close
+ .text._fstat   0x00000000080049c6       0x20 Core/Src/syscalls.o
+                0x00000000080049c6                _fstat
+ .text._isatty  0x00000000080049e6       0x16 Core/Src/syscalls.o
+                0x00000000080049e6                _isatty
+ .text._lseek   0x00000000080049fc       0x1a Core/Src/syscalls.o
+                0x00000000080049fc                _lseek
+ *fill*         0x0000000008004a16        0x2 
+ .text._sbrk    0x0000000008004a18       0x70 Core/Src/sysmem.o
+                0x0000000008004a18                _sbrk
+ .text.SystemInit
+                0x0000000008004a88       0x2c Core/Src/system_stm32f7xx.o
+                0x0000000008004a88                SystemInit
+ .text.Reset_Handler
+                0x0000000008004ab4       0x50 Core/Startup/startup_stm32f746nghx.o
+                0x0000000008004ab4                Reset_Handler
+ .text.Default_Handler
+                0x0000000008004b04        0x2 Core/Startup/startup_stm32f746nghx.o
+                0x0000000008004b04                RTC_Alarm_IRQHandler
+                0x0000000008004b04                EXTI2_IRQHandler
+                0x0000000008004b04                TIM8_CC_IRQHandler
+                0x0000000008004b04                UART8_IRQHandler
+                0x0000000008004b04                SPI4_IRQHandler
+                0x0000000008004b04                TIM1_CC_IRQHandler
+                0x0000000008004b04                DMA2_Stream5_IRQHandler
+                0x0000000008004b04                DMA1_Stream5_IRQHandler
+                0x0000000008004b04                PVD_IRQHandler
+                0x0000000008004b04                TAMP_STAMP_IRQHandler
+                0x0000000008004b04                CAN2_RX1_IRQHandler
+                0x0000000008004b04                EXTI3_IRQHandler
+                0x0000000008004b04                TIM8_TRG_COM_TIM14_IRQHandler
+                0x0000000008004b04                TIM1_UP_TIM10_IRQHandler
+                0x0000000008004b04                TIM8_UP_TIM13_IRQHandler
+                0x0000000008004b04                I2C3_ER_IRQHandler
+                0x0000000008004b04                EXTI0_IRQHandler
+                0x0000000008004b04                I2C2_EV_IRQHandler
+                0x0000000008004b04                DMA1_Stream2_IRQHandler
+                0x0000000008004b04                CAN1_RX0_IRQHandler
+                0x0000000008004b04                FPU_IRQHandler
+                0x0000000008004b04                OTG_HS_WKUP_IRQHandler
+                0x0000000008004b04                LTDC_ER_IRQHandler
+                0x0000000008004b04                CAN2_SCE_IRQHandler
+                0x0000000008004b04                DMA2_Stream2_IRQHandler
+                0x0000000008004b04                SPI1_IRQHandler
+                0x0000000008004b04                TIM1_BRK_TIM9_IRQHandler
+                0x0000000008004b04                DCMI_IRQHandler
+                0x0000000008004b04                CAN2_RX0_IRQHandler
+                0x0000000008004b04                DMA2_Stream3_IRQHandler
+                0x0000000008004b04                SAI2_IRQHandler
+                0x0000000008004b04                USART6_IRQHandler
+                0x0000000008004b04                USART3_IRQHandler
+                0x0000000008004b04                CAN1_RX1_IRQHandler
+                0x0000000008004b04                UART5_IRQHandler
+                0x0000000008004b04                DMA2_Stream0_IRQHandler
+                0x0000000008004b04                TIM4_IRQHandler
+                0x0000000008004b04                QUADSPI_IRQHandler
+                0x0000000008004b04                I2C1_EV_IRQHandler
+                0x0000000008004b04                DMA1_Stream6_IRQHandler
+                0x0000000008004b04                DMA1_Stream1_IRQHandler
+                0x0000000008004b04                UART4_IRQHandler
+                0x0000000008004b04                TIM3_IRQHandler
+                0x0000000008004b04                RCC_IRQHandler
+                0x0000000008004b04                TIM8_BRK_TIM12_IRQHandler
+                0x0000000008004b04                Default_Handler
+                0x0000000008004b04                CEC_IRQHandler
+                0x0000000008004b04                EXTI15_10_IRQHandler
+                0x0000000008004b04                ADC_IRQHandler
+                0x0000000008004b04                DMA1_Stream7_IRQHandler
+                0x0000000008004b04                SPI5_IRQHandler
+                0x0000000008004b04                TIM7_IRQHandler
+                0x0000000008004b04                SDMMC1_IRQHandler
+                0x0000000008004b04                CAN2_TX_IRQHandler
+                0x0000000008004b04                TIM5_IRQHandler
+                0x0000000008004b04                DMA2_Stream7_IRQHandler
+                0x0000000008004b04                I2C3_EV_IRQHandler
+                0x0000000008004b04                EXTI9_5_IRQHandler
+                0x0000000008004b04                RTC_WKUP_IRQHandler
+                0x0000000008004b04                ETH_WKUP_IRQHandler
+                0x0000000008004b04                SPDIF_RX_IRQHandler
+                0x0000000008004b04                SPI2_IRQHandler
+                0x0000000008004b04                OTG_HS_EP1_IN_IRQHandler
+                0x0000000008004b04                DMA1_Stream0_IRQHandler
+                0x0000000008004b04                CAN1_TX_IRQHandler
+                0x0000000008004b04                EXTI4_IRQHandler
+                0x0000000008004b04                RNG_IRQHandler
+                0x0000000008004b04                OTG_HS_EP1_OUT_IRQHandler
+                0x0000000008004b04                WWDG_IRQHandler
+                0x0000000008004b04                SPI6_IRQHandler
+                0x0000000008004b04                I2C4_EV_IRQHandler
+                0x0000000008004b04                TIM2_IRQHandler
+                0x0000000008004b04                OTG_FS_WKUP_IRQHandler
+                0x0000000008004b04                TIM1_TRG_COM_TIM11_IRQHandler
+                0x0000000008004b04                OTG_HS_IRQHandler
+                0x0000000008004b04                DMA2D_IRQHandler
+                0x0000000008004b04                EXTI1_IRQHandler
+                0x0000000008004b04                UART7_IRQHandler
+                0x0000000008004b04                USART2_IRQHandler
+                0x0000000008004b04                I2C2_ER_IRQHandler
+                0x0000000008004b04                DMA2_Stream1_IRQHandler
+                0x0000000008004b04                CAN1_SCE_IRQHandler
+                0x0000000008004b04                FLASH_IRQHandler
+                0x0000000008004b04                DMA2_Stream4_IRQHandler
+                0x0000000008004b04                USART1_IRQHandler
+                0x0000000008004b04                OTG_FS_IRQHandler
+                0x0000000008004b04                SPI3_IRQHandler
+                0x0000000008004b04                DMA1_Stream4_IRQHandler
+                0x0000000008004b04                I2C1_ER_IRQHandler
+                0x0000000008004b04                FMC_IRQHandler
+                0x0000000008004b04                LPTIM1_IRQHandler
+                0x0000000008004b04                I2C4_ER_IRQHandler
+                0x0000000008004b04                DMA2_Stream6_IRQHandler
+                0x0000000008004b04                SAI1_IRQHandler
+                0x0000000008004b04                DMA1_Stream3_IRQHandler
+ .text.HAL_Init
+                0x0000000008004b06       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+                0x0000000008004b06                HAL_Init
+ .text.HAL_IncTick
+                0x0000000008004b20       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+                0x0000000008004b20                HAL_IncTick
+ .text.HAL_GetTick
+                0x0000000008004b48       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+                0x0000000008004b48                HAL_GetTick
+ .text.HAL_Delay
+                0x0000000008004b60       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+                0x0000000008004b60                HAL_Delay
+ .text.HAL_ADC_Init
+                0x0000000008004ba4       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+                0x0000000008004ba4                HAL_ADC_Init
+ .text.HAL_ADC_Start
+                0x0000000008004c2c      0x180 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+                0x0000000008004c2c                HAL_ADC_Start
+ .text.HAL_ADC_PollForConversion
+                0x0000000008004dac      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+                0x0000000008004dac                HAL_ADC_PollForConversion
+ .text.HAL_ADC_GetValue
+                0x0000000008004eb4       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+                0x0000000008004eb4                HAL_ADC_GetValue
+ *fill*         0x0000000008004ece        0x2 
+ .text.HAL_ADC_ConfigChannel
+                0x0000000008004ed0      0x294 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+                0x0000000008004ed0                HAL_ADC_ConfigChannel
+ .text.ADC_Init
+                0x0000000008005164      0x1f4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .text.__NVIC_SetPriorityGrouping
+                0x0000000008005358       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.__NVIC_GetPriorityGrouping
+                0x00000000080053a0       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.__NVIC_EnableIRQ
+                0x00000000080053bc       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.__NVIC_SetPriority
+                0x00000000080053f8       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.NVIC_EncodePriority
+                0x000000000800544c       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .text.HAL_NVIC_SetPriorityGrouping
+                0x00000000080054b2       0x16 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+                0x00000000080054b2                HAL_NVIC_SetPriorityGrouping
+ .text.HAL_NVIC_SetPriority
+                0x00000000080054c8       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+                0x00000000080054c8                HAL_NVIC_SetPriority
+ .text.HAL_NVIC_EnableIRQ
+                0x0000000008005500       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+                0x0000000008005500                HAL_NVIC_EnableIRQ
+ .text.HAL_CRC_Init
+                0x000000000800551c       0xc8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+                0x000000000800551c                HAL_CRC_Init
+ .text.HAL_CRCEx_Polynomial_Set
+                0x00000000080055e4      0x10c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+                0x00000000080055e4                HAL_CRCEx_Polynomial_Set
+ .text.HAL_DAC_Init
+                0x00000000080056f0       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+                0x00000000080056f0                HAL_DAC_Init
+ .text.HAL_DAC_IRQHandler
+                0x0000000008005734       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+                0x0000000008005734                HAL_DAC_IRQHandler
+ .text.HAL_DAC_DMAUnderrunCallbackCh1
+                0x00000000080057c8       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+                0x00000000080057c8                HAL_DAC_DMAUnderrunCallbackCh1
+ .text.HAL_DAC_ConfigChannel
+                0x00000000080057dc       0x9a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+                0x00000000080057dc                HAL_DAC_ConfigChannel
+ .text.HAL_DACEx_DMAUnderrunCallbackCh2
+                0x0000000008005876       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+                0x0000000008005876                HAL_DACEx_DMAUnderrunCallbackCh2
+ *fill*         0x000000000800588a        0x2 
+ .text.HAL_DMA_Init
+                0x000000000800588c      0x15c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+                0x000000000800588c                HAL_DMA_Init
+ .text.HAL_DMA_DeInit
+                0x00000000080059e8       0xbc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+                0x00000000080059e8                HAL_DMA_DeInit
+ .text.DMA_CalcBaseAndBitshift
+                0x0000000008005aa4       0x6c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.DMA_CheckFifoParam
+                0x0000000008005b10       0xf4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .text.HAL_DMA2D_Init
+                0x0000000008005c04       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+                0x0000000008005c04                HAL_DMA2D_Init
+ .text.HAL_DMA2D_Start
+                0x0000000008005c98       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+                0x0000000008005c98                HAL_DMA2D_Start
+ .text.HAL_DMA2D_PollForTransfer
+                0x0000000008005cee      0x1d2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+                0x0000000008005cee                HAL_DMA2D_PollForTransfer
+ .text.HAL_DMA2D_ConfigLayer
+                0x0000000008005ec0      0x124 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+                0x0000000008005ec0                HAL_DMA2D_ConfigLayer
+ .text.DMA2D_SetConfig
+                0x0000000008005fe4      0x138 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .text.HAL_ETH_Init
+                0x000000000800611c      0x338 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x000000000800611c                HAL_ETH_Init
+ .text.HAL_ETH_DMATxDescListInit
+                0x0000000008006454       0xd2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x0000000008006454                HAL_ETH_DMATxDescListInit
+ .text.HAL_ETH_DMARxDescListInit
+                0x0000000008006526       0xda Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x0000000008006526                HAL_ETH_DMARxDescListInit
+ .text.HAL_ETH_TransmitFrame
+                0x0000000008006600      0x1d4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x0000000008006600                HAL_ETH_TransmitFrame
+ .text.HAL_ETH_GetReceivedFrame_IT
+                0x00000000080067d4      0x110 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x00000000080067d4                HAL_ETH_GetReceivedFrame_IT
+ .text.HAL_ETH_IRQHandler
+                0x00000000080068e4       0xce Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x00000000080068e4                HAL_ETH_IRQHandler
+ .text.HAL_ETH_TxCpltCallback
+                0x00000000080069b2       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x00000000080069b2                HAL_ETH_TxCpltCallback
+ .text.HAL_ETH_ErrorCallback
+                0x00000000080069c6       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x00000000080069c6                HAL_ETH_ErrorCallback
+ .text.HAL_ETH_ReadPHYRegister
+                0x00000000080069da       0xd0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x00000000080069da                HAL_ETH_ReadPHYRegister
+ .text.HAL_ETH_WritePHYRegister
+                0x0000000008006aaa       0xcc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x0000000008006aaa                HAL_ETH_WritePHYRegister
+ .text.HAL_ETH_Start
+                0x0000000008006b76       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x0000000008006b76                HAL_ETH_Start
+ .text.HAL_ETH_Stop
+                0x0000000008006bd4       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x0000000008006bd4                HAL_ETH_Stop
+ *fill*         0x0000000008006c32        0x2 
+ .text.HAL_ETH_ConfigMAC
+                0x0000000008006c34      0x1f4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                0x0000000008006c34                HAL_ETH_ConfigMAC
+ .text.ETH_MACDMAConfig
+                0x0000000008006e28      0x394 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.ETH_MACAddressConfig
+                0x00000000080071bc       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.ETH_MACTransmissionEnable
+                0x000000000800722c       0x3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.ETH_MACTransmissionDisable
+                0x0000000008007266       0x3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.ETH_MACReceptionEnable
+                0x00000000080072a0       0x3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.ETH_MACReceptionDisable
+                0x00000000080072da       0x3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.ETH_DMATransmissionEnable
+                0x0000000008007314       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.ETH_DMATransmissionDisable
+                0x0000000008007344       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.ETH_DMAReceptionEnable
+                0x0000000008007374       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.ETH_DMAReceptionDisable
+                0x00000000080073a4       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .text.ETH_FlushTransmitFIFO
+                0x00000000080073d4       0x52 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ *fill*         0x0000000008007426        0x2 
+ .text.HAL_GPIO_Init
+                0x0000000008007428      0x354 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+                0x0000000008007428                HAL_GPIO_Init
+ .text.HAL_GPIO_DeInit
+                0x000000000800777c      0x214 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+                0x000000000800777c                HAL_GPIO_DeInit
+ .text.HAL_GPIO_ReadPin
+                0x0000000008007990       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+                0x0000000008007990                HAL_GPIO_ReadPin
+ .text.HAL_GPIO_WritePin
+                0x00000000080079c0       0x32 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+                0x00000000080079c0                HAL_GPIO_WritePin
+ *fill*         0x00000000080079f2        0x2 
+ .text.HAL_I2C_Init
+                0x00000000080079f4      0x120 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+                0x00000000080079f4                HAL_I2C_Init
+ .text.HAL_I2C_DeInit
+                0x0000000008007b14       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+                0x0000000008007b14                HAL_I2C_DeInit
+ *fill*         0x0000000008007b72        0x2 
+ .text.HAL_I2C_Mem_Write
+                0x0000000008007b74      0x228 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+                0x0000000008007b74                HAL_I2C_Mem_Write
+ .text.HAL_I2C_Mem_Read
+                0x0000000008007d9c      0x234 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+                0x0000000008007d9c                HAL_I2C_Mem_Read
+ .text.HAL_I2C_GetState
+                0x0000000008007fd0       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+                0x0000000008007fd0                HAL_I2C_GetState
+ .text.I2C_RequestMemoryWrite
+                0x0000000008007fec       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_RequestMemoryRead
+                0x0000000008008094       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_Flush_TXDR
+                0x000000000800813c       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_WaitOnFlagUntilTimeout
+                0x0000000008008184       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_WaitOnTXISFlagUntilTimeout
+                0x0000000008008204       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_WaitOnSTOPFlagUntilTimeout
+                0x0000000008008284       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_IsAcknowledgeFailed
+                0x00000000080082fc       0xcc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.I2C_TransferConfig
+                0x00000000080083c8       0x5c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .text.HAL_I2CEx_ConfigAnalogFilter
+                0x0000000008008424       0x96 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+                0x0000000008008424                HAL_I2CEx_ConfigAnalogFilter
+ .text.HAL_I2CEx_ConfigDigitalFilter
+                0x00000000080084ba       0x98 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+                0x00000000080084ba                HAL_I2CEx_ConfigDigitalFilter
+ *fill*         0x0000000008008552        0x2 
+ .text.HAL_LTDC_Init
+                0x0000000008008554      0x1a0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+                0x0000000008008554                HAL_LTDC_Init
+ .text.HAL_LTDC_IRQHandler
+                0x00000000080086f4      0x148 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+                0x00000000080086f4                HAL_LTDC_IRQHandler
+ .text.HAL_LTDC_ErrorCallback
+                0x000000000800883c       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+                0x000000000800883c                HAL_LTDC_ErrorCallback
+ .text.HAL_LTDC_LineEventCallback
+                0x0000000008008850       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+                0x0000000008008850                HAL_LTDC_LineEventCallback
+ .text.HAL_LTDC_ReloadEventCallback
+                0x0000000008008864       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+                0x0000000008008864                HAL_LTDC_ReloadEventCallback
+ .text.HAL_LTDC_ConfigLayer
+                0x0000000008008878       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+                0x0000000008008878                HAL_LTDC_ConfigLayer
+ .text.HAL_LTDC_GetState
+                0x00000000080088f4       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+                0x00000000080088f4                HAL_LTDC_GetState
+ .text.LTDC_SetConfig
+                0x0000000008008910      0x334 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .text.HAL_PWR_EnableBkUpAccess
+                0x0000000008008c44       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+                0x0000000008008c44                HAL_PWR_EnableBkUpAccess
+ .text.HAL_PWREx_EnableOverDrive
+                0x0000000008008c64       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+                0x0000000008008c64                HAL_PWREx_EnableOverDrive
+ .text.HAL_RCC_OscConfig
+                0x0000000008008d04      0x548 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+                0x0000000008008d04                HAL_RCC_OscConfig
+ .text.HAL_RCC_ClockConfig
+                0x000000000800924c      0x1d8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+                0x000000000800924c                HAL_RCC_ClockConfig
+ .text.HAL_RCC_GetSysClockFreq
+                0x0000000008009424      0x164 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+                0x0000000008009424                HAL_RCC_GetSysClockFreq
+ .text.HAL_RCC_GetHCLKFreq
+                0x0000000008009588       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+                0x0000000008009588                HAL_RCC_GetHCLKFreq
+ .text.HAL_RCC_GetPCLK1Freq
+                0x00000000080095a0       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+                0x00000000080095a0                HAL_RCC_GetPCLK1Freq
+ .text.HAL_RCC_GetPCLK2Freq
+                0x00000000080095c8       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+                0x00000000080095c8                HAL_RCC_GetPCLK2Freq
+ .text.HAL_RCC_GetClockConfig
+                0x00000000080095f0       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+                0x00000000080095f0                HAL_RCC_GetClockConfig
+ .text.HAL_RCCEx_PeriphCLKConfig
+                0x0000000008009654      0x7dc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+                0x0000000008009654                HAL_RCCEx_PeriphCLKConfig
+ .text.HAL_RNG_Init
+                0x0000000008009e30       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+                0x0000000008009e30                HAL_RNG_Init
+ .text.HAL_RTC_Init
+                0x0000000008009e84       0xf8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+                0x0000000008009e84                HAL_RTC_Init
+ .text.HAL_RTC_SetTime
+                0x0000000008009f7c      0x17c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+                0x0000000008009f7c                HAL_RTC_SetTime
+ .text.HAL_RTC_SetDate
+                0x000000000800a0f8      0x150 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+                0x000000000800a0f8                HAL_RTC_SetDate
+ .text.HAL_RTC_SetAlarm
+                0x000000000800a248      0x230 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+                0x000000000800a248                HAL_RTC_SetAlarm
+ .text.HAL_RTC_WaitForSynchro
+                0x000000000800a478       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+                0x000000000800a478                HAL_RTC_WaitForSynchro
+ .text.RTC_EnterInitMode
+                0x000000000800a4c8       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+                0x000000000800a4c8                RTC_EnterInitMode
+ .text.RTC_ByteToBcd2
+                0x000000000800a520       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+                0x000000000800a520                RTC_ByteToBcd2
+ .text.HAL_RTCEx_SetTimeStamp
+                0x000000000800a55c       0xac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+                0x000000000800a55c                HAL_RTCEx_SetTimeStamp
+ .text.HAL_SDRAM_Init
+                0x000000000800a608       0x68 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+                0x000000000800a608                HAL_SDRAM_Init
+ .text.HAL_SDRAM_SendCommand
+                0x000000000800a670       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+                0x000000000800a670                HAL_SDRAM_SendCommand
+ .text.HAL_SDRAM_ProgramRefreshRate
+                0x000000000800a6c6       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+                0x000000000800a6c6                HAL_SDRAM_ProgramRefreshRate
+ .text.HAL_SPI_Init
+                0x000000000800a706      0x124 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+                0x000000000800a706                HAL_SPI_Init
+ .text.HAL_TIM_Base_Init
+                0x000000000800a82a       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800a82a                HAL_TIM_Base_Init
+ .text.HAL_TIM_Base_Start_IT
+                0x000000000800a880       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800a880                HAL_TIM_Base_Start_IT
+ .text.HAL_TIM_PWM_Init
+                0x000000000800a8d4       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800a8d4                HAL_TIM_PWM_Init
+ .text.HAL_TIM_PWM_MspInit
+                0x000000000800a92a       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800a92a                HAL_TIM_PWM_MspInit
+ .text.HAL_TIM_IRQHandler
+                0x000000000800a93e      0x23e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800a93e                HAL_TIM_IRQHandler
+ .text.HAL_TIM_PWM_ConfigChannel
+                0x000000000800ab7c      0x230 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800ab7c                HAL_TIM_PWM_ConfigChannel
+ .text.HAL_TIM_ConfigClockSource
+                0x000000000800adac      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800adac                HAL_TIM_ConfigClockSource
+ .text.HAL_TIM_SlaveConfigSynchro
+                0x000000000800af20       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800af20                HAL_TIM_SlaveConfigSynchro
+ .text.HAL_TIM_OC_DelayElapsedCallback
+                0x000000000800afa4       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800afa4                HAL_TIM_OC_DelayElapsedCallback
+ .text.HAL_TIM_IC_CaptureCallback
+                0x000000000800afb8       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800afb8                HAL_TIM_IC_CaptureCallback
+ .text.HAL_TIM_PWM_PulseFinishedCallback
+                0x000000000800afcc       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800afcc                HAL_TIM_PWM_PulseFinishedCallback
+ .text.HAL_TIM_TriggerCallback
+                0x000000000800afe0       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800afe0                HAL_TIM_TriggerCallback
+ .text.TIM_Base_SetConfig
+                0x000000000800aff4      0x140 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800aff4                TIM_Base_SetConfig
+ .text.TIM_OC1_SetConfig
+                0x000000000800b134       0xe4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_OC2_SetConfig
+                0x000000000800b218       0xf0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800b218                TIM_OC2_SetConfig
+ .text.TIM_OC3_SetConfig
+                0x000000000800b308       0xec Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_OC4_SetConfig
+                0x000000000800b3f4       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_OC5_SetConfig
+                0x000000000800b4a4       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_OC6_SetConfig
+                0x000000000800b548       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_SlaveTimer_SetConfig
+                0x000000000800b5f0      0x110 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_TI1_ConfigInputStage
+                0x000000000800b700       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_TI2_ConfigInputStage
+                0x000000000800b75e       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_ITRx_SetConfig
+                0x000000000800b7be       0x36 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .text.TIM_ETR_SetConfig
+                0x000000000800b7f4       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                0x000000000800b7f4                TIM_ETR_SetConfig
+ .text.HAL_TIMEx_MasterConfigSynchronization
+                0x000000000800b834      0x11c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+                0x000000000800b834                HAL_TIMEx_MasterConfigSynchronization
+ .text.HAL_TIMEx_ConfigBreakDeadTime
+                0x000000000800b950       0xfc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+                0x000000000800b950                HAL_TIMEx_ConfigBreakDeadTime
+ .text.HAL_TIMEx_CommutCallback
+                0x000000000800ba4c       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+                0x000000000800ba4c                HAL_TIMEx_CommutCallback
+ .text.HAL_TIMEx_BreakCallback
+                0x000000000800ba60       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+                0x000000000800ba60                HAL_TIMEx_BreakCallback
+ .text.HAL_TIMEx_Break2Callback
+                0x000000000800ba74       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+                0x000000000800ba74                HAL_TIMEx_Break2Callback
+ .text.HAL_UART_Init
+                0x000000000800ba88       0x9c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+                0x000000000800ba88                HAL_UART_Init
+ .text.UART_SetConfig
+                0x000000000800bb24      0x554 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+                0x000000000800bb24                UART_SetConfig
+ .text.UART_AdvFeatureConfig
+                0x000000000800c078      0x144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+                0x000000000800c078                UART_AdvFeatureConfig
+ .text.UART_CheckIdleState
+                0x000000000800c1bc       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+                0x000000000800c1bc                UART_CheckIdleState
+ .text.UART_WaitOnFlagUntilTimeout
+                0x000000000800c21a       0xf6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+                0x000000000800c21a                UART_WaitOnFlagUntilTimeout
+ .text.FMC_SDRAM_Init
+                0x000000000800c310       0xe4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+                0x000000000800c310                FMC_SDRAM_Init
+ .text.FMC_SDRAM_Timing_Init
+                0x000000000800c3f4      0x100 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+                0x000000000800c3f4                FMC_SDRAM_Timing_Init
+ .text.FMC_SDRAM_SendCommand
+                0x000000000800c4f4       0x42 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+                0x000000000800c4f4                FMC_SDRAM_SendCommand
+ .text.FMC_SDRAM_ProgramRefreshRate
+                0x000000000800c536       0x26 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+                0x000000000800c536                FMC_SDRAM_ProgramRefreshRate
+ .text.MX_LWIP_Init
+                0x000000000800c55c       0xe0 LWIP/App/lwip.o
+                0x000000000800c55c                MX_LWIP_Init
+ .text.HAL_ETH_MspInit
+                0x000000000800c63c      0x144 LWIP/Target/ethernetif.o
+                0x000000000800c63c                HAL_ETH_MspInit
+ .text.HAL_ETH_RxCpltCallback
+                0x000000000800c780       0x20 LWIP/Target/ethernetif.o
+                0x000000000800c780                HAL_ETH_RxCpltCallback
+ .text.low_level_init
+                0x000000000800c7a0      0x1b0 LWIP/Target/ethernetif.o
+ .text.low_level_output
+                0x000000000800c950      0x13c LWIP/Target/ethernetif.o
+ .text.low_level_input
+                0x000000000800ca8c      0x168 LWIP/Target/ethernetif.o
+ .text.ethernetif_input
+                0x000000000800cbf4       0x60 LWIP/Target/ethernetif.o
+                0x000000000800cbf4                ethernetif_input
+ .text.ethernetif_init
+                0x000000000800cc54       0x5c LWIP/Target/ethernetif.o
+                0x000000000800cc54                ethernetif_init
+ .text.sys_now  0x000000000800ccb0        0xe LWIP/Target/ethernetif.o
+                0x000000000800ccb0                sys_now
+ *fill*         0x000000000800ccbe        0x2 
+ .text.ethernetif_set_link
+                0x000000000800ccc0       0x78 LWIP/Target/ethernetif.o
+                0x000000000800ccc0                ethernetif_set_link
+ .text.ethernetif_update_config
+                0x000000000800cd38       0xf8 LWIP/Target/ethernetif.o
+                0x000000000800cd38                ethernetif_update_config
+ .text.ethernetif_notify_conn_changed
+                0x000000000800ce30       0x14 LWIP/Target/ethernetif.o
+                0x000000000800ce30                ethernetif_notify_conn_changed
+ .text.makeFreeRtosPriority
+                0x000000000800ce44       0x30 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.inHandlerMode
+                0x000000000800ce74       0x24 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .text.osKernelStart
+                0x000000000800ce98        0xe Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800ce98                osKernelStart
+ .text.osKernelSysTick
+                0x000000000800cea6       0x20 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800cea6                osKernelSysTick
+ .text.osThreadCreate
+                0x000000000800cec6       0x98 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800cec6                osThreadCreate
+ .text.osDelay  0x000000000800cf5e       0x28 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800cf5e                osDelay
+ .text.osMutexCreate
+                0x000000000800cf86       0x30 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800cf86                osMutexCreate
+ *fill*         0x000000000800cfb6        0x2 
+ .text.osMutexWait
+                0x000000000800cfb8       0x9c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800cfb8                osMutexWait
+ .text.osMutexRelease
+                0x000000000800d054       0x6c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800d054                osMutexRelease
+ .text.osSemaphoreCreate
+                0x000000000800d0c0       0x80 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800d0c0                osSemaphoreCreate
+ .text.osSemaphoreWait
+                0x000000000800d140       0x9c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800d140                osSemaphoreWait
+ .text.osSemaphoreRelease
+                0x000000000800d1dc       0x6c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800d1dc                osSemaphoreRelease
+ .text.osMessageCreate
+                0x000000000800d248       0x52 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800d248                osMessageCreate
+ *fill*         0x000000000800d29a        0x2 
+ .text.osMessagePut
+                0x000000000800d29c       0x80 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800d29c                osMessagePut
+ .text.osMessageGet
+                0x000000000800d31c       0xe8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x000000000800d31c                osMessageGet
+ .text.vListInitialise
+                0x000000000800d404       0x40 Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x000000000800d404                vListInitialise
+ .text.vListInitialiseItem
+                0x000000000800d444       0x1a Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x000000000800d444                vListInitialiseItem
+ .text.vListInsertEnd
+                0x000000000800d45e       0x48 Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x000000000800d45e                vListInsertEnd
+ .text.vListInsert
+                0x000000000800d4a6       0x72 Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x000000000800d4a6                vListInsert
+ .text.uxListRemove
+                0x000000000800d518       0x54 Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x000000000800d518                uxListRemove
+ .text.xQueueGenericReset
+                0x000000000800d56c       0xd4 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800d56c                xQueueGenericReset
+ .text.xQueueGenericCreateStatic
+                0x000000000800d640       0xfa Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800d640                xQueueGenericCreateStatic
+ .text.xQueueGenericCreate
+                0x000000000800d73a       0x82 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800d73a                xQueueGenericCreate
+ .text.prvInitialiseNewQueue
+                0x000000000800d7bc       0x3e Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.prvInitialiseMutex
+                0x000000000800d7fa       0x34 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.xQueueCreateMutex
+                0x000000000800d82e       0x30 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800d82e                xQueueCreateMutex
+ .text.xQueueCreateMutexStatic
+                0x000000000800d85e       0x36 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800d85e                xQueueCreateMutexStatic
+ .text.xQueueCreateCountingSemaphoreStatic
+                0x000000000800d894       0x72 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800d894                xQueueCreateCountingSemaphoreStatic
+ .text.xQueueCreateCountingSemaphore
+                0x000000000800d906       0x6a Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800d906                xQueueCreateCountingSemaphore
+ .text.xQueueGenericSend
+                0x000000000800d970      0x204 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800d970                xQueueGenericSend
+ .text.xQueueGenericSendFromISR
+                0x000000000800db74      0x138 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800db74                xQueueGenericSendFromISR
+ .text.xQueueGiveFromISR
+                0x000000000800dcac      0x122 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800dcac                xQueueGiveFromISR
+ *fill*         0x000000000800ddce        0x2 
+ .text.xQueueReceive
+                0x000000000800ddd0      0x1c4 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800ddd0                xQueueReceive
+ .text.xQueueSemaphoreTake
+                0x000000000800df94      0x220 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800df94                xQueueSemaphoreTake
+ .text.xQueueReceiveFromISR
+                0x000000000800e1b4      0x106 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x000000000800e1b4                xQueueReceiveFromISR
+ .text.prvGetDisinheritPriorityAfterTimeout
+                0x000000000800e2ba       0x30 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.prvCopyDataToQueue
+                0x000000000800e2ea       0xd4 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.prvCopyDataFromQueue
+                0x000000000800e3be       0x4c Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.prvUnlockQueue
+                0x000000000800e40a       0xa4 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.prvIsQueueEmpty
+                0x000000000800e4ae       0x2c Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.prvIsQueueFull
+                0x000000000800e4da       0x30 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .text.xTaskCreateStatic
+                0x000000000800e50a       0xc0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800e50a                xTaskCreateStatic
+ .text.xTaskCreate
+                0x000000000800e5ca       0x8a Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800e5ca                xTaskCreate
+ .text.prvInitialiseNewTask
+                0x000000000800e654      0x126 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ *fill*         0x000000000800e77a        0x2 
+ .text.prvAddNewTaskToReadyList
+                0x000000000800e77c       0xd4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.vTaskDelayUntil
+                0x000000000800e850      0x100 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800e850                vTaskDelayUntil
+ .text.vTaskDelay
+                0x000000000800e950       0x6c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800e950                vTaskDelay
+ .text.vTaskStartScheduler
+                0x000000000800e9bc       0xc4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800e9bc                vTaskStartScheduler
+ .text.vTaskSuspendAll
+                0x000000000800ea80       0x1c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800ea80                vTaskSuspendAll
+ .text.xTaskResumeAll
+                0x000000000800ea9c      0x13c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800ea9c                xTaskResumeAll
+ .text.xTaskGetTickCount
+                0x000000000800ebd8       0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800ebd8                xTaskGetTickCount
+ .text.xTaskGetTickCountFromISR
+                0x000000000800ebf8       0x24 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800ebf8                xTaskGetTickCountFromISR
+ .text.xTaskIncrementTick
+                0x000000000800ec1c      0x174 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800ec1c                xTaskIncrementTick
+ .text.vTaskSwitchContext
+                0x000000000800ed90      0x104 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800ed90                vTaskSwitchContext
+ .text.vTaskPlaceOnEventList
+                0x000000000800ee94       0x4c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800ee94                vTaskPlaceOnEventList
+ .text.xTaskRemoveFromEventList
+                0x000000000800eee0       0xc8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800eee0                xTaskRemoveFromEventList
+ .text.vTaskInternalSetTimeOutState
+                0x000000000800efa8       0x2c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800efa8                vTaskInternalSetTimeOutState
+ .text.xTaskCheckForTimeOut
+                0x000000000800efd4       0xc8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800efd4                xTaskCheckForTimeOut
+ .text.vTaskMissedYield
+                0x000000000800f09c       0x18 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800f09c                vTaskMissedYield
+ .text.prvIdleTask
+                0x000000000800f0b4       0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.prvInitialiseTaskLists
+                0x000000000800f0e8       0x80 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.prvCheckTasksWaitingTermination
+                0x000000000800f168       0x58 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.prvDeleteTCB
+                0x000000000800f1c0       0x60 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.prvResetNextTaskUnblockTime
+                0x000000000800f220       0x40 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.xTaskGetSchedulerState
+                0x000000000800f260       0x3c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800f260                xTaskGetSchedulerState
+ .text.xTaskPriorityInherit
+                0x000000000800f29c      0x100 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800f29c                xTaskPriorityInherit
+ .text.xTaskPriorityDisinherit
+                0x000000000800f39c      0x110 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800f39c                xTaskPriorityDisinherit
+ .text.vTaskPriorityDisinheritAfterTimeout
+                0x000000000800f4ac      0x138 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800f4ac                vTaskPriorityDisinheritAfterTimeout
+ .text.pvTaskIncrementMutexHeldCount
+                0x000000000800f5e4       0x28 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x000000000800f5e4                pvTaskIncrementMutexHeldCount
+ .text.prvAddCurrentTaskToDelayedList
+                0x000000000800f60c       0xcc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .text.pxPortInitialiseStack
+                0x000000000800f6d8       0x68 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+                0x000000000800f6d8                pxPortInitialiseStack
+ .text.prvTaskExitError
+                0x000000000800f740       0x5c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ *fill*         0x000000000800f79c        0x4 
+ .text.SVC_Handler
+                0x000000000800f7a0       0x28 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+                0x000000000800f7a0                SVC_Handler
+ .text.prvPortStartFirstTask
+                0x000000000800f7c8       0x28 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .text.xPortStartScheduler
+                0x000000000800f7f0       0xf8 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+                0x000000000800f7f0                xPortStartScheduler
+ .text.vPortEnterCritical
+                0x000000000800f8e8       0x64 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+                0x000000000800f8e8                vPortEnterCritical
+ .text.vPortExitCritical
+                0x000000000800f94c       0x54 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+                0x000000000800f94c                vPortExitCritical
+ .text.PendSV_Handler
+                0x000000000800f9a0       0x68 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+                0x000000000800f9a0                PendSV_Handler
+ .text.SysTick_Handler
+                0x000000000800fa08       0x44 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+                0x000000000800fa08                SysTick_Handler
+ .text.vPortSetupTimerInterrupt
+                0x000000000800fa4c       0x48 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+                0x000000000800fa4c                vPortSetupTimerInterrupt
+ .text.vPortEnableVFP
+                0x000000000800fa94       0x14 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .text.vPortValidateInterruptPriority
+                0x000000000800faa8       0x84 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+                0x000000000800faa8                vPortValidateInterruptPriority
+ .text.pvPortMalloc
+                0x000000000800fb2c      0x198 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+                0x000000000800fb2c                pvPortMalloc
+ .text.vPortFree
+                0x000000000800fcc4       0xb8 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+                0x000000000800fcc4                vPortFree
+ .text.prvHeapInit
+                0x000000000800fd7c       0xc4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .text.prvInsertBlockIntoFreeList
+                0x000000000800fe40       0xb4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .text.tcpip_timeouts_mbox_fetch
+                0x000000000800fef4       0x6c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.tcpip_thread
+                0x000000000800ff60       0x68 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.tcpip_thread_handle_msg
+                0x000000000800ffc8       0x88 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .text.tcpip_inpkt
+                0x0000000008010050       0x88 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+                0x0000000008010050                tcpip_inpkt
+ .text.tcpip_input
+                0x00000000080100d8       0x44 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+                0x00000000080100d8                tcpip_input
+ .text.tcpip_try_callback
+                0x000000000801011c       0x80 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+                0x000000000801011c                tcpip_try_callback
+ .text.tcpip_init
+                0x000000000801019c       0x94 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+                0x000000000801019c                tcpip_init
+ .text.lwip_htons
+                0x0000000008010230       0x2a Middlewares/Third_Party/LwIP/src/core/def.o
+                0x0000000008010230                lwip_htons
+ .text.lwip_htonl
+                0x000000000801025a       0x32 Middlewares/Third_Party/LwIP/src/core/def.o
+                0x000000000801025a                lwip_htonl
+ .text.lwip_init
+                0x000000000801028c       0x2e Middlewares/Third_Party/LwIP/src/core/init.o
+                0x000000000801028c                lwip_init
+ *fill*         0x00000000080102ba        0x2 
+ .text.ptr_to_mem
+                0x00000000080102bc       0x24 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .text.mem_to_ptr
+                0x00000000080102e0       0x24 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .text.plug_holes
+                0x0000000008010304      0x144 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .text.mem_init
+                0x0000000008010448       0xa4 Middlewares/Third_Party/LwIP/src/core/mem.o
+                0x0000000008010448                mem_init
+ .text.mem_link_valid
+                0x00000000080104ec       0x78 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .text.mem_free
+                0x0000000008010564      0x120 Middlewares/Third_Party/LwIP/src/core/mem.o
+                0x0000000008010564                mem_free
+ .text.mem_trim
+                0x0000000008010684      0x214 Middlewares/Third_Party/LwIP/src/core/mem.o
+                0x0000000008010684                mem_trim
+ .text.mem_malloc
+                0x0000000008010898      0x20c Middlewares/Third_Party/LwIP/src/core/mem.o
+                0x0000000008010898                mem_malloc
+ .text.memp_init_pool
+                0x0000000008010aa4       0x5e Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x0000000008010aa4                memp_init_pool
+ *fill*         0x0000000008010b02        0x2 
+ .text.memp_init
+                0x0000000008010b04       0x34 Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x0000000008010b04                memp_init
+ .text.do_memp_malloc_pool
+                0x0000000008010b38       0x64 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .text.memp_malloc
+                0x0000000008010b9c       0x4c Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x0000000008010b9c                memp_malloc
+ .text.do_memp_free_pool
+                0x0000000008010be8       0x58 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .text.memp_free
+                0x0000000008010c40       0x54 Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x0000000008010c40                memp_free
+ .text.netif_init
+                0x0000000008010c94        0xe Middlewares/Third_Party/LwIP/src/core/netif.o
+                0x0000000008010c94                netif_init
+ *fill*         0x0000000008010ca2        0x2 
+ .text.netif_add
+                0x0000000008010ca4      0x1ac Middlewares/Third_Party/LwIP/src/core/netif.o
+                0x0000000008010ca4                netif_add
+ .text.netif_do_ip_addr_changed
+                0x0000000008010e50       0x22 Middlewares/Third_Party/LwIP/src/core/netif.o
+ *fill*         0x0000000008010e72        0x2 
+ .text.netif_do_set_ipaddr
+                0x0000000008010e74       0x94 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_do_set_netmask
+                0x0000000008010f08       0x3e Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_do_set_gw
+                0x0000000008010f46       0x3e Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_set_addr
+                0x0000000008010f84       0x94 Middlewares/Third_Party/LwIP/src/core/netif.o
+                0x0000000008010f84                netif_set_addr
+ .text.netif_set_default
+                0x0000000008011018       0x20 Middlewares/Third_Party/LwIP/src/core/netif.o
+                0x0000000008011018                netif_set_default
+ .text.netif_set_up
+                0x0000000008011038       0x58 Middlewares/Third_Party/LwIP/src/core/netif.o
+                0x0000000008011038                netif_set_up
+ .text.netif_issue_reports
+                0x0000000008011090       0x80 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .text.netif_set_down
+                0x0000000008011110       0x64 Middlewares/Third_Party/LwIP/src/core/netif.o
+                0x0000000008011110                netif_set_down
+ .text.netif_set_link_up
+                0x0000000008011174       0x70 Middlewares/Third_Party/LwIP/src/core/netif.o
+                0x0000000008011174                netif_set_link_up
+ .text.netif_set_link_down
+                0x00000000080111e4       0x60 Middlewares/Third_Party/LwIP/src/core/netif.o
+                0x00000000080111e4                netif_set_link_down
+ .text.netif_set_link_callback
+                0x0000000008011244       0x22 Middlewares/Third_Party/LwIP/src/core/netif.o
+                0x0000000008011244                netif_set_link_callback
+ .text.netif_null_output_ip4
+                0x0000000008011266       0x1c Middlewares/Third_Party/LwIP/src/core/netif.o
+ *fill*         0x0000000008011282        0x2 
+ .text.netif_get_by_index
+                0x0000000008011284       0x4c Middlewares/Third_Party/LwIP/src/core/netif.o
+                0x0000000008011284                netif_get_by_index
+ .text.pbuf_free_ooseq
+                0x00000000080112d0       0x4c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_free_ooseq_callback
+                0x000000000801131c       0x14 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_pool_is_empty
+                0x0000000008011330       0x54 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_init_alloced_pbuf
+                0x0000000008011384       0x54 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_alloc
+                0x00000000080113d8      0x1e4 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x00000000080113d8                pbuf_alloc
+ .text.pbuf_alloc_reference
+                0x00000000080115bc       0x68 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x00000000080115bc                pbuf_alloc_reference
+ .text.pbuf_alloced_custom
+                0x0000000008011624       0x68 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x0000000008011624                pbuf_alloced_custom
+ .text.pbuf_realloc
+                0x000000000801168c      0x110 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x000000000801168c                pbuf_realloc
+ .text.pbuf_add_header_impl
+                0x000000000801179c       0xd0 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_add_header
+                0x000000000801186c       0x1e Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x000000000801186c                pbuf_add_header
+ *fill*         0x000000000801188a        0x2 
+ .text.pbuf_remove_header
+                0x000000000801188c       0xa4 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x000000000801188c                pbuf_remove_header
+ .text.pbuf_header_impl
+                0x0000000008011930       0x42 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .text.pbuf_header_force
+                0x0000000008011972       0x24 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x0000000008011972                pbuf_header_force
+ *fill*         0x0000000008011996        0x2 
+ .text.pbuf_free
+                0x0000000008011998      0x11c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x0000000008011998                pbuf_free
+ .text.pbuf_clen
+                0x0000000008011ab4       0x2e Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x0000000008011ab4                pbuf_clen
+ *fill*         0x0000000008011ae2        0x2 
+ .text.pbuf_ref
+                0x0000000008011ae4       0x50 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x0000000008011ae4                pbuf_ref
+ .text.pbuf_cat
+                0x0000000008011b34       0xac Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x0000000008011b34                pbuf_cat
+ .text.pbuf_chain
+                0x0000000008011be0       0x20 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x0000000008011be0                pbuf_chain
+ .text.pbuf_copy
+                0x0000000008011c00      0x1a4 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x0000000008011c00                pbuf_copy
+ .text.pbuf_copy_partial
+                0x0000000008011da4       0xe4 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x0000000008011da4                pbuf_copy_partial
+ .text.pbuf_clone
+                0x0000000008011e88       0x64 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x0000000008011e88                pbuf_clone
+ .text.tcp_init
+                0x0000000008011eec       0x24 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008011eec                tcp_init
+ .text.tcp_free
+                0x0000000008011f10       0x38 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008011f10                tcp_free
+ .text.tcp_free_listen
+                0x0000000008011f48       0x38 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_tmr  0x0000000008011f80       0x2c Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008011f80                tcp_tmr
+ .text.tcp_remove_listener
+                0x0000000008011fac       0x54 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_listen_closed
+                0x0000000008012000       0x74 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_close_shutdown
+                0x0000000008012074      0x1bc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_close_shutdown_fin
+                0x0000000008012230       0xcc Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_close
+                0x00000000080122fc       0x58 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x00000000080122fc                tcp_close
+ .text.tcp_abandon
+                0x0000000008012354      0x17c Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008012354                tcp_abandon
+ .text.tcp_abort
+                0x00000000080124d0       0x18 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x00000000080124d0                tcp_abort
+ .text.tcp_update_rcv_ann_wnd
+                0x00000000080124e8       0xb4 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x00000000080124e8                tcp_update_rcv_ann_wnd
+ .text.tcp_recved
+                0x000000000801259c       0xa0 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x000000000801259c                tcp_recved
+ .text.tcp_slowtmr
+                0x000000000801263c      0x67c Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x000000000801263c                tcp_slowtmr
+ .text.tcp_fasttmr
+                0x0000000008012cb8       0xc8 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008012cb8                tcp_fasttmr
+ .text.tcp_process_refused_data
+                0x0000000008012d80       0xf8 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008012d80                tcp_process_refused_data
+ .text.tcp_segs_free
+                0x0000000008012e78       0x28 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008012e78                tcp_segs_free
+ .text.tcp_seg_free
+                0x0000000008012ea0       0x30 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008012ea0                tcp_seg_free
+ .text.tcp_seg_copy
+                0x0000000008012ed0       0x58 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008012ed0                tcp_seg_copy
+ .text.tcp_recv_null
+                0x0000000008012f28       0x6c Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008012f28                tcp_recv_null
+ .text.tcp_kill_prio
+                0x0000000008012f94       0x9c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_kill_state
+                0x0000000008013030       0x94 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_kill_timewait
+                0x00000000080130c4       0x60 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_handle_closepend
+                0x0000000008013124       0x4c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_alloc
+                0x0000000008013170      0x108 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008013170                tcp_alloc
+ .text.tcp_pcb_purge
+                0x0000000008013278       0xa0 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008013278                tcp_pcb_purge
+ .text.tcp_pcb_remove
+                0x0000000008013318      0x128 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008013318                tcp_pcb_remove
+ .text.tcp_next_iss
+                0x0000000008013440       0x4c Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008013440                tcp_next_iss
+ .text.tcp_eff_send_mss_netif
+                0x000000000801348c       0x74 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x000000000801348c                tcp_eff_send_mss_netif
+ .text.tcp_netif_ip_addr_changed_pcblist
+                0x0000000008013500       0x64 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .text.tcp_netif_ip_addr_changed
+                0x0000000008013564       0x7c Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008013564                tcp_netif_ip_addr_changed
+ .text.tcp_free_ooseq
+                0x00000000080135e0       0x28 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x00000000080135e0                tcp_free_ooseq
+ .text.tcp_input
+                0x0000000008013608      0x810 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+                0x0000000008013608                tcp_input
+ .text.tcp_input_delayed_close
+                0x0000000008013e18       0x80 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .text.tcp_listen_input
+                0x0000000008013e98      0x1fc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .text.tcp_timewait_input
+                0x0000000008014094       0xf8 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .text.tcp_process
+                0x000000000801418c      0x7e0 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .text.tcp_oos_insert_segment
+                0x000000000801496c      0x110 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .text.tcp_free_acked_segments
+                0x0000000008014a7c       0xf8 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .text.tcp_receive
+                0x0000000008014b74      0xf2c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .text.tcp_get_next_optbyte
+                0x0000000008015aa0       0x6c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .text.tcp_parseopt
+                0x0000000008015b0c       0xe8 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .text.tcp_trigger_input_pcb_close
+                0x0000000008015bf4       0x20 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+                0x0000000008015bf4                tcp_trigger_input_pcb_close
+ .text.tcp_route
+                0x0000000008015c14       0x38 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text.tcp_create_segment
+                0x0000000008015c4c      0x13c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text.tcp_split_unsent_seg
+                0x0000000008015d88      0x290 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x0000000008015d88                tcp_split_unsent_seg
+ .text.tcp_send_fin
+                0x0000000008016018       0xa0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x0000000008016018                tcp_send_fin
+ .text.tcp_enqueue_flags
+                0x00000000080160b8      0x1dc Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x00000000080160b8                tcp_enqueue_flags
+ .text.tcp_output
+                0x0000000008016294      0x3f0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x0000000008016294                tcp_output
+ .text.tcp_output_segment_busy
+                0x0000000008016684       0x40 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text.tcp_output_segment
+                0x00000000080166c4      0x1c0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text.tcp_rexmit_rto_prepare
+                0x0000000008016884       0xe0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x0000000008016884                tcp_rexmit_rto_prepare
+ .text.tcp_rexmit_rto_commit
+                0x0000000008016964       0x50 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x0000000008016964                tcp_rexmit_rto_commit
+ .text.tcp_rexmit_rto
+                0x00000000080169b4       0x44 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x00000000080169b4                tcp_rexmit_rto
+ .text.tcp_rexmit
+                0x00000000080169f8       0xd8 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x00000000080169f8                tcp_rexmit
+ .text.tcp_rexmit_fast
+                0x0000000008016ad0       0xd8 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x0000000008016ad0                tcp_rexmit_fast
+ .text.tcp_output_alloc_header_common
+                0x0000000008016ba8       0xe8 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text.tcp_output_alloc_header
+                0x0000000008016c90       0x7c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text.tcp_output_fill_options
+                0x0000000008016d0c       0x80 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text.tcp_output_control_segment
+                0x0000000008016d8c       0x94 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .text.tcp_rst  0x0000000008016e20       0xa4 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x0000000008016e20                tcp_rst
+ .text.tcp_send_empty_ack
+                0x0000000008016ec4       0xc4 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x0000000008016ec4                tcp_send_empty_ack
+ .text.tcp_keepalive
+                0x0000000008016f88       0x80 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x0000000008016f88                tcp_keepalive
+ .text.tcp_zero_window_probe
+                0x0000000008017008      0x154 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                0x0000000008017008                tcp_zero_window_probe
+ .text.tcpip_tcp_timer
+                0x000000000801715c       0x48 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .text.tcp_timer_needed
+                0x00000000080171a4       0x40 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+                0x00000000080171a4                tcp_timer_needed
+ .text.sys_timeout_abs
+                0x00000000080171e4       0xdc Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .text.lwip_cyclic_timer
+                0x00000000080172c0       0x64 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .text.sys_timeouts_init
+                0x0000000008017324       0x40 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+                0x0000000008017324                sys_timeouts_init
+ .text.sys_timeout
+                0x0000000008017364       0x4c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+                0x0000000008017364                sys_timeout
+ .text.sys_check_timeouts
+                0x00000000080173b0       0x74 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+                0x00000000080173b0                sys_check_timeouts
+ .text.sys_timeouts_sleeptime
+                0x0000000008017424       0x70 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+                0x0000000008017424                sys_timeouts_sleeptime
+ .text.udp_init
+                0x0000000008017494       0x24 Middlewares/Third_Party/LwIP/src/core/udp.o
+                0x0000000008017494                udp_init
+ .text.udp_new_port
+                0x00000000080174b8       0x70 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .text.udp_input_local_match
+                0x0000000008017528       0xc8 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .text.udp_input
+                0x00000000080175f0      0x228 Middlewares/Third_Party/LwIP/src/core/udp.o
+                0x00000000080175f0                udp_input
+ .text.udp_sendto_if
+                0x0000000008017818       0xe8 Middlewares/Third_Party/LwIP/src/core/udp.o
+                0x0000000008017818                udp_sendto_if
+ .text.udp_sendto_if_src
+                0x0000000008017900      0x1cc Middlewares/Third_Party/LwIP/src/core/udp.o
+                0x0000000008017900                udp_sendto_if_src
+ .text.udp_bind
+                0x0000000008017acc      0x110 Middlewares/Third_Party/LwIP/src/core/udp.o
+                0x0000000008017acc                udp_bind
+ .text.udp_connect
+                0x0000000008017bdc       0xdc Middlewares/Third_Party/LwIP/src/core/udp.o
+                0x0000000008017bdc                udp_connect
+ .text.udp_recv
+                0x0000000008017cb8       0x40 Middlewares/Third_Party/LwIP/src/core/udp.o
+                0x0000000008017cb8                udp_recv
+ .text.udp_remove
+                0x0000000008017cf8       0x84 Middlewares/Third_Party/LwIP/src/core/udp.o
+                0x0000000008017cf8                udp_remove
+ .text.udp_new  0x0000000008017d7c       0x2e Middlewares/Third_Party/LwIP/src/core/udp.o
+                0x0000000008017d7c                udp_new
+ *fill*         0x0000000008017daa        0x2 
+ .text.udp_netif_ip_addr_changed
+                0x0000000008017dac       0x60 Middlewares/Third_Party/LwIP/src/core/udp.o
+                0x0000000008017dac                udp_netif_ip_addr_changed
+ .text.dhcp_inc_pcb_refcount
+                0x0000000008017e0c       0xa4 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_dec_pcb_refcount
+                0x0000000008017eb0       0x54 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_handle_nak
+                0x0000000008017f04       0x34 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_check
+                0x0000000008017f38       0x68 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_handle_offer
+                0x0000000008017fa0       0x4c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_select
+                0x0000000008017fec      0x1f8 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_coarse_tmr
+                0x00000000080181e4       0xa8 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+                0x00000000080181e4                dhcp_coarse_tmr
+ .text.dhcp_fine_tmr
+                0x000000000801828c       0x64 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+                0x000000000801828c                dhcp_fine_tmr
+ .text.dhcp_timeout
+                0x00000000080182f0       0x92 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_t1_timeout
+                0x0000000008018382       0x5e Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_t2_timeout
+                0x00000000080183e0       0x66 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ *fill*         0x0000000008018446        0x2 
+ .text.dhcp_handle_ack
+                0x0000000008018448       0xc0 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_start
+                0x0000000008018508       0xfc Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+                0x0000000008018508                dhcp_start
+ .text.dhcp_network_changed
+                0x0000000008018604       0x9c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+                0x0000000008018604                dhcp_network_changed
+ .text.dhcp_arp_reply
+                0x00000000080186a0       0x58 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+                0x00000000080186a0                dhcp_arp_reply
+ .text.dhcp_decline
+                0x00000000080186f8       0xec Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_discover
+                0x00000000080187e4      0x144 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_bind
+                0x0000000008018928      0x1b4 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_renew
+                0x0000000008018adc      0x138 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+                0x0000000008018adc                dhcp_renew
+ .text.dhcp_rebind
+                0x0000000008018c14      0x138 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_reboot
+                0x0000000008018d4c      0x16c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_release_and_stop
+                0x0000000008018eb8      0x134 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+                0x0000000008018eb8                dhcp_release_and_stop
+ .text.dhcp_set_state
+                0x0000000008018fec       0x34 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_option
+                0x0000000008019020       0x68 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_option_byte
+                0x0000000008019088       0x4c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_option_short
+                0x00000000080190d4       0x64 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_option_long
+                0x0000000008019138       0x88 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_parse_reply
+                0x00000000080191c0      0x5a8 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_recv
+                0x0000000008019768      0x198 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_create_msg
+                0x0000000008019900      0x1ac Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_option_trailer
+                0x0000000008019aac       0x5c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .text.dhcp_supplied_address
+                0x0000000008019b08       0x4c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+                0x0000000008019b08                dhcp_supplied_address
+ .text.etharp_free_entry
+                0x0000000008019b54       0x64 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .text.etharp_tmr
+                0x0000000008019bb8      0x150 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+                0x0000000008019bb8                etharp_tmr
+ .text.etharp_find_entry
+                0x0000000008019d08      0x2f0 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .text.etharp_update_arp_entry
+                0x0000000008019ff8      0x14c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .text.etharp_cleanup_netif
+                0x000000000801a144       0x60 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+                0x000000000801a144                etharp_cleanup_netif
+ .text.etharp_input
+                0x000000000801a1a4      0x11c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+                0x000000000801a1a4                etharp_input
+ .text.etharp_output_to_arp_index
+                0x000000000801a2c0      0x134 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .text.etharp_output
+                0x000000000801a3f4      0x204 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+                0x000000000801a3f4                etharp_output
+ .text.etharp_query
+                0x000000000801a5f8      0x27c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+                0x000000000801a5f8                etharp_query
+ .text.etharp_raw
+                0x000000000801a874      0x118 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .text.etharp_request_dst
+                0x000000000801a98c       0x44 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .text.etharp_request
+                0x000000000801a9d0       0x24 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+                0x000000000801a9d0                etharp_request
+ .text.icmp_input
+                0x000000000801a9f4      0x208 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+                0x000000000801a9f4                icmp_input
+ .text.icmp_dest_unreach
+                0x000000000801abfc       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+                0x000000000801abfc                icmp_dest_unreach
+ .text.icmp_time_exceeded
+                0x000000000801ac1c       0x20 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+                0x000000000801ac1c                icmp_time_exceeded
+ .text.icmp_send_response
+                0x000000000801ac3c       0xd4 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .text.ip4_route
+                0x000000000801ad10       0xe0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+                0x000000000801ad10                ip4_route
+ .text.ip4_input_accept
+                0x000000000801adf0       0x54 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .text.ip4_input
+                0x000000000801ae44      0x280 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+                0x000000000801ae44                ip4_input
+ .text.ip4_output_if
+                0x000000000801b0c4       0x54 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+                0x000000000801b0c4                ip4_output_if
+ .text.ip4_output_if_src
+                0x000000000801b118      0x15c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+                0x000000000801b118                ip4_output_if_src
+ .text.ip4_addr_isbroadcast_u32
+                0x000000000801b274       0x82 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+                0x000000000801b274                ip4_addr_isbroadcast_u32
+ *fill*         0x000000000801b2f6        0x2 
+ .text.ip_reass_tmr
+                0x000000000801b2f8       0x58 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+                0x000000000801b2f8                ip_reass_tmr
+ .text.ip_reass_free_complete_datagram
+                0x000000000801b350      0x148 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .text.ip_reass_remove_oldest_datagram
+                0x000000000801b498       0xc4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .text.ip_reass_enqueue_new_datagram
+                0x000000000801b55c       0x74 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .text.ip_reass_dequeue_datagram
+                0x000000000801b5d0       0x5c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .text.ip_reass_chain_frag_into_datagram_and_validate
+                0x000000000801b62c      0x2d4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .text.ip4_reass
+                0x000000000801b900      0x328 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+                0x000000000801b900                ip4_reass
+ .text.ip_frag_alloc_pbuf_custom_ref
+                0x000000000801bc28       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .text.ip_frag_free_pbuf_custom_ref
+                0x000000000801bc38       0x38 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .text.ipfrag_free_pbuf_custom
+                0x000000000801bc70       0x68 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .text.ip4_frag
+                0x000000000801bcd8      0x288 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+                0x000000000801bcd8                ip4_frag
+ .text.ethernet_input
+                0x000000000801bf60      0x11c Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+                0x000000000801bf60                ethernet_input
+ .text.ethernet_output
+                0x000000000801c07c       0x90 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+                0x000000000801c07c                ethernet_output
+ .text.sys_mbox_new
+                0x000000000801c10c       0x44 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000000801c10c                sys_mbox_new
+ .text.sys_mbox_trypost
+                0x000000000801c150       0x34 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000000801c150                sys_mbox_trypost
+ .text.sys_arch_mbox_fetch
+                0x000000000801c184       0x7e Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000000801c184                sys_arch_mbox_fetch
+ .text.sys_mbox_valid
+                0x000000000801c202       0x22 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000000801c202                sys_mbox_valid
+ .text.sys_init
+                0x000000000801c224       0x1c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000000801c224                sys_init
+ .text.sys_mutex_new
+                0x000000000801c240       0x38 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000000801c240                sys_mutex_new
+ .text.sys_mutex_lock
+                0x000000000801c278       0x1e Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000000801c278                sys_mutex_lock
+ .text.sys_mutex_unlock
+                0x000000000801c296       0x1a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000000801c296                sys_mutex_unlock
+ .text.sys_thread_new
+                0x000000000801c2b0       0x4a Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000000801c2b0                sys_thread_new
+ *fill*         0x000000000801c2fa        0x2 
+ .text.sys_arch_protect
+                0x000000000801c2fc       0x1c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000000801c2fc                sys_arch_protect
+ .text.sys_arch_unprotect
+                0x000000000801c318       0x20 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000000801c318                sys_arch_unprotect
+ .text.__libc_init_array
+                0x000000000801c338       0x48 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
+                0x000000000801c338                __libc_init_array
+ .text.memcmp   0x000000000801c380       0x1e c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcmp.o)
+                0x000000000801c380                memcmp
+ .text.memcpy   0x000000000801c39e       0x16 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o)
+                0x000000000801c39e                memcpy
+ .text.memmove  0x000000000801c3b4       0x32 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memmove.o)
+                0x000000000801c3b4                memmove
+ .text.memset   0x000000000801c3e6       0x10 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o)
+                0x000000000801c3e6                memset
+ *fill*         0x000000000801c3f6        0x2 
+ .text.printf   0x000000000801c3f8       0x30 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-printf.o)
+                0x000000000801c3f8                iprintf
+                0x000000000801c3f8                printf
+ .text.rand     0x000000000801c428       0x68 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-rand.o)
+                0x000000000801c428                rand
+ .text.sprintf  0x000000000801c490       0x40 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sprintf.o)
+                0x000000000801c490                siprintf
+                0x000000000801c490                sprintf
+ .text.std      0x000000000801c4d0       0x48 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .text._cleanup_r
+                0x000000000801c518        0xc c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+                0x000000000801c518                _cleanup_r
+ .text.__sfmoreglue
+                0x000000000801c524       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+                0x000000000801c524                __sfmoreglue
+ .text.__sinit  0x000000000801c550       0x60 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+                0x000000000801c550                __sinit
+ .text.__sfp    0x000000000801c5b0       0x78 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+                0x000000000801c5b0                __sfp
+ .text._fwalk_reent
+                0x000000000801c628       0x3c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fwalk.o)
+                0x000000000801c628                _fwalk_reent
+ .text.malloc   0x000000000801c664       0x10 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-malloc.o)
+                0x000000000801c664                malloc
+ .text._free_r  0x000000000801c674       0x9c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-freer.o)
+                0x000000000801c674                _free_r
+ .text._malloc_r
+                0x000000000801c710       0xb4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-mallocr.o)
+                0x000000000801c710                _malloc_r
+ .text.__ssputs_r
+                0x000000000801c7c4       0xb4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o)
+                0x000000000801c7c4                __ssputs_r
+ .text._svfprintf_r
+                0x000000000801c878      0x1f0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o)
+                0x000000000801c878                _svfiprintf_r
+                0x000000000801c878                _svfprintf_r
+ .text.__sfputc_r
+                0x000000000801ca68       0x2e c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+ .text.__sfputs_r
+                0x000000000801ca96       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+                0x000000000801ca96                __sfputs_r
+ *fill*         0x000000000801caba        0x2 
+ .text._vfprintf_r
+                0x000000000801cabc      0x22c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+                0x000000000801cabc                _vfprintf_r
+                0x000000000801cabc                _vfiprintf_r
+ .text._printf_common
+                0x000000000801cce8       0xea c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o)
+                0x000000000801cce8                _printf_common
+ *fill*         0x000000000801cdd2        0x2 
+ .text._printf_i
+                0x000000000801cdd4      0x224 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o)
+                0x000000000801cdd4                _printf_i
+ .text._sbrk_r  0x000000000801cff8       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sbrkr.o)
+                0x000000000801cff8                _sbrk_r
+ .text.__sread  0x000000000801d018       0x22 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
+                0x000000000801d018                __sread
+ .text.__swrite
+                0x000000000801d03a       0x38 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
+                0x000000000801d03a                __swrite
+ .text.__sseek  0x000000000801d072       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
+                0x000000000801d072                __sseek
+ .text.__sclose
+                0x000000000801d096        0x8 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
+                0x000000000801d096                __sclose
+ *fill*         0x000000000801d09e        0x2 
+ .text.__swbuf_r
+                0x000000000801d0a0       0xa4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wbuf.o)
+                0x000000000801d0a0                __swbuf_r
+ .text._write_r
+                0x000000000801d144       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-writer.o)
+                0x000000000801d144                _write_r
+ .text.__swsetup_r
+                0x000000000801d168       0xdc c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wsetup.o)
+                0x000000000801d168                __swsetup_r
+ .text._close_r
+                0x000000000801d244       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-closer.o)
+                0x000000000801d244                _close_r
+ .text.__sflush_r
+                0x000000000801d264      0x10c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fflush.o)
+                0x000000000801d264                __sflush_r
+ .text._fflush_r
+                0x000000000801d370       0x54 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fflush.o)
+                0x000000000801d370                _fflush_r
+ .text._lseek_r
+                0x000000000801d3c4       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-lseekr.o)
+                0x000000000801d3c4                _lseek_r
+ .text.__swhatbuf_r
+                0x000000000801d3e8       0x48 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-makebuf.o)
+                0x000000000801d3e8                __swhatbuf_r
+ .text.__smakebuf_r
+                0x000000000801d430       0x80 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-makebuf.o)
+                0x000000000801d430                __smakebuf_r
+ .text.__malloc_lock
+                0x000000000801d4b0        0x2 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mlock.o)
+                0x000000000801d4b0                __malloc_lock
+ .text.__malloc_unlock
+                0x000000000801d4b2        0x2 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mlock.o)
+                0x000000000801d4b2                __malloc_unlock
+ .text._realloc_r
+                0x000000000801d4b4       0x4c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-reallocr.o)
+                0x000000000801d4b4                _realloc_r
+ .text._read_r  0x000000000801d500       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-readr.o)
+                0x000000000801d500                _read_r
+ .text._fstat_r
+                0x000000000801d524       0x24 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fstatr.o)
+                0x000000000801d524                _fstat_r
+ .text._isatty_r
+                0x000000000801d548       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-isattyr.o)
+                0x000000000801d548                _isatty_r
+ .text._malloc_usable_size_r
+                0x000000000801d568       0x10 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-msizer.o)
+                0x000000000801d568                _malloc_usable_size_r
+ *(.glue_7)
+ .glue_7        0x000000000801d578        0x0 linker stubs
+ *(.glue_7t)
+ .glue_7t       0x000000000801d578        0x0 linker stubs
+ *(.eh_frame)
+ .eh_frame      0x000000000801d578        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+ *(.init)
+ .init          0x000000000801d578        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
+                0x000000000801d578                _init
+ .init          0x000000000801d57c        0x8 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
+ *(.fini)
+ .fini          0x000000000801d584        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
+                0x000000000801d584                _fini
+ .fini          0x000000000801d588        0x8 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
+                0x000000000801d590                . = ALIGN (0x4)
+                0x000000000801d590                _etext = .
+
+.vfp11_veneer   0x000000000801d590        0x0
+ .vfp11_veneer  0x000000000801d590        0x0 linker stubs
+
+.v4_bx          0x000000000801d590        0x0
+ .v4_bx         0x000000000801d590        0x0 linker stubs
+
+.iplt           0x000000000801d590        0x0
+ .iplt          0x000000000801d590        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+
+.rodata         0x000000000801d590     0x50c0
+                0x000000000801d590                . = ALIGN (0x4)
+ *(.rodata)
+ .rodata        0x000000000801d590       0xd0 Core/Src/main.o
+ .rodata        0x000000000801d660       0x24 LWIP/App/lwip.o
+ .rodata        0x000000000801d684       0x78 LWIP/Target/ethernetif.o
+ .rodata        0x000000000801d6fc        0x5 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ *fill*         0x000000000801d701        0x3 
+ .rodata        0x000000000801d704       0xdd Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ *fill*         0x000000000801d7e1        0x3 
+ .rodata        0x000000000801d7e4      0x277 Middlewares/Third_Party/LwIP/src/core/mem.o
+ *fill*         0x000000000801da5b        0x1 
+ .rodata        0x000000000801da5c       0xeb Middlewares/Third_Party/LwIP/src/core/memp.o
+ *fill*         0x000000000801db47        0x1 
+ .rodata        0x000000000801db48      0x22f Middlewares/Third_Party/LwIP/src/core/netif.o
+ *fill*         0x000000000801dd77        0x1 
+ .rodata        0x000000000801dd78      0x485 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ *fill*         0x000000000801e1fd        0x3 
+ .rodata        0x000000000801e200      0x7e0 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .rodata        0x000000000801e9e0      0x47e Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ *fill*         0x000000000801ee5e        0x2 
+ .rodata        0x000000000801ee60      0x81b Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ *fill*         0x000000000801f67b        0x1 
+ .rodata        0x000000000801f67c       0xe6 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ *fill*         0x000000000801f762        0x2 
+ .rodata        0x000000000801f764      0x364 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .rodata        0x000000000801fac8      0x3a0 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .rodata        0x000000000801fe68      0x275 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ *fill*         0x00000000080200dd        0x3 
+ .rodata        0x00000000080200e0       0xf8 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .rodata        0x00000000080201d8       0x95 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ *fill*         0x000000000802026d        0x3 
+ .rodata        0x0000000008020270      0x227 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ *fill*         0x0000000008020497        0x1 
+ .rodata        0x0000000008020498       0x94 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ *(.rodata*)
+ .rodata.Font24_Table
+                0x000000000802052c     0x1ab8 Core/Src/stm32746g_discovery_lcd.o
+                0x000000000802052c                Font24_Table
+ .rodata.Font12_Table
+                0x0000000008021fe4      0x474 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000008021fe4                Font12_Table
+ .rodata.AHBPrescTable
+                0x0000000008022458       0x10 Core/Src/system_stm32f7xx.o
+                0x0000000008022458                AHBPrescTable
+ .rodata.APBPrescTable
+                0x0000000008022468        0x8 Core/Src/system_stm32f7xx.o
+                0x0000000008022468                APBPrescTable
+ .rodata.flagBitshiftOffset.10122
+                0x0000000008022470        0x8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .rodata.memp_UDP_PCB
+                0x0000000008022478        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x0000000008022478                memp_UDP_PCB
+ .rodata.memp_TCP_PCB
+                0x0000000008022484        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x0000000008022484                memp_TCP_PCB
+ .rodata.memp_TCP_PCB_LISTEN
+                0x0000000008022490        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x0000000008022490                memp_TCP_PCB_LISTEN
+ .rodata.memp_TCP_SEG
+                0x000000000802249c        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x000000000802249c                memp_TCP_SEG
+ .rodata.memp_REASSDATA
+                0x00000000080224a8        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x00000000080224a8                memp_REASSDATA
+ .rodata.memp_FRAG_PBUF
+                0x00000000080224b4        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x00000000080224b4                memp_FRAG_PBUF
+ .rodata.memp_NETBUF
+                0x00000000080224c0        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x00000000080224c0                memp_NETBUF
+ .rodata.memp_NETCONN
+                0x00000000080224cc        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x00000000080224cc                memp_NETCONN
+ .rodata.memp_TCPIP_MSG_API
+                0x00000000080224d8        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x00000000080224d8                memp_TCPIP_MSG_API
+ .rodata.memp_TCPIP_MSG_INPKT
+                0x00000000080224e4        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x00000000080224e4                memp_TCPIP_MSG_INPKT
+ .rodata.memp_SYS_TIMEOUT
+                0x00000000080224f0        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x00000000080224f0                memp_SYS_TIMEOUT
+ .rodata.memp_PBUF
+                0x00000000080224fc        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x00000000080224fc                memp_PBUF
+ .rodata.memp_PBUF_POOL
+                0x0000000008022508        0xc Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x0000000008022508                memp_PBUF_POOL
+ .rodata.memp_pools
+                0x0000000008022514       0x34 Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x0000000008022514                memp_pools
+ .rodata.tcp_backoff
+                0x0000000008022548        0xd Middlewares/Third_Party/LwIP/src/core/tcp.o
+ *fill*         0x0000000008022555        0x3 
+ .rodata.tcp_persist_backoff
+                0x0000000008022558        0x7 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ *fill*         0x000000000802255f        0x1 
+ .rodata.tcp_pcb_lists
+                0x0000000008022560       0x10 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x0000000008022560                tcp_pcb_lists
+ .rodata.lwip_cyclic_timers
+                0x0000000008022570       0x28 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+                0x0000000008022570                lwip_cyclic_timers
+ .rodata.ip_addr_any
+                0x0000000008022598        0x4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+                0x0000000008022598                ip_addr_any
+ .rodata.ip_addr_broadcast
+                0x000000000802259c        0x4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+                0x000000000802259c                ip_addr_broadcast
+ .rodata.ethbroadcast
+                0x00000000080225a0        0x6 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+                0x00000000080225a0                ethbroadcast
+ *fill*         0x00000000080225a6        0x2 
+ .rodata.ethzero
+                0x00000000080225a8        0x6 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+                0x00000000080225a8                ethzero
+ *fill*         0x00000000080225ae        0x2 
+ .rodata.os_mutex_def_lwip_sys_mutex
+                0x00000000080225b0        0x8 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x00000000080225b0                os_mutex_def_lwip_sys_mutex
+ .rodata._global_impure_ptr
+                0x00000000080225b8        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o)
+                0x00000000080225b8                _global_impure_ptr
+ .rodata.__sf_fake_stderr
+                0x00000000080225bc       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+                0x00000000080225bc                __sf_fake_stderr
+ .rodata.__sf_fake_stdin
+                0x00000000080225dc       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+                0x00000000080225dc                __sf_fake_stdin
+ .rodata.__sf_fake_stdout
+                0x00000000080225fc       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+                0x00000000080225fc                __sf_fake_stdout
+ .rodata._svfprintf_r.str1.1
+                0x000000000802261c       0x11 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o)
+ .rodata._vfprintf_r.str1.1
+                0x000000000802262d       0x11 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+ .rodata._printf_i.str1.1
+                0x000000000802262d       0x22 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o)
+                0x0000000008022650                . = ALIGN (0x4)
+ *fill*         0x000000000802264f        0x1 
+
+.ARM.extab      0x0000000008022650        0x0
+                0x0000000008022650                . = ALIGN (0x4)
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+                0x0000000008022650                . = ALIGN (0x4)
+
+.ARM            0x0000000008022650        0x8
+                0x0000000008022650                . = ALIGN (0x4)
+                0x0000000008022650                __exidx_start = .
+ *(.ARM.exidx*)
+ .ARM.exidx     0x0000000008022650        0x8 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_udivmoddi4.o)
+                0x0000000008022658                __exidx_end = .
+                0x0000000008022658                . = ALIGN (0x4)
+
+.rel.dyn        0x0000000008022658        0x0
+ .rel.iplt      0x0000000008022658        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+
+.preinit_array  0x0000000008022658        0x0
+                0x0000000008022658                . = ALIGN (0x4)
+                0x0000000008022658                PROVIDE (__preinit_array_start = .)
+ *(.preinit_array*)
+                0x0000000008022658                PROVIDE (__preinit_array_end = .)
+                0x0000000008022658                . = ALIGN (0x4)
+
+.init_array     0x0000000008022658        0x4
+                0x0000000008022658                . = ALIGN (0x4)
+                0x0000000008022658                PROVIDE (__init_array_start = .)
+ *(SORT_BY_NAME(.init_array.*))
+ *(.init_array*)
+ .init_array    0x0000000008022658        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+                0x000000000802265c                PROVIDE (__init_array_end = .)
+                0x000000000802265c                . = ALIGN (0x4)
+
+.fini_array     0x000000000802265c        0x4
+                0x000000000802265c                . = ALIGN (0x4)
+                [!provide]                        PROVIDE (__fini_array_start = .)
+ *(SORT_BY_NAME(.fini_array.*))
+ *(.fini_array*)
+ .fini_array    0x000000000802265c        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+                [!provide]                        PROVIDE (__fini_array_end = .)
+                0x0000000008022660                . = ALIGN (0x4)
+                0x0000000008022660                _sidata = LOADADDR (.data)
+
+.data           0x0000000020000000       0xd4 load address 0x0000000008022660
+                0x0000000020000000                . = ALIGN (0x4)
+                0x0000000020000000                _sdata = .
+ *(.data)
+ *(.data*)
+ .data.ft5336_ts_drv
+                0x0000000020000000       0x28 Core/Src/ft5336.o
+                0x0000000020000000                ft5336_ts_drv
+ .data.joueur   0x0000000020000028       0x12 Core/Src/main.o
+                0x0000000020000028                joueur
+ *fill*         0x000000002000003a        0x2 
+ .data.Font24   0x000000002000003c        0x8 Core/Src/stm32746g_discovery_lcd.o
+                0x000000002000003c                Font24
+ .data.Font12   0x0000000020000044        0x8 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000020000044                Font12
+ .data.sdramstatus.10038
+                0x000000002000004c        0x1 Core/Src/stm32746g_discovery_sdram.o
+ *fill*         0x000000002000004d        0x3 
+ .data.SystemCoreClock
+                0x0000000020000050        0x4 Core/Src/system_stm32f7xx.o
+                0x0000000020000050                SystemCoreClock
+ .data.uwTickPrio
+                0x0000000020000054        0x4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+                0x0000000020000054                uwTickPrio
+ .data.uwTickFreq
+                0x0000000020000058        0x1 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+                0x0000000020000058                uwTickFreq
+ *fill*         0x0000000020000059        0x3 
+ .data.uxCriticalNesting
+                0x000000002000005c        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .data.tcp_port
+                0x0000000020000060        0x2 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ *fill*         0x0000000020000062        0x2 
+ .data.iss.13062
+                0x0000000020000064        0x4 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .data.udp_port
+                0x0000000020000068        0x2 Middlewares/Third_Party/LwIP/src/core/udp.o
+ *fill*         0x000000002000006a        0x2 
+ .data.dhcp_discover_request_options
+                0x000000002000006c        0x3 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ *fill*         0x000000002000006f        0x1 
+ .data._impure_ptr
+                0x0000000020000070        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o)
+                0x0000000020000070                _impure_ptr
+ .data.impure_data
+                0x0000000020000074       0x60 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o)
+ *(.RamFunc)
+ *(.RamFunc*)
+                0x00000000200000d4                . = ALIGN (0x4)
+                0x00000000200000d4                _edata = .
+
+.igot.plt       0x00000000200000d4        0x0 load address 0x0000000008022734
+ .igot.plt      0x00000000200000d4        0x0 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+                0x00000000200000d4                . = ALIGN (0x4)
+
+.bss            0x00000000200000d4     0xf760 load address 0x0000000008022734
+                0x00000000200000d4                _sbss = .
+                0x00000000200000d4                __bss_start__ = _sbss
+ *(.bss)
+ .bss           0x00000000200000d4       0x1c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+ *(.bss*)
+ .bss.xIdleTaskTCBBuffer
+                0x00000000200000f0       0x58 Core/Src/freertos.o
+ .bss.xIdleStack
+                0x0000000020000148      0x200 Core/Src/freertos.o
+ .bss.ft5336_handle
+                0x0000000020000348        0x3 Core/Src/ft5336.o
+ *fill*         0x000000002000034b        0x1 
+ .bss.coord.5529
+                0x000000002000034c        0x2 Core/Src/ft5336.o
+ *fill*         0x000000002000034e        0x2 
+ .bss.TS_State.13859
+                0x0000000020000350       0x2c Core/Src/main.o
+ .bss.hI2cAudioHandler
+                0x000000002000037c       0x4c Core/Src/stm32746g_discovery.o
+ .bss.hDma2dHandler
+                0x00000000200003c8       0x40 Core/Src/stm32746g_discovery_lcd.o
+ .bss.ActiveLayer
+                0x0000000020000408        0x4 Core/Src/stm32746g_discovery_lcd.o
+ .bss.DrawProp  0x000000002000040c       0x18 Core/Src/stm32746g_discovery_lcd.o
+ .bss.periph_clk_init_struct.10625
+                0x0000000020000424       0x84 Core/Src/stm32746g_discovery_lcd.o
+ .bss.Timing    0x00000000200004a8       0x1c Core/Src/stm32746g_discovery_sdram.o
+ .bss.Command   0x00000000200004c4       0x10 Core/Src/stm32746g_discovery_sdram.o
+ .bss.dma_handle.10074
+                0x00000000200004d4       0x60 Core/Src/stm32746g_discovery_sdram.o
+ .bss.tsDriver  0x0000000020000534        0x4 Core/Src/stm32746g_discovery_ts.o
+ .bss.tsXBoundary
+                0x0000000020000538        0x2 Core/Src/stm32746g_discovery_ts.o
+ .bss.tsYBoundary
+                0x000000002000053a        0x2 Core/Src/stm32746g_discovery_ts.o
+ .bss.tsOrientation
+                0x000000002000053c        0x1 Core/Src/stm32746g_discovery_ts.o
+ .bss.I2cAddress
+                0x000000002000053d        0x1 Core/Src/stm32746g_discovery_ts.o
+ *fill*         0x000000002000053e        0x2 
+ .bss._x.10190  0x0000000020000540       0x14 Core/Src/stm32746g_discovery_ts.o
+ .bss._y.10191  0x0000000020000554       0x14 Core/Src/stm32746g_discovery_ts.o
+ .bss.FMC_Initialized
+                0x0000000020000568        0x4 Core/Src/stm32f7xx_hal_msp.o
+ .bss.__sbrk_heap_end
+                0x000000002000056c        0x4 Core/Src/sysmem.o
+ .bss.Netif_LinkSemaphore
+                0x0000000020000570        0x4 LWIP/App/lwip.o
+                0x0000000020000570                Netif_LinkSemaphore
+ .bss.s_xSemaphore
+                0x0000000020000574        0x4 LWIP/Target/ethernetif.o
+                0x0000000020000574                s_xSemaphore
+ .bss.pxCurrentTCB
+                0x0000000020000578        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x0000000020000578                pxCurrentTCB
+ .bss.pxReadyTasksLists
+                0x000000002000057c       0x8c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.xDelayedTaskList1
+                0x0000000020000608       0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.xDelayedTaskList2
+                0x000000002000061c       0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.pxDelayedTaskList
+                0x0000000020000630        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.pxOverflowDelayedTaskList
+                0x0000000020000634        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.xPendingReadyList
+                0x0000000020000638       0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.xTasksWaitingTermination
+                0x000000002000064c       0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.uxDeletedTasksWaitingCleanUp
+                0x0000000020000660        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.xSuspendedTaskList
+                0x0000000020000664       0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.uxCurrentNumberOfTasks
+                0x0000000020000678        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.xTickCount
+                0x000000002000067c        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.uxTopReadyPriority
+                0x0000000020000680        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.xSchedulerRunning
+                0x0000000020000684        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.uxPendedTicks
+                0x0000000020000688        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.xYieldPending
+                0x000000002000068c        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.xNumOfOverflows
+                0x0000000020000690        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.uxTaskNumber
+                0x0000000020000694        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.xNextTaskUnblockTime
+                0x0000000020000698        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.xIdleTaskHandle
+                0x000000002000069c        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.uxSchedulerSuspended
+                0x00000000200006a0        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .bss.ucMaxSysCallPriority
+                0x00000000200006a4        0x1 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ *fill*         0x00000000200006a5        0x3 
+ .bss.ulMaxPRIGROUPValue
+                0x00000000200006a8        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .bss.ucHeap    0x00000000200006ac     0x8000 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .bss.xStart    0x00000000200086ac        0x8 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .bss.pxEnd     0x00000000200086b4        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .bss.xFreeBytesRemaining
+                0x00000000200086b8        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .bss.xMinimumEverFreeBytesRemaining
+                0x00000000200086bc        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .bss.xBlockAllocatedBit
+                0x00000000200086c0        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .bss.tcpip_init_done
+                0x00000000200086c4        0x4 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .bss.tcpip_init_done_arg
+                0x00000000200086c8        0x4 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .bss.tcpip_mbox
+                0x00000000200086cc        0x4 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .bss.ram       0x00000000200086d0        0x4 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .bss.ram_end   0x00000000200086d4        0x4 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .bss.mem_mutex
+                0x00000000200086d8        0x4 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .bss.lfree     0x00000000200086dc        0x4 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .bss.memp_tab_UDP_PCB
+                0x00000000200086e0        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_TCP_PCB
+                0x00000000200086e4        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_TCP_PCB_LISTEN
+                0x00000000200086e8        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_TCP_SEG
+                0x00000000200086ec        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_REASSDATA
+                0x00000000200086f0        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_FRAG_PBUF
+                0x00000000200086f4        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_NETBUF
+                0x00000000200086f8        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_NETCONN
+                0x00000000200086fc        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_TCPIP_MSG_API
+                0x0000000020008700        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_TCPIP_MSG_INPKT
+                0x0000000020008704        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_SYS_TIMEOUT
+                0x0000000020008708        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_PBUF
+                0x000000002000870c        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.memp_tab_PBUF_POOL
+                0x0000000020008710        0x4 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .bss.netif_num
+                0x0000000020008714        0x1 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .bss.tcp_timer
+                0x0000000020008715        0x1 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .bss.tcp_timer_ctr
+                0x0000000020008716        0x1 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ *fill*         0x0000000020008717        0x1 
+ .bss.inseg     0x0000000020008718       0x10 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss.tcphdr    0x0000000020008728        0x4 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss.tcphdr_optlen
+                0x000000002000872c        0x2 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss.tcphdr_opt1len
+                0x000000002000872e        0x2 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss.tcphdr_opt2
+                0x0000000020008730        0x4 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss.tcp_optidx
+                0x0000000020008734        0x2 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ *fill*         0x0000000020008736        0x2 
+ .bss.seqno     0x0000000020008738        0x4 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss.ackno     0x000000002000873c        0x4 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss.recv_acked
+                0x0000000020008740        0x2 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss.tcplen    0x0000000020008742        0x2 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss.flags     0x0000000020008744        0x1 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss.recv_flags
+                0x0000000020008745        0x1 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ *fill*         0x0000000020008746        0x2 
+ .bss.recv_data
+                0x0000000020008748        0x4 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .bss.next_timeout
+                0x000000002000874c        0x4 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .bss.current_timeout_due_time
+                0x0000000020008750        0x4 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .bss.tcpip_tcp_timer_active
+                0x0000000020008754        0x4 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .bss.dhcp_pcb  0x0000000020008758        0x4 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .bss.dhcp_pcb_refcount
+                0x000000002000875c        0x1 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ *fill*         0x000000002000875d        0x3 
+ .bss.xid.12986
+                0x0000000020008760        0x4 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .bss.arp_table
+                0x0000000020008764       0xf0 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .bss.etharp_cached_entry
+                0x0000000020008854        0x1 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ *fill*         0x0000000020008855        0x1 
+ .bss.ip_id     0x0000000020008856        0x2 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .bss.reassdatagrams
+                0x0000000020008858        0x4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .bss.ip_reass_pbufcount
+                0x000000002000885c        0x2 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ *fill*         0x000000002000885e        0x2 
+ .bss.__malloc_free_list
+                0x0000000020008860        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-mallocr.o)
+                0x0000000020008860                __malloc_free_list
+ .bss.__malloc_sbrk_start
+                0x0000000020008864        0x4 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-mallocr.o)
+                0x0000000020008864                __malloc_sbrk_start
+ *(COMMON)
+ COMMON         0x0000000020008868      0x5f4 Core/Src/main.o
+                0x0000000020008868                hi2c3
+                0x00000000200088b4                hspi2
+                0x0000000020008918                huart7
+                0x0000000020008998                htim8
+                0x00000000200089d8                Queue_JHandle
+                0x00000000200089dc                hi2c1
+                0x0000000020008a28                hcrc
+                0x0000000020008a4c                Joueur_1Handle
+                0x0000000020008a50                htim5
+                0x0000000020008a90                htim3
+                0x0000000020008ad0                hltdc
+                0x0000000020008b78                hadc1
+                0x0000000020008bc0                hadc3
+                0x0000000020008c08                Queue_NHandle
+                0x0000000020008c0c                huart1
+                0x0000000020008c8c                Queue_FHandle
+                0x0000000020008c90                Queue_PHandle
+                0x0000000020008c94                hdac
+                0x0000000020008ca8                ProjectileHandle
+                0x0000000020008cac                hrtc
+                0x0000000020008ccc                htim1
+                0x0000000020008d0c                hrng
+                0x0000000020008d1c                huart6
+                0x0000000020008d9c                GameMasterHandle
+                0x0000000020008da0                hdma2d
+                0x0000000020008de0                htim2
+                0x0000000020008e20                Queue_EHandle
+                0x0000000020008e24                hsdram1
+                0x0000000020008e58                Block_EnemieHandle
+ COMMON         0x0000000020008e5c       0xa8 Core/Src/stm32746g_discovery_lcd.o
+                0x0000000020008e5c                hLtdcHandler
+ COMMON         0x0000000020008f04       0x34 Core/Src/stm32746g_discovery_sdram.o
+                0x0000000020008f04                sdramHandle
+ COMMON         0x0000000020008f38       0x40 Core/Src/stm32f7xx_hal_timebase_tim.o
+                0x0000000020008f38                htim6
+ COMMON         0x0000000020008f78        0x4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+                0x0000000020008f78                uwTick
+ COMMON         0x0000000020008f7c       0x4c LWIP/App/lwip.o
+                0x0000000020008f7c                link_arg
+                0x0000000020008f84                gnetif
+                0x0000000020008fbc                ipaddr
+                0x0000000020008fc0                netmask
+                0x0000000020008fc4                gw
+ COMMON         0x0000000020008fc8     0x30e8 LWIP/Target/ethernetif.o
+                0x0000000020008fc8                DMATxDscrTab
+                0x0000000020009048                Rx_Buff
+                0x000000002000a818                DMARxDscrTab
+                0x000000002000a898                heth
+                0x000000002000a8e0                Tx_Buff
+ COMMON         0x000000002000c0b0        0x4 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+                0x000000002000c0b0                lock_tcpip_core
+ COMMON         0x000000002000c0b4       0x18 Middlewares/Third_Party/LwIP/src/core/ip.o
+                0x000000002000c0b4                ip_data
+ COMMON         0x000000002000c0cc      0x653 Middlewares/Third_Party/LwIP/src/core/mem.o
+                0x000000002000c0cc                ram_heap
+ *fill*         0x000000002000c71f        0x1 
+ COMMON         0x000000002000c720     0x30b7 Middlewares/Third_Party/LwIP/src/core/memp.o
+                0x000000002000c720                memp_memory_NETBUF_base
+                0x000000002000c744                memp_memory_TCPIP_MSG_INPKT_base
+                0x000000002000c7c8                memp_memory_TCP_SEG_base
+                0x000000002000c8cc                memp_memory_PBUF_POOL_base
+                0x000000002000eed0                memp_memory_FRAG_PBUF_base
+                0x000000002000f03c                memp_memory_TCPIP_MSG_API_base
+                0x000000002000f0c0                memp_memory_PBUF_base
+                0x000000002000f1c4                memp_memory_TCP_PCB_LISTEN_base
+                0x000000002000f2a8                memp_memory_REASSDATA_base
+                0x000000002000f34c                memp_memory_UDP_PCB_base
+                0x000000002000f3d0                memp_memory_NETCONN_base
+                0x000000002000f474                memp_memory_TCP_PCB_base
+                0x000000002000f784                memp_memory_SYS_TIMEOUT_base
+ *fill*         0x000000002000f7d7        0x1 
+ COMMON         0x000000002000f7d8        0x8 Middlewares/Third_Party/LwIP/src/core/netif.o
+                0x000000002000f7d8                netif_list
+                0x000000002000f7dc                netif_default
+ COMMON         0x000000002000f7e0        0x1 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                0x000000002000f7e0                pbuf_free_ooseq_pending
+ *fill*         0x000000002000f7e1        0x3 
+ COMMON         0x000000002000f7e4       0x18 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                0x000000002000f7e4                tcp_active_pcbs_changed
+                0x000000002000f7e8                tcp_active_pcbs
+                0x000000002000f7ec                tcp_ticks
+                0x000000002000f7f0                tcp_listen_pcbs
+                0x000000002000f7f4                tcp_bound_pcbs
+                0x000000002000f7f8                tcp_tw_pcbs
+ COMMON         0x000000002000f7fc        0x4 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+                0x000000002000f7fc                tcp_input_pcb
+ COMMON         0x000000002000f800        0x4 Middlewares/Third_Party/LwIP/src/core/udp.o
+                0x000000002000f800                udp_pcbs
+ COMMON         0x000000002000f804       0x28 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+                0x000000002000f804                dhcp_rx_options_given
+                0x000000002000f80c                dhcp_rx_options_val
+ COMMON         0x000000002000f82c        0x8 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                0x000000002000f82c                errno
+                0x000000002000f830                lwip_sys_mutex
+                0x000000002000f834                . = ALIGN (0x4)
+                0x000000002000f834                _ebss = .
+                0x000000002000f834                __bss_end__ = _ebss
+
+._user_heap_stack
+                0x000000002000f834      0x604 load address 0x0000000008022734
+                0x000000002000f838                . = ALIGN (0x8)
+ *fill*         0x000000002000f834        0x4 
+                [!provide]                        PROVIDE (end = .)
+                0x000000002000f838                PROVIDE (_end = .)
+                0x000000002000fa38                . = (. + _Min_Heap_Size)
+ *fill*         0x000000002000f838      0x200 
+                0x000000002000fe38                . = (. + _Min_Stack_Size)
+ *fill*         0x000000002000fa38      0x400 
+                0x000000002000fe38                . = ALIGN (0x8)
+
+/DISCARD/
+ libc.a(*)
+ libm.a(*)
+ libgcc.a(*)
+
+.ARM.attributes
+                0x0000000000000000       0x30
+ *(.ARM.attributes)
+ .ARM.attributes
+                0x0000000000000000       0x22 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
+ .ARM.attributes
+                0x0000000000000022       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
+ .ARM.attributes
+                0x0000000000000056       0x39 Core/Src/freertos.o
+ .ARM.attributes
+                0x000000000000008f       0x39 Core/Src/ft5336.o
+ .ARM.attributes
+                0x00000000000000c8       0x39 Core/Src/main.o
+ .ARM.attributes
+                0x0000000000000101       0x39 Core/Src/stm32746g_discovery.o
+ .ARM.attributes
+                0x000000000000013a       0x39 Core/Src/stm32746g_discovery_lcd.o
+ .ARM.attributes
+                0x0000000000000173       0x39 Core/Src/stm32746g_discovery_sdram.o
+ .ARM.attributes
+                0x00000000000001ac       0x39 Core/Src/stm32746g_discovery_ts.o
+ .ARM.attributes
+                0x00000000000001e5       0x39 Core/Src/stm32f7xx_hal_msp.o
+ .ARM.attributes
+                0x000000000000021e       0x39 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .ARM.attributes
+                0x0000000000000257       0x39 Core/Src/stm32f7xx_it.o
+ .ARM.attributes
+                0x0000000000000290       0x39 Core/Src/syscalls.o
+ .ARM.attributes
+                0x00000000000002c9       0x39 Core/Src/sysmem.o
+ .ARM.attributes
+                0x0000000000000302       0x39 Core/Src/system_stm32f7xx.o
+ .ARM.attributes
+                0x000000000000033b       0x21 Core/Startup/startup_stm32f746nghx.o
+ .ARM.attributes
+                0x000000000000035c       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .ARM.attributes
+                0x0000000000000395       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .ARM.attributes
+                0x00000000000003ce       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .ARM.attributes
+                0x0000000000000407       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .ARM.attributes
+                0x0000000000000440       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .ARM.attributes
+                0x0000000000000479       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .ARM.attributes
+                0x00000000000004b2       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .ARM.attributes
+                0x00000000000004eb       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .ARM.attributes
+                0x0000000000000524       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .ARM.attributes
+                0x000000000000055d       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .ARM.attributes
+                0x0000000000000596       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .ARM.attributes
+                0x00000000000005cf       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .ARM.attributes
+                0x0000000000000608       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .ARM.attributes
+                0x0000000000000641       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .ARM.attributes
+                0x000000000000067a       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .ARM.attributes
+                0x00000000000006b3       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .ARM.attributes
+                0x00000000000006ec       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .ARM.attributes
+                0x0000000000000725       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .ARM.attributes
+                0x000000000000075e       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .ARM.attributes
+                0x0000000000000797       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .ARM.attributes
+                0x00000000000007d0       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .ARM.attributes
+                0x0000000000000809       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .ARM.attributes
+                0x0000000000000842       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .ARM.attributes
+                0x000000000000087b       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .ARM.attributes
+                0x00000000000008b4       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .ARM.attributes
+                0x00000000000008ed       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .ARM.attributes
+                0x0000000000000926       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .ARM.attributes
+                0x000000000000095f       0x39 LWIP/App/lwip.o
+ .ARM.attributes
+                0x0000000000000998       0x39 LWIP/Target/ethernetif.o
+ .ARM.attributes
+                0x00000000000009d1       0x39 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .ARM.attributes
+                0x0000000000000a0a       0x39 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .ARM.attributes
+                0x0000000000000a43       0x39 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .ARM.attributes
+                0x0000000000000a7c       0x39 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .ARM.attributes
+                0x0000000000000ab5       0x39 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .ARM.attributes
+                0x0000000000000aee       0x39 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .ARM.attributes
+                0x0000000000000b27       0x39 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .ARM.attributes
+                0x0000000000000b60       0x39 Middlewares/Third_Party/LwIP/src/core/def.o
+ .ARM.attributes
+                0x0000000000000b99       0x39 Middlewares/Third_Party/LwIP/src/core/init.o
+ .ARM.attributes
+                0x0000000000000bd2       0x39 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .ARM.attributes
+                0x0000000000000c0b       0x39 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .ARM.attributes
+                0x0000000000000c44       0x39 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .ARM.attributes
+                0x0000000000000c7d       0x39 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .ARM.attributes
+                0x0000000000000cb6       0x39 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .ARM.attributes
+                0x0000000000000cef       0x39 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .ARM.attributes
+                0x0000000000000d28       0x39 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .ARM.attributes
+                0x0000000000000d61       0x39 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .ARM.attributes
+                0x0000000000000d9a       0x39 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .ARM.attributes
+                0x0000000000000dd3       0x39 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .ARM.attributes
+                0x0000000000000e0c       0x39 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .ARM.attributes
+                0x0000000000000e45       0x39 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .ARM.attributes
+                0x0000000000000e7e       0x39 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .ARM.attributes
+                0x0000000000000eb7       0x39 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .ARM.attributes
+                0x0000000000000ef0       0x39 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .ARM.attributes
+                0x0000000000000f29       0x39 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .ARM.attributes
+                0x0000000000000f62       0x39 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .ARM.attributes
+                0x0000000000000f9b       0x39 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .ARM.attributes
+                0x0000000000000fd4       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-impure.o)
+ .ARM.attributes
+                0x0000000000001008       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
+ .ARM.attributes
+                0x000000000000103c       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcmp.o)
+ .ARM.attributes
+                0x0000000000001070       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o)
+ .ARM.attributes
+                0x00000000000010a4       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memmove.o)
+ .ARM.attributes
+                0x00000000000010d8       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o)
+ .ARM.attributes
+                0x000000000000110c       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-printf.o)
+ .ARM.attributes
+                0x0000000000001140       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-rand.o)
+ .ARM.attributes
+                0x0000000000001174       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sprintf.o)
+ .ARM.attributes
+                0x00000000000011a8       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .ARM.attributes
+                0x00000000000011dc       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fwalk.o)
+ .ARM.attributes
+                0x0000000000001210       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-malloc.o)
+ .ARM.attributes
+                0x0000000000001244       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-freer.o)
+ .ARM.attributes
+                0x0000000000001278       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-mallocr.o)
+ .ARM.attributes
+                0x00000000000012ac       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o)
+ .ARM.attributes
+                0x00000000000012e0       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+ .ARM.attributes
+                0x0000000000001314       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o)
+ .ARM.attributes
+                0x0000000000001348       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sbrkr.o)
+ .ARM.attributes
+                0x000000000000137c       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
+ .ARM.attributes
+                0x00000000000013b0       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wbuf.o)
+ .ARM.attributes
+                0x00000000000013e4       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-writer.o)
+ .ARM.attributes
+                0x0000000000001418       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wsetup.o)
+ .ARM.attributes
+                0x000000000000144c       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-closer.o)
+ .ARM.attributes
+                0x0000000000001480       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fflush.o)
+ .ARM.attributes
+                0x00000000000014b4       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-lseekr.o)
+ .ARM.attributes
+                0x00000000000014e8       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-makebuf.o)
+ .ARM.attributes
+                0x000000000000151c       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memchr.o)
+ .ARM.attributes
+                0x000000000000153c       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mlock.o)
+ .ARM.attributes
+                0x0000000000001570       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-reallocr.o)
+ .ARM.attributes
+                0x00000000000015a4       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-readr.o)
+ .ARM.attributes
+                0x00000000000015d8       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fstatr.o)
+ .ARM.attributes
+                0x000000000000160c       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-isattyr.o)
+ .ARM.attributes
+                0x0000000000001640       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-msizer.o)
+ .ARM.attributes
+                0x0000000000001674       0x22 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_aeabi_uldivmod.o)
+ .ARM.attributes
+                0x0000000000001696       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_udivmoddi4.o)
+ .ARM.attributes
+                0x00000000000016ca       0x22 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_dvmd_tls.o)
+ .ARM.attributes
+                0x00000000000016ec       0x22 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
+OUTPUT(Space_Invaders.elf elf32-littlearm)
+
+.debug_info     0x0000000000000000    0x55ae6
+ .debug_info    0x0000000000000000      0x3c1 Core/Src/freertos.o
+ .debug_info    0x00000000000003c1      0x591 Core/Src/ft5336.o
+ .debug_info    0x0000000000000952     0x507a Core/Src/main.o
+ .debug_info    0x00000000000059cc     0x19bb Core/Src/stm32746g_discovery.o
+ .debug_info    0x0000000000007387     0x2264 Core/Src/stm32746g_discovery_lcd.o
+ .debug_info    0x00000000000095eb      0xf1e Core/Src/stm32746g_discovery_sdram.o
+ .debug_info    0x000000000000a509      0x9dd Core/Src/stm32746g_discovery_ts.o
+ .debug_info    0x000000000000aee6     0x2e03 Core/Src/stm32f7xx_hal_msp.o
+ .debug_info    0x000000000000dce9      0xbe7 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_info    0x000000000000e8d0     0x126b Core/Src/stm32f7xx_it.o
+ .debug_info    0x000000000000fb3b      0xfa7 Core/Src/syscalls.o
+ .debug_info    0x0000000000010ae2      0xa85 Core/Src/sysmem.o
+ .debug_info    0x0000000000011567      0x73d Core/Src/system_stm32f7xx.o
+ .debug_info    0x0000000000011ca4       0x22 Core/Startup/startup_stm32f746nghx.o
+ .debug_info    0x0000000000011cc6      0x9d3 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_info    0x0000000000012699      0xc9d Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_info    0x0000000000013336     0x104a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_info    0x0000000000014380      0x5dc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_info    0x000000000001495c      0x426 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_info    0x0000000000014d82      0xa3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_info    0x00000000000157bc      0x7c0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_info    0x0000000000015f7c      0x968 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_info    0x00000000000168e4      0xee9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_info    0x00000000000177cd     0x149c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_info    0x0000000000018c69      0x7dc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_info    0x0000000000019445     0x1fb9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_info    0x000000000001b3fe      0x738 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_info    0x000000000001bb36     0x1104 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_info    0x000000000001cc3a      0x9b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_info    0x000000000001d5ee      0x96b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_info    0x000000000001df59      0x935 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_info    0x000000000001e88e      0x7ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_info    0x000000000001f03b      0x552 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_info    0x000000000001f58d      0xc56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_info    0x00000000000201e3      0xff7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_info    0x00000000000211da      0xca1 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_info    0x0000000000021e7b     0x166a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_info    0x00000000000234e5     0x25a2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_info    0x0000000000025a87     0x121c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_info    0x0000000000026ca3     0x16d1 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_info    0x0000000000028374      0xccd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_info    0x0000000000029041     0x1bd0 LWIP/App/lwip.o
+ .debug_info    0x000000000002ac11     0x2673 LWIP/Target/ethernetif.o
+ .debug_info    0x000000000002d284     0x1eb8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_info    0x000000000002f13c      0xacb Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_info    0x000000000002fc07     0x21ea Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_info    0x0000000000031df1     0x2789 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_info    0x000000000003457a      0x4e4 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_info    0x0000000000034a5e      0xbff Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_info    0x000000000003565d     0x15ee Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_info    0x0000000000036c4b      0xc4e Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_info    0x0000000000037899     0x16cb Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_info    0x0000000000038f64      0xf01 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_info    0x0000000000039e65      0xff5 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_info    0x000000000003ae5a     0x1c91 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_info    0x000000000003caeb     0x1db6 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_info    0x000000000003e8a1     0x2535 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_info    0x0000000000040dd6     0x2648 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_info    0x000000000004341e     0x1c33 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_info    0x0000000000045051     0x22ac Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_info    0x00000000000472fd     0x1a35 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_info    0x0000000000048d32     0x16c6 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_info    0x000000000004a3f8     0x220c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_info    0x000000000004c604     0x194f Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_info    0x000000000004df53     0x11ad Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_info    0x000000000004f100     0x1a85 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_info    0x0000000000050b85     0x1074 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_info    0x0000000000051bf9     0x16a4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_info    0x000000000005329d     0x1170 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_info    0x000000000005440d     0x16d9 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+
+.debug_abbrev   0x0000000000000000     0x9e26
+ .debug_abbrev  0x0000000000000000      0x12a Core/Src/freertos.o
+ .debug_abbrev  0x000000000000012a      0x1ea Core/Src/ft5336.o
+ .debug_abbrev  0x0000000000000314      0x30a Core/Src/main.o
+ .debug_abbrev  0x000000000000061e      0x287 Core/Src/stm32746g_discovery.o
+ .debug_abbrev  0x00000000000008a5      0x298 Core/Src/stm32746g_discovery_lcd.o
+ .debug_abbrev  0x0000000000000b3d      0x218 Core/Src/stm32746g_discovery_sdram.o
+ .debug_abbrev  0x0000000000000d55      0x22b Core/Src/stm32746g_discovery_ts.o
+ .debug_abbrev  0x0000000000000f80      0x267 Core/Src/stm32f7xx_hal_msp.o
+ .debug_abbrev  0x00000000000011e7      0x19d Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_abbrev  0x0000000000001384      0x18e Core/Src/stm32f7xx_it.o
+ .debug_abbrev  0x0000000000001512      0x268 Core/Src/syscalls.o
+ .debug_abbrev  0x000000000000177a      0x1bc Core/Src/sysmem.o
+ .debug_abbrev  0x0000000000001936      0x147 Core/Src/system_stm32f7xx.o
+ .debug_abbrev  0x0000000000001a7d       0x12 Core/Startup/startup_stm32f746nghx.o
+ .debug_abbrev  0x0000000000001a8f      0x1c7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_abbrev  0x0000000000001c56      0x205 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_abbrev  0x0000000000001e5b      0x2fa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_abbrev  0x0000000000002155      0x1d1 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_abbrev  0x0000000000002326      0x165 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_abbrev  0x000000000000248b      0x1e4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_abbrev  0x000000000000266f      0x1e8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_abbrev  0x0000000000002857      0x229 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_abbrev  0x0000000000002a80      0x211 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_abbrev  0x0000000000002c91      0x23e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_abbrev  0x0000000000002ecf      0x1c9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_abbrev  0x0000000000003098      0x22a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_abbrev  0x00000000000032c2      0x178 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_abbrev  0x000000000000343a      0x209 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_abbrev  0x0000000000003643      0x1b6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_abbrev  0x00000000000037f9      0x1b8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_abbrev  0x00000000000039b1      0x21a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_abbrev  0x0000000000003bcb      0x1ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_abbrev  0x0000000000003d78      0x1bc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_abbrev  0x0000000000003f34      0x1be Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_abbrev  0x00000000000040f2      0x1e9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_abbrev  0x00000000000042db      0x1f7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_abbrev  0x00000000000044d2      0x228 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_abbrev  0x00000000000046fa      0x230 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_abbrev  0x000000000000492a      0x21e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_abbrev  0x0000000000004b48      0x205 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_abbrev  0x0000000000004d4d      0x170 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_abbrev  0x0000000000004ebd      0x249 LWIP/App/lwip.o
+ .debug_abbrev  0x0000000000005106      0x389 LWIP/Target/ethernetif.o
+ .debug_abbrev  0x000000000000548f      0x379 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_abbrev  0x0000000000005808      0x1cf Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_abbrev  0x00000000000059d7      0x336 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_abbrev  0x0000000000005d0d      0x349 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_abbrev  0x0000000000006056      0x21b Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_abbrev  0x0000000000006271      0x2ba Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_abbrev  0x000000000000652b      0x2b0 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_abbrev  0x00000000000067db      0x233 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_abbrev  0x0000000000006a0e      0x1d8 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_abbrev  0x0000000000006be6      0x19e Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_abbrev  0x0000000000006d84      0x29e Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_abbrev  0x0000000000007022      0x2cc Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_abbrev  0x00000000000072ee      0x325 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_abbrev  0x0000000000007613      0x354 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_abbrev  0x0000000000007967      0x37c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_abbrev  0x0000000000007ce3      0x2dd Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_abbrev  0x0000000000007fc0      0x30b Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_abbrev  0x00000000000082cb      0x2c2 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_abbrev  0x000000000000858d      0x305 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_abbrev  0x0000000000008892      0x2ee Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_abbrev  0x0000000000008b80      0x299 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_abbrev  0x0000000000008e19      0x279 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_abbrev  0x0000000000009092      0x267 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_abbrev  0x00000000000092f9      0x28a Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_abbrev  0x0000000000009583      0x2d8 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_abbrev  0x000000000000985b      0x25e Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_abbrev  0x0000000000009ab9      0x36d Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+
+.debug_aranges  0x0000000000000000     0x3580
+ .debug_aranges
+                0x0000000000000000       0x38 Core/Src/freertos.o
+ .debug_aranges
+                0x0000000000000038       0x90 Core/Src/ft5336.o
+ .debug_aranges
+                0x00000000000000c8      0x108 Core/Src/main.o
+ .debug_aranges
+                0x00000000000001d0      0x128 Core/Src/stm32746g_discovery.o
+ .debug_aranges
+                0x00000000000002f8      0x1d8 Core/Src/stm32746g_discovery_lcd.o
+ .debug_aranges
+                0x00000000000004d0       0x68 Core/Src/stm32746g_discovery_sdram.o
+ .debug_aranges
+                0x0000000000000538       0x58 Core/Src/stm32746g_discovery_ts.o
+ .debug_aranges
+                0x0000000000000590       0xf8 Core/Src/stm32f7xx_hal_msp.o
+ .debug_aranges
+                0x0000000000000688       0x30 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_aranges
+                0x00000000000006b8       0x60 Core/Src/stm32f7xx_it.o
+ .debug_aranges
+                0x0000000000000718       0xa8 Core/Src/syscalls.o
+ .debug_aranges
+                0x00000000000007c0       0x20 Core/Src/sysmem.o
+ .debug_aranges
+                0x00000000000007e0       0x28 Core/Src/system_stm32f7xx.o
+ .debug_aranges
+                0x0000000000000808       0x28 Core/Startup/startup_stm32f746nghx.o
+ .debug_aranges
+                0x0000000000000830      0x100 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_aranges
+                0x0000000000000930       0xe8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_aranges
+                0x0000000000000a18      0x118 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_aranges
+                0x0000000000000b30       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_aranges
+                0x0000000000000b90       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_aranges
+                0x0000000000000bc0       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_aranges
+                0x0000000000000c80       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_aranges
+                0x0000000000000cf0       0x90 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_aranges
+                0x0000000000000d80      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_aranges
+                0x0000000000000e88      0x110 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_aranges
+                0x0000000000000f98       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_aranges
+                0x0000000000000ff0      0x288 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_aranges
+                0x0000000000001278       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_aranges
+                0x00000000000012a0      0x158 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_aranges
+                0x00000000000013f8       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_aranges
+                0x0000000000001498       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_aranges
+                0x0000000000001518       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_aranges
+                0x00000000000015a0       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_aranges
+                0x00000000000015f0       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_aranges
+                0x0000000000001678       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_aranges
+                0x0000000000001730      0x140 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_aranges
+                0x0000000000001870       0xd0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_aranges
+                0x0000000000001940      0x1d8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_aranges
+                0x0000000000001b18      0x3b8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_aranges
+                0x0000000000001ed0      0x160 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_aranges
+                0x0000000000002030      0x210 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_aranges
+                0x0000000000002240       0xc8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_aranges
+                0x0000000000002308       0x20 LWIP/App/lwip.o
+ .debug_aranges
+                0x0000000000002328       0x80 LWIP/Target/ethernetif.o
+ .debug_aranges
+                0x00000000000023a8      0x1d8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_aranges
+                0x0000000000002580       0x40 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_aranges
+                0x00000000000025c0      0x128 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_aranges
+                0x00000000000026e8      0x1d0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_aranges
+                0x00000000000028b8       0x80 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_aranges
+                0x0000000000002938       0x50 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_aranges
+                0x0000000000002988       0xa0 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_aranges
+                0x0000000000002a28       0x48 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_aranges
+                0x0000000000002a70       0x20 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_aranges
+                0x0000000000002a90       0x18 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_aranges
+                0x0000000000002aa8       0x60 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_aranges
+                0x0000000000002b08       0x58 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_aranges
+                0x0000000000002b60       0xe0 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_aranges
+                0x0000000000002c40      0x140 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_aranges
+                0x0000000000002d80      0x1b8 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_aranges
+                0x0000000000002f38       0x70 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_aranges
+                0x0000000000002fa8       0xd8 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_aranges
+                0x0000000000003080       0x68 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_aranges
+                0x00000000000030e8       0xa0 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_aranges
+                0x0000000000003188      0x140 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_aranges
+                0x00000000000032c8       0x88 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_aranges
+                0x0000000000003350       0x38 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_aranges
+                0x0000000000003388       0x48 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_aranges
+                0x00000000000033d0       0x48 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_aranges
+                0x0000000000003418       0x70 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_aranges
+                0x0000000000003488       0x28 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_aranges
+                0x00000000000034b0       0xd0 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+
+.debug_ranges   0x0000000000000000     0x3288
+ .debug_ranges  0x0000000000000000       0x28 Core/Src/freertos.o
+ .debug_ranges  0x0000000000000028       0x80 Core/Src/ft5336.o
+ .debug_ranges  0x00000000000000a8       0xf8 Core/Src/main.o
+ .debug_ranges  0x00000000000001a0      0x118 Core/Src/stm32746g_discovery.o
+ .debug_ranges  0x00000000000002b8      0x1c8 Core/Src/stm32746g_discovery_lcd.o
+ .debug_ranges  0x0000000000000480       0x58 Core/Src/stm32746g_discovery_sdram.o
+ .debug_ranges  0x00000000000004d8       0x48 Core/Src/stm32746g_discovery_ts.o
+ .debug_ranges  0x0000000000000520       0xe8 Core/Src/stm32f7xx_hal_msp.o
+ .debug_ranges  0x0000000000000608       0x20 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_ranges  0x0000000000000628       0x50 Core/Src/stm32f7xx_it.o
+ .debug_ranges  0x0000000000000678       0x98 Core/Src/syscalls.o
+ .debug_ranges  0x0000000000000710       0x10 Core/Src/sysmem.o
+ .debug_ranges  0x0000000000000720       0x18 Core/Src/system_stm32f7xx.o
+ .debug_ranges  0x0000000000000738       0x20 Core/Startup/startup_stm32f746nghx.o
+ .debug_ranges  0x0000000000000758       0xf0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_ranges  0x0000000000000848       0xd8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_ranges  0x0000000000000920      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_ranges  0x0000000000000a28       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_ranges  0x0000000000000a78       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_ranges  0x0000000000000a98       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_ranges  0x0000000000000b48       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_ranges  0x0000000000000ba8       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_ranges  0x0000000000000c28       0xf8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_ranges  0x0000000000000d20      0x100 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_ranges  0x0000000000000e20       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_ranges  0x0000000000000e68      0x278 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_ranges  0x00000000000010e0       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_ranges  0x00000000000010f8      0x148 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_ranges  0x0000000000001240       0x90 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_ranges  0x00000000000012d0       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_ranges  0x0000000000001340       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_ranges  0x00000000000013b8       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_ranges  0x00000000000013f8       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_ranges  0x0000000000001470       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_ranges  0x0000000000001518      0x130 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_ranges  0x0000000000001648       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_ranges  0x0000000000001708      0x1c8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_ranges  0x00000000000018d0      0x3a8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_ranges  0x0000000000001c78      0x150 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_ranges  0x0000000000001dc8      0x200 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_ranges  0x0000000000001fc8       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_ranges  0x0000000000002080       0x10 LWIP/App/lwip.o
+ .debug_ranges  0x0000000000002090       0x70 LWIP/Target/ethernetif.o
+ .debug_ranges  0x0000000000002100      0x1c8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_ranges  0x00000000000022c8       0x30 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_ranges  0x00000000000022f8      0x118 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_ranges  0x0000000000002410      0x1c0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_ranges  0x00000000000025d0       0x70 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_ranges  0x0000000000002640       0x40 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_ranges  0x0000000000002680       0x90 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_ranges  0x0000000000002710       0x38 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_ranges  0x0000000000002748       0x10 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_ranges  0x0000000000002758       0x50 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_ranges  0x00000000000027a8       0x48 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_ranges  0x00000000000027f0       0xd0 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_ranges  0x00000000000028c0      0x148 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_ranges  0x0000000000002a08      0x1a8 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_ranges  0x0000000000002bb0      0x108 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_ranges  0x0000000000002cb8      0x140 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_ranges  0x0000000000002df8       0x70 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_ranges  0x0000000000002e68       0x90 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_ranges  0x0000000000002ef8      0x130 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_ranges  0x0000000000003028       0x78 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_ranges  0x00000000000030a0       0x40 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_ranges  0x00000000000030e0       0x38 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_ranges  0x0000000000003118       0x38 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_ranges  0x0000000000003150       0x60 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_ranges  0x00000000000031b0       0x18 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_ranges  0x00000000000031c8       0xc0 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+
+.debug_macro    0x0000000000000000    0x3df8f
+ .debug_macro   0x0000000000000000      0x321 Core/Src/freertos.o
+ .debug_macro   0x0000000000000321      0xa5a Core/Src/freertos.o
+ .debug_macro   0x0000000000000d7b      0x174 Core/Src/freertos.o
+ .debug_macro   0x0000000000000eef       0x22 Core/Src/freertos.o
+ .debug_macro   0x0000000000000f11       0x8e Core/Src/freertos.o
+ .debug_macro   0x0000000000000f9f       0x51 Core/Src/freertos.o
+ .debug_macro   0x0000000000000ff0       0xef Core/Src/freertos.o
+ .debug_macro   0x00000000000010df       0x6a Core/Src/freertos.o
+ .debug_macro   0x0000000000001149      0x1df Core/Src/freertos.o
+ .debug_macro   0x0000000000001328      0x109 Core/Src/freertos.o
+ .debug_macro   0x0000000000001431      0x15a Core/Src/freertos.o
+ .debug_macro   0x000000000000158b       0xde Core/Src/freertos.o
+ .debug_macro   0x0000000000001669       0x1c Core/Src/freertos.o
+ .debug_macro   0x0000000000001685       0x26 Core/Src/freertos.o
+ .debug_macro   0x00000000000016ab      0x4c5 Core/Src/freertos.o
+ .debug_macro   0x0000000000001b70       0xb5 Core/Src/freertos.o
+ .debug_macro   0x0000000000001c25       0xaa Core/Src/freertos.o
+ .debug_macro   0x0000000000001ccf      0x2dd Core/Src/freertos.o
+ .debug_macro   0x0000000000001fac       0x2e Core/Src/freertos.o
+ .debug_macro   0x0000000000001fda       0x3b Core/Src/freertos.o
+ .debug_macro   0x0000000000002015       0x1c Core/Src/freertos.o
+ .debug_macro   0x0000000000002031       0x22 Core/Src/freertos.o
+ .debug_macro   0x0000000000002053       0xdf Core/Src/freertos.o
+ .debug_macro   0x0000000000002132     0x12cd Core/Src/freertos.o
+ .debug_macro   0x00000000000033ff      0x11f Core/Src/freertos.o
+ .debug_macro   0x000000000000351e       0x19 Core/Src/freertos.o
+ .debug_macro   0x0000000000003537    0x190f0 Core/Src/freertos.o
+ .debug_macro   0x000000000001c627       0x43 Core/Src/freertos.o
+ .debug_macro   0x000000000001c66a     0x36b4 Core/Src/freertos.o
+ .debug_macro   0x000000000001fd1e       0x61 Core/Src/freertos.o
+ .debug_macro   0x000000000001fd7f     0x18ad Core/Src/freertos.o
+ .debug_macro   0x000000000002162c      0x6c4 Core/Src/freertos.o
+ .debug_macro   0x0000000000021cf0      0x185 Core/Src/freertos.o
+ .debug_macro   0x0000000000021e75      0x117 Core/Src/freertos.o
+ .debug_macro   0x0000000000021f8c      0x1fe Core/Src/freertos.o
+ .debug_macro   0x000000000002218a       0x27 Core/Src/freertos.o
+ .debug_macro   0x00000000000221b1      0x24f Core/Src/freertos.o
+ .debug_macro   0x0000000000022400       0x41 Core/Src/freertos.o
+ .debug_macro   0x0000000000022441       0x58 Core/Src/freertos.o
+ .debug_macro   0x0000000000022499      0x236 Core/Src/freertos.o
+ .debug_macro   0x00000000000226cf      0x416 Core/Src/freertos.o
+ .debug_macro   0x0000000000022ae5      0x153 Core/Src/freertos.o
+ .debug_macro   0x0000000000022c38      0x107 Core/Src/freertos.o
+ .debug_macro   0x0000000000022d3f       0xd5 Core/Src/freertos.o
+ .debug_macro   0x0000000000022e14       0x4c Core/Src/freertos.o
+ .debug_macro   0x0000000000022e60      0x20f Core/Src/freertos.o
+ .debug_macro   0x000000000002306f       0xea Core/Src/freertos.o
+ .debug_macro   0x0000000000023159       0xa0 Core/Src/freertos.o
+ .debug_macro   0x00000000000231f9       0x3c Core/Src/freertos.o
+ .debug_macro   0x0000000000023235      0xccf Core/Src/freertos.o
+ .debug_macro   0x0000000000023f04      0x14f Core/Src/freertos.o
+ .debug_macro   0x0000000000024053      0x25b Core/Src/freertos.o
+ .debug_macro   0x00000000000242ae       0x12 Core/Src/freertos.o
+ .debug_macro   0x00000000000242c0      0x514 Core/Src/freertos.o
+ .debug_macro   0x00000000000247d4      0x22c Core/Src/freertos.o
+ .debug_macro   0x0000000000024a00       0x5a Core/Src/freertos.o
+ .debug_macro   0x0000000000024a5a       0xa5 Core/Src/freertos.o
+ .debug_macro   0x0000000000024aff      0x198 Core/Src/freertos.o
+ .debug_macro   0x0000000000024c97       0xd6 Core/Src/freertos.o
+ .debug_macro   0x0000000000024d6d      0x12f Core/Src/freertos.o
+ .debug_macro   0x0000000000024e9c      0x108 Core/Src/freertos.o
+ .debug_macro   0x0000000000024fa4       0x35 Core/Src/freertos.o
+ .debug_macro   0x0000000000024fd9       0xa4 Core/Src/freertos.o
+ .debug_macro   0x000000000002507d      0x313 Core/Src/freertos.o
+ .debug_macro   0x0000000000025390      0x4ca Core/Src/freertos.o
+ .debug_macro   0x000000000002585a       0xd6 Core/Src/freertos.o
+ .debug_macro   0x0000000000025930      0x2fe Core/Src/freertos.o
+ .debug_macro   0x0000000000025c2e      0xa2f Core/Src/freertos.o
+ .debug_macro   0x000000000002665d       0x59 Core/Src/freertos.o
+ .debug_macro   0x00000000000266b6      0x53c Core/Src/freertos.o
+ .debug_macro   0x0000000000026bf2       0x44 Core/Src/freertos.o
+ .debug_macro   0x0000000000026c36      0x14e Core/Src/freertos.o
+ .debug_macro   0x0000000000026d84      0x3f9 Core/Src/freertos.o
+ .debug_macro   0x000000000002717d       0x7b Core/Src/ft5336.o
+ .debug_macro   0x00000000000271f8       0x10 Core/Src/ft5336.o
+ .debug_macro   0x0000000000027208      0x39f Core/Src/ft5336.o
+ .debug_macro   0x00000000000275a7      0x80a Core/Src/main.o
+ .debug_macro   0x0000000000027db1      0x109 Core/Src/main.o
+ .debug_macro   0x0000000000027eba       0x91 Core/Src/main.o
+ .debug_macro   0x0000000000027f4b       0x8d Core/Src/main.o
+ .debug_macro   0x0000000000027fd8       0x9a Core/Src/main.o
+ .debug_macro   0x0000000000028072       0x19 Core/Src/main.o
+ .debug_macro   0x000000000002808b       0xf2 Core/Src/main.o
+ .debug_macro   0x000000000002817d       0xd6 Core/Src/main.o
+ .debug_macro   0x0000000000028253       0x16 Core/Src/main.o
+ .debug_macro   0x0000000000028269       0x10 Core/Src/main.o
+ .debug_macro   0x0000000000028279       0x18 Core/Src/main.o
+ .debug_macro   0x0000000000028291       0x46 Core/Src/main.o
+ .debug_macro   0x00000000000282d7       0x3c Core/Src/main.o
+ .debug_macro   0x0000000000028313       0x34 Core/Src/main.o
+ .debug_macro   0x0000000000028347       0x16 Core/Src/main.o
+ .debug_macro   0x000000000002835d       0x35 Core/Src/main.o
+ .debug_macro   0x0000000000028392       0x52 Core/Src/main.o
+ .debug_macro   0x00000000000283e4       0x1f Core/Src/main.o
+ .debug_macro   0x0000000000028403       0x43 Core/Src/main.o
+ .debug_macro   0x0000000000028446       0x20 Core/Src/main.o
+ .debug_macro   0x0000000000028466      0x1a3 Core/Src/main.o
+ .debug_macro   0x0000000000028609      0x32a Core/Src/main.o
+ .debug_macro   0x0000000000028933       0x16 Core/Src/main.o
+ .debug_macro   0x0000000000028949       0x29 Core/Src/main.o
+ .debug_macro   0x0000000000028972       0x1c Core/Src/main.o
+ .debug_macro   0x000000000002898e       0x10 Core/Src/main.o
+ .debug_macro   0x000000000002899e       0x10 Core/Src/main.o
+ .debug_macro   0x00000000000289ae       0x1c Core/Src/main.o
+ .debug_macro   0x00000000000289ca       0x52 Core/Src/main.o
+ .debug_macro   0x0000000000028a1c       0x40 Core/Src/main.o
+ .debug_macro   0x0000000000028a5c       0x10 Core/Src/main.o
+ .debug_macro   0x0000000000028a6c       0x40 Core/Src/main.o
+ .debug_macro   0x0000000000028aac       0xd7 Core/Src/main.o
+ .debug_macro   0x0000000000028b83       0x1c Core/Src/main.o
+ .debug_macro   0x0000000000028b9f       0x3d Core/Src/main.o
+ .debug_macro   0x0000000000028bdc       0x16 Core/Src/main.o
+ .debug_macro   0x0000000000028bf2      0x145 Core/Src/main.o
+ .debug_macro   0x0000000000028d37       0x10 Core/Src/main.o
+ .debug_macro   0x0000000000028d47       0x88 Core/Src/main.o
+ .debug_macro   0x0000000000028dcf       0x16 Core/Src/main.o
+ .debug_macro   0x0000000000028de5       0x10 Core/Src/main.o
+ .debug_macro   0x0000000000028df5       0x10 Core/Src/main.o
+ .debug_macro   0x0000000000028e05       0x35 Core/Src/main.o
+ .debug_macro   0x0000000000028e3a       0x28 Core/Src/main.o
+ .debug_macro   0x0000000000028e62       0x10 Core/Src/main.o
+ .debug_macro   0x0000000000028e72       0x17 Core/Src/main.o
+ .debug_macro   0x0000000000028e89       0x10 Core/Src/main.o
+ .debug_macro   0x0000000000028e99      0x460 Core/Src/main.o
+ .debug_macro   0x00000000000292f9       0x43 Core/Src/main.o
+ .debug_macro   0x000000000002933c       0x2b Core/Src/main.o
+ .debug_macro   0x0000000000029367      0x118 Core/Src/main.o
+ .debug_macro   0x000000000002947f       0x19 Core/Src/main.o
+ .debug_macro   0x0000000000029498      0x111 Core/Src/main.o
+ .debug_macro   0x00000000000295a9       0x82 Core/Src/main.o
+ .debug_macro   0x000000000002962b       0x66 Core/Src/main.o
+ .debug_macro   0x0000000000029691      0x739 Core/Src/main.o
+ .debug_macro   0x0000000000029dca       0x10 Core/Src/main.o
+ .debug_macro   0x0000000000029dda       0x10 Core/Src/main.o
+ .debug_macro   0x0000000000029dea       0x3f Core/Src/main.o
+ .debug_macro   0x0000000000029e29       0x25 Core/Src/main.o
+ .debug_macro   0x0000000000029e4e      0x15b Core/Src/main.o
+ .debug_macro   0x0000000000029fa9       0x22 Core/Src/main.o
+ .debug_macro   0x0000000000029fcb       0x10 Core/Src/main.o
+ .debug_macro   0x0000000000029fdb       0xb3 Core/Src/main.o
+ .debug_macro   0x000000000002a08e       0x6a Core/Src/main.o
+ .debug_macro   0x000000000002a0f8      0x1bd Core/Src/main.o
+ .debug_macro   0x000000000002a2b5       0x10 Core/Src/main.o
+ .debug_macro   0x000000000002a2c5      0x169 Core/Src/main.o
+ .debug_macro   0x000000000002a42e      0x13d Core/Src/main.o
+ .debug_macro   0x000000000002a56b       0xa0 Core/Src/main.o
+ .debug_macro   0x000000000002a60b       0x28 Core/Src/main.o
+ .debug_macro   0x000000000002a633       0x46 Core/Src/main.o
+ .debug_macro   0x000000000002a679       0x22 Core/Src/main.o
+ .debug_macro   0x000000000002a69b       0x16 Core/Src/main.o
+ .debug_macro   0x000000000002a6b1       0x10 Core/Src/main.o
+ .debug_macro   0x000000000002a6c1       0x2e Core/Src/main.o
+ .debug_macro   0x000000000002a6ef       0xea Core/Src/main.o
+ .debug_macro   0x000000000002a7d9       0x10 Core/Src/main.o
+ .debug_macro   0x000000000002a7e9       0x4d Core/Src/main.o
+ .debug_macro   0x000000000002a836       0x29 Core/Src/main.o
+ .debug_macro   0x000000000002a85f       0x16 Core/Src/main.o
+ .debug_macro   0x000000000002a875       0x10 Core/Src/main.o
+ .debug_macro   0x000000000002a885       0x73 Core/Src/main.o
+ .debug_macro   0x000000000002a8f8       0x10 Core/Src/main.o
+ .debug_macro   0x000000000002a908       0x1c Core/Src/main.o
+ .debug_macro   0x000000000002a924       0x40 Core/Src/main.o
+ .debug_macro   0x000000000002a964       0xa0 Core/Src/main.o
+ .debug_macro   0x000000000002aa04      0x268 Core/Src/main.o
+ .debug_macro   0x000000000002ac6c       0x10 Core/Src/main.o
+ .debug_macro   0x000000000002ac7c      0x12a Core/Src/main.o
+ .debug_macro   0x000000000002ada6       0x2e Core/Src/main.o
+ .debug_macro   0x000000000002add4      0x2d7 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x000000000002b0ab      0x262 Core/Src/stm32746g_discovery.o
+ .debug_macro   0x000000000002b30d      0x311 Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x000000000002b61e       0x9a Core/Src/stm32746g_discovery_lcd.o
+ .debug_macro   0x000000000002b6b8      0x2b9 Core/Src/stm32746g_discovery_sdram.o
+ .debug_macro   0x000000000002b971      0x2e0 Core/Src/stm32746g_discovery_ts.o
+ .debug_macro   0x000000000002bc51      0x2b9 Core/Src/stm32f7xx_hal_msp.o
+ .debug_macro   0x000000000002bf0a      0x2aa Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_macro   0x000000000002c1b4      0x2c3 Core/Src/stm32f7xx_it.o
+ .debug_macro   0x000000000002c477      0x579 Core/Src/syscalls.o
+ .debug_macro   0x000000000002c9f0       0x40 Core/Src/syscalls.o
+ .debug_macro   0x000000000002ca30       0x94 Core/Src/syscalls.o
+ .debug_macro   0x000000000002cac4       0x57 Core/Src/syscalls.o
+ .debug_macro   0x000000000002cb1b      0x330 Core/Src/syscalls.o
+ .debug_macro   0x000000000002ce4b       0x10 Core/Src/syscalls.o
+ .debug_macro   0x000000000002ce5b      0x122 Core/Src/syscalls.o
+ .debug_macro   0x000000000002cf7d       0xd9 Core/Src/syscalls.o
+ .debug_macro   0x000000000002d056       0x5b Core/Src/syscalls.o
+ .debug_macro   0x000000000002d0b1       0xd0 Core/Src/syscalls.o
+ .debug_macro   0x000000000002d181       0x10 Core/Src/syscalls.o
+ .debug_macro   0x000000000002d191      0x31a Core/Src/syscalls.o
+ .debug_macro   0x000000000002d4ab      0x189 Core/Src/syscalls.o
+ .debug_macro   0x000000000002d634       0x16 Core/Src/syscalls.o
+ .debug_macro   0x000000000002d64a      0x54e Core/Src/sysmem.o
+ .debug_macro   0x000000000002db98      0x2b0 Core/Src/system_stm32f7xx.o
+ .debug_macro   0x000000000002de48      0x2ce Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_macro   0x000000000002e116      0x2ab Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_macro   0x000000000002e3c1      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_macro   0x000000000002e66b      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_macro   0x000000000002e915      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_macro   0x000000000002ebbf      0x2ab Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_macro   0x000000000002ee6a      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_macro   0x000000000002f114      0x2b0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_macro   0x000000000002f3c4      0x2b9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_macro   0x000000000002f67d      0x2c0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_macro   0x000000000002f93d      0x2e0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_macro   0x000000000002fc1d      0x36f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_macro   0x000000000002ff8c      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_macro   0x0000000000030236      0x2ab Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_macro   0x00000000000304e1      0x2c8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_macro   0x00000000000307a9      0x2c2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_macro   0x0000000000030a6b      0x2ce Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_macro   0x0000000000030d39      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000030fe3      0x2b0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_macro   0x0000000000031293      0x2ab Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_macro   0x000000000003153e      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_macro   0x00000000000317e8      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_macro   0x0000000000031a92      0x2b2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_macro   0x0000000000031d44      0x2ab Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_macro   0x0000000000031fef      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_macro   0x0000000000032299      0x2c7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_macro   0x0000000000032560      0x2aa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_macro   0x000000000003280a      0x7b4 LWIP/App/lwip.o
+ .debug_macro   0x0000000000032fbe       0x5e LWIP/App/lwip.o
+ .debug_macro   0x000000000003301c      0x795 LWIP/Target/ethernetif.o
+ .debug_macro   0x00000000000337b1       0xb9 LWIP/Target/ethernetif.o
+ .debug_macro   0x000000000003386a      0x1c3 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000033a2d       0x16 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000033a43       0x20 LWIP/Target/ethernetif.o
+ .debug_macro   0x0000000000033a63      0x1f1 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000033c54       0x10 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000033c64       0xc7 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_macro   0x0000000000033d2b      0x17a Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x0000000000033ea5      0x209 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x00000000000340ae       0x87 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_macro   0x0000000000034135      0x26c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x00000000000343a1       0x10 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x00000000000343b1      0x184 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_macro   0x0000000000034535      0x1a1 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_macro   0x00000000000346d6      0x794 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_macro   0x0000000000034e6a      0x56e Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_macro   0x00000000000353d8      0x876 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000035c4e       0x35 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_macro   0x0000000000035c83      0x629 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_macro   0x00000000000362ac      0x72f Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_macro   0x00000000000369db      0x8ce Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x00000000000372a9      0x11b Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x00000000000373c4       0x16 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x00000000000373da       0xe0 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_macro   0x00000000000374ba      0x815 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000037ccf       0xc0 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000037d8f       0x2f Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_macro   0x0000000000037dbe      0x7ab Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_macro   0x0000000000038569      0x6c4 Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_macro   0x0000000000038c2d      0x6b2 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x00000000000392df       0x1c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_macro   0x00000000000392fb      0x6bf Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_macro   0x00000000000399ba      0x83f Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_macro   0x000000000003a1f9      0x6c3 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_macro   0x000000000003a8bc      0x726 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x000000000003afe2      0x155 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_macro   0x000000000003b137      0x702 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_macro   0x000000000003b839      0x67d Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_macro   0x000000000003beb6      0x709 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_macro   0x000000000003c5bf      0x5e9 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_macro   0x000000000003cba8      0x6a4 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x000000000003d24c       0x10 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_macro   0x000000000003d25c      0x6a2 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_macro   0x000000000003d8fe      0x680 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_macro   0x000000000003df7e       0x11 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+
+.debug_line     0x0000000000000000    0x3e223
+ .debug_line    0x0000000000000000      0x9c0 Core/Src/freertos.o
+ .debug_line    0x00000000000009c0      0x549 Core/Src/ft5336.o
+ .debug_line    0x0000000000000f09     0x159b Core/Src/main.o
+ .debug_line    0x00000000000024a4      0xb99 Core/Src/stm32746g_discovery.o
+ .debug_line    0x000000000000303d     0x1001 Core/Src/stm32746g_discovery_lcd.o
+ .debug_line    0x000000000000403e      0x9b0 Core/Src/stm32746g_discovery_sdram.o
+ .debug_line    0x00000000000049ee      0xa10 Core/Src/stm32746g_discovery_ts.o
+ .debug_line    0x00000000000053fe      0xbdb Core/Src/stm32f7xx_hal_msp.o
+ .debug_line    0x0000000000005fd9      0x8be Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_line    0x0000000000006897      0x935 Core/Src/stm32f7xx_it.o
+ .debug_line    0x00000000000071cc      0xdf0 Core/Src/syscalls.o
+ .debug_line    0x0000000000007fbc      0xc6c Core/Src/sysmem.o
+ .debug_line    0x0000000000008c28      0x8a3 Core/Src/system_stm32f7xx.o
+ .debug_line    0x00000000000094cb       0x85 Core/Startup/startup_stm32f746nghx.o
+ .debug_line    0x0000000000009550      0xab2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_line    0x000000000000a002      0xcdb Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_line    0x000000000000acdd      0xbb3 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_line    0x000000000000b890      0x9e0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_line    0x000000000000c270      0x8ee Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_line    0x000000000000cb5e      0xae3 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_line    0x000000000000d641      0x9a6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_line    0x000000000000dfe7      0xb5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_line    0x000000000000eb45      0xdeb Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_line    0x000000000000f930      0xf60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_line    0x0000000000010890      0xa97 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_line    0x0000000000011327     0x1c0e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_line    0x0000000000012f35      0x922 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_line    0x0000000000013857     0x1161 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_line    0x00000000000149b8      0x9f7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_line    0x00000000000153af      0x9d3 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_line    0x0000000000015d82      0xb28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_line    0x00000000000168aa      0xa9a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_line    0x0000000000017344      0xa04 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_line    0x0000000000017d48      0xc1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_line    0x0000000000018962      0xfca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_line    0x000000000001992c      0xbe6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_line    0x000000000001a512     0x1305 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_line    0x000000000001b817     0x1bcf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_line    0x000000000001d3e6      0xf3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_line    0x000000000001e320     0x1439 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_line    0x000000000001f759      0xb3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_line    0x0000000000020293     0x1002 LWIP/App/lwip.o
+ .debug_line    0x0000000000021295     0x11de LWIP/Target/ethernetif.o
+ .debug_line    0x0000000000022473      0xce9 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_line    0x000000000002315c      0x670 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_line    0x00000000000237cc     0x105a Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_line    0x0000000000024826     0x128f Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_line    0x0000000000025ab5      0x67d Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_line    0x0000000000026132      0x758 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_line    0x000000000002688a     0x119a Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_line    0x0000000000027a24      0xd70 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_line    0x0000000000028794     0x10c0 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_line    0x0000000000029854      0xd90 Middlewares/Third_Party/LwIP/src/core/ip.o
+ .debug_line    0x000000000002a5e4     0x1102 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_line    0x000000000002b6e6     0x1213 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_line    0x000000000002c8f9     0x13ea Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_line    0x000000000002dce3     0x15e0 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_line    0x000000000002f2c3     0x184d Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_line    0x0000000000030b10     0x1733 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_line    0x0000000000032243     0x15c3 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_line    0x0000000000033806     0x11c4 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_line    0x00000000000349ca     0x120f Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_line    0x0000000000035bd9     0x1653 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_line    0x000000000003722c     0x1200 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_line    0x000000000003842c      0xeb8 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_line    0x00000000000392e4     0x1004 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_line    0x000000000003a2e8      0xeab Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_line    0x000000000003b193     0x1111 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_line    0x000000000003c2a4      0xef7 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_line    0x000000000003d19b     0x1088 Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+
+.debug_str      0x0000000000000000   0x133260
+ .debug_str     0x0000000000000000   0x108154 Core/Src/freertos.o
+                                     0x10886f (size before relaxing)
+ .debug_str     0x0000000000108154     0x1695 Core/Src/ft5336.o
+                                       0x530e (size before relaxing)
+ .debug_str     0x00000000001097e9    0x14293 Core/Src/main.o
+                                     0x11e463 (size before relaxing)
+ .debug_str     0x000000000011da7c      0xa56 Core/Src/stm32746g_discovery.o
+                                     0x106007 (size before relaxing)
+ .debug_str     0x000000000011e4d2      0x844 Core/Src/stm32746g_discovery_lcd.o
+                                     0x106b2d (size before relaxing)
+ .debug_str     0x000000000011ed16      0x1a9 Core/Src/stm32746g_discovery_sdram.o
+                                     0x104cd9 (size before relaxing)
+ .debug_str     0x000000000011eebf      0x160 Core/Src/stm32746g_discovery_ts.o
+                                     0x106afa (size before relaxing)
+ .debug_str     0x000000000011f01f      0x24b Core/Src/stm32f7xx_hal_msp.o
+                                     0x1069b0 (size before relaxing)
+ .debug_str     0x000000000011f26a       0x98 Core/Src/stm32f7xx_hal_timebase_tim.o
+                                     0x104729 (size before relaxing)
+ .debug_str     0x000000000011f302       0xa6 Core/Src/stm32f7xx_it.o
+                                     0x10567f (size before relaxing)
+ .debug_str     0x000000000011f3a8      0xe87 Core/Src/syscalls.o
+                                     0x10df79 (size before relaxing)
+ .debug_str     0x000000000012022f       0x6b Core/Src/sysmem.o
+                                     0x10d61f (size before relaxing)
+ .debug_str     0x000000000012029a      0x174 Core/Src/system_stm32f7xx.o
+                                     0x103d85 (size before relaxing)
+ .debug_str     0x000000000012040e       0x36 Core/Startup/startup_stm32f746nghx.o
+                                         0x80 (size before relaxing)
+ .debug_str     0x0000000000120444      0x33c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+                                     0x104637 (size before relaxing)
+ .debug_str     0x0000000000120780      0x274 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+                                     0x104228 (size before relaxing)
+ .debug_str     0x00000000001209f4      0x36a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+                                     0x1046de (size before relaxing)
+ .debug_str     0x0000000000120d5e       0xb2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+                                     0x103dbe (size before relaxing)
+ .debug_str     0x0000000000120e10       0x82 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+                                     0x103d91 (size before relaxing)
+ .debug_str     0x0000000000120e92      0x1bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+                                     0x1040c3 (size before relaxing)
+ .debug_str     0x000000000012104f      0x164 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+                                     0x103ff3 (size before relaxing)
+ .debug_str     0x00000000001211b3      0x31b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+                                     0x1040bf (size before relaxing)
+ .debug_str     0x00000000001214ce      0x360 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+                                     0x104270 (size before relaxing)
+ .debug_str     0x000000000012182e      0x762 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+                                     0x104891 (size before relaxing)
+ .debug_str     0x0000000000121f90      0x244 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+                                     0x103f5b (size before relaxing)
+ .debug_str     0x00000000001221d4      0xcd4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+                                     0x104e73 (size before relaxing)
+ .debug_str     0x0000000000122ea8       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+                                     0x1040af (size before relaxing)
+ .debug_str     0x0000000000122ee3      0x406 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+                                     0x1042f3 (size before relaxing)
+ .debug_str     0x00000000001232e9      0x2c5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+                                     0x10403d (size before relaxing)
+ .debug_str     0x00000000001235ae      0x1b5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+                                     0x103fff (size before relaxing)
+ .debug_str     0x0000000000123763      0x263 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+                                     0x1040a0 (size before relaxing)
+ .debug_str     0x00000000001239c6      0x159 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+                                     0x10402a (size before relaxing)
+ .debug_str     0x0000000000123b1f      0x175 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+                                     0x103db5 (size before relaxing)
+ .debug_str     0x0000000000123c94      0x1ac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+                                     0x104099 (size before relaxing)
+ .debug_str     0x0000000000123e40      0x5b2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+                                     0x104426 (size before relaxing)
+ .debug_str     0x00000000001243f2      0x254 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+                                     0x104293 (size before relaxing)
+ .debug_str     0x0000000000124646      0x557 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+                                     0x10453f (size before relaxing)
+ .debug_str     0x0000000000124b9d      0xc3f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+                                     0x104e11 (size before relaxing)
+ .debug_str     0x00000000001257dc      0x448 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+                                     0x104664 (size before relaxing)
+ .debug_str     0x0000000000125c24      0x7c7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+                                     0x1048e4 (size before relaxing)
+ .debug_str     0x00000000001263eb      0x477 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+                                     0x1041e3 (size before relaxing)
+ .debug_str     0x0000000000126862      0x3c2 LWIP/App/lwip.o
+                                     0x118e2d (size before relaxing)
+ .debug_str     0x0000000000126c24      0x44c LWIP/Target/ethernetif.o
+                                     0x118b5d (size before relaxing)
+ .debug_str     0x0000000000127070      0x642 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                                       0xe2d7 (size before relaxing)
+ .debug_str     0x00000000001276b2      0x12d Middlewares/Third_Party/FreeRTOS/Source/list.o
+                                       0xa77a (size before relaxing)
+ .debug_str     0x00000000001277df      0x87e Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                                       0xc003 (size before relaxing)
+ .debug_str     0x000000000012805d     0x136f Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                                       0xcc38 (size before relaxing)
+ .debug_str     0x00000000001293cc      0x782 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+                                       0x84c2 (size before relaxing)
+ .debug_str     0x0000000000129b4e      0x25a Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+                                       0xaf8a (size before relaxing)
+ .debug_str     0x0000000000129da8      0x563 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+                                     0x1188da (size before relaxing)
+ .debug_str     0x000000000012a30b       0xa6 Middlewares/Third_Party/LwIP/src/core/def.o
+                                     0x10d436 (size before relaxing)
+ .debug_str     0x000000000012a3b1     0x419f Middlewares/Third_Party/LwIP/src/core/init.o
+                                     0x11ca52 (size before relaxing)
+ .debug_str     0x000000000012e550       0x2e Middlewares/Third_Party/LwIP/src/core/ip.o
+                                     0x111391 (size before relaxing)
+ .debug_str     0x000000000012e57e      0x456 Middlewares/Third_Party/LwIP/src/core/mem.o
+                                     0x1149dc (size before relaxing)
+ .debug_str     0x000000000012e9d4      0xadd Middlewares/Third_Party/LwIP/src/core/memp.o
+                                     0x11d605 (size before relaxing)
+ .debug_str     0x000000000012f4b1      0x7a4 Middlewares/Third_Party/LwIP/src/core/netif.o
+                                     0x11aa33 (size before relaxing)
+ .debug_str     0x000000000012fc55      0x5b7 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+                                     0x11a3cf (size before relaxing)
+ .debug_str     0x000000000013020c      0x520 Middlewares/Third_Party/LwIP/src/core/tcp.o
+                                     0x113ba3 (size before relaxing)
+ .debug_str     0x000000000013072c      0x330 Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+                                     0x113891 (size before relaxing)
+ .debug_str     0x0000000000130a5c      0x416 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+                                     0x113a53 (size before relaxing)
+ .debug_str     0x0000000000130e72      0x211 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+                                     0x11a781 (size before relaxing)
+ .debug_str     0x0000000000131083      0x29f Middlewares/Third_Party/LwIP/src/core/udp.o
+                                     0x1122a8 (size before relaxing)
+ .debug_str     0x0000000000131322      0xff0 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+                                     0x112cba (size before relaxing)
+ .debug_str     0x0000000000132312      0x54b Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+                                     0x112708 (size before relaxing)
+ .debug_str     0x000000000013285d      0x115 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+                                     0x11177d (size before relaxing)
+ .debug_str     0x0000000000132972      0x16b Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+                                     0x113bef (size before relaxing)
+ .debug_str     0x0000000000132add       0xb8 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+                                     0x1106a3 (size before relaxing)
+ .debug_str     0x0000000000132b95      0x40d Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+                                     0x111c0c (size before relaxing)
+ .debug_str     0x0000000000132fa2       0xa2 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+                                     0x111f0e (size before relaxing)
+ .debug_str     0x0000000000133044      0x21c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+                                     0x114c57 (size before relaxing)
+
+.comment        0x0000000000000000       0x7b
+ .comment       0x0000000000000000       0x7b Core/Src/freertos.o
+                                         0x7c (size before relaxing)
+ .comment       0x000000000000007b       0x7c Core/Src/ft5336.o
+ .comment       0x000000000000007b       0x7c Core/Src/main.o
+ .comment       0x000000000000007b       0x7c Core/Src/stm32746g_discovery.o
+ .comment       0x000000000000007b       0x7c Core/Src/stm32746g_discovery_lcd.o
+ .comment       0x000000000000007b       0x7c Core/Src/stm32746g_discovery_sdram.o
+ .comment       0x000000000000007b       0x7c Core/Src/stm32746g_discovery_ts.o
+ .comment       0x000000000000007b       0x7c Core/Src/stm32f7xx_hal_msp.o
+ .comment       0x000000000000007b       0x7c Core/Src/stm32f7xx_hal_timebase_tim.o
+ .comment       0x000000000000007b       0x7c Core/Src/stm32f7xx_it.o
+ .comment       0x000000000000007b       0x7c Core/Src/syscalls.o
+ .comment       0x000000000000007b       0x7c Core/Src/sysmem.o
+ .comment       0x000000000000007b       0x7c Core/Src/system_stm32f7xx.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .comment       0x000000000000007b       0x7c LWIP/App/lwip.o
+ .comment       0x000000000000007b       0x7c LWIP/Target/ethernetif.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/def.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/init.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/ip.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/mem.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/memp.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/netif.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/udp.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .comment       0x000000000000007b       0x7c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+
+.debug_frame    0x0000000000000000     0xe6d0
+ .debug_frame   0x0000000000000000       0xa0 Core/Src/freertos.o
+ .debug_frame   0x00000000000000a0      0x230 Core/Src/ft5336.o
+ .debug_frame   0x00000000000002d0      0x3f0 Core/Src/main.o
+ .debug_frame   0x00000000000006c0      0x4b0 Core/Src/stm32746g_discovery.o
+ .debug_frame   0x0000000000000b70      0x840 Core/Src/stm32746g_discovery_lcd.o
+ .debug_frame   0x00000000000013b0      0x168 Core/Src/stm32746g_discovery_sdram.o
+ .debug_frame   0x0000000000001518      0x124 Core/Src/stm32746g_discovery_ts.o
+ .debug_frame   0x000000000000163c      0x420 Core/Src/stm32f7xx_hal_msp.o
+ .debug_frame   0x0000000000001a5c       0x74 Core/Src/stm32f7xx_hal_timebase_tim.o
+ .debug_frame   0x0000000000001ad0       0xfc Core/Src/stm32f7xx_it.o
+ .debug_frame   0x0000000000001bcc      0x2c4 Core/Src/syscalls.o
+ .debug_frame   0x0000000000001e90       0x38 Core/Src/sysmem.o
+ .debug_frame   0x0000000000001ec8       0x58 Core/Src/system_stm32f7xx.o
+ .debug_frame   0x0000000000001f20      0x3b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
+ .debug_frame   0x00000000000022d4      0x3fc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
+ .debug_frame   0x00000000000026d0      0x498 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
+ .debug_frame   0x0000000000002b68      0x168 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o
+ .debug_frame   0x0000000000002cd0       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o
+ .debug_frame   0x0000000000002d58      0x338 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
+ .debug_frame   0x0000000000003090      0x1bc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
+ .debug_frame   0x000000000000324c      0x250 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
+ .debug_frame   0x000000000000349c      0x490 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
+ .debug_frame   0x000000000000392c      0x4b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o
+ .debug_frame   0x0000000000003de0      0x14c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
+ .debug_frame   0x0000000000003f2c      0xbbc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
+ .debug_frame   0x0000000000004ae8       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
+ .debug_frame   0x0000000000004b48      0x61c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
+ .debug_frame   0x0000000000005164      0x254 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
+ .debug_frame   0x00000000000053b8      0x1c8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
+ .debug_frame   0x0000000000005580      0x1f4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
+ .debug_frame   0x0000000000005774      0x118 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
+ .debug_frame   0x000000000000588c      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o
+ .debug_frame   0x0000000000005ab8      0x308 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
+ .debug_frame   0x0000000000005dc0      0x59c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
+ .debug_frame   0x000000000000635c      0x37c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
+ .debug_frame   0x00000000000066d8      0x860 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
+ .debug_frame   0x0000000000006f38     0x1144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
+ .debug_frame   0x000000000000807c      0x610 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
+ .debug_frame   0x000000000000868c      0x96c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
+ .debug_frame   0x0000000000008ff8      0x37c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
+ .debug_frame   0x0000000000009374       0x3c LWIP/App/lwip.o
+ .debug_frame   0x00000000000093b0      0x1d4 LWIP/Target/ethernetif.o
+ .debug_frame   0x0000000000009584      0x7fc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_frame   0x0000000000009d80       0xd8 Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_frame   0x0000000000009e58      0x504 Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_frame   0x000000000000a35c      0x7e8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_frame   0x000000000000ab44      0x1a8 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
+ .debug_frame   0x000000000000acec      0x108 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+ .debug_frame   0x000000000000adf4      0x270 Middlewares/Third_Party/LwIP/src/api/tcpip.o
+ .debug_frame   0x000000000000b064       0xf8 Middlewares/Third_Party/LwIP/src/core/def.o
+ .debug_frame   0x000000000000b15c       0x34 Middlewares/Third_Party/LwIP/src/core/init.o
+ .debug_frame   0x000000000000b190      0x160 Middlewares/Third_Party/LwIP/src/core/mem.o
+ .debug_frame   0x000000000000b2f0      0x134 Middlewares/Third_Party/LwIP/src/core/memp.o
+ .debug_frame   0x000000000000b424      0x3a8 Middlewares/Third_Party/LwIP/src/core/netif.o
+ .debug_frame   0x000000000000b7cc      0x554 Middlewares/Third_Party/LwIP/src/core/pbuf.o
+ .debug_frame   0x000000000000bd20      0x77c Middlewares/Third_Party/LwIP/src/core/tcp.o
+ .debug_frame   0x000000000000c49c      0x1bc Middlewares/Third_Party/LwIP/src/core/tcp_in.o
+ .debug_frame   0x000000000000c658      0x3b0 Middlewares/Third_Party/LwIP/src/core/tcp_out.o
+ .debug_frame   0x000000000000ca08      0x170 Middlewares/Third_Party/LwIP/src/core/timeouts.o
+ .debug_frame   0x000000000000cb78      0x288 Middlewares/Third_Party/LwIP/src/core/udp.o
+ .debug_frame   0x000000000000ce00      0x570 Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o
+ .debug_frame   0x000000000000d370      0x228 Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o
+ .debug_frame   0x000000000000d598       0xa8 Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o
+ .debug_frame   0x000000000000d640       0xf0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o
+ .debug_frame   0x000000000000d730       0xf8 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o
+ .debug_frame   0x000000000000d828      0x1a0 Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o
+ .debug_frame   0x000000000000d9c8       0x58 Middlewares/Third_Party/LwIP/src/netif/ethernet.o
+ .debug_frame   0x000000000000da20      0x34c Middlewares/Third_Party/LwIP/system/OS/sys_arch.o
+ .debug_frame   0x000000000000dd6c       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-init.o)
+ .debug_frame   0x000000000000dd98       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcmp.o)
+ .debug_frame   0x000000000000ddc4       0x28 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memcpy-stub.o)
+ .debug_frame   0x000000000000ddec       0x28 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memmove.o)
+ .debug_frame   0x000000000000de14       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-memset.o)
+ .debug_frame   0x000000000000de34       0x74 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-printf.o)
+ .debug_frame   0x000000000000dea8       0x48 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-rand.o)
+ .debug_frame   0x000000000000def0       0x6c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sprintf.o)
+ .debug_frame   0x000000000000df5c      0x11c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-findfp.o)
+ .debug_frame   0x000000000000e078       0x54 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fwalk.o)
+ .debug_frame   0x000000000000e0cc       0x30 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-malloc.o)
+ .debug_frame   0x000000000000e0fc       0x38 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-freer.o)
+ .debug_frame   0x000000000000e134       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-mallocr.o)
+ .debug_frame   0x000000000000e160       0x90 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-svfprintf.o)
+ .debug_frame   0x000000000000e1f0       0xac c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf.o)
+ .debug_frame   0x000000000000e29c       0x60 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o)
+ .debug_frame   0x000000000000e2fc       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-sbrkr.o)
+ .debug_frame   0x000000000000e328       0x88 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-stdio.o)
+ .debug_frame   0x000000000000e3b0       0x40 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wbuf.o)
+ .debug_frame   0x000000000000e3f0       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-writer.o)
+ .debug_frame   0x000000000000e41c       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-wsetup.o)
+ .debug_frame   0x000000000000e448       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-closer.o)
+ .debug_frame   0x000000000000e474       0x68 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fflush.o)
+ .debug_frame   0x000000000000e4dc       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-lseekr.o)
+ .debug_frame   0x000000000000e508       0x58 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-makebuf.o)
+ .debug_frame   0x000000000000e560       0x30 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-mlock.o)
+ .debug_frame   0x000000000000e590       0x3c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-reallocr.o)
+ .debug_frame   0x000000000000e5cc       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-readr.o)
+ .debug_frame   0x000000000000e5f8       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-fstatr.o)
+ .debug_frame   0x000000000000e624       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-isattyr.o)
+ .debug_frame   0x000000000000e650       0x20 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard\libc_nano.a(lib_a-nano-msizer.o)
+ .debug_frame   0x000000000000e670       0x2c c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_aeabi_uldivmod.o)
+ .debug_frame   0x000000000000e69c       0x34 c:/st/stm32cubeide_1.5.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard\libgcc.a(_udivmoddi4.o)
diff --git a/Debug/makefile b/Debug/makefile
index 93072c6..793c85b 100644
--- a/Debug/makefile
+++ b/Debug/makefile
@@ -8,10 +8,20 @@ RM := rm -rf
 
 # All of the sources participating in the build are defined here
 -include sources.mk
+-include Middlewares/Third_Party/LwIP/system/OS/subdir.mk
+-include Middlewares/Third_Party/LwIP/src/netif/ppp/subdir.mk
+-include Middlewares/Third_Party/LwIP/src/netif/subdir.mk
+-include Middlewares/Third_Party/LwIP/src/core/ipv6/subdir.mk
+-include Middlewares/Third_Party/LwIP/src/core/ipv4/subdir.mk
+-include Middlewares/Third_Party/LwIP/src/core/subdir.mk
+-include Middlewares/Third_Party/LwIP/src/apps/mqtt/subdir.mk
+-include Middlewares/Third_Party/LwIP/src/api/subdir.mk
 -include Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk
 -include Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/subdir.mk
 -include Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/subdir.mk
 -include Middlewares/Third_Party/FreeRTOS/Source/subdir.mk
+-include LWIP/Target/subdir.mk
+-include LWIP/App/subdir.mk
 -include Drivers/STM32F7xx_HAL_Driver/Src/subdir.mk
 -include Core/Startup/subdir.mk
 -include Core/Src/subdir.mk
@@ -32,34 +42,34 @@ endif
 
 -include ../makefile.defs
 
-BUILD_ARTIFACT_NAME := prog_demo_2021
+BUILD_ARTIFACT_NAME := Space_Invaders
 BUILD_ARTIFACT_EXTENSION := elf
 BUILD_ARTIFACT_PREFIX := 
 BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME).$(BUILD_ARTIFACT_EXTENSION)
 
 # Add inputs and outputs from these tool invocations to the build variables 
 EXECUTABLES += \
-prog_demo_2021.elf \
+Space_Invaders.elf \
 
 SIZE_OUTPUT += \
 default.size.stdout \
 
 OBJDUMP_LIST += \
-prog_demo_2021.list \
+Space_Invaders.list \
 
 OBJCOPY_BIN += \
-prog_demo_2021.bin \
+Space_Invaders.bin \
 
 
 # All Target
 all: main-build
 
 # Main-build Target
-main-build: prog_demo_2021.elf secondary-outputs
+main-build: Space_Invaders.elf secondary-outputs
 
 # Tool invocations
-prog_demo_2021.elf: $(OBJS) $(USER_OBJS) /home/ajuton/Documents/STM32CubeIDE/workspace_1.5.1/test_/STM32F746NGHX_FLASH.ld
-	arm-none-eabi-gcc -o "prog_demo_2021.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m7 -T"/home/ajuton/Documents/STM32CubeIDE/workspace_1.5.1/test_/STM32F746NGHX_FLASH.ld" --specs=nosys.specs -Wl,-Map="prog_demo_2021.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
+Space_Invaders.elf: $(OBJS) $(USER_OBJS) C:\Users\thoma\Desktop\Scolaire\info_indus_s2\Projet\Space_Invaders\STM32F746NGHX_FLASH.ld
+	arm-none-eabi-gcc -o "Space_Invaders.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m7 -T"C:\Users\thoma\Desktop\Scolaire\info_indus_s2\Projet\Space_Invaders\STM32F746NGHX_FLASH.ld" --specs=nosys.specs -Wl,-Map="Space_Invaders.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
 	@echo 'Finished building target: $@'
 	@echo ' '
 
@@ -68,13 +78,13 @@ default.size.stdout: $(EXECUTABLES)
 	@echo 'Finished building: $@'
 	@echo ' '
 
-prog_demo_2021.list: $(EXECUTABLES)
-	arm-none-eabi-objdump -h -S $(EXECUTABLES) > "prog_demo_2021.list"
+Space_Invaders.list: $(EXECUTABLES)
+	arm-none-eabi-objdump -h -S $(EXECUTABLES) > "Space_Invaders.list"
 	@echo 'Finished building: $@'
 	@echo ' '
 
-prog_demo_2021.bin: $(EXECUTABLES)
-	arm-none-eabi-objcopy  -O binary $(EXECUTABLES) "prog_demo_2021.bin"
+Space_Invaders.bin: $(EXECUTABLES)
+	arm-none-eabi-objcopy  -O binary $(EXECUTABLES) "Space_Invaders.bin"
 	@echo 'Finished building: $@'
 	@echo ' '
 
diff --git a/Debug/objects.list b/Debug/objects.list
index 3fe03b2..c8969d4 100644
--- a/Debug/objects.list
+++ b/Debug/objects.list
@@ -16,12 +16,15 @@
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o"
+"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc.o"
+"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_crc_ex.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o"
+"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o"
@@ -34,6 +37,7 @@
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o"
+"Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rng.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o"
@@ -44,6 +48,8 @@
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o"
 "Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o"
+"LWIP/App/lwip.o"
+"LWIP/Target/ethernetif.o"
 "Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o"
 "Middlewares/Third_Party/FreeRTOS/Source/croutine.o"
 "Middlewares/Third_Party/FreeRTOS/Source/event_groups.o"
@@ -54,3 +60,84 @@
 "Middlewares/Third_Party/FreeRTOS/Source/timers.o"
 "Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o"
 "Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o"
+"Middlewares/Third_Party/LwIP/src/api/api_lib.o"
+"Middlewares/Third_Party/LwIP/src/api/api_msg.o"
+"Middlewares/Third_Party/LwIP/src/api/err.o"
+"Middlewares/Third_Party/LwIP/src/api/if_api.o"
+"Middlewares/Third_Party/LwIP/src/api/netbuf.o"
+"Middlewares/Third_Party/LwIP/src/api/netdb.o"
+"Middlewares/Third_Party/LwIP/src/api/netifapi.o"
+"Middlewares/Third_Party/LwIP/src/api/sockets.o"
+"Middlewares/Third_Party/LwIP/src/api/tcpip.o"
+"Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.o"
+"Middlewares/Third_Party/LwIP/src/core/altcp.o"
+"Middlewares/Third_Party/LwIP/src/core/altcp_alloc.o"
+"Middlewares/Third_Party/LwIP/src/core/altcp_tcp.o"
+"Middlewares/Third_Party/LwIP/src/core/def.o"
+"Middlewares/Third_Party/LwIP/src/core/dns.o"
+"Middlewares/Third_Party/LwIP/src/core/inet_chksum.o"
+"Middlewares/Third_Party/LwIP/src/core/init.o"
+"Middlewares/Third_Party/LwIP/src/core/ip.o"
+"Middlewares/Third_Party/LwIP/src/core/mem.o"
+"Middlewares/Third_Party/LwIP/src/core/memp.o"
+"Middlewares/Third_Party/LwIP/src/core/netif.o"
+"Middlewares/Third_Party/LwIP/src/core/pbuf.o"
+"Middlewares/Third_Party/LwIP/src/core/raw.o"
+"Middlewares/Third_Party/LwIP/src/core/stats.o"
+"Middlewares/Third_Party/LwIP/src/core/sys.o"
+"Middlewares/Third_Party/LwIP/src/core/tcp.o"
+"Middlewares/Third_Party/LwIP/src/core/tcp_in.o"
+"Middlewares/Third_Party/LwIP/src/core/tcp_out.o"
+"Middlewares/Third_Party/LwIP/src/core/timeouts.o"
+"Middlewares/Third_Party/LwIP/src/core/udp.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.o"
+"Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.o"
+"Middlewares/Third_Party/LwIP/src/netif/bridgeif.o"
+"Middlewares/Third_Party/LwIP/src/netif/bridgeif_fdb.o"
+"Middlewares/Third_Party/LwIP/src/netif/ethernet.o"
+"Middlewares/Third_Party/LwIP/src/netif/lowpan6.o"
+"Middlewares/Third_Party/LwIP/src/netif/lowpan6_ble.o"
+"Middlewares/Third_Party/LwIP/src/netif/lowpan6_common.o"
+"Middlewares/Third_Party/LwIP/src/netif/slipif.o"
+"Middlewares/Third_Party/LwIP/src/netif/zepif.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/auth.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/demand.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/eap.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/magic.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/upap.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/utils.o"
+"Middlewares/Third_Party/LwIP/src/netif/ppp/vj.o"
+"Middlewares/Third_Party/LwIP/system/OS/sys_arch.o"
diff --git a/Debug/prog_demo_2021.bin b/Debug/prog_demo_2021.bin
deleted file mode 100644
index 7aaaa20..0000000
Binary files a/Debug/prog_demo_2021.bin and /dev/null differ
diff --git a/Debug/prog_demo_2021.elf b/Debug/prog_demo_2021.elf
deleted file mode 100644
index a455f3c..0000000
Binary files a/Debug/prog_demo_2021.elf and /dev/null differ
diff --git a/Debug/prog_demo_2021.list b/Debug/prog_demo_2021.list
deleted file mode 100644
index 83e8075..0000000
--- a/Debug/prog_demo_2021.list
+++ /dev/null
@@ -1,33288 +0,0 @@
-
-prog_demo_2021.elf:     file format elf32-littlearm
-
-Sections:
-Idx Name          Size      VMA       LMA       File off  Algn
-  0 .isr_vector   000001c8  08000000  08000000  00010000  2**0
-                  CONTENTS, ALLOC, LOAD, READONLY, DATA
-  1 .text         0000c210  080001d0  080001d0  000101d0  2**4
-                  CONTENTS, ALLOC, LOAD, READONLY, CODE
-  2 .rodata       00001fe4  0800c3e0  0800c3e0  0001c3e0  2**2
-                  CONTENTS, ALLOC, LOAD, READONLY, DATA
-  3 .ARM.extab    00000000  0800e3c4  0800e3c4  000200b0  2**0
-                  CONTENTS
-  4 .ARM          00000008  0800e3c4  0800e3c4  0001e3c4  2**2
-                  CONTENTS, ALLOC, LOAD, READONLY, DATA
-  5 .preinit_array 00000000  0800e3cc  0800e3cc  000200b0  2**0
-                  CONTENTS, ALLOC, LOAD, DATA
-  6 .init_array   00000004  0800e3cc  0800e3cc  0001e3cc  2**2
-                  CONTENTS, ALLOC, LOAD, DATA
-  7 .fini_array   00000004  0800e3d0  0800e3d0  0001e3d0  2**2
-                  CONTENTS, ALLOC, LOAD, DATA
-  8 .data         000000b0  20000000  0800e3d4  00020000  2**2
-                  CONTENTS, ALLOC, LOAD, DATA
-  9 .bss          00008a4c  200000b0  0800e484  000200b0  2**2
-                  ALLOC
- 10 ._user_heap_stack 00000604  20008afc  0800e484  00028afc  2**0
-                  ALLOC
- 11 .ARM.attributes 00000030  00000000  00000000  000200b0  2**0
-                  CONTENTS, READONLY
- 12 .debug_info   00029de5  00000000  00000000  000200e0  2**0
-                  CONTENTS, READONLY, DEBUGGING
- 13 .debug_abbrev 000051ee  00000000  00000000  00049ec5  2**0
-                  CONTENTS, READONLY, DEBUGGING
- 14 .debug_aranges 00002490  00000000  00000000  0004f0b8  2**3
-                  CONTENTS, READONLY, DEBUGGING
- 15 .debug_ranges 00002208  00000000  00000000  00051548  2**3
-                  CONTENTS, READONLY, DEBUGGING
- 16 .debug_macro  0002df43  00000000  00000000  00053750  2**0
-                  CONTENTS, READONLY, DEBUGGING
- 17 .debug_line   0001dc92  00000000  00000000  00081693  2**0
-                  CONTENTS, READONLY, DEBUGGING
- 18 .debug_str    00114119  00000000  00000000  0009f325  2**0
-                  CONTENTS, READONLY, DEBUGGING
- 19 .comment      0000007b  00000000  00000000  001b343e  2**0
-                  CONTENTS, READONLY
- 20 .debug_frame  00009d9c  00000000  00000000  001b34bc  2**2
-                  CONTENTS, READONLY, DEBUGGING
-
-Disassembly of section .text:
-
-080001d0 <__do_global_dtors_aux>:
- 80001d0:	b510      	push	{r4, lr}
- 80001d2:	4c05      	ldr	r4, [pc, #20]	; (80001e8 <__do_global_dtors_aux+0x18>)
- 80001d4:	7823      	ldrb	r3, [r4, #0]
- 80001d6:	b933      	cbnz	r3, 80001e6 <__do_global_dtors_aux+0x16>
- 80001d8:	4b04      	ldr	r3, [pc, #16]	; (80001ec <__do_global_dtors_aux+0x1c>)
- 80001da:	b113      	cbz	r3, 80001e2 <__do_global_dtors_aux+0x12>
- 80001dc:	4804      	ldr	r0, [pc, #16]	; (80001f0 <__do_global_dtors_aux+0x20>)
- 80001de:	f3af 8000 	nop.w
- 80001e2:	2301      	movs	r3, #1
- 80001e4:	7023      	strb	r3, [r4, #0]
- 80001e6:	bd10      	pop	{r4, pc}
- 80001e8:	200000b0 	.word	0x200000b0
- 80001ec:	00000000 	.word	0x00000000
- 80001f0:	0800c3c8 	.word	0x0800c3c8
-
-080001f4 <frame_dummy>:
- 80001f4:	b508      	push	{r3, lr}
- 80001f6:	4b03      	ldr	r3, [pc, #12]	; (8000204 <frame_dummy+0x10>)
- 80001f8:	b11b      	cbz	r3, 8000202 <frame_dummy+0xe>
- 80001fa:	4903      	ldr	r1, [pc, #12]	; (8000208 <frame_dummy+0x14>)
- 80001fc:	4803      	ldr	r0, [pc, #12]	; (800020c <frame_dummy+0x18>)
- 80001fe:	f3af 8000 	nop.w
- 8000202:	bd08      	pop	{r3, pc}
- 8000204:	00000000 	.word	0x00000000
- 8000208:	200000b4 	.word	0x200000b4
- 800020c:	0800c3c8 	.word	0x0800c3c8
-
-08000210 <memchr>:
- 8000210:	f001 01ff 	and.w	r1, r1, #255	; 0xff
- 8000214:	2a10      	cmp	r2, #16
- 8000216:	db2b      	blt.n	8000270 <memchr+0x60>
- 8000218:	f010 0f07 	tst.w	r0, #7
- 800021c:	d008      	beq.n	8000230 <memchr+0x20>
- 800021e:	f810 3b01 	ldrb.w	r3, [r0], #1
- 8000222:	3a01      	subs	r2, #1
- 8000224:	428b      	cmp	r3, r1
- 8000226:	d02d      	beq.n	8000284 <memchr+0x74>
- 8000228:	f010 0f07 	tst.w	r0, #7
- 800022c:	b342      	cbz	r2, 8000280 <memchr+0x70>
- 800022e:	d1f6      	bne.n	800021e <memchr+0xe>
- 8000230:	b4f0      	push	{r4, r5, r6, r7}
- 8000232:	ea41 2101 	orr.w	r1, r1, r1, lsl #8
- 8000236:	ea41 4101 	orr.w	r1, r1, r1, lsl #16
- 800023a:	f022 0407 	bic.w	r4, r2, #7
- 800023e:	f07f 0700 	mvns.w	r7, #0
- 8000242:	2300      	movs	r3, #0
- 8000244:	e8f0 5602 	ldrd	r5, r6, [r0], #8
- 8000248:	3c08      	subs	r4, #8
- 800024a:	ea85 0501 	eor.w	r5, r5, r1
- 800024e:	ea86 0601 	eor.w	r6, r6, r1
- 8000252:	fa85 f547 	uadd8	r5, r5, r7
- 8000256:	faa3 f587 	sel	r5, r3, r7
- 800025a:	fa86 f647 	uadd8	r6, r6, r7
- 800025e:	faa5 f687 	sel	r6, r5, r7
- 8000262:	b98e      	cbnz	r6, 8000288 <memchr+0x78>
- 8000264:	d1ee      	bne.n	8000244 <memchr+0x34>
- 8000266:	bcf0      	pop	{r4, r5, r6, r7}
- 8000268:	f001 01ff 	and.w	r1, r1, #255	; 0xff
- 800026c:	f002 0207 	and.w	r2, r2, #7
- 8000270:	b132      	cbz	r2, 8000280 <memchr+0x70>
- 8000272:	f810 3b01 	ldrb.w	r3, [r0], #1
- 8000276:	3a01      	subs	r2, #1
- 8000278:	ea83 0301 	eor.w	r3, r3, r1
- 800027c:	b113      	cbz	r3, 8000284 <memchr+0x74>
- 800027e:	d1f8      	bne.n	8000272 <memchr+0x62>
- 8000280:	2000      	movs	r0, #0
- 8000282:	4770      	bx	lr
- 8000284:	3801      	subs	r0, #1
- 8000286:	4770      	bx	lr
- 8000288:	2d00      	cmp	r5, #0
- 800028a:	bf06      	itte	eq
- 800028c:	4635      	moveq	r5, r6
- 800028e:	3803      	subeq	r0, #3
- 8000290:	3807      	subne	r0, #7
- 8000292:	f015 0f01 	tst.w	r5, #1
- 8000296:	d107      	bne.n	80002a8 <memchr+0x98>
- 8000298:	3001      	adds	r0, #1
- 800029a:	f415 7f80 	tst.w	r5, #256	; 0x100
- 800029e:	bf02      	ittt	eq
- 80002a0:	3001      	addeq	r0, #1
- 80002a2:	f415 3fc0 	tsteq.w	r5, #98304	; 0x18000
- 80002a6:	3001      	addeq	r0, #1
- 80002a8:	bcf0      	pop	{r4, r5, r6, r7}
- 80002aa:	3801      	subs	r0, #1
- 80002ac:	4770      	bx	lr
- 80002ae:	bf00      	nop
-
-080002b0 <__aeabi_uldivmod>:
- 80002b0:	b953      	cbnz	r3, 80002c8 <__aeabi_uldivmod+0x18>
- 80002b2:	b94a      	cbnz	r2, 80002c8 <__aeabi_uldivmod+0x18>
- 80002b4:	2900      	cmp	r1, #0
- 80002b6:	bf08      	it	eq
- 80002b8:	2800      	cmpeq	r0, #0
- 80002ba:	bf1c      	itt	ne
- 80002bc:	f04f 31ff 	movne.w	r1, #4294967295	; 0xffffffff
- 80002c0:	f04f 30ff 	movne.w	r0, #4294967295	; 0xffffffff
- 80002c4:	f000 b972 	b.w	80005ac <__aeabi_idiv0>
- 80002c8:	f1ad 0c08 	sub.w	ip, sp, #8
- 80002cc:	e96d ce04 	strd	ip, lr, [sp, #-16]!
- 80002d0:	f000 f806 	bl	80002e0 <__udivmoddi4>
- 80002d4:	f8dd e004 	ldr.w	lr, [sp, #4]
- 80002d8:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
- 80002dc:	b004      	add	sp, #16
- 80002de:	4770      	bx	lr
-
-080002e0 <__udivmoddi4>:
- 80002e0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 80002e4:	9e08      	ldr	r6, [sp, #32]
- 80002e6:	4604      	mov	r4, r0
- 80002e8:	4688      	mov	r8, r1
- 80002ea:	2b00      	cmp	r3, #0
- 80002ec:	d14b      	bne.n	8000386 <__udivmoddi4+0xa6>
- 80002ee:	428a      	cmp	r2, r1
- 80002f0:	4615      	mov	r5, r2
- 80002f2:	d967      	bls.n	80003c4 <__udivmoddi4+0xe4>
- 80002f4:	fab2 f282 	clz	r2, r2
- 80002f8:	b14a      	cbz	r2, 800030e <__udivmoddi4+0x2e>
- 80002fa:	f1c2 0720 	rsb	r7, r2, #32
- 80002fe:	fa01 f302 	lsl.w	r3, r1, r2
- 8000302:	fa20 f707 	lsr.w	r7, r0, r7
- 8000306:	4095      	lsls	r5, r2
- 8000308:	ea47 0803 	orr.w	r8, r7, r3
- 800030c:	4094      	lsls	r4, r2
- 800030e:	ea4f 4e15 	mov.w	lr, r5, lsr #16
- 8000312:	0c23      	lsrs	r3, r4, #16
- 8000314:	fbb8 f7fe 	udiv	r7, r8, lr
- 8000318:	fa1f fc85 	uxth.w	ip, r5
- 800031c:	fb0e 8817 	mls	r8, lr, r7, r8
- 8000320:	ea43 4308 	orr.w	r3, r3, r8, lsl #16
- 8000324:	fb07 f10c 	mul.w	r1, r7, ip
- 8000328:	4299      	cmp	r1, r3
- 800032a:	d909      	bls.n	8000340 <__udivmoddi4+0x60>
- 800032c:	18eb      	adds	r3, r5, r3
- 800032e:	f107 30ff 	add.w	r0, r7, #4294967295	; 0xffffffff
- 8000332:	f080 811b 	bcs.w	800056c <__udivmoddi4+0x28c>
- 8000336:	4299      	cmp	r1, r3
- 8000338:	f240 8118 	bls.w	800056c <__udivmoddi4+0x28c>
- 800033c:	3f02      	subs	r7, #2
- 800033e:	442b      	add	r3, r5
- 8000340:	1a5b      	subs	r3, r3, r1
- 8000342:	b2a4      	uxth	r4, r4
- 8000344:	fbb3 f0fe 	udiv	r0, r3, lr
- 8000348:	fb0e 3310 	mls	r3, lr, r0, r3
- 800034c:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
- 8000350:	fb00 fc0c 	mul.w	ip, r0, ip
- 8000354:	45a4      	cmp	ip, r4
- 8000356:	d909      	bls.n	800036c <__udivmoddi4+0x8c>
- 8000358:	192c      	adds	r4, r5, r4
- 800035a:	f100 33ff 	add.w	r3, r0, #4294967295	; 0xffffffff
- 800035e:	f080 8107 	bcs.w	8000570 <__udivmoddi4+0x290>
- 8000362:	45a4      	cmp	ip, r4
- 8000364:	f240 8104 	bls.w	8000570 <__udivmoddi4+0x290>
- 8000368:	3802      	subs	r0, #2
- 800036a:	442c      	add	r4, r5
- 800036c:	ea40 4007 	orr.w	r0, r0, r7, lsl #16
- 8000370:	eba4 040c 	sub.w	r4, r4, ip
- 8000374:	2700      	movs	r7, #0
- 8000376:	b11e      	cbz	r6, 8000380 <__udivmoddi4+0xa0>
- 8000378:	40d4      	lsrs	r4, r2
- 800037a:	2300      	movs	r3, #0
- 800037c:	e9c6 4300 	strd	r4, r3, [r6]
- 8000380:	4639      	mov	r1, r7
- 8000382:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8000386:	428b      	cmp	r3, r1
- 8000388:	d909      	bls.n	800039e <__udivmoddi4+0xbe>
- 800038a:	2e00      	cmp	r6, #0
- 800038c:	f000 80eb 	beq.w	8000566 <__udivmoddi4+0x286>
- 8000390:	2700      	movs	r7, #0
- 8000392:	e9c6 0100 	strd	r0, r1, [r6]
- 8000396:	4638      	mov	r0, r7
- 8000398:	4639      	mov	r1, r7
- 800039a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 800039e:	fab3 f783 	clz	r7, r3
- 80003a2:	2f00      	cmp	r7, #0
- 80003a4:	d147      	bne.n	8000436 <__udivmoddi4+0x156>
- 80003a6:	428b      	cmp	r3, r1
- 80003a8:	d302      	bcc.n	80003b0 <__udivmoddi4+0xd0>
- 80003aa:	4282      	cmp	r2, r0
- 80003ac:	f200 80fa 	bhi.w	80005a4 <__udivmoddi4+0x2c4>
- 80003b0:	1a84      	subs	r4, r0, r2
- 80003b2:	eb61 0303 	sbc.w	r3, r1, r3
- 80003b6:	2001      	movs	r0, #1
- 80003b8:	4698      	mov	r8, r3
- 80003ba:	2e00      	cmp	r6, #0
- 80003bc:	d0e0      	beq.n	8000380 <__udivmoddi4+0xa0>
- 80003be:	e9c6 4800 	strd	r4, r8, [r6]
- 80003c2:	e7dd      	b.n	8000380 <__udivmoddi4+0xa0>
- 80003c4:	b902      	cbnz	r2, 80003c8 <__udivmoddi4+0xe8>
- 80003c6:	deff      	udf	#255	; 0xff
- 80003c8:	fab2 f282 	clz	r2, r2
- 80003cc:	2a00      	cmp	r2, #0
- 80003ce:	f040 808f 	bne.w	80004f0 <__udivmoddi4+0x210>
- 80003d2:	1b49      	subs	r1, r1, r5
- 80003d4:	ea4f 4e15 	mov.w	lr, r5, lsr #16
- 80003d8:	fa1f f885 	uxth.w	r8, r5
- 80003dc:	2701      	movs	r7, #1
- 80003de:	fbb1 fcfe 	udiv	ip, r1, lr
- 80003e2:	0c23      	lsrs	r3, r4, #16
- 80003e4:	fb0e 111c 	mls	r1, lr, ip, r1
- 80003e8:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
- 80003ec:	fb08 f10c 	mul.w	r1, r8, ip
- 80003f0:	4299      	cmp	r1, r3
- 80003f2:	d907      	bls.n	8000404 <__udivmoddi4+0x124>
- 80003f4:	18eb      	adds	r3, r5, r3
- 80003f6:	f10c 30ff 	add.w	r0, ip, #4294967295	; 0xffffffff
- 80003fa:	d202      	bcs.n	8000402 <__udivmoddi4+0x122>
- 80003fc:	4299      	cmp	r1, r3
- 80003fe:	f200 80cd 	bhi.w	800059c <__udivmoddi4+0x2bc>
- 8000402:	4684      	mov	ip, r0
- 8000404:	1a59      	subs	r1, r3, r1
- 8000406:	b2a3      	uxth	r3, r4
- 8000408:	fbb1 f0fe 	udiv	r0, r1, lr
- 800040c:	fb0e 1410 	mls	r4, lr, r0, r1
- 8000410:	ea43 4404 	orr.w	r4, r3, r4, lsl #16
- 8000414:	fb08 f800 	mul.w	r8, r8, r0
- 8000418:	45a0      	cmp	r8, r4
- 800041a:	d907      	bls.n	800042c <__udivmoddi4+0x14c>
- 800041c:	192c      	adds	r4, r5, r4
- 800041e:	f100 33ff 	add.w	r3, r0, #4294967295	; 0xffffffff
- 8000422:	d202      	bcs.n	800042a <__udivmoddi4+0x14a>
- 8000424:	45a0      	cmp	r8, r4
- 8000426:	f200 80b6 	bhi.w	8000596 <__udivmoddi4+0x2b6>
- 800042a:	4618      	mov	r0, r3
- 800042c:	eba4 0408 	sub.w	r4, r4, r8
- 8000430:	ea40 400c 	orr.w	r0, r0, ip, lsl #16
- 8000434:	e79f      	b.n	8000376 <__udivmoddi4+0x96>
- 8000436:	f1c7 0c20 	rsb	ip, r7, #32
- 800043a:	40bb      	lsls	r3, r7
- 800043c:	fa22 fe0c 	lsr.w	lr, r2, ip
- 8000440:	ea4e 0e03 	orr.w	lr, lr, r3
- 8000444:	fa01 f407 	lsl.w	r4, r1, r7
- 8000448:	fa20 f50c 	lsr.w	r5, r0, ip
- 800044c:	fa21 f30c 	lsr.w	r3, r1, ip
- 8000450:	ea4f 481e 	mov.w	r8, lr, lsr #16
- 8000454:	4325      	orrs	r5, r4
- 8000456:	fbb3 f9f8 	udiv	r9, r3, r8
- 800045a:	0c2c      	lsrs	r4, r5, #16
- 800045c:	fb08 3319 	mls	r3, r8, r9, r3
- 8000460:	fa1f fa8e 	uxth.w	sl, lr
- 8000464:	ea44 4303 	orr.w	r3, r4, r3, lsl #16
- 8000468:	fb09 f40a 	mul.w	r4, r9, sl
- 800046c:	429c      	cmp	r4, r3
- 800046e:	fa02 f207 	lsl.w	r2, r2, r7
- 8000472:	fa00 f107 	lsl.w	r1, r0, r7
- 8000476:	d90b      	bls.n	8000490 <__udivmoddi4+0x1b0>
- 8000478:	eb1e 0303 	adds.w	r3, lr, r3
- 800047c:	f109 30ff 	add.w	r0, r9, #4294967295	; 0xffffffff
- 8000480:	f080 8087 	bcs.w	8000592 <__udivmoddi4+0x2b2>
- 8000484:	429c      	cmp	r4, r3
- 8000486:	f240 8084 	bls.w	8000592 <__udivmoddi4+0x2b2>
- 800048a:	f1a9 0902 	sub.w	r9, r9, #2
- 800048e:	4473      	add	r3, lr
- 8000490:	1b1b      	subs	r3, r3, r4
- 8000492:	b2ad      	uxth	r5, r5
- 8000494:	fbb3 f0f8 	udiv	r0, r3, r8
- 8000498:	fb08 3310 	mls	r3, r8, r0, r3
- 800049c:	ea45 4403 	orr.w	r4, r5, r3, lsl #16
- 80004a0:	fb00 fa0a 	mul.w	sl, r0, sl
- 80004a4:	45a2      	cmp	sl, r4
- 80004a6:	d908      	bls.n	80004ba <__udivmoddi4+0x1da>
- 80004a8:	eb1e 0404 	adds.w	r4, lr, r4
- 80004ac:	f100 33ff 	add.w	r3, r0, #4294967295	; 0xffffffff
- 80004b0:	d26b      	bcs.n	800058a <__udivmoddi4+0x2aa>
- 80004b2:	45a2      	cmp	sl, r4
- 80004b4:	d969      	bls.n	800058a <__udivmoddi4+0x2aa>
- 80004b6:	3802      	subs	r0, #2
- 80004b8:	4474      	add	r4, lr
- 80004ba:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
- 80004be:	fba0 8902 	umull	r8, r9, r0, r2
- 80004c2:	eba4 040a 	sub.w	r4, r4, sl
- 80004c6:	454c      	cmp	r4, r9
- 80004c8:	46c2      	mov	sl, r8
- 80004ca:	464b      	mov	r3, r9
- 80004cc:	d354      	bcc.n	8000578 <__udivmoddi4+0x298>
- 80004ce:	d051      	beq.n	8000574 <__udivmoddi4+0x294>
- 80004d0:	2e00      	cmp	r6, #0
- 80004d2:	d069      	beq.n	80005a8 <__udivmoddi4+0x2c8>
- 80004d4:	ebb1 050a 	subs.w	r5, r1, sl
- 80004d8:	eb64 0403 	sbc.w	r4, r4, r3
- 80004dc:	fa04 fc0c 	lsl.w	ip, r4, ip
- 80004e0:	40fd      	lsrs	r5, r7
- 80004e2:	40fc      	lsrs	r4, r7
- 80004e4:	ea4c 0505 	orr.w	r5, ip, r5
- 80004e8:	e9c6 5400 	strd	r5, r4, [r6]
- 80004ec:	2700      	movs	r7, #0
- 80004ee:	e747      	b.n	8000380 <__udivmoddi4+0xa0>
- 80004f0:	f1c2 0320 	rsb	r3, r2, #32
- 80004f4:	fa20 f703 	lsr.w	r7, r0, r3
- 80004f8:	4095      	lsls	r5, r2
- 80004fa:	fa01 f002 	lsl.w	r0, r1, r2
- 80004fe:	fa21 f303 	lsr.w	r3, r1, r3
- 8000502:	ea4f 4e15 	mov.w	lr, r5, lsr #16
- 8000506:	4338      	orrs	r0, r7
- 8000508:	0c01      	lsrs	r1, r0, #16
- 800050a:	fbb3 f7fe 	udiv	r7, r3, lr
- 800050e:	fa1f f885 	uxth.w	r8, r5
- 8000512:	fb0e 3317 	mls	r3, lr, r7, r3
- 8000516:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
- 800051a:	fb07 f308 	mul.w	r3, r7, r8
- 800051e:	428b      	cmp	r3, r1
- 8000520:	fa04 f402 	lsl.w	r4, r4, r2
- 8000524:	d907      	bls.n	8000536 <__udivmoddi4+0x256>
- 8000526:	1869      	adds	r1, r5, r1
- 8000528:	f107 3cff 	add.w	ip, r7, #4294967295	; 0xffffffff
- 800052c:	d22f      	bcs.n	800058e <__udivmoddi4+0x2ae>
- 800052e:	428b      	cmp	r3, r1
- 8000530:	d92d      	bls.n	800058e <__udivmoddi4+0x2ae>
- 8000532:	3f02      	subs	r7, #2
- 8000534:	4429      	add	r1, r5
- 8000536:	1acb      	subs	r3, r1, r3
- 8000538:	b281      	uxth	r1, r0
- 800053a:	fbb3 f0fe 	udiv	r0, r3, lr
- 800053e:	fb0e 3310 	mls	r3, lr, r0, r3
- 8000542:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
- 8000546:	fb00 f308 	mul.w	r3, r0, r8
- 800054a:	428b      	cmp	r3, r1
- 800054c:	d907      	bls.n	800055e <__udivmoddi4+0x27e>
- 800054e:	1869      	adds	r1, r5, r1
- 8000550:	f100 3cff 	add.w	ip, r0, #4294967295	; 0xffffffff
- 8000554:	d217      	bcs.n	8000586 <__udivmoddi4+0x2a6>
- 8000556:	428b      	cmp	r3, r1
- 8000558:	d915      	bls.n	8000586 <__udivmoddi4+0x2a6>
- 800055a:	3802      	subs	r0, #2
- 800055c:	4429      	add	r1, r5
- 800055e:	1ac9      	subs	r1, r1, r3
- 8000560:	ea40 4707 	orr.w	r7, r0, r7, lsl #16
- 8000564:	e73b      	b.n	80003de <__udivmoddi4+0xfe>
- 8000566:	4637      	mov	r7, r6
- 8000568:	4630      	mov	r0, r6
- 800056a:	e709      	b.n	8000380 <__udivmoddi4+0xa0>
- 800056c:	4607      	mov	r7, r0
- 800056e:	e6e7      	b.n	8000340 <__udivmoddi4+0x60>
- 8000570:	4618      	mov	r0, r3
- 8000572:	e6fb      	b.n	800036c <__udivmoddi4+0x8c>
- 8000574:	4541      	cmp	r1, r8
- 8000576:	d2ab      	bcs.n	80004d0 <__udivmoddi4+0x1f0>
- 8000578:	ebb8 0a02 	subs.w	sl, r8, r2
- 800057c:	eb69 020e 	sbc.w	r2, r9, lr
- 8000580:	3801      	subs	r0, #1
- 8000582:	4613      	mov	r3, r2
- 8000584:	e7a4      	b.n	80004d0 <__udivmoddi4+0x1f0>
- 8000586:	4660      	mov	r0, ip
- 8000588:	e7e9      	b.n	800055e <__udivmoddi4+0x27e>
- 800058a:	4618      	mov	r0, r3
- 800058c:	e795      	b.n	80004ba <__udivmoddi4+0x1da>
- 800058e:	4667      	mov	r7, ip
- 8000590:	e7d1      	b.n	8000536 <__udivmoddi4+0x256>
- 8000592:	4681      	mov	r9, r0
- 8000594:	e77c      	b.n	8000490 <__udivmoddi4+0x1b0>
- 8000596:	3802      	subs	r0, #2
- 8000598:	442c      	add	r4, r5
- 800059a:	e747      	b.n	800042c <__udivmoddi4+0x14c>
- 800059c:	f1ac 0c02 	sub.w	ip, ip, #2
- 80005a0:	442b      	add	r3, r5
- 80005a2:	e72f      	b.n	8000404 <__udivmoddi4+0x124>
- 80005a4:	4638      	mov	r0, r7
- 80005a6:	e708      	b.n	80003ba <__udivmoddi4+0xda>
- 80005a8:	4637      	mov	r7, r6
- 80005aa:	e6e9      	b.n	8000380 <__udivmoddi4+0xa0>
-
-080005ac <__aeabi_idiv0>:
- 80005ac:	4770      	bx	lr
- 80005ae:	bf00      	nop
-
-080005b0 <vApplicationStackOverflowHook>:
-}
-/* USER CODE END 2 */
-
-/* USER CODE BEGIN 4 */
-__weak void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
-{
- 80005b0:	b480      	push	{r7}
- 80005b2:	b083      	sub	sp, #12
- 80005b4:	af00      	add	r7, sp, #0
- 80005b6:	6078      	str	r0, [r7, #4]
- 80005b8:	6039      	str	r1, [r7, #0]
-   /* Run time stack overflow checking is performed if
-   configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
-   called if a stack overflow is detected. */
-}
- 80005ba:	bf00      	nop
- 80005bc:	370c      	adds	r7, #12
- 80005be:	46bd      	mov	sp, r7
- 80005c0:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80005c4:	4770      	bx	lr
-
-080005c6 <vApplicationMallocFailedHook>:
-/* USER CODE END 4 */
-
-/* USER CODE BEGIN 5 */
-__weak void vApplicationMallocFailedHook(void)
-{
- 80005c6:	b480      	push	{r7}
- 80005c8:	af00      	add	r7, sp, #0
-   demo application. If heap_1.c or heap_2.c are used, then the size of the
-   heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in
-   FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used
-   to query the size of free heap space that remains (although it does not
-   provide information on how the remaining heap might be fragmented). */
-}
- 80005ca:	bf00      	nop
- 80005cc:	46bd      	mov	sp, r7
- 80005ce:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80005d2:	4770      	bx	lr
-
-080005d4 <ft5336_Init>:
-  *         from MCU to FT5336 : ie I2C channel initialization (if required).
-  * @param  DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
-  * @retval None
-  */
-void ft5336_Init(uint16_t DeviceAddr)
-{
- 80005d4:	b580      	push	{r7, lr}
- 80005d6:	b082      	sub	sp, #8
- 80005d8:	af00      	add	r7, sp, #0
- 80005da:	4603      	mov	r3, r0
- 80005dc:	80fb      	strh	r3, [r7, #6]
-  /* Wait at least 200ms after power up before accessing registers
-   * Trsi timing (Time of starting to report point after resetting) from FT5336GQQ datasheet */
-  TS_IO_Delay(200);
- 80005de:	20c8      	movs	r0, #200	; 0xc8
- 80005e0:	f001 fe16 	bl	8002210 <TS_IO_Delay>
-
-  /* Initialize I2C link if needed */
-  ft5336_I2C_InitializeIfRequired();
- 80005e4:	f000 fa7a 	bl	8000adc <ft5336_I2C_InitializeIfRequired>
-}
- 80005e8:	bf00      	nop
- 80005ea:	3708      	adds	r7, #8
- 80005ec:	46bd      	mov	sp, r7
- 80005ee:	bd80      	pop	{r7, pc}
-
-080005f0 <ft5336_Reset>:
-  *         @note : Not applicable to FT5336.
-  * @param  DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
-  * @retval None
-  */
-void ft5336_Reset(uint16_t DeviceAddr)
-{
- 80005f0:	b480      	push	{r7}
- 80005f2:	b083      	sub	sp, #12
- 80005f4:	af00      	add	r7, sp, #0
- 80005f6:	4603      	mov	r3, r0
- 80005f8:	80fb      	strh	r3, [r7, #6]
-  /* Do nothing */
-  /* No software reset sequence available in FT5336 IC */
-}
- 80005fa:	bf00      	nop
- 80005fc:	370c      	adds	r7, #12
- 80005fe:	46bd      	mov	sp, r7
- 8000600:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000604:	4770      	bx	lr
-
-08000606 <ft5336_ReadID>:
-  *         able to read the FT5336 device ID, and verify this is a FT5336.
-  * @param  DeviceAddr: I2C FT5336 Slave address.
-  * @retval The Device ID (two bytes).
-  */
-uint16_t ft5336_ReadID(uint16_t DeviceAddr)
-{
- 8000606:	b580      	push	{r7, lr}
- 8000608:	b084      	sub	sp, #16
- 800060a:	af00      	add	r7, sp, #0
- 800060c:	4603      	mov	r3, r0
- 800060e:	80fb      	strh	r3, [r7, #6]
-  volatile uint8_t ucReadId = 0;
- 8000610:	2300      	movs	r3, #0
- 8000612:	737b      	strb	r3, [r7, #13]
-  uint8_t nbReadAttempts = 0;
- 8000614:	2300      	movs	r3, #0
- 8000616:	73fb      	strb	r3, [r7, #15]
-  uint8_t bFoundDevice = 0; /* Device not found by default */
- 8000618:	2300      	movs	r3, #0
- 800061a:	73bb      	strb	r3, [r7, #14]
-
-  /* Initialize I2C link if needed */
-  ft5336_I2C_InitializeIfRequired();
- 800061c:	f000 fa5e 	bl	8000adc <ft5336_I2C_InitializeIfRequired>
-
-  /* At maximum 4 attempts to read ID : exit at first finding of the searched device ID */
-  for(nbReadAttempts = 0; ((nbReadAttempts < 3) && !(bFoundDevice)); nbReadAttempts++)
- 8000620:	2300      	movs	r3, #0
- 8000622:	73fb      	strb	r3, [r7, #15]
- 8000624:	e010      	b.n	8000648 <ft5336_ReadID+0x42>
-  {
-    /* Read register FT5336_CHIP_ID_REG as DeviceID detection */
-    ucReadId = TS_IO_Read(DeviceAddr, FT5336_CHIP_ID_REG);
- 8000626:	88fb      	ldrh	r3, [r7, #6]
- 8000628:	b2db      	uxtb	r3, r3
- 800062a:	21a8      	movs	r1, #168	; 0xa8
- 800062c:	4618      	mov	r0, r3
- 800062e:	f001 fdd1 	bl	80021d4 <TS_IO_Read>
- 8000632:	4603      	mov	r3, r0
- 8000634:	737b      	strb	r3, [r7, #13]
-
-    /* Found the searched device ID ? */
-    if(ucReadId == FT5336_ID_VALUE)
- 8000636:	7b7b      	ldrb	r3, [r7, #13]
- 8000638:	b2db      	uxtb	r3, r3
- 800063a:	2b51      	cmp	r3, #81	; 0x51
- 800063c:	d101      	bne.n	8000642 <ft5336_ReadID+0x3c>
-    {
-      /* Set device as found */
-      bFoundDevice = 1;
- 800063e:	2301      	movs	r3, #1
- 8000640:	73bb      	strb	r3, [r7, #14]
-  for(nbReadAttempts = 0; ((nbReadAttempts < 3) && !(bFoundDevice)); nbReadAttempts++)
- 8000642:	7bfb      	ldrb	r3, [r7, #15]
- 8000644:	3301      	adds	r3, #1
- 8000646:	73fb      	strb	r3, [r7, #15]
- 8000648:	7bfb      	ldrb	r3, [r7, #15]
- 800064a:	2b02      	cmp	r3, #2
- 800064c:	d802      	bhi.n	8000654 <ft5336_ReadID+0x4e>
- 800064e:	7bbb      	ldrb	r3, [r7, #14]
- 8000650:	2b00      	cmp	r3, #0
- 8000652:	d0e8      	beq.n	8000626 <ft5336_ReadID+0x20>
-    }
-  }
-
-  /* Return the device ID value */
-  return (ucReadId);
- 8000654:	7b7b      	ldrb	r3, [r7, #13]
- 8000656:	b2db      	uxtb	r3, r3
- 8000658:	b29b      	uxth	r3, r3
-}
- 800065a:	4618      	mov	r0, r3
- 800065c:	3710      	adds	r7, #16
- 800065e:	46bd      	mov	sp, r7
- 8000660:	bd80      	pop	{r7, pc}
-
-08000662 <ft5336_TS_Start>:
-  * @brief  Configures the touch Screen IC device to start detecting touches
-  * @param  DeviceAddr: Device address on communication Bus (I2C slave address).
-  * @retval None.
-  */
-void ft5336_TS_Start(uint16_t DeviceAddr)
-{
- 8000662:	b580      	push	{r7, lr}
- 8000664:	b082      	sub	sp, #8
- 8000666:	af00      	add	r7, sp, #0
- 8000668:	4603      	mov	r3, r0
- 800066a:	80fb      	strh	r3, [r7, #6]
-  /* Minimum static configuration of FT5336 */
-  FT5336_ASSERT(ft5336_TS_Configure(DeviceAddr));
- 800066c:	88fb      	ldrh	r3, [r7, #6]
- 800066e:	4618      	mov	r0, r3
- 8000670:	f000 fa44 	bl	8000afc <ft5336_TS_Configure>
-
-  /* By default set FT5336 IC in Polling mode : no INT generation on FT5336 for new touch available */
-  /* Note TS_INT is active low                                                                      */
-  ft5336_TS_DisableIT(DeviceAddr);
- 8000674:	88fb      	ldrh	r3, [r7, #6]
- 8000676:	4618      	mov	r0, r3
- 8000678:	f000 f932 	bl	80008e0 <ft5336_TS_DisableIT>
-}
- 800067c:	bf00      	nop
- 800067e:	3708      	adds	r7, #8
- 8000680:	46bd      	mov	sp, r7
- 8000682:	bd80      	pop	{r7, pc}
-
-08000684 <ft5336_TS_DetectTouch>:
-  *         variables).
-  * @param  DeviceAddr: Device address on communication Bus.
-  * @retval : Number of active touches detected (can be 0, 1 or 2).
-  */
-uint8_t ft5336_TS_DetectTouch(uint16_t DeviceAddr)
-{
- 8000684:	b580      	push	{r7, lr}
- 8000686:	b084      	sub	sp, #16
- 8000688:	af00      	add	r7, sp, #0
- 800068a:	4603      	mov	r3, r0
- 800068c:	80fb      	strh	r3, [r7, #6]
-  volatile uint8_t nbTouch = 0;
- 800068e:	2300      	movs	r3, #0
- 8000690:	73fb      	strb	r3, [r7, #15]
-
-  /* Read register FT5336_TD_STAT_REG to check number of touches detection */
-  nbTouch = TS_IO_Read(DeviceAddr, FT5336_TD_STAT_REG);
- 8000692:	88fb      	ldrh	r3, [r7, #6]
- 8000694:	b2db      	uxtb	r3, r3
- 8000696:	2102      	movs	r1, #2
- 8000698:	4618      	mov	r0, r3
- 800069a:	f001 fd9b 	bl	80021d4 <TS_IO_Read>
- 800069e:	4603      	mov	r3, r0
- 80006a0:	73fb      	strb	r3, [r7, #15]
-  nbTouch &= FT5336_TD_STAT_MASK;
- 80006a2:	7bfb      	ldrb	r3, [r7, #15]
- 80006a4:	b2db      	uxtb	r3, r3
- 80006a6:	f003 030f 	and.w	r3, r3, #15
- 80006aa:	b2db      	uxtb	r3, r3
- 80006ac:	73fb      	strb	r3, [r7, #15]
-
-  if(nbTouch > FT5336_MAX_DETECTABLE_TOUCH)
- 80006ae:	7bfb      	ldrb	r3, [r7, #15]
- 80006b0:	b2db      	uxtb	r3, r3
- 80006b2:	2b05      	cmp	r3, #5
- 80006b4:	d901      	bls.n	80006ba <ft5336_TS_DetectTouch+0x36>
-  {
-    /* If invalid number of touch detected, set it to zero */
-    nbTouch = 0;
- 80006b6:	2300      	movs	r3, #0
- 80006b8:	73fb      	strb	r3, [r7, #15]
-  }
-
-  /* Update ft5336 driver internal global : current number of active touches */
-  ft5336_handle.currActiveTouchNb = nbTouch;
- 80006ba:	7bfb      	ldrb	r3, [r7, #15]
- 80006bc:	b2da      	uxtb	r2, r3
- 80006be:	4b05      	ldr	r3, [pc, #20]	; (80006d4 <ft5336_TS_DetectTouch+0x50>)
- 80006c0:	705a      	strb	r2, [r3, #1]
-
-  /* Reset current active touch index on which to work on */
-  ft5336_handle.currActiveTouchIdx = 0;
- 80006c2:	4b04      	ldr	r3, [pc, #16]	; (80006d4 <ft5336_TS_DetectTouch+0x50>)
- 80006c4:	2200      	movs	r2, #0
- 80006c6:	709a      	strb	r2, [r3, #2]
-
-  return(nbTouch);
- 80006c8:	7bfb      	ldrb	r3, [r7, #15]
- 80006ca:	b2db      	uxtb	r3, r3
-}
- 80006cc:	4618      	mov	r0, r3
- 80006ce:	3710      	adds	r7, #16
- 80006d0:	46bd      	mov	sp, r7
- 80006d2:	bd80      	pop	{r7, pc}
- 80006d4:	200000cc 	.word	0x200000cc
-
-080006d8 <ft5336_TS_GetXY>:
-  * @param  X: Pointer to X position value
-  * @param  Y: Pointer to Y position value
-  * @retval None.
-  */
-void ft5336_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
-{
- 80006d8:	b580      	push	{r7, lr}
- 80006da:	b086      	sub	sp, #24
- 80006dc:	af00      	add	r7, sp, #0
- 80006de:	4603      	mov	r3, r0
- 80006e0:	60b9      	str	r1, [r7, #8]
- 80006e2:	607a      	str	r2, [r7, #4]
- 80006e4:	81fb      	strh	r3, [r7, #14]
-  volatile uint8_t ucReadData = 0;
- 80006e6:	2300      	movs	r3, #0
- 80006e8:	74fb      	strb	r3, [r7, #19]
-  static uint16_t coord;
-  uint8_t regAddressXLow = 0;
- 80006ea:	2300      	movs	r3, #0
- 80006ec:	75fb      	strb	r3, [r7, #23]
-  uint8_t regAddressXHigh = 0;
- 80006ee:	2300      	movs	r3, #0
- 80006f0:	75bb      	strb	r3, [r7, #22]
-  uint8_t regAddressYLow = 0;
- 80006f2:	2300      	movs	r3, #0
- 80006f4:	757b      	strb	r3, [r7, #21]
-  uint8_t regAddressYHigh = 0;
- 80006f6:	2300      	movs	r3, #0
- 80006f8:	753b      	strb	r3, [r7, #20]
-
-  if(ft5336_handle.currActiveTouchIdx < ft5336_handle.currActiveTouchNb)
- 80006fa:	4b6d      	ldr	r3, [pc, #436]	; (80008b0 <ft5336_TS_GetXY+0x1d8>)
- 80006fc:	789a      	ldrb	r2, [r3, #2]
- 80006fe:	4b6c      	ldr	r3, [pc, #432]	; (80008b0 <ft5336_TS_GetXY+0x1d8>)
- 8000700:	785b      	ldrb	r3, [r3, #1]
- 8000702:	429a      	cmp	r2, r3
- 8000704:	f080 80cf 	bcs.w	80008a6 <ft5336_TS_GetXY+0x1ce>
-  {
-    switch(ft5336_handle.currActiveTouchIdx)
- 8000708:	4b69      	ldr	r3, [pc, #420]	; (80008b0 <ft5336_TS_GetXY+0x1d8>)
- 800070a:	789b      	ldrb	r3, [r3, #2]
- 800070c:	2b09      	cmp	r3, #9
- 800070e:	d871      	bhi.n	80007f4 <ft5336_TS_GetXY+0x11c>
- 8000710:	a201      	add	r2, pc, #4	; (adr r2, 8000718 <ft5336_TS_GetXY+0x40>)
- 8000712:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 8000716:	bf00      	nop
- 8000718:	08000741 	.word	0x08000741
- 800071c:	08000753 	.word	0x08000753
- 8000720:	08000765 	.word	0x08000765
- 8000724:	08000777 	.word	0x08000777
- 8000728:	08000789 	.word	0x08000789
- 800072c:	0800079b 	.word	0x0800079b
- 8000730:	080007ad 	.word	0x080007ad
- 8000734:	080007bf 	.word	0x080007bf
- 8000738:	080007d1 	.word	0x080007d1
- 800073c:	080007e3 	.word	0x080007e3
-    {
-    case 0 :
-      regAddressXLow  = FT5336_P1_XL_REG;
- 8000740:	2304      	movs	r3, #4
- 8000742:	75fb      	strb	r3, [r7, #23]
-      regAddressXHigh = FT5336_P1_XH_REG;
- 8000744:	2303      	movs	r3, #3
- 8000746:	75bb      	strb	r3, [r7, #22]
-      regAddressYLow  = FT5336_P1_YL_REG;
- 8000748:	2306      	movs	r3, #6
- 800074a:	757b      	strb	r3, [r7, #21]
-      regAddressYHigh = FT5336_P1_YH_REG;
- 800074c:	2305      	movs	r3, #5
- 800074e:	753b      	strb	r3, [r7, #20]
-      break;
- 8000750:	e051      	b.n	80007f6 <ft5336_TS_GetXY+0x11e>
-
-    case 1 :
-      regAddressXLow  = FT5336_P2_XL_REG;
- 8000752:	230a      	movs	r3, #10
- 8000754:	75fb      	strb	r3, [r7, #23]
-      regAddressXHigh = FT5336_P2_XH_REG;
- 8000756:	2309      	movs	r3, #9
- 8000758:	75bb      	strb	r3, [r7, #22]
-      regAddressYLow  = FT5336_P2_YL_REG;
- 800075a:	230c      	movs	r3, #12
- 800075c:	757b      	strb	r3, [r7, #21]
-      regAddressYHigh = FT5336_P2_YH_REG;
- 800075e:	230b      	movs	r3, #11
- 8000760:	753b      	strb	r3, [r7, #20]
-      break;
- 8000762:	e048      	b.n	80007f6 <ft5336_TS_GetXY+0x11e>
-
-    case 2 :
-      regAddressXLow  = FT5336_P3_XL_REG;
- 8000764:	2310      	movs	r3, #16
- 8000766:	75fb      	strb	r3, [r7, #23]
-      regAddressXHigh = FT5336_P3_XH_REG;
- 8000768:	230f      	movs	r3, #15
- 800076a:	75bb      	strb	r3, [r7, #22]
-      regAddressYLow  = FT5336_P3_YL_REG;
- 800076c:	2312      	movs	r3, #18
- 800076e:	757b      	strb	r3, [r7, #21]
-      regAddressYHigh = FT5336_P3_YH_REG;
- 8000770:	2311      	movs	r3, #17
- 8000772:	753b      	strb	r3, [r7, #20]
-      break;
- 8000774:	e03f      	b.n	80007f6 <ft5336_TS_GetXY+0x11e>
-
-    case 3 :
-      regAddressXLow  = FT5336_P4_XL_REG;
- 8000776:	2316      	movs	r3, #22
- 8000778:	75fb      	strb	r3, [r7, #23]
-      regAddressXHigh = FT5336_P4_XH_REG;
- 800077a:	2315      	movs	r3, #21
- 800077c:	75bb      	strb	r3, [r7, #22]
-      regAddressYLow  = FT5336_P4_YL_REG;
- 800077e:	2318      	movs	r3, #24
- 8000780:	757b      	strb	r3, [r7, #21]
-      regAddressYHigh = FT5336_P4_YH_REG;
- 8000782:	2317      	movs	r3, #23
- 8000784:	753b      	strb	r3, [r7, #20]
-      break;
- 8000786:	e036      	b.n	80007f6 <ft5336_TS_GetXY+0x11e>
-
-    case 4 :
-      regAddressXLow  = FT5336_P5_XL_REG;
- 8000788:	231c      	movs	r3, #28
- 800078a:	75fb      	strb	r3, [r7, #23]
-      regAddressXHigh = FT5336_P5_XH_REG;
- 800078c:	231b      	movs	r3, #27
- 800078e:	75bb      	strb	r3, [r7, #22]
-      regAddressYLow  = FT5336_P5_YL_REG;
- 8000790:	231e      	movs	r3, #30
- 8000792:	757b      	strb	r3, [r7, #21]
-      regAddressYHigh = FT5336_P5_YH_REG;
- 8000794:	231d      	movs	r3, #29
- 8000796:	753b      	strb	r3, [r7, #20]
-      break;
- 8000798:	e02d      	b.n	80007f6 <ft5336_TS_GetXY+0x11e>
-
-    case 5 :
-      regAddressXLow  = FT5336_P6_XL_REG;
- 800079a:	2322      	movs	r3, #34	; 0x22
- 800079c:	75fb      	strb	r3, [r7, #23]
-      regAddressXHigh = FT5336_P6_XH_REG;
- 800079e:	2321      	movs	r3, #33	; 0x21
- 80007a0:	75bb      	strb	r3, [r7, #22]
-      regAddressYLow  = FT5336_P6_YL_REG;
- 80007a2:	2324      	movs	r3, #36	; 0x24
- 80007a4:	757b      	strb	r3, [r7, #21]
-      regAddressYHigh = FT5336_P6_YH_REG;
- 80007a6:	2323      	movs	r3, #35	; 0x23
- 80007a8:	753b      	strb	r3, [r7, #20]
-      break;
- 80007aa:	e024      	b.n	80007f6 <ft5336_TS_GetXY+0x11e>
-
-    case 6 :
-      regAddressXLow  = FT5336_P7_XL_REG;
- 80007ac:	2328      	movs	r3, #40	; 0x28
- 80007ae:	75fb      	strb	r3, [r7, #23]
-      regAddressXHigh = FT5336_P7_XH_REG;
- 80007b0:	2327      	movs	r3, #39	; 0x27
- 80007b2:	75bb      	strb	r3, [r7, #22]
-      regAddressYLow  = FT5336_P7_YL_REG;
- 80007b4:	232a      	movs	r3, #42	; 0x2a
- 80007b6:	757b      	strb	r3, [r7, #21]
-      regAddressYHigh = FT5336_P7_YH_REG;
- 80007b8:	2329      	movs	r3, #41	; 0x29
- 80007ba:	753b      	strb	r3, [r7, #20]
-      break;
- 80007bc:	e01b      	b.n	80007f6 <ft5336_TS_GetXY+0x11e>
-
-    case 7 :
-      regAddressXLow  = FT5336_P8_XL_REG;
- 80007be:	232e      	movs	r3, #46	; 0x2e
- 80007c0:	75fb      	strb	r3, [r7, #23]
-      regAddressXHigh = FT5336_P8_XH_REG;
- 80007c2:	232d      	movs	r3, #45	; 0x2d
- 80007c4:	75bb      	strb	r3, [r7, #22]
-      regAddressYLow  = FT5336_P8_YL_REG;
- 80007c6:	2330      	movs	r3, #48	; 0x30
- 80007c8:	757b      	strb	r3, [r7, #21]
-      regAddressYHigh = FT5336_P8_YH_REG;
- 80007ca:	232f      	movs	r3, #47	; 0x2f
- 80007cc:	753b      	strb	r3, [r7, #20]
-      break;
- 80007ce:	e012      	b.n	80007f6 <ft5336_TS_GetXY+0x11e>
-
-    case 8 :
-      regAddressXLow  = FT5336_P9_XL_REG;
- 80007d0:	2334      	movs	r3, #52	; 0x34
- 80007d2:	75fb      	strb	r3, [r7, #23]
-      regAddressXHigh = FT5336_P9_XH_REG;
- 80007d4:	2333      	movs	r3, #51	; 0x33
- 80007d6:	75bb      	strb	r3, [r7, #22]
-      regAddressYLow  = FT5336_P9_YL_REG;
- 80007d8:	2336      	movs	r3, #54	; 0x36
- 80007da:	757b      	strb	r3, [r7, #21]
-      regAddressYHigh = FT5336_P9_YH_REG;
- 80007dc:	2335      	movs	r3, #53	; 0x35
- 80007de:	753b      	strb	r3, [r7, #20]
-      break;
- 80007e0:	e009      	b.n	80007f6 <ft5336_TS_GetXY+0x11e>
-
-    case 9 :
-      regAddressXLow  = FT5336_P10_XL_REG;
- 80007e2:	233a      	movs	r3, #58	; 0x3a
- 80007e4:	75fb      	strb	r3, [r7, #23]
-      regAddressXHigh = FT5336_P10_XH_REG;
- 80007e6:	2339      	movs	r3, #57	; 0x39
- 80007e8:	75bb      	strb	r3, [r7, #22]
-      regAddressYLow  = FT5336_P10_YL_REG;
- 80007ea:	233c      	movs	r3, #60	; 0x3c
- 80007ec:	757b      	strb	r3, [r7, #21]
-      regAddressYHigh = FT5336_P10_YH_REG;
- 80007ee:	233b      	movs	r3, #59	; 0x3b
- 80007f0:	753b      	strb	r3, [r7, #20]
-      break;
- 80007f2:	e000      	b.n	80007f6 <ft5336_TS_GetXY+0x11e>
-
-    default :
-      break;
- 80007f4:	bf00      	nop
-
-    } /* end switch(ft5336_handle.currActiveTouchIdx) */
-
-    /* Read low part of X position */
-    ucReadData = TS_IO_Read(DeviceAddr, regAddressXLow);
- 80007f6:	89fb      	ldrh	r3, [r7, #14]
- 80007f8:	b2db      	uxtb	r3, r3
- 80007fa:	7dfa      	ldrb	r2, [r7, #23]
- 80007fc:	4611      	mov	r1, r2
- 80007fe:	4618      	mov	r0, r3
- 8000800:	f001 fce8 	bl	80021d4 <TS_IO_Read>
- 8000804:	4603      	mov	r3, r0
- 8000806:	74fb      	strb	r3, [r7, #19]
-    coord = (ucReadData & FT5336_TOUCH_POS_LSB_MASK) >> FT5336_TOUCH_POS_LSB_SHIFT;
- 8000808:	7cfb      	ldrb	r3, [r7, #19]
- 800080a:	b2db      	uxtb	r3, r3
- 800080c:	b29a      	uxth	r2, r3
- 800080e:	4b29      	ldr	r3, [pc, #164]	; (80008b4 <ft5336_TS_GetXY+0x1dc>)
- 8000810:	801a      	strh	r2, [r3, #0]
-
-    /* Read high part of X position */
-    ucReadData = TS_IO_Read(DeviceAddr, regAddressXHigh);
- 8000812:	89fb      	ldrh	r3, [r7, #14]
- 8000814:	b2db      	uxtb	r3, r3
- 8000816:	7dba      	ldrb	r2, [r7, #22]
- 8000818:	4611      	mov	r1, r2
- 800081a:	4618      	mov	r0, r3
- 800081c:	f001 fcda 	bl	80021d4 <TS_IO_Read>
- 8000820:	4603      	mov	r3, r0
- 8000822:	74fb      	strb	r3, [r7, #19]
-    coord |= ((ucReadData & FT5336_TOUCH_POS_MSB_MASK) >> FT5336_TOUCH_POS_MSB_SHIFT) << 8;
- 8000824:	7cfb      	ldrb	r3, [r7, #19]
- 8000826:	b2db      	uxtb	r3, r3
- 8000828:	021b      	lsls	r3, r3, #8
- 800082a:	f403 6370 	and.w	r3, r3, #3840	; 0xf00
- 800082e:	b21a      	sxth	r2, r3
- 8000830:	4b20      	ldr	r3, [pc, #128]	; (80008b4 <ft5336_TS_GetXY+0x1dc>)
- 8000832:	881b      	ldrh	r3, [r3, #0]
- 8000834:	b21b      	sxth	r3, r3
- 8000836:	4313      	orrs	r3, r2
- 8000838:	b21b      	sxth	r3, r3
- 800083a:	b29a      	uxth	r2, r3
- 800083c:	4b1d      	ldr	r3, [pc, #116]	; (80008b4 <ft5336_TS_GetXY+0x1dc>)
- 800083e:	801a      	strh	r2, [r3, #0]
-
-    /* Send back ready X position to caller */
-    *X = coord;
- 8000840:	4b1c      	ldr	r3, [pc, #112]	; (80008b4 <ft5336_TS_GetXY+0x1dc>)
- 8000842:	881a      	ldrh	r2, [r3, #0]
- 8000844:	68bb      	ldr	r3, [r7, #8]
- 8000846:	801a      	strh	r2, [r3, #0]
-
-    /* Read low part of Y position */
-    ucReadData = TS_IO_Read(DeviceAddr, regAddressYLow);
- 8000848:	89fb      	ldrh	r3, [r7, #14]
- 800084a:	b2db      	uxtb	r3, r3
- 800084c:	7d7a      	ldrb	r2, [r7, #21]
- 800084e:	4611      	mov	r1, r2
- 8000850:	4618      	mov	r0, r3
- 8000852:	f001 fcbf 	bl	80021d4 <TS_IO_Read>
- 8000856:	4603      	mov	r3, r0
- 8000858:	74fb      	strb	r3, [r7, #19]
-    coord = (ucReadData & FT5336_TOUCH_POS_LSB_MASK) >> FT5336_TOUCH_POS_LSB_SHIFT;
- 800085a:	7cfb      	ldrb	r3, [r7, #19]
- 800085c:	b2db      	uxtb	r3, r3
- 800085e:	b29a      	uxth	r2, r3
- 8000860:	4b14      	ldr	r3, [pc, #80]	; (80008b4 <ft5336_TS_GetXY+0x1dc>)
- 8000862:	801a      	strh	r2, [r3, #0]
-
-    /* Read high part of Y position */
-    ucReadData = TS_IO_Read(DeviceAddr, regAddressYHigh);
- 8000864:	89fb      	ldrh	r3, [r7, #14]
- 8000866:	b2db      	uxtb	r3, r3
- 8000868:	7d3a      	ldrb	r2, [r7, #20]
- 800086a:	4611      	mov	r1, r2
- 800086c:	4618      	mov	r0, r3
- 800086e:	f001 fcb1 	bl	80021d4 <TS_IO_Read>
- 8000872:	4603      	mov	r3, r0
- 8000874:	74fb      	strb	r3, [r7, #19]
-    coord |= ((ucReadData & FT5336_TOUCH_POS_MSB_MASK) >> FT5336_TOUCH_POS_MSB_SHIFT) << 8;
- 8000876:	7cfb      	ldrb	r3, [r7, #19]
- 8000878:	b2db      	uxtb	r3, r3
- 800087a:	021b      	lsls	r3, r3, #8
- 800087c:	f403 6370 	and.w	r3, r3, #3840	; 0xf00
- 8000880:	b21a      	sxth	r2, r3
- 8000882:	4b0c      	ldr	r3, [pc, #48]	; (80008b4 <ft5336_TS_GetXY+0x1dc>)
- 8000884:	881b      	ldrh	r3, [r3, #0]
- 8000886:	b21b      	sxth	r3, r3
- 8000888:	4313      	orrs	r3, r2
- 800088a:	b21b      	sxth	r3, r3
- 800088c:	b29a      	uxth	r2, r3
- 800088e:	4b09      	ldr	r3, [pc, #36]	; (80008b4 <ft5336_TS_GetXY+0x1dc>)
- 8000890:	801a      	strh	r2, [r3, #0]
-
-    /* Send back ready Y position to caller */
-    *Y = coord;
- 8000892:	4b08      	ldr	r3, [pc, #32]	; (80008b4 <ft5336_TS_GetXY+0x1dc>)
- 8000894:	881a      	ldrh	r2, [r3, #0]
- 8000896:	687b      	ldr	r3, [r7, #4]
- 8000898:	801a      	strh	r2, [r3, #0]
-
-    ft5336_handle.currActiveTouchIdx++; /* next call will work on next touch */
- 800089a:	4b05      	ldr	r3, [pc, #20]	; (80008b0 <ft5336_TS_GetXY+0x1d8>)
- 800089c:	789b      	ldrb	r3, [r3, #2]
- 800089e:	3301      	adds	r3, #1
- 80008a0:	b2da      	uxtb	r2, r3
- 80008a2:	4b03      	ldr	r3, [pc, #12]	; (80008b0 <ft5336_TS_GetXY+0x1d8>)
- 80008a4:	709a      	strb	r2, [r3, #2]
-
-  } /* of if(ft5336_handle.currActiveTouchIdx < ft5336_handle.currActiveTouchNb) */
-}
- 80008a6:	bf00      	nop
- 80008a8:	3718      	adds	r7, #24
- 80008aa:	46bd      	mov	sp, r7
- 80008ac:	bd80      	pop	{r7, pc}
- 80008ae:	bf00      	nop
- 80008b0:	200000cc 	.word	0x200000cc
- 80008b4:	200000d0 	.word	0x200000d0
-
-080008b8 <ft5336_TS_EnableIT>:
-  *         connected to MCU as EXTI.
-  * @param  DeviceAddr: Device address on communication Bus (Slave I2C address of FT5336).
-  * @retval None
-  */
-void ft5336_TS_EnableIT(uint16_t DeviceAddr)
-{
- 80008b8:	b580      	push	{r7, lr}
- 80008ba:	b084      	sub	sp, #16
- 80008bc:	af00      	add	r7, sp, #0
- 80008be:	4603      	mov	r3, r0
- 80008c0:	80fb      	strh	r3, [r7, #6]
-   uint8_t regValue = 0;
- 80008c2:	2300      	movs	r3, #0
- 80008c4:	73fb      	strb	r3, [r7, #15]
-   regValue = (FT5336_G_MODE_INTERRUPT_TRIGGER & (FT5336_G_MODE_INTERRUPT_MASK >> FT5336_G_MODE_INTERRUPT_SHIFT)) << FT5336_G_MODE_INTERRUPT_SHIFT;
- 80008c6:	2301      	movs	r3, #1
- 80008c8:	73fb      	strb	r3, [r7, #15]
-
-   /* Set interrupt trigger mode in FT5336_GMODE_REG */
-   TS_IO_Write(DeviceAddr, FT5336_GMODE_REG, regValue);
- 80008ca:	88fb      	ldrh	r3, [r7, #6]
- 80008cc:	b2db      	uxtb	r3, r3
- 80008ce:	7bfa      	ldrb	r2, [r7, #15]
- 80008d0:	21a4      	movs	r1, #164	; 0xa4
- 80008d2:	4618      	mov	r0, r3
- 80008d4:	f001 fc64 	bl	80021a0 <TS_IO_Write>
-}
- 80008d8:	bf00      	nop
- 80008da:	3710      	adds	r7, #16
- 80008dc:	46bd      	mov	sp, r7
- 80008de:	bd80      	pop	{r7, pc}
-
-080008e0 <ft5336_TS_DisableIT>:
-  *         connected to MCU as EXTI.
-  * @param  DeviceAddr: Device address on communication Bus (Slave I2C address of FT5336).
-  * @retval None
-  */
-void ft5336_TS_DisableIT(uint16_t DeviceAddr)
-{
- 80008e0:	b580      	push	{r7, lr}
- 80008e2:	b084      	sub	sp, #16
- 80008e4:	af00      	add	r7, sp, #0
- 80008e6:	4603      	mov	r3, r0
- 80008e8:	80fb      	strh	r3, [r7, #6]
-  uint8_t regValue = 0;
- 80008ea:	2300      	movs	r3, #0
- 80008ec:	73fb      	strb	r3, [r7, #15]
-  regValue = (FT5336_G_MODE_INTERRUPT_POLLING & (FT5336_G_MODE_INTERRUPT_MASK >> FT5336_G_MODE_INTERRUPT_SHIFT)) << FT5336_G_MODE_INTERRUPT_SHIFT;
- 80008ee:	2300      	movs	r3, #0
- 80008f0:	73fb      	strb	r3, [r7, #15]
-
-  /* Set interrupt polling mode in FT5336_GMODE_REG */
-  TS_IO_Write(DeviceAddr, FT5336_GMODE_REG, regValue);
- 80008f2:	88fb      	ldrh	r3, [r7, #6]
- 80008f4:	b2db      	uxtb	r3, r3
- 80008f6:	7bfa      	ldrb	r2, [r7, #15]
- 80008f8:	21a4      	movs	r1, #164	; 0xa4
- 80008fa:	4618      	mov	r0, r3
- 80008fc:	f001 fc50 	bl	80021a0 <TS_IO_Write>
-}
- 8000900:	bf00      	nop
- 8000902:	3710      	adds	r7, #16
- 8000904:	46bd      	mov	sp, r7
- 8000906:	bd80      	pop	{r7, pc}
-
-08000908 <ft5336_TS_ITStatus>:
-  *         @note : This feature is not applicable to FT5336.
-  * @param  DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
-  * @retval TS interrupts status : always return 0 here
-  */
-uint8_t ft5336_TS_ITStatus(uint16_t DeviceAddr)
-{
- 8000908:	b480      	push	{r7}
- 800090a:	b083      	sub	sp, #12
- 800090c:	af00      	add	r7, sp, #0
- 800090e:	4603      	mov	r3, r0
- 8000910:	80fb      	strh	r3, [r7, #6]
-  /* Always return 0 as feature not applicable to FT5336 */
-  return 0;
- 8000912:	2300      	movs	r3, #0
-}
- 8000914:	4618      	mov	r0, r3
- 8000916:	370c      	adds	r7, #12
- 8000918:	46bd      	mov	sp, r7
- 800091a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800091e:	4770      	bx	lr
-
-08000920 <ft5336_TS_ClearIT>:
-  *         @note : This feature is not applicable to FT5336.
-  * @param  DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
-  * @retval None
-  */
-void ft5336_TS_ClearIT(uint16_t DeviceAddr)
-{
- 8000920:	b480      	push	{r7}
- 8000922:	b083      	sub	sp, #12
- 8000924:	af00      	add	r7, sp, #0
- 8000926:	4603      	mov	r3, r0
- 8000928:	80fb      	strh	r3, [r7, #6]
-  /* Nothing to be done here for FT5336 */
-}
- 800092a:	bf00      	nop
- 800092c:	370c      	adds	r7, #12
- 800092e:	46bd      	mov	sp, r7
- 8000930:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000934:	4770      	bx	lr
-
-08000936 <ft5336_TS_GetGestureID>:
-  * @param  DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
-  * @param  pGestureId : Pointer to get last touch gesture Identification.
-  * @retval None.
-  */
-void ft5336_TS_GetGestureID(uint16_t DeviceAddr, uint32_t * pGestureId)
-{
- 8000936:	b580      	push	{r7, lr}
- 8000938:	b084      	sub	sp, #16
- 800093a:	af00      	add	r7, sp, #0
- 800093c:	4603      	mov	r3, r0
- 800093e:	6039      	str	r1, [r7, #0]
- 8000940:	80fb      	strh	r3, [r7, #6]
-  volatile uint8_t ucReadData = 0;
- 8000942:	2300      	movs	r3, #0
- 8000944:	73fb      	strb	r3, [r7, #15]
-
-  ucReadData = TS_IO_Read(DeviceAddr, FT5336_GEST_ID_REG);
- 8000946:	88fb      	ldrh	r3, [r7, #6]
- 8000948:	b2db      	uxtb	r3, r3
- 800094a:	2101      	movs	r1, #1
- 800094c:	4618      	mov	r0, r3
- 800094e:	f001 fc41 	bl	80021d4 <TS_IO_Read>
- 8000952:	4603      	mov	r3, r0
- 8000954:	73fb      	strb	r3, [r7, #15]
-
-  * pGestureId = ucReadData;
- 8000956:	7bfb      	ldrb	r3, [r7, #15]
- 8000958:	b2db      	uxtb	r3, r3
- 800095a:	461a      	mov	r2, r3
- 800095c:	683b      	ldr	r3, [r7, #0]
- 800095e:	601a      	str	r2, [r3, #0]
-}
- 8000960:	bf00      	nop
- 8000962:	3710      	adds	r7, #16
- 8000964:	46bd      	mov	sp, r7
- 8000966:	bd80      	pop	{r7, pc}
-
-08000968 <ft5336_TS_GetTouchInfo>:
-void ft5336_TS_GetTouchInfo(uint16_t   DeviceAddr,
-                            uint32_t   touchIdx,
-                            uint32_t * pWeight,
-                            uint32_t * pArea,
-                            uint32_t * pEvent)
-{
- 8000968:	b580      	push	{r7, lr}
- 800096a:	b086      	sub	sp, #24
- 800096c:	af00      	add	r7, sp, #0
- 800096e:	60b9      	str	r1, [r7, #8]
- 8000970:	607a      	str	r2, [r7, #4]
- 8000972:	603b      	str	r3, [r7, #0]
- 8000974:	4603      	mov	r3, r0
- 8000976:	81fb      	strh	r3, [r7, #14]
-  volatile uint8_t ucReadData = 0;
- 8000978:	2300      	movs	r3, #0
- 800097a:	753b      	strb	r3, [r7, #20]
-  uint8_t regAddressXHigh = 0;
- 800097c:	2300      	movs	r3, #0
- 800097e:	75fb      	strb	r3, [r7, #23]
-  uint8_t regAddressPWeight = 0;
- 8000980:	2300      	movs	r3, #0
- 8000982:	75bb      	strb	r3, [r7, #22]
-  uint8_t regAddressPMisc = 0;
- 8000984:	2300      	movs	r3, #0
- 8000986:	757b      	strb	r3, [r7, #21]
-
-  if(touchIdx < ft5336_handle.currActiveTouchNb)
- 8000988:	4b4d      	ldr	r3, [pc, #308]	; (8000ac0 <ft5336_TS_GetTouchInfo+0x158>)
- 800098a:	785b      	ldrb	r3, [r3, #1]
- 800098c:	461a      	mov	r2, r3
- 800098e:	68bb      	ldr	r3, [r7, #8]
- 8000990:	4293      	cmp	r3, r2
- 8000992:	f080 8090 	bcs.w	8000ab6 <ft5336_TS_GetTouchInfo+0x14e>
-  {
-    switch(touchIdx)
- 8000996:	68bb      	ldr	r3, [r7, #8]
- 8000998:	2b09      	cmp	r3, #9
- 800099a:	d85d      	bhi.n	8000a58 <ft5336_TS_GetTouchInfo+0xf0>
- 800099c:	a201      	add	r2, pc, #4	; (adr r2, 80009a4 <ft5336_TS_GetTouchInfo+0x3c>)
- 800099e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 80009a2:	bf00      	nop
- 80009a4:	080009cd 	.word	0x080009cd
- 80009a8:	080009db 	.word	0x080009db
- 80009ac:	080009e9 	.word	0x080009e9
- 80009b0:	080009f7 	.word	0x080009f7
- 80009b4:	08000a05 	.word	0x08000a05
- 80009b8:	08000a13 	.word	0x08000a13
- 80009bc:	08000a21 	.word	0x08000a21
- 80009c0:	08000a2f 	.word	0x08000a2f
- 80009c4:	08000a3d 	.word	0x08000a3d
- 80009c8:	08000a4b 	.word	0x08000a4b
-    {
-    case 0 :
-      regAddressXHigh   = FT5336_P1_XH_REG;
- 80009cc:	2303      	movs	r3, #3
- 80009ce:	75fb      	strb	r3, [r7, #23]
-      regAddressPWeight = FT5336_P1_WEIGHT_REG;
- 80009d0:	2307      	movs	r3, #7
- 80009d2:	75bb      	strb	r3, [r7, #22]
-      regAddressPMisc   = FT5336_P1_MISC_REG;
- 80009d4:	2308      	movs	r3, #8
- 80009d6:	757b      	strb	r3, [r7, #21]
-      break;
- 80009d8:	e03f      	b.n	8000a5a <ft5336_TS_GetTouchInfo+0xf2>
-
-    case 1 :
-      regAddressXHigh   = FT5336_P2_XH_REG;
- 80009da:	2309      	movs	r3, #9
- 80009dc:	75fb      	strb	r3, [r7, #23]
-      regAddressPWeight = FT5336_P2_WEIGHT_REG;
- 80009de:	230d      	movs	r3, #13
- 80009e0:	75bb      	strb	r3, [r7, #22]
-      regAddressPMisc   = FT5336_P2_MISC_REG;
- 80009e2:	230e      	movs	r3, #14
- 80009e4:	757b      	strb	r3, [r7, #21]
-      break;
- 80009e6:	e038      	b.n	8000a5a <ft5336_TS_GetTouchInfo+0xf2>
-
-    case 2 :
-      regAddressXHigh   = FT5336_P3_XH_REG;
- 80009e8:	230f      	movs	r3, #15
- 80009ea:	75fb      	strb	r3, [r7, #23]
-      regAddressPWeight = FT5336_P3_WEIGHT_REG;
- 80009ec:	2313      	movs	r3, #19
- 80009ee:	75bb      	strb	r3, [r7, #22]
-      regAddressPMisc   = FT5336_P3_MISC_REG;
- 80009f0:	2314      	movs	r3, #20
- 80009f2:	757b      	strb	r3, [r7, #21]
-      break;
- 80009f4:	e031      	b.n	8000a5a <ft5336_TS_GetTouchInfo+0xf2>
-
-    case 3 :
-      regAddressXHigh   = FT5336_P4_XH_REG;
- 80009f6:	2315      	movs	r3, #21
- 80009f8:	75fb      	strb	r3, [r7, #23]
-      regAddressPWeight = FT5336_P4_WEIGHT_REG;
- 80009fa:	2319      	movs	r3, #25
- 80009fc:	75bb      	strb	r3, [r7, #22]
-      regAddressPMisc   = FT5336_P4_MISC_REG;
- 80009fe:	231a      	movs	r3, #26
- 8000a00:	757b      	strb	r3, [r7, #21]
-      break;
- 8000a02:	e02a      	b.n	8000a5a <ft5336_TS_GetTouchInfo+0xf2>
-
-    case 4 :
-      regAddressXHigh   = FT5336_P5_XH_REG;
- 8000a04:	231b      	movs	r3, #27
- 8000a06:	75fb      	strb	r3, [r7, #23]
-      regAddressPWeight = FT5336_P5_WEIGHT_REG;
- 8000a08:	231f      	movs	r3, #31
- 8000a0a:	75bb      	strb	r3, [r7, #22]
-      regAddressPMisc   = FT5336_P5_MISC_REG;
- 8000a0c:	2320      	movs	r3, #32
- 8000a0e:	757b      	strb	r3, [r7, #21]
-      break;
- 8000a10:	e023      	b.n	8000a5a <ft5336_TS_GetTouchInfo+0xf2>
-
-    case 5 :
-      regAddressXHigh   = FT5336_P6_XH_REG;
- 8000a12:	2321      	movs	r3, #33	; 0x21
- 8000a14:	75fb      	strb	r3, [r7, #23]
-      regAddressPWeight = FT5336_P6_WEIGHT_REG;
- 8000a16:	2325      	movs	r3, #37	; 0x25
- 8000a18:	75bb      	strb	r3, [r7, #22]
-      regAddressPMisc   = FT5336_P6_MISC_REG;
- 8000a1a:	2326      	movs	r3, #38	; 0x26
- 8000a1c:	757b      	strb	r3, [r7, #21]
-      break;
- 8000a1e:	e01c      	b.n	8000a5a <ft5336_TS_GetTouchInfo+0xf2>
-
-    case 6 :
-      regAddressXHigh   = FT5336_P7_XH_REG;
- 8000a20:	2327      	movs	r3, #39	; 0x27
- 8000a22:	75fb      	strb	r3, [r7, #23]
-      regAddressPWeight = FT5336_P7_WEIGHT_REG;
- 8000a24:	232b      	movs	r3, #43	; 0x2b
- 8000a26:	75bb      	strb	r3, [r7, #22]
-      regAddressPMisc   = FT5336_P7_MISC_REG;
- 8000a28:	232c      	movs	r3, #44	; 0x2c
- 8000a2a:	757b      	strb	r3, [r7, #21]
-      break;
- 8000a2c:	e015      	b.n	8000a5a <ft5336_TS_GetTouchInfo+0xf2>
-
-    case 7 :
-      regAddressXHigh   = FT5336_P8_XH_REG;
- 8000a2e:	232d      	movs	r3, #45	; 0x2d
- 8000a30:	75fb      	strb	r3, [r7, #23]
-      regAddressPWeight = FT5336_P8_WEIGHT_REG;
- 8000a32:	2331      	movs	r3, #49	; 0x31
- 8000a34:	75bb      	strb	r3, [r7, #22]
-      regAddressPMisc   = FT5336_P8_MISC_REG;
- 8000a36:	2332      	movs	r3, #50	; 0x32
- 8000a38:	757b      	strb	r3, [r7, #21]
-      break;
- 8000a3a:	e00e      	b.n	8000a5a <ft5336_TS_GetTouchInfo+0xf2>
-
-    case 8 :
-      regAddressXHigh   = FT5336_P9_XH_REG;
- 8000a3c:	2333      	movs	r3, #51	; 0x33
- 8000a3e:	75fb      	strb	r3, [r7, #23]
-      regAddressPWeight = FT5336_P9_WEIGHT_REG;
- 8000a40:	2337      	movs	r3, #55	; 0x37
- 8000a42:	75bb      	strb	r3, [r7, #22]
-      regAddressPMisc   = FT5336_P9_MISC_REG;
- 8000a44:	2338      	movs	r3, #56	; 0x38
- 8000a46:	757b      	strb	r3, [r7, #21]
-      break;
- 8000a48:	e007      	b.n	8000a5a <ft5336_TS_GetTouchInfo+0xf2>
-
-    case 9 :
-      regAddressXHigh   = FT5336_P10_XH_REG;
- 8000a4a:	2339      	movs	r3, #57	; 0x39
- 8000a4c:	75fb      	strb	r3, [r7, #23]
-      regAddressPWeight = FT5336_P10_WEIGHT_REG;
- 8000a4e:	233d      	movs	r3, #61	; 0x3d
- 8000a50:	75bb      	strb	r3, [r7, #22]
-      regAddressPMisc   = FT5336_P10_MISC_REG;
- 8000a52:	233e      	movs	r3, #62	; 0x3e
- 8000a54:	757b      	strb	r3, [r7, #21]
-      break;
- 8000a56:	e000      	b.n	8000a5a <ft5336_TS_GetTouchInfo+0xf2>
-
-    default :
-      break;
- 8000a58:	bf00      	nop
-
-    } /* end switch(touchIdx) */
-
-    /* Read Event Id of touch index */
-    ucReadData = TS_IO_Read(DeviceAddr, regAddressXHigh);
- 8000a5a:	89fb      	ldrh	r3, [r7, #14]
- 8000a5c:	b2db      	uxtb	r3, r3
- 8000a5e:	7dfa      	ldrb	r2, [r7, #23]
- 8000a60:	4611      	mov	r1, r2
- 8000a62:	4618      	mov	r0, r3
- 8000a64:	f001 fbb6 	bl	80021d4 <TS_IO_Read>
- 8000a68:	4603      	mov	r3, r0
- 8000a6a:	753b      	strb	r3, [r7, #20]
-    * pEvent = (ucReadData & FT5336_TOUCH_EVT_FLAG_MASK) >> FT5336_TOUCH_EVT_FLAG_SHIFT;
- 8000a6c:	7d3b      	ldrb	r3, [r7, #20]
- 8000a6e:	b2db      	uxtb	r3, r3
- 8000a70:	119b      	asrs	r3, r3, #6
- 8000a72:	f003 0203 	and.w	r2, r3, #3
- 8000a76:	6a3b      	ldr	r3, [r7, #32]
- 8000a78:	601a      	str	r2, [r3, #0]
-
-    /* Read weight of touch index */
-    ucReadData = TS_IO_Read(DeviceAddr, regAddressPWeight);
- 8000a7a:	89fb      	ldrh	r3, [r7, #14]
- 8000a7c:	b2db      	uxtb	r3, r3
- 8000a7e:	7dba      	ldrb	r2, [r7, #22]
- 8000a80:	4611      	mov	r1, r2
- 8000a82:	4618      	mov	r0, r3
- 8000a84:	f001 fba6 	bl	80021d4 <TS_IO_Read>
- 8000a88:	4603      	mov	r3, r0
- 8000a8a:	753b      	strb	r3, [r7, #20]
-    * pWeight = (ucReadData & FT5336_TOUCH_WEIGHT_MASK) >> FT5336_TOUCH_WEIGHT_SHIFT;
- 8000a8c:	7d3b      	ldrb	r3, [r7, #20]
- 8000a8e:	b2db      	uxtb	r3, r3
- 8000a90:	461a      	mov	r2, r3
- 8000a92:	687b      	ldr	r3, [r7, #4]
- 8000a94:	601a      	str	r2, [r3, #0]
-
-    /* Read area of touch index */
-    ucReadData = TS_IO_Read(DeviceAddr, regAddressPMisc);
- 8000a96:	89fb      	ldrh	r3, [r7, #14]
- 8000a98:	b2db      	uxtb	r3, r3
- 8000a9a:	7d7a      	ldrb	r2, [r7, #21]
- 8000a9c:	4611      	mov	r1, r2
- 8000a9e:	4618      	mov	r0, r3
- 8000aa0:	f001 fb98 	bl	80021d4 <TS_IO_Read>
- 8000aa4:	4603      	mov	r3, r0
- 8000aa6:	753b      	strb	r3, [r7, #20]
-    * pArea = (ucReadData & FT5336_TOUCH_AREA_MASK) >> FT5336_TOUCH_AREA_SHIFT;
- 8000aa8:	7d3b      	ldrb	r3, [r7, #20]
- 8000aaa:	b2db      	uxtb	r3, r3
- 8000aac:	111b      	asrs	r3, r3, #4
- 8000aae:	f003 0204 	and.w	r2, r3, #4
- 8000ab2:	683b      	ldr	r3, [r7, #0]
- 8000ab4:	601a      	str	r2, [r3, #0]
-
-  } /* of if(touchIdx < ft5336_handle.currActiveTouchNb) */
-}
- 8000ab6:	bf00      	nop
- 8000ab8:	3718      	adds	r7, #24
- 8000aba:	46bd      	mov	sp, r7
- 8000abc:	bd80      	pop	{r7, pc}
- 8000abe:	bf00      	nop
- 8000ac0:	200000cc 	.word	0x200000cc
-
-08000ac4 <ft5336_Get_I2C_InitializedStatus>:
-  * @brief  Return the status of I2C was initialized or not.
-  * @param  None.
-  * @retval : I2C initialization status.
-  */
-static uint8_t ft5336_Get_I2C_InitializedStatus(void)
-{
- 8000ac4:	b480      	push	{r7}
- 8000ac6:	af00      	add	r7, sp, #0
-  return(ft5336_handle.i2cInitialized);
- 8000ac8:	4b03      	ldr	r3, [pc, #12]	; (8000ad8 <ft5336_Get_I2C_InitializedStatus+0x14>)
- 8000aca:	781b      	ldrb	r3, [r3, #0]
-}
- 8000acc:	4618      	mov	r0, r3
- 8000ace:	46bd      	mov	sp, r7
- 8000ad0:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000ad4:	4770      	bx	lr
- 8000ad6:	bf00      	nop
- 8000ad8:	200000cc 	.word	0x200000cc
-
-08000adc <ft5336_I2C_InitializeIfRequired>:
-  * @brief  I2C initialize if needed.
-  * @param  None.
-  * @retval : None.
-  */
-static void ft5336_I2C_InitializeIfRequired(void)
-{
- 8000adc:	b580      	push	{r7, lr}
- 8000ade:	af00      	add	r7, sp, #0
-  if(ft5336_Get_I2C_InitializedStatus() == FT5336_I2C_NOT_INITIALIZED)
- 8000ae0:	f7ff fff0 	bl	8000ac4 <ft5336_Get_I2C_InitializedStatus>
- 8000ae4:	4603      	mov	r3, r0
- 8000ae6:	2b00      	cmp	r3, #0
- 8000ae8:	d104      	bne.n	8000af4 <ft5336_I2C_InitializeIfRequired+0x18>
-  {
-    /* Initialize TS IO BUS layer (I2C) */
-    TS_IO_Init();
- 8000aea:	f001 fb4f 	bl	800218c <TS_IO_Init>
-
-    /* Set state to initialized */
-    ft5336_handle.i2cInitialized = FT5336_I2C_INITIALIZED;
- 8000aee:	4b02      	ldr	r3, [pc, #8]	; (8000af8 <ft5336_I2C_InitializeIfRequired+0x1c>)
- 8000af0:	2201      	movs	r2, #1
- 8000af2:	701a      	strb	r2, [r3, #0]
-  }
-}
- 8000af4:	bf00      	nop
- 8000af6:	bd80      	pop	{r7, pc}
- 8000af8:	200000cc 	.word	0x200000cc
-
-08000afc <ft5336_TS_Configure>:
-  * @brief  Basic static configuration of TouchScreen
-  * @param  DeviceAddr: FT5336 Device address for communication on I2C Bus.
-  * @retval Status FT5336_STATUS_OK or FT5336_STATUS_NOT_OK.
-  */
-static uint32_t ft5336_TS_Configure(uint16_t DeviceAddr)
-{
- 8000afc:	b480      	push	{r7}
- 8000afe:	b085      	sub	sp, #20
- 8000b00:	af00      	add	r7, sp, #0
- 8000b02:	4603      	mov	r3, r0
- 8000b04:	80fb      	strh	r3, [r7, #6]
-  uint32_t status = FT5336_STATUS_OK;
- 8000b06:	2300      	movs	r3, #0
- 8000b08:	60fb      	str	r3, [r7, #12]
-
-  /* Nothing special to be done for FT5336 */
-
-  return(status);
- 8000b0a:	68fb      	ldr	r3, [r7, #12]
-}
- 8000b0c:	4618      	mov	r0, r3
- 8000b0e:	3714      	adds	r7, #20
- 8000b10:	46bd      	mov	sp, r7
- 8000b12:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000b16:	4770      	bx	lr
-
-08000b18 <main>:
-/**
-  * @brief  The application entry point.
-  * @retval int
-  */
-int main(void)
-{
- 8000b18:	b5b0      	push	{r4, r5, r7, lr}
- 8000b1a:	b09e      	sub	sp, #120	; 0x78
- 8000b1c:	af02      	add	r7, sp, #8
-  /* USER CODE BEGIN 1 */
-	char text[50]={};
- 8000b1e:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8000b22:	2232      	movs	r2, #50	; 0x32
- 8000b24:	2100      	movs	r1, #0
- 8000b26:	4618      	mov	r0, r3
- 8000b28:	f00b f849 	bl	800bbbe <memset>
-	static TS_StateTypeDef  TS_State;
-	uint32_t potl,potr,joystick_h, joystick_v;
-	ADC_ChannelConfTypeDef sConfig = {0};
- 8000b2c:	f107 031c 	add.w	r3, r7, #28
- 8000b30:	2200      	movs	r2, #0
- 8000b32:	601a      	str	r2, [r3, #0]
- 8000b34:	605a      	str	r2, [r3, #4]
- 8000b36:	609a      	str	r2, [r3, #8]
- 8000b38:	60da      	str	r2, [r3, #12]
-	sConfig.Rank = ADC_REGULAR_RANK_1;
- 8000b3a:	2301      	movs	r3, #1
- 8000b3c:	623b      	str	r3, [r7, #32]
-	sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
- 8000b3e:	2300      	movs	r3, #0
- 8000b40:	627b      	str	r3, [r7, #36]	; 0x24
-  /* USER CODE END 1 */
-
-  /* MCU Configuration--------------------------------------------------------*/
-
-  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
-  HAL_Init();
- 8000b42:	f003 fcb4 	bl	80044ae <HAL_Init>
-  /* USER CODE BEGIN Init */
-
-  /* USER CODE END Init */
-
-  /* Configure the system clock */
-  SystemClock_Config();
- 8000b46:	f000 f925 	bl	8000d94 <SystemClock_Config>
-  /* USER CODE BEGIN SysInit */
-
-  /* USER CODE END SysInit */
-
-  /* Initialize all configured peripherals */
-  MX_GPIO_Init();
- 8000b4a:	f000 ffbf 	bl	8001acc <MX_GPIO_Init>
-  MX_ADC3_Init();
- 8000b4e:	f000 fa23 	bl	8000f98 <MX_ADC3_Init>
-  MX_I2C1_Init();
- 8000b52:	f000 facf 	bl	80010f4 <MX_I2C1_Init>
-  MX_I2C3_Init();
- 8000b56:	f000 fb0d 	bl	8001174 <MX_I2C3_Init>
-  MX_LTDC_Init();
- 8000b5a:	f000 fb4b 	bl	80011f4 <MX_LTDC_Init>
-  MX_RTC_Init();
- 8000b5e:	f000 fbcb 	bl	80012f8 <MX_RTC_Init>
-  MX_SPI2_Init();
- 8000b62:	f000 fc6f 	bl	8001444 <MX_SPI2_Init>
-  MX_TIM1_Init();
- 8000b66:	f000 fcab 	bl	80014c0 <MX_TIM1_Init>
-  MX_TIM2_Init();
- 8000b6a:	f000 fcfd 	bl	8001568 <MX_TIM2_Init>
-  MX_TIM3_Init();
- 8000b6e:	f000 fd49 	bl	8001604 <MX_TIM3_Init>
-  MX_TIM5_Init();
- 8000b72:	f000 fdd5 	bl	8001720 <MX_TIM5_Init>
-  MX_TIM8_Init();
- 8000b76:	f000 fe21 	bl	80017bc <MX_TIM8_Init>
-  MX_USART1_UART_Init();
- 8000b7a:	f000 fef9 	bl	8001970 <MX_USART1_UART_Init>
-  MX_USART6_UART_Init();
- 8000b7e:	f000 ff27 	bl	80019d0 <MX_USART6_UART_Init>
-  MX_ADC1_Init();
- 8000b82:	f000 f9b7 	bl	8000ef4 <MX_ADC1_Init>
-  MX_DAC_Init();
- 8000b86:	f000 fa59 	bl	800103c <MX_DAC_Init>
-  MX_UART7_Init();
- 8000b8a:	f000 fec1 	bl	8001910 <MX_UART7_Init>
-  MX_FMC_Init();
- 8000b8e:	f000 ff4f 	bl	8001a30 <MX_FMC_Init>
-  MX_DMA2D_Init();
- 8000b92:	f000 fa7d 	bl	8001090 <MX_DMA2D_Init>
-  /* USER CODE BEGIN 2 */
-  BSP_LCD_Init();
- 8000b96:	f001 fb47 	bl	8002228 <BSP_LCD_Init>
-  BSP_LCD_LayerDefaultInit(0, LCD_FB_START_ADDRESS);
- 8000b9a:	f04f 4140 	mov.w	r1, #3221225472	; 0xc0000000
- 8000b9e:	2000      	movs	r0, #0
- 8000ba0:	f001 fbda 	bl	8002358 <BSP_LCD_LayerDefaultInit>
-  BSP_LCD_LayerDefaultInit(1, LCD_FB_START_ADDRESS+ BSP_LCD_GetXSize()*BSP_LCD_GetYSize()*4);
- 8000ba4:	f001 fbb0 	bl	8002308 <BSP_LCD_GetXSize>
- 8000ba8:	4604      	mov	r4, r0
- 8000baa:	f001 fbc1 	bl	8002330 <BSP_LCD_GetYSize>
- 8000bae:	4603      	mov	r3, r0
- 8000bb0:	fb03 f304 	mul.w	r3, r3, r4
- 8000bb4:	f103 5340 	add.w	r3, r3, #805306368	; 0x30000000
- 8000bb8:	009b      	lsls	r3, r3, #2
- 8000bba:	4619      	mov	r1, r3
- 8000bbc:	2001      	movs	r0, #1
- 8000bbe:	f001 fbcb 	bl	8002358 <BSP_LCD_LayerDefaultInit>
-  BSP_LCD_DisplayOn();
- 8000bc2:	f002 f819 	bl	8002bf8 <BSP_LCD_DisplayOn>
-  BSP_LCD_SelectLayer(1);
- 8000bc6:	2001      	movs	r0, #1
- 8000bc8:	f001 fc26 	bl	8002418 <BSP_LCD_SelectLayer>
-  BSP_LCD_Clear(LCD_COLOR_LIGHTGREEN);
- 8000bcc:	f06f 107f 	mvn.w	r0, #8323199	; 0x7f007f
- 8000bd0:	f001 fc94 	bl	80024fc <BSP_LCD_Clear>
-  BSP_LCD_SetFont(&Font12);
- 8000bd4:	4863      	ldr	r0, [pc, #396]	; (8000d64 <main+0x24c>)
- 8000bd6:	f001 fc61 	bl	800249c <BSP_LCD_SetFont>
-  BSP_LCD_SetTextColor(LCD_COLOR_BLUE);
- 8000bda:	4863      	ldr	r0, [pc, #396]	; (8000d68 <main+0x250>)
- 8000bdc:	f001 fc2c 	bl	8002438 <BSP_LCD_SetTextColor>
-  BSP_LCD_SetBackColor(LCD_COLOR_LIGHTGREEN);
- 8000be0:	f06f 107f 	mvn.w	r0, #8323199	; 0x7f007f
- 8000be4:	f001 fc40 	bl	8002468 <BSP_LCD_SetBackColor>
-
-  BSP_TS_Init(BSP_LCD_GetXSize(), BSP_LCD_GetYSize());
- 8000be8:	f001 fb8e 	bl	8002308 <BSP_LCD_GetXSize>
- 8000bec:	4603      	mov	r3, r0
- 8000bee:	b29c      	uxth	r4, r3
- 8000bf0:	f001 fb9e 	bl	8002330 <BSP_LCD_GetYSize>
- 8000bf4:	4603      	mov	r3, r0
- 8000bf6:	b29b      	uxth	r3, r3
- 8000bf8:	4619      	mov	r1, r3
- 8000bfa:	4620      	mov	r0, r4
- 8000bfc:	f002 fbca 	bl	8003394 <BSP_TS_Init>
-  /* add queues, ... */
-  /* USER CODE END RTOS_QUEUES */
-
-  /* Create the thread(s) */
-  /* definition and creation of defaultTask */
-  osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 4096);
- 8000c00:	4b5a      	ldr	r3, [pc, #360]	; (8000d6c <main+0x254>)
- 8000c02:	463c      	mov	r4, r7
- 8000c04:	461d      	mov	r5, r3
- 8000c06:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
- 8000c08:	c40f      	stmia	r4!, {r0, r1, r2, r3}
- 8000c0a:	e895 0007 	ldmia.w	r5, {r0, r1, r2}
- 8000c0e:	e884 0007 	stmia.w	r4, {r0, r1, r2}
-  defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
- 8000c12:	463b      	mov	r3, r7
- 8000c14:	2100      	movs	r1, #0
- 8000c16:	4618      	mov	r0, r3
- 8000c18:	f009 fef2 	bl	800aa00 <osThreadCreate>
- 8000c1c:	4602      	mov	r2, r0
- 8000c1e:	4b54      	ldr	r3, [pc, #336]	; (8000d70 <main+0x258>)
- 8000c20:	601a      	str	r2, [r3, #0]
-  /* We should never get here as control is now taken by the scheduler */
-  /* Infinite loop */
-  /* USER CODE BEGIN WHILE */
-  while (1)
-  {
-	  HAL_GPIO_WritePin(LED13_GPIO_Port,LED13_Pin,HAL_GPIO_ReadPin(BP1_GPIO_Port,BP1_Pin));
- 8000c22:	f44f 7180 	mov.w	r1, #256	; 0x100
- 8000c26:	4853      	ldr	r0, [pc, #332]	; (8000d74 <main+0x25c>)
- 8000c28:	f005 f916 	bl	8005e58 <HAL_GPIO_ReadPin>
- 8000c2c:	4603      	mov	r3, r0
- 8000c2e:	461a      	mov	r2, r3
- 8000c30:	f44f 4180 	mov.w	r1, #16384	; 0x4000
- 8000c34:	4850      	ldr	r0, [pc, #320]	; (8000d78 <main+0x260>)
- 8000c36:	f005 f927 	bl	8005e88 <HAL_GPIO_WritePin>
-	  HAL_GPIO_WritePin(LED14_GPIO_Port,LED14_Pin,HAL_GPIO_ReadPin(BP2_GPIO_Port,BP2_Pin));
- 8000c3a:	f44f 4100 	mov.w	r1, #32768	; 0x8000
- 8000c3e:	484d      	ldr	r0, [pc, #308]	; (8000d74 <main+0x25c>)
- 8000c40:	f005 f90a 	bl	8005e58 <HAL_GPIO_ReadPin>
- 8000c44:	4603      	mov	r3, r0
- 8000c46:	461a      	mov	r2, r3
- 8000c48:	2120      	movs	r1, #32
- 8000c4a:	484c      	ldr	r0, [pc, #304]	; (8000d7c <main+0x264>)
- 8000c4c:	f005 f91c 	bl	8005e88 <HAL_GPIO_WritePin>
-	  sprintf(text,"BP1 : %d",HAL_GPIO_ReadPin(BP1_GPIO_Port,BP1_Pin));
- 8000c50:	f44f 7180 	mov.w	r1, #256	; 0x100
- 8000c54:	4847      	ldr	r0, [pc, #284]	; (8000d74 <main+0x25c>)
- 8000c56:	f005 f8ff 	bl	8005e58 <HAL_GPIO_ReadPin>
- 8000c5a:	4603      	mov	r3, r0
- 8000c5c:	461a      	mov	r2, r3
- 8000c5e:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8000c62:	4947      	ldr	r1, [pc, #284]	; (8000d80 <main+0x268>)
- 8000c64:	4618      	mov	r0, r3
- 8000c66:	f00a ffb3 	bl	800bbd0 <siprintf>
-	  BSP_LCD_DisplayStringAtLine(5,(uint8_t*) text);
- 8000c6a:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8000c6e:	4619      	mov	r1, r3
- 8000c70:	2005      	movs	r0, #5
- 8000c72:	f001 fd73 	bl	800275c <BSP_LCD_DisplayStringAtLine>
-
-	  sConfig.Channel = ADC_CHANNEL_6;
- 8000c76:	2306      	movs	r3, #6
- 8000c78:	61fb      	str	r3, [r7, #28]
-	  HAL_ADC_ConfigChannel(&hadc3, &sConfig);
- 8000c7a:	f107 031c 	add.w	r3, r7, #28
- 8000c7e:	4619      	mov	r1, r3
- 8000c80:	4840      	ldr	r0, [pc, #256]	; (8000d84 <main+0x26c>)
- 8000c82:	f003 fdf9 	bl	8004878 <HAL_ADC_ConfigChannel>
-	  HAL_ADC_Start(&hadc3);
- 8000c86:	483f      	ldr	r0, [pc, #252]	; (8000d84 <main+0x26c>)
- 8000c88:	f003 fca4 	bl	80045d4 <HAL_ADC_Start>
-	  while(HAL_ADC_PollForConversion(&hadc3, 100)!=HAL_OK);
- 8000c8c:	bf00      	nop
- 8000c8e:	2164      	movs	r1, #100	; 0x64
- 8000c90:	483c      	ldr	r0, [pc, #240]	; (8000d84 <main+0x26c>)
- 8000c92:	f003 fd5f 	bl	8004754 <HAL_ADC_PollForConversion>
- 8000c96:	4603      	mov	r3, r0
- 8000c98:	2b00      	cmp	r3, #0
- 8000c9a:	d1f8      	bne.n	8000c8e <main+0x176>
-	  potr = HAL_ADC_GetValue(&hadc3);
- 8000c9c:	4839      	ldr	r0, [pc, #228]	; (8000d84 <main+0x26c>)
- 8000c9e:	f003 fddd 	bl	800485c <HAL_ADC_GetValue>
- 8000ca2:	66f8      	str	r0, [r7, #108]	; 0x6c
-
-	  sConfig.Channel = ADC_CHANNEL_7;
- 8000ca4:	2307      	movs	r3, #7
- 8000ca6:	61fb      	str	r3, [r7, #28]
-	  HAL_ADC_ConfigChannel(&hadc3, &sConfig);
- 8000ca8:	f107 031c 	add.w	r3, r7, #28
- 8000cac:	4619      	mov	r1, r3
- 8000cae:	4835      	ldr	r0, [pc, #212]	; (8000d84 <main+0x26c>)
- 8000cb0:	f003 fde2 	bl	8004878 <HAL_ADC_ConfigChannel>
-	  HAL_ADC_Start(&hadc3);
- 8000cb4:	4833      	ldr	r0, [pc, #204]	; (8000d84 <main+0x26c>)
- 8000cb6:	f003 fc8d 	bl	80045d4 <HAL_ADC_Start>
-	  while(HAL_ADC_PollForConversion(&hadc3, 100)!=HAL_OK);
- 8000cba:	bf00      	nop
- 8000cbc:	2164      	movs	r1, #100	; 0x64
- 8000cbe:	4831      	ldr	r0, [pc, #196]	; (8000d84 <main+0x26c>)
- 8000cc0:	f003 fd48 	bl	8004754 <HAL_ADC_PollForConversion>
- 8000cc4:	4603      	mov	r3, r0
- 8000cc6:	2b00      	cmp	r3, #0
- 8000cc8:	d1f8      	bne.n	8000cbc <main+0x1a4>
-	  potl = HAL_ADC_GetValue(&hadc3);
- 8000cca:	482e      	ldr	r0, [pc, #184]	; (8000d84 <main+0x26c>)
- 8000ccc:	f003 fdc6 	bl	800485c <HAL_ADC_GetValue>
- 8000cd0:	66b8      	str	r0, [r7, #104]	; 0x68
-
-	  sConfig.Channel = ADC_CHANNEL_8;
- 8000cd2:	2308      	movs	r3, #8
- 8000cd4:	61fb      	str	r3, [r7, #28]
-	  HAL_ADC_ConfigChannel(&hadc3, &sConfig);
- 8000cd6:	f107 031c 	add.w	r3, r7, #28
- 8000cda:	4619      	mov	r1, r3
- 8000cdc:	4829      	ldr	r0, [pc, #164]	; (8000d84 <main+0x26c>)
- 8000cde:	f003 fdcb 	bl	8004878 <HAL_ADC_ConfigChannel>
-	  HAL_ADC_Start(&hadc3);
- 8000ce2:	4828      	ldr	r0, [pc, #160]	; (8000d84 <main+0x26c>)
- 8000ce4:	f003 fc76 	bl	80045d4 <HAL_ADC_Start>
-	  while(HAL_ADC_PollForConversion(&hadc3, 100)!=HAL_OK);
- 8000ce8:	bf00      	nop
- 8000cea:	2164      	movs	r1, #100	; 0x64
- 8000cec:	4825      	ldr	r0, [pc, #148]	; (8000d84 <main+0x26c>)
- 8000cee:	f003 fd31 	bl	8004754 <HAL_ADC_PollForConversion>
- 8000cf2:	4603      	mov	r3, r0
- 8000cf4:	2b00      	cmp	r3, #0
- 8000cf6:	d1f8      	bne.n	8000cea <main+0x1d2>
-	  joystick_v = HAL_ADC_GetValue(&hadc3);
- 8000cf8:	4822      	ldr	r0, [pc, #136]	; (8000d84 <main+0x26c>)
- 8000cfa:	f003 fdaf 	bl	800485c <HAL_ADC_GetValue>
- 8000cfe:	6678      	str	r0, [r7, #100]	; 0x64
-
-	  HAL_ADC_Start(&hadc1);
- 8000d00:	4821      	ldr	r0, [pc, #132]	; (8000d88 <main+0x270>)
- 8000d02:	f003 fc67 	bl	80045d4 <HAL_ADC_Start>
-	  while(HAL_ADC_PollForConversion(&hadc1, 100)!=HAL_OK);
- 8000d06:	bf00      	nop
- 8000d08:	2164      	movs	r1, #100	; 0x64
- 8000d0a:	481f      	ldr	r0, [pc, #124]	; (8000d88 <main+0x270>)
- 8000d0c:	f003 fd22 	bl	8004754 <HAL_ADC_PollForConversion>
- 8000d10:	4603      	mov	r3, r0
- 8000d12:	2b00      	cmp	r3, #0
- 8000d14:	d1f8      	bne.n	8000d08 <main+0x1f0>
-	  joystick_h = HAL_ADC_GetValue(&hadc1);
- 8000d16:	481c      	ldr	r0, [pc, #112]	; (8000d88 <main+0x270>)
- 8000d18:	f003 fda0 	bl	800485c <HAL_ADC_GetValue>
- 8000d1c:	6638      	str	r0, [r7, #96]	; 0x60
-
-	  sprintf(text,"POTL : %4u POTR : %4u joy_v : %4u joy_h : %4u",(uint)potl,(uint)potr,(uint)joystick_v,(uint)joystick_h);
- 8000d1e:	f107 002c 	add.w	r0, r7, #44	; 0x2c
- 8000d22:	6e3b      	ldr	r3, [r7, #96]	; 0x60
- 8000d24:	9301      	str	r3, [sp, #4]
- 8000d26:	6e7b      	ldr	r3, [r7, #100]	; 0x64
- 8000d28:	9300      	str	r3, [sp, #0]
- 8000d2a:	6efb      	ldr	r3, [r7, #108]	; 0x6c
- 8000d2c:	6eba      	ldr	r2, [r7, #104]	; 0x68
- 8000d2e:	4917      	ldr	r1, [pc, #92]	; (8000d8c <main+0x274>)
- 8000d30:	f00a ff4e 	bl	800bbd0 <siprintf>
-	  BSP_LCD_DisplayStringAtLine(9,(uint8_t*) text);
- 8000d34:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8000d38:	4619      	mov	r1, r3
- 8000d3a:	2009      	movs	r0, #9
- 8000d3c:	f001 fd0e 	bl	800275c <BSP_LCD_DisplayStringAtLine>
-
-	  BSP_TS_GetState(&TS_State);
- 8000d40:	4813      	ldr	r0, [pc, #76]	; (8000d90 <main+0x278>)
- 8000d42:	f002 fb67 	bl	8003414 <BSP_TS_GetState>
-	  if(TS_State.touchDetected){
- 8000d46:	4b12      	ldr	r3, [pc, #72]	; (8000d90 <main+0x278>)
- 8000d48:	781b      	ldrb	r3, [r3, #0]
- 8000d4a:	2b00      	cmp	r3, #0
- 8000d4c:	f43f af69 	beq.w	8000c22 <main+0x10a>
-		  BSP_LCD_FillCircle(TS_State.touchX[0],TS_State.touchY[0],4);
- 8000d50:	4b0f      	ldr	r3, [pc, #60]	; (8000d90 <main+0x278>)
- 8000d52:	8858      	ldrh	r0, [r3, #2]
- 8000d54:	4b0e      	ldr	r3, [pc, #56]	; (8000d90 <main+0x278>)
- 8000d56:	899b      	ldrh	r3, [r3, #12]
- 8000d58:	2204      	movs	r2, #4
- 8000d5a:	4619      	mov	r1, r3
- 8000d5c:	f001 feac 	bl	8002ab8 <BSP_LCD_FillCircle>
-	  HAL_GPIO_WritePin(LED13_GPIO_Port,LED13_Pin,HAL_GPIO_ReadPin(BP1_GPIO_Port,BP1_Pin));
- 8000d60:	e75f      	b.n	8000c22 <main+0x10a>
- 8000d62:	bf00      	nop
- 8000d64:	20000030 	.word	0x20000030
- 8000d68:	ff0000ff 	.word	0xff0000ff
- 8000d6c:	0800c428 	.word	0x0800c428
- 8000d70:	20008438 	.word	0x20008438
- 8000d74:	40020000 	.word	0x40020000
- 8000d78:	40021c00 	.word	0x40021c00
- 8000d7c:	40021000 	.word	0x40021000
- 8000d80:	0800c3e0 	.word	0x0800c3e0
- 8000d84:	20008768 	.word	0x20008768
- 8000d88:	20008720 	.word	0x20008720
- 8000d8c:	0800c3ec 	.word	0x0800c3ec
- 8000d90:	200000d4 	.word	0x200000d4
-
-08000d94 <SystemClock_Config>:
-/**
-  * @brief System Clock Configuration
-  * @retval None
-  */
-void SystemClock_Config(void)
-{
- 8000d94:	b580      	push	{r7, lr}
- 8000d96:	b0b4      	sub	sp, #208	; 0xd0
- 8000d98:	af00      	add	r7, sp, #0
-  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 8000d9a:	f107 03a0 	add.w	r3, r7, #160	; 0xa0
- 8000d9e:	2230      	movs	r2, #48	; 0x30
- 8000da0:	2100      	movs	r1, #0
- 8000da2:	4618      	mov	r0, r3
- 8000da4:	f00a ff0b 	bl	800bbbe <memset>
-  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 8000da8:	f107 038c 	add.w	r3, r7, #140	; 0x8c
- 8000dac:	2200      	movs	r2, #0
- 8000dae:	601a      	str	r2, [r3, #0]
- 8000db0:	605a      	str	r2, [r3, #4]
- 8000db2:	609a      	str	r2, [r3, #8]
- 8000db4:	60da      	str	r2, [r3, #12]
- 8000db6:	611a      	str	r2, [r3, #16]
-  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- 8000db8:	f107 0308 	add.w	r3, r7, #8
- 8000dbc:	2284      	movs	r2, #132	; 0x84
- 8000dbe:	2100      	movs	r1, #0
- 8000dc0:	4618      	mov	r0, r3
- 8000dc2:	f00a fefc 	bl	800bbbe <memset>
-
-  /** Configure LSE Drive Capability
-  */
-  HAL_PWR_EnableBkUpAccess();
- 8000dc6:	f006 f9a1 	bl	800710c <HAL_PWR_EnableBkUpAccess>
-  /** Configure the main internal regulator output voltage
-  */
-  __HAL_RCC_PWR_CLK_ENABLE();
- 8000dca:	4b47      	ldr	r3, [pc, #284]	; (8000ee8 <SystemClock_Config+0x154>)
- 8000dcc:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8000dce:	4a46      	ldr	r2, [pc, #280]	; (8000ee8 <SystemClock_Config+0x154>)
- 8000dd0:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
- 8000dd4:	6413      	str	r3, [r2, #64]	; 0x40
- 8000dd6:	4b44      	ldr	r3, [pc, #272]	; (8000ee8 <SystemClock_Config+0x154>)
- 8000dd8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8000dda:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
- 8000dde:	607b      	str	r3, [r7, #4]
- 8000de0:	687b      	ldr	r3, [r7, #4]
-  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 8000de2:	4b42      	ldr	r3, [pc, #264]	; (8000eec <SystemClock_Config+0x158>)
- 8000de4:	681b      	ldr	r3, [r3, #0]
- 8000de6:	4a41      	ldr	r2, [pc, #260]	; (8000eec <SystemClock_Config+0x158>)
- 8000de8:	f443 4340 	orr.w	r3, r3, #49152	; 0xc000
- 8000dec:	6013      	str	r3, [r2, #0]
- 8000dee:	4b3f      	ldr	r3, [pc, #252]	; (8000eec <SystemClock_Config+0x158>)
- 8000df0:	681b      	ldr	r3, [r3, #0]
- 8000df2:	f403 4340 	and.w	r3, r3, #49152	; 0xc000
- 8000df6:	603b      	str	r3, [r7, #0]
- 8000df8:	683b      	ldr	r3, [r7, #0]
-  /** Initializes the RCC Oscillators according to the specified parameters
-  * in the RCC_OscInitTypeDef structure.
-  */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
- 8000dfa:	2309      	movs	r3, #9
- 8000dfc:	f8c7 30a0 	str.w	r3, [r7, #160]	; 0xa0
-  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- 8000e00:	f44f 3380 	mov.w	r3, #65536	; 0x10000
- 8000e04:	f8c7 30a4 	str.w	r3, [r7, #164]	; 0xa4
-  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
- 8000e08:	2301      	movs	r3, #1
- 8000e0a:	f8c7 30b4 	str.w	r3, [r7, #180]	; 0xb4
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 8000e0e:	2302      	movs	r3, #2
- 8000e10:	f8c7 30b8 	str.w	r3, [r7, #184]	; 0xb8
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- 8000e14:	f44f 0380 	mov.w	r3, #4194304	; 0x400000
- 8000e18:	f8c7 30bc 	str.w	r3, [r7, #188]	; 0xbc
-  RCC_OscInitStruct.PLL.PLLM = 25;
- 8000e1c:	2319      	movs	r3, #25
- 8000e1e:	f8c7 30c0 	str.w	r3, [r7, #192]	; 0xc0
-  RCC_OscInitStruct.PLL.PLLN = 400;
- 8000e22:	f44f 73c8 	mov.w	r3, #400	; 0x190
- 8000e26:	f8c7 30c4 	str.w	r3, [r7, #196]	; 0xc4
-  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- 8000e2a:	2302      	movs	r3, #2
- 8000e2c:	f8c7 30c8 	str.w	r3, [r7, #200]	; 0xc8
-  RCC_OscInitStruct.PLL.PLLQ = 9;
- 8000e30:	2309      	movs	r3, #9
- 8000e32:	f8c7 30cc 	str.w	r3, [r7, #204]	; 0xcc
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 8000e36:	f107 03a0 	add.w	r3, r7, #160	; 0xa0
- 8000e3a:	4618      	mov	r0, r3
- 8000e3c:	f006 f9c6 	bl	80071cc <HAL_RCC_OscConfig>
- 8000e40:	4603      	mov	r3, r0
- 8000e42:	2b00      	cmp	r3, #0
- 8000e44:	d001      	beq.n	8000e4a <SystemClock_Config+0xb6>
-  {
-    Error_Handler();
- 8000e46:	f001 f847 	bl	8001ed8 <Error_Handler>
-  }
-  /** Activate the Over-Drive mode
-  */
-  if (HAL_PWREx_EnableOverDrive() != HAL_OK)
- 8000e4a:	f006 f96f 	bl	800712c <HAL_PWREx_EnableOverDrive>
- 8000e4e:	4603      	mov	r3, r0
- 8000e50:	2b00      	cmp	r3, #0
- 8000e52:	d001      	beq.n	8000e58 <SystemClock_Config+0xc4>
-  {
-    Error_Handler();
- 8000e54:	f001 f840 	bl	8001ed8 <Error_Handler>
-  }
-  /** Initializes the CPU, AHB and APB buses clocks
-  */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 8000e58:	230f      	movs	r3, #15
- 8000e5a:	f8c7 308c 	str.w	r3, [r7, #140]	; 0x8c
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- 8000e5e:	2302      	movs	r3, #2
- 8000e60:	f8c7 3090 	str.w	r3, [r7, #144]	; 0x90
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 8000e64:	2300      	movs	r3, #0
- 8000e66:	f8c7 3094 	str.w	r3, [r7, #148]	; 0x94
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
- 8000e6a:	f44f 53a0 	mov.w	r3, #5120	; 0x1400
- 8000e6e:	f8c7 3098 	str.w	r3, [r7, #152]	; 0x98
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
- 8000e72:	f44f 5380 	mov.w	r3, #4096	; 0x1000
- 8000e76:	f8c7 309c 	str.w	r3, [r7, #156]	; 0x9c
-
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK)
- 8000e7a:	f107 038c 	add.w	r3, r7, #140	; 0x8c
- 8000e7e:	2106      	movs	r1, #6
- 8000e80:	4618      	mov	r0, r3
- 8000e82:	f006 fc47 	bl	8007714 <HAL_RCC_ClockConfig>
- 8000e86:	4603      	mov	r3, r0
- 8000e88:	2b00      	cmp	r3, #0
- 8000e8a:	d001      	beq.n	8000e90 <SystemClock_Config+0xfc>
-  {
-    Error_Handler();
- 8000e8c:	f001 f824 	bl	8001ed8 <Error_Handler>
-  }
-  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_RTC
- 8000e90:	4b17      	ldr	r3, [pc, #92]	; (8000ef0 <SystemClock_Config+0x15c>)
- 8000e92:	60bb      	str	r3, [r7, #8]
-                              |RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART6
-                              |RCC_PERIPHCLK_UART7|RCC_PERIPHCLK_I2C1
-                              |RCC_PERIPHCLK_I2C3;
-  PeriphClkInitStruct.PLLSAI.PLLSAIN = 384;
- 8000e94:	f44f 73c0 	mov.w	r3, #384	; 0x180
- 8000e98:	61fb      	str	r3, [r7, #28]
-  PeriphClkInitStruct.PLLSAI.PLLSAIR = 5;
- 8000e9a:	2305      	movs	r3, #5
- 8000e9c:	627b      	str	r3, [r7, #36]	; 0x24
-  PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
- 8000e9e:	2302      	movs	r3, #2
- 8000ea0:	623b      	str	r3, [r7, #32]
-  PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV8;
- 8000ea2:	2303      	movs	r3, #3
- 8000ea4:	62bb      	str	r3, [r7, #40]	; 0x28
-  PeriphClkInitStruct.PLLSAIDivQ = 1;
- 8000ea6:	2301      	movs	r3, #1
- 8000ea8:	633b      	str	r3, [r7, #48]	; 0x30
-  PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_8;
- 8000eaa:	f44f 3300 	mov.w	r3, #131072	; 0x20000
- 8000eae:	637b      	str	r3, [r7, #52]	; 0x34
-  PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
- 8000eb0:	f44f 7300 	mov.w	r3, #512	; 0x200
- 8000eb4:	63bb      	str	r3, [r7, #56]	; 0x38
-  PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
- 8000eb6:	2300      	movs	r3, #0
- 8000eb8:	64fb      	str	r3, [r7, #76]	; 0x4c
-  PeriphClkInitStruct.Usart6ClockSelection = RCC_USART6CLKSOURCE_PCLK2;
- 8000eba:	2300      	movs	r3, #0
- 8000ebc:	663b      	str	r3, [r7, #96]	; 0x60
-  PeriphClkInitStruct.Uart7ClockSelection = RCC_UART7CLKSOURCE_PCLK1;
- 8000ebe:	2300      	movs	r3, #0
- 8000ec0:	667b      	str	r3, [r7, #100]	; 0x64
-  PeriphClkInitStruct.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
- 8000ec2:	2300      	movs	r3, #0
- 8000ec4:	66fb      	str	r3, [r7, #108]	; 0x6c
-  PeriphClkInitStruct.I2c3ClockSelection = RCC_I2C3CLKSOURCE_PCLK1;
- 8000ec6:	2300      	movs	r3, #0
- 8000ec8:	677b      	str	r3, [r7, #116]	; 0x74
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- 8000eca:	f107 0308 	add.w	r3, r7, #8
- 8000ece:	4618      	mov	r0, r3
- 8000ed0:	f006 fe24 	bl	8007b1c <HAL_RCCEx_PeriphCLKConfig>
- 8000ed4:	4603      	mov	r3, r0
- 8000ed6:	2b00      	cmp	r3, #0
- 8000ed8:	d001      	beq.n	8000ede <SystemClock_Config+0x14a>
-  {
-    Error_Handler();
- 8000eda:	f000 fffd 	bl	8001ed8 <Error_Handler>
-  }
-}
- 8000ede:	bf00      	nop
- 8000ee0:	37d0      	adds	r7, #208	; 0xd0
- 8000ee2:	46bd      	mov	sp, r7
- 8000ee4:	bd80      	pop	{r7, pc}
- 8000ee6:	bf00      	nop
- 8000ee8:	40023800 	.word	0x40023800
- 8000eec:	40007000 	.word	0x40007000
- 8000ef0:	00015868 	.word	0x00015868
-
-08000ef4 <MX_ADC1_Init>:
-  * @brief ADC1 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_ADC1_Init(void)
-{
- 8000ef4:	b580      	push	{r7, lr}
- 8000ef6:	b084      	sub	sp, #16
- 8000ef8:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN ADC1_Init 0 */
-
-  /* USER CODE END ADC1_Init 0 */
-
-  ADC_ChannelConfTypeDef sConfig = {0};
- 8000efa:	463b      	mov	r3, r7
- 8000efc:	2200      	movs	r2, #0
- 8000efe:	601a      	str	r2, [r3, #0]
- 8000f00:	605a      	str	r2, [r3, #4]
- 8000f02:	609a      	str	r2, [r3, #8]
- 8000f04:	60da      	str	r2, [r3, #12]
-  /* USER CODE BEGIN ADC1_Init 1 */
-
-  /* USER CODE END ADC1_Init 1 */
-  /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
-  */
-  hadc1.Instance = ADC1;
- 8000f06:	4b21      	ldr	r3, [pc, #132]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f08:	4a21      	ldr	r2, [pc, #132]	; (8000f90 <MX_ADC1_Init+0x9c>)
- 8000f0a:	601a      	str	r2, [r3, #0]
-  hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
- 8000f0c:	4b1f      	ldr	r3, [pc, #124]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f0e:	f44f 3280 	mov.w	r2, #65536	; 0x10000
- 8000f12:	605a      	str	r2, [r3, #4]
-  hadc1.Init.Resolution = ADC_RESOLUTION_12B;
- 8000f14:	4b1d      	ldr	r3, [pc, #116]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f16:	2200      	movs	r2, #0
- 8000f18:	609a      	str	r2, [r3, #8]
-  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
- 8000f1a:	4b1c      	ldr	r3, [pc, #112]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f1c:	2200      	movs	r2, #0
- 8000f1e:	611a      	str	r2, [r3, #16]
-  hadc1.Init.ContinuousConvMode = DISABLE;
- 8000f20:	4b1a      	ldr	r3, [pc, #104]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f22:	2200      	movs	r2, #0
- 8000f24:	619a      	str	r2, [r3, #24]
-  hadc1.Init.DiscontinuousConvMode = DISABLE;
- 8000f26:	4b19      	ldr	r3, [pc, #100]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f28:	2200      	movs	r2, #0
- 8000f2a:	f883 2020 	strb.w	r2, [r3, #32]
-  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- 8000f2e:	4b17      	ldr	r3, [pc, #92]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f30:	2200      	movs	r2, #0
- 8000f32:	62da      	str	r2, [r3, #44]	; 0x2c
-  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- 8000f34:	4b15      	ldr	r3, [pc, #84]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f36:	4a17      	ldr	r2, [pc, #92]	; (8000f94 <MX_ADC1_Init+0xa0>)
- 8000f38:	629a      	str	r2, [r3, #40]	; 0x28
-  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- 8000f3a:	4b14      	ldr	r3, [pc, #80]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f3c:	2200      	movs	r2, #0
- 8000f3e:	60da      	str	r2, [r3, #12]
-  hadc1.Init.NbrOfConversion = 1;
- 8000f40:	4b12      	ldr	r3, [pc, #72]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f42:	2201      	movs	r2, #1
- 8000f44:	61da      	str	r2, [r3, #28]
-  hadc1.Init.DMAContinuousRequests = DISABLE;
- 8000f46:	4b11      	ldr	r3, [pc, #68]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f48:	2200      	movs	r2, #0
- 8000f4a:	f883 2030 	strb.w	r2, [r3, #48]	; 0x30
-  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- 8000f4e:	4b0f      	ldr	r3, [pc, #60]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f50:	2201      	movs	r2, #1
- 8000f52:	615a      	str	r2, [r3, #20]
-  if (HAL_ADC_Init(&hadc1) != HAL_OK)
- 8000f54:	480d      	ldr	r0, [pc, #52]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f56:	f003 faf9 	bl	800454c <HAL_ADC_Init>
- 8000f5a:	4603      	mov	r3, r0
- 8000f5c:	2b00      	cmp	r3, #0
- 8000f5e:	d001      	beq.n	8000f64 <MX_ADC1_Init+0x70>
-  {
-    Error_Handler();
- 8000f60:	f000 ffba 	bl	8001ed8 <Error_Handler>
-  }
-  /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
-  */
-  sConfig.Channel = ADC_CHANNEL_0;
- 8000f64:	2300      	movs	r3, #0
- 8000f66:	603b      	str	r3, [r7, #0]
-  sConfig.Rank = ADC_REGULAR_RANK_1;
- 8000f68:	2301      	movs	r3, #1
- 8000f6a:	607b      	str	r3, [r7, #4]
-  sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
- 8000f6c:	2300      	movs	r3, #0
- 8000f6e:	60bb      	str	r3, [r7, #8]
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 8000f70:	463b      	mov	r3, r7
- 8000f72:	4619      	mov	r1, r3
- 8000f74:	4805      	ldr	r0, [pc, #20]	; (8000f8c <MX_ADC1_Init+0x98>)
- 8000f76:	f003 fc7f 	bl	8004878 <HAL_ADC_ConfigChannel>
- 8000f7a:	4603      	mov	r3, r0
- 8000f7c:	2b00      	cmp	r3, #0
- 8000f7e:	d001      	beq.n	8000f84 <MX_ADC1_Init+0x90>
-  {
-    Error_Handler();
- 8000f80:	f000 ffaa 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN ADC1_Init 2 */
-
-  /* USER CODE END ADC1_Init 2 */
-
-}
- 8000f84:	bf00      	nop
- 8000f86:	3710      	adds	r7, #16
- 8000f88:	46bd      	mov	sp, r7
- 8000f8a:	bd80      	pop	{r7, pc}
- 8000f8c:	20008720 	.word	0x20008720
- 8000f90:	40012000 	.word	0x40012000
- 8000f94:	0f000001 	.word	0x0f000001
-
-08000f98 <MX_ADC3_Init>:
-  * @brief ADC3 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_ADC3_Init(void)
-{
- 8000f98:	b580      	push	{r7, lr}
- 8000f9a:	b084      	sub	sp, #16
- 8000f9c:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN ADC3_Init 0 */
-
-  /* USER CODE END ADC3_Init 0 */
-
-  ADC_ChannelConfTypeDef sConfig = {0};
- 8000f9e:	463b      	mov	r3, r7
- 8000fa0:	2200      	movs	r2, #0
- 8000fa2:	601a      	str	r2, [r3, #0]
- 8000fa4:	605a      	str	r2, [r3, #4]
- 8000fa6:	609a      	str	r2, [r3, #8]
- 8000fa8:	60da      	str	r2, [r3, #12]
-  /* USER CODE BEGIN ADC3_Init 1 */
-
-  /* USER CODE END ADC3_Init 1 */
-  /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
-  */
-  hadc3.Instance = ADC3;
- 8000faa:	4b21      	ldr	r3, [pc, #132]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000fac:	4a21      	ldr	r2, [pc, #132]	; (8001034 <MX_ADC3_Init+0x9c>)
- 8000fae:	601a      	str	r2, [r3, #0]
-  hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
- 8000fb0:	4b1f      	ldr	r3, [pc, #124]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000fb2:	f44f 3280 	mov.w	r2, #65536	; 0x10000
- 8000fb6:	605a      	str	r2, [r3, #4]
-  hadc3.Init.Resolution = ADC_RESOLUTION_12B;
- 8000fb8:	4b1d      	ldr	r3, [pc, #116]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000fba:	2200      	movs	r2, #0
- 8000fbc:	609a      	str	r2, [r3, #8]
-  hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
- 8000fbe:	4b1c      	ldr	r3, [pc, #112]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000fc0:	2200      	movs	r2, #0
- 8000fc2:	611a      	str	r2, [r3, #16]
-  hadc3.Init.ContinuousConvMode = DISABLE;
- 8000fc4:	4b1a      	ldr	r3, [pc, #104]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000fc6:	2200      	movs	r2, #0
- 8000fc8:	619a      	str	r2, [r3, #24]
-  hadc3.Init.DiscontinuousConvMode = DISABLE;
- 8000fca:	4b19      	ldr	r3, [pc, #100]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000fcc:	2200      	movs	r2, #0
- 8000fce:	f883 2020 	strb.w	r2, [r3, #32]
-  hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- 8000fd2:	4b17      	ldr	r3, [pc, #92]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000fd4:	2200      	movs	r2, #0
- 8000fd6:	62da      	str	r2, [r3, #44]	; 0x2c
-  hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- 8000fd8:	4b15      	ldr	r3, [pc, #84]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000fda:	4a17      	ldr	r2, [pc, #92]	; (8001038 <MX_ADC3_Init+0xa0>)
- 8000fdc:	629a      	str	r2, [r3, #40]	; 0x28
-  hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- 8000fde:	4b14      	ldr	r3, [pc, #80]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000fe0:	2200      	movs	r2, #0
- 8000fe2:	60da      	str	r2, [r3, #12]
-  hadc3.Init.NbrOfConversion = 1;
- 8000fe4:	4b12      	ldr	r3, [pc, #72]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000fe6:	2201      	movs	r2, #1
- 8000fe8:	61da      	str	r2, [r3, #28]
-  hadc3.Init.DMAContinuousRequests = DISABLE;
- 8000fea:	4b11      	ldr	r3, [pc, #68]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000fec:	2200      	movs	r2, #0
- 8000fee:	f883 2030 	strb.w	r2, [r3, #48]	; 0x30
-  hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- 8000ff2:	4b0f      	ldr	r3, [pc, #60]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000ff4:	2201      	movs	r2, #1
- 8000ff6:	615a      	str	r2, [r3, #20]
-  if (HAL_ADC_Init(&hadc3) != HAL_OK)
- 8000ff8:	480d      	ldr	r0, [pc, #52]	; (8001030 <MX_ADC3_Init+0x98>)
- 8000ffa:	f003 faa7 	bl	800454c <HAL_ADC_Init>
- 8000ffe:	4603      	mov	r3, r0
- 8001000:	2b00      	cmp	r3, #0
- 8001002:	d001      	beq.n	8001008 <MX_ADC3_Init+0x70>
-  {
-    Error_Handler();
- 8001004:	f000 ff68 	bl	8001ed8 <Error_Handler>
-  }
-  /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
-  */
-  sConfig.Channel = ADC_CHANNEL_6;
- 8001008:	2306      	movs	r3, #6
- 800100a:	603b      	str	r3, [r7, #0]
-  sConfig.Rank = ADC_REGULAR_RANK_1;
- 800100c:	2301      	movs	r3, #1
- 800100e:	607b      	str	r3, [r7, #4]
-  sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
- 8001010:	2300      	movs	r3, #0
- 8001012:	60bb      	str	r3, [r7, #8]
-  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
- 8001014:	463b      	mov	r3, r7
- 8001016:	4619      	mov	r1, r3
- 8001018:	4805      	ldr	r0, [pc, #20]	; (8001030 <MX_ADC3_Init+0x98>)
- 800101a:	f003 fc2d 	bl	8004878 <HAL_ADC_ConfigChannel>
- 800101e:	4603      	mov	r3, r0
- 8001020:	2b00      	cmp	r3, #0
- 8001022:	d001      	beq.n	8001028 <MX_ADC3_Init+0x90>
-  {
-    Error_Handler();
- 8001024:	f000 ff58 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN ADC3_Init 2 */
-
-  /* USER CODE END ADC3_Init 2 */
-
-}
- 8001028:	bf00      	nop
- 800102a:	3710      	adds	r7, #16
- 800102c:	46bd      	mov	sp, r7
- 800102e:	bd80      	pop	{r7, pc}
- 8001030:	20008768 	.word	0x20008768
- 8001034:	40012200 	.word	0x40012200
- 8001038:	0f000001 	.word	0x0f000001
-
-0800103c <MX_DAC_Init>:
-  * @brief DAC Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_DAC_Init(void)
-{
- 800103c:	b580      	push	{r7, lr}
- 800103e:	b082      	sub	sp, #8
- 8001040:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN DAC_Init 0 */
-
-  /* USER CODE END DAC_Init 0 */
-
-  DAC_ChannelConfTypeDef sConfig = {0};
- 8001042:	463b      	mov	r3, r7
- 8001044:	2200      	movs	r2, #0
- 8001046:	601a      	str	r2, [r3, #0]
- 8001048:	605a      	str	r2, [r3, #4]
-  /* USER CODE BEGIN DAC_Init 1 */
-
-  /* USER CODE END DAC_Init 1 */
-  /** DAC Initialization
-  */
-  hdac.Instance = DAC;
- 800104a:	4b0f      	ldr	r3, [pc, #60]	; (8001088 <MX_DAC_Init+0x4c>)
- 800104c:	4a0f      	ldr	r2, [pc, #60]	; (800108c <MX_DAC_Init+0x50>)
- 800104e:	601a      	str	r2, [r3, #0]
-  if (HAL_DAC_Init(&hdac) != HAL_OK)
- 8001050:	480d      	ldr	r0, [pc, #52]	; (8001088 <MX_DAC_Init+0x4c>)
- 8001052:	f003 ff37 	bl	8004ec4 <HAL_DAC_Init>
- 8001056:	4603      	mov	r3, r0
- 8001058:	2b00      	cmp	r3, #0
- 800105a:	d001      	beq.n	8001060 <MX_DAC_Init+0x24>
-  {
-    Error_Handler();
- 800105c:	f000 ff3c 	bl	8001ed8 <Error_Handler>
-  }
-  /** DAC channel OUT1 config
-  */
-  sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
- 8001060:	2300      	movs	r3, #0
- 8001062:	603b      	str	r3, [r7, #0]
-  sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
- 8001064:	2300      	movs	r3, #0
- 8001066:	607b      	str	r3, [r7, #4]
-  if (HAL_DAC_ConfigChannel(&hdac, &sConfig, DAC_CHANNEL_1) != HAL_OK)
- 8001068:	463b      	mov	r3, r7
- 800106a:	2200      	movs	r2, #0
- 800106c:	4619      	mov	r1, r3
- 800106e:	4806      	ldr	r0, [pc, #24]	; (8001088 <MX_DAC_Init+0x4c>)
- 8001070:	f003 ff9e 	bl	8004fb0 <HAL_DAC_ConfigChannel>
- 8001074:	4603      	mov	r3, r0
- 8001076:	2b00      	cmp	r3, #0
- 8001078:	d001      	beq.n	800107e <MX_DAC_Init+0x42>
-  {
-    Error_Handler();
- 800107a:	f000 ff2d 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN DAC_Init 2 */
-
-  /* USER CODE END DAC_Init 2 */
-
-}
- 800107e:	bf00      	nop
- 8001080:	3708      	adds	r7, #8
- 8001082:	46bd      	mov	sp, r7
- 8001084:	bd80      	pop	{r7, pc}
- 8001086:	bf00      	nop
- 8001088:	20008830 	.word	0x20008830
- 800108c:	40007400 	.word	0x40007400
-
-08001090 <MX_DMA2D_Init>:
-  * @brief DMA2D Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_DMA2D_Init(void)
-{
- 8001090:	b580      	push	{r7, lr}
- 8001092:	af00      	add	r7, sp, #0
-  /* USER CODE END DMA2D_Init 0 */
-
-  /* USER CODE BEGIN DMA2D_Init 1 */
-
-  /* USER CODE END DMA2D_Init 1 */
-  hdma2d.Instance = DMA2D;
- 8001094:	4b15      	ldr	r3, [pc, #84]	; (80010ec <MX_DMA2D_Init+0x5c>)
- 8001096:	4a16      	ldr	r2, [pc, #88]	; (80010f0 <MX_DMA2D_Init+0x60>)
- 8001098:	601a      	str	r2, [r3, #0]
-  hdma2d.Init.Mode = DMA2D_M2M;
- 800109a:	4b14      	ldr	r3, [pc, #80]	; (80010ec <MX_DMA2D_Init+0x5c>)
- 800109c:	2200      	movs	r2, #0
- 800109e:	605a      	str	r2, [r3, #4]
-  hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
- 80010a0:	4b12      	ldr	r3, [pc, #72]	; (80010ec <MX_DMA2D_Init+0x5c>)
- 80010a2:	2200      	movs	r2, #0
- 80010a4:	609a      	str	r2, [r3, #8]
-  hdma2d.Init.OutputOffset = 0;
- 80010a6:	4b11      	ldr	r3, [pc, #68]	; (80010ec <MX_DMA2D_Init+0x5c>)
- 80010a8:	2200      	movs	r2, #0
- 80010aa:	60da      	str	r2, [r3, #12]
-  hdma2d.LayerCfg[1].InputOffset = 0;
- 80010ac:	4b0f      	ldr	r3, [pc, #60]	; (80010ec <MX_DMA2D_Init+0x5c>)
- 80010ae:	2200      	movs	r2, #0
- 80010b0:	629a      	str	r2, [r3, #40]	; 0x28
-  hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
- 80010b2:	4b0e      	ldr	r3, [pc, #56]	; (80010ec <MX_DMA2D_Init+0x5c>)
- 80010b4:	2200      	movs	r2, #0
- 80010b6:	62da      	str	r2, [r3, #44]	; 0x2c
-  hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
- 80010b8:	4b0c      	ldr	r3, [pc, #48]	; (80010ec <MX_DMA2D_Init+0x5c>)
- 80010ba:	2200      	movs	r2, #0
- 80010bc:	631a      	str	r2, [r3, #48]	; 0x30
-  hdma2d.LayerCfg[1].InputAlpha = 0;
- 80010be:	4b0b      	ldr	r3, [pc, #44]	; (80010ec <MX_DMA2D_Init+0x5c>)
- 80010c0:	2200      	movs	r2, #0
- 80010c2:	635a      	str	r2, [r3, #52]	; 0x34
-  if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
- 80010c4:	4809      	ldr	r0, [pc, #36]	; (80010ec <MX_DMA2D_Init+0x5c>)
- 80010c6:	f004 f987 	bl	80053d8 <HAL_DMA2D_Init>
- 80010ca:	4603      	mov	r3, r0
- 80010cc:	2b00      	cmp	r3, #0
- 80010ce:	d001      	beq.n	80010d4 <MX_DMA2D_Init+0x44>
-  {
-    Error_Handler();
- 80010d0:	f000 ff02 	bl	8001ed8 <Error_Handler>
-  }
-  if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
- 80010d4:	2101      	movs	r1, #1
- 80010d6:	4805      	ldr	r0, [pc, #20]	; (80010ec <MX_DMA2D_Init+0x5c>)
- 80010d8:	f004 fadc 	bl	8005694 <HAL_DMA2D_ConfigLayer>
- 80010dc:	4603      	mov	r3, r0
- 80010de:	2b00      	cmp	r3, #0
- 80010e0:	d001      	beq.n	80010e6 <MX_DMA2D_Init+0x56>
-  {
-    Error_Handler();
- 80010e2:	f000 fef9 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN DMA2D_Init 2 */
-
-  /* USER CODE END DMA2D_Init 2 */
-
-}
- 80010e6:	bf00      	nop
- 80010e8:	bd80      	pop	{r7, pc}
- 80010ea:	bf00      	nop
- 80010ec:	20008924 	.word	0x20008924
- 80010f0:	4002b000 	.word	0x4002b000
-
-080010f4 <MX_I2C1_Init>:
-  * @brief I2C1 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_I2C1_Init(void)
-{
- 80010f4:	b580      	push	{r7, lr}
- 80010f6:	af00      	add	r7, sp, #0
-  /* USER CODE END I2C1_Init 0 */
-
-  /* USER CODE BEGIN I2C1_Init 1 */
-
-  /* USER CODE END I2C1_Init 1 */
-  hi2c1.Instance = I2C1;
- 80010f8:	4b1b      	ldr	r3, [pc, #108]	; (8001168 <MX_I2C1_Init+0x74>)
- 80010fa:	4a1c      	ldr	r2, [pc, #112]	; (800116c <MX_I2C1_Init+0x78>)
- 80010fc:	601a      	str	r2, [r3, #0]
-  hi2c1.Init.Timing = 0x00C0EAFF;
- 80010fe:	4b1a      	ldr	r3, [pc, #104]	; (8001168 <MX_I2C1_Init+0x74>)
- 8001100:	4a1b      	ldr	r2, [pc, #108]	; (8001170 <MX_I2C1_Init+0x7c>)
- 8001102:	605a      	str	r2, [r3, #4]
-  hi2c1.Init.OwnAddress1 = 0;
- 8001104:	4b18      	ldr	r3, [pc, #96]	; (8001168 <MX_I2C1_Init+0x74>)
- 8001106:	2200      	movs	r2, #0
- 8001108:	609a      	str	r2, [r3, #8]
-  hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
- 800110a:	4b17      	ldr	r3, [pc, #92]	; (8001168 <MX_I2C1_Init+0x74>)
- 800110c:	2201      	movs	r2, #1
- 800110e:	60da      	str	r2, [r3, #12]
-  hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
- 8001110:	4b15      	ldr	r3, [pc, #84]	; (8001168 <MX_I2C1_Init+0x74>)
- 8001112:	2200      	movs	r2, #0
- 8001114:	611a      	str	r2, [r3, #16]
-  hi2c1.Init.OwnAddress2 = 0;
- 8001116:	4b14      	ldr	r3, [pc, #80]	; (8001168 <MX_I2C1_Init+0x74>)
- 8001118:	2200      	movs	r2, #0
- 800111a:	615a      	str	r2, [r3, #20]
-  hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
- 800111c:	4b12      	ldr	r3, [pc, #72]	; (8001168 <MX_I2C1_Init+0x74>)
- 800111e:	2200      	movs	r2, #0
- 8001120:	619a      	str	r2, [r3, #24]
-  hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
- 8001122:	4b11      	ldr	r3, [pc, #68]	; (8001168 <MX_I2C1_Init+0x74>)
- 8001124:	2200      	movs	r2, #0
- 8001126:	61da      	str	r2, [r3, #28]
-  hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
- 8001128:	4b0f      	ldr	r3, [pc, #60]	; (8001168 <MX_I2C1_Init+0x74>)
- 800112a:	2200      	movs	r2, #0
- 800112c:	621a      	str	r2, [r3, #32]
-  if (HAL_I2C_Init(&hi2c1) != HAL_OK)
- 800112e:	480e      	ldr	r0, [pc, #56]	; (8001168 <MX_I2C1_Init+0x74>)
- 8001130:	f004 fec4 	bl	8005ebc <HAL_I2C_Init>
- 8001134:	4603      	mov	r3, r0
- 8001136:	2b00      	cmp	r3, #0
- 8001138:	d001      	beq.n	800113e <MX_I2C1_Init+0x4a>
-  {
-    Error_Handler();
- 800113a:	f000 fecd 	bl	8001ed8 <Error_Handler>
-  }
-  /** Configure Analogue filter
-  */
-  if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
- 800113e:	2100      	movs	r1, #0
- 8001140:	4809      	ldr	r0, [pc, #36]	; (8001168 <MX_I2C1_Init+0x74>)
- 8001142:	f005 fbd3 	bl	80068ec <HAL_I2CEx_ConfigAnalogFilter>
- 8001146:	4603      	mov	r3, r0
- 8001148:	2b00      	cmp	r3, #0
- 800114a:	d001      	beq.n	8001150 <MX_I2C1_Init+0x5c>
-  {
-    Error_Handler();
- 800114c:	f000 fec4 	bl	8001ed8 <Error_Handler>
-  }
-  /** Configure Digital filter
-  */
-  if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
- 8001150:	2100      	movs	r1, #0
- 8001152:	4805      	ldr	r0, [pc, #20]	; (8001168 <MX_I2C1_Init+0x74>)
- 8001154:	f005 fc15 	bl	8006982 <HAL_I2CEx_ConfigDigitalFilter>
- 8001158:	4603      	mov	r3, r0
- 800115a:	2b00      	cmp	r3, #0
- 800115c:	d001      	beq.n	8001162 <MX_I2C1_Init+0x6e>
-  {
-    Error_Handler();
- 800115e:	f000 febb 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN I2C1_Init 2 */
-
-  /* USER CODE END I2C1_Init 2 */
-
-}
- 8001162:	bf00      	nop
- 8001164:	bd80      	pop	{r7, pc}
- 8001166:	bf00      	nop
- 8001168:	200085ac 	.word	0x200085ac
- 800116c:	40005400 	.word	0x40005400
- 8001170:	00c0eaff 	.word	0x00c0eaff
-
-08001174 <MX_I2C3_Init>:
-  * @brief I2C3 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_I2C3_Init(void)
-{
- 8001174:	b580      	push	{r7, lr}
- 8001176:	af00      	add	r7, sp, #0
-  /* USER CODE END I2C3_Init 0 */
-
-  /* USER CODE BEGIN I2C3_Init 1 */
-
-  /* USER CODE END I2C3_Init 1 */
-  hi2c3.Instance = I2C3;
- 8001178:	4b1b      	ldr	r3, [pc, #108]	; (80011e8 <MX_I2C3_Init+0x74>)
- 800117a:	4a1c      	ldr	r2, [pc, #112]	; (80011ec <MX_I2C3_Init+0x78>)
- 800117c:	601a      	str	r2, [r3, #0]
-  hi2c3.Init.Timing = 0x00C0EAFF;
- 800117e:	4b1a      	ldr	r3, [pc, #104]	; (80011e8 <MX_I2C3_Init+0x74>)
- 8001180:	4a1b      	ldr	r2, [pc, #108]	; (80011f0 <MX_I2C3_Init+0x7c>)
- 8001182:	605a      	str	r2, [r3, #4]
-  hi2c3.Init.OwnAddress1 = 0;
- 8001184:	4b18      	ldr	r3, [pc, #96]	; (80011e8 <MX_I2C3_Init+0x74>)
- 8001186:	2200      	movs	r2, #0
- 8001188:	609a      	str	r2, [r3, #8]
-  hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
- 800118a:	4b17      	ldr	r3, [pc, #92]	; (80011e8 <MX_I2C3_Init+0x74>)
- 800118c:	2201      	movs	r2, #1
- 800118e:	60da      	str	r2, [r3, #12]
-  hi2c3.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
- 8001190:	4b15      	ldr	r3, [pc, #84]	; (80011e8 <MX_I2C3_Init+0x74>)
- 8001192:	2200      	movs	r2, #0
- 8001194:	611a      	str	r2, [r3, #16]
-  hi2c3.Init.OwnAddress2 = 0;
- 8001196:	4b14      	ldr	r3, [pc, #80]	; (80011e8 <MX_I2C3_Init+0x74>)
- 8001198:	2200      	movs	r2, #0
- 800119a:	615a      	str	r2, [r3, #20]
-  hi2c3.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
- 800119c:	4b12      	ldr	r3, [pc, #72]	; (80011e8 <MX_I2C3_Init+0x74>)
- 800119e:	2200      	movs	r2, #0
- 80011a0:	619a      	str	r2, [r3, #24]
-  hi2c3.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
- 80011a2:	4b11      	ldr	r3, [pc, #68]	; (80011e8 <MX_I2C3_Init+0x74>)
- 80011a4:	2200      	movs	r2, #0
- 80011a6:	61da      	str	r2, [r3, #28]
-  hi2c3.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
- 80011a8:	4b0f      	ldr	r3, [pc, #60]	; (80011e8 <MX_I2C3_Init+0x74>)
- 80011aa:	2200      	movs	r2, #0
- 80011ac:	621a      	str	r2, [r3, #32]
-  if (HAL_I2C_Init(&hi2c3) != HAL_OK)
- 80011ae:	480e      	ldr	r0, [pc, #56]	; (80011e8 <MX_I2C3_Init+0x74>)
- 80011b0:	f004 fe84 	bl	8005ebc <HAL_I2C_Init>
- 80011b4:	4603      	mov	r3, r0
- 80011b6:	2b00      	cmp	r3, #0
- 80011b8:	d001      	beq.n	80011be <MX_I2C3_Init+0x4a>
-  {
-    Error_Handler();
- 80011ba:	f000 fe8d 	bl	8001ed8 <Error_Handler>
-  }
-  /** Configure Analogue filter
-  */
-  if (HAL_I2CEx_ConfigAnalogFilter(&hi2c3, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
- 80011be:	2100      	movs	r1, #0
- 80011c0:	4809      	ldr	r0, [pc, #36]	; (80011e8 <MX_I2C3_Init+0x74>)
- 80011c2:	f005 fb93 	bl	80068ec <HAL_I2CEx_ConfigAnalogFilter>
- 80011c6:	4603      	mov	r3, r0
- 80011c8:	2b00      	cmp	r3, #0
- 80011ca:	d001      	beq.n	80011d0 <MX_I2C3_Init+0x5c>
-  {
-    Error_Handler();
- 80011cc:	f000 fe84 	bl	8001ed8 <Error_Handler>
-  }
-  /** Configure Digital filter
-  */
-  if (HAL_I2CEx_ConfigDigitalFilter(&hi2c3, 0) != HAL_OK)
- 80011d0:	2100      	movs	r1, #0
- 80011d2:	4805      	ldr	r0, [pc, #20]	; (80011e8 <MX_I2C3_Init+0x74>)
- 80011d4:	f005 fbd5 	bl	8006982 <HAL_I2CEx_ConfigDigitalFilter>
- 80011d8:	4603      	mov	r3, r0
- 80011da:	2b00      	cmp	r3, #0
- 80011dc:	d001      	beq.n	80011e2 <MX_I2C3_Init+0x6e>
-  {
-    Error_Handler();
- 80011de:	f000 fe7b 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN I2C3_Init 2 */
-
-  /* USER CODE END I2C3_Init 2 */
-
-}
- 80011e2:	bf00      	nop
- 80011e4:	bd80      	pop	{r7, pc}
- 80011e6:	bf00      	nop
- 80011e8:	2000843c 	.word	0x2000843c
- 80011ec:	40005c00 	.word	0x40005c00
- 80011f0:	00c0eaff 	.word	0x00c0eaff
-
-080011f4 <MX_LTDC_Init>:
-  * @brief LTDC Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_LTDC_Init(void)
-{
- 80011f4:	b580      	push	{r7, lr}
- 80011f6:	b08e      	sub	sp, #56	; 0x38
- 80011f8:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN LTDC_Init 0 */
-
-  /* USER CODE END LTDC_Init 0 */
-
-  LTDC_LayerCfgTypeDef pLayerCfg = {0};
- 80011fa:	1d3b      	adds	r3, r7, #4
- 80011fc:	2234      	movs	r2, #52	; 0x34
- 80011fe:	2100      	movs	r1, #0
- 8001200:	4618      	mov	r0, r3
- 8001202:	f00a fcdc 	bl	800bbbe <memset>
-
-  /* USER CODE BEGIN LTDC_Init 1 */
-
-  /* USER CODE END LTDC_Init 1 */
-  hltdc.Instance = LTDC;
- 8001206:	4b3a      	ldr	r3, [pc, #232]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 8001208:	4a3a      	ldr	r2, [pc, #232]	; (80012f4 <MX_LTDC_Init+0x100>)
- 800120a:	601a      	str	r2, [r3, #0]
-  hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
- 800120c:	4b38      	ldr	r3, [pc, #224]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 800120e:	2200      	movs	r2, #0
- 8001210:	605a      	str	r2, [r3, #4]
-  hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
- 8001212:	4b37      	ldr	r3, [pc, #220]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 8001214:	2200      	movs	r2, #0
- 8001216:	609a      	str	r2, [r3, #8]
-  hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
- 8001218:	4b35      	ldr	r3, [pc, #212]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 800121a:	2200      	movs	r2, #0
- 800121c:	60da      	str	r2, [r3, #12]
-  hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
- 800121e:	4b34      	ldr	r3, [pc, #208]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 8001220:	2200      	movs	r2, #0
- 8001222:	611a      	str	r2, [r3, #16]
-  hltdc.Init.HorizontalSync = 40;
- 8001224:	4b32      	ldr	r3, [pc, #200]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 8001226:	2228      	movs	r2, #40	; 0x28
- 8001228:	615a      	str	r2, [r3, #20]
-  hltdc.Init.VerticalSync = 9;
- 800122a:	4b31      	ldr	r3, [pc, #196]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 800122c:	2209      	movs	r2, #9
- 800122e:	619a      	str	r2, [r3, #24]
-  hltdc.Init.AccumulatedHBP = 53;
- 8001230:	4b2f      	ldr	r3, [pc, #188]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 8001232:	2235      	movs	r2, #53	; 0x35
- 8001234:	61da      	str	r2, [r3, #28]
-  hltdc.Init.AccumulatedVBP = 11;
- 8001236:	4b2e      	ldr	r3, [pc, #184]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 8001238:	220b      	movs	r2, #11
- 800123a:	621a      	str	r2, [r3, #32]
-  hltdc.Init.AccumulatedActiveW = 533;
- 800123c:	4b2c      	ldr	r3, [pc, #176]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 800123e:	f240 2215 	movw	r2, #533	; 0x215
- 8001242:	625a      	str	r2, [r3, #36]	; 0x24
-  hltdc.Init.AccumulatedActiveH = 283;
- 8001244:	4b2a      	ldr	r3, [pc, #168]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 8001246:	f240 121b 	movw	r2, #283	; 0x11b
- 800124a:	629a      	str	r2, [r3, #40]	; 0x28
-  hltdc.Init.TotalWidth = 565;
- 800124c:	4b28      	ldr	r3, [pc, #160]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 800124e:	f240 2235 	movw	r2, #565	; 0x235
- 8001252:	62da      	str	r2, [r3, #44]	; 0x2c
-  hltdc.Init.TotalHeigh = 285;
- 8001254:	4b26      	ldr	r3, [pc, #152]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 8001256:	f240 121d 	movw	r2, #285	; 0x11d
- 800125a:	631a      	str	r2, [r3, #48]	; 0x30
-  hltdc.Init.Backcolor.Blue = 0;
- 800125c:	4b24      	ldr	r3, [pc, #144]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 800125e:	2200      	movs	r2, #0
- 8001260:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
-  hltdc.Init.Backcolor.Green = 0;
- 8001264:	4b22      	ldr	r3, [pc, #136]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 8001266:	2200      	movs	r2, #0
- 8001268:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
-  hltdc.Init.Backcolor.Red = 0;
- 800126c:	4b20      	ldr	r3, [pc, #128]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 800126e:	2200      	movs	r2, #0
- 8001270:	f883 2036 	strb.w	r2, [r3, #54]	; 0x36
-  if (HAL_LTDC_Init(&hltdc) != HAL_OK)
- 8001274:	481e      	ldr	r0, [pc, #120]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 8001276:	f005 fbd1 	bl	8006a1c <HAL_LTDC_Init>
- 800127a:	4603      	mov	r3, r0
- 800127c:	2b00      	cmp	r3, #0
- 800127e:	d001      	beq.n	8001284 <MX_LTDC_Init+0x90>
-  {
-    Error_Handler();
- 8001280:	f000 fe2a 	bl	8001ed8 <Error_Handler>
-  }
-  pLayerCfg.WindowX0 = 0;
- 8001284:	2300      	movs	r3, #0
- 8001286:	607b      	str	r3, [r7, #4]
-  pLayerCfg.WindowX1 = 480;
- 8001288:	f44f 73f0 	mov.w	r3, #480	; 0x1e0
- 800128c:	60bb      	str	r3, [r7, #8]
-  pLayerCfg.WindowY0 = 0;
- 800128e:	2300      	movs	r3, #0
- 8001290:	60fb      	str	r3, [r7, #12]
-  pLayerCfg.WindowY1 = 272;
- 8001292:	f44f 7388 	mov.w	r3, #272	; 0x110
- 8001296:	613b      	str	r3, [r7, #16]
-  pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565;
- 8001298:	2302      	movs	r3, #2
- 800129a:	617b      	str	r3, [r7, #20]
-  pLayerCfg.Alpha = 255;
- 800129c:	23ff      	movs	r3, #255	; 0xff
- 800129e:	61bb      	str	r3, [r7, #24]
-  pLayerCfg.Alpha0 = 0;
- 80012a0:	2300      	movs	r3, #0
- 80012a2:	61fb      	str	r3, [r7, #28]
-  pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
- 80012a4:	f44f 63c0 	mov.w	r3, #1536	; 0x600
- 80012a8:	623b      	str	r3, [r7, #32]
-  pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
- 80012aa:	2307      	movs	r3, #7
- 80012ac:	627b      	str	r3, [r7, #36]	; 0x24
-  pLayerCfg.FBStartAdress = 0xC0000000;
- 80012ae:	f04f 4340 	mov.w	r3, #3221225472	; 0xc0000000
- 80012b2:	62bb      	str	r3, [r7, #40]	; 0x28
-  pLayerCfg.ImageWidth = 480;
- 80012b4:	f44f 73f0 	mov.w	r3, #480	; 0x1e0
- 80012b8:	62fb      	str	r3, [r7, #44]	; 0x2c
-  pLayerCfg.ImageHeight = 272;
- 80012ba:	f44f 7388 	mov.w	r3, #272	; 0x110
- 80012be:	633b      	str	r3, [r7, #48]	; 0x30
-  pLayerCfg.Backcolor.Blue = 0;
- 80012c0:	2300      	movs	r3, #0
- 80012c2:	f887 3034 	strb.w	r3, [r7, #52]	; 0x34
-  pLayerCfg.Backcolor.Green = 0;
- 80012c6:	2300      	movs	r3, #0
- 80012c8:	f887 3035 	strb.w	r3, [r7, #53]	; 0x35
-  pLayerCfg.Backcolor.Red = 0;
- 80012cc:	2300      	movs	r3, #0
- 80012ce:	f887 3036 	strb.w	r3, [r7, #54]	; 0x36
-  if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
- 80012d2:	1d3b      	adds	r3, r7, #4
- 80012d4:	2200      	movs	r2, #0
- 80012d6:	4619      	mov	r1, r3
- 80012d8:	4805      	ldr	r0, [pc, #20]	; (80012f0 <MX_LTDC_Init+0xfc>)
- 80012da:	f005 fd31 	bl	8006d40 <HAL_LTDC_ConfigLayer>
- 80012de:	4603      	mov	r3, r0
- 80012e0:	2b00      	cmp	r3, #0
- 80012e2:	d001      	beq.n	80012e8 <MX_LTDC_Init+0xf4>
-  {
-    Error_Handler();
- 80012e4:	f000 fdf8 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN LTDC_Init 2 */
-
-  /* USER CODE END LTDC_Init 2 */
-
-}
- 80012e8:	bf00      	nop
- 80012ea:	3738      	adds	r7, #56	; 0x38
- 80012ec:	46bd      	mov	sp, r7
- 80012ee:	bd80      	pop	{r7, pc}
- 80012f0:	20008678 	.word	0x20008678
- 80012f4:	40016800 	.word	0x40016800
-
-080012f8 <MX_RTC_Init>:
-  * @brief RTC Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_RTC_Init(void)
-{
- 80012f8:	b580      	push	{r7, lr}
- 80012fa:	b092      	sub	sp, #72	; 0x48
- 80012fc:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN RTC_Init 0 */
-
-  /* USER CODE END RTC_Init 0 */
-
-  RTC_TimeTypeDef sTime = {0};
- 80012fe:	f107 0330 	add.w	r3, r7, #48	; 0x30
- 8001302:	2200      	movs	r2, #0
- 8001304:	601a      	str	r2, [r3, #0]
- 8001306:	605a      	str	r2, [r3, #4]
- 8001308:	609a      	str	r2, [r3, #8]
- 800130a:	60da      	str	r2, [r3, #12]
- 800130c:	611a      	str	r2, [r3, #16]
- 800130e:	615a      	str	r2, [r3, #20]
-  RTC_DateTypeDef sDate = {0};
- 8001310:	2300      	movs	r3, #0
- 8001312:	62fb      	str	r3, [r7, #44]	; 0x2c
-  RTC_AlarmTypeDef sAlarm = {0};
- 8001314:	463b      	mov	r3, r7
- 8001316:	222c      	movs	r2, #44	; 0x2c
- 8001318:	2100      	movs	r1, #0
- 800131a:	4618      	mov	r0, r3
- 800131c:	f00a fc4f 	bl	800bbbe <memset>
-  /* USER CODE BEGIN RTC_Init 1 */
-
-  /* USER CODE END RTC_Init 1 */
-  /** Initialize RTC Only
-  */
-  hrtc.Instance = RTC;
- 8001320:	4b46      	ldr	r3, [pc, #280]	; (800143c <MX_RTC_Init+0x144>)
- 8001322:	4a47      	ldr	r2, [pc, #284]	; (8001440 <MX_RTC_Init+0x148>)
- 8001324:	601a      	str	r2, [r3, #0]
-  hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
- 8001326:	4b45      	ldr	r3, [pc, #276]	; (800143c <MX_RTC_Init+0x144>)
- 8001328:	2200      	movs	r2, #0
- 800132a:	605a      	str	r2, [r3, #4]
-  hrtc.Init.AsynchPrediv = 127;
- 800132c:	4b43      	ldr	r3, [pc, #268]	; (800143c <MX_RTC_Init+0x144>)
- 800132e:	227f      	movs	r2, #127	; 0x7f
- 8001330:	609a      	str	r2, [r3, #8]
-  hrtc.Init.SynchPrediv = 255;
- 8001332:	4b42      	ldr	r3, [pc, #264]	; (800143c <MX_RTC_Init+0x144>)
- 8001334:	22ff      	movs	r2, #255	; 0xff
- 8001336:	60da      	str	r2, [r3, #12]
-  hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
- 8001338:	4b40      	ldr	r3, [pc, #256]	; (800143c <MX_RTC_Init+0x144>)
- 800133a:	2200      	movs	r2, #0
- 800133c:	611a      	str	r2, [r3, #16]
-  hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
- 800133e:	4b3f      	ldr	r3, [pc, #252]	; (800143c <MX_RTC_Init+0x144>)
- 8001340:	2200      	movs	r2, #0
- 8001342:	615a      	str	r2, [r3, #20]
-  hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
- 8001344:	4b3d      	ldr	r3, [pc, #244]	; (800143c <MX_RTC_Init+0x144>)
- 8001346:	2200      	movs	r2, #0
- 8001348:	619a      	str	r2, [r3, #24]
-  if (HAL_RTC_Init(&hrtc) != HAL_OK)
- 800134a:	483c      	ldr	r0, [pc, #240]	; (800143c <MX_RTC_Init+0x144>)
- 800134c:	f006 ffd4 	bl	80082f8 <HAL_RTC_Init>
- 8001350:	4603      	mov	r3, r0
- 8001352:	2b00      	cmp	r3, #0
- 8001354:	d001      	beq.n	800135a <MX_RTC_Init+0x62>
-  {
-    Error_Handler();
- 8001356:	f000 fdbf 	bl	8001ed8 <Error_Handler>
-
-  /* USER CODE END Check_RTC_BKUP */
-
-  /** Initialize RTC and set the Time and Date
-  */
-  sTime.Hours = 0x0;
- 800135a:	2300      	movs	r3, #0
- 800135c:	f887 3030 	strb.w	r3, [r7, #48]	; 0x30
-  sTime.Minutes = 0x0;
- 8001360:	2300      	movs	r3, #0
- 8001362:	f887 3031 	strb.w	r3, [r7, #49]	; 0x31
-  sTime.Seconds = 0x0;
- 8001366:	2300      	movs	r3, #0
- 8001368:	f887 3032 	strb.w	r3, [r7, #50]	; 0x32
-  sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
- 800136c:	2300      	movs	r3, #0
- 800136e:	643b      	str	r3, [r7, #64]	; 0x40
-  sTime.StoreOperation = RTC_STOREOPERATION_RESET;
- 8001370:	2300      	movs	r3, #0
- 8001372:	647b      	str	r3, [r7, #68]	; 0x44
-  if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
- 8001374:	f107 0330 	add.w	r3, r7, #48	; 0x30
- 8001378:	2201      	movs	r2, #1
- 800137a:	4619      	mov	r1, r3
- 800137c:	482f      	ldr	r0, [pc, #188]	; (800143c <MX_RTC_Init+0x144>)
- 800137e:	f007 f837 	bl	80083f0 <HAL_RTC_SetTime>
- 8001382:	4603      	mov	r3, r0
- 8001384:	2b00      	cmp	r3, #0
- 8001386:	d001      	beq.n	800138c <MX_RTC_Init+0x94>
-  {
-    Error_Handler();
- 8001388:	f000 fda6 	bl	8001ed8 <Error_Handler>
-  }
-  sDate.WeekDay = RTC_WEEKDAY_MONDAY;
- 800138c:	2301      	movs	r3, #1
- 800138e:	f887 302c 	strb.w	r3, [r7, #44]	; 0x2c
-  sDate.Month = RTC_MONTH_JANUARY;
- 8001392:	2301      	movs	r3, #1
- 8001394:	f887 302d 	strb.w	r3, [r7, #45]	; 0x2d
-  sDate.Date = 0x1;
- 8001398:	2301      	movs	r3, #1
- 800139a:	f887 302e 	strb.w	r3, [r7, #46]	; 0x2e
-  sDate.Year = 0x0;
- 800139e:	2300      	movs	r3, #0
- 80013a0:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
-  if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BCD) != HAL_OK)
- 80013a4:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 80013a8:	2201      	movs	r2, #1
- 80013aa:	4619      	mov	r1, r3
- 80013ac:	4823      	ldr	r0, [pc, #140]	; (800143c <MX_RTC_Init+0x144>)
- 80013ae:	f007 f8dd 	bl	800856c <HAL_RTC_SetDate>
- 80013b2:	4603      	mov	r3, r0
- 80013b4:	2b00      	cmp	r3, #0
- 80013b6:	d001      	beq.n	80013bc <MX_RTC_Init+0xc4>
-  {
-    Error_Handler();
- 80013b8:	f000 fd8e 	bl	8001ed8 <Error_Handler>
-  }
-  /** Enable the Alarm A
-  */
-  sAlarm.AlarmTime.Hours = 0x0;
- 80013bc:	2300      	movs	r3, #0
- 80013be:	703b      	strb	r3, [r7, #0]
-  sAlarm.AlarmTime.Minutes = 0x0;
- 80013c0:	2300      	movs	r3, #0
- 80013c2:	707b      	strb	r3, [r7, #1]
-  sAlarm.AlarmTime.Seconds = 0x0;
- 80013c4:	2300      	movs	r3, #0
- 80013c6:	70bb      	strb	r3, [r7, #2]
-  sAlarm.AlarmTime.SubSeconds = 0x0;
- 80013c8:	2300      	movs	r3, #0
- 80013ca:	607b      	str	r3, [r7, #4]
-  sAlarm.AlarmTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
- 80013cc:	2300      	movs	r3, #0
- 80013ce:	613b      	str	r3, [r7, #16]
-  sAlarm.AlarmTime.StoreOperation = RTC_STOREOPERATION_RESET;
- 80013d0:	2300      	movs	r3, #0
- 80013d2:	617b      	str	r3, [r7, #20]
-  sAlarm.AlarmMask = RTC_ALARMMASK_NONE;
- 80013d4:	2300      	movs	r3, #0
- 80013d6:	61bb      	str	r3, [r7, #24]
-  sAlarm.AlarmSubSecondMask = RTC_ALARMSUBSECONDMASK_ALL;
- 80013d8:	2300      	movs	r3, #0
- 80013da:	61fb      	str	r3, [r7, #28]
-  sAlarm.AlarmDateWeekDaySel = RTC_ALARMDATEWEEKDAYSEL_DATE;
- 80013dc:	2300      	movs	r3, #0
- 80013de:	623b      	str	r3, [r7, #32]
-  sAlarm.AlarmDateWeekDay = 0x1;
- 80013e0:	2301      	movs	r3, #1
- 80013e2:	f887 3024 	strb.w	r3, [r7, #36]	; 0x24
-  sAlarm.Alarm = RTC_ALARM_A;
- 80013e6:	f44f 7380 	mov.w	r3, #256	; 0x100
- 80013ea:	62bb      	str	r3, [r7, #40]	; 0x28
-  if (HAL_RTC_SetAlarm(&hrtc, &sAlarm, RTC_FORMAT_BCD) != HAL_OK)
- 80013ec:	463b      	mov	r3, r7
- 80013ee:	2201      	movs	r2, #1
- 80013f0:	4619      	mov	r1, r3
- 80013f2:	4812      	ldr	r0, [pc, #72]	; (800143c <MX_RTC_Init+0x144>)
- 80013f4:	f007 f962 	bl	80086bc <HAL_RTC_SetAlarm>
- 80013f8:	4603      	mov	r3, r0
- 80013fa:	2b00      	cmp	r3, #0
- 80013fc:	d001      	beq.n	8001402 <MX_RTC_Init+0x10a>
-  {
-    Error_Handler();
- 80013fe:	f000 fd6b 	bl	8001ed8 <Error_Handler>
-  }
-  /** Enable the Alarm B
-  */
-  sAlarm.Alarm = RTC_ALARM_B;
- 8001402:	f44f 7300 	mov.w	r3, #512	; 0x200
- 8001406:	62bb      	str	r3, [r7, #40]	; 0x28
-  if (HAL_RTC_SetAlarm(&hrtc, &sAlarm, RTC_FORMAT_BCD) != HAL_OK)
- 8001408:	463b      	mov	r3, r7
- 800140a:	2201      	movs	r2, #1
- 800140c:	4619      	mov	r1, r3
- 800140e:	480b      	ldr	r0, [pc, #44]	; (800143c <MX_RTC_Init+0x144>)
- 8001410:	f007 f954 	bl	80086bc <HAL_RTC_SetAlarm>
- 8001414:	4603      	mov	r3, r0
- 8001416:	2b00      	cmp	r3, #0
- 8001418:	d001      	beq.n	800141e <MX_RTC_Init+0x126>
-  {
-    Error_Handler();
- 800141a:	f000 fd5d 	bl	8001ed8 <Error_Handler>
-  }
-  /** Enable the TimeStamp
-  */
-  if (HAL_RTCEx_SetTimeStamp(&hrtc, RTC_TIMESTAMPEDGE_RISING, RTC_TIMESTAMPPIN_POS1) != HAL_OK)
- 800141e:	2202      	movs	r2, #2
- 8001420:	2100      	movs	r1, #0
- 8001422:	4806      	ldr	r0, [pc, #24]	; (800143c <MX_RTC_Init+0x144>)
- 8001424:	f007 fad4 	bl	80089d0 <HAL_RTCEx_SetTimeStamp>
- 8001428:	4603      	mov	r3, r0
- 800142a:	2b00      	cmp	r3, #0
- 800142c:	d001      	beq.n	8001432 <MX_RTC_Init+0x13a>
-  {
-    Error_Handler();
- 800142e:	f000 fd53 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN RTC_Init 2 */
-
-  /* USER CODE END RTC_Init 2 */
-
-}
- 8001432:	bf00      	nop
- 8001434:	3748      	adds	r7, #72	; 0x48
- 8001436:	46bd      	mov	sp, r7
- 8001438:	bd80      	pop	{r7, pc}
- 800143a:	bf00      	nop
- 800143c:	20008844 	.word	0x20008844
- 8001440:	40002800 	.word	0x40002800
-
-08001444 <MX_SPI2_Init>:
-  * @brief SPI2 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_SPI2_Init(void)
-{
- 8001444:	b580      	push	{r7, lr}
- 8001446:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN SPI2_Init 1 */
-
-  /* USER CODE END SPI2_Init 1 */
-  /* SPI2 parameter configuration*/
-  hspi2.Instance = SPI2;
- 8001448:	4b1b      	ldr	r3, [pc, #108]	; (80014b8 <MX_SPI2_Init+0x74>)
- 800144a:	4a1c      	ldr	r2, [pc, #112]	; (80014bc <MX_SPI2_Init+0x78>)
- 800144c:	601a      	str	r2, [r3, #0]
-  hspi2.Init.Mode = SPI_MODE_MASTER;
- 800144e:	4b1a      	ldr	r3, [pc, #104]	; (80014b8 <MX_SPI2_Init+0x74>)
- 8001450:	f44f 7282 	mov.w	r2, #260	; 0x104
- 8001454:	605a      	str	r2, [r3, #4]
-  hspi2.Init.Direction = SPI_DIRECTION_2LINES;
- 8001456:	4b18      	ldr	r3, [pc, #96]	; (80014b8 <MX_SPI2_Init+0x74>)
- 8001458:	2200      	movs	r2, #0
- 800145a:	609a      	str	r2, [r3, #8]
-  hspi2.Init.DataSize = SPI_DATASIZE_4BIT;
- 800145c:	4b16      	ldr	r3, [pc, #88]	; (80014b8 <MX_SPI2_Init+0x74>)
- 800145e:	f44f 7240 	mov.w	r2, #768	; 0x300
- 8001462:	60da      	str	r2, [r3, #12]
-  hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
- 8001464:	4b14      	ldr	r3, [pc, #80]	; (80014b8 <MX_SPI2_Init+0x74>)
- 8001466:	2200      	movs	r2, #0
- 8001468:	611a      	str	r2, [r3, #16]
-  hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
- 800146a:	4b13      	ldr	r3, [pc, #76]	; (80014b8 <MX_SPI2_Init+0x74>)
- 800146c:	2200      	movs	r2, #0
- 800146e:	615a      	str	r2, [r3, #20]
-  hspi2.Init.NSS = SPI_NSS_HARD_OUTPUT;
- 8001470:	4b11      	ldr	r3, [pc, #68]	; (80014b8 <MX_SPI2_Init+0x74>)
- 8001472:	f44f 2280 	mov.w	r2, #262144	; 0x40000
- 8001476:	619a      	str	r2, [r3, #24]
-  hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
- 8001478:	4b0f      	ldr	r3, [pc, #60]	; (80014b8 <MX_SPI2_Init+0x74>)
- 800147a:	2200      	movs	r2, #0
- 800147c:	61da      	str	r2, [r3, #28]
-  hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
- 800147e:	4b0e      	ldr	r3, [pc, #56]	; (80014b8 <MX_SPI2_Init+0x74>)
- 8001480:	2200      	movs	r2, #0
- 8001482:	621a      	str	r2, [r3, #32]
-  hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
- 8001484:	4b0c      	ldr	r3, [pc, #48]	; (80014b8 <MX_SPI2_Init+0x74>)
- 8001486:	2200      	movs	r2, #0
- 8001488:	625a      	str	r2, [r3, #36]	; 0x24
-  hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- 800148a:	4b0b      	ldr	r3, [pc, #44]	; (80014b8 <MX_SPI2_Init+0x74>)
- 800148c:	2200      	movs	r2, #0
- 800148e:	629a      	str	r2, [r3, #40]	; 0x28
-  hspi2.Init.CRCPolynomial = 7;
- 8001490:	4b09      	ldr	r3, [pc, #36]	; (80014b8 <MX_SPI2_Init+0x74>)
- 8001492:	2207      	movs	r2, #7
- 8001494:	62da      	str	r2, [r3, #44]	; 0x2c
-  hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
- 8001496:	4b08      	ldr	r3, [pc, #32]	; (80014b8 <MX_SPI2_Init+0x74>)
- 8001498:	2200      	movs	r2, #0
- 800149a:	631a      	str	r2, [r3, #48]	; 0x30
-  hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
- 800149c:	4b06      	ldr	r3, [pc, #24]	; (80014b8 <MX_SPI2_Init+0x74>)
- 800149e:	2208      	movs	r2, #8
- 80014a0:	635a      	str	r2, [r3, #52]	; 0x34
-  if (HAL_SPI_Init(&hspi2) != HAL_OK)
- 80014a2:	4805      	ldr	r0, [pc, #20]	; (80014b8 <MX_SPI2_Init+0x74>)
- 80014a4:	f007 fb69 	bl	8008b7a <HAL_SPI_Init>
- 80014a8:	4603      	mov	r3, r0
- 80014aa:	2b00      	cmp	r3, #0
- 80014ac:	d001      	beq.n	80014b2 <MX_SPI2_Init+0x6e>
-  {
-    Error_Handler();
- 80014ae:	f000 fd13 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN SPI2_Init 2 */
-
-  /* USER CODE END SPI2_Init 2 */
-
-}
- 80014b2:	bf00      	nop
- 80014b4:	bd80      	pop	{r7, pc}
- 80014b6:	bf00      	nop
- 80014b8:	20008488 	.word	0x20008488
- 80014bc:	40003800 	.word	0x40003800
-
-080014c0 <MX_TIM1_Init>:
-  * @brief TIM1 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_TIM1_Init(void)
-{
- 80014c0:	b580      	push	{r7, lr}
- 80014c2:	b088      	sub	sp, #32
- 80014c4:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN TIM1_Init 0 */
-
-  /* USER CODE END TIM1_Init 0 */
-
-  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- 80014c6:	f107 0310 	add.w	r3, r7, #16
- 80014ca:	2200      	movs	r2, #0
- 80014cc:	601a      	str	r2, [r3, #0]
- 80014ce:	605a      	str	r2, [r3, #4]
- 80014d0:	609a      	str	r2, [r3, #8]
- 80014d2:	60da      	str	r2, [r3, #12]
-  TIM_MasterConfigTypeDef sMasterConfig = {0};
- 80014d4:	1d3b      	adds	r3, r7, #4
- 80014d6:	2200      	movs	r2, #0
- 80014d8:	601a      	str	r2, [r3, #0]
- 80014da:	605a      	str	r2, [r3, #4]
- 80014dc:	609a      	str	r2, [r3, #8]
-
-  /* USER CODE BEGIN TIM1_Init 1 */
-
-  /* USER CODE END TIM1_Init 1 */
-  htim1.Instance = TIM1;
- 80014de:	4b20      	ldr	r3, [pc, #128]	; (8001560 <MX_TIM1_Init+0xa0>)
- 80014e0:	4a20      	ldr	r2, [pc, #128]	; (8001564 <MX_TIM1_Init+0xa4>)
- 80014e2:	601a      	str	r2, [r3, #0]
-  htim1.Init.Prescaler = 0;
- 80014e4:	4b1e      	ldr	r3, [pc, #120]	; (8001560 <MX_TIM1_Init+0xa0>)
- 80014e6:	2200      	movs	r2, #0
- 80014e8:	605a      	str	r2, [r3, #4]
-  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
- 80014ea:	4b1d      	ldr	r3, [pc, #116]	; (8001560 <MX_TIM1_Init+0xa0>)
- 80014ec:	2200      	movs	r2, #0
- 80014ee:	609a      	str	r2, [r3, #8]
-  htim1.Init.Period = 65535;
- 80014f0:	4b1b      	ldr	r3, [pc, #108]	; (8001560 <MX_TIM1_Init+0xa0>)
- 80014f2:	f64f 72ff 	movw	r2, #65535	; 0xffff
- 80014f6:	60da      	str	r2, [r3, #12]
-  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 80014f8:	4b19      	ldr	r3, [pc, #100]	; (8001560 <MX_TIM1_Init+0xa0>)
- 80014fa:	2200      	movs	r2, #0
- 80014fc:	611a      	str	r2, [r3, #16]
-  htim1.Init.RepetitionCounter = 0;
- 80014fe:	4b18      	ldr	r3, [pc, #96]	; (8001560 <MX_TIM1_Init+0xa0>)
- 8001500:	2200      	movs	r2, #0
- 8001502:	615a      	str	r2, [r3, #20]
-  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 8001504:	4b16      	ldr	r3, [pc, #88]	; (8001560 <MX_TIM1_Init+0xa0>)
- 8001506:	2200      	movs	r2, #0
- 8001508:	619a      	str	r2, [r3, #24]
-  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
- 800150a:	4815      	ldr	r0, [pc, #84]	; (8001560 <MX_TIM1_Init+0xa0>)
- 800150c:	f007 fbc7 	bl	8008c9e <HAL_TIM_Base_Init>
- 8001510:	4603      	mov	r3, r0
- 8001512:	2b00      	cmp	r3, #0
- 8001514:	d001      	beq.n	800151a <MX_TIM1_Init+0x5a>
-  {
-    Error_Handler();
- 8001516:	f000 fcdf 	bl	8001ed8 <Error_Handler>
-  }
-  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 800151a:	f44f 5380 	mov.w	r3, #4096	; 0x1000
- 800151e:	613b      	str	r3, [r7, #16]
-  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
- 8001520:	f107 0310 	add.w	r3, r7, #16
- 8001524:	4619      	mov	r1, r3
- 8001526:	480e      	ldr	r0, [pc, #56]	; (8001560 <MX_TIM1_Init+0xa0>)
- 8001528:	f007 fe7a 	bl	8009220 <HAL_TIM_ConfigClockSource>
- 800152c:	4603      	mov	r3, r0
- 800152e:	2b00      	cmp	r3, #0
- 8001530:	d001      	beq.n	8001536 <MX_TIM1_Init+0x76>
-  {
-    Error_Handler();
- 8001532:	f000 fcd1 	bl	8001ed8 <Error_Handler>
-  }
-  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 8001536:	2300      	movs	r3, #0
- 8001538:	607b      	str	r3, [r7, #4]
-  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
- 800153a:	2300      	movs	r3, #0
- 800153c:	60bb      	str	r3, [r7, #8]
-  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 800153e:	2300      	movs	r3, #0
- 8001540:	60fb      	str	r3, [r7, #12]
-  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
- 8001542:	1d3b      	adds	r3, r7, #4
- 8001544:	4619      	mov	r1, r3
- 8001546:	4806      	ldr	r0, [pc, #24]	; (8001560 <MX_TIM1_Init+0xa0>)
- 8001548:	f008 fbae 	bl	8009ca8 <HAL_TIMEx_MasterConfigSynchronization>
- 800154c:	4603      	mov	r3, r0
- 800154e:	2b00      	cmp	r3, #0
- 8001550:	d001      	beq.n	8001556 <MX_TIM1_Init+0x96>
-  {
-    Error_Handler();
- 8001552:	f000 fcc1 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN TIM1_Init 2 */
-
-  /* USER CODE END TIM1_Init 2 */
-
-}
- 8001556:	bf00      	nop
- 8001558:	3720      	adds	r7, #32
- 800155a:	46bd      	mov	sp, r7
- 800155c:	bd80      	pop	{r7, pc}
- 800155e:	bf00      	nop
- 8001560:	20008864 	.word	0x20008864
- 8001564:	40010000 	.word	0x40010000
-
-08001568 <MX_TIM2_Init>:
-  * @brief TIM2 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_TIM2_Init(void)
-{
- 8001568:	b580      	push	{r7, lr}
- 800156a:	b088      	sub	sp, #32
- 800156c:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN TIM2_Init 0 */
-
-  /* USER CODE END TIM2_Init 0 */
-
-  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- 800156e:	f107 0310 	add.w	r3, r7, #16
- 8001572:	2200      	movs	r2, #0
- 8001574:	601a      	str	r2, [r3, #0]
- 8001576:	605a      	str	r2, [r3, #4]
- 8001578:	609a      	str	r2, [r3, #8]
- 800157a:	60da      	str	r2, [r3, #12]
-  TIM_MasterConfigTypeDef sMasterConfig = {0};
- 800157c:	1d3b      	adds	r3, r7, #4
- 800157e:	2200      	movs	r2, #0
- 8001580:	601a      	str	r2, [r3, #0]
- 8001582:	605a      	str	r2, [r3, #4]
- 8001584:	609a      	str	r2, [r3, #8]
-
-  /* USER CODE BEGIN TIM2_Init 1 */
-
-  /* USER CODE END TIM2_Init 1 */
-  htim2.Instance = TIM2;
- 8001586:	4b1e      	ldr	r3, [pc, #120]	; (8001600 <MX_TIM2_Init+0x98>)
- 8001588:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
- 800158c:	601a      	str	r2, [r3, #0]
-  htim2.Init.Prescaler = 0;
- 800158e:	4b1c      	ldr	r3, [pc, #112]	; (8001600 <MX_TIM2_Init+0x98>)
- 8001590:	2200      	movs	r2, #0
- 8001592:	605a      	str	r2, [r3, #4]
-  htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
- 8001594:	4b1a      	ldr	r3, [pc, #104]	; (8001600 <MX_TIM2_Init+0x98>)
- 8001596:	2200      	movs	r2, #0
- 8001598:	609a      	str	r2, [r3, #8]
-  htim2.Init.Period = 4294967295;
- 800159a:	4b19      	ldr	r3, [pc, #100]	; (8001600 <MX_TIM2_Init+0x98>)
- 800159c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
- 80015a0:	60da      	str	r2, [r3, #12]
-  htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 80015a2:	4b17      	ldr	r3, [pc, #92]	; (8001600 <MX_TIM2_Init+0x98>)
- 80015a4:	2200      	movs	r2, #0
- 80015a6:	611a      	str	r2, [r3, #16]
-  htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 80015a8:	4b15      	ldr	r3, [pc, #84]	; (8001600 <MX_TIM2_Init+0x98>)
- 80015aa:	2200      	movs	r2, #0
- 80015ac:	619a      	str	r2, [r3, #24]
-  if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
- 80015ae:	4814      	ldr	r0, [pc, #80]	; (8001600 <MX_TIM2_Init+0x98>)
- 80015b0:	f007 fb75 	bl	8008c9e <HAL_TIM_Base_Init>
- 80015b4:	4603      	mov	r3, r0
- 80015b6:	2b00      	cmp	r3, #0
- 80015b8:	d001      	beq.n	80015be <MX_TIM2_Init+0x56>
-  {
-    Error_Handler();
- 80015ba:	f000 fc8d 	bl	8001ed8 <Error_Handler>
-  }
-  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 80015be:	f44f 5380 	mov.w	r3, #4096	; 0x1000
- 80015c2:	613b      	str	r3, [r7, #16]
-  if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
- 80015c4:	f107 0310 	add.w	r3, r7, #16
- 80015c8:	4619      	mov	r1, r3
- 80015ca:	480d      	ldr	r0, [pc, #52]	; (8001600 <MX_TIM2_Init+0x98>)
- 80015cc:	f007 fe28 	bl	8009220 <HAL_TIM_ConfigClockSource>
- 80015d0:	4603      	mov	r3, r0
- 80015d2:	2b00      	cmp	r3, #0
- 80015d4:	d001      	beq.n	80015da <MX_TIM2_Init+0x72>
-  {
-    Error_Handler();
- 80015d6:	f000 fc7f 	bl	8001ed8 <Error_Handler>
-  }
-  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 80015da:	2300      	movs	r3, #0
- 80015dc:	607b      	str	r3, [r7, #4]
-  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 80015de:	2300      	movs	r3, #0
- 80015e0:	60fb      	str	r3, [r7, #12]
-  if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
- 80015e2:	1d3b      	adds	r3, r7, #4
- 80015e4:	4619      	mov	r1, r3
- 80015e6:	4806      	ldr	r0, [pc, #24]	; (8001600 <MX_TIM2_Init+0x98>)
- 80015e8:	f008 fb5e 	bl	8009ca8 <HAL_TIMEx_MasterConfigSynchronization>
- 80015ec:	4603      	mov	r3, r0
- 80015ee:	2b00      	cmp	r3, #0
- 80015f0:	d001      	beq.n	80015f6 <MX_TIM2_Init+0x8e>
-  {
-    Error_Handler();
- 80015f2:	f000 fc71 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN TIM2_Init 2 */
-
-  /* USER CODE END TIM2_Init 2 */
-
-}
- 80015f6:	bf00      	nop
- 80015f8:	3720      	adds	r7, #32
- 80015fa:	46bd      	mov	sp, r7
- 80015fc:	bd80      	pop	{r7, pc}
- 80015fe:	bf00      	nop
- 8001600:	20008964 	.word	0x20008964
-
-08001604 <MX_TIM3_Init>:
-  * @brief TIM3 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_TIM3_Init(void)
-{
- 8001604:	b580      	push	{r7, lr}
- 8001606:	b094      	sub	sp, #80	; 0x50
- 8001608:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN TIM3_Init 0 */
-
-  /* USER CODE END TIM3_Init 0 */
-
-  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- 800160a:	f107 0340 	add.w	r3, r7, #64	; 0x40
- 800160e:	2200      	movs	r2, #0
- 8001610:	601a      	str	r2, [r3, #0]
- 8001612:	605a      	str	r2, [r3, #4]
- 8001614:	609a      	str	r2, [r3, #8]
- 8001616:	60da      	str	r2, [r3, #12]
-  TIM_SlaveConfigTypeDef sSlaveConfig = {0};
- 8001618:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 800161c:	2200      	movs	r2, #0
- 800161e:	601a      	str	r2, [r3, #0]
- 8001620:	605a      	str	r2, [r3, #4]
- 8001622:	609a      	str	r2, [r3, #8]
- 8001624:	60da      	str	r2, [r3, #12]
- 8001626:	611a      	str	r2, [r3, #16]
-  TIM_MasterConfigTypeDef sMasterConfig = {0};
- 8001628:	f107 0320 	add.w	r3, r7, #32
- 800162c:	2200      	movs	r2, #0
- 800162e:	601a      	str	r2, [r3, #0]
- 8001630:	605a      	str	r2, [r3, #4]
- 8001632:	609a      	str	r2, [r3, #8]
-  TIM_OC_InitTypeDef sConfigOC = {0};
- 8001634:	1d3b      	adds	r3, r7, #4
- 8001636:	2200      	movs	r2, #0
- 8001638:	601a      	str	r2, [r3, #0]
- 800163a:	605a      	str	r2, [r3, #4]
- 800163c:	609a      	str	r2, [r3, #8]
- 800163e:	60da      	str	r2, [r3, #12]
- 8001640:	611a      	str	r2, [r3, #16]
- 8001642:	615a      	str	r2, [r3, #20]
- 8001644:	619a      	str	r2, [r3, #24]
-
-  /* USER CODE BEGIN TIM3_Init 1 */
-
-  /* USER CODE END TIM3_Init 1 */
-  htim3.Instance = TIM3;
- 8001646:	4b34      	ldr	r3, [pc, #208]	; (8001718 <MX_TIM3_Init+0x114>)
- 8001648:	4a34      	ldr	r2, [pc, #208]	; (800171c <MX_TIM3_Init+0x118>)
- 800164a:	601a      	str	r2, [r3, #0]
-  htim3.Init.Prescaler = 0;
- 800164c:	4b32      	ldr	r3, [pc, #200]	; (8001718 <MX_TIM3_Init+0x114>)
- 800164e:	2200      	movs	r2, #0
- 8001650:	605a      	str	r2, [r3, #4]
-  htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
- 8001652:	4b31      	ldr	r3, [pc, #196]	; (8001718 <MX_TIM3_Init+0x114>)
- 8001654:	2200      	movs	r2, #0
- 8001656:	609a      	str	r2, [r3, #8]
-  htim3.Init.Period = 65535;
- 8001658:	4b2f      	ldr	r3, [pc, #188]	; (8001718 <MX_TIM3_Init+0x114>)
- 800165a:	f64f 72ff 	movw	r2, #65535	; 0xffff
- 800165e:	60da      	str	r2, [r3, #12]
-  htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 8001660:	4b2d      	ldr	r3, [pc, #180]	; (8001718 <MX_TIM3_Init+0x114>)
- 8001662:	2200      	movs	r2, #0
- 8001664:	611a      	str	r2, [r3, #16]
-  htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 8001666:	4b2c      	ldr	r3, [pc, #176]	; (8001718 <MX_TIM3_Init+0x114>)
- 8001668:	2200      	movs	r2, #0
- 800166a:	619a      	str	r2, [r3, #24]
-  if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
- 800166c:	482a      	ldr	r0, [pc, #168]	; (8001718 <MX_TIM3_Init+0x114>)
- 800166e:	f007 fb16 	bl	8008c9e <HAL_TIM_Base_Init>
- 8001672:	4603      	mov	r3, r0
- 8001674:	2b00      	cmp	r3, #0
- 8001676:	d001      	beq.n	800167c <MX_TIM3_Init+0x78>
-  {
-    Error_Handler();
- 8001678:	f000 fc2e 	bl	8001ed8 <Error_Handler>
-  }
-  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 800167c:	f44f 5380 	mov.w	r3, #4096	; 0x1000
- 8001680:	643b      	str	r3, [r7, #64]	; 0x40
-  if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
- 8001682:	f107 0340 	add.w	r3, r7, #64	; 0x40
- 8001686:	4619      	mov	r1, r3
- 8001688:	4823      	ldr	r0, [pc, #140]	; (8001718 <MX_TIM3_Init+0x114>)
- 800168a:	f007 fdc9 	bl	8009220 <HAL_TIM_ConfigClockSource>
- 800168e:	4603      	mov	r3, r0
- 8001690:	2b00      	cmp	r3, #0
- 8001692:	d001      	beq.n	8001698 <MX_TIM3_Init+0x94>
-  {
-    Error_Handler();
- 8001694:	f000 fc20 	bl	8001ed8 <Error_Handler>
-  }
-  if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
- 8001698:	481f      	ldr	r0, [pc, #124]	; (8001718 <MX_TIM3_Init+0x114>)
- 800169a:	f007 fb55 	bl	8008d48 <HAL_TIM_PWM_Init>
- 800169e:	4603      	mov	r3, r0
- 80016a0:	2b00      	cmp	r3, #0
- 80016a2:	d001      	beq.n	80016a8 <MX_TIM3_Init+0xa4>
-  {
-    Error_Handler();
- 80016a4:	f000 fc18 	bl	8001ed8 <Error_Handler>
-  }
-  sSlaveConfig.SlaveMode = TIM_SLAVEMODE_DISABLE;
- 80016a8:	2300      	movs	r3, #0
- 80016aa:	62fb      	str	r3, [r7, #44]	; 0x2c
-  sSlaveConfig.InputTrigger = TIM_TS_ITR0;
- 80016ac:	2300      	movs	r3, #0
- 80016ae:	633b      	str	r3, [r7, #48]	; 0x30
-  if (HAL_TIM_SlaveConfigSynchro(&htim3, &sSlaveConfig) != HAL_OK)
- 80016b0:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 80016b4:	4619      	mov	r1, r3
- 80016b6:	4818      	ldr	r0, [pc, #96]	; (8001718 <MX_TIM3_Init+0x114>)
- 80016b8:	f007 fe6c 	bl	8009394 <HAL_TIM_SlaveConfigSynchro>
- 80016bc:	4603      	mov	r3, r0
- 80016be:	2b00      	cmp	r3, #0
- 80016c0:	d001      	beq.n	80016c6 <MX_TIM3_Init+0xc2>
-  {
-    Error_Handler();
- 80016c2:	f000 fc09 	bl	8001ed8 <Error_Handler>
-  }
-  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 80016c6:	2300      	movs	r3, #0
- 80016c8:	623b      	str	r3, [r7, #32]
-  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 80016ca:	2300      	movs	r3, #0
- 80016cc:	62bb      	str	r3, [r7, #40]	; 0x28
-  if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
- 80016ce:	f107 0320 	add.w	r3, r7, #32
- 80016d2:	4619      	mov	r1, r3
- 80016d4:	4810      	ldr	r0, [pc, #64]	; (8001718 <MX_TIM3_Init+0x114>)
- 80016d6:	f008 fae7 	bl	8009ca8 <HAL_TIMEx_MasterConfigSynchronization>
- 80016da:	4603      	mov	r3, r0
- 80016dc:	2b00      	cmp	r3, #0
- 80016de:	d001      	beq.n	80016e4 <MX_TIM3_Init+0xe0>
-  {
-    Error_Handler();
- 80016e0:	f000 fbfa 	bl	8001ed8 <Error_Handler>
-  }
-  sConfigOC.OCMode = TIM_OCMODE_PWM1;
- 80016e4:	2360      	movs	r3, #96	; 0x60
- 80016e6:	607b      	str	r3, [r7, #4]
-  sConfigOC.Pulse = 0;
- 80016e8:	2300      	movs	r3, #0
- 80016ea:	60bb      	str	r3, [r7, #8]
-  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 80016ec:	2300      	movs	r3, #0
- 80016ee:	60fb      	str	r3, [r7, #12]
-  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 80016f0:	2300      	movs	r3, #0
- 80016f2:	617b      	str	r3, [r7, #20]
-  if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- 80016f4:	1d3b      	adds	r3, r7, #4
- 80016f6:	2200      	movs	r2, #0
- 80016f8:	4619      	mov	r1, r3
- 80016fa:	4807      	ldr	r0, [pc, #28]	; (8001718 <MX_TIM3_Init+0x114>)
- 80016fc:	f007 fc78 	bl	8008ff0 <HAL_TIM_PWM_ConfigChannel>
- 8001700:	4603      	mov	r3, r0
- 8001702:	2b00      	cmp	r3, #0
- 8001704:	d001      	beq.n	800170a <MX_TIM3_Init+0x106>
-  {
-    Error_Handler();
- 8001706:	f000 fbe7 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN TIM3_Init 2 */
-
-  /* USER CODE END TIM3_Init 2 */
-  HAL_TIM_MspPostInit(&htim3);
- 800170a:	4803      	ldr	r0, [pc, #12]	; (8001718 <MX_TIM3_Init+0x114>)
- 800170c:	f002 fc16 	bl	8003f3c <HAL_TIM_MspPostInit>
-
-}
- 8001710:	bf00      	nop
- 8001712:	3750      	adds	r7, #80	; 0x50
- 8001714:	46bd      	mov	sp, r7
- 8001716:	bd80      	pop	{r7, pc}
- 8001718:	20008638 	.word	0x20008638
- 800171c:	40000400 	.word	0x40000400
-
-08001720 <MX_TIM5_Init>:
-  * @brief TIM5 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_TIM5_Init(void)
-{
- 8001720:	b580      	push	{r7, lr}
- 8001722:	b088      	sub	sp, #32
- 8001724:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN TIM5_Init 0 */
-
-  /* USER CODE END TIM5_Init 0 */
-
-  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- 8001726:	f107 0310 	add.w	r3, r7, #16
- 800172a:	2200      	movs	r2, #0
- 800172c:	601a      	str	r2, [r3, #0]
- 800172e:	605a      	str	r2, [r3, #4]
- 8001730:	609a      	str	r2, [r3, #8]
- 8001732:	60da      	str	r2, [r3, #12]
-  TIM_MasterConfigTypeDef sMasterConfig = {0};
- 8001734:	1d3b      	adds	r3, r7, #4
- 8001736:	2200      	movs	r2, #0
- 8001738:	601a      	str	r2, [r3, #0]
- 800173a:	605a      	str	r2, [r3, #4]
- 800173c:	609a      	str	r2, [r3, #8]
-
-  /* USER CODE BEGIN TIM5_Init 1 */
-
-  /* USER CODE END TIM5_Init 1 */
-  htim5.Instance = TIM5;
- 800173e:	4b1d      	ldr	r3, [pc, #116]	; (80017b4 <MX_TIM5_Init+0x94>)
- 8001740:	4a1d      	ldr	r2, [pc, #116]	; (80017b8 <MX_TIM5_Init+0x98>)
- 8001742:	601a      	str	r2, [r3, #0]
-  htim5.Init.Prescaler = 0;
- 8001744:	4b1b      	ldr	r3, [pc, #108]	; (80017b4 <MX_TIM5_Init+0x94>)
- 8001746:	2200      	movs	r2, #0
- 8001748:	605a      	str	r2, [r3, #4]
-  htim5.Init.CounterMode = TIM_COUNTERMODE_UP;
- 800174a:	4b1a      	ldr	r3, [pc, #104]	; (80017b4 <MX_TIM5_Init+0x94>)
- 800174c:	2200      	movs	r2, #0
- 800174e:	609a      	str	r2, [r3, #8]
-  htim5.Init.Period = 4294967295;
- 8001750:	4b18      	ldr	r3, [pc, #96]	; (80017b4 <MX_TIM5_Init+0x94>)
- 8001752:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
- 8001756:	60da      	str	r2, [r3, #12]
-  htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 8001758:	4b16      	ldr	r3, [pc, #88]	; (80017b4 <MX_TIM5_Init+0x94>)
- 800175a:	2200      	movs	r2, #0
- 800175c:	611a      	str	r2, [r3, #16]
-  htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 800175e:	4b15      	ldr	r3, [pc, #84]	; (80017b4 <MX_TIM5_Init+0x94>)
- 8001760:	2200      	movs	r2, #0
- 8001762:	619a      	str	r2, [r3, #24]
-  if (HAL_TIM_Base_Init(&htim5) != HAL_OK)
- 8001764:	4813      	ldr	r0, [pc, #76]	; (80017b4 <MX_TIM5_Init+0x94>)
- 8001766:	f007 fa9a 	bl	8008c9e <HAL_TIM_Base_Init>
- 800176a:	4603      	mov	r3, r0
- 800176c:	2b00      	cmp	r3, #0
- 800176e:	d001      	beq.n	8001774 <MX_TIM5_Init+0x54>
-  {
-    Error_Handler();
- 8001770:	f000 fbb2 	bl	8001ed8 <Error_Handler>
-  }
-  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 8001774:	f44f 5380 	mov.w	r3, #4096	; 0x1000
- 8001778:	613b      	str	r3, [r7, #16]
-  if (HAL_TIM_ConfigClockSource(&htim5, &sClockSourceConfig) != HAL_OK)
- 800177a:	f107 0310 	add.w	r3, r7, #16
- 800177e:	4619      	mov	r1, r3
- 8001780:	480c      	ldr	r0, [pc, #48]	; (80017b4 <MX_TIM5_Init+0x94>)
- 8001782:	f007 fd4d 	bl	8009220 <HAL_TIM_ConfigClockSource>
- 8001786:	4603      	mov	r3, r0
- 8001788:	2b00      	cmp	r3, #0
- 800178a:	d001      	beq.n	8001790 <MX_TIM5_Init+0x70>
-  {
-    Error_Handler();
- 800178c:	f000 fba4 	bl	8001ed8 <Error_Handler>
-  }
-  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 8001790:	2300      	movs	r3, #0
- 8001792:	607b      	str	r3, [r7, #4]
-  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 8001794:	2300      	movs	r3, #0
- 8001796:	60fb      	str	r3, [r7, #12]
-  if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) != HAL_OK)
- 8001798:	1d3b      	adds	r3, r7, #4
- 800179a:	4619      	mov	r1, r3
- 800179c:	4805      	ldr	r0, [pc, #20]	; (80017b4 <MX_TIM5_Init+0x94>)
- 800179e:	f008 fa83 	bl	8009ca8 <HAL_TIMEx_MasterConfigSynchronization>
- 80017a2:	4603      	mov	r3, r0
- 80017a4:	2b00      	cmp	r3, #0
- 80017a6:	d001      	beq.n	80017ac <MX_TIM5_Init+0x8c>
-  {
-    Error_Handler();
- 80017a8:	f000 fb96 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN TIM5_Init 2 */
-
-  /* USER CODE END TIM5_Init 2 */
-
-}
- 80017ac:	bf00      	nop
- 80017ae:	3720      	adds	r7, #32
- 80017b0:	46bd      	mov	sp, r7
- 80017b2:	bd80      	pop	{r7, pc}
- 80017b4:	200085f8 	.word	0x200085f8
- 80017b8:	40000c00 	.word	0x40000c00
-
-080017bc <MX_TIM8_Init>:
-  * @brief TIM8 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_TIM8_Init(void)
-{
- 80017bc:	b580      	push	{r7, lr}
- 80017be:	b09a      	sub	sp, #104	; 0x68
- 80017c0:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN TIM8_Init 0 */
-
-  /* USER CODE END TIM8_Init 0 */
-
-  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- 80017c2:	f107 0358 	add.w	r3, r7, #88	; 0x58
- 80017c6:	2200      	movs	r2, #0
- 80017c8:	601a      	str	r2, [r3, #0]
- 80017ca:	605a      	str	r2, [r3, #4]
- 80017cc:	609a      	str	r2, [r3, #8]
- 80017ce:	60da      	str	r2, [r3, #12]
-  TIM_MasterConfigTypeDef sMasterConfig = {0};
- 80017d0:	f107 034c 	add.w	r3, r7, #76	; 0x4c
- 80017d4:	2200      	movs	r2, #0
- 80017d6:	601a      	str	r2, [r3, #0]
- 80017d8:	605a      	str	r2, [r3, #4]
- 80017da:	609a      	str	r2, [r3, #8]
-  TIM_OC_InitTypeDef sConfigOC = {0};
- 80017dc:	f107 0330 	add.w	r3, r7, #48	; 0x30
- 80017e0:	2200      	movs	r2, #0
- 80017e2:	601a      	str	r2, [r3, #0]
- 80017e4:	605a      	str	r2, [r3, #4]
- 80017e6:	609a      	str	r2, [r3, #8]
- 80017e8:	60da      	str	r2, [r3, #12]
- 80017ea:	611a      	str	r2, [r3, #16]
- 80017ec:	615a      	str	r2, [r3, #20]
- 80017ee:	619a      	str	r2, [r3, #24]
-  TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
- 80017f0:	1d3b      	adds	r3, r7, #4
- 80017f2:	222c      	movs	r2, #44	; 0x2c
- 80017f4:	2100      	movs	r1, #0
- 80017f6:	4618      	mov	r0, r3
- 80017f8:	f00a f9e1 	bl	800bbbe <memset>
-
-  /* USER CODE BEGIN TIM8_Init 1 */
-
-  /* USER CODE END TIM8_Init 1 */
-  htim8.Instance = TIM8;
- 80017fc:	4b42      	ldr	r3, [pc, #264]	; (8001908 <MX_TIM8_Init+0x14c>)
- 80017fe:	4a43      	ldr	r2, [pc, #268]	; (800190c <MX_TIM8_Init+0x150>)
- 8001800:	601a      	str	r2, [r3, #0]
-  htim8.Init.Prescaler = 0;
- 8001802:	4b41      	ldr	r3, [pc, #260]	; (8001908 <MX_TIM8_Init+0x14c>)
- 8001804:	2200      	movs	r2, #0
- 8001806:	605a      	str	r2, [r3, #4]
-  htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
- 8001808:	4b3f      	ldr	r3, [pc, #252]	; (8001908 <MX_TIM8_Init+0x14c>)
- 800180a:	2200      	movs	r2, #0
- 800180c:	609a      	str	r2, [r3, #8]
-  htim8.Init.Period = 65535;
- 800180e:	4b3e      	ldr	r3, [pc, #248]	; (8001908 <MX_TIM8_Init+0x14c>)
- 8001810:	f64f 72ff 	movw	r2, #65535	; 0xffff
- 8001814:	60da      	str	r2, [r3, #12]
-  htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 8001816:	4b3c      	ldr	r3, [pc, #240]	; (8001908 <MX_TIM8_Init+0x14c>)
- 8001818:	2200      	movs	r2, #0
- 800181a:	611a      	str	r2, [r3, #16]
-  htim8.Init.RepetitionCounter = 0;
- 800181c:	4b3a      	ldr	r3, [pc, #232]	; (8001908 <MX_TIM8_Init+0x14c>)
- 800181e:	2200      	movs	r2, #0
- 8001820:	615a      	str	r2, [r3, #20]
-  htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 8001822:	4b39      	ldr	r3, [pc, #228]	; (8001908 <MX_TIM8_Init+0x14c>)
- 8001824:	2200      	movs	r2, #0
- 8001826:	619a      	str	r2, [r3, #24]
-  if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
- 8001828:	4837      	ldr	r0, [pc, #220]	; (8001908 <MX_TIM8_Init+0x14c>)
- 800182a:	f007 fa38 	bl	8008c9e <HAL_TIM_Base_Init>
- 800182e:	4603      	mov	r3, r0
- 8001830:	2b00      	cmp	r3, #0
- 8001832:	d001      	beq.n	8001838 <MX_TIM8_Init+0x7c>
-  {
-    Error_Handler();
- 8001834:	f000 fb50 	bl	8001ed8 <Error_Handler>
-  }
-  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 8001838:	f44f 5380 	mov.w	r3, #4096	; 0x1000
- 800183c:	65bb      	str	r3, [r7, #88]	; 0x58
-  if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
- 800183e:	f107 0358 	add.w	r3, r7, #88	; 0x58
- 8001842:	4619      	mov	r1, r3
- 8001844:	4830      	ldr	r0, [pc, #192]	; (8001908 <MX_TIM8_Init+0x14c>)
- 8001846:	f007 fceb 	bl	8009220 <HAL_TIM_ConfigClockSource>
- 800184a:	4603      	mov	r3, r0
- 800184c:	2b00      	cmp	r3, #0
- 800184e:	d001      	beq.n	8001854 <MX_TIM8_Init+0x98>
-  {
-    Error_Handler();
- 8001850:	f000 fb42 	bl	8001ed8 <Error_Handler>
-  }
-  if (HAL_TIM_PWM_Init(&htim8) != HAL_OK)
- 8001854:	482c      	ldr	r0, [pc, #176]	; (8001908 <MX_TIM8_Init+0x14c>)
- 8001856:	f007 fa77 	bl	8008d48 <HAL_TIM_PWM_Init>
- 800185a:	4603      	mov	r3, r0
- 800185c:	2b00      	cmp	r3, #0
- 800185e:	d001      	beq.n	8001864 <MX_TIM8_Init+0xa8>
-  {
-    Error_Handler();
- 8001860:	f000 fb3a 	bl	8001ed8 <Error_Handler>
-  }
-  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 8001864:	2300      	movs	r3, #0
- 8001866:	64fb      	str	r3, [r7, #76]	; 0x4c
-  sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
- 8001868:	2300      	movs	r3, #0
- 800186a:	653b      	str	r3, [r7, #80]	; 0x50
-  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 800186c:	2300      	movs	r3, #0
- 800186e:	657b      	str	r3, [r7, #84]	; 0x54
-  if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
- 8001870:	f107 034c 	add.w	r3, r7, #76	; 0x4c
- 8001874:	4619      	mov	r1, r3
- 8001876:	4824      	ldr	r0, [pc, #144]	; (8001908 <MX_TIM8_Init+0x14c>)
- 8001878:	f008 fa16 	bl	8009ca8 <HAL_TIMEx_MasterConfigSynchronization>
- 800187c:	4603      	mov	r3, r0
- 800187e:	2b00      	cmp	r3, #0
- 8001880:	d001      	beq.n	8001886 <MX_TIM8_Init+0xca>
-  {
-    Error_Handler();
- 8001882:	f000 fb29 	bl	8001ed8 <Error_Handler>
-  }
-  sConfigOC.OCMode = TIM_OCMODE_PWM1;
- 8001886:	2360      	movs	r3, #96	; 0x60
- 8001888:	633b      	str	r3, [r7, #48]	; 0x30
-  sConfigOC.Pulse = 0;
- 800188a:	2300      	movs	r3, #0
- 800188c:	637b      	str	r3, [r7, #52]	; 0x34
-  sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 800188e:	2300      	movs	r3, #0
- 8001890:	63bb      	str	r3, [r7, #56]	; 0x38
-  sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 8001892:	2300      	movs	r3, #0
- 8001894:	643b      	str	r3, [r7, #64]	; 0x40
-  sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
- 8001896:	2300      	movs	r3, #0
- 8001898:	647b      	str	r3, [r7, #68]	; 0x44
-  sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
- 800189a:	2300      	movs	r3, #0
- 800189c:	64bb      	str	r3, [r7, #72]	; 0x48
-  if (HAL_TIM_PWM_ConfigChannel(&htim8, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
- 800189e:	f107 0330 	add.w	r3, r7, #48	; 0x30
- 80018a2:	220c      	movs	r2, #12
- 80018a4:	4619      	mov	r1, r3
- 80018a6:	4818      	ldr	r0, [pc, #96]	; (8001908 <MX_TIM8_Init+0x14c>)
- 80018a8:	f007 fba2 	bl	8008ff0 <HAL_TIM_PWM_ConfigChannel>
- 80018ac:	4603      	mov	r3, r0
- 80018ae:	2b00      	cmp	r3, #0
- 80018b0:	d001      	beq.n	80018b6 <MX_TIM8_Init+0xfa>
-  {
-    Error_Handler();
- 80018b2:	f000 fb11 	bl	8001ed8 <Error_Handler>
-  }
-  sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
- 80018b6:	2300      	movs	r3, #0
- 80018b8:	607b      	str	r3, [r7, #4]
-  sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
- 80018ba:	2300      	movs	r3, #0
- 80018bc:	60bb      	str	r3, [r7, #8]
-  sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
- 80018be:	2300      	movs	r3, #0
- 80018c0:	60fb      	str	r3, [r7, #12]
-  sBreakDeadTimeConfig.DeadTime = 0;
- 80018c2:	2300      	movs	r3, #0
- 80018c4:	613b      	str	r3, [r7, #16]
-  sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
- 80018c6:	2300      	movs	r3, #0
- 80018c8:	617b      	str	r3, [r7, #20]
-  sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
- 80018ca:	f44f 5300 	mov.w	r3, #8192	; 0x2000
- 80018ce:	61bb      	str	r3, [r7, #24]
-  sBreakDeadTimeConfig.BreakFilter = 0;
- 80018d0:	2300      	movs	r3, #0
- 80018d2:	61fb      	str	r3, [r7, #28]
-  sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
- 80018d4:	2300      	movs	r3, #0
- 80018d6:	623b      	str	r3, [r7, #32]
-  sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
- 80018d8:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
- 80018dc:	627b      	str	r3, [r7, #36]	; 0x24
-  sBreakDeadTimeConfig.Break2Filter = 0;
- 80018de:	2300      	movs	r3, #0
- 80018e0:	62bb      	str	r3, [r7, #40]	; 0x28
-  sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
- 80018e2:	2300      	movs	r3, #0
- 80018e4:	62fb      	str	r3, [r7, #44]	; 0x2c
-  if (HAL_TIMEx_ConfigBreakDeadTime(&htim8, &sBreakDeadTimeConfig) != HAL_OK)
- 80018e6:	1d3b      	adds	r3, r7, #4
- 80018e8:	4619      	mov	r1, r3
- 80018ea:	4807      	ldr	r0, [pc, #28]	; (8001908 <MX_TIM8_Init+0x14c>)
- 80018ec:	f008 fa6a 	bl	8009dc4 <HAL_TIMEx_ConfigBreakDeadTime>
- 80018f0:	4603      	mov	r3, r0
- 80018f2:	2b00      	cmp	r3, #0
- 80018f4:	d001      	beq.n	80018fa <MX_TIM8_Init+0x13e>
-  {
-    Error_Handler();
- 80018f6:	f000 faef 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN TIM8_Init 2 */
-
-  /* USER CODE END TIM8_Init 2 */
-  HAL_TIM_MspPostInit(&htim8);
- 80018fa:	4803      	ldr	r0, [pc, #12]	; (8001908 <MX_TIM8_Init+0x14c>)
- 80018fc:	f002 fb1e 	bl	8003f3c <HAL_TIM_MspPostInit>
-
-}
- 8001900:	bf00      	nop
- 8001902:	3768      	adds	r7, #104	; 0x68
- 8001904:	46bd      	mov	sp, r7
- 8001906:	bd80      	pop	{r7, pc}
- 8001908:	2000856c 	.word	0x2000856c
- 800190c:	40010400 	.word	0x40010400
-
-08001910 <MX_UART7_Init>:
-  * @brief UART7 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_UART7_Init(void)
-{
- 8001910:	b580      	push	{r7, lr}
- 8001912:	af00      	add	r7, sp, #0
-  /* USER CODE END UART7_Init 0 */
-
-  /* USER CODE BEGIN UART7_Init 1 */
-
-  /* USER CODE END UART7_Init 1 */
-  huart7.Instance = UART7;
- 8001914:	4b14      	ldr	r3, [pc, #80]	; (8001968 <MX_UART7_Init+0x58>)
- 8001916:	4a15      	ldr	r2, [pc, #84]	; (800196c <MX_UART7_Init+0x5c>)
- 8001918:	601a      	str	r2, [r3, #0]
-  huart7.Init.BaudRate = 115200;
- 800191a:	4b13      	ldr	r3, [pc, #76]	; (8001968 <MX_UART7_Init+0x58>)
- 800191c:	f44f 32e1 	mov.w	r2, #115200	; 0x1c200
- 8001920:	605a      	str	r2, [r3, #4]
-  huart7.Init.WordLength = UART_WORDLENGTH_8B;
- 8001922:	4b11      	ldr	r3, [pc, #68]	; (8001968 <MX_UART7_Init+0x58>)
- 8001924:	2200      	movs	r2, #0
- 8001926:	609a      	str	r2, [r3, #8]
-  huart7.Init.StopBits = UART_STOPBITS_1;
- 8001928:	4b0f      	ldr	r3, [pc, #60]	; (8001968 <MX_UART7_Init+0x58>)
- 800192a:	2200      	movs	r2, #0
- 800192c:	60da      	str	r2, [r3, #12]
-  huart7.Init.Parity = UART_PARITY_NONE;
- 800192e:	4b0e      	ldr	r3, [pc, #56]	; (8001968 <MX_UART7_Init+0x58>)
- 8001930:	2200      	movs	r2, #0
- 8001932:	611a      	str	r2, [r3, #16]
-  huart7.Init.Mode = UART_MODE_TX_RX;
- 8001934:	4b0c      	ldr	r3, [pc, #48]	; (8001968 <MX_UART7_Init+0x58>)
- 8001936:	220c      	movs	r2, #12
- 8001938:	615a      	str	r2, [r3, #20]
-  huart7.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 800193a:	4b0b      	ldr	r3, [pc, #44]	; (8001968 <MX_UART7_Init+0x58>)
- 800193c:	2200      	movs	r2, #0
- 800193e:	619a      	str	r2, [r3, #24]
-  huart7.Init.OverSampling = UART_OVERSAMPLING_16;
- 8001940:	4b09      	ldr	r3, [pc, #36]	; (8001968 <MX_UART7_Init+0x58>)
- 8001942:	2200      	movs	r2, #0
- 8001944:	61da      	str	r2, [r3, #28]
-  huart7.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 8001946:	4b08      	ldr	r3, [pc, #32]	; (8001968 <MX_UART7_Init+0x58>)
- 8001948:	2200      	movs	r2, #0
- 800194a:	621a      	str	r2, [r3, #32]
-  huart7.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 800194c:	4b06      	ldr	r3, [pc, #24]	; (8001968 <MX_UART7_Init+0x58>)
- 800194e:	2200      	movs	r2, #0
- 8001950:	625a      	str	r2, [r3, #36]	; 0x24
-  if (HAL_UART_Init(&huart7) != HAL_OK)
- 8001952:	4805      	ldr	r0, [pc, #20]	; (8001968 <MX_UART7_Init+0x58>)
- 8001954:	f008 fad2 	bl	8009efc <HAL_UART_Init>
- 8001958:	4603      	mov	r3, r0
- 800195a:	2b00      	cmp	r3, #0
- 800195c:	d001      	beq.n	8001962 <MX_UART7_Init+0x52>
-  {
-    Error_Handler();
- 800195e:	f000 fabb 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN UART7_Init 2 */
-
-  /* USER CODE END UART7_Init 2 */
-
-}
- 8001962:	bf00      	nop
- 8001964:	bd80      	pop	{r7, pc}
- 8001966:	bf00      	nop
- 8001968:	200084ec 	.word	0x200084ec
- 800196c:	40007800 	.word	0x40007800
-
-08001970 <MX_USART1_UART_Init>:
-  * @brief USART1 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_USART1_UART_Init(void)
-{
- 8001970:	b580      	push	{r7, lr}
- 8001972:	af00      	add	r7, sp, #0
-  /* USER CODE END USART1_Init 0 */
-
-  /* USER CODE BEGIN USART1_Init 1 */
-
-  /* USER CODE END USART1_Init 1 */
-  huart1.Instance = USART1;
- 8001974:	4b14      	ldr	r3, [pc, #80]	; (80019c8 <MX_USART1_UART_Init+0x58>)
- 8001976:	4a15      	ldr	r2, [pc, #84]	; (80019cc <MX_USART1_UART_Init+0x5c>)
- 8001978:	601a      	str	r2, [r3, #0]
-  huart1.Init.BaudRate = 115200;
- 800197a:	4b13      	ldr	r3, [pc, #76]	; (80019c8 <MX_USART1_UART_Init+0x58>)
- 800197c:	f44f 32e1 	mov.w	r2, #115200	; 0x1c200
- 8001980:	605a      	str	r2, [r3, #4]
-  huart1.Init.WordLength = UART_WORDLENGTH_8B;
- 8001982:	4b11      	ldr	r3, [pc, #68]	; (80019c8 <MX_USART1_UART_Init+0x58>)
- 8001984:	2200      	movs	r2, #0
- 8001986:	609a      	str	r2, [r3, #8]
-  huart1.Init.StopBits = UART_STOPBITS_1;
- 8001988:	4b0f      	ldr	r3, [pc, #60]	; (80019c8 <MX_USART1_UART_Init+0x58>)
- 800198a:	2200      	movs	r2, #0
- 800198c:	60da      	str	r2, [r3, #12]
-  huart1.Init.Parity = UART_PARITY_NONE;
- 800198e:	4b0e      	ldr	r3, [pc, #56]	; (80019c8 <MX_USART1_UART_Init+0x58>)
- 8001990:	2200      	movs	r2, #0
- 8001992:	611a      	str	r2, [r3, #16]
-  huart1.Init.Mode = UART_MODE_TX_RX;
- 8001994:	4b0c      	ldr	r3, [pc, #48]	; (80019c8 <MX_USART1_UART_Init+0x58>)
- 8001996:	220c      	movs	r2, #12
- 8001998:	615a      	str	r2, [r3, #20]
-  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 800199a:	4b0b      	ldr	r3, [pc, #44]	; (80019c8 <MX_USART1_UART_Init+0x58>)
- 800199c:	2200      	movs	r2, #0
- 800199e:	619a      	str	r2, [r3, #24]
-  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
- 80019a0:	4b09      	ldr	r3, [pc, #36]	; (80019c8 <MX_USART1_UART_Init+0x58>)
- 80019a2:	2200      	movs	r2, #0
- 80019a4:	61da      	str	r2, [r3, #28]
-  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 80019a6:	4b08      	ldr	r3, [pc, #32]	; (80019c8 <MX_USART1_UART_Init+0x58>)
- 80019a8:	2200      	movs	r2, #0
- 80019aa:	621a      	str	r2, [r3, #32]
-  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 80019ac:	4b06      	ldr	r3, [pc, #24]	; (80019c8 <MX_USART1_UART_Init+0x58>)
- 80019ae:	2200      	movs	r2, #0
- 80019b0:	625a      	str	r2, [r3, #36]	; 0x24
-  if (HAL_UART_Init(&huart1) != HAL_OK)
- 80019b2:	4805      	ldr	r0, [pc, #20]	; (80019c8 <MX_USART1_UART_Init+0x58>)
- 80019b4:	f008 faa2 	bl	8009efc <HAL_UART_Init>
- 80019b8:	4603      	mov	r3, r0
- 80019ba:	2b00      	cmp	r3, #0
- 80019bc:	d001      	beq.n	80019c2 <MX_USART1_UART_Init+0x52>
-  {
-    Error_Handler();
- 80019be:	f000 fa8b 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN USART1_Init 2 */
-
-  /* USER CODE END USART1_Init 2 */
-
-}
- 80019c2:	bf00      	nop
- 80019c4:	bd80      	pop	{r7, pc}
- 80019c6:	bf00      	nop
- 80019c8:	200087b0 	.word	0x200087b0
- 80019cc:	40011000 	.word	0x40011000
-
-080019d0 <MX_USART6_UART_Init>:
-  * @brief USART6 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_USART6_UART_Init(void)
-{
- 80019d0:	b580      	push	{r7, lr}
- 80019d2:	af00      	add	r7, sp, #0
-  /* USER CODE END USART6_Init 0 */
-
-  /* USER CODE BEGIN USART6_Init 1 */
-
-  /* USER CODE END USART6_Init 1 */
-  huart6.Instance = USART6;
- 80019d4:	4b14      	ldr	r3, [pc, #80]	; (8001a28 <MX_USART6_UART_Init+0x58>)
- 80019d6:	4a15      	ldr	r2, [pc, #84]	; (8001a2c <MX_USART6_UART_Init+0x5c>)
- 80019d8:	601a      	str	r2, [r3, #0]
-  huart6.Init.BaudRate = 115200;
- 80019da:	4b13      	ldr	r3, [pc, #76]	; (8001a28 <MX_USART6_UART_Init+0x58>)
- 80019dc:	f44f 32e1 	mov.w	r2, #115200	; 0x1c200
- 80019e0:	605a      	str	r2, [r3, #4]
-  huart6.Init.WordLength = UART_WORDLENGTH_8B;
- 80019e2:	4b11      	ldr	r3, [pc, #68]	; (8001a28 <MX_USART6_UART_Init+0x58>)
- 80019e4:	2200      	movs	r2, #0
- 80019e6:	609a      	str	r2, [r3, #8]
-  huart6.Init.StopBits = UART_STOPBITS_1;
- 80019e8:	4b0f      	ldr	r3, [pc, #60]	; (8001a28 <MX_USART6_UART_Init+0x58>)
- 80019ea:	2200      	movs	r2, #0
- 80019ec:	60da      	str	r2, [r3, #12]
-  huart6.Init.Parity = UART_PARITY_NONE;
- 80019ee:	4b0e      	ldr	r3, [pc, #56]	; (8001a28 <MX_USART6_UART_Init+0x58>)
- 80019f0:	2200      	movs	r2, #0
- 80019f2:	611a      	str	r2, [r3, #16]
-  huart6.Init.Mode = UART_MODE_TX_RX;
- 80019f4:	4b0c      	ldr	r3, [pc, #48]	; (8001a28 <MX_USART6_UART_Init+0x58>)
- 80019f6:	220c      	movs	r2, #12
- 80019f8:	615a      	str	r2, [r3, #20]
-  huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 80019fa:	4b0b      	ldr	r3, [pc, #44]	; (8001a28 <MX_USART6_UART_Init+0x58>)
- 80019fc:	2200      	movs	r2, #0
- 80019fe:	619a      	str	r2, [r3, #24]
-  huart6.Init.OverSampling = UART_OVERSAMPLING_16;
- 8001a00:	4b09      	ldr	r3, [pc, #36]	; (8001a28 <MX_USART6_UART_Init+0x58>)
- 8001a02:	2200      	movs	r2, #0
- 8001a04:	61da      	str	r2, [r3, #28]
-  huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 8001a06:	4b08      	ldr	r3, [pc, #32]	; (8001a28 <MX_USART6_UART_Init+0x58>)
- 8001a08:	2200      	movs	r2, #0
- 8001a0a:	621a      	str	r2, [r3, #32]
-  huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 8001a0c:	4b06      	ldr	r3, [pc, #24]	; (8001a28 <MX_USART6_UART_Init+0x58>)
- 8001a0e:	2200      	movs	r2, #0
- 8001a10:	625a      	str	r2, [r3, #36]	; 0x24
-  if (HAL_UART_Init(&huart6) != HAL_OK)
- 8001a12:	4805      	ldr	r0, [pc, #20]	; (8001a28 <MX_USART6_UART_Init+0x58>)
- 8001a14:	f008 fa72 	bl	8009efc <HAL_UART_Init>
- 8001a18:	4603      	mov	r3, r0
- 8001a1a:	2b00      	cmp	r3, #0
- 8001a1c:	d001      	beq.n	8001a22 <MX_USART6_UART_Init+0x52>
-  {
-    Error_Handler();
- 8001a1e:	f000 fa5b 	bl	8001ed8 <Error_Handler>
-  }
-  /* USER CODE BEGIN USART6_Init 2 */
-
-  /* USER CODE END USART6_Init 2 */
-
-}
- 8001a22:	bf00      	nop
- 8001a24:	bd80      	pop	{r7, pc}
- 8001a26:	bf00      	nop
- 8001a28:	200088a4 	.word	0x200088a4
- 8001a2c:	40011400 	.word	0x40011400
-
-08001a30 <MX_FMC_Init>:
-
-/* FMC initialization function */
-static void MX_FMC_Init(void)
-{
- 8001a30:	b580      	push	{r7, lr}
- 8001a32:	b088      	sub	sp, #32
- 8001a34:	af00      	add	r7, sp, #0
-
-  /* USER CODE BEGIN FMC_Init 0 */
-
-  /* USER CODE END FMC_Init 0 */
-
-  FMC_SDRAM_TimingTypeDef SdramTiming = {0};
- 8001a36:	1d3b      	adds	r3, r7, #4
- 8001a38:	2200      	movs	r2, #0
- 8001a3a:	601a      	str	r2, [r3, #0]
- 8001a3c:	605a      	str	r2, [r3, #4]
- 8001a3e:	609a      	str	r2, [r3, #8]
- 8001a40:	60da      	str	r2, [r3, #12]
- 8001a42:	611a      	str	r2, [r3, #16]
- 8001a44:	615a      	str	r2, [r3, #20]
- 8001a46:	619a      	str	r2, [r3, #24]
-
-  /* USER CODE END FMC_Init 1 */
-
-  /** Perform the SDRAM1 memory initialization sequence
-  */
-  hsdram1.Instance = FMC_SDRAM_DEVICE;
- 8001a48:	4b1e      	ldr	r3, [pc, #120]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001a4a:	4a1f      	ldr	r2, [pc, #124]	; (8001ac8 <MX_FMC_Init+0x98>)
- 8001a4c:	601a      	str	r2, [r3, #0]
-  /* hsdram1.Init */
-  hsdram1.Init.SDBank = FMC_SDRAM_BANK1;
- 8001a4e:	4b1d      	ldr	r3, [pc, #116]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001a50:	2200      	movs	r2, #0
- 8001a52:	605a      	str	r2, [r3, #4]
-  hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
- 8001a54:	4b1b      	ldr	r3, [pc, #108]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001a56:	2200      	movs	r2, #0
- 8001a58:	609a      	str	r2, [r3, #8]
-  hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
- 8001a5a:	4b1a      	ldr	r3, [pc, #104]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001a5c:	2204      	movs	r2, #4
- 8001a5e:	60da      	str	r2, [r3, #12]
-  hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;
- 8001a60:	4b18      	ldr	r3, [pc, #96]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001a62:	2210      	movs	r2, #16
- 8001a64:	611a      	str	r2, [r3, #16]
-  hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
- 8001a66:	4b17      	ldr	r3, [pc, #92]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001a68:	2240      	movs	r2, #64	; 0x40
- 8001a6a:	615a      	str	r2, [r3, #20]
-  hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_1;
- 8001a6c:	4b15      	ldr	r3, [pc, #84]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001a6e:	2280      	movs	r2, #128	; 0x80
- 8001a70:	619a      	str	r2, [r3, #24]
-  hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
- 8001a72:	4b14      	ldr	r3, [pc, #80]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001a74:	2200      	movs	r2, #0
- 8001a76:	61da      	str	r2, [r3, #28]
-  hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_DISABLE;
- 8001a78:	4b12      	ldr	r3, [pc, #72]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001a7a:	2200      	movs	r2, #0
- 8001a7c:	621a      	str	r2, [r3, #32]
-  hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
- 8001a7e:	4b11      	ldr	r3, [pc, #68]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001a80:	2200      	movs	r2, #0
- 8001a82:	625a      	str	r2, [r3, #36]	; 0x24
-  hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
- 8001a84:	4b0f      	ldr	r3, [pc, #60]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001a86:	2200      	movs	r2, #0
- 8001a88:	629a      	str	r2, [r3, #40]	; 0x28
-  /* SdramTiming */
-  SdramTiming.LoadToActiveDelay = 16;
- 8001a8a:	2310      	movs	r3, #16
- 8001a8c:	607b      	str	r3, [r7, #4]
-  SdramTiming.ExitSelfRefreshDelay = 16;
- 8001a8e:	2310      	movs	r3, #16
- 8001a90:	60bb      	str	r3, [r7, #8]
-  SdramTiming.SelfRefreshTime = 16;
- 8001a92:	2310      	movs	r3, #16
- 8001a94:	60fb      	str	r3, [r7, #12]
-  SdramTiming.RowCycleDelay = 16;
- 8001a96:	2310      	movs	r3, #16
- 8001a98:	613b      	str	r3, [r7, #16]
-  SdramTiming.WriteRecoveryTime = 16;
- 8001a9a:	2310      	movs	r3, #16
- 8001a9c:	617b      	str	r3, [r7, #20]
-  SdramTiming.RPDelay = 16;
- 8001a9e:	2310      	movs	r3, #16
- 8001aa0:	61bb      	str	r3, [r7, #24]
-  SdramTiming.RCDDelay = 16;
- 8001aa2:	2310      	movs	r3, #16
- 8001aa4:	61fb      	str	r3, [r7, #28]
-
-  if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
- 8001aa6:	1d3b      	adds	r3, r7, #4
- 8001aa8:	4619      	mov	r1, r3
- 8001aaa:	4806      	ldr	r0, [pc, #24]	; (8001ac4 <MX_FMC_Init+0x94>)
- 8001aac:	f006 ffe6 	bl	8008a7c <HAL_SDRAM_Init>
- 8001ab0:	4603      	mov	r3, r0
- 8001ab2:	2b00      	cmp	r3, #0
- 8001ab4:	d001      	beq.n	8001aba <MX_FMC_Init+0x8a>
-  {
-    Error_Handler( );
- 8001ab6:	f000 fa0f 	bl	8001ed8 <Error_Handler>
-  }
-
-  /* USER CODE BEGIN FMC_Init 2 */
-
-  /* USER CODE END FMC_Init 2 */
-}
- 8001aba:	bf00      	nop
- 8001abc:	3720      	adds	r7, #32
- 8001abe:	46bd      	mov	sp, r7
- 8001ac0:	bd80      	pop	{r7, pc}
- 8001ac2:	bf00      	nop
- 8001ac4:	200089a4 	.word	0x200089a4
- 8001ac8:	a0000140 	.word	0xa0000140
-
-08001acc <MX_GPIO_Init>:
-  * @brief GPIO Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_GPIO_Init(void)
-{
- 8001acc:	b580      	push	{r7, lr}
- 8001ace:	b090      	sub	sp, #64	; 0x40
- 8001ad0:	af00      	add	r7, sp, #0
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8001ad2:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001ad6:	2200      	movs	r2, #0
- 8001ad8:	601a      	str	r2, [r3, #0]
- 8001ada:	605a      	str	r2, [r3, #4]
- 8001adc:	609a      	str	r2, [r3, #8]
- 8001ade:	60da      	str	r2, [r3, #12]
- 8001ae0:	611a      	str	r2, [r3, #16]
-
-  /* GPIO Ports Clock Enable */
-  __HAL_RCC_GPIOE_CLK_ENABLE();
- 8001ae2:	4bb0      	ldr	r3, [pc, #704]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001ae4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001ae6:	4aaf      	ldr	r2, [pc, #700]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001ae8:	f043 0310 	orr.w	r3, r3, #16
- 8001aec:	6313      	str	r3, [r2, #48]	; 0x30
- 8001aee:	4bad      	ldr	r3, [pc, #692]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001af0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001af2:	f003 0310 	and.w	r3, r3, #16
- 8001af6:	62bb      	str	r3, [r7, #40]	; 0x28
- 8001af8:	6abb      	ldr	r3, [r7, #40]	; 0x28
-  __HAL_RCC_GPIOB_CLK_ENABLE();
- 8001afa:	4baa      	ldr	r3, [pc, #680]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001afc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001afe:	4aa9      	ldr	r2, [pc, #676]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b00:	f043 0302 	orr.w	r3, r3, #2
- 8001b04:	6313      	str	r3, [r2, #48]	; 0x30
- 8001b06:	4ba7      	ldr	r3, [pc, #668]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b08:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b0a:	f003 0302 	and.w	r3, r3, #2
- 8001b0e:	627b      	str	r3, [r7, #36]	; 0x24
- 8001b10:	6a7b      	ldr	r3, [r7, #36]	; 0x24
-  __HAL_RCC_GPIOA_CLK_ENABLE();
- 8001b12:	4ba4      	ldr	r3, [pc, #656]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b14:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b16:	4aa3      	ldr	r2, [pc, #652]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b18:	f043 0301 	orr.w	r3, r3, #1
- 8001b1c:	6313      	str	r3, [r2, #48]	; 0x30
- 8001b1e:	4ba1      	ldr	r3, [pc, #644]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b20:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b22:	f003 0301 	and.w	r3, r3, #1
- 8001b26:	623b      	str	r3, [r7, #32]
- 8001b28:	6a3b      	ldr	r3, [r7, #32]
-  __HAL_RCC_GPIOG_CLK_ENABLE();
- 8001b2a:	4b9e      	ldr	r3, [pc, #632]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b2c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b2e:	4a9d      	ldr	r2, [pc, #628]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b30:	f043 0340 	orr.w	r3, r3, #64	; 0x40
- 8001b34:	6313      	str	r3, [r2, #48]	; 0x30
- 8001b36:	4b9b      	ldr	r3, [pc, #620]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b38:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b3a:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 8001b3e:	61fb      	str	r3, [r7, #28]
- 8001b40:	69fb      	ldr	r3, [r7, #28]
-  __HAL_RCC_GPIOJ_CLK_ENABLE();
- 8001b42:	4b98      	ldr	r3, [pc, #608]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b44:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b46:	4a97      	ldr	r2, [pc, #604]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b48:	f443 7300 	orr.w	r3, r3, #512	; 0x200
- 8001b4c:	6313      	str	r3, [r2, #48]	; 0x30
- 8001b4e:	4b95      	ldr	r3, [pc, #596]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b50:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b52:	f403 7300 	and.w	r3, r3, #512	; 0x200
- 8001b56:	61bb      	str	r3, [r7, #24]
- 8001b58:	69bb      	ldr	r3, [r7, #24]
-  __HAL_RCC_GPIOD_CLK_ENABLE();
- 8001b5a:	4b92      	ldr	r3, [pc, #584]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b5c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b5e:	4a91      	ldr	r2, [pc, #580]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b60:	f043 0308 	orr.w	r3, r3, #8
- 8001b64:	6313      	str	r3, [r2, #48]	; 0x30
- 8001b66:	4b8f      	ldr	r3, [pc, #572]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b68:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b6a:	f003 0308 	and.w	r3, r3, #8
- 8001b6e:	617b      	str	r3, [r7, #20]
- 8001b70:	697b      	ldr	r3, [r7, #20]
-  __HAL_RCC_GPIOI_CLK_ENABLE();
- 8001b72:	4b8c      	ldr	r3, [pc, #560]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b74:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b76:	4a8b      	ldr	r2, [pc, #556]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b78:	f443 7380 	orr.w	r3, r3, #256	; 0x100
- 8001b7c:	6313      	str	r3, [r2, #48]	; 0x30
- 8001b7e:	4b89      	ldr	r3, [pc, #548]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b80:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b82:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 8001b86:	613b      	str	r3, [r7, #16]
- 8001b88:	693b      	ldr	r3, [r7, #16]
-  __HAL_RCC_GPIOK_CLK_ENABLE();
- 8001b8a:	4b86      	ldr	r3, [pc, #536]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b8c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b8e:	4a85      	ldr	r2, [pc, #532]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b90:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
- 8001b94:	6313      	str	r3, [r2, #48]	; 0x30
- 8001b96:	4b83      	ldr	r3, [pc, #524]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001b98:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001b9a:	f403 6380 	and.w	r3, r3, #1024	; 0x400
- 8001b9e:	60fb      	str	r3, [r7, #12]
- 8001ba0:	68fb      	ldr	r3, [r7, #12]
-  __HAL_RCC_GPIOC_CLK_ENABLE();
- 8001ba2:	4b80      	ldr	r3, [pc, #512]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001ba4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001ba6:	4a7f      	ldr	r2, [pc, #508]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001ba8:	f043 0304 	orr.w	r3, r3, #4
- 8001bac:	6313      	str	r3, [r2, #48]	; 0x30
- 8001bae:	4b7d      	ldr	r3, [pc, #500]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001bb0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001bb2:	f003 0304 	and.w	r3, r3, #4
- 8001bb6:	60bb      	str	r3, [r7, #8]
- 8001bb8:	68bb      	ldr	r3, [r7, #8]
-  __HAL_RCC_GPIOF_CLK_ENABLE();
- 8001bba:	4b7a      	ldr	r3, [pc, #488]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001bbc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001bbe:	4a79      	ldr	r2, [pc, #484]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001bc0:	f043 0320 	orr.w	r3, r3, #32
- 8001bc4:	6313      	str	r3, [r2, #48]	; 0x30
- 8001bc6:	4b77      	ldr	r3, [pc, #476]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001bc8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001bca:	f003 0320 	and.w	r3, r3, #32
- 8001bce:	607b      	str	r3, [r7, #4]
- 8001bd0:	687b      	ldr	r3, [r7, #4]
-  __HAL_RCC_GPIOH_CLK_ENABLE();
- 8001bd2:	4b74      	ldr	r3, [pc, #464]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001bd4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001bd6:	4a73      	ldr	r2, [pc, #460]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001bd8:	f043 0380 	orr.w	r3, r3, #128	; 0x80
- 8001bdc:	6313      	str	r3, [r2, #48]	; 0x30
- 8001bde:	4b71      	ldr	r3, [pc, #452]	; (8001da4 <MX_GPIO_Init+0x2d8>)
- 8001be0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001be2:	f003 0380 	and.w	r3, r3, #128	; 0x80
- 8001be6:	603b      	str	r3, [r7, #0]
- 8001be8:	683b      	ldr	r3, [r7, #0]
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOE, LED14_Pin|LED15_Pin, GPIO_PIN_RESET);
- 8001bea:	2200      	movs	r2, #0
- 8001bec:	2160      	movs	r1, #96	; 0x60
- 8001bee:	486e      	ldr	r0, [pc, #440]	; (8001da8 <MX_GPIO_Init+0x2dc>)
- 8001bf0:	f004 f94a 	bl	8005e88 <HAL_GPIO_WritePin>
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(OTG_FS_PowerSwitchOn_GPIO_Port, OTG_FS_PowerSwitchOn_Pin, GPIO_PIN_SET);
- 8001bf4:	2201      	movs	r2, #1
- 8001bf6:	2120      	movs	r1, #32
- 8001bf8:	486c      	ldr	r0, [pc, #432]	; (8001dac <MX_GPIO_Init+0x2e0>)
- 8001bfa:	f004 f945 	bl	8005e88 <HAL_GPIO_WritePin>
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(LED16_GPIO_Port, LED16_Pin, GPIO_PIN_RESET);
- 8001bfe:	2200      	movs	r2, #0
- 8001c00:	2108      	movs	r1, #8
- 8001c02:	486a      	ldr	r0, [pc, #424]	; (8001dac <MX_GPIO_Init+0x2e0>)
- 8001c04:	f004 f940 	bl	8005e88 <HAL_GPIO_WritePin>
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(LED3_GPIO_Port, LED3_Pin, GPIO_PIN_RESET);
- 8001c08:	2200      	movs	r2, #0
- 8001c0a:	2108      	movs	r1, #8
- 8001c0c:	4868      	ldr	r0, [pc, #416]	; (8001db0 <MX_GPIO_Init+0x2e4>)
- 8001c0e:	f004 f93b 	bl	8005e88 <HAL_GPIO_WritePin>
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(LCD_BL_CTRL_GPIO_Port, LCD_BL_CTRL_Pin, GPIO_PIN_SET);
- 8001c12:	2201      	movs	r2, #1
- 8001c14:	2108      	movs	r1, #8
- 8001c16:	4867      	ldr	r0, [pc, #412]	; (8001db4 <MX_GPIO_Init+0x2e8>)
- 8001c18:	f004 f936 	bl	8005e88 <HAL_GPIO_WritePin>
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(LCD_DISP_GPIO_Port, LCD_DISP_Pin, GPIO_PIN_SET);
- 8001c1c:	2201      	movs	r2, #1
- 8001c1e:	f44f 5180 	mov.w	r1, #4096	; 0x1000
- 8001c22:	4863      	ldr	r0, [pc, #396]	; (8001db0 <MX_GPIO_Init+0x2e4>)
- 8001c24:	f004 f930 	bl	8005e88 <HAL_GPIO_WritePin>
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOH, LED13_Pin|LED17_Pin|LED11_Pin|LED12_Pin
- 8001c28:	2200      	movs	r2, #0
- 8001c2a:	f645 6140 	movw	r1, #24128	; 0x5e40
- 8001c2e:	4862      	ldr	r0, [pc, #392]	; (8001db8 <MX_GPIO_Init+0x2ec>)
- 8001c30:	f004 f92a 	bl	8005e88 <HAL_GPIO_WritePin>
-                          |LED2_Pin|LED18_Pin, GPIO_PIN_RESET);
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(EXT_RST_GPIO_Port, EXT_RST_Pin, GPIO_PIN_RESET);
- 8001c34:	2200      	movs	r2, #0
- 8001c36:	2108      	movs	r1, #8
- 8001c38:	4860      	ldr	r0, [pc, #384]	; (8001dbc <MX_GPIO_Init+0x2f0>)
- 8001c3a:	f004 f925 	bl	8005e88 <HAL_GPIO_WritePin>
-
-  /*Configure GPIO pin : PE3 */
-  GPIO_InitStruct.Pin = GPIO_PIN_3;
- 8001c3e:	2308      	movs	r3, #8
- 8001c40:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8001c42:	2300      	movs	r3, #0
- 8001c44:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001c46:	2300      	movs	r3, #0
- 8001c48:	637b      	str	r3, [r7, #52]	; 0x34
-  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 8001c4a:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001c4e:	4619      	mov	r1, r3
- 8001c50:	4855      	ldr	r0, [pc, #340]	; (8001da8 <MX_GPIO_Init+0x2dc>)
- 8001c52:	f003 fe4d 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pins : ULPI_D7_Pin ULPI_D6_Pin ULPI_D5_Pin ULPI_D2_Pin
-                           ULPI_D1_Pin ULPI_D4_Pin */
-  GPIO_InitStruct.Pin = ULPI_D7_Pin|ULPI_D6_Pin|ULPI_D5_Pin|ULPI_D2_Pin
- 8001c56:	f643 0323 	movw	r3, #14371	; 0x3823
- 8001c5a:	62fb      	str	r3, [r7, #44]	; 0x2c
-                          |ULPI_D1_Pin|ULPI_D4_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8001c5c:	2302      	movs	r3, #2
- 8001c5e:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001c60:	2300      	movs	r3, #0
- 8001c62:	637b      	str	r3, [r7, #52]	; 0x34
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8001c64:	2303      	movs	r3, #3
- 8001c66:	63bb      	str	r3, [r7, #56]	; 0x38
-  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
- 8001c68:	230a      	movs	r3, #10
- 8001c6a:	63fb      	str	r3, [r7, #60]	; 0x3c
-  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8001c6c:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001c70:	4619      	mov	r1, r3
- 8001c72:	4853      	ldr	r0, [pc, #332]	; (8001dc0 <MX_GPIO_Init+0x2f4>)
- 8001c74:	f003 fe3c 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pins : BP2_Pin BP1_Pin */
-  GPIO_InitStruct.Pin = BP2_Pin|BP1_Pin;
- 8001c78:	f44f 4301 	mov.w	r3, #33024	; 0x8100
- 8001c7c:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8001c7e:	2300      	movs	r3, #0
- 8001c80:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001c82:	2300      	movs	r3, #0
- 8001c84:	637b      	str	r3, [r7, #52]	; 0x34
-  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8001c86:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001c8a:	4619      	mov	r1, r3
- 8001c8c:	484d      	ldr	r0, [pc, #308]	; (8001dc4 <MX_GPIO_Init+0x2f8>)
- 8001c8e:	f003 fe2f 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pins : LED14_Pin LED15_Pin */
-  GPIO_InitStruct.Pin = LED14_Pin|LED15_Pin;
- 8001c92:	2360      	movs	r3, #96	; 0x60
- 8001c94:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8001c96:	2301      	movs	r3, #1
- 8001c98:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001c9a:	2300      	movs	r3, #0
- 8001c9c:	637b      	str	r3, [r7, #52]	; 0x34
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8001c9e:	2300      	movs	r3, #0
- 8001ca0:	63bb      	str	r3, [r7, #56]	; 0x38
-  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 8001ca2:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001ca6:	4619      	mov	r1, r3
- 8001ca8:	483f      	ldr	r0, [pc, #252]	; (8001da8 <MX_GPIO_Init+0x2dc>)
- 8001caa:	f003 fe21 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pin : OTG_FS_VBUS_Pin */
-  GPIO_InitStruct.Pin = OTG_FS_VBUS_Pin;
- 8001cae:	f44f 5380 	mov.w	r3, #4096	; 0x1000
- 8001cb2:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8001cb4:	2300      	movs	r3, #0
- 8001cb6:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001cb8:	2300      	movs	r3, #0
- 8001cba:	637b      	str	r3, [r7, #52]	; 0x34
-  HAL_GPIO_Init(OTG_FS_VBUS_GPIO_Port, &GPIO_InitStruct);
- 8001cbc:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001cc0:	4619      	mov	r1, r3
- 8001cc2:	4841      	ldr	r0, [pc, #260]	; (8001dc8 <MX_GPIO_Init+0x2fc>)
- 8001cc4:	f003 fe14 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pin : Audio_INT_Pin */
-  GPIO_InitStruct.Pin = Audio_INT_Pin;
- 8001cc8:	2340      	movs	r3, #64	; 0x40
- 8001cca:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
- 8001ccc:	4b3f      	ldr	r3, [pc, #252]	; (8001dcc <MX_GPIO_Init+0x300>)
- 8001cce:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001cd0:	2300      	movs	r3, #0
- 8001cd2:	637b      	str	r3, [r7, #52]	; 0x34
-  HAL_GPIO_Init(Audio_INT_GPIO_Port, &GPIO_InitStruct);
- 8001cd4:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001cd8:	4619      	mov	r1, r3
- 8001cda:	4834      	ldr	r0, [pc, #208]	; (8001dac <MX_GPIO_Init+0x2e0>)
- 8001cdc:	f003 fe08 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pins : OTG_FS_PowerSwitchOn_Pin LED16_Pin */
-  GPIO_InitStruct.Pin = OTG_FS_PowerSwitchOn_Pin|LED16_Pin;
- 8001ce0:	2328      	movs	r3, #40	; 0x28
- 8001ce2:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8001ce4:	2301      	movs	r3, #1
- 8001ce6:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001ce8:	2300      	movs	r3, #0
- 8001cea:	637b      	str	r3, [r7, #52]	; 0x34
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8001cec:	2300      	movs	r3, #0
- 8001cee:	63bb      	str	r3, [r7, #56]	; 0x38
-  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- 8001cf0:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001cf4:	4619      	mov	r1, r3
- 8001cf6:	482d      	ldr	r0, [pc, #180]	; (8001dac <MX_GPIO_Init+0x2e0>)
- 8001cf8:	f003 fdfa 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pins : LED3_Pin LCD_DISP_Pin */
-  GPIO_InitStruct.Pin = LED3_Pin|LCD_DISP_Pin;
- 8001cfc:	f241 0308 	movw	r3, #4104	; 0x1008
- 8001d00:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8001d02:	2301      	movs	r3, #1
- 8001d04:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001d06:	2300      	movs	r3, #0
- 8001d08:	637b      	str	r3, [r7, #52]	; 0x34
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8001d0a:	2300      	movs	r3, #0
- 8001d0c:	63bb      	str	r3, [r7, #56]	; 0x38
-  HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
- 8001d0e:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001d12:	4619      	mov	r1, r3
- 8001d14:	4826      	ldr	r0, [pc, #152]	; (8001db0 <MX_GPIO_Init+0x2e4>)
- 8001d16:	f003 fdeb 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pin : uSD_Detect_Pin */
-  GPIO_InitStruct.Pin = uSD_Detect_Pin;
- 8001d1a:	f44f 5300 	mov.w	r3, #8192	; 0x2000
- 8001d1e:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8001d20:	2300      	movs	r3, #0
- 8001d22:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001d24:	2300      	movs	r3, #0
- 8001d26:	637b      	str	r3, [r7, #52]	; 0x34
-  HAL_GPIO_Init(uSD_Detect_GPIO_Port, &GPIO_InitStruct);
- 8001d28:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001d2c:	4619      	mov	r1, r3
- 8001d2e:	4828      	ldr	r0, [pc, #160]	; (8001dd0 <MX_GPIO_Init+0x304>)
- 8001d30:	f003 fdde 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pin : LCD_BL_CTRL_Pin */
-  GPIO_InitStruct.Pin = LCD_BL_CTRL_Pin;
- 8001d34:	2308      	movs	r3, #8
- 8001d36:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8001d38:	2301      	movs	r3, #1
- 8001d3a:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001d3c:	2300      	movs	r3, #0
- 8001d3e:	637b      	str	r3, [r7, #52]	; 0x34
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8001d40:	2300      	movs	r3, #0
- 8001d42:	63bb      	str	r3, [r7, #56]	; 0x38
-  HAL_GPIO_Init(LCD_BL_CTRL_GPIO_Port, &GPIO_InitStruct);
- 8001d44:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001d48:	4619      	mov	r1, r3
- 8001d4a:	481a      	ldr	r0, [pc, #104]	; (8001db4 <MX_GPIO_Init+0x2e8>)
- 8001d4c:	f003 fdd0 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pin : OTG_FS_OverCurrent_Pin */
-  GPIO_InitStruct.Pin = OTG_FS_OverCurrent_Pin;
- 8001d50:	2310      	movs	r3, #16
- 8001d52:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8001d54:	2300      	movs	r3, #0
- 8001d56:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001d58:	2300      	movs	r3, #0
- 8001d5a:	637b      	str	r3, [r7, #52]	; 0x34
-  HAL_GPIO_Init(OTG_FS_OverCurrent_GPIO_Port, &GPIO_InitStruct);
- 8001d5c:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001d60:	4619      	mov	r1, r3
- 8001d62:	4812      	ldr	r0, [pc, #72]	; (8001dac <MX_GPIO_Init+0x2e0>)
- 8001d64:	f003 fdc4 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pins : TP3_Pin NC2_Pin */
-  GPIO_InitStruct.Pin = TP3_Pin|NC2_Pin;
- 8001d68:	f248 0304 	movw	r3, #32772	; 0x8004
- 8001d6c:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8001d6e:	2300      	movs	r3, #0
- 8001d70:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001d72:	2300      	movs	r3, #0
- 8001d74:	637b      	str	r3, [r7, #52]	; 0x34
-  HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
- 8001d76:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001d7a:	4619      	mov	r1, r3
- 8001d7c:	480e      	ldr	r0, [pc, #56]	; (8001db8 <MX_GPIO_Init+0x2ec>)
- 8001d7e:	f003 fdb7 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pins : LED13_Pin LED17_Pin LED11_Pin LED12_Pin
-                           LED2_Pin LED18_Pin */
-  GPIO_InitStruct.Pin = LED13_Pin|LED17_Pin|LED11_Pin|LED12_Pin
- 8001d82:	f645 6340 	movw	r3, #24128	; 0x5e40
- 8001d86:	62fb      	str	r3, [r7, #44]	; 0x2c
-                          |LED2_Pin|LED18_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8001d88:	2301      	movs	r3, #1
- 8001d8a:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001d8c:	2300      	movs	r3, #0
- 8001d8e:	637b      	str	r3, [r7, #52]	; 0x34
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8001d90:	2300      	movs	r3, #0
- 8001d92:	63bb      	str	r3, [r7, #56]	; 0x38
-  HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
- 8001d94:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001d98:	4619      	mov	r1, r3
- 8001d9a:	4807      	ldr	r0, [pc, #28]	; (8001db8 <MX_GPIO_Init+0x2ec>)
- 8001d9c:	f003 fda8 	bl	80058f0 <HAL_GPIO_Init>
- 8001da0:	e018      	b.n	8001dd4 <MX_GPIO_Init+0x308>
- 8001da2:	bf00      	nop
- 8001da4:	40023800 	.word	0x40023800
- 8001da8:	40021000 	.word	0x40021000
- 8001dac:	40020c00 	.word	0x40020c00
- 8001db0:	40022000 	.word	0x40022000
- 8001db4:	40022800 	.word	0x40022800
- 8001db8:	40021c00 	.word	0x40021c00
- 8001dbc:	40021800 	.word	0x40021800
- 8001dc0:	40020400 	.word	0x40020400
- 8001dc4:	40020000 	.word	0x40020000
- 8001dc8:	40022400 	.word	0x40022400
- 8001dcc:	10120000 	.word	0x10120000
- 8001dd0:	40020800 	.word	0x40020800
-
-  /*Configure GPIO pin : LCD_INT_Pin */
-  GPIO_InitStruct.Pin = LCD_INT_Pin;
- 8001dd4:	f44f 5300 	mov.w	r3, #8192	; 0x2000
- 8001dd8:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
- 8001dda:	4b2c      	ldr	r3, [pc, #176]	; (8001e8c <MX_GPIO_Init+0x3c0>)
- 8001ddc:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001dde:	2300      	movs	r3, #0
- 8001de0:	637b      	str	r3, [r7, #52]	; 0x34
-  HAL_GPIO_Init(LCD_INT_GPIO_Port, &GPIO_InitStruct);
- 8001de2:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001de6:	4619      	mov	r1, r3
- 8001de8:	4829      	ldr	r0, [pc, #164]	; (8001e90 <MX_GPIO_Init+0x3c4>)
- 8001dea:	f003 fd81 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pin : ULPI_NXT_Pin */
-  GPIO_InitStruct.Pin = ULPI_NXT_Pin;
- 8001dee:	2310      	movs	r3, #16
- 8001df0:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8001df2:	2302      	movs	r3, #2
- 8001df4:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001df6:	2300      	movs	r3, #0
- 8001df8:	637b      	str	r3, [r7, #52]	; 0x34
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8001dfa:	2303      	movs	r3, #3
- 8001dfc:	63bb      	str	r3, [r7, #56]	; 0x38
-  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
- 8001dfe:	230a      	movs	r3, #10
- 8001e00:	63fb      	str	r3, [r7, #60]	; 0x3c
-  HAL_GPIO_Init(ULPI_NXT_GPIO_Port, &GPIO_InitStruct);
- 8001e02:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001e06:	4619      	mov	r1, r3
- 8001e08:	4822      	ldr	r0, [pc, #136]	; (8001e94 <MX_GPIO_Init+0x3c8>)
- 8001e0a:	f003 fd71 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pins : BP_JOYSTICK_Pin RMII_RXER_Pin */
-  GPIO_InitStruct.Pin = BP_JOYSTICK_Pin|RMII_RXER_Pin;
- 8001e0e:	2384      	movs	r3, #132	; 0x84
- 8001e10:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8001e12:	2300      	movs	r3, #0
- 8001e14:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001e16:	2300      	movs	r3, #0
- 8001e18:	637b      	str	r3, [r7, #52]	; 0x34
-  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
- 8001e1a:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001e1e:	4619      	mov	r1, r3
- 8001e20:	481d      	ldr	r0, [pc, #116]	; (8001e98 <MX_GPIO_Init+0x3cc>)
- 8001e22:	f003 fd65 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pins : ULPI_STP_Pin ULPI_DIR_Pin */
-  GPIO_InitStruct.Pin = ULPI_STP_Pin|ULPI_DIR_Pin;
- 8001e26:	2305      	movs	r3, #5
- 8001e28:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8001e2a:	2302      	movs	r3, #2
- 8001e2c:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001e2e:	2300      	movs	r3, #0
- 8001e30:	637b      	str	r3, [r7, #52]	; 0x34
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8001e32:	2303      	movs	r3, #3
- 8001e34:	63bb      	str	r3, [r7, #56]	; 0x38
-  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
- 8001e36:	230a      	movs	r3, #10
- 8001e38:	63fb      	str	r3, [r7, #60]	; 0x3c
-  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 8001e3a:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001e3e:	4619      	mov	r1, r3
- 8001e40:	4816      	ldr	r0, [pc, #88]	; (8001e9c <MX_GPIO_Init+0x3d0>)
- 8001e42:	f003 fd55 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pin : EXT_RST_Pin */
-  GPIO_InitStruct.Pin = EXT_RST_Pin;
- 8001e46:	2308      	movs	r3, #8
- 8001e48:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8001e4a:	2301      	movs	r3, #1
- 8001e4c:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001e4e:	2300      	movs	r3, #0
- 8001e50:	637b      	str	r3, [r7, #52]	; 0x34
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8001e52:	2300      	movs	r3, #0
- 8001e54:	63bb      	str	r3, [r7, #56]	; 0x38
-  HAL_GPIO_Init(EXT_RST_GPIO_Port, &GPIO_InitStruct);
- 8001e56:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001e5a:	4619      	mov	r1, r3
- 8001e5c:	480e      	ldr	r0, [pc, #56]	; (8001e98 <MX_GPIO_Init+0x3cc>)
- 8001e5e:	f003 fd47 	bl	80058f0 <HAL_GPIO_Init>
-
-  /*Configure GPIO pins : ULPI_CLK_Pin ULPI_D0_Pin */
-  GPIO_InitStruct.Pin = ULPI_CLK_Pin|ULPI_D0_Pin;
- 8001e62:	2328      	movs	r3, #40	; 0x28
- 8001e64:	62fb      	str	r3, [r7, #44]	; 0x2c
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8001e66:	2302      	movs	r3, #2
- 8001e68:	633b      	str	r3, [r7, #48]	; 0x30
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001e6a:	2300      	movs	r3, #0
- 8001e6c:	637b      	str	r3, [r7, #52]	; 0x34
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8001e6e:	2303      	movs	r3, #3
- 8001e70:	63bb      	str	r3, [r7, #56]	; 0x38
-  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
- 8001e72:	230a      	movs	r3, #10
- 8001e74:	63fb      	str	r3, [r7, #60]	; 0x3c
-  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8001e76:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8001e7a:	4619      	mov	r1, r3
- 8001e7c:	4808      	ldr	r0, [pc, #32]	; (8001ea0 <MX_GPIO_Init+0x3d4>)
- 8001e7e:	f003 fd37 	bl	80058f0 <HAL_GPIO_Init>
-
-}
- 8001e82:	bf00      	nop
- 8001e84:	3740      	adds	r7, #64	; 0x40
- 8001e86:	46bd      	mov	sp, r7
- 8001e88:	bd80      	pop	{r7, pc}
- 8001e8a:	bf00      	nop
- 8001e8c:	10120000 	.word	0x10120000
- 8001e90:	40022000 	.word	0x40022000
- 8001e94:	40021c00 	.word	0x40021c00
- 8001e98:	40021800 	.word	0x40021800
- 8001e9c:	40020800 	.word	0x40020800
- 8001ea0:	40020000 	.word	0x40020000
-
-08001ea4 <StartDefaultTask>:
-  * @param  argument: Not used
-  * @retval None
-  */
-/* USER CODE END Header_StartDefaultTask */
-void StartDefaultTask(void const * argument)
-{
- 8001ea4:	b580      	push	{r7, lr}
- 8001ea6:	b082      	sub	sp, #8
- 8001ea8:	af00      	add	r7, sp, #0
- 8001eaa:	6078      	str	r0, [r7, #4]
-  /* USER CODE BEGIN 5 */
-  /* Infinite loop */
-  for(;;)
-  {
-    osDelay(1);
- 8001eac:	2001      	movs	r0, #1
- 8001eae:	f008 fdf3 	bl	800aa98 <osDelay>
- 8001eb2:	e7fb      	b.n	8001eac <StartDefaultTask+0x8>
-
-08001eb4 <HAL_TIM_PeriodElapsedCallback>:
-  * a global variable "uwTick" used as application time base.
-  * @param  htim : TIM handle
-  * @retval None
-  */
-void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
-{
- 8001eb4:	b580      	push	{r7, lr}
- 8001eb6:	b082      	sub	sp, #8
- 8001eb8:	af00      	add	r7, sp, #0
- 8001eba:	6078      	str	r0, [r7, #4]
-  /* USER CODE BEGIN Callback 0 */
-
-  /* USER CODE END Callback 0 */
-  if (htim->Instance == TIM6) {
- 8001ebc:	687b      	ldr	r3, [r7, #4]
- 8001ebe:	681b      	ldr	r3, [r3, #0]
- 8001ec0:	4a04      	ldr	r2, [pc, #16]	; (8001ed4 <HAL_TIM_PeriodElapsedCallback+0x20>)
- 8001ec2:	4293      	cmp	r3, r2
- 8001ec4:	d101      	bne.n	8001eca <HAL_TIM_PeriodElapsedCallback+0x16>
-    HAL_IncTick();
- 8001ec6:	f002 faff 	bl	80044c8 <HAL_IncTick>
-  }
-  /* USER CODE BEGIN Callback 1 */
-
-  /* USER CODE END Callback 1 */
-}
- 8001eca:	bf00      	nop
- 8001ecc:	3708      	adds	r7, #8
- 8001ece:	46bd      	mov	sp, r7
- 8001ed0:	bd80      	pop	{r7, pc}
- 8001ed2:	bf00      	nop
- 8001ed4:	40001000 	.word	0x40001000
-
-08001ed8 <Error_Handler>:
-/**
-  * @brief  This function is executed in case of error occurrence.
-  * @retval None
-  */
-void Error_Handler(void)
-{
- 8001ed8:	b480      	push	{r7}
- 8001eda:	af00      	add	r7, sp, #0
-  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__STATIC_FORCEINLINE void __disable_irq(void)
-{
-  __ASM volatile ("cpsid i" : : : "memory");
- 8001edc:	b672      	cpsid	i
-  /* USER CODE BEGIN Error_Handler_Debug */
-  /* User can add his own implementation to report the HAL error return state */
-  __disable_irq();
-  while (1)
- 8001ede:	e7fe      	b.n	8001ede <Error_Handler+0x6>
-
-08001ee0 <I2Cx_MspInit>:
-  * @brief  Initializes I2C MSP.
-  * @param  i2c_handler : I2C handler
-  * @retval None
-  */
-static void I2Cx_MspInit(I2C_HandleTypeDef *i2c_handler)
-{
- 8001ee0:	b580      	push	{r7, lr}
- 8001ee2:	b08c      	sub	sp, #48	; 0x30
- 8001ee4:	af00      	add	r7, sp, #0
- 8001ee6:	6078      	str	r0, [r7, #4]
-  GPIO_InitTypeDef  gpio_init_structure;
-  
-  if (i2c_handler == (I2C_HandleTypeDef*)(&hI2cAudioHandler))
- 8001ee8:	687b      	ldr	r3, [r7, #4]
- 8001eea:	4a51      	ldr	r2, [pc, #324]	; (8002030 <I2Cx_MspInit+0x150>)
- 8001eec:	4293      	cmp	r3, r2
- 8001eee:	d14d      	bne.n	8001f8c <I2Cx_MspInit+0xac>
-  {
-    /* AUDIO and LCD I2C MSP init */
-
-    /*** Configure the GPIOs ***/
-    /* Enable GPIO clock */
-    DISCOVERY_AUDIO_I2Cx_SCL_SDA_GPIO_CLK_ENABLE();
- 8001ef0:	4b50      	ldr	r3, [pc, #320]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001ef2:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001ef4:	4a4f      	ldr	r2, [pc, #316]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001ef6:	f043 0380 	orr.w	r3, r3, #128	; 0x80
- 8001efa:	6313      	str	r3, [r2, #48]	; 0x30
- 8001efc:	4b4d      	ldr	r3, [pc, #308]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001efe:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001f00:	f003 0380 	and.w	r3, r3, #128	; 0x80
- 8001f04:	61bb      	str	r3, [r7, #24]
- 8001f06:	69bb      	ldr	r3, [r7, #24]
-
-    /* Configure I2C Tx as alternate function */
-    gpio_init_structure.Pin = DISCOVERY_AUDIO_I2Cx_SCL_PIN;
- 8001f08:	2380      	movs	r3, #128	; 0x80
- 8001f0a:	61fb      	str	r3, [r7, #28]
-    gpio_init_structure.Mode = GPIO_MODE_AF_OD;
- 8001f0c:	2312      	movs	r3, #18
- 8001f0e:	623b      	str	r3, [r7, #32]
-    gpio_init_structure.Pull = GPIO_NOPULL;
- 8001f10:	2300      	movs	r3, #0
- 8001f12:	627b      	str	r3, [r7, #36]	; 0x24
-    gpio_init_structure.Speed = GPIO_SPEED_FAST;
- 8001f14:	2302      	movs	r3, #2
- 8001f16:	62bb      	str	r3, [r7, #40]	; 0x28
-    gpio_init_structure.Alternate = DISCOVERY_AUDIO_I2Cx_SCL_SDA_AF;
- 8001f18:	2304      	movs	r3, #4
- 8001f1a:	62fb      	str	r3, [r7, #44]	; 0x2c
-    HAL_GPIO_Init(DISCOVERY_AUDIO_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
- 8001f1c:	f107 031c 	add.w	r3, r7, #28
- 8001f20:	4619      	mov	r1, r3
- 8001f22:	4845      	ldr	r0, [pc, #276]	; (8002038 <I2Cx_MspInit+0x158>)
- 8001f24:	f003 fce4 	bl	80058f0 <HAL_GPIO_Init>
-
-    /* Configure I2C Rx as alternate function */
-    gpio_init_structure.Pin = DISCOVERY_AUDIO_I2Cx_SDA_PIN;
- 8001f28:	f44f 7380 	mov.w	r3, #256	; 0x100
- 8001f2c:	61fb      	str	r3, [r7, #28]
-    HAL_GPIO_Init(DISCOVERY_AUDIO_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
- 8001f2e:	f107 031c 	add.w	r3, r7, #28
- 8001f32:	4619      	mov	r1, r3
- 8001f34:	4840      	ldr	r0, [pc, #256]	; (8002038 <I2Cx_MspInit+0x158>)
- 8001f36:	f003 fcdb 	bl	80058f0 <HAL_GPIO_Init>
-
-    /*** Configure the I2C peripheral ***/
-    /* Enable I2C clock */
-    DISCOVERY_AUDIO_I2Cx_CLK_ENABLE();
- 8001f3a:	4b3e      	ldr	r3, [pc, #248]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001f3c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8001f3e:	4a3d      	ldr	r2, [pc, #244]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001f40:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
- 8001f44:	6413      	str	r3, [r2, #64]	; 0x40
- 8001f46:	4b3b      	ldr	r3, [pc, #236]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001f48:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8001f4a:	f403 0300 	and.w	r3, r3, #8388608	; 0x800000
- 8001f4e:	617b      	str	r3, [r7, #20]
- 8001f50:	697b      	ldr	r3, [r7, #20]
-
-    /* Force the I2C peripheral clock reset */
-    DISCOVERY_AUDIO_I2Cx_FORCE_RESET();
- 8001f52:	4b38      	ldr	r3, [pc, #224]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001f54:	6a1b      	ldr	r3, [r3, #32]
- 8001f56:	4a37      	ldr	r2, [pc, #220]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001f58:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
- 8001f5c:	6213      	str	r3, [r2, #32]
-
-    /* Release the I2C peripheral clock reset */
-    DISCOVERY_AUDIO_I2Cx_RELEASE_RESET();
- 8001f5e:	4b35      	ldr	r3, [pc, #212]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001f60:	6a1b      	ldr	r3, [r3, #32]
- 8001f62:	4a34      	ldr	r2, [pc, #208]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001f64:	f423 0300 	bic.w	r3, r3, #8388608	; 0x800000
- 8001f68:	6213      	str	r3, [r2, #32]
-
-    /* Enable and set I2Cx Interrupt to a lower priority */
-    HAL_NVIC_SetPriority(DISCOVERY_AUDIO_I2Cx_EV_IRQn, 0x0F, 0);
- 8001f6a:	2200      	movs	r2, #0
- 8001f6c:	210f      	movs	r1, #15
- 8001f6e:	2048      	movs	r0, #72	; 0x48
- 8001f70:	f002 ff7e 	bl	8004e70 <HAL_NVIC_SetPriority>
-    HAL_NVIC_EnableIRQ(DISCOVERY_AUDIO_I2Cx_EV_IRQn);
- 8001f74:	2048      	movs	r0, #72	; 0x48
- 8001f76:	f002 ff97 	bl	8004ea8 <HAL_NVIC_EnableIRQ>
-
-    /* Enable and set I2Cx Interrupt to a lower priority */
-    HAL_NVIC_SetPriority(DISCOVERY_AUDIO_I2Cx_ER_IRQn, 0x0F, 0);
- 8001f7a:	2200      	movs	r2, #0
- 8001f7c:	210f      	movs	r1, #15
- 8001f7e:	2049      	movs	r0, #73	; 0x49
- 8001f80:	f002 ff76 	bl	8004e70 <HAL_NVIC_SetPriority>
-    HAL_NVIC_EnableIRQ(DISCOVERY_AUDIO_I2Cx_ER_IRQn);
- 8001f84:	2049      	movs	r0, #73	; 0x49
- 8001f86:	f002 ff8f 	bl	8004ea8 <HAL_NVIC_EnableIRQ>
-
-    /* Enable and set I2Cx Interrupt to a lower priority */
-    HAL_NVIC_SetPriority(DISCOVERY_EXT_I2Cx_ER_IRQn, 0x0F, 0);
-    HAL_NVIC_EnableIRQ(DISCOVERY_EXT_I2Cx_ER_IRQn);
-  }
-}
- 8001f8a:	e04d      	b.n	8002028 <I2Cx_MspInit+0x148>
-    DISCOVERY_EXT_I2Cx_SCL_SDA_GPIO_CLK_ENABLE();
- 8001f8c:	4b29      	ldr	r3, [pc, #164]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001f8e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001f90:	4a28      	ldr	r2, [pc, #160]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001f92:	f043 0302 	orr.w	r3, r3, #2
- 8001f96:	6313      	str	r3, [r2, #48]	; 0x30
- 8001f98:	4b26      	ldr	r3, [pc, #152]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001f9a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001f9c:	f003 0302 	and.w	r3, r3, #2
- 8001fa0:	613b      	str	r3, [r7, #16]
- 8001fa2:	693b      	ldr	r3, [r7, #16]
-    gpio_init_structure.Pin = DISCOVERY_EXT_I2Cx_SCL_PIN;
- 8001fa4:	f44f 7380 	mov.w	r3, #256	; 0x100
- 8001fa8:	61fb      	str	r3, [r7, #28]
-    gpio_init_structure.Mode = GPIO_MODE_AF_OD;
- 8001faa:	2312      	movs	r3, #18
- 8001fac:	623b      	str	r3, [r7, #32]
-    gpio_init_structure.Pull = GPIO_NOPULL;
- 8001fae:	2300      	movs	r3, #0
- 8001fb0:	627b      	str	r3, [r7, #36]	; 0x24
-    gpio_init_structure.Speed = GPIO_SPEED_FAST;
- 8001fb2:	2302      	movs	r3, #2
- 8001fb4:	62bb      	str	r3, [r7, #40]	; 0x28
-    gpio_init_structure.Alternate = DISCOVERY_EXT_I2Cx_SCL_SDA_AF;
- 8001fb6:	2304      	movs	r3, #4
- 8001fb8:	62fb      	str	r3, [r7, #44]	; 0x2c
-    HAL_GPIO_Init(DISCOVERY_EXT_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
- 8001fba:	f107 031c 	add.w	r3, r7, #28
- 8001fbe:	4619      	mov	r1, r3
- 8001fc0:	481e      	ldr	r0, [pc, #120]	; (800203c <I2Cx_MspInit+0x15c>)
- 8001fc2:	f003 fc95 	bl	80058f0 <HAL_GPIO_Init>
-    gpio_init_structure.Pin = DISCOVERY_EXT_I2Cx_SDA_PIN;
- 8001fc6:	f44f 7300 	mov.w	r3, #512	; 0x200
- 8001fca:	61fb      	str	r3, [r7, #28]
-    HAL_GPIO_Init(DISCOVERY_EXT_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
- 8001fcc:	f107 031c 	add.w	r3, r7, #28
- 8001fd0:	4619      	mov	r1, r3
- 8001fd2:	481a      	ldr	r0, [pc, #104]	; (800203c <I2Cx_MspInit+0x15c>)
- 8001fd4:	f003 fc8c 	bl	80058f0 <HAL_GPIO_Init>
-    DISCOVERY_EXT_I2Cx_CLK_ENABLE();
- 8001fd8:	4b16      	ldr	r3, [pc, #88]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001fda:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8001fdc:	4a15      	ldr	r2, [pc, #84]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001fde:	f443 1300 	orr.w	r3, r3, #2097152	; 0x200000
- 8001fe2:	6413      	str	r3, [r2, #64]	; 0x40
- 8001fe4:	4b13      	ldr	r3, [pc, #76]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001fe6:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8001fe8:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
- 8001fec:	60fb      	str	r3, [r7, #12]
- 8001fee:	68fb      	ldr	r3, [r7, #12]
-    DISCOVERY_EXT_I2Cx_FORCE_RESET();
- 8001ff0:	4b10      	ldr	r3, [pc, #64]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001ff2:	6a1b      	ldr	r3, [r3, #32]
- 8001ff4:	4a0f      	ldr	r2, [pc, #60]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001ff6:	f443 1300 	orr.w	r3, r3, #2097152	; 0x200000
- 8001ffa:	6213      	str	r3, [r2, #32]
-    DISCOVERY_EXT_I2Cx_RELEASE_RESET();
- 8001ffc:	4b0d      	ldr	r3, [pc, #52]	; (8002034 <I2Cx_MspInit+0x154>)
- 8001ffe:	6a1b      	ldr	r3, [r3, #32]
- 8002000:	4a0c      	ldr	r2, [pc, #48]	; (8002034 <I2Cx_MspInit+0x154>)
- 8002002:	f423 1300 	bic.w	r3, r3, #2097152	; 0x200000
- 8002006:	6213      	str	r3, [r2, #32]
-    HAL_NVIC_SetPriority(DISCOVERY_EXT_I2Cx_EV_IRQn, 0x0F, 0);
- 8002008:	2200      	movs	r2, #0
- 800200a:	210f      	movs	r1, #15
- 800200c:	201f      	movs	r0, #31
- 800200e:	f002 ff2f 	bl	8004e70 <HAL_NVIC_SetPriority>
-    HAL_NVIC_EnableIRQ(DISCOVERY_EXT_I2Cx_EV_IRQn);
- 8002012:	201f      	movs	r0, #31
- 8002014:	f002 ff48 	bl	8004ea8 <HAL_NVIC_EnableIRQ>
-    HAL_NVIC_SetPriority(DISCOVERY_EXT_I2Cx_ER_IRQn, 0x0F, 0);
- 8002018:	2200      	movs	r2, #0
- 800201a:	210f      	movs	r1, #15
- 800201c:	2020      	movs	r0, #32
- 800201e:	f002 ff27 	bl	8004e70 <HAL_NVIC_SetPriority>
-    HAL_NVIC_EnableIRQ(DISCOVERY_EXT_I2Cx_ER_IRQn);
- 8002022:	2020      	movs	r0, #32
- 8002024:	f002 ff40 	bl	8004ea8 <HAL_NVIC_EnableIRQ>
-}
- 8002028:	bf00      	nop
- 800202a:	3730      	adds	r7, #48	; 0x30
- 800202c:	46bd      	mov	sp, r7
- 800202e:	bd80      	pop	{r7, pc}
- 8002030:	20000100 	.word	0x20000100
- 8002034:	40023800 	.word	0x40023800
- 8002038:	40021c00 	.word	0x40021c00
- 800203c:	40020400 	.word	0x40020400
-
-08002040 <I2Cx_Init>:
-  * @brief  Initializes I2C HAL.
-  * @param  i2c_handler : I2C handler
-  * @retval None
-  */
-static void I2Cx_Init(I2C_HandleTypeDef *i2c_handler)
-{
- 8002040:	b580      	push	{r7, lr}
- 8002042:	b082      	sub	sp, #8
- 8002044:	af00      	add	r7, sp, #0
- 8002046:	6078      	str	r0, [r7, #4]
-  if(HAL_I2C_GetState(i2c_handler) == HAL_I2C_STATE_RESET)
- 8002048:	6878      	ldr	r0, [r7, #4]
- 800204a:	f004 fa25 	bl	8006498 <HAL_I2C_GetState>
- 800204e:	4603      	mov	r3, r0
- 8002050:	2b00      	cmp	r3, #0
- 8002052:	d125      	bne.n	80020a0 <I2Cx_Init+0x60>
-  {
-    if (i2c_handler == (I2C_HandleTypeDef*)(&hI2cAudioHandler))
- 8002054:	687b      	ldr	r3, [r7, #4]
- 8002056:	4a14      	ldr	r2, [pc, #80]	; (80020a8 <I2Cx_Init+0x68>)
- 8002058:	4293      	cmp	r3, r2
- 800205a:	d103      	bne.n	8002064 <I2Cx_Init+0x24>
-    {
-      /* Audio and LCD I2C configuration */
-      i2c_handler->Instance = DISCOVERY_AUDIO_I2Cx;
- 800205c:	687b      	ldr	r3, [r7, #4]
- 800205e:	4a13      	ldr	r2, [pc, #76]	; (80020ac <I2Cx_Init+0x6c>)
- 8002060:	601a      	str	r2, [r3, #0]
- 8002062:	e002      	b.n	800206a <I2Cx_Init+0x2a>
-    }
-    else
-    {
-      /* External, camera and Arduino connector  I2C configuration */
-      i2c_handler->Instance = DISCOVERY_EXT_I2Cx;
- 8002064:	687b      	ldr	r3, [r7, #4]
- 8002066:	4a12      	ldr	r2, [pc, #72]	; (80020b0 <I2Cx_Init+0x70>)
- 8002068:	601a      	str	r2, [r3, #0]
-    }
-    i2c_handler->Init.Timing           = DISCOVERY_I2Cx_TIMING;
- 800206a:	687b      	ldr	r3, [r7, #4]
- 800206c:	4a11      	ldr	r2, [pc, #68]	; (80020b4 <I2Cx_Init+0x74>)
- 800206e:	605a      	str	r2, [r3, #4]
-    i2c_handler->Init.OwnAddress1      = 0;
- 8002070:	687b      	ldr	r3, [r7, #4]
- 8002072:	2200      	movs	r2, #0
- 8002074:	609a      	str	r2, [r3, #8]
-    i2c_handler->Init.AddressingMode   = I2C_ADDRESSINGMODE_7BIT;
- 8002076:	687b      	ldr	r3, [r7, #4]
- 8002078:	2201      	movs	r2, #1
- 800207a:	60da      	str	r2, [r3, #12]
-    i2c_handler->Init.DualAddressMode  = I2C_DUALADDRESS_DISABLE;
- 800207c:	687b      	ldr	r3, [r7, #4]
- 800207e:	2200      	movs	r2, #0
- 8002080:	611a      	str	r2, [r3, #16]
-    i2c_handler->Init.OwnAddress2      = 0;
- 8002082:	687b      	ldr	r3, [r7, #4]
- 8002084:	2200      	movs	r2, #0
- 8002086:	615a      	str	r2, [r3, #20]
-    i2c_handler->Init.GeneralCallMode  = I2C_GENERALCALL_DISABLE;
- 8002088:	687b      	ldr	r3, [r7, #4]
- 800208a:	2200      	movs	r2, #0
- 800208c:	61da      	str	r2, [r3, #28]
-    i2c_handler->Init.NoStretchMode    = I2C_NOSTRETCH_DISABLE;
- 800208e:	687b      	ldr	r3, [r7, #4]
- 8002090:	2200      	movs	r2, #0
- 8002092:	621a      	str	r2, [r3, #32]
-
-    /* Init the I2C */
-    I2Cx_MspInit(i2c_handler);
- 8002094:	6878      	ldr	r0, [r7, #4]
- 8002096:	f7ff ff23 	bl	8001ee0 <I2Cx_MspInit>
-    HAL_I2C_Init(i2c_handler);
- 800209a:	6878      	ldr	r0, [r7, #4]
- 800209c:	f003 ff0e 	bl	8005ebc <HAL_I2C_Init>
-  }
-}
- 80020a0:	bf00      	nop
- 80020a2:	3708      	adds	r7, #8
- 80020a4:	46bd      	mov	sp, r7
- 80020a6:	bd80      	pop	{r7, pc}
- 80020a8:	20000100 	.word	0x20000100
- 80020ac:	40005c00 	.word	0x40005c00
- 80020b0:	40005400 	.word	0x40005400
- 80020b4:	40912732 	.word	0x40912732
-
-080020b8 <I2Cx_ReadMultiple>:
-                                           uint8_t Addr,
-                                           uint16_t Reg,
-                                           uint16_t MemAddress,
-                                           uint8_t *Buffer,
-                                           uint16_t Length)
-{
- 80020b8:	b580      	push	{r7, lr}
- 80020ba:	b08a      	sub	sp, #40	; 0x28
- 80020bc:	af04      	add	r7, sp, #16
- 80020be:	60f8      	str	r0, [r7, #12]
- 80020c0:	4608      	mov	r0, r1
- 80020c2:	4611      	mov	r1, r2
- 80020c4:	461a      	mov	r2, r3
- 80020c6:	4603      	mov	r3, r0
- 80020c8:	72fb      	strb	r3, [r7, #11]
- 80020ca:	460b      	mov	r3, r1
- 80020cc:	813b      	strh	r3, [r7, #8]
- 80020ce:	4613      	mov	r3, r2
- 80020d0:	80fb      	strh	r3, [r7, #6]
-  HAL_StatusTypeDef status = HAL_OK;
- 80020d2:	2300      	movs	r3, #0
- 80020d4:	75fb      	strb	r3, [r7, #23]
-
-  status = HAL_I2C_Mem_Read(i2c_handler, Addr, (uint16_t)Reg, MemAddress, Buffer, Length, 1000);
- 80020d6:	7afb      	ldrb	r3, [r7, #11]
- 80020d8:	b299      	uxth	r1, r3
- 80020da:	88f8      	ldrh	r0, [r7, #6]
- 80020dc:	893a      	ldrh	r2, [r7, #8]
- 80020de:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
- 80020e2:	9302      	str	r3, [sp, #8]
- 80020e4:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
- 80020e6:	9301      	str	r3, [sp, #4]
- 80020e8:	6a3b      	ldr	r3, [r7, #32]
- 80020ea:	9300      	str	r3, [sp, #0]
- 80020ec:	4603      	mov	r3, r0
- 80020ee:	68f8      	ldr	r0, [r7, #12]
- 80020f0:	f004 f8b8 	bl	8006264 <HAL_I2C_Mem_Read>
- 80020f4:	4603      	mov	r3, r0
- 80020f6:	75fb      	strb	r3, [r7, #23]
-
-  /* Check the communication status */
-  if(status != HAL_OK)
- 80020f8:	7dfb      	ldrb	r3, [r7, #23]
- 80020fa:	2b00      	cmp	r3, #0
- 80020fc:	d004      	beq.n	8002108 <I2Cx_ReadMultiple+0x50>
-  {
-    /* I2C error occurred */
-    I2Cx_Error(i2c_handler, Addr);
- 80020fe:	7afb      	ldrb	r3, [r7, #11]
- 8002100:	4619      	mov	r1, r3
- 8002102:	68f8      	ldr	r0, [r7, #12]
- 8002104:	f000 f832 	bl	800216c <I2Cx_Error>
-  }
-  return status;    
- 8002108:	7dfb      	ldrb	r3, [r7, #23]
-}
- 800210a:	4618      	mov	r0, r3
- 800210c:	3718      	adds	r7, #24
- 800210e:	46bd      	mov	sp, r7
- 8002110:	bd80      	pop	{r7, pc}
-
-08002112 <I2Cx_WriteMultiple>:
-                                            uint8_t Addr,
-                                            uint16_t Reg,
-                                            uint16_t MemAddress,
-                                            uint8_t *Buffer,
-                                            uint16_t Length)
-{
- 8002112:	b580      	push	{r7, lr}
- 8002114:	b08a      	sub	sp, #40	; 0x28
- 8002116:	af04      	add	r7, sp, #16
- 8002118:	60f8      	str	r0, [r7, #12]
- 800211a:	4608      	mov	r0, r1
- 800211c:	4611      	mov	r1, r2
- 800211e:	461a      	mov	r2, r3
- 8002120:	4603      	mov	r3, r0
- 8002122:	72fb      	strb	r3, [r7, #11]
- 8002124:	460b      	mov	r3, r1
- 8002126:	813b      	strh	r3, [r7, #8]
- 8002128:	4613      	mov	r3, r2
- 800212a:	80fb      	strh	r3, [r7, #6]
-  HAL_StatusTypeDef status = HAL_OK;
- 800212c:	2300      	movs	r3, #0
- 800212e:	75fb      	strb	r3, [r7, #23]
-  
-  status = HAL_I2C_Mem_Write(i2c_handler, Addr, (uint16_t)Reg, MemAddress, Buffer, Length, 1000);
- 8002130:	7afb      	ldrb	r3, [r7, #11]
- 8002132:	b299      	uxth	r1, r3
- 8002134:	88f8      	ldrh	r0, [r7, #6]
- 8002136:	893a      	ldrh	r2, [r7, #8]
- 8002138:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
- 800213c:	9302      	str	r3, [sp, #8]
- 800213e:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
- 8002140:	9301      	str	r3, [sp, #4]
- 8002142:	6a3b      	ldr	r3, [r7, #32]
- 8002144:	9300      	str	r3, [sp, #0]
- 8002146:	4603      	mov	r3, r0
- 8002148:	68f8      	ldr	r0, [r7, #12]
- 800214a:	f003 ff77 	bl	800603c <HAL_I2C_Mem_Write>
- 800214e:	4603      	mov	r3, r0
- 8002150:	75fb      	strb	r3, [r7, #23]
-  
-  /* Check the communication status */
-  if(status != HAL_OK)
- 8002152:	7dfb      	ldrb	r3, [r7, #23]
- 8002154:	2b00      	cmp	r3, #0
- 8002156:	d004      	beq.n	8002162 <I2Cx_WriteMultiple+0x50>
-  {
-    /* Re-Initiaize the I2C Bus */
-    I2Cx_Error(i2c_handler, Addr);
- 8002158:	7afb      	ldrb	r3, [r7, #11]
- 800215a:	4619      	mov	r1, r3
- 800215c:	68f8      	ldr	r0, [r7, #12]
- 800215e:	f000 f805 	bl	800216c <I2Cx_Error>
-  }
-  return status;
- 8002162:	7dfb      	ldrb	r3, [r7, #23]
-}
- 8002164:	4618      	mov	r0, r3
- 8002166:	3718      	adds	r7, #24
- 8002168:	46bd      	mov	sp, r7
- 800216a:	bd80      	pop	{r7, pc}
-
-0800216c <I2Cx_Error>:
-  * @param  i2c_handler : I2C handler
-  * @param  Addr: I2C Address
-  * @retval None
-  */
-static void I2Cx_Error(I2C_HandleTypeDef *i2c_handler, uint8_t Addr)
-{
- 800216c:	b580      	push	{r7, lr}
- 800216e:	b082      	sub	sp, #8
- 8002170:	af00      	add	r7, sp, #0
- 8002172:	6078      	str	r0, [r7, #4]
- 8002174:	460b      	mov	r3, r1
- 8002176:	70fb      	strb	r3, [r7, #3]
-  /* De-initialize the I2C communication bus */
-  HAL_I2C_DeInit(i2c_handler);
- 8002178:	6878      	ldr	r0, [r7, #4]
- 800217a:	f003 ff2f 	bl	8005fdc <HAL_I2C_DeInit>
-  
-  /* Re-Initialize the I2C communication bus */
-  I2Cx_Init(i2c_handler);
- 800217e:	6878      	ldr	r0, [r7, #4]
- 8002180:	f7ff ff5e 	bl	8002040 <I2Cx_Init>
-}
- 8002184:	bf00      	nop
- 8002186:	3708      	adds	r7, #8
- 8002188:	46bd      	mov	sp, r7
- 800218a:	bd80      	pop	{r7, pc}
-
-0800218c <TS_IO_Init>:
-/**
-  * @brief  Initializes Touchscreen low level.
-  * @retval None
-  */
-void TS_IO_Init(void)
-{
- 800218c:	b580      	push	{r7, lr}
- 800218e:	af00      	add	r7, sp, #0
-  I2Cx_Init(&hI2cAudioHandler);
- 8002190:	4802      	ldr	r0, [pc, #8]	; (800219c <TS_IO_Init+0x10>)
- 8002192:	f7ff ff55 	bl	8002040 <I2Cx_Init>
-}
- 8002196:	bf00      	nop
- 8002198:	bd80      	pop	{r7, pc}
- 800219a:	bf00      	nop
- 800219c:	20000100 	.word	0x20000100
-
-080021a0 <TS_IO_Write>:
-  * @param  Reg: Reg address
-  * @param  Value: Data to be written
-  * @retval None
-  */
-void TS_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
-{
- 80021a0:	b580      	push	{r7, lr}
- 80021a2:	b084      	sub	sp, #16
- 80021a4:	af02      	add	r7, sp, #8
- 80021a6:	4603      	mov	r3, r0
- 80021a8:	71fb      	strb	r3, [r7, #7]
- 80021aa:	460b      	mov	r3, r1
- 80021ac:	71bb      	strb	r3, [r7, #6]
- 80021ae:	4613      	mov	r3, r2
- 80021b0:	717b      	strb	r3, [r7, #5]
-  I2Cx_WriteMultiple(&hI2cAudioHandler, Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT,(uint8_t*)&Value, 1);
- 80021b2:	79bb      	ldrb	r3, [r7, #6]
- 80021b4:	b29a      	uxth	r2, r3
- 80021b6:	79f9      	ldrb	r1, [r7, #7]
- 80021b8:	2301      	movs	r3, #1
- 80021ba:	9301      	str	r3, [sp, #4]
- 80021bc:	1d7b      	adds	r3, r7, #5
- 80021be:	9300      	str	r3, [sp, #0]
- 80021c0:	2301      	movs	r3, #1
- 80021c2:	4803      	ldr	r0, [pc, #12]	; (80021d0 <TS_IO_Write+0x30>)
- 80021c4:	f7ff ffa5 	bl	8002112 <I2Cx_WriteMultiple>
-}
- 80021c8:	bf00      	nop
- 80021ca:	3708      	adds	r7, #8
- 80021cc:	46bd      	mov	sp, r7
- 80021ce:	bd80      	pop	{r7, pc}
- 80021d0:	20000100 	.word	0x20000100
-
-080021d4 <TS_IO_Read>:
-  * @param  Addr: I2C address
-  * @param  Reg: Reg address
-  * @retval Data to be read
-  */
-uint8_t TS_IO_Read(uint8_t Addr, uint8_t Reg)
-{
- 80021d4:	b580      	push	{r7, lr}
- 80021d6:	b086      	sub	sp, #24
- 80021d8:	af02      	add	r7, sp, #8
- 80021da:	4603      	mov	r3, r0
- 80021dc:	460a      	mov	r2, r1
- 80021de:	71fb      	strb	r3, [r7, #7]
- 80021e0:	4613      	mov	r3, r2
- 80021e2:	71bb      	strb	r3, [r7, #6]
-  uint8_t read_value = 0;
- 80021e4:	2300      	movs	r3, #0
- 80021e6:	73fb      	strb	r3, [r7, #15]
-
-  I2Cx_ReadMultiple(&hI2cAudioHandler, Addr, Reg, I2C_MEMADD_SIZE_8BIT, (uint8_t*)&read_value, 1);
- 80021e8:	79bb      	ldrb	r3, [r7, #6]
- 80021ea:	b29a      	uxth	r2, r3
- 80021ec:	79f9      	ldrb	r1, [r7, #7]
- 80021ee:	2301      	movs	r3, #1
- 80021f0:	9301      	str	r3, [sp, #4]
- 80021f2:	f107 030f 	add.w	r3, r7, #15
- 80021f6:	9300      	str	r3, [sp, #0]
- 80021f8:	2301      	movs	r3, #1
- 80021fa:	4804      	ldr	r0, [pc, #16]	; (800220c <TS_IO_Read+0x38>)
- 80021fc:	f7ff ff5c 	bl	80020b8 <I2Cx_ReadMultiple>
-
-  return read_value;
- 8002200:	7bfb      	ldrb	r3, [r7, #15]
-}
- 8002202:	4618      	mov	r0, r3
- 8002204:	3710      	adds	r7, #16
- 8002206:	46bd      	mov	sp, r7
- 8002208:	bd80      	pop	{r7, pc}
- 800220a:	bf00      	nop
- 800220c:	20000100 	.word	0x20000100
-
-08002210 <TS_IO_Delay>:
-  * @brief  TS delay
-  * @param  Delay: Delay in ms
-  * @retval None
-  */
-void TS_IO_Delay(uint32_t Delay)
-{
- 8002210:	b580      	push	{r7, lr}
- 8002212:	b082      	sub	sp, #8
- 8002214:	af00      	add	r7, sp, #0
- 8002216:	6078      	str	r0, [r7, #4]
-  HAL_Delay(Delay);
- 8002218:	6878      	ldr	r0, [r7, #4]
- 800221a:	f002 f975 	bl	8004508 <HAL_Delay>
-}
- 800221e:	bf00      	nop
- 8002220:	3708      	adds	r7, #8
- 8002222:	46bd      	mov	sp, r7
- 8002224:	bd80      	pop	{r7, pc}
-	...
-
-08002228 <BSP_LCD_Init>:
-/**
-  * @brief  Initializes the LCD.
-  * @retval LCD state
-  */
-uint8_t BSP_LCD_Init(void)
-{    
- 8002228:	b580      	push	{r7, lr}
- 800222a:	af00      	add	r7, sp, #0
-  /* Select the used LCD */
-
-  /* The RK043FN48H LCD 480x272 is selected */
-  /* Timing Configuration */
-  hLtdcHandler.Init.HorizontalSync = (RK043FN48H_HSYNC - 1);
- 800222c:	4b31      	ldr	r3, [pc, #196]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 800222e:	2228      	movs	r2, #40	; 0x28
- 8002230:	615a      	str	r2, [r3, #20]
-  hLtdcHandler.Init.VerticalSync = (RK043FN48H_VSYNC - 1);
- 8002232:	4b30      	ldr	r3, [pc, #192]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 8002234:	2209      	movs	r2, #9
- 8002236:	619a      	str	r2, [r3, #24]
-  hLtdcHandler.Init.AccumulatedHBP = (RK043FN48H_HSYNC + RK043FN48H_HBP - 1);
- 8002238:	4b2e      	ldr	r3, [pc, #184]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 800223a:	2235      	movs	r2, #53	; 0x35
- 800223c:	61da      	str	r2, [r3, #28]
-  hLtdcHandler.Init.AccumulatedVBP = (RK043FN48H_VSYNC + RK043FN48H_VBP - 1);
- 800223e:	4b2d      	ldr	r3, [pc, #180]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 8002240:	220b      	movs	r2, #11
- 8002242:	621a      	str	r2, [r3, #32]
-  hLtdcHandler.Init.AccumulatedActiveH = (RK043FN48H_HEIGHT + RK043FN48H_VSYNC + RK043FN48H_VBP - 1);
- 8002244:	4b2b      	ldr	r3, [pc, #172]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 8002246:	f240 121b 	movw	r2, #283	; 0x11b
- 800224a:	629a      	str	r2, [r3, #40]	; 0x28
-  hLtdcHandler.Init.AccumulatedActiveW = (RK043FN48H_WIDTH + RK043FN48H_HSYNC + RK043FN48H_HBP - 1);
- 800224c:	4b29      	ldr	r3, [pc, #164]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 800224e:	f240 2215 	movw	r2, #533	; 0x215
- 8002252:	625a      	str	r2, [r3, #36]	; 0x24
-  hLtdcHandler.Init.TotalHeigh = (RK043FN48H_HEIGHT + RK043FN48H_VSYNC + RK043FN48H_VBP + RK043FN48H_VFP - 1);
- 8002254:	4b27      	ldr	r3, [pc, #156]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 8002256:	f240 121d 	movw	r2, #285	; 0x11d
- 800225a:	631a      	str	r2, [r3, #48]	; 0x30
-  hLtdcHandler.Init.TotalWidth = (RK043FN48H_WIDTH + RK043FN48H_HSYNC + RK043FN48H_HBP + RK043FN48H_HFP - 1);
- 800225c:	4b25      	ldr	r3, [pc, #148]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 800225e:	f240 2235 	movw	r2, #565	; 0x235
- 8002262:	62da      	str	r2, [r3, #44]	; 0x2c
-  
-  /* LCD clock configuration */
-  BSP_LCD_ClockConfig(&hLtdcHandler, NULL);
- 8002264:	2100      	movs	r1, #0
- 8002266:	4823      	ldr	r0, [pc, #140]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 8002268:	f000 fdbe 	bl	8002de8 <BSP_LCD_ClockConfig>
-
-  /* Initialize the LCD pixel width and pixel height */
-  hLtdcHandler.LayerCfg->ImageWidth  = RK043FN48H_WIDTH;
- 800226c:	4b21      	ldr	r3, [pc, #132]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 800226e:	f44f 72f0 	mov.w	r2, #480	; 0x1e0
- 8002272:	661a      	str	r2, [r3, #96]	; 0x60
-  hLtdcHandler.LayerCfg->ImageHeight = RK043FN48H_HEIGHT;
- 8002274:	4b1f      	ldr	r3, [pc, #124]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 8002276:	f44f 7288 	mov.w	r2, #272	; 0x110
- 800227a:	665a      	str	r2, [r3, #100]	; 0x64
-
-  /* Background value */
-  hLtdcHandler.Init.Backcolor.Blue = 0;
- 800227c:	4b1d      	ldr	r3, [pc, #116]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 800227e:	2200      	movs	r2, #0
- 8002280:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
-  hLtdcHandler.Init.Backcolor.Green = 0;
- 8002284:	4b1b      	ldr	r3, [pc, #108]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 8002286:	2200      	movs	r2, #0
- 8002288:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
-  hLtdcHandler.Init.Backcolor.Red = 0;
- 800228c:	4b19      	ldr	r3, [pc, #100]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 800228e:	2200      	movs	r2, #0
- 8002290:	f883 2036 	strb.w	r2, [r3, #54]	; 0x36
-  
-  /* Polarity */
-  hLtdcHandler.Init.HSPolarity = LTDC_HSPOLARITY_AL;
- 8002294:	4b17      	ldr	r3, [pc, #92]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 8002296:	2200      	movs	r2, #0
- 8002298:	605a      	str	r2, [r3, #4]
-  hLtdcHandler.Init.VSPolarity = LTDC_VSPOLARITY_AL; 
- 800229a:	4b16      	ldr	r3, [pc, #88]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 800229c:	2200      	movs	r2, #0
- 800229e:	609a      	str	r2, [r3, #8]
-  hLtdcHandler.Init.DEPolarity = LTDC_DEPOLARITY_AL;  
- 80022a0:	4b14      	ldr	r3, [pc, #80]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 80022a2:	2200      	movs	r2, #0
- 80022a4:	60da      	str	r2, [r3, #12]
-  hLtdcHandler.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
- 80022a6:	4b13      	ldr	r3, [pc, #76]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 80022a8:	2200      	movs	r2, #0
- 80022aa:	611a      	str	r2, [r3, #16]
-  hLtdcHandler.Instance = LTDC;
- 80022ac:	4b11      	ldr	r3, [pc, #68]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 80022ae:	4a12      	ldr	r2, [pc, #72]	; (80022f8 <BSP_LCD_Init+0xd0>)
- 80022b0:	601a      	str	r2, [r3, #0]
-
-  if(HAL_LTDC_GetState(&hLtdcHandler) == HAL_LTDC_STATE_RESET)
- 80022b2:	4810      	ldr	r0, [pc, #64]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 80022b4:	f004 fd82 	bl	8006dbc <HAL_LTDC_GetState>
- 80022b8:	4603      	mov	r3, r0
- 80022ba:	2b00      	cmp	r3, #0
- 80022bc:	d103      	bne.n	80022c6 <BSP_LCD_Init+0x9e>
-  {
-    /* Initialize the LCD Msp: this __weak function can be rewritten by the application */
-    BSP_LCD_MspInit(&hLtdcHandler, NULL);
- 80022be:	2100      	movs	r1, #0
- 80022c0:	480c      	ldr	r0, [pc, #48]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 80022c2:	f000 fcb7 	bl	8002c34 <BSP_LCD_MspInit>
-  }
-  HAL_LTDC_Init(&hLtdcHandler);
- 80022c6:	480b      	ldr	r0, [pc, #44]	; (80022f4 <BSP_LCD_Init+0xcc>)
- 80022c8:	f004 fba8 	bl	8006a1c <HAL_LTDC_Init>
-
-  /* Assert display enable LCD_DISP pin */
-  HAL_GPIO_WritePin(LCD_DISP_GPIO_PORT, LCD_DISP_PIN, GPIO_PIN_SET);
- 80022cc:	2201      	movs	r2, #1
- 80022ce:	f44f 5180 	mov.w	r1, #4096	; 0x1000
- 80022d2:	480a      	ldr	r0, [pc, #40]	; (80022fc <BSP_LCD_Init+0xd4>)
- 80022d4:	f003 fdd8 	bl	8005e88 <HAL_GPIO_WritePin>
-
-  /* Assert backlight LCD_BL_CTRL pin */
-  HAL_GPIO_WritePin(LCD_BL_CTRL_GPIO_PORT, LCD_BL_CTRL_PIN, GPIO_PIN_SET);
- 80022d8:	2201      	movs	r2, #1
- 80022da:	2108      	movs	r1, #8
- 80022dc:	4808      	ldr	r0, [pc, #32]	; (8002300 <BSP_LCD_Init+0xd8>)
- 80022de:	f003 fdd3 	bl	8005e88 <HAL_GPIO_WritePin>
-
-#if !defined(DATA_IN_ExtSDRAM)
-  /* Initialize the SDRAM */
-  BSP_SDRAM_Init();
- 80022e2:	f000 fea1 	bl	8003028 <BSP_SDRAM_Init>
-#endif
-    
-  /* Initialize the font */
-  BSP_LCD_SetFont(&LCD_DEFAULT_FONT);
- 80022e6:	4807      	ldr	r0, [pc, #28]	; (8002304 <BSP_LCD_Init+0xdc>)
- 80022e8:	f000 f8d8 	bl	800249c <BSP_LCD_SetFont>
-  
-  return LCD_OK;
- 80022ec:	2300      	movs	r3, #0
-}
- 80022ee:	4618      	mov	r0, r3
- 80022f0:	bd80      	pop	{r7, pc}
- 80022f2:	bf00      	nop
- 80022f4:	200089d8 	.word	0x200089d8
- 80022f8:	40016800 	.word	0x40016800
- 80022fc:	40022000 	.word	0x40022000
- 8002300:	40022800 	.word	0x40022800
- 8002304:	20000028 	.word	0x20000028
-
-08002308 <BSP_LCD_GetXSize>:
-/**
-  * @brief  Gets the LCD X size.
-  * @retval Used LCD X size
-  */
-uint32_t BSP_LCD_GetXSize(void)
-{
- 8002308:	b480      	push	{r7}
- 800230a:	af00      	add	r7, sp, #0
-  return hLtdcHandler.LayerCfg[ActiveLayer].ImageWidth;
- 800230c:	4b06      	ldr	r3, [pc, #24]	; (8002328 <BSP_LCD_GetXSize+0x20>)
- 800230e:	681b      	ldr	r3, [r3, #0]
- 8002310:	4a06      	ldr	r2, [pc, #24]	; (800232c <BSP_LCD_GetXSize+0x24>)
- 8002312:	2134      	movs	r1, #52	; 0x34
- 8002314:	fb01 f303 	mul.w	r3, r1, r3
- 8002318:	4413      	add	r3, r2
- 800231a:	3360      	adds	r3, #96	; 0x60
- 800231c:	681b      	ldr	r3, [r3, #0]
-}
- 800231e:	4618      	mov	r0, r3
- 8002320:	46bd      	mov	sp, r7
- 8002322:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8002326:	4770      	bx	lr
- 8002328:	2000018c 	.word	0x2000018c
- 800232c:	200089d8 	.word	0x200089d8
-
-08002330 <BSP_LCD_GetYSize>:
-/**
-  * @brief  Gets the LCD Y size.
-  * @retval Used LCD Y size
-  */
-uint32_t BSP_LCD_GetYSize(void)
-{
- 8002330:	b480      	push	{r7}
- 8002332:	af00      	add	r7, sp, #0
-  return hLtdcHandler.LayerCfg[ActiveLayer].ImageHeight;
- 8002334:	4b06      	ldr	r3, [pc, #24]	; (8002350 <BSP_LCD_GetYSize+0x20>)
- 8002336:	681b      	ldr	r3, [r3, #0]
- 8002338:	4a06      	ldr	r2, [pc, #24]	; (8002354 <BSP_LCD_GetYSize+0x24>)
- 800233a:	2134      	movs	r1, #52	; 0x34
- 800233c:	fb01 f303 	mul.w	r3, r1, r3
- 8002340:	4413      	add	r3, r2
- 8002342:	3364      	adds	r3, #100	; 0x64
- 8002344:	681b      	ldr	r3, [r3, #0]
-}
- 8002346:	4618      	mov	r0, r3
- 8002348:	46bd      	mov	sp, r7
- 800234a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800234e:	4770      	bx	lr
- 8002350:	2000018c 	.word	0x2000018c
- 8002354:	200089d8 	.word	0x200089d8
-
-08002358 <BSP_LCD_LayerDefaultInit>:
-  * @param  LayerIndex: Layer foreground or background
-  * @param  FB_Address: Layer frame buffer
-  * @retval None
-  */
-void BSP_LCD_LayerDefaultInit(uint16_t LayerIndex, uint32_t FB_Address)
-{     
- 8002358:	b580      	push	{r7, lr}
- 800235a:	b090      	sub	sp, #64	; 0x40
- 800235c:	af00      	add	r7, sp, #0
- 800235e:	4603      	mov	r3, r0
- 8002360:	6039      	str	r1, [r7, #0]
- 8002362:	80fb      	strh	r3, [r7, #6]
-  LCD_LayerCfgTypeDef  layer_cfg;
-
-  /* Layer Init */
-  layer_cfg.WindowX0 = 0;
- 8002364:	2300      	movs	r3, #0
- 8002366:	60fb      	str	r3, [r7, #12]
-  layer_cfg.WindowX1 = BSP_LCD_GetXSize();
- 8002368:	f7ff ffce 	bl	8002308 <BSP_LCD_GetXSize>
- 800236c:	4603      	mov	r3, r0
- 800236e:	613b      	str	r3, [r7, #16]
-  layer_cfg.WindowY0 = 0;
- 8002370:	2300      	movs	r3, #0
- 8002372:	617b      	str	r3, [r7, #20]
-  layer_cfg.WindowY1 = BSP_LCD_GetYSize(); 
- 8002374:	f7ff ffdc 	bl	8002330 <BSP_LCD_GetYSize>
- 8002378:	4603      	mov	r3, r0
- 800237a:	61bb      	str	r3, [r7, #24]
-  layer_cfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
- 800237c:	2300      	movs	r3, #0
- 800237e:	61fb      	str	r3, [r7, #28]
-  layer_cfg.FBStartAdress = FB_Address;
- 8002380:	683b      	ldr	r3, [r7, #0]
- 8002382:	633b      	str	r3, [r7, #48]	; 0x30
-  layer_cfg.Alpha = 255;
- 8002384:	23ff      	movs	r3, #255	; 0xff
- 8002386:	623b      	str	r3, [r7, #32]
-  layer_cfg.Alpha0 = 0;
- 8002388:	2300      	movs	r3, #0
- 800238a:	627b      	str	r3, [r7, #36]	; 0x24
-  layer_cfg.Backcolor.Blue = 0;
- 800238c:	2300      	movs	r3, #0
- 800238e:	f887 303c 	strb.w	r3, [r7, #60]	; 0x3c
-  layer_cfg.Backcolor.Green = 0;
- 8002392:	2300      	movs	r3, #0
- 8002394:	f887 303d 	strb.w	r3, [r7, #61]	; 0x3d
-  layer_cfg.Backcolor.Red = 0;
- 8002398:	2300      	movs	r3, #0
- 800239a:	f887 303e 	strb.w	r3, [r7, #62]	; 0x3e
-  layer_cfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
- 800239e:	f44f 63c0 	mov.w	r3, #1536	; 0x600
- 80023a2:	62bb      	str	r3, [r7, #40]	; 0x28
-  layer_cfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
- 80023a4:	2307      	movs	r3, #7
- 80023a6:	62fb      	str	r3, [r7, #44]	; 0x2c
-  layer_cfg.ImageWidth = BSP_LCD_GetXSize();
- 80023a8:	f7ff ffae 	bl	8002308 <BSP_LCD_GetXSize>
- 80023ac:	4603      	mov	r3, r0
- 80023ae:	637b      	str	r3, [r7, #52]	; 0x34
-  layer_cfg.ImageHeight = BSP_LCD_GetYSize();
- 80023b0:	f7ff ffbe 	bl	8002330 <BSP_LCD_GetYSize>
- 80023b4:	4603      	mov	r3, r0
- 80023b6:	63bb      	str	r3, [r7, #56]	; 0x38
-  
-  HAL_LTDC_ConfigLayer(&hLtdcHandler, &layer_cfg, LayerIndex); 
- 80023b8:	88fa      	ldrh	r2, [r7, #6]
- 80023ba:	f107 030c 	add.w	r3, r7, #12
- 80023be:	4619      	mov	r1, r3
- 80023c0:	4812      	ldr	r0, [pc, #72]	; (800240c <BSP_LCD_LayerDefaultInit+0xb4>)
- 80023c2:	f004 fcbd 	bl	8006d40 <HAL_LTDC_ConfigLayer>
-
-  DrawProp[LayerIndex].BackColor = LCD_COLOR_WHITE;
- 80023c6:	88fa      	ldrh	r2, [r7, #6]
- 80023c8:	4911      	ldr	r1, [pc, #68]	; (8002410 <BSP_LCD_LayerDefaultInit+0xb8>)
- 80023ca:	4613      	mov	r3, r2
- 80023cc:	005b      	lsls	r3, r3, #1
- 80023ce:	4413      	add	r3, r2
- 80023d0:	009b      	lsls	r3, r3, #2
- 80023d2:	440b      	add	r3, r1
- 80023d4:	3304      	adds	r3, #4
- 80023d6:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
- 80023da:	601a      	str	r2, [r3, #0]
-  DrawProp[LayerIndex].pFont     = &Font24;
- 80023dc:	88fa      	ldrh	r2, [r7, #6]
- 80023de:	490c      	ldr	r1, [pc, #48]	; (8002410 <BSP_LCD_LayerDefaultInit+0xb8>)
- 80023e0:	4613      	mov	r3, r2
- 80023e2:	005b      	lsls	r3, r3, #1
- 80023e4:	4413      	add	r3, r2
- 80023e6:	009b      	lsls	r3, r3, #2
- 80023e8:	440b      	add	r3, r1
- 80023ea:	3308      	adds	r3, #8
- 80023ec:	4a09      	ldr	r2, [pc, #36]	; (8002414 <BSP_LCD_LayerDefaultInit+0xbc>)
- 80023ee:	601a      	str	r2, [r3, #0]
-  DrawProp[LayerIndex].TextColor = LCD_COLOR_BLACK; 
- 80023f0:	88fa      	ldrh	r2, [r7, #6]
- 80023f2:	4907      	ldr	r1, [pc, #28]	; (8002410 <BSP_LCD_LayerDefaultInit+0xb8>)
- 80023f4:	4613      	mov	r3, r2
- 80023f6:	005b      	lsls	r3, r3, #1
- 80023f8:	4413      	add	r3, r2
- 80023fa:	009b      	lsls	r3, r3, #2
- 80023fc:	440b      	add	r3, r1
- 80023fe:	f04f 427f 	mov.w	r2, #4278190080	; 0xff000000
- 8002402:	601a      	str	r2, [r3, #0]
-}
- 8002404:	bf00      	nop
- 8002406:	3740      	adds	r7, #64	; 0x40
- 8002408:	46bd      	mov	sp, r7
- 800240a:	bd80      	pop	{r7, pc}
- 800240c:	200089d8 	.word	0x200089d8
- 8002410:	20000190 	.word	0x20000190
- 8002414:	20000028 	.word	0x20000028
-
-08002418 <BSP_LCD_SelectLayer>:
-  * @brief  Selects the LCD Layer.
-  * @param  LayerIndex: Layer foreground or background
-  * @retval None
-  */
-void BSP_LCD_SelectLayer(uint32_t LayerIndex)
-{
- 8002418:	b480      	push	{r7}
- 800241a:	b083      	sub	sp, #12
- 800241c:	af00      	add	r7, sp, #0
- 800241e:	6078      	str	r0, [r7, #4]
-  ActiveLayer = LayerIndex;
- 8002420:	4a04      	ldr	r2, [pc, #16]	; (8002434 <BSP_LCD_SelectLayer+0x1c>)
- 8002422:	687b      	ldr	r3, [r7, #4]
- 8002424:	6013      	str	r3, [r2, #0]
-} 
- 8002426:	bf00      	nop
- 8002428:	370c      	adds	r7, #12
- 800242a:	46bd      	mov	sp, r7
- 800242c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8002430:	4770      	bx	lr
- 8002432:	bf00      	nop
- 8002434:	2000018c 	.word	0x2000018c
-
-08002438 <BSP_LCD_SetTextColor>:
-  * @brief  Sets the LCD text color.
-  * @param  Color: Text color code ARGB(8-8-8-8)
-  * @retval None
-  */
-void BSP_LCD_SetTextColor(uint32_t Color)
-{
- 8002438:	b480      	push	{r7}
- 800243a:	b083      	sub	sp, #12
- 800243c:	af00      	add	r7, sp, #0
- 800243e:	6078      	str	r0, [r7, #4]
-  DrawProp[ActiveLayer].TextColor = Color;
- 8002440:	4b07      	ldr	r3, [pc, #28]	; (8002460 <BSP_LCD_SetTextColor+0x28>)
- 8002442:	681a      	ldr	r2, [r3, #0]
- 8002444:	4907      	ldr	r1, [pc, #28]	; (8002464 <BSP_LCD_SetTextColor+0x2c>)
- 8002446:	4613      	mov	r3, r2
- 8002448:	005b      	lsls	r3, r3, #1
- 800244a:	4413      	add	r3, r2
- 800244c:	009b      	lsls	r3, r3, #2
- 800244e:	440b      	add	r3, r1
- 8002450:	687a      	ldr	r2, [r7, #4]
- 8002452:	601a      	str	r2, [r3, #0]
-}
- 8002454:	bf00      	nop
- 8002456:	370c      	adds	r7, #12
- 8002458:	46bd      	mov	sp, r7
- 800245a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800245e:	4770      	bx	lr
- 8002460:	2000018c 	.word	0x2000018c
- 8002464:	20000190 	.word	0x20000190
-
-08002468 <BSP_LCD_SetBackColor>:
-  * @brief  Sets the LCD background color.
-  * @param  Color: Layer background color code ARGB(8-8-8-8)
-  * @retval None
-  */
-void BSP_LCD_SetBackColor(uint32_t Color)
-{
- 8002468:	b480      	push	{r7}
- 800246a:	b083      	sub	sp, #12
- 800246c:	af00      	add	r7, sp, #0
- 800246e:	6078      	str	r0, [r7, #4]
-  DrawProp[ActiveLayer].BackColor = Color;
- 8002470:	4b08      	ldr	r3, [pc, #32]	; (8002494 <BSP_LCD_SetBackColor+0x2c>)
- 8002472:	681a      	ldr	r2, [r3, #0]
- 8002474:	4908      	ldr	r1, [pc, #32]	; (8002498 <BSP_LCD_SetBackColor+0x30>)
- 8002476:	4613      	mov	r3, r2
- 8002478:	005b      	lsls	r3, r3, #1
- 800247a:	4413      	add	r3, r2
- 800247c:	009b      	lsls	r3, r3, #2
- 800247e:	440b      	add	r3, r1
- 8002480:	3304      	adds	r3, #4
- 8002482:	687a      	ldr	r2, [r7, #4]
- 8002484:	601a      	str	r2, [r3, #0]
-}
- 8002486:	bf00      	nop
- 8002488:	370c      	adds	r7, #12
- 800248a:	46bd      	mov	sp, r7
- 800248c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8002490:	4770      	bx	lr
- 8002492:	bf00      	nop
- 8002494:	2000018c 	.word	0x2000018c
- 8002498:	20000190 	.word	0x20000190
-
-0800249c <BSP_LCD_SetFont>:
-  * @brief  Sets the LCD text font.
-  * @param  fonts: Layer font to be used
-  * @retval None
-  */
-void BSP_LCD_SetFont(sFONT *fonts)
-{
- 800249c:	b480      	push	{r7}
- 800249e:	b083      	sub	sp, #12
- 80024a0:	af00      	add	r7, sp, #0
- 80024a2:	6078      	str	r0, [r7, #4]
-  DrawProp[ActiveLayer].pFont = fonts;
- 80024a4:	4b08      	ldr	r3, [pc, #32]	; (80024c8 <BSP_LCD_SetFont+0x2c>)
- 80024a6:	681a      	ldr	r2, [r3, #0]
- 80024a8:	4908      	ldr	r1, [pc, #32]	; (80024cc <BSP_LCD_SetFont+0x30>)
- 80024aa:	4613      	mov	r3, r2
- 80024ac:	005b      	lsls	r3, r3, #1
- 80024ae:	4413      	add	r3, r2
- 80024b0:	009b      	lsls	r3, r3, #2
- 80024b2:	440b      	add	r3, r1
- 80024b4:	3308      	adds	r3, #8
- 80024b6:	687a      	ldr	r2, [r7, #4]
- 80024b8:	601a      	str	r2, [r3, #0]
-}
- 80024ba:	bf00      	nop
- 80024bc:	370c      	adds	r7, #12
- 80024be:	46bd      	mov	sp, r7
- 80024c0:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80024c4:	4770      	bx	lr
- 80024c6:	bf00      	nop
- 80024c8:	2000018c 	.word	0x2000018c
- 80024cc:	20000190 	.word	0x20000190
-
-080024d0 <BSP_LCD_GetFont>:
-/**
-  * @brief  Gets the LCD text font.
-  * @retval Used layer font
-  */
-sFONT *BSP_LCD_GetFont(void)
-{
- 80024d0:	b480      	push	{r7}
- 80024d2:	af00      	add	r7, sp, #0
-  return DrawProp[ActiveLayer].pFont;
- 80024d4:	4b07      	ldr	r3, [pc, #28]	; (80024f4 <BSP_LCD_GetFont+0x24>)
- 80024d6:	681a      	ldr	r2, [r3, #0]
- 80024d8:	4907      	ldr	r1, [pc, #28]	; (80024f8 <BSP_LCD_GetFont+0x28>)
- 80024da:	4613      	mov	r3, r2
- 80024dc:	005b      	lsls	r3, r3, #1
- 80024de:	4413      	add	r3, r2
- 80024e0:	009b      	lsls	r3, r3, #2
- 80024e2:	440b      	add	r3, r1
- 80024e4:	3308      	adds	r3, #8
- 80024e6:	681b      	ldr	r3, [r3, #0]
-}
- 80024e8:	4618      	mov	r0, r3
- 80024ea:	46bd      	mov	sp, r7
- 80024ec:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80024f0:	4770      	bx	lr
- 80024f2:	bf00      	nop
- 80024f4:	2000018c 	.word	0x2000018c
- 80024f8:	20000190 	.word	0x20000190
-
-080024fc <BSP_LCD_Clear>:
-  * @brief  Clears the hole LCD.
-  * @param  Color: Color of the background
-  * @retval None
-  */
-void BSP_LCD_Clear(uint32_t Color)
-{ 
- 80024fc:	b5f0      	push	{r4, r5, r6, r7, lr}
- 80024fe:	b085      	sub	sp, #20
- 8002500:	af02      	add	r7, sp, #8
- 8002502:	6078      	str	r0, [r7, #4]
-  /* Clear the LCD */ 
-  LL_FillBuffer(ActiveLayer, (uint32_t *)(hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress), BSP_LCD_GetXSize(), BSP_LCD_GetYSize(), 0, Color);
- 8002504:	4b0f      	ldr	r3, [pc, #60]	; (8002544 <BSP_LCD_Clear+0x48>)
- 8002506:	681c      	ldr	r4, [r3, #0]
- 8002508:	4b0e      	ldr	r3, [pc, #56]	; (8002544 <BSP_LCD_Clear+0x48>)
- 800250a:	681b      	ldr	r3, [r3, #0]
- 800250c:	4a0e      	ldr	r2, [pc, #56]	; (8002548 <BSP_LCD_Clear+0x4c>)
- 800250e:	2134      	movs	r1, #52	; 0x34
- 8002510:	fb01 f303 	mul.w	r3, r1, r3
- 8002514:	4413      	add	r3, r2
- 8002516:	335c      	adds	r3, #92	; 0x5c
- 8002518:	681b      	ldr	r3, [r3, #0]
- 800251a:	461d      	mov	r5, r3
- 800251c:	f7ff fef4 	bl	8002308 <BSP_LCD_GetXSize>
- 8002520:	4606      	mov	r6, r0
- 8002522:	f7ff ff05 	bl	8002330 <BSP_LCD_GetYSize>
- 8002526:	4602      	mov	r2, r0
- 8002528:	687b      	ldr	r3, [r7, #4]
- 800252a:	9301      	str	r3, [sp, #4]
- 800252c:	2300      	movs	r3, #0
- 800252e:	9300      	str	r3, [sp, #0]
- 8002530:	4613      	mov	r3, r2
- 8002532:	4632      	mov	r2, r6
- 8002534:	4629      	mov	r1, r5
- 8002536:	4620      	mov	r0, r4
- 8002538:	f000 fd2a 	bl	8002f90 <LL_FillBuffer>
-}
- 800253c:	bf00      	nop
- 800253e:	370c      	adds	r7, #12
- 8002540:	46bd      	mov	sp, r7
- 8002542:	bdf0      	pop	{r4, r5, r6, r7, pc}
- 8002544:	2000018c 	.word	0x2000018c
- 8002548:	200089d8 	.word	0x200089d8
-
-0800254c <BSP_LCD_DisplayChar>:
-  * @param  Ascii: Character ascii code
-  *           This parameter must be a number between Min_Data = 0x20 and Max_Data = 0x7E 
-  * @retval None
-  */
-void BSP_LCD_DisplayChar(uint16_t Xpos, uint16_t Ypos, uint8_t Ascii)
-{
- 800254c:	b590      	push	{r4, r7, lr}
- 800254e:	b083      	sub	sp, #12
- 8002550:	af00      	add	r7, sp, #0
- 8002552:	4603      	mov	r3, r0
- 8002554:	80fb      	strh	r3, [r7, #6]
- 8002556:	460b      	mov	r3, r1
- 8002558:	80bb      	strh	r3, [r7, #4]
- 800255a:	4613      	mov	r3, r2
- 800255c:	70fb      	strb	r3, [r7, #3]
-  DrawChar(Xpos, Ypos, &DrawProp[ActiveLayer].pFont->table[(Ascii-' ') *\
- 800255e:	4b1b      	ldr	r3, [pc, #108]	; (80025cc <BSP_LCD_DisplayChar+0x80>)
- 8002560:	681a      	ldr	r2, [r3, #0]
- 8002562:	491b      	ldr	r1, [pc, #108]	; (80025d0 <BSP_LCD_DisplayChar+0x84>)
- 8002564:	4613      	mov	r3, r2
- 8002566:	005b      	lsls	r3, r3, #1
- 8002568:	4413      	add	r3, r2
- 800256a:	009b      	lsls	r3, r3, #2
- 800256c:	440b      	add	r3, r1
- 800256e:	3308      	adds	r3, #8
- 8002570:	681b      	ldr	r3, [r3, #0]
- 8002572:	6819      	ldr	r1, [r3, #0]
- 8002574:	78fb      	ldrb	r3, [r7, #3]
- 8002576:	f1a3 0020 	sub.w	r0, r3, #32
-    DrawProp[ActiveLayer].pFont->Height * ((DrawProp[ActiveLayer].pFont->Width + 7) / 8)]);
- 800257a:	4b14      	ldr	r3, [pc, #80]	; (80025cc <BSP_LCD_DisplayChar+0x80>)
- 800257c:	681a      	ldr	r2, [r3, #0]
- 800257e:	4c14      	ldr	r4, [pc, #80]	; (80025d0 <BSP_LCD_DisplayChar+0x84>)
- 8002580:	4613      	mov	r3, r2
- 8002582:	005b      	lsls	r3, r3, #1
- 8002584:	4413      	add	r3, r2
- 8002586:	009b      	lsls	r3, r3, #2
- 8002588:	4423      	add	r3, r4
- 800258a:	3308      	adds	r3, #8
- 800258c:	681b      	ldr	r3, [r3, #0]
- 800258e:	88db      	ldrh	r3, [r3, #6]
-  DrawChar(Xpos, Ypos, &DrawProp[ActiveLayer].pFont->table[(Ascii-' ') *\
- 8002590:	fb03 f000 	mul.w	r0, r3, r0
-    DrawProp[ActiveLayer].pFont->Height * ((DrawProp[ActiveLayer].pFont->Width + 7) / 8)]);
- 8002594:	4b0d      	ldr	r3, [pc, #52]	; (80025cc <BSP_LCD_DisplayChar+0x80>)
- 8002596:	681a      	ldr	r2, [r3, #0]
- 8002598:	4c0d      	ldr	r4, [pc, #52]	; (80025d0 <BSP_LCD_DisplayChar+0x84>)
- 800259a:	4613      	mov	r3, r2
- 800259c:	005b      	lsls	r3, r3, #1
- 800259e:	4413      	add	r3, r2
- 80025a0:	009b      	lsls	r3, r3, #2
- 80025a2:	4423      	add	r3, r4
- 80025a4:	3308      	adds	r3, #8
- 80025a6:	681b      	ldr	r3, [r3, #0]
- 80025a8:	889b      	ldrh	r3, [r3, #4]
- 80025aa:	3307      	adds	r3, #7
- 80025ac:	2b00      	cmp	r3, #0
- 80025ae:	da00      	bge.n	80025b2 <BSP_LCD_DisplayChar+0x66>
- 80025b0:	3307      	adds	r3, #7
- 80025b2:	10db      	asrs	r3, r3, #3
- 80025b4:	fb03 f300 	mul.w	r3, r3, r0
-  DrawChar(Xpos, Ypos, &DrawProp[ActiveLayer].pFont->table[(Ascii-' ') *\
- 80025b8:	18ca      	adds	r2, r1, r3
- 80025ba:	88b9      	ldrh	r1, [r7, #4]
- 80025bc:	88fb      	ldrh	r3, [r7, #6]
- 80025be:	4618      	mov	r0, r3
- 80025c0:	f000 fc2e 	bl	8002e20 <DrawChar>
-}
- 80025c4:	bf00      	nop
- 80025c6:	370c      	adds	r7, #12
- 80025c8:	46bd      	mov	sp, r7
- 80025ca:	bd90      	pop	{r4, r7, pc}
- 80025cc:	2000018c 	.word	0x2000018c
- 80025d0:	20000190 	.word	0x20000190
-
-080025d4 <BSP_LCD_DisplayStringAt>:
-  *            @arg  RIGHT_MODE
-  *            @arg  LEFT_MODE   
-  * @retval None
-  */
-void BSP_LCD_DisplayStringAt(uint16_t Xpos, uint16_t Ypos, uint8_t *Text, Text_AlignModeTypdef Mode)
-{
- 80025d4:	b5b0      	push	{r4, r5, r7, lr}
- 80025d6:	b088      	sub	sp, #32
- 80025d8:	af00      	add	r7, sp, #0
- 80025da:	60ba      	str	r2, [r7, #8]
- 80025dc:	461a      	mov	r2, r3
- 80025de:	4603      	mov	r3, r0
- 80025e0:	81fb      	strh	r3, [r7, #14]
- 80025e2:	460b      	mov	r3, r1
- 80025e4:	81bb      	strh	r3, [r7, #12]
- 80025e6:	4613      	mov	r3, r2
- 80025e8:	71fb      	strb	r3, [r7, #7]
-  uint16_t ref_column = 1, i = 0;
- 80025ea:	2301      	movs	r3, #1
- 80025ec:	83fb      	strh	r3, [r7, #30]
- 80025ee:	2300      	movs	r3, #0
- 80025f0:	83bb      	strh	r3, [r7, #28]
-  uint32_t size = 0, xsize = 0; 
- 80025f2:	2300      	movs	r3, #0
- 80025f4:	61bb      	str	r3, [r7, #24]
- 80025f6:	2300      	movs	r3, #0
- 80025f8:	613b      	str	r3, [r7, #16]
-  uint8_t  *ptr = Text;
- 80025fa:	68bb      	ldr	r3, [r7, #8]
- 80025fc:	617b      	str	r3, [r7, #20]
-  
-  /* Get the text size */
-  while (*ptr++) size ++ ;
- 80025fe:	e002      	b.n	8002606 <BSP_LCD_DisplayStringAt+0x32>
- 8002600:	69bb      	ldr	r3, [r7, #24]
- 8002602:	3301      	adds	r3, #1
- 8002604:	61bb      	str	r3, [r7, #24]
- 8002606:	697b      	ldr	r3, [r7, #20]
- 8002608:	1c5a      	adds	r2, r3, #1
- 800260a:	617a      	str	r2, [r7, #20]
- 800260c:	781b      	ldrb	r3, [r3, #0]
- 800260e:	2b00      	cmp	r3, #0
- 8002610:	d1f6      	bne.n	8002600 <BSP_LCD_DisplayStringAt+0x2c>
-  
-  /* Characters number per line */
-  xsize = (BSP_LCD_GetXSize()/DrawProp[ActiveLayer].pFont->Width);
- 8002612:	f7ff fe79 	bl	8002308 <BSP_LCD_GetXSize>
- 8002616:	4b4f      	ldr	r3, [pc, #316]	; (8002754 <BSP_LCD_DisplayStringAt+0x180>)
- 8002618:	681a      	ldr	r2, [r3, #0]
- 800261a:	494f      	ldr	r1, [pc, #316]	; (8002758 <BSP_LCD_DisplayStringAt+0x184>)
- 800261c:	4613      	mov	r3, r2
- 800261e:	005b      	lsls	r3, r3, #1
- 8002620:	4413      	add	r3, r2
- 8002622:	009b      	lsls	r3, r3, #2
- 8002624:	440b      	add	r3, r1
- 8002626:	3308      	adds	r3, #8
- 8002628:	681b      	ldr	r3, [r3, #0]
- 800262a:	889b      	ldrh	r3, [r3, #4]
- 800262c:	fbb0 f3f3 	udiv	r3, r0, r3
- 8002630:	613b      	str	r3, [r7, #16]
-  
-  switch (Mode)
- 8002632:	79fb      	ldrb	r3, [r7, #7]
- 8002634:	2b02      	cmp	r3, #2
- 8002636:	d01c      	beq.n	8002672 <BSP_LCD_DisplayStringAt+0x9e>
- 8002638:	2b03      	cmp	r3, #3
- 800263a:	d017      	beq.n	800266c <BSP_LCD_DisplayStringAt+0x98>
- 800263c:	2b01      	cmp	r3, #1
- 800263e:	d12e      	bne.n	800269e <BSP_LCD_DisplayStringAt+0xca>
-  {
-  case CENTER_MODE:
-    {
-      ref_column = Xpos + ((xsize - size)* DrawProp[ActiveLayer].pFont->Width) / 2;
- 8002640:	693a      	ldr	r2, [r7, #16]
- 8002642:	69bb      	ldr	r3, [r7, #24]
- 8002644:	1ad1      	subs	r1, r2, r3
- 8002646:	4b43      	ldr	r3, [pc, #268]	; (8002754 <BSP_LCD_DisplayStringAt+0x180>)
- 8002648:	681a      	ldr	r2, [r3, #0]
- 800264a:	4843      	ldr	r0, [pc, #268]	; (8002758 <BSP_LCD_DisplayStringAt+0x184>)
- 800264c:	4613      	mov	r3, r2
- 800264e:	005b      	lsls	r3, r3, #1
- 8002650:	4413      	add	r3, r2
- 8002652:	009b      	lsls	r3, r3, #2
- 8002654:	4403      	add	r3, r0
- 8002656:	3308      	adds	r3, #8
- 8002658:	681b      	ldr	r3, [r3, #0]
- 800265a:	889b      	ldrh	r3, [r3, #4]
- 800265c:	fb03 f301 	mul.w	r3, r3, r1
- 8002660:	085b      	lsrs	r3, r3, #1
- 8002662:	b29a      	uxth	r2, r3
- 8002664:	89fb      	ldrh	r3, [r7, #14]
- 8002666:	4413      	add	r3, r2
- 8002668:	83fb      	strh	r3, [r7, #30]
-      break;
- 800266a:	e01b      	b.n	80026a4 <BSP_LCD_DisplayStringAt+0xd0>
-    }
-  case LEFT_MODE:
-    {
-      ref_column = Xpos;
- 800266c:	89fb      	ldrh	r3, [r7, #14]
- 800266e:	83fb      	strh	r3, [r7, #30]
-      break;
- 8002670:	e018      	b.n	80026a4 <BSP_LCD_DisplayStringAt+0xd0>
-    }
-  case RIGHT_MODE:
-    {
-      ref_column = - Xpos + ((xsize - size)*DrawProp[ActiveLayer].pFont->Width);
- 8002672:	693a      	ldr	r2, [r7, #16]
- 8002674:	69bb      	ldr	r3, [r7, #24]
- 8002676:	1ad3      	subs	r3, r2, r3
- 8002678:	b299      	uxth	r1, r3
- 800267a:	4b36      	ldr	r3, [pc, #216]	; (8002754 <BSP_LCD_DisplayStringAt+0x180>)
- 800267c:	681a      	ldr	r2, [r3, #0]
- 800267e:	4836      	ldr	r0, [pc, #216]	; (8002758 <BSP_LCD_DisplayStringAt+0x184>)
- 8002680:	4613      	mov	r3, r2
- 8002682:	005b      	lsls	r3, r3, #1
- 8002684:	4413      	add	r3, r2
- 8002686:	009b      	lsls	r3, r3, #2
- 8002688:	4403      	add	r3, r0
- 800268a:	3308      	adds	r3, #8
- 800268c:	681b      	ldr	r3, [r3, #0]
- 800268e:	889b      	ldrh	r3, [r3, #4]
- 8002690:	fb11 f303 	smulbb	r3, r1, r3
- 8002694:	b29a      	uxth	r2, r3
- 8002696:	89fb      	ldrh	r3, [r7, #14]
- 8002698:	1ad3      	subs	r3, r2, r3
- 800269a:	83fb      	strh	r3, [r7, #30]
-      break;
- 800269c:	e002      	b.n	80026a4 <BSP_LCD_DisplayStringAt+0xd0>
-    }    
-  default:
-    {
-      ref_column = Xpos;
- 800269e:	89fb      	ldrh	r3, [r7, #14]
- 80026a0:	83fb      	strh	r3, [r7, #30]
-      break;
- 80026a2:	bf00      	nop
-    }
-  }
-  
-  /* Check that the Start column is located in the screen */
-  if ((ref_column < 1) || (ref_column >= 0x8000))
- 80026a4:	8bfb      	ldrh	r3, [r7, #30]
- 80026a6:	2b00      	cmp	r3, #0
- 80026a8:	d003      	beq.n	80026b2 <BSP_LCD_DisplayStringAt+0xde>
- 80026aa:	f9b7 301e 	ldrsh.w	r3, [r7, #30]
- 80026ae:	2b00      	cmp	r3, #0
- 80026b0:	da1d      	bge.n	80026ee <BSP_LCD_DisplayStringAt+0x11a>
-  {
-    ref_column = 1;
- 80026b2:	2301      	movs	r3, #1
- 80026b4:	83fb      	strh	r3, [r7, #30]
-  }
-
-  /* Send the string character by character on LCD */
-  while ((*Text != 0) & (((BSP_LCD_GetXSize() - (i*DrawProp[ActiveLayer].pFont->Width)) & 0xFFFF) >= DrawProp[ActiveLayer].pFont->Width))
- 80026b6:	e01a      	b.n	80026ee <BSP_LCD_DisplayStringAt+0x11a>
-  {
-    /* Display one character on LCD */
-    BSP_LCD_DisplayChar(ref_column, Ypos, *Text);
- 80026b8:	68bb      	ldr	r3, [r7, #8]
- 80026ba:	781a      	ldrb	r2, [r3, #0]
- 80026bc:	89b9      	ldrh	r1, [r7, #12]
- 80026be:	8bfb      	ldrh	r3, [r7, #30]
- 80026c0:	4618      	mov	r0, r3
- 80026c2:	f7ff ff43 	bl	800254c <BSP_LCD_DisplayChar>
-    /* Decrement the column position by 16 */
-    ref_column += DrawProp[ActiveLayer].pFont->Width;
- 80026c6:	4b23      	ldr	r3, [pc, #140]	; (8002754 <BSP_LCD_DisplayStringAt+0x180>)
- 80026c8:	681a      	ldr	r2, [r3, #0]
- 80026ca:	4923      	ldr	r1, [pc, #140]	; (8002758 <BSP_LCD_DisplayStringAt+0x184>)
- 80026cc:	4613      	mov	r3, r2
- 80026ce:	005b      	lsls	r3, r3, #1
- 80026d0:	4413      	add	r3, r2
- 80026d2:	009b      	lsls	r3, r3, #2
- 80026d4:	440b      	add	r3, r1
- 80026d6:	3308      	adds	r3, #8
- 80026d8:	681b      	ldr	r3, [r3, #0]
- 80026da:	889a      	ldrh	r2, [r3, #4]
- 80026dc:	8bfb      	ldrh	r3, [r7, #30]
- 80026de:	4413      	add	r3, r2
- 80026e0:	83fb      	strh	r3, [r7, #30]
-    /* Point on the next character */
-    Text++;
- 80026e2:	68bb      	ldr	r3, [r7, #8]
- 80026e4:	3301      	adds	r3, #1
- 80026e6:	60bb      	str	r3, [r7, #8]
-    i++;
- 80026e8:	8bbb      	ldrh	r3, [r7, #28]
- 80026ea:	3301      	adds	r3, #1
- 80026ec:	83bb      	strh	r3, [r7, #28]
-  while ((*Text != 0) & (((BSP_LCD_GetXSize() - (i*DrawProp[ActiveLayer].pFont->Width)) & 0xFFFF) >= DrawProp[ActiveLayer].pFont->Width))
- 80026ee:	68bb      	ldr	r3, [r7, #8]
- 80026f0:	781b      	ldrb	r3, [r3, #0]
- 80026f2:	2b00      	cmp	r3, #0
- 80026f4:	bf14      	ite	ne
- 80026f6:	2301      	movne	r3, #1
- 80026f8:	2300      	moveq	r3, #0
- 80026fa:	b2dc      	uxtb	r4, r3
- 80026fc:	f7ff fe04 	bl	8002308 <BSP_LCD_GetXSize>
- 8002700:	4605      	mov	r5, r0
- 8002702:	8bb9      	ldrh	r1, [r7, #28]
- 8002704:	4b13      	ldr	r3, [pc, #76]	; (8002754 <BSP_LCD_DisplayStringAt+0x180>)
- 8002706:	681a      	ldr	r2, [r3, #0]
- 8002708:	4813      	ldr	r0, [pc, #76]	; (8002758 <BSP_LCD_DisplayStringAt+0x184>)
- 800270a:	4613      	mov	r3, r2
- 800270c:	005b      	lsls	r3, r3, #1
- 800270e:	4413      	add	r3, r2
- 8002710:	009b      	lsls	r3, r3, #2
- 8002712:	4403      	add	r3, r0
- 8002714:	3308      	adds	r3, #8
- 8002716:	681b      	ldr	r3, [r3, #0]
- 8002718:	889b      	ldrh	r3, [r3, #4]
- 800271a:	fb03 f301 	mul.w	r3, r3, r1
- 800271e:	1aeb      	subs	r3, r5, r3
- 8002720:	b299      	uxth	r1, r3
- 8002722:	4b0c      	ldr	r3, [pc, #48]	; (8002754 <BSP_LCD_DisplayStringAt+0x180>)
- 8002724:	681a      	ldr	r2, [r3, #0]
- 8002726:	480c      	ldr	r0, [pc, #48]	; (8002758 <BSP_LCD_DisplayStringAt+0x184>)
- 8002728:	4613      	mov	r3, r2
- 800272a:	005b      	lsls	r3, r3, #1
- 800272c:	4413      	add	r3, r2
- 800272e:	009b      	lsls	r3, r3, #2
- 8002730:	4403      	add	r3, r0
- 8002732:	3308      	adds	r3, #8
- 8002734:	681b      	ldr	r3, [r3, #0]
- 8002736:	889b      	ldrh	r3, [r3, #4]
- 8002738:	4299      	cmp	r1, r3
- 800273a:	bf2c      	ite	cs
- 800273c:	2301      	movcs	r3, #1
- 800273e:	2300      	movcc	r3, #0
- 8002740:	b2db      	uxtb	r3, r3
- 8002742:	4023      	ands	r3, r4
- 8002744:	b2db      	uxtb	r3, r3
- 8002746:	2b00      	cmp	r3, #0
- 8002748:	d1b6      	bne.n	80026b8 <BSP_LCD_DisplayStringAt+0xe4>
-  }  
-}
- 800274a:	bf00      	nop
- 800274c:	3720      	adds	r7, #32
- 800274e:	46bd      	mov	sp, r7
- 8002750:	bdb0      	pop	{r4, r5, r7, pc}
- 8002752:	bf00      	nop
- 8002754:	2000018c 	.word	0x2000018c
- 8002758:	20000190 	.word	0x20000190
-
-0800275c <BSP_LCD_DisplayStringAtLine>:
-  * @param  Line: Line where to display the character shape
-  * @param  ptr: Pointer to string to display on LCD
-  * @retval None
-  */
-void BSP_LCD_DisplayStringAtLine(uint16_t Line, uint8_t *ptr)
-{  
- 800275c:	b580      	push	{r7, lr}
- 800275e:	b082      	sub	sp, #8
- 8002760:	af00      	add	r7, sp, #0
- 8002762:	4603      	mov	r3, r0
- 8002764:	6039      	str	r1, [r7, #0]
- 8002766:	80fb      	strh	r3, [r7, #6]
-  BSP_LCD_DisplayStringAt(0, LINE(Line), ptr, LEFT_MODE);
- 8002768:	f7ff feb2 	bl	80024d0 <BSP_LCD_GetFont>
- 800276c:	4603      	mov	r3, r0
- 800276e:	88db      	ldrh	r3, [r3, #6]
- 8002770:	88fa      	ldrh	r2, [r7, #6]
- 8002772:	fb12 f303 	smulbb	r3, r2, r3
- 8002776:	b299      	uxth	r1, r3
- 8002778:	2303      	movs	r3, #3
- 800277a:	683a      	ldr	r2, [r7, #0]
- 800277c:	2000      	movs	r0, #0
- 800277e:	f7ff ff29 	bl	80025d4 <BSP_LCD_DisplayStringAt>
-}
- 8002782:	bf00      	nop
- 8002784:	3708      	adds	r7, #8
- 8002786:	46bd      	mov	sp, r7
- 8002788:	bd80      	pop	{r7, pc}
-	...
-
-0800278c <BSP_LCD_DrawHLine>:
-  * @param  Ypos: Y position
-  * @param  Length: Line length
-  * @retval None
-  */
-void BSP_LCD_DrawHLine(uint16_t Xpos, uint16_t Ypos, uint16_t Length)
-{
- 800278c:	b5b0      	push	{r4, r5, r7, lr}
- 800278e:	b086      	sub	sp, #24
- 8002790:	af02      	add	r7, sp, #8
- 8002792:	4603      	mov	r3, r0
- 8002794:	80fb      	strh	r3, [r7, #6]
- 8002796:	460b      	mov	r3, r1
- 8002798:	80bb      	strh	r3, [r7, #4]
- 800279a:	4613      	mov	r3, r2
- 800279c:	807b      	strh	r3, [r7, #2]
-  uint32_t  Xaddress = 0;
- 800279e:	2300      	movs	r3, #0
- 80027a0:	60fb      	str	r3, [r7, #12]
-  
-  /* Get the line address */
-  if(hLtdcHandler.LayerCfg[ActiveLayer].PixelFormat == LTDC_PIXEL_FORMAT_RGB565)
- 80027a2:	4b26      	ldr	r3, [pc, #152]	; (800283c <BSP_LCD_DrawHLine+0xb0>)
- 80027a4:	681b      	ldr	r3, [r3, #0]
- 80027a6:	4a26      	ldr	r2, [pc, #152]	; (8002840 <BSP_LCD_DrawHLine+0xb4>)
- 80027a8:	2134      	movs	r1, #52	; 0x34
- 80027aa:	fb01 f303 	mul.w	r3, r1, r3
- 80027ae:	4413      	add	r3, r2
- 80027b0:	3348      	adds	r3, #72	; 0x48
- 80027b2:	681b      	ldr	r3, [r3, #0]
- 80027b4:	2b02      	cmp	r3, #2
- 80027b6:	d114      	bne.n	80027e2 <BSP_LCD_DrawHLine+0x56>
-  { /* RGB565 format */
-    Xaddress = (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress) + 2*(BSP_LCD_GetXSize()*Ypos + Xpos);
- 80027b8:	4b20      	ldr	r3, [pc, #128]	; (800283c <BSP_LCD_DrawHLine+0xb0>)
- 80027ba:	681b      	ldr	r3, [r3, #0]
- 80027bc:	4a20      	ldr	r2, [pc, #128]	; (8002840 <BSP_LCD_DrawHLine+0xb4>)
- 80027be:	2134      	movs	r1, #52	; 0x34
- 80027c0:	fb01 f303 	mul.w	r3, r1, r3
- 80027c4:	4413      	add	r3, r2
- 80027c6:	335c      	adds	r3, #92	; 0x5c
- 80027c8:	681c      	ldr	r4, [r3, #0]
- 80027ca:	f7ff fd9d 	bl	8002308 <BSP_LCD_GetXSize>
- 80027ce:	4602      	mov	r2, r0
- 80027d0:	88bb      	ldrh	r3, [r7, #4]
- 80027d2:	fb03 f202 	mul.w	r2, r3, r2
- 80027d6:	88fb      	ldrh	r3, [r7, #6]
- 80027d8:	4413      	add	r3, r2
- 80027da:	005b      	lsls	r3, r3, #1
- 80027dc:	4423      	add	r3, r4
- 80027de:	60fb      	str	r3, [r7, #12]
- 80027e0:	e013      	b.n	800280a <BSP_LCD_DrawHLine+0x7e>
-  }
-  else
-  { /* ARGB8888 format */
-    Xaddress = (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress) + 4*(BSP_LCD_GetXSize()*Ypos + Xpos);
- 80027e2:	4b16      	ldr	r3, [pc, #88]	; (800283c <BSP_LCD_DrawHLine+0xb0>)
- 80027e4:	681b      	ldr	r3, [r3, #0]
- 80027e6:	4a16      	ldr	r2, [pc, #88]	; (8002840 <BSP_LCD_DrawHLine+0xb4>)
- 80027e8:	2134      	movs	r1, #52	; 0x34
- 80027ea:	fb01 f303 	mul.w	r3, r1, r3
- 80027ee:	4413      	add	r3, r2
- 80027f0:	335c      	adds	r3, #92	; 0x5c
- 80027f2:	681c      	ldr	r4, [r3, #0]
- 80027f4:	f7ff fd88 	bl	8002308 <BSP_LCD_GetXSize>
- 80027f8:	4602      	mov	r2, r0
- 80027fa:	88bb      	ldrh	r3, [r7, #4]
- 80027fc:	fb03 f202 	mul.w	r2, r3, r2
- 8002800:	88fb      	ldrh	r3, [r7, #6]
- 8002802:	4413      	add	r3, r2
- 8002804:	009b      	lsls	r3, r3, #2
- 8002806:	4423      	add	r3, r4
- 8002808:	60fb      	str	r3, [r7, #12]
-  }
-  
-  /* Write line */
-  LL_FillBuffer(ActiveLayer, (uint32_t *)Xaddress, Length, 1, 0, DrawProp[ActiveLayer].TextColor);
- 800280a:	4b0c      	ldr	r3, [pc, #48]	; (800283c <BSP_LCD_DrawHLine+0xb0>)
- 800280c:	6818      	ldr	r0, [r3, #0]
- 800280e:	68fc      	ldr	r4, [r7, #12]
- 8002810:	887d      	ldrh	r5, [r7, #2]
- 8002812:	4b0a      	ldr	r3, [pc, #40]	; (800283c <BSP_LCD_DrawHLine+0xb0>)
- 8002814:	681a      	ldr	r2, [r3, #0]
- 8002816:	490b      	ldr	r1, [pc, #44]	; (8002844 <BSP_LCD_DrawHLine+0xb8>)
- 8002818:	4613      	mov	r3, r2
- 800281a:	005b      	lsls	r3, r3, #1
- 800281c:	4413      	add	r3, r2
- 800281e:	009b      	lsls	r3, r3, #2
- 8002820:	440b      	add	r3, r1
- 8002822:	681b      	ldr	r3, [r3, #0]
- 8002824:	9301      	str	r3, [sp, #4]
- 8002826:	2300      	movs	r3, #0
- 8002828:	9300      	str	r3, [sp, #0]
- 800282a:	2301      	movs	r3, #1
- 800282c:	462a      	mov	r2, r5
- 800282e:	4621      	mov	r1, r4
- 8002830:	f000 fbae 	bl	8002f90 <LL_FillBuffer>
-}
- 8002834:	bf00      	nop
- 8002836:	3710      	adds	r7, #16
- 8002838:	46bd      	mov	sp, r7
- 800283a:	bdb0      	pop	{r4, r5, r7, pc}
- 800283c:	2000018c 	.word	0x2000018c
- 8002840:	200089d8 	.word	0x200089d8
- 8002844:	20000190 	.word	0x20000190
-
-08002848 <BSP_LCD_DrawCircle>:
-  * @param  Ypos: Y position
-  * @param  Radius: Circle radius
-  * @retval None
-  */
-void BSP_LCD_DrawCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius)
-{
- 8002848:	b590      	push	{r4, r7, lr}
- 800284a:	b087      	sub	sp, #28
- 800284c:	af00      	add	r7, sp, #0
- 800284e:	4603      	mov	r3, r0
- 8002850:	80fb      	strh	r3, [r7, #6]
- 8002852:	460b      	mov	r3, r1
- 8002854:	80bb      	strh	r3, [r7, #4]
- 8002856:	4613      	mov	r3, r2
- 8002858:	807b      	strh	r3, [r7, #2]
-  int32_t   decision;    /* Decision Variable */ 
-  uint32_t  current_x;   /* Current X Value */
-  uint32_t  current_y;   /* Current Y Value */
-  
-  decision = 3 - (Radius << 1);
- 800285a:	887b      	ldrh	r3, [r7, #2]
- 800285c:	005b      	lsls	r3, r3, #1
- 800285e:	f1c3 0303 	rsb	r3, r3, #3
- 8002862:	617b      	str	r3, [r7, #20]
-  current_x = 0;
- 8002864:	2300      	movs	r3, #0
- 8002866:	613b      	str	r3, [r7, #16]
-  current_y = Radius;
- 8002868:	887b      	ldrh	r3, [r7, #2]
- 800286a:	60fb      	str	r3, [r7, #12]
-  
-  while (current_x <= current_y)
- 800286c:	e0cf      	b.n	8002a0e <BSP_LCD_DrawCircle+0x1c6>
-  {
-    BSP_LCD_DrawPixel((Xpos + current_x), (Ypos - current_y), DrawProp[ActiveLayer].TextColor);
- 800286e:	693b      	ldr	r3, [r7, #16]
- 8002870:	b29a      	uxth	r2, r3
- 8002872:	88fb      	ldrh	r3, [r7, #6]
- 8002874:	4413      	add	r3, r2
- 8002876:	b298      	uxth	r0, r3
- 8002878:	68fb      	ldr	r3, [r7, #12]
- 800287a:	b29b      	uxth	r3, r3
- 800287c:	88ba      	ldrh	r2, [r7, #4]
- 800287e:	1ad3      	subs	r3, r2, r3
- 8002880:	b29c      	uxth	r4, r3
- 8002882:	4b67      	ldr	r3, [pc, #412]	; (8002a20 <BSP_LCD_DrawCircle+0x1d8>)
- 8002884:	681a      	ldr	r2, [r3, #0]
- 8002886:	4967      	ldr	r1, [pc, #412]	; (8002a24 <BSP_LCD_DrawCircle+0x1dc>)
- 8002888:	4613      	mov	r3, r2
- 800288a:	005b      	lsls	r3, r3, #1
- 800288c:	4413      	add	r3, r2
- 800288e:	009b      	lsls	r3, r3, #2
- 8002890:	440b      	add	r3, r1
- 8002892:	681b      	ldr	r3, [r3, #0]
- 8002894:	461a      	mov	r2, r3
- 8002896:	4621      	mov	r1, r4
- 8002898:	f000 f8c6 	bl	8002a28 <BSP_LCD_DrawPixel>
-    
-    BSP_LCD_DrawPixel((Xpos - current_x), (Ypos - current_y), DrawProp[ActiveLayer].TextColor);
- 800289c:	693b      	ldr	r3, [r7, #16]
- 800289e:	b29b      	uxth	r3, r3
- 80028a0:	88fa      	ldrh	r2, [r7, #6]
- 80028a2:	1ad3      	subs	r3, r2, r3
- 80028a4:	b298      	uxth	r0, r3
- 80028a6:	68fb      	ldr	r3, [r7, #12]
- 80028a8:	b29b      	uxth	r3, r3
- 80028aa:	88ba      	ldrh	r2, [r7, #4]
- 80028ac:	1ad3      	subs	r3, r2, r3
- 80028ae:	b29c      	uxth	r4, r3
- 80028b0:	4b5b      	ldr	r3, [pc, #364]	; (8002a20 <BSP_LCD_DrawCircle+0x1d8>)
- 80028b2:	681a      	ldr	r2, [r3, #0]
- 80028b4:	495b      	ldr	r1, [pc, #364]	; (8002a24 <BSP_LCD_DrawCircle+0x1dc>)
- 80028b6:	4613      	mov	r3, r2
- 80028b8:	005b      	lsls	r3, r3, #1
- 80028ba:	4413      	add	r3, r2
- 80028bc:	009b      	lsls	r3, r3, #2
- 80028be:	440b      	add	r3, r1
- 80028c0:	681b      	ldr	r3, [r3, #0]
- 80028c2:	461a      	mov	r2, r3
- 80028c4:	4621      	mov	r1, r4
- 80028c6:	f000 f8af 	bl	8002a28 <BSP_LCD_DrawPixel>
-    
-    BSP_LCD_DrawPixel((Xpos + current_y), (Ypos - current_x), DrawProp[ActiveLayer].TextColor);
- 80028ca:	68fb      	ldr	r3, [r7, #12]
- 80028cc:	b29a      	uxth	r2, r3
- 80028ce:	88fb      	ldrh	r3, [r7, #6]
- 80028d0:	4413      	add	r3, r2
- 80028d2:	b298      	uxth	r0, r3
- 80028d4:	693b      	ldr	r3, [r7, #16]
- 80028d6:	b29b      	uxth	r3, r3
- 80028d8:	88ba      	ldrh	r2, [r7, #4]
- 80028da:	1ad3      	subs	r3, r2, r3
- 80028dc:	b29c      	uxth	r4, r3
- 80028de:	4b50      	ldr	r3, [pc, #320]	; (8002a20 <BSP_LCD_DrawCircle+0x1d8>)
- 80028e0:	681a      	ldr	r2, [r3, #0]
- 80028e2:	4950      	ldr	r1, [pc, #320]	; (8002a24 <BSP_LCD_DrawCircle+0x1dc>)
- 80028e4:	4613      	mov	r3, r2
- 80028e6:	005b      	lsls	r3, r3, #1
- 80028e8:	4413      	add	r3, r2
- 80028ea:	009b      	lsls	r3, r3, #2
- 80028ec:	440b      	add	r3, r1
- 80028ee:	681b      	ldr	r3, [r3, #0]
- 80028f0:	461a      	mov	r2, r3
- 80028f2:	4621      	mov	r1, r4
- 80028f4:	f000 f898 	bl	8002a28 <BSP_LCD_DrawPixel>
-    
-    BSP_LCD_DrawPixel((Xpos - current_y), (Ypos - current_x), DrawProp[ActiveLayer].TextColor);
- 80028f8:	68fb      	ldr	r3, [r7, #12]
- 80028fa:	b29b      	uxth	r3, r3
- 80028fc:	88fa      	ldrh	r2, [r7, #6]
- 80028fe:	1ad3      	subs	r3, r2, r3
- 8002900:	b298      	uxth	r0, r3
- 8002902:	693b      	ldr	r3, [r7, #16]
- 8002904:	b29b      	uxth	r3, r3
- 8002906:	88ba      	ldrh	r2, [r7, #4]
- 8002908:	1ad3      	subs	r3, r2, r3
- 800290a:	b29c      	uxth	r4, r3
- 800290c:	4b44      	ldr	r3, [pc, #272]	; (8002a20 <BSP_LCD_DrawCircle+0x1d8>)
- 800290e:	681a      	ldr	r2, [r3, #0]
- 8002910:	4944      	ldr	r1, [pc, #272]	; (8002a24 <BSP_LCD_DrawCircle+0x1dc>)
- 8002912:	4613      	mov	r3, r2
- 8002914:	005b      	lsls	r3, r3, #1
- 8002916:	4413      	add	r3, r2
- 8002918:	009b      	lsls	r3, r3, #2
- 800291a:	440b      	add	r3, r1
- 800291c:	681b      	ldr	r3, [r3, #0]
- 800291e:	461a      	mov	r2, r3
- 8002920:	4621      	mov	r1, r4
- 8002922:	f000 f881 	bl	8002a28 <BSP_LCD_DrawPixel>
-    
-    BSP_LCD_DrawPixel((Xpos + current_x), (Ypos + current_y), DrawProp[ActiveLayer].TextColor);
- 8002926:	693b      	ldr	r3, [r7, #16]
- 8002928:	b29a      	uxth	r2, r3
- 800292a:	88fb      	ldrh	r3, [r7, #6]
- 800292c:	4413      	add	r3, r2
- 800292e:	b298      	uxth	r0, r3
- 8002930:	68fb      	ldr	r3, [r7, #12]
- 8002932:	b29a      	uxth	r2, r3
- 8002934:	88bb      	ldrh	r3, [r7, #4]
- 8002936:	4413      	add	r3, r2
- 8002938:	b29c      	uxth	r4, r3
- 800293a:	4b39      	ldr	r3, [pc, #228]	; (8002a20 <BSP_LCD_DrawCircle+0x1d8>)
- 800293c:	681a      	ldr	r2, [r3, #0]
- 800293e:	4939      	ldr	r1, [pc, #228]	; (8002a24 <BSP_LCD_DrawCircle+0x1dc>)
- 8002940:	4613      	mov	r3, r2
- 8002942:	005b      	lsls	r3, r3, #1
- 8002944:	4413      	add	r3, r2
- 8002946:	009b      	lsls	r3, r3, #2
- 8002948:	440b      	add	r3, r1
- 800294a:	681b      	ldr	r3, [r3, #0]
- 800294c:	461a      	mov	r2, r3
- 800294e:	4621      	mov	r1, r4
- 8002950:	f000 f86a 	bl	8002a28 <BSP_LCD_DrawPixel>
-    
-    BSP_LCD_DrawPixel((Xpos - current_x), (Ypos + current_y), DrawProp[ActiveLayer].TextColor);
- 8002954:	693b      	ldr	r3, [r7, #16]
- 8002956:	b29b      	uxth	r3, r3
- 8002958:	88fa      	ldrh	r2, [r7, #6]
- 800295a:	1ad3      	subs	r3, r2, r3
- 800295c:	b298      	uxth	r0, r3
- 800295e:	68fb      	ldr	r3, [r7, #12]
- 8002960:	b29a      	uxth	r2, r3
- 8002962:	88bb      	ldrh	r3, [r7, #4]
- 8002964:	4413      	add	r3, r2
- 8002966:	b29c      	uxth	r4, r3
- 8002968:	4b2d      	ldr	r3, [pc, #180]	; (8002a20 <BSP_LCD_DrawCircle+0x1d8>)
- 800296a:	681a      	ldr	r2, [r3, #0]
- 800296c:	492d      	ldr	r1, [pc, #180]	; (8002a24 <BSP_LCD_DrawCircle+0x1dc>)
- 800296e:	4613      	mov	r3, r2
- 8002970:	005b      	lsls	r3, r3, #1
- 8002972:	4413      	add	r3, r2
- 8002974:	009b      	lsls	r3, r3, #2
- 8002976:	440b      	add	r3, r1
- 8002978:	681b      	ldr	r3, [r3, #0]
- 800297a:	461a      	mov	r2, r3
- 800297c:	4621      	mov	r1, r4
- 800297e:	f000 f853 	bl	8002a28 <BSP_LCD_DrawPixel>
-    
-    BSP_LCD_DrawPixel((Xpos + current_y), (Ypos + current_x), DrawProp[ActiveLayer].TextColor);
- 8002982:	68fb      	ldr	r3, [r7, #12]
- 8002984:	b29a      	uxth	r2, r3
- 8002986:	88fb      	ldrh	r3, [r7, #6]
- 8002988:	4413      	add	r3, r2
- 800298a:	b298      	uxth	r0, r3
- 800298c:	693b      	ldr	r3, [r7, #16]
- 800298e:	b29a      	uxth	r2, r3
- 8002990:	88bb      	ldrh	r3, [r7, #4]
- 8002992:	4413      	add	r3, r2
- 8002994:	b29c      	uxth	r4, r3
- 8002996:	4b22      	ldr	r3, [pc, #136]	; (8002a20 <BSP_LCD_DrawCircle+0x1d8>)
- 8002998:	681a      	ldr	r2, [r3, #0]
- 800299a:	4922      	ldr	r1, [pc, #136]	; (8002a24 <BSP_LCD_DrawCircle+0x1dc>)
- 800299c:	4613      	mov	r3, r2
- 800299e:	005b      	lsls	r3, r3, #1
- 80029a0:	4413      	add	r3, r2
- 80029a2:	009b      	lsls	r3, r3, #2
- 80029a4:	440b      	add	r3, r1
- 80029a6:	681b      	ldr	r3, [r3, #0]
- 80029a8:	461a      	mov	r2, r3
- 80029aa:	4621      	mov	r1, r4
- 80029ac:	f000 f83c 	bl	8002a28 <BSP_LCD_DrawPixel>
-    
-    BSP_LCD_DrawPixel((Xpos - current_y), (Ypos + current_x), DrawProp[ActiveLayer].TextColor);
- 80029b0:	68fb      	ldr	r3, [r7, #12]
- 80029b2:	b29b      	uxth	r3, r3
- 80029b4:	88fa      	ldrh	r2, [r7, #6]
- 80029b6:	1ad3      	subs	r3, r2, r3
- 80029b8:	b298      	uxth	r0, r3
- 80029ba:	693b      	ldr	r3, [r7, #16]
- 80029bc:	b29a      	uxth	r2, r3
- 80029be:	88bb      	ldrh	r3, [r7, #4]
- 80029c0:	4413      	add	r3, r2
- 80029c2:	b29c      	uxth	r4, r3
- 80029c4:	4b16      	ldr	r3, [pc, #88]	; (8002a20 <BSP_LCD_DrawCircle+0x1d8>)
- 80029c6:	681a      	ldr	r2, [r3, #0]
- 80029c8:	4916      	ldr	r1, [pc, #88]	; (8002a24 <BSP_LCD_DrawCircle+0x1dc>)
- 80029ca:	4613      	mov	r3, r2
- 80029cc:	005b      	lsls	r3, r3, #1
- 80029ce:	4413      	add	r3, r2
- 80029d0:	009b      	lsls	r3, r3, #2
- 80029d2:	440b      	add	r3, r1
- 80029d4:	681b      	ldr	r3, [r3, #0]
- 80029d6:	461a      	mov	r2, r3
- 80029d8:	4621      	mov	r1, r4
- 80029da:	f000 f825 	bl	8002a28 <BSP_LCD_DrawPixel>
-    
-    if (decision < 0)
- 80029de:	697b      	ldr	r3, [r7, #20]
- 80029e0:	2b00      	cmp	r3, #0
- 80029e2:	da06      	bge.n	80029f2 <BSP_LCD_DrawCircle+0x1aa>
-    { 
-      decision += (current_x << 2) + 6;
- 80029e4:	693b      	ldr	r3, [r7, #16]
- 80029e6:	009a      	lsls	r2, r3, #2
- 80029e8:	697b      	ldr	r3, [r7, #20]
- 80029ea:	4413      	add	r3, r2
- 80029ec:	3306      	adds	r3, #6
- 80029ee:	617b      	str	r3, [r7, #20]
- 80029f0:	e00a      	b.n	8002a08 <BSP_LCD_DrawCircle+0x1c0>
-    }
-    else
-    {
-      decision += ((current_x - current_y) << 2) + 10;
- 80029f2:	693a      	ldr	r2, [r7, #16]
- 80029f4:	68fb      	ldr	r3, [r7, #12]
- 80029f6:	1ad3      	subs	r3, r2, r3
- 80029f8:	009a      	lsls	r2, r3, #2
- 80029fa:	697b      	ldr	r3, [r7, #20]
- 80029fc:	4413      	add	r3, r2
- 80029fe:	330a      	adds	r3, #10
- 8002a00:	617b      	str	r3, [r7, #20]
-      current_y--;
- 8002a02:	68fb      	ldr	r3, [r7, #12]
- 8002a04:	3b01      	subs	r3, #1
- 8002a06:	60fb      	str	r3, [r7, #12]
-    }
-    current_x++;
- 8002a08:	693b      	ldr	r3, [r7, #16]
- 8002a0a:	3301      	adds	r3, #1
- 8002a0c:	613b      	str	r3, [r7, #16]
-  while (current_x <= current_y)
- 8002a0e:	693a      	ldr	r2, [r7, #16]
- 8002a10:	68fb      	ldr	r3, [r7, #12]
- 8002a12:	429a      	cmp	r2, r3
- 8002a14:	f67f af2b 	bls.w	800286e <BSP_LCD_DrawCircle+0x26>
-  } 
-}
- 8002a18:	bf00      	nop
- 8002a1a:	371c      	adds	r7, #28
- 8002a1c:	46bd      	mov	sp, r7
- 8002a1e:	bd90      	pop	{r4, r7, pc}
- 8002a20:	2000018c 	.word	0x2000018c
- 8002a24:	20000190 	.word	0x20000190
-
-08002a28 <BSP_LCD_DrawPixel>:
-  * @param  Ypos: Y position
-  * @param  RGB_Code: Pixel color in ARGB mode (8-8-8-8)
-  * @retval None
-  */
-void BSP_LCD_DrawPixel(uint16_t Xpos, uint16_t Ypos, uint32_t RGB_Code)
-{
- 8002a28:	b5b0      	push	{r4, r5, r7, lr}
- 8002a2a:	b082      	sub	sp, #8
- 8002a2c:	af00      	add	r7, sp, #0
- 8002a2e:	4603      	mov	r3, r0
- 8002a30:	603a      	str	r2, [r7, #0]
- 8002a32:	80fb      	strh	r3, [r7, #6]
- 8002a34:	460b      	mov	r3, r1
- 8002a36:	80bb      	strh	r3, [r7, #4]
-  /* Write data value to all SDRAM memory */
-  if(hLtdcHandler.LayerCfg[ActiveLayer].PixelFormat == LTDC_PIXEL_FORMAT_RGB565)
- 8002a38:	4b1d      	ldr	r3, [pc, #116]	; (8002ab0 <BSP_LCD_DrawPixel+0x88>)
- 8002a3a:	681b      	ldr	r3, [r3, #0]
- 8002a3c:	4a1d      	ldr	r2, [pc, #116]	; (8002ab4 <BSP_LCD_DrawPixel+0x8c>)
- 8002a3e:	2134      	movs	r1, #52	; 0x34
- 8002a40:	fb01 f303 	mul.w	r3, r1, r3
- 8002a44:	4413      	add	r3, r2
- 8002a46:	3348      	adds	r3, #72	; 0x48
- 8002a48:	681b      	ldr	r3, [r3, #0]
- 8002a4a:	2b02      	cmp	r3, #2
- 8002a4c:	d116      	bne.n	8002a7c <BSP_LCD_DrawPixel+0x54>
-  { /* RGB565 format */
-    *(__IO uint16_t*) (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress + (2*(Ypos*BSP_LCD_GetXSize() + Xpos))) = (uint16_t)RGB_Code;
- 8002a4e:	4b18      	ldr	r3, [pc, #96]	; (8002ab0 <BSP_LCD_DrawPixel+0x88>)
- 8002a50:	681b      	ldr	r3, [r3, #0]
- 8002a52:	4a18      	ldr	r2, [pc, #96]	; (8002ab4 <BSP_LCD_DrawPixel+0x8c>)
- 8002a54:	2134      	movs	r1, #52	; 0x34
- 8002a56:	fb01 f303 	mul.w	r3, r1, r3
- 8002a5a:	4413      	add	r3, r2
- 8002a5c:	335c      	adds	r3, #92	; 0x5c
- 8002a5e:	681c      	ldr	r4, [r3, #0]
- 8002a60:	88bd      	ldrh	r5, [r7, #4]
- 8002a62:	f7ff fc51 	bl	8002308 <BSP_LCD_GetXSize>
- 8002a66:	4603      	mov	r3, r0
- 8002a68:	fb03 f205 	mul.w	r2, r3, r5
- 8002a6c:	88fb      	ldrh	r3, [r7, #6]
- 8002a6e:	4413      	add	r3, r2
- 8002a70:	005b      	lsls	r3, r3, #1
- 8002a72:	4423      	add	r3, r4
- 8002a74:	683a      	ldr	r2, [r7, #0]
- 8002a76:	b292      	uxth	r2, r2
- 8002a78:	801a      	strh	r2, [r3, #0]
-  }
-  else
-  { /* ARGB8888 format */
-    *(__IO uint32_t*) (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress + (4*(Ypos*BSP_LCD_GetXSize() + Xpos))) = RGB_Code;
-  }
-}
- 8002a7a:	e015      	b.n	8002aa8 <BSP_LCD_DrawPixel+0x80>
-    *(__IO uint32_t*) (hLtdcHandler.LayerCfg[ActiveLayer].FBStartAdress + (4*(Ypos*BSP_LCD_GetXSize() + Xpos))) = RGB_Code;
- 8002a7c:	4b0c      	ldr	r3, [pc, #48]	; (8002ab0 <BSP_LCD_DrawPixel+0x88>)
- 8002a7e:	681b      	ldr	r3, [r3, #0]
- 8002a80:	4a0c      	ldr	r2, [pc, #48]	; (8002ab4 <BSP_LCD_DrawPixel+0x8c>)
- 8002a82:	2134      	movs	r1, #52	; 0x34
- 8002a84:	fb01 f303 	mul.w	r3, r1, r3
- 8002a88:	4413      	add	r3, r2
- 8002a8a:	335c      	adds	r3, #92	; 0x5c
- 8002a8c:	681c      	ldr	r4, [r3, #0]
- 8002a8e:	88bd      	ldrh	r5, [r7, #4]
- 8002a90:	f7ff fc3a 	bl	8002308 <BSP_LCD_GetXSize>
- 8002a94:	4603      	mov	r3, r0
- 8002a96:	fb03 f205 	mul.w	r2, r3, r5
- 8002a9a:	88fb      	ldrh	r3, [r7, #6]
- 8002a9c:	4413      	add	r3, r2
- 8002a9e:	009b      	lsls	r3, r3, #2
- 8002aa0:	4423      	add	r3, r4
- 8002aa2:	461a      	mov	r2, r3
- 8002aa4:	683b      	ldr	r3, [r7, #0]
- 8002aa6:	6013      	str	r3, [r2, #0]
-}
- 8002aa8:	bf00      	nop
- 8002aaa:	3708      	adds	r7, #8
- 8002aac:	46bd      	mov	sp, r7
- 8002aae:	bdb0      	pop	{r4, r5, r7, pc}
- 8002ab0:	2000018c 	.word	0x2000018c
- 8002ab4:	200089d8 	.word	0x200089d8
-
-08002ab8 <BSP_LCD_FillCircle>:
-  * @param  Ypos: Y position
-  * @param  Radius: Circle radius
-  * @retval None
-  */
-void BSP_LCD_FillCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius)
-{
- 8002ab8:	b580      	push	{r7, lr}
- 8002aba:	b086      	sub	sp, #24
- 8002abc:	af00      	add	r7, sp, #0
- 8002abe:	4603      	mov	r3, r0
- 8002ac0:	80fb      	strh	r3, [r7, #6]
- 8002ac2:	460b      	mov	r3, r1
- 8002ac4:	80bb      	strh	r3, [r7, #4]
- 8002ac6:	4613      	mov	r3, r2
- 8002ac8:	807b      	strh	r3, [r7, #2]
-  int32_t  decision;     /* Decision Variable */ 
-  uint32_t  current_x;   /* Current X Value */
-  uint32_t  current_y;   /* Current Y Value */
-  
-  decision = 3 - (Radius << 1);
- 8002aca:	887b      	ldrh	r3, [r7, #2]
- 8002acc:	005b      	lsls	r3, r3, #1
- 8002ace:	f1c3 0303 	rsb	r3, r3, #3
- 8002ad2:	617b      	str	r3, [r7, #20]
-  
-  current_x = 0;
- 8002ad4:	2300      	movs	r3, #0
- 8002ad6:	613b      	str	r3, [r7, #16]
-  current_y = Radius;
- 8002ad8:	887b      	ldrh	r3, [r7, #2]
- 8002ada:	60fb      	str	r3, [r7, #12]
-  
-  BSP_LCD_SetTextColor(DrawProp[ActiveLayer].TextColor);
- 8002adc:	4b44      	ldr	r3, [pc, #272]	; (8002bf0 <BSP_LCD_FillCircle+0x138>)
- 8002ade:	681a      	ldr	r2, [r3, #0]
- 8002ae0:	4944      	ldr	r1, [pc, #272]	; (8002bf4 <BSP_LCD_FillCircle+0x13c>)
- 8002ae2:	4613      	mov	r3, r2
- 8002ae4:	005b      	lsls	r3, r3, #1
- 8002ae6:	4413      	add	r3, r2
- 8002ae8:	009b      	lsls	r3, r3, #2
- 8002aea:	440b      	add	r3, r1
- 8002aec:	681b      	ldr	r3, [r3, #0]
- 8002aee:	4618      	mov	r0, r3
- 8002af0:	f7ff fca2 	bl	8002438 <BSP_LCD_SetTextColor>
-  
-  while (current_x <= current_y)
- 8002af4:	e061      	b.n	8002bba <BSP_LCD_FillCircle+0x102>
-  {
-    if(current_y > 0) 
- 8002af6:	68fb      	ldr	r3, [r7, #12]
- 8002af8:	2b00      	cmp	r3, #0
- 8002afa:	d021      	beq.n	8002b40 <BSP_LCD_FillCircle+0x88>
-    {
-      BSP_LCD_DrawHLine(Xpos - current_y, Ypos + current_x, 2*current_y);
- 8002afc:	68fb      	ldr	r3, [r7, #12]
- 8002afe:	b29b      	uxth	r3, r3
- 8002b00:	88fa      	ldrh	r2, [r7, #6]
- 8002b02:	1ad3      	subs	r3, r2, r3
- 8002b04:	b298      	uxth	r0, r3
- 8002b06:	693b      	ldr	r3, [r7, #16]
- 8002b08:	b29a      	uxth	r2, r3
- 8002b0a:	88bb      	ldrh	r3, [r7, #4]
- 8002b0c:	4413      	add	r3, r2
- 8002b0e:	b299      	uxth	r1, r3
- 8002b10:	68fb      	ldr	r3, [r7, #12]
- 8002b12:	b29b      	uxth	r3, r3
- 8002b14:	005b      	lsls	r3, r3, #1
- 8002b16:	b29b      	uxth	r3, r3
- 8002b18:	461a      	mov	r2, r3
- 8002b1a:	f7ff fe37 	bl	800278c <BSP_LCD_DrawHLine>
-      BSP_LCD_DrawHLine(Xpos - current_y, Ypos - current_x, 2*current_y);
- 8002b1e:	68fb      	ldr	r3, [r7, #12]
- 8002b20:	b29b      	uxth	r3, r3
- 8002b22:	88fa      	ldrh	r2, [r7, #6]
- 8002b24:	1ad3      	subs	r3, r2, r3
- 8002b26:	b298      	uxth	r0, r3
- 8002b28:	693b      	ldr	r3, [r7, #16]
- 8002b2a:	b29b      	uxth	r3, r3
- 8002b2c:	88ba      	ldrh	r2, [r7, #4]
- 8002b2e:	1ad3      	subs	r3, r2, r3
- 8002b30:	b299      	uxth	r1, r3
- 8002b32:	68fb      	ldr	r3, [r7, #12]
- 8002b34:	b29b      	uxth	r3, r3
- 8002b36:	005b      	lsls	r3, r3, #1
- 8002b38:	b29b      	uxth	r3, r3
- 8002b3a:	461a      	mov	r2, r3
- 8002b3c:	f7ff fe26 	bl	800278c <BSP_LCD_DrawHLine>
-    }
-    
-    if(current_x > 0) 
- 8002b40:	693b      	ldr	r3, [r7, #16]
- 8002b42:	2b00      	cmp	r3, #0
- 8002b44:	d021      	beq.n	8002b8a <BSP_LCD_FillCircle+0xd2>
-    {
-      BSP_LCD_DrawHLine(Xpos - current_x, Ypos - current_y, 2*current_x);
- 8002b46:	693b      	ldr	r3, [r7, #16]
- 8002b48:	b29b      	uxth	r3, r3
- 8002b4a:	88fa      	ldrh	r2, [r7, #6]
- 8002b4c:	1ad3      	subs	r3, r2, r3
- 8002b4e:	b298      	uxth	r0, r3
- 8002b50:	68fb      	ldr	r3, [r7, #12]
- 8002b52:	b29b      	uxth	r3, r3
- 8002b54:	88ba      	ldrh	r2, [r7, #4]
- 8002b56:	1ad3      	subs	r3, r2, r3
- 8002b58:	b299      	uxth	r1, r3
- 8002b5a:	693b      	ldr	r3, [r7, #16]
- 8002b5c:	b29b      	uxth	r3, r3
- 8002b5e:	005b      	lsls	r3, r3, #1
- 8002b60:	b29b      	uxth	r3, r3
- 8002b62:	461a      	mov	r2, r3
- 8002b64:	f7ff fe12 	bl	800278c <BSP_LCD_DrawHLine>
-      BSP_LCD_DrawHLine(Xpos - current_x, Ypos + current_y, 2*current_x);
- 8002b68:	693b      	ldr	r3, [r7, #16]
- 8002b6a:	b29b      	uxth	r3, r3
- 8002b6c:	88fa      	ldrh	r2, [r7, #6]
- 8002b6e:	1ad3      	subs	r3, r2, r3
- 8002b70:	b298      	uxth	r0, r3
- 8002b72:	68fb      	ldr	r3, [r7, #12]
- 8002b74:	b29a      	uxth	r2, r3
- 8002b76:	88bb      	ldrh	r3, [r7, #4]
- 8002b78:	4413      	add	r3, r2
- 8002b7a:	b299      	uxth	r1, r3
- 8002b7c:	693b      	ldr	r3, [r7, #16]
- 8002b7e:	b29b      	uxth	r3, r3
- 8002b80:	005b      	lsls	r3, r3, #1
- 8002b82:	b29b      	uxth	r3, r3
- 8002b84:	461a      	mov	r2, r3
- 8002b86:	f7ff fe01 	bl	800278c <BSP_LCD_DrawHLine>
-    }
-    if (decision < 0)
- 8002b8a:	697b      	ldr	r3, [r7, #20]
- 8002b8c:	2b00      	cmp	r3, #0
- 8002b8e:	da06      	bge.n	8002b9e <BSP_LCD_FillCircle+0xe6>
-    { 
-      decision += (current_x << 2) + 6;
- 8002b90:	693b      	ldr	r3, [r7, #16]
- 8002b92:	009a      	lsls	r2, r3, #2
- 8002b94:	697b      	ldr	r3, [r7, #20]
- 8002b96:	4413      	add	r3, r2
- 8002b98:	3306      	adds	r3, #6
- 8002b9a:	617b      	str	r3, [r7, #20]
- 8002b9c:	e00a      	b.n	8002bb4 <BSP_LCD_FillCircle+0xfc>
-    }
-    else
-    {
-      decision += ((current_x - current_y) << 2) + 10;
- 8002b9e:	693a      	ldr	r2, [r7, #16]
- 8002ba0:	68fb      	ldr	r3, [r7, #12]
- 8002ba2:	1ad3      	subs	r3, r2, r3
- 8002ba4:	009a      	lsls	r2, r3, #2
- 8002ba6:	697b      	ldr	r3, [r7, #20]
- 8002ba8:	4413      	add	r3, r2
- 8002baa:	330a      	adds	r3, #10
- 8002bac:	617b      	str	r3, [r7, #20]
-      current_y--;
- 8002bae:	68fb      	ldr	r3, [r7, #12]
- 8002bb0:	3b01      	subs	r3, #1
- 8002bb2:	60fb      	str	r3, [r7, #12]
-    }
-    current_x++;
- 8002bb4:	693b      	ldr	r3, [r7, #16]
- 8002bb6:	3301      	adds	r3, #1
- 8002bb8:	613b      	str	r3, [r7, #16]
-  while (current_x <= current_y)
- 8002bba:	693a      	ldr	r2, [r7, #16]
- 8002bbc:	68fb      	ldr	r3, [r7, #12]
- 8002bbe:	429a      	cmp	r2, r3
- 8002bc0:	d999      	bls.n	8002af6 <BSP_LCD_FillCircle+0x3e>
-  }
-  
-  BSP_LCD_SetTextColor(DrawProp[ActiveLayer].TextColor);
- 8002bc2:	4b0b      	ldr	r3, [pc, #44]	; (8002bf0 <BSP_LCD_FillCircle+0x138>)
- 8002bc4:	681a      	ldr	r2, [r3, #0]
- 8002bc6:	490b      	ldr	r1, [pc, #44]	; (8002bf4 <BSP_LCD_FillCircle+0x13c>)
- 8002bc8:	4613      	mov	r3, r2
- 8002bca:	005b      	lsls	r3, r3, #1
- 8002bcc:	4413      	add	r3, r2
- 8002bce:	009b      	lsls	r3, r3, #2
- 8002bd0:	440b      	add	r3, r1
- 8002bd2:	681b      	ldr	r3, [r3, #0]
- 8002bd4:	4618      	mov	r0, r3
- 8002bd6:	f7ff fc2f 	bl	8002438 <BSP_LCD_SetTextColor>
-  BSP_LCD_DrawCircle(Xpos, Ypos, Radius);
- 8002bda:	887a      	ldrh	r2, [r7, #2]
- 8002bdc:	88b9      	ldrh	r1, [r7, #4]
- 8002bde:	88fb      	ldrh	r3, [r7, #6]
- 8002be0:	4618      	mov	r0, r3
- 8002be2:	f7ff fe31 	bl	8002848 <BSP_LCD_DrawCircle>
-}
- 8002be6:	bf00      	nop
- 8002be8:	3718      	adds	r7, #24
- 8002bea:	46bd      	mov	sp, r7
- 8002bec:	bd80      	pop	{r7, pc}
- 8002bee:	bf00      	nop
- 8002bf0:	2000018c 	.word	0x2000018c
- 8002bf4:	20000190 	.word	0x20000190
-
-08002bf8 <BSP_LCD_DisplayOn>:
-/**
-  * @brief  Enables the display.
-  * @retval None
-  */
-void BSP_LCD_DisplayOn(void)
-{
- 8002bf8:	b580      	push	{r7, lr}
- 8002bfa:	af00      	add	r7, sp, #0
-  /* Display On */
-  __HAL_LTDC_ENABLE(&hLtdcHandler);
- 8002bfc:	4b0a      	ldr	r3, [pc, #40]	; (8002c28 <BSP_LCD_DisplayOn+0x30>)
- 8002bfe:	681b      	ldr	r3, [r3, #0]
- 8002c00:	699a      	ldr	r2, [r3, #24]
- 8002c02:	4b09      	ldr	r3, [pc, #36]	; (8002c28 <BSP_LCD_DisplayOn+0x30>)
- 8002c04:	681b      	ldr	r3, [r3, #0]
- 8002c06:	f042 0201 	orr.w	r2, r2, #1
- 8002c0a:	619a      	str	r2, [r3, #24]
-  HAL_GPIO_WritePin(LCD_DISP_GPIO_PORT, LCD_DISP_PIN, GPIO_PIN_SET);        /* Assert LCD_DISP pin */
- 8002c0c:	2201      	movs	r2, #1
- 8002c0e:	f44f 5180 	mov.w	r1, #4096	; 0x1000
- 8002c12:	4806      	ldr	r0, [pc, #24]	; (8002c2c <BSP_LCD_DisplayOn+0x34>)
- 8002c14:	f003 f938 	bl	8005e88 <HAL_GPIO_WritePin>
-  HAL_GPIO_WritePin(LCD_BL_CTRL_GPIO_PORT, LCD_BL_CTRL_PIN, GPIO_PIN_SET);  /* Assert LCD_BL_CTRL pin */
- 8002c18:	2201      	movs	r2, #1
- 8002c1a:	2108      	movs	r1, #8
- 8002c1c:	4804      	ldr	r0, [pc, #16]	; (8002c30 <BSP_LCD_DisplayOn+0x38>)
- 8002c1e:	f003 f933 	bl	8005e88 <HAL_GPIO_WritePin>
-}
- 8002c22:	bf00      	nop
- 8002c24:	bd80      	pop	{r7, pc}
- 8002c26:	bf00      	nop
- 8002c28:	200089d8 	.word	0x200089d8
- 8002c2c:	40022000 	.word	0x40022000
- 8002c30:	40022800 	.word	0x40022800
-
-08002c34 <BSP_LCD_MspInit>:
-  * @param  hltdc: LTDC handle
-  * @param  Params
-  * @retval None
-  */
-__weak void BSP_LCD_MspInit(LTDC_HandleTypeDef *hltdc, void *Params)
-{
- 8002c34:	b580      	push	{r7, lr}
- 8002c36:	b090      	sub	sp, #64	; 0x40
- 8002c38:	af00      	add	r7, sp, #0
- 8002c3a:	6078      	str	r0, [r7, #4]
- 8002c3c:	6039      	str	r1, [r7, #0]
-  GPIO_InitTypeDef gpio_init_structure;
-  
-  /* Enable the LTDC and DMA2D clocks */
-  __HAL_RCC_LTDC_CLK_ENABLE();
- 8002c3e:	4b64      	ldr	r3, [pc, #400]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c40:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8002c42:	4a63      	ldr	r2, [pc, #396]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c44:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
- 8002c48:	6453      	str	r3, [r2, #68]	; 0x44
- 8002c4a:	4b61      	ldr	r3, [pc, #388]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c4c:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8002c4e:	f003 6380 	and.w	r3, r3, #67108864	; 0x4000000
- 8002c52:	62bb      	str	r3, [r7, #40]	; 0x28
- 8002c54:	6abb      	ldr	r3, [r7, #40]	; 0x28
-  __HAL_RCC_DMA2D_CLK_ENABLE();
- 8002c56:	4b5e      	ldr	r3, [pc, #376]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c58:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002c5a:	4a5d      	ldr	r2, [pc, #372]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c5c:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
- 8002c60:	6313      	str	r3, [r2, #48]	; 0x30
- 8002c62:	4b5b      	ldr	r3, [pc, #364]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c64:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002c66:	f403 0300 	and.w	r3, r3, #8388608	; 0x800000
- 8002c6a:	627b      	str	r3, [r7, #36]	; 0x24
- 8002c6c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
-  
-  /* Enable GPIOs clock */
-  __HAL_RCC_GPIOE_CLK_ENABLE();
- 8002c6e:	4b58      	ldr	r3, [pc, #352]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c70:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002c72:	4a57      	ldr	r2, [pc, #348]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c74:	f043 0310 	orr.w	r3, r3, #16
- 8002c78:	6313      	str	r3, [r2, #48]	; 0x30
- 8002c7a:	4b55      	ldr	r3, [pc, #340]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c7c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002c7e:	f003 0310 	and.w	r3, r3, #16
- 8002c82:	623b      	str	r3, [r7, #32]
- 8002c84:	6a3b      	ldr	r3, [r7, #32]
-  __HAL_RCC_GPIOG_CLK_ENABLE();
- 8002c86:	4b52      	ldr	r3, [pc, #328]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c88:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002c8a:	4a51      	ldr	r2, [pc, #324]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c8c:	f043 0340 	orr.w	r3, r3, #64	; 0x40
- 8002c90:	6313      	str	r3, [r2, #48]	; 0x30
- 8002c92:	4b4f      	ldr	r3, [pc, #316]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002c94:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002c96:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 8002c9a:	61fb      	str	r3, [r7, #28]
- 8002c9c:	69fb      	ldr	r3, [r7, #28]
-  __HAL_RCC_GPIOI_CLK_ENABLE();
- 8002c9e:	4b4c      	ldr	r3, [pc, #304]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002ca0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002ca2:	4a4b      	ldr	r2, [pc, #300]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002ca4:	f443 7380 	orr.w	r3, r3, #256	; 0x100
- 8002ca8:	6313      	str	r3, [r2, #48]	; 0x30
- 8002caa:	4b49      	ldr	r3, [pc, #292]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002cac:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002cae:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 8002cb2:	61bb      	str	r3, [r7, #24]
- 8002cb4:	69bb      	ldr	r3, [r7, #24]
-  __HAL_RCC_GPIOJ_CLK_ENABLE();
- 8002cb6:	4b46      	ldr	r3, [pc, #280]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002cb8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002cba:	4a45      	ldr	r2, [pc, #276]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002cbc:	f443 7300 	orr.w	r3, r3, #512	; 0x200
- 8002cc0:	6313      	str	r3, [r2, #48]	; 0x30
- 8002cc2:	4b43      	ldr	r3, [pc, #268]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002cc4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002cc6:	f403 7300 	and.w	r3, r3, #512	; 0x200
- 8002cca:	617b      	str	r3, [r7, #20]
- 8002ccc:	697b      	ldr	r3, [r7, #20]
-  __HAL_RCC_GPIOK_CLK_ENABLE();
- 8002cce:	4b40      	ldr	r3, [pc, #256]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002cd0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002cd2:	4a3f      	ldr	r2, [pc, #252]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002cd4:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
- 8002cd8:	6313      	str	r3, [r2, #48]	; 0x30
- 8002cda:	4b3d      	ldr	r3, [pc, #244]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002cdc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002cde:	f403 6380 	and.w	r3, r3, #1024	; 0x400
- 8002ce2:	613b      	str	r3, [r7, #16]
- 8002ce4:	693b      	ldr	r3, [r7, #16]
-  LCD_DISP_GPIO_CLK_ENABLE();
- 8002ce6:	4b3a      	ldr	r3, [pc, #232]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002ce8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002cea:	4a39      	ldr	r2, [pc, #228]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002cec:	f443 7380 	orr.w	r3, r3, #256	; 0x100
- 8002cf0:	6313      	str	r3, [r2, #48]	; 0x30
- 8002cf2:	4b37      	ldr	r3, [pc, #220]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002cf4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002cf6:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 8002cfa:	60fb      	str	r3, [r7, #12]
- 8002cfc:	68fb      	ldr	r3, [r7, #12]
-  LCD_BL_CTRL_GPIO_CLK_ENABLE();
- 8002cfe:	4b34      	ldr	r3, [pc, #208]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002d00:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002d02:	4a33      	ldr	r2, [pc, #204]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002d04:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
- 8002d08:	6313      	str	r3, [r2, #48]	; 0x30
- 8002d0a:	4b31      	ldr	r3, [pc, #196]	; (8002dd0 <BSP_LCD_MspInit+0x19c>)
- 8002d0c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002d0e:	f403 6380 	and.w	r3, r3, #1024	; 0x400
- 8002d12:	60bb      	str	r3, [r7, #8]
- 8002d14:	68bb      	ldr	r3, [r7, #8]
-
-  /*** LTDC Pins configuration ***/
-  /* GPIOE configuration */
-  gpio_init_structure.Pin       = GPIO_PIN_4;
- 8002d16:	2310      	movs	r3, #16
- 8002d18:	62fb      	str	r3, [r7, #44]	; 0x2c
-  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
- 8002d1a:	2302      	movs	r3, #2
- 8002d1c:	633b      	str	r3, [r7, #48]	; 0x30
-  gpio_init_structure.Pull      = GPIO_NOPULL;
- 8002d1e:	2300      	movs	r3, #0
- 8002d20:	637b      	str	r3, [r7, #52]	; 0x34
-  gpio_init_structure.Speed     = GPIO_SPEED_FAST;
- 8002d22:	2302      	movs	r3, #2
- 8002d24:	63bb      	str	r3, [r7, #56]	; 0x38
-  gpio_init_structure.Alternate = GPIO_AF14_LTDC;  
- 8002d26:	230e      	movs	r3, #14
- 8002d28:	63fb      	str	r3, [r7, #60]	; 0x3c
-  HAL_GPIO_Init(GPIOE, &gpio_init_structure);
- 8002d2a:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8002d2e:	4619      	mov	r1, r3
- 8002d30:	4828      	ldr	r0, [pc, #160]	; (8002dd4 <BSP_LCD_MspInit+0x1a0>)
- 8002d32:	f002 fddd 	bl	80058f0 <HAL_GPIO_Init>
-
-  /* GPIOG configuration */
-  gpio_init_structure.Pin       = GPIO_PIN_12;
- 8002d36:	f44f 5380 	mov.w	r3, #4096	; 0x1000
- 8002d3a:	62fb      	str	r3, [r7, #44]	; 0x2c
-  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
- 8002d3c:	2302      	movs	r3, #2
- 8002d3e:	633b      	str	r3, [r7, #48]	; 0x30
-  gpio_init_structure.Alternate = GPIO_AF9_LTDC;
- 8002d40:	2309      	movs	r3, #9
- 8002d42:	63fb      	str	r3, [r7, #60]	; 0x3c
-  HAL_GPIO_Init(GPIOG, &gpio_init_structure);
- 8002d44:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8002d48:	4619      	mov	r1, r3
- 8002d4a:	4823      	ldr	r0, [pc, #140]	; (8002dd8 <BSP_LCD_MspInit+0x1a4>)
- 8002d4c:	f002 fdd0 	bl	80058f0 <HAL_GPIO_Init>
-
-  /* GPIOI LTDC alternate configuration */
-  gpio_init_structure.Pin       = GPIO_PIN_9 | GPIO_PIN_10 | \
- 8002d50:	f44f 4366 	mov.w	r3, #58880	; 0xe600
- 8002d54:	62fb      	str	r3, [r7, #44]	; 0x2c
-                                  GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
-  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
- 8002d56:	2302      	movs	r3, #2
- 8002d58:	633b      	str	r3, [r7, #48]	; 0x30
-  gpio_init_structure.Alternate = GPIO_AF14_LTDC;
- 8002d5a:	230e      	movs	r3, #14
- 8002d5c:	63fb      	str	r3, [r7, #60]	; 0x3c
-  HAL_GPIO_Init(GPIOI, &gpio_init_structure);
- 8002d5e:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8002d62:	4619      	mov	r1, r3
- 8002d64:	481d      	ldr	r0, [pc, #116]	; (8002ddc <BSP_LCD_MspInit+0x1a8>)
- 8002d66:	f002 fdc3 	bl	80058f0 <HAL_GPIO_Init>
-
-  /* GPIOJ configuration */  
-  gpio_init_structure.Pin       = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | \
- 8002d6a:	f64e 73ff 	movw	r3, #61439	; 0xefff
- 8002d6e:	62fb      	str	r3, [r7, #44]	; 0x2c
-                                  GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | \
-                                  GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | \
-                                  GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
-  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
- 8002d70:	2302      	movs	r3, #2
- 8002d72:	633b      	str	r3, [r7, #48]	; 0x30
-  gpio_init_structure.Alternate = GPIO_AF14_LTDC;
- 8002d74:	230e      	movs	r3, #14
- 8002d76:	63fb      	str	r3, [r7, #60]	; 0x3c
-  HAL_GPIO_Init(GPIOJ, &gpio_init_structure);  
- 8002d78:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8002d7c:	4619      	mov	r1, r3
- 8002d7e:	4818      	ldr	r0, [pc, #96]	; (8002de0 <BSP_LCD_MspInit+0x1ac>)
- 8002d80:	f002 fdb6 	bl	80058f0 <HAL_GPIO_Init>
-
-  /* GPIOK configuration */  
-  gpio_init_structure.Pin       = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_4 | \
- 8002d84:	23f7      	movs	r3, #247	; 0xf7
- 8002d86:	62fb      	str	r3, [r7, #44]	; 0x2c
-                                  GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
-  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
- 8002d88:	2302      	movs	r3, #2
- 8002d8a:	633b      	str	r3, [r7, #48]	; 0x30
-  gpio_init_structure.Alternate = GPIO_AF14_LTDC;
- 8002d8c:	230e      	movs	r3, #14
- 8002d8e:	63fb      	str	r3, [r7, #60]	; 0x3c
-  HAL_GPIO_Init(GPIOK, &gpio_init_structure);
- 8002d90:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8002d94:	4619      	mov	r1, r3
- 8002d96:	4813      	ldr	r0, [pc, #76]	; (8002de4 <BSP_LCD_MspInit+0x1b0>)
- 8002d98:	f002 fdaa 	bl	80058f0 <HAL_GPIO_Init>
-
-  /* LCD_DISP GPIO configuration */
-  gpio_init_structure.Pin       = LCD_DISP_PIN;     /* LCD_DISP pin has to be manually controlled */
- 8002d9c:	f44f 5380 	mov.w	r3, #4096	; 0x1000
- 8002da0:	62fb      	str	r3, [r7, #44]	; 0x2c
-  gpio_init_structure.Mode      = GPIO_MODE_OUTPUT_PP;
- 8002da2:	2301      	movs	r3, #1
- 8002da4:	633b      	str	r3, [r7, #48]	; 0x30
-  HAL_GPIO_Init(LCD_DISP_GPIO_PORT, &gpio_init_structure);
- 8002da6:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8002daa:	4619      	mov	r1, r3
- 8002dac:	480b      	ldr	r0, [pc, #44]	; (8002ddc <BSP_LCD_MspInit+0x1a8>)
- 8002dae:	f002 fd9f 	bl	80058f0 <HAL_GPIO_Init>
-
-  /* LCD_BL_CTRL GPIO configuration */
-  gpio_init_structure.Pin       = LCD_BL_CTRL_PIN;  /* LCD_BL_CTRL pin has to be manually controlled */
- 8002db2:	2308      	movs	r3, #8
- 8002db4:	62fb      	str	r3, [r7, #44]	; 0x2c
-  gpio_init_structure.Mode      = GPIO_MODE_OUTPUT_PP;
- 8002db6:	2301      	movs	r3, #1
- 8002db8:	633b      	str	r3, [r7, #48]	; 0x30
-  HAL_GPIO_Init(LCD_BL_CTRL_GPIO_PORT, &gpio_init_structure);
- 8002dba:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8002dbe:	4619      	mov	r1, r3
- 8002dc0:	4808      	ldr	r0, [pc, #32]	; (8002de4 <BSP_LCD_MspInit+0x1b0>)
- 8002dc2:	f002 fd95 	bl	80058f0 <HAL_GPIO_Init>
-}
- 8002dc6:	bf00      	nop
- 8002dc8:	3740      	adds	r7, #64	; 0x40
- 8002dca:	46bd      	mov	sp, r7
- 8002dcc:	bd80      	pop	{r7, pc}
- 8002dce:	bf00      	nop
- 8002dd0:	40023800 	.word	0x40023800
- 8002dd4:	40021000 	.word	0x40021000
- 8002dd8:	40021800 	.word	0x40021800
- 8002ddc:	40022000 	.word	0x40022000
- 8002de0:	40022400 	.word	0x40022400
- 8002de4:	40022800 	.word	0x40022800
-
-08002de8 <BSP_LCD_ClockConfig>:
-  * @note   This API is called by BSP_LCD_Init()
-  *         Being __weak it can be overwritten by the application
-  * @retval None
-  */
-__weak void BSP_LCD_ClockConfig(LTDC_HandleTypeDef *hltdc, void *Params)
-{
- 8002de8:	b580      	push	{r7, lr}
- 8002dea:	b082      	sub	sp, #8
- 8002dec:	af00      	add	r7, sp, #0
- 8002dee:	6078      	str	r0, [r7, #4]
- 8002df0:	6039      	str	r1, [r7, #0]
-  /* RK043FN48H LCD clock configuration */
-  /* PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz */
-  /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 192 Mhz */
-  /* PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 192/5 = 38.4 Mhz */
-  /* LTDC clock frequency = PLLLCDCLK / LTDC_PLLSAI_DIVR_4 = 38.4/4 = 9.6Mhz */
-  periph_clk_init_struct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
- 8002df2:	4b0a      	ldr	r3, [pc, #40]	; (8002e1c <BSP_LCD_ClockConfig+0x34>)
- 8002df4:	2208      	movs	r2, #8
- 8002df6:	601a      	str	r2, [r3, #0]
-  periph_clk_init_struct.PLLSAI.PLLSAIN = 192;
- 8002df8:	4b08      	ldr	r3, [pc, #32]	; (8002e1c <BSP_LCD_ClockConfig+0x34>)
- 8002dfa:	22c0      	movs	r2, #192	; 0xc0
- 8002dfc:	615a      	str	r2, [r3, #20]
-  periph_clk_init_struct.PLLSAI.PLLSAIR = RK043FN48H_FREQUENCY_DIVIDER;
- 8002dfe:	4b07      	ldr	r3, [pc, #28]	; (8002e1c <BSP_LCD_ClockConfig+0x34>)
- 8002e00:	2205      	movs	r2, #5
- 8002e02:	61da      	str	r2, [r3, #28]
-  periph_clk_init_struct.PLLSAIDivR = RCC_PLLSAIDIVR_4;
- 8002e04:	4b05      	ldr	r3, [pc, #20]	; (8002e1c <BSP_LCD_ClockConfig+0x34>)
- 8002e06:	f44f 3280 	mov.w	r2, #65536	; 0x10000
- 8002e0a:	62da      	str	r2, [r3, #44]	; 0x2c
-  HAL_RCCEx_PeriphCLKConfig(&periph_clk_init_struct);
- 8002e0c:	4803      	ldr	r0, [pc, #12]	; (8002e1c <BSP_LCD_ClockConfig+0x34>)
- 8002e0e:	f004 fe85 	bl	8007b1c <HAL_RCCEx_PeriphCLKConfig>
-}
- 8002e12:	bf00      	nop
- 8002e14:	3708      	adds	r7, #8
- 8002e16:	46bd      	mov	sp, r7
- 8002e18:	bd80      	pop	{r7, pc}
- 8002e1a:	bf00      	nop
- 8002e1c:	200001a8 	.word	0x200001a8
-
-08002e20 <DrawChar>:
-  * @param  Ypos: Start column address
-  * @param  c: Pointer to the character data
-  * @retval None
-  */
-static void DrawChar(uint16_t Xpos, uint16_t Ypos, const uint8_t *c)
-{
- 8002e20:	b580      	push	{r7, lr}
- 8002e22:	b088      	sub	sp, #32
- 8002e24:	af00      	add	r7, sp, #0
- 8002e26:	4603      	mov	r3, r0
- 8002e28:	603a      	str	r2, [r7, #0]
- 8002e2a:	80fb      	strh	r3, [r7, #6]
- 8002e2c:	460b      	mov	r3, r1
- 8002e2e:	80bb      	strh	r3, [r7, #4]
-  uint32_t i = 0, j = 0;
- 8002e30:	2300      	movs	r3, #0
- 8002e32:	61fb      	str	r3, [r7, #28]
- 8002e34:	2300      	movs	r3, #0
- 8002e36:	61bb      	str	r3, [r7, #24]
-  uint16_t height, width;
-  uint8_t  offset;
-  uint8_t  *pchar;
-  uint32_t line;
-  
-  height = DrawProp[ActiveLayer].pFont->Height;
- 8002e38:	4b53      	ldr	r3, [pc, #332]	; (8002f88 <DrawChar+0x168>)
- 8002e3a:	681a      	ldr	r2, [r3, #0]
- 8002e3c:	4953      	ldr	r1, [pc, #332]	; (8002f8c <DrawChar+0x16c>)
- 8002e3e:	4613      	mov	r3, r2
- 8002e40:	005b      	lsls	r3, r3, #1
- 8002e42:	4413      	add	r3, r2
- 8002e44:	009b      	lsls	r3, r3, #2
- 8002e46:	440b      	add	r3, r1
- 8002e48:	3308      	adds	r3, #8
- 8002e4a:	681b      	ldr	r3, [r3, #0]
- 8002e4c:	88db      	ldrh	r3, [r3, #6]
- 8002e4e:	827b      	strh	r3, [r7, #18]
-  width  = DrawProp[ActiveLayer].pFont->Width;
- 8002e50:	4b4d      	ldr	r3, [pc, #308]	; (8002f88 <DrawChar+0x168>)
- 8002e52:	681a      	ldr	r2, [r3, #0]
- 8002e54:	494d      	ldr	r1, [pc, #308]	; (8002f8c <DrawChar+0x16c>)
- 8002e56:	4613      	mov	r3, r2
- 8002e58:	005b      	lsls	r3, r3, #1
- 8002e5a:	4413      	add	r3, r2
- 8002e5c:	009b      	lsls	r3, r3, #2
- 8002e5e:	440b      	add	r3, r1
- 8002e60:	3308      	adds	r3, #8
- 8002e62:	681b      	ldr	r3, [r3, #0]
- 8002e64:	889b      	ldrh	r3, [r3, #4]
- 8002e66:	823b      	strh	r3, [r7, #16]
-  
-  offset =  8 *((width + 7)/8) -  width ;
- 8002e68:	8a3b      	ldrh	r3, [r7, #16]
- 8002e6a:	3307      	adds	r3, #7
- 8002e6c:	2b00      	cmp	r3, #0
- 8002e6e:	da00      	bge.n	8002e72 <DrawChar+0x52>
- 8002e70:	3307      	adds	r3, #7
- 8002e72:	10db      	asrs	r3, r3, #3
- 8002e74:	b2db      	uxtb	r3, r3
- 8002e76:	00db      	lsls	r3, r3, #3
- 8002e78:	b2da      	uxtb	r2, r3
- 8002e7a:	8a3b      	ldrh	r3, [r7, #16]
- 8002e7c:	b2db      	uxtb	r3, r3
- 8002e7e:	1ad3      	subs	r3, r2, r3
- 8002e80:	73fb      	strb	r3, [r7, #15]
-  
-  for(i = 0; i < height; i++)
- 8002e82:	2300      	movs	r3, #0
- 8002e84:	61fb      	str	r3, [r7, #28]
- 8002e86:	e076      	b.n	8002f76 <DrawChar+0x156>
-  {
-    pchar = ((uint8_t *)c + (width + 7)/8 * i);
- 8002e88:	8a3b      	ldrh	r3, [r7, #16]
- 8002e8a:	3307      	adds	r3, #7
- 8002e8c:	2b00      	cmp	r3, #0
- 8002e8e:	da00      	bge.n	8002e92 <DrawChar+0x72>
- 8002e90:	3307      	adds	r3, #7
- 8002e92:	10db      	asrs	r3, r3, #3
- 8002e94:	461a      	mov	r2, r3
- 8002e96:	69fb      	ldr	r3, [r7, #28]
- 8002e98:	fb03 f302 	mul.w	r3, r3, r2
- 8002e9c:	683a      	ldr	r2, [r7, #0]
- 8002e9e:	4413      	add	r3, r2
- 8002ea0:	60bb      	str	r3, [r7, #8]
-    
-    switch(((width + 7)/8))
- 8002ea2:	8a3b      	ldrh	r3, [r7, #16]
- 8002ea4:	3307      	adds	r3, #7
- 8002ea6:	2b00      	cmp	r3, #0
- 8002ea8:	da00      	bge.n	8002eac <DrawChar+0x8c>
- 8002eaa:	3307      	adds	r3, #7
- 8002eac:	10db      	asrs	r3, r3, #3
- 8002eae:	2b01      	cmp	r3, #1
- 8002eb0:	d002      	beq.n	8002eb8 <DrawChar+0x98>
- 8002eb2:	2b02      	cmp	r3, #2
- 8002eb4:	d004      	beq.n	8002ec0 <DrawChar+0xa0>
- 8002eb6:	e00c      	b.n	8002ed2 <DrawChar+0xb2>
-    {
-      
-    case 1:
-      line =  pchar[0];      
- 8002eb8:	68bb      	ldr	r3, [r7, #8]
- 8002eba:	781b      	ldrb	r3, [r3, #0]
- 8002ebc:	617b      	str	r3, [r7, #20]
-      break;
- 8002ebe:	e016      	b.n	8002eee <DrawChar+0xce>
-      
-    case 2:
-      line =  (pchar[0]<< 8) | pchar[1];      
- 8002ec0:	68bb      	ldr	r3, [r7, #8]
- 8002ec2:	781b      	ldrb	r3, [r3, #0]
- 8002ec4:	021b      	lsls	r3, r3, #8
- 8002ec6:	68ba      	ldr	r2, [r7, #8]
- 8002ec8:	3201      	adds	r2, #1
- 8002eca:	7812      	ldrb	r2, [r2, #0]
- 8002ecc:	4313      	orrs	r3, r2
- 8002ece:	617b      	str	r3, [r7, #20]
-      break;
- 8002ed0:	e00d      	b.n	8002eee <DrawChar+0xce>
-      
-    case 3:
-    default:
-      line =  (pchar[0]<< 16) | (pchar[1]<< 8) | pchar[2];      
- 8002ed2:	68bb      	ldr	r3, [r7, #8]
- 8002ed4:	781b      	ldrb	r3, [r3, #0]
- 8002ed6:	041a      	lsls	r2, r3, #16
- 8002ed8:	68bb      	ldr	r3, [r7, #8]
- 8002eda:	3301      	adds	r3, #1
- 8002edc:	781b      	ldrb	r3, [r3, #0]
- 8002ede:	021b      	lsls	r3, r3, #8
- 8002ee0:	4313      	orrs	r3, r2
- 8002ee2:	68ba      	ldr	r2, [r7, #8]
- 8002ee4:	3202      	adds	r2, #2
- 8002ee6:	7812      	ldrb	r2, [r2, #0]
- 8002ee8:	4313      	orrs	r3, r2
- 8002eea:	617b      	str	r3, [r7, #20]
-      break;
- 8002eec:	bf00      	nop
-    } 
-    
-    for (j = 0; j < width; j++)
- 8002eee:	2300      	movs	r3, #0
- 8002ef0:	61bb      	str	r3, [r7, #24]
- 8002ef2:	e036      	b.n	8002f62 <DrawChar+0x142>
-    {
-      if(line & (1 << (width- j + offset- 1))) 
- 8002ef4:	8a3a      	ldrh	r2, [r7, #16]
- 8002ef6:	69bb      	ldr	r3, [r7, #24]
- 8002ef8:	1ad2      	subs	r2, r2, r3
- 8002efa:	7bfb      	ldrb	r3, [r7, #15]
- 8002efc:	4413      	add	r3, r2
- 8002efe:	3b01      	subs	r3, #1
- 8002f00:	2201      	movs	r2, #1
- 8002f02:	fa02 f303 	lsl.w	r3, r2, r3
- 8002f06:	461a      	mov	r2, r3
- 8002f08:	697b      	ldr	r3, [r7, #20]
- 8002f0a:	4013      	ands	r3, r2
- 8002f0c:	2b00      	cmp	r3, #0
- 8002f0e:	d012      	beq.n	8002f36 <DrawChar+0x116>
-      {
-        BSP_LCD_DrawPixel((Xpos + j), Ypos, DrawProp[ActiveLayer].TextColor);
- 8002f10:	69bb      	ldr	r3, [r7, #24]
- 8002f12:	b29a      	uxth	r2, r3
- 8002f14:	88fb      	ldrh	r3, [r7, #6]
- 8002f16:	4413      	add	r3, r2
- 8002f18:	b298      	uxth	r0, r3
- 8002f1a:	4b1b      	ldr	r3, [pc, #108]	; (8002f88 <DrawChar+0x168>)
- 8002f1c:	681a      	ldr	r2, [r3, #0]
- 8002f1e:	491b      	ldr	r1, [pc, #108]	; (8002f8c <DrawChar+0x16c>)
- 8002f20:	4613      	mov	r3, r2
- 8002f22:	005b      	lsls	r3, r3, #1
- 8002f24:	4413      	add	r3, r2
- 8002f26:	009b      	lsls	r3, r3, #2
- 8002f28:	440b      	add	r3, r1
- 8002f2a:	681a      	ldr	r2, [r3, #0]
- 8002f2c:	88bb      	ldrh	r3, [r7, #4]
- 8002f2e:	4619      	mov	r1, r3
- 8002f30:	f7ff fd7a 	bl	8002a28 <BSP_LCD_DrawPixel>
- 8002f34:	e012      	b.n	8002f5c <DrawChar+0x13c>
-      }
-      else
-      {
-        BSP_LCD_DrawPixel((Xpos + j), Ypos, DrawProp[ActiveLayer].BackColor);
- 8002f36:	69bb      	ldr	r3, [r7, #24]
- 8002f38:	b29a      	uxth	r2, r3
- 8002f3a:	88fb      	ldrh	r3, [r7, #6]
- 8002f3c:	4413      	add	r3, r2
- 8002f3e:	b298      	uxth	r0, r3
- 8002f40:	4b11      	ldr	r3, [pc, #68]	; (8002f88 <DrawChar+0x168>)
- 8002f42:	681a      	ldr	r2, [r3, #0]
- 8002f44:	4911      	ldr	r1, [pc, #68]	; (8002f8c <DrawChar+0x16c>)
- 8002f46:	4613      	mov	r3, r2
- 8002f48:	005b      	lsls	r3, r3, #1
- 8002f4a:	4413      	add	r3, r2
- 8002f4c:	009b      	lsls	r3, r3, #2
- 8002f4e:	440b      	add	r3, r1
- 8002f50:	3304      	adds	r3, #4
- 8002f52:	681a      	ldr	r2, [r3, #0]
- 8002f54:	88bb      	ldrh	r3, [r7, #4]
- 8002f56:	4619      	mov	r1, r3
- 8002f58:	f7ff fd66 	bl	8002a28 <BSP_LCD_DrawPixel>
-    for (j = 0; j < width; j++)
- 8002f5c:	69bb      	ldr	r3, [r7, #24]
- 8002f5e:	3301      	adds	r3, #1
- 8002f60:	61bb      	str	r3, [r7, #24]
- 8002f62:	8a3b      	ldrh	r3, [r7, #16]
- 8002f64:	69ba      	ldr	r2, [r7, #24]
- 8002f66:	429a      	cmp	r2, r3
- 8002f68:	d3c4      	bcc.n	8002ef4 <DrawChar+0xd4>
-      } 
-    }
-    Ypos++;
- 8002f6a:	88bb      	ldrh	r3, [r7, #4]
- 8002f6c:	3301      	adds	r3, #1
- 8002f6e:	80bb      	strh	r3, [r7, #4]
-  for(i = 0; i < height; i++)
- 8002f70:	69fb      	ldr	r3, [r7, #28]
- 8002f72:	3301      	adds	r3, #1
- 8002f74:	61fb      	str	r3, [r7, #28]
- 8002f76:	8a7b      	ldrh	r3, [r7, #18]
- 8002f78:	69fa      	ldr	r2, [r7, #28]
- 8002f7a:	429a      	cmp	r2, r3
- 8002f7c:	d384      	bcc.n	8002e88 <DrawChar+0x68>
-  }
-}
- 8002f7e:	bf00      	nop
- 8002f80:	3720      	adds	r7, #32
- 8002f82:	46bd      	mov	sp, r7
- 8002f84:	bd80      	pop	{r7, pc}
- 8002f86:	bf00      	nop
- 8002f88:	2000018c 	.word	0x2000018c
- 8002f8c:	20000190 	.word	0x20000190
-
-08002f90 <LL_FillBuffer>:
-  * @param  OffLine: Offset
-  * @param  ColorIndex: Color index
-  * @retval None
-  */
-static void LL_FillBuffer(uint32_t LayerIndex, void *pDst, uint32_t xSize, uint32_t ySize, uint32_t OffLine, uint32_t ColorIndex) 
-{
- 8002f90:	b580      	push	{r7, lr}
- 8002f92:	b086      	sub	sp, #24
- 8002f94:	af02      	add	r7, sp, #8
- 8002f96:	60f8      	str	r0, [r7, #12]
- 8002f98:	60b9      	str	r1, [r7, #8]
- 8002f9a:	607a      	str	r2, [r7, #4]
- 8002f9c:	603b      	str	r3, [r7, #0]
-  /* Register to memory mode with ARGB8888 as color Mode */ 
-  hDma2dHandler.Init.Mode         = DMA2D_R2M;
- 8002f9e:	4b1e      	ldr	r3, [pc, #120]	; (8003018 <LL_FillBuffer+0x88>)
- 8002fa0:	f44f 3240 	mov.w	r2, #196608	; 0x30000
- 8002fa4:	605a      	str	r2, [r3, #4]
-  if(hLtdcHandler.LayerCfg[ActiveLayer].PixelFormat == LTDC_PIXEL_FORMAT_RGB565)
- 8002fa6:	4b1d      	ldr	r3, [pc, #116]	; (800301c <LL_FillBuffer+0x8c>)
- 8002fa8:	681b      	ldr	r3, [r3, #0]
- 8002faa:	4a1d      	ldr	r2, [pc, #116]	; (8003020 <LL_FillBuffer+0x90>)
- 8002fac:	2134      	movs	r1, #52	; 0x34
- 8002fae:	fb01 f303 	mul.w	r3, r1, r3
- 8002fb2:	4413      	add	r3, r2
- 8002fb4:	3348      	adds	r3, #72	; 0x48
- 8002fb6:	681b      	ldr	r3, [r3, #0]
- 8002fb8:	2b02      	cmp	r3, #2
- 8002fba:	d103      	bne.n	8002fc4 <LL_FillBuffer+0x34>
-  { /* RGB565 format */ 
-    hDma2dHandler.Init.ColorMode    = DMA2D_RGB565;
- 8002fbc:	4b16      	ldr	r3, [pc, #88]	; (8003018 <LL_FillBuffer+0x88>)
- 8002fbe:	2202      	movs	r2, #2
- 8002fc0:	609a      	str	r2, [r3, #8]
- 8002fc2:	e002      	b.n	8002fca <LL_FillBuffer+0x3a>
-  }
-  else
-  { /* ARGB8888 format */
-    hDma2dHandler.Init.ColorMode    = DMA2D_ARGB8888;
- 8002fc4:	4b14      	ldr	r3, [pc, #80]	; (8003018 <LL_FillBuffer+0x88>)
- 8002fc6:	2200      	movs	r2, #0
- 8002fc8:	609a      	str	r2, [r3, #8]
-  }
-  hDma2dHandler.Init.OutputOffset = OffLine;      
- 8002fca:	4a13      	ldr	r2, [pc, #76]	; (8003018 <LL_FillBuffer+0x88>)
- 8002fcc:	69bb      	ldr	r3, [r7, #24]
- 8002fce:	60d3      	str	r3, [r2, #12]
-  
-  hDma2dHandler.Instance = DMA2D;
- 8002fd0:	4b11      	ldr	r3, [pc, #68]	; (8003018 <LL_FillBuffer+0x88>)
- 8002fd2:	4a14      	ldr	r2, [pc, #80]	; (8003024 <LL_FillBuffer+0x94>)
- 8002fd4:	601a      	str	r2, [r3, #0]
-  
-  /* DMA2D Initialization */
-  if(HAL_DMA2D_Init(&hDma2dHandler) == HAL_OK) 
- 8002fd6:	4810      	ldr	r0, [pc, #64]	; (8003018 <LL_FillBuffer+0x88>)
- 8002fd8:	f002 f9fe 	bl	80053d8 <HAL_DMA2D_Init>
- 8002fdc:	4603      	mov	r3, r0
- 8002fde:	2b00      	cmp	r3, #0
- 8002fe0:	d115      	bne.n	800300e <LL_FillBuffer+0x7e>
-  {
-    if(HAL_DMA2D_ConfigLayer(&hDma2dHandler, LayerIndex) == HAL_OK) 
- 8002fe2:	68f9      	ldr	r1, [r7, #12]
- 8002fe4:	480c      	ldr	r0, [pc, #48]	; (8003018 <LL_FillBuffer+0x88>)
- 8002fe6:	f002 fb55 	bl	8005694 <HAL_DMA2D_ConfigLayer>
- 8002fea:	4603      	mov	r3, r0
- 8002fec:	2b00      	cmp	r3, #0
- 8002fee:	d10e      	bne.n	800300e <LL_FillBuffer+0x7e>
-    {
-      if (HAL_DMA2D_Start(&hDma2dHandler, ColorIndex, (uint32_t)pDst, xSize, ySize) == HAL_OK)
- 8002ff0:	68ba      	ldr	r2, [r7, #8]
- 8002ff2:	683b      	ldr	r3, [r7, #0]
- 8002ff4:	9300      	str	r3, [sp, #0]
- 8002ff6:	687b      	ldr	r3, [r7, #4]
- 8002ff8:	69f9      	ldr	r1, [r7, #28]
- 8002ffa:	4807      	ldr	r0, [pc, #28]	; (8003018 <LL_FillBuffer+0x88>)
- 8002ffc:	f002 fa36 	bl	800546c <HAL_DMA2D_Start>
- 8003000:	4603      	mov	r3, r0
- 8003002:	2b00      	cmp	r3, #0
- 8003004:	d103      	bne.n	800300e <LL_FillBuffer+0x7e>
-      {
-        /* Polling For DMA transfer */  
-        HAL_DMA2D_PollForTransfer(&hDma2dHandler, 10);
- 8003006:	210a      	movs	r1, #10
- 8003008:	4803      	ldr	r0, [pc, #12]	; (8003018 <LL_FillBuffer+0x88>)
- 800300a:	f002 fa5a 	bl	80054c2 <HAL_DMA2D_PollForTransfer>
-      }
-    }
-  } 
-}
- 800300e:	bf00      	nop
- 8003010:	3710      	adds	r7, #16
- 8003012:	46bd      	mov	sp, r7
- 8003014:	bd80      	pop	{r7, pc}
- 8003016:	bf00      	nop
- 8003018:	2000014c 	.word	0x2000014c
- 800301c:	2000018c 	.word	0x2000018c
- 8003020:	200089d8 	.word	0x200089d8
- 8003024:	4002b000 	.word	0x4002b000
-
-08003028 <BSP_SDRAM_Init>:
-/**
-  * @brief  Initializes the SDRAM device.
-  * @retval SDRAM status
-  */
-uint8_t BSP_SDRAM_Init(void)
-{ 
- 8003028:	b580      	push	{r7, lr}
- 800302a:	af00      	add	r7, sp, #0
-  static uint8_t sdramstatus = SDRAM_ERROR;
-  /* SDRAM device configuration */
-  sdramHandle.Instance = FMC_SDRAM_DEVICE;
- 800302c:	4b29      	ldr	r3, [pc, #164]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 800302e:	4a2a      	ldr	r2, [pc, #168]	; (80030d8 <BSP_SDRAM_Init+0xb0>)
- 8003030:	601a      	str	r2, [r3, #0]
-    
-  /* Timing configuration for 100Mhz as SD clock frequency (System clock is up to 200Mhz) */
-  Timing.LoadToActiveDelay    = 2;
- 8003032:	4b2a      	ldr	r3, [pc, #168]	; (80030dc <BSP_SDRAM_Init+0xb4>)
- 8003034:	2202      	movs	r2, #2
- 8003036:	601a      	str	r2, [r3, #0]
-  Timing.ExitSelfRefreshDelay = 7;
- 8003038:	4b28      	ldr	r3, [pc, #160]	; (80030dc <BSP_SDRAM_Init+0xb4>)
- 800303a:	2207      	movs	r2, #7
- 800303c:	605a      	str	r2, [r3, #4]
-  Timing.SelfRefreshTime      = 4;
- 800303e:	4b27      	ldr	r3, [pc, #156]	; (80030dc <BSP_SDRAM_Init+0xb4>)
- 8003040:	2204      	movs	r2, #4
- 8003042:	609a      	str	r2, [r3, #8]
-  Timing.RowCycleDelay        = 7;
- 8003044:	4b25      	ldr	r3, [pc, #148]	; (80030dc <BSP_SDRAM_Init+0xb4>)
- 8003046:	2207      	movs	r2, #7
- 8003048:	60da      	str	r2, [r3, #12]
-  Timing.WriteRecoveryTime    = 2;
- 800304a:	4b24      	ldr	r3, [pc, #144]	; (80030dc <BSP_SDRAM_Init+0xb4>)
- 800304c:	2202      	movs	r2, #2
- 800304e:	611a      	str	r2, [r3, #16]
-  Timing.RPDelay              = 2;
- 8003050:	4b22      	ldr	r3, [pc, #136]	; (80030dc <BSP_SDRAM_Init+0xb4>)
- 8003052:	2202      	movs	r2, #2
- 8003054:	615a      	str	r2, [r3, #20]
-  Timing.RCDDelay             = 2;
- 8003056:	4b21      	ldr	r3, [pc, #132]	; (80030dc <BSP_SDRAM_Init+0xb4>)
- 8003058:	2202      	movs	r2, #2
- 800305a:	619a      	str	r2, [r3, #24]
-  
-  sdramHandle.Init.SDBank             = FMC_SDRAM_BANK1;
- 800305c:	4b1d      	ldr	r3, [pc, #116]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 800305e:	2200      	movs	r2, #0
- 8003060:	605a      	str	r2, [r3, #4]
-  sdramHandle.Init.ColumnBitsNumber   = FMC_SDRAM_COLUMN_BITS_NUM_8;
- 8003062:	4b1c      	ldr	r3, [pc, #112]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 8003064:	2200      	movs	r2, #0
- 8003066:	609a      	str	r2, [r3, #8]
-  sdramHandle.Init.RowBitsNumber      = FMC_SDRAM_ROW_BITS_NUM_12;
- 8003068:	4b1a      	ldr	r3, [pc, #104]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 800306a:	2204      	movs	r2, #4
- 800306c:	60da      	str	r2, [r3, #12]
-  sdramHandle.Init.MemoryDataWidth    = SDRAM_MEMORY_WIDTH;
- 800306e:	4b19      	ldr	r3, [pc, #100]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 8003070:	2210      	movs	r2, #16
- 8003072:	611a      	str	r2, [r3, #16]
-  sdramHandle.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
- 8003074:	4b17      	ldr	r3, [pc, #92]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 8003076:	2240      	movs	r2, #64	; 0x40
- 8003078:	615a      	str	r2, [r3, #20]
-  sdramHandle.Init.CASLatency         = FMC_SDRAM_CAS_LATENCY_2;
- 800307a:	4b16      	ldr	r3, [pc, #88]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 800307c:	f44f 7280 	mov.w	r2, #256	; 0x100
- 8003080:	619a      	str	r2, [r3, #24]
-  sdramHandle.Init.WriteProtection    = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
- 8003082:	4b14      	ldr	r3, [pc, #80]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 8003084:	2200      	movs	r2, #0
- 8003086:	61da      	str	r2, [r3, #28]
-  sdramHandle.Init.SDClockPeriod      = SDCLOCK_PERIOD;
- 8003088:	4b12      	ldr	r3, [pc, #72]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 800308a:	f44f 6200 	mov.w	r2, #2048	; 0x800
- 800308e:	621a      	str	r2, [r3, #32]
-  sdramHandle.Init.ReadBurst          = FMC_SDRAM_RBURST_ENABLE;
- 8003090:	4b10      	ldr	r3, [pc, #64]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 8003092:	f44f 5280 	mov.w	r2, #4096	; 0x1000
- 8003096:	625a      	str	r2, [r3, #36]	; 0x24
-  sdramHandle.Init.ReadPipeDelay      = FMC_SDRAM_RPIPE_DELAY_0;
- 8003098:	4b0e      	ldr	r3, [pc, #56]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 800309a:	2200      	movs	r2, #0
- 800309c:	629a      	str	r2, [r3, #40]	; 0x28
-  
-  /* SDRAM controller initialization */
-
-  BSP_SDRAM_MspInit(&sdramHandle, NULL); /* __weak function can be rewritten by the application */
- 800309e:	2100      	movs	r1, #0
- 80030a0:	480c      	ldr	r0, [pc, #48]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 80030a2:	f000 f87f 	bl	80031a4 <BSP_SDRAM_MspInit>
-
-  if(HAL_SDRAM_Init(&sdramHandle, &Timing) != HAL_OK)
- 80030a6:	490d      	ldr	r1, [pc, #52]	; (80030dc <BSP_SDRAM_Init+0xb4>)
- 80030a8:	480a      	ldr	r0, [pc, #40]	; (80030d4 <BSP_SDRAM_Init+0xac>)
- 80030aa:	f005 fce7 	bl	8008a7c <HAL_SDRAM_Init>
- 80030ae:	4603      	mov	r3, r0
- 80030b0:	2b00      	cmp	r3, #0
- 80030b2:	d003      	beq.n	80030bc <BSP_SDRAM_Init+0x94>
-  {
-    sdramstatus = SDRAM_ERROR;
- 80030b4:	4b0a      	ldr	r3, [pc, #40]	; (80030e0 <BSP_SDRAM_Init+0xb8>)
- 80030b6:	2201      	movs	r2, #1
- 80030b8:	701a      	strb	r2, [r3, #0]
- 80030ba:	e002      	b.n	80030c2 <BSP_SDRAM_Init+0x9a>
-  }
-  else
-  {
-    sdramstatus = SDRAM_OK;
- 80030bc:	4b08      	ldr	r3, [pc, #32]	; (80030e0 <BSP_SDRAM_Init+0xb8>)
- 80030be:	2200      	movs	r2, #0
- 80030c0:	701a      	strb	r2, [r3, #0]
-  }
-  
-  /* SDRAM initialization sequence */
-  BSP_SDRAM_Initialization_sequence(REFRESH_COUNT);
- 80030c2:	f240 6003 	movw	r0, #1539	; 0x603
- 80030c6:	f000 f80d 	bl	80030e4 <BSP_SDRAM_Initialization_sequence>
-  
-  return sdramstatus;
- 80030ca:	4b05      	ldr	r3, [pc, #20]	; (80030e0 <BSP_SDRAM_Init+0xb8>)
- 80030cc:	781b      	ldrb	r3, [r3, #0]
-}
- 80030ce:	4618      	mov	r0, r3
- 80030d0:	bd80      	pop	{r7, pc}
- 80030d2:	bf00      	nop
- 80030d4:	20008a80 	.word	0x20008a80
- 80030d8:	a0000140 	.word	0xa0000140
- 80030dc:	2000022c 	.word	0x2000022c
- 80030e0:	20000038 	.word	0x20000038
-
-080030e4 <BSP_SDRAM_Initialization_sequence>:
-  * @brief  Programs the SDRAM device.
-  * @param  RefreshCount: SDRAM refresh counter value 
-  * @retval None
-  */
-void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount)
-{
- 80030e4:	b580      	push	{r7, lr}
- 80030e6:	b084      	sub	sp, #16
- 80030e8:	af00      	add	r7, sp, #0
- 80030ea:	6078      	str	r0, [r7, #4]
-  __IO uint32_t tmpmrd = 0;
- 80030ec:	2300      	movs	r3, #0
- 80030ee:	60fb      	str	r3, [r7, #12]
-  
-  /* Step 1: Configure a clock configuration enable command */
-  Command.CommandMode            = FMC_SDRAM_CMD_CLK_ENABLE;
- 80030f0:	4b2a      	ldr	r3, [pc, #168]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 80030f2:	2201      	movs	r2, #1
- 80030f4:	601a      	str	r2, [r3, #0]
-  Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
- 80030f6:	4b29      	ldr	r3, [pc, #164]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 80030f8:	2210      	movs	r2, #16
- 80030fa:	605a      	str	r2, [r3, #4]
-  Command.AutoRefreshNumber      = 1;
- 80030fc:	4b27      	ldr	r3, [pc, #156]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 80030fe:	2201      	movs	r2, #1
- 8003100:	609a      	str	r2, [r3, #8]
-  Command.ModeRegisterDefinition = 0;
- 8003102:	4b26      	ldr	r3, [pc, #152]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 8003104:	2200      	movs	r2, #0
- 8003106:	60da      	str	r2, [r3, #12]
-
-  /* Send the command */
-  HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
- 8003108:	f64f 72ff 	movw	r2, #65535	; 0xffff
- 800310c:	4923      	ldr	r1, [pc, #140]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 800310e:	4824      	ldr	r0, [pc, #144]	; (80031a0 <BSP_SDRAM_Initialization_sequence+0xbc>)
- 8003110:	f005 fce8 	bl	8008ae4 <HAL_SDRAM_SendCommand>
-
-  /* Step 2: Insert 100 us minimum delay */ 
-  /* Inserted delay is equal to 1 ms due to systick time base unit (ms) */
-  HAL_Delay(1);
- 8003114:	2001      	movs	r0, #1
- 8003116:	f001 f9f7 	bl	8004508 <HAL_Delay>
-    
-  /* Step 3: Configure a PALL (precharge all) command */ 
-  Command.CommandMode            = FMC_SDRAM_CMD_PALL;
- 800311a:	4b20      	ldr	r3, [pc, #128]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 800311c:	2202      	movs	r2, #2
- 800311e:	601a      	str	r2, [r3, #0]
-  Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
- 8003120:	4b1e      	ldr	r3, [pc, #120]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 8003122:	2210      	movs	r2, #16
- 8003124:	605a      	str	r2, [r3, #4]
-  Command.AutoRefreshNumber      = 1;
- 8003126:	4b1d      	ldr	r3, [pc, #116]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 8003128:	2201      	movs	r2, #1
- 800312a:	609a      	str	r2, [r3, #8]
-  Command.ModeRegisterDefinition = 0;
- 800312c:	4b1b      	ldr	r3, [pc, #108]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 800312e:	2200      	movs	r2, #0
- 8003130:	60da      	str	r2, [r3, #12]
-
-  /* Send the command */
-  HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);  
- 8003132:	f64f 72ff 	movw	r2, #65535	; 0xffff
- 8003136:	4919      	ldr	r1, [pc, #100]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 8003138:	4819      	ldr	r0, [pc, #100]	; (80031a0 <BSP_SDRAM_Initialization_sequence+0xbc>)
- 800313a:	f005 fcd3 	bl	8008ae4 <HAL_SDRAM_SendCommand>
-  
-  /* Step 4: Configure an Auto Refresh command */ 
-  Command.CommandMode            = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
- 800313e:	4b17      	ldr	r3, [pc, #92]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 8003140:	2203      	movs	r2, #3
- 8003142:	601a      	str	r2, [r3, #0]
-  Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
- 8003144:	4b15      	ldr	r3, [pc, #84]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 8003146:	2210      	movs	r2, #16
- 8003148:	605a      	str	r2, [r3, #4]
-  Command.AutoRefreshNumber      = 8;
- 800314a:	4b14      	ldr	r3, [pc, #80]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 800314c:	2208      	movs	r2, #8
- 800314e:	609a      	str	r2, [r3, #8]
-  Command.ModeRegisterDefinition = 0;
- 8003150:	4b12      	ldr	r3, [pc, #72]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 8003152:	2200      	movs	r2, #0
- 8003154:	60da      	str	r2, [r3, #12]
-
-  /* Send the command */
-  HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
- 8003156:	f64f 72ff 	movw	r2, #65535	; 0xffff
- 800315a:	4910      	ldr	r1, [pc, #64]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 800315c:	4810      	ldr	r0, [pc, #64]	; (80031a0 <BSP_SDRAM_Initialization_sequence+0xbc>)
- 800315e:	f005 fcc1 	bl	8008ae4 <HAL_SDRAM_SendCommand>
-  
-  /* Step 5: Program the external memory mode register */
-  tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1          |\
- 8003162:	f44f 7308 	mov.w	r3, #544	; 0x220
- 8003166:	60fb      	str	r3, [r7, #12]
-                     SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL   |\
-                     SDRAM_MODEREG_CAS_LATENCY_2           |\
-                     SDRAM_MODEREG_OPERATING_MODE_STANDARD |\
-                     SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
-  
-  Command.CommandMode            = FMC_SDRAM_CMD_LOAD_MODE;
- 8003168:	4b0c      	ldr	r3, [pc, #48]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 800316a:	2204      	movs	r2, #4
- 800316c:	601a      	str	r2, [r3, #0]
-  Command.CommandTarget          = FMC_SDRAM_CMD_TARGET_BANK1;
- 800316e:	4b0b      	ldr	r3, [pc, #44]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 8003170:	2210      	movs	r2, #16
- 8003172:	605a      	str	r2, [r3, #4]
-  Command.AutoRefreshNumber      = 1;
- 8003174:	4b09      	ldr	r3, [pc, #36]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 8003176:	2201      	movs	r2, #1
- 8003178:	609a      	str	r2, [r3, #8]
-  Command.ModeRegisterDefinition = tmpmrd;
- 800317a:	68fb      	ldr	r3, [r7, #12]
- 800317c:	4a07      	ldr	r2, [pc, #28]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 800317e:	60d3      	str	r3, [r2, #12]
-
-  /* Send the command */
-  HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
- 8003180:	f64f 72ff 	movw	r2, #65535	; 0xffff
- 8003184:	4905      	ldr	r1, [pc, #20]	; (800319c <BSP_SDRAM_Initialization_sequence+0xb8>)
- 8003186:	4806      	ldr	r0, [pc, #24]	; (80031a0 <BSP_SDRAM_Initialization_sequence+0xbc>)
- 8003188:	f005 fcac 	bl	8008ae4 <HAL_SDRAM_SendCommand>
-  
-  /* Step 6: Set the refresh rate counter */
-  /* Set the device refresh rate */
-  HAL_SDRAM_ProgramRefreshRate(&sdramHandle, RefreshCount); 
- 800318c:	6879      	ldr	r1, [r7, #4]
- 800318e:	4804      	ldr	r0, [pc, #16]	; (80031a0 <BSP_SDRAM_Initialization_sequence+0xbc>)
- 8003190:	f005 fcd3 	bl	8008b3a <HAL_SDRAM_ProgramRefreshRate>
-}
- 8003194:	bf00      	nop
- 8003196:	3710      	adds	r7, #16
- 8003198:	46bd      	mov	sp, r7
- 800319a:	bd80      	pop	{r7, pc}
- 800319c:	20000248 	.word	0x20000248
- 80031a0:	20008a80 	.word	0x20008a80
-
-080031a4 <BSP_SDRAM_MspInit>:
-  * @param  hsdram: SDRAM handle
-  * @param  Params
-  * @retval None
-  */
-__weak void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef  *hsdram, void *Params)
-{  
- 80031a4:	b580      	push	{r7, lr}
- 80031a6:	b090      	sub	sp, #64	; 0x40
- 80031a8:	af00      	add	r7, sp, #0
- 80031aa:	6078      	str	r0, [r7, #4]
- 80031ac:	6039      	str	r1, [r7, #0]
-  static DMA_HandleTypeDef dma_handle;
-  GPIO_InitTypeDef gpio_init_structure;
-  
-  /* Enable FMC clock */
-  __HAL_RCC_FMC_CLK_ENABLE();
- 80031ae:	4b70      	ldr	r3, [pc, #448]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 80031b0:	6b9b      	ldr	r3, [r3, #56]	; 0x38
- 80031b2:	4a6f      	ldr	r2, [pc, #444]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 80031b4:	f043 0301 	orr.w	r3, r3, #1
- 80031b8:	6393      	str	r3, [r2, #56]	; 0x38
- 80031ba:	4b6d      	ldr	r3, [pc, #436]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 80031bc:	6b9b      	ldr	r3, [r3, #56]	; 0x38
- 80031be:	f003 0301 	and.w	r3, r3, #1
- 80031c2:	62bb      	str	r3, [r7, #40]	; 0x28
- 80031c4:	6abb      	ldr	r3, [r7, #40]	; 0x28
-  
-  /* Enable chosen DMAx clock */
-  __DMAx_CLK_ENABLE();
- 80031c6:	4b6a      	ldr	r3, [pc, #424]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 80031c8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 80031ca:	4a69      	ldr	r2, [pc, #420]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 80031cc:	f443 0380 	orr.w	r3, r3, #4194304	; 0x400000
- 80031d0:	6313      	str	r3, [r2, #48]	; 0x30
- 80031d2:	4b67      	ldr	r3, [pc, #412]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 80031d4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 80031d6:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
- 80031da:	627b      	str	r3, [r7, #36]	; 0x24
- 80031dc:	6a7b      	ldr	r3, [r7, #36]	; 0x24
-
-  /* Enable GPIOs clock */
-  __HAL_RCC_GPIOC_CLK_ENABLE();
- 80031de:	4b64      	ldr	r3, [pc, #400]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 80031e0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 80031e2:	4a63      	ldr	r2, [pc, #396]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 80031e4:	f043 0304 	orr.w	r3, r3, #4
- 80031e8:	6313      	str	r3, [r2, #48]	; 0x30
- 80031ea:	4b61      	ldr	r3, [pc, #388]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 80031ec:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 80031ee:	f003 0304 	and.w	r3, r3, #4
- 80031f2:	623b      	str	r3, [r7, #32]
- 80031f4:	6a3b      	ldr	r3, [r7, #32]
-  __HAL_RCC_GPIOD_CLK_ENABLE();
- 80031f6:	4b5e      	ldr	r3, [pc, #376]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 80031f8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 80031fa:	4a5d      	ldr	r2, [pc, #372]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 80031fc:	f043 0308 	orr.w	r3, r3, #8
- 8003200:	6313      	str	r3, [r2, #48]	; 0x30
- 8003202:	4b5b      	ldr	r3, [pc, #364]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 8003204:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003206:	f003 0308 	and.w	r3, r3, #8
- 800320a:	61fb      	str	r3, [r7, #28]
- 800320c:	69fb      	ldr	r3, [r7, #28]
-  __HAL_RCC_GPIOE_CLK_ENABLE();
- 800320e:	4b58      	ldr	r3, [pc, #352]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 8003210:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003212:	4a57      	ldr	r2, [pc, #348]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 8003214:	f043 0310 	orr.w	r3, r3, #16
- 8003218:	6313      	str	r3, [r2, #48]	; 0x30
- 800321a:	4b55      	ldr	r3, [pc, #340]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 800321c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 800321e:	f003 0310 	and.w	r3, r3, #16
- 8003222:	61bb      	str	r3, [r7, #24]
- 8003224:	69bb      	ldr	r3, [r7, #24]
-  __HAL_RCC_GPIOF_CLK_ENABLE();
- 8003226:	4b52      	ldr	r3, [pc, #328]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 8003228:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 800322a:	4a51      	ldr	r2, [pc, #324]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 800322c:	f043 0320 	orr.w	r3, r3, #32
- 8003230:	6313      	str	r3, [r2, #48]	; 0x30
- 8003232:	4b4f      	ldr	r3, [pc, #316]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 8003234:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003236:	f003 0320 	and.w	r3, r3, #32
- 800323a:	617b      	str	r3, [r7, #20]
- 800323c:	697b      	ldr	r3, [r7, #20]
-  __HAL_RCC_GPIOG_CLK_ENABLE();
- 800323e:	4b4c      	ldr	r3, [pc, #304]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 8003240:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003242:	4a4b      	ldr	r2, [pc, #300]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 8003244:	f043 0340 	orr.w	r3, r3, #64	; 0x40
- 8003248:	6313      	str	r3, [r2, #48]	; 0x30
- 800324a:	4b49      	ldr	r3, [pc, #292]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 800324c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 800324e:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 8003252:	613b      	str	r3, [r7, #16]
- 8003254:	693b      	ldr	r3, [r7, #16]
-  __HAL_RCC_GPIOH_CLK_ENABLE();
- 8003256:	4b46      	ldr	r3, [pc, #280]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 8003258:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 800325a:	4a45      	ldr	r2, [pc, #276]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 800325c:	f043 0380 	orr.w	r3, r3, #128	; 0x80
- 8003260:	6313      	str	r3, [r2, #48]	; 0x30
- 8003262:	4b43      	ldr	r3, [pc, #268]	; (8003370 <BSP_SDRAM_MspInit+0x1cc>)
- 8003264:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003266:	f003 0380 	and.w	r3, r3, #128	; 0x80
- 800326a:	60fb      	str	r3, [r7, #12]
- 800326c:	68fb      	ldr	r3, [r7, #12]
-  
-  /* Common GPIO configuration */
-  gpio_init_structure.Mode      = GPIO_MODE_AF_PP;
- 800326e:	2302      	movs	r3, #2
- 8003270:	633b      	str	r3, [r7, #48]	; 0x30
-  gpio_init_structure.Pull      = GPIO_PULLUP;
- 8003272:	2301      	movs	r3, #1
- 8003274:	637b      	str	r3, [r7, #52]	; 0x34
-  gpio_init_structure.Speed     = GPIO_SPEED_FAST;
- 8003276:	2302      	movs	r3, #2
- 8003278:	63bb      	str	r3, [r7, #56]	; 0x38
-  gpio_init_structure.Alternate = GPIO_AF12_FMC;
- 800327a:	230c      	movs	r3, #12
- 800327c:	63fb      	str	r3, [r7, #60]	; 0x3c
-  
-  /* GPIOC configuration */
-  gpio_init_structure.Pin   = GPIO_PIN_3;
- 800327e:	2308      	movs	r3, #8
- 8003280:	62fb      	str	r3, [r7, #44]	; 0x2c
-  HAL_GPIO_Init(GPIOC, &gpio_init_structure);
- 8003282:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8003286:	4619      	mov	r1, r3
- 8003288:	483a      	ldr	r0, [pc, #232]	; (8003374 <BSP_SDRAM_MspInit+0x1d0>)
- 800328a:	f002 fb31 	bl	80058f0 <HAL_GPIO_Init>
-
-  /* GPIOD configuration */
-  gpio_init_structure.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8 | GPIO_PIN_9 |
- 800328e:	f24c 7303 	movw	r3, #50947	; 0xc703
- 8003292:	62fb      	str	r3, [r7, #44]	; 0x2c
-                              GPIO_PIN_10 | GPIO_PIN_14 | GPIO_PIN_15;
-  HAL_GPIO_Init(GPIOD, &gpio_init_structure);
- 8003294:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 8003298:	4619      	mov	r1, r3
- 800329a:	4837      	ldr	r0, [pc, #220]	; (8003378 <BSP_SDRAM_MspInit+0x1d4>)
- 800329c:	f002 fb28 	bl	80058f0 <HAL_GPIO_Init>
-
-  /* GPIOE configuration */  
-  gpio_init_structure.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7| GPIO_PIN_8 | GPIO_PIN_9 |\
- 80032a0:	f64f 7383 	movw	r3, #65411	; 0xff83
- 80032a4:	62fb      	str	r3, [r7, #44]	; 0x2c
-                              GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
-                              GPIO_PIN_15;
-  HAL_GPIO_Init(GPIOE, &gpio_init_structure);
- 80032a6:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 80032aa:	4619      	mov	r1, r3
- 80032ac:	4833      	ldr	r0, [pc, #204]	; (800337c <BSP_SDRAM_MspInit+0x1d8>)
- 80032ae:	f002 fb1f 	bl	80058f0 <HAL_GPIO_Init>
-  
-  /* GPIOF configuration */  
-  gpio_init_structure.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
- 80032b2:	f64f 033f 	movw	r3, #63551	; 0xf83f
- 80032b6:	62fb      	str	r3, [r7, #44]	; 0x2c
-                              GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
-                              GPIO_PIN_15;
-  HAL_GPIO_Init(GPIOF, &gpio_init_structure);
- 80032b8:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 80032bc:	4619      	mov	r1, r3
- 80032be:	4830      	ldr	r0, [pc, #192]	; (8003380 <BSP_SDRAM_MspInit+0x1dc>)
- 80032c0:	f002 fb16 	bl	80058f0 <HAL_GPIO_Init>
-  
-  /* GPIOG configuration */  
-  gpio_init_structure.Pin   = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4| GPIO_PIN_5 | GPIO_PIN_8 |\
- 80032c4:	f248 1333 	movw	r3, #33075	; 0x8133
- 80032c8:	62fb      	str	r3, [r7, #44]	; 0x2c
-                              GPIO_PIN_15;
-  HAL_GPIO_Init(GPIOG, &gpio_init_structure);
- 80032ca:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 80032ce:	4619      	mov	r1, r3
- 80032d0:	482c      	ldr	r0, [pc, #176]	; (8003384 <BSP_SDRAM_MspInit+0x1e0>)
- 80032d2:	f002 fb0d 	bl	80058f0 <HAL_GPIO_Init>
-
-  /* GPIOH configuration */  
-  gpio_init_structure.Pin   = GPIO_PIN_3 | GPIO_PIN_5;
- 80032d6:	2328      	movs	r3, #40	; 0x28
- 80032d8:	62fb      	str	r3, [r7, #44]	; 0x2c
-  HAL_GPIO_Init(GPIOH, &gpio_init_structure); 
- 80032da:	f107 032c 	add.w	r3, r7, #44	; 0x2c
- 80032de:	4619      	mov	r1, r3
- 80032e0:	4829      	ldr	r0, [pc, #164]	; (8003388 <BSP_SDRAM_MspInit+0x1e4>)
- 80032e2:	f002 fb05 	bl	80058f0 <HAL_GPIO_Init>
-  
-  /* Configure common DMA parameters */
-  dma_handle.Init.Channel             = SDRAM_DMAx_CHANNEL;
- 80032e6:	4b29      	ldr	r3, [pc, #164]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 80032e8:	2200      	movs	r2, #0
- 80032ea:	605a      	str	r2, [r3, #4]
-  dma_handle.Init.Direction           = DMA_MEMORY_TO_MEMORY;
- 80032ec:	4b27      	ldr	r3, [pc, #156]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 80032ee:	2280      	movs	r2, #128	; 0x80
- 80032f0:	609a      	str	r2, [r3, #8]
-  dma_handle.Init.PeriphInc           = DMA_PINC_ENABLE;
- 80032f2:	4b26      	ldr	r3, [pc, #152]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 80032f4:	f44f 7200 	mov.w	r2, #512	; 0x200
- 80032f8:	60da      	str	r2, [r3, #12]
-  dma_handle.Init.MemInc              = DMA_MINC_ENABLE;
- 80032fa:	4b24      	ldr	r3, [pc, #144]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 80032fc:	f44f 6280 	mov.w	r2, #1024	; 0x400
- 8003300:	611a      	str	r2, [r3, #16]
-  dma_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
- 8003302:	4b22      	ldr	r3, [pc, #136]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 8003304:	f44f 5280 	mov.w	r2, #4096	; 0x1000
- 8003308:	615a      	str	r2, [r3, #20]
-  dma_handle.Init.MemDataAlignment    = DMA_MDATAALIGN_WORD;
- 800330a:	4b20      	ldr	r3, [pc, #128]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 800330c:	f44f 4280 	mov.w	r2, #16384	; 0x4000
- 8003310:	619a      	str	r2, [r3, #24]
-  dma_handle.Init.Mode                = DMA_NORMAL;
- 8003312:	4b1e      	ldr	r3, [pc, #120]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 8003314:	2200      	movs	r2, #0
- 8003316:	61da      	str	r2, [r3, #28]
-  dma_handle.Init.Priority            = DMA_PRIORITY_HIGH;
- 8003318:	4b1c      	ldr	r3, [pc, #112]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 800331a:	f44f 3200 	mov.w	r2, #131072	; 0x20000
- 800331e:	621a      	str	r2, [r3, #32]
-  dma_handle.Init.FIFOMode            = DMA_FIFOMODE_DISABLE;         
- 8003320:	4b1a      	ldr	r3, [pc, #104]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 8003322:	2200      	movs	r2, #0
- 8003324:	625a      	str	r2, [r3, #36]	; 0x24
-  dma_handle.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
- 8003326:	4b19      	ldr	r3, [pc, #100]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 8003328:	2203      	movs	r2, #3
- 800332a:	629a      	str	r2, [r3, #40]	; 0x28
-  dma_handle.Init.MemBurst            = DMA_MBURST_SINGLE;
- 800332c:	4b17      	ldr	r3, [pc, #92]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 800332e:	2200      	movs	r2, #0
- 8003330:	62da      	str	r2, [r3, #44]	; 0x2c
-  dma_handle.Init.PeriphBurst         = DMA_PBURST_SINGLE; 
- 8003332:	4b16      	ldr	r3, [pc, #88]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 8003334:	2200      	movs	r2, #0
- 8003336:	631a      	str	r2, [r3, #48]	; 0x30
-  
-  dma_handle.Instance = SDRAM_DMAx_STREAM;
- 8003338:	4b14      	ldr	r3, [pc, #80]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 800333a:	4a15      	ldr	r2, [pc, #84]	; (8003390 <BSP_SDRAM_MspInit+0x1ec>)
- 800333c:	601a      	str	r2, [r3, #0]
-  
-   /* Associate the DMA handle */
-  __HAL_LINKDMA(hsdram, hdma, dma_handle);
- 800333e:	687b      	ldr	r3, [r7, #4]
- 8003340:	4a12      	ldr	r2, [pc, #72]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 8003342:	631a      	str	r2, [r3, #48]	; 0x30
- 8003344:	4a11      	ldr	r2, [pc, #68]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 8003346:	687b      	ldr	r3, [r7, #4]
- 8003348:	6393      	str	r3, [r2, #56]	; 0x38
-  
-  /* Deinitialize the stream for new transfer */
-  HAL_DMA_DeInit(&dma_handle);
- 800334a:	4810      	ldr	r0, [pc, #64]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 800334c:	f001 ff36 	bl	80051bc <HAL_DMA_DeInit>
-  
-  /* Configure the DMA stream */
-  HAL_DMA_Init(&dma_handle); 
- 8003350:	480e      	ldr	r0, [pc, #56]	; (800338c <BSP_SDRAM_MspInit+0x1e8>)
- 8003352:	f001 fe85 	bl	8005060 <HAL_DMA_Init>
-  
-  /* NVIC configuration for DMA transfer complete interrupt */
-  HAL_NVIC_SetPriority(SDRAM_DMAx_IRQn, 0x0F, 0);
- 8003356:	2200      	movs	r2, #0
- 8003358:	210f      	movs	r1, #15
- 800335a:	2038      	movs	r0, #56	; 0x38
- 800335c:	f001 fd88 	bl	8004e70 <HAL_NVIC_SetPriority>
-  HAL_NVIC_EnableIRQ(SDRAM_DMAx_IRQn);
- 8003360:	2038      	movs	r0, #56	; 0x38
- 8003362:	f001 fda1 	bl	8004ea8 <HAL_NVIC_EnableIRQ>
-}
- 8003366:	bf00      	nop
- 8003368:	3740      	adds	r7, #64	; 0x40
- 800336a:	46bd      	mov	sp, r7
- 800336c:	bd80      	pop	{r7, pc}
- 800336e:	bf00      	nop
- 8003370:	40023800 	.word	0x40023800
- 8003374:	40020800 	.word	0x40020800
- 8003378:	40020c00 	.word	0x40020c00
- 800337c:	40021000 	.word	0x40021000
- 8003380:	40021400 	.word	0x40021400
- 8003384:	40021800 	.word	0x40021800
- 8003388:	40021c00 	.word	0x40021c00
- 800338c:	20000258 	.word	0x20000258
- 8003390:	40026410 	.word	0x40026410
-
-08003394 <BSP_TS_Init>:
-  * @param  ts_SizeX: Maximum X size of the TS area on LCD
-  * @param  ts_SizeY: Maximum Y size of the TS area on LCD
-  * @retval TS_OK if all initializations are OK. Other value if error.
-  */
-uint8_t BSP_TS_Init(uint16_t ts_SizeX, uint16_t ts_SizeY)
-{
- 8003394:	b580      	push	{r7, lr}
- 8003396:	b084      	sub	sp, #16
- 8003398:	af00      	add	r7, sp, #0
- 800339a:	4603      	mov	r3, r0
- 800339c:	460a      	mov	r2, r1
- 800339e:	80fb      	strh	r3, [r7, #6]
- 80033a0:	4613      	mov	r3, r2
- 80033a2:	80bb      	strh	r3, [r7, #4]
-  uint8_t status = TS_OK;
- 80033a4:	2300      	movs	r3, #0
- 80033a6:	73fb      	strb	r3, [r7, #15]
-  tsXBoundary = ts_SizeX;
- 80033a8:	4a14      	ldr	r2, [pc, #80]	; (80033fc <BSP_TS_Init+0x68>)
- 80033aa:	88fb      	ldrh	r3, [r7, #6]
- 80033ac:	8013      	strh	r3, [r2, #0]
-  tsYBoundary = ts_SizeY;
- 80033ae:	4a14      	ldr	r2, [pc, #80]	; (8003400 <BSP_TS_Init+0x6c>)
- 80033b0:	88bb      	ldrh	r3, [r7, #4]
- 80033b2:	8013      	strh	r3, [r2, #0]
-  
-  /* Read ID and verify if the touch screen driver is ready */
-  ft5336_ts_drv.Init(TS_I2C_ADDRESS);
- 80033b4:	4b13      	ldr	r3, [pc, #76]	; (8003404 <BSP_TS_Init+0x70>)
- 80033b6:	681b      	ldr	r3, [r3, #0]
- 80033b8:	2070      	movs	r0, #112	; 0x70
- 80033ba:	4798      	blx	r3
-  if(ft5336_ts_drv.ReadID(TS_I2C_ADDRESS) == FT5336_ID_VALUE)
- 80033bc:	4b11      	ldr	r3, [pc, #68]	; (8003404 <BSP_TS_Init+0x70>)
- 80033be:	685b      	ldr	r3, [r3, #4]
- 80033c0:	2070      	movs	r0, #112	; 0x70
- 80033c2:	4798      	blx	r3
- 80033c4:	4603      	mov	r3, r0
- 80033c6:	2b51      	cmp	r3, #81	; 0x51
- 80033c8:	d111      	bne.n	80033ee <BSP_TS_Init+0x5a>
-  { 
-    /* Initialize the TS driver structure */
-    tsDriver = &ft5336_ts_drv;
- 80033ca:	4b0f      	ldr	r3, [pc, #60]	; (8003408 <BSP_TS_Init+0x74>)
- 80033cc:	4a0d      	ldr	r2, [pc, #52]	; (8003404 <BSP_TS_Init+0x70>)
- 80033ce:	601a      	str	r2, [r3, #0]
-    I2cAddress = TS_I2C_ADDRESS;
- 80033d0:	4b0e      	ldr	r3, [pc, #56]	; (800340c <BSP_TS_Init+0x78>)
- 80033d2:	2270      	movs	r2, #112	; 0x70
- 80033d4:	701a      	strb	r2, [r3, #0]
-    tsOrientation = TS_SWAP_XY;
- 80033d6:	4b0e      	ldr	r3, [pc, #56]	; (8003410 <BSP_TS_Init+0x7c>)
- 80033d8:	2208      	movs	r2, #8
- 80033da:	701a      	strb	r2, [r3, #0]
-
-    /* Initialize the TS driver */
-    tsDriver->Start(I2cAddress);
- 80033dc:	4b0a      	ldr	r3, [pc, #40]	; (8003408 <BSP_TS_Init+0x74>)
- 80033de:	681b      	ldr	r3, [r3, #0]
- 80033e0:	68db      	ldr	r3, [r3, #12]
- 80033e2:	4a0a      	ldr	r2, [pc, #40]	; (800340c <BSP_TS_Init+0x78>)
- 80033e4:	7812      	ldrb	r2, [r2, #0]
- 80033e6:	b292      	uxth	r2, r2
- 80033e8:	4610      	mov	r0, r2
- 80033ea:	4798      	blx	r3
- 80033ec:	e001      	b.n	80033f2 <BSP_TS_Init+0x5e>
-  }
-  else
-  {
-    status = TS_DEVICE_NOT_FOUND;
- 80033ee:	2303      	movs	r3, #3
- 80033f0:	73fb      	strb	r3, [r7, #15]
-  }
-
-  return status;
- 80033f2:	7bfb      	ldrb	r3, [r7, #15]
-}
- 80033f4:	4618      	mov	r0, r3
- 80033f6:	3710      	adds	r7, #16
- 80033f8:	46bd      	mov	sp, r7
- 80033fa:	bd80      	pop	{r7, pc}
- 80033fc:	200002bc 	.word	0x200002bc
- 8003400:	200002be 	.word	0x200002be
- 8003404:	20000000 	.word	0x20000000
- 8003408:	200002b8 	.word	0x200002b8
- 800340c:	200002c1 	.word	0x200002c1
- 8003410:	200002c0 	.word	0x200002c0
-
-08003414 <BSP_TS_GetState>:
-  * @brief  Returns status and positions of the touch screen.
-  * @param  TS_State: Pointer to touch screen current state structure
-  * @retval TS_OK if all initializations are OK. Other value if error.
-  */
-uint8_t BSP_TS_GetState(TS_StateTypeDef *TS_State)
-{
- 8003414:	b590      	push	{r4, r7, lr}
- 8003416:	b097      	sub	sp, #92	; 0x5c
- 8003418:	af02      	add	r7, sp, #8
- 800341a:	6078      	str	r0, [r7, #4]
-  static uint32_t _x[TS_MAX_NB_TOUCH] = {0, 0};
-  static uint32_t _y[TS_MAX_NB_TOUCH] = {0, 0};
-  uint8_t ts_status = TS_OK;
- 800341c:	2300      	movs	r3, #0
- 800341e:	f887 304f 	strb.w	r3, [r7, #79]	; 0x4f
-  uint16_t brute_y[TS_MAX_NB_TOUCH];
-  uint16_t x_diff;
-  uint16_t y_diff;
-  uint32_t index;
-#if (TS_MULTI_TOUCH_SUPPORTED == 1)
-  uint32_t weight = 0;
- 8003422:	2300      	movs	r3, #0
- 8003424:	613b      	str	r3, [r7, #16]
-  uint32_t area = 0;
- 8003426:	2300      	movs	r3, #0
- 8003428:	60fb      	str	r3, [r7, #12]
-  uint32_t event = 0;
- 800342a:	2300      	movs	r3, #0
- 800342c:	60bb      	str	r3, [r7, #8]
-#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
-
-  /* Check and update the number of touches active detected */
-  TS_State->touchDetected = tsDriver->DetectTouch(I2cAddress);
- 800342e:	4b97      	ldr	r3, [pc, #604]	; (800368c <BSP_TS_GetState+0x278>)
- 8003430:	681b      	ldr	r3, [r3, #0]
- 8003432:	691b      	ldr	r3, [r3, #16]
- 8003434:	4a96      	ldr	r2, [pc, #600]	; (8003690 <BSP_TS_GetState+0x27c>)
- 8003436:	7812      	ldrb	r2, [r2, #0]
- 8003438:	b292      	uxth	r2, r2
- 800343a:	4610      	mov	r0, r2
- 800343c:	4798      	blx	r3
- 800343e:	4603      	mov	r3, r0
- 8003440:	461a      	mov	r2, r3
- 8003442:	687b      	ldr	r3, [r7, #4]
- 8003444:	701a      	strb	r2, [r3, #0]
-  
-  if(TS_State->touchDetected)
- 8003446:	687b      	ldr	r3, [r7, #4]
- 8003448:	781b      	ldrb	r3, [r3, #0]
- 800344a:	2b00      	cmp	r3, #0
- 800344c:	f000 81a8 	beq.w	80037a0 <BSP_TS_GetState+0x38c>
-  {
-    for(index=0; index < TS_State->touchDetected; index++)
- 8003450:	2300      	movs	r3, #0
- 8003452:	64bb      	str	r3, [r7, #72]	; 0x48
- 8003454:	e197      	b.n	8003786 <BSP_TS_GetState+0x372>
-    {
-      /* Get each touch coordinates */
-      tsDriver->GetXY(I2cAddress, &(brute_x[index]), &(brute_y[index]));
- 8003456:	4b8d      	ldr	r3, [pc, #564]	; (800368c <BSP_TS_GetState+0x278>)
- 8003458:	681b      	ldr	r3, [r3, #0]
- 800345a:	695b      	ldr	r3, [r3, #20]
- 800345c:	4a8c      	ldr	r2, [pc, #560]	; (8003690 <BSP_TS_GetState+0x27c>)
- 800345e:	7812      	ldrb	r2, [r2, #0]
- 8003460:	b290      	uxth	r0, r2
- 8003462:	f107 0120 	add.w	r1, r7, #32
- 8003466:	6cba      	ldr	r2, [r7, #72]	; 0x48
- 8003468:	0052      	lsls	r2, r2, #1
- 800346a:	188c      	adds	r4, r1, r2
- 800346c:	f107 0114 	add.w	r1, r7, #20
- 8003470:	6cba      	ldr	r2, [r7, #72]	; 0x48
- 8003472:	0052      	lsls	r2, r2, #1
- 8003474:	440a      	add	r2, r1
- 8003476:	4621      	mov	r1, r4
- 8003478:	4798      	blx	r3
-
-      if(tsOrientation == TS_SWAP_NONE)
- 800347a:	4b86      	ldr	r3, [pc, #536]	; (8003694 <BSP_TS_GetState+0x280>)
- 800347c:	781b      	ldrb	r3, [r3, #0]
- 800347e:	2b01      	cmp	r3, #1
- 8003480:	d11b      	bne.n	80034ba <BSP_TS_GetState+0xa6>
-      {
-        x[index] = brute_x[index];
- 8003482:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003484:	005b      	lsls	r3, r3, #1
- 8003486:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 800348a:	4413      	add	r3, r2
- 800348c:	f833 2c30 	ldrh.w	r2, [r3, #-48]
- 8003490:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003492:	005b      	lsls	r3, r3, #1
- 8003494:	f107 0150 	add.w	r1, r7, #80	; 0x50
- 8003498:	440b      	add	r3, r1
- 800349a:	f823 2c18 	strh.w	r2, [r3, #-24]
-        y[index] = brute_y[index];
- 800349e:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80034a0:	005b      	lsls	r3, r3, #1
- 80034a2:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 80034a6:	4413      	add	r3, r2
- 80034a8:	f833 2c3c 	ldrh.w	r2, [r3, #-60]
- 80034ac:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80034ae:	005b      	lsls	r3, r3, #1
- 80034b0:	f107 0150 	add.w	r1, r7, #80	; 0x50
- 80034b4:	440b      	add	r3, r1
- 80034b6:	f823 2c24 	strh.w	r2, [r3, #-36]
-      }
-
-      if(tsOrientation & TS_SWAP_X)
- 80034ba:	4b76      	ldr	r3, [pc, #472]	; (8003694 <BSP_TS_GetState+0x280>)
- 80034bc:	781b      	ldrb	r3, [r3, #0]
- 80034be:	f003 0302 	and.w	r3, r3, #2
- 80034c2:	2b00      	cmp	r3, #0
- 80034c4:	d010      	beq.n	80034e8 <BSP_TS_GetState+0xd4>
-      {
-        x[index] = 4096 - brute_x[index];
- 80034c6:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80034c8:	005b      	lsls	r3, r3, #1
- 80034ca:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 80034ce:	4413      	add	r3, r2
- 80034d0:	f833 3c30 	ldrh.w	r3, [r3, #-48]
- 80034d4:	f5c3 5380 	rsb	r3, r3, #4096	; 0x1000
- 80034d8:	b29a      	uxth	r2, r3
- 80034da:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80034dc:	005b      	lsls	r3, r3, #1
- 80034de:	f107 0150 	add.w	r1, r7, #80	; 0x50
- 80034e2:	440b      	add	r3, r1
- 80034e4:	f823 2c18 	strh.w	r2, [r3, #-24]
-      }
-
-      if(tsOrientation & TS_SWAP_Y)
- 80034e8:	4b6a      	ldr	r3, [pc, #424]	; (8003694 <BSP_TS_GetState+0x280>)
- 80034ea:	781b      	ldrb	r3, [r3, #0]
- 80034ec:	f003 0304 	and.w	r3, r3, #4
- 80034f0:	2b00      	cmp	r3, #0
- 80034f2:	d010      	beq.n	8003516 <BSP_TS_GetState+0x102>
-      {
-        y[index] = 4096 - brute_y[index];
- 80034f4:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80034f6:	005b      	lsls	r3, r3, #1
- 80034f8:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 80034fc:	4413      	add	r3, r2
- 80034fe:	f833 3c3c 	ldrh.w	r3, [r3, #-60]
- 8003502:	f5c3 5380 	rsb	r3, r3, #4096	; 0x1000
- 8003506:	b29a      	uxth	r2, r3
- 8003508:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 800350a:	005b      	lsls	r3, r3, #1
- 800350c:	f107 0150 	add.w	r1, r7, #80	; 0x50
- 8003510:	440b      	add	r3, r1
- 8003512:	f823 2c24 	strh.w	r2, [r3, #-36]
-      }
-
-      if(tsOrientation & TS_SWAP_XY)
- 8003516:	4b5f      	ldr	r3, [pc, #380]	; (8003694 <BSP_TS_GetState+0x280>)
- 8003518:	781b      	ldrb	r3, [r3, #0]
- 800351a:	f003 0308 	and.w	r3, r3, #8
- 800351e:	2b00      	cmp	r3, #0
- 8003520:	d01b      	beq.n	800355a <BSP_TS_GetState+0x146>
-      {
-        y[index] = brute_x[index];
- 8003522:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003524:	005b      	lsls	r3, r3, #1
- 8003526:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 800352a:	4413      	add	r3, r2
- 800352c:	f833 2c30 	ldrh.w	r2, [r3, #-48]
- 8003530:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003532:	005b      	lsls	r3, r3, #1
- 8003534:	f107 0150 	add.w	r1, r7, #80	; 0x50
- 8003538:	440b      	add	r3, r1
- 800353a:	f823 2c24 	strh.w	r2, [r3, #-36]
-        x[index] = brute_y[index];
- 800353e:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003540:	005b      	lsls	r3, r3, #1
- 8003542:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 8003546:	4413      	add	r3, r2
- 8003548:	f833 2c3c 	ldrh.w	r2, [r3, #-60]
- 800354c:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 800354e:	005b      	lsls	r3, r3, #1
- 8003550:	f107 0150 	add.w	r1, r7, #80	; 0x50
- 8003554:	440b      	add	r3, r1
- 8003556:	f823 2c18 	strh.w	r2, [r3, #-24]
-      }
-
-      x_diff = x[index] > _x[index]? (x[index] - _x[index]): (_x[index] - x[index]);
- 800355a:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 800355c:	005b      	lsls	r3, r3, #1
- 800355e:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 8003562:	4413      	add	r3, r2
- 8003564:	f833 3c18 	ldrh.w	r3, [r3, #-24]
- 8003568:	4619      	mov	r1, r3
- 800356a:	4a4b      	ldr	r2, [pc, #300]	; (8003698 <BSP_TS_GetState+0x284>)
- 800356c:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 800356e:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 8003572:	4299      	cmp	r1, r3
- 8003574:	d90e      	bls.n	8003594 <BSP_TS_GetState+0x180>
- 8003576:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003578:	005b      	lsls	r3, r3, #1
- 800357a:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 800357e:	4413      	add	r3, r2
- 8003580:	f833 2c18 	ldrh.w	r2, [r3, #-24]
- 8003584:	4944      	ldr	r1, [pc, #272]	; (8003698 <BSP_TS_GetState+0x284>)
- 8003586:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003588:	f851 3023 	ldr.w	r3, [r1, r3, lsl #2]
- 800358c:	b29b      	uxth	r3, r3
- 800358e:	1ad3      	subs	r3, r2, r3
- 8003590:	b29b      	uxth	r3, r3
- 8003592:	e00d      	b.n	80035b0 <BSP_TS_GetState+0x19c>
- 8003594:	4a40      	ldr	r2, [pc, #256]	; (8003698 <BSP_TS_GetState+0x284>)
- 8003596:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003598:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 800359c:	b29a      	uxth	r2, r3
- 800359e:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80035a0:	005b      	lsls	r3, r3, #1
- 80035a2:	f107 0150 	add.w	r1, r7, #80	; 0x50
- 80035a6:	440b      	add	r3, r1
- 80035a8:	f833 3c18 	ldrh.w	r3, [r3, #-24]
- 80035ac:	1ad3      	subs	r3, r2, r3
- 80035ae:	b29b      	uxth	r3, r3
- 80035b0:	f8a7 3046 	strh.w	r3, [r7, #70]	; 0x46
-      y_diff = y[index] > _y[index]? (y[index] - _y[index]): (_y[index] - y[index]);
- 80035b4:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80035b6:	005b      	lsls	r3, r3, #1
- 80035b8:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 80035bc:	4413      	add	r3, r2
- 80035be:	f833 3c24 	ldrh.w	r3, [r3, #-36]
- 80035c2:	4619      	mov	r1, r3
- 80035c4:	4a35      	ldr	r2, [pc, #212]	; (800369c <BSP_TS_GetState+0x288>)
- 80035c6:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80035c8:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 80035cc:	4299      	cmp	r1, r3
- 80035ce:	d90e      	bls.n	80035ee <BSP_TS_GetState+0x1da>
- 80035d0:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80035d2:	005b      	lsls	r3, r3, #1
- 80035d4:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 80035d8:	4413      	add	r3, r2
- 80035da:	f833 2c24 	ldrh.w	r2, [r3, #-36]
- 80035de:	492f      	ldr	r1, [pc, #188]	; (800369c <BSP_TS_GetState+0x288>)
- 80035e0:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80035e2:	f851 3023 	ldr.w	r3, [r1, r3, lsl #2]
- 80035e6:	b29b      	uxth	r3, r3
- 80035e8:	1ad3      	subs	r3, r2, r3
- 80035ea:	b29b      	uxth	r3, r3
- 80035ec:	e00d      	b.n	800360a <BSP_TS_GetState+0x1f6>
- 80035ee:	4a2b      	ldr	r2, [pc, #172]	; (800369c <BSP_TS_GetState+0x288>)
- 80035f0:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80035f2:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 80035f6:	b29a      	uxth	r2, r3
- 80035f8:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80035fa:	005b      	lsls	r3, r3, #1
- 80035fc:	f107 0150 	add.w	r1, r7, #80	; 0x50
- 8003600:	440b      	add	r3, r1
- 8003602:	f833 3c24 	ldrh.w	r3, [r3, #-36]
- 8003606:	1ad3      	subs	r3, r2, r3
- 8003608:	b29b      	uxth	r3, r3
- 800360a:	f8a7 3044 	strh.w	r3, [r7, #68]	; 0x44
-
-      if ((x_diff + y_diff) > 5)
- 800360e:	f8b7 2046 	ldrh.w	r2, [r7, #70]	; 0x46
- 8003612:	f8b7 3044 	ldrh.w	r3, [r7, #68]	; 0x44
- 8003616:	4413      	add	r3, r2
- 8003618:	2b05      	cmp	r3, #5
- 800361a:	dd17      	ble.n	800364c <BSP_TS_GetState+0x238>
-      {
-        _x[index] = x[index];
- 800361c:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 800361e:	005b      	lsls	r3, r3, #1
- 8003620:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 8003624:	4413      	add	r3, r2
- 8003626:	f833 3c18 	ldrh.w	r3, [r3, #-24]
- 800362a:	4619      	mov	r1, r3
- 800362c:	4a1a      	ldr	r2, [pc, #104]	; (8003698 <BSP_TS_GetState+0x284>)
- 800362e:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003630:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
-        _y[index] = y[index];
- 8003634:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003636:	005b      	lsls	r3, r3, #1
- 8003638:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 800363c:	4413      	add	r3, r2
- 800363e:	f833 3c24 	ldrh.w	r3, [r3, #-36]
- 8003642:	4619      	mov	r1, r3
- 8003644:	4a15      	ldr	r2, [pc, #84]	; (800369c <BSP_TS_GetState+0x288>)
- 8003646:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003648:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
-      }
-
-      if(I2cAddress == FT5336_I2C_SLAVE_ADDRESS)
- 800364c:	4b10      	ldr	r3, [pc, #64]	; (8003690 <BSP_TS_GetState+0x27c>)
- 800364e:	781b      	ldrb	r3, [r3, #0]
- 8003650:	2b70      	cmp	r3, #112	; 0x70
- 8003652:	d125      	bne.n	80036a0 <BSP_TS_GetState+0x28c>
-      {
-        TS_State->touchX[index] = x[index];
- 8003654:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003656:	005b      	lsls	r3, r3, #1
- 8003658:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 800365c:	4413      	add	r3, r2
- 800365e:	f833 1c18 	ldrh.w	r1, [r3, #-24]
- 8003662:	687a      	ldr	r2, [r7, #4]
- 8003664:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003666:	005b      	lsls	r3, r3, #1
- 8003668:	4413      	add	r3, r2
- 800366a:	460a      	mov	r2, r1
- 800366c:	805a      	strh	r2, [r3, #2]
-        TS_State->touchY[index] = y[index];
- 800366e:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003670:	005b      	lsls	r3, r3, #1
- 8003672:	f107 0250 	add.w	r2, r7, #80	; 0x50
- 8003676:	4413      	add	r3, r2
- 8003678:	f833 1c24 	ldrh.w	r1, [r3, #-36]
- 800367c:	687a      	ldr	r2, [r7, #4]
- 800367e:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003680:	3304      	adds	r3, #4
- 8003682:	005b      	lsls	r3, r3, #1
- 8003684:	4413      	add	r3, r2
- 8003686:	460a      	mov	r2, r1
- 8003688:	809a      	strh	r2, [r3, #4]
- 800368a:	e02c      	b.n	80036e6 <BSP_TS_GetState+0x2d2>
- 800368c:	200002b8 	.word	0x200002b8
- 8003690:	200002c1 	.word	0x200002c1
- 8003694:	200002c0 	.word	0x200002c0
- 8003698:	200002c4 	.word	0x200002c4
- 800369c:	200002d8 	.word	0x200002d8
-      }
-      else
-      {
-        /* 2^12 = 4096 : indexes are expressed on a dynamic of 4096 */
-        TS_State->touchX[index] = (tsXBoundary * _x[index]) >> 12;
- 80036a0:	4b42      	ldr	r3, [pc, #264]	; (80037ac <BSP_TS_GetState+0x398>)
- 80036a2:	881b      	ldrh	r3, [r3, #0]
- 80036a4:	4619      	mov	r1, r3
- 80036a6:	4a42      	ldr	r2, [pc, #264]	; (80037b0 <BSP_TS_GetState+0x39c>)
- 80036a8:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80036aa:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 80036ae:	fb03 f301 	mul.w	r3, r3, r1
- 80036b2:	0b1b      	lsrs	r3, r3, #12
- 80036b4:	b299      	uxth	r1, r3
- 80036b6:	687a      	ldr	r2, [r7, #4]
- 80036b8:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80036ba:	005b      	lsls	r3, r3, #1
- 80036bc:	4413      	add	r3, r2
- 80036be:	460a      	mov	r2, r1
- 80036c0:	805a      	strh	r2, [r3, #2]
-        TS_State->touchY[index] = (tsYBoundary * _y[index]) >> 12;
- 80036c2:	4b3c      	ldr	r3, [pc, #240]	; (80037b4 <BSP_TS_GetState+0x3a0>)
- 80036c4:	881b      	ldrh	r3, [r3, #0]
- 80036c6:	4619      	mov	r1, r3
- 80036c8:	4a3b      	ldr	r2, [pc, #236]	; (80037b8 <BSP_TS_GetState+0x3a4>)
- 80036ca:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80036cc:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 80036d0:	fb03 f301 	mul.w	r3, r3, r1
- 80036d4:	0b1b      	lsrs	r3, r3, #12
- 80036d6:	b299      	uxth	r1, r3
- 80036d8:	687a      	ldr	r2, [r7, #4]
- 80036da:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 80036dc:	3304      	adds	r3, #4
- 80036de:	005b      	lsls	r3, r3, #1
- 80036e0:	4413      	add	r3, r2
- 80036e2:	460a      	mov	r2, r1
- 80036e4:	809a      	strh	r2, [r3, #4]
-      }
-
-#if (TS_MULTI_TOUCH_SUPPORTED == 1)
-
-      /* Get touch info related to the current touch */
-      ft5336_TS_GetTouchInfo(I2cAddress, index, &weight, &area, &event);
- 80036e6:	4b35      	ldr	r3, [pc, #212]	; (80037bc <BSP_TS_GetState+0x3a8>)
- 80036e8:	781b      	ldrb	r3, [r3, #0]
- 80036ea:	b298      	uxth	r0, r3
- 80036ec:	f107 010c 	add.w	r1, r7, #12
- 80036f0:	f107 0210 	add.w	r2, r7, #16
- 80036f4:	f107 0308 	add.w	r3, r7, #8
- 80036f8:	9300      	str	r3, [sp, #0]
- 80036fa:	460b      	mov	r3, r1
- 80036fc:	6cb9      	ldr	r1, [r7, #72]	; 0x48
- 80036fe:	f7fd f933 	bl	8000968 <ft5336_TS_GetTouchInfo>
-
-      /* Update TS_State structure */
-      TS_State->touchWeight[index] = weight;
- 8003702:	693b      	ldr	r3, [r7, #16]
- 8003704:	b2d9      	uxtb	r1, r3
- 8003706:	687a      	ldr	r2, [r7, #4]
- 8003708:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 800370a:	4413      	add	r3, r2
- 800370c:	3316      	adds	r3, #22
- 800370e:	460a      	mov	r2, r1
- 8003710:	701a      	strb	r2, [r3, #0]
-      TS_State->touchArea[index]   = area;
- 8003712:	68fb      	ldr	r3, [r7, #12]
- 8003714:	b2d9      	uxtb	r1, r3
- 8003716:	687a      	ldr	r2, [r7, #4]
- 8003718:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 800371a:	4413      	add	r3, r2
- 800371c:	3320      	adds	r3, #32
- 800371e:	460a      	mov	r2, r1
- 8003720:	701a      	strb	r2, [r3, #0]
-
-      /* Remap touch event */
-      switch(event)
- 8003722:	68bb      	ldr	r3, [r7, #8]
- 8003724:	2b03      	cmp	r3, #3
- 8003726:	d827      	bhi.n	8003778 <BSP_TS_GetState+0x364>
- 8003728:	a201      	add	r2, pc, #4	; (adr r2, 8003730 <BSP_TS_GetState+0x31c>)
- 800372a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 800372e:	bf00      	nop
- 8003730:	08003741 	.word	0x08003741
- 8003734:	0800374f 	.word	0x0800374f
- 8003738:	0800375d 	.word	0x0800375d
- 800373c:	0800376b 	.word	0x0800376b
-      {
-        case FT5336_TOUCH_EVT_FLAG_PRESS_DOWN	:
-          TS_State->touchEventId[index] = TOUCH_EVENT_PRESS_DOWN;
- 8003740:	687a      	ldr	r2, [r7, #4]
- 8003742:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003744:	4413      	add	r3, r2
- 8003746:	331b      	adds	r3, #27
- 8003748:	2201      	movs	r2, #1
- 800374a:	701a      	strb	r2, [r3, #0]
-          break;
- 800374c:	e018      	b.n	8003780 <BSP_TS_GetState+0x36c>
-        case FT5336_TOUCH_EVT_FLAG_LIFT_UP :
-          TS_State->touchEventId[index] = TOUCH_EVENT_LIFT_UP;
- 800374e:	687a      	ldr	r2, [r7, #4]
- 8003750:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003752:	4413      	add	r3, r2
- 8003754:	331b      	adds	r3, #27
- 8003756:	2202      	movs	r2, #2
- 8003758:	701a      	strb	r2, [r3, #0]
-          break;
- 800375a:	e011      	b.n	8003780 <BSP_TS_GetState+0x36c>
-        case FT5336_TOUCH_EVT_FLAG_CONTACT :
-          TS_State->touchEventId[index] = TOUCH_EVENT_CONTACT;
- 800375c:	687a      	ldr	r2, [r7, #4]
- 800375e:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003760:	4413      	add	r3, r2
- 8003762:	331b      	adds	r3, #27
- 8003764:	2203      	movs	r2, #3
- 8003766:	701a      	strb	r2, [r3, #0]
-          break;
- 8003768:	e00a      	b.n	8003780 <BSP_TS_GetState+0x36c>
-        case FT5336_TOUCH_EVT_FLAG_NO_EVENT :
-          TS_State->touchEventId[index] = TOUCH_EVENT_NO_EVT;
- 800376a:	687a      	ldr	r2, [r7, #4]
- 800376c:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 800376e:	4413      	add	r3, r2
- 8003770:	331b      	adds	r3, #27
- 8003772:	2200      	movs	r2, #0
- 8003774:	701a      	strb	r2, [r3, #0]
-          break;
- 8003776:	e003      	b.n	8003780 <BSP_TS_GetState+0x36c>
-        default :
-          ts_status = TS_ERROR;
- 8003778:	2301      	movs	r3, #1
- 800377a:	f887 304f 	strb.w	r3, [r7, #79]	; 0x4f
-          break;
- 800377e:	bf00      	nop
-    for(index=0; index < TS_State->touchDetected; index++)
- 8003780:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8003782:	3301      	adds	r3, #1
- 8003784:	64bb      	str	r3, [r7, #72]	; 0x48
- 8003786:	687b      	ldr	r3, [r7, #4]
- 8003788:	781b      	ldrb	r3, [r3, #0]
- 800378a:	461a      	mov	r2, r3
- 800378c:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 800378e:	4293      	cmp	r3, r2
- 8003790:	f4ff ae61 	bcc.w	8003456 <BSP_TS_GetState+0x42>
-
-    } /* of for(index=0; index < TS_State->touchDetected; index++) */
-
-#if (TS_MULTI_TOUCH_SUPPORTED == 1)
-    /* Get gesture Id */
-    ts_status = BSP_TS_Get_GestureId(TS_State);
- 8003794:	6878      	ldr	r0, [r7, #4]
- 8003796:	f000 f813 	bl	80037c0 <BSP_TS_Get_GestureId>
- 800379a:	4603      	mov	r3, r0
- 800379c:	f887 304f 	strb.w	r3, [r7, #79]	; 0x4f
-#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
-
-  } /* end of if(TS_State->touchDetected != 0) */
-
-  return (ts_status);
- 80037a0:	f897 304f 	ldrb.w	r3, [r7, #79]	; 0x4f
-}
- 80037a4:	4618      	mov	r0, r3
- 80037a6:	3754      	adds	r7, #84	; 0x54
- 80037a8:	46bd      	mov	sp, r7
- 80037aa:	bd90      	pop	{r4, r7, pc}
- 80037ac:	200002bc 	.word	0x200002bc
- 80037b0:	200002c4 	.word	0x200002c4
- 80037b4:	200002be 	.word	0x200002be
- 80037b8:	200002d8 	.word	0x200002d8
- 80037bc:	200002c1 	.word	0x200002c1
-
-080037c0 <BSP_TS_Get_GestureId>:
-  * @brief  Update gesture Id following a touch detected.
-  * @param  TS_State: Pointer to touch screen current state structure
-  * @retval TS_OK if all initializations are OK. Other value if error.
-  */
-uint8_t BSP_TS_Get_GestureId(TS_StateTypeDef *TS_State)
-{
- 80037c0:	b580      	push	{r7, lr}
- 80037c2:	b084      	sub	sp, #16
- 80037c4:	af00      	add	r7, sp, #0
- 80037c6:	6078      	str	r0, [r7, #4]
-  uint32_t gestureId = 0;
- 80037c8:	2300      	movs	r3, #0
- 80037ca:	60bb      	str	r3, [r7, #8]
-  uint8_t  ts_status = TS_OK;
- 80037cc:	2300      	movs	r3, #0
- 80037ce:	73fb      	strb	r3, [r7, #15]
-
-  /* Get gesture Id */
-  ft5336_TS_GetGestureID(I2cAddress, &gestureId);
- 80037d0:	4b1f      	ldr	r3, [pc, #124]	; (8003850 <BSP_TS_Get_GestureId+0x90>)
- 80037d2:	781b      	ldrb	r3, [r3, #0]
- 80037d4:	b29b      	uxth	r3, r3
- 80037d6:	f107 0208 	add.w	r2, r7, #8
- 80037da:	4611      	mov	r1, r2
- 80037dc:	4618      	mov	r0, r3
- 80037de:	f7fd f8aa 	bl	8000936 <ft5336_TS_GetGestureID>
-
-  /* Remap gesture Id to a TS_GestureIdTypeDef value */
-  switch(gestureId)
- 80037e2:	68bb      	ldr	r3, [r7, #8]
- 80037e4:	2b18      	cmp	r3, #24
- 80037e6:	d01b      	beq.n	8003820 <BSP_TS_Get_GestureId+0x60>
- 80037e8:	2b18      	cmp	r3, #24
- 80037ea:	d806      	bhi.n	80037fa <BSP_TS_Get_GestureId+0x3a>
- 80037ec:	2b10      	cmp	r3, #16
- 80037ee:	d00f      	beq.n	8003810 <BSP_TS_Get_GestureId+0x50>
- 80037f0:	2b14      	cmp	r3, #20
- 80037f2:	d011      	beq.n	8003818 <BSP_TS_Get_GestureId+0x58>
- 80037f4:	2b00      	cmp	r3, #0
- 80037f6:	d007      	beq.n	8003808 <BSP_TS_Get_GestureId+0x48>
- 80037f8:	e022      	b.n	8003840 <BSP_TS_Get_GestureId+0x80>
- 80037fa:	2b40      	cmp	r3, #64	; 0x40
- 80037fc:	d018      	beq.n	8003830 <BSP_TS_Get_GestureId+0x70>
- 80037fe:	2b49      	cmp	r3, #73	; 0x49
- 8003800:	d01a      	beq.n	8003838 <BSP_TS_Get_GestureId+0x78>
- 8003802:	2b1c      	cmp	r3, #28
- 8003804:	d010      	beq.n	8003828 <BSP_TS_Get_GestureId+0x68>
- 8003806:	e01b      	b.n	8003840 <BSP_TS_Get_GestureId+0x80>
-  {
-    case FT5336_GEST_ID_NO_GESTURE :
-      TS_State->gestureId = GEST_ID_NO_GESTURE;
- 8003808:	687b      	ldr	r3, [r7, #4]
- 800380a:	2200      	movs	r2, #0
- 800380c:	629a      	str	r2, [r3, #40]	; 0x28
-      break;
- 800380e:	e01a      	b.n	8003846 <BSP_TS_Get_GestureId+0x86>
-    case FT5336_GEST_ID_MOVE_UP :
-      TS_State->gestureId = GEST_ID_MOVE_UP;
- 8003810:	687b      	ldr	r3, [r7, #4]
- 8003812:	2201      	movs	r2, #1
- 8003814:	629a      	str	r2, [r3, #40]	; 0x28
-      break;
- 8003816:	e016      	b.n	8003846 <BSP_TS_Get_GestureId+0x86>
-    case FT5336_GEST_ID_MOVE_RIGHT :
-      TS_State->gestureId = GEST_ID_MOVE_RIGHT;
- 8003818:	687b      	ldr	r3, [r7, #4]
- 800381a:	2202      	movs	r2, #2
- 800381c:	629a      	str	r2, [r3, #40]	; 0x28
-      break;
- 800381e:	e012      	b.n	8003846 <BSP_TS_Get_GestureId+0x86>
-    case FT5336_GEST_ID_MOVE_DOWN :
-      TS_State->gestureId = GEST_ID_MOVE_DOWN;
- 8003820:	687b      	ldr	r3, [r7, #4]
- 8003822:	2203      	movs	r2, #3
- 8003824:	629a      	str	r2, [r3, #40]	; 0x28
-      break;
- 8003826:	e00e      	b.n	8003846 <BSP_TS_Get_GestureId+0x86>
-    case FT5336_GEST_ID_MOVE_LEFT :
-      TS_State->gestureId = GEST_ID_MOVE_LEFT;
- 8003828:	687b      	ldr	r3, [r7, #4]
- 800382a:	2204      	movs	r2, #4
- 800382c:	629a      	str	r2, [r3, #40]	; 0x28
-      break;
- 800382e:	e00a      	b.n	8003846 <BSP_TS_Get_GestureId+0x86>
-    case FT5336_GEST_ID_ZOOM_IN :
-      TS_State->gestureId = GEST_ID_ZOOM_IN;
- 8003830:	687b      	ldr	r3, [r7, #4]
- 8003832:	2205      	movs	r2, #5
- 8003834:	629a      	str	r2, [r3, #40]	; 0x28
-      break;
- 8003836:	e006      	b.n	8003846 <BSP_TS_Get_GestureId+0x86>
-    case FT5336_GEST_ID_ZOOM_OUT :
-      TS_State->gestureId = GEST_ID_ZOOM_OUT;
- 8003838:	687b      	ldr	r3, [r7, #4]
- 800383a:	2206      	movs	r2, #6
- 800383c:	629a      	str	r2, [r3, #40]	; 0x28
-      break;
- 800383e:	e002      	b.n	8003846 <BSP_TS_Get_GestureId+0x86>
-    default :
-      ts_status = TS_ERROR;
- 8003840:	2301      	movs	r3, #1
- 8003842:	73fb      	strb	r3, [r7, #15]
-      break;
- 8003844:	bf00      	nop
-  } /* of switch(gestureId) */
-
-  return(ts_status);
- 8003846:	7bfb      	ldrb	r3, [r7, #15]
-}
- 8003848:	4618      	mov	r0, r3
- 800384a:	3710      	adds	r7, #16
- 800384c:	46bd      	mov	sp, r7
- 800384e:	bd80      	pop	{r7, pc}
- 8003850:	200002c1 	.word	0x200002c1
-
-08003854 <HAL_MspInit>:
-void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
-                                        /**
-  * Initializes the Global MSP.
-  */
-void HAL_MspInit(void)
-{
- 8003854:	b580      	push	{r7, lr}
- 8003856:	b082      	sub	sp, #8
- 8003858:	af00      	add	r7, sp, #0
-  /* USER CODE BEGIN MspInit 0 */
-
-  /* USER CODE END MspInit 0 */
-
-  __HAL_RCC_PWR_CLK_ENABLE();
- 800385a:	4b11      	ldr	r3, [pc, #68]	; (80038a0 <HAL_MspInit+0x4c>)
- 800385c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 800385e:	4a10      	ldr	r2, [pc, #64]	; (80038a0 <HAL_MspInit+0x4c>)
- 8003860:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
- 8003864:	6413      	str	r3, [r2, #64]	; 0x40
- 8003866:	4b0e      	ldr	r3, [pc, #56]	; (80038a0 <HAL_MspInit+0x4c>)
- 8003868:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 800386a:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
- 800386e:	607b      	str	r3, [r7, #4]
- 8003870:	687b      	ldr	r3, [r7, #4]
-  __HAL_RCC_SYSCFG_CLK_ENABLE();
- 8003872:	4b0b      	ldr	r3, [pc, #44]	; (80038a0 <HAL_MspInit+0x4c>)
- 8003874:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8003876:	4a0a      	ldr	r2, [pc, #40]	; (80038a0 <HAL_MspInit+0x4c>)
- 8003878:	f443 4380 	orr.w	r3, r3, #16384	; 0x4000
- 800387c:	6453      	str	r3, [r2, #68]	; 0x44
- 800387e:	4b08      	ldr	r3, [pc, #32]	; (80038a0 <HAL_MspInit+0x4c>)
- 8003880:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8003882:	f403 4380 	and.w	r3, r3, #16384	; 0x4000
- 8003886:	603b      	str	r3, [r7, #0]
- 8003888:	683b      	ldr	r3, [r7, #0]
-
-  /* System interrupt init*/
-  /* PendSV_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
- 800388a:	2200      	movs	r2, #0
- 800388c:	210f      	movs	r1, #15
- 800388e:	f06f 0001 	mvn.w	r0, #1
- 8003892:	f001 faed 	bl	8004e70 <HAL_NVIC_SetPriority>
-
-  /* USER CODE BEGIN MspInit 1 */
-
-  /* USER CODE END MspInit 1 */
-}
- 8003896:	bf00      	nop
- 8003898:	3708      	adds	r7, #8
- 800389a:	46bd      	mov	sp, r7
- 800389c:	bd80      	pop	{r7, pc}
- 800389e:	bf00      	nop
- 80038a0:	40023800 	.word	0x40023800
-
-080038a4 <HAL_ADC_MspInit>:
-* This function configures the hardware resources used in this example
-* @param hadc: ADC handle pointer
-* @retval None
-*/
-void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
-{
- 80038a4:	b580      	push	{r7, lr}
- 80038a6:	b08c      	sub	sp, #48	; 0x30
- 80038a8:	af00      	add	r7, sp, #0
- 80038aa:	6078      	str	r0, [r7, #4]
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
- 80038ac:	f107 031c 	add.w	r3, r7, #28
- 80038b0:	2200      	movs	r2, #0
- 80038b2:	601a      	str	r2, [r3, #0]
- 80038b4:	605a      	str	r2, [r3, #4]
- 80038b6:	609a      	str	r2, [r3, #8]
- 80038b8:	60da      	str	r2, [r3, #12]
- 80038ba:	611a      	str	r2, [r3, #16]
-  if(hadc->Instance==ADC1)
- 80038bc:	687b      	ldr	r3, [r7, #4]
- 80038be:	681b      	ldr	r3, [r3, #0]
- 80038c0:	4a2a      	ldr	r2, [pc, #168]	; (800396c <HAL_ADC_MspInit+0xc8>)
- 80038c2:	4293      	cmp	r3, r2
- 80038c4:	d124      	bne.n	8003910 <HAL_ADC_MspInit+0x6c>
-  {
-  /* USER CODE BEGIN ADC1_MspInit 0 */
-
-  /* USER CODE END ADC1_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_ADC1_CLK_ENABLE();
- 80038c6:	4b2a      	ldr	r3, [pc, #168]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 80038c8:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 80038ca:	4a29      	ldr	r2, [pc, #164]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 80038cc:	f443 7380 	orr.w	r3, r3, #256	; 0x100
- 80038d0:	6453      	str	r3, [r2, #68]	; 0x44
- 80038d2:	4b27      	ldr	r3, [pc, #156]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 80038d4:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 80038d6:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 80038da:	61bb      	str	r3, [r7, #24]
- 80038dc:	69bb      	ldr	r3, [r7, #24]
-
-    __HAL_RCC_GPIOA_CLK_ENABLE();
- 80038de:	4b24      	ldr	r3, [pc, #144]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 80038e0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 80038e2:	4a23      	ldr	r2, [pc, #140]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 80038e4:	f043 0301 	orr.w	r3, r3, #1
- 80038e8:	6313      	str	r3, [r2, #48]	; 0x30
- 80038ea:	4b21      	ldr	r3, [pc, #132]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 80038ec:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 80038ee:	f003 0301 	and.w	r3, r3, #1
- 80038f2:	617b      	str	r3, [r7, #20]
- 80038f4:	697b      	ldr	r3, [r7, #20]
-    /**ADC1 GPIO Configuration
-    PA0/WKUP     ------> ADC1_IN0
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_0;
- 80038f6:	2301      	movs	r3, #1
- 80038f8:	61fb      	str	r3, [r7, #28]
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 80038fa:	2303      	movs	r3, #3
- 80038fc:	623b      	str	r3, [r7, #32]
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80038fe:	2300      	movs	r3, #0
- 8003900:	627b      	str	r3, [r7, #36]	; 0x24
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8003902:	f107 031c 	add.w	r3, r7, #28
- 8003906:	4619      	mov	r1, r3
- 8003908:	481a      	ldr	r0, [pc, #104]	; (8003974 <HAL_ADC_MspInit+0xd0>)
- 800390a:	f001 fff1 	bl	80058f0 <HAL_GPIO_Init>
-  /* USER CODE BEGIN ADC3_MspInit 1 */
-
-  /* USER CODE END ADC3_MspInit 1 */
-  }
-
-}
- 800390e:	e029      	b.n	8003964 <HAL_ADC_MspInit+0xc0>
-  else if(hadc->Instance==ADC3)
- 8003910:	687b      	ldr	r3, [r7, #4]
- 8003912:	681b      	ldr	r3, [r3, #0]
- 8003914:	4a18      	ldr	r2, [pc, #96]	; (8003978 <HAL_ADC_MspInit+0xd4>)
- 8003916:	4293      	cmp	r3, r2
- 8003918:	d124      	bne.n	8003964 <HAL_ADC_MspInit+0xc0>
-    __HAL_RCC_ADC3_CLK_ENABLE();
- 800391a:	4b15      	ldr	r3, [pc, #84]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 800391c:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 800391e:	4a14      	ldr	r2, [pc, #80]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 8003920:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
- 8003924:	6453      	str	r3, [r2, #68]	; 0x44
- 8003926:	4b12      	ldr	r3, [pc, #72]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 8003928:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 800392a:	f403 6380 	and.w	r3, r3, #1024	; 0x400
- 800392e:	613b      	str	r3, [r7, #16]
- 8003930:	693b      	ldr	r3, [r7, #16]
-    __HAL_RCC_GPIOF_CLK_ENABLE();
- 8003932:	4b0f      	ldr	r3, [pc, #60]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 8003934:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003936:	4a0e      	ldr	r2, [pc, #56]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 8003938:	f043 0320 	orr.w	r3, r3, #32
- 800393c:	6313      	str	r3, [r2, #48]	; 0x30
- 800393e:	4b0c      	ldr	r3, [pc, #48]	; (8003970 <HAL_ADC_MspInit+0xcc>)
- 8003940:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003942:	f003 0320 	and.w	r3, r3, #32
- 8003946:	60fb      	str	r3, [r7, #12]
- 8003948:	68fb      	ldr	r3, [r7, #12]
-    GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_9|GPIO_PIN_8;
- 800394a:	f44f 63e0 	mov.w	r3, #1792	; 0x700
- 800394e:	61fb      	str	r3, [r7, #28]
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 8003950:	2303      	movs	r3, #3
- 8003952:	623b      	str	r3, [r7, #32]
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003954:	2300      	movs	r3, #0
- 8003956:	627b      	str	r3, [r7, #36]	; 0x24
-    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 8003958:	f107 031c 	add.w	r3, r7, #28
- 800395c:	4619      	mov	r1, r3
- 800395e:	4807      	ldr	r0, [pc, #28]	; (800397c <HAL_ADC_MspInit+0xd8>)
- 8003960:	f001 ffc6 	bl	80058f0 <HAL_GPIO_Init>
-}
- 8003964:	bf00      	nop
- 8003966:	3730      	adds	r7, #48	; 0x30
- 8003968:	46bd      	mov	sp, r7
- 800396a:	bd80      	pop	{r7, pc}
- 800396c:	40012000 	.word	0x40012000
- 8003970:	40023800 	.word	0x40023800
- 8003974:	40020000 	.word	0x40020000
- 8003978:	40012200 	.word	0x40012200
- 800397c:	40021400 	.word	0x40021400
-
-08003980 <HAL_DAC_MspInit>:
-* This function configures the hardware resources used in this example
-* @param hdac: DAC handle pointer
-* @retval None
-*/
-void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
-{
- 8003980:	b580      	push	{r7, lr}
- 8003982:	b08a      	sub	sp, #40	; 0x28
- 8003984:	af00      	add	r7, sp, #0
- 8003986:	6078      	str	r0, [r7, #4]
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8003988:	f107 0314 	add.w	r3, r7, #20
- 800398c:	2200      	movs	r2, #0
- 800398e:	601a      	str	r2, [r3, #0]
- 8003990:	605a      	str	r2, [r3, #4]
- 8003992:	609a      	str	r2, [r3, #8]
- 8003994:	60da      	str	r2, [r3, #12]
- 8003996:	611a      	str	r2, [r3, #16]
-  if(hdac->Instance==DAC)
- 8003998:	687b      	ldr	r3, [r7, #4]
- 800399a:	681b      	ldr	r3, [r3, #0]
- 800399c:	4a19      	ldr	r2, [pc, #100]	; (8003a04 <HAL_DAC_MspInit+0x84>)
- 800399e:	4293      	cmp	r3, r2
- 80039a0:	d12b      	bne.n	80039fa <HAL_DAC_MspInit+0x7a>
-  {
-  /* USER CODE BEGIN DAC_MspInit 0 */
-
-  /* USER CODE END DAC_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_DAC_CLK_ENABLE();
- 80039a2:	4b19      	ldr	r3, [pc, #100]	; (8003a08 <HAL_DAC_MspInit+0x88>)
- 80039a4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 80039a6:	4a18      	ldr	r2, [pc, #96]	; (8003a08 <HAL_DAC_MspInit+0x88>)
- 80039a8:	f043 5300 	orr.w	r3, r3, #536870912	; 0x20000000
- 80039ac:	6413      	str	r3, [r2, #64]	; 0x40
- 80039ae:	4b16      	ldr	r3, [pc, #88]	; (8003a08 <HAL_DAC_MspInit+0x88>)
- 80039b0:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 80039b2:	f003 5300 	and.w	r3, r3, #536870912	; 0x20000000
- 80039b6:	613b      	str	r3, [r7, #16]
- 80039b8:	693b      	ldr	r3, [r7, #16]
-
-    __HAL_RCC_GPIOA_CLK_ENABLE();
- 80039ba:	4b13      	ldr	r3, [pc, #76]	; (8003a08 <HAL_DAC_MspInit+0x88>)
- 80039bc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 80039be:	4a12      	ldr	r2, [pc, #72]	; (8003a08 <HAL_DAC_MspInit+0x88>)
- 80039c0:	f043 0301 	orr.w	r3, r3, #1
- 80039c4:	6313      	str	r3, [r2, #48]	; 0x30
- 80039c6:	4b10      	ldr	r3, [pc, #64]	; (8003a08 <HAL_DAC_MspInit+0x88>)
- 80039c8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 80039ca:	f003 0301 	and.w	r3, r3, #1
- 80039ce:	60fb      	str	r3, [r7, #12]
- 80039d0:	68fb      	ldr	r3, [r7, #12]
-    /**DAC GPIO Configuration
-    PA4     ------> DAC_OUT1
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_4;
- 80039d2:	2310      	movs	r3, #16
- 80039d4:	617b      	str	r3, [r7, #20]
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 80039d6:	2303      	movs	r3, #3
- 80039d8:	61bb      	str	r3, [r7, #24]
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80039da:	2300      	movs	r3, #0
- 80039dc:	61fb      	str	r3, [r7, #28]
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 80039de:	f107 0314 	add.w	r3, r7, #20
- 80039e2:	4619      	mov	r1, r3
- 80039e4:	4809      	ldr	r0, [pc, #36]	; (8003a0c <HAL_DAC_MspInit+0x8c>)
- 80039e6:	f001 ff83 	bl	80058f0 <HAL_GPIO_Init>
-
-    /* DAC interrupt Init */
-    HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 0, 0);
- 80039ea:	2200      	movs	r2, #0
- 80039ec:	2100      	movs	r1, #0
- 80039ee:	2036      	movs	r0, #54	; 0x36
- 80039f0:	f001 fa3e 	bl	8004e70 <HAL_NVIC_SetPriority>
-    HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
- 80039f4:	2036      	movs	r0, #54	; 0x36
- 80039f6:	f001 fa57 	bl	8004ea8 <HAL_NVIC_EnableIRQ>
-  /* USER CODE BEGIN DAC_MspInit 1 */
-
-  /* USER CODE END DAC_MspInit 1 */
-  }
-
-}
- 80039fa:	bf00      	nop
- 80039fc:	3728      	adds	r7, #40	; 0x28
- 80039fe:	46bd      	mov	sp, r7
- 8003a00:	bd80      	pop	{r7, pc}
- 8003a02:	bf00      	nop
- 8003a04:	40007400 	.word	0x40007400
- 8003a08:	40023800 	.word	0x40023800
- 8003a0c:	40020000 	.word	0x40020000
-
-08003a10 <HAL_DMA2D_MspInit>:
-* This function configures the hardware resources used in this example
-* @param hdma2d: DMA2D handle pointer
-* @retval None
-*/
-void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
-{
- 8003a10:	b480      	push	{r7}
- 8003a12:	b085      	sub	sp, #20
- 8003a14:	af00      	add	r7, sp, #0
- 8003a16:	6078      	str	r0, [r7, #4]
-  if(hdma2d->Instance==DMA2D)
- 8003a18:	687b      	ldr	r3, [r7, #4]
- 8003a1a:	681b      	ldr	r3, [r3, #0]
- 8003a1c:	4a0a      	ldr	r2, [pc, #40]	; (8003a48 <HAL_DMA2D_MspInit+0x38>)
- 8003a1e:	4293      	cmp	r3, r2
- 8003a20:	d10b      	bne.n	8003a3a <HAL_DMA2D_MspInit+0x2a>
-  {
-  /* USER CODE BEGIN DMA2D_MspInit 0 */
-
-  /* USER CODE END DMA2D_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_DMA2D_CLK_ENABLE();
- 8003a22:	4b0a      	ldr	r3, [pc, #40]	; (8003a4c <HAL_DMA2D_MspInit+0x3c>)
- 8003a24:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003a26:	4a09      	ldr	r2, [pc, #36]	; (8003a4c <HAL_DMA2D_MspInit+0x3c>)
- 8003a28:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
- 8003a2c:	6313      	str	r3, [r2, #48]	; 0x30
- 8003a2e:	4b07      	ldr	r3, [pc, #28]	; (8003a4c <HAL_DMA2D_MspInit+0x3c>)
- 8003a30:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003a32:	f403 0300 	and.w	r3, r3, #8388608	; 0x800000
- 8003a36:	60fb      	str	r3, [r7, #12]
- 8003a38:	68fb      	ldr	r3, [r7, #12]
-  /* USER CODE BEGIN DMA2D_MspInit 1 */
-
-  /* USER CODE END DMA2D_MspInit 1 */
-  }
-
-}
- 8003a3a:	bf00      	nop
- 8003a3c:	3714      	adds	r7, #20
- 8003a3e:	46bd      	mov	sp, r7
- 8003a40:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8003a44:	4770      	bx	lr
- 8003a46:	bf00      	nop
- 8003a48:	4002b000 	.word	0x4002b000
- 8003a4c:	40023800 	.word	0x40023800
-
-08003a50 <HAL_I2C_MspInit>:
-* This function configures the hardware resources used in this example
-* @param hi2c: I2C handle pointer
-* @retval None
-*/
-void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
-{
- 8003a50:	b580      	push	{r7, lr}
- 8003a52:	b08c      	sub	sp, #48	; 0x30
- 8003a54:	af00      	add	r7, sp, #0
- 8003a56:	6078      	str	r0, [r7, #4]
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8003a58:	f107 031c 	add.w	r3, r7, #28
- 8003a5c:	2200      	movs	r2, #0
- 8003a5e:	601a      	str	r2, [r3, #0]
- 8003a60:	605a      	str	r2, [r3, #4]
- 8003a62:	609a      	str	r2, [r3, #8]
- 8003a64:	60da      	str	r2, [r3, #12]
- 8003a66:	611a      	str	r2, [r3, #16]
-  if(hi2c->Instance==I2C1)
- 8003a68:	687b      	ldr	r3, [r7, #4]
- 8003a6a:	681b      	ldr	r3, [r3, #0]
- 8003a6c:	4a2f      	ldr	r2, [pc, #188]	; (8003b2c <HAL_I2C_MspInit+0xdc>)
- 8003a6e:	4293      	cmp	r3, r2
- 8003a70:	d129      	bne.n	8003ac6 <HAL_I2C_MspInit+0x76>
-  {
-  /* USER CODE BEGIN I2C1_MspInit 0 */
-
-  /* USER CODE END I2C1_MspInit 0 */
-
-    __HAL_RCC_GPIOB_CLK_ENABLE();
- 8003a72:	4b2f      	ldr	r3, [pc, #188]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003a74:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003a76:	4a2e      	ldr	r2, [pc, #184]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003a78:	f043 0302 	orr.w	r3, r3, #2
- 8003a7c:	6313      	str	r3, [r2, #48]	; 0x30
- 8003a7e:	4b2c      	ldr	r3, [pc, #176]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003a80:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003a82:	f003 0302 	and.w	r3, r3, #2
- 8003a86:	61bb      	str	r3, [r7, #24]
- 8003a88:	69bb      	ldr	r3, [r7, #24]
-    /**I2C1 GPIO Configuration
-    PB8     ------> I2C1_SCL
-    PB9     ------> I2C1_SDA
-    */
-    GPIO_InitStruct.Pin = ARDUINO_SCL_D15_Pin|ARDUINO_SDA_D14_Pin;
- 8003a8a:	f44f 7340 	mov.w	r3, #768	; 0x300
- 8003a8e:	61fb      	str	r3, [r7, #28]
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
- 8003a90:	2312      	movs	r3, #18
- 8003a92:	623b      	str	r3, [r7, #32]
-    GPIO_InitStruct.Pull = GPIO_PULLUP;
- 8003a94:	2301      	movs	r3, #1
- 8003a96:	627b      	str	r3, [r7, #36]	; 0x24
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003a98:	2300      	movs	r3, #0
- 8003a9a:	62bb      	str	r3, [r7, #40]	; 0x28
-    GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
- 8003a9c:	2304      	movs	r3, #4
- 8003a9e:	62fb      	str	r3, [r7, #44]	; 0x2c
-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8003aa0:	f107 031c 	add.w	r3, r7, #28
- 8003aa4:	4619      	mov	r1, r3
- 8003aa6:	4823      	ldr	r0, [pc, #140]	; (8003b34 <HAL_I2C_MspInit+0xe4>)
- 8003aa8:	f001 ff22 	bl	80058f0 <HAL_GPIO_Init>
-
-    /* Peripheral clock enable */
-    __HAL_RCC_I2C1_CLK_ENABLE();
- 8003aac:	4b20      	ldr	r3, [pc, #128]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003aae:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003ab0:	4a1f      	ldr	r2, [pc, #124]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003ab2:	f443 1300 	orr.w	r3, r3, #2097152	; 0x200000
- 8003ab6:	6413      	str	r3, [r2, #64]	; 0x40
- 8003ab8:	4b1d      	ldr	r3, [pc, #116]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003aba:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003abc:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
- 8003ac0:	617b      	str	r3, [r7, #20]
- 8003ac2:	697b      	ldr	r3, [r7, #20]
-  /* USER CODE BEGIN I2C3_MspInit 1 */
-
-  /* USER CODE END I2C3_MspInit 1 */
-  }
-
-}
- 8003ac4:	e02d      	b.n	8003b22 <HAL_I2C_MspInit+0xd2>
-  else if(hi2c->Instance==I2C3)
- 8003ac6:	687b      	ldr	r3, [r7, #4]
- 8003ac8:	681b      	ldr	r3, [r3, #0]
- 8003aca:	4a1b      	ldr	r2, [pc, #108]	; (8003b38 <HAL_I2C_MspInit+0xe8>)
- 8003acc:	4293      	cmp	r3, r2
- 8003ace:	d128      	bne.n	8003b22 <HAL_I2C_MspInit+0xd2>
-    __HAL_RCC_GPIOH_CLK_ENABLE();
- 8003ad0:	4b17      	ldr	r3, [pc, #92]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003ad2:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003ad4:	4a16      	ldr	r2, [pc, #88]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003ad6:	f043 0380 	orr.w	r3, r3, #128	; 0x80
- 8003ada:	6313      	str	r3, [r2, #48]	; 0x30
- 8003adc:	4b14      	ldr	r3, [pc, #80]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003ade:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003ae0:	f003 0380 	and.w	r3, r3, #128	; 0x80
- 8003ae4:	613b      	str	r3, [r7, #16]
- 8003ae6:	693b      	ldr	r3, [r7, #16]
-    GPIO_InitStruct.Pin = LCD_SCL_Pin|LCD_SDA_Pin;
- 8003ae8:	f44f 73c0 	mov.w	r3, #384	; 0x180
- 8003aec:	61fb      	str	r3, [r7, #28]
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
- 8003aee:	2312      	movs	r3, #18
- 8003af0:	623b      	str	r3, [r7, #32]
-    GPIO_InitStruct.Pull = GPIO_PULLUP;
- 8003af2:	2301      	movs	r3, #1
- 8003af4:	627b      	str	r3, [r7, #36]	; 0x24
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8003af6:	2303      	movs	r3, #3
- 8003af8:	62bb      	str	r3, [r7, #40]	; 0x28
-    GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
- 8003afa:	2304      	movs	r3, #4
- 8003afc:	62fb      	str	r3, [r7, #44]	; 0x2c
-    HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
- 8003afe:	f107 031c 	add.w	r3, r7, #28
- 8003b02:	4619      	mov	r1, r3
- 8003b04:	480d      	ldr	r0, [pc, #52]	; (8003b3c <HAL_I2C_MspInit+0xec>)
- 8003b06:	f001 fef3 	bl	80058f0 <HAL_GPIO_Init>
-    __HAL_RCC_I2C3_CLK_ENABLE();
- 8003b0a:	4b09      	ldr	r3, [pc, #36]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003b0c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003b0e:	4a08      	ldr	r2, [pc, #32]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003b10:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
- 8003b14:	6413      	str	r3, [r2, #64]	; 0x40
- 8003b16:	4b06      	ldr	r3, [pc, #24]	; (8003b30 <HAL_I2C_MspInit+0xe0>)
- 8003b18:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003b1a:	f403 0300 	and.w	r3, r3, #8388608	; 0x800000
- 8003b1e:	60fb      	str	r3, [r7, #12]
- 8003b20:	68fb      	ldr	r3, [r7, #12]
-}
- 8003b22:	bf00      	nop
- 8003b24:	3730      	adds	r7, #48	; 0x30
- 8003b26:	46bd      	mov	sp, r7
- 8003b28:	bd80      	pop	{r7, pc}
- 8003b2a:	bf00      	nop
- 8003b2c:	40005400 	.word	0x40005400
- 8003b30:	40023800 	.word	0x40023800
- 8003b34:	40020400 	.word	0x40020400
- 8003b38:	40005c00 	.word	0x40005c00
- 8003b3c:	40021c00 	.word	0x40021c00
-
-08003b40 <HAL_I2C_MspDeInit>:
-* This function freeze the hardware resources used in this example
-* @param hi2c: I2C handle pointer
-* @retval None
-*/
-void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
-{
- 8003b40:	b580      	push	{r7, lr}
- 8003b42:	b082      	sub	sp, #8
- 8003b44:	af00      	add	r7, sp, #0
- 8003b46:	6078      	str	r0, [r7, #4]
-  if(hi2c->Instance==I2C1)
- 8003b48:	687b      	ldr	r3, [r7, #4]
- 8003b4a:	681b      	ldr	r3, [r3, #0]
- 8003b4c:	4a15      	ldr	r2, [pc, #84]	; (8003ba4 <HAL_I2C_MspDeInit+0x64>)
- 8003b4e:	4293      	cmp	r3, r2
- 8003b50:	d110      	bne.n	8003b74 <HAL_I2C_MspDeInit+0x34>
-  {
-  /* USER CODE BEGIN I2C1_MspDeInit 0 */
-
-  /* USER CODE END I2C1_MspDeInit 0 */
-    /* Peripheral clock disable */
-    __HAL_RCC_I2C1_CLK_DISABLE();
- 8003b52:	4b15      	ldr	r3, [pc, #84]	; (8003ba8 <HAL_I2C_MspDeInit+0x68>)
- 8003b54:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003b56:	4a14      	ldr	r2, [pc, #80]	; (8003ba8 <HAL_I2C_MspDeInit+0x68>)
- 8003b58:	f423 1300 	bic.w	r3, r3, #2097152	; 0x200000
- 8003b5c:	6413      	str	r3, [r2, #64]	; 0x40
-
-    /**I2C1 GPIO Configuration
-    PB8     ------> I2C1_SCL
-    PB9     ------> I2C1_SDA
-    */
-    HAL_GPIO_DeInit(ARDUINO_SCL_D15_GPIO_Port, ARDUINO_SCL_D15_Pin);
- 8003b5e:	f44f 7180 	mov.w	r1, #256	; 0x100
- 8003b62:	4812      	ldr	r0, [pc, #72]	; (8003bac <HAL_I2C_MspDeInit+0x6c>)
- 8003b64:	f002 f86e 	bl	8005c44 <HAL_GPIO_DeInit>
-
-    HAL_GPIO_DeInit(ARDUINO_SDA_D14_GPIO_Port, ARDUINO_SDA_D14_Pin);
- 8003b68:	f44f 7100 	mov.w	r1, #512	; 0x200
- 8003b6c:	480f      	ldr	r0, [pc, #60]	; (8003bac <HAL_I2C_MspDeInit+0x6c>)
- 8003b6e:	f002 f869 	bl	8005c44 <HAL_GPIO_DeInit>
-  /* USER CODE BEGIN I2C3_MspDeInit 1 */
-
-  /* USER CODE END I2C3_MspDeInit 1 */
-  }
-
-}
- 8003b72:	e013      	b.n	8003b9c <HAL_I2C_MspDeInit+0x5c>
-  else if(hi2c->Instance==I2C3)
- 8003b74:	687b      	ldr	r3, [r7, #4]
- 8003b76:	681b      	ldr	r3, [r3, #0]
- 8003b78:	4a0d      	ldr	r2, [pc, #52]	; (8003bb0 <HAL_I2C_MspDeInit+0x70>)
- 8003b7a:	4293      	cmp	r3, r2
- 8003b7c:	d10e      	bne.n	8003b9c <HAL_I2C_MspDeInit+0x5c>
-    __HAL_RCC_I2C3_CLK_DISABLE();
- 8003b7e:	4b0a      	ldr	r3, [pc, #40]	; (8003ba8 <HAL_I2C_MspDeInit+0x68>)
- 8003b80:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003b82:	4a09      	ldr	r2, [pc, #36]	; (8003ba8 <HAL_I2C_MspDeInit+0x68>)
- 8003b84:	f423 0300 	bic.w	r3, r3, #8388608	; 0x800000
- 8003b88:	6413      	str	r3, [r2, #64]	; 0x40
-    HAL_GPIO_DeInit(LCD_SCL_GPIO_Port, LCD_SCL_Pin);
- 8003b8a:	2180      	movs	r1, #128	; 0x80
- 8003b8c:	4809      	ldr	r0, [pc, #36]	; (8003bb4 <HAL_I2C_MspDeInit+0x74>)
- 8003b8e:	f002 f859 	bl	8005c44 <HAL_GPIO_DeInit>
-    HAL_GPIO_DeInit(LCD_SDA_GPIO_Port, LCD_SDA_Pin);
- 8003b92:	f44f 7180 	mov.w	r1, #256	; 0x100
- 8003b96:	4807      	ldr	r0, [pc, #28]	; (8003bb4 <HAL_I2C_MspDeInit+0x74>)
- 8003b98:	f002 f854 	bl	8005c44 <HAL_GPIO_DeInit>
-}
- 8003b9c:	bf00      	nop
- 8003b9e:	3708      	adds	r7, #8
- 8003ba0:	46bd      	mov	sp, r7
- 8003ba2:	bd80      	pop	{r7, pc}
- 8003ba4:	40005400 	.word	0x40005400
- 8003ba8:	40023800 	.word	0x40023800
- 8003bac:	40020400 	.word	0x40020400
- 8003bb0:	40005c00 	.word	0x40005c00
- 8003bb4:	40021c00 	.word	0x40021c00
-
-08003bb8 <HAL_LTDC_MspInit>:
-* This function configures the hardware resources used in this example
-* @param hltdc: LTDC handle pointer
-* @retval None
-*/
-void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
-{
- 8003bb8:	b580      	push	{r7, lr}
- 8003bba:	b08e      	sub	sp, #56	; 0x38
- 8003bbc:	af00      	add	r7, sp, #0
- 8003bbe:	6078      	str	r0, [r7, #4]
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8003bc0:	f107 0324 	add.w	r3, r7, #36	; 0x24
- 8003bc4:	2200      	movs	r2, #0
- 8003bc6:	601a      	str	r2, [r3, #0]
- 8003bc8:	605a      	str	r2, [r3, #4]
- 8003bca:	609a      	str	r2, [r3, #8]
- 8003bcc:	60da      	str	r2, [r3, #12]
- 8003bce:	611a      	str	r2, [r3, #16]
-  if(hltdc->Instance==LTDC)
- 8003bd0:	687b      	ldr	r3, [r7, #4]
- 8003bd2:	681b      	ldr	r3, [r3, #0]
- 8003bd4:	4a55      	ldr	r2, [pc, #340]	; (8003d2c <HAL_LTDC_MspInit+0x174>)
- 8003bd6:	4293      	cmp	r3, r2
- 8003bd8:	f040 80a3 	bne.w	8003d22 <HAL_LTDC_MspInit+0x16a>
-  {
-  /* USER CODE BEGIN LTDC_MspInit 0 */
-
-  /* USER CODE END LTDC_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_LTDC_CLK_ENABLE();
- 8003bdc:	4b54      	ldr	r3, [pc, #336]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003bde:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8003be0:	4a53      	ldr	r2, [pc, #332]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003be2:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
- 8003be6:	6453      	str	r3, [r2, #68]	; 0x44
- 8003be8:	4b51      	ldr	r3, [pc, #324]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003bea:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8003bec:	f003 6380 	and.w	r3, r3, #67108864	; 0x4000000
- 8003bf0:	623b      	str	r3, [r7, #32]
- 8003bf2:	6a3b      	ldr	r3, [r7, #32]
-
-    __HAL_RCC_GPIOE_CLK_ENABLE();
- 8003bf4:	4b4e      	ldr	r3, [pc, #312]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003bf6:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003bf8:	4a4d      	ldr	r2, [pc, #308]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003bfa:	f043 0310 	orr.w	r3, r3, #16
- 8003bfe:	6313      	str	r3, [r2, #48]	; 0x30
- 8003c00:	4b4b      	ldr	r3, [pc, #300]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c02:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003c04:	f003 0310 	and.w	r3, r3, #16
- 8003c08:	61fb      	str	r3, [r7, #28]
- 8003c0a:	69fb      	ldr	r3, [r7, #28]
-    __HAL_RCC_GPIOJ_CLK_ENABLE();
- 8003c0c:	4b48      	ldr	r3, [pc, #288]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c0e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003c10:	4a47      	ldr	r2, [pc, #284]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c12:	f443 7300 	orr.w	r3, r3, #512	; 0x200
- 8003c16:	6313      	str	r3, [r2, #48]	; 0x30
- 8003c18:	4b45      	ldr	r3, [pc, #276]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c1a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003c1c:	f403 7300 	and.w	r3, r3, #512	; 0x200
- 8003c20:	61bb      	str	r3, [r7, #24]
- 8003c22:	69bb      	ldr	r3, [r7, #24]
-    __HAL_RCC_GPIOK_CLK_ENABLE();
- 8003c24:	4b42      	ldr	r3, [pc, #264]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c26:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003c28:	4a41      	ldr	r2, [pc, #260]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c2a:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
- 8003c2e:	6313      	str	r3, [r2, #48]	; 0x30
- 8003c30:	4b3f      	ldr	r3, [pc, #252]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c32:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003c34:	f403 6380 	and.w	r3, r3, #1024	; 0x400
- 8003c38:	617b      	str	r3, [r7, #20]
- 8003c3a:	697b      	ldr	r3, [r7, #20]
-    __HAL_RCC_GPIOG_CLK_ENABLE();
- 8003c3c:	4b3c      	ldr	r3, [pc, #240]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c3e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003c40:	4a3b      	ldr	r2, [pc, #236]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c42:	f043 0340 	orr.w	r3, r3, #64	; 0x40
- 8003c46:	6313      	str	r3, [r2, #48]	; 0x30
- 8003c48:	4b39      	ldr	r3, [pc, #228]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c4a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003c4c:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 8003c50:	613b      	str	r3, [r7, #16]
- 8003c52:	693b      	ldr	r3, [r7, #16]
-    __HAL_RCC_GPIOI_CLK_ENABLE();
- 8003c54:	4b36      	ldr	r3, [pc, #216]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c56:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003c58:	4a35      	ldr	r2, [pc, #212]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c5a:	f443 7380 	orr.w	r3, r3, #256	; 0x100
- 8003c5e:	6313      	str	r3, [r2, #48]	; 0x30
- 8003c60:	4b33      	ldr	r3, [pc, #204]	; (8003d30 <HAL_LTDC_MspInit+0x178>)
- 8003c62:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003c64:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 8003c68:	60fb      	str	r3, [r7, #12]
- 8003c6a:	68fb      	ldr	r3, [r7, #12]
-    PJ3     ------> LTDC_R4
-    PJ2     ------> LTDC_R3
-    PJ0     ------> LTDC_R1
-    PJ1     ------> LTDC_R2
-    */
-    GPIO_InitStruct.Pin = LCD_B0_Pin;
- 8003c6c:	2310      	movs	r3, #16
- 8003c6e:	627b      	str	r3, [r7, #36]	; 0x24
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003c70:	2302      	movs	r3, #2
- 8003c72:	62bb      	str	r3, [r7, #40]	; 0x28
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003c74:	2300      	movs	r3, #0
- 8003c76:	62fb      	str	r3, [r7, #44]	; 0x2c
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003c78:	2300      	movs	r3, #0
- 8003c7a:	633b      	str	r3, [r7, #48]	; 0x30
-    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
- 8003c7c:	230e      	movs	r3, #14
- 8003c7e:	637b      	str	r3, [r7, #52]	; 0x34
-    HAL_GPIO_Init(LCD_B0_GPIO_Port, &GPIO_InitStruct);
- 8003c80:	f107 0324 	add.w	r3, r7, #36	; 0x24
- 8003c84:	4619      	mov	r1, r3
- 8003c86:	482b      	ldr	r0, [pc, #172]	; (8003d34 <HAL_LTDC_MspInit+0x17c>)
- 8003c88:	f001 fe32 	bl	80058f0 <HAL_GPIO_Init>
-
-    GPIO_InitStruct.Pin = LCD_B1_Pin|LCD_B2_Pin|LCD_B3_Pin|LCD_G4_Pin
- 8003c8c:	f64e 73ff 	movw	r3, #61439	; 0xefff
- 8003c90:	627b      	str	r3, [r7, #36]	; 0x24
-                          |LCD_G1_Pin|LCD_G3_Pin|LCD_G0_Pin|LCD_G2_Pin
-                          |LCD_R7_Pin|LCD_R5_Pin|LCD_R6_Pin|LCD_R4_Pin
-                          |LCD_R3_Pin|LCD_R1_Pin|LCD_R2_Pin;
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003c92:	2302      	movs	r3, #2
- 8003c94:	62bb      	str	r3, [r7, #40]	; 0x28
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003c96:	2300      	movs	r3, #0
- 8003c98:	62fb      	str	r3, [r7, #44]	; 0x2c
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003c9a:	2300      	movs	r3, #0
- 8003c9c:	633b      	str	r3, [r7, #48]	; 0x30
-    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
- 8003c9e:	230e      	movs	r3, #14
- 8003ca0:	637b      	str	r3, [r7, #52]	; 0x34
-    HAL_GPIO_Init(GPIOJ, &GPIO_InitStruct);
- 8003ca2:	f107 0324 	add.w	r3, r7, #36	; 0x24
- 8003ca6:	4619      	mov	r1, r3
- 8003ca8:	4823      	ldr	r0, [pc, #140]	; (8003d38 <HAL_LTDC_MspInit+0x180>)
- 8003caa:	f001 fe21 	bl	80058f0 <HAL_GPIO_Init>
-
-    GPIO_InitStruct.Pin = LCD_DE_Pin|LCD_B7_Pin|LCD_B6_Pin|LCD_B5_Pin
- 8003cae:	23f7      	movs	r3, #247	; 0xf7
- 8003cb0:	627b      	str	r3, [r7, #36]	; 0x24
-                          |LCD_G6_Pin|LCD_G7_Pin|LCD_G5_Pin;
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003cb2:	2302      	movs	r3, #2
- 8003cb4:	62bb      	str	r3, [r7, #40]	; 0x28
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003cb6:	2300      	movs	r3, #0
- 8003cb8:	62fb      	str	r3, [r7, #44]	; 0x2c
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003cba:	2300      	movs	r3, #0
- 8003cbc:	633b      	str	r3, [r7, #48]	; 0x30
-    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
- 8003cbe:	230e      	movs	r3, #14
- 8003cc0:	637b      	str	r3, [r7, #52]	; 0x34
-    HAL_GPIO_Init(GPIOK, &GPIO_InitStruct);
- 8003cc2:	f107 0324 	add.w	r3, r7, #36	; 0x24
- 8003cc6:	4619      	mov	r1, r3
- 8003cc8:	481c      	ldr	r0, [pc, #112]	; (8003d3c <HAL_LTDC_MspInit+0x184>)
- 8003cca:	f001 fe11 	bl	80058f0 <HAL_GPIO_Init>
-
-    GPIO_InitStruct.Pin = LCD_B4_Pin;
- 8003cce:	f44f 5380 	mov.w	r3, #4096	; 0x1000
- 8003cd2:	627b      	str	r3, [r7, #36]	; 0x24
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003cd4:	2302      	movs	r3, #2
- 8003cd6:	62bb      	str	r3, [r7, #40]	; 0x28
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003cd8:	2300      	movs	r3, #0
- 8003cda:	62fb      	str	r3, [r7, #44]	; 0x2c
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003cdc:	2300      	movs	r3, #0
- 8003cde:	633b      	str	r3, [r7, #48]	; 0x30
-    GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
- 8003ce0:	2309      	movs	r3, #9
- 8003ce2:	637b      	str	r3, [r7, #52]	; 0x34
-    HAL_GPIO_Init(LCD_B4_GPIO_Port, &GPIO_InitStruct);
- 8003ce4:	f107 0324 	add.w	r3, r7, #36	; 0x24
- 8003ce8:	4619      	mov	r1, r3
- 8003cea:	4815      	ldr	r0, [pc, #84]	; (8003d40 <HAL_LTDC_MspInit+0x188>)
- 8003cec:	f001 fe00 	bl	80058f0 <HAL_GPIO_Init>
-
-    GPIO_InitStruct.Pin = LCD_HSYNC_Pin|LCD_VSYNC_Pin|LCD_R0_Pin|LCD_CLK_Pin;
- 8003cf0:	f44f 4346 	mov.w	r3, #50688	; 0xc600
- 8003cf4:	627b      	str	r3, [r7, #36]	; 0x24
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003cf6:	2302      	movs	r3, #2
- 8003cf8:	62bb      	str	r3, [r7, #40]	; 0x28
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003cfa:	2300      	movs	r3, #0
- 8003cfc:	62fb      	str	r3, [r7, #44]	; 0x2c
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003cfe:	2300      	movs	r3, #0
- 8003d00:	633b      	str	r3, [r7, #48]	; 0x30
-    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
- 8003d02:	230e      	movs	r3, #14
- 8003d04:	637b      	str	r3, [r7, #52]	; 0x34
-    HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
- 8003d06:	f107 0324 	add.w	r3, r7, #36	; 0x24
- 8003d0a:	4619      	mov	r1, r3
- 8003d0c:	480d      	ldr	r0, [pc, #52]	; (8003d44 <HAL_LTDC_MspInit+0x18c>)
- 8003d0e:	f001 fdef 	bl	80058f0 <HAL_GPIO_Init>
-
-    /* LTDC interrupt Init */
-    HAL_NVIC_SetPriority(LTDC_IRQn, 5, 0);
- 8003d12:	2200      	movs	r2, #0
- 8003d14:	2105      	movs	r1, #5
- 8003d16:	2058      	movs	r0, #88	; 0x58
- 8003d18:	f001 f8aa 	bl	8004e70 <HAL_NVIC_SetPriority>
-    HAL_NVIC_EnableIRQ(LTDC_IRQn);
- 8003d1c:	2058      	movs	r0, #88	; 0x58
- 8003d1e:	f001 f8c3 	bl	8004ea8 <HAL_NVIC_EnableIRQ>
-  /* USER CODE BEGIN LTDC_MspInit 1 */
-
-  /* USER CODE END LTDC_MspInit 1 */
-  }
-
-}
- 8003d22:	bf00      	nop
- 8003d24:	3738      	adds	r7, #56	; 0x38
- 8003d26:	46bd      	mov	sp, r7
- 8003d28:	bd80      	pop	{r7, pc}
- 8003d2a:	bf00      	nop
- 8003d2c:	40016800 	.word	0x40016800
- 8003d30:	40023800 	.word	0x40023800
- 8003d34:	40021000 	.word	0x40021000
- 8003d38:	40022400 	.word	0x40022400
- 8003d3c:	40022800 	.word	0x40022800
- 8003d40:	40021800 	.word	0x40021800
- 8003d44:	40022000 	.word	0x40022000
-
-08003d48 <HAL_RTC_MspInit>:
-* This function configures the hardware resources used in this example
-* @param hrtc: RTC handle pointer
-* @retval None
-*/
-void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
-{
- 8003d48:	b480      	push	{r7}
- 8003d4a:	b083      	sub	sp, #12
- 8003d4c:	af00      	add	r7, sp, #0
- 8003d4e:	6078      	str	r0, [r7, #4]
-  if(hrtc->Instance==RTC)
- 8003d50:	687b      	ldr	r3, [r7, #4]
- 8003d52:	681b      	ldr	r3, [r3, #0]
- 8003d54:	4a07      	ldr	r2, [pc, #28]	; (8003d74 <HAL_RTC_MspInit+0x2c>)
- 8003d56:	4293      	cmp	r3, r2
- 8003d58:	d105      	bne.n	8003d66 <HAL_RTC_MspInit+0x1e>
-  {
-  /* USER CODE BEGIN RTC_MspInit 0 */
-
-  /* USER CODE END RTC_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_RTC_ENABLE();
- 8003d5a:	4b07      	ldr	r3, [pc, #28]	; (8003d78 <HAL_RTC_MspInit+0x30>)
- 8003d5c:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 8003d5e:	4a06      	ldr	r2, [pc, #24]	; (8003d78 <HAL_RTC_MspInit+0x30>)
- 8003d60:	f443 4300 	orr.w	r3, r3, #32768	; 0x8000
- 8003d64:	6713      	str	r3, [r2, #112]	; 0x70
-  /* USER CODE BEGIN RTC_MspInit 1 */
-
-  /* USER CODE END RTC_MspInit 1 */
-  }
-
-}
- 8003d66:	bf00      	nop
- 8003d68:	370c      	adds	r7, #12
- 8003d6a:	46bd      	mov	sp, r7
- 8003d6c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8003d70:	4770      	bx	lr
- 8003d72:	bf00      	nop
- 8003d74:	40002800 	.word	0x40002800
- 8003d78:	40023800 	.word	0x40023800
-
-08003d7c <HAL_SPI_MspInit>:
-* This function configures the hardware resources used in this example
-* @param hspi: SPI handle pointer
-* @retval None
-*/
-void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
-{
- 8003d7c:	b580      	push	{r7, lr}
- 8003d7e:	b08a      	sub	sp, #40	; 0x28
- 8003d80:	af00      	add	r7, sp, #0
- 8003d82:	6078      	str	r0, [r7, #4]
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8003d84:	f107 0314 	add.w	r3, r7, #20
- 8003d88:	2200      	movs	r2, #0
- 8003d8a:	601a      	str	r2, [r3, #0]
- 8003d8c:	605a      	str	r2, [r3, #4]
- 8003d8e:	609a      	str	r2, [r3, #8]
- 8003d90:	60da      	str	r2, [r3, #12]
- 8003d92:	611a      	str	r2, [r3, #16]
-  if(hspi->Instance==SPI2)
- 8003d94:	687b      	ldr	r3, [r7, #4]
- 8003d96:	681b      	ldr	r3, [r3, #0]
- 8003d98:	4a2d      	ldr	r2, [pc, #180]	; (8003e50 <HAL_SPI_MspInit+0xd4>)
- 8003d9a:	4293      	cmp	r3, r2
- 8003d9c:	d154      	bne.n	8003e48 <HAL_SPI_MspInit+0xcc>
-  {
-  /* USER CODE BEGIN SPI2_MspInit 0 */
-
-  /* USER CODE END SPI2_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_SPI2_CLK_ENABLE();
- 8003d9e:	4b2d      	ldr	r3, [pc, #180]	; (8003e54 <HAL_SPI_MspInit+0xd8>)
- 8003da0:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003da2:	4a2c      	ldr	r2, [pc, #176]	; (8003e54 <HAL_SPI_MspInit+0xd8>)
- 8003da4:	f443 4380 	orr.w	r3, r3, #16384	; 0x4000
- 8003da8:	6413      	str	r3, [r2, #64]	; 0x40
- 8003daa:	4b2a      	ldr	r3, [pc, #168]	; (8003e54 <HAL_SPI_MspInit+0xd8>)
- 8003dac:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003dae:	f403 4380 	and.w	r3, r3, #16384	; 0x4000
- 8003db2:	613b      	str	r3, [r7, #16]
- 8003db4:	693b      	ldr	r3, [r7, #16]
-
-    __HAL_RCC_GPIOI_CLK_ENABLE();
- 8003db6:	4b27      	ldr	r3, [pc, #156]	; (8003e54 <HAL_SPI_MspInit+0xd8>)
- 8003db8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003dba:	4a26      	ldr	r2, [pc, #152]	; (8003e54 <HAL_SPI_MspInit+0xd8>)
- 8003dbc:	f443 7380 	orr.w	r3, r3, #256	; 0x100
- 8003dc0:	6313      	str	r3, [r2, #48]	; 0x30
- 8003dc2:	4b24      	ldr	r3, [pc, #144]	; (8003e54 <HAL_SPI_MspInit+0xd8>)
- 8003dc4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003dc6:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 8003dca:	60fb      	str	r3, [r7, #12]
- 8003dcc:	68fb      	ldr	r3, [r7, #12]
-    __HAL_RCC_GPIOB_CLK_ENABLE();
- 8003dce:	4b21      	ldr	r3, [pc, #132]	; (8003e54 <HAL_SPI_MspInit+0xd8>)
- 8003dd0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003dd2:	4a20      	ldr	r2, [pc, #128]	; (8003e54 <HAL_SPI_MspInit+0xd8>)
- 8003dd4:	f043 0302 	orr.w	r3, r3, #2
- 8003dd8:	6313      	str	r3, [r2, #48]	; 0x30
- 8003dda:	4b1e      	ldr	r3, [pc, #120]	; (8003e54 <HAL_SPI_MspInit+0xd8>)
- 8003ddc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003dde:	f003 0302 	and.w	r3, r3, #2
- 8003de2:	60bb      	str	r3, [r7, #8]
- 8003de4:	68bb      	ldr	r3, [r7, #8]
-    PI1     ------> SPI2_SCK
-    PI0     ------> SPI2_NSS
-    PB14     ------> SPI2_MISO
-    PB15     ------> SPI2_MOSI
-    */
-    GPIO_InitStruct.Pin = ARDUINO_SCK_D13_Pin;
- 8003de6:	2302      	movs	r3, #2
- 8003de8:	617b      	str	r3, [r7, #20]
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003dea:	2302      	movs	r3, #2
- 8003dec:	61bb      	str	r3, [r7, #24]
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003dee:	2300      	movs	r3, #0
- 8003df0:	61fb      	str	r3, [r7, #28]
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003df2:	2300      	movs	r3, #0
- 8003df4:	623b      	str	r3, [r7, #32]
-    GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
- 8003df6:	2305      	movs	r3, #5
- 8003df8:	627b      	str	r3, [r7, #36]	; 0x24
-    HAL_GPIO_Init(ARDUINO_SCK_D13_GPIO_Port, &GPIO_InitStruct);
- 8003dfa:	f107 0314 	add.w	r3, r7, #20
- 8003dfe:	4619      	mov	r1, r3
- 8003e00:	4815      	ldr	r0, [pc, #84]	; (8003e58 <HAL_SPI_MspInit+0xdc>)
- 8003e02:	f001 fd75 	bl	80058f0 <HAL_GPIO_Init>
-
-    GPIO_InitStruct.Pin = GPIO_PIN_0;
- 8003e06:	2301      	movs	r3, #1
- 8003e08:	617b      	str	r3, [r7, #20]
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003e0a:	2302      	movs	r3, #2
- 8003e0c:	61bb      	str	r3, [r7, #24]
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003e0e:	2300      	movs	r3, #0
- 8003e10:	61fb      	str	r3, [r7, #28]
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8003e12:	2303      	movs	r3, #3
- 8003e14:	623b      	str	r3, [r7, #32]
-    GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
- 8003e16:	2305      	movs	r3, #5
- 8003e18:	627b      	str	r3, [r7, #36]	; 0x24
-    HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
- 8003e1a:	f107 0314 	add.w	r3, r7, #20
- 8003e1e:	4619      	mov	r1, r3
- 8003e20:	480d      	ldr	r0, [pc, #52]	; (8003e58 <HAL_SPI_MspInit+0xdc>)
- 8003e22:	f001 fd65 	bl	80058f0 <HAL_GPIO_Init>
-
-    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
- 8003e26:	f44f 4340 	mov.w	r3, #49152	; 0xc000
- 8003e2a:	617b      	str	r3, [r7, #20]
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003e2c:	2302      	movs	r3, #2
- 8003e2e:	61bb      	str	r3, [r7, #24]
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003e30:	2300      	movs	r3, #0
- 8003e32:	61fb      	str	r3, [r7, #28]
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8003e34:	2303      	movs	r3, #3
- 8003e36:	623b      	str	r3, [r7, #32]
-    GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
- 8003e38:	2305      	movs	r3, #5
- 8003e3a:	627b      	str	r3, [r7, #36]	; 0x24
-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8003e3c:	f107 0314 	add.w	r3, r7, #20
- 8003e40:	4619      	mov	r1, r3
- 8003e42:	4806      	ldr	r0, [pc, #24]	; (8003e5c <HAL_SPI_MspInit+0xe0>)
- 8003e44:	f001 fd54 	bl	80058f0 <HAL_GPIO_Init>
-  /* USER CODE BEGIN SPI2_MspInit 1 */
-
-  /* USER CODE END SPI2_MspInit 1 */
-  }
-
-}
- 8003e48:	bf00      	nop
- 8003e4a:	3728      	adds	r7, #40	; 0x28
- 8003e4c:	46bd      	mov	sp, r7
- 8003e4e:	bd80      	pop	{r7, pc}
- 8003e50:	40003800 	.word	0x40003800
- 8003e54:	40023800 	.word	0x40023800
- 8003e58:	40022000 	.word	0x40022000
- 8003e5c:	40020400 	.word	0x40020400
-
-08003e60 <HAL_TIM_Base_MspInit>:
-* This function configures the hardware resources used in this example
-* @param htim_base: TIM_Base handle pointer
-* @retval None
-*/
-void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
-{
- 8003e60:	b480      	push	{r7}
- 8003e62:	b089      	sub	sp, #36	; 0x24
- 8003e64:	af00      	add	r7, sp, #0
- 8003e66:	6078      	str	r0, [r7, #4]
-  if(htim_base->Instance==TIM1)
- 8003e68:	687b      	ldr	r3, [r7, #4]
- 8003e6a:	681b      	ldr	r3, [r3, #0]
- 8003e6c:	4a2e      	ldr	r2, [pc, #184]	; (8003f28 <HAL_TIM_Base_MspInit+0xc8>)
- 8003e6e:	4293      	cmp	r3, r2
- 8003e70:	d10c      	bne.n	8003e8c <HAL_TIM_Base_MspInit+0x2c>
-  {
-  /* USER CODE BEGIN TIM1_MspInit 0 */
-
-  /* USER CODE END TIM1_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_TIM1_CLK_ENABLE();
- 8003e72:	4b2e      	ldr	r3, [pc, #184]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003e74:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8003e76:	4a2d      	ldr	r2, [pc, #180]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003e78:	f043 0301 	orr.w	r3, r3, #1
- 8003e7c:	6453      	str	r3, [r2, #68]	; 0x44
- 8003e7e:	4b2b      	ldr	r3, [pc, #172]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003e80:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8003e82:	f003 0301 	and.w	r3, r3, #1
- 8003e86:	61fb      	str	r3, [r7, #28]
- 8003e88:	69fb      	ldr	r3, [r7, #28]
-  /* USER CODE BEGIN TIM8_MspInit 1 */
-
-  /* USER CODE END TIM8_MspInit 1 */
-  }
-
-}
- 8003e8a:	e046      	b.n	8003f1a <HAL_TIM_Base_MspInit+0xba>
-  else if(htim_base->Instance==TIM2)
- 8003e8c:	687b      	ldr	r3, [r7, #4]
- 8003e8e:	681b      	ldr	r3, [r3, #0]
- 8003e90:	f1b3 4f80 	cmp.w	r3, #1073741824	; 0x40000000
- 8003e94:	d10c      	bne.n	8003eb0 <HAL_TIM_Base_MspInit+0x50>
-    __HAL_RCC_TIM2_CLK_ENABLE();
- 8003e96:	4b25      	ldr	r3, [pc, #148]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003e98:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003e9a:	4a24      	ldr	r2, [pc, #144]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003e9c:	f043 0301 	orr.w	r3, r3, #1
- 8003ea0:	6413      	str	r3, [r2, #64]	; 0x40
- 8003ea2:	4b22      	ldr	r3, [pc, #136]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003ea4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003ea6:	f003 0301 	and.w	r3, r3, #1
- 8003eaa:	61bb      	str	r3, [r7, #24]
- 8003eac:	69bb      	ldr	r3, [r7, #24]
-}
- 8003eae:	e034      	b.n	8003f1a <HAL_TIM_Base_MspInit+0xba>
-  else if(htim_base->Instance==TIM3)
- 8003eb0:	687b      	ldr	r3, [r7, #4]
- 8003eb2:	681b      	ldr	r3, [r3, #0]
- 8003eb4:	4a1e      	ldr	r2, [pc, #120]	; (8003f30 <HAL_TIM_Base_MspInit+0xd0>)
- 8003eb6:	4293      	cmp	r3, r2
- 8003eb8:	d10c      	bne.n	8003ed4 <HAL_TIM_Base_MspInit+0x74>
-    __HAL_RCC_TIM3_CLK_ENABLE();
- 8003eba:	4b1c      	ldr	r3, [pc, #112]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003ebc:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003ebe:	4a1b      	ldr	r2, [pc, #108]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003ec0:	f043 0302 	orr.w	r3, r3, #2
- 8003ec4:	6413      	str	r3, [r2, #64]	; 0x40
- 8003ec6:	4b19      	ldr	r3, [pc, #100]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003ec8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003eca:	f003 0302 	and.w	r3, r3, #2
- 8003ece:	617b      	str	r3, [r7, #20]
- 8003ed0:	697b      	ldr	r3, [r7, #20]
-}
- 8003ed2:	e022      	b.n	8003f1a <HAL_TIM_Base_MspInit+0xba>
-  else if(htim_base->Instance==TIM5)
- 8003ed4:	687b      	ldr	r3, [r7, #4]
- 8003ed6:	681b      	ldr	r3, [r3, #0]
- 8003ed8:	4a16      	ldr	r2, [pc, #88]	; (8003f34 <HAL_TIM_Base_MspInit+0xd4>)
- 8003eda:	4293      	cmp	r3, r2
- 8003edc:	d10c      	bne.n	8003ef8 <HAL_TIM_Base_MspInit+0x98>
-    __HAL_RCC_TIM5_CLK_ENABLE();
- 8003ede:	4b13      	ldr	r3, [pc, #76]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003ee0:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003ee2:	4a12      	ldr	r2, [pc, #72]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003ee4:	f043 0308 	orr.w	r3, r3, #8
- 8003ee8:	6413      	str	r3, [r2, #64]	; 0x40
- 8003eea:	4b10      	ldr	r3, [pc, #64]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003eec:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8003eee:	f003 0308 	and.w	r3, r3, #8
- 8003ef2:	613b      	str	r3, [r7, #16]
- 8003ef4:	693b      	ldr	r3, [r7, #16]
-}
- 8003ef6:	e010      	b.n	8003f1a <HAL_TIM_Base_MspInit+0xba>
-  else if(htim_base->Instance==TIM8)
- 8003ef8:	687b      	ldr	r3, [r7, #4]
- 8003efa:	681b      	ldr	r3, [r3, #0]
- 8003efc:	4a0e      	ldr	r2, [pc, #56]	; (8003f38 <HAL_TIM_Base_MspInit+0xd8>)
- 8003efe:	4293      	cmp	r3, r2
- 8003f00:	d10b      	bne.n	8003f1a <HAL_TIM_Base_MspInit+0xba>
-    __HAL_RCC_TIM8_CLK_ENABLE();
- 8003f02:	4b0a      	ldr	r3, [pc, #40]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003f04:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8003f06:	4a09      	ldr	r2, [pc, #36]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003f08:	f043 0302 	orr.w	r3, r3, #2
- 8003f0c:	6453      	str	r3, [r2, #68]	; 0x44
- 8003f0e:	4b07      	ldr	r3, [pc, #28]	; (8003f2c <HAL_TIM_Base_MspInit+0xcc>)
- 8003f10:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8003f12:	f003 0302 	and.w	r3, r3, #2
- 8003f16:	60fb      	str	r3, [r7, #12]
- 8003f18:	68fb      	ldr	r3, [r7, #12]
-}
- 8003f1a:	bf00      	nop
- 8003f1c:	3724      	adds	r7, #36	; 0x24
- 8003f1e:	46bd      	mov	sp, r7
- 8003f20:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8003f24:	4770      	bx	lr
- 8003f26:	bf00      	nop
- 8003f28:	40010000 	.word	0x40010000
- 8003f2c:	40023800 	.word	0x40023800
- 8003f30:	40000400 	.word	0x40000400
- 8003f34:	40000c00 	.word	0x40000c00
- 8003f38:	40010400 	.word	0x40010400
-
-08003f3c <HAL_TIM_MspPostInit>:
-
-void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
-{
- 8003f3c:	b580      	push	{r7, lr}
- 8003f3e:	b08a      	sub	sp, #40	; 0x28
- 8003f40:	af00      	add	r7, sp, #0
- 8003f42:	6078      	str	r0, [r7, #4]
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8003f44:	f107 0314 	add.w	r3, r7, #20
- 8003f48:	2200      	movs	r2, #0
- 8003f4a:	601a      	str	r2, [r3, #0]
- 8003f4c:	605a      	str	r2, [r3, #4]
- 8003f4e:	609a      	str	r2, [r3, #8]
- 8003f50:	60da      	str	r2, [r3, #12]
- 8003f52:	611a      	str	r2, [r3, #16]
-  if(htim->Instance==TIM3)
- 8003f54:	687b      	ldr	r3, [r7, #4]
- 8003f56:	681b      	ldr	r3, [r3, #0]
- 8003f58:	4a22      	ldr	r2, [pc, #136]	; (8003fe4 <HAL_TIM_MspPostInit+0xa8>)
- 8003f5a:	4293      	cmp	r3, r2
- 8003f5c:	d11c      	bne.n	8003f98 <HAL_TIM_MspPostInit+0x5c>
-  {
-  /* USER CODE BEGIN TIM3_MspPostInit 0 */
-
-  /* USER CODE END TIM3_MspPostInit 0 */
-    __HAL_RCC_GPIOB_CLK_ENABLE();
- 8003f5e:	4b22      	ldr	r3, [pc, #136]	; (8003fe8 <HAL_TIM_MspPostInit+0xac>)
- 8003f60:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003f62:	4a21      	ldr	r2, [pc, #132]	; (8003fe8 <HAL_TIM_MspPostInit+0xac>)
- 8003f64:	f043 0302 	orr.w	r3, r3, #2
- 8003f68:	6313      	str	r3, [r2, #48]	; 0x30
- 8003f6a:	4b1f      	ldr	r3, [pc, #124]	; (8003fe8 <HAL_TIM_MspPostInit+0xac>)
- 8003f6c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003f6e:	f003 0302 	and.w	r3, r3, #2
- 8003f72:	613b      	str	r3, [r7, #16]
- 8003f74:	693b      	ldr	r3, [r7, #16]
-    /**TIM3 GPIO Configuration
-    PB4     ------> TIM3_CH1
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_4;
- 8003f76:	2310      	movs	r3, #16
- 8003f78:	617b      	str	r3, [r7, #20]
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003f7a:	2302      	movs	r3, #2
- 8003f7c:	61bb      	str	r3, [r7, #24]
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003f7e:	2300      	movs	r3, #0
- 8003f80:	61fb      	str	r3, [r7, #28]
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003f82:	2300      	movs	r3, #0
- 8003f84:	623b      	str	r3, [r7, #32]
-    GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
- 8003f86:	2302      	movs	r3, #2
- 8003f88:	627b      	str	r3, [r7, #36]	; 0x24
-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8003f8a:	f107 0314 	add.w	r3, r7, #20
- 8003f8e:	4619      	mov	r1, r3
- 8003f90:	4816      	ldr	r0, [pc, #88]	; (8003fec <HAL_TIM_MspPostInit+0xb0>)
- 8003f92:	f001 fcad 	bl	80058f0 <HAL_GPIO_Init>
-  /* USER CODE BEGIN TIM8_MspPostInit 1 */
-
-  /* USER CODE END TIM8_MspPostInit 1 */
-  }
-
-}
- 8003f96:	e020      	b.n	8003fda <HAL_TIM_MspPostInit+0x9e>
-  else if(htim->Instance==TIM8)
- 8003f98:	687b      	ldr	r3, [r7, #4]
- 8003f9a:	681b      	ldr	r3, [r3, #0]
- 8003f9c:	4a14      	ldr	r2, [pc, #80]	; (8003ff0 <HAL_TIM_MspPostInit+0xb4>)
- 8003f9e:	4293      	cmp	r3, r2
- 8003fa0:	d11b      	bne.n	8003fda <HAL_TIM_MspPostInit+0x9e>
-    __HAL_RCC_GPIOI_CLK_ENABLE();
- 8003fa2:	4b11      	ldr	r3, [pc, #68]	; (8003fe8 <HAL_TIM_MspPostInit+0xac>)
- 8003fa4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003fa6:	4a10      	ldr	r2, [pc, #64]	; (8003fe8 <HAL_TIM_MspPostInit+0xac>)
- 8003fa8:	f443 7380 	orr.w	r3, r3, #256	; 0x100
- 8003fac:	6313      	str	r3, [r2, #48]	; 0x30
- 8003fae:	4b0e      	ldr	r3, [pc, #56]	; (8003fe8 <HAL_TIM_MspPostInit+0xac>)
- 8003fb0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8003fb2:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 8003fb6:	60fb      	str	r3, [r7, #12]
- 8003fb8:	68fb      	ldr	r3, [r7, #12]
-    GPIO_InitStruct.Pin = GPIO_PIN_2;
- 8003fba:	2304      	movs	r3, #4
- 8003fbc:	617b      	str	r3, [r7, #20]
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8003fbe:	2302      	movs	r3, #2
- 8003fc0:	61bb      	str	r3, [r7, #24]
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8003fc2:	2300      	movs	r3, #0
- 8003fc4:	61fb      	str	r3, [r7, #28]
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8003fc6:	2300      	movs	r3, #0
- 8003fc8:	623b      	str	r3, [r7, #32]
-    GPIO_InitStruct.Alternate = GPIO_AF3_TIM8;
- 8003fca:	2303      	movs	r3, #3
- 8003fcc:	627b      	str	r3, [r7, #36]	; 0x24
-    HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
- 8003fce:	f107 0314 	add.w	r3, r7, #20
- 8003fd2:	4619      	mov	r1, r3
- 8003fd4:	4807      	ldr	r0, [pc, #28]	; (8003ff4 <HAL_TIM_MspPostInit+0xb8>)
- 8003fd6:	f001 fc8b 	bl	80058f0 <HAL_GPIO_Init>
-}
- 8003fda:	bf00      	nop
- 8003fdc:	3728      	adds	r7, #40	; 0x28
- 8003fde:	46bd      	mov	sp, r7
- 8003fe0:	bd80      	pop	{r7, pc}
- 8003fe2:	bf00      	nop
- 8003fe4:	40000400 	.word	0x40000400
- 8003fe8:	40023800 	.word	0x40023800
- 8003fec:	40020400 	.word	0x40020400
- 8003ff0:	40010400 	.word	0x40010400
- 8003ff4:	40022000 	.word	0x40022000
-
-08003ff8 <HAL_UART_MspInit>:
-* This function configures the hardware resources used in this example
-* @param huart: UART handle pointer
-* @retval None
-*/
-void HAL_UART_MspInit(UART_HandleTypeDef* huart)
-{
- 8003ff8:	b580      	push	{r7, lr}
- 8003ffa:	b08e      	sub	sp, #56	; 0x38
- 8003ffc:	af00      	add	r7, sp, #0
- 8003ffe:	6078      	str	r0, [r7, #4]
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8004000:	f107 0324 	add.w	r3, r7, #36	; 0x24
- 8004004:	2200      	movs	r2, #0
- 8004006:	601a      	str	r2, [r3, #0]
- 8004008:	605a      	str	r2, [r3, #4]
- 800400a:	609a      	str	r2, [r3, #8]
- 800400c:	60da      	str	r2, [r3, #12]
- 800400e:	611a      	str	r2, [r3, #16]
-  if(huart->Instance==UART7)
- 8004010:	687b      	ldr	r3, [r7, #4]
- 8004012:	681b      	ldr	r3, [r3, #0]
- 8004014:	4a53      	ldr	r2, [pc, #332]	; (8004164 <HAL_UART_MspInit+0x16c>)
- 8004016:	4293      	cmp	r3, r2
- 8004018:	d128      	bne.n	800406c <HAL_UART_MspInit+0x74>
-  {
-  /* USER CODE BEGIN UART7_MspInit 0 */
-
-  /* USER CODE END UART7_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_UART7_CLK_ENABLE();
- 800401a:	4b53      	ldr	r3, [pc, #332]	; (8004168 <HAL_UART_MspInit+0x170>)
- 800401c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 800401e:	4a52      	ldr	r2, [pc, #328]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004020:	f043 4380 	orr.w	r3, r3, #1073741824	; 0x40000000
- 8004024:	6413      	str	r3, [r2, #64]	; 0x40
- 8004026:	4b50      	ldr	r3, [pc, #320]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004028:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 800402a:	f003 4380 	and.w	r3, r3, #1073741824	; 0x40000000
- 800402e:	623b      	str	r3, [r7, #32]
- 8004030:	6a3b      	ldr	r3, [r7, #32]
-
-    __HAL_RCC_GPIOF_CLK_ENABLE();
- 8004032:	4b4d      	ldr	r3, [pc, #308]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004034:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8004036:	4a4c      	ldr	r2, [pc, #304]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004038:	f043 0320 	orr.w	r3, r3, #32
- 800403c:	6313      	str	r3, [r2, #48]	; 0x30
- 800403e:	4b4a      	ldr	r3, [pc, #296]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004040:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8004042:	f003 0320 	and.w	r3, r3, #32
- 8004046:	61fb      	str	r3, [r7, #28]
- 8004048:	69fb      	ldr	r3, [r7, #28]
-    /**UART7 GPIO Configuration
-    PF7     ------> UART7_TX
-    PF6     ------> UART7_RX
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6;
- 800404a:	23c0      	movs	r3, #192	; 0xc0
- 800404c:	627b      	str	r3, [r7, #36]	; 0x24
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 800404e:	2302      	movs	r3, #2
- 8004050:	62bb      	str	r3, [r7, #40]	; 0x28
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004052:	2300      	movs	r3, #0
- 8004054:	62fb      	str	r3, [r7, #44]	; 0x2c
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8004056:	2303      	movs	r3, #3
- 8004058:	633b      	str	r3, [r7, #48]	; 0x30
-    GPIO_InitStruct.Alternate = GPIO_AF8_UART7;
- 800405a:	2308      	movs	r3, #8
- 800405c:	637b      	str	r3, [r7, #52]	; 0x34
-    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 800405e:	f107 0324 	add.w	r3, r7, #36	; 0x24
- 8004062:	4619      	mov	r1, r3
- 8004064:	4841      	ldr	r0, [pc, #260]	; (800416c <HAL_UART_MspInit+0x174>)
- 8004066:	f001 fc43 	bl	80058f0 <HAL_GPIO_Init>
-  /* USER CODE BEGIN USART6_MspInit 1 */
-
-  /* USER CODE END USART6_MspInit 1 */
-  }
-
-}
- 800406a:	e077      	b.n	800415c <HAL_UART_MspInit+0x164>
-  else if(huart->Instance==USART1)
- 800406c:	687b      	ldr	r3, [r7, #4]
- 800406e:	681b      	ldr	r3, [r3, #0]
- 8004070:	4a3f      	ldr	r2, [pc, #252]	; (8004170 <HAL_UART_MspInit+0x178>)
- 8004072:	4293      	cmp	r3, r2
- 8004074:	d145      	bne.n	8004102 <HAL_UART_MspInit+0x10a>
-    __HAL_RCC_USART1_CLK_ENABLE();
- 8004076:	4b3c      	ldr	r3, [pc, #240]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004078:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 800407a:	4a3b      	ldr	r2, [pc, #236]	; (8004168 <HAL_UART_MspInit+0x170>)
- 800407c:	f043 0310 	orr.w	r3, r3, #16
- 8004080:	6453      	str	r3, [r2, #68]	; 0x44
- 8004082:	4b39      	ldr	r3, [pc, #228]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004084:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8004086:	f003 0310 	and.w	r3, r3, #16
- 800408a:	61bb      	str	r3, [r7, #24]
- 800408c:	69bb      	ldr	r3, [r7, #24]
-    __HAL_RCC_GPIOB_CLK_ENABLE();
- 800408e:	4b36      	ldr	r3, [pc, #216]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004090:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8004092:	4a35      	ldr	r2, [pc, #212]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004094:	f043 0302 	orr.w	r3, r3, #2
- 8004098:	6313      	str	r3, [r2, #48]	; 0x30
- 800409a:	4b33      	ldr	r3, [pc, #204]	; (8004168 <HAL_UART_MspInit+0x170>)
- 800409c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 800409e:	f003 0302 	and.w	r3, r3, #2
- 80040a2:	617b      	str	r3, [r7, #20]
- 80040a4:	697b      	ldr	r3, [r7, #20]
-    __HAL_RCC_GPIOA_CLK_ENABLE();
- 80040a6:	4b30      	ldr	r3, [pc, #192]	; (8004168 <HAL_UART_MspInit+0x170>)
- 80040a8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 80040aa:	4a2f      	ldr	r2, [pc, #188]	; (8004168 <HAL_UART_MspInit+0x170>)
- 80040ac:	f043 0301 	orr.w	r3, r3, #1
- 80040b0:	6313      	str	r3, [r2, #48]	; 0x30
- 80040b2:	4b2d      	ldr	r3, [pc, #180]	; (8004168 <HAL_UART_MspInit+0x170>)
- 80040b4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 80040b6:	f003 0301 	and.w	r3, r3, #1
- 80040ba:	613b      	str	r3, [r7, #16]
- 80040bc:	693b      	ldr	r3, [r7, #16]
-    GPIO_InitStruct.Pin = VCP_RX_Pin;
- 80040be:	2380      	movs	r3, #128	; 0x80
- 80040c0:	627b      	str	r3, [r7, #36]	; 0x24
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 80040c2:	2302      	movs	r3, #2
- 80040c4:	62bb      	str	r3, [r7, #40]	; 0x28
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80040c6:	2300      	movs	r3, #0
- 80040c8:	62fb      	str	r3, [r7, #44]	; 0x2c
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 80040ca:	2300      	movs	r3, #0
- 80040cc:	633b      	str	r3, [r7, #48]	; 0x30
-    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
- 80040ce:	2307      	movs	r3, #7
- 80040d0:	637b      	str	r3, [r7, #52]	; 0x34
-    HAL_GPIO_Init(VCP_RX_GPIO_Port, &GPIO_InitStruct);
- 80040d2:	f107 0324 	add.w	r3, r7, #36	; 0x24
- 80040d6:	4619      	mov	r1, r3
- 80040d8:	4826      	ldr	r0, [pc, #152]	; (8004174 <HAL_UART_MspInit+0x17c>)
- 80040da:	f001 fc09 	bl	80058f0 <HAL_GPIO_Init>
-    GPIO_InitStruct.Pin = VCP_TX_Pin;
- 80040de:	f44f 7300 	mov.w	r3, #512	; 0x200
- 80040e2:	627b      	str	r3, [r7, #36]	; 0x24
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 80040e4:	2302      	movs	r3, #2
- 80040e6:	62bb      	str	r3, [r7, #40]	; 0x28
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80040e8:	2300      	movs	r3, #0
- 80040ea:	62fb      	str	r3, [r7, #44]	; 0x2c
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 80040ec:	2300      	movs	r3, #0
- 80040ee:	633b      	str	r3, [r7, #48]	; 0x30
-    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
- 80040f0:	2307      	movs	r3, #7
- 80040f2:	637b      	str	r3, [r7, #52]	; 0x34
-    HAL_GPIO_Init(VCP_TX_GPIO_Port, &GPIO_InitStruct);
- 80040f4:	f107 0324 	add.w	r3, r7, #36	; 0x24
- 80040f8:	4619      	mov	r1, r3
- 80040fa:	481f      	ldr	r0, [pc, #124]	; (8004178 <HAL_UART_MspInit+0x180>)
- 80040fc:	f001 fbf8 	bl	80058f0 <HAL_GPIO_Init>
-}
- 8004100:	e02c      	b.n	800415c <HAL_UART_MspInit+0x164>
-  else if(huart->Instance==USART6)
- 8004102:	687b      	ldr	r3, [r7, #4]
- 8004104:	681b      	ldr	r3, [r3, #0]
- 8004106:	4a1d      	ldr	r2, [pc, #116]	; (800417c <HAL_UART_MspInit+0x184>)
- 8004108:	4293      	cmp	r3, r2
- 800410a:	d127      	bne.n	800415c <HAL_UART_MspInit+0x164>
-    __HAL_RCC_USART6_CLK_ENABLE();
- 800410c:	4b16      	ldr	r3, [pc, #88]	; (8004168 <HAL_UART_MspInit+0x170>)
- 800410e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8004110:	4a15      	ldr	r2, [pc, #84]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004112:	f043 0320 	orr.w	r3, r3, #32
- 8004116:	6453      	str	r3, [r2, #68]	; 0x44
- 8004118:	4b13      	ldr	r3, [pc, #76]	; (8004168 <HAL_UART_MspInit+0x170>)
- 800411a:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 800411c:	f003 0320 	and.w	r3, r3, #32
- 8004120:	60fb      	str	r3, [r7, #12]
- 8004122:	68fb      	ldr	r3, [r7, #12]
-    __HAL_RCC_GPIOC_CLK_ENABLE();
- 8004124:	4b10      	ldr	r3, [pc, #64]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004126:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8004128:	4a0f      	ldr	r2, [pc, #60]	; (8004168 <HAL_UART_MspInit+0x170>)
- 800412a:	f043 0304 	orr.w	r3, r3, #4
- 800412e:	6313      	str	r3, [r2, #48]	; 0x30
- 8004130:	4b0d      	ldr	r3, [pc, #52]	; (8004168 <HAL_UART_MspInit+0x170>)
- 8004132:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8004134:	f003 0304 	and.w	r3, r3, #4
- 8004138:	60bb      	str	r3, [r7, #8]
- 800413a:	68bb      	ldr	r3, [r7, #8]
-    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6;
- 800413c:	23c0      	movs	r3, #192	; 0xc0
- 800413e:	627b      	str	r3, [r7, #36]	; 0x24
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8004140:	2302      	movs	r3, #2
- 8004142:	62bb      	str	r3, [r7, #40]	; 0x28
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004144:	2300      	movs	r3, #0
- 8004146:	62fb      	str	r3, [r7, #44]	; 0x2c
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8004148:	2303      	movs	r3, #3
- 800414a:	633b      	str	r3, [r7, #48]	; 0x30
-    GPIO_InitStruct.Alternate = GPIO_AF8_USART6;
- 800414c:	2308      	movs	r3, #8
- 800414e:	637b      	str	r3, [r7, #52]	; 0x34
-    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 8004150:	f107 0324 	add.w	r3, r7, #36	; 0x24
- 8004154:	4619      	mov	r1, r3
- 8004156:	480a      	ldr	r0, [pc, #40]	; (8004180 <HAL_UART_MspInit+0x188>)
- 8004158:	f001 fbca 	bl	80058f0 <HAL_GPIO_Init>
-}
- 800415c:	bf00      	nop
- 800415e:	3738      	adds	r7, #56	; 0x38
- 8004160:	46bd      	mov	sp, r7
- 8004162:	bd80      	pop	{r7, pc}
- 8004164:	40007800 	.word	0x40007800
- 8004168:	40023800 	.word	0x40023800
- 800416c:	40021400 	.word	0x40021400
- 8004170:	40011000 	.word	0x40011000
- 8004174:	40020400 	.word	0x40020400
- 8004178:	40020000 	.word	0x40020000
- 800417c:	40011400 	.word	0x40011400
- 8004180:	40020800 	.word	0x40020800
-
-08004184 <HAL_FMC_MspInit>:
-
-}
-
-static uint32_t FMC_Initialized = 0;
-
-static void HAL_FMC_MspInit(void){
- 8004184:	b580      	push	{r7, lr}
- 8004186:	b086      	sub	sp, #24
- 8004188:	af00      	add	r7, sp, #0
-  /* USER CODE BEGIN FMC_MspInit 0 */
-
-  /* USER CODE END FMC_MspInit 0 */
-  GPIO_InitTypeDef GPIO_InitStruct ={0};
- 800418a:	1d3b      	adds	r3, r7, #4
- 800418c:	2200      	movs	r2, #0
- 800418e:	601a      	str	r2, [r3, #0]
- 8004190:	605a      	str	r2, [r3, #4]
- 8004192:	609a      	str	r2, [r3, #8]
- 8004194:	60da      	str	r2, [r3, #12]
- 8004196:	611a      	str	r2, [r3, #16]
-  if (FMC_Initialized) {
- 8004198:	4b3a      	ldr	r3, [pc, #232]	; (8004284 <HAL_FMC_MspInit+0x100>)
- 800419a:	681b      	ldr	r3, [r3, #0]
- 800419c:	2b00      	cmp	r3, #0
- 800419e:	d16d      	bne.n	800427c <HAL_FMC_MspInit+0xf8>
-    return;
-  }
-  FMC_Initialized = 1;
- 80041a0:	4b38      	ldr	r3, [pc, #224]	; (8004284 <HAL_FMC_MspInit+0x100>)
- 80041a2:	2201      	movs	r2, #1
- 80041a4:	601a      	str	r2, [r3, #0]
-
-  /* Peripheral clock enable */
-  __HAL_RCC_FMC_CLK_ENABLE();
- 80041a6:	4b38      	ldr	r3, [pc, #224]	; (8004288 <HAL_FMC_MspInit+0x104>)
- 80041a8:	6b9b      	ldr	r3, [r3, #56]	; 0x38
- 80041aa:	4a37      	ldr	r2, [pc, #220]	; (8004288 <HAL_FMC_MspInit+0x104>)
- 80041ac:	f043 0301 	orr.w	r3, r3, #1
- 80041b0:	6393      	str	r3, [r2, #56]	; 0x38
- 80041b2:	4b35      	ldr	r3, [pc, #212]	; (8004288 <HAL_FMC_MspInit+0x104>)
- 80041b4:	6b9b      	ldr	r3, [r3, #56]	; 0x38
- 80041b6:	f003 0301 	and.w	r3, r3, #1
- 80041ba:	603b      	str	r3, [r7, #0]
- 80041bc:	683b      	ldr	r3, [r7, #0]
-  PE10   ------> FMC_D7
-  PE12   ------> FMC_D9
-  PE15   ------> FMC_D12
-  PE13   ------> FMC_D10
-  */
-  GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_0|GPIO_PIN_8|GPIO_PIN_9
- 80041be:	f64f 7383 	movw	r3, #65411	; 0xff83
- 80041c2:	607b      	str	r3, [r7, #4]
-                          |GPIO_PIN_11|GPIO_PIN_14|GPIO_PIN_7|GPIO_PIN_10
-                          |GPIO_PIN_12|GPIO_PIN_15|GPIO_PIN_13;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 80041c4:	2302      	movs	r3, #2
- 80041c6:	60bb      	str	r3, [r7, #8]
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80041c8:	2300      	movs	r3, #0
- 80041ca:	60fb      	str	r3, [r7, #12]
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 80041cc:	2303      	movs	r3, #3
- 80041ce:	613b      	str	r3, [r7, #16]
-  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
- 80041d0:	230c      	movs	r3, #12
- 80041d2:	617b      	str	r3, [r7, #20]
-  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 80041d4:	1d3b      	adds	r3, r7, #4
- 80041d6:	4619      	mov	r1, r3
- 80041d8:	482c      	ldr	r0, [pc, #176]	; (800428c <HAL_FMC_MspInit+0x108>)
- 80041da:	f001 fb89 	bl	80058f0 <HAL_GPIO_Init>
-
-  GPIO_InitStruct.Pin = GPIO_PIN_15|GPIO_PIN_8|GPIO_PIN_1|GPIO_PIN_0
- 80041de:	f248 1333 	movw	r3, #33075	; 0x8133
- 80041e2:	607b      	str	r3, [r7, #4]
-                          |GPIO_PIN_5|GPIO_PIN_4;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 80041e4:	2302      	movs	r3, #2
- 80041e6:	60bb      	str	r3, [r7, #8]
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80041e8:	2300      	movs	r3, #0
- 80041ea:	60fb      	str	r3, [r7, #12]
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 80041ec:	2303      	movs	r3, #3
- 80041ee:	613b      	str	r3, [r7, #16]
-  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
- 80041f0:	230c      	movs	r3, #12
- 80041f2:	617b      	str	r3, [r7, #20]
-  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
- 80041f4:	1d3b      	adds	r3, r7, #4
- 80041f6:	4619      	mov	r1, r3
- 80041f8:	4825      	ldr	r0, [pc, #148]	; (8004290 <HAL_FMC_MspInit+0x10c>)
- 80041fa:	f001 fb79 	bl	80058f0 <HAL_GPIO_Init>
-
-  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_15|GPIO_PIN_10
- 80041fe:	f24c 7303 	movw	r3, #50947	; 0xc703
- 8004202:	607b      	str	r3, [r7, #4]
-                          |GPIO_PIN_14|GPIO_PIN_9|GPIO_PIN_8;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8004204:	2302      	movs	r3, #2
- 8004206:	60bb      	str	r3, [r7, #8]
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004208:	2300      	movs	r3, #0
- 800420a:	60fb      	str	r3, [r7, #12]
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 800420c:	2303      	movs	r3, #3
- 800420e:	613b      	str	r3, [r7, #16]
-  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
- 8004210:	230c      	movs	r3, #12
- 8004212:	617b      	str	r3, [r7, #20]
-  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
- 8004214:	1d3b      	adds	r3, r7, #4
- 8004216:	4619      	mov	r1, r3
- 8004218:	481e      	ldr	r0, [pc, #120]	; (8004294 <HAL_FMC_MspInit+0x110>)
- 800421a:	f001 fb69 	bl	80058f0 <HAL_GPIO_Init>
-
-  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
- 800421e:	f64f 033f 	movw	r3, #63551	; 0xf83f
- 8004222:	607b      	str	r3, [r7, #4]
-                          |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_15
-                          |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_11;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8004224:	2302      	movs	r3, #2
- 8004226:	60bb      	str	r3, [r7, #8]
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004228:	2300      	movs	r3, #0
- 800422a:	60fb      	str	r3, [r7, #12]
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 800422c:	2303      	movs	r3, #3
- 800422e:	613b      	str	r3, [r7, #16]
-  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
- 8004230:	230c      	movs	r3, #12
- 8004232:	617b      	str	r3, [r7, #20]
-  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 8004234:	1d3b      	adds	r3, r7, #4
- 8004236:	4619      	mov	r1, r3
- 8004238:	4817      	ldr	r0, [pc, #92]	; (8004298 <HAL_FMC_MspInit+0x114>)
- 800423a:	f001 fb59 	bl	80058f0 <HAL_GPIO_Init>
-
-  GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_3;
- 800423e:	2328      	movs	r3, #40	; 0x28
- 8004240:	607b      	str	r3, [r7, #4]
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8004242:	2302      	movs	r3, #2
- 8004244:	60bb      	str	r3, [r7, #8]
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004246:	2300      	movs	r3, #0
- 8004248:	60fb      	str	r3, [r7, #12]
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 800424a:	2303      	movs	r3, #3
- 800424c:	613b      	str	r3, [r7, #16]
-  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
- 800424e:	230c      	movs	r3, #12
- 8004250:	617b      	str	r3, [r7, #20]
-  HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
- 8004252:	1d3b      	adds	r3, r7, #4
- 8004254:	4619      	mov	r1, r3
- 8004256:	4811      	ldr	r0, [pc, #68]	; (800429c <HAL_FMC_MspInit+0x118>)
- 8004258:	f001 fb4a 	bl	80058f0 <HAL_GPIO_Init>
-
-  GPIO_InitStruct.Pin = GPIO_PIN_3;
- 800425c:	2308      	movs	r3, #8
- 800425e:	607b      	str	r3, [r7, #4]
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8004260:	2302      	movs	r3, #2
- 8004262:	60bb      	str	r3, [r7, #8]
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8004264:	2300      	movs	r3, #0
- 8004266:	60fb      	str	r3, [r7, #12]
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8004268:	2303      	movs	r3, #3
- 800426a:	613b      	str	r3, [r7, #16]
-  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
- 800426c:	230c      	movs	r3, #12
- 800426e:	617b      	str	r3, [r7, #20]
-  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 8004270:	1d3b      	adds	r3, r7, #4
- 8004272:	4619      	mov	r1, r3
- 8004274:	480a      	ldr	r0, [pc, #40]	; (80042a0 <HAL_FMC_MspInit+0x11c>)
- 8004276:	f001 fb3b 	bl	80058f0 <HAL_GPIO_Init>
- 800427a:	e000      	b.n	800427e <HAL_FMC_MspInit+0xfa>
-    return;
- 800427c:	bf00      	nop
-
-  /* USER CODE BEGIN FMC_MspInit 1 */
-
-  /* USER CODE END FMC_MspInit 1 */
-}
- 800427e:	3718      	adds	r7, #24
- 8004280:	46bd      	mov	sp, r7
- 8004282:	bd80      	pop	{r7, pc}
- 8004284:	200002ec 	.word	0x200002ec
- 8004288:	40023800 	.word	0x40023800
- 800428c:	40021000 	.word	0x40021000
- 8004290:	40021800 	.word	0x40021800
- 8004294:	40020c00 	.word	0x40020c00
- 8004298:	40021400 	.word	0x40021400
- 800429c:	40021c00 	.word	0x40021c00
- 80042a0:	40020800 	.word	0x40020800
-
-080042a4 <HAL_SDRAM_MspInit>:
-
-void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){
- 80042a4:	b580      	push	{r7, lr}
- 80042a6:	b082      	sub	sp, #8
- 80042a8:	af00      	add	r7, sp, #0
- 80042aa:	6078      	str	r0, [r7, #4]
-  /* USER CODE BEGIN SDRAM_MspInit 0 */
-
-  /* USER CODE END SDRAM_MspInit 0 */
-  HAL_FMC_MspInit();
- 80042ac:	f7ff ff6a 	bl	8004184 <HAL_FMC_MspInit>
-  /* USER CODE BEGIN SDRAM_MspInit 1 */
-
-  /* USER CODE END SDRAM_MspInit 1 */
-}
- 80042b0:	bf00      	nop
- 80042b2:	3708      	adds	r7, #8
- 80042b4:	46bd      	mov	sp, r7
- 80042b6:	bd80      	pop	{r7, pc}
-
-080042b8 <HAL_InitTick>:
-  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
-  * @param  TickPriority: Tick interrupt priority.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
-{
- 80042b8:	b580      	push	{r7, lr}
- 80042ba:	b08c      	sub	sp, #48	; 0x30
- 80042bc:	af00      	add	r7, sp, #0
- 80042be:	6078      	str	r0, [r7, #4]
-  RCC_ClkInitTypeDef    clkconfig;
-  uint32_t              uwTimclock = 0;
- 80042c0:	2300      	movs	r3, #0
- 80042c2:	62fb      	str	r3, [r7, #44]	; 0x2c
-  uint32_t              uwPrescalerValue = 0;
- 80042c4:	2300      	movs	r3, #0
- 80042c6:	62bb      	str	r3, [r7, #40]	; 0x28
-  uint32_t              pFLatency;
-  /*Configure the TIM6 IRQ priority */
-  HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0);
- 80042c8:	2200      	movs	r2, #0
- 80042ca:	6879      	ldr	r1, [r7, #4]
- 80042cc:	2036      	movs	r0, #54	; 0x36
- 80042ce:	f000 fdcf 	bl	8004e70 <HAL_NVIC_SetPriority>
-
-  /* Enable the TIM6 global Interrupt */
-  HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
- 80042d2:	2036      	movs	r0, #54	; 0x36
- 80042d4:	f000 fde8 	bl	8004ea8 <HAL_NVIC_EnableIRQ>
-  /* Enable TIM6 clock */
-  __HAL_RCC_TIM6_CLK_ENABLE();
- 80042d8:	4b1f      	ldr	r3, [pc, #124]	; (8004358 <HAL_InitTick+0xa0>)
- 80042da:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 80042dc:	4a1e      	ldr	r2, [pc, #120]	; (8004358 <HAL_InitTick+0xa0>)
- 80042de:	f043 0310 	orr.w	r3, r3, #16
- 80042e2:	6413      	str	r3, [r2, #64]	; 0x40
- 80042e4:	4b1c      	ldr	r3, [pc, #112]	; (8004358 <HAL_InitTick+0xa0>)
- 80042e6:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 80042e8:	f003 0310 	and.w	r3, r3, #16
- 80042ec:	60fb      	str	r3, [r7, #12]
- 80042ee:	68fb      	ldr	r3, [r7, #12]
-
-  /* Get clock configuration */
-  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
- 80042f0:	f107 0210 	add.w	r2, r7, #16
- 80042f4:	f107 0314 	add.w	r3, r7, #20
- 80042f8:	4611      	mov	r1, r2
- 80042fa:	4618      	mov	r0, r3
- 80042fc:	f003 fbdc 	bl	8007ab8 <HAL_RCC_GetClockConfig>
-
-  /* Compute TIM6 clock */
-  uwTimclock = 2*HAL_RCC_GetPCLK1Freq();
- 8004300:	f003 fbb2 	bl	8007a68 <HAL_RCC_GetPCLK1Freq>
- 8004304:	4603      	mov	r3, r0
- 8004306:	005b      	lsls	r3, r3, #1
- 8004308:	62fb      	str	r3, [r7, #44]	; 0x2c
-  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
-  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
- 800430a:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 800430c:	4a13      	ldr	r2, [pc, #76]	; (800435c <HAL_InitTick+0xa4>)
- 800430e:	fba2 2303 	umull	r2, r3, r2, r3
- 8004312:	0c9b      	lsrs	r3, r3, #18
- 8004314:	3b01      	subs	r3, #1
- 8004316:	62bb      	str	r3, [r7, #40]	; 0x28
-
-  /* Initialize TIM6 */
-  htim6.Instance = TIM6;
- 8004318:	4b11      	ldr	r3, [pc, #68]	; (8004360 <HAL_InitTick+0xa8>)
- 800431a:	4a12      	ldr	r2, [pc, #72]	; (8004364 <HAL_InitTick+0xac>)
- 800431c:	601a      	str	r2, [r3, #0]
-  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
-  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
-  + ClockDivision = 0
-  + Counter direction = Up
-  */
-  htim6.Init.Period = (1000000U / 1000U) - 1U;
- 800431e:	4b10      	ldr	r3, [pc, #64]	; (8004360 <HAL_InitTick+0xa8>)
- 8004320:	f240 32e7 	movw	r2, #999	; 0x3e7
- 8004324:	60da      	str	r2, [r3, #12]
-  htim6.Init.Prescaler = uwPrescalerValue;
- 8004326:	4a0e      	ldr	r2, [pc, #56]	; (8004360 <HAL_InitTick+0xa8>)
- 8004328:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 800432a:	6053      	str	r3, [r2, #4]
-  htim6.Init.ClockDivision = 0;
- 800432c:	4b0c      	ldr	r3, [pc, #48]	; (8004360 <HAL_InitTick+0xa8>)
- 800432e:	2200      	movs	r2, #0
- 8004330:	611a      	str	r2, [r3, #16]
-  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
- 8004332:	4b0b      	ldr	r3, [pc, #44]	; (8004360 <HAL_InitTick+0xa8>)
- 8004334:	2200      	movs	r2, #0
- 8004336:	609a      	str	r2, [r3, #8]
-  if(HAL_TIM_Base_Init(&htim6) == HAL_OK)
- 8004338:	4809      	ldr	r0, [pc, #36]	; (8004360 <HAL_InitTick+0xa8>)
- 800433a:	f004 fcb0 	bl	8008c9e <HAL_TIM_Base_Init>
- 800433e:	4603      	mov	r3, r0
- 8004340:	2b00      	cmp	r3, #0
- 8004342:	d104      	bne.n	800434e <HAL_InitTick+0x96>
-  {
-    /* Start the TIM time Base generation in interrupt mode */
-    return HAL_TIM_Base_Start_IT(&htim6);
- 8004344:	4806      	ldr	r0, [pc, #24]	; (8004360 <HAL_InitTick+0xa8>)
- 8004346:	f004 fcd5 	bl	8008cf4 <HAL_TIM_Base_Start_IT>
- 800434a:	4603      	mov	r3, r0
- 800434c:	e000      	b.n	8004350 <HAL_InitTick+0x98>
-  }
-
-  /* Return function status */
-  return HAL_ERROR;
- 800434e:	2301      	movs	r3, #1
-}
- 8004350:	4618      	mov	r0, r3
- 8004352:	3730      	adds	r7, #48	; 0x30
- 8004354:	46bd      	mov	sp, r7
- 8004356:	bd80      	pop	{r7, pc}
- 8004358:	40023800 	.word	0x40023800
- 800435c:	431bde83 	.word	0x431bde83
- 8004360:	20008ab4 	.word	0x20008ab4
- 8004364:	40001000 	.word	0x40001000
-
-08004368 <NMI_Handler>:
-/******************************************************************************/
-/**
-  * @brief This function handles Non maskable interrupt.
-  */
-void NMI_Handler(void)
-{
- 8004368:	b480      	push	{r7}
- 800436a:	af00      	add	r7, sp, #0
-  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
-
-  /* USER CODE END NonMaskableInt_IRQn 0 */
-  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
-  while (1)
- 800436c:	e7fe      	b.n	800436c <NMI_Handler+0x4>
-
-0800436e <HardFault_Handler>:
-
-/**
-  * @brief This function handles Hard fault interrupt.
-  */
-void HardFault_Handler(void)
-{
- 800436e:	b480      	push	{r7}
- 8004370:	af00      	add	r7, sp, #0
-  /* USER CODE BEGIN HardFault_IRQn 0 */
-
-  /* USER CODE END HardFault_IRQn 0 */
-  while (1)
- 8004372:	e7fe      	b.n	8004372 <HardFault_Handler+0x4>
-
-08004374 <MemManage_Handler>:
-
-/**
-  * @brief This function handles Memory management fault.
-  */
-void MemManage_Handler(void)
-{
- 8004374:	b480      	push	{r7}
- 8004376:	af00      	add	r7, sp, #0
-  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
-
-  /* USER CODE END MemoryManagement_IRQn 0 */
-  while (1)
- 8004378:	e7fe      	b.n	8004378 <MemManage_Handler+0x4>
-
-0800437a <BusFault_Handler>:
-
-/**
-  * @brief This function handles Pre-fetch fault, memory access fault.
-  */
-void BusFault_Handler(void)
-{
- 800437a:	b480      	push	{r7}
- 800437c:	af00      	add	r7, sp, #0
-  /* USER CODE BEGIN BusFault_IRQn 0 */
-
-  /* USER CODE END BusFault_IRQn 0 */
-  while (1)
- 800437e:	e7fe      	b.n	800437e <BusFault_Handler+0x4>
-
-08004380 <UsageFault_Handler>:
-
-/**
-  * @brief This function handles Undefined instruction or illegal state.
-  */
-void UsageFault_Handler(void)
-{
- 8004380:	b480      	push	{r7}
- 8004382:	af00      	add	r7, sp, #0
-  /* USER CODE BEGIN UsageFault_IRQn 0 */
-
-  /* USER CODE END UsageFault_IRQn 0 */
-  while (1)
- 8004384:	e7fe      	b.n	8004384 <UsageFault_Handler+0x4>
-
-08004386 <DebugMon_Handler>:
-
-/**
-  * @brief This function handles Debug monitor.
-  */
-void DebugMon_Handler(void)
-{
- 8004386:	b480      	push	{r7}
- 8004388:	af00      	add	r7, sp, #0
-
-  /* USER CODE END DebugMonitor_IRQn 0 */
-  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
-
-  /* USER CODE END DebugMonitor_IRQn 1 */
-}
- 800438a:	bf00      	nop
- 800438c:	46bd      	mov	sp, r7
- 800438e:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004392:	4770      	bx	lr
-
-08004394 <TIM6_DAC_IRQHandler>:
-
-/**
-  * @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
-  */
-void TIM6_DAC_IRQHandler(void)
-{
- 8004394:	b580      	push	{r7, lr}
- 8004396:	af00      	add	r7, sp, #0
-  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
-
-  /* USER CODE END TIM6_DAC_IRQn 0 */
-  HAL_DAC_IRQHandler(&hdac);
- 8004398:	4803      	ldr	r0, [pc, #12]	; (80043a8 <TIM6_DAC_IRQHandler+0x14>)
- 800439a:	f000 fdb5 	bl	8004f08 <HAL_DAC_IRQHandler>
-  HAL_TIM_IRQHandler(&htim6);
- 800439e:	4803      	ldr	r0, [pc, #12]	; (80043ac <TIM6_DAC_IRQHandler+0x18>)
- 80043a0:	f004 fd07 	bl	8008db2 <HAL_TIM_IRQHandler>
-  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
-
-  /* USER CODE END TIM6_DAC_IRQn 1 */
-}
- 80043a4:	bf00      	nop
- 80043a6:	bd80      	pop	{r7, pc}
- 80043a8:	20008830 	.word	0x20008830
- 80043ac:	20008ab4 	.word	0x20008ab4
-
-080043b0 <LTDC_IRQHandler>:
-
-/**
-  * @brief This function handles LTDC global interrupt.
-  */
-void LTDC_IRQHandler(void)
-{
- 80043b0:	b580      	push	{r7, lr}
- 80043b2:	af00      	add	r7, sp, #0
-  /* USER CODE BEGIN LTDC_IRQn 0 */
-
-  /* USER CODE END LTDC_IRQn 0 */
-  HAL_LTDC_IRQHandler(&hltdc);
- 80043b4:	4802      	ldr	r0, [pc, #8]	; (80043c0 <LTDC_IRQHandler+0x10>)
- 80043b6:	f002 fc01 	bl	8006bbc <HAL_LTDC_IRQHandler>
-  /* USER CODE BEGIN LTDC_IRQn 1 */
-
-  /* USER CODE END LTDC_IRQn 1 */
-}
- 80043ba:	bf00      	nop
- 80043bc:	bd80      	pop	{r7, pc}
- 80043be:	bf00      	nop
- 80043c0:	20008678 	.word	0x20008678
-
-080043c4 <_sbrk>:
- *
- * @param incr Memory size
- * @return Pointer to allocated memory
- */
-void *_sbrk(ptrdiff_t incr)
-{
- 80043c4:	b580      	push	{r7, lr}
- 80043c6:	b086      	sub	sp, #24
- 80043c8:	af00      	add	r7, sp, #0
- 80043ca:	6078      	str	r0, [r7, #4]
-  extern uint8_t _end; /* Symbol defined in the linker script */
-  extern uint8_t _estack; /* Symbol defined in the linker script */
-  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
-  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
- 80043cc:	4a14      	ldr	r2, [pc, #80]	; (8004420 <_sbrk+0x5c>)
- 80043ce:	4b15      	ldr	r3, [pc, #84]	; (8004424 <_sbrk+0x60>)
- 80043d0:	1ad3      	subs	r3, r2, r3
- 80043d2:	617b      	str	r3, [r7, #20]
-  const uint8_t *max_heap = (uint8_t *)stack_limit;
- 80043d4:	697b      	ldr	r3, [r7, #20]
- 80043d6:	613b      	str	r3, [r7, #16]
-  uint8_t *prev_heap_end;
-
-  /* Initialize heap end at first call */
-  if (NULL == __sbrk_heap_end)
- 80043d8:	4b13      	ldr	r3, [pc, #76]	; (8004428 <_sbrk+0x64>)
- 80043da:	681b      	ldr	r3, [r3, #0]
- 80043dc:	2b00      	cmp	r3, #0
- 80043de:	d102      	bne.n	80043e6 <_sbrk+0x22>
-  {
-    __sbrk_heap_end = &_end;
- 80043e0:	4b11      	ldr	r3, [pc, #68]	; (8004428 <_sbrk+0x64>)
- 80043e2:	4a12      	ldr	r2, [pc, #72]	; (800442c <_sbrk+0x68>)
- 80043e4:	601a      	str	r2, [r3, #0]
-  }
-
-  /* Protect heap from growing into the reserved MSP stack */
-  if (__sbrk_heap_end + incr > max_heap)
- 80043e6:	4b10      	ldr	r3, [pc, #64]	; (8004428 <_sbrk+0x64>)
- 80043e8:	681a      	ldr	r2, [r3, #0]
- 80043ea:	687b      	ldr	r3, [r7, #4]
- 80043ec:	4413      	add	r3, r2
- 80043ee:	693a      	ldr	r2, [r7, #16]
- 80043f0:	429a      	cmp	r2, r3
- 80043f2:	d207      	bcs.n	8004404 <_sbrk+0x40>
-  {
-    errno = ENOMEM;
- 80043f4:	f007 fbae 	bl	800bb54 <__errno>
- 80043f8:	4602      	mov	r2, r0
- 80043fa:	230c      	movs	r3, #12
- 80043fc:	6013      	str	r3, [r2, #0]
-    return (void *)-1;
- 80043fe:	f04f 33ff 	mov.w	r3, #4294967295	; 0xffffffff
- 8004402:	e009      	b.n	8004418 <_sbrk+0x54>
-  }
-
-  prev_heap_end = __sbrk_heap_end;
- 8004404:	4b08      	ldr	r3, [pc, #32]	; (8004428 <_sbrk+0x64>)
- 8004406:	681b      	ldr	r3, [r3, #0]
- 8004408:	60fb      	str	r3, [r7, #12]
-  __sbrk_heap_end += incr;
- 800440a:	4b07      	ldr	r3, [pc, #28]	; (8004428 <_sbrk+0x64>)
- 800440c:	681a      	ldr	r2, [r3, #0]
- 800440e:	687b      	ldr	r3, [r7, #4]
- 8004410:	4413      	add	r3, r2
- 8004412:	4a05      	ldr	r2, [pc, #20]	; (8004428 <_sbrk+0x64>)
- 8004414:	6013      	str	r3, [r2, #0]
-
-  return (void *)prev_heap_end;
- 8004416:	68fb      	ldr	r3, [r7, #12]
-}
- 8004418:	4618      	mov	r0, r3
- 800441a:	3718      	adds	r7, #24
- 800441c:	46bd      	mov	sp, r7
- 800441e:	bd80      	pop	{r7, pc}
- 8004420:	20050000 	.word	0x20050000
- 8004424:	00000400 	.word	0x00000400
- 8004428:	200002f0 	.word	0x200002f0
- 800442c:	20008b00 	.word	0x20008b00
-
-08004430 <SystemInit>:
-  *         SystemFrequency variable.
-  * @param  None
-  * @retval None
-  */
-void SystemInit(void)
-{
- 8004430:	b480      	push	{r7}
- 8004432:	af00      	add	r7, sp, #0
-  /* FPU settings ------------------------------------------------------------*/
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-  SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
- 8004434:	4b08      	ldr	r3, [pc, #32]	; (8004458 <SystemInit+0x28>)
- 8004436:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
- 800443a:	4a07      	ldr	r2, [pc, #28]	; (8004458 <SystemInit+0x28>)
- 800443c:	f443 0370 	orr.w	r3, r3, #15728640	; 0xf00000
- 8004440:	f8c2 3088 	str.w	r3, [r2, #136]	; 0x88
-
-  /* Configure the Vector Table location add offset address ------------------*/
-#ifdef VECT_TAB_SRAM
-  SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
- 8004444:	4b04      	ldr	r3, [pc, #16]	; (8004458 <SystemInit+0x28>)
- 8004446:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
- 800444a:	609a      	str	r2, [r3, #8]
-#endif
-}
- 800444c:	bf00      	nop
- 800444e:	46bd      	mov	sp, r7
- 8004450:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004454:	4770      	bx	lr
- 8004456:	bf00      	nop
- 8004458:	e000ed00 	.word	0xe000ed00
-
-0800445c <Reset_Handler>:
-
-    .section  .text.Reset_Handler
-  .weak  Reset_Handler
-  .type  Reset_Handler, %function
-Reset_Handler:  
-  ldr   sp, =_estack      /* set stack pointer */
- 800445c:	f8df d034 	ldr.w	sp, [pc, #52]	; 8004494 <LoopFillZerobss+0x14>
-
-/* Copy the data segment initializers from flash to SRAM */  
-  movs  r1, #0
- 8004460:	2100      	movs	r1, #0
-  b  LoopCopyDataInit
- 8004462:	e003      	b.n	800446c <LoopCopyDataInit>
-
-08004464 <CopyDataInit>:
-
-CopyDataInit:
-  ldr  r3, =_sidata
- 8004464:	4b0c      	ldr	r3, [pc, #48]	; (8004498 <LoopFillZerobss+0x18>)
-  ldr  r3, [r3, r1]
- 8004466:	585b      	ldr	r3, [r3, r1]
-  str  r3, [r0, r1]
- 8004468:	5043      	str	r3, [r0, r1]
-  adds  r1, r1, #4
- 800446a:	3104      	adds	r1, #4
-
-0800446c <LoopCopyDataInit>:
-    
-LoopCopyDataInit:
-  ldr  r0, =_sdata
- 800446c:	480b      	ldr	r0, [pc, #44]	; (800449c <LoopFillZerobss+0x1c>)
-  ldr  r3, =_edata
- 800446e:	4b0c      	ldr	r3, [pc, #48]	; (80044a0 <LoopFillZerobss+0x20>)
-  adds  r2, r0, r1
- 8004470:	1842      	adds	r2, r0, r1
-  cmp  r2, r3
- 8004472:	429a      	cmp	r2, r3
-  bcc  CopyDataInit
- 8004474:	d3f6      	bcc.n	8004464 <CopyDataInit>
-  ldr  r2, =_sbss
- 8004476:	4a0b      	ldr	r2, [pc, #44]	; (80044a4 <LoopFillZerobss+0x24>)
-  b  LoopFillZerobss
- 8004478:	e002      	b.n	8004480 <LoopFillZerobss>
-
-0800447a <FillZerobss>:
-/* Zero fill the bss segment. */  
-FillZerobss:
-  movs  r3, #0
- 800447a:	2300      	movs	r3, #0
-  str  r3, [r2], #4
- 800447c:	f842 3b04 	str.w	r3, [r2], #4
-
-08004480 <LoopFillZerobss>:
-    
-LoopFillZerobss:
-  ldr  r3, = _ebss
- 8004480:	4b09      	ldr	r3, [pc, #36]	; (80044a8 <LoopFillZerobss+0x28>)
-  cmp  r2, r3
- 8004482:	429a      	cmp	r2, r3
-  bcc  FillZerobss
- 8004484:	d3f9      	bcc.n	800447a <FillZerobss>
-
-/* Call the clock system initialization function.*/
-  bl  SystemInit   
- 8004486:	f7ff ffd3 	bl	8004430 <SystemInit>
-/* Call static constructors */
-    bl __libc_init_array
- 800448a:	f007 fb69 	bl	800bb60 <__libc_init_array>
-/* Call the application's entry point.*/
-  bl  main
- 800448e:	f7fc fb43 	bl	8000b18 <main>
-  bx  lr    
- 8004492:	4770      	bx	lr
-  ldr   sp, =_estack      /* set stack pointer */
- 8004494:	20050000 	.word	0x20050000
-  ldr  r3, =_sidata
- 8004498:	0800e3d4 	.word	0x0800e3d4
-  ldr  r0, =_sdata
- 800449c:	20000000 	.word	0x20000000
-  ldr  r3, =_edata
- 80044a0:	200000b0 	.word	0x200000b0
-  ldr  r2, =_sbss
- 80044a4:	200000b0 	.word	0x200000b0
-  ldr  r3, = _ebss
- 80044a8:	20008afc 	.word	0x20008afc
-
-080044ac <ADC_IRQHandler>:
- * @retval None       
-*/
-    .section  .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b  Infinite_Loop
- 80044ac:	e7fe      	b.n	80044ac <ADC_IRQHandler>
-
-080044ae <HAL_Init>:
-  *         need to ensure that the SysTick time base is always set to 1 millisecond
-  *         to have correct HAL operation.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_Init(void)
-{
- 80044ae:	b580      	push	{r7, lr}
- 80044b0:	af00      	add	r7, sp, #0
-#if (PREFETCH_ENABLE != 0U)
-  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
-#endif /* PREFETCH_ENABLE */
-
-  /* Set Interrupt Group Priority */
-  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
- 80044b2:	2003      	movs	r0, #3
- 80044b4:	f000 fcd1 	bl	8004e5a <HAL_NVIC_SetPriorityGrouping>
-
-  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
-  HAL_InitTick(TICK_INT_PRIORITY);
- 80044b8:	2000      	movs	r0, #0
- 80044ba:	f7ff fefd 	bl	80042b8 <HAL_InitTick>
-  
-  /* Init the low level hardware */
-  HAL_MspInit();
- 80044be:	f7ff f9c9 	bl	8003854 <HAL_MspInit>
-  
-  /* Return function status */
-  return HAL_OK;
- 80044c2:	2300      	movs	r3, #0
-}
- 80044c4:	4618      	mov	r0, r3
- 80044c6:	bd80      	pop	{r7, pc}
-
-080044c8 <HAL_IncTick>:
- * @note This function is declared as __weak to be overwritten in case of other 
-  *      implementations in user file.
-  * @retval None
-  */
-__weak void HAL_IncTick(void)
-{
- 80044c8:	b480      	push	{r7}
- 80044ca:	af00      	add	r7, sp, #0
-  uwTick += uwTickFreq;
- 80044cc:	4b06      	ldr	r3, [pc, #24]	; (80044e8 <HAL_IncTick+0x20>)
- 80044ce:	781b      	ldrb	r3, [r3, #0]
- 80044d0:	461a      	mov	r2, r3
- 80044d2:	4b06      	ldr	r3, [pc, #24]	; (80044ec <HAL_IncTick+0x24>)
- 80044d4:	681b      	ldr	r3, [r3, #0]
- 80044d6:	4413      	add	r3, r2
- 80044d8:	4a04      	ldr	r2, [pc, #16]	; (80044ec <HAL_IncTick+0x24>)
- 80044da:	6013      	str	r3, [r2, #0]
-}
- 80044dc:	bf00      	nop
- 80044de:	46bd      	mov	sp, r7
- 80044e0:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80044e4:	4770      	bx	lr
- 80044e6:	bf00      	nop
- 80044e8:	20000044 	.word	0x20000044
- 80044ec:	20008af4 	.word	0x20008af4
-
-080044f0 <HAL_GetTick>:
-  * @note This function is declared as __weak to be overwritten in case of other 
-  *       implementations in user file.
-  * @retval tick value
-  */
-__weak uint32_t HAL_GetTick(void)
-{
- 80044f0:	b480      	push	{r7}
- 80044f2:	af00      	add	r7, sp, #0
-  return uwTick;
- 80044f4:	4b03      	ldr	r3, [pc, #12]	; (8004504 <HAL_GetTick+0x14>)
- 80044f6:	681b      	ldr	r3, [r3, #0]
-}
- 80044f8:	4618      	mov	r0, r3
- 80044fa:	46bd      	mov	sp, r7
- 80044fc:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004500:	4770      	bx	lr
- 8004502:	bf00      	nop
- 8004504:	20008af4 	.word	0x20008af4
-
-08004508 <HAL_Delay>:
-  *       implementations in user file.
-  * @param Delay  specifies the delay time length, in milliseconds.
-  * @retval None
-  */
-__weak void HAL_Delay(uint32_t Delay)
-{
- 8004508:	b580      	push	{r7, lr}
- 800450a:	b084      	sub	sp, #16
- 800450c:	af00      	add	r7, sp, #0
- 800450e:	6078      	str	r0, [r7, #4]
-  uint32_t tickstart = HAL_GetTick();
- 8004510:	f7ff ffee 	bl	80044f0 <HAL_GetTick>
- 8004514:	60b8      	str	r0, [r7, #8]
-  uint32_t wait = Delay;
- 8004516:	687b      	ldr	r3, [r7, #4]
- 8004518:	60fb      	str	r3, [r7, #12]
-
-  /* Add a freq to guarantee minimum wait */
-  if (wait < HAL_MAX_DELAY)
- 800451a:	68fb      	ldr	r3, [r7, #12]
- 800451c:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
- 8004520:	d005      	beq.n	800452e <HAL_Delay+0x26>
-  {
-    wait += (uint32_t)(uwTickFreq);
- 8004522:	4b09      	ldr	r3, [pc, #36]	; (8004548 <HAL_Delay+0x40>)
- 8004524:	781b      	ldrb	r3, [r3, #0]
- 8004526:	461a      	mov	r2, r3
- 8004528:	68fb      	ldr	r3, [r7, #12]
- 800452a:	4413      	add	r3, r2
- 800452c:	60fb      	str	r3, [r7, #12]
-  }
-
-  while ((HAL_GetTick() - tickstart) < wait)
- 800452e:	bf00      	nop
- 8004530:	f7ff ffde 	bl	80044f0 <HAL_GetTick>
- 8004534:	4602      	mov	r2, r0
- 8004536:	68bb      	ldr	r3, [r7, #8]
- 8004538:	1ad3      	subs	r3, r2, r3
- 800453a:	68fa      	ldr	r2, [r7, #12]
- 800453c:	429a      	cmp	r2, r3
- 800453e:	d8f7      	bhi.n	8004530 <HAL_Delay+0x28>
-  {
-  }
-}
- 8004540:	bf00      	nop
- 8004542:	3710      	adds	r7, #16
- 8004544:	46bd      	mov	sp, r7
- 8004546:	bd80      	pop	{r7, pc}
- 8004548:	20000044 	.word	0x20000044
-
-0800454c <HAL_ADC_Init>:
-  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
-  *         the configuration information for the specified ADC.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
-{
- 800454c:	b580      	push	{r7, lr}
- 800454e:	b084      	sub	sp, #16
- 8004550:	af00      	add	r7, sp, #0
- 8004552:	6078      	str	r0, [r7, #4]
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
- 8004554:	2300      	movs	r3, #0
- 8004556:	73fb      	strb	r3, [r7, #15]
-  
-  /* Check ADC handle */
-  if(hadc == NULL)
- 8004558:	687b      	ldr	r3, [r7, #4]
- 800455a:	2b00      	cmp	r3, #0
- 800455c:	d101      	bne.n	8004562 <HAL_ADC_Init+0x16>
-  {
-    return HAL_ERROR;
- 800455e:	2301      	movs	r3, #1
- 8004560:	e031      	b.n	80045c6 <HAL_ADC_Init+0x7a>
-  if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
-  {
-    assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
-  }
-
-  if(hadc->State == HAL_ADC_STATE_RESET)
- 8004562:	687b      	ldr	r3, [r7, #4]
- 8004564:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8004566:	2b00      	cmp	r3, #0
- 8004568:	d109      	bne.n	800457e <HAL_ADC_Init+0x32>
-
-    /* Init the low level hardware */
-    hadc->MspInitCallback(hadc);
-#else
-    /* Init the low level hardware */
-    HAL_ADC_MspInit(hadc);
- 800456a:	6878      	ldr	r0, [r7, #4]
- 800456c:	f7ff f99a 	bl	80038a4 <HAL_ADC_MspInit>
-#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
-
-    /* Initialize ADC error code */
-    ADC_CLEAR_ERRORCODE(hadc);
- 8004570:	687b      	ldr	r3, [r7, #4]
- 8004572:	2200      	movs	r2, #0
- 8004574:	645a      	str	r2, [r3, #68]	; 0x44
-    
-    /* Allocate lock resource and initialize it */
-    hadc->Lock = HAL_UNLOCKED;
- 8004576:	687b      	ldr	r3, [r7, #4]
- 8004578:	2200      	movs	r2, #0
- 800457a:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-  }
-  
-  /* Configuration of ADC parameters if previous preliminary actions are      */ 
-  /* correctly completed.                                                     */
-  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
- 800457e:	687b      	ldr	r3, [r7, #4]
- 8004580:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8004582:	f003 0310 	and.w	r3, r3, #16
- 8004586:	2b00      	cmp	r3, #0
- 8004588:	d116      	bne.n	80045b8 <HAL_ADC_Init+0x6c>
-  {
-    /* Set ADC state */
-    ADC_STATE_CLR_SET(hadc->State,
- 800458a:	687b      	ldr	r3, [r7, #4]
- 800458c:	6c1a      	ldr	r2, [r3, #64]	; 0x40
- 800458e:	4b10      	ldr	r3, [pc, #64]	; (80045d0 <HAL_ADC_Init+0x84>)
- 8004590:	4013      	ands	r3, r2
- 8004592:	f043 0202 	orr.w	r2, r3, #2
- 8004596:	687b      	ldr	r3, [r7, #4]
- 8004598:	641a      	str	r2, [r3, #64]	; 0x40
-                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
-                      HAL_ADC_STATE_BUSY_INTERNAL);
-    
-    /* Set ADC parameters */
-    ADC_Init(hadc);
- 800459a:	6878      	ldr	r0, [r7, #4]
- 800459c:	f000 fab6 	bl	8004b0c <ADC_Init>
-    
-    /* Set ADC error code to none */
-    ADC_CLEAR_ERRORCODE(hadc);
- 80045a0:	687b      	ldr	r3, [r7, #4]
- 80045a2:	2200      	movs	r2, #0
- 80045a4:	645a      	str	r2, [r3, #68]	; 0x44
-    
-    /* Set the ADC state */
-    ADC_STATE_CLR_SET(hadc->State,
- 80045a6:	687b      	ldr	r3, [r7, #4]
- 80045a8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 80045aa:	f023 0303 	bic.w	r3, r3, #3
- 80045ae:	f043 0201 	orr.w	r2, r3, #1
- 80045b2:	687b      	ldr	r3, [r7, #4]
- 80045b4:	641a      	str	r2, [r3, #64]	; 0x40
- 80045b6:	e001      	b.n	80045bc <HAL_ADC_Init+0x70>
-                      HAL_ADC_STATE_BUSY_INTERNAL,
-                      HAL_ADC_STATE_READY);
-  }
-  else
-  {
-    tmp_hal_status = HAL_ERROR;
- 80045b8:	2301      	movs	r3, #1
- 80045ba:	73fb      	strb	r3, [r7, #15]
-  }
-  
-  /* Release Lock */
-  __HAL_UNLOCK(hadc);
- 80045bc:	687b      	ldr	r3, [r7, #4]
- 80045be:	2200      	movs	r2, #0
- 80045c0:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-
-  /* Return function status */
-  return tmp_hal_status;
- 80045c4:	7bfb      	ldrb	r3, [r7, #15]
-}
- 80045c6:	4618      	mov	r0, r3
- 80045c8:	3710      	adds	r7, #16
- 80045ca:	46bd      	mov	sp, r7
- 80045cc:	bd80      	pop	{r7, pc}
- 80045ce:	bf00      	nop
- 80045d0:	ffffeefd 	.word	0xffffeefd
-
-080045d4 <HAL_ADC_Start>:
-  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
-  *         the configuration information for the specified ADC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
-{
- 80045d4:	b480      	push	{r7}
- 80045d6:	b085      	sub	sp, #20
- 80045d8:	af00      	add	r7, sp, #0
- 80045da:	6078      	str	r0, [r7, #4]
-  __IO uint32_t counter = 0;
- 80045dc:	2300      	movs	r3, #0
- 80045de:	60fb      	str	r3, [r7, #12]
-  /* Check the parameters */
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
-  assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); 
-  
-  /* Process locked */
-  __HAL_LOCK(hadc);
- 80045e0:	687b      	ldr	r3, [r7, #4]
- 80045e2:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
- 80045e6:	2b01      	cmp	r3, #1
- 80045e8:	d101      	bne.n	80045ee <HAL_ADC_Start+0x1a>
- 80045ea:	2302      	movs	r3, #2
- 80045ec:	e0a0      	b.n	8004730 <HAL_ADC_Start+0x15c>
- 80045ee:	687b      	ldr	r3, [r7, #4]
- 80045f0:	2201      	movs	r2, #1
- 80045f2:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-  
-  /* Enable the ADC peripheral */
-  /* Check if ADC peripheral is disabled in order to enable it and wait during 
-  Tstab time the ADC's stabilization */
-  if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
- 80045f6:	687b      	ldr	r3, [r7, #4]
- 80045f8:	681b      	ldr	r3, [r3, #0]
- 80045fa:	689b      	ldr	r3, [r3, #8]
- 80045fc:	f003 0301 	and.w	r3, r3, #1
- 8004600:	2b01      	cmp	r3, #1
- 8004602:	d018      	beq.n	8004636 <HAL_ADC_Start+0x62>
-  {  
-    /* Enable the Peripheral */
-    __HAL_ADC_ENABLE(hadc);
- 8004604:	687b      	ldr	r3, [r7, #4]
- 8004606:	681b      	ldr	r3, [r3, #0]
- 8004608:	689a      	ldr	r2, [r3, #8]
- 800460a:	687b      	ldr	r3, [r7, #4]
- 800460c:	681b      	ldr	r3, [r3, #0]
- 800460e:	f042 0201 	orr.w	r2, r2, #1
- 8004612:	609a      	str	r2, [r3, #8]
-    
-    /* Delay for ADC stabilization time */
-    /* Compute number of CPU cycles to wait for */
-    counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
- 8004614:	4b49      	ldr	r3, [pc, #292]	; (800473c <HAL_ADC_Start+0x168>)
- 8004616:	681b      	ldr	r3, [r3, #0]
- 8004618:	4a49      	ldr	r2, [pc, #292]	; (8004740 <HAL_ADC_Start+0x16c>)
- 800461a:	fba2 2303 	umull	r2, r3, r2, r3
- 800461e:	0c9a      	lsrs	r2, r3, #18
- 8004620:	4613      	mov	r3, r2
- 8004622:	005b      	lsls	r3, r3, #1
- 8004624:	4413      	add	r3, r2
- 8004626:	60fb      	str	r3, [r7, #12]
-    while(counter != 0)
- 8004628:	e002      	b.n	8004630 <HAL_ADC_Start+0x5c>
-    {
-      counter--;
- 800462a:	68fb      	ldr	r3, [r7, #12]
- 800462c:	3b01      	subs	r3, #1
- 800462e:	60fb      	str	r3, [r7, #12]
-    while(counter != 0)
- 8004630:	68fb      	ldr	r3, [r7, #12]
- 8004632:	2b00      	cmp	r3, #0
- 8004634:	d1f9      	bne.n	800462a <HAL_ADC_Start+0x56>
-    }
-  }
-  
-  /* Start conversion if ADC is effectively enabled */
-  if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
- 8004636:	687b      	ldr	r3, [r7, #4]
- 8004638:	681b      	ldr	r3, [r3, #0]
- 800463a:	689b      	ldr	r3, [r3, #8]
- 800463c:	f003 0301 	and.w	r3, r3, #1
- 8004640:	2b01      	cmp	r3, #1
- 8004642:	d174      	bne.n	800472e <HAL_ADC_Start+0x15a>
-  {
-    /* Set ADC state                                                          */
-    /* - Clear state bitfield related to regular group conversion results     */
-    /* - Set state bitfield related to regular group operation                */
-    ADC_STATE_CLR_SET(hadc->State,
- 8004644:	687b      	ldr	r3, [r7, #4]
- 8004646:	6c1a      	ldr	r2, [r3, #64]	; 0x40
- 8004648:	4b3e      	ldr	r3, [pc, #248]	; (8004744 <HAL_ADC_Start+0x170>)
- 800464a:	4013      	ands	r3, r2
- 800464c:	f443 7280 	orr.w	r2, r3, #256	; 0x100
- 8004650:	687b      	ldr	r3, [r7, #4]
- 8004652:	641a      	str	r2, [r3, #64]	; 0x40
-                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
-                      HAL_ADC_STATE_REG_BUSY);
-    
-    /* If conversions on group regular are also triggering group injected,    */
-    /* update ADC state.                                                      */
-    if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
- 8004654:	687b      	ldr	r3, [r7, #4]
- 8004656:	681b      	ldr	r3, [r3, #0]
- 8004658:	685b      	ldr	r3, [r3, #4]
- 800465a:	f403 6380 	and.w	r3, r3, #1024	; 0x400
- 800465e:	2b00      	cmp	r3, #0
- 8004660:	d007      	beq.n	8004672 <HAL_ADC_Start+0x9e>
-    {
-      ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
- 8004662:	687b      	ldr	r3, [r7, #4]
- 8004664:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8004666:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
- 800466a:	f443 5280 	orr.w	r2, r3, #4096	; 0x1000
- 800466e:	687b      	ldr	r3, [r7, #4]
- 8004670:	641a      	str	r2, [r3, #64]	; 0x40
-    }
-    
-    /* State machine update: Check if an injected conversion is ongoing */
-    if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
- 8004672:	687b      	ldr	r3, [r7, #4]
- 8004674:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8004676:	f403 5380 	and.w	r3, r3, #4096	; 0x1000
- 800467a:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
- 800467e:	d106      	bne.n	800468e <HAL_ADC_Start+0xba>
-    {
-      /* Reset ADC error code fields related to conversions on group regular */
-      CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));         
- 8004680:	687b      	ldr	r3, [r7, #4]
- 8004682:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8004684:	f023 0206 	bic.w	r2, r3, #6
- 8004688:	687b      	ldr	r3, [r7, #4]
- 800468a:	645a      	str	r2, [r3, #68]	; 0x44
- 800468c:	e002      	b.n	8004694 <HAL_ADC_Start+0xc0>
-    }
-    else
-    {
-      /* Reset ADC all error code fields */
-      ADC_CLEAR_ERRORCODE(hadc);
- 800468e:	687b      	ldr	r3, [r7, #4]
- 8004690:	2200      	movs	r2, #0
- 8004692:	645a      	str	r2, [r3, #68]	; 0x44
-    }
-    
-    /* Process unlocked */
-    /* Unlock before starting ADC conversions: in case of potential           */
-    /* interruption, to let the process to ADC IRQ Handler.                   */
-    __HAL_UNLOCK(hadc);
- 8004694:	687b      	ldr	r3, [r7, #4]
- 8004696:	2200      	movs	r2, #0
- 8004698:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-    
-    /* Clear regular group conversion flag and overrun flag */
-    /* (To ensure of no unknown state from potential previous ADC operations) */
-    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC | ADC_FLAG_OVR);
- 800469c:	687b      	ldr	r3, [r7, #4]
- 800469e:	681b      	ldr	r3, [r3, #0]
- 80046a0:	f06f 0222 	mvn.w	r2, #34	; 0x22
- 80046a4:	601a      	str	r2, [r3, #0]
-    
-    /* Check if Multimode enabled */
-    if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
- 80046a6:	4b28      	ldr	r3, [pc, #160]	; (8004748 <HAL_ADC_Start+0x174>)
- 80046a8:	685b      	ldr	r3, [r3, #4]
- 80046aa:	f003 031f 	and.w	r3, r3, #31
- 80046ae:	2b00      	cmp	r3, #0
- 80046b0:	d10f      	bne.n	80046d2 <HAL_ADC_Start+0xfe>
-    {
-      /* if no external trigger present enable software conversion of regular channels */
-      if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET) 
- 80046b2:	687b      	ldr	r3, [r7, #4]
- 80046b4:	681b      	ldr	r3, [r3, #0]
- 80046b6:	689b      	ldr	r3, [r3, #8]
- 80046b8:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
- 80046bc:	2b00      	cmp	r3, #0
- 80046be:	d136      	bne.n	800472e <HAL_ADC_Start+0x15a>
-      {
-        /* Enable the selected ADC software conversion for regular group */
-        hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
- 80046c0:	687b      	ldr	r3, [r7, #4]
- 80046c2:	681b      	ldr	r3, [r3, #0]
- 80046c4:	689a      	ldr	r2, [r3, #8]
- 80046c6:	687b      	ldr	r3, [r7, #4]
- 80046c8:	681b      	ldr	r3, [r3, #0]
- 80046ca:	f042 4280 	orr.w	r2, r2, #1073741824	; 0x40000000
- 80046ce:	609a      	str	r2, [r3, #8]
- 80046d0:	e02d      	b.n	800472e <HAL_ADC_Start+0x15a>
-      }
-    }
-    else
-    {
-      /* if instance of handle correspond to ADC1 and  no external trigger present enable software conversion of regular channels */
-      if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
- 80046d2:	687b      	ldr	r3, [r7, #4]
- 80046d4:	681b      	ldr	r3, [r3, #0]
- 80046d6:	4a1d      	ldr	r2, [pc, #116]	; (800474c <HAL_ADC_Start+0x178>)
- 80046d8:	4293      	cmp	r3, r2
- 80046da:	d10e      	bne.n	80046fa <HAL_ADC_Start+0x126>
- 80046dc:	687b      	ldr	r3, [r7, #4]
- 80046de:	681b      	ldr	r3, [r3, #0]
- 80046e0:	689b      	ldr	r3, [r3, #8]
- 80046e2:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
- 80046e6:	2b00      	cmp	r3, #0
- 80046e8:	d107      	bne.n	80046fa <HAL_ADC_Start+0x126>
-      {
-        /* Enable the selected ADC software conversion for regular group */
-          hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
- 80046ea:	687b      	ldr	r3, [r7, #4]
- 80046ec:	681b      	ldr	r3, [r3, #0]
- 80046ee:	689a      	ldr	r2, [r3, #8]
- 80046f0:	687b      	ldr	r3, [r7, #4]
- 80046f2:	681b      	ldr	r3, [r3, #0]
- 80046f4:	f042 4280 	orr.w	r2, r2, #1073741824	; 0x40000000
- 80046f8:	609a      	str	r2, [r3, #8]
-      }
-
-      /* if dual mode is selected, ADC3 works independently. */
-      /* check if the mode selected is not triple */
-      if( HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI_4) )
- 80046fa:	4b13      	ldr	r3, [pc, #76]	; (8004748 <HAL_ADC_Start+0x174>)
- 80046fc:	685b      	ldr	r3, [r3, #4]
- 80046fe:	f003 0310 	and.w	r3, r3, #16
- 8004702:	2b00      	cmp	r3, #0
- 8004704:	d113      	bne.n	800472e <HAL_ADC_Start+0x15a>
-      {
-        /* if instance of handle correspond to ADC3 and no external trigger present enable software conversion of regular channels */
-        if((hadc->Instance == ADC3) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
- 8004706:	687b      	ldr	r3, [r7, #4]
- 8004708:	681b      	ldr	r3, [r3, #0]
- 800470a:	4a11      	ldr	r2, [pc, #68]	; (8004750 <HAL_ADC_Start+0x17c>)
- 800470c:	4293      	cmp	r3, r2
- 800470e:	d10e      	bne.n	800472e <HAL_ADC_Start+0x15a>
- 8004710:	687b      	ldr	r3, [r7, #4]
- 8004712:	681b      	ldr	r3, [r3, #0]
- 8004714:	689b      	ldr	r3, [r3, #8]
- 8004716:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
- 800471a:	2b00      	cmp	r3, #0
- 800471c:	d107      	bne.n	800472e <HAL_ADC_Start+0x15a>
-        {
-          /* Enable the selected ADC software conversion for regular group */
-          hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
- 800471e:	687b      	ldr	r3, [r7, #4]
- 8004720:	681b      	ldr	r3, [r3, #0]
- 8004722:	689a      	ldr	r2, [r3, #8]
- 8004724:	687b      	ldr	r3, [r7, #4]
- 8004726:	681b      	ldr	r3, [r3, #0]
- 8004728:	f042 4280 	orr.w	r2, r2, #1073741824	; 0x40000000
- 800472c:	609a      	str	r2, [r3, #8]
-      }
-    }
-  }
-  
-  /* Return function status */
-  return HAL_OK;
- 800472e:	2300      	movs	r3, #0
-}
- 8004730:	4618      	mov	r0, r3
- 8004732:	3714      	adds	r7, #20
- 8004734:	46bd      	mov	sp, r7
- 8004736:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800473a:	4770      	bx	lr
- 800473c:	2000003c 	.word	0x2000003c
- 8004740:	431bde83 	.word	0x431bde83
- 8004744:	fffff8fe 	.word	0xfffff8fe
- 8004748:	40012300 	.word	0x40012300
- 800474c:	40012000 	.word	0x40012000
- 8004750:	40012200 	.word	0x40012200
-
-08004754 <HAL_ADC_PollForConversion>:
-  *         the configuration information for the specified ADC.
-  * @param  Timeout Timeout value in millisecond.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
-{
- 8004754:	b580      	push	{r7, lr}
- 8004756:	b084      	sub	sp, #16
- 8004758:	af00      	add	r7, sp, #0
- 800475a:	6078      	str	r0, [r7, #4]
- 800475c:	6039      	str	r1, [r7, #0]
-  uint32_t tickstart = 0;
- 800475e:	2300      	movs	r3, #0
- 8004760:	60fb      	str	r3, [r7, #12]
-  /* each conversion:                                                       */
-  /* Particular case is ADC configured in DMA mode and ADC sequencer with   */
-  /* several ranks and polling for end of each conversion.                  */
-  /* For code simplicity sake, this particular case is generalized to       */
-  /* ADC configured in DMA mode and polling for end of each conversion.     */
-  if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
- 8004762:	687b      	ldr	r3, [r7, #4]
- 8004764:	681b      	ldr	r3, [r3, #0]
- 8004766:	689b      	ldr	r3, [r3, #8]
- 8004768:	f403 6380 	and.w	r3, r3, #1024	; 0x400
- 800476c:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
- 8004770:	d113      	bne.n	800479a <HAL_ADC_PollForConversion+0x46>
-      HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA)    )
- 8004772:	687b      	ldr	r3, [r7, #4]
- 8004774:	681b      	ldr	r3, [r3, #0]
- 8004776:	689b      	ldr	r3, [r3, #8]
- 8004778:	f403 7380 	and.w	r3, r3, #256	; 0x100
-  if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
- 800477c:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
- 8004780:	d10b      	bne.n	800479a <HAL_ADC_PollForConversion+0x46>
-  {
-    /* Update ADC state machine to error */
-    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
- 8004782:	687b      	ldr	r3, [r7, #4]
- 8004784:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8004786:	f043 0220 	orr.w	r2, r3, #32
- 800478a:	687b      	ldr	r3, [r7, #4]
- 800478c:	641a      	str	r2, [r3, #64]	; 0x40
-    
-    /* Process unlocked */
-    __HAL_UNLOCK(hadc);
- 800478e:	687b      	ldr	r3, [r7, #4]
- 8004790:	2200      	movs	r2, #0
- 8004792:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-    
-    return HAL_ERROR;
- 8004796:	2301      	movs	r3, #1
- 8004798:	e05c      	b.n	8004854 <HAL_ADC_PollForConversion+0x100>
-  }
- 
-  /* Get tick */ 
-  tickstart = HAL_GetTick();
- 800479a:	f7ff fea9 	bl	80044f0 <HAL_GetTick>
- 800479e:	60f8      	str	r0, [r7, #12]
-
-  /* Check End of conversion flag */
-  while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
- 80047a0:	e01a      	b.n	80047d8 <HAL_ADC_PollForConversion+0x84>
-  {
-    /* Check if timeout is disabled (set to infinite wait) */
-    if(Timeout != HAL_MAX_DELAY)
- 80047a2:	683b      	ldr	r3, [r7, #0]
- 80047a4:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
- 80047a8:	d016      	beq.n	80047d8 <HAL_ADC_PollForConversion+0x84>
-    {
-      if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
- 80047aa:	683b      	ldr	r3, [r7, #0]
- 80047ac:	2b00      	cmp	r3, #0
- 80047ae:	d007      	beq.n	80047c0 <HAL_ADC_PollForConversion+0x6c>
- 80047b0:	f7ff fe9e 	bl	80044f0 <HAL_GetTick>
- 80047b4:	4602      	mov	r2, r0
- 80047b6:	68fb      	ldr	r3, [r7, #12]
- 80047b8:	1ad3      	subs	r3, r2, r3
- 80047ba:	683a      	ldr	r2, [r7, #0]
- 80047bc:	429a      	cmp	r2, r3
- 80047be:	d20b      	bcs.n	80047d8 <HAL_ADC_PollForConversion+0x84>
-      {
-        /* Update ADC state machine to timeout */
-        SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
- 80047c0:	687b      	ldr	r3, [r7, #4]
- 80047c2:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 80047c4:	f043 0204 	orr.w	r2, r3, #4
- 80047c8:	687b      	ldr	r3, [r7, #4]
- 80047ca:	641a      	str	r2, [r3, #64]	; 0x40
-        
-        /* Process unlocked */
-        __HAL_UNLOCK(hadc);
- 80047cc:	687b      	ldr	r3, [r7, #4]
- 80047ce:	2200      	movs	r2, #0
- 80047d0:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-        
-        return HAL_TIMEOUT;
- 80047d4:	2303      	movs	r3, #3
- 80047d6:	e03d      	b.n	8004854 <HAL_ADC_PollForConversion+0x100>
-  while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
- 80047d8:	687b      	ldr	r3, [r7, #4]
- 80047da:	681b      	ldr	r3, [r3, #0]
- 80047dc:	681b      	ldr	r3, [r3, #0]
- 80047de:	f003 0302 	and.w	r3, r3, #2
- 80047e2:	2b02      	cmp	r3, #2
- 80047e4:	d1dd      	bne.n	80047a2 <HAL_ADC_PollForConversion+0x4e>
-      }
-    }
-  }
-  
-  /* Clear regular group conversion flag */
-  __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
- 80047e6:	687b      	ldr	r3, [r7, #4]
- 80047e8:	681b      	ldr	r3, [r3, #0]
- 80047ea:	f06f 0212 	mvn.w	r2, #18
- 80047ee:	601a      	str	r2, [r3, #0]
-  
-  /* Update ADC state machine */
-  SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
- 80047f0:	687b      	ldr	r3, [r7, #4]
- 80047f2:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 80047f4:	f443 7200 	orr.w	r2, r3, #512	; 0x200
- 80047f8:	687b      	ldr	r3, [r7, #4]
- 80047fa:	641a      	str	r2, [r3, #64]	; 0x40
-  /* by external trigger, continuous mode or scan sequence on going.          */
-  /* Note: On STM32F7, there is no independent flag of end of sequence.       */
-  /*       The test of scan sequence on going is done either with scan        */
-  /*       sequence disabled or with end of conversion flag set to            */
-  /*       of end of sequence.                                                */
-  if(ADC_IS_SOFTWARE_START_REGULAR(hadc)                   &&
- 80047fc:	687b      	ldr	r3, [r7, #4]
- 80047fe:	681b      	ldr	r3, [r3, #0]
- 8004800:	689b      	ldr	r3, [r3, #8]
- 8004802:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
- 8004806:	2b00      	cmp	r3, #0
- 8004808:	d123      	bne.n	8004852 <HAL_ADC_PollForConversion+0xfe>
-     (hadc->Init.ContinuousConvMode == DISABLE)            &&
- 800480a:	687b      	ldr	r3, [r7, #4]
- 800480c:	699b      	ldr	r3, [r3, #24]
-  if(ADC_IS_SOFTWARE_START_REGULAR(hadc)                   &&
- 800480e:	2b00      	cmp	r3, #0
- 8004810:	d11f      	bne.n	8004852 <HAL_ADC_PollForConversion+0xfe>
-     (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
- 8004812:	687b      	ldr	r3, [r7, #4]
- 8004814:	681b      	ldr	r3, [r3, #0]
- 8004816:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8004818:	f403 0370 	and.w	r3, r3, #15728640	; 0xf00000
-     (hadc->Init.ContinuousConvMode == DISABLE)            &&
- 800481c:	2b00      	cmp	r3, #0
- 800481e:	d006      	beq.n	800482e <HAL_ADC_PollForConversion+0xda>
-      HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)  )   )
- 8004820:	687b      	ldr	r3, [r7, #4]
- 8004822:	681b      	ldr	r3, [r3, #0]
- 8004824:	689b      	ldr	r3, [r3, #8]
- 8004826:	f403 6380 	and.w	r3, r3, #1024	; 0x400
-     (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
- 800482a:	2b00      	cmp	r3, #0
- 800482c:	d111      	bne.n	8004852 <HAL_ADC_PollForConversion+0xfe>
-  {
-    /* Set ADC state */
-    CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);   
- 800482e:	687b      	ldr	r3, [r7, #4]
- 8004830:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8004832:	f423 7280 	bic.w	r2, r3, #256	; 0x100
- 8004836:	687b      	ldr	r3, [r7, #4]
- 8004838:	641a      	str	r2, [r3, #64]	; 0x40
-    
-    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
- 800483a:	687b      	ldr	r3, [r7, #4]
- 800483c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 800483e:	f403 5380 	and.w	r3, r3, #4096	; 0x1000
- 8004842:	2b00      	cmp	r3, #0
- 8004844:	d105      	bne.n	8004852 <HAL_ADC_PollForConversion+0xfe>
-    { 
-      SET_BIT(hadc->State, HAL_ADC_STATE_READY);
- 8004846:	687b      	ldr	r3, [r7, #4]
- 8004848:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 800484a:	f043 0201 	orr.w	r2, r3, #1
- 800484e:	687b      	ldr	r3, [r7, #4]
- 8004850:	641a      	str	r2, [r3, #64]	; 0x40
-    }
-  }
-  
-  /* Return ADC state */
-  return HAL_OK;
- 8004852:	2300      	movs	r3, #0
-}
- 8004854:	4618      	mov	r0, r3
- 8004856:	3710      	adds	r7, #16
- 8004858:	46bd      	mov	sp, r7
- 800485a:	bd80      	pop	{r7, pc}
-
-0800485c <HAL_ADC_GetValue>:
-  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
-  *         the configuration information for the specified ADC.
-  * @retval Converted value
-  */
-uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
-{       
- 800485c:	b480      	push	{r7}
- 800485e:	b083      	sub	sp, #12
- 8004860:	af00      	add	r7, sp, #0
- 8004862:	6078      	str	r0, [r7, #4]
-  /* Return the selected ADC converted value */ 
-  return hadc->Instance->DR;
- 8004864:	687b      	ldr	r3, [r7, #4]
- 8004866:	681b      	ldr	r3, [r3, #0]
- 8004868:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
-}
- 800486a:	4618      	mov	r0, r3
- 800486c:	370c      	adds	r7, #12
- 800486e:	46bd      	mov	sp, r7
- 8004870:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004874:	4770      	bx	lr
-	...
-
-08004878 <HAL_ADC_ConfigChannel>:
-  *         the configuration information for the specified ADC.
-  * @param  sConfig ADC configuration structure. 
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
-{
- 8004878:	b480      	push	{r7}
- 800487a:	b085      	sub	sp, #20
- 800487c:	af00      	add	r7, sp, #0
- 800487e:	6078      	str	r0, [r7, #4]
- 8004880:	6039      	str	r1, [r7, #0]
-  __IO uint32_t counter = 0;
- 8004882:	2300      	movs	r3, #0
- 8004884:	60fb      	str	r3, [r7, #12]
-  assert_param(IS_ADC_CHANNEL(sConfig->Channel));
-  assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
-  assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
-  
-  /* Process locked */
-  __HAL_LOCK(hadc);
- 8004886:	687b      	ldr	r3, [r7, #4]
- 8004888:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
- 800488c:	2b01      	cmp	r3, #1
- 800488e:	d101      	bne.n	8004894 <HAL_ADC_ConfigChannel+0x1c>
- 8004890:	2302      	movs	r3, #2
- 8004892:	e12a      	b.n	8004aea <HAL_ADC_ConfigChannel+0x272>
- 8004894:	687b      	ldr	r3, [r7, #4]
- 8004896:	2201      	movs	r2, #1
- 8004898:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-  
-  /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
-  if ((sConfig->Channel > ADC_CHANNEL_9) && (sConfig->Channel != ADC_INTERNAL_NONE))
- 800489c:	683b      	ldr	r3, [r7, #0]
- 800489e:	681b      	ldr	r3, [r3, #0]
- 80048a0:	2b09      	cmp	r3, #9
- 80048a2:	d93a      	bls.n	800491a <HAL_ADC_ConfigChannel+0xa2>
- 80048a4:	683b      	ldr	r3, [r7, #0]
- 80048a6:	681b      	ldr	r3, [r3, #0]
- 80048a8:	f1b3 4f00 	cmp.w	r3, #2147483648	; 0x80000000
- 80048ac:	d035      	beq.n	800491a <HAL_ADC_ConfigChannel+0xa2>
-  {
-    /* Clear the old sample time */
-    hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
- 80048ae:	687b      	ldr	r3, [r7, #4]
- 80048b0:	681b      	ldr	r3, [r3, #0]
- 80048b2:	68d9      	ldr	r1, [r3, #12]
- 80048b4:	683b      	ldr	r3, [r7, #0]
- 80048b6:	681b      	ldr	r3, [r3, #0]
- 80048b8:	b29b      	uxth	r3, r3
- 80048ba:	461a      	mov	r2, r3
- 80048bc:	4613      	mov	r3, r2
- 80048be:	005b      	lsls	r3, r3, #1
- 80048c0:	4413      	add	r3, r2
- 80048c2:	3b1e      	subs	r3, #30
- 80048c4:	2207      	movs	r2, #7
- 80048c6:	fa02 f303 	lsl.w	r3, r2, r3
- 80048ca:	43da      	mvns	r2, r3
- 80048cc:	687b      	ldr	r3, [r7, #4]
- 80048ce:	681b      	ldr	r3, [r3, #0]
- 80048d0:	400a      	ands	r2, r1
- 80048d2:	60da      	str	r2, [r3, #12]
-
-    if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
- 80048d4:	683b      	ldr	r3, [r7, #0]
- 80048d6:	681b      	ldr	r3, [r3, #0]
- 80048d8:	4a87      	ldr	r2, [pc, #540]	; (8004af8 <HAL_ADC_ConfigChannel+0x280>)
- 80048da:	4293      	cmp	r3, r2
- 80048dc:	d10a      	bne.n	80048f4 <HAL_ADC_ConfigChannel+0x7c>
-    {
-      /* Set the new sample time */
-      hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, ADC_CHANNEL_18);
- 80048de:	687b      	ldr	r3, [r7, #4]
- 80048e0:	681b      	ldr	r3, [r3, #0]
- 80048e2:	68d9      	ldr	r1, [r3, #12]
- 80048e4:	683b      	ldr	r3, [r7, #0]
- 80048e6:	689b      	ldr	r3, [r3, #8]
- 80048e8:	061a      	lsls	r2, r3, #24
- 80048ea:	687b      	ldr	r3, [r7, #4]
- 80048ec:	681b      	ldr	r3, [r3, #0]
- 80048ee:	430a      	orrs	r2, r1
- 80048f0:	60da      	str	r2, [r3, #12]
-    if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
- 80048f2:	e035      	b.n	8004960 <HAL_ADC_ConfigChannel+0xe8>
-    }
-    else
-    {
-      /* Set the new sample time */
-      hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
- 80048f4:	687b      	ldr	r3, [r7, #4]
- 80048f6:	681b      	ldr	r3, [r3, #0]
- 80048f8:	68d9      	ldr	r1, [r3, #12]
- 80048fa:	683b      	ldr	r3, [r7, #0]
- 80048fc:	689a      	ldr	r2, [r3, #8]
- 80048fe:	683b      	ldr	r3, [r7, #0]
- 8004900:	681b      	ldr	r3, [r3, #0]
- 8004902:	b29b      	uxth	r3, r3
- 8004904:	4618      	mov	r0, r3
- 8004906:	4603      	mov	r3, r0
- 8004908:	005b      	lsls	r3, r3, #1
- 800490a:	4403      	add	r3, r0
- 800490c:	3b1e      	subs	r3, #30
- 800490e:	409a      	lsls	r2, r3
- 8004910:	687b      	ldr	r3, [r7, #4]
- 8004912:	681b      	ldr	r3, [r3, #0]
- 8004914:	430a      	orrs	r2, r1
- 8004916:	60da      	str	r2, [r3, #12]
-    if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
- 8004918:	e022      	b.n	8004960 <HAL_ADC_ConfigChannel+0xe8>
-    }
-  }
-  else /* ADC_Channel include in ADC_Channel_[0..9] */
-  {
-    /* Clear the old sample time */
-    hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
- 800491a:	687b      	ldr	r3, [r7, #4]
- 800491c:	681b      	ldr	r3, [r3, #0]
- 800491e:	6919      	ldr	r1, [r3, #16]
- 8004920:	683b      	ldr	r3, [r7, #0]
- 8004922:	681b      	ldr	r3, [r3, #0]
- 8004924:	b29b      	uxth	r3, r3
- 8004926:	461a      	mov	r2, r3
- 8004928:	4613      	mov	r3, r2
- 800492a:	005b      	lsls	r3, r3, #1
- 800492c:	4413      	add	r3, r2
- 800492e:	2207      	movs	r2, #7
- 8004930:	fa02 f303 	lsl.w	r3, r2, r3
- 8004934:	43da      	mvns	r2, r3
- 8004936:	687b      	ldr	r3, [r7, #4]
- 8004938:	681b      	ldr	r3, [r3, #0]
- 800493a:	400a      	ands	r2, r1
- 800493c:	611a      	str	r2, [r3, #16]
-    
-    /* Set the new sample time */
-    hadc->Instance->SMPR2 |= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
- 800493e:	687b      	ldr	r3, [r7, #4]
- 8004940:	681b      	ldr	r3, [r3, #0]
- 8004942:	6919      	ldr	r1, [r3, #16]
- 8004944:	683b      	ldr	r3, [r7, #0]
- 8004946:	689a      	ldr	r2, [r3, #8]
- 8004948:	683b      	ldr	r3, [r7, #0]
- 800494a:	681b      	ldr	r3, [r3, #0]
- 800494c:	b29b      	uxth	r3, r3
- 800494e:	4618      	mov	r0, r3
- 8004950:	4603      	mov	r3, r0
- 8004952:	005b      	lsls	r3, r3, #1
- 8004954:	4403      	add	r3, r0
- 8004956:	409a      	lsls	r2, r3
- 8004958:	687b      	ldr	r3, [r7, #4]
- 800495a:	681b      	ldr	r3, [r3, #0]
- 800495c:	430a      	orrs	r2, r1
- 800495e:	611a      	str	r2, [r3, #16]
-  }
-  
-  /* For Rank 1 to 6 */
-  if (sConfig->Rank < 7)
- 8004960:	683b      	ldr	r3, [r7, #0]
- 8004962:	685b      	ldr	r3, [r3, #4]
- 8004964:	2b06      	cmp	r3, #6
- 8004966:	d824      	bhi.n	80049b2 <HAL_ADC_ConfigChannel+0x13a>
-  {
-    /* Clear the old SQx bits for the selected rank */
-    hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
- 8004968:	687b      	ldr	r3, [r7, #4]
- 800496a:	681b      	ldr	r3, [r3, #0]
- 800496c:	6b59      	ldr	r1, [r3, #52]	; 0x34
- 800496e:	683b      	ldr	r3, [r7, #0]
- 8004970:	685a      	ldr	r2, [r3, #4]
- 8004972:	4613      	mov	r3, r2
- 8004974:	009b      	lsls	r3, r3, #2
- 8004976:	4413      	add	r3, r2
- 8004978:	3b05      	subs	r3, #5
- 800497a:	221f      	movs	r2, #31
- 800497c:	fa02 f303 	lsl.w	r3, r2, r3
- 8004980:	43da      	mvns	r2, r3
- 8004982:	687b      	ldr	r3, [r7, #4]
- 8004984:	681b      	ldr	r3, [r3, #0]
- 8004986:	400a      	ands	r2, r1
- 8004988:	635a      	str	r2, [r3, #52]	; 0x34
-    
-    /* Set the SQx bits for the selected rank */
-    hadc->Instance->SQR3 |= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
- 800498a:	687b      	ldr	r3, [r7, #4]
- 800498c:	681b      	ldr	r3, [r3, #0]
- 800498e:	6b59      	ldr	r1, [r3, #52]	; 0x34
- 8004990:	683b      	ldr	r3, [r7, #0]
- 8004992:	681b      	ldr	r3, [r3, #0]
- 8004994:	b29b      	uxth	r3, r3
- 8004996:	4618      	mov	r0, r3
- 8004998:	683b      	ldr	r3, [r7, #0]
- 800499a:	685a      	ldr	r2, [r3, #4]
- 800499c:	4613      	mov	r3, r2
- 800499e:	009b      	lsls	r3, r3, #2
- 80049a0:	4413      	add	r3, r2
- 80049a2:	3b05      	subs	r3, #5
- 80049a4:	fa00 f203 	lsl.w	r2, r0, r3
- 80049a8:	687b      	ldr	r3, [r7, #4]
- 80049aa:	681b      	ldr	r3, [r3, #0]
- 80049ac:	430a      	orrs	r2, r1
- 80049ae:	635a      	str	r2, [r3, #52]	; 0x34
- 80049b0:	e04c      	b.n	8004a4c <HAL_ADC_ConfigChannel+0x1d4>
-  }
-  /* For Rank 7 to 12 */
-  else if (sConfig->Rank < 13)
- 80049b2:	683b      	ldr	r3, [r7, #0]
- 80049b4:	685b      	ldr	r3, [r3, #4]
- 80049b6:	2b0c      	cmp	r3, #12
- 80049b8:	d824      	bhi.n	8004a04 <HAL_ADC_ConfigChannel+0x18c>
-  {
-    /* Clear the old SQx bits for the selected rank */
-    hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
- 80049ba:	687b      	ldr	r3, [r7, #4]
- 80049bc:	681b      	ldr	r3, [r3, #0]
- 80049be:	6b19      	ldr	r1, [r3, #48]	; 0x30
- 80049c0:	683b      	ldr	r3, [r7, #0]
- 80049c2:	685a      	ldr	r2, [r3, #4]
- 80049c4:	4613      	mov	r3, r2
- 80049c6:	009b      	lsls	r3, r3, #2
- 80049c8:	4413      	add	r3, r2
- 80049ca:	3b23      	subs	r3, #35	; 0x23
- 80049cc:	221f      	movs	r2, #31
- 80049ce:	fa02 f303 	lsl.w	r3, r2, r3
- 80049d2:	43da      	mvns	r2, r3
- 80049d4:	687b      	ldr	r3, [r7, #4]
- 80049d6:	681b      	ldr	r3, [r3, #0]
- 80049d8:	400a      	ands	r2, r1
- 80049da:	631a      	str	r2, [r3, #48]	; 0x30
-    
-    /* Set the SQx bits for the selected rank */
-    hadc->Instance->SQR2 |= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
- 80049dc:	687b      	ldr	r3, [r7, #4]
- 80049de:	681b      	ldr	r3, [r3, #0]
- 80049e0:	6b19      	ldr	r1, [r3, #48]	; 0x30
- 80049e2:	683b      	ldr	r3, [r7, #0]
- 80049e4:	681b      	ldr	r3, [r3, #0]
- 80049e6:	b29b      	uxth	r3, r3
- 80049e8:	4618      	mov	r0, r3
- 80049ea:	683b      	ldr	r3, [r7, #0]
- 80049ec:	685a      	ldr	r2, [r3, #4]
- 80049ee:	4613      	mov	r3, r2
- 80049f0:	009b      	lsls	r3, r3, #2
- 80049f2:	4413      	add	r3, r2
- 80049f4:	3b23      	subs	r3, #35	; 0x23
- 80049f6:	fa00 f203 	lsl.w	r2, r0, r3
- 80049fa:	687b      	ldr	r3, [r7, #4]
- 80049fc:	681b      	ldr	r3, [r3, #0]
- 80049fe:	430a      	orrs	r2, r1
- 8004a00:	631a      	str	r2, [r3, #48]	; 0x30
- 8004a02:	e023      	b.n	8004a4c <HAL_ADC_ConfigChannel+0x1d4>
-  }
-  /* For Rank 13 to 16 */
-  else
-  {
-    /* Clear the old SQx bits for the selected rank */
-    hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
- 8004a04:	687b      	ldr	r3, [r7, #4]
- 8004a06:	681b      	ldr	r3, [r3, #0]
- 8004a08:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
- 8004a0a:	683b      	ldr	r3, [r7, #0]
- 8004a0c:	685a      	ldr	r2, [r3, #4]
- 8004a0e:	4613      	mov	r3, r2
- 8004a10:	009b      	lsls	r3, r3, #2
- 8004a12:	4413      	add	r3, r2
- 8004a14:	3b41      	subs	r3, #65	; 0x41
- 8004a16:	221f      	movs	r2, #31
- 8004a18:	fa02 f303 	lsl.w	r3, r2, r3
- 8004a1c:	43da      	mvns	r2, r3
- 8004a1e:	687b      	ldr	r3, [r7, #4]
- 8004a20:	681b      	ldr	r3, [r3, #0]
- 8004a22:	400a      	ands	r2, r1
- 8004a24:	62da      	str	r2, [r3, #44]	; 0x2c
-    
-    /* Set the SQx bits for the selected rank */
-    hadc->Instance->SQR1 |= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
- 8004a26:	687b      	ldr	r3, [r7, #4]
- 8004a28:	681b      	ldr	r3, [r3, #0]
- 8004a2a:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
- 8004a2c:	683b      	ldr	r3, [r7, #0]
- 8004a2e:	681b      	ldr	r3, [r3, #0]
- 8004a30:	b29b      	uxth	r3, r3
- 8004a32:	4618      	mov	r0, r3
- 8004a34:	683b      	ldr	r3, [r7, #0]
- 8004a36:	685a      	ldr	r2, [r3, #4]
- 8004a38:	4613      	mov	r3, r2
- 8004a3a:	009b      	lsls	r3, r3, #2
- 8004a3c:	4413      	add	r3, r2
- 8004a3e:	3b41      	subs	r3, #65	; 0x41
- 8004a40:	fa00 f203 	lsl.w	r2, r0, r3
- 8004a44:	687b      	ldr	r3, [r7, #4]
- 8004a46:	681b      	ldr	r3, [r3, #0]
- 8004a48:	430a      	orrs	r2, r1
- 8004a4a:	62da      	str	r2, [r3, #44]	; 0x2c
-  }
-  
-  /* if no internal channel selected */
-  if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_INTERNAL_NONE))
- 8004a4c:	687b      	ldr	r3, [r7, #4]
- 8004a4e:	681b      	ldr	r3, [r3, #0]
- 8004a50:	4a2a      	ldr	r2, [pc, #168]	; (8004afc <HAL_ADC_ConfigChannel+0x284>)
- 8004a52:	4293      	cmp	r3, r2
- 8004a54:	d10a      	bne.n	8004a6c <HAL_ADC_ConfigChannel+0x1f4>
- 8004a56:	683b      	ldr	r3, [r7, #0]
- 8004a58:	681b      	ldr	r3, [r3, #0]
- 8004a5a:	f1b3 4f00 	cmp.w	r3, #2147483648	; 0x80000000
- 8004a5e:	d105      	bne.n	8004a6c <HAL_ADC_ConfigChannel+0x1f4>
-  {
-    /* Disable the VBAT & TSVREFE channel*/
-    ADC->CCR &= ~(ADC_CCR_VBATE | ADC_CCR_TSVREFE);
- 8004a60:	4b27      	ldr	r3, [pc, #156]	; (8004b00 <HAL_ADC_ConfigChannel+0x288>)
- 8004a62:	685b      	ldr	r3, [r3, #4]
- 8004a64:	4a26      	ldr	r2, [pc, #152]	; (8004b00 <HAL_ADC_ConfigChannel+0x288>)
- 8004a66:	f423 0340 	bic.w	r3, r3, #12582912	; 0xc00000
- 8004a6a:	6053      	str	r3, [r2, #4]
-  }
-
-  /* if ADC1 Channel_18 is selected enable VBAT Channel */
-  if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT))
- 8004a6c:	687b      	ldr	r3, [r7, #4]
- 8004a6e:	681b      	ldr	r3, [r3, #0]
- 8004a70:	4a22      	ldr	r2, [pc, #136]	; (8004afc <HAL_ADC_ConfigChannel+0x284>)
- 8004a72:	4293      	cmp	r3, r2
- 8004a74:	d109      	bne.n	8004a8a <HAL_ADC_ConfigChannel+0x212>
- 8004a76:	683b      	ldr	r3, [r7, #0]
- 8004a78:	681b      	ldr	r3, [r3, #0]
- 8004a7a:	2b12      	cmp	r3, #18
- 8004a7c:	d105      	bne.n	8004a8a <HAL_ADC_ConfigChannel+0x212>
-  {
-    /* Enable the VBAT channel*/
-    ADC->CCR |= ADC_CCR_VBATE;
- 8004a7e:	4b20      	ldr	r3, [pc, #128]	; (8004b00 <HAL_ADC_ConfigChannel+0x288>)
- 8004a80:	685b      	ldr	r3, [r3, #4]
- 8004a82:	4a1f      	ldr	r2, [pc, #124]	; (8004b00 <HAL_ADC_ConfigChannel+0x288>)
- 8004a84:	f443 0380 	orr.w	r3, r3, #4194304	; 0x400000
- 8004a88:	6053      	str	r3, [r2, #4]
-  }
-  
-  /* if ADC1 Channel_18 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
-  if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT)))
- 8004a8a:	687b      	ldr	r3, [r7, #4]
- 8004a8c:	681b      	ldr	r3, [r3, #0]
- 8004a8e:	4a1b      	ldr	r2, [pc, #108]	; (8004afc <HAL_ADC_ConfigChannel+0x284>)
- 8004a90:	4293      	cmp	r3, r2
- 8004a92:	d125      	bne.n	8004ae0 <HAL_ADC_ConfigChannel+0x268>
- 8004a94:	683b      	ldr	r3, [r7, #0]
- 8004a96:	681b      	ldr	r3, [r3, #0]
- 8004a98:	4a17      	ldr	r2, [pc, #92]	; (8004af8 <HAL_ADC_ConfigChannel+0x280>)
- 8004a9a:	4293      	cmp	r3, r2
- 8004a9c:	d003      	beq.n	8004aa6 <HAL_ADC_ConfigChannel+0x22e>
- 8004a9e:	683b      	ldr	r3, [r7, #0]
- 8004aa0:	681b      	ldr	r3, [r3, #0]
- 8004aa2:	2b11      	cmp	r3, #17
- 8004aa4:	d11c      	bne.n	8004ae0 <HAL_ADC_ConfigChannel+0x268>
-  {
-    /* Enable the TSVREFE channel*/
-    ADC->CCR |= ADC_CCR_TSVREFE;
- 8004aa6:	4b16      	ldr	r3, [pc, #88]	; (8004b00 <HAL_ADC_ConfigChannel+0x288>)
- 8004aa8:	685b      	ldr	r3, [r3, #4]
- 8004aaa:	4a15      	ldr	r2, [pc, #84]	; (8004b00 <HAL_ADC_ConfigChannel+0x288>)
- 8004aac:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
- 8004ab0:	6053      	str	r3, [r2, #4]
-
-    if(sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
- 8004ab2:	683b      	ldr	r3, [r7, #0]
- 8004ab4:	681b      	ldr	r3, [r3, #0]
- 8004ab6:	4a10      	ldr	r2, [pc, #64]	; (8004af8 <HAL_ADC_ConfigChannel+0x280>)
- 8004ab8:	4293      	cmp	r3, r2
- 8004aba:	d111      	bne.n	8004ae0 <HAL_ADC_ConfigChannel+0x268>
-    {
-      /* Delay for temperature sensor stabilization time */
-      /* Compute number of CPU cycles to wait for */
-      counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
- 8004abc:	4b11      	ldr	r3, [pc, #68]	; (8004b04 <HAL_ADC_ConfigChannel+0x28c>)
- 8004abe:	681b      	ldr	r3, [r3, #0]
- 8004ac0:	4a11      	ldr	r2, [pc, #68]	; (8004b08 <HAL_ADC_ConfigChannel+0x290>)
- 8004ac2:	fba2 2303 	umull	r2, r3, r2, r3
- 8004ac6:	0c9a      	lsrs	r2, r3, #18
- 8004ac8:	4613      	mov	r3, r2
- 8004aca:	009b      	lsls	r3, r3, #2
- 8004acc:	4413      	add	r3, r2
- 8004ace:	005b      	lsls	r3, r3, #1
- 8004ad0:	60fb      	str	r3, [r7, #12]
-      while(counter != 0)
- 8004ad2:	e002      	b.n	8004ada <HAL_ADC_ConfigChannel+0x262>
-      {
-        counter--;
- 8004ad4:	68fb      	ldr	r3, [r7, #12]
- 8004ad6:	3b01      	subs	r3, #1
- 8004ad8:	60fb      	str	r3, [r7, #12]
-      while(counter != 0)
- 8004ada:	68fb      	ldr	r3, [r7, #12]
- 8004adc:	2b00      	cmp	r3, #0
- 8004ade:	d1f9      	bne.n	8004ad4 <HAL_ADC_ConfigChannel+0x25c>
-      }
-    }
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
- 8004ae0:	687b      	ldr	r3, [r7, #4]
- 8004ae2:	2200      	movs	r2, #0
- 8004ae4:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-  
-  /* Return function status */
-  return HAL_OK;
- 8004ae8:	2300      	movs	r3, #0
-}
- 8004aea:	4618      	mov	r0, r3
- 8004aec:	3714      	adds	r7, #20
- 8004aee:	46bd      	mov	sp, r7
- 8004af0:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004af4:	4770      	bx	lr
- 8004af6:	bf00      	nop
- 8004af8:	10000012 	.word	0x10000012
- 8004afc:	40012000 	.word	0x40012000
- 8004b00:	40012300 	.word	0x40012300
- 8004b04:	2000003c 	.word	0x2000003c
- 8004b08:	431bde83 	.word	0x431bde83
-
-08004b0c <ADC_Init>:
-  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
-  *         the configuration information for the specified ADC.  
-  * @retval None
-  */
-static void ADC_Init(ADC_HandleTypeDef* hadc)
-{
- 8004b0c:	b480      	push	{r7}
- 8004b0e:	b083      	sub	sp, #12
- 8004b10:	af00      	add	r7, sp, #0
- 8004b12:	6078      	str	r0, [r7, #4]
-  /* Set ADC parameters */
-  /* Set the ADC clock prescaler */
-  ADC->CCR &= ~(ADC_CCR_ADCPRE);
- 8004b14:	4b78      	ldr	r3, [pc, #480]	; (8004cf8 <ADC_Init+0x1ec>)
- 8004b16:	685b      	ldr	r3, [r3, #4]
- 8004b18:	4a77      	ldr	r2, [pc, #476]	; (8004cf8 <ADC_Init+0x1ec>)
- 8004b1a:	f423 3340 	bic.w	r3, r3, #196608	; 0x30000
- 8004b1e:	6053      	str	r3, [r2, #4]
-  ADC->CCR |=  hadc->Init.ClockPrescaler;
- 8004b20:	4b75      	ldr	r3, [pc, #468]	; (8004cf8 <ADC_Init+0x1ec>)
- 8004b22:	685a      	ldr	r2, [r3, #4]
- 8004b24:	687b      	ldr	r3, [r7, #4]
- 8004b26:	685b      	ldr	r3, [r3, #4]
- 8004b28:	4973      	ldr	r1, [pc, #460]	; (8004cf8 <ADC_Init+0x1ec>)
- 8004b2a:	4313      	orrs	r3, r2
- 8004b2c:	604b      	str	r3, [r1, #4]
-  
-  /* Set ADC scan mode */
-  hadc->Instance->CR1 &= ~(ADC_CR1_SCAN);
- 8004b2e:	687b      	ldr	r3, [r7, #4]
- 8004b30:	681b      	ldr	r3, [r3, #0]
- 8004b32:	685a      	ldr	r2, [r3, #4]
- 8004b34:	687b      	ldr	r3, [r7, #4]
- 8004b36:	681b      	ldr	r3, [r3, #0]
- 8004b38:	f422 7280 	bic.w	r2, r2, #256	; 0x100
- 8004b3c:	605a      	str	r2, [r3, #4]
-  hadc->Instance->CR1 |=  ADC_CR1_SCANCONV(hadc->Init.ScanConvMode);
- 8004b3e:	687b      	ldr	r3, [r7, #4]
- 8004b40:	681b      	ldr	r3, [r3, #0]
- 8004b42:	6859      	ldr	r1, [r3, #4]
- 8004b44:	687b      	ldr	r3, [r7, #4]
- 8004b46:	691b      	ldr	r3, [r3, #16]
- 8004b48:	021a      	lsls	r2, r3, #8
- 8004b4a:	687b      	ldr	r3, [r7, #4]
- 8004b4c:	681b      	ldr	r3, [r3, #0]
- 8004b4e:	430a      	orrs	r2, r1
- 8004b50:	605a      	str	r2, [r3, #4]
-  
-  /* Set ADC resolution */
-  hadc->Instance->CR1 &= ~(ADC_CR1_RES);
- 8004b52:	687b      	ldr	r3, [r7, #4]
- 8004b54:	681b      	ldr	r3, [r3, #0]
- 8004b56:	685a      	ldr	r2, [r3, #4]
- 8004b58:	687b      	ldr	r3, [r7, #4]
- 8004b5a:	681b      	ldr	r3, [r3, #0]
- 8004b5c:	f022 7240 	bic.w	r2, r2, #50331648	; 0x3000000
- 8004b60:	605a      	str	r2, [r3, #4]
-  hadc->Instance->CR1 |=  hadc->Init.Resolution;
- 8004b62:	687b      	ldr	r3, [r7, #4]
- 8004b64:	681b      	ldr	r3, [r3, #0]
- 8004b66:	6859      	ldr	r1, [r3, #4]
- 8004b68:	687b      	ldr	r3, [r7, #4]
- 8004b6a:	689a      	ldr	r2, [r3, #8]
- 8004b6c:	687b      	ldr	r3, [r7, #4]
- 8004b6e:	681b      	ldr	r3, [r3, #0]
- 8004b70:	430a      	orrs	r2, r1
- 8004b72:	605a      	str	r2, [r3, #4]
-  
-  /* Set ADC data alignment */
-  hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN);
- 8004b74:	687b      	ldr	r3, [r7, #4]
- 8004b76:	681b      	ldr	r3, [r3, #0]
- 8004b78:	689a      	ldr	r2, [r3, #8]
- 8004b7a:	687b      	ldr	r3, [r7, #4]
- 8004b7c:	681b      	ldr	r3, [r3, #0]
- 8004b7e:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
- 8004b82:	609a      	str	r2, [r3, #8]
-  hadc->Instance->CR2 |= hadc->Init.DataAlign;
- 8004b84:	687b      	ldr	r3, [r7, #4]
- 8004b86:	681b      	ldr	r3, [r3, #0]
- 8004b88:	6899      	ldr	r1, [r3, #8]
- 8004b8a:	687b      	ldr	r3, [r7, #4]
- 8004b8c:	68da      	ldr	r2, [r3, #12]
- 8004b8e:	687b      	ldr	r3, [r7, #4]
- 8004b90:	681b      	ldr	r3, [r3, #0]
- 8004b92:	430a      	orrs	r2, r1
- 8004b94:	609a      	str	r2, [r3, #8]
-  /* Enable external trigger if trigger selection is different of software  */
-  /* start.                                                                 */
-  /* Note: This configuration keeps the hardware feature of parameter       */
-  /*       ExternalTrigConvEdge "trigger edge none" equivalent to           */
-  /*       software start.                                                  */
-  if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
- 8004b96:	687b      	ldr	r3, [r7, #4]
- 8004b98:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 8004b9a:	4a58      	ldr	r2, [pc, #352]	; (8004cfc <ADC_Init+0x1f0>)
- 8004b9c:	4293      	cmp	r3, r2
- 8004b9e:	d022      	beq.n	8004be6 <ADC_Init+0xda>
-  {
-    /* Select external trigger to start conversion */
-    hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
- 8004ba0:	687b      	ldr	r3, [r7, #4]
- 8004ba2:	681b      	ldr	r3, [r3, #0]
- 8004ba4:	689a      	ldr	r2, [r3, #8]
- 8004ba6:	687b      	ldr	r3, [r7, #4]
- 8004ba8:	681b      	ldr	r3, [r3, #0]
- 8004baa:	f022 6270 	bic.w	r2, r2, #251658240	; 0xf000000
- 8004bae:	609a      	str	r2, [r3, #8]
-    hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv;
- 8004bb0:	687b      	ldr	r3, [r7, #4]
- 8004bb2:	681b      	ldr	r3, [r3, #0]
- 8004bb4:	6899      	ldr	r1, [r3, #8]
- 8004bb6:	687b      	ldr	r3, [r7, #4]
- 8004bb8:	6a9a      	ldr	r2, [r3, #40]	; 0x28
- 8004bba:	687b      	ldr	r3, [r7, #4]
- 8004bbc:	681b      	ldr	r3, [r3, #0]
- 8004bbe:	430a      	orrs	r2, r1
- 8004bc0:	609a      	str	r2, [r3, #8]
-    
-    /* Select external trigger polarity */
-    hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
- 8004bc2:	687b      	ldr	r3, [r7, #4]
- 8004bc4:	681b      	ldr	r3, [r3, #0]
- 8004bc6:	689a      	ldr	r2, [r3, #8]
- 8004bc8:	687b      	ldr	r3, [r7, #4]
- 8004bca:	681b      	ldr	r3, [r3, #0]
- 8004bcc:	f022 5240 	bic.w	r2, r2, #805306368	; 0x30000000
- 8004bd0:	609a      	str	r2, [r3, #8]
-    hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge;
- 8004bd2:	687b      	ldr	r3, [r7, #4]
- 8004bd4:	681b      	ldr	r3, [r3, #0]
- 8004bd6:	6899      	ldr	r1, [r3, #8]
- 8004bd8:	687b      	ldr	r3, [r7, #4]
- 8004bda:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8004bdc:	687b      	ldr	r3, [r7, #4]
- 8004bde:	681b      	ldr	r3, [r3, #0]
- 8004be0:	430a      	orrs	r2, r1
- 8004be2:	609a      	str	r2, [r3, #8]
- 8004be4:	e00f      	b.n	8004c06 <ADC_Init+0xfa>
-  }
-  else
-  {
-    /* Reset the external trigger */
-    hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
- 8004be6:	687b      	ldr	r3, [r7, #4]
- 8004be8:	681b      	ldr	r3, [r3, #0]
- 8004bea:	689a      	ldr	r2, [r3, #8]
- 8004bec:	687b      	ldr	r3, [r7, #4]
- 8004bee:	681b      	ldr	r3, [r3, #0]
- 8004bf0:	f022 6270 	bic.w	r2, r2, #251658240	; 0xf000000
- 8004bf4:	609a      	str	r2, [r3, #8]
-    hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
- 8004bf6:	687b      	ldr	r3, [r7, #4]
- 8004bf8:	681b      	ldr	r3, [r3, #0]
- 8004bfa:	689a      	ldr	r2, [r3, #8]
- 8004bfc:	687b      	ldr	r3, [r7, #4]
- 8004bfe:	681b      	ldr	r3, [r3, #0]
- 8004c00:	f022 5240 	bic.w	r2, r2, #805306368	; 0x30000000
- 8004c04:	609a      	str	r2, [r3, #8]
-  }
-  
-  /* Enable or disable ADC continuous conversion mode */
-  hadc->Instance->CR2 &= ~(ADC_CR2_CONT);
- 8004c06:	687b      	ldr	r3, [r7, #4]
- 8004c08:	681b      	ldr	r3, [r3, #0]
- 8004c0a:	689a      	ldr	r2, [r3, #8]
- 8004c0c:	687b      	ldr	r3, [r7, #4]
- 8004c0e:	681b      	ldr	r3, [r3, #0]
- 8004c10:	f022 0202 	bic.w	r2, r2, #2
- 8004c14:	609a      	str	r2, [r3, #8]
-  hadc->Instance->CR2 |= ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode);
- 8004c16:	687b      	ldr	r3, [r7, #4]
- 8004c18:	681b      	ldr	r3, [r3, #0]
- 8004c1a:	6899      	ldr	r1, [r3, #8]
- 8004c1c:	687b      	ldr	r3, [r7, #4]
- 8004c1e:	699b      	ldr	r3, [r3, #24]
- 8004c20:	005a      	lsls	r2, r3, #1
- 8004c22:	687b      	ldr	r3, [r7, #4]
- 8004c24:	681b      	ldr	r3, [r3, #0]
- 8004c26:	430a      	orrs	r2, r1
- 8004c28:	609a      	str	r2, [r3, #8]
-  
-  if(hadc->Init.DiscontinuousConvMode != DISABLE)
- 8004c2a:	687b      	ldr	r3, [r7, #4]
- 8004c2c:	f893 3020 	ldrb.w	r3, [r3, #32]
- 8004c30:	2b00      	cmp	r3, #0
- 8004c32:	d01b      	beq.n	8004c6c <ADC_Init+0x160>
-  {
-    assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion));
-  
-    /* Enable the selected ADC regular discontinuous mode */
-    hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN;
- 8004c34:	687b      	ldr	r3, [r7, #4]
- 8004c36:	681b      	ldr	r3, [r3, #0]
- 8004c38:	685a      	ldr	r2, [r3, #4]
- 8004c3a:	687b      	ldr	r3, [r7, #4]
- 8004c3c:	681b      	ldr	r3, [r3, #0]
- 8004c3e:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
- 8004c42:	605a      	str	r2, [r3, #4]
-    
-    /* Set the number of channels to be converted in discontinuous mode */
-    hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM);
- 8004c44:	687b      	ldr	r3, [r7, #4]
- 8004c46:	681b      	ldr	r3, [r3, #0]
- 8004c48:	685a      	ldr	r2, [r3, #4]
- 8004c4a:	687b      	ldr	r3, [r7, #4]
- 8004c4c:	681b      	ldr	r3, [r3, #0]
- 8004c4e:	f422 4260 	bic.w	r2, r2, #57344	; 0xe000
- 8004c52:	605a      	str	r2, [r3, #4]
-    hadc->Instance->CR1 |=  ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion);
- 8004c54:	687b      	ldr	r3, [r7, #4]
- 8004c56:	681b      	ldr	r3, [r3, #0]
- 8004c58:	6859      	ldr	r1, [r3, #4]
- 8004c5a:	687b      	ldr	r3, [r7, #4]
- 8004c5c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8004c5e:	3b01      	subs	r3, #1
- 8004c60:	035a      	lsls	r2, r3, #13
- 8004c62:	687b      	ldr	r3, [r7, #4]
- 8004c64:	681b      	ldr	r3, [r3, #0]
- 8004c66:	430a      	orrs	r2, r1
- 8004c68:	605a      	str	r2, [r3, #4]
- 8004c6a:	e007      	b.n	8004c7c <ADC_Init+0x170>
-  }
-  else
-  {
-    /* Disable the selected ADC regular discontinuous mode */
-    hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN);
- 8004c6c:	687b      	ldr	r3, [r7, #4]
- 8004c6e:	681b      	ldr	r3, [r3, #0]
- 8004c70:	685a      	ldr	r2, [r3, #4]
- 8004c72:	687b      	ldr	r3, [r7, #4]
- 8004c74:	681b      	ldr	r3, [r3, #0]
- 8004c76:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
- 8004c7a:	605a      	str	r2, [r3, #4]
-  }
-  
-  /* Set ADC number of conversion */
-  hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
- 8004c7c:	687b      	ldr	r3, [r7, #4]
- 8004c7e:	681b      	ldr	r3, [r3, #0]
- 8004c80:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8004c82:	687b      	ldr	r3, [r7, #4]
- 8004c84:	681b      	ldr	r3, [r3, #0]
- 8004c86:	f422 0270 	bic.w	r2, r2, #15728640	; 0xf00000
- 8004c8a:	62da      	str	r2, [r3, #44]	; 0x2c
-  hadc->Instance->SQR1 |=  ADC_SQR1(hadc->Init.NbrOfConversion);
- 8004c8c:	687b      	ldr	r3, [r7, #4]
- 8004c8e:	681b      	ldr	r3, [r3, #0]
- 8004c90:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
- 8004c92:	687b      	ldr	r3, [r7, #4]
- 8004c94:	69db      	ldr	r3, [r3, #28]
- 8004c96:	3b01      	subs	r3, #1
- 8004c98:	051a      	lsls	r2, r3, #20
- 8004c9a:	687b      	ldr	r3, [r7, #4]
- 8004c9c:	681b      	ldr	r3, [r3, #0]
- 8004c9e:	430a      	orrs	r2, r1
- 8004ca0:	62da      	str	r2, [r3, #44]	; 0x2c
-  
-  /* Enable or disable ADC DMA continuous request */
-  hadc->Instance->CR2 &= ~(ADC_CR2_DDS);
- 8004ca2:	687b      	ldr	r3, [r7, #4]
- 8004ca4:	681b      	ldr	r3, [r3, #0]
- 8004ca6:	689a      	ldr	r2, [r3, #8]
- 8004ca8:	687b      	ldr	r3, [r7, #4]
- 8004caa:	681b      	ldr	r3, [r3, #0]
- 8004cac:	f422 7200 	bic.w	r2, r2, #512	; 0x200
- 8004cb0:	609a      	str	r2, [r3, #8]
-  hadc->Instance->CR2 |= ADC_CR2_DMAContReq((uint32_t)hadc->Init.DMAContinuousRequests);
- 8004cb2:	687b      	ldr	r3, [r7, #4]
- 8004cb4:	681b      	ldr	r3, [r3, #0]
- 8004cb6:	6899      	ldr	r1, [r3, #8]
- 8004cb8:	687b      	ldr	r3, [r7, #4]
- 8004cba:	f893 3030 	ldrb.w	r3, [r3, #48]	; 0x30
- 8004cbe:	025a      	lsls	r2, r3, #9
- 8004cc0:	687b      	ldr	r3, [r7, #4]
- 8004cc2:	681b      	ldr	r3, [r3, #0]
- 8004cc4:	430a      	orrs	r2, r1
- 8004cc6:	609a      	str	r2, [r3, #8]
-  
-  /* Enable or disable ADC end of conversion selection */
-  hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
- 8004cc8:	687b      	ldr	r3, [r7, #4]
- 8004cca:	681b      	ldr	r3, [r3, #0]
- 8004ccc:	689a      	ldr	r2, [r3, #8]
- 8004cce:	687b      	ldr	r3, [r7, #4]
- 8004cd0:	681b      	ldr	r3, [r3, #0]
- 8004cd2:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
- 8004cd6:	609a      	str	r2, [r3, #8]
-  hadc->Instance->CR2 |= ADC_CR2_EOCSelection(hadc->Init.EOCSelection);
- 8004cd8:	687b      	ldr	r3, [r7, #4]
- 8004cda:	681b      	ldr	r3, [r3, #0]
- 8004cdc:	6899      	ldr	r1, [r3, #8]
- 8004cde:	687b      	ldr	r3, [r7, #4]
- 8004ce0:	695b      	ldr	r3, [r3, #20]
- 8004ce2:	029a      	lsls	r2, r3, #10
- 8004ce4:	687b      	ldr	r3, [r7, #4]
- 8004ce6:	681b      	ldr	r3, [r3, #0]
- 8004ce8:	430a      	orrs	r2, r1
- 8004cea:	609a      	str	r2, [r3, #8]
-}
- 8004cec:	bf00      	nop
- 8004cee:	370c      	adds	r7, #12
- 8004cf0:	46bd      	mov	sp, r7
- 8004cf2:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004cf6:	4770      	bx	lr
- 8004cf8:	40012300 	.word	0x40012300
- 8004cfc:	0f000001 	.word	0x0f000001
-
-08004d00 <__NVIC_SetPriorityGrouping>:
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- 8004d00:	b480      	push	{r7}
- 8004d02:	b085      	sub	sp, #20
- 8004d04:	af00      	add	r7, sp, #0
- 8004d06:	6078      	str	r0, [r7, #4]
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
- 8004d08:	687b      	ldr	r3, [r7, #4]
- 8004d0a:	f003 0307 	and.w	r3, r3, #7
- 8004d0e:	60fb      	str	r3, [r7, #12]
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
- 8004d10:	4b0b      	ldr	r3, [pc, #44]	; (8004d40 <__NVIC_SetPriorityGrouping+0x40>)
- 8004d12:	68db      	ldr	r3, [r3, #12]
- 8004d14:	60bb      	str	r3, [r7, #8]
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
- 8004d16:	68ba      	ldr	r2, [r7, #8]
- 8004d18:	f64f 03ff 	movw	r3, #63743	; 0xf8ff
- 8004d1c:	4013      	ands	r3, r2
- 8004d1e:	60bb      	str	r3, [r7, #8]
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
- 8004d20:	68fb      	ldr	r3, [r7, #12]
- 8004d22:	021a      	lsls	r2, r3, #8
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- 8004d24:	68bb      	ldr	r3, [r7, #8]
- 8004d26:	431a      	orrs	r2, r3
-  reg_value  =  (reg_value                                   |
- 8004d28:	4b06      	ldr	r3, [pc, #24]	; (8004d44 <__NVIC_SetPriorityGrouping+0x44>)
- 8004d2a:	4313      	orrs	r3, r2
- 8004d2c:	60bb      	str	r3, [r7, #8]
-  SCB->AIRCR =  reg_value;
- 8004d2e:	4a04      	ldr	r2, [pc, #16]	; (8004d40 <__NVIC_SetPriorityGrouping+0x40>)
- 8004d30:	68bb      	ldr	r3, [r7, #8]
- 8004d32:	60d3      	str	r3, [r2, #12]
-}
- 8004d34:	bf00      	nop
- 8004d36:	3714      	adds	r7, #20
- 8004d38:	46bd      	mov	sp, r7
- 8004d3a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004d3e:	4770      	bx	lr
- 8004d40:	e000ed00 	.word	0xe000ed00
- 8004d44:	05fa0000 	.word	0x05fa0000
-
-08004d48 <__NVIC_GetPriorityGrouping>:
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
- 8004d48:	b480      	push	{r7}
- 8004d4a:	af00      	add	r7, sp, #0
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
- 8004d4c:	4b04      	ldr	r3, [pc, #16]	; (8004d60 <__NVIC_GetPriorityGrouping+0x18>)
- 8004d4e:	68db      	ldr	r3, [r3, #12]
- 8004d50:	0a1b      	lsrs	r3, r3, #8
- 8004d52:	f003 0307 	and.w	r3, r3, #7
-}
- 8004d56:	4618      	mov	r0, r3
- 8004d58:	46bd      	mov	sp, r7
- 8004d5a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004d5e:	4770      	bx	lr
- 8004d60:	e000ed00 	.word	0xe000ed00
-
-08004d64 <__NVIC_EnableIRQ>:
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- 8004d64:	b480      	push	{r7}
- 8004d66:	b083      	sub	sp, #12
- 8004d68:	af00      	add	r7, sp, #0
- 8004d6a:	4603      	mov	r3, r0
- 8004d6c:	71fb      	strb	r3, [r7, #7]
-  if ((int32_t)(IRQn) >= 0)
- 8004d6e:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 8004d72:	2b00      	cmp	r3, #0
- 8004d74:	db0b      	blt.n	8004d8e <__NVIC_EnableIRQ+0x2a>
-  {
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- 8004d76:	79fb      	ldrb	r3, [r7, #7]
- 8004d78:	f003 021f 	and.w	r2, r3, #31
- 8004d7c:	4907      	ldr	r1, [pc, #28]	; (8004d9c <__NVIC_EnableIRQ+0x38>)
- 8004d7e:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 8004d82:	095b      	lsrs	r3, r3, #5
- 8004d84:	2001      	movs	r0, #1
- 8004d86:	fa00 f202 	lsl.w	r2, r0, r2
- 8004d8a:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
-  }
-}
- 8004d8e:	bf00      	nop
- 8004d90:	370c      	adds	r7, #12
- 8004d92:	46bd      	mov	sp, r7
- 8004d94:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004d98:	4770      	bx	lr
- 8004d9a:	bf00      	nop
- 8004d9c:	e000e100 	.word	0xe000e100
-
-08004da0 <__NVIC_SetPriority>:
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- 8004da0:	b480      	push	{r7}
- 8004da2:	b083      	sub	sp, #12
- 8004da4:	af00      	add	r7, sp, #0
- 8004da6:	4603      	mov	r3, r0
- 8004da8:	6039      	str	r1, [r7, #0]
- 8004daa:	71fb      	strb	r3, [r7, #7]
-  if ((int32_t)(IRQn) >= 0)
- 8004dac:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 8004db0:	2b00      	cmp	r3, #0
- 8004db2:	db0a      	blt.n	8004dca <__NVIC_SetPriority+0x2a>
-  {
-    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 8004db4:	683b      	ldr	r3, [r7, #0]
- 8004db6:	b2da      	uxtb	r2, r3
- 8004db8:	490c      	ldr	r1, [pc, #48]	; (8004dec <__NVIC_SetPriority+0x4c>)
- 8004dba:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 8004dbe:	0112      	lsls	r2, r2, #4
- 8004dc0:	b2d2      	uxtb	r2, r2
- 8004dc2:	440b      	add	r3, r1
- 8004dc4:	f883 2300 	strb.w	r2, [r3, #768]	; 0x300
-  }
-  else
-  {
-    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
- 8004dc8:	e00a      	b.n	8004de0 <__NVIC_SetPriority+0x40>
-    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 8004dca:	683b      	ldr	r3, [r7, #0]
- 8004dcc:	b2da      	uxtb	r2, r3
- 8004dce:	4908      	ldr	r1, [pc, #32]	; (8004df0 <__NVIC_SetPriority+0x50>)
- 8004dd0:	79fb      	ldrb	r3, [r7, #7]
- 8004dd2:	f003 030f 	and.w	r3, r3, #15
- 8004dd6:	3b04      	subs	r3, #4
- 8004dd8:	0112      	lsls	r2, r2, #4
- 8004dda:	b2d2      	uxtb	r2, r2
- 8004ddc:	440b      	add	r3, r1
- 8004dde:	761a      	strb	r2, [r3, #24]
-}
- 8004de0:	bf00      	nop
- 8004de2:	370c      	adds	r7, #12
- 8004de4:	46bd      	mov	sp, r7
- 8004de6:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004dea:	4770      	bx	lr
- 8004dec:	e000e100 	.word	0xe000e100
- 8004df0:	e000ed00 	.word	0xe000ed00
-
-08004df4 <NVIC_EncodePriority>:
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- 8004df4:	b480      	push	{r7}
- 8004df6:	b089      	sub	sp, #36	; 0x24
- 8004df8:	af00      	add	r7, sp, #0
- 8004dfa:	60f8      	str	r0, [r7, #12]
- 8004dfc:	60b9      	str	r1, [r7, #8]
- 8004dfe:	607a      	str	r2, [r7, #4]
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
- 8004e00:	68fb      	ldr	r3, [r7, #12]
- 8004e02:	f003 0307 	and.w	r3, r3, #7
- 8004e06:	61fb      	str	r3, [r7, #28]
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- 8004e08:	69fb      	ldr	r3, [r7, #28]
- 8004e0a:	f1c3 0307 	rsb	r3, r3, #7
- 8004e0e:	2b04      	cmp	r3, #4
- 8004e10:	bf28      	it	cs
- 8004e12:	2304      	movcs	r3, #4
- 8004e14:	61bb      	str	r3, [r7, #24]
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
- 8004e16:	69fb      	ldr	r3, [r7, #28]
- 8004e18:	3304      	adds	r3, #4
- 8004e1a:	2b06      	cmp	r3, #6
- 8004e1c:	d902      	bls.n	8004e24 <NVIC_EncodePriority+0x30>
- 8004e1e:	69fb      	ldr	r3, [r7, #28]
- 8004e20:	3b03      	subs	r3, #3
- 8004e22:	e000      	b.n	8004e26 <NVIC_EncodePriority+0x32>
- 8004e24:	2300      	movs	r3, #0
- 8004e26:	617b      	str	r3, [r7, #20]
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 8004e28:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
- 8004e2c:	69bb      	ldr	r3, [r7, #24]
- 8004e2e:	fa02 f303 	lsl.w	r3, r2, r3
- 8004e32:	43da      	mvns	r2, r3
- 8004e34:	68bb      	ldr	r3, [r7, #8]
- 8004e36:	401a      	ands	r2, r3
- 8004e38:	697b      	ldr	r3, [r7, #20]
- 8004e3a:	409a      	lsls	r2, r3
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
- 8004e3c:	f04f 31ff 	mov.w	r1, #4294967295	; 0xffffffff
- 8004e40:	697b      	ldr	r3, [r7, #20]
- 8004e42:	fa01 f303 	lsl.w	r3, r1, r3
- 8004e46:	43d9      	mvns	r1, r3
- 8004e48:	687b      	ldr	r3, [r7, #4]
- 8004e4a:	400b      	ands	r3, r1
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 8004e4c:	4313      	orrs	r3, r2
-         );
-}
- 8004e4e:	4618      	mov	r0, r3
- 8004e50:	3724      	adds	r7, #36	; 0x24
- 8004e52:	46bd      	mov	sp, r7
- 8004e54:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004e58:	4770      	bx	lr
-
-08004e5a <HAL_NVIC_SetPriorityGrouping>:
-  * @note   When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. 
-  *         The pending IRQ priority will be managed only by the subpriority. 
-  * @retval None
-  */
-void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- 8004e5a:	b580      	push	{r7, lr}
- 8004e5c:	b082      	sub	sp, #8
- 8004e5e:	af00      	add	r7, sp, #0
- 8004e60:	6078      	str	r0, [r7, #4]
-  /* Check the parameters */
-  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
-  
-  /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
-  NVIC_SetPriorityGrouping(PriorityGroup);
- 8004e62:	6878      	ldr	r0, [r7, #4]
- 8004e64:	f7ff ff4c 	bl	8004d00 <__NVIC_SetPriorityGrouping>
-}
- 8004e68:	bf00      	nop
- 8004e6a:	3708      	adds	r7, #8
- 8004e6c:	46bd      	mov	sp, r7
- 8004e6e:	bd80      	pop	{r7, pc}
-
-08004e70 <HAL_NVIC_SetPriority>:
-  *         This parameter can be a value between 0 and 15
-  *         A lower priority value indicates a higher priority.          
-  * @retval None
-  */
-void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
-{ 
- 8004e70:	b580      	push	{r7, lr}
- 8004e72:	b086      	sub	sp, #24
- 8004e74:	af00      	add	r7, sp, #0
- 8004e76:	4603      	mov	r3, r0
- 8004e78:	60b9      	str	r1, [r7, #8]
- 8004e7a:	607a      	str	r2, [r7, #4]
- 8004e7c:	73fb      	strb	r3, [r7, #15]
-  uint32_t prioritygroup = 0x00;
- 8004e7e:	2300      	movs	r3, #0
- 8004e80:	617b      	str	r3, [r7, #20]
-  
-  /* Check the parameters */
-  assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
-  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
-  
-  prioritygroup = NVIC_GetPriorityGrouping();
- 8004e82:	f7ff ff61 	bl	8004d48 <__NVIC_GetPriorityGrouping>
- 8004e86:	6178      	str	r0, [r7, #20]
-  
-  NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
- 8004e88:	687a      	ldr	r2, [r7, #4]
- 8004e8a:	68b9      	ldr	r1, [r7, #8]
- 8004e8c:	6978      	ldr	r0, [r7, #20]
- 8004e8e:	f7ff ffb1 	bl	8004df4 <NVIC_EncodePriority>
- 8004e92:	4602      	mov	r2, r0
- 8004e94:	f997 300f 	ldrsb.w	r3, [r7, #15]
- 8004e98:	4611      	mov	r1, r2
- 8004e9a:	4618      	mov	r0, r3
- 8004e9c:	f7ff ff80 	bl	8004da0 <__NVIC_SetPriority>
-}
- 8004ea0:	bf00      	nop
- 8004ea2:	3718      	adds	r7, #24
- 8004ea4:	46bd      	mov	sp, r7
- 8004ea6:	bd80      	pop	{r7, pc}
-
-08004ea8 <HAL_NVIC_EnableIRQ>:
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
-  * @retval None
-  */
-void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- 8004ea8:	b580      	push	{r7, lr}
- 8004eaa:	b082      	sub	sp, #8
- 8004eac:	af00      	add	r7, sp, #0
- 8004eae:	4603      	mov	r3, r0
- 8004eb0:	71fb      	strb	r3, [r7, #7]
-  /* Check the parameters */
-  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-  
-  /* Enable interrupt */
-  NVIC_EnableIRQ(IRQn);
- 8004eb2:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 8004eb6:	4618      	mov	r0, r3
- 8004eb8:	f7ff ff54 	bl	8004d64 <__NVIC_EnableIRQ>
-}
- 8004ebc:	bf00      	nop
- 8004ebe:	3708      	adds	r7, #8
- 8004ec0:	46bd      	mov	sp, r7
- 8004ec2:	bd80      	pop	{r7, pc}
-
-08004ec4 <HAL_DAC_Init>:
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
-{ 
- 8004ec4:	b580      	push	{r7, lr}
- 8004ec6:	b082      	sub	sp, #8
- 8004ec8:	af00      	add	r7, sp, #0
- 8004eca:	6078      	str	r0, [r7, #4]
-  /* Check DAC handle */
-  if(hdac == NULL)
- 8004ecc:	687b      	ldr	r3, [r7, #4]
- 8004ece:	2b00      	cmp	r3, #0
- 8004ed0:	d101      	bne.n	8004ed6 <HAL_DAC_Init+0x12>
-  {
-     return HAL_ERROR;
- 8004ed2:	2301      	movs	r3, #1
- 8004ed4:	e014      	b.n	8004f00 <HAL_DAC_Init+0x3c>
-  }
-  /* Check the parameters */
-  assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
-  
-  if(hdac->State == HAL_DAC_STATE_RESET)
- 8004ed6:	687b      	ldr	r3, [r7, #4]
- 8004ed8:	791b      	ldrb	r3, [r3, #4]
- 8004eda:	b2db      	uxtb	r3, r3
- 8004edc:	2b00      	cmp	r3, #0
- 8004ede:	d105      	bne.n	8004eec <HAL_DAC_Init+0x28>
-    {
-      hdac->MspInitCallback               = HAL_DAC_MspInit;
-    }
-#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
-    /* Allocate lock resource and initialize it */
-    hdac->Lock = HAL_UNLOCKED; 
- 8004ee0:	687b      	ldr	r3, [r7, #4]
- 8004ee2:	2200      	movs	r2, #0
- 8004ee4:	715a      	strb	r2, [r3, #5]
-#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
-    /* Init the low level hardware */
-    hdac->MspInitCallback(hdac);
-#else
-    /* Init the low level hardware */
-    HAL_DAC_MspInit(hdac);
- 8004ee6:	6878      	ldr	r0, [r7, #4]
- 8004ee8:	f7fe fd4a 	bl	8003980 <HAL_DAC_MspInit>
-#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
-  }
-  
-  /* Initialize the DAC state*/
-  hdac->State = HAL_DAC_STATE_BUSY;
- 8004eec:	687b      	ldr	r3, [r7, #4]
- 8004eee:	2202      	movs	r2, #2
- 8004ef0:	711a      	strb	r2, [r3, #4]
-  
-  /* Set DAC error code to none */
-  hdac->ErrorCode = HAL_DAC_ERROR_NONE;
- 8004ef2:	687b      	ldr	r3, [r7, #4]
- 8004ef4:	2200      	movs	r2, #0
- 8004ef6:	611a      	str	r2, [r3, #16]
-  
-  /* Initialize the DAC state*/
-  hdac->State = HAL_DAC_STATE_READY;
- 8004ef8:	687b      	ldr	r3, [r7, #4]
- 8004efa:	2201      	movs	r2, #1
- 8004efc:	711a      	strb	r2, [r3, #4]
-  
-  /* Return function status */
-  return HAL_OK;
- 8004efe:	2300      	movs	r3, #0
-}
- 8004f00:	4618      	mov	r0, r3
- 8004f02:	3708      	adds	r7, #8
- 8004f04:	46bd      	mov	sp, r7
- 8004f06:	bd80      	pop	{r7, pc}
-
-08004f08 <HAL_DAC_IRQHandler>:
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
-{
- 8004f08:	b580      	push	{r7, lr}
- 8004f0a:	b082      	sub	sp, #8
- 8004f0c:	af00      	add	r7, sp, #0
- 8004f0e:	6078      	str	r0, [r7, #4]
-  /* Check underrun channel 1 flag */
-  if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
- 8004f10:	687b      	ldr	r3, [r7, #4]
- 8004f12:	681b      	ldr	r3, [r3, #0]
- 8004f14:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 8004f16:	f403 5300 	and.w	r3, r3, #8192	; 0x2000
- 8004f1a:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
- 8004f1e:	d118      	bne.n	8004f52 <HAL_DAC_IRQHandler+0x4a>
-  {
-    /* Change DAC state to error state */
-    hdac->State = HAL_DAC_STATE_ERROR;
- 8004f20:	687b      	ldr	r3, [r7, #4]
- 8004f22:	2204      	movs	r2, #4
- 8004f24:	711a      	strb	r2, [r3, #4]
-    
-    /* Set DAC error code to channel1 DMA underrun error */
-    hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
- 8004f26:	687b      	ldr	r3, [r7, #4]
- 8004f28:	691b      	ldr	r3, [r3, #16]
- 8004f2a:	f043 0201 	orr.w	r2, r3, #1
- 8004f2e:	687b      	ldr	r3, [r7, #4]
- 8004f30:	611a      	str	r2, [r3, #16]
-    
-    /* Clear the underrun flag */
-    __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
- 8004f32:	687b      	ldr	r3, [r7, #4]
- 8004f34:	681b      	ldr	r3, [r3, #0]
- 8004f36:	f44f 5200 	mov.w	r2, #8192	; 0x2000
- 8004f3a:	635a      	str	r2, [r3, #52]	; 0x34
-    
-    /* Disable the selected DAC channel1 DMA request */
-    hdac->Instance->CR &= ~DAC_CR_DMAEN1;
- 8004f3c:	687b      	ldr	r3, [r7, #4]
- 8004f3e:	681b      	ldr	r3, [r3, #0]
- 8004f40:	681a      	ldr	r2, [r3, #0]
- 8004f42:	687b      	ldr	r3, [r7, #4]
- 8004f44:	681b      	ldr	r3, [r3, #0]
- 8004f46:	f422 5280 	bic.w	r2, r2, #4096	; 0x1000
- 8004f4a:	601a      	str	r2, [r3, #0]
-    
-    /* Error callback */ 
-#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
-      hdac->DMAUnderrunCallbackCh1(hdac);
-#else
-    HAL_DAC_DMAUnderrunCallbackCh1(hdac);
- 8004f4c:	6878      	ldr	r0, [r7, #4]
- 8004f4e:	f000 f825 	bl	8004f9c <HAL_DAC_DMAUnderrunCallbackCh1>
-#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
-  }
-  /* Check underrun channel 2 flag */
-  if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
- 8004f52:	687b      	ldr	r3, [r7, #4]
- 8004f54:	681b      	ldr	r3, [r3, #0]
- 8004f56:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 8004f58:	f003 5300 	and.w	r3, r3, #536870912	; 0x20000000
- 8004f5c:	f1b3 5f00 	cmp.w	r3, #536870912	; 0x20000000
- 8004f60:	d118      	bne.n	8004f94 <HAL_DAC_IRQHandler+0x8c>
-  {
-    /* Change DAC state to error state */
-    hdac->State = HAL_DAC_STATE_ERROR;
- 8004f62:	687b      	ldr	r3, [r7, #4]
- 8004f64:	2204      	movs	r2, #4
- 8004f66:	711a      	strb	r2, [r3, #4]
-    
-    /* Set DAC error code to channel2 DMA underrun error */
-    hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
- 8004f68:	687b      	ldr	r3, [r7, #4]
- 8004f6a:	691b      	ldr	r3, [r3, #16]
- 8004f6c:	f043 0202 	orr.w	r2, r3, #2
- 8004f70:	687b      	ldr	r3, [r7, #4]
- 8004f72:	611a      	str	r2, [r3, #16]
-    
-    /* Clear the underrun flag */
-    __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
- 8004f74:	687b      	ldr	r3, [r7, #4]
- 8004f76:	681b      	ldr	r3, [r3, #0]
- 8004f78:	f04f 5200 	mov.w	r2, #536870912	; 0x20000000
- 8004f7c:	635a      	str	r2, [r3, #52]	; 0x34
-    
-    /* Disable the selected DAC channel1 DMA request */
-    hdac->Instance->CR &= ~DAC_CR_DMAEN2;
- 8004f7e:	687b      	ldr	r3, [r7, #4]
- 8004f80:	681b      	ldr	r3, [r3, #0]
- 8004f82:	681a      	ldr	r2, [r3, #0]
- 8004f84:	687b      	ldr	r3, [r7, #4]
- 8004f86:	681b      	ldr	r3, [r3, #0]
- 8004f88:	f022 5280 	bic.w	r2, r2, #268435456	; 0x10000000
- 8004f8c:	601a      	str	r2, [r3, #0]
-    
-    /* Error callback */ 
-#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
-      hdac->DMAUnderrunCallbackCh2(hdac);
-#else
-    HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
- 8004f8e:	6878      	ldr	r0, [r7, #4]
- 8004f90:	f000 f85b 	bl	800504a <HAL_DACEx_DMAUnderrunCallbackCh2>
-#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
-  }
-}
- 8004f94:	bf00      	nop
- 8004f96:	3708      	adds	r7, #8
- 8004f98:	46bd      	mov	sp, r7
- 8004f9a:	bd80      	pop	{r7, pc}
-
-08004f9c <HAL_DAC_DMAUnderrunCallbackCh1>:
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
-{
- 8004f9c:	b480      	push	{r7}
- 8004f9e:	b083      	sub	sp, #12
- 8004fa0:	af00      	add	r7, sp, #0
- 8004fa2:	6078      	str	r0, [r7, #4]
-  UNUSED(hdac);
- 
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
-   */
-}
- 8004fa4:	bf00      	nop
- 8004fa6:	370c      	adds	r7, #12
- 8004fa8:	46bd      	mov	sp, r7
- 8004faa:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8004fae:	4770      	bx	lr
-
-08004fb0 <HAL_DAC_ConfigChannel>:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
-{
- 8004fb0:	b480      	push	{r7}
- 8004fb2:	b087      	sub	sp, #28
- 8004fb4:	af00      	add	r7, sp, #0
- 8004fb6:	60f8      	str	r0, [r7, #12]
- 8004fb8:	60b9      	str	r1, [r7, #8]
- 8004fba:	607a      	str	r2, [r7, #4]
-  uint32_t tmpreg1 = 0, tmpreg2 = 0;
- 8004fbc:	2300      	movs	r3, #0
- 8004fbe:	617b      	str	r3, [r7, #20]
- 8004fc0:	2300      	movs	r3, #0
- 8004fc2:	613b      	str	r3, [r7, #16]
-  assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
-  assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Process locked */
-  __HAL_LOCK(hdac);
- 8004fc4:	68fb      	ldr	r3, [r7, #12]
- 8004fc6:	795b      	ldrb	r3, [r3, #5]
- 8004fc8:	2b01      	cmp	r3, #1
- 8004fca:	d101      	bne.n	8004fd0 <HAL_DAC_ConfigChannel+0x20>
- 8004fcc:	2302      	movs	r3, #2
- 8004fce:	e036      	b.n	800503e <HAL_DAC_ConfigChannel+0x8e>
- 8004fd0:	68fb      	ldr	r3, [r7, #12]
- 8004fd2:	2201      	movs	r2, #1
- 8004fd4:	715a      	strb	r2, [r3, #5]
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
- 8004fd6:	68fb      	ldr	r3, [r7, #12]
- 8004fd8:	2202      	movs	r2, #2
- 8004fda:	711a      	strb	r2, [r3, #4]
-  
-  /* Get the DAC CR value */
-  tmpreg1 = hdac->Instance->CR;
- 8004fdc:	68fb      	ldr	r3, [r7, #12]
- 8004fde:	681b      	ldr	r3, [r3, #0]
- 8004fe0:	681b      	ldr	r3, [r3, #0]
- 8004fe2:	617b      	str	r3, [r7, #20]
-  /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
-  tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
- 8004fe4:	f640 72fe 	movw	r2, #4094	; 0xffe
- 8004fe8:	687b      	ldr	r3, [r7, #4]
- 8004fea:	fa02 f303 	lsl.w	r3, r2, r3
- 8004fee:	43db      	mvns	r3, r3
- 8004ff0:	697a      	ldr	r2, [r7, #20]
- 8004ff2:	4013      	ands	r3, r2
- 8004ff4:	617b      	str	r3, [r7, #20]
-  /* Configure for the selected DAC channel: buffer output, trigger */
-  /* Set TSELx and TENx bits according to DAC_Trigger value */
-  /* Set BOFFx bit according to DAC_OutputBuffer value */   
-  tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
- 8004ff6:	68bb      	ldr	r3, [r7, #8]
- 8004ff8:	681a      	ldr	r2, [r3, #0]
- 8004ffa:	68bb      	ldr	r3, [r7, #8]
- 8004ffc:	685b      	ldr	r3, [r3, #4]
- 8004ffe:	4313      	orrs	r3, r2
- 8005000:	613b      	str	r3, [r7, #16]
-  /* Calculate CR register value depending on DAC_Channel */
-  tmpreg1 |= tmpreg2 << Channel;
- 8005002:	693a      	ldr	r2, [r7, #16]
- 8005004:	687b      	ldr	r3, [r7, #4]
- 8005006:	fa02 f303 	lsl.w	r3, r2, r3
- 800500a:	697a      	ldr	r2, [r7, #20]
- 800500c:	4313      	orrs	r3, r2
- 800500e:	617b      	str	r3, [r7, #20]
-  /* Write to DAC CR */
-  hdac->Instance->CR = tmpreg1;
- 8005010:	68fb      	ldr	r3, [r7, #12]
- 8005012:	681b      	ldr	r3, [r3, #0]
- 8005014:	697a      	ldr	r2, [r7, #20]
- 8005016:	601a      	str	r2, [r3, #0]
-  /* Disable wave generation */
-  hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
- 8005018:	68fb      	ldr	r3, [r7, #12]
- 800501a:	681b      	ldr	r3, [r3, #0]
- 800501c:	6819      	ldr	r1, [r3, #0]
- 800501e:	22c0      	movs	r2, #192	; 0xc0
- 8005020:	687b      	ldr	r3, [r7, #4]
- 8005022:	fa02 f303 	lsl.w	r3, r2, r3
- 8005026:	43da      	mvns	r2, r3
- 8005028:	68fb      	ldr	r3, [r7, #12]
- 800502a:	681b      	ldr	r3, [r3, #0]
- 800502c:	400a      	ands	r2, r1
- 800502e:	601a      	str	r2, [r3, #0]
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
- 8005030:	68fb      	ldr	r3, [r7, #12]
- 8005032:	2201      	movs	r2, #1
- 8005034:	711a      	strb	r2, [r3, #4]
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
- 8005036:	68fb      	ldr	r3, [r7, #12]
- 8005038:	2200      	movs	r2, #0
- 800503a:	715a      	strb	r2, [r3, #5]
-  
-  /* Return function status */
-  return HAL_OK;
- 800503c:	2300      	movs	r3, #0
-}
- 800503e:	4618      	mov	r0, r3
- 8005040:	371c      	adds	r7, #28
- 8005042:	46bd      	mov	sp, r7
- 8005044:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8005048:	4770      	bx	lr
-
-0800504a <HAL_DACEx_DMAUnderrunCallbackCh2>:
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
-{
- 800504a:	b480      	push	{r7}
- 800504c:	b083      	sub	sp, #12
- 800504e:	af00      	add	r7, sp, #0
- 8005050:	6078      	str	r0, [r7, #4]
-  UNUSED(hdac);
- 
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
-   */
-}
- 8005052:	bf00      	nop
- 8005054:	370c      	adds	r7, #12
- 8005056:	46bd      	mov	sp, r7
- 8005058:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800505c:	4770      	bx	lr
-	...
-
-08005060 <HAL_DMA_Init>:
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Stream.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
-{
- 8005060:	b580      	push	{r7, lr}
- 8005062:	b086      	sub	sp, #24
- 8005064:	af00      	add	r7, sp, #0
- 8005066:	6078      	str	r0, [r7, #4]
-  uint32_t tmp = 0U;
- 8005068:	2300      	movs	r3, #0
- 800506a:	617b      	str	r3, [r7, #20]
-  uint32_t tickstart = HAL_GetTick();
- 800506c:	f7ff fa40 	bl	80044f0 <HAL_GetTick>
- 8005070:	6138      	str	r0, [r7, #16]
-  DMA_Base_Registers *regs;
-
-  /* Check the DMA peripheral state */
-  if(hdma == NULL)
- 8005072:	687b      	ldr	r3, [r7, #4]
- 8005074:	2b00      	cmp	r3, #0
- 8005076:	d101      	bne.n	800507c <HAL_DMA_Init+0x1c>
-  {
-    return HAL_ERROR;
- 8005078:	2301      	movs	r3, #1
- 800507a:	e099      	b.n	80051b0 <HAL_DMA_Init+0x150>
-    assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
-    assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
-  }
-  
-  /* Allocate lock resource */
-  __HAL_UNLOCK(hdma);
- 800507c:	687b      	ldr	r3, [r7, #4]
- 800507e:	2200      	movs	r2, #0
- 8005080:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
-
-  /* Change DMA peripheral state */
-  hdma->State = HAL_DMA_STATE_BUSY;
- 8005084:	687b      	ldr	r3, [r7, #4]
- 8005086:	2202      	movs	r2, #2
- 8005088:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
-  
-  /* Disable the peripheral */
-  __HAL_DMA_DISABLE(hdma);
- 800508c:	687b      	ldr	r3, [r7, #4]
- 800508e:	681b      	ldr	r3, [r3, #0]
- 8005090:	681a      	ldr	r2, [r3, #0]
- 8005092:	687b      	ldr	r3, [r7, #4]
- 8005094:	681b      	ldr	r3, [r3, #0]
- 8005096:	f022 0201 	bic.w	r2, r2, #1
- 800509a:	601a      	str	r2, [r3, #0]
-  
-  /* Check if the DMA Stream is effectively disabled */
-  while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
- 800509c:	e00f      	b.n	80050be <HAL_DMA_Init+0x5e>
-  {
-    /* Check for the Timeout */
-    if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
- 800509e:	f7ff fa27 	bl	80044f0 <HAL_GetTick>
- 80050a2:	4602      	mov	r2, r0
- 80050a4:	693b      	ldr	r3, [r7, #16]
- 80050a6:	1ad3      	subs	r3, r2, r3
- 80050a8:	2b05      	cmp	r3, #5
- 80050aa:	d908      	bls.n	80050be <HAL_DMA_Init+0x5e>
-    {
-      /* Update error code */
-      hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
- 80050ac:	687b      	ldr	r3, [r7, #4]
- 80050ae:	2220      	movs	r2, #32
- 80050b0:	655a      	str	r2, [r3, #84]	; 0x54
-      
-      /* Change the DMA state */
-      hdma->State = HAL_DMA_STATE_TIMEOUT;
- 80050b2:	687b      	ldr	r3, [r7, #4]
- 80050b4:	2203      	movs	r2, #3
- 80050b6:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
-      
-      return HAL_TIMEOUT;
- 80050ba:	2303      	movs	r3, #3
- 80050bc:	e078      	b.n	80051b0 <HAL_DMA_Init+0x150>
-  while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
- 80050be:	687b      	ldr	r3, [r7, #4]
- 80050c0:	681b      	ldr	r3, [r3, #0]
- 80050c2:	681b      	ldr	r3, [r3, #0]
- 80050c4:	f003 0301 	and.w	r3, r3, #1
- 80050c8:	2b00      	cmp	r3, #0
- 80050ca:	d1e8      	bne.n	800509e <HAL_DMA_Init+0x3e>
-    }
-  }
-  
-  /* Get the CR register value */
-  tmp = hdma->Instance->CR;
- 80050cc:	687b      	ldr	r3, [r7, #4]
- 80050ce:	681b      	ldr	r3, [r3, #0]
- 80050d0:	681b      	ldr	r3, [r3, #0]
- 80050d2:	617b      	str	r3, [r7, #20]
-
-  /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
-  tmp &= ((uint32_t)~(DMA_SxCR_CHSEL | DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
- 80050d4:	697a      	ldr	r2, [r7, #20]
- 80050d6:	4b38      	ldr	r3, [pc, #224]	; (80051b8 <HAL_DMA_Init+0x158>)
- 80050d8:	4013      	ands	r3, r2
- 80050da:	617b      	str	r3, [r7, #20]
-                      DMA_SxCR_PL    | DMA_SxCR_MSIZE  | DMA_SxCR_PSIZE  | \
-                      DMA_SxCR_MINC  | DMA_SxCR_PINC   | DMA_SxCR_CIRC   | \
-                      DMA_SxCR_DIR   | DMA_SxCR_CT     | DMA_SxCR_DBM));
-
-  /* Prepare the DMA Stream configuration */
-  tmp |=  hdma->Init.Channel             | hdma->Init.Direction        |
- 80050dc:	687b      	ldr	r3, [r7, #4]
- 80050de:	685a      	ldr	r2, [r3, #4]
- 80050e0:	687b      	ldr	r3, [r7, #4]
- 80050e2:	689b      	ldr	r3, [r3, #8]
- 80050e4:	431a      	orrs	r2, r3
-          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
- 80050e6:	687b      	ldr	r3, [r7, #4]
- 80050e8:	68db      	ldr	r3, [r3, #12]
-  tmp |=  hdma->Init.Channel             | hdma->Init.Direction        |
- 80050ea:	431a      	orrs	r2, r3
-          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
- 80050ec:	687b      	ldr	r3, [r7, #4]
- 80050ee:	691b      	ldr	r3, [r3, #16]
- 80050f0:	431a      	orrs	r2, r3
-          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 80050f2:	687b      	ldr	r3, [r7, #4]
- 80050f4:	695b      	ldr	r3, [r3, #20]
-          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
- 80050f6:	431a      	orrs	r2, r3
-          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 80050f8:	687b      	ldr	r3, [r7, #4]
- 80050fa:	699b      	ldr	r3, [r3, #24]
- 80050fc:	431a      	orrs	r2, r3
-          hdma->Init.Mode                | hdma->Init.Priority;
- 80050fe:	687b      	ldr	r3, [r7, #4]
- 8005100:	69db      	ldr	r3, [r3, #28]
-          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 8005102:	431a      	orrs	r2, r3
-          hdma->Init.Mode                | hdma->Init.Priority;
- 8005104:	687b      	ldr	r3, [r7, #4]
- 8005106:	6a1b      	ldr	r3, [r3, #32]
- 8005108:	4313      	orrs	r3, r2
-  tmp |=  hdma->Init.Channel             | hdma->Init.Direction        |
- 800510a:	697a      	ldr	r2, [r7, #20]
- 800510c:	4313      	orrs	r3, r2
- 800510e:	617b      	str	r3, [r7, #20]
-
-  /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
-  if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
- 8005110:	687b      	ldr	r3, [r7, #4]
- 8005112:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8005114:	2b04      	cmp	r3, #4
- 8005116:	d107      	bne.n	8005128 <HAL_DMA_Init+0xc8>
-  {
-    /* Get memory burst and peripheral burst */
-    tmp |=  hdma->Init.MemBurst | hdma->Init.PeriphBurst;
- 8005118:	687b      	ldr	r3, [r7, #4]
- 800511a:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 800511c:	687b      	ldr	r3, [r7, #4]
- 800511e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8005120:	4313      	orrs	r3, r2
- 8005122:	697a      	ldr	r2, [r7, #20]
- 8005124:	4313      	orrs	r3, r2
- 8005126:	617b      	str	r3, [r7, #20]
-  }
-  
-  /* Write to DMA Stream CR register */
-  hdma->Instance->CR = tmp;  
- 8005128:	687b      	ldr	r3, [r7, #4]
- 800512a:	681b      	ldr	r3, [r3, #0]
- 800512c:	697a      	ldr	r2, [r7, #20]
- 800512e:	601a      	str	r2, [r3, #0]
-
-  /* Get the FCR register value */
-  tmp = hdma->Instance->FCR;
- 8005130:	687b      	ldr	r3, [r7, #4]
- 8005132:	681b      	ldr	r3, [r3, #0]
- 8005134:	695b      	ldr	r3, [r3, #20]
- 8005136:	617b      	str	r3, [r7, #20]
-
-  /* Clear Direct mode and FIFO threshold bits */
-  tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
- 8005138:	697b      	ldr	r3, [r7, #20]
- 800513a:	f023 0307 	bic.w	r3, r3, #7
- 800513e:	617b      	str	r3, [r7, #20]
-
-  /* Prepare the DMA Stream FIFO configuration */
-  tmp |= hdma->Init.FIFOMode;
- 8005140:	687b      	ldr	r3, [r7, #4]
- 8005142:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8005144:	697a      	ldr	r2, [r7, #20]
- 8005146:	4313      	orrs	r3, r2
- 8005148:	617b      	str	r3, [r7, #20]
-
-  /* The FIFO threshold is not used when the FIFO mode is disabled */
-  if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
- 800514a:	687b      	ldr	r3, [r7, #4]
- 800514c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800514e:	2b04      	cmp	r3, #4
- 8005150:	d117      	bne.n	8005182 <HAL_DMA_Init+0x122>
-  {
-    /* Get the FIFO threshold */
-    tmp |= hdma->Init.FIFOThreshold;
- 8005152:	687b      	ldr	r3, [r7, #4]
- 8005154:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 8005156:	697a      	ldr	r2, [r7, #20]
- 8005158:	4313      	orrs	r3, r2
- 800515a:	617b      	str	r3, [r7, #20]
-    
-    /* Check compatibility between FIFO threshold level and size of the memory burst */
-    /* for INCR4, INCR8, INCR16 bursts */
-    if (hdma->Init.MemBurst != DMA_MBURST_SINGLE)
- 800515c:	687b      	ldr	r3, [r7, #4]
- 800515e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8005160:	2b00      	cmp	r3, #0
- 8005162:	d00e      	beq.n	8005182 <HAL_DMA_Init+0x122>
-    {
-      if (DMA_CheckFifoParam(hdma) != HAL_OK)
- 8005164:	6878      	ldr	r0, [r7, #4]
- 8005166:	f000 f8bd 	bl	80052e4 <DMA_CheckFifoParam>
- 800516a:	4603      	mov	r3, r0
- 800516c:	2b00      	cmp	r3, #0
- 800516e:	d008      	beq.n	8005182 <HAL_DMA_Init+0x122>
-      {
-        /* Update error code */
-        hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
- 8005170:	687b      	ldr	r3, [r7, #4]
- 8005172:	2240      	movs	r2, #64	; 0x40
- 8005174:	655a      	str	r2, [r3, #84]	; 0x54
-        
-        /* Change the DMA state */
-        hdma->State = HAL_DMA_STATE_READY;
- 8005176:	687b      	ldr	r3, [r7, #4]
- 8005178:	2201      	movs	r2, #1
- 800517a:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
-        
-        return HAL_ERROR; 
- 800517e:	2301      	movs	r3, #1
- 8005180:	e016      	b.n	80051b0 <HAL_DMA_Init+0x150>
-      }
-    }
-  }
-  
-  /* Write to DMA Stream FCR */
-  hdma->Instance->FCR = tmp;
- 8005182:	687b      	ldr	r3, [r7, #4]
- 8005184:	681b      	ldr	r3, [r3, #0]
- 8005186:	697a      	ldr	r2, [r7, #20]
- 8005188:	615a      	str	r2, [r3, #20]
-
-  /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
-     DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
-  regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
- 800518a:	6878      	ldr	r0, [r7, #4]
- 800518c:	f000 f874 	bl	8005278 <DMA_CalcBaseAndBitshift>
- 8005190:	4603      	mov	r3, r0
- 8005192:	60fb      	str	r3, [r7, #12]
-  
-  /* Clear all interrupt flags */
-  regs->IFCR = 0x3FU << hdma->StreamIndex;
- 8005194:	687b      	ldr	r3, [r7, #4]
- 8005196:	6ddb      	ldr	r3, [r3, #92]	; 0x5c
- 8005198:	223f      	movs	r2, #63	; 0x3f
- 800519a:	409a      	lsls	r2, r3
- 800519c:	68fb      	ldr	r3, [r7, #12]
- 800519e:	609a      	str	r2, [r3, #8]
-
-  /* Initialize the error code */
-  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
- 80051a0:	687b      	ldr	r3, [r7, #4]
- 80051a2:	2200      	movs	r2, #0
- 80051a4:	655a      	str	r2, [r3, #84]	; 0x54
-                                                                                     
-  /* Initialize the DMA state */
-  hdma->State = HAL_DMA_STATE_READY;
- 80051a6:	687b      	ldr	r3, [r7, #4]
- 80051a8:	2201      	movs	r2, #1
- 80051aa:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
-
-  return HAL_OK;
- 80051ae:	2300      	movs	r3, #0
-}
- 80051b0:	4618      	mov	r0, r3
- 80051b2:	3718      	adds	r7, #24
- 80051b4:	46bd      	mov	sp, r7
- 80051b6:	bd80      	pop	{r7, pc}
- 80051b8:	f010803f 	.word	0xf010803f
-
-080051bc <HAL_DMA_DeInit>:
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Stream.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
-{
- 80051bc:	b580      	push	{r7, lr}
- 80051be:	b084      	sub	sp, #16
- 80051c0:	af00      	add	r7, sp, #0
- 80051c2:	6078      	str	r0, [r7, #4]
-  DMA_Base_Registers *regs;
-
-  /* Check the DMA peripheral state */
-  if(hdma == NULL)
- 80051c4:	687b      	ldr	r3, [r7, #4]
- 80051c6:	2b00      	cmp	r3, #0
- 80051c8:	d101      	bne.n	80051ce <HAL_DMA_DeInit+0x12>
-  {
-    return HAL_ERROR;
- 80051ca:	2301      	movs	r3, #1
- 80051cc:	e050      	b.n	8005270 <HAL_DMA_DeInit+0xb4>
-  }
-  
-  /* Check the DMA peripheral state */
-  if(hdma->State == HAL_DMA_STATE_BUSY)
- 80051ce:	687b      	ldr	r3, [r7, #4]
- 80051d0:	f893 3035 	ldrb.w	r3, [r3, #53]	; 0x35
- 80051d4:	b2db      	uxtb	r3, r3
- 80051d6:	2b02      	cmp	r3, #2
- 80051d8:	d101      	bne.n	80051de <HAL_DMA_DeInit+0x22>
-  {
-    /* Return error status */
-    return HAL_BUSY;
- 80051da:	2302      	movs	r3, #2
- 80051dc:	e048      	b.n	8005270 <HAL_DMA_DeInit+0xb4>
-
-  /* Check the parameters */
-  assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
-
-  /* Disable the selected DMA Streamx */
-  __HAL_DMA_DISABLE(hdma);
- 80051de:	687b      	ldr	r3, [r7, #4]
- 80051e0:	681b      	ldr	r3, [r3, #0]
- 80051e2:	681a      	ldr	r2, [r3, #0]
- 80051e4:	687b      	ldr	r3, [r7, #4]
- 80051e6:	681b      	ldr	r3, [r3, #0]
- 80051e8:	f022 0201 	bic.w	r2, r2, #1
- 80051ec:	601a      	str	r2, [r3, #0]
-
-  /* Reset DMA Streamx control register */
-  hdma->Instance->CR   = 0U;
- 80051ee:	687b      	ldr	r3, [r7, #4]
- 80051f0:	681b      	ldr	r3, [r3, #0]
- 80051f2:	2200      	movs	r2, #0
- 80051f4:	601a      	str	r2, [r3, #0]
-
-  /* Reset DMA Streamx number of data to transfer register */
-  hdma->Instance->NDTR = 0U;
- 80051f6:	687b      	ldr	r3, [r7, #4]
- 80051f8:	681b      	ldr	r3, [r3, #0]
- 80051fa:	2200      	movs	r2, #0
- 80051fc:	605a      	str	r2, [r3, #4]
-
-  /* Reset DMA Streamx peripheral address register */
-  hdma->Instance->PAR  = 0U;
- 80051fe:	687b      	ldr	r3, [r7, #4]
- 8005200:	681b      	ldr	r3, [r3, #0]
- 8005202:	2200      	movs	r2, #0
- 8005204:	609a      	str	r2, [r3, #8]
-
-  /* Reset DMA Streamx memory 0 address register */
-  hdma->Instance->M0AR = 0U;
- 8005206:	687b      	ldr	r3, [r7, #4]
- 8005208:	681b      	ldr	r3, [r3, #0]
- 800520a:	2200      	movs	r2, #0
- 800520c:	60da      	str	r2, [r3, #12]
-  
-  /* Reset DMA Streamx memory 1 address register */
-  hdma->Instance->M1AR = 0U;
- 800520e:	687b      	ldr	r3, [r7, #4]
- 8005210:	681b      	ldr	r3, [r3, #0]
- 8005212:	2200      	movs	r2, #0
- 8005214:	611a      	str	r2, [r3, #16]
-  
-  /* Reset DMA Streamx FIFO control register */
-  hdma->Instance->FCR  = (uint32_t)0x00000021U;
- 8005216:	687b      	ldr	r3, [r7, #4]
- 8005218:	681b      	ldr	r3, [r3, #0]
- 800521a:	2221      	movs	r2, #33	; 0x21
- 800521c:	615a      	str	r2, [r3, #20]
-  
-  /* Get DMA steam Base Address */  
-  regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
- 800521e:	6878      	ldr	r0, [r7, #4]
- 8005220:	f000 f82a 	bl	8005278 <DMA_CalcBaseAndBitshift>
- 8005224:	4603      	mov	r3, r0
- 8005226:	60fb      	str	r3, [r7, #12]
-  
-  /* Clear all interrupt flags at correct offset within the register */
-  regs->IFCR = 0x3FU << hdma->StreamIndex;
- 8005228:	687b      	ldr	r3, [r7, #4]
- 800522a:	6ddb      	ldr	r3, [r3, #92]	; 0x5c
- 800522c:	223f      	movs	r2, #63	; 0x3f
- 800522e:	409a      	lsls	r2, r3
- 8005230:	68fb      	ldr	r3, [r7, #12]
- 8005232:	609a      	str	r2, [r3, #8]
-  
-  /* Clean all callbacks */
-  hdma->XferCpltCallback = NULL;
- 8005234:	687b      	ldr	r3, [r7, #4]
- 8005236:	2200      	movs	r2, #0
- 8005238:	63da      	str	r2, [r3, #60]	; 0x3c
-  hdma->XferHalfCpltCallback = NULL;
- 800523a:	687b      	ldr	r3, [r7, #4]
- 800523c:	2200      	movs	r2, #0
- 800523e:	641a      	str	r2, [r3, #64]	; 0x40
-  hdma->XferM1CpltCallback = NULL;
- 8005240:	687b      	ldr	r3, [r7, #4]
- 8005242:	2200      	movs	r2, #0
- 8005244:	645a      	str	r2, [r3, #68]	; 0x44
-  hdma->XferM1HalfCpltCallback = NULL;
- 8005246:	687b      	ldr	r3, [r7, #4]
- 8005248:	2200      	movs	r2, #0
- 800524a:	649a      	str	r2, [r3, #72]	; 0x48
-  hdma->XferErrorCallback = NULL;
- 800524c:	687b      	ldr	r3, [r7, #4]
- 800524e:	2200      	movs	r2, #0
- 8005250:	64da      	str	r2, [r3, #76]	; 0x4c
-  hdma->XferAbortCallback = NULL;  
- 8005252:	687b      	ldr	r3, [r7, #4]
- 8005254:	2200      	movs	r2, #0
- 8005256:	651a      	str	r2, [r3, #80]	; 0x50
-
-  /* Reset the error code */
-  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
- 8005258:	687b      	ldr	r3, [r7, #4]
- 800525a:	2200      	movs	r2, #0
- 800525c:	655a      	str	r2, [r3, #84]	; 0x54
-
-  /* Reset the DMA state */
-  hdma->State = HAL_DMA_STATE_RESET;
- 800525e:	687b      	ldr	r3, [r7, #4]
- 8005260:	2200      	movs	r2, #0
- 8005262:	f883 2035 	strb.w	r2, [r3, #53]	; 0x35
-
-  /* Release Lock */
-  __HAL_UNLOCK(hdma);
- 8005266:	687b      	ldr	r3, [r7, #4]
- 8005268:	2200      	movs	r2, #0
- 800526a:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
-
-  return HAL_OK;
- 800526e:	2300      	movs	r3, #0
-}
- 8005270:	4618      	mov	r0, r3
- 8005272:	3710      	adds	r7, #16
- 8005274:	46bd      	mov	sp, r7
- 8005276:	bd80      	pop	{r7, pc}
-
-08005278 <DMA_CalcBaseAndBitshift>:
-  * @param  hdma       pointer to a DMA_HandleTypeDef structure that contains
-  *                     the configuration information for the specified DMA Stream. 
-  * @retval Stream base address
-  */
-static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
-{
- 8005278:	b480      	push	{r7}
- 800527a:	b085      	sub	sp, #20
- 800527c:	af00      	add	r7, sp, #0
- 800527e:	6078      	str	r0, [r7, #4]
-  uint32_t stream_number = (((uint32_t)hdma->Instance & 0xFFU) - 16U) / 24U;
- 8005280:	687b      	ldr	r3, [r7, #4]
- 8005282:	681b      	ldr	r3, [r3, #0]
- 8005284:	b2db      	uxtb	r3, r3
- 8005286:	3b10      	subs	r3, #16
- 8005288:	4a13      	ldr	r2, [pc, #76]	; (80052d8 <DMA_CalcBaseAndBitshift+0x60>)
- 800528a:	fba2 2303 	umull	r2, r3, r2, r3
- 800528e:	091b      	lsrs	r3, r3, #4
- 8005290:	60fb      	str	r3, [r7, #12]
-  
-  /* lookup table for necessary bitshift of flags within status registers */
-  static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
-  hdma->StreamIndex = flagBitshiftOffset[stream_number];
- 8005292:	4a12      	ldr	r2, [pc, #72]	; (80052dc <DMA_CalcBaseAndBitshift+0x64>)
- 8005294:	68fb      	ldr	r3, [r7, #12]
- 8005296:	4413      	add	r3, r2
- 8005298:	781b      	ldrb	r3, [r3, #0]
- 800529a:	461a      	mov	r2, r3
- 800529c:	687b      	ldr	r3, [r7, #4]
- 800529e:	65da      	str	r2, [r3, #92]	; 0x5c
-  
-  if (stream_number > 3U)
- 80052a0:	68fb      	ldr	r3, [r7, #12]
- 80052a2:	2b03      	cmp	r3, #3
- 80052a4:	d908      	bls.n	80052b8 <DMA_CalcBaseAndBitshift+0x40>
-  {
-    /* return pointer to HISR and HIFCR */
-    hdma->StreamBaseAddress = (((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)) + 4U);
- 80052a6:	687b      	ldr	r3, [r7, #4]
- 80052a8:	681b      	ldr	r3, [r3, #0]
- 80052aa:	461a      	mov	r2, r3
- 80052ac:	4b0c      	ldr	r3, [pc, #48]	; (80052e0 <DMA_CalcBaseAndBitshift+0x68>)
- 80052ae:	4013      	ands	r3, r2
- 80052b0:	1d1a      	adds	r2, r3, #4
- 80052b2:	687b      	ldr	r3, [r7, #4]
- 80052b4:	659a      	str	r2, [r3, #88]	; 0x58
- 80052b6:	e006      	b.n	80052c6 <DMA_CalcBaseAndBitshift+0x4e>
-  }
-  else
-  {
-    /* return pointer to LISR and LIFCR */
-    hdma->StreamBaseAddress = ((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU));
- 80052b8:	687b      	ldr	r3, [r7, #4]
- 80052ba:	681b      	ldr	r3, [r3, #0]
- 80052bc:	461a      	mov	r2, r3
- 80052be:	4b08      	ldr	r3, [pc, #32]	; (80052e0 <DMA_CalcBaseAndBitshift+0x68>)
- 80052c0:	4013      	ands	r3, r2
- 80052c2:	687a      	ldr	r2, [r7, #4]
- 80052c4:	6593      	str	r3, [r2, #88]	; 0x58
-  }
-  
-  return hdma->StreamBaseAddress;
- 80052c6:	687b      	ldr	r3, [r7, #4]
- 80052c8:	6d9b      	ldr	r3, [r3, #88]	; 0x58
-}
- 80052ca:	4618      	mov	r0, r3
- 80052cc:	3714      	adds	r7, #20
- 80052ce:	46bd      	mov	sp, r7
- 80052d0:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80052d4:	4770      	bx	lr
- 80052d6:	bf00      	nop
- 80052d8:	aaaaaaab 	.word	0xaaaaaaab
- 80052dc:	0800e388 	.word	0x0800e388
- 80052e0:	fffffc00 	.word	0xfffffc00
-
-080052e4 <DMA_CheckFifoParam>:
-  * @param  hdma       pointer to a DMA_HandleTypeDef structure that contains
-  *                     the configuration information for the specified DMA Stream. 
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
-{
- 80052e4:	b480      	push	{r7}
- 80052e6:	b085      	sub	sp, #20
- 80052e8:	af00      	add	r7, sp, #0
- 80052ea:	6078      	str	r0, [r7, #4]
-  HAL_StatusTypeDef status = HAL_OK;
- 80052ec:	2300      	movs	r3, #0
- 80052ee:	73fb      	strb	r3, [r7, #15]
-  uint32_t tmp = hdma->Init.FIFOThreshold;
- 80052f0:	687b      	ldr	r3, [r7, #4]
- 80052f2:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 80052f4:	60bb      	str	r3, [r7, #8]
-  
-  /* Memory Data size equal to Byte */
-  if(hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
- 80052f6:	687b      	ldr	r3, [r7, #4]
- 80052f8:	699b      	ldr	r3, [r3, #24]
- 80052fa:	2b00      	cmp	r3, #0
- 80052fc:	d11f      	bne.n	800533e <DMA_CheckFifoParam+0x5a>
-  {
-    switch (tmp)
- 80052fe:	68bb      	ldr	r3, [r7, #8]
- 8005300:	2b03      	cmp	r3, #3
- 8005302:	d855      	bhi.n	80053b0 <DMA_CheckFifoParam+0xcc>
- 8005304:	a201      	add	r2, pc, #4	; (adr r2, 800530c <DMA_CheckFifoParam+0x28>)
- 8005306:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 800530a:	bf00      	nop
- 800530c:	0800531d 	.word	0x0800531d
- 8005310:	0800532f 	.word	0x0800532f
- 8005314:	0800531d 	.word	0x0800531d
- 8005318:	080053b1 	.word	0x080053b1
-    {
-    case DMA_FIFO_THRESHOLD_1QUARTERFULL:
-    case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
-      if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- 800531c:	687b      	ldr	r3, [r7, #4]
- 800531e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8005320:	f003 7380 	and.w	r3, r3, #16777216	; 0x1000000
- 8005324:	2b00      	cmp	r3, #0
- 8005326:	d045      	beq.n	80053b4 <DMA_CheckFifoParam+0xd0>
-      {
-        status = HAL_ERROR;
- 8005328:	2301      	movs	r3, #1
- 800532a:	73fb      	strb	r3, [r7, #15]
-      }
-      break;
- 800532c:	e042      	b.n	80053b4 <DMA_CheckFifoParam+0xd0>
-    case DMA_FIFO_THRESHOLD_HALFFULL:
-      if (hdma->Init.MemBurst == DMA_MBURST_INC16)
- 800532e:	687b      	ldr	r3, [r7, #4]
- 8005330:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8005332:	f1b3 7fc0 	cmp.w	r3, #25165824	; 0x1800000
- 8005336:	d13f      	bne.n	80053b8 <DMA_CheckFifoParam+0xd4>
-      {
-        status = HAL_ERROR;
- 8005338:	2301      	movs	r3, #1
- 800533a:	73fb      	strb	r3, [r7, #15]
-      }
-      break;
- 800533c:	e03c      	b.n	80053b8 <DMA_CheckFifoParam+0xd4>
-      break;
-    }
-  }
-  
-  /* Memory Data size equal to Half-Word */
-  else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
- 800533e:	687b      	ldr	r3, [r7, #4]
- 8005340:	699b      	ldr	r3, [r3, #24]
- 8005342:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
- 8005346:	d121      	bne.n	800538c <DMA_CheckFifoParam+0xa8>
-  {
-    switch (tmp)
- 8005348:	68bb      	ldr	r3, [r7, #8]
- 800534a:	2b03      	cmp	r3, #3
- 800534c:	d836      	bhi.n	80053bc <DMA_CheckFifoParam+0xd8>
- 800534e:	a201      	add	r2, pc, #4	; (adr r2, 8005354 <DMA_CheckFifoParam+0x70>)
- 8005350:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 8005354:	08005365 	.word	0x08005365
- 8005358:	0800536b 	.word	0x0800536b
- 800535c:	08005365 	.word	0x08005365
- 8005360:	0800537d 	.word	0x0800537d
-    {
-    case DMA_FIFO_THRESHOLD_1QUARTERFULL:
-    case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
-      status = HAL_ERROR;
- 8005364:	2301      	movs	r3, #1
- 8005366:	73fb      	strb	r3, [r7, #15]
-      break;
- 8005368:	e02f      	b.n	80053ca <DMA_CheckFifoParam+0xe6>
-    case DMA_FIFO_THRESHOLD_HALFFULL:
-      if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- 800536a:	687b      	ldr	r3, [r7, #4]
- 800536c:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 800536e:	f003 7380 	and.w	r3, r3, #16777216	; 0x1000000
- 8005372:	2b00      	cmp	r3, #0
- 8005374:	d024      	beq.n	80053c0 <DMA_CheckFifoParam+0xdc>
-      {
-        status = HAL_ERROR;
- 8005376:	2301      	movs	r3, #1
- 8005378:	73fb      	strb	r3, [r7, #15]
-      }
-      break;
- 800537a:	e021      	b.n	80053c0 <DMA_CheckFifoParam+0xdc>
-    case DMA_FIFO_THRESHOLD_FULL:
-      if (hdma->Init.MemBurst == DMA_MBURST_INC16)
- 800537c:	687b      	ldr	r3, [r7, #4]
- 800537e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8005380:	f1b3 7fc0 	cmp.w	r3, #25165824	; 0x1800000
- 8005384:	d11e      	bne.n	80053c4 <DMA_CheckFifoParam+0xe0>
-      {
-        status = HAL_ERROR;
- 8005386:	2301      	movs	r3, #1
- 8005388:	73fb      	strb	r3, [r7, #15]
-      }
-      break;   
- 800538a:	e01b      	b.n	80053c4 <DMA_CheckFifoParam+0xe0>
-  }
-  
-  /* Memory Data size equal to Word */
-  else
-  {
-    switch (tmp)
- 800538c:	68bb      	ldr	r3, [r7, #8]
- 800538e:	2b02      	cmp	r3, #2
- 8005390:	d902      	bls.n	8005398 <DMA_CheckFifoParam+0xb4>
- 8005392:	2b03      	cmp	r3, #3
- 8005394:	d003      	beq.n	800539e <DMA_CheckFifoParam+0xba>
-      {
-        status = HAL_ERROR;
-      }
-      break;
-    default:
-      break;
- 8005396:	e018      	b.n	80053ca <DMA_CheckFifoParam+0xe6>
-      status = HAL_ERROR;
- 8005398:	2301      	movs	r3, #1
- 800539a:	73fb      	strb	r3, [r7, #15]
-      break;
- 800539c:	e015      	b.n	80053ca <DMA_CheckFifoParam+0xe6>
-      if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- 800539e:	687b      	ldr	r3, [r7, #4]
- 80053a0:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 80053a2:	f003 7380 	and.w	r3, r3, #16777216	; 0x1000000
- 80053a6:	2b00      	cmp	r3, #0
- 80053a8:	d00e      	beq.n	80053c8 <DMA_CheckFifoParam+0xe4>
-        status = HAL_ERROR;
- 80053aa:	2301      	movs	r3, #1
- 80053ac:	73fb      	strb	r3, [r7, #15]
-      break;
- 80053ae:	e00b      	b.n	80053c8 <DMA_CheckFifoParam+0xe4>
-      break;
- 80053b0:	bf00      	nop
- 80053b2:	e00a      	b.n	80053ca <DMA_CheckFifoParam+0xe6>
-      break;
- 80053b4:	bf00      	nop
- 80053b6:	e008      	b.n	80053ca <DMA_CheckFifoParam+0xe6>
-      break;
- 80053b8:	bf00      	nop
- 80053ba:	e006      	b.n	80053ca <DMA_CheckFifoParam+0xe6>
-      break;
- 80053bc:	bf00      	nop
- 80053be:	e004      	b.n	80053ca <DMA_CheckFifoParam+0xe6>
-      break;
- 80053c0:	bf00      	nop
- 80053c2:	e002      	b.n	80053ca <DMA_CheckFifoParam+0xe6>
-      break;   
- 80053c4:	bf00      	nop
- 80053c6:	e000      	b.n	80053ca <DMA_CheckFifoParam+0xe6>
-      break;
- 80053c8:	bf00      	nop
-    }
-  } 
-  
-  return status; 
- 80053ca:	7bfb      	ldrb	r3, [r7, #15]
-}
- 80053cc:	4618      	mov	r0, r3
- 80053ce:	3714      	adds	r7, #20
- 80053d0:	46bd      	mov	sp, r7
- 80053d2:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80053d6:	4770      	bx	lr
-
-080053d8 <HAL_DMA2D_Init>:
-  * @param  hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
-  *                 the configuration information for the DMA2D.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
-{
- 80053d8:	b580      	push	{r7, lr}
- 80053da:	b082      	sub	sp, #8
- 80053dc:	af00      	add	r7, sp, #0
- 80053de:	6078      	str	r0, [r7, #4]
-  /* Check the DMA2D peripheral state */
-  if(hdma2d == NULL)
- 80053e0:	687b      	ldr	r3, [r7, #4]
- 80053e2:	2b00      	cmp	r3, #0
- 80053e4:	d101      	bne.n	80053ea <HAL_DMA2D_Init+0x12>
-  {
-     return HAL_ERROR;
- 80053e6:	2301      	movs	r3, #1
- 80053e8:	e039      	b.n	800545e <HAL_DMA2D_Init+0x86>
-
-    /* Init the low level hardware */
-    hdma2d->MspInitCallback(hdma2d);
-  }
-#else
-  if(hdma2d->State == HAL_DMA2D_STATE_RESET)
- 80053ea:	687b      	ldr	r3, [r7, #4]
- 80053ec:	f893 3039 	ldrb.w	r3, [r3, #57]	; 0x39
- 80053f0:	b2db      	uxtb	r3, r3
- 80053f2:	2b00      	cmp	r3, #0
- 80053f4:	d106      	bne.n	8005404 <HAL_DMA2D_Init+0x2c>
-  {
-    /* Allocate lock resource and initialize it */
-    hdma2d->Lock = HAL_UNLOCKED;
- 80053f6:	687b      	ldr	r3, [r7, #4]
- 80053f8:	2200      	movs	r2, #0
- 80053fa:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
-    /* Init the low level hardware */
-    HAL_DMA2D_MspInit(hdma2d);
- 80053fe:	6878      	ldr	r0, [r7, #4]
- 8005400:	f7fe fb06 	bl	8003a10 <HAL_DMA2D_MspInit>
-  }
-#endif /* (USE_HAL_DMA2D_REGISTER_CALLBACKS) */
-
-  /* Change DMA2D peripheral state */
-  hdma2d->State = HAL_DMA2D_STATE_BUSY;
- 8005404:	687b      	ldr	r3, [r7, #4]
- 8005406:	2202      	movs	r2, #2
- 8005408:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
-
-  /* DMA2D CR register configuration -------------------------------------------*/
-  MODIFY_REG(hdma2d->Instance->CR, DMA2D_CR_MODE, hdma2d->Init.Mode);
- 800540c:	687b      	ldr	r3, [r7, #4]
- 800540e:	681b      	ldr	r3, [r3, #0]
- 8005410:	681b      	ldr	r3, [r3, #0]
- 8005412:	f423 3140 	bic.w	r1, r3, #196608	; 0x30000
- 8005416:	687b      	ldr	r3, [r7, #4]
- 8005418:	685a      	ldr	r2, [r3, #4]
- 800541a:	687b      	ldr	r3, [r7, #4]
- 800541c:	681b      	ldr	r3, [r3, #0]
- 800541e:	430a      	orrs	r2, r1
- 8005420:	601a      	str	r2, [r3, #0]
-
-  /* DMA2D OPFCCR register configuration ---------------------------------------*/
-  MODIFY_REG(hdma2d->Instance->OPFCCR, DMA2D_OPFCCR_CM, hdma2d->Init.ColorMode);
- 8005422:	687b      	ldr	r3, [r7, #4]
- 8005424:	681b      	ldr	r3, [r3, #0]
- 8005426:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 8005428:	f023 0107 	bic.w	r1, r3, #7
- 800542c:	687b      	ldr	r3, [r7, #4]
- 800542e:	689a      	ldr	r2, [r3, #8]
- 8005430:	687b      	ldr	r3, [r7, #4]
- 8005432:	681b      	ldr	r3, [r3, #0]
- 8005434:	430a      	orrs	r2, r1
- 8005436:	635a      	str	r2, [r3, #52]	; 0x34
-
-  /* DMA2D OOR register configuration ------------------------------------------*/
-  MODIFY_REG(hdma2d->Instance->OOR, DMA2D_OOR_LO, hdma2d->Init.OutputOffset);
- 8005438:	687b      	ldr	r3, [r7, #4]
- 800543a:	681b      	ldr	r3, [r3, #0]
- 800543c:	6c1a      	ldr	r2, [r3, #64]	; 0x40
- 800543e:	4b0a      	ldr	r3, [pc, #40]	; (8005468 <HAL_DMA2D_Init+0x90>)
- 8005440:	4013      	ands	r3, r2
- 8005442:	687a      	ldr	r2, [r7, #4]
- 8005444:	68d1      	ldr	r1, [r2, #12]
- 8005446:	687a      	ldr	r2, [r7, #4]
- 8005448:	6812      	ldr	r2, [r2, #0]
- 800544a:	430b      	orrs	r3, r1
- 800544c:	6413      	str	r3, [r2, #64]	; 0x40
-  MODIFY_REG(hdma2d->Instance->OPFCCR,(DMA2D_OPFCCR_AI|DMA2D_OPFCCR_RBS), ((hdma2d->Init.AlphaInverted << DMA2D_OPFCCR_AI_Pos) | (hdma2d->Init.RedBlueSwap << DMA2D_OPFCCR_RBS_Pos)));
-#endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
-
-
-  /* Update error code */
-  hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
- 800544e:	687b      	ldr	r3, [r7, #4]
- 8005450:	2200      	movs	r2, #0
- 8005452:	63da      	str	r2, [r3, #60]	; 0x3c
-
-  /* Initialize the DMA2D state*/
-  hdma2d->State  = HAL_DMA2D_STATE_READY;
- 8005454:	687b      	ldr	r3, [r7, #4]
- 8005456:	2201      	movs	r2, #1
- 8005458:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
-
-  return HAL_OK;
- 800545c:	2300      	movs	r3, #0
-}
- 800545e:	4618      	mov	r0, r3
- 8005460:	3708      	adds	r7, #8
- 8005462:	46bd      	mov	sp, r7
- 8005464:	bd80      	pop	{r7, pc}
- 8005466:	bf00      	nop
- 8005468:	ffffc000 	.word	0xffffc000
-
-0800546c <HAL_DMA2D_Start>:
-  * @param  Width      The width of data to be transferred from source to destination (expressed in number of pixels per line).
-  * @param  Height     The height of data to be transferred from source to destination (expressed in number of lines).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width,  uint32_t Height)
-{
- 800546c:	b580      	push	{r7, lr}
- 800546e:	b086      	sub	sp, #24
- 8005470:	af02      	add	r7, sp, #8
- 8005472:	60f8      	str	r0, [r7, #12]
- 8005474:	60b9      	str	r1, [r7, #8]
- 8005476:	607a      	str	r2, [r7, #4]
- 8005478:	603b      	str	r3, [r7, #0]
-  /* Check the parameters */
-  assert_param(IS_DMA2D_LINE(Height));
-  assert_param(IS_DMA2D_PIXEL(Width));
-
-  /* Process locked */
-  __HAL_LOCK(hdma2d);
- 800547a:	68fb      	ldr	r3, [r7, #12]
- 800547c:	f893 3038 	ldrb.w	r3, [r3, #56]	; 0x38
- 8005480:	2b01      	cmp	r3, #1
- 8005482:	d101      	bne.n	8005488 <HAL_DMA2D_Start+0x1c>
- 8005484:	2302      	movs	r3, #2
- 8005486:	e018      	b.n	80054ba <HAL_DMA2D_Start+0x4e>
- 8005488:	68fb      	ldr	r3, [r7, #12]
- 800548a:	2201      	movs	r2, #1
- 800548c:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
-
-  /* Change DMA2D peripheral state */
-  hdma2d->State = HAL_DMA2D_STATE_BUSY;
- 8005490:	68fb      	ldr	r3, [r7, #12]
- 8005492:	2202      	movs	r2, #2
- 8005494:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
-
-  /* Configure the source, destination address and the data size */
-  DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
- 8005498:	69bb      	ldr	r3, [r7, #24]
- 800549a:	9300      	str	r3, [sp, #0]
- 800549c:	683b      	ldr	r3, [r7, #0]
- 800549e:	687a      	ldr	r2, [r7, #4]
- 80054a0:	68b9      	ldr	r1, [r7, #8]
- 80054a2:	68f8      	ldr	r0, [r7, #12]
- 80054a4:	f000 f988 	bl	80057b8 <DMA2D_SetConfig>
-
-  /* Enable the Peripheral */
-  __HAL_DMA2D_ENABLE(hdma2d);
- 80054a8:	68fb      	ldr	r3, [r7, #12]
- 80054aa:	681b      	ldr	r3, [r3, #0]
- 80054ac:	681a      	ldr	r2, [r3, #0]
- 80054ae:	68fb      	ldr	r3, [r7, #12]
- 80054b0:	681b      	ldr	r3, [r3, #0]
- 80054b2:	f042 0201 	orr.w	r2, r2, #1
- 80054b6:	601a      	str	r2, [r3, #0]
-
-  return HAL_OK;
- 80054b8:	2300      	movs	r3, #0
-}
- 80054ba:	4618      	mov	r0, r3
- 80054bc:	3710      	adds	r7, #16
- 80054be:	46bd      	mov	sp, r7
- 80054c0:	bd80      	pop	{r7, pc}
-
-080054c2 <HAL_DMA2D_PollForTransfer>:
-  *                 the configuration information for the DMA2D.
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
-{
- 80054c2:	b580      	push	{r7, lr}
- 80054c4:	b086      	sub	sp, #24
- 80054c6:	af00      	add	r7, sp, #0
- 80054c8:	6078      	str	r0, [r7, #4]
- 80054ca:	6039      	str	r1, [r7, #0]
-  uint32_t tickstart;
-  uint32_t layer_start;
-  __IO uint32_t isrflags = 0x0U;
- 80054cc:	2300      	movs	r3, #0
- 80054ce:	60fb      	str	r3, [r7, #12]
-
-  /* Polling for DMA2D transfer */
-  if((hdma2d->Instance->CR & DMA2D_CR_START) != 0U)
- 80054d0:	687b      	ldr	r3, [r7, #4]
- 80054d2:	681b      	ldr	r3, [r3, #0]
- 80054d4:	681b      	ldr	r3, [r3, #0]
- 80054d6:	f003 0301 	and.w	r3, r3, #1
- 80054da:	2b00      	cmp	r3, #0
- 80054dc:	d056      	beq.n	800558c <HAL_DMA2D_PollForTransfer+0xca>
-  {
-   /* Get tick */
-   tickstart = HAL_GetTick();
- 80054de:	f7ff f807 	bl	80044f0 <HAL_GetTick>
- 80054e2:	6178      	str	r0, [r7, #20]
-
-    while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == 0U)
- 80054e4:	e04b      	b.n	800557e <HAL_DMA2D_PollForTransfer+0xbc>
-    {
-      isrflags = READ_REG(hdma2d->Instance->ISR);
- 80054e6:	687b      	ldr	r3, [r7, #4]
- 80054e8:	681b      	ldr	r3, [r3, #0]
- 80054ea:	685b      	ldr	r3, [r3, #4]
- 80054ec:	60fb      	str	r3, [r7, #12]
-      if ((isrflags & (DMA2D_FLAG_CE|DMA2D_FLAG_TE)) != 0U)
- 80054ee:	68fb      	ldr	r3, [r7, #12]
- 80054f0:	f003 0321 	and.w	r3, r3, #33	; 0x21
- 80054f4:	2b00      	cmp	r3, #0
- 80054f6:	d023      	beq.n	8005540 <HAL_DMA2D_PollForTransfer+0x7e>
-      {
-        if ((isrflags & DMA2D_FLAG_CE) != 0U)
- 80054f8:	68fb      	ldr	r3, [r7, #12]
- 80054fa:	f003 0320 	and.w	r3, r3, #32
- 80054fe:	2b00      	cmp	r3, #0
- 8005500:	d005      	beq.n	800550e <HAL_DMA2D_PollForTransfer+0x4c>
-        {
-          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
- 8005502:	687b      	ldr	r3, [r7, #4]
- 8005504:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 8005506:	f043 0202 	orr.w	r2, r3, #2
- 800550a:	687b      	ldr	r3, [r7, #4]
- 800550c:	63da      	str	r2, [r3, #60]	; 0x3c
-        }
-        if ((isrflags & DMA2D_FLAG_TE) != 0U)
- 800550e:	68fb      	ldr	r3, [r7, #12]
- 8005510:	f003 0301 	and.w	r3, r3, #1
- 8005514:	2b00      	cmp	r3, #0
- 8005516:	d005      	beq.n	8005524 <HAL_DMA2D_PollForTransfer+0x62>
-        {
-          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
- 8005518:	687b      	ldr	r3, [r7, #4]
- 800551a:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 800551c:	f043 0201 	orr.w	r2, r3, #1
- 8005520:	687b      	ldr	r3, [r7, #4]
- 8005522:	63da      	str	r2, [r3, #60]	; 0x3c
-        }
-        /* Clear the transfer and configuration error flags */
-        __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE | DMA2D_FLAG_TE);
- 8005524:	687b      	ldr	r3, [r7, #4]
- 8005526:	681b      	ldr	r3, [r3, #0]
- 8005528:	2221      	movs	r2, #33	; 0x21
- 800552a:	609a      	str	r2, [r3, #8]
-
-        /* Change DMA2D state */
-        hdma2d->State = HAL_DMA2D_STATE_ERROR;
- 800552c:	687b      	ldr	r3, [r7, #4]
- 800552e:	2204      	movs	r2, #4
- 8005530:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
-
-        /* Process unlocked */
-        __HAL_UNLOCK(hdma2d);
- 8005534:	687b      	ldr	r3, [r7, #4]
- 8005536:	2200      	movs	r2, #0
- 8005538:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
-
-        return HAL_ERROR;
- 800553c:	2301      	movs	r3, #1
- 800553e:	e0a5      	b.n	800568c <HAL_DMA2D_PollForTransfer+0x1ca>
-      }
-      /* Check for the Timeout */
-      if(Timeout != HAL_MAX_DELAY)
- 8005540:	683b      	ldr	r3, [r7, #0]
- 8005542:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
- 8005546:	d01a      	beq.n	800557e <HAL_DMA2D_PollForTransfer+0xbc>
-      {
-        if(((HAL_GetTick() - tickstart ) > Timeout)||(Timeout == 0U))
- 8005548:	f7fe ffd2 	bl	80044f0 <HAL_GetTick>
- 800554c:	4602      	mov	r2, r0
- 800554e:	697b      	ldr	r3, [r7, #20]
- 8005550:	1ad3      	subs	r3, r2, r3
- 8005552:	683a      	ldr	r2, [r7, #0]
- 8005554:	429a      	cmp	r2, r3
- 8005556:	d302      	bcc.n	800555e <HAL_DMA2D_PollForTransfer+0x9c>
- 8005558:	683b      	ldr	r3, [r7, #0]
- 800555a:	2b00      	cmp	r3, #0
- 800555c:	d10f      	bne.n	800557e <HAL_DMA2D_PollForTransfer+0xbc>
-        {
-          /* Update error code */
-          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
- 800555e:	687b      	ldr	r3, [r7, #4]
- 8005560:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 8005562:	f043 0220 	orr.w	r2, r3, #32
- 8005566:	687b      	ldr	r3, [r7, #4]
- 8005568:	63da      	str	r2, [r3, #60]	; 0x3c
-
-          /* Change the DMA2D state */
-          hdma2d->State = HAL_DMA2D_STATE_TIMEOUT;
- 800556a:	687b      	ldr	r3, [r7, #4]
- 800556c:	2203      	movs	r2, #3
- 800556e:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
-
-          /* Process unlocked */
-          __HAL_UNLOCK(hdma2d);
- 8005572:	687b      	ldr	r3, [r7, #4]
- 8005574:	2200      	movs	r2, #0
- 8005576:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
-
-          return HAL_TIMEOUT;
- 800557a:	2303      	movs	r3, #3
- 800557c:	e086      	b.n	800568c <HAL_DMA2D_PollForTransfer+0x1ca>
-    while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == 0U)
- 800557e:	687b      	ldr	r3, [r7, #4]
- 8005580:	681b      	ldr	r3, [r3, #0]
- 8005582:	685b      	ldr	r3, [r3, #4]
- 8005584:	f003 0302 	and.w	r3, r3, #2
- 8005588:	2b00      	cmp	r3, #0
- 800558a:	d0ac      	beq.n	80054e6 <HAL_DMA2D_PollForTransfer+0x24>
-        }
-      }
-    }
-  }
-  /* Polling for CLUT loading (foreground or background) */
-  layer_start = hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START;
- 800558c:	687b      	ldr	r3, [r7, #4]
- 800558e:	681b      	ldr	r3, [r3, #0]
- 8005590:	69db      	ldr	r3, [r3, #28]
- 8005592:	f003 0320 	and.w	r3, r3, #32
- 8005596:	613b      	str	r3, [r7, #16]
-  layer_start |= hdma2d->Instance->BGPFCCR & DMA2D_BGPFCCR_START;
- 8005598:	687b      	ldr	r3, [r7, #4]
- 800559a:	681b      	ldr	r3, [r3, #0]
- 800559c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800559e:	f003 0320 	and.w	r3, r3, #32
- 80055a2:	693a      	ldr	r2, [r7, #16]
- 80055a4:	4313      	orrs	r3, r2
- 80055a6:	613b      	str	r3, [r7, #16]
-  if (layer_start != 0U)
- 80055a8:	693b      	ldr	r3, [r7, #16]
- 80055aa:	2b00      	cmp	r3, #0
- 80055ac:	d061      	beq.n	8005672 <HAL_DMA2D_PollForTransfer+0x1b0>
-  {
-    /* Get tick */
-    tickstart = HAL_GetTick();
- 80055ae:	f7fe ff9f 	bl	80044f0 <HAL_GetTick>
- 80055b2:	6178      	str	r0, [r7, #20]
-
-    while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == 0U)
- 80055b4:	e056      	b.n	8005664 <HAL_DMA2D_PollForTransfer+0x1a2>
-    {
-      isrflags = READ_REG(hdma2d->Instance->ISR);
- 80055b6:	687b      	ldr	r3, [r7, #4]
- 80055b8:	681b      	ldr	r3, [r3, #0]
- 80055ba:	685b      	ldr	r3, [r3, #4]
- 80055bc:	60fb      	str	r3, [r7, #12]
-      if ((isrflags & (DMA2D_FLAG_CAE|DMA2D_FLAG_CE|DMA2D_FLAG_TE)) != 0U)
- 80055be:	68fb      	ldr	r3, [r7, #12]
- 80055c0:	f003 0329 	and.w	r3, r3, #41	; 0x29
- 80055c4:	2b00      	cmp	r3, #0
- 80055c6:	d02e      	beq.n	8005626 <HAL_DMA2D_PollForTransfer+0x164>
-      {
-        if ((isrflags & DMA2D_FLAG_CAE) != 0U)
- 80055c8:	68fb      	ldr	r3, [r7, #12]
- 80055ca:	f003 0308 	and.w	r3, r3, #8
- 80055ce:	2b00      	cmp	r3, #0
- 80055d0:	d005      	beq.n	80055de <HAL_DMA2D_PollForTransfer+0x11c>
-        {
-          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CAE;
- 80055d2:	687b      	ldr	r3, [r7, #4]
- 80055d4:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 80055d6:	f043 0204 	orr.w	r2, r3, #4
- 80055da:	687b      	ldr	r3, [r7, #4]
- 80055dc:	63da      	str	r2, [r3, #60]	; 0x3c
-        }
-        if ((isrflags & DMA2D_FLAG_CE) != 0U)
- 80055de:	68fb      	ldr	r3, [r7, #12]
- 80055e0:	f003 0320 	and.w	r3, r3, #32
- 80055e4:	2b00      	cmp	r3, #0
- 80055e6:	d005      	beq.n	80055f4 <HAL_DMA2D_PollForTransfer+0x132>
-        {
-          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
- 80055e8:	687b      	ldr	r3, [r7, #4]
- 80055ea:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 80055ec:	f043 0202 	orr.w	r2, r3, #2
- 80055f0:	687b      	ldr	r3, [r7, #4]
- 80055f2:	63da      	str	r2, [r3, #60]	; 0x3c
-        }
-        if ((isrflags & DMA2D_FLAG_TE) != 0U)
- 80055f4:	68fb      	ldr	r3, [r7, #12]
- 80055f6:	f003 0301 	and.w	r3, r3, #1
- 80055fa:	2b00      	cmp	r3, #0
- 80055fc:	d005      	beq.n	800560a <HAL_DMA2D_PollForTransfer+0x148>
-        {
-          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
- 80055fe:	687b      	ldr	r3, [r7, #4]
- 8005600:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 8005602:	f043 0201 	orr.w	r2, r3, #1
- 8005606:	687b      	ldr	r3, [r7, #4]
- 8005608:	63da      	str	r2, [r3, #60]	; 0x3c
-        }
-        /* Clear the CLUT Access Error, Configuration Error and Transfer Error flags */
-        __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE | DMA2D_FLAG_CE | DMA2D_FLAG_TE);
- 800560a:	687b      	ldr	r3, [r7, #4]
- 800560c:	681b      	ldr	r3, [r3, #0]
- 800560e:	2229      	movs	r2, #41	; 0x29
- 8005610:	609a      	str	r2, [r3, #8]
-
-        /* Change DMA2D state */
-        hdma2d->State= HAL_DMA2D_STATE_ERROR;
- 8005612:	687b      	ldr	r3, [r7, #4]
- 8005614:	2204      	movs	r2, #4
- 8005616:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
-
-        /* Process unlocked */
-        __HAL_UNLOCK(hdma2d);
- 800561a:	687b      	ldr	r3, [r7, #4]
- 800561c:	2200      	movs	r2, #0
- 800561e:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
-
-        return HAL_ERROR;
- 8005622:	2301      	movs	r3, #1
- 8005624:	e032      	b.n	800568c <HAL_DMA2D_PollForTransfer+0x1ca>
-      }
-      /* Check for the Timeout */
-      if(Timeout != HAL_MAX_DELAY)
- 8005626:	683b      	ldr	r3, [r7, #0]
- 8005628:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
- 800562c:	d01a      	beq.n	8005664 <HAL_DMA2D_PollForTransfer+0x1a2>
-      {
-        if(((HAL_GetTick() - tickstart ) > Timeout)||(Timeout == 0U))
- 800562e:	f7fe ff5f 	bl	80044f0 <HAL_GetTick>
- 8005632:	4602      	mov	r2, r0
- 8005634:	697b      	ldr	r3, [r7, #20]
- 8005636:	1ad3      	subs	r3, r2, r3
- 8005638:	683a      	ldr	r2, [r7, #0]
- 800563a:	429a      	cmp	r2, r3
- 800563c:	d302      	bcc.n	8005644 <HAL_DMA2D_PollForTransfer+0x182>
- 800563e:	683b      	ldr	r3, [r7, #0]
- 8005640:	2b00      	cmp	r3, #0
- 8005642:	d10f      	bne.n	8005664 <HAL_DMA2D_PollForTransfer+0x1a2>
-        {
-          /* Update error code */
-          hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
- 8005644:	687b      	ldr	r3, [r7, #4]
- 8005646:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 8005648:	f043 0220 	orr.w	r2, r3, #32
- 800564c:	687b      	ldr	r3, [r7, #4]
- 800564e:	63da      	str	r2, [r3, #60]	; 0x3c
-
-          /* Change the DMA2D state */
-          hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
- 8005650:	687b      	ldr	r3, [r7, #4]
- 8005652:	2203      	movs	r2, #3
- 8005654:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
-
-          /* Process unlocked */
-          __HAL_UNLOCK(hdma2d);
- 8005658:	687b      	ldr	r3, [r7, #4]
- 800565a:	2200      	movs	r2, #0
- 800565c:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
-
-          return HAL_TIMEOUT;
- 8005660:	2303      	movs	r3, #3
- 8005662:	e013      	b.n	800568c <HAL_DMA2D_PollForTransfer+0x1ca>
-    while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == 0U)
- 8005664:	687b      	ldr	r3, [r7, #4]
- 8005666:	681b      	ldr	r3, [r3, #0]
- 8005668:	685b      	ldr	r3, [r3, #4]
- 800566a:	f003 0310 	and.w	r3, r3, #16
- 800566e:	2b00      	cmp	r3, #0
- 8005670:	d0a1      	beq.n	80055b6 <HAL_DMA2D_PollForTransfer+0xf4>
-      }
-    }
-  }
-
-  /* Clear the transfer complete and CLUT loading flags */
-  __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC|DMA2D_FLAG_CTC);
- 8005672:	687b      	ldr	r3, [r7, #4]
- 8005674:	681b      	ldr	r3, [r3, #0]
- 8005676:	2212      	movs	r2, #18
- 8005678:	609a      	str	r2, [r3, #8]
-
-  /* Change DMA2D state */
-  hdma2d->State = HAL_DMA2D_STATE_READY;
- 800567a:	687b      	ldr	r3, [r7, #4]
- 800567c:	2201      	movs	r2, #1
- 800567e:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hdma2d);
- 8005682:	687b      	ldr	r3, [r7, #4]
- 8005684:	2200      	movs	r2, #0
- 8005686:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
-
-  return HAL_OK;
- 800568a:	2300      	movs	r3, #0
-}
- 800568c:	4618      	mov	r0, r3
- 800568e:	3718      	adds	r7, #24
- 8005690:	46bd      	mov	sp, r7
- 8005692:	bd80      	pop	{r7, pc}
-
-08005694 <HAL_DMA2D_ConfigLayer>:
-  *                   This parameter can be one of the following values:
-  *                   DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
-{
- 8005694:	b480      	push	{r7}
- 8005696:	b087      	sub	sp, #28
- 8005698:	af00      	add	r7, sp, #0
- 800569a:	6078      	str	r0, [r7, #4]
- 800569c:	6039      	str	r1, [r7, #0]
-  uint32_t regMask, regValue;
-
-  /* Check the parameters */
-  assert_param(IS_DMA2D_LAYER(LayerIdx));
-  assert_param(IS_DMA2D_OFFSET(hdma2d->LayerCfg[LayerIdx].InputOffset));
-  if(hdma2d->Init.Mode != DMA2D_R2M)
- 800569e:	687b      	ldr	r3, [r7, #4]
- 80056a0:	685b      	ldr	r3, [r3, #4]
- 80056a2:	f5b3 3f40 	cmp.w	r3, #196608	; 0x30000
-  assert_param(IS_DMA2D_ALPHA_INVERTED(hdma2d->LayerCfg[LayerIdx].AlphaInverted));
-  assert_param(IS_DMA2D_RB_SWAP(hdma2d->LayerCfg[LayerIdx].RedBlueSwap));
-#endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
-
-  /* Process locked */
-  __HAL_LOCK(hdma2d);
- 80056a6:	687b      	ldr	r3, [r7, #4]
- 80056a8:	f893 3038 	ldrb.w	r3, [r3, #56]	; 0x38
- 80056ac:	2b01      	cmp	r3, #1
- 80056ae:	d101      	bne.n	80056b4 <HAL_DMA2D_ConfigLayer+0x20>
- 80056b0:	2302      	movs	r3, #2
- 80056b2:	e079      	b.n	80057a8 <HAL_DMA2D_ConfigLayer+0x114>
- 80056b4:	687b      	ldr	r3, [r7, #4]
- 80056b6:	2201      	movs	r2, #1
- 80056b8:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
-
-  /* Change DMA2D peripheral state */
-  hdma2d->State = HAL_DMA2D_STATE_BUSY;
- 80056bc:	687b      	ldr	r3, [r7, #4]
- 80056be:	2202      	movs	r2, #2
- 80056c0:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
-
-  pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
- 80056c4:	683b      	ldr	r3, [r7, #0]
- 80056c6:	011b      	lsls	r3, r3, #4
- 80056c8:	3318      	adds	r3, #24
- 80056ca:	687a      	ldr	r2, [r7, #4]
- 80056cc:	4413      	add	r3, r2
- 80056ce:	613b      	str	r3, [r7, #16]
-#if defined (DMA2D_ALPHA_INV_RB_SWAP_SUPPORT)
-  regValue = pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << DMA2D_BGPFCCR_AM_Pos) |\
-             (pLayerCfg->AlphaInverted << DMA2D_BGPFCCR_AI_Pos) | (pLayerCfg->RedBlueSwap << DMA2D_BGPFCCR_RBS_Pos);
-  regMask  = (DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA | DMA2D_BGPFCCR_AI | DMA2D_BGPFCCR_RBS);
-#else
-  regValue = pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << DMA2D_BGPFCCR_AM_Pos);
- 80056d0:	693b      	ldr	r3, [r7, #16]
- 80056d2:	685a      	ldr	r2, [r3, #4]
- 80056d4:	693b      	ldr	r3, [r7, #16]
- 80056d6:	689b      	ldr	r3, [r3, #8]
- 80056d8:	041b      	lsls	r3, r3, #16
- 80056da:	4313      	orrs	r3, r2
- 80056dc:	617b      	str	r3, [r7, #20]
-  regMask  = DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA;
- 80056de:	4b35      	ldr	r3, [pc, #212]	; (80057b4 <HAL_DMA2D_ConfigLayer+0x120>)
- 80056e0:	60fb      	str	r3, [r7, #12]
-#endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */
-
-
-  if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
- 80056e2:	693b      	ldr	r3, [r7, #16]
- 80056e4:	685b      	ldr	r3, [r3, #4]
- 80056e6:	2b0a      	cmp	r3, #10
- 80056e8:	d003      	beq.n	80056f2 <HAL_DMA2D_ConfigLayer+0x5e>
- 80056ea:	693b      	ldr	r3, [r7, #16]
- 80056ec:	685b      	ldr	r3, [r3, #4]
- 80056ee:	2b09      	cmp	r3, #9
- 80056f0:	d107      	bne.n	8005702 <HAL_DMA2D_ConfigLayer+0x6e>
-  {
-    regValue |= (pLayerCfg->InputAlpha & DMA2D_BGPFCCR_ALPHA);
- 80056f2:	693b      	ldr	r3, [r7, #16]
- 80056f4:	68db      	ldr	r3, [r3, #12]
- 80056f6:	f003 437f 	and.w	r3, r3, #4278190080	; 0xff000000
- 80056fa:	697a      	ldr	r2, [r7, #20]
- 80056fc:	4313      	orrs	r3, r2
- 80056fe:	617b      	str	r3, [r7, #20]
- 8005700:	e005      	b.n	800570e <HAL_DMA2D_ConfigLayer+0x7a>
-  }
-  else
-  {
-    regValue |=  (pLayerCfg->InputAlpha << DMA2D_BGPFCCR_ALPHA_Pos);
- 8005702:	693b      	ldr	r3, [r7, #16]
- 8005704:	68db      	ldr	r3, [r3, #12]
- 8005706:	061b      	lsls	r3, r3, #24
- 8005708:	697a      	ldr	r2, [r7, #20]
- 800570a:	4313      	orrs	r3, r2
- 800570c:	617b      	str	r3, [r7, #20]
-  }
-
-  /* Configure the background DMA2D layer */
-  if(LayerIdx == DMA2D_BACKGROUND_LAYER)
- 800570e:	683b      	ldr	r3, [r7, #0]
- 8005710:	2b00      	cmp	r3, #0
- 8005712:	d120      	bne.n	8005756 <HAL_DMA2D_ConfigLayer+0xc2>
-  {
-    /* Write DMA2D BGPFCCR register */
-    MODIFY_REG(hdma2d->Instance->BGPFCCR, regMask, regValue);
- 8005714:	687b      	ldr	r3, [r7, #4]
- 8005716:	681b      	ldr	r3, [r3, #0]
- 8005718:	6a5a      	ldr	r2, [r3, #36]	; 0x24
- 800571a:	68fb      	ldr	r3, [r7, #12]
- 800571c:	43db      	mvns	r3, r3
- 800571e:	ea02 0103 	and.w	r1, r2, r3
- 8005722:	687b      	ldr	r3, [r7, #4]
- 8005724:	681b      	ldr	r3, [r3, #0]
- 8005726:	697a      	ldr	r2, [r7, #20]
- 8005728:	430a      	orrs	r2, r1
- 800572a:	625a      	str	r2, [r3, #36]	; 0x24
-
-    /* DMA2D BGOR register configuration -------------------------------------*/
-    WRITE_REG(hdma2d->Instance->BGOR, pLayerCfg->InputOffset);
- 800572c:	687b      	ldr	r3, [r7, #4]
- 800572e:	681b      	ldr	r3, [r3, #0]
- 8005730:	693a      	ldr	r2, [r7, #16]
- 8005732:	6812      	ldr	r2, [r2, #0]
- 8005734:	619a      	str	r2, [r3, #24]
-
-    /* DMA2D BGCOLR register configuration -------------------------------------*/
-    if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
- 8005736:	693b      	ldr	r3, [r7, #16]
- 8005738:	685b      	ldr	r3, [r3, #4]
- 800573a:	2b0a      	cmp	r3, #10
- 800573c:	d003      	beq.n	8005746 <HAL_DMA2D_ConfigLayer+0xb2>
- 800573e:	693b      	ldr	r3, [r7, #16]
- 8005740:	685b      	ldr	r3, [r3, #4]
- 8005742:	2b09      	cmp	r3, #9
- 8005744:	d127      	bne.n	8005796 <HAL_DMA2D_ConfigLayer+0x102>
-    {
-      WRITE_REG(hdma2d->Instance->BGCOLR, pLayerCfg->InputAlpha & (DMA2D_BGCOLR_BLUE|DMA2D_BGCOLR_GREEN|DMA2D_BGCOLR_RED));
- 8005746:	693b      	ldr	r3, [r7, #16]
- 8005748:	68da      	ldr	r2, [r3, #12]
- 800574a:	687b      	ldr	r3, [r7, #4]
- 800574c:	681b      	ldr	r3, [r3, #0]
- 800574e:	f022 427f 	bic.w	r2, r2, #4278190080	; 0xff000000
- 8005752:	629a      	str	r2, [r3, #40]	; 0x28
- 8005754:	e01f      	b.n	8005796 <HAL_DMA2D_ConfigLayer+0x102>
-  else
-  {
-
-
-     /* Write DMA2D FGPFCCR register */
-    MODIFY_REG(hdma2d->Instance->FGPFCCR, regMask, regValue);
- 8005756:	687b      	ldr	r3, [r7, #4]
- 8005758:	681b      	ldr	r3, [r3, #0]
- 800575a:	69da      	ldr	r2, [r3, #28]
- 800575c:	68fb      	ldr	r3, [r7, #12]
- 800575e:	43db      	mvns	r3, r3
- 8005760:	ea02 0103 	and.w	r1, r2, r3
- 8005764:	687b      	ldr	r3, [r7, #4]
- 8005766:	681b      	ldr	r3, [r3, #0]
- 8005768:	697a      	ldr	r2, [r7, #20]
- 800576a:	430a      	orrs	r2, r1
- 800576c:	61da      	str	r2, [r3, #28]
-
-    /* DMA2D FGOR register configuration -------------------------------------*/
-    WRITE_REG(hdma2d->Instance->FGOR, pLayerCfg->InputOffset);
- 800576e:	687b      	ldr	r3, [r7, #4]
- 8005770:	681b      	ldr	r3, [r3, #0]
- 8005772:	693a      	ldr	r2, [r7, #16]
- 8005774:	6812      	ldr	r2, [r2, #0]
- 8005776:	611a      	str	r2, [r3, #16]
-
-    /* DMA2D FGCOLR register configuration -------------------------------------*/
-    if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
- 8005778:	693b      	ldr	r3, [r7, #16]
- 800577a:	685b      	ldr	r3, [r3, #4]
- 800577c:	2b0a      	cmp	r3, #10
- 800577e:	d003      	beq.n	8005788 <HAL_DMA2D_ConfigLayer+0xf4>
- 8005780:	693b      	ldr	r3, [r7, #16]
- 8005782:	685b      	ldr	r3, [r3, #4]
- 8005784:	2b09      	cmp	r3, #9
- 8005786:	d106      	bne.n	8005796 <HAL_DMA2D_ConfigLayer+0x102>
-    {
-      WRITE_REG(hdma2d->Instance->FGCOLR, pLayerCfg->InputAlpha & (DMA2D_FGCOLR_BLUE|DMA2D_FGCOLR_GREEN|DMA2D_FGCOLR_RED));
- 8005788:	693b      	ldr	r3, [r7, #16]
- 800578a:	68da      	ldr	r2, [r3, #12]
- 800578c:	687b      	ldr	r3, [r7, #4]
- 800578e:	681b      	ldr	r3, [r3, #0]
- 8005790:	f022 427f 	bic.w	r2, r2, #4278190080	; 0xff000000
- 8005794:	621a      	str	r2, [r3, #32]
-    }
-  }
-  /* Initialize the DMA2D state*/
-  hdma2d->State = HAL_DMA2D_STATE_READY;
- 8005796:	687b      	ldr	r3, [r7, #4]
- 8005798:	2201      	movs	r2, #1
- 800579a:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hdma2d);
- 800579e:	687b      	ldr	r3, [r7, #4]
- 80057a0:	2200      	movs	r2, #0
- 80057a2:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38
-
-  return HAL_OK;
- 80057a6:	2300      	movs	r3, #0
-}
- 80057a8:	4618      	mov	r0, r3
- 80057aa:	371c      	adds	r7, #28
- 80057ac:	46bd      	mov	sp, r7
- 80057ae:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80057b2:	4770      	bx	lr
- 80057b4:	ff03000f 	.word	0xff03000f
-
-080057b8 <DMA2D_SetConfig>:
-  * @param  Width      The width of data to be transferred from source to destination.
-  * @param  Height     The height of data to be transferred from source to destination.
-  * @retval HAL status
-  */
-static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
-{
- 80057b8:	b480      	push	{r7}
- 80057ba:	b08b      	sub	sp, #44	; 0x2c
- 80057bc:	af00      	add	r7, sp, #0
- 80057be:	60f8      	str	r0, [r7, #12]
- 80057c0:	60b9      	str	r1, [r7, #8]
- 80057c2:	607a      	str	r2, [r7, #4]
- 80057c4:	603b      	str	r3, [r7, #0]
-  uint32_t tmp2;
-  uint32_t tmp3;
-  uint32_t tmp4;
-
-  /* Configure DMA2D data size */
-  MODIFY_REG(hdma2d->Instance->NLR, (DMA2D_NLR_NL|DMA2D_NLR_PL), (Height| (Width << DMA2D_NLR_PL_Pos)));
- 80057c6:	68fb      	ldr	r3, [r7, #12]
- 80057c8:	681b      	ldr	r3, [r3, #0]
- 80057ca:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 80057cc:	f003 4140 	and.w	r1, r3, #3221225472	; 0xc0000000
- 80057d0:	683b      	ldr	r3, [r7, #0]
- 80057d2:	041a      	lsls	r2, r3, #16
- 80057d4:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 80057d6:	431a      	orrs	r2, r3
- 80057d8:	68fb      	ldr	r3, [r7, #12]
- 80057da:	681b      	ldr	r3, [r3, #0]
- 80057dc:	430a      	orrs	r2, r1
- 80057de:	645a      	str	r2, [r3, #68]	; 0x44
-
-  /* Configure DMA2D destination address */
-  WRITE_REG(hdma2d->Instance->OMAR, DstAddress);
- 80057e0:	68fb      	ldr	r3, [r7, #12]
- 80057e2:	681b      	ldr	r3, [r3, #0]
- 80057e4:	687a      	ldr	r2, [r7, #4]
- 80057e6:	63da      	str	r2, [r3, #60]	; 0x3c
-
-  /* Register to memory DMA2D mode selected */
-  if (hdma2d->Init.Mode == DMA2D_R2M)
- 80057e8:	68fb      	ldr	r3, [r7, #12]
- 80057ea:	685b      	ldr	r3, [r3, #4]
- 80057ec:	f5b3 3f40 	cmp.w	r3, #196608	; 0x30000
- 80057f0:	d174      	bne.n	80058dc <DMA2D_SetConfig+0x124>
-  {
-    tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
- 80057f2:	68bb      	ldr	r3, [r7, #8]
- 80057f4:	f003 437f 	and.w	r3, r3, #4278190080	; 0xff000000
- 80057f8:	623b      	str	r3, [r7, #32]
-    tmp2 = pdata & DMA2D_OCOLR_RED_1;
- 80057fa:	68bb      	ldr	r3, [r7, #8]
- 80057fc:	f403 037f 	and.w	r3, r3, #16711680	; 0xff0000
- 8005800:	61fb      	str	r3, [r7, #28]
-    tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
- 8005802:	68bb      	ldr	r3, [r7, #8]
- 8005804:	f403 437f 	and.w	r3, r3, #65280	; 0xff00
- 8005808:	61bb      	str	r3, [r7, #24]
-    tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
- 800580a:	68bb      	ldr	r3, [r7, #8]
- 800580c:	b2db      	uxtb	r3, r3
- 800580e:	617b      	str	r3, [r7, #20]
-
-    /* Prepare the value to be written to the OCOLR register according to the color mode */
-    if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_ARGB8888)
- 8005810:	68fb      	ldr	r3, [r7, #12]
- 8005812:	689b      	ldr	r3, [r3, #8]
- 8005814:	2b00      	cmp	r3, #0
- 8005816:	d108      	bne.n	800582a <DMA2D_SetConfig+0x72>
-    {
-      tmp = (tmp3 | tmp2 | tmp1| tmp4);
- 8005818:	69ba      	ldr	r2, [r7, #24]
- 800581a:	69fb      	ldr	r3, [r7, #28]
- 800581c:	431a      	orrs	r2, r3
- 800581e:	6a3b      	ldr	r3, [r7, #32]
- 8005820:	4313      	orrs	r3, r2
- 8005822:	697a      	ldr	r2, [r7, #20]
- 8005824:	4313      	orrs	r3, r2
- 8005826:	627b      	str	r3, [r7, #36]	; 0x24
- 8005828:	e053      	b.n	80058d2 <DMA2D_SetConfig+0x11a>
-    }
-    else if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_RGB888)
- 800582a:	68fb      	ldr	r3, [r7, #12]
- 800582c:	689b      	ldr	r3, [r3, #8]
- 800582e:	2b01      	cmp	r3, #1
- 8005830:	d106      	bne.n	8005840 <DMA2D_SetConfig+0x88>
-    {
-      tmp = (tmp3 | tmp2 | tmp4);
- 8005832:	69ba      	ldr	r2, [r7, #24]
- 8005834:	69fb      	ldr	r3, [r7, #28]
- 8005836:	4313      	orrs	r3, r2
- 8005838:	697a      	ldr	r2, [r7, #20]
- 800583a:	4313      	orrs	r3, r2
- 800583c:	627b      	str	r3, [r7, #36]	; 0x24
- 800583e:	e048      	b.n	80058d2 <DMA2D_SetConfig+0x11a>
-    }
-    else if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_RGB565)
- 8005840:	68fb      	ldr	r3, [r7, #12]
- 8005842:	689b      	ldr	r3, [r3, #8]
- 8005844:	2b02      	cmp	r3, #2
- 8005846:	d111      	bne.n	800586c <DMA2D_SetConfig+0xb4>
-    {
-      tmp2 = (tmp2 >> 19U);
- 8005848:	69fb      	ldr	r3, [r7, #28]
- 800584a:	0cdb      	lsrs	r3, r3, #19
- 800584c:	61fb      	str	r3, [r7, #28]
-      tmp3 = (tmp3 >> 10U);
- 800584e:	69bb      	ldr	r3, [r7, #24]
- 8005850:	0a9b      	lsrs	r3, r3, #10
- 8005852:	61bb      	str	r3, [r7, #24]
-      tmp4 = (tmp4 >> 3U );
- 8005854:	697b      	ldr	r3, [r7, #20]
- 8005856:	08db      	lsrs	r3, r3, #3
- 8005858:	617b      	str	r3, [r7, #20]
-      tmp  = ((tmp3 << 5U) | (tmp2 << 11U) | tmp4);
- 800585a:	69bb      	ldr	r3, [r7, #24]
- 800585c:	015a      	lsls	r2, r3, #5
- 800585e:	69fb      	ldr	r3, [r7, #28]
- 8005860:	02db      	lsls	r3, r3, #11
- 8005862:	4313      	orrs	r3, r2
- 8005864:	697a      	ldr	r2, [r7, #20]
- 8005866:	4313      	orrs	r3, r2
- 8005868:	627b      	str	r3, [r7, #36]	; 0x24
- 800586a:	e032      	b.n	80058d2 <DMA2D_SetConfig+0x11a>
-    }
-    else if (hdma2d->Init.ColorMode == DMA2D_OUTPUT_ARGB1555)
- 800586c:	68fb      	ldr	r3, [r7, #12]
- 800586e:	689b      	ldr	r3, [r3, #8]
- 8005870:	2b03      	cmp	r3, #3
- 8005872:	d117      	bne.n	80058a4 <DMA2D_SetConfig+0xec>
-    {
-      tmp1 = (tmp1 >> 31U);
- 8005874:	6a3b      	ldr	r3, [r7, #32]
- 8005876:	0fdb      	lsrs	r3, r3, #31
- 8005878:	623b      	str	r3, [r7, #32]
-      tmp2 = (tmp2 >> 19U);
- 800587a:	69fb      	ldr	r3, [r7, #28]
- 800587c:	0cdb      	lsrs	r3, r3, #19
- 800587e:	61fb      	str	r3, [r7, #28]
-      tmp3 = (tmp3 >> 11U);
- 8005880:	69bb      	ldr	r3, [r7, #24]
- 8005882:	0adb      	lsrs	r3, r3, #11
- 8005884:	61bb      	str	r3, [r7, #24]
-      tmp4 = (tmp4 >> 3U );
- 8005886:	697b      	ldr	r3, [r7, #20]
- 8005888:	08db      	lsrs	r3, r3, #3
- 800588a:	617b      	str	r3, [r7, #20]
-      tmp  = ((tmp3 << 5U) | (tmp2 << 10U) | (tmp1 << 15U) | tmp4);
- 800588c:	69bb      	ldr	r3, [r7, #24]
- 800588e:	015a      	lsls	r2, r3, #5
- 8005890:	69fb      	ldr	r3, [r7, #28]
- 8005892:	029b      	lsls	r3, r3, #10
- 8005894:	431a      	orrs	r2, r3
- 8005896:	6a3b      	ldr	r3, [r7, #32]
- 8005898:	03db      	lsls	r3, r3, #15
- 800589a:	4313      	orrs	r3, r2
- 800589c:	697a      	ldr	r2, [r7, #20]
- 800589e:	4313      	orrs	r3, r2
- 80058a0:	627b      	str	r3, [r7, #36]	; 0x24
- 80058a2:	e016      	b.n	80058d2 <DMA2D_SetConfig+0x11a>
-    }
-    else /* Dhdma2d->Init.ColorMode = DMA2D_OUTPUT_ARGB4444 */
-    {
-      tmp1 = (tmp1 >> 28U);
- 80058a4:	6a3b      	ldr	r3, [r7, #32]
- 80058a6:	0f1b      	lsrs	r3, r3, #28
- 80058a8:	623b      	str	r3, [r7, #32]
-      tmp2 = (tmp2 >> 20U);
- 80058aa:	69fb      	ldr	r3, [r7, #28]
- 80058ac:	0d1b      	lsrs	r3, r3, #20
- 80058ae:	61fb      	str	r3, [r7, #28]
-      tmp3 = (tmp3 >> 12U);
- 80058b0:	69bb      	ldr	r3, [r7, #24]
- 80058b2:	0b1b      	lsrs	r3, r3, #12
- 80058b4:	61bb      	str	r3, [r7, #24]
-      tmp4 = (tmp4 >> 4U );
- 80058b6:	697b      	ldr	r3, [r7, #20]
- 80058b8:	091b      	lsrs	r3, r3, #4
- 80058ba:	617b      	str	r3, [r7, #20]
-      tmp  = ((tmp3 << 4U) | (tmp2 << 8U) | (tmp1 << 12U) | tmp4);
- 80058bc:	69bb      	ldr	r3, [r7, #24]
- 80058be:	011a      	lsls	r2, r3, #4
- 80058c0:	69fb      	ldr	r3, [r7, #28]
- 80058c2:	021b      	lsls	r3, r3, #8
- 80058c4:	431a      	orrs	r2, r3
- 80058c6:	6a3b      	ldr	r3, [r7, #32]
- 80058c8:	031b      	lsls	r3, r3, #12
- 80058ca:	4313      	orrs	r3, r2
- 80058cc:	697a      	ldr	r2, [r7, #20]
- 80058ce:	4313      	orrs	r3, r2
- 80058d0:	627b      	str	r3, [r7, #36]	; 0x24
-    }
-    /* Write to DMA2D OCOLR register */
-    WRITE_REG(hdma2d->Instance->OCOLR, tmp);
- 80058d2:	68fb      	ldr	r3, [r7, #12]
- 80058d4:	681b      	ldr	r3, [r3, #0]
- 80058d6:	6a7a      	ldr	r2, [r7, #36]	; 0x24
- 80058d8:	639a      	str	r2, [r3, #56]	; 0x38
-  else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
-  {
-    /* Configure DMA2D source address */
-    WRITE_REG(hdma2d->Instance->FGMAR, pdata);
-  }
-}
- 80058da:	e003      	b.n	80058e4 <DMA2D_SetConfig+0x12c>
-    WRITE_REG(hdma2d->Instance->FGMAR, pdata);
- 80058dc:	68fb      	ldr	r3, [r7, #12]
- 80058de:	681b      	ldr	r3, [r3, #0]
- 80058e0:	68ba      	ldr	r2, [r7, #8]
- 80058e2:	60da      	str	r2, [r3, #12]
-}
- 80058e4:	bf00      	nop
- 80058e6:	372c      	adds	r7, #44	; 0x2c
- 80058e8:	46bd      	mov	sp, r7
- 80058ea:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80058ee:	4770      	bx	lr
-
-080058f0 <HAL_GPIO_Init>:
-  * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
-  *         the configuration information for the specified GPIO peripheral.
-  * @retval None
-  */
-void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
-{
- 80058f0:	b480      	push	{r7}
- 80058f2:	b089      	sub	sp, #36	; 0x24
- 80058f4:	af00      	add	r7, sp, #0
- 80058f6:	6078      	str	r0, [r7, #4]
- 80058f8:	6039      	str	r1, [r7, #0]
-  uint32_t position = 0x00;
- 80058fa:	2300      	movs	r3, #0
- 80058fc:	61fb      	str	r3, [r7, #28]
-  uint32_t ioposition = 0x00;
- 80058fe:	2300      	movs	r3, #0
- 8005900:	617b      	str	r3, [r7, #20]
-  uint32_t iocurrent = 0x00;
- 8005902:	2300      	movs	r3, #0
- 8005904:	613b      	str	r3, [r7, #16]
-  uint32_t temp = 0x00;
- 8005906:	2300      	movs	r3, #0
- 8005908:	61bb      	str	r3, [r7, #24]
-  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
-  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
-  assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
-
-  /* Configure the port pins */
-  for(position = 0; position < GPIO_NUMBER; position++)
- 800590a:	2300      	movs	r3, #0
- 800590c:	61fb      	str	r3, [r7, #28]
- 800590e:	e175      	b.n	8005bfc <HAL_GPIO_Init+0x30c>
-  {
-    /* Get the IO position */
-    ioposition = ((uint32_t)0x01) << position;
- 8005910:	2201      	movs	r2, #1
- 8005912:	69fb      	ldr	r3, [r7, #28]
- 8005914:	fa02 f303 	lsl.w	r3, r2, r3
- 8005918:	617b      	str	r3, [r7, #20]
-    /* Get the current IO position */
-    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
- 800591a:	683b      	ldr	r3, [r7, #0]
- 800591c:	681b      	ldr	r3, [r3, #0]
- 800591e:	697a      	ldr	r2, [r7, #20]
- 8005920:	4013      	ands	r3, r2
- 8005922:	613b      	str	r3, [r7, #16]
-
-    if(iocurrent == ioposition)
- 8005924:	693a      	ldr	r2, [r7, #16]
- 8005926:	697b      	ldr	r3, [r7, #20]
- 8005928:	429a      	cmp	r2, r3
- 800592a:	f040 8164 	bne.w	8005bf6 <HAL_GPIO_Init+0x306>
-    {
-      /*--------------------- GPIO Mode Configuration ------------------------*/
-      /* In case of Output or Alternate function mode selection */
-      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
- 800592e:	683b      	ldr	r3, [r7, #0]
- 8005930:	685b      	ldr	r3, [r3, #4]
- 8005932:	2b01      	cmp	r3, #1
- 8005934:	d00b      	beq.n	800594e <HAL_GPIO_Init+0x5e>
- 8005936:	683b      	ldr	r3, [r7, #0]
- 8005938:	685b      	ldr	r3, [r3, #4]
- 800593a:	2b02      	cmp	r3, #2
- 800593c:	d007      	beq.n	800594e <HAL_GPIO_Init+0x5e>
-         (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 800593e:	683b      	ldr	r3, [r7, #0]
- 8005940:	685b      	ldr	r3, [r3, #4]
-      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
- 8005942:	2b11      	cmp	r3, #17
- 8005944:	d003      	beq.n	800594e <HAL_GPIO_Init+0x5e>
-         (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 8005946:	683b      	ldr	r3, [r7, #0]
- 8005948:	685b      	ldr	r3, [r3, #4]
- 800594a:	2b12      	cmp	r3, #18
- 800594c:	d130      	bne.n	80059b0 <HAL_GPIO_Init+0xc0>
-      {
-        /* Check the Speed parameter */
-        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
-        /* Configure the IO Speed */
-        temp = GPIOx->OSPEEDR; 
- 800594e:	687b      	ldr	r3, [r7, #4]
- 8005950:	689b      	ldr	r3, [r3, #8]
- 8005952:	61bb      	str	r3, [r7, #24]
-        temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
- 8005954:	69fb      	ldr	r3, [r7, #28]
- 8005956:	005b      	lsls	r3, r3, #1
- 8005958:	2203      	movs	r2, #3
- 800595a:	fa02 f303 	lsl.w	r3, r2, r3
- 800595e:	43db      	mvns	r3, r3
- 8005960:	69ba      	ldr	r2, [r7, #24]
- 8005962:	4013      	ands	r3, r2
- 8005964:	61bb      	str	r3, [r7, #24]
-        temp |= (GPIO_Init->Speed << (position * 2));
- 8005966:	683b      	ldr	r3, [r7, #0]
- 8005968:	68da      	ldr	r2, [r3, #12]
- 800596a:	69fb      	ldr	r3, [r7, #28]
- 800596c:	005b      	lsls	r3, r3, #1
- 800596e:	fa02 f303 	lsl.w	r3, r2, r3
- 8005972:	69ba      	ldr	r2, [r7, #24]
- 8005974:	4313      	orrs	r3, r2
- 8005976:	61bb      	str	r3, [r7, #24]
-        GPIOx->OSPEEDR = temp;
- 8005978:	687b      	ldr	r3, [r7, #4]
- 800597a:	69ba      	ldr	r2, [r7, #24]
- 800597c:	609a      	str	r2, [r3, #8]
-
-        /* Configure the IO Output Type */
-        temp = GPIOx->OTYPER;
- 800597e:	687b      	ldr	r3, [r7, #4]
- 8005980:	685b      	ldr	r3, [r3, #4]
- 8005982:	61bb      	str	r3, [r7, #24]
-        temp &= ~(GPIO_OTYPER_OT_0 << position) ;
- 8005984:	2201      	movs	r2, #1
- 8005986:	69fb      	ldr	r3, [r7, #28]
- 8005988:	fa02 f303 	lsl.w	r3, r2, r3
- 800598c:	43db      	mvns	r3, r3
- 800598e:	69ba      	ldr	r2, [r7, #24]
- 8005990:	4013      	ands	r3, r2
- 8005992:	61bb      	str	r3, [r7, #24]
-        temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
- 8005994:	683b      	ldr	r3, [r7, #0]
- 8005996:	685b      	ldr	r3, [r3, #4]
- 8005998:	091b      	lsrs	r3, r3, #4
- 800599a:	f003 0201 	and.w	r2, r3, #1
- 800599e:	69fb      	ldr	r3, [r7, #28]
- 80059a0:	fa02 f303 	lsl.w	r3, r2, r3
- 80059a4:	69ba      	ldr	r2, [r7, #24]
- 80059a6:	4313      	orrs	r3, r2
- 80059a8:	61bb      	str	r3, [r7, #24]
-        GPIOx->OTYPER = temp;
- 80059aa:	687b      	ldr	r3, [r7, #4]
- 80059ac:	69ba      	ldr	r2, [r7, #24]
- 80059ae:	605a      	str	r2, [r3, #4]
-      }
-
-      /* Activate the Pull-up or Pull down resistor for the current IO */
-      temp = GPIOx->PUPDR;
- 80059b0:	687b      	ldr	r3, [r7, #4]
- 80059b2:	68db      	ldr	r3, [r3, #12]
- 80059b4:	61bb      	str	r3, [r7, #24]
-      temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
- 80059b6:	69fb      	ldr	r3, [r7, #28]
- 80059b8:	005b      	lsls	r3, r3, #1
- 80059ba:	2203      	movs	r2, #3
- 80059bc:	fa02 f303 	lsl.w	r3, r2, r3
- 80059c0:	43db      	mvns	r3, r3
- 80059c2:	69ba      	ldr	r2, [r7, #24]
- 80059c4:	4013      	ands	r3, r2
- 80059c6:	61bb      	str	r3, [r7, #24]
-      temp |= ((GPIO_Init->Pull) << (position * 2));
- 80059c8:	683b      	ldr	r3, [r7, #0]
- 80059ca:	689a      	ldr	r2, [r3, #8]
- 80059cc:	69fb      	ldr	r3, [r7, #28]
- 80059ce:	005b      	lsls	r3, r3, #1
- 80059d0:	fa02 f303 	lsl.w	r3, r2, r3
- 80059d4:	69ba      	ldr	r2, [r7, #24]
- 80059d6:	4313      	orrs	r3, r2
- 80059d8:	61bb      	str	r3, [r7, #24]
-      GPIOx->PUPDR = temp;
- 80059da:	687b      	ldr	r3, [r7, #4]
- 80059dc:	69ba      	ldr	r2, [r7, #24]
- 80059de:	60da      	str	r2, [r3, #12]
-
-      /* In case of Alternate function mode selection */
-      if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
- 80059e0:	683b      	ldr	r3, [r7, #0]
- 80059e2:	685b      	ldr	r3, [r3, #4]
- 80059e4:	2b02      	cmp	r3, #2
- 80059e6:	d003      	beq.n	80059f0 <HAL_GPIO_Init+0x100>
- 80059e8:	683b      	ldr	r3, [r7, #0]
- 80059ea:	685b      	ldr	r3, [r3, #4]
- 80059ec:	2b12      	cmp	r3, #18
- 80059ee:	d123      	bne.n	8005a38 <HAL_GPIO_Init+0x148>
-      {
-        /* Check the Alternate function parameter */
-        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
-
-        /* Configure Alternate function mapped with the current IO */
-        temp = GPIOx->AFR[position >> 3];
- 80059f0:	69fb      	ldr	r3, [r7, #28]
- 80059f2:	08da      	lsrs	r2, r3, #3
- 80059f4:	687b      	ldr	r3, [r7, #4]
- 80059f6:	3208      	adds	r2, #8
- 80059f8:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
- 80059fc:	61bb      	str	r3, [r7, #24]
-        temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
- 80059fe:	69fb      	ldr	r3, [r7, #28]
- 8005a00:	f003 0307 	and.w	r3, r3, #7
- 8005a04:	009b      	lsls	r3, r3, #2
- 8005a06:	220f      	movs	r2, #15
- 8005a08:	fa02 f303 	lsl.w	r3, r2, r3
- 8005a0c:	43db      	mvns	r3, r3
- 8005a0e:	69ba      	ldr	r2, [r7, #24]
- 8005a10:	4013      	ands	r3, r2
- 8005a12:	61bb      	str	r3, [r7, #24]
-        temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4));
- 8005a14:	683b      	ldr	r3, [r7, #0]
- 8005a16:	691a      	ldr	r2, [r3, #16]
- 8005a18:	69fb      	ldr	r3, [r7, #28]
- 8005a1a:	f003 0307 	and.w	r3, r3, #7
- 8005a1e:	009b      	lsls	r3, r3, #2
- 8005a20:	fa02 f303 	lsl.w	r3, r2, r3
- 8005a24:	69ba      	ldr	r2, [r7, #24]
- 8005a26:	4313      	orrs	r3, r2
- 8005a28:	61bb      	str	r3, [r7, #24]
-        GPIOx->AFR[position >> 3] = temp;
- 8005a2a:	69fb      	ldr	r3, [r7, #28]
- 8005a2c:	08da      	lsrs	r2, r3, #3
- 8005a2e:	687b      	ldr	r3, [r7, #4]
- 8005a30:	3208      	adds	r2, #8
- 8005a32:	69b9      	ldr	r1, [r7, #24]
- 8005a34:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
-      }
-      
-      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
-      temp = GPIOx->MODER;
- 8005a38:	687b      	ldr	r3, [r7, #4]
- 8005a3a:	681b      	ldr	r3, [r3, #0]
- 8005a3c:	61bb      	str	r3, [r7, #24]
-      temp &= ~(GPIO_MODER_MODER0 << (position * 2));
- 8005a3e:	69fb      	ldr	r3, [r7, #28]
- 8005a40:	005b      	lsls	r3, r3, #1
- 8005a42:	2203      	movs	r2, #3
- 8005a44:	fa02 f303 	lsl.w	r3, r2, r3
- 8005a48:	43db      	mvns	r3, r3
- 8005a4a:	69ba      	ldr	r2, [r7, #24]
- 8005a4c:	4013      	ands	r3, r2
- 8005a4e:	61bb      	str	r3, [r7, #24]
-      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2));
- 8005a50:	683b      	ldr	r3, [r7, #0]
- 8005a52:	685b      	ldr	r3, [r3, #4]
- 8005a54:	f003 0203 	and.w	r2, r3, #3
- 8005a58:	69fb      	ldr	r3, [r7, #28]
- 8005a5a:	005b      	lsls	r3, r3, #1
- 8005a5c:	fa02 f303 	lsl.w	r3, r2, r3
- 8005a60:	69ba      	ldr	r2, [r7, #24]
- 8005a62:	4313      	orrs	r3, r2
- 8005a64:	61bb      	str	r3, [r7, #24]
-      GPIOx->MODER = temp;
- 8005a66:	687b      	ldr	r3, [r7, #4]
- 8005a68:	69ba      	ldr	r2, [r7, #24]
- 8005a6a:	601a      	str	r2, [r3, #0]
-
-      /*--------------------- EXTI Mode Configuration ------------------------*/
-      /* Configure the External Interrupt or event for the current IO */
-      if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
- 8005a6c:	683b      	ldr	r3, [r7, #0]
- 8005a6e:	685b      	ldr	r3, [r3, #4]
- 8005a70:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
- 8005a74:	2b00      	cmp	r3, #0
- 8005a76:	f000 80be 	beq.w	8005bf6 <HAL_GPIO_Init+0x306>
-      {
-        /* Enable SYSCFG Clock */
-        __HAL_RCC_SYSCFG_CLK_ENABLE();
- 8005a7a:	4b65      	ldr	r3, [pc, #404]	; (8005c10 <HAL_GPIO_Init+0x320>)
- 8005a7c:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8005a7e:	4a64      	ldr	r2, [pc, #400]	; (8005c10 <HAL_GPIO_Init+0x320>)
- 8005a80:	f443 4380 	orr.w	r3, r3, #16384	; 0x4000
- 8005a84:	6453      	str	r3, [r2, #68]	; 0x44
- 8005a86:	4b62      	ldr	r3, [pc, #392]	; (8005c10 <HAL_GPIO_Init+0x320>)
- 8005a88:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8005a8a:	f403 4380 	and.w	r3, r3, #16384	; 0x4000
- 8005a8e:	60fb      	str	r3, [r7, #12]
- 8005a90:	68fb      	ldr	r3, [r7, #12]
-
-        temp = SYSCFG->EXTICR[position >> 2];
- 8005a92:	4a60      	ldr	r2, [pc, #384]	; (8005c14 <HAL_GPIO_Init+0x324>)
- 8005a94:	69fb      	ldr	r3, [r7, #28]
- 8005a96:	089b      	lsrs	r3, r3, #2
- 8005a98:	3302      	adds	r3, #2
- 8005a9a:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 8005a9e:	61bb      	str	r3, [r7, #24]
-        temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03)));
- 8005aa0:	69fb      	ldr	r3, [r7, #28]
- 8005aa2:	f003 0303 	and.w	r3, r3, #3
- 8005aa6:	009b      	lsls	r3, r3, #2
- 8005aa8:	220f      	movs	r2, #15
- 8005aaa:	fa02 f303 	lsl.w	r3, r2, r3
- 8005aae:	43db      	mvns	r3, r3
- 8005ab0:	69ba      	ldr	r2, [r7, #24]
- 8005ab2:	4013      	ands	r3, r2
- 8005ab4:	61bb      	str	r3, [r7, #24]
-        temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
- 8005ab6:	687b      	ldr	r3, [r7, #4]
- 8005ab8:	4a57      	ldr	r2, [pc, #348]	; (8005c18 <HAL_GPIO_Init+0x328>)
- 8005aba:	4293      	cmp	r3, r2
- 8005abc:	d037      	beq.n	8005b2e <HAL_GPIO_Init+0x23e>
- 8005abe:	687b      	ldr	r3, [r7, #4]
- 8005ac0:	4a56      	ldr	r2, [pc, #344]	; (8005c1c <HAL_GPIO_Init+0x32c>)
- 8005ac2:	4293      	cmp	r3, r2
- 8005ac4:	d031      	beq.n	8005b2a <HAL_GPIO_Init+0x23a>
- 8005ac6:	687b      	ldr	r3, [r7, #4]
- 8005ac8:	4a55      	ldr	r2, [pc, #340]	; (8005c20 <HAL_GPIO_Init+0x330>)
- 8005aca:	4293      	cmp	r3, r2
- 8005acc:	d02b      	beq.n	8005b26 <HAL_GPIO_Init+0x236>
- 8005ace:	687b      	ldr	r3, [r7, #4]
- 8005ad0:	4a54      	ldr	r2, [pc, #336]	; (8005c24 <HAL_GPIO_Init+0x334>)
- 8005ad2:	4293      	cmp	r3, r2
- 8005ad4:	d025      	beq.n	8005b22 <HAL_GPIO_Init+0x232>
- 8005ad6:	687b      	ldr	r3, [r7, #4]
- 8005ad8:	4a53      	ldr	r2, [pc, #332]	; (8005c28 <HAL_GPIO_Init+0x338>)
- 8005ada:	4293      	cmp	r3, r2
- 8005adc:	d01f      	beq.n	8005b1e <HAL_GPIO_Init+0x22e>
- 8005ade:	687b      	ldr	r3, [r7, #4]
- 8005ae0:	4a52      	ldr	r2, [pc, #328]	; (8005c2c <HAL_GPIO_Init+0x33c>)
- 8005ae2:	4293      	cmp	r3, r2
- 8005ae4:	d019      	beq.n	8005b1a <HAL_GPIO_Init+0x22a>
- 8005ae6:	687b      	ldr	r3, [r7, #4]
- 8005ae8:	4a51      	ldr	r2, [pc, #324]	; (8005c30 <HAL_GPIO_Init+0x340>)
- 8005aea:	4293      	cmp	r3, r2
- 8005aec:	d013      	beq.n	8005b16 <HAL_GPIO_Init+0x226>
- 8005aee:	687b      	ldr	r3, [r7, #4]
- 8005af0:	4a50      	ldr	r2, [pc, #320]	; (8005c34 <HAL_GPIO_Init+0x344>)
- 8005af2:	4293      	cmp	r3, r2
- 8005af4:	d00d      	beq.n	8005b12 <HAL_GPIO_Init+0x222>
- 8005af6:	687b      	ldr	r3, [r7, #4]
- 8005af8:	4a4f      	ldr	r2, [pc, #316]	; (8005c38 <HAL_GPIO_Init+0x348>)
- 8005afa:	4293      	cmp	r3, r2
- 8005afc:	d007      	beq.n	8005b0e <HAL_GPIO_Init+0x21e>
- 8005afe:	687b      	ldr	r3, [r7, #4]
- 8005b00:	4a4e      	ldr	r2, [pc, #312]	; (8005c3c <HAL_GPIO_Init+0x34c>)
- 8005b02:	4293      	cmp	r3, r2
- 8005b04:	d101      	bne.n	8005b0a <HAL_GPIO_Init+0x21a>
- 8005b06:	2309      	movs	r3, #9
- 8005b08:	e012      	b.n	8005b30 <HAL_GPIO_Init+0x240>
- 8005b0a:	230a      	movs	r3, #10
- 8005b0c:	e010      	b.n	8005b30 <HAL_GPIO_Init+0x240>
- 8005b0e:	2308      	movs	r3, #8
- 8005b10:	e00e      	b.n	8005b30 <HAL_GPIO_Init+0x240>
- 8005b12:	2307      	movs	r3, #7
- 8005b14:	e00c      	b.n	8005b30 <HAL_GPIO_Init+0x240>
- 8005b16:	2306      	movs	r3, #6
- 8005b18:	e00a      	b.n	8005b30 <HAL_GPIO_Init+0x240>
- 8005b1a:	2305      	movs	r3, #5
- 8005b1c:	e008      	b.n	8005b30 <HAL_GPIO_Init+0x240>
- 8005b1e:	2304      	movs	r3, #4
- 8005b20:	e006      	b.n	8005b30 <HAL_GPIO_Init+0x240>
- 8005b22:	2303      	movs	r3, #3
- 8005b24:	e004      	b.n	8005b30 <HAL_GPIO_Init+0x240>
- 8005b26:	2302      	movs	r3, #2
- 8005b28:	e002      	b.n	8005b30 <HAL_GPIO_Init+0x240>
- 8005b2a:	2301      	movs	r3, #1
- 8005b2c:	e000      	b.n	8005b30 <HAL_GPIO_Init+0x240>
- 8005b2e:	2300      	movs	r3, #0
- 8005b30:	69fa      	ldr	r2, [r7, #28]
- 8005b32:	f002 0203 	and.w	r2, r2, #3
- 8005b36:	0092      	lsls	r2, r2, #2
- 8005b38:	4093      	lsls	r3, r2
- 8005b3a:	69ba      	ldr	r2, [r7, #24]
- 8005b3c:	4313      	orrs	r3, r2
- 8005b3e:	61bb      	str	r3, [r7, #24]
-        SYSCFG->EXTICR[position >> 2] = temp;
- 8005b40:	4934      	ldr	r1, [pc, #208]	; (8005c14 <HAL_GPIO_Init+0x324>)
- 8005b42:	69fb      	ldr	r3, [r7, #28]
- 8005b44:	089b      	lsrs	r3, r3, #2
- 8005b46:	3302      	adds	r3, #2
- 8005b48:	69ba      	ldr	r2, [r7, #24]
- 8005b4a:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
-
-        /* Clear EXTI line configuration */
-        temp = EXTI->IMR;
- 8005b4e:	4b3c      	ldr	r3, [pc, #240]	; (8005c40 <HAL_GPIO_Init+0x350>)
- 8005b50:	681b      	ldr	r3, [r3, #0]
- 8005b52:	61bb      	str	r3, [r7, #24]
-        temp &= ~((uint32_t)iocurrent);
- 8005b54:	693b      	ldr	r3, [r7, #16]
- 8005b56:	43db      	mvns	r3, r3
- 8005b58:	69ba      	ldr	r2, [r7, #24]
- 8005b5a:	4013      	ands	r3, r2
- 8005b5c:	61bb      	str	r3, [r7, #24]
-        if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
- 8005b5e:	683b      	ldr	r3, [r7, #0]
- 8005b60:	685b      	ldr	r3, [r3, #4]
- 8005b62:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
- 8005b66:	2b00      	cmp	r3, #0
- 8005b68:	d003      	beq.n	8005b72 <HAL_GPIO_Init+0x282>
-        {
-          temp |= iocurrent;
- 8005b6a:	69ba      	ldr	r2, [r7, #24]
- 8005b6c:	693b      	ldr	r3, [r7, #16]
- 8005b6e:	4313      	orrs	r3, r2
- 8005b70:	61bb      	str	r3, [r7, #24]
-        }
-        EXTI->IMR = temp;
- 8005b72:	4a33      	ldr	r2, [pc, #204]	; (8005c40 <HAL_GPIO_Init+0x350>)
- 8005b74:	69bb      	ldr	r3, [r7, #24]
- 8005b76:	6013      	str	r3, [r2, #0]
-
-        temp = EXTI->EMR;
- 8005b78:	4b31      	ldr	r3, [pc, #196]	; (8005c40 <HAL_GPIO_Init+0x350>)
- 8005b7a:	685b      	ldr	r3, [r3, #4]
- 8005b7c:	61bb      	str	r3, [r7, #24]
-        temp &= ~((uint32_t)iocurrent);
- 8005b7e:	693b      	ldr	r3, [r7, #16]
- 8005b80:	43db      	mvns	r3, r3
- 8005b82:	69ba      	ldr	r2, [r7, #24]
- 8005b84:	4013      	ands	r3, r2
- 8005b86:	61bb      	str	r3, [r7, #24]
-        if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
- 8005b88:	683b      	ldr	r3, [r7, #0]
- 8005b8a:	685b      	ldr	r3, [r3, #4]
- 8005b8c:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
- 8005b90:	2b00      	cmp	r3, #0
- 8005b92:	d003      	beq.n	8005b9c <HAL_GPIO_Init+0x2ac>
-        {
-          temp |= iocurrent;
- 8005b94:	69ba      	ldr	r2, [r7, #24]
- 8005b96:	693b      	ldr	r3, [r7, #16]
- 8005b98:	4313      	orrs	r3, r2
- 8005b9a:	61bb      	str	r3, [r7, #24]
-        }
-        EXTI->EMR = temp;
- 8005b9c:	4a28      	ldr	r2, [pc, #160]	; (8005c40 <HAL_GPIO_Init+0x350>)
- 8005b9e:	69bb      	ldr	r3, [r7, #24]
- 8005ba0:	6053      	str	r3, [r2, #4]
-
-        /* Clear Rising Falling edge configuration */
-        temp = EXTI->RTSR;
- 8005ba2:	4b27      	ldr	r3, [pc, #156]	; (8005c40 <HAL_GPIO_Init+0x350>)
- 8005ba4:	689b      	ldr	r3, [r3, #8]
- 8005ba6:	61bb      	str	r3, [r7, #24]
-        temp &= ~((uint32_t)iocurrent);
- 8005ba8:	693b      	ldr	r3, [r7, #16]
- 8005baa:	43db      	mvns	r3, r3
- 8005bac:	69ba      	ldr	r2, [r7, #24]
- 8005bae:	4013      	ands	r3, r2
- 8005bb0:	61bb      	str	r3, [r7, #24]
-        if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
- 8005bb2:	683b      	ldr	r3, [r7, #0]
- 8005bb4:	685b      	ldr	r3, [r3, #4]
- 8005bb6:	f403 1380 	and.w	r3, r3, #1048576	; 0x100000
- 8005bba:	2b00      	cmp	r3, #0
- 8005bbc:	d003      	beq.n	8005bc6 <HAL_GPIO_Init+0x2d6>
-        {
-          temp |= iocurrent;
- 8005bbe:	69ba      	ldr	r2, [r7, #24]
- 8005bc0:	693b      	ldr	r3, [r7, #16]
- 8005bc2:	4313      	orrs	r3, r2
- 8005bc4:	61bb      	str	r3, [r7, #24]
-        }
-        EXTI->RTSR = temp;
- 8005bc6:	4a1e      	ldr	r2, [pc, #120]	; (8005c40 <HAL_GPIO_Init+0x350>)
- 8005bc8:	69bb      	ldr	r3, [r7, #24]
- 8005bca:	6093      	str	r3, [r2, #8]
-
-        temp = EXTI->FTSR;
- 8005bcc:	4b1c      	ldr	r3, [pc, #112]	; (8005c40 <HAL_GPIO_Init+0x350>)
- 8005bce:	68db      	ldr	r3, [r3, #12]
- 8005bd0:	61bb      	str	r3, [r7, #24]
-        temp &= ~((uint32_t)iocurrent);
- 8005bd2:	693b      	ldr	r3, [r7, #16]
- 8005bd4:	43db      	mvns	r3, r3
- 8005bd6:	69ba      	ldr	r2, [r7, #24]
- 8005bd8:	4013      	ands	r3, r2
- 8005bda:	61bb      	str	r3, [r7, #24]
-        if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
- 8005bdc:	683b      	ldr	r3, [r7, #0]
- 8005bde:	685b      	ldr	r3, [r3, #4]
- 8005be0:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
- 8005be4:	2b00      	cmp	r3, #0
- 8005be6:	d003      	beq.n	8005bf0 <HAL_GPIO_Init+0x300>
-        {
-          temp |= iocurrent;
- 8005be8:	69ba      	ldr	r2, [r7, #24]
- 8005bea:	693b      	ldr	r3, [r7, #16]
- 8005bec:	4313      	orrs	r3, r2
- 8005bee:	61bb      	str	r3, [r7, #24]
-        }
-        EXTI->FTSR = temp;
- 8005bf0:	4a13      	ldr	r2, [pc, #76]	; (8005c40 <HAL_GPIO_Init+0x350>)
- 8005bf2:	69bb      	ldr	r3, [r7, #24]
- 8005bf4:	60d3      	str	r3, [r2, #12]
-  for(position = 0; position < GPIO_NUMBER; position++)
- 8005bf6:	69fb      	ldr	r3, [r7, #28]
- 8005bf8:	3301      	adds	r3, #1
- 8005bfa:	61fb      	str	r3, [r7, #28]
- 8005bfc:	69fb      	ldr	r3, [r7, #28]
- 8005bfe:	2b0f      	cmp	r3, #15
- 8005c00:	f67f ae86 	bls.w	8005910 <HAL_GPIO_Init+0x20>
-      }
-    }
-  }
-}
- 8005c04:	bf00      	nop
- 8005c06:	3724      	adds	r7, #36	; 0x24
- 8005c08:	46bd      	mov	sp, r7
- 8005c0a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8005c0e:	4770      	bx	lr
- 8005c10:	40023800 	.word	0x40023800
- 8005c14:	40013800 	.word	0x40013800
- 8005c18:	40020000 	.word	0x40020000
- 8005c1c:	40020400 	.word	0x40020400
- 8005c20:	40020800 	.word	0x40020800
- 8005c24:	40020c00 	.word	0x40020c00
- 8005c28:	40021000 	.word	0x40021000
- 8005c2c:	40021400 	.word	0x40021400
- 8005c30:	40021800 	.word	0x40021800
- 8005c34:	40021c00 	.word	0x40021c00
- 8005c38:	40022000 	.word	0x40022000
- 8005c3c:	40022400 	.word	0x40022400
- 8005c40:	40013c00 	.word	0x40013c00
-
-08005c44 <HAL_GPIO_DeInit>:
-  * @param  GPIO_Pin specifies the port bit to be written.
-  *          This parameter can be one of GPIO_PIN_x where x can be (0..15).
-  * @retval None
-  */
-void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
-{
- 8005c44:	b480      	push	{r7}
- 8005c46:	b087      	sub	sp, #28
- 8005c48:	af00      	add	r7, sp, #0
- 8005c4a:	6078      	str	r0, [r7, #4]
- 8005c4c:	6039      	str	r1, [r7, #0]
-  uint32_t position;
-  uint32_t ioposition = 0x00;
- 8005c4e:	2300      	movs	r3, #0
- 8005c50:	613b      	str	r3, [r7, #16]
-  uint32_t iocurrent = 0x00;
- 8005c52:	2300      	movs	r3, #0
- 8005c54:	60fb      	str	r3, [r7, #12]
-  uint32_t tmp = 0x00;
- 8005c56:	2300      	movs	r3, #0
- 8005c58:	60bb      	str	r3, [r7, #8]
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
-
-  /* Configure the port pins */
-  for(position = 0; position < GPIO_NUMBER; position++)
- 8005c5a:	2300      	movs	r3, #0
- 8005c5c:	617b      	str	r3, [r7, #20]
- 8005c5e:	e0d9      	b.n	8005e14 <HAL_GPIO_DeInit+0x1d0>
-  {
-    /* Get the IO position */
-    ioposition = ((uint32_t)0x01) << position;
- 8005c60:	2201      	movs	r2, #1
- 8005c62:	697b      	ldr	r3, [r7, #20]
- 8005c64:	fa02 f303 	lsl.w	r3, r2, r3
- 8005c68:	613b      	str	r3, [r7, #16]
-    /* Get the current IO position */
-    iocurrent = (GPIO_Pin) & ioposition;
- 8005c6a:	683a      	ldr	r2, [r7, #0]
- 8005c6c:	693b      	ldr	r3, [r7, #16]
- 8005c6e:	4013      	ands	r3, r2
- 8005c70:	60fb      	str	r3, [r7, #12]
-
-    if(iocurrent == ioposition)
- 8005c72:	68fa      	ldr	r2, [r7, #12]
- 8005c74:	693b      	ldr	r3, [r7, #16]
- 8005c76:	429a      	cmp	r2, r3
- 8005c78:	f040 80c9 	bne.w	8005e0e <HAL_GPIO_DeInit+0x1ca>
-    {
-      /*------------------------- EXTI Mode Configuration --------------------*/
-      tmp = SYSCFG->EXTICR[position >> 2];
- 8005c7c:	4a6a      	ldr	r2, [pc, #424]	; (8005e28 <HAL_GPIO_DeInit+0x1e4>)
- 8005c7e:	697b      	ldr	r3, [r7, #20]
- 8005c80:	089b      	lsrs	r3, r3, #2
- 8005c82:	3302      	adds	r3, #2
- 8005c84:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 8005c88:	60bb      	str	r3, [r7, #8]
-      tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03)));
- 8005c8a:	697b      	ldr	r3, [r7, #20]
- 8005c8c:	f003 0303 	and.w	r3, r3, #3
- 8005c90:	009b      	lsls	r3, r3, #2
- 8005c92:	220f      	movs	r2, #15
- 8005c94:	fa02 f303 	lsl.w	r3, r2, r3
- 8005c98:	68ba      	ldr	r2, [r7, #8]
- 8005c9a:	4013      	ands	r3, r2
- 8005c9c:	60bb      	str	r3, [r7, #8]
-      if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))))
- 8005c9e:	687b      	ldr	r3, [r7, #4]
- 8005ca0:	4a62      	ldr	r2, [pc, #392]	; (8005e2c <HAL_GPIO_DeInit+0x1e8>)
- 8005ca2:	4293      	cmp	r3, r2
- 8005ca4:	d037      	beq.n	8005d16 <HAL_GPIO_DeInit+0xd2>
- 8005ca6:	687b      	ldr	r3, [r7, #4]
- 8005ca8:	4a61      	ldr	r2, [pc, #388]	; (8005e30 <HAL_GPIO_DeInit+0x1ec>)
- 8005caa:	4293      	cmp	r3, r2
- 8005cac:	d031      	beq.n	8005d12 <HAL_GPIO_DeInit+0xce>
- 8005cae:	687b      	ldr	r3, [r7, #4]
- 8005cb0:	4a60      	ldr	r2, [pc, #384]	; (8005e34 <HAL_GPIO_DeInit+0x1f0>)
- 8005cb2:	4293      	cmp	r3, r2
- 8005cb4:	d02b      	beq.n	8005d0e <HAL_GPIO_DeInit+0xca>
- 8005cb6:	687b      	ldr	r3, [r7, #4]
- 8005cb8:	4a5f      	ldr	r2, [pc, #380]	; (8005e38 <HAL_GPIO_DeInit+0x1f4>)
- 8005cba:	4293      	cmp	r3, r2
- 8005cbc:	d025      	beq.n	8005d0a <HAL_GPIO_DeInit+0xc6>
- 8005cbe:	687b      	ldr	r3, [r7, #4]
- 8005cc0:	4a5e      	ldr	r2, [pc, #376]	; (8005e3c <HAL_GPIO_DeInit+0x1f8>)
- 8005cc2:	4293      	cmp	r3, r2
- 8005cc4:	d01f      	beq.n	8005d06 <HAL_GPIO_DeInit+0xc2>
- 8005cc6:	687b      	ldr	r3, [r7, #4]
- 8005cc8:	4a5d      	ldr	r2, [pc, #372]	; (8005e40 <HAL_GPIO_DeInit+0x1fc>)
- 8005cca:	4293      	cmp	r3, r2
- 8005ccc:	d019      	beq.n	8005d02 <HAL_GPIO_DeInit+0xbe>
- 8005cce:	687b      	ldr	r3, [r7, #4]
- 8005cd0:	4a5c      	ldr	r2, [pc, #368]	; (8005e44 <HAL_GPIO_DeInit+0x200>)
- 8005cd2:	4293      	cmp	r3, r2
- 8005cd4:	d013      	beq.n	8005cfe <HAL_GPIO_DeInit+0xba>
- 8005cd6:	687b      	ldr	r3, [r7, #4]
- 8005cd8:	4a5b      	ldr	r2, [pc, #364]	; (8005e48 <HAL_GPIO_DeInit+0x204>)
- 8005cda:	4293      	cmp	r3, r2
- 8005cdc:	d00d      	beq.n	8005cfa <HAL_GPIO_DeInit+0xb6>
- 8005cde:	687b      	ldr	r3, [r7, #4]
- 8005ce0:	4a5a      	ldr	r2, [pc, #360]	; (8005e4c <HAL_GPIO_DeInit+0x208>)
- 8005ce2:	4293      	cmp	r3, r2
- 8005ce4:	d007      	beq.n	8005cf6 <HAL_GPIO_DeInit+0xb2>
- 8005ce6:	687b      	ldr	r3, [r7, #4]
- 8005ce8:	4a59      	ldr	r2, [pc, #356]	; (8005e50 <HAL_GPIO_DeInit+0x20c>)
- 8005cea:	4293      	cmp	r3, r2
- 8005cec:	d101      	bne.n	8005cf2 <HAL_GPIO_DeInit+0xae>
- 8005cee:	2309      	movs	r3, #9
- 8005cf0:	e012      	b.n	8005d18 <HAL_GPIO_DeInit+0xd4>
- 8005cf2:	230a      	movs	r3, #10
- 8005cf4:	e010      	b.n	8005d18 <HAL_GPIO_DeInit+0xd4>
- 8005cf6:	2308      	movs	r3, #8
- 8005cf8:	e00e      	b.n	8005d18 <HAL_GPIO_DeInit+0xd4>
- 8005cfa:	2307      	movs	r3, #7
- 8005cfc:	e00c      	b.n	8005d18 <HAL_GPIO_DeInit+0xd4>
- 8005cfe:	2306      	movs	r3, #6
- 8005d00:	e00a      	b.n	8005d18 <HAL_GPIO_DeInit+0xd4>
- 8005d02:	2305      	movs	r3, #5
- 8005d04:	e008      	b.n	8005d18 <HAL_GPIO_DeInit+0xd4>
- 8005d06:	2304      	movs	r3, #4
- 8005d08:	e006      	b.n	8005d18 <HAL_GPIO_DeInit+0xd4>
- 8005d0a:	2303      	movs	r3, #3
- 8005d0c:	e004      	b.n	8005d18 <HAL_GPIO_DeInit+0xd4>
- 8005d0e:	2302      	movs	r3, #2
- 8005d10:	e002      	b.n	8005d18 <HAL_GPIO_DeInit+0xd4>
- 8005d12:	2301      	movs	r3, #1
- 8005d14:	e000      	b.n	8005d18 <HAL_GPIO_DeInit+0xd4>
- 8005d16:	2300      	movs	r3, #0
- 8005d18:	697a      	ldr	r2, [r7, #20]
- 8005d1a:	f002 0203 	and.w	r2, r2, #3
- 8005d1e:	0092      	lsls	r2, r2, #2
- 8005d20:	4093      	lsls	r3, r2
- 8005d22:	68ba      	ldr	r2, [r7, #8]
- 8005d24:	429a      	cmp	r2, r3
- 8005d26:	d132      	bne.n	8005d8e <HAL_GPIO_DeInit+0x14a>
-      {
-        /* Clear EXTI line configuration */
-        EXTI->IMR &= ~((uint32_t)iocurrent);
- 8005d28:	4b4a      	ldr	r3, [pc, #296]	; (8005e54 <HAL_GPIO_DeInit+0x210>)
- 8005d2a:	681a      	ldr	r2, [r3, #0]
- 8005d2c:	68fb      	ldr	r3, [r7, #12]
- 8005d2e:	43db      	mvns	r3, r3
- 8005d30:	4948      	ldr	r1, [pc, #288]	; (8005e54 <HAL_GPIO_DeInit+0x210>)
- 8005d32:	4013      	ands	r3, r2
- 8005d34:	600b      	str	r3, [r1, #0]
-        EXTI->EMR &= ~((uint32_t)iocurrent);
- 8005d36:	4b47      	ldr	r3, [pc, #284]	; (8005e54 <HAL_GPIO_DeInit+0x210>)
- 8005d38:	685a      	ldr	r2, [r3, #4]
- 8005d3a:	68fb      	ldr	r3, [r7, #12]
- 8005d3c:	43db      	mvns	r3, r3
- 8005d3e:	4945      	ldr	r1, [pc, #276]	; (8005e54 <HAL_GPIO_DeInit+0x210>)
- 8005d40:	4013      	ands	r3, r2
- 8005d42:	604b      	str	r3, [r1, #4]
-
-        /* Clear Rising Falling edge configuration */
-        EXTI->RTSR &= ~((uint32_t)iocurrent);
- 8005d44:	4b43      	ldr	r3, [pc, #268]	; (8005e54 <HAL_GPIO_DeInit+0x210>)
- 8005d46:	689a      	ldr	r2, [r3, #8]
- 8005d48:	68fb      	ldr	r3, [r7, #12]
- 8005d4a:	43db      	mvns	r3, r3
- 8005d4c:	4941      	ldr	r1, [pc, #260]	; (8005e54 <HAL_GPIO_DeInit+0x210>)
- 8005d4e:	4013      	ands	r3, r2
- 8005d50:	608b      	str	r3, [r1, #8]
-        EXTI->FTSR &= ~((uint32_t)iocurrent);
- 8005d52:	4b40      	ldr	r3, [pc, #256]	; (8005e54 <HAL_GPIO_DeInit+0x210>)
- 8005d54:	68da      	ldr	r2, [r3, #12]
- 8005d56:	68fb      	ldr	r3, [r7, #12]
- 8005d58:	43db      	mvns	r3, r3
- 8005d5a:	493e      	ldr	r1, [pc, #248]	; (8005e54 <HAL_GPIO_DeInit+0x210>)
- 8005d5c:	4013      	ands	r3, r2
- 8005d5e:	60cb      	str	r3, [r1, #12]
-
-        /* Configure the External Interrupt or event for the current IO */
-        tmp = ((uint32_t)0x0F) << (4 * (position & 0x03));
- 8005d60:	697b      	ldr	r3, [r7, #20]
- 8005d62:	f003 0303 	and.w	r3, r3, #3
- 8005d66:	009b      	lsls	r3, r3, #2
- 8005d68:	220f      	movs	r2, #15
- 8005d6a:	fa02 f303 	lsl.w	r3, r2, r3
- 8005d6e:	60bb      	str	r3, [r7, #8]
-        SYSCFG->EXTICR[position >> 2] &= ~tmp;
- 8005d70:	4a2d      	ldr	r2, [pc, #180]	; (8005e28 <HAL_GPIO_DeInit+0x1e4>)
- 8005d72:	697b      	ldr	r3, [r7, #20]
- 8005d74:	089b      	lsrs	r3, r3, #2
- 8005d76:	3302      	adds	r3, #2
- 8005d78:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
- 8005d7c:	68bb      	ldr	r3, [r7, #8]
- 8005d7e:	43da      	mvns	r2, r3
- 8005d80:	4829      	ldr	r0, [pc, #164]	; (8005e28 <HAL_GPIO_DeInit+0x1e4>)
- 8005d82:	697b      	ldr	r3, [r7, #20]
- 8005d84:	089b      	lsrs	r3, r3, #2
- 8005d86:	400a      	ands	r2, r1
- 8005d88:	3302      	adds	r3, #2
- 8005d8a:	f840 2023 	str.w	r2, [r0, r3, lsl #2]
-      }
-      /*------------------------- GPIO Mode Configuration --------------------*/
-      /* Configure IO Direction in Input Floating Mode */
-      GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2));
- 8005d8e:	687b      	ldr	r3, [r7, #4]
- 8005d90:	681a      	ldr	r2, [r3, #0]
- 8005d92:	697b      	ldr	r3, [r7, #20]
- 8005d94:	005b      	lsls	r3, r3, #1
- 8005d96:	2103      	movs	r1, #3
- 8005d98:	fa01 f303 	lsl.w	r3, r1, r3
- 8005d9c:	43db      	mvns	r3, r3
- 8005d9e:	401a      	ands	r2, r3
- 8005da0:	687b      	ldr	r3, [r7, #4]
- 8005da2:	601a      	str	r2, [r3, #0]
-
-      /* Configure the default Alternate Function in current IO */
-      GPIOx->AFR[position >> 3] &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
- 8005da4:	697b      	ldr	r3, [r7, #20]
- 8005da6:	08da      	lsrs	r2, r3, #3
- 8005da8:	687b      	ldr	r3, [r7, #4]
- 8005daa:	3208      	adds	r2, #8
- 8005dac:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
- 8005db0:	697b      	ldr	r3, [r7, #20]
- 8005db2:	f003 0307 	and.w	r3, r3, #7
- 8005db6:	009b      	lsls	r3, r3, #2
- 8005db8:	220f      	movs	r2, #15
- 8005dba:	fa02 f303 	lsl.w	r3, r2, r3
- 8005dbe:	43db      	mvns	r3, r3
- 8005dc0:	697a      	ldr	r2, [r7, #20]
- 8005dc2:	08d2      	lsrs	r2, r2, #3
- 8005dc4:	4019      	ands	r1, r3
- 8005dc6:	687b      	ldr	r3, [r7, #4]
- 8005dc8:	3208      	adds	r2, #8
- 8005dca:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
-
-      /* Deactivate the Pull-up and Pull-down resistor for the current IO */
-      GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
- 8005dce:	687b      	ldr	r3, [r7, #4]
- 8005dd0:	68da      	ldr	r2, [r3, #12]
- 8005dd2:	697b      	ldr	r3, [r7, #20]
- 8005dd4:	005b      	lsls	r3, r3, #1
- 8005dd6:	2103      	movs	r1, #3
- 8005dd8:	fa01 f303 	lsl.w	r3, r1, r3
- 8005ddc:	43db      	mvns	r3, r3
- 8005dde:	401a      	ands	r2, r3
- 8005de0:	687b      	ldr	r3, [r7, #4]
- 8005de2:	60da      	str	r2, [r3, #12]
-
-      /* Configure the default value IO Output Type */
-      GPIOx->OTYPER  &= ~(GPIO_OTYPER_OT_0 << position) ;
- 8005de4:	687b      	ldr	r3, [r7, #4]
- 8005de6:	685a      	ldr	r2, [r3, #4]
- 8005de8:	2101      	movs	r1, #1
- 8005dea:	697b      	ldr	r3, [r7, #20]
- 8005dec:	fa01 f303 	lsl.w	r3, r1, r3
- 8005df0:	43db      	mvns	r3, r3
- 8005df2:	401a      	ands	r2, r3
- 8005df4:	687b      	ldr	r3, [r7, #4]
- 8005df6:	605a      	str	r2, [r3, #4]
-
-      /* Configure the default value for IO Speed */
-      GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
- 8005df8:	687b      	ldr	r3, [r7, #4]
- 8005dfa:	689a      	ldr	r2, [r3, #8]
- 8005dfc:	697b      	ldr	r3, [r7, #20]
- 8005dfe:	005b      	lsls	r3, r3, #1
- 8005e00:	2103      	movs	r1, #3
- 8005e02:	fa01 f303 	lsl.w	r3, r1, r3
- 8005e06:	43db      	mvns	r3, r3
- 8005e08:	401a      	ands	r2, r3
- 8005e0a:	687b      	ldr	r3, [r7, #4]
- 8005e0c:	609a      	str	r2, [r3, #8]
-  for(position = 0; position < GPIO_NUMBER; position++)
- 8005e0e:	697b      	ldr	r3, [r7, #20]
- 8005e10:	3301      	adds	r3, #1
- 8005e12:	617b      	str	r3, [r7, #20]
- 8005e14:	697b      	ldr	r3, [r7, #20]
- 8005e16:	2b0f      	cmp	r3, #15
- 8005e18:	f67f af22 	bls.w	8005c60 <HAL_GPIO_DeInit+0x1c>
-    }
-  }
-}
- 8005e1c:	bf00      	nop
- 8005e1e:	371c      	adds	r7, #28
- 8005e20:	46bd      	mov	sp, r7
- 8005e22:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8005e26:	4770      	bx	lr
- 8005e28:	40013800 	.word	0x40013800
- 8005e2c:	40020000 	.word	0x40020000
- 8005e30:	40020400 	.word	0x40020400
- 8005e34:	40020800 	.word	0x40020800
- 8005e38:	40020c00 	.word	0x40020c00
- 8005e3c:	40021000 	.word	0x40021000
- 8005e40:	40021400 	.word	0x40021400
- 8005e44:	40021800 	.word	0x40021800
- 8005e48:	40021c00 	.word	0x40021c00
- 8005e4c:	40022000 	.word	0x40022000
- 8005e50:	40022400 	.word	0x40022400
- 8005e54:	40013c00 	.word	0x40013c00
-
-08005e58 <HAL_GPIO_ReadPin>:
-  * @param  GPIO_Pin specifies the port bit to read.
-  *         This parameter can be GPIO_PIN_x where x can be (0..15).
-  * @retval The input port pin value.
-  */
-GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
-{
- 8005e58:	b480      	push	{r7}
- 8005e5a:	b085      	sub	sp, #20
- 8005e5c:	af00      	add	r7, sp, #0
- 8005e5e:	6078      	str	r0, [r7, #4]
- 8005e60:	460b      	mov	r3, r1
- 8005e62:	807b      	strh	r3, [r7, #2]
-  GPIO_PinState bitstatus;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_PIN(GPIO_Pin));
-
-  if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
- 8005e64:	687b      	ldr	r3, [r7, #4]
- 8005e66:	691a      	ldr	r2, [r3, #16]
- 8005e68:	887b      	ldrh	r3, [r7, #2]
- 8005e6a:	4013      	ands	r3, r2
- 8005e6c:	2b00      	cmp	r3, #0
- 8005e6e:	d002      	beq.n	8005e76 <HAL_GPIO_ReadPin+0x1e>
-  {
-    bitstatus = GPIO_PIN_SET;
- 8005e70:	2301      	movs	r3, #1
- 8005e72:	73fb      	strb	r3, [r7, #15]
- 8005e74:	e001      	b.n	8005e7a <HAL_GPIO_ReadPin+0x22>
-  }
-  else
-  {
-    bitstatus = GPIO_PIN_RESET;
- 8005e76:	2300      	movs	r3, #0
- 8005e78:	73fb      	strb	r3, [r7, #15]
-  }
-  return bitstatus;
- 8005e7a:	7bfb      	ldrb	r3, [r7, #15]
-}
- 8005e7c:	4618      	mov	r0, r3
- 8005e7e:	3714      	adds	r7, #20
- 8005e80:	46bd      	mov	sp, r7
- 8005e82:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8005e86:	4770      	bx	lr
-
-08005e88 <HAL_GPIO_WritePin>:
-  *            @arg GPIO_PIN_RESET: to clear the port pin
-  *            @arg GPIO_PIN_SET: to set the port pin
-  * @retval None
-  */
-void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
-{
- 8005e88:	b480      	push	{r7}
- 8005e8a:	b083      	sub	sp, #12
- 8005e8c:	af00      	add	r7, sp, #0
- 8005e8e:	6078      	str	r0, [r7, #4]
- 8005e90:	460b      	mov	r3, r1
- 8005e92:	807b      	strh	r3, [r7, #2]
- 8005e94:	4613      	mov	r3, r2
- 8005e96:	707b      	strb	r3, [r7, #1]
-  /* Check the parameters */
-  assert_param(IS_GPIO_PIN(GPIO_Pin));
-  assert_param(IS_GPIO_PIN_ACTION(PinState));
-
-  if(PinState != GPIO_PIN_RESET)
- 8005e98:	787b      	ldrb	r3, [r7, #1]
- 8005e9a:	2b00      	cmp	r3, #0
- 8005e9c:	d003      	beq.n	8005ea6 <HAL_GPIO_WritePin+0x1e>
-  {
-    GPIOx->BSRR = GPIO_Pin;
- 8005e9e:	887a      	ldrh	r2, [r7, #2]
- 8005ea0:	687b      	ldr	r3, [r7, #4]
- 8005ea2:	619a      	str	r2, [r3, #24]
-  }
-  else
-  {
-    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16;
-  }
-}
- 8005ea4:	e003      	b.n	8005eae <HAL_GPIO_WritePin+0x26>
-    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16;
- 8005ea6:	887b      	ldrh	r3, [r7, #2]
- 8005ea8:	041a      	lsls	r2, r3, #16
- 8005eaa:	687b      	ldr	r3, [r7, #4]
- 8005eac:	619a      	str	r2, [r3, #24]
-}
- 8005eae:	bf00      	nop
- 8005eb0:	370c      	adds	r7, #12
- 8005eb2:	46bd      	mov	sp, r7
- 8005eb4:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8005eb8:	4770      	bx	lr
-	...
-
-08005ebc <HAL_I2C_Init>:
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
-{
- 8005ebc:	b580      	push	{r7, lr}
- 8005ebe:	b082      	sub	sp, #8
- 8005ec0:	af00      	add	r7, sp, #0
- 8005ec2:	6078      	str	r0, [r7, #4]
-  /* Check the I2C handle allocation */
-  if (hi2c == NULL)
- 8005ec4:	687b      	ldr	r3, [r7, #4]
- 8005ec6:	2b00      	cmp	r3, #0
- 8005ec8:	d101      	bne.n	8005ece <HAL_I2C_Init+0x12>
-  {
-    return HAL_ERROR;
- 8005eca:	2301      	movs	r3, #1
- 8005ecc:	e07f      	b.n	8005fce <HAL_I2C_Init+0x112>
-  assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
-  assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks));
-  assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
-  assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
-
-  if (hi2c->State == HAL_I2C_STATE_RESET)
- 8005ece:	687b      	ldr	r3, [r7, #4]
- 8005ed0:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
- 8005ed4:	b2db      	uxtb	r3, r3
- 8005ed6:	2b00      	cmp	r3, #0
- 8005ed8:	d106      	bne.n	8005ee8 <HAL_I2C_Init+0x2c>
-  {
-    /* Allocate lock resource and initialize it */
-    hi2c->Lock = HAL_UNLOCKED;
- 8005eda:	687b      	ldr	r3, [r7, #4]
- 8005edc:	2200      	movs	r2, #0
- 8005ede:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-    /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
-    hi2c->MspInitCallback(hi2c);
-#else
-    /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
-    HAL_I2C_MspInit(hi2c);
- 8005ee2:	6878      	ldr	r0, [r7, #4]
- 8005ee4:	f7fd fdb4 	bl	8003a50 <HAL_I2C_MspInit>
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-  }
-
-  hi2c->State = HAL_I2C_STATE_BUSY;
- 8005ee8:	687b      	ldr	r3, [r7, #4]
- 8005eea:	2224      	movs	r2, #36	; 0x24
- 8005eec:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-
-  /* Disable the selected I2C peripheral */
-  __HAL_I2C_DISABLE(hi2c);
- 8005ef0:	687b      	ldr	r3, [r7, #4]
- 8005ef2:	681b      	ldr	r3, [r3, #0]
- 8005ef4:	681a      	ldr	r2, [r3, #0]
- 8005ef6:	687b      	ldr	r3, [r7, #4]
- 8005ef8:	681b      	ldr	r3, [r3, #0]
- 8005efa:	f022 0201 	bic.w	r2, r2, #1
- 8005efe:	601a      	str	r2, [r3, #0]
-
-  /*---------------------------- I2Cx TIMINGR Configuration ------------------*/
-  /* Configure I2Cx: Frequency range */
-  hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
- 8005f00:	687b      	ldr	r3, [r7, #4]
- 8005f02:	685a      	ldr	r2, [r3, #4]
- 8005f04:	687b      	ldr	r3, [r7, #4]
- 8005f06:	681b      	ldr	r3, [r3, #0]
- 8005f08:	f022 6270 	bic.w	r2, r2, #251658240	; 0xf000000
- 8005f0c:	611a      	str	r2, [r3, #16]
-
-  /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
-  /* Disable Own Address1 before set the Own Address1 configuration */
-  hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
- 8005f0e:	687b      	ldr	r3, [r7, #4]
- 8005f10:	681b      	ldr	r3, [r3, #0]
- 8005f12:	689a      	ldr	r2, [r3, #8]
- 8005f14:	687b      	ldr	r3, [r7, #4]
- 8005f16:	681b      	ldr	r3, [r3, #0]
- 8005f18:	f422 4200 	bic.w	r2, r2, #32768	; 0x8000
- 8005f1c:	609a      	str	r2, [r3, #8]
-
-  /* Configure I2Cx: Own Address1 and ack own address1 mode */
-  if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
- 8005f1e:	687b      	ldr	r3, [r7, #4]
- 8005f20:	68db      	ldr	r3, [r3, #12]
- 8005f22:	2b01      	cmp	r3, #1
- 8005f24:	d107      	bne.n	8005f36 <HAL_I2C_Init+0x7a>
-  {
-    hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
- 8005f26:	687b      	ldr	r3, [r7, #4]
- 8005f28:	689a      	ldr	r2, [r3, #8]
- 8005f2a:	687b      	ldr	r3, [r7, #4]
- 8005f2c:	681b      	ldr	r3, [r3, #0]
- 8005f2e:	f442 4200 	orr.w	r2, r2, #32768	; 0x8000
- 8005f32:	609a      	str	r2, [r3, #8]
- 8005f34:	e006      	b.n	8005f44 <HAL_I2C_Init+0x88>
-  }
-  else /* I2C_ADDRESSINGMODE_10BIT */
-  {
-    hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);
- 8005f36:	687b      	ldr	r3, [r7, #4]
- 8005f38:	689a      	ldr	r2, [r3, #8]
- 8005f3a:	687b      	ldr	r3, [r7, #4]
- 8005f3c:	681b      	ldr	r3, [r3, #0]
- 8005f3e:	f442 4204 	orr.w	r2, r2, #33792	; 0x8400
- 8005f42:	609a      	str	r2, [r3, #8]
-  }
-
-  /*---------------------------- I2Cx CR2 Configuration ----------------------*/
-  /* Configure I2Cx: Addressing Master mode */
-  if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
- 8005f44:	687b      	ldr	r3, [r7, #4]
- 8005f46:	68db      	ldr	r3, [r3, #12]
- 8005f48:	2b02      	cmp	r3, #2
- 8005f4a:	d104      	bne.n	8005f56 <HAL_I2C_Init+0x9a>
-  {
-    hi2c->Instance->CR2 = (I2C_CR2_ADD10);
- 8005f4c:	687b      	ldr	r3, [r7, #4]
- 8005f4e:	681b      	ldr	r3, [r3, #0]
- 8005f50:	f44f 6200 	mov.w	r2, #2048	; 0x800
- 8005f54:	605a      	str	r2, [r3, #4]
-  }
-  /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
-  hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
- 8005f56:	687b      	ldr	r3, [r7, #4]
- 8005f58:	681b      	ldr	r3, [r3, #0]
- 8005f5a:	6859      	ldr	r1, [r3, #4]
- 8005f5c:	687b      	ldr	r3, [r7, #4]
- 8005f5e:	681a      	ldr	r2, [r3, #0]
- 8005f60:	4b1d      	ldr	r3, [pc, #116]	; (8005fd8 <HAL_I2C_Init+0x11c>)
- 8005f62:	430b      	orrs	r3, r1
- 8005f64:	6053      	str	r3, [r2, #4]
-
-  /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
-  /* Disable Own Address2 before set the Own Address2 configuration */
-  hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE;
- 8005f66:	687b      	ldr	r3, [r7, #4]
- 8005f68:	681b      	ldr	r3, [r3, #0]
- 8005f6a:	68da      	ldr	r2, [r3, #12]
- 8005f6c:	687b      	ldr	r3, [r7, #4]
- 8005f6e:	681b      	ldr	r3, [r3, #0]
- 8005f70:	f422 4200 	bic.w	r2, r2, #32768	; 0x8000
- 8005f74:	60da      	str	r2, [r3, #12]
-
-  /* Configure I2Cx: Dual mode and Own Address2 */
-  hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8));
- 8005f76:	687b      	ldr	r3, [r7, #4]
- 8005f78:	691a      	ldr	r2, [r3, #16]
- 8005f7a:	687b      	ldr	r3, [r7, #4]
- 8005f7c:	695b      	ldr	r3, [r3, #20]
- 8005f7e:	ea42 0103 	orr.w	r1, r2, r3
- 8005f82:	687b      	ldr	r3, [r7, #4]
- 8005f84:	699b      	ldr	r3, [r3, #24]
- 8005f86:	021a      	lsls	r2, r3, #8
- 8005f88:	687b      	ldr	r3, [r7, #4]
- 8005f8a:	681b      	ldr	r3, [r3, #0]
- 8005f8c:	430a      	orrs	r2, r1
- 8005f8e:	60da      	str	r2, [r3, #12]
-
-  /*---------------------------- I2Cx CR1 Configuration ----------------------*/
-  /* Configure I2Cx: Generalcall and NoStretch mode */
-  hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
- 8005f90:	687b      	ldr	r3, [r7, #4]
- 8005f92:	69d9      	ldr	r1, [r3, #28]
- 8005f94:	687b      	ldr	r3, [r7, #4]
- 8005f96:	6a1a      	ldr	r2, [r3, #32]
- 8005f98:	687b      	ldr	r3, [r7, #4]
- 8005f9a:	681b      	ldr	r3, [r3, #0]
- 8005f9c:	430a      	orrs	r2, r1
- 8005f9e:	601a      	str	r2, [r3, #0]
-
-  /* Enable the selected I2C peripheral */
-  __HAL_I2C_ENABLE(hi2c);
- 8005fa0:	687b      	ldr	r3, [r7, #4]
- 8005fa2:	681b      	ldr	r3, [r3, #0]
- 8005fa4:	681a      	ldr	r2, [r3, #0]
- 8005fa6:	687b      	ldr	r3, [r7, #4]
- 8005fa8:	681b      	ldr	r3, [r3, #0]
- 8005faa:	f042 0201 	orr.w	r2, r2, #1
- 8005fae:	601a      	str	r2, [r3, #0]
-
-  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- 8005fb0:	687b      	ldr	r3, [r7, #4]
- 8005fb2:	2200      	movs	r2, #0
- 8005fb4:	645a      	str	r2, [r3, #68]	; 0x44
-  hi2c->State = HAL_I2C_STATE_READY;
- 8005fb6:	687b      	ldr	r3, [r7, #4]
- 8005fb8:	2220      	movs	r2, #32
- 8005fba:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-  hi2c->PreviousState = I2C_STATE_NONE;
- 8005fbe:	687b      	ldr	r3, [r7, #4]
- 8005fc0:	2200      	movs	r2, #0
- 8005fc2:	631a      	str	r2, [r3, #48]	; 0x30
-  hi2c->Mode = HAL_I2C_MODE_NONE;
- 8005fc4:	687b      	ldr	r3, [r7, #4]
- 8005fc6:	2200      	movs	r2, #0
- 8005fc8:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
-
-  return HAL_OK;
- 8005fcc:	2300      	movs	r3, #0
-}
- 8005fce:	4618      	mov	r0, r3
- 8005fd0:	3708      	adds	r7, #8
- 8005fd2:	46bd      	mov	sp, r7
- 8005fd4:	bd80      	pop	{r7, pc}
- 8005fd6:	bf00      	nop
- 8005fd8:	02008000 	.word	0x02008000
-
-08005fdc <HAL_I2C_DeInit>:
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
-{
- 8005fdc:	b580      	push	{r7, lr}
- 8005fde:	b082      	sub	sp, #8
- 8005fe0:	af00      	add	r7, sp, #0
- 8005fe2:	6078      	str	r0, [r7, #4]
-  /* Check the I2C handle allocation */
-  if (hi2c == NULL)
- 8005fe4:	687b      	ldr	r3, [r7, #4]
- 8005fe6:	2b00      	cmp	r3, #0
- 8005fe8:	d101      	bne.n	8005fee <HAL_I2C_DeInit+0x12>
-  {
-    return HAL_ERROR;
- 8005fea:	2301      	movs	r3, #1
- 8005fec:	e021      	b.n	8006032 <HAL_I2C_DeInit+0x56>
-  }
-
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-
-  hi2c->State = HAL_I2C_STATE_BUSY;
- 8005fee:	687b      	ldr	r3, [r7, #4]
- 8005ff0:	2224      	movs	r2, #36	; 0x24
- 8005ff2:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-
-  /* Disable the I2C Peripheral Clock */
-  __HAL_I2C_DISABLE(hi2c);
- 8005ff6:	687b      	ldr	r3, [r7, #4]
- 8005ff8:	681b      	ldr	r3, [r3, #0]
- 8005ffa:	681a      	ldr	r2, [r3, #0]
- 8005ffc:	687b      	ldr	r3, [r7, #4]
- 8005ffe:	681b      	ldr	r3, [r3, #0]
- 8006000:	f022 0201 	bic.w	r2, r2, #1
- 8006004:	601a      	str	r2, [r3, #0]
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  hi2c->MspDeInitCallback(hi2c);
-#else
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_I2C_MspDeInit(hi2c);
- 8006006:	6878      	ldr	r0, [r7, #4]
- 8006008:	f7fd fd9a 	bl	8003b40 <HAL_I2C_MspDeInit>
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-
-  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- 800600c:	687b      	ldr	r3, [r7, #4]
- 800600e:	2200      	movs	r2, #0
- 8006010:	645a      	str	r2, [r3, #68]	; 0x44
-  hi2c->State = HAL_I2C_STATE_RESET;
- 8006012:	687b      	ldr	r3, [r7, #4]
- 8006014:	2200      	movs	r2, #0
- 8006016:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-  hi2c->PreviousState = I2C_STATE_NONE;
- 800601a:	687b      	ldr	r3, [r7, #4]
- 800601c:	2200      	movs	r2, #0
- 800601e:	631a      	str	r2, [r3, #48]	; 0x30
-  hi2c->Mode = HAL_I2C_MODE_NONE;
- 8006020:	687b      	ldr	r3, [r7, #4]
- 8006022:	2200      	movs	r2, #0
- 8006024:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
-
-  /* Release Lock */
-  __HAL_UNLOCK(hi2c);
- 8006028:	687b      	ldr	r3, [r7, #4]
- 800602a:	2200      	movs	r2, #0
- 800602c:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-  return HAL_OK;
- 8006030:	2300      	movs	r3, #0
-}
- 8006032:	4618      	mov	r0, r3
- 8006034:	3708      	adds	r7, #8
- 8006036:	46bd      	mov	sp, r7
- 8006038:	bd80      	pop	{r7, pc}
-	...
-
-0800603c <HAL_I2C_Mem_Write>:
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- 800603c:	b580      	push	{r7, lr}
- 800603e:	b088      	sub	sp, #32
- 8006040:	af02      	add	r7, sp, #8
- 8006042:	60f8      	str	r0, [r7, #12]
- 8006044:	4608      	mov	r0, r1
- 8006046:	4611      	mov	r1, r2
- 8006048:	461a      	mov	r2, r3
- 800604a:	4603      	mov	r3, r0
- 800604c:	817b      	strh	r3, [r7, #10]
- 800604e:	460b      	mov	r3, r1
- 8006050:	813b      	strh	r3, [r7, #8]
- 8006052:	4613      	mov	r3, r2
- 8006054:	80fb      	strh	r3, [r7, #6]
-  uint32_t tickstart;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
- 8006056:	68fb      	ldr	r3, [r7, #12]
- 8006058:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
- 800605c:	b2db      	uxtb	r3, r3
- 800605e:	2b20      	cmp	r3, #32
- 8006060:	f040 80f9 	bne.w	8006256 <HAL_I2C_Mem_Write+0x21a>
-  {
-    if ((pData == NULL) || (Size == 0U))
- 8006064:	6a3b      	ldr	r3, [r7, #32]
- 8006066:	2b00      	cmp	r3, #0
- 8006068:	d002      	beq.n	8006070 <HAL_I2C_Mem_Write+0x34>
- 800606a:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
- 800606c:	2b00      	cmp	r3, #0
- 800606e:	d105      	bne.n	800607c <HAL_I2C_Mem_Write+0x40>
-    {
-      hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;
- 8006070:	68fb      	ldr	r3, [r7, #12]
- 8006072:	f44f 7200 	mov.w	r2, #512	; 0x200
- 8006076:	645a      	str	r2, [r3, #68]	; 0x44
-      return  HAL_ERROR;
- 8006078:	2301      	movs	r3, #1
- 800607a:	e0ed      	b.n	8006258 <HAL_I2C_Mem_Write+0x21c>
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
- 800607c:	68fb      	ldr	r3, [r7, #12]
- 800607e:	f893 3040 	ldrb.w	r3, [r3, #64]	; 0x40
- 8006082:	2b01      	cmp	r3, #1
- 8006084:	d101      	bne.n	800608a <HAL_I2C_Mem_Write+0x4e>
- 8006086:	2302      	movs	r3, #2
- 8006088:	e0e6      	b.n	8006258 <HAL_I2C_Mem_Write+0x21c>
- 800608a:	68fb      	ldr	r3, [r7, #12]
- 800608c:	2201      	movs	r2, #1
- 800608e:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
- 8006092:	f7fe fa2d 	bl	80044f0 <HAL_GetTick>
- 8006096:	6178      	str	r0, [r7, #20]
-
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
- 8006098:	697b      	ldr	r3, [r7, #20]
- 800609a:	9300      	str	r3, [sp, #0]
- 800609c:	2319      	movs	r3, #25
- 800609e:	2201      	movs	r2, #1
- 80060a0:	f44f 4100 	mov.w	r1, #32768	; 0x8000
- 80060a4:	68f8      	ldr	r0, [r7, #12]
- 80060a6:	f000 fad1 	bl	800664c <I2C_WaitOnFlagUntilTimeout>
- 80060aa:	4603      	mov	r3, r0
- 80060ac:	2b00      	cmp	r3, #0
- 80060ae:	d001      	beq.n	80060b4 <HAL_I2C_Mem_Write+0x78>
-    {
-      return HAL_ERROR;
- 80060b0:	2301      	movs	r3, #1
- 80060b2:	e0d1      	b.n	8006258 <HAL_I2C_Mem_Write+0x21c>
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
- 80060b4:	68fb      	ldr	r3, [r7, #12]
- 80060b6:	2221      	movs	r2, #33	; 0x21
- 80060b8:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-    hi2c->Mode      = HAL_I2C_MODE_MEM;
- 80060bc:	68fb      	ldr	r3, [r7, #12]
- 80060be:	2240      	movs	r2, #64	; 0x40
- 80060c0:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- 80060c4:	68fb      	ldr	r3, [r7, #12]
- 80060c6:	2200      	movs	r2, #0
- 80060c8:	645a      	str	r2, [r3, #68]	; 0x44
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
- 80060ca:	68fb      	ldr	r3, [r7, #12]
- 80060cc:	6a3a      	ldr	r2, [r7, #32]
- 80060ce:	625a      	str	r2, [r3, #36]	; 0x24
-    hi2c->XferCount = Size;
- 80060d0:	68fb      	ldr	r3, [r7, #12]
- 80060d2:	8cba      	ldrh	r2, [r7, #36]	; 0x24
- 80060d4:	855a      	strh	r2, [r3, #42]	; 0x2a
-    hi2c->XferISR   = NULL;
- 80060d6:	68fb      	ldr	r3, [r7, #12]
- 80060d8:	2200      	movs	r2, #0
- 80060da:	635a      	str	r2, [r3, #52]	; 0x34
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
- 80060dc:	88f8      	ldrh	r0, [r7, #6]
- 80060de:	893a      	ldrh	r2, [r7, #8]
- 80060e0:	8979      	ldrh	r1, [r7, #10]
- 80060e2:	697b      	ldr	r3, [r7, #20]
- 80060e4:	9301      	str	r3, [sp, #4]
- 80060e6:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 80060e8:	9300      	str	r3, [sp, #0]
- 80060ea:	4603      	mov	r3, r0
- 80060ec:	68f8      	ldr	r0, [r7, #12]
- 80060ee:	f000 f9e1 	bl	80064b4 <I2C_RequestMemoryWrite>
- 80060f2:	4603      	mov	r3, r0
- 80060f4:	2b00      	cmp	r3, #0
- 80060f6:	d005      	beq.n	8006104 <HAL_I2C_Mem_Write+0xc8>
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
- 80060f8:	68fb      	ldr	r3, [r7, #12]
- 80060fa:	2200      	movs	r2, #0
- 80060fc:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-      return HAL_ERROR;
- 8006100:	2301      	movs	r3, #1
- 8006102:	e0a9      	b.n	8006258 <HAL_I2C_Mem_Write+0x21c>
-    }
-
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
- 8006104:	68fb      	ldr	r3, [r7, #12]
- 8006106:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 8006108:	b29b      	uxth	r3, r3
- 800610a:	2bff      	cmp	r3, #255	; 0xff
- 800610c:	d90e      	bls.n	800612c <HAL_I2C_Mem_Write+0xf0>
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
- 800610e:	68fb      	ldr	r3, [r7, #12]
- 8006110:	22ff      	movs	r2, #255	; 0xff
- 8006112:	851a      	strh	r2, [r3, #40]	; 0x28
-      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
- 8006114:	68fb      	ldr	r3, [r7, #12]
- 8006116:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 8006118:	b2da      	uxtb	r2, r3
- 800611a:	8979      	ldrh	r1, [r7, #10]
- 800611c:	2300      	movs	r3, #0
- 800611e:	9300      	str	r3, [sp, #0]
- 8006120:	f04f 7380 	mov.w	r3, #16777216	; 0x1000000
- 8006124:	68f8      	ldr	r0, [r7, #12]
- 8006126:	f000 fbb3 	bl	8006890 <I2C_TransferConfig>
- 800612a:	e00f      	b.n	800614c <HAL_I2C_Mem_Write+0x110>
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
- 800612c:	68fb      	ldr	r3, [r7, #12]
- 800612e:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 8006130:	b29a      	uxth	r2, r3
- 8006132:	68fb      	ldr	r3, [r7, #12]
- 8006134:	851a      	strh	r2, [r3, #40]	; 0x28
-      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
- 8006136:	68fb      	ldr	r3, [r7, #12]
- 8006138:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 800613a:	b2da      	uxtb	r2, r3
- 800613c:	8979      	ldrh	r1, [r7, #10]
- 800613e:	2300      	movs	r3, #0
- 8006140:	9300      	str	r3, [sp, #0]
- 8006142:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
- 8006146:	68f8      	ldr	r0, [r7, #12]
- 8006148:	f000 fba2 	bl	8006890 <I2C_TransferConfig>
-    }
-
-    do
-    {
-      /* Wait until TXIS flag is set */
-      if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- 800614c:	697a      	ldr	r2, [r7, #20]
- 800614e:	6ab9      	ldr	r1, [r7, #40]	; 0x28
- 8006150:	68f8      	ldr	r0, [r7, #12]
- 8006152:	f000 fabb 	bl	80066cc <I2C_WaitOnTXISFlagUntilTimeout>
- 8006156:	4603      	mov	r3, r0
- 8006158:	2b00      	cmp	r3, #0
- 800615a:	d001      	beq.n	8006160 <HAL_I2C_Mem_Write+0x124>
-      {
-        return HAL_ERROR;
- 800615c:	2301      	movs	r3, #1
- 800615e:	e07b      	b.n	8006258 <HAL_I2C_Mem_Write+0x21c>
-      }
-
-      /* Write data to TXDR */
-      hi2c->Instance->TXDR = *hi2c->pBuffPtr;
- 8006160:	68fb      	ldr	r3, [r7, #12]
- 8006162:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8006164:	781a      	ldrb	r2, [r3, #0]
- 8006166:	68fb      	ldr	r3, [r7, #12]
- 8006168:	681b      	ldr	r3, [r3, #0]
- 800616a:	629a      	str	r2, [r3, #40]	; 0x28
-
-      /* Increment Buffer pointer */
-      hi2c->pBuffPtr++;
- 800616c:	68fb      	ldr	r3, [r7, #12]
- 800616e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8006170:	1c5a      	adds	r2, r3, #1
- 8006172:	68fb      	ldr	r3, [r7, #12]
- 8006174:	625a      	str	r2, [r3, #36]	; 0x24
-
-      hi2c->XferCount--;
- 8006176:	68fb      	ldr	r3, [r7, #12]
- 8006178:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 800617a:	b29b      	uxth	r3, r3
- 800617c:	3b01      	subs	r3, #1
- 800617e:	b29a      	uxth	r2, r3
- 8006180:	68fb      	ldr	r3, [r7, #12]
- 8006182:	855a      	strh	r2, [r3, #42]	; 0x2a
-      hi2c->XferSize--;
- 8006184:	68fb      	ldr	r3, [r7, #12]
- 8006186:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 8006188:	3b01      	subs	r3, #1
- 800618a:	b29a      	uxth	r2, r3
- 800618c:	68fb      	ldr	r3, [r7, #12]
- 800618e:	851a      	strh	r2, [r3, #40]	; 0x28
-
-      if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))
- 8006190:	68fb      	ldr	r3, [r7, #12]
- 8006192:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 8006194:	b29b      	uxth	r3, r3
- 8006196:	2b00      	cmp	r3, #0
- 8006198:	d034      	beq.n	8006204 <HAL_I2C_Mem_Write+0x1c8>
- 800619a:	68fb      	ldr	r3, [r7, #12]
- 800619c:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 800619e:	2b00      	cmp	r3, #0
- 80061a0:	d130      	bne.n	8006204 <HAL_I2C_Mem_Write+0x1c8>
-      {
-        /* Wait until TCR flag is set */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
- 80061a2:	697b      	ldr	r3, [r7, #20]
- 80061a4:	9300      	str	r3, [sp, #0]
- 80061a6:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 80061a8:	2200      	movs	r2, #0
- 80061aa:	2180      	movs	r1, #128	; 0x80
- 80061ac:	68f8      	ldr	r0, [r7, #12]
- 80061ae:	f000 fa4d 	bl	800664c <I2C_WaitOnFlagUntilTimeout>
- 80061b2:	4603      	mov	r3, r0
- 80061b4:	2b00      	cmp	r3, #0
- 80061b6:	d001      	beq.n	80061bc <HAL_I2C_Mem_Write+0x180>
-        {
-          return HAL_ERROR;
- 80061b8:	2301      	movs	r3, #1
- 80061ba:	e04d      	b.n	8006258 <HAL_I2C_Mem_Write+0x21c>
-        }
-
-        if (hi2c->XferCount > MAX_NBYTE_SIZE)
- 80061bc:	68fb      	ldr	r3, [r7, #12]
- 80061be:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 80061c0:	b29b      	uxth	r3, r3
- 80061c2:	2bff      	cmp	r3, #255	; 0xff
- 80061c4:	d90e      	bls.n	80061e4 <HAL_I2C_Mem_Write+0x1a8>
-        {
-          hi2c->XferSize = MAX_NBYTE_SIZE;
- 80061c6:	68fb      	ldr	r3, [r7, #12]
- 80061c8:	22ff      	movs	r2, #255	; 0xff
- 80061ca:	851a      	strh	r2, [r3, #40]	; 0x28
-          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
- 80061cc:	68fb      	ldr	r3, [r7, #12]
- 80061ce:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 80061d0:	b2da      	uxtb	r2, r3
- 80061d2:	8979      	ldrh	r1, [r7, #10]
- 80061d4:	2300      	movs	r3, #0
- 80061d6:	9300      	str	r3, [sp, #0]
- 80061d8:	f04f 7380 	mov.w	r3, #16777216	; 0x1000000
- 80061dc:	68f8      	ldr	r0, [r7, #12]
- 80061de:	f000 fb57 	bl	8006890 <I2C_TransferConfig>
- 80061e2:	e00f      	b.n	8006204 <HAL_I2C_Mem_Write+0x1c8>
-        }
-        else
-        {
-          hi2c->XferSize = hi2c->XferCount;
- 80061e4:	68fb      	ldr	r3, [r7, #12]
- 80061e6:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 80061e8:	b29a      	uxth	r2, r3
- 80061ea:	68fb      	ldr	r3, [r7, #12]
- 80061ec:	851a      	strh	r2, [r3, #40]	; 0x28
-          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
- 80061ee:	68fb      	ldr	r3, [r7, #12]
- 80061f0:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 80061f2:	b2da      	uxtb	r2, r3
- 80061f4:	8979      	ldrh	r1, [r7, #10]
- 80061f6:	2300      	movs	r3, #0
- 80061f8:	9300      	str	r3, [sp, #0]
- 80061fa:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
- 80061fe:	68f8      	ldr	r0, [r7, #12]
- 8006200:	f000 fb46 	bl	8006890 <I2C_TransferConfig>
-        }
-      }
-
-    }
-    while (hi2c->XferCount > 0U);
- 8006204:	68fb      	ldr	r3, [r7, #12]
- 8006206:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 8006208:	b29b      	uxth	r3, r3
- 800620a:	2b00      	cmp	r3, #0
- 800620c:	d19e      	bne.n	800614c <HAL_I2C_Mem_Write+0x110>
-
-    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-    /* Wait until STOPF flag is reset */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- 800620e:	697a      	ldr	r2, [r7, #20]
- 8006210:	6ab9      	ldr	r1, [r7, #40]	; 0x28
- 8006212:	68f8      	ldr	r0, [r7, #12]
- 8006214:	f000 fa9a 	bl	800674c <I2C_WaitOnSTOPFlagUntilTimeout>
- 8006218:	4603      	mov	r3, r0
- 800621a:	2b00      	cmp	r3, #0
- 800621c:	d001      	beq.n	8006222 <HAL_I2C_Mem_Write+0x1e6>
-    {
-      return HAL_ERROR;
- 800621e:	2301      	movs	r3, #1
- 8006220:	e01a      	b.n	8006258 <HAL_I2C_Mem_Write+0x21c>
-    }
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
- 8006222:	68fb      	ldr	r3, [r7, #12]
- 8006224:	681b      	ldr	r3, [r3, #0]
- 8006226:	2220      	movs	r2, #32
- 8006228:	61da      	str	r2, [r3, #28]
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
- 800622a:	68fb      	ldr	r3, [r7, #12]
- 800622c:	681b      	ldr	r3, [r3, #0]
- 800622e:	6859      	ldr	r1, [r3, #4]
- 8006230:	68fb      	ldr	r3, [r7, #12]
- 8006232:	681a      	ldr	r2, [r3, #0]
- 8006234:	4b0a      	ldr	r3, [pc, #40]	; (8006260 <HAL_I2C_Mem_Write+0x224>)
- 8006236:	400b      	ands	r3, r1
- 8006238:	6053      	str	r3, [r2, #4]
-
-    hi2c->State = HAL_I2C_STATE_READY;
- 800623a:	68fb      	ldr	r3, [r7, #12]
- 800623c:	2220      	movs	r2, #32
- 800623e:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
- 8006242:	68fb      	ldr	r3, [r7, #12]
- 8006244:	2200      	movs	r2, #0
- 8006246:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
- 800624a:	68fb      	ldr	r3, [r7, #12]
- 800624c:	2200      	movs	r2, #0
- 800624e:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-    return HAL_OK;
- 8006252:	2300      	movs	r3, #0
- 8006254:	e000      	b.n	8006258 <HAL_I2C_Mem_Write+0x21c>
-  }
-  else
-  {
-    return HAL_BUSY;
- 8006256:	2302      	movs	r3, #2
-  }
-}
- 8006258:	4618      	mov	r0, r3
- 800625a:	3718      	adds	r7, #24
- 800625c:	46bd      	mov	sp, r7
- 800625e:	bd80      	pop	{r7, pc}
- 8006260:	fe00e800 	.word	0xfe00e800
-
-08006264 <HAL_I2C_Mem_Read>:
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- 8006264:	b580      	push	{r7, lr}
- 8006266:	b088      	sub	sp, #32
- 8006268:	af02      	add	r7, sp, #8
- 800626a:	60f8      	str	r0, [r7, #12]
- 800626c:	4608      	mov	r0, r1
- 800626e:	4611      	mov	r1, r2
- 8006270:	461a      	mov	r2, r3
- 8006272:	4603      	mov	r3, r0
- 8006274:	817b      	strh	r3, [r7, #10]
- 8006276:	460b      	mov	r3, r1
- 8006278:	813b      	strh	r3, [r7, #8]
- 800627a:	4613      	mov	r3, r2
- 800627c:	80fb      	strh	r3, [r7, #6]
-  uint32_t tickstart;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
- 800627e:	68fb      	ldr	r3, [r7, #12]
- 8006280:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
- 8006284:	b2db      	uxtb	r3, r3
- 8006286:	2b20      	cmp	r3, #32
- 8006288:	f040 80fd 	bne.w	8006486 <HAL_I2C_Mem_Read+0x222>
-  {
-    if ((pData == NULL) || (Size == 0U))
- 800628c:	6a3b      	ldr	r3, [r7, #32]
- 800628e:	2b00      	cmp	r3, #0
- 8006290:	d002      	beq.n	8006298 <HAL_I2C_Mem_Read+0x34>
- 8006292:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
- 8006294:	2b00      	cmp	r3, #0
- 8006296:	d105      	bne.n	80062a4 <HAL_I2C_Mem_Read+0x40>
-    {
-      hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;
- 8006298:	68fb      	ldr	r3, [r7, #12]
- 800629a:	f44f 7200 	mov.w	r2, #512	; 0x200
- 800629e:	645a      	str	r2, [r3, #68]	; 0x44
-      return  HAL_ERROR;
- 80062a0:	2301      	movs	r3, #1
- 80062a2:	e0f1      	b.n	8006488 <HAL_I2C_Mem_Read+0x224>
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
- 80062a4:	68fb      	ldr	r3, [r7, #12]
- 80062a6:	f893 3040 	ldrb.w	r3, [r3, #64]	; 0x40
- 80062aa:	2b01      	cmp	r3, #1
- 80062ac:	d101      	bne.n	80062b2 <HAL_I2C_Mem_Read+0x4e>
- 80062ae:	2302      	movs	r3, #2
- 80062b0:	e0ea      	b.n	8006488 <HAL_I2C_Mem_Read+0x224>
- 80062b2:	68fb      	ldr	r3, [r7, #12]
- 80062b4:	2201      	movs	r2, #1
- 80062b6:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
- 80062ba:	f7fe f919 	bl	80044f0 <HAL_GetTick>
- 80062be:	6178      	str	r0, [r7, #20]
-
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
- 80062c0:	697b      	ldr	r3, [r7, #20]
- 80062c2:	9300      	str	r3, [sp, #0]
- 80062c4:	2319      	movs	r3, #25
- 80062c6:	2201      	movs	r2, #1
- 80062c8:	f44f 4100 	mov.w	r1, #32768	; 0x8000
- 80062cc:	68f8      	ldr	r0, [r7, #12]
- 80062ce:	f000 f9bd 	bl	800664c <I2C_WaitOnFlagUntilTimeout>
- 80062d2:	4603      	mov	r3, r0
- 80062d4:	2b00      	cmp	r3, #0
- 80062d6:	d001      	beq.n	80062dc <HAL_I2C_Mem_Read+0x78>
-    {
-      return HAL_ERROR;
- 80062d8:	2301      	movs	r3, #1
- 80062da:	e0d5      	b.n	8006488 <HAL_I2C_Mem_Read+0x224>
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
- 80062dc:	68fb      	ldr	r3, [r7, #12]
- 80062de:	2222      	movs	r2, #34	; 0x22
- 80062e0:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-    hi2c->Mode      = HAL_I2C_MODE_MEM;
- 80062e4:	68fb      	ldr	r3, [r7, #12]
- 80062e6:	2240      	movs	r2, #64	; 0x40
- 80062e8:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- 80062ec:	68fb      	ldr	r3, [r7, #12]
- 80062ee:	2200      	movs	r2, #0
- 80062f0:	645a      	str	r2, [r3, #68]	; 0x44
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
- 80062f2:	68fb      	ldr	r3, [r7, #12]
- 80062f4:	6a3a      	ldr	r2, [r7, #32]
- 80062f6:	625a      	str	r2, [r3, #36]	; 0x24
-    hi2c->XferCount = Size;
- 80062f8:	68fb      	ldr	r3, [r7, #12]
- 80062fa:	8cba      	ldrh	r2, [r7, #36]	; 0x24
- 80062fc:	855a      	strh	r2, [r3, #42]	; 0x2a
-    hi2c->XferISR   = NULL;
- 80062fe:	68fb      	ldr	r3, [r7, #12]
- 8006300:	2200      	movs	r2, #0
- 8006302:	635a      	str	r2, [r3, #52]	; 0x34
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
- 8006304:	88f8      	ldrh	r0, [r7, #6]
- 8006306:	893a      	ldrh	r2, [r7, #8]
- 8006308:	8979      	ldrh	r1, [r7, #10]
- 800630a:	697b      	ldr	r3, [r7, #20]
- 800630c:	9301      	str	r3, [sp, #4]
- 800630e:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 8006310:	9300      	str	r3, [sp, #0]
- 8006312:	4603      	mov	r3, r0
- 8006314:	68f8      	ldr	r0, [r7, #12]
- 8006316:	f000 f921 	bl	800655c <I2C_RequestMemoryRead>
- 800631a:	4603      	mov	r3, r0
- 800631c:	2b00      	cmp	r3, #0
- 800631e:	d005      	beq.n	800632c <HAL_I2C_Mem_Read+0xc8>
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
- 8006320:	68fb      	ldr	r3, [r7, #12]
- 8006322:	2200      	movs	r2, #0
- 8006324:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-      return HAL_ERROR;
- 8006328:	2301      	movs	r3, #1
- 800632a:	e0ad      	b.n	8006488 <HAL_I2C_Mem_Read+0x224>
-    }
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
- 800632c:	68fb      	ldr	r3, [r7, #12]
- 800632e:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 8006330:	b29b      	uxth	r3, r3
- 8006332:	2bff      	cmp	r3, #255	; 0xff
- 8006334:	d90e      	bls.n	8006354 <HAL_I2C_Mem_Read+0xf0>
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
- 8006336:	68fb      	ldr	r3, [r7, #12]
- 8006338:	22ff      	movs	r2, #255	; 0xff
- 800633a:	851a      	strh	r2, [r3, #40]	; 0x28
-      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
- 800633c:	68fb      	ldr	r3, [r7, #12]
- 800633e:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 8006340:	b2da      	uxtb	r2, r3
- 8006342:	8979      	ldrh	r1, [r7, #10]
- 8006344:	4b52      	ldr	r3, [pc, #328]	; (8006490 <HAL_I2C_Mem_Read+0x22c>)
- 8006346:	9300      	str	r3, [sp, #0]
- 8006348:	f04f 7380 	mov.w	r3, #16777216	; 0x1000000
- 800634c:	68f8      	ldr	r0, [r7, #12]
- 800634e:	f000 fa9f 	bl	8006890 <I2C_TransferConfig>
- 8006352:	e00f      	b.n	8006374 <HAL_I2C_Mem_Read+0x110>
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
- 8006354:	68fb      	ldr	r3, [r7, #12]
- 8006356:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 8006358:	b29a      	uxth	r2, r3
- 800635a:	68fb      	ldr	r3, [r7, #12]
- 800635c:	851a      	strh	r2, [r3, #40]	; 0x28
-      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
- 800635e:	68fb      	ldr	r3, [r7, #12]
- 8006360:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 8006362:	b2da      	uxtb	r2, r3
- 8006364:	8979      	ldrh	r1, [r7, #10]
- 8006366:	4b4a      	ldr	r3, [pc, #296]	; (8006490 <HAL_I2C_Mem_Read+0x22c>)
- 8006368:	9300      	str	r3, [sp, #0]
- 800636a:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
- 800636e:	68f8      	ldr	r0, [r7, #12]
- 8006370:	f000 fa8e 	bl	8006890 <I2C_TransferConfig>
-    }
-
-    do
-    {
-      /* Wait until RXNE flag is set */
-      if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
- 8006374:	697b      	ldr	r3, [r7, #20]
- 8006376:	9300      	str	r3, [sp, #0]
- 8006378:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 800637a:	2200      	movs	r2, #0
- 800637c:	2104      	movs	r1, #4
- 800637e:	68f8      	ldr	r0, [r7, #12]
- 8006380:	f000 f964 	bl	800664c <I2C_WaitOnFlagUntilTimeout>
- 8006384:	4603      	mov	r3, r0
- 8006386:	2b00      	cmp	r3, #0
- 8006388:	d001      	beq.n	800638e <HAL_I2C_Mem_Read+0x12a>
-      {
-        return HAL_ERROR;
- 800638a:	2301      	movs	r3, #1
- 800638c:	e07c      	b.n	8006488 <HAL_I2C_Mem_Read+0x224>
-      }
-
-      /* Read data from RXDR */
-      *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;
- 800638e:	68fb      	ldr	r3, [r7, #12]
- 8006390:	681b      	ldr	r3, [r3, #0]
- 8006392:	6a5a      	ldr	r2, [r3, #36]	; 0x24
- 8006394:	68fb      	ldr	r3, [r7, #12]
- 8006396:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8006398:	b2d2      	uxtb	r2, r2
- 800639a:	701a      	strb	r2, [r3, #0]
-
-      /* Increment Buffer pointer */
-      hi2c->pBuffPtr++;
- 800639c:	68fb      	ldr	r3, [r7, #12]
- 800639e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 80063a0:	1c5a      	adds	r2, r3, #1
- 80063a2:	68fb      	ldr	r3, [r7, #12]
- 80063a4:	625a      	str	r2, [r3, #36]	; 0x24
-
-      hi2c->XferSize--;
- 80063a6:	68fb      	ldr	r3, [r7, #12]
- 80063a8:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 80063aa:	3b01      	subs	r3, #1
- 80063ac:	b29a      	uxth	r2, r3
- 80063ae:	68fb      	ldr	r3, [r7, #12]
- 80063b0:	851a      	strh	r2, [r3, #40]	; 0x28
-      hi2c->XferCount--;
- 80063b2:	68fb      	ldr	r3, [r7, #12]
- 80063b4:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 80063b6:	b29b      	uxth	r3, r3
- 80063b8:	3b01      	subs	r3, #1
- 80063ba:	b29a      	uxth	r2, r3
- 80063bc:	68fb      	ldr	r3, [r7, #12]
- 80063be:	855a      	strh	r2, [r3, #42]	; 0x2a
-
-      if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))
- 80063c0:	68fb      	ldr	r3, [r7, #12]
- 80063c2:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 80063c4:	b29b      	uxth	r3, r3
- 80063c6:	2b00      	cmp	r3, #0
- 80063c8:	d034      	beq.n	8006434 <HAL_I2C_Mem_Read+0x1d0>
- 80063ca:	68fb      	ldr	r3, [r7, #12]
- 80063cc:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 80063ce:	2b00      	cmp	r3, #0
- 80063d0:	d130      	bne.n	8006434 <HAL_I2C_Mem_Read+0x1d0>
-      {
-        /* Wait until TCR flag is set */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
- 80063d2:	697b      	ldr	r3, [r7, #20]
- 80063d4:	9300      	str	r3, [sp, #0]
- 80063d6:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 80063d8:	2200      	movs	r2, #0
- 80063da:	2180      	movs	r1, #128	; 0x80
- 80063dc:	68f8      	ldr	r0, [r7, #12]
- 80063de:	f000 f935 	bl	800664c <I2C_WaitOnFlagUntilTimeout>
- 80063e2:	4603      	mov	r3, r0
- 80063e4:	2b00      	cmp	r3, #0
- 80063e6:	d001      	beq.n	80063ec <HAL_I2C_Mem_Read+0x188>
-        {
-          return HAL_ERROR;
- 80063e8:	2301      	movs	r3, #1
- 80063ea:	e04d      	b.n	8006488 <HAL_I2C_Mem_Read+0x224>
-        }
-
-        if (hi2c->XferCount > MAX_NBYTE_SIZE)
- 80063ec:	68fb      	ldr	r3, [r7, #12]
- 80063ee:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 80063f0:	b29b      	uxth	r3, r3
- 80063f2:	2bff      	cmp	r3, #255	; 0xff
- 80063f4:	d90e      	bls.n	8006414 <HAL_I2C_Mem_Read+0x1b0>
-        {
-          hi2c->XferSize = MAX_NBYTE_SIZE;
- 80063f6:	68fb      	ldr	r3, [r7, #12]
- 80063f8:	22ff      	movs	r2, #255	; 0xff
- 80063fa:	851a      	strh	r2, [r3, #40]	; 0x28
-          I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
- 80063fc:	68fb      	ldr	r3, [r7, #12]
- 80063fe:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 8006400:	b2da      	uxtb	r2, r3
- 8006402:	8979      	ldrh	r1, [r7, #10]
- 8006404:	2300      	movs	r3, #0
- 8006406:	9300      	str	r3, [sp, #0]
- 8006408:	f04f 7380 	mov.w	r3, #16777216	; 0x1000000
- 800640c:	68f8      	ldr	r0, [r7, #12]
- 800640e:	f000 fa3f 	bl	8006890 <I2C_TransferConfig>
- 8006412:	e00f      	b.n	8006434 <HAL_I2C_Mem_Read+0x1d0>
-        }
-        else
-        {
-          hi2c->XferSize = hi2c->XferCount;
- 8006414:	68fb      	ldr	r3, [r7, #12]
- 8006416:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 8006418:	b29a      	uxth	r2, r3
- 800641a:	68fb      	ldr	r3, [r7, #12]
- 800641c:	851a      	strh	r2, [r3, #40]	; 0x28
-          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
- 800641e:	68fb      	ldr	r3, [r7, #12]
- 8006420:	8d1b      	ldrh	r3, [r3, #40]	; 0x28
- 8006422:	b2da      	uxtb	r2, r3
- 8006424:	8979      	ldrh	r1, [r7, #10]
- 8006426:	2300      	movs	r3, #0
- 8006428:	9300      	str	r3, [sp, #0]
- 800642a:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
- 800642e:	68f8      	ldr	r0, [r7, #12]
- 8006430:	f000 fa2e 	bl	8006890 <I2C_TransferConfig>
-        }
-      }
-    }
-    while (hi2c->XferCount > 0U);
- 8006434:	68fb      	ldr	r3, [r7, #12]
- 8006436:	8d5b      	ldrh	r3, [r3, #42]	; 0x2a
- 8006438:	b29b      	uxth	r3, r3
- 800643a:	2b00      	cmp	r3, #0
- 800643c:	d19a      	bne.n	8006374 <HAL_I2C_Mem_Read+0x110>
-
-    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-    /* Wait until STOPF flag is reset */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- 800643e:	697a      	ldr	r2, [r7, #20]
- 8006440:	6ab9      	ldr	r1, [r7, #40]	; 0x28
- 8006442:	68f8      	ldr	r0, [r7, #12]
- 8006444:	f000 f982 	bl	800674c <I2C_WaitOnSTOPFlagUntilTimeout>
- 8006448:	4603      	mov	r3, r0
- 800644a:	2b00      	cmp	r3, #0
- 800644c:	d001      	beq.n	8006452 <HAL_I2C_Mem_Read+0x1ee>
-    {
-      return HAL_ERROR;
- 800644e:	2301      	movs	r3, #1
- 8006450:	e01a      	b.n	8006488 <HAL_I2C_Mem_Read+0x224>
-    }
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
- 8006452:	68fb      	ldr	r3, [r7, #12]
- 8006454:	681b      	ldr	r3, [r3, #0]
- 8006456:	2220      	movs	r2, #32
- 8006458:	61da      	str	r2, [r3, #28]
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
- 800645a:	68fb      	ldr	r3, [r7, #12]
- 800645c:	681b      	ldr	r3, [r3, #0]
- 800645e:	6859      	ldr	r1, [r3, #4]
- 8006460:	68fb      	ldr	r3, [r7, #12]
- 8006462:	681a      	ldr	r2, [r3, #0]
- 8006464:	4b0b      	ldr	r3, [pc, #44]	; (8006494 <HAL_I2C_Mem_Read+0x230>)
- 8006466:	400b      	ands	r3, r1
- 8006468:	6053      	str	r3, [r2, #4]
-
-    hi2c->State = HAL_I2C_STATE_READY;
- 800646a:	68fb      	ldr	r3, [r7, #12]
- 800646c:	2220      	movs	r2, #32
- 800646e:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
- 8006472:	68fb      	ldr	r3, [r7, #12]
- 8006474:	2200      	movs	r2, #0
- 8006476:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
- 800647a:	68fb      	ldr	r3, [r7, #12]
- 800647c:	2200      	movs	r2, #0
- 800647e:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-    return HAL_OK;
- 8006482:	2300      	movs	r3, #0
- 8006484:	e000      	b.n	8006488 <HAL_I2C_Mem_Read+0x224>
-  }
-  else
-  {
-    return HAL_BUSY;
- 8006486:	2302      	movs	r3, #2
-  }
-}
- 8006488:	4618      	mov	r0, r3
- 800648a:	3718      	adds	r7, #24
- 800648c:	46bd      	mov	sp, r7
- 800648e:	bd80      	pop	{r7, pc}
- 8006490:	80002400 	.word	0x80002400
- 8006494:	fe00e800 	.word	0xfe00e800
-
-08006498 <HAL_I2C_GetState>:
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval HAL state
-  */
-HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
-{
- 8006498:	b480      	push	{r7}
- 800649a:	b083      	sub	sp, #12
- 800649c:	af00      	add	r7, sp, #0
- 800649e:	6078      	str	r0, [r7, #4]
-  /* Return I2C handle state */
-  return hi2c->State;
- 80064a0:	687b      	ldr	r3, [r7, #4]
- 80064a2:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
- 80064a6:	b2db      	uxtb	r3, r3
-}
- 80064a8:	4618      	mov	r0, r3
- 80064aa:	370c      	adds	r7, #12
- 80064ac:	46bd      	mov	sp, r7
- 80064ae:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80064b2:	4770      	bx	lr
-
-080064b4 <I2C_RequestMemoryWrite>:
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
-{
- 80064b4:	b580      	push	{r7, lr}
- 80064b6:	b086      	sub	sp, #24
- 80064b8:	af02      	add	r7, sp, #8
- 80064ba:	60f8      	str	r0, [r7, #12]
- 80064bc:	4608      	mov	r0, r1
- 80064be:	4611      	mov	r1, r2
- 80064c0:	461a      	mov	r2, r3
- 80064c2:	4603      	mov	r3, r0
- 80064c4:	817b      	strh	r3, [r7, #10]
- 80064c6:	460b      	mov	r3, r1
- 80064c8:	813b      	strh	r3, [r7, #8]
- 80064ca:	4613      	mov	r3, r2
- 80064cc:	80fb      	strh	r3, [r7, #6]
-  I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
- 80064ce:	88fb      	ldrh	r3, [r7, #6]
- 80064d0:	b2da      	uxtb	r2, r3
- 80064d2:	8979      	ldrh	r1, [r7, #10]
- 80064d4:	4b20      	ldr	r3, [pc, #128]	; (8006558 <I2C_RequestMemoryWrite+0xa4>)
- 80064d6:	9300      	str	r3, [sp, #0]
- 80064d8:	f04f 7380 	mov.w	r3, #16777216	; 0x1000000
- 80064dc:	68f8      	ldr	r0, [r7, #12]
- 80064de:	f000 f9d7 	bl	8006890 <I2C_TransferConfig>
-
-  /* Wait until TXIS flag is set */
-  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- 80064e2:	69fa      	ldr	r2, [r7, #28]
- 80064e4:	69b9      	ldr	r1, [r7, #24]
- 80064e6:	68f8      	ldr	r0, [r7, #12]
- 80064e8:	f000 f8f0 	bl	80066cc <I2C_WaitOnTXISFlagUntilTimeout>
- 80064ec:	4603      	mov	r3, r0
- 80064ee:	2b00      	cmp	r3, #0
- 80064f0:	d001      	beq.n	80064f6 <I2C_RequestMemoryWrite+0x42>
-  {
-    return HAL_ERROR;
- 80064f2:	2301      	movs	r3, #1
- 80064f4:	e02c      	b.n	8006550 <I2C_RequestMemoryWrite+0x9c>
-  }
-
-  /* If Memory address size is 8Bit */
-  if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
- 80064f6:	88fb      	ldrh	r3, [r7, #6]
- 80064f8:	2b01      	cmp	r3, #1
- 80064fa:	d105      	bne.n	8006508 <I2C_RequestMemoryWrite+0x54>
-  {
-    /* Send Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
- 80064fc:	893b      	ldrh	r3, [r7, #8]
- 80064fe:	b2da      	uxtb	r2, r3
- 8006500:	68fb      	ldr	r3, [r7, #12]
- 8006502:	681b      	ldr	r3, [r3, #0]
- 8006504:	629a      	str	r2, [r3, #40]	; 0x28
- 8006506:	e015      	b.n	8006534 <I2C_RequestMemoryWrite+0x80>
-  }
-  /* If Memory address size is 16Bit */
-  else
-  {
-    /* Send MSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
- 8006508:	893b      	ldrh	r3, [r7, #8]
- 800650a:	0a1b      	lsrs	r3, r3, #8
- 800650c:	b29b      	uxth	r3, r3
- 800650e:	b2da      	uxtb	r2, r3
- 8006510:	68fb      	ldr	r3, [r7, #12]
- 8006512:	681b      	ldr	r3, [r3, #0]
- 8006514:	629a      	str	r2, [r3, #40]	; 0x28
-
-    /* Wait until TXIS flag is set */
-    if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- 8006516:	69fa      	ldr	r2, [r7, #28]
- 8006518:	69b9      	ldr	r1, [r7, #24]
- 800651a:	68f8      	ldr	r0, [r7, #12]
- 800651c:	f000 f8d6 	bl	80066cc <I2C_WaitOnTXISFlagUntilTimeout>
- 8006520:	4603      	mov	r3, r0
- 8006522:	2b00      	cmp	r3, #0
- 8006524:	d001      	beq.n	800652a <I2C_RequestMemoryWrite+0x76>
-    {
-      return HAL_ERROR;
- 8006526:	2301      	movs	r3, #1
- 8006528:	e012      	b.n	8006550 <I2C_RequestMemoryWrite+0x9c>
-    }
-
-    /* Send LSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
- 800652a:	893b      	ldrh	r3, [r7, #8]
- 800652c:	b2da      	uxtb	r2, r3
- 800652e:	68fb      	ldr	r3, [r7, #12]
- 8006530:	681b      	ldr	r3, [r3, #0]
- 8006532:	629a      	str	r2, [r3, #40]	; 0x28
-  }
-
-  /* Wait until TCR flag is set */
-  if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK)
- 8006534:	69fb      	ldr	r3, [r7, #28]
- 8006536:	9300      	str	r3, [sp, #0]
- 8006538:	69bb      	ldr	r3, [r7, #24]
- 800653a:	2200      	movs	r2, #0
- 800653c:	2180      	movs	r1, #128	; 0x80
- 800653e:	68f8      	ldr	r0, [r7, #12]
- 8006540:	f000 f884 	bl	800664c <I2C_WaitOnFlagUntilTimeout>
- 8006544:	4603      	mov	r3, r0
- 8006546:	2b00      	cmp	r3, #0
- 8006548:	d001      	beq.n	800654e <I2C_RequestMemoryWrite+0x9a>
-  {
-    return HAL_ERROR;
- 800654a:	2301      	movs	r3, #1
- 800654c:	e000      	b.n	8006550 <I2C_RequestMemoryWrite+0x9c>
-  }
-
-  return HAL_OK;
- 800654e:	2300      	movs	r3, #0
-}
- 8006550:	4618      	mov	r0, r3
- 8006552:	3710      	adds	r7, #16
- 8006554:	46bd      	mov	sp, r7
- 8006556:	bd80      	pop	{r7, pc}
- 8006558:	80002000 	.word	0x80002000
-
-0800655c <I2C_RequestMemoryRead>:
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
-{
- 800655c:	b580      	push	{r7, lr}
- 800655e:	b086      	sub	sp, #24
- 8006560:	af02      	add	r7, sp, #8
- 8006562:	60f8      	str	r0, [r7, #12]
- 8006564:	4608      	mov	r0, r1
- 8006566:	4611      	mov	r1, r2
- 8006568:	461a      	mov	r2, r3
- 800656a:	4603      	mov	r3, r0
- 800656c:	817b      	strh	r3, [r7, #10]
- 800656e:	460b      	mov	r3, r1
- 8006570:	813b      	strh	r3, [r7, #8]
- 8006572:	4613      	mov	r3, r2
- 8006574:	80fb      	strh	r3, [r7, #6]
-  I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
- 8006576:	88fb      	ldrh	r3, [r7, #6]
- 8006578:	b2da      	uxtb	r2, r3
- 800657a:	8979      	ldrh	r1, [r7, #10]
- 800657c:	4b20      	ldr	r3, [pc, #128]	; (8006600 <I2C_RequestMemoryRead+0xa4>)
- 800657e:	9300      	str	r3, [sp, #0]
- 8006580:	2300      	movs	r3, #0
- 8006582:	68f8      	ldr	r0, [r7, #12]
- 8006584:	f000 f984 	bl	8006890 <I2C_TransferConfig>
-
-  /* Wait until TXIS flag is set */
-  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- 8006588:	69fa      	ldr	r2, [r7, #28]
- 800658a:	69b9      	ldr	r1, [r7, #24]
- 800658c:	68f8      	ldr	r0, [r7, #12]
- 800658e:	f000 f89d 	bl	80066cc <I2C_WaitOnTXISFlagUntilTimeout>
- 8006592:	4603      	mov	r3, r0
- 8006594:	2b00      	cmp	r3, #0
- 8006596:	d001      	beq.n	800659c <I2C_RequestMemoryRead+0x40>
-  {
-    return HAL_ERROR;
- 8006598:	2301      	movs	r3, #1
- 800659a:	e02c      	b.n	80065f6 <I2C_RequestMemoryRead+0x9a>
-  }
-
-  /* If Memory address size is 8Bit */
-  if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
- 800659c:	88fb      	ldrh	r3, [r7, #6]
- 800659e:	2b01      	cmp	r3, #1
- 80065a0:	d105      	bne.n	80065ae <I2C_RequestMemoryRead+0x52>
-  {
-    /* Send Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
- 80065a2:	893b      	ldrh	r3, [r7, #8]
- 80065a4:	b2da      	uxtb	r2, r3
- 80065a6:	68fb      	ldr	r3, [r7, #12]
- 80065a8:	681b      	ldr	r3, [r3, #0]
- 80065aa:	629a      	str	r2, [r3, #40]	; 0x28
- 80065ac:	e015      	b.n	80065da <I2C_RequestMemoryRead+0x7e>
-  }
-  /* If Memory address size is 16Bit */
-  else
-  {
-    /* Send MSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
- 80065ae:	893b      	ldrh	r3, [r7, #8]
- 80065b0:	0a1b      	lsrs	r3, r3, #8
- 80065b2:	b29b      	uxth	r3, r3
- 80065b4:	b2da      	uxtb	r2, r3
- 80065b6:	68fb      	ldr	r3, [r7, #12]
- 80065b8:	681b      	ldr	r3, [r3, #0]
- 80065ba:	629a      	str	r2, [r3, #40]	; 0x28
-
-    /* Wait until TXIS flag is set */
-    if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- 80065bc:	69fa      	ldr	r2, [r7, #28]
- 80065be:	69b9      	ldr	r1, [r7, #24]
- 80065c0:	68f8      	ldr	r0, [r7, #12]
- 80065c2:	f000 f883 	bl	80066cc <I2C_WaitOnTXISFlagUntilTimeout>
- 80065c6:	4603      	mov	r3, r0
- 80065c8:	2b00      	cmp	r3, #0
- 80065ca:	d001      	beq.n	80065d0 <I2C_RequestMemoryRead+0x74>
-    {
-      return HAL_ERROR;
- 80065cc:	2301      	movs	r3, #1
- 80065ce:	e012      	b.n	80065f6 <I2C_RequestMemoryRead+0x9a>
-    }
-
-    /* Send LSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
- 80065d0:	893b      	ldrh	r3, [r7, #8]
- 80065d2:	b2da      	uxtb	r2, r3
- 80065d4:	68fb      	ldr	r3, [r7, #12]
- 80065d6:	681b      	ldr	r3, [r3, #0]
- 80065d8:	629a      	str	r2, [r3, #40]	; 0x28
-  }
-
-  /* Wait until TC flag is set */
-  if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK)
- 80065da:	69fb      	ldr	r3, [r7, #28]
- 80065dc:	9300      	str	r3, [sp, #0]
- 80065de:	69bb      	ldr	r3, [r7, #24]
- 80065e0:	2200      	movs	r2, #0
- 80065e2:	2140      	movs	r1, #64	; 0x40
- 80065e4:	68f8      	ldr	r0, [r7, #12]
- 80065e6:	f000 f831 	bl	800664c <I2C_WaitOnFlagUntilTimeout>
- 80065ea:	4603      	mov	r3, r0
- 80065ec:	2b00      	cmp	r3, #0
- 80065ee:	d001      	beq.n	80065f4 <I2C_RequestMemoryRead+0x98>
-  {
-    return HAL_ERROR;
- 80065f0:	2301      	movs	r3, #1
- 80065f2:	e000      	b.n	80065f6 <I2C_RequestMemoryRead+0x9a>
-  }
-
-  return HAL_OK;
- 80065f4:	2300      	movs	r3, #0
-}
- 80065f6:	4618      	mov	r0, r3
- 80065f8:	3710      	adds	r7, #16
- 80065fa:	46bd      	mov	sp, r7
- 80065fc:	bd80      	pop	{r7, pc}
- 80065fe:	bf00      	nop
- 8006600:	80002000 	.word	0x80002000
-
-08006604 <I2C_Flush_TXDR>:
-  * @brief  I2C Tx data register flush process.
-  * @param  hi2c I2C handle.
-  * @retval None
-  */
-static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c)
-{
- 8006604:	b480      	push	{r7}
- 8006606:	b083      	sub	sp, #12
- 8006608:	af00      	add	r7, sp, #0
- 800660a:	6078      	str	r0, [r7, #4]
-  /* If a pending TXIS flag is set */
-  /* Write a dummy data in TXDR to clear it */
-  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET)
- 800660c:	687b      	ldr	r3, [r7, #4]
- 800660e:	681b      	ldr	r3, [r3, #0]
- 8006610:	699b      	ldr	r3, [r3, #24]
- 8006612:	f003 0302 	and.w	r3, r3, #2
- 8006616:	2b02      	cmp	r3, #2
- 8006618:	d103      	bne.n	8006622 <I2C_Flush_TXDR+0x1e>
-  {
-    hi2c->Instance->TXDR = 0x00U;
- 800661a:	687b      	ldr	r3, [r7, #4]
- 800661c:	681b      	ldr	r3, [r3, #0]
- 800661e:	2200      	movs	r2, #0
- 8006620:	629a      	str	r2, [r3, #40]	; 0x28
-  }
-
-  /* Flush TX register if not empty */
-  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
- 8006622:	687b      	ldr	r3, [r7, #4]
- 8006624:	681b      	ldr	r3, [r3, #0]
- 8006626:	699b      	ldr	r3, [r3, #24]
- 8006628:	f003 0301 	and.w	r3, r3, #1
- 800662c:	2b01      	cmp	r3, #1
- 800662e:	d007      	beq.n	8006640 <I2C_Flush_TXDR+0x3c>
-  {
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE);
- 8006630:	687b      	ldr	r3, [r7, #4]
- 8006632:	681b      	ldr	r3, [r3, #0]
- 8006634:	699a      	ldr	r2, [r3, #24]
- 8006636:	687b      	ldr	r3, [r7, #4]
- 8006638:	681b      	ldr	r3, [r3, #0]
- 800663a:	f042 0201 	orr.w	r2, r2, #1
- 800663e:	619a      	str	r2, [r3, #24]
-  }
-}
- 8006640:	bf00      	nop
- 8006642:	370c      	adds	r7, #12
- 8006644:	46bd      	mov	sp, r7
- 8006646:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800664a:	4770      	bx	lr
-
-0800664c <I2C_WaitOnFlagUntilTimeout>:
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
-{
- 800664c:	b580      	push	{r7, lr}
- 800664e:	b084      	sub	sp, #16
- 8006650:	af00      	add	r7, sp, #0
- 8006652:	60f8      	str	r0, [r7, #12]
- 8006654:	60b9      	str	r1, [r7, #8]
- 8006656:	603b      	str	r3, [r7, #0]
- 8006658:	4613      	mov	r3, r2
- 800665a:	71fb      	strb	r3, [r7, #7]
-  while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
- 800665c:	e022      	b.n	80066a4 <I2C_WaitOnFlagUntilTimeout+0x58>
-  {
-    /* Check for the Timeout */
-    if (Timeout != HAL_MAX_DELAY)
- 800665e:	683b      	ldr	r3, [r7, #0]
- 8006660:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
- 8006664:	d01e      	beq.n	80066a4 <I2C_WaitOnFlagUntilTimeout+0x58>
-    {
-      if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 8006666:	f7fd ff43 	bl	80044f0 <HAL_GetTick>
- 800666a:	4602      	mov	r2, r0
- 800666c:	69bb      	ldr	r3, [r7, #24]
- 800666e:	1ad3      	subs	r3, r2, r3
- 8006670:	683a      	ldr	r2, [r7, #0]
- 8006672:	429a      	cmp	r2, r3
- 8006674:	d302      	bcc.n	800667c <I2C_WaitOnFlagUntilTimeout+0x30>
- 8006676:	683b      	ldr	r3, [r7, #0]
- 8006678:	2b00      	cmp	r3, #0
- 800667a:	d113      	bne.n	80066a4 <I2C_WaitOnFlagUntilTimeout+0x58>
-      {
-        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
- 800667c:	68fb      	ldr	r3, [r7, #12]
- 800667e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8006680:	f043 0220 	orr.w	r2, r3, #32
- 8006684:	68fb      	ldr	r3, [r7, #12]
- 8006686:	645a      	str	r2, [r3, #68]	; 0x44
-        hi2c->State = HAL_I2C_STATE_READY;
- 8006688:	68fb      	ldr	r3, [r7, #12]
- 800668a:	2220      	movs	r2, #32
- 800668c:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-        hi2c->Mode = HAL_I2C_MODE_NONE;
- 8006690:	68fb      	ldr	r3, [r7, #12]
- 8006692:	2200      	movs	r2, #0
- 8006694:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
- 8006698:	68fb      	ldr	r3, [r7, #12]
- 800669a:	2200      	movs	r2, #0
- 800669c:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-        return HAL_ERROR;
- 80066a0:	2301      	movs	r3, #1
- 80066a2:	e00f      	b.n	80066c4 <I2C_WaitOnFlagUntilTimeout+0x78>
-  while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
- 80066a4:	68fb      	ldr	r3, [r7, #12]
- 80066a6:	681b      	ldr	r3, [r3, #0]
- 80066a8:	699a      	ldr	r2, [r3, #24]
- 80066aa:	68bb      	ldr	r3, [r7, #8]
- 80066ac:	4013      	ands	r3, r2
- 80066ae:	68ba      	ldr	r2, [r7, #8]
- 80066b0:	429a      	cmp	r2, r3
- 80066b2:	bf0c      	ite	eq
- 80066b4:	2301      	moveq	r3, #1
- 80066b6:	2300      	movne	r3, #0
- 80066b8:	b2db      	uxtb	r3, r3
- 80066ba:	461a      	mov	r2, r3
- 80066bc:	79fb      	ldrb	r3, [r7, #7]
- 80066be:	429a      	cmp	r2, r3
- 80066c0:	d0cd      	beq.n	800665e <I2C_WaitOnFlagUntilTimeout+0x12>
-      }
-    }
-  }
-  return HAL_OK;
- 80066c2:	2300      	movs	r3, #0
-}
- 80066c4:	4618      	mov	r0, r3
- 80066c6:	3710      	adds	r7, #16
- 80066c8:	46bd      	mov	sp, r7
- 80066ca:	bd80      	pop	{r7, pc}
-
-080066cc <I2C_WaitOnTXISFlagUntilTimeout>:
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
- 80066cc:	b580      	push	{r7, lr}
- 80066ce:	b084      	sub	sp, #16
- 80066d0:	af00      	add	r7, sp, #0
- 80066d2:	60f8      	str	r0, [r7, #12]
- 80066d4:	60b9      	str	r1, [r7, #8]
- 80066d6:	607a      	str	r2, [r7, #4]
-  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
- 80066d8:	e02c      	b.n	8006734 <I2C_WaitOnTXISFlagUntilTimeout+0x68>
-  {
-    /* Check if a NACK is detected */
-    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
- 80066da:	687a      	ldr	r2, [r7, #4]
- 80066dc:	68b9      	ldr	r1, [r7, #8]
- 80066de:	68f8      	ldr	r0, [r7, #12]
- 80066e0:	f000 f870 	bl	80067c4 <I2C_IsAcknowledgeFailed>
- 80066e4:	4603      	mov	r3, r0
- 80066e6:	2b00      	cmp	r3, #0
- 80066e8:	d001      	beq.n	80066ee <I2C_WaitOnTXISFlagUntilTimeout+0x22>
-    {
-      return HAL_ERROR;
- 80066ea:	2301      	movs	r3, #1
- 80066ec:	e02a      	b.n	8006744 <I2C_WaitOnTXISFlagUntilTimeout+0x78>
-    }
-
-    /* Check for the Timeout */
-    if (Timeout != HAL_MAX_DELAY)
- 80066ee:	68bb      	ldr	r3, [r7, #8]
- 80066f0:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
- 80066f4:	d01e      	beq.n	8006734 <I2C_WaitOnTXISFlagUntilTimeout+0x68>
-    {
-      if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 80066f6:	f7fd fefb 	bl	80044f0 <HAL_GetTick>
- 80066fa:	4602      	mov	r2, r0
- 80066fc:	687b      	ldr	r3, [r7, #4]
- 80066fe:	1ad3      	subs	r3, r2, r3
- 8006700:	68ba      	ldr	r2, [r7, #8]
- 8006702:	429a      	cmp	r2, r3
- 8006704:	d302      	bcc.n	800670c <I2C_WaitOnTXISFlagUntilTimeout+0x40>
- 8006706:	68bb      	ldr	r3, [r7, #8]
- 8006708:	2b00      	cmp	r3, #0
- 800670a:	d113      	bne.n	8006734 <I2C_WaitOnTXISFlagUntilTimeout+0x68>
-      {
-        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
- 800670c:	68fb      	ldr	r3, [r7, #12]
- 800670e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8006710:	f043 0220 	orr.w	r2, r3, #32
- 8006714:	68fb      	ldr	r3, [r7, #12]
- 8006716:	645a      	str	r2, [r3, #68]	; 0x44
-        hi2c->State = HAL_I2C_STATE_READY;
- 8006718:	68fb      	ldr	r3, [r7, #12]
- 800671a:	2220      	movs	r2, #32
- 800671c:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-        hi2c->Mode = HAL_I2C_MODE_NONE;
- 8006720:	68fb      	ldr	r3, [r7, #12]
- 8006722:	2200      	movs	r2, #0
- 8006724:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
- 8006728:	68fb      	ldr	r3, [r7, #12]
- 800672a:	2200      	movs	r2, #0
- 800672c:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-        return HAL_ERROR;
- 8006730:	2301      	movs	r3, #1
- 8006732:	e007      	b.n	8006744 <I2C_WaitOnTXISFlagUntilTimeout+0x78>
-  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
- 8006734:	68fb      	ldr	r3, [r7, #12]
- 8006736:	681b      	ldr	r3, [r3, #0]
- 8006738:	699b      	ldr	r3, [r3, #24]
- 800673a:	f003 0302 	and.w	r3, r3, #2
- 800673e:	2b02      	cmp	r3, #2
- 8006740:	d1cb      	bne.n	80066da <I2C_WaitOnTXISFlagUntilTimeout+0xe>
-      }
-    }
-  }
-  return HAL_OK;
- 8006742:	2300      	movs	r3, #0
-}
- 8006744:	4618      	mov	r0, r3
- 8006746:	3710      	adds	r7, #16
- 8006748:	46bd      	mov	sp, r7
- 800674a:	bd80      	pop	{r7, pc}
-
-0800674c <I2C_WaitOnSTOPFlagUntilTimeout>:
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
- 800674c:	b580      	push	{r7, lr}
- 800674e:	b084      	sub	sp, #16
- 8006750:	af00      	add	r7, sp, #0
- 8006752:	60f8      	str	r0, [r7, #12]
- 8006754:	60b9      	str	r1, [r7, #8]
- 8006756:	607a      	str	r2, [r7, #4]
-  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
- 8006758:	e028      	b.n	80067ac <I2C_WaitOnSTOPFlagUntilTimeout+0x60>
-  {
-    /* Check if a NACK is detected */
-    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
- 800675a:	687a      	ldr	r2, [r7, #4]
- 800675c:	68b9      	ldr	r1, [r7, #8]
- 800675e:	68f8      	ldr	r0, [r7, #12]
- 8006760:	f000 f830 	bl	80067c4 <I2C_IsAcknowledgeFailed>
- 8006764:	4603      	mov	r3, r0
- 8006766:	2b00      	cmp	r3, #0
- 8006768:	d001      	beq.n	800676e <I2C_WaitOnSTOPFlagUntilTimeout+0x22>
-    {
-      return HAL_ERROR;
- 800676a:	2301      	movs	r3, #1
- 800676c:	e026      	b.n	80067bc <I2C_WaitOnSTOPFlagUntilTimeout+0x70>
-    }
-
-    /* Check for the Timeout */
-    if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 800676e:	f7fd febf 	bl	80044f0 <HAL_GetTick>
- 8006772:	4602      	mov	r2, r0
- 8006774:	687b      	ldr	r3, [r7, #4]
- 8006776:	1ad3      	subs	r3, r2, r3
- 8006778:	68ba      	ldr	r2, [r7, #8]
- 800677a:	429a      	cmp	r2, r3
- 800677c:	d302      	bcc.n	8006784 <I2C_WaitOnSTOPFlagUntilTimeout+0x38>
- 800677e:	68bb      	ldr	r3, [r7, #8]
- 8006780:	2b00      	cmp	r3, #0
- 8006782:	d113      	bne.n	80067ac <I2C_WaitOnSTOPFlagUntilTimeout+0x60>
-    {
-      hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
- 8006784:	68fb      	ldr	r3, [r7, #12]
- 8006786:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8006788:	f043 0220 	orr.w	r2, r3, #32
- 800678c:	68fb      	ldr	r3, [r7, #12]
- 800678e:	645a      	str	r2, [r3, #68]	; 0x44
-      hi2c->State = HAL_I2C_STATE_READY;
- 8006790:	68fb      	ldr	r3, [r7, #12]
- 8006792:	2220      	movs	r2, #32
- 8006794:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-      hi2c->Mode = HAL_I2C_MODE_NONE;
- 8006798:	68fb      	ldr	r3, [r7, #12]
- 800679a:	2200      	movs	r2, #0
- 800679c:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
- 80067a0:	68fb      	ldr	r3, [r7, #12]
- 80067a2:	2200      	movs	r2, #0
- 80067a4:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-      return HAL_ERROR;
- 80067a8:	2301      	movs	r3, #1
- 80067aa:	e007      	b.n	80067bc <I2C_WaitOnSTOPFlagUntilTimeout+0x70>
-  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
- 80067ac:	68fb      	ldr	r3, [r7, #12]
- 80067ae:	681b      	ldr	r3, [r3, #0]
- 80067b0:	699b      	ldr	r3, [r3, #24]
- 80067b2:	f003 0320 	and.w	r3, r3, #32
- 80067b6:	2b20      	cmp	r3, #32
- 80067b8:	d1cf      	bne.n	800675a <I2C_WaitOnSTOPFlagUntilTimeout+0xe>
-    }
-  }
-  return HAL_OK;
- 80067ba:	2300      	movs	r3, #0
-}
- 80067bc:	4618      	mov	r0, r3
- 80067be:	3710      	adds	r7, #16
- 80067c0:	46bd      	mov	sp, r7
- 80067c2:	bd80      	pop	{r7, pc}
-
-080067c4 <I2C_IsAcknowledgeFailed>:
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
- 80067c4:	b580      	push	{r7, lr}
- 80067c6:	b084      	sub	sp, #16
- 80067c8:	af00      	add	r7, sp, #0
- 80067ca:	60f8      	str	r0, [r7, #12]
- 80067cc:	60b9      	str	r1, [r7, #8]
- 80067ce:	607a      	str	r2, [r7, #4]
-  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
- 80067d0:	68fb      	ldr	r3, [r7, #12]
- 80067d2:	681b      	ldr	r3, [r3, #0]
- 80067d4:	699b      	ldr	r3, [r3, #24]
- 80067d6:	f003 0310 	and.w	r3, r3, #16
- 80067da:	2b10      	cmp	r3, #16
- 80067dc:	d151      	bne.n	8006882 <I2C_IsAcknowledgeFailed+0xbe>
-  {
-    /* Wait until STOP Flag is reset */
-    /* AutoEnd should be initiate after AF */
-    while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
- 80067de:	e022      	b.n	8006826 <I2C_IsAcknowledgeFailed+0x62>
-    {
-      /* Check for the Timeout */
-      if (Timeout != HAL_MAX_DELAY)
- 80067e0:	68bb      	ldr	r3, [r7, #8]
- 80067e2:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
- 80067e6:	d01e      	beq.n	8006826 <I2C_IsAcknowledgeFailed+0x62>
-      {
-        if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 80067e8:	f7fd fe82 	bl	80044f0 <HAL_GetTick>
- 80067ec:	4602      	mov	r2, r0
- 80067ee:	687b      	ldr	r3, [r7, #4]
- 80067f0:	1ad3      	subs	r3, r2, r3
- 80067f2:	68ba      	ldr	r2, [r7, #8]
- 80067f4:	429a      	cmp	r2, r3
- 80067f6:	d302      	bcc.n	80067fe <I2C_IsAcknowledgeFailed+0x3a>
- 80067f8:	68bb      	ldr	r3, [r7, #8]
- 80067fa:	2b00      	cmp	r3, #0
- 80067fc:	d113      	bne.n	8006826 <I2C_IsAcknowledgeFailed+0x62>
-        {
-          hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
- 80067fe:	68fb      	ldr	r3, [r7, #12]
- 8006800:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8006802:	f043 0220 	orr.w	r2, r3, #32
- 8006806:	68fb      	ldr	r3, [r7, #12]
- 8006808:	645a      	str	r2, [r3, #68]	; 0x44
-          hi2c->State = HAL_I2C_STATE_READY;
- 800680a:	68fb      	ldr	r3, [r7, #12]
- 800680c:	2220      	movs	r2, #32
- 800680e:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-          hi2c->Mode = HAL_I2C_MODE_NONE;
- 8006812:	68fb      	ldr	r3, [r7, #12]
- 8006814:	2200      	movs	r2, #0
- 8006816:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hi2c);
- 800681a:	68fb      	ldr	r3, [r7, #12]
- 800681c:	2200      	movs	r2, #0
- 800681e:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-          return HAL_ERROR;
- 8006822:	2301      	movs	r3, #1
- 8006824:	e02e      	b.n	8006884 <I2C_IsAcknowledgeFailed+0xc0>
-    while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
- 8006826:	68fb      	ldr	r3, [r7, #12]
- 8006828:	681b      	ldr	r3, [r3, #0]
- 800682a:	699b      	ldr	r3, [r3, #24]
- 800682c:	f003 0320 	and.w	r3, r3, #32
- 8006830:	2b20      	cmp	r3, #32
- 8006832:	d1d5      	bne.n	80067e0 <I2C_IsAcknowledgeFailed+0x1c>
-        }
-      }
-    }
-
-    /* Clear NACKF Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
- 8006834:	68fb      	ldr	r3, [r7, #12]
- 8006836:	681b      	ldr	r3, [r3, #0]
- 8006838:	2210      	movs	r2, #16
- 800683a:	61da      	str	r2, [r3, #28]
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
- 800683c:	68fb      	ldr	r3, [r7, #12]
- 800683e:	681b      	ldr	r3, [r3, #0]
- 8006840:	2220      	movs	r2, #32
- 8006842:	61da      	str	r2, [r3, #28]
-
-    /* Flush TX register */
-    I2C_Flush_TXDR(hi2c);
- 8006844:	68f8      	ldr	r0, [r7, #12]
- 8006846:	f7ff fedd 	bl	8006604 <I2C_Flush_TXDR>
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
- 800684a:	68fb      	ldr	r3, [r7, #12]
- 800684c:	681b      	ldr	r3, [r3, #0]
- 800684e:	6859      	ldr	r1, [r3, #4]
- 8006850:	68fb      	ldr	r3, [r7, #12]
- 8006852:	681a      	ldr	r2, [r3, #0]
- 8006854:	4b0d      	ldr	r3, [pc, #52]	; (800688c <I2C_IsAcknowledgeFailed+0xc8>)
- 8006856:	400b      	ands	r3, r1
- 8006858:	6053      	str	r3, [r2, #4]
-
-    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
- 800685a:	68fb      	ldr	r3, [r7, #12]
- 800685c:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 800685e:	f043 0204 	orr.w	r2, r3, #4
- 8006862:	68fb      	ldr	r3, [r7, #12]
- 8006864:	645a      	str	r2, [r3, #68]	; 0x44
-    hi2c->State = HAL_I2C_STATE_READY;
- 8006866:	68fb      	ldr	r3, [r7, #12]
- 8006868:	2220      	movs	r2, #32
- 800686a:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-    hi2c->Mode = HAL_I2C_MODE_NONE;
- 800686e:	68fb      	ldr	r3, [r7, #12]
- 8006870:	2200      	movs	r2, #0
- 8006872:	f883 2042 	strb.w	r2, [r3, #66]	; 0x42
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
- 8006876:	68fb      	ldr	r3, [r7, #12]
- 8006878:	2200      	movs	r2, #0
- 800687a:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-    return HAL_ERROR;
- 800687e:	2301      	movs	r3, #1
- 8006880:	e000      	b.n	8006884 <I2C_IsAcknowledgeFailed+0xc0>
-  }
-  return HAL_OK;
- 8006882:	2300      	movs	r3, #0
-}
- 8006884:	4618      	mov	r0, r3
- 8006886:	3710      	adds	r7, #16
- 8006888:	46bd      	mov	sp, r7
- 800688a:	bd80      	pop	{r7, pc}
- 800688c:	fe00e800 	.word	0xfe00e800
-
-08006890 <I2C_TransferConfig>:
-  *     @arg @ref I2C_GENERATE_START_READ Generate Restart for read request.
-  *     @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request.
-  * @retval None
-  */
-static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
-{
- 8006890:	b480      	push	{r7}
- 8006892:	b085      	sub	sp, #20
- 8006894:	af00      	add	r7, sp, #0
- 8006896:	60f8      	str	r0, [r7, #12]
- 8006898:	607b      	str	r3, [r7, #4]
- 800689a:	460b      	mov	r3, r1
- 800689c:	817b      	strh	r3, [r7, #10]
- 800689e:	4613      	mov	r3, r2
- 80068a0:	727b      	strb	r3, [r7, #9]
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-  assert_param(IS_TRANSFER_MODE(Mode));
-  assert_param(IS_TRANSFER_REQUEST(Request));
-
-  /* update CR2 register */
-  MODIFY_REG(hi2c->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP)), \
- 80068a2:	68fb      	ldr	r3, [r7, #12]
- 80068a4:	681b      	ldr	r3, [r3, #0]
- 80068a6:	685a      	ldr	r2, [r3, #4]
- 80068a8:	69bb      	ldr	r3, [r7, #24]
- 80068aa:	0d5b      	lsrs	r3, r3, #21
- 80068ac:	f403 6180 	and.w	r1, r3, #1024	; 0x400
- 80068b0:	4b0d      	ldr	r3, [pc, #52]	; (80068e8 <I2C_TransferConfig+0x58>)
- 80068b2:	430b      	orrs	r3, r1
- 80068b4:	43db      	mvns	r3, r3
- 80068b6:	ea02 0103 	and.w	r1, r2, r3
- 80068ba:	897b      	ldrh	r3, [r7, #10]
- 80068bc:	f3c3 0209 	ubfx	r2, r3, #0, #10
- 80068c0:	7a7b      	ldrb	r3, [r7, #9]
- 80068c2:	041b      	lsls	r3, r3, #16
- 80068c4:	f403 037f 	and.w	r3, r3, #16711680	; 0xff0000
- 80068c8:	431a      	orrs	r2, r3
- 80068ca:	687b      	ldr	r3, [r7, #4]
- 80068cc:	431a      	orrs	r2, r3
- 80068ce:	69bb      	ldr	r3, [r7, #24]
- 80068d0:	431a      	orrs	r2, r3
- 80068d2:	68fb      	ldr	r3, [r7, #12]
- 80068d4:	681b      	ldr	r3, [r3, #0]
- 80068d6:	430a      	orrs	r2, r1
- 80068d8:	605a      	str	r2, [r3, #4]
-             (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request));
-}
- 80068da:	bf00      	nop
- 80068dc:	3714      	adds	r7, #20
- 80068de:	46bd      	mov	sp, r7
- 80068e0:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80068e4:	4770      	bx	lr
- 80068e6:	bf00      	nop
- 80068e8:	03ff63ff 	.word	0x03ff63ff
-
-080068ec <HAL_I2CEx_ConfigAnalogFilter>:
-  *                the configuration information for the specified I2Cx peripheral.
-  * @param  AnalogFilter New state of the Analog filter.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
-{
- 80068ec:	b480      	push	{r7}
- 80068ee:	b083      	sub	sp, #12
- 80068f0:	af00      	add	r7, sp, #0
- 80068f2:	6078      	str	r0, [r7, #4]
- 80068f4:	6039      	str	r1, [r7, #0]
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-  assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
- 80068f6:	687b      	ldr	r3, [r7, #4]
- 80068f8:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
- 80068fc:	b2db      	uxtb	r3, r3
- 80068fe:	2b20      	cmp	r3, #32
- 8006900:	d138      	bne.n	8006974 <HAL_I2CEx_ConfigAnalogFilter+0x88>
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
- 8006902:	687b      	ldr	r3, [r7, #4]
- 8006904:	f893 3040 	ldrb.w	r3, [r3, #64]	; 0x40
- 8006908:	2b01      	cmp	r3, #1
- 800690a:	d101      	bne.n	8006910 <HAL_I2CEx_ConfigAnalogFilter+0x24>
- 800690c:	2302      	movs	r3, #2
- 800690e:	e032      	b.n	8006976 <HAL_I2CEx_ConfigAnalogFilter+0x8a>
- 8006910:	687b      	ldr	r3, [r7, #4]
- 8006912:	2201      	movs	r2, #1
- 8006914:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
- 8006918:	687b      	ldr	r3, [r7, #4]
- 800691a:	2224      	movs	r2, #36	; 0x24
- 800691c:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-
-    /* Disable the selected I2C peripheral */
-    __HAL_I2C_DISABLE(hi2c);
- 8006920:	687b      	ldr	r3, [r7, #4]
- 8006922:	681b      	ldr	r3, [r3, #0]
- 8006924:	681a      	ldr	r2, [r3, #0]
- 8006926:	687b      	ldr	r3, [r7, #4]
- 8006928:	681b      	ldr	r3, [r3, #0]
- 800692a:	f022 0201 	bic.w	r2, r2, #1
- 800692e:	601a      	str	r2, [r3, #0]
-
-    /* Reset I2Cx ANOFF bit */
-    hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
- 8006930:	687b      	ldr	r3, [r7, #4]
- 8006932:	681b      	ldr	r3, [r3, #0]
- 8006934:	681a      	ldr	r2, [r3, #0]
- 8006936:	687b      	ldr	r3, [r7, #4]
- 8006938:	681b      	ldr	r3, [r3, #0]
- 800693a:	f422 5280 	bic.w	r2, r2, #4096	; 0x1000
- 800693e:	601a      	str	r2, [r3, #0]
-
-    /* Set analog filter bit*/
-    hi2c->Instance->CR1 |= AnalogFilter;
- 8006940:	687b      	ldr	r3, [r7, #4]
- 8006942:	681b      	ldr	r3, [r3, #0]
- 8006944:	6819      	ldr	r1, [r3, #0]
- 8006946:	687b      	ldr	r3, [r7, #4]
- 8006948:	681b      	ldr	r3, [r3, #0]
- 800694a:	683a      	ldr	r2, [r7, #0]
- 800694c:	430a      	orrs	r2, r1
- 800694e:	601a      	str	r2, [r3, #0]
-
-    __HAL_I2C_ENABLE(hi2c);
- 8006950:	687b      	ldr	r3, [r7, #4]
- 8006952:	681b      	ldr	r3, [r3, #0]
- 8006954:	681a      	ldr	r2, [r3, #0]
- 8006956:	687b      	ldr	r3, [r7, #4]
- 8006958:	681b      	ldr	r3, [r3, #0]
- 800695a:	f042 0201 	orr.w	r2, r2, #1
- 800695e:	601a      	str	r2, [r3, #0]
-
-    hi2c->State = HAL_I2C_STATE_READY;
- 8006960:	687b      	ldr	r3, [r7, #4]
- 8006962:	2220      	movs	r2, #32
- 8006964:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
- 8006968:	687b      	ldr	r3, [r7, #4]
- 800696a:	2200      	movs	r2, #0
- 800696c:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-    return HAL_OK;
- 8006970:	2300      	movs	r3, #0
- 8006972:	e000      	b.n	8006976 <HAL_I2CEx_ConfigAnalogFilter+0x8a>
-  }
-  else
-  {
-    return HAL_BUSY;
- 8006974:	2302      	movs	r3, #2
-  }
-}
- 8006976:	4618      	mov	r0, r3
- 8006978:	370c      	adds	r7, #12
- 800697a:	46bd      	mov	sp, r7
- 800697c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8006980:	4770      	bx	lr
-
-08006982 <HAL_I2CEx_ConfigDigitalFilter>:
-  *                the configuration information for the specified I2Cx peripheral.
-  * @param  DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
-{
- 8006982:	b480      	push	{r7}
- 8006984:	b085      	sub	sp, #20
- 8006986:	af00      	add	r7, sp, #0
- 8006988:	6078      	str	r0, [r7, #4]
- 800698a:	6039      	str	r1, [r7, #0]
-
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-  assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
- 800698c:	687b      	ldr	r3, [r7, #4]
- 800698e:	f893 3041 	ldrb.w	r3, [r3, #65]	; 0x41
- 8006992:	b2db      	uxtb	r3, r3
- 8006994:	2b20      	cmp	r3, #32
- 8006996:	d139      	bne.n	8006a0c <HAL_I2CEx_ConfigDigitalFilter+0x8a>
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
- 8006998:	687b      	ldr	r3, [r7, #4]
- 800699a:	f893 3040 	ldrb.w	r3, [r3, #64]	; 0x40
- 800699e:	2b01      	cmp	r3, #1
- 80069a0:	d101      	bne.n	80069a6 <HAL_I2CEx_ConfigDigitalFilter+0x24>
- 80069a2:	2302      	movs	r3, #2
- 80069a4:	e033      	b.n	8006a0e <HAL_I2CEx_ConfigDigitalFilter+0x8c>
- 80069a6:	687b      	ldr	r3, [r7, #4]
- 80069a8:	2201      	movs	r2, #1
- 80069aa:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
- 80069ae:	687b      	ldr	r3, [r7, #4]
- 80069b0:	2224      	movs	r2, #36	; 0x24
- 80069b2:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-
-    /* Disable the selected I2C peripheral */
-    __HAL_I2C_DISABLE(hi2c);
- 80069b6:	687b      	ldr	r3, [r7, #4]
- 80069b8:	681b      	ldr	r3, [r3, #0]
- 80069ba:	681a      	ldr	r2, [r3, #0]
- 80069bc:	687b      	ldr	r3, [r7, #4]
- 80069be:	681b      	ldr	r3, [r3, #0]
- 80069c0:	f022 0201 	bic.w	r2, r2, #1
- 80069c4:	601a      	str	r2, [r3, #0]
-
-    /* Get the old register value */
-    tmpreg = hi2c->Instance->CR1;
- 80069c6:	687b      	ldr	r3, [r7, #4]
- 80069c8:	681b      	ldr	r3, [r3, #0]
- 80069ca:	681b      	ldr	r3, [r3, #0]
- 80069cc:	60fb      	str	r3, [r7, #12]
-
-    /* Reset I2Cx DNF bits [11:8] */
-    tmpreg &= ~(I2C_CR1_DNF);
- 80069ce:	68fb      	ldr	r3, [r7, #12]
- 80069d0:	f423 6370 	bic.w	r3, r3, #3840	; 0xf00
- 80069d4:	60fb      	str	r3, [r7, #12]
-
-    /* Set I2Cx DNF coefficient */
-    tmpreg |= DigitalFilter << 8U;
- 80069d6:	683b      	ldr	r3, [r7, #0]
- 80069d8:	021b      	lsls	r3, r3, #8
- 80069da:	68fa      	ldr	r2, [r7, #12]
- 80069dc:	4313      	orrs	r3, r2
- 80069de:	60fb      	str	r3, [r7, #12]
-
-    /* Store the new register value */
-    hi2c->Instance->CR1 = tmpreg;
- 80069e0:	687b      	ldr	r3, [r7, #4]
- 80069e2:	681b      	ldr	r3, [r3, #0]
- 80069e4:	68fa      	ldr	r2, [r7, #12]
- 80069e6:	601a      	str	r2, [r3, #0]
-
-    __HAL_I2C_ENABLE(hi2c);
- 80069e8:	687b      	ldr	r3, [r7, #4]
- 80069ea:	681b      	ldr	r3, [r3, #0]
- 80069ec:	681a      	ldr	r2, [r3, #0]
- 80069ee:	687b      	ldr	r3, [r7, #4]
- 80069f0:	681b      	ldr	r3, [r3, #0]
- 80069f2:	f042 0201 	orr.w	r2, r2, #1
- 80069f6:	601a      	str	r2, [r3, #0]
-
-    hi2c->State = HAL_I2C_STATE_READY;
- 80069f8:	687b      	ldr	r3, [r7, #4]
- 80069fa:	2220      	movs	r2, #32
- 80069fc:	f883 2041 	strb.w	r2, [r3, #65]	; 0x41
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
- 8006a00:	687b      	ldr	r3, [r7, #4]
- 8006a02:	2200      	movs	r2, #0
- 8006a04:	f883 2040 	strb.w	r2, [r3, #64]	; 0x40
-
-    return HAL_OK;
- 8006a08:	2300      	movs	r3, #0
- 8006a0a:	e000      	b.n	8006a0e <HAL_I2CEx_ConfigDigitalFilter+0x8c>
-  }
-  else
-  {
-    return HAL_BUSY;
- 8006a0c:	2302      	movs	r3, #2
-  }
-}
- 8006a0e:	4618      	mov	r0, r3
- 8006a10:	3714      	adds	r7, #20
- 8006a12:	46bd      	mov	sp, r7
- 8006a14:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8006a18:	4770      	bx	lr
-	...
-
-08006a1c <HAL_LTDC_Init>:
-  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
-  *                the configuration information for the LTDC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LTDC_Init(LTDC_HandleTypeDef *hltdc)
-{
- 8006a1c:	b580      	push	{r7, lr}
- 8006a1e:	b084      	sub	sp, #16
- 8006a20:	af00      	add	r7, sp, #0
- 8006a22:	6078      	str	r0, [r7, #4]
-  uint32_t tmp, tmp1;
-
-  /* Check the LTDC peripheral state */
-  if (hltdc == NULL)
- 8006a24:	687b      	ldr	r3, [r7, #4]
- 8006a26:	2b00      	cmp	r3, #0
- 8006a28:	d101      	bne.n	8006a2e <HAL_LTDC_Init+0x12>
-  {
-    return HAL_ERROR;
- 8006a2a:	2301      	movs	r3, #1
- 8006a2c:	e0bf      	b.n	8006bae <HAL_LTDC_Init+0x192>
-    }
-    /* Init the low level hardware */
-    hltdc->MspInitCallback(hltdc);
-  }
-#else
-  if (hltdc->State == HAL_LTDC_STATE_RESET)
- 8006a2e:	687b      	ldr	r3, [r7, #4]
- 8006a30:	f893 30a1 	ldrb.w	r3, [r3, #161]	; 0xa1
- 8006a34:	b2db      	uxtb	r3, r3
- 8006a36:	2b00      	cmp	r3, #0
- 8006a38:	d106      	bne.n	8006a48 <HAL_LTDC_Init+0x2c>
-  {
-    /* Allocate lock resource and initialize it */
-    hltdc->Lock = HAL_UNLOCKED;
- 8006a3a:	687b      	ldr	r3, [r7, #4]
- 8006a3c:	2200      	movs	r2, #0
- 8006a3e:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
-    /* Init the low level hardware */
-    HAL_LTDC_MspInit(hltdc);
- 8006a42:	6878      	ldr	r0, [r7, #4]
- 8006a44:	f7fd f8b8 	bl	8003bb8 <HAL_LTDC_MspInit>
-  }
-#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
-
-  /* Change LTDC peripheral state */
-  hltdc->State = HAL_LTDC_STATE_BUSY;
- 8006a48:	687b      	ldr	r3, [r7, #4]
- 8006a4a:	2202      	movs	r2, #2
- 8006a4c:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
-
-  /* Configure the HS, VS, DE and PC polarity */
-  hltdc->Instance->GCR &= ~(LTDC_GCR_HSPOL | LTDC_GCR_VSPOL | LTDC_GCR_DEPOL | LTDC_GCR_PCPOL);
- 8006a50:	687b      	ldr	r3, [r7, #4]
- 8006a52:	681b      	ldr	r3, [r3, #0]
- 8006a54:	699a      	ldr	r2, [r3, #24]
- 8006a56:	687b      	ldr	r3, [r7, #4]
- 8006a58:	681b      	ldr	r3, [r3, #0]
- 8006a5a:	f022 4270 	bic.w	r2, r2, #4026531840	; 0xf0000000
- 8006a5e:	619a      	str	r2, [r3, #24]
-  hltdc->Instance->GCR |= (uint32_t)(hltdc->Init.HSPolarity | hltdc->Init.VSPolarity | \
- 8006a60:	687b      	ldr	r3, [r7, #4]
- 8006a62:	681b      	ldr	r3, [r3, #0]
- 8006a64:	6999      	ldr	r1, [r3, #24]
- 8006a66:	687b      	ldr	r3, [r7, #4]
- 8006a68:	685a      	ldr	r2, [r3, #4]
- 8006a6a:	687b      	ldr	r3, [r7, #4]
- 8006a6c:	689b      	ldr	r3, [r3, #8]
- 8006a6e:	431a      	orrs	r2, r3
-                                     hltdc->Init.DEPolarity | hltdc->Init.PCPolarity);
- 8006a70:	687b      	ldr	r3, [r7, #4]
- 8006a72:	68db      	ldr	r3, [r3, #12]
-  hltdc->Instance->GCR |= (uint32_t)(hltdc->Init.HSPolarity | hltdc->Init.VSPolarity | \
- 8006a74:	431a      	orrs	r2, r3
-                                     hltdc->Init.DEPolarity | hltdc->Init.PCPolarity);
- 8006a76:	687b      	ldr	r3, [r7, #4]
- 8006a78:	691b      	ldr	r3, [r3, #16]
- 8006a7a:	431a      	orrs	r2, r3
-  hltdc->Instance->GCR |= (uint32_t)(hltdc->Init.HSPolarity | hltdc->Init.VSPolarity | \
- 8006a7c:	687b      	ldr	r3, [r7, #4]
- 8006a7e:	681b      	ldr	r3, [r3, #0]
- 8006a80:	430a      	orrs	r2, r1
- 8006a82:	619a      	str	r2, [r3, #24]
-
-  /* Set Synchronization size */
-  hltdc->Instance->SSCR &= ~(LTDC_SSCR_VSH | LTDC_SSCR_HSW);
- 8006a84:	687b      	ldr	r3, [r7, #4]
- 8006a86:	681b      	ldr	r3, [r3, #0]
- 8006a88:	6899      	ldr	r1, [r3, #8]
- 8006a8a:	687b      	ldr	r3, [r7, #4]
- 8006a8c:	681a      	ldr	r2, [r3, #0]
- 8006a8e:	4b4a      	ldr	r3, [pc, #296]	; (8006bb8 <HAL_LTDC_Init+0x19c>)
- 8006a90:	400b      	ands	r3, r1
- 8006a92:	6093      	str	r3, [r2, #8]
-  tmp = (hltdc->Init.HorizontalSync << 16U);
- 8006a94:	687b      	ldr	r3, [r7, #4]
- 8006a96:	695b      	ldr	r3, [r3, #20]
- 8006a98:	041b      	lsls	r3, r3, #16
- 8006a9a:	60fb      	str	r3, [r7, #12]
-  hltdc->Instance->SSCR |= (tmp | hltdc->Init.VerticalSync);
- 8006a9c:	687b      	ldr	r3, [r7, #4]
- 8006a9e:	681b      	ldr	r3, [r3, #0]
- 8006aa0:	6899      	ldr	r1, [r3, #8]
- 8006aa2:	687b      	ldr	r3, [r7, #4]
- 8006aa4:	699a      	ldr	r2, [r3, #24]
- 8006aa6:	68fb      	ldr	r3, [r7, #12]
- 8006aa8:	431a      	orrs	r2, r3
- 8006aaa:	687b      	ldr	r3, [r7, #4]
- 8006aac:	681b      	ldr	r3, [r3, #0]
- 8006aae:	430a      	orrs	r2, r1
- 8006ab0:	609a      	str	r2, [r3, #8]
-
-  /* Set Accumulated Back porch */
-  hltdc->Instance->BPCR &= ~(LTDC_BPCR_AVBP | LTDC_BPCR_AHBP);
- 8006ab2:	687b      	ldr	r3, [r7, #4]
- 8006ab4:	681b      	ldr	r3, [r3, #0]
- 8006ab6:	68d9      	ldr	r1, [r3, #12]
- 8006ab8:	687b      	ldr	r3, [r7, #4]
- 8006aba:	681a      	ldr	r2, [r3, #0]
- 8006abc:	4b3e      	ldr	r3, [pc, #248]	; (8006bb8 <HAL_LTDC_Init+0x19c>)
- 8006abe:	400b      	ands	r3, r1
- 8006ac0:	60d3      	str	r3, [r2, #12]
-  tmp = (hltdc->Init.AccumulatedHBP << 16U);
- 8006ac2:	687b      	ldr	r3, [r7, #4]
- 8006ac4:	69db      	ldr	r3, [r3, #28]
- 8006ac6:	041b      	lsls	r3, r3, #16
- 8006ac8:	60fb      	str	r3, [r7, #12]
-  hltdc->Instance->BPCR |= (tmp | hltdc->Init.AccumulatedVBP);
- 8006aca:	687b      	ldr	r3, [r7, #4]
- 8006acc:	681b      	ldr	r3, [r3, #0]
- 8006ace:	68d9      	ldr	r1, [r3, #12]
- 8006ad0:	687b      	ldr	r3, [r7, #4]
- 8006ad2:	6a1a      	ldr	r2, [r3, #32]
- 8006ad4:	68fb      	ldr	r3, [r7, #12]
- 8006ad6:	431a      	orrs	r2, r3
- 8006ad8:	687b      	ldr	r3, [r7, #4]
- 8006ada:	681b      	ldr	r3, [r3, #0]
- 8006adc:	430a      	orrs	r2, r1
- 8006ade:	60da      	str	r2, [r3, #12]
-
-  /* Set Accumulated Active Width */
-  hltdc->Instance->AWCR &= ~(LTDC_AWCR_AAH | LTDC_AWCR_AAW);
- 8006ae0:	687b      	ldr	r3, [r7, #4]
- 8006ae2:	681b      	ldr	r3, [r3, #0]
- 8006ae4:	6919      	ldr	r1, [r3, #16]
- 8006ae6:	687b      	ldr	r3, [r7, #4]
- 8006ae8:	681a      	ldr	r2, [r3, #0]
- 8006aea:	4b33      	ldr	r3, [pc, #204]	; (8006bb8 <HAL_LTDC_Init+0x19c>)
- 8006aec:	400b      	ands	r3, r1
- 8006aee:	6113      	str	r3, [r2, #16]
-  tmp = (hltdc->Init.AccumulatedActiveW << 16U);
- 8006af0:	687b      	ldr	r3, [r7, #4]
- 8006af2:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8006af4:	041b      	lsls	r3, r3, #16
- 8006af6:	60fb      	str	r3, [r7, #12]
-  hltdc->Instance->AWCR |= (tmp | hltdc->Init.AccumulatedActiveH);
- 8006af8:	687b      	ldr	r3, [r7, #4]
- 8006afa:	681b      	ldr	r3, [r3, #0]
- 8006afc:	6919      	ldr	r1, [r3, #16]
- 8006afe:	687b      	ldr	r3, [r7, #4]
- 8006b00:	6a9a      	ldr	r2, [r3, #40]	; 0x28
- 8006b02:	68fb      	ldr	r3, [r7, #12]
- 8006b04:	431a      	orrs	r2, r3
- 8006b06:	687b      	ldr	r3, [r7, #4]
- 8006b08:	681b      	ldr	r3, [r3, #0]
- 8006b0a:	430a      	orrs	r2, r1
- 8006b0c:	611a      	str	r2, [r3, #16]
-
-  /* Set Total Width */
-  hltdc->Instance->TWCR &= ~(LTDC_TWCR_TOTALH | LTDC_TWCR_TOTALW);
- 8006b0e:	687b      	ldr	r3, [r7, #4]
- 8006b10:	681b      	ldr	r3, [r3, #0]
- 8006b12:	6959      	ldr	r1, [r3, #20]
- 8006b14:	687b      	ldr	r3, [r7, #4]
- 8006b16:	681a      	ldr	r2, [r3, #0]
- 8006b18:	4b27      	ldr	r3, [pc, #156]	; (8006bb8 <HAL_LTDC_Init+0x19c>)
- 8006b1a:	400b      	ands	r3, r1
- 8006b1c:	6153      	str	r3, [r2, #20]
-  tmp = (hltdc->Init.TotalWidth << 16U);
- 8006b1e:	687b      	ldr	r3, [r7, #4]
- 8006b20:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8006b22:	041b      	lsls	r3, r3, #16
- 8006b24:	60fb      	str	r3, [r7, #12]
-  hltdc->Instance->TWCR |= (tmp | hltdc->Init.TotalHeigh);
- 8006b26:	687b      	ldr	r3, [r7, #4]
- 8006b28:	681b      	ldr	r3, [r3, #0]
- 8006b2a:	6959      	ldr	r1, [r3, #20]
- 8006b2c:	687b      	ldr	r3, [r7, #4]
- 8006b2e:	6b1a      	ldr	r2, [r3, #48]	; 0x30
- 8006b30:	68fb      	ldr	r3, [r7, #12]
- 8006b32:	431a      	orrs	r2, r3
- 8006b34:	687b      	ldr	r3, [r7, #4]
- 8006b36:	681b      	ldr	r3, [r3, #0]
- 8006b38:	430a      	orrs	r2, r1
- 8006b3a:	615a      	str	r2, [r3, #20]
-
-  /* Set the background color value */
-  tmp = ((uint32_t)(hltdc->Init.Backcolor.Green) << 8U);
- 8006b3c:	687b      	ldr	r3, [r7, #4]
- 8006b3e:	f893 3035 	ldrb.w	r3, [r3, #53]	; 0x35
- 8006b42:	021b      	lsls	r3, r3, #8
- 8006b44:	60fb      	str	r3, [r7, #12]
-  tmp1 = ((uint32_t)(hltdc->Init.Backcolor.Red) << 16U);
- 8006b46:	687b      	ldr	r3, [r7, #4]
- 8006b48:	f893 3036 	ldrb.w	r3, [r3, #54]	; 0x36
- 8006b4c:	041b      	lsls	r3, r3, #16
- 8006b4e:	60bb      	str	r3, [r7, #8]
-  hltdc->Instance->BCCR &= ~(LTDC_BCCR_BCBLUE | LTDC_BCCR_BCGREEN | LTDC_BCCR_BCRED);
- 8006b50:	687b      	ldr	r3, [r7, #4]
- 8006b52:	681b      	ldr	r3, [r3, #0]
- 8006b54:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8006b56:	687b      	ldr	r3, [r7, #4]
- 8006b58:	681b      	ldr	r3, [r3, #0]
- 8006b5a:	f002 427f 	and.w	r2, r2, #4278190080	; 0xff000000
- 8006b5e:	62da      	str	r2, [r3, #44]	; 0x2c
-  hltdc->Instance->BCCR |= (tmp1 | tmp | hltdc->Init.Backcolor.Blue);
- 8006b60:	687b      	ldr	r3, [r7, #4]
- 8006b62:	681b      	ldr	r3, [r3, #0]
- 8006b64:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
- 8006b66:	68ba      	ldr	r2, [r7, #8]
- 8006b68:	68fb      	ldr	r3, [r7, #12]
- 8006b6a:	4313      	orrs	r3, r2
- 8006b6c:	687a      	ldr	r2, [r7, #4]
- 8006b6e:	f892 2034 	ldrb.w	r2, [r2, #52]	; 0x34
- 8006b72:	431a      	orrs	r2, r3
- 8006b74:	687b      	ldr	r3, [r7, #4]
- 8006b76:	681b      	ldr	r3, [r3, #0]
- 8006b78:	430a      	orrs	r2, r1
- 8006b7a:	62da      	str	r2, [r3, #44]	; 0x2c
-
-  /* Enable the Transfer Error and FIFO underrun interrupts */
-  __HAL_LTDC_ENABLE_IT(hltdc, LTDC_IT_TE | LTDC_IT_FU);
- 8006b7c:	687b      	ldr	r3, [r7, #4]
- 8006b7e:	681b      	ldr	r3, [r3, #0]
- 8006b80:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 8006b82:	687b      	ldr	r3, [r7, #4]
- 8006b84:	681b      	ldr	r3, [r3, #0]
- 8006b86:	f042 0206 	orr.w	r2, r2, #6
- 8006b8a:	635a      	str	r2, [r3, #52]	; 0x34
-
-  /* Enable LTDC by setting LTDCEN bit */
-  __HAL_LTDC_ENABLE(hltdc);
- 8006b8c:	687b      	ldr	r3, [r7, #4]
- 8006b8e:	681b      	ldr	r3, [r3, #0]
- 8006b90:	699a      	ldr	r2, [r3, #24]
- 8006b92:	687b      	ldr	r3, [r7, #4]
- 8006b94:	681b      	ldr	r3, [r3, #0]
- 8006b96:	f042 0201 	orr.w	r2, r2, #1
- 8006b9a:	619a      	str	r2, [r3, #24]
-
-  /* Initialize the error code */
-  hltdc->ErrorCode = HAL_LTDC_ERROR_NONE;
- 8006b9c:	687b      	ldr	r3, [r7, #4]
- 8006b9e:	2200      	movs	r2, #0
- 8006ba0:	f8c3 20a4 	str.w	r2, [r3, #164]	; 0xa4
-
-  /* Initialize the LTDC state*/
-  hltdc->State = HAL_LTDC_STATE_READY;
- 8006ba4:	687b      	ldr	r3, [r7, #4]
- 8006ba6:	2201      	movs	r2, #1
- 8006ba8:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
-
-  return HAL_OK;
- 8006bac:	2300      	movs	r3, #0
-}
- 8006bae:	4618      	mov	r0, r3
- 8006bb0:	3710      	adds	r7, #16
- 8006bb2:	46bd      	mov	sp, r7
- 8006bb4:	bd80      	pop	{r7, pc}
- 8006bb6:	bf00      	nop
- 8006bb8:	f000f800 	.word	0xf000f800
-
-08006bbc <HAL_LTDC_IRQHandler>:
-  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
-  *                the configuration information for the LTDC.
-  * @retval HAL status
-  */
-void HAL_LTDC_IRQHandler(LTDC_HandleTypeDef *hltdc)
-{
- 8006bbc:	b580      	push	{r7, lr}
- 8006bbe:	b084      	sub	sp, #16
- 8006bc0:	af00      	add	r7, sp, #0
- 8006bc2:	6078      	str	r0, [r7, #4]
-  uint32_t isrflags  = READ_REG(hltdc->Instance->ISR);
- 8006bc4:	687b      	ldr	r3, [r7, #4]
- 8006bc6:	681b      	ldr	r3, [r3, #0]
- 8006bc8:	6b9b      	ldr	r3, [r3, #56]	; 0x38
- 8006bca:	60fb      	str	r3, [r7, #12]
-  uint32_t itsources = READ_REG(hltdc->Instance->IER);
- 8006bcc:	687b      	ldr	r3, [r7, #4]
- 8006bce:	681b      	ldr	r3, [r3, #0]
- 8006bd0:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 8006bd2:	60bb      	str	r3, [r7, #8]
-
-  /* Transfer Error Interrupt management ***************************************/
-  if (((isrflags & LTDC_ISR_TERRIF) != 0U) && ((itsources & LTDC_IER_TERRIE) != 0U))
- 8006bd4:	68fb      	ldr	r3, [r7, #12]
- 8006bd6:	f003 0304 	and.w	r3, r3, #4
- 8006bda:	2b00      	cmp	r3, #0
- 8006bdc:	d023      	beq.n	8006c26 <HAL_LTDC_IRQHandler+0x6a>
- 8006bde:	68bb      	ldr	r3, [r7, #8]
- 8006be0:	f003 0304 	and.w	r3, r3, #4
- 8006be4:	2b00      	cmp	r3, #0
- 8006be6:	d01e      	beq.n	8006c26 <HAL_LTDC_IRQHandler+0x6a>
-  {
-    /* Disable the transfer Error interrupt */
-    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_TE);
- 8006be8:	687b      	ldr	r3, [r7, #4]
- 8006bea:	681b      	ldr	r3, [r3, #0]
- 8006bec:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 8006bee:	687b      	ldr	r3, [r7, #4]
- 8006bf0:	681b      	ldr	r3, [r3, #0]
- 8006bf2:	f022 0204 	bic.w	r2, r2, #4
- 8006bf6:	635a      	str	r2, [r3, #52]	; 0x34
-
-    /* Clear the transfer error flag */
-    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_TE);
- 8006bf8:	687b      	ldr	r3, [r7, #4]
- 8006bfa:	681b      	ldr	r3, [r3, #0]
- 8006bfc:	2204      	movs	r2, #4
- 8006bfe:	63da      	str	r2, [r3, #60]	; 0x3c
-
-    /* Update error code */
-    hltdc->ErrorCode |= HAL_LTDC_ERROR_TE;
- 8006c00:	687b      	ldr	r3, [r7, #4]
- 8006c02:	f8d3 30a4 	ldr.w	r3, [r3, #164]	; 0xa4
- 8006c06:	f043 0201 	orr.w	r2, r3, #1
- 8006c0a:	687b      	ldr	r3, [r7, #4]
- 8006c0c:	f8c3 20a4 	str.w	r2, [r3, #164]	; 0xa4
-
-    /* Change LTDC state */
-    hltdc->State = HAL_LTDC_STATE_ERROR;
- 8006c10:	687b      	ldr	r3, [r7, #4]
- 8006c12:	2204      	movs	r2, #4
- 8006c14:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
-
-    /* Process unlocked */
-    __HAL_UNLOCK(hltdc);
- 8006c18:	687b      	ldr	r3, [r7, #4]
- 8006c1a:	2200      	movs	r2, #0
- 8006c1c:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
-#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
-    /*Call registered error callback*/
-    hltdc->ErrorCallback(hltdc);
-#else
-    /* Call legacy error callback*/
-    HAL_LTDC_ErrorCallback(hltdc);
- 8006c20:	6878      	ldr	r0, [r7, #4]
- 8006c22:	f000 f86f 	bl	8006d04 <HAL_LTDC_ErrorCallback>
-#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
-  }
-
-  /* FIFO underrun Interrupt management ***************************************/
-  if (((isrflags & LTDC_ISR_FUIF) != 0U) && ((itsources & LTDC_IER_FUIE) != 0U))
- 8006c26:	68fb      	ldr	r3, [r7, #12]
- 8006c28:	f003 0302 	and.w	r3, r3, #2
- 8006c2c:	2b00      	cmp	r3, #0
- 8006c2e:	d023      	beq.n	8006c78 <HAL_LTDC_IRQHandler+0xbc>
- 8006c30:	68bb      	ldr	r3, [r7, #8]
- 8006c32:	f003 0302 	and.w	r3, r3, #2
- 8006c36:	2b00      	cmp	r3, #0
- 8006c38:	d01e      	beq.n	8006c78 <HAL_LTDC_IRQHandler+0xbc>
-  {
-    /* Disable the FIFO underrun interrupt */
-    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_FU);
- 8006c3a:	687b      	ldr	r3, [r7, #4]
- 8006c3c:	681b      	ldr	r3, [r3, #0]
- 8006c3e:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 8006c40:	687b      	ldr	r3, [r7, #4]
- 8006c42:	681b      	ldr	r3, [r3, #0]
- 8006c44:	f022 0202 	bic.w	r2, r2, #2
- 8006c48:	635a      	str	r2, [r3, #52]	; 0x34
-
-    /* Clear the FIFO underrun flag */
-    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_FU);
- 8006c4a:	687b      	ldr	r3, [r7, #4]
- 8006c4c:	681b      	ldr	r3, [r3, #0]
- 8006c4e:	2202      	movs	r2, #2
- 8006c50:	63da      	str	r2, [r3, #60]	; 0x3c
-
-    /* Update error code */
-    hltdc->ErrorCode |= HAL_LTDC_ERROR_FU;
- 8006c52:	687b      	ldr	r3, [r7, #4]
- 8006c54:	f8d3 30a4 	ldr.w	r3, [r3, #164]	; 0xa4
- 8006c58:	f043 0202 	orr.w	r2, r3, #2
- 8006c5c:	687b      	ldr	r3, [r7, #4]
- 8006c5e:	f8c3 20a4 	str.w	r2, [r3, #164]	; 0xa4
-
-    /* Change LTDC state */
-    hltdc->State = HAL_LTDC_STATE_ERROR;
- 8006c62:	687b      	ldr	r3, [r7, #4]
- 8006c64:	2204      	movs	r2, #4
- 8006c66:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
-
-    /* Process unlocked */
-    __HAL_UNLOCK(hltdc);
- 8006c6a:	687b      	ldr	r3, [r7, #4]
- 8006c6c:	2200      	movs	r2, #0
- 8006c6e:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
-#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
-    /*Call registered error callback*/
-    hltdc->ErrorCallback(hltdc);
-#else
-    /* Call legacy error callback*/
-    HAL_LTDC_ErrorCallback(hltdc);
- 8006c72:	6878      	ldr	r0, [r7, #4]
- 8006c74:	f000 f846 	bl	8006d04 <HAL_LTDC_ErrorCallback>
-#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
-  }
-
-  /* Line Interrupt management ************************************************/
-  if (((isrflags & LTDC_ISR_LIF) != 0U) && ((itsources & LTDC_IER_LIE) != 0U))
- 8006c78:	68fb      	ldr	r3, [r7, #12]
- 8006c7a:	f003 0301 	and.w	r3, r3, #1
- 8006c7e:	2b00      	cmp	r3, #0
- 8006c80:	d01b      	beq.n	8006cba <HAL_LTDC_IRQHandler+0xfe>
- 8006c82:	68bb      	ldr	r3, [r7, #8]
- 8006c84:	f003 0301 	and.w	r3, r3, #1
- 8006c88:	2b00      	cmp	r3, #0
- 8006c8a:	d016      	beq.n	8006cba <HAL_LTDC_IRQHandler+0xfe>
-  {
-    /* Disable the Line interrupt */
-    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_LI);
- 8006c8c:	687b      	ldr	r3, [r7, #4]
- 8006c8e:	681b      	ldr	r3, [r3, #0]
- 8006c90:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 8006c92:	687b      	ldr	r3, [r7, #4]
- 8006c94:	681b      	ldr	r3, [r3, #0]
- 8006c96:	f022 0201 	bic.w	r2, r2, #1
- 8006c9a:	635a      	str	r2, [r3, #52]	; 0x34
-
-    /* Clear the Line interrupt flag */
-    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_LI);
- 8006c9c:	687b      	ldr	r3, [r7, #4]
- 8006c9e:	681b      	ldr	r3, [r3, #0]
- 8006ca0:	2201      	movs	r2, #1
- 8006ca2:	63da      	str	r2, [r3, #60]	; 0x3c
-
-    /* Change LTDC state */
-    hltdc->State = HAL_LTDC_STATE_READY;
- 8006ca4:	687b      	ldr	r3, [r7, #4]
- 8006ca6:	2201      	movs	r2, #1
- 8006ca8:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
-
-    /* Process unlocked */
-    __HAL_UNLOCK(hltdc);
- 8006cac:	687b      	ldr	r3, [r7, #4]
- 8006cae:	2200      	movs	r2, #0
- 8006cb0:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
-#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
-    /*Call registered Line Event callback */
-    hltdc->LineEventCallback(hltdc);
-#else
-    /*Call Legacy Line Event callback */
-    HAL_LTDC_LineEventCallback(hltdc);
- 8006cb4:	6878      	ldr	r0, [r7, #4]
- 8006cb6:	f000 f82f 	bl	8006d18 <HAL_LTDC_LineEventCallback>
-#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
-  }
-
-  /* Register reload Interrupt management ***************************************/
-  if (((isrflags & LTDC_ISR_RRIF) != 0U) && ((itsources & LTDC_IER_RRIE) != 0U))
- 8006cba:	68fb      	ldr	r3, [r7, #12]
- 8006cbc:	f003 0308 	and.w	r3, r3, #8
- 8006cc0:	2b00      	cmp	r3, #0
- 8006cc2:	d01b      	beq.n	8006cfc <HAL_LTDC_IRQHandler+0x140>
- 8006cc4:	68bb      	ldr	r3, [r7, #8]
- 8006cc6:	f003 0308 	and.w	r3, r3, #8
- 8006cca:	2b00      	cmp	r3, #0
- 8006ccc:	d016      	beq.n	8006cfc <HAL_LTDC_IRQHandler+0x140>
-  {
-    /* Disable the register reload interrupt */
-    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_RR);
- 8006cce:	687b      	ldr	r3, [r7, #4]
- 8006cd0:	681b      	ldr	r3, [r3, #0]
- 8006cd2:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 8006cd4:	687b      	ldr	r3, [r7, #4]
- 8006cd6:	681b      	ldr	r3, [r3, #0]
- 8006cd8:	f022 0208 	bic.w	r2, r2, #8
- 8006cdc:	635a      	str	r2, [r3, #52]	; 0x34
-
-    /* Clear the register reload flag */
-    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_RR);
- 8006cde:	687b      	ldr	r3, [r7, #4]
- 8006ce0:	681b      	ldr	r3, [r3, #0]
- 8006ce2:	2208      	movs	r2, #8
- 8006ce4:	63da      	str	r2, [r3, #60]	; 0x3c
-
-    /* Change LTDC state */
-    hltdc->State = HAL_LTDC_STATE_READY;
- 8006ce6:	687b      	ldr	r3, [r7, #4]
- 8006ce8:	2201      	movs	r2, #1
- 8006cea:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
-
-    /* Process unlocked */
-    __HAL_UNLOCK(hltdc);
- 8006cee:	687b      	ldr	r3, [r7, #4]
- 8006cf0:	2200      	movs	r2, #0
- 8006cf2:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
-#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
-    /*Call registered reload Event callback */
-    hltdc->ReloadEventCallback(hltdc);
-#else
-    /*Call Legacy Reload Event callback */
-    HAL_LTDC_ReloadEventCallback(hltdc);
- 8006cf6:	6878      	ldr	r0, [r7, #4]
- 8006cf8:	f000 f818 	bl	8006d2c <HAL_LTDC_ReloadEventCallback>
-#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
-  }
-}
- 8006cfc:	bf00      	nop
- 8006cfe:	3710      	adds	r7, #16
- 8006d00:	46bd      	mov	sp, r7
- 8006d02:	bd80      	pop	{r7, pc}
-
-08006d04 <HAL_LTDC_ErrorCallback>:
-  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
-  *                the configuration information for the LTDC.
-  * @retval None
-  */
-__weak void HAL_LTDC_ErrorCallback(LTDC_HandleTypeDef *hltdc)
-{
- 8006d04:	b480      	push	{r7}
- 8006d06:	b083      	sub	sp, #12
- 8006d08:	af00      	add	r7, sp, #0
- 8006d0a:	6078      	str	r0, [r7, #4]
-  UNUSED(hltdc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_LTDC_ErrorCallback could be implemented in the user file
-   */
-}
- 8006d0c:	bf00      	nop
- 8006d0e:	370c      	adds	r7, #12
- 8006d10:	46bd      	mov	sp, r7
- 8006d12:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8006d16:	4770      	bx	lr
-
-08006d18 <HAL_LTDC_LineEventCallback>:
-  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
-  *                the configuration information for the LTDC.
-  * @retval None
-  */
-__weak void HAL_LTDC_LineEventCallback(LTDC_HandleTypeDef *hltdc)
-{
- 8006d18:	b480      	push	{r7}
- 8006d1a:	b083      	sub	sp, #12
- 8006d1c:	af00      	add	r7, sp, #0
- 8006d1e:	6078      	str	r0, [r7, #4]
-  UNUSED(hltdc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_LTDC_LineEventCallback could be implemented in the user file
-   */
-}
- 8006d20:	bf00      	nop
- 8006d22:	370c      	adds	r7, #12
- 8006d24:	46bd      	mov	sp, r7
- 8006d26:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8006d2a:	4770      	bx	lr
-
-08006d2c <HAL_LTDC_ReloadEventCallback>:
-  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
-  *                the configuration information for the LTDC.
-  * @retval None
-  */
-__weak void HAL_LTDC_ReloadEventCallback(LTDC_HandleTypeDef *hltdc)
-{
- 8006d2c:	b480      	push	{r7}
- 8006d2e:	b083      	sub	sp, #12
- 8006d30:	af00      	add	r7, sp, #0
- 8006d32:	6078      	str	r0, [r7, #4]
-  UNUSED(hltdc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_LTDC_ReloadEvenCallback could be implemented in the user file
-   */
-}
- 8006d34:	bf00      	nop
- 8006d36:	370c      	adds	r7, #12
- 8006d38:	46bd      	mov	sp, r7
- 8006d3a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8006d3e:	4770      	bx	lr
-
-08006d40 <HAL_LTDC_ConfigLayer>:
-  *                    This parameter can be one of the following values:
-  *                    LTDC_LAYER_1 (0) or LTDC_LAYER_2 (1)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LTDC_ConfigLayer(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgTypeDef *pLayerCfg, uint32_t LayerIdx)
-{
- 8006d40:	b5b0      	push	{r4, r5, r7, lr}
- 8006d42:	b084      	sub	sp, #16
- 8006d44:	af00      	add	r7, sp, #0
- 8006d46:	60f8      	str	r0, [r7, #12]
- 8006d48:	60b9      	str	r1, [r7, #8]
- 8006d4a:	607a      	str	r2, [r7, #4]
-  assert_param(IS_LTDC_BLENDING_FACTOR2(pLayerCfg->BlendingFactor2));
-  assert_param(IS_LTDC_CFBLL(pLayerCfg->ImageWidth));
-  assert_param(IS_LTDC_CFBLNBR(pLayerCfg->ImageHeight));
-
-  /* Process locked */
-  __HAL_LOCK(hltdc);
- 8006d4c:	68fb      	ldr	r3, [r7, #12]
- 8006d4e:	f893 30a0 	ldrb.w	r3, [r3, #160]	; 0xa0
- 8006d52:	2b01      	cmp	r3, #1
- 8006d54:	d101      	bne.n	8006d5a <HAL_LTDC_ConfigLayer+0x1a>
- 8006d56:	2302      	movs	r3, #2
- 8006d58:	e02c      	b.n	8006db4 <HAL_LTDC_ConfigLayer+0x74>
- 8006d5a:	68fb      	ldr	r3, [r7, #12]
- 8006d5c:	2201      	movs	r2, #1
- 8006d5e:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
-
-  /* Change LTDC peripheral state */
-  hltdc->State = HAL_LTDC_STATE_BUSY;
- 8006d62:	68fb      	ldr	r3, [r7, #12]
- 8006d64:	2202      	movs	r2, #2
- 8006d66:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
-
-  /* Copy new layer configuration into handle structure */
-  hltdc->LayerCfg[LayerIdx] = *pLayerCfg;
- 8006d6a:	68fa      	ldr	r2, [r7, #12]
- 8006d6c:	687b      	ldr	r3, [r7, #4]
- 8006d6e:	2134      	movs	r1, #52	; 0x34
- 8006d70:	fb01 f303 	mul.w	r3, r1, r3
- 8006d74:	4413      	add	r3, r2
- 8006d76:	f103 0238 	add.w	r2, r3, #56	; 0x38
- 8006d7a:	68bb      	ldr	r3, [r7, #8]
- 8006d7c:	4614      	mov	r4, r2
- 8006d7e:	461d      	mov	r5, r3
- 8006d80:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
- 8006d82:	c40f      	stmia	r4!, {r0, r1, r2, r3}
- 8006d84:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
- 8006d86:	c40f      	stmia	r4!, {r0, r1, r2, r3}
- 8006d88:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
- 8006d8a:	c40f      	stmia	r4!, {r0, r1, r2, r3}
- 8006d8c:	682b      	ldr	r3, [r5, #0]
- 8006d8e:	6023      	str	r3, [r4, #0]
-
-  /* Configure the LTDC Layer */
-  LTDC_SetConfig(hltdc, pLayerCfg, LayerIdx);
- 8006d90:	687a      	ldr	r2, [r7, #4]
- 8006d92:	68b9      	ldr	r1, [r7, #8]
- 8006d94:	68f8      	ldr	r0, [r7, #12]
- 8006d96:	f000 f81f 	bl	8006dd8 <LTDC_SetConfig>
-
-  /* Set the Immediate Reload type */
-  hltdc->Instance->SRCR = LTDC_SRCR_IMR;
- 8006d9a:	68fb      	ldr	r3, [r7, #12]
- 8006d9c:	681b      	ldr	r3, [r3, #0]
- 8006d9e:	2201      	movs	r2, #1
- 8006da0:	625a      	str	r2, [r3, #36]	; 0x24
-
-  /* Initialize the LTDC state*/
-  hltdc->State  = HAL_LTDC_STATE_READY;
- 8006da2:	68fb      	ldr	r3, [r7, #12]
- 8006da4:	2201      	movs	r2, #1
- 8006da6:	f883 20a1 	strb.w	r2, [r3, #161]	; 0xa1
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hltdc);
- 8006daa:	68fb      	ldr	r3, [r7, #12]
- 8006dac:	2200      	movs	r2, #0
- 8006dae:	f883 20a0 	strb.w	r2, [r3, #160]	; 0xa0
-
-  return HAL_OK;
- 8006db2:	2300      	movs	r3, #0
-}
- 8006db4:	4618      	mov	r0, r3
- 8006db6:	3710      	adds	r7, #16
- 8006db8:	46bd      	mov	sp, r7
- 8006dba:	bdb0      	pop	{r4, r5, r7, pc}
-
-08006dbc <HAL_LTDC_GetState>:
-  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
-  *                the configuration information for the LTDC.
-  * @retval HAL state
-  */
-HAL_LTDC_StateTypeDef HAL_LTDC_GetState(LTDC_HandleTypeDef *hltdc)
-{
- 8006dbc:	b480      	push	{r7}
- 8006dbe:	b083      	sub	sp, #12
- 8006dc0:	af00      	add	r7, sp, #0
- 8006dc2:	6078      	str	r0, [r7, #4]
-  return hltdc->State;
- 8006dc4:	687b      	ldr	r3, [r7, #4]
- 8006dc6:	f893 30a1 	ldrb.w	r3, [r3, #161]	; 0xa1
- 8006dca:	b2db      	uxtb	r3, r3
-}
- 8006dcc:	4618      	mov	r0, r3
- 8006dce:	370c      	adds	r7, #12
- 8006dd0:	46bd      	mov	sp, r7
- 8006dd2:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8006dd6:	4770      	bx	lr
-
-08006dd8 <LTDC_SetConfig>:
-  * @param  LayerIdx  LTDC Layer index.
-  *                   This parameter can be one of the following values: LTDC_LAYER_1 (0) or LTDC_LAYER_2 (1)
-  * @retval None
-  */
-static void LTDC_SetConfig(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgTypeDef *pLayerCfg, uint32_t LayerIdx)
-{
- 8006dd8:	b480      	push	{r7}
- 8006dda:	b089      	sub	sp, #36	; 0x24
- 8006ddc:	af00      	add	r7, sp, #0
- 8006dde:	60f8      	str	r0, [r7, #12]
- 8006de0:	60b9      	str	r1, [r7, #8]
- 8006de2:	607a      	str	r2, [r7, #4]
-  uint32_t tmp;
-  uint32_t tmp1;
-  uint32_t tmp2;
-
-  /* Configure the horizontal start and stop position */
-  tmp = ((pLayerCfg->WindowX1 + ((hltdc->Instance->BPCR & LTDC_BPCR_AHBP) >> 16U)) << 16U);
- 8006de4:	68bb      	ldr	r3, [r7, #8]
- 8006de6:	685a      	ldr	r2, [r3, #4]
- 8006de8:	68fb      	ldr	r3, [r7, #12]
- 8006dea:	681b      	ldr	r3, [r3, #0]
- 8006dec:	68db      	ldr	r3, [r3, #12]
- 8006dee:	0c1b      	lsrs	r3, r3, #16
- 8006df0:	f3c3 030b 	ubfx	r3, r3, #0, #12
- 8006df4:	4413      	add	r3, r2
- 8006df6:	041b      	lsls	r3, r3, #16
- 8006df8:	61fb      	str	r3, [r7, #28]
-  LTDC_LAYER(hltdc, LayerIdx)->WHPCR &= ~(LTDC_LxWHPCR_WHSTPOS | LTDC_LxWHPCR_WHSPPOS);
- 8006dfa:	68fb      	ldr	r3, [r7, #12]
- 8006dfc:	681b      	ldr	r3, [r3, #0]
- 8006dfe:	461a      	mov	r2, r3
- 8006e00:	687b      	ldr	r3, [r7, #4]
- 8006e02:	01db      	lsls	r3, r3, #7
- 8006e04:	4413      	add	r3, r2
- 8006e06:	3384      	adds	r3, #132	; 0x84
- 8006e08:	685b      	ldr	r3, [r3, #4]
- 8006e0a:	68fa      	ldr	r2, [r7, #12]
- 8006e0c:	6812      	ldr	r2, [r2, #0]
- 8006e0e:	4611      	mov	r1, r2
- 8006e10:	687a      	ldr	r2, [r7, #4]
- 8006e12:	01d2      	lsls	r2, r2, #7
- 8006e14:	440a      	add	r2, r1
- 8006e16:	3284      	adds	r2, #132	; 0x84
- 8006e18:	f403 4370 	and.w	r3, r3, #61440	; 0xf000
- 8006e1c:	6053      	str	r3, [r2, #4]
-  LTDC_LAYER(hltdc, LayerIdx)->WHPCR = ((pLayerCfg->WindowX0 + ((hltdc->Instance->BPCR & LTDC_BPCR_AHBP) >> 16U) + 1U) | tmp);
- 8006e1e:	68bb      	ldr	r3, [r7, #8]
- 8006e20:	681a      	ldr	r2, [r3, #0]
- 8006e22:	68fb      	ldr	r3, [r7, #12]
- 8006e24:	681b      	ldr	r3, [r3, #0]
- 8006e26:	68db      	ldr	r3, [r3, #12]
- 8006e28:	0c1b      	lsrs	r3, r3, #16
- 8006e2a:	f3c3 030b 	ubfx	r3, r3, #0, #12
- 8006e2e:	4413      	add	r3, r2
- 8006e30:	1c5a      	adds	r2, r3, #1
- 8006e32:	68fb      	ldr	r3, [r7, #12]
- 8006e34:	681b      	ldr	r3, [r3, #0]
- 8006e36:	4619      	mov	r1, r3
- 8006e38:	687b      	ldr	r3, [r7, #4]
- 8006e3a:	01db      	lsls	r3, r3, #7
- 8006e3c:	440b      	add	r3, r1
- 8006e3e:	3384      	adds	r3, #132	; 0x84
- 8006e40:	4619      	mov	r1, r3
- 8006e42:	69fb      	ldr	r3, [r7, #28]
- 8006e44:	4313      	orrs	r3, r2
- 8006e46:	604b      	str	r3, [r1, #4]
-
-  /* Configure the vertical start and stop position */
-  tmp = ((pLayerCfg->WindowY1 + (hltdc->Instance->BPCR & LTDC_BPCR_AVBP)) << 16U);
- 8006e48:	68bb      	ldr	r3, [r7, #8]
- 8006e4a:	68da      	ldr	r2, [r3, #12]
- 8006e4c:	68fb      	ldr	r3, [r7, #12]
- 8006e4e:	681b      	ldr	r3, [r3, #0]
- 8006e50:	68db      	ldr	r3, [r3, #12]
- 8006e52:	f3c3 030a 	ubfx	r3, r3, #0, #11
- 8006e56:	4413      	add	r3, r2
- 8006e58:	041b      	lsls	r3, r3, #16
- 8006e5a:	61fb      	str	r3, [r7, #28]
-  LTDC_LAYER(hltdc, LayerIdx)->WVPCR &= ~(LTDC_LxWVPCR_WVSTPOS | LTDC_LxWVPCR_WVSPPOS);
- 8006e5c:	68fb      	ldr	r3, [r7, #12]
- 8006e5e:	681b      	ldr	r3, [r3, #0]
- 8006e60:	461a      	mov	r2, r3
- 8006e62:	687b      	ldr	r3, [r7, #4]
- 8006e64:	01db      	lsls	r3, r3, #7
- 8006e66:	4413      	add	r3, r2
- 8006e68:	3384      	adds	r3, #132	; 0x84
- 8006e6a:	689b      	ldr	r3, [r3, #8]
- 8006e6c:	68fa      	ldr	r2, [r7, #12]
- 8006e6e:	6812      	ldr	r2, [r2, #0]
- 8006e70:	4611      	mov	r1, r2
- 8006e72:	687a      	ldr	r2, [r7, #4]
- 8006e74:	01d2      	lsls	r2, r2, #7
- 8006e76:	440a      	add	r2, r1
- 8006e78:	3284      	adds	r2, #132	; 0x84
- 8006e7a:	f403 4370 	and.w	r3, r3, #61440	; 0xf000
- 8006e7e:	6093      	str	r3, [r2, #8]
-  LTDC_LAYER(hltdc, LayerIdx)->WVPCR  = ((pLayerCfg->WindowY0 + (hltdc->Instance->BPCR & LTDC_BPCR_AVBP) + 1U) | tmp);
- 8006e80:	68bb      	ldr	r3, [r7, #8]
- 8006e82:	689a      	ldr	r2, [r3, #8]
- 8006e84:	68fb      	ldr	r3, [r7, #12]
- 8006e86:	681b      	ldr	r3, [r3, #0]
- 8006e88:	68db      	ldr	r3, [r3, #12]
- 8006e8a:	f3c3 030a 	ubfx	r3, r3, #0, #11
- 8006e8e:	4413      	add	r3, r2
- 8006e90:	1c5a      	adds	r2, r3, #1
- 8006e92:	68fb      	ldr	r3, [r7, #12]
- 8006e94:	681b      	ldr	r3, [r3, #0]
- 8006e96:	4619      	mov	r1, r3
- 8006e98:	687b      	ldr	r3, [r7, #4]
- 8006e9a:	01db      	lsls	r3, r3, #7
- 8006e9c:	440b      	add	r3, r1
- 8006e9e:	3384      	adds	r3, #132	; 0x84
- 8006ea0:	4619      	mov	r1, r3
- 8006ea2:	69fb      	ldr	r3, [r7, #28]
- 8006ea4:	4313      	orrs	r3, r2
- 8006ea6:	608b      	str	r3, [r1, #8]
-
-  /* Specifies the pixel format */
-  LTDC_LAYER(hltdc, LayerIdx)->PFCR &= ~(LTDC_LxPFCR_PF);
- 8006ea8:	68fb      	ldr	r3, [r7, #12]
- 8006eaa:	681b      	ldr	r3, [r3, #0]
- 8006eac:	461a      	mov	r2, r3
- 8006eae:	687b      	ldr	r3, [r7, #4]
- 8006eb0:	01db      	lsls	r3, r3, #7
- 8006eb2:	4413      	add	r3, r2
- 8006eb4:	3384      	adds	r3, #132	; 0x84
- 8006eb6:	691b      	ldr	r3, [r3, #16]
- 8006eb8:	68fa      	ldr	r2, [r7, #12]
- 8006eba:	6812      	ldr	r2, [r2, #0]
- 8006ebc:	4611      	mov	r1, r2
- 8006ebe:	687a      	ldr	r2, [r7, #4]
- 8006ec0:	01d2      	lsls	r2, r2, #7
- 8006ec2:	440a      	add	r2, r1
- 8006ec4:	3284      	adds	r2, #132	; 0x84
- 8006ec6:	f023 0307 	bic.w	r3, r3, #7
- 8006eca:	6113      	str	r3, [r2, #16]
-  LTDC_LAYER(hltdc, LayerIdx)->PFCR = (pLayerCfg->PixelFormat);
- 8006ecc:	68fb      	ldr	r3, [r7, #12]
- 8006ece:	681b      	ldr	r3, [r3, #0]
- 8006ed0:	461a      	mov	r2, r3
- 8006ed2:	687b      	ldr	r3, [r7, #4]
- 8006ed4:	01db      	lsls	r3, r3, #7
- 8006ed6:	4413      	add	r3, r2
- 8006ed8:	3384      	adds	r3, #132	; 0x84
- 8006eda:	461a      	mov	r2, r3
- 8006edc:	68bb      	ldr	r3, [r7, #8]
- 8006ede:	691b      	ldr	r3, [r3, #16]
- 8006ee0:	6113      	str	r3, [r2, #16]
-
-  /* Configure the default color values */
-  tmp = ((uint32_t)(pLayerCfg->Backcolor.Green) << 8U);
- 8006ee2:	68bb      	ldr	r3, [r7, #8]
- 8006ee4:	f893 3031 	ldrb.w	r3, [r3, #49]	; 0x31
- 8006ee8:	021b      	lsls	r3, r3, #8
- 8006eea:	61fb      	str	r3, [r7, #28]
-  tmp1 = ((uint32_t)(pLayerCfg->Backcolor.Red) << 16U);
- 8006eec:	68bb      	ldr	r3, [r7, #8]
- 8006eee:	f893 3032 	ldrb.w	r3, [r3, #50]	; 0x32
- 8006ef2:	041b      	lsls	r3, r3, #16
- 8006ef4:	61bb      	str	r3, [r7, #24]
-  tmp2 = (pLayerCfg->Alpha0 << 24U);
- 8006ef6:	68bb      	ldr	r3, [r7, #8]
- 8006ef8:	699b      	ldr	r3, [r3, #24]
- 8006efa:	061b      	lsls	r3, r3, #24
- 8006efc:	617b      	str	r3, [r7, #20]
-  LTDC_LAYER(hltdc, LayerIdx)->DCCR &= ~(LTDC_LxDCCR_DCBLUE | LTDC_LxDCCR_DCGREEN | LTDC_LxDCCR_DCRED | LTDC_LxDCCR_DCALPHA);
- 8006efe:	68fb      	ldr	r3, [r7, #12]
- 8006f00:	681b      	ldr	r3, [r3, #0]
- 8006f02:	461a      	mov	r2, r3
- 8006f04:	687b      	ldr	r3, [r7, #4]
- 8006f06:	01db      	lsls	r3, r3, #7
- 8006f08:	4413      	add	r3, r2
- 8006f0a:	3384      	adds	r3, #132	; 0x84
- 8006f0c:	699b      	ldr	r3, [r3, #24]
- 8006f0e:	68fb      	ldr	r3, [r7, #12]
- 8006f10:	681b      	ldr	r3, [r3, #0]
- 8006f12:	461a      	mov	r2, r3
- 8006f14:	687b      	ldr	r3, [r7, #4]
- 8006f16:	01db      	lsls	r3, r3, #7
- 8006f18:	4413      	add	r3, r2
- 8006f1a:	3384      	adds	r3, #132	; 0x84
- 8006f1c:	461a      	mov	r2, r3
- 8006f1e:	2300      	movs	r3, #0
- 8006f20:	6193      	str	r3, [r2, #24]
-  LTDC_LAYER(hltdc, LayerIdx)->DCCR = (pLayerCfg->Backcolor.Blue | tmp | tmp1 | tmp2);
- 8006f22:	68bb      	ldr	r3, [r7, #8]
- 8006f24:	f893 3030 	ldrb.w	r3, [r3, #48]	; 0x30
- 8006f28:	461a      	mov	r2, r3
- 8006f2a:	69fb      	ldr	r3, [r7, #28]
- 8006f2c:	431a      	orrs	r2, r3
- 8006f2e:	69bb      	ldr	r3, [r7, #24]
- 8006f30:	431a      	orrs	r2, r3
- 8006f32:	68fb      	ldr	r3, [r7, #12]
- 8006f34:	681b      	ldr	r3, [r3, #0]
- 8006f36:	4619      	mov	r1, r3
- 8006f38:	687b      	ldr	r3, [r7, #4]
- 8006f3a:	01db      	lsls	r3, r3, #7
- 8006f3c:	440b      	add	r3, r1
- 8006f3e:	3384      	adds	r3, #132	; 0x84
- 8006f40:	4619      	mov	r1, r3
- 8006f42:	697b      	ldr	r3, [r7, #20]
- 8006f44:	4313      	orrs	r3, r2
- 8006f46:	618b      	str	r3, [r1, #24]
-
-  /* Specifies the constant alpha value */
-  LTDC_LAYER(hltdc, LayerIdx)->CACR &= ~(LTDC_LxCACR_CONSTA);
- 8006f48:	68fb      	ldr	r3, [r7, #12]
- 8006f4a:	681b      	ldr	r3, [r3, #0]
- 8006f4c:	461a      	mov	r2, r3
- 8006f4e:	687b      	ldr	r3, [r7, #4]
- 8006f50:	01db      	lsls	r3, r3, #7
- 8006f52:	4413      	add	r3, r2
- 8006f54:	3384      	adds	r3, #132	; 0x84
- 8006f56:	695b      	ldr	r3, [r3, #20]
- 8006f58:	68fa      	ldr	r2, [r7, #12]
- 8006f5a:	6812      	ldr	r2, [r2, #0]
- 8006f5c:	4611      	mov	r1, r2
- 8006f5e:	687a      	ldr	r2, [r7, #4]
- 8006f60:	01d2      	lsls	r2, r2, #7
- 8006f62:	440a      	add	r2, r1
- 8006f64:	3284      	adds	r2, #132	; 0x84
- 8006f66:	f023 03ff 	bic.w	r3, r3, #255	; 0xff
- 8006f6a:	6153      	str	r3, [r2, #20]
-  LTDC_LAYER(hltdc, LayerIdx)->CACR = (pLayerCfg->Alpha);
- 8006f6c:	68fb      	ldr	r3, [r7, #12]
- 8006f6e:	681b      	ldr	r3, [r3, #0]
- 8006f70:	461a      	mov	r2, r3
- 8006f72:	687b      	ldr	r3, [r7, #4]
- 8006f74:	01db      	lsls	r3, r3, #7
- 8006f76:	4413      	add	r3, r2
- 8006f78:	3384      	adds	r3, #132	; 0x84
- 8006f7a:	461a      	mov	r2, r3
- 8006f7c:	68bb      	ldr	r3, [r7, #8]
- 8006f7e:	695b      	ldr	r3, [r3, #20]
- 8006f80:	6153      	str	r3, [r2, #20]
-
-  /* Specifies the blending factors */
-  LTDC_LAYER(hltdc, LayerIdx)->BFCR &= ~(LTDC_LxBFCR_BF2 | LTDC_LxBFCR_BF1);
- 8006f82:	68fb      	ldr	r3, [r7, #12]
- 8006f84:	681b      	ldr	r3, [r3, #0]
- 8006f86:	461a      	mov	r2, r3
- 8006f88:	687b      	ldr	r3, [r7, #4]
- 8006f8a:	01db      	lsls	r3, r3, #7
- 8006f8c:	4413      	add	r3, r2
- 8006f8e:	3384      	adds	r3, #132	; 0x84
- 8006f90:	69da      	ldr	r2, [r3, #28]
- 8006f92:	68fb      	ldr	r3, [r7, #12]
- 8006f94:	681b      	ldr	r3, [r3, #0]
- 8006f96:	4619      	mov	r1, r3
- 8006f98:	687b      	ldr	r3, [r7, #4]
- 8006f9a:	01db      	lsls	r3, r3, #7
- 8006f9c:	440b      	add	r3, r1
- 8006f9e:	3384      	adds	r3, #132	; 0x84
- 8006fa0:	4619      	mov	r1, r3
- 8006fa2:	4b58      	ldr	r3, [pc, #352]	; (8007104 <LTDC_SetConfig+0x32c>)
- 8006fa4:	4013      	ands	r3, r2
- 8006fa6:	61cb      	str	r3, [r1, #28]
-  LTDC_LAYER(hltdc, LayerIdx)->BFCR = (pLayerCfg->BlendingFactor1 | pLayerCfg->BlendingFactor2);
- 8006fa8:	68bb      	ldr	r3, [r7, #8]
- 8006faa:	69da      	ldr	r2, [r3, #28]
- 8006fac:	68bb      	ldr	r3, [r7, #8]
- 8006fae:	6a1b      	ldr	r3, [r3, #32]
- 8006fb0:	68f9      	ldr	r1, [r7, #12]
- 8006fb2:	6809      	ldr	r1, [r1, #0]
- 8006fb4:	4608      	mov	r0, r1
- 8006fb6:	6879      	ldr	r1, [r7, #4]
- 8006fb8:	01c9      	lsls	r1, r1, #7
- 8006fba:	4401      	add	r1, r0
- 8006fbc:	3184      	adds	r1, #132	; 0x84
- 8006fbe:	4313      	orrs	r3, r2
- 8006fc0:	61cb      	str	r3, [r1, #28]
-
-  /* Configure the color frame buffer start address */
-  LTDC_LAYER(hltdc, LayerIdx)->CFBAR &= ~(LTDC_LxCFBAR_CFBADD);
- 8006fc2:	68fb      	ldr	r3, [r7, #12]
- 8006fc4:	681b      	ldr	r3, [r3, #0]
- 8006fc6:	461a      	mov	r2, r3
- 8006fc8:	687b      	ldr	r3, [r7, #4]
- 8006fca:	01db      	lsls	r3, r3, #7
- 8006fcc:	4413      	add	r3, r2
- 8006fce:	3384      	adds	r3, #132	; 0x84
- 8006fd0:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 8006fd2:	68fb      	ldr	r3, [r7, #12]
- 8006fd4:	681b      	ldr	r3, [r3, #0]
- 8006fd6:	461a      	mov	r2, r3
- 8006fd8:	687b      	ldr	r3, [r7, #4]
- 8006fda:	01db      	lsls	r3, r3, #7
- 8006fdc:	4413      	add	r3, r2
- 8006fde:	3384      	adds	r3, #132	; 0x84
- 8006fe0:	461a      	mov	r2, r3
- 8006fe2:	2300      	movs	r3, #0
- 8006fe4:	6293      	str	r3, [r2, #40]	; 0x28
-  LTDC_LAYER(hltdc, LayerIdx)->CFBAR = (pLayerCfg->FBStartAdress);
- 8006fe6:	68fb      	ldr	r3, [r7, #12]
- 8006fe8:	681b      	ldr	r3, [r3, #0]
- 8006fea:	461a      	mov	r2, r3
- 8006fec:	687b      	ldr	r3, [r7, #4]
- 8006fee:	01db      	lsls	r3, r3, #7
- 8006ff0:	4413      	add	r3, r2
- 8006ff2:	3384      	adds	r3, #132	; 0x84
- 8006ff4:	461a      	mov	r2, r3
- 8006ff6:	68bb      	ldr	r3, [r7, #8]
- 8006ff8:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8006ffa:	6293      	str	r3, [r2, #40]	; 0x28
-
-  if (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB8888)
- 8006ffc:	68bb      	ldr	r3, [r7, #8]
- 8006ffe:	691b      	ldr	r3, [r3, #16]
- 8007000:	2b00      	cmp	r3, #0
- 8007002:	d102      	bne.n	800700a <LTDC_SetConfig+0x232>
-  {
-    tmp = 4U;
- 8007004:	2304      	movs	r3, #4
- 8007006:	61fb      	str	r3, [r7, #28]
- 8007008:	e01b      	b.n	8007042 <LTDC_SetConfig+0x26a>
-  }
-  else if (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_RGB888)
- 800700a:	68bb      	ldr	r3, [r7, #8]
- 800700c:	691b      	ldr	r3, [r3, #16]
- 800700e:	2b01      	cmp	r3, #1
- 8007010:	d102      	bne.n	8007018 <LTDC_SetConfig+0x240>
-  {
-    tmp = 3U;
- 8007012:	2303      	movs	r3, #3
- 8007014:	61fb      	str	r3, [r7, #28]
- 8007016:	e014      	b.n	8007042 <LTDC_SetConfig+0x26a>
-  }
-  else if ((pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB4444) || \
- 8007018:	68bb      	ldr	r3, [r7, #8]
- 800701a:	691b      	ldr	r3, [r3, #16]
- 800701c:	2b04      	cmp	r3, #4
- 800701e:	d00b      	beq.n	8007038 <LTDC_SetConfig+0x260>
-           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_RGB565)   || \
- 8007020:	68bb      	ldr	r3, [r7, #8]
- 8007022:	691b      	ldr	r3, [r3, #16]
-  else if ((pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB4444) || \
- 8007024:	2b02      	cmp	r3, #2
- 8007026:	d007      	beq.n	8007038 <LTDC_SetConfig+0x260>
-           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB1555) || \
- 8007028:	68bb      	ldr	r3, [r7, #8]
- 800702a:	691b      	ldr	r3, [r3, #16]
-           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_RGB565)   || \
- 800702c:	2b03      	cmp	r3, #3
- 800702e:	d003      	beq.n	8007038 <LTDC_SetConfig+0x260>
-           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_AL88))
- 8007030:	68bb      	ldr	r3, [r7, #8]
- 8007032:	691b      	ldr	r3, [r3, #16]
-           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB1555) || \
- 8007034:	2b07      	cmp	r3, #7
- 8007036:	d102      	bne.n	800703e <LTDC_SetConfig+0x266>
-  {
-    tmp = 2U;
- 8007038:	2302      	movs	r3, #2
- 800703a:	61fb      	str	r3, [r7, #28]
- 800703c:	e001      	b.n	8007042 <LTDC_SetConfig+0x26a>
-  }
-  else
-  {
-    tmp = 1U;
- 800703e:	2301      	movs	r3, #1
- 8007040:	61fb      	str	r3, [r7, #28]
-  }
-
-  /* Configure the color frame buffer pitch in byte */
-  LTDC_LAYER(hltdc, LayerIdx)->CFBLR  &= ~(LTDC_LxCFBLR_CFBLL | LTDC_LxCFBLR_CFBP);
- 8007042:	68fb      	ldr	r3, [r7, #12]
- 8007044:	681b      	ldr	r3, [r3, #0]
- 8007046:	461a      	mov	r2, r3
- 8007048:	687b      	ldr	r3, [r7, #4]
- 800704a:	01db      	lsls	r3, r3, #7
- 800704c:	4413      	add	r3, r2
- 800704e:	3384      	adds	r3, #132	; 0x84
- 8007050:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8007052:	68fa      	ldr	r2, [r7, #12]
- 8007054:	6812      	ldr	r2, [r2, #0]
- 8007056:	4611      	mov	r1, r2
- 8007058:	687a      	ldr	r2, [r7, #4]
- 800705a:	01d2      	lsls	r2, r2, #7
- 800705c:	440a      	add	r2, r1
- 800705e:	3284      	adds	r2, #132	; 0x84
- 8007060:	f003 23e0 	and.w	r3, r3, #3758153728	; 0xe000e000
- 8007064:	62d3      	str	r3, [r2, #44]	; 0x2c
-  LTDC_LAYER(hltdc, LayerIdx)->CFBLR  = (((pLayerCfg->ImageWidth * tmp) << 16U) | (((pLayerCfg->WindowX1 - pLayerCfg->WindowX0) * tmp)  + 3U));
- 8007066:	68bb      	ldr	r3, [r7, #8]
- 8007068:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 800706a:	69fa      	ldr	r2, [r7, #28]
- 800706c:	fb02 f303 	mul.w	r3, r2, r3
- 8007070:	041a      	lsls	r2, r3, #16
- 8007072:	68bb      	ldr	r3, [r7, #8]
- 8007074:	6859      	ldr	r1, [r3, #4]
- 8007076:	68bb      	ldr	r3, [r7, #8]
- 8007078:	681b      	ldr	r3, [r3, #0]
- 800707a:	1acb      	subs	r3, r1, r3
- 800707c:	69f9      	ldr	r1, [r7, #28]
- 800707e:	fb01 f303 	mul.w	r3, r1, r3
- 8007082:	3303      	adds	r3, #3
- 8007084:	68f9      	ldr	r1, [r7, #12]
- 8007086:	6809      	ldr	r1, [r1, #0]
- 8007088:	4608      	mov	r0, r1
- 800708a:	6879      	ldr	r1, [r7, #4]
- 800708c:	01c9      	lsls	r1, r1, #7
- 800708e:	4401      	add	r1, r0
- 8007090:	3184      	adds	r1, #132	; 0x84
- 8007092:	4313      	orrs	r3, r2
- 8007094:	62cb      	str	r3, [r1, #44]	; 0x2c
-  /* Configure the frame buffer line number */
-  LTDC_LAYER(hltdc, LayerIdx)->CFBLNR  &= ~(LTDC_LxCFBLNR_CFBLNBR);
- 8007096:	68fb      	ldr	r3, [r7, #12]
- 8007098:	681b      	ldr	r3, [r3, #0]
- 800709a:	461a      	mov	r2, r3
- 800709c:	687b      	ldr	r3, [r7, #4]
- 800709e:	01db      	lsls	r3, r3, #7
- 80070a0:	4413      	add	r3, r2
- 80070a2:	3384      	adds	r3, #132	; 0x84
- 80070a4:	6b1a      	ldr	r2, [r3, #48]	; 0x30
- 80070a6:	68fb      	ldr	r3, [r7, #12]
- 80070a8:	681b      	ldr	r3, [r3, #0]
- 80070aa:	4619      	mov	r1, r3
- 80070ac:	687b      	ldr	r3, [r7, #4]
- 80070ae:	01db      	lsls	r3, r3, #7
- 80070b0:	440b      	add	r3, r1
- 80070b2:	3384      	adds	r3, #132	; 0x84
- 80070b4:	4619      	mov	r1, r3
- 80070b6:	4b14      	ldr	r3, [pc, #80]	; (8007108 <LTDC_SetConfig+0x330>)
- 80070b8:	4013      	ands	r3, r2
- 80070ba:	630b      	str	r3, [r1, #48]	; 0x30
-  LTDC_LAYER(hltdc, LayerIdx)->CFBLNR  = (pLayerCfg->ImageHeight);
- 80070bc:	68fb      	ldr	r3, [r7, #12]
- 80070be:	681b      	ldr	r3, [r3, #0]
- 80070c0:	461a      	mov	r2, r3
- 80070c2:	687b      	ldr	r3, [r7, #4]
- 80070c4:	01db      	lsls	r3, r3, #7
- 80070c6:	4413      	add	r3, r2
- 80070c8:	3384      	adds	r3, #132	; 0x84
- 80070ca:	461a      	mov	r2, r3
- 80070cc:	68bb      	ldr	r3, [r7, #8]
- 80070ce:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 80070d0:	6313      	str	r3, [r2, #48]	; 0x30
-
-  /* Enable LTDC_Layer by setting LEN bit */
-  LTDC_LAYER(hltdc, LayerIdx)->CR |= (uint32_t)LTDC_LxCR_LEN;
- 80070d2:	68fb      	ldr	r3, [r7, #12]
- 80070d4:	681b      	ldr	r3, [r3, #0]
- 80070d6:	461a      	mov	r2, r3
- 80070d8:	687b      	ldr	r3, [r7, #4]
- 80070da:	01db      	lsls	r3, r3, #7
- 80070dc:	4413      	add	r3, r2
- 80070de:	3384      	adds	r3, #132	; 0x84
- 80070e0:	681b      	ldr	r3, [r3, #0]
- 80070e2:	68fa      	ldr	r2, [r7, #12]
- 80070e4:	6812      	ldr	r2, [r2, #0]
- 80070e6:	4611      	mov	r1, r2
- 80070e8:	687a      	ldr	r2, [r7, #4]
- 80070ea:	01d2      	lsls	r2, r2, #7
- 80070ec:	440a      	add	r2, r1
- 80070ee:	3284      	adds	r2, #132	; 0x84
- 80070f0:	f043 0301 	orr.w	r3, r3, #1
- 80070f4:	6013      	str	r3, [r2, #0]
-}
- 80070f6:	bf00      	nop
- 80070f8:	3724      	adds	r7, #36	; 0x24
- 80070fa:	46bd      	mov	sp, r7
- 80070fc:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8007100:	4770      	bx	lr
- 8007102:	bf00      	nop
- 8007104:	fffff8f8 	.word	0xfffff8f8
- 8007108:	fffff800 	.word	0xfffff800
-
-0800710c <HAL_PWR_EnableBkUpAccess>:
-  * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the 
-  *         Backup Domain Access should be kept enabled.
-  * @retval None
-  */
-void HAL_PWR_EnableBkUpAccess(void)
-{
- 800710c:	b480      	push	{r7}
- 800710e:	af00      	add	r7, sp, #0
-  /* Enable access to RTC and backup registers */
-  SET_BIT(PWR->CR1, PWR_CR1_DBP);
- 8007110:	4b05      	ldr	r3, [pc, #20]	; (8007128 <HAL_PWR_EnableBkUpAccess+0x1c>)
- 8007112:	681b      	ldr	r3, [r3, #0]
- 8007114:	4a04      	ldr	r2, [pc, #16]	; (8007128 <HAL_PWR_EnableBkUpAccess+0x1c>)
- 8007116:	f443 7380 	orr.w	r3, r3, #256	; 0x100
- 800711a:	6013      	str	r3, [r2, #0]
-}
- 800711c:	bf00      	nop
- 800711e:	46bd      	mov	sp, r7
- 8007120:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8007124:	4770      	bx	lr
- 8007126:	bf00      	nop
- 8007128:	40007000 	.word	0x40007000
-
-0800712c <HAL_PWREx_EnableOverDrive>:
-  *         During the Over-drive switch activation, no peripheral clocks should be enabled.   
-  *         The peripheral clocks must be enabled once the Over-drive mode is activated.   
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void)
-{
- 800712c:	b580      	push	{r7, lr}
- 800712e:	b082      	sub	sp, #8
- 8007130:	af00      	add	r7, sp, #0
-  uint32_t tickstart = 0;
- 8007132:	2300      	movs	r3, #0
- 8007134:	607b      	str	r3, [r7, #4]
-
-  __HAL_RCC_PWR_CLK_ENABLE();
- 8007136:	4b23      	ldr	r3, [pc, #140]	; (80071c4 <HAL_PWREx_EnableOverDrive+0x98>)
- 8007138:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 800713a:	4a22      	ldr	r2, [pc, #136]	; (80071c4 <HAL_PWREx_EnableOverDrive+0x98>)
- 800713c:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
- 8007140:	6413      	str	r3, [r2, #64]	; 0x40
- 8007142:	4b20      	ldr	r3, [pc, #128]	; (80071c4 <HAL_PWREx_EnableOverDrive+0x98>)
- 8007144:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8007146:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
- 800714a:	603b      	str	r3, [r7, #0]
- 800714c:	683b      	ldr	r3, [r7, #0]
-  
-  /* Enable the Over-drive to extend the clock frequency to 216 MHz */
-  __HAL_PWR_OVERDRIVE_ENABLE();
- 800714e:	4b1e      	ldr	r3, [pc, #120]	; (80071c8 <HAL_PWREx_EnableOverDrive+0x9c>)
- 8007150:	681b      	ldr	r3, [r3, #0]
- 8007152:	4a1d      	ldr	r2, [pc, #116]	; (80071c8 <HAL_PWREx_EnableOverDrive+0x9c>)
- 8007154:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
- 8007158:	6013      	str	r3, [r2, #0]
-
-  /* Get tick */
-  tickstart = HAL_GetTick();
- 800715a:	f7fd f9c9 	bl	80044f0 <HAL_GetTick>
- 800715e:	6078      	str	r0, [r7, #4]
-
-  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
- 8007160:	e009      	b.n	8007176 <HAL_PWREx_EnableOverDrive+0x4a>
-  {
-    if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
- 8007162:	f7fd f9c5 	bl	80044f0 <HAL_GetTick>
- 8007166:	4602      	mov	r2, r0
- 8007168:	687b      	ldr	r3, [r7, #4]
- 800716a:	1ad3      	subs	r3, r2, r3
- 800716c:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
- 8007170:	d901      	bls.n	8007176 <HAL_PWREx_EnableOverDrive+0x4a>
-    {
-      return HAL_TIMEOUT;
- 8007172:	2303      	movs	r3, #3
- 8007174:	e022      	b.n	80071bc <HAL_PWREx_EnableOverDrive+0x90>
-  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
- 8007176:	4b14      	ldr	r3, [pc, #80]	; (80071c8 <HAL_PWREx_EnableOverDrive+0x9c>)
- 8007178:	685b      	ldr	r3, [r3, #4]
- 800717a:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
- 800717e:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
- 8007182:	d1ee      	bne.n	8007162 <HAL_PWREx_EnableOverDrive+0x36>
-    }
-  }
-  
-  /* Enable the Over-drive switch */
-  __HAL_PWR_OVERDRIVESWITCHING_ENABLE();
- 8007184:	4b10      	ldr	r3, [pc, #64]	; (80071c8 <HAL_PWREx_EnableOverDrive+0x9c>)
- 8007186:	681b      	ldr	r3, [r3, #0]
- 8007188:	4a0f      	ldr	r2, [pc, #60]	; (80071c8 <HAL_PWREx_EnableOverDrive+0x9c>)
- 800718a:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
- 800718e:	6013      	str	r3, [r2, #0]
-
-  /* Get tick */
-  tickstart = HAL_GetTick();
- 8007190:	f7fd f9ae 	bl	80044f0 <HAL_GetTick>
- 8007194:	6078      	str	r0, [r7, #4]
-
-  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
- 8007196:	e009      	b.n	80071ac <HAL_PWREx_EnableOverDrive+0x80>
-  {
-    if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
- 8007198:	f7fd f9aa 	bl	80044f0 <HAL_GetTick>
- 800719c:	4602      	mov	r2, r0
- 800719e:	687b      	ldr	r3, [r7, #4]
- 80071a0:	1ad3      	subs	r3, r2, r3
- 80071a2:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
- 80071a6:	d901      	bls.n	80071ac <HAL_PWREx_EnableOverDrive+0x80>
-    {
-      return HAL_TIMEOUT;
- 80071a8:	2303      	movs	r3, #3
- 80071aa:	e007      	b.n	80071bc <HAL_PWREx_EnableOverDrive+0x90>
-  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
- 80071ac:	4b06      	ldr	r3, [pc, #24]	; (80071c8 <HAL_PWREx_EnableOverDrive+0x9c>)
- 80071ae:	685b      	ldr	r3, [r3, #4]
- 80071b0:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
- 80071b4:	f5b3 3f00 	cmp.w	r3, #131072	; 0x20000
- 80071b8:	d1ee      	bne.n	8007198 <HAL_PWREx_EnableOverDrive+0x6c>
-    }
-  } 
-  return HAL_OK;
- 80071ba:	2300      	movs	r3, #0
-}
- 80071bc:	4618      	mov	r0, r3
- 80071be:	3708      	adds	r7, #8
- 80071c0:	46bd      	mov	sp, r7
- 80071c2:	bd80      	pop	{r7, pc}
- 80071c4:	40023800 	.word	0x40023800
- 80071c8:	40007000 	.word	0x40007000
-
-080071cc <HAL_RCC_OscConfig>:
-  *         supported by this function. User should request a transition to HSE Off
-  *         first and then HSE On or HSE Bypass.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
-{
- 80071cc:	b580      	push	{r7, lr}
- 80071ce:	b086      	sub	sp, #24
- 80071d0:	af00      	add	r7, sp, #0
- 80071d2:	6078      	str	r0, [r7, #4]
-  uint32_t tickstart;
-  uint32_t pll_config;
-  FlagStatus pwrclkchanged = RESET;
- 80071d4:	2300      	movs	r3, #0
- 80071d6:	75fb      	strb	r3, [r7, #23]
-
-  /* Check Null pointer */
-  if (RCC_OscInitStruct == NULL)
- 80071d8:	687b      	ldr	r3, [r7, #4]
- 80071da:	2b00      	cmp	r3, #0
- 80071dc:	d101      	bne.n	80071e2 <HAL_RCC_OscConfig+0x16>
-  {
-    return HAL_ERROR;
- 80071de:	2301      	movs	r3, #1
- 80071e0:	e291      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-
-  /* Check the parameters */
-  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
-
-  /*------------------------------- HSE Configuration ------------------------*/
-  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
- 80071e2:	687b      	ldr	r3, [r7, #4]
- 80071e4:	681b      	ldr	r3, [r3, #0]
- 80071e6:	f003 0301 	and.w	r3, r3, #1
- 80071ea:	2b00      	cmp	r3, #0
- 80071ec:	f000 8087 	beq.w	80072fe <HAL_RCC_OscConfig+0x132>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
-    /* When the HSE is used as system clock or clock source for PLL, It can not be disabled */
-    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
- 80071f0:	4b96      	ldr	r3, [pc, #600]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 80071f2:	689b      	ldr	r3, [r3, #8]
- 80071f4:	f003 030c 	and.w	r3, r3, #12
- 80071f8:	2b04      	cmp	r3, #4
- 80071fa:	d00c      	beq.n	8007216 <HAL_RCC_OscConfig+0x4a>
-        || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
- 80071fc:	4b93      	ldr	r3, [pc, #588]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 80071fe:	689b      	ldr	r3, [r3, #8]
- 8007200:	f003 030c 	and.w	r3, r3, #12
- 8007204:	2b08      	cmp	r3, #8
- 8007206:	d112      	bne.n	800722e <HAL_RCC_OscConfig+0x62>
- 8007208:	4b90      	ldr	r3, [pc, #576]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800720a:	685b      	ldr	r3, [r3, #4]
- 800720c:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
- 8007210:	f5b3 0f80 	cmp.w	r3, #4194304	; 0x400000
- 8007214:	d10b      	bne.n	800722e <HAL_RCC_OscConfig+0x62>
-    {
-      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 8007216:	4b8d      	ldr	r3, [pc, #564]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007218:	681b      	ldr	r3, [r3, #0]
- 800721a:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
- 800721e:	2b00      	cmp	r3, #0
- 8007220:	d06c      	beq.n	80072fc <HAL_RCC_OscConfig+0x130>
- 8007222:	687b      	ldr	r3, [r7, #4]
- 8007224:	685b      	ldr	r3, [r3, #4]
- 8007226:	2b00      	cmp	r3, #0
- 8007228:	d168      	bne.n	80072fc <HAL_RCC_OscConfig+0x130>
-      {
-        return HAL_ERROR;
- 800722a:	2301      	movs	r3, #1
- 800722c:	e26b      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-      }
-    }
-    else
-    {
-      /* Set the new HSE configuration ---------------------------------------*/
-      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
- 800722e:	687b      	ldr	r3, [r7, #4]
- 8007230:	685b      	ldr	r3, [r3, #4]
- 8007232:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
- 8007236:	d106      	bne.n	8007246 <HAL_RCC_OscConfig+0x7a>
- 8007238:	4b84      	ldr	r3, [pc, #528]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800723a:	681b      	ldr	r3, [r3, #0]
- 800723c:	4a83      	ldr	r2, [pc, #524]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800723e:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
- 8007242:	6013      	str	r3, [r2, #0]
- 8007244:	e02e      	b.n	80072a4 <HAL_RCC_OscConfig+0xd8>
- 8007246:	687b      	ldr	r3, [r7, #4]
- 8007248:	685b      	ldr	r3, [r3, #4]
- 800724a:	2b00      	cmp	r3, #0
- 800724c:	d10c      	bne.n	8007268 <HAL_RCC_OscConfig+0x9c>
- 800724e:	4b7f      	ldr	r3, [pc, #508]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007250:	681b      	ldr	r3, [r3, #0]
- 8007252:	4a7e      	ldr	r2, [pc, #504]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007254:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
- 8007258:	6013      	str	r3, [r2, #0]
- 800725a:	4b7c      	ldr	r3, [pc, #496]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800725c:	681b      	ldr	r3, [r3, #0]
- 800725e:	4a7b      	ldr	r2, [pc, #492]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007260:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
- 8007264:	6013      	str	r3, [r2, #0]
- 8007266:	e01d      	b.n	80072a4 <HAL_RCC_OscConfig+0xd8>
- 8007268:	687b      	ldr	r3, [r7, #4]
- 800726a:	685b      	ldr	r3, [r3, #4]
- 800726c:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
- 8007270:	d10c      	bne.n	800728c <HAL_RCC_OscConfig+0xc0>
- 8007272:	4b76      	ldr	r3, [pc, #472]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007274:	681b      	ldr	r3, [r3, #0]
- 8007276:	4a75      	ldr	r2, [pc, #468]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007278:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
- 800727c:	6013      	str	r3, [r2, #0]
- 800727e:	4b73      	ldr	r3, [pc, #460]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007280:	681b      	ldr	r3, [r3, #0]
- 8007282:	4a72      	ldr	r2, [pc, #456]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007284:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
- 8007288:	6013      	str	r3, [r2, #0]
- 800728a:	e00b      	b.n	80072a4 <HAL_RCC_OscConfig+0xd8>
- 800728c:	4b6f      	ldr	r3, [pc, #444]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800728e:	681b      	ldr	r3, [r3, #0]
- 8007290:	4a6e      	ldr	r2, [pc, #440]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007292:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
- 8007296:	6013      	str	r3, [r2, #0]
- 8007298:	4b6c      	ldr	r3, [pc, #432]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800729a:	681b      	ldr	r3, [r3, #0]
- 800729c:	4a6b      	ldr	r2, [pc, #428]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800729e:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
- 80072a2:	6013      	str	r3, [r2, #0]
-
-      /* Check the HSE State */
-      if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
- 80072a4:	687b      	ldr	r3, [r7, #4]
- 80072a6:	685b      	ldr	r3, [r3, #4]
- 80072a8:	2b00      	cmp	r3, #0
- 80072aa:	d013      	beq.n	80072d4 <HAL_RCC_OscConfig+0x108>
-      {
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
- 80072ac:	f7fd f920 	bl	80044f0 <HAL_GetTick>
- 80072b0:	6138      	str	r0, [r7, #16]
-
-        /* Wait till HSE is ready */
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 80072b2:	e008      	b.n	80072c6 <HAL_RCC_OscConfig+0xfa>
-        {
-          if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
- 80072b4:	f7fd f91c 	bl	80044f0 <HAL_GetTick>
- 80072b8:	4602      	mov	r2, r0
- 80072ba:	693b      	ldr	r3, [r7, #16]
- 80072bc:	1ad3      	subs	r3, r2, r3
- 80072be:	2b64      	cmp	r3, #100	; 0x64
- 80072c0:	d901      	bls.n	80072c6 <HAL_RCC_OscConfig+0xfa>
-          {
-            return HAL_TIMEOUT;
- 80072c2:	2303      	movs	r3, #3
- 80072c4:	e21f      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 80072c6:	4b61      	ldr	r3, [pc, #388]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 80072c8:	681b      	ldr	r3, [r3, #0]
- 80072ca:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
- 80072ce:	2b00      	cmp	r3, #0
- 80072d0:	d0f0      	beq.n	80072b4 <HAL_RCC_OscConfig+0xe8>
- 80072d2:	e014      	b.n	80072fe <HAL_RCC_OscConfig+0x132>
-        }
-      }
-      else
-      {
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
- 80072d4:	f7fd f90c 	bl	80044f0 <HAL_GetTick>
- 80072d8:	6138      	str	r0, [r7, #16]
-
-        /* Wait till HSE is bypassed or disabled */
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- 80072da:	e008      	b.n	80072ee <HAL_RCC_OscConfig+0x122>
-        {
-          if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
- 80072dc:	f7fd f908 	bl	80044f0 <HAL_GetTick>
- 80072e0:	4602      	mov	r2, r0
- 80072e2:	693b      	ldr	r3, [r7, #16]
- 80072e4:	1ad3      	subs	r3, r2, r3
- 80072e6:	2b64      	cmp	r3, #100	; 0x64
- 80072e8:	d901      	bls.n	80072ee <HAL_RCC_OscConfig+0x122>
-          {
-            return HAL_TIMEOUT;
- 80072ea:	2303      	movs	r3, #3
- 80072ec:	e20b      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- 80072ee:	4b57      	ldr	r3, [pc, #348]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 80072f0:	681b      	ldr	r3, [r3, #0]
- 80072f2:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
- 80072f6:	2b00      	cmp	r3, #0
- 80072f8:	d1f0      	bne.n	80072dc <HAL_RCC_OscConfig+0x110>
- 80072fa:	e000      	b.n	80072fe <HAL_RCC_OscConfig+0x132>
-      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 80072fc:	bf00      	nop
-        }
-      }
-    }
-  }
-  /*----------------------------- HSI Configuration --------------------------*/
-  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
- 80072fe:	687b      	ldr	r3, [r7, #4]
- 8007300:	681b      	ldr	r3, [r3, #0]
- 8007302:	f003 0302 	and.w	r3, r3, #2
- 8007306:	2b00      	cmp	r3, #0
- 8007308:	d069      	beq.n	80073de <HAL_RCC_OscConfig+0x212>
-    /* Check the parameters */
-    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
-    assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
-
-    /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
-    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
- 800730a:	4b50      	ldr	r3, [pc, #320]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800730c:	689b      	ldr	r3, [r3, #8]
- 800730e:	f003 030c 	and.w	r3, r3, #12
- 8007312:	2b00      	cmp	r3, #0
- 8007314:	d00b      	beq.n	800732e <HAL_RCC_OscConfig+0x162>
-        || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
- 8007316:	4b4d      	ldr	r3, [pc, #308]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007318:	689b      	ldr	r3, [r3, #8]
- 800731a:	f003 030c 	and.w	r3, r3, #12
- 800731e:	2b08      	cmp	r3, #8
- 8007320:	d11c      	bne.n	800735c <HAL_RCC_OscConfig+0x190>
- 8007322:	4b4a      	ldr	r3, [pc, #296]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007324:	685b      	ldr	r3, [r3, #4]
- 8007326:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
- 800732a:	2b00      	cmp	r3, #0
- 800732c:	d116      	bne.n	800735c <HAL_RCC_OscConfig+0x190>
-    {
-      /* When HSI is used as system clock it will not disabled */
-      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 800732e:	4b47      	ldr	r3, [pc, #284]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007330:	681b      	ldr	r3, [r3, #0]
- 8007332:	f003 0302 	and.w	r3, r3, #2
- 8007336:	2b00      	cmp	r3, #0
- 8007338:	d005      	beq.n	8007346 <HAL_RCC_OscConfig+0x17a>
- 800733a:	687b      	ldr	r3, [r7, #4]
- 800733c:	68db      	ldr	r3, [r3, #12]
- 800733e:	2b01      	cmp	r3, #1
- 8007340:	d001      	beq.n	8007346 <HAL_RCC_OscConfig+0x17a>
-      {
-        return HAL_ERROR;
- 8007342:	2301      	movs	r3, #1
- 8007344:	e1df      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-      }
-      /* Otherwise, just the calibration is allowed */
-      else
-      {
-        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
-        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 8007346:	4b41      	ldr	r3, [pc, #260]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007348:	681b      	ldr	r3, [r3, #0]
- 800734a:	f023 02f8 	bic.w	r2, r3, #248	; 0xf8
- 800734e:	687b      	ldr	r3, [r7, #4]
- 8007350:	691b      	ldr	r3, [r3, #16]
- 8007352:	00db      	lsls	r3, r3, #3
- 8007354:	493d      	ldr	r1, [pc, #244]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007356:	4313      	orrs	r3, r2
- 8007358:	600b      	str	r3, [r1, #0]
-      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 800735a:	e040      	b.n	80073de <HAL_RCC_OscConfig+0x212>
-      }
-    }
-    else
-    {
-      /* Check the HSI State */
-      if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
- 800735c:	687b      	ldr	r3, [r7, #4]
- 800735e:	68db      	ldr	r3, [r3, #12]
- 8007360:	2b00      	cmp	r3, #0
- 8007362:	d023      	beq.n	80073ac <HAL_RCC_OscConfig+0x1e0>
-      {
-        /* Enable the Internal High Speed oscillator (HSI). */
-        __HAL_RCC_HSI_ENABLE();
- 8007364:	4b39      	ldr	r3, [pc, #228]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007366:	681b      	ldr	r3, [r3, #0]
- 8007368:	4a38      	ldr	r2, [pc, #224]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800736a:	f043 0301 	orr.w	r3, r3, #1
- 800736e:	6013      	str	r3, [r2, #0]
-
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
- 8007370:	f7fd f8be 	bl	80044f0 <HAL_GetTick>
- 8007374:	6138      	str	r0, [r7, #16]
-
-        /* Wait till HSI is ready */
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 8007376:	e008      	b.n	800738a <HAL_RCC_OscConfig+0x1be>
-        {
-          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
- 8007378:	f7fd f8ba 	bl	80044f0 <HAL_GetTick>
- 800737c:	4602      	mov	r2, r0
- 800737e:	693b      	ldr	r3, [r7, #16]
- 8007380:	1ad3      	subs	r3, r2, r3
- 8007382:	2b02      	cmp	r3, #2
- 8007384:	d901      	bls.n	800738a <HAL_RCC_OscConfig+0x1be>
-          {
-            return HAL_TIMEOUT;
- 8007386:	2303      	movs	r3, #3
- 8007388:	e1bd      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 800738a:	4b30      	ldr	r3, [pc, #192]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800738c:	681b      	ldr	r3, [r3, #0]
- 800738e:	f003 0302 	and.w	r3, r3, #2
- 8007392:	2b00      	cmp	r3, #0
- 8007394:	d0f0      	beq.n	8007378 <HAL_RCC_OscConfig+0x1ac>
-          }
-        }
-
-        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
-        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 8007396:	4b2d      	ldr	r3, [pc, #180]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007398:	681b      	ldr	r3, [r3, #0]
- 800739a:	f023 02f8 	bic.w	r2, r3, #248	; 0xf8
- 800739e:	687b      	ldr	r3, [r7, #4]
- 80073a0:	691b      	ldr	r3, [r3, #16]
- 80073a2:	00db      	lsls	r3, r3, #3
- 80073a4:	4929      	ldr	r1, [pc, #164]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 80073a6:	4313      	orrs	r3, r2
- 80073a8:	600b      	str	r3, [r1, #0]
- 80073aa:	e018      	b.n	80073de <HAL_RCC_OscConfig+0x212>
-      }
-      else
-      {
-        /* Disable the Internal High Speed oscillator (HSI). */
-        __HAL_RCC_HSI_DISABLE();
- 80073ac:	4b27      	ldr	r3, [pc, #156]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 80073ae:	681b      	ldr	r3, [r3, #0]
- 80073b0:	4a26      	ldr	r2, [pc, #152]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 80073b2:	f023 0301 	bic.w	r3, r3, #1
- 80073b6:	6013      	str	r3, [r2, #0]
-
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
- 80073b8:	f7fd f89a 	bl	80044f0 <HAL_GetTick>
- 80073bc:	6138      	str	r0, [r7, #16]
-
-        /* Wait till HSI is ready */
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- 80073be:	e008      	b.n	80073d2 <HAL_RCC_OscConfig+0x206>
-        {
-          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
- 80073c0:	f7fd f896 	bl	80044f0 <HAL_GetTick>
- 80073c4:	4602      	mov	r2, r0
- 80073c6:	693b      	ldr	r3, [r7, #16]
- 80073c8:	1ad3      	subs	r3, r2, r3
- 80073ca:	2b02      	cmp	r3, #2
- 80073cc:	d901      	bls.n	80073d2 <HAL_RCC_OscConfig+0x206>
-          {
-            return HAL_TIMEOUT;
- 80073ce:	2303      	movs	r3, #3
- 80073d0:	e199      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- 80073d2:	4b1e      	ldr	r3, [pc, #120]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 80073d4:	681b      	ldr	r3, [r3, #0]
- 80073d6:	f003 0302 	and.w	r3, r3, #2
- 80073da:	2b00      	cmp	r3, #0
- 80073dc:	d1f0      	bne.n	80073c0 <HAL_RCC_OscConfig+0x1f4>
-        }
-      }
-    }
-  }
-  /*------------------------------ LSI Configuration -------------------------*/
-  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
- 80073de:	687b      	ldr	r3, [r7, #4]
- 80073e0:	681b      	ldr	r3, [r3, #0]
- 80073e2:	f003 0308 	and.w	r3, r3, #8
- 80073e6:	2b00      	cmp	r3, #0
- 80073e8:	d038      	beq.n	800745c <HAL_RCC_OscConfig+0x290>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
-
-    /* Check the LSI State */
-    if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
- 80073ea:	687b      	ldr	r3, [r7, #4]
- 80073ec:	695b      	ldr	r3, [r3, #20]
- 80073ee:	2b00      	cmp	r3, #0
- 80073f0:	d019      	beq.n	8007426 <HAL_RCC_OscConfig+0x25a>
-    {
-      /* Enable the Internal Low Speed oscillator (LSI). */
-      __HAL_RCC_LSI_ENABLE();
- 80073f2:	4b16      	ldr	r3, [pc, #88]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 80073f4:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 80073f6:	4a15      	ldr	r2, [pc, #84]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 80073f8:	f043 0301 	orr.w	r3, r3, #1
- 80073fc:	6753      	str	r3, [r2, #116]	; 0x74
-
-      /* Get Start Tick*/
-      tickstart = HAL_GetTick();
- 80073fe:	f7fd f877 	bl	80044f0 <HAL_GetTick>
- 8007402:	6138      	str	r0, [r7, #16]
-
-      /* Wait till LSI is ready */
-      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- 8007404:	e008      	b.n	8007418 <HAL_RCC_OscConfig+0x24c>
-      {
-        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
- 8007406:	f7fd f873 	bl	80044f0 <HAL_GetTick>
- 800740a:	4602      	mov	r2, r0
- 800740c:	693b      	ldr	r3, [r7, #16]
- 800740e:	1ad3      	subs	r3, r2, r3
- 8007410:	2b02      	cmp	r3, #2
- 8007412:	d901      	bls.n	8007418 <HAL_RCC_OscConfig+0x24c>
-        {
-          return HAL_TIMEOUT;
- 8007414:	2303      	movs	r3, #3
- 8007416:	e176      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- 8007418:	4b0c      	ldr	r3, [pc, #48]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800741a:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 800741c:	f003 0302 	and.w	r3, r3, #2
- 8007420:	2b00      	cmp	r3, #0
- 8007422:	d0f0      	beq.n	8007406 <HAL_RCC_OscConfig+0x23a>
- 8007424:	e01a      	b.n	800745c <HAL_RCC_OscConfig+0x290>
-      }
-    }
-    else
-    {
-      /* Disable the Internal Low Speed oscillator (LSI). */
-      __HAL_RCC_LSI_DISABLE();
- 8007426:	4b09      	ldr	r3, [pc, #36]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 8007428:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 800742a:	4a08      	ldr	r2, [pc, #32]	; (800744c <HAL_RCC_OscConfig+0x280>)
- 800742c:	f023 0301 	bic.w	r3, r3, #1
- 8007430:	6753      	str	r3, [r2, #116]	; 0x74
-
-      /* Get Start Tick*/
-      tickstart = HAL_GetTick();
- 8007432:	f7fd f85d 	bl	80044f0 <HAL_GetTick>
- 8007436:	6138      	str	r0, [r7, #16]
-
-      /* Wait till LSI is ready */
-      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- 8007438:	e00a      	b.n	8007450 <HAL_RCC_OscConfig+0x284>
-      {
-        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
- 800743a:	f7fd f859 	bl	80044f0 <HAL_GetTick>
- 800743e:	4602      	mov	r2, r0
- 8007440:	693b      	ldr	r3, [r7, #16]
- 8007442:	1ad3      	subs	r3, r2, r3
- 8007444:	2b02      	cmp	r3, #2
- 8007446:	d903      	bls.n	8007450 <HAL_RCC_OscConfig+0x284>
-        {
-          return HAL_TIMEOUT;
- 8007448:	2303      	movs	r3, #3
- 800744a:	e15c      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
- 800744c:	40023800 	.word	0x40023800
-      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- 8007450:	4b91      	ldr	r3, [pc, #580]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007452:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 8007454:	f003 0302 	and.w	r3, r3, #2
- 8007458:	2b00      	cmp	r3, #0
- 800745a:	d1ee      	bne.n	800743a <HAL_RCC_OscConfig+0x26e>
-        }
-      }
-    }
-  }
-  /*------------------------------ LSE Configuration -------------------------*/
-  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
- 800745c:	687b      	ldr	r3, [r7, #4]
- 800745e:	681b      	ldr	r3, [r3, #0]
- 8007460:	f003 0304 	and.w	r3, r3, #4
- 8007464:	2b00      	cmp	r3, #0
- 8007466:	f000 80a4 	beq.w	80075b2 <HAL_RCC_OscConfig+0x3e6>
-    /* Check the parameters */
-    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
-
-    /* Update LSE configuration in Backup Domain control register    */
-    /* Requires to enable write access to Backup Domain of necessary */
-    if (__HAL_RCC_PWR_IS_CLK_DISABLED())
- 800746a:	4b8b      	ldr	r3, [pc, #556]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 800746c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 800746e:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
- 8007472:	2b00      	cmp	r3, #0
- 8007474:	d10d      	bne.n	8007492 <HAL_RCC_OscConfig+0x2c6>
-    {
-      /* Enable Power Clock*/
-      __HAL_RCC_PWR_CLK_ENABLE();
- 8007476:	4b88      	ldr	r3, [pc, #544]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007478:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 800747a:	4a87      	ldr	r2, [pc, #540]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 800747c:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
- 8007480:	6413      	str	r3, [r2, #64]	; 0x40
- 8007482:	4b85      	ldr	r3, [pc, #532]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007484:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8007486:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
- 800748a:	60bb      	str	r3, [r7, #8]
- 800748c:	68bb      	ldr	r3, [r7, #8]
-      pwrclkchanged = SET;
- 800748e:	2301      	movs	r3, #1
- 8007490:	75fb      	strb	r3, [r7, #23]
-    }
-
-    if (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 8007492:	4b82      	ldr	r3, [pc, #520]	; (800769c <HAL_RCC_OscConfig+0x4d0>)
- 8007494:	681b      	ldr	r3, [r3, #0]
- 8007496:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 800749a:	2b00      	cmp	r3, #0
- 800749c:	d118      	bne.n	80074d0 <HAL_RCC_OscConfig+0x304>
-    {
-      /* Enable write access to Backup domain */
-      PWR->CR1 |= PWR_CR1_DBP;
- 800749e:	4b7f      	ldr	r3, [pc, #508]	; (800769c <HAL_RCC_OscConfig+0x4d0>)
- 80074a0:	681b      	ldr	r3, [r3, #0]
- 80074a2:	4a7e      	ldr	r2, [pc, #504]	; (800769c <HAL_RCC_OscConfig+0x4d0>)
- 80074a4:	f443 7380 	orr.w	r3, r3, #256	; 0x100
- 80074a8:	6013      	str	r3, [r2, #0]
-
-      /* Wait for Backup domain Write protection disable */
-      tickstart = HAL_GetTick();
- 80074aa:	f7fd f821 	bl	80044f0 <HAL_GetTick>
- 80074ae:	6138      	str	r0, [r7, #16]
-
-      while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 80074b0:	e008      	b.n	80074c4 <HAL_RCC_OscConfig+0x2f8>
-      {
-        if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- 80074b2:	f7fd f81d 	bl	80044f0 <HAL_GetTick>
- 80074b6:	4602      	mov	r2, r0
- 80074b8:	693b      	ldr	r3, [r7, #16]
- 80074ba:	1ad3      	subs	r3, r2, r3
- 80074bc:	2b64      	cmp	r3, #100	; 0x64
- 80074be:	d901      	bls.n	80074c4 <HAL_RCC_OscConfig+0x2f8>
-        {
-          return HAL_TIMEOUT;
- 80074c0:	2303      	movs	r3, #3
- 80074c2:	e120      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-      while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
- 80074c4:	4b75      	ldr	r3, [pc, #468]	; (800769c <HAL_RCC_OscConfig+0x4d0>)
- 80074c6:	681b      	ldr	r3, [r3, #0]
- 80074c8:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 80074cc:	2b00      	cmp	r3, #0
- 80074ce:	d0f0      	beq.n	80074b2 <HAL_RCC_OscConfig+0x2e6>
-        }
-      }
-    }
-
-    /* Set the new LSE configuration -----------------------------------------*/
-    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
- 80074d0:	687b      	ldr	r3, [r7, #4]
- 80074d2:	689b      	ldr	r3, [r3, #8]
- 80074d4:	2b01      	cmp	r3, #1
- 80074d6:	d106      	bne.n	80074e6 <HAL_RCC_OscConfig+0x31a>
- 80074d8:	4b6f      	ldr	r3, [pc, #444]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 80074da:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 80074dc:	4a6e      	ldr	r2, [pc, #440]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 80074de:	f043 0301 	orr.w	r3, r3, #1
- 80074e2:	6713      	str	r3, [r2, #112]	; 0x70
- 80074e4:	e02d      	b.n	8007542 <HAL_RCC_OscConfig+0x376>
- 80074e6:	687b      	ldr	r3, [r7, #4]
- 80074e8:	689b      	ldr	r3, [r3, #8]
- 80074ea:	2b00      	cmp	r3, #0
- 80074ec:	d10c      	bne.n	8007508 <HAL_RCC_OscConfig+0x33c>
- 80074ee:	4b6a      	ldr	r3, [pc, #424]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 80074f0:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 80074f2:	4a69      	ldr	r2, [pc, #420]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 80074f4:	f023 0301 	bic.w	r3, r3, #1
- 80074f8:	6713      	str	r3, [r2, #112]	; 0x70
- 80074fa:	4b67      	ldr	r3, [pc, #412]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 80074fc:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 80074fe:	4a66      	ldr	r2, [pc, #408]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007500:	f023 0304 	bic.w	r3, r3, #4
- 8007504:	6713      	str	r3, [r2, #112]	; 0x70
- 8007506:	e01c      	b.n	8007542 <HAL_RCC_OscConfig+0x376>
- 8007508:	687b      	ldr	r3, [r7, #4]
- 800750a:	689b      	ldr	r3, [r3, #8]
- 800750c:	2b05      	cmp	r3, #5
- 800750e:	d10c      	bne.n	800752a <HAL_RCC_OscConfig+0x35e>
- 8007510:	4b61      	ldr	r3, [pc, #388]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007512:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 8007514:	4a60      	ldr	r2, [pc, #384]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007516:	f043 0304 	orr.w	r3, r3, #4
- 800751a:	6713      	str	r3, [r2, #112]	; 0x70
- 800751c:	4b5e      	ldr	r3, [pc, #376]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 800751e:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 8007520:	4a5d      	ldr	r2, [pc, #372]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007522:	f043 0301 	orr.w	r3, r3, #1
- 8007526:	6713      	str	r3, [r2, #112]	; 0x70
- 8007528:	e00b      	b.n	8007542 <HAL_RCC_OscConfig+0x376>
- 800752a:	4b5b      	ldr	r3, [pc, #364]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 800752c:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 800752e:	4a5a      	ldr	r2, [pc, #360]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007530:	f023 0301 	bic.w	r3, r3, #1
- 8007534:	6713      	str	r3, [r2, #112]	; 0x70
- 8007536:	4b58      	ldr	r3, [pc, #352]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007538:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 800753a:	4a57      	ldr	r2, [pc, #348]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 800753c:	f023 0304 	bic.w	r3, r3, #4
- 8007540:	6713      	str	r3, [r2, #112]	; 0x70
-    /* Check the LSE State */
-    if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
- 8007542:	687b      	ldr	r3, [r7, #4]
- 8007544:	689b      	ldr	r3, [r3, #8]
- 8007546:	2b00      	cmp	r3, #0
- 8007548:	d015      	beq.n	8007576 <HAL_RCC_OscConfig+0x3aa>
-    {
-      /* Get Start Tick*/
-      tickstart = HAL_GetTick();
- 800754a:	f7fc ffd1 	bl	80044f0 <HAL_GetTick>
- 800754e:	6138      	str	r0, [r7, #16]
-
-      /* Wait till LSE is ready */
-      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8007550:	e00a      	b.n	8007568 <HAL_RCC_OscConfig+0x39c>
-      {
-        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
- 8007552:	f7fc ffcd 	bl	80044f0 <HAL_GetTick>
- 8007556:	4602      	mov	r2, r0
- 8007558:	693b      	ldr	r3, [r7, #16]
- 800755a:	1ad3      	subs	r3, r2, r3
- 800755c:	f241 3288 	movw	r2, #5000	; 0x1388
- 8007560:	4293      	cmp	r3, r2
- 8007562:	d901      	bls.n	8007568 <HAL_RCC_OscConfig+0x39c>
-        {
-          return HAL_TIMEOUT;
- 8007564:	2303      	movs	r3, #3
- 8007566:	e0ce      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8007568:	4b4b      	ldr	r3, [pc, #300]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 800756a:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 800756c:	f003 0302 	and.w	r3, r3, #2
- 8007570:	2b00      	cmp	r3, #0
- 8007572:	d0ee      	beq.n	8007552 <HAL_RCC_OscConfig+0x386>
- 8007574:	e014      	b.n	80075a0 <HAL_RCC_OscConfig+0x3d4>
-      }
-    }
-    else
-    {
-      /* Get Start Tick*/
-      tickstart = HAL_GetTick();
- 8007576:	f7fc ffbb 	bl	80044f0 <HAL_GetTick>
- 800757a:	6138      	str	r0, [r7, #16]
-
-      /* Wait till LSE is ready */
-      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- 800757c:	e00a      	b.n	8007594 <HAL_RCC_OscConfig+0x3c8>
-      {
-        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
- 800757e:	f7fc ffb7 	bl	80044f0 <HAL_GetTick>
- 8007582:	4602      	mov	r2, r0
- 8007584:	693b      	ldr	r3, [r7, #16]
- 8007586:	1ad3      	subs	r3, r2, r3
- 8007588:	f241 3288 	movw	r2, #5000	; 0x1388
- 800758c:	4293      	cmp	r3, r2
- 800758e:	d901      	bls.n	8007594 <HAL_RCC_OscConfig+0x3c8>
-        {
-          return HAL_TIMEOUT;
- 8007590:	2303      	movs	r3, #3
- 8007592:	e0b8      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- 8007594:	4b40      	ldr	r3, [pc, #256]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007596:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 8007598:	f003 0302 	and.w	r3, r3, #2
- 800759c:	2b00      	cmp	r3, #0
- 800759e:	d1ee      	bne.n	800757e <HAL_RCC_OscConfig+0x3b2>
-        }
-      }
-    }
-
-    /* Restore clock configuration if changed */
-    if (pwrclkchanged == SET)
- 80075a0:	7dfb      	ldrb	r3, [r7, #23]
- 80075a2:	2b01      	cmp	r3, #1
- 80075a4:	d105      	bne.n	80075b2 <HAL_RCC_OscConfig+0x3e6>
-    {
-      __HAL_RCC_PWR_CLK_DISABLE();
- 80075a6:	4b3c      	ldr	r3, [pc, #240]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 80075a8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 80075aa:	4a3b      	ldr	r2, [pc, #236]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 80075ac:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
- 80075b0:	6413      	str	r3, [r2, #64]	; 0x40
-    }
-  }
-  /*-------------------------------- PLL Configuration -----------------------*/
-  /* Check the parameters */
-  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
-  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
- 80075b2:	687b      	ldr	r3, [r7, #4]
- 80075b4:	699b      	ldr	r3, [r3, #24]
- 80075b6:	2b00      	cmp	r3, #0
- 80075b8:	f000 80a4 	beq.w	8007704 <HAL_RCC_OscConfig+0x538>
-  {
-    /* Check if the PLL is used as system clock or not */
-    if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 80075bc:	4b36      	ldr	r3, [pc, #216]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 80075be:	689b      	ldr	r3, [r3, #8]
- 80075c0:	f003 030c 	and.w	r3, r3, #12
- 80075c4:	2b08      	cmp	r3, #8
- 80075c6:	d06b      	beq.n	80076a0 <HAL_RCC_OscConfig+0x4d4>
-    {
-      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
- 80075c8:	687b      	ldr	r3, [r7, #4]
- 80075ca:	699b      	ldr	r3, [r3, #24]
- 80075cc:	2b02      	cmp	r3, #2
- 80075ce:	d149      	bne.n	8007664 <HAL_RCC_OscConfig+0x498>
-#if defined (RCC_PLLCFGR_PLLR)
-        assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
-#endif
-
-        /* Disable the main PLL. */
-        __HAL_RCC_PLL_DISABLE();
- 80075d0:	4b31      	ldr	r3, [pc, #196]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 80075d2:	681b      	ldr	r3, [r3, #0]
- 80075d4:	4a30      	ldr	r2, [pc, #192]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 80075d6:	f023 7380 	bic.w	r3, r3, #16777216	; 0x1000000
- 80075da:	6013      	str	r3, [r2, #0]
-
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
- 80075dc:	f7fc ff88 	bl	80044f0 <HAL_GetTick>
- 80075e0:	6138      	str	r0, [r7, #16]
-
-        /* Wait till PLL is ready */
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 80075e2:	e008      	b.n	80075f6 <HAL_RCC_OscConfig+0x42a>
-        {
-          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
- 80075e4:	f7fc ff84 	bl	80044f0 <HAL_GetTick>
- 80075e8:	4602      	mov	r2, r0
- 80075ea:	693b      	ldr	r3, [r7, #16]
- 80075ec:	1ad3      	subs	r3, r2, r3
- 80075ee:	2b02      	cmp	r3, #2
- 80075f0:	d901      	bls.n	80075f6 <HAL_RCC_OscConfig+0x42a>
-          {
-            return HAL_TIMEOUT;
- 80075f2:	2303      	movs	r3, #3
- 80075f4:	e087      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 80075f6:	4b28      	ldr	r3, [pc, #160]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 80075f8:	681b      	ldr	r3, [r3, #0]
- 80075fa:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
- 80075fe:	2b00      	cmp	r3, #0
- 8007600:	d1f0      	bne.n	80075e4 <HAL_RCC_OscConfig+0x418>
-                             RCC_OscInitStruct->PLL.PLLN,
-                             RCC_OscInitStruct->PLL.PLLP,
-                             RCC_OscInitStruct->PLL.PLLQ,
-                             RCC_OscInitStruct->PLL.PLLR);
-#else
-        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
- 8007602:	687b      	ldr	r3, [r7, #4]
- 8007604:	69da      	ldr	r2, [r3, #28]
- 8007606:	687b      	ldr	r3, [r7, #4]
- 8007608:	6a1b      	ldr	r3, [r3, #32]
- 800760a:	431a      	orrs	r2, r3
- 800760c:	687b      	ldr	r3, [r7, #4]
- 800760e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8007610:	019b      	lsls	r3, r3, #6
- 8007612:	431a      	orrs	r2, r3
- 8007614:	687b      	ldr	r3, [r7, #4]
- 8007616:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 8007618:	085b      	lsrs	r3, r3, #1
- 800761a:	3b01      	subs	r3, #1
- 800761c:	041b      	lsls	r3, r3, #16
- 800761e:	431a      	orrs	r2, r3
- 8007620:	687b      	ldr	r3, [r7, #4]
- 8007622:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8007624:	061b      	lsls	r3, r3, #24
- 8007626:	4313      	orrs	r3, r2
- 8007628:	4a1b      	ldr	r2, [pc, #108]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 800762a:	f043 5300 	orr.w	r3, r3, #536870912	; 0x20000000
- 800762e:	6053      	str	r3, [r2, #4]
-                             RCC_OscInitStruct->PLL.PLLP,
-                             RCC_OscInitStruct->PLL.PLLQ);
-#endif
-
-        /* Enable the main PLL. */
-        __HAL_RCC_PLL_ENABLE();
- 8007630:	4b19      	ldr	r3, [pc, #100]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007632:	681b      	ldr	r3, [r3, #0]
- 8007634:	4a18      	ldr	r2, [pc, #96]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007636:	f043 7380 	orr.w	r3, r3, #16777216	; 0x1000000
- 800763a:	6013      	str	r3, [r2, #0]
-
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
- 800763c:	f7fc ff58 	bl	80044f0 <HAL_GetTick>
- 8007640:	6138      	str	r0, [r7, #16]
-
-        /* Wait till PLL is ready */
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 8007642:	e008      	b.n	8007656 <HAL_RCC_OscConfig+0x48a>
-        {
-          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
- 8007644:	f7fc ff54 	bl	80044f0 <HAL_GetTick>
- 8007648:	4602      	mov	r2, r0
- 800764a:	693b      	ldr	r3, [r7, #16]
- 800764c:	1ad3      	subs	r3, r2, r3
- 800764e:	2b02      	cmp	r3, #2
- 8007650:	d901      	bls.n	8007656 <HAL_RCC_OscConfig+0x48a>
-          {
-            return HAL_TIMEOUT;
- 8007652:	2303      	movs	r3, #3
- 8007654:	e057      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 8007656:	4b10      	ldr	r3, [pc, #64]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007658:	681b      	ldr	r3, [r3, #0]
- 800765a:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
- 800765e:	2b00      	cmp	r3, #0
- 8007660:	d0f0      	beq.n	8007644 <HAL_RCC_OscConfig+0x478>
- 8007662:	e04f      	b.n	8007704 <HAL_RCC_OscConfig+0x538>
-        }
-      }
-      else
-      {
-        /* Disable the main PLL. */
-        __HAL_RCC_PLL_DISABLE();
- 8007664:	4b0c      	ldr	r3, [pc, #48]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 8007666:	681b      	ldr	r3, [r3, #0]
- 8007668:	4a0b      	ldr	r2, [pc, #44]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 800766a:	f023 7380 	bic.w	r3, r3, #16777216	; 0x1000000
- 800766e:	6013      	str	r3, [r2, #0]
-
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
- 8007670:	f7fc ff3e 	bl	80044f0 <HAL_GetTick>
- 8007674:	6138      	str	r0, [r7, #16]
-
-        /* Wait till PLL is ready */
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 8007676:	e008      	b.n	800768a <HAL_RCC_OscConfig+0x4be>
-        {
-          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
- 8007678:	f7fc ff3a 	bl	80044f0 <HAL_GetTick>
- 800767c:	4602      	mov	r2, r0
- 800767e:	693b      	ldr	r3, [r7, #16]
- 8007680:	1ad3      	subs	r3, r2, r3
- 8007682:	2b02      	cmp	r3, #2
- 8007684:	d901      	bls.n	800768a <HAL_RCC_OscConfig+0x4be>
-          {
-            return HAL_TIMEOUT;
- 8007686:	2303      	movs	r3, #3
- 8007688:	e03d      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- 800768a:	4b03      	ldr	r3, [pc, #12]	; (8007698 <HAL_RCC_OscConfig+0x4cc>)
- 800768c:	681b      	ldr	r3, [r3, #0]
- 800768e:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
- 8007692:	2b00      	cmp	r3, #0
- 8007694:	d1f0      	bne.n	8007678 <HAL_RCC_OscConfig+0x4ac>
- 8007696:	e035      	b.n	8007704 <HAL_RCC_OscConfig+0x538>
- 8007698:	40023800 	.word	0x40023800
- 800769c:	40007000 	.word	0x40007000
-      }
-    }
-    else
-    {
-      /* Do not return HAL_ERROR if request repeats the current configuration */
-      pll_config = RCC->PLLCFGR;
- 80076a0:	4b1b      	ldr	r3, [pc, #108]	; (8007710 <HAL_RCC_OscConfig+0x544>)
- 80076a2:	685b      	ldr	r3, [r3, #4]
- 80076a4:	60fb      	str	r3, [r7, #12]
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) ||
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((((RCC_OscInitStruct->PLL.PLLP) >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos)) ||
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) ||
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos)))
-#else
-      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
- 80076a6:	687b      	ldr	r3, [r7, #4]
- 80076a8:	699b      	ldr	r3, [r3, #24]
- 80076aa:	2b01      	cmp	r3, #1
- 80076ac:	d028      	beq.n	8007700 <HAL_RCC_OscConfig+0x534>
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- 80076ae:	68fb      	ldr	r3, [r7, #12]
- 80076b0:	f403 0280 	and.w	r2, r3, #4194304	; 0x400000
- 80076b4:	687b      	ldr	r3, [r7, #4]
- 80076b6:	69db      	ldr	r3, [r3, #28]
-      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
- 80076b8:	429a      	cmp	r2, r3
- 80076ba:	d121      	bne.n	8007700 <HAL_RCC_OscConfig+0x534>
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
- 80076bc:	68fb      	ldr	r3, [r7, #12]
- 80076be:	f003 023f 	and.w	r2, r3, #63	; 0x3f
- 80076c2:	687b      	ldr	r3, [r7, #4]
- 80076c4:	6a1b      	ldr	r3, [r3, #32]
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- 80076c6:	429a      	cmp	r2, r3
- 80076c8:	d11a      	bne.n	8007700 <HAL_RCC_OscConfig+0x534>
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) ||
- 80076ca:	68fa      	ldr	r2, [r7, #12]
- 80076cc:	f647 73c0 	movw	r3, #32704	; 0x7fc0
- 80076d0:	4013      	ands	r3, r2
- 80076d2:	687a      	ldr	r2, [r7, #4]
- 80076d4:	6a52      	ldr	r2, [r2, #36]	; 0x24
- 80076d6:	0192      	lsls	r2, r2, #6
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
- 80076d8:	4293      	cmp	r3, r2
- 80076da:	d111      	bne.n	8007700 <HAL_RCC_OscConfig+0x534>
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((((RCC_OscInitStruct->PLL.PLLP) >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos)) ||
- 80076dc:	68fb      	ldr	r3, [r7, #12]
- 80076de:	f403 3240 	and.w	r2, r3, #196608	; 0x30000
- 80076e2:	687b      	ldr	r3, [r7, #4]
- 80076e4:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 80076e6:	085b      	lsrs	r3, r3, #1
- 80076e8:	3b01      	subs	r3, #1
- 80076ea:	041b      	lsls	r3, r3, #16
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) ||
- 80076ec:	429a      	cmp	r2, r3
- 80076ee:	d107      	bne.n	8007700 <HAL_RCC_OscConfig+0x534>
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)))
- 80076f0:	68fb      	ldr	r3, [r7, #12]
- 80076f2:	f003 6270 	and.w	r2, r3, #251658240	; 0xf000000
- 80076f6:	687b      	ldr	r3, [r7, #4]
- 80076f8:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 80076fa:	061b      	lsls	r3, r3, #24
-          (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((((RCC_OscInitStruct->PLL.PLLP) >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos)) ||
- 80076fc:	429a      	cmp	r2, r3
- 80076fe:	d001      	beq.n	8007704 <HAL_RCC_OscConfig+0x538>
-#endif
-      {
-        return HAL_ERROR;
- 8007700:	2301      	movs	r3, #1
- 8007702:	e000      	b.n	8007706 <HAL_RCC_OscConfig+0x53a>
-      }
-    }
-  }
-  return HAL_OK;
- 8007704:	2300      	movs	r3, #0
-}
- 8007706:	4618      	mov	r0, r3
- 8007708:	3718      	adds	r7, #24
- 800770a:	46bd      	mov	sp, r7
- 800770c:	bd80      	pop	{r7, pc}
- 800770e:	bf00      	nop
- 8007710:	40023800 	.word	0x40023800
-
-08007714 <HAL_RCC_ClockConfig>:
-  *         HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
-  *         (for more details refer to section above "Initialization/de-initialization functions")
-  * @retval None
-  */
-HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
-{
- 8007714:	b580      	push	{r7, lr}
- 8007716:	b084      	sub	sp, #16
- 8007718:	af00      	add	r7, sp, #0
- 800771a:	6078      	str	r0, [r7, #4]
- 800771c:	6039      	str	r1, [r7, #0]
-  uint32_t tickstart = 0;
- 800771e:	2300      	movs	r3, #0
- 8007720:	60fb      	str	r3, [r7, #12]
-
-  /* Check Null pointer */
-  if (RCC_ClkInitStruct == NULL)
- 8007722:	687b      	ldr	r3, [r7, #4]
- 8007724:	2b00      	cmp	r3, #0
- 8007726:	d101      	bne.n	800772c <HAL_RCC_ClockConfig+0x18>
-  {
-    return HAL_ERROR;
- 8007728:	2301      	movs	r3, #1
- 800772a:	e0d0      	b.n	80078ce <HAL_RCC_ClockConfig+0x1ba>
-  /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
-     must be correctly programmed according to the frequency of the CPU clock
-     (HCLK) and the supply voltage of the device. */
-
-  /* Increasing the CPU frequency */
-  if (FLatency > __HAL_FLASH_GET_LATENCY())
- 800772c:	4b6a      	ldr	r3, [pc, #424]	; (80078d8 <HAL_RCC_ClockConfig+0x1c4>)
- 800772e:	681b      	ldr	r3, [r3, #0]
- 8007730:	f003 030f 	and.w	r3, r3, #15
- 8007734:	683a      	ldr	r2, [r7, #0]
- 8007736:	429a      	cmp	r2, r3
- 8007738:	d910      	bls.n	800775c <HAL_RCC_ClockConfig+0x48>
-  {
-    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
-    __HAL_FLASH_SET_LATENCY(FLatency);
- 800773a:	4b67      	ldr	r3, [pc, #412]	; (80078d8 <HAL_RCC_ClockConfig+0x1c4>)
- 800773c:	681b      	ldr	r3, [r3, #0]
- 800773e:	f023 020f 	bic.w	r2, r3, #15
- 8007742:	4965      	ldr	r1, [pc, #404]	; (80078d8 <HAL_RCC_ClockConfig+0x1c4>)
- 8007744:	683b      	ldr	r3, [r7, #0]
- 8007746:	4313      	orrs	r3, r2
- 8007748:	600b      	str	r3, [r1, #0]
-
-    /* Check that the new number of wait states is taken into account to access the Flash
-    memory by reading the FLASH_ACR register */
-    if (__HAL_FLASH_GET_LATENCY() != FLatency)
- 800774a:	4b63      	ldr	r3, [pc, #396]	; (80078d8 <HAL_RCC_ClockConfig+0x1c4>)
- 800774c:	681b      	ldr	r3, [r3, #0]
- 800774e:	f003 030f 	and.w	r3, r3, #15
- 8007752:	683a      	ldr	r2, [r7, #0]
- 8007754:	429a      	cmp	r2, r3
- 8007756:	d001      	beq.n	800775c <HAL_RCC_ClockConfig+0x48>
-    {
-      return HAL_ERROR;
- 8007758:	2301      	movs	r3, #1
- 800775a:	e0b8      	b.n	80078ce <HAL_RCC_ClockConfig+0x1ba>
-    }
-  }
-
-  /*-------------------------- HCLK Configuration --------------------------*/
-  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
- 800775c:	687b      	ldr	r3, [r7, #4]
- 800775e:	681b      	ldr	r3, [r3, #0]
- 8007760:	f003 0302 	and.w	r3, r3, #2
- 8007764:	2b00      	cmp	r3, #0
- 8007766:	d020      	beq.n	80077aa <HAL_RCC_ClockConfig+0x96>
-  {
-    /* Set the highest APBx dividers in order to ensure that we do not go through
-       a non-spec phase whatever we decrease or increase HCLK. */
-    if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 8007768:	687b      	ldr	r3, [r7, #4]
- 800776a:	681b      	ldr	r3, [r3, #0]
- 800776c:	f003 0304 	and.w	r3, r3, #4
- 8007770:	2b00      	cmp	r3, #0
- 8007772:	d005      	beq.n	8007780 <HAL_RCC_ClockConfig+0x6c>
-    {
-      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
- 8007774:	4b59      	ldr	r3, [pc, #356]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 8007776:	689b      	ldr	r3, [r3, #8]
- 8007778:	4a58      	ldr	r2, [pc, #352]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 800777a:	f443 53e0 	orr.w	r3, r3, #7168	; 0x1c00
- 800777e:	6093      	str	r3, [r2, #8]
-    }
-
-    if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 8007780:	687b      	ldr	r3, [r7, #4]
- 8007782:	681b      	ldr	r3, [r3, #0]
- 8007784:	f003 0308 	and.w	r3, r3, #8
- 8007788:	2b00      	cmp	r3, #0
- 800778a:	d005      	beq.n	8007798 <HAL_RCC_ClockConfig+0x84>
-    {
-      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
- 800778c:	4b53      	ldr	r3, [pc, #332]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 800778e:	689b      	ldr	r3, [r3, #8]
- 8007790:	4a52      	ldr	r2, [pc, #328]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 8007792:	f443 4360 	orr.w	r3, r3, #57344	; 0xe000
- 8007796:	6093      	str	r3, [r2, #8]
-    }
-
-    /* Set the new HCLK clock divider */
-    assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
-    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
- 8007798:	4b50      	ldr	r3, [pc, #320]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 800779a:	689b      	ldr	r3, [r3, #8]
- 800779c:	f023 02f0 	bic.w	r2, r3, #240	; 0xf0
- 80077a0:	687b      	ldr	r3, [r7, #4]
- 80077a2:	689b      	ldr	r3, [r3, #8]
- 80077a4:	494d      	ldr	r1, [pc, #308]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 80077a6:	4313      	orrs	r3, r2
- 80077a8:	608b      	str	r3, [r1, #8]
-  }
-
-  /*------------------------- SYSCLK Configuration ---------------------------*/
-  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
- 80077aa:	687b      	ldr	r3, [r7, #4]
- 80077ac:	681b      	ldr	r3, [r3, #0]
- 80077ae:	f003 0301 	and.w	r3, r3, #1
- 80077b2:	2b00      	cmp	r3, #0
- 80077b4:	d040      	beq.n	8007838 <HAL_RCC_ClockConfig+0x124>
-  {
-    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
-
-    /* HSE is selected as System Clock Source */
-    if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- 80077b6:	687b      	ldr	r3, [r7, #4]
- 80077b8:	685b      	ldr	r3, [r3, #4]
- 80077ba:	2b01      	cmp	r3, #1
- 80077bc:	d107      	bne.n	80077ce <HAL_RCC_ClockConfig+0xba>
-    {
-      /* Check the HSE ready flag */
-      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 80077be:	4b47      	ldr	r3, [pc, #284]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 80077c0:	681b      	ldr	r3, [r3, #0]
- 80077c2:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
- 80077c6:	2b00      	cmp	r3, #0
- 80077c8:	d115      	bne.n	80077f6 <HAL_RCC_ClockConfig+0xe2>
-      {
-        return HAL_ERROR;
- 80077ca:	2301      	movs	r3, #1
- 80077cc:	e07f      	b.n	80078ce <HAL_RCC_ClockConfig+0x1ba>
-      }
-    }
-    /* PLL is selected as System Clock Source */
-    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
- 80077ce:	687b      	ldr	r3, [r7, #4]
- 80077d0:	685b      	ldr	r3, [r3, #4]
- 80077d2:	2b02      	cmp	r3, #2
- 80077d4:	d107      	bne.n	80077e6 <HAL_RCC_ClockConfig+0xd2>
-    {
-      /* Check the PLL ready flag */
-      if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 80077d6:	4b41      	ldr	r3, [pc, #260]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 80077d8:	681b      	ldr	r3, [r3, #0]
- 80077da:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
- 80077de:	2b00      	cmp	r3, #0
- 80077e0:	d109      	bne.n	80077f6 <HAL_RCC_ClockConfig+0xe2>
-      {
-        return HAL_ERROR;
- 80077e2:	2301      	movs	r3, #1
- 80077e4:	e073      	b.n	80078ce <HAL_RCC_ClockConfig+0x1ba>
-    }
-    /* HSI is selected as System Clock Source */
-    else
-    {
-      /* Check the HSI ready flag */
-      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 80077e6:	4b3d      	ldr	r3, [pc, #244]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 80077e8:	681b      	ldr	r3, [r3, #0]
- 80077ea:	f003 0302 	and.w	r3, r3, #2
- 80077ee:	2b00      	cmp	r3, #0
- 80077f0:	d101      	bne.n	80077f6 <HAL_RCC_ClockConfig+0xe2>
-      {
-        return HAL_ERROR;
- 80077f2:	2301      	movs	r3, #1
- 80077f4:	e06b      	b.n	80078ce <HAL_RCC_ClockConfig+0x1ba>
-      }
-    }
-
-    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
- 80077f6:	4b39      	ldr	r3, [pc, #228]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 80077f8:	689b      	ldr	r3, [r3, #8]
- 80077fa:	f023 0203 	bic.w	r2, r3, #3
- 80077fe:	687b      	ldr	r3, [r7, #4]
- 8007800:	685b      	ldr	r3, [r3, #4]
- 8007802:	4936      	ldr	r1, [pc, #216]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 8007804:	4313      	orrs	r3, r2
- 8007806:	608b      	str	r3, [r1, #8]
-
-    /* Get Start Tick*/
-    tickstart = HAL_GetTick();
- 8007808:	f7fc fe72 	bl	80044f0 <HAL_GetTick>
- 800780c:	60f8      	str	r0, [r7, #12]
-
-    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 800780e:	e00a      	b.n	8007826 <HAL_RCC_ClockConfig+0x112>
-    {
-      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
- 8007810:	f7fc fe6e 	bl	80044f0 <HAL_GetTick>
- 8007814:	4602      	mov	r2, r0
- 8007816:	68fb      	ldr	r3, [r7, #12]
- 8007818:	1ad3      	subs	r3, r2, r3
- 800781a:	f241 3288 	movw	r2, #5000	; 0x1388
- 800781e:	4293      	cmp	r3, r2
- 8007820:	d901      	bls.n	8007826 <HAL_RCC_ClockConfig+0x112>
-      {
-        return HAL_TIMEOUT;
- 8007822:	2303      	movs	r3, #3
- 8007824:	e053      	b.n	80078ce <HAL_RCC_ClockConfig+0x1ba>
-    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 8007826:	4b2d      	ldr	r3, [pc, #180]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 8007828:	689b      	ldr	r3, [r3, #8]
- 800782a:	f003 020c 	and.w	r2, r3, #12
- 800782e:	687b      	ldr	r3, [r7, #4]
- 8007830:	685b      	ldr	r3, [r3, #4]
- 8007832:	009b      	lsls	r3, r3, #2
- 8007834:	429a      	cmp	r2, r3
- 8007836:	d1eb      	bne.n	8007810 <HAL_RCC_ClockConfig+0xfc>
-      }
-    }
-  }
-
-  /* Decreasing the number of wait states because of lower CPU frequency */
-  if (FLatency < __HAL_FLASH_GET_LATENCY())
- 8007838:	4b27      	ldr	r3, [pc, #156]	; (80078d8 <HAL_RCC_ClockConfig+0x1c4>)
- 800783a:	681b      	ldr	r3, [r3, #0]
- 800783c:	f003 030f 	and.w	r3, r3, #15
- 8007840:	683a      	ldr	r2, [r7, #0]
- 8007842:	429a      	cmp	r2, r3
- 8007844:	d210      	bcs.n	8007868 <HAL_RCC_ClockConfig+0x154>
-  {
-    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
-    __HAL_FLASH_SET_LATENCY(FLatency);
- 8007846:	4b24      	ldr	r3, [pc, #144]	; (80078d8 <HAL_RCC_ClockConfig+0x1c4>)
- 8007848:	681b      	ldr	r3, [r3, #0]
- 800784a:	f023 020f 	bic.w	r2, r3, #15
- 800784e:	4922      	ldr	r1, [pc, #136]	; (80078d8 <HAL_RCC_ClockConfig+0x1c4>)
- 8007850:	683b      	ldr	r3, [r7, #0]
- 8007852:	4313      	orrs	r3, r2
- 8007854:	600b      	str	r3, [r1, #0]
-
-    /* Check that the new number of wait states is taken into account to access the Flash
-    memory by reading the FLASH_ACR register */
-    if (__HAL_FLASH_GET_LATENCY() != FLatency)
- 8007856:	4b20      	ldr	r3, [pc, #128]	; (80078d8 <HAL_RCC_ClockConfig+0x1c4>)
- 8007858:	681b      	ldr	r3, [r3, #0]
- 800785a:	f003 030f 	and.w	r3, r3, #15
- 800785e:	683a      	ldr	r2, [r7, #0]
- 8007860:	429a      	cmp	r2, r3
- 8007862:	d001      	beq.n	8007868 <HAL_RCC_ClockConfig+0x154>
-    {
-      return HAL_ERROR;
- 8007864:	2301      	movs	r3, #1
- 8007866:	e032      	b.n	80078ce <HAL_RCC_ClockConfig+0x1ba>
-    }
-  }
-
-  /*-------------------------- PCLK1 Configuration ---------------------------*/
-  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 8007868:	687b      	ldr	r3, [r7, #4]
- 800786a:	681b      	ldr	r3, [r3, #0]
- 800786c:	f003 0304 	and.w	r3, r3, #4
- 8007870:	2b00      	cmp	r3, #0
- 8007872:	d008      	beq.n	8007886 <HAL_RCC_ClockConfig+0x172>
-  {
-    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
-    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
- 8007874:	4b19      	ldr	r3, [pc, #100]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 8007876:	689b      	ldr	r3, [r3, #8]
- 8007878:	f423 52e0 	bic.w	r2, r3, #7168	; 0x1c00
- 800787c:	687b      	ldr	r3, [r7, #4]
- 800787e:	68db      	ldr	r3, [r3, #12]
- 8007880:	4916      	ldr	r1, [pc, #88]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 8007882:	4313      	orrs	r3, r2
- 8007884:	608b      	str	r3, [r1, #8]
-  }
-
-  /*-------------------------- PCLK2 Configuration ---------------------------*/
-  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 8007886:	687b      	ldr	r3, [r7, #4]
- 8007888:	681b      	ldr	r3, [r3, #0]
- 800788a:	f003 0308 	and.w	r3, r3, #8
- 800788e:	2b00      	cmp	r3, #0
- 8007890:	d009      	beq.n	80078a6 <HAL_RCC_ClockConfig+0x192>
-  {
-    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
-    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
- 8007892:	4b12      	ldr	r3, [pc, #72]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 8007894:	689b      	ldr	r3, [r3, #8]
- 8007896:	f423 4260 	bic.w	r2, r3, #57344	; 0xe000
- 800789a:	687b      	ldr	r3, [r7, #4]
- 800789c:	691b      	ldr	r3, [r3, #16]
- 800789e:	00db      	lsls	r3, r3, #3
- 80078a0:	490e      	ldr	r1, [pc, #56]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 80078a2:	4313      	orrs	r3, r2
- 80078a4:	608b      	str	r3, [r1, #8]
-  }
-
-  /* Update the SystemCoreClock global variable */
-  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
- 80078a6:	f000 f821 	bl	80078ec <HAL_RCC_GetSysClockFreq>
- 80078aa:	4601      	mov	r1, r0
- 80078ac:	4b0b      	ldr	r3, [pc, #44]	; (80078dc <HAL_RCC_ClockConfig+0x1c8>)
- 80078ae:	689b      	ldr	r3, [r3, #8]
- 80078b0:	091b      	lsrs	r3, r3, #4
- 80078b2:	f003 030f 	and.w	r3, r3, #15
- 80078b6:	4a0a      	ldr	r2, [pc, #40]	; (80078e0 <HAL_RCC_ClockConfig+0x1cc>)
- 80078b8:	5cd3      	ldrb	r3, [r2, r3]
- 80078ba:	fa21 f303 	lsr.w	r3, r1, r3
- 80078be:	4a09      	ldr	r2, [pc, #36]	; (80078e4 <HAL_RCC_ClockConfig+0x1d0>)
- 80078c0:	6013      	str	r3, [r2, #0]
-
-  /* Configure the source of time base considering new system clocks settings*/
-  HAL_InitTick(uwTickPrio);
- 80078c2:	4b09      	ldr	r3, [pc, #36]	; (80078e8 <HAL_RCC_ClockConfig+0x1d4>)
- 80078c4:	681b      	ldr	r3, [r3, #0]
- 80078c6:	4618      	mov	r0, r3
- 80078c8:	f7fc fcf6 	bl	80042b8 <HAL_InitTick>
-
-  return HAL_OK;
- 80078cc:	2300      	movs	r3, #0
-}
- 80078ce:	4618      	mov	r0, r3
- 80078d0:	3710      	adds	r7, #16
- 80078d2:	46bd      	mov	sp, r7
- 80078d4:	bd80      	pop	{r7, pc}
- 80078d6:	bf00      	nop
- 80078d8:	40023c00 	.word	0x40023c00
- 80078dc:	40023800 	.word	0x40023800
- 80078e0:	0800e370 	.word	0x0800e370
- 80078e4:	2000003c 	.word	0x2000003c
- 80078e8:	20000040 	.word	0x20000040
-
-080078ec <HAL_RCC_GetSysClockFreq>:
-  *
-  *
-  * @retval SYSCLK frequency
-  */
-uint32_t HAL_RCC_GetSysClockFreq(void)
-{
- 80078ec:	b5f0      	push	{r4, r5, r6, r7, lr}
- 80078ee:	b085      	sub	sp, #20
- 80078f0:	af00      	add	r7, sp, #0
-  uint32_t pllm = 0, pllvco = 0, pllp = 0;
- 80078f2:	2300      	movs	r3, #0
- 80078f4:	607b      	str	r3, [r7, #4]
- 80078f6:	2300      	movs	r3, #0
- 80078f8:	60fb      	str	r3, [r7, #12]
- 80078fa:	2300      	movs	r3, #0
- 80078fc:	603b      	str	r3, [r7, #0]
-  uint32_t sysclockfreq = 0;
- 80078fe:	2300      	movs	r3, #0
- 8007900:	60bb      	str	r3, [r7, #8]
-
-  /* Get SYSCLK source -------------------------------------------------------*/
-  switch (RCC->CFGR & RCC_CFGR_SWS)
- 8007902:	4b50      	ldr	r3, [pc, #320]	; (8007a44 <HAL_RCC_GetSysClockFreq+0x158>)
- 8007904:	689b      	ldr	r3, [r3, #8]
- 8007906:	f003 030c 	and.w	r3, r3, #12
- 800790a:	2b04      	cmp	r3, #4
- 800790c:	d007      	beq.n	800791e <HAL_RCC_GetSysClockFreq+0x32>
- 800790e:	2b08      	cmp	r3, #8
- 8007910:	d008      	beq.n	8007924 <HAL_RCC_GetSysClockFreq+0x38>
- 8007912:	2b00      	cmp	r3, #0
- 8007914:	f040 808d 	bne.w	8007a32 <HAL_RCC_GetSysClockFreq+0x146>
-  {
-    case RCC_SYSCLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
-    {
-      sysclockfreq = HSI_VALUE;
- 8007918:	4b4b      	ldr	r3, [pc, #300]	; (8007a48 <HAL_RCC_GetSysClockFreq+0x15c>)
- 800791a:	60bb      	str	r3, [r7, #8]
-      break;
- 800791c:	e08c      	b.n	8007a38 <HAL_RCC_GetSysClockFreq+0x14c>
-    }
-    case RCC_SYSCLKSOURCE_STATUS_HSE:  /* HSE used as system clock  source */
-    {
-      sysclockfreq = HSE_VALUE;
- 800791e:	4b4b      	ldr	r3, [pc, #300]	; (8007a4c <HAL_RCC_GetSysClockFreq+0x160>)
- 8007920:	60bb      	str	r3, [r7, #8]
-      break;
- 8007922:	e089      	b.n	8007a38 <HAL_RCC_GetSysClockFreq+0x14c>
-    }
-    case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock  source */
-    {
-      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
-      SYSCLK = PLL_VCO / PLLP */
-      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
- 8007924:	4b47      	ldr	r3, [pc, #284]	; (8007a44 <HAL_RCC_GetSysClockFreq+0x158>)
- 8007926:	685b      	ldr	r3, [r3, #4]
- 8007928:	f003 033f 	and.w	r3, r3, #63	; 0x3f
- 800792c:	607b      	str	r3, [r7, #4]
-      if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLCFGR_PLLSRC_HSI)
- 800792e:	4b45      	ldr	r3, [pc, #276]	; (8007a44 <HAL_RCC_GetSysClockFreq+0x158>)
- 8007930:	685b      	ldr	r3, [r3, #4]
- 8007932:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
- 8007936:	2b00      	cmp	r3, #0
- 8007938:	d023      	beq.n	8007982 <HAL_RCC_GetSysClockFreq+0x96>
-      {
-        /* HSE used as PLL clock source */
-        pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- 800793a:	4b42      	ldr	r3, [pc, #264]	; (8007a44 <HAL_RCC_GetSysClockFreq+0x158>)
- 800793c:	685b      	ldr	r3, [r3, #4]
- 800793e:	099b      	lsrs	r3, r3, #6
- 8007940:	f04f 0400 	mov.w	r4, #0
- 8007944:	f240 11ff 	movw	r1, #511	; 0x1ff
- 8007948:	f04f 0200 	mov.w	r2, #0
- 800794c:	ea03 0501 	and.w	r5, r3, r1
- 8007950:	ea04 0602 	and.w	r6, r4, r2
- 8007954:	4a3d      	ldr	r2, [pc, #244]	; (8007a4c <HAL_RCC_GetSysClockFreq+0x160>)
- 8007956:	fb02 f106 	mul.w	r1, r2, r6
- 800795a:	2200      	movs	r2, #0
- 800795c:	fb02 f205 	mul.w	r2, r2, r5
- 8007960:	440a      	add	r2, r1
- 8007962:	493a      	ldr	r1, [pc, #232]	; (8007a4c <HAL_RCC_GetSysClockFreq+0x160>)
- 8007964:	fba5 0101 	umull	r0, r1, r5, r1
- 8007968:	1853      	adds	r3, r2, r1
- 800796a:	4619      	mov	r1, r3
- 800796c:	687b      	ldr	r3, [r7, #4]
- 800796e:	f04f 0400 	mov.w	r4, #0
- 8007972:	461a      	mov	r2, r3
- 8007974:	4623      	mov	r3, r4
- 8007976:	f7f8 fc9b 	bl	80002b0 <__aeabi_uldivmod>
- 800797a:	4603      	mov	r3, r0
- 800797c:	460c      	mov	r4, r1
- 800797e:	60fb      	str	r3, [r7, #12]
- 8007980:	e049      	b.n	8007a16 <HAL_RCC_GetSysClockFreq+0x12a>
-      }
-      else
-      {
-        /* HSI used as PLL clock source */
-        pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- 8007982:	4b30      	ldr	r3, [pc, #192]	; (8007a44 <HAL_RCC_GetSysClockFreq+0x158>)
- 8007984:	685b      	ldr	r3, [r3, #4]
- 8007986:	099b      	lsrs	r3, r3, #6
- 8007988:	f04f 0400 	mov.w	r4, #0
- 800798c:	f240 11ff 	movw	r1, #511	; 0x1ff
- 8007990:	f04f 0200 	mov.w	r2, #0
- 8007994:	ea03 0501 	and.w	r5, r3, r1
- 8007998:	ea04 0602 	and.w	r6, r4, r2
- 800799c:	4629      	mov	r1, r5
- 800799e:	4632      	mov	r2, r6
- 80079a0:	f04f 0300 	mov.w	r3, #0
- 80079a4:	f04f 0400 	mov.w	r4, #0
- 80079a8:	0154      	lsls	r4, r2, #5
- 80079aa:	ea44 64d1 	orr.w	r4, r4, r1, lsr #27
- 80079ae:	014b      	lsls	r3, r1, #5
- 80079b0:	4619      	mov	r1, r3
- 80079b2:	4622      	mov	r2, r4
- 80079b4:	1b49      	subs	r1, r1, r5
- 80079b6:	eb62 0206 	sbc.w	r2, r2, r6
- 80079ba:	f04f 0300 	mov.w	r3, #0
- 80079be:	f04f 0400 	mov.w	r4, #0
- 80079c2:	0194      	lsls	r4, r2, #6
- 80079c4:	ea44 6491 	orr.w	r4, r4, r1, lsr #26
- 80079c8:	018b      	lsls	r3, r1, #6
- 80079ca:	1a5b      	subs	r3, r3, r1
- 80079cc:	eb64 0402 	sbc.w	r4, r4, r2
- 80079d0:	f04f 0100 	mov.w	r1, #0
- 80079d4:	f04f 0200 	mov.w	r2, #0
- 80079d8:	00e2      	lsls	r2, r4, #3
- 80079da:	ea42 7253 	orr.w	r2, r2, r3, lsr #29
- 80079de:	00d9      	lsls	r1, r3, #3
- 80079e0:	460b      	mov	r3, r1
- 80079e2:	4614      	mov	r4, r2
- 80079e4:	195b      	adds	r3, r3, r5
- 80079e6:	eb44 0406 	adc.w	r4, r4, r6
- 80079ea:	f04f 0100 	mov.w	r1, #0
- 80079ee:	f04f 0200 	mov.w	r2, #0
- 80079f2:	02a2      	lsls	r2, r4, #10
- 80079f4:	ea42 5293 	orr.w	r2, r2, r3, lsr #22
- 80079f8:	0299      	lsls	r1, r3, #10
- 80079fa:	460b      	mov	r3, r1
- 80079fc:	4614      	mov	r4, r2
- 80079fe:	4618      	mov	r0, r3
- 8007a00:	4621      	mov	r1, r4
- 8007a02:	687b      	ldr	r3, [r7, #4]
- 8007a04:	f04f 0400 	mov.w	r4, #0
- 8007a08:	461a      	mov	r2, r3
- 8007a0a:	4623      	mov	r3, r4
- 8007a0c:	f7f8 fc50 	bl	80002b0 <__aeabi_uldivmod>
- 8007a10:	4603      	mov	r3, r0
- 8007a12:	460c      	mov	r4, r1
- 8007a14:	60fb      	str	r3, [r7, #12]
-      }
-      pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1) * 2);
- 8007a16:	4b0b      	ldr	r3, [pc, #44]	; (8007a44 <HAL_RCC_GetSysClockFreq+0x158>)
- 8007a18:	685b      	ldr	r3, [r3, #4]
- 8007a1a:	0c1b      	lsrs	r3, r3, #16
- 8007a1c:	f003 0303 	and.w	r3, r3, #3
- 8007a20:	3301      	adds	r3, #1
- 8007a22:	005b      	lsls	r3, r3, #1
- 8007a24:	603b      	str	r3, [r7, #0]
-
-      sysclockfreq = pllvco / pllp;
- 8007a26:	68fa      	ldr	r2, [r7, #12]
- 8007a28:	683b      	ldr	r3, [r7, #0]
- 8007a2a:	fbb2 f3f3 	udiv	r3, r2, r3
- 8007a2e:	60bb      	str	r3, [r7, #8]
-      break;
- 8007a30:	e002      	b.n	8007a38 <HAL_RCC_GetSysClockFreq+0x14c>
-    }
-    default:
-    {
-      sysclockfreq = HSI_VALUE;
- 8007a32:	4b05      	ldr	r3, [pc, #20]	; (8007a48 <HAL_RCC_GetSysClockFreq+0x15c>)
- 8007a34:	60bb      	str	r3, [r7, #8]
-      break;
- 8007a36:	bf00      	nop
-    }
-  }
-  return sysclockfreq;
- 8007a38:	68bb      	ldr	r3, [r7, #8]
-}
- 8007a3a:	4618      	mov	r0, r3
- 8007a3c:	3714      	adds	r7, #20
- 8007a3e:	46bd      	mov	sp, r7
- 8007a40:	bdf0      	pop	{r4, r5, r6, r7, pc}
- 8007a42:	bf00      	nop
- 8007a44:	40023800 	.word	0x40023800
- 8007a48:	00f42400 	.word	0x00f42400
- 8007a4c:	017d7840 	.word	0x017d7840
-
-08007a50 <HAL_RCC_GetHCLKFreq>:
-  *         right HCLK value. Otherwise, any configuration based on this function will be incorrect.
-  * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency.
-  * @retval HCLK frequency
-  */
-uint32_t HAL_RCC_GetHCLKFreq(void)
-{
- 8007a50:	b480      	push	{r7}
- 8007a52:	af00      	add	r7, sp, #0
-  return SystemCoreClock;
- 8007a54:	4b03      	ldr	r3, [pc, #12]	; (8007a64 <HAL_RCC_GetHCLKFreq+0x14>)
- 8007a56:	681b      	ldr	r3, [r3, #0]
-}
- 8007a58:	4618      	mov	r0, r3
- 8007a5a:	46bd      	mov	sp, r7
- 8007a5c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8007a60:	4770      	bx	lr
- 8007a62:	bf00      	nop
- 8007a64:	2000003c 	.word	0x2000003c
-
-08007a68 <HAL_RCC_GetPCLK1Freq>:
-  * @note   Each time PCLK1 changes, this function must be called to update the
-  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
-  * @retval PCLK1 frequency
-  */
-uint32_t HAL_RCC_GetPCLK1Freq(void)
-{
- 8007a68:	b580      	push	{r7, lr}
- 8007a6a:	af00      	add	r7, sp, #0
-  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
-  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
- 8007a6c:	f7ff fff0 	bl	8007a50 <HAL_RCC_GetHCLKFreq>
- 8007a70:	4601      	mov	r1, r0
- 8007a72:	4b05      	ldr	r3, [pc, #20]	; (8007a88 <HAL_RCC_GetPCLK1Freq+0x20>)
- 8007a74:	689b      	ldr	r3, [r3, #8]
- 8007a76:	0a9b      	lsrs	r3, r3, #10
- 8007a78:	f003 0307 	and.w	r3, r3, #7
- 8007a7c:	4a03      	ldr	r2, [pc, #12]	; (8007a8c <HAL_RCC_GetPCLK1Freq+0x24>)
- 8007a7e:	5cd3      	ldrb	r3, [r2, r3]
- 8007a80:	fa21 f303 	lsr.w	r3, r1, r3
-}
- 8007a84:	4618      	mov	r0, r3
- 8007a86:	bd80      	pop	{r7, pc}
- 8007a88:	40023800 	.word	0x40023800
- 8007a8c:	0800e380 	.word	0x0800e380
-
-08007a90 <HAL_RCC_GetPCLK2Freq>:
-  * @note   Each time PCLK2 changes, this function must be called to update the
-  *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
-  * @retval PCLK2 frequency
-  */
-uint32_t HAL_RCC_GetPCLK2Freq(void)
-{
- 8007a90:	b580      	push	{r7, lr}
- 8007a92:	af00      	add	r7, sp, #0
-  /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
-  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
- 8007a94:	f7ff ffdc 	bl	8007a50 <HAL_RCC_GetHCLKFreq>
- 8007a98:	4601      	mov	r1, r0
- 8007a9a:	4b05      	ldr	r3, [pc, #20]	; (8007ab0 <HAL_RCC_GetPCLK2Freq+0x20>)
- 8007a9c:	689b      	ldr	r3, [r3, #8]
- 8007a9e:	0b5b      	lsrs	r3, r3, #13
- 8007aa0:	f003 0307 	and.w	r3, r3, #7
- 8007aa4:	4a03      	ldr	r2, [pc, #12]	; (8007ab4 <HAL_RCC_GetPCLK2Freq+0x24>)
- 8007aa6:	5cd3      	ldrb	r3, [r2, r3]
- 8007aa8:	fa21 f303 	lsr.w	r3, r1, r3
-}
- 8007aac:	4618      	mov	r0, r3
- 8007aae:	bd80      	pop	{r7, pc}
- 8007ab0:	40023800 	.word	0x40023800
- 8007ab4:	0800e380 	.word	0x0800e380
-
-08007ab8 <HAL_RCC_GetClockConfig>:
-  * will be configured.
-  * @param  pFLatency Pointer on the Flash Latency.
-  * @retval None
-  */
-void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
-{
- 8007ab8:	b480      	push	{r7}
- 8007aba:	b083      	sub	sp, #12
- 8007abc:	af00      	add	r7, sp, #0
- 8007abe:	6078      	str	r0, [r7, #4]
- 8007ac0:	6039      	str	r1, [r7, #0]
-  /* Set all possible values for the Clock type parameter --------------------*/
-  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
- 8007ac2:	687b      	ldr	r3, [r7, #4]
- 8007ac4:	220f      	movs	r2, #15
- 8007ac6:	601a      	str	r2, [r3, #0]
-
-  /* Get the SYSCLK configuration --------------------------------------------*/
-  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
- 8007ac8:	4b12      	ldr	r3, [pc, #72]	; (8007b14 <HAL_RCC_GetClockConfig+0x5c>)
- 8007aca:	689b      	ldr	r3, [r3, #8]
- 8007acc:	f003 0203 	and.w	r2, r3, #3
- 8007ad0:	687b      	ldr	r3, [r7, #4]
- 8007ad2:	605a      	str	r2, [r3, #4]
-
-  /* Get the HCLK configuration ----------------------------------------------*/
-  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
- 8007ad4:	4b0f      	ldr	r3, [pc, #60]	; (8007b14 <HAL_RCC_GetClockConfig+0x5c>)
- 8007ad6:	689b      	ldr	r3, [r3, #8]
- 8007ad8:	f003 02f0 	and.w	r2, r3, #240	; 0xf0
- 8007adc:	687b      	ldr	r3, [r7, #4]
- 8007ade:	609a      	str	r2, [r3, #8]
-
-  /* Get the APB1 configuration ----------------------------------------------*/
-  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
- 8007ae0:	4b0c      	ldr	r3, [pc, #48]	; (8007b14 <HAL_RCC_GetClockConfig+0x5c>)
- 8007ae2:	689b      	ldr	r3, [r3, #8]
- 8007ae4:	f403 52e0 	and.w	r2, r3, #7168	; 0x1c00
- 8007ae8:	687b      	ldr	r3, [r7, #4]
- 8007aea:	60da      	str	r2, [r3, #12]
-
-  /* Get the APB2 configuration ----------------------------------------------*/
-  RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
- 8007aec:	4b09      	ldr	r3, [pc, #36]	; (8007b14 <HAL_RCC_GetClockConfig+0x5c>)
- 8007aee:	689b      	ldr	r3, [r3, #8]
- 8007af0:	08db      	lsrs	r3, r3, #3
- 8007af2:	f403 52e0 	and.w	r2, r3, #7168	; 0x1c00
- 8007af6:	687b      	ldr	r3, [r7, #4]
- 8007af8:	611a      	str	r2, [r3, #16]
-
-  /* Get the Flash Wait State (Latency) configuration ------------------------*/
-  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
- 8007afa:	4b07      	ldr	r3, [pc, #28]	; (8007b18 <HAL_RCC_GetClockConfig+0x60>)
- 8007afc:	681b      	ldr	r3, [r3, #0]
- 8007afe:	f003 020f 	and.w	r2, r3, #15
- 8007b02:	683b      	ldr	r3, [r7, #0]
- 8007b04:	601a      	str	r2, [r3, #0]
-}
- 8007b06:	bf00      	nop
- 8007b08:	370c      	adds	r7, #12
- 8007b0a:	46bd      	mov	sp, r7
- 8007b0c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8007b10:	4770      	bx	lr
- 8007b12:	bf00      	nop
- 8007b14:	40023800 	.word	0x40023800
- 8007b18:	40023c00 	.word	0x40023c00
-
-08007b1c <HAL_RCCEx_PeriphCLKConfig>:
-  *         the backup registers) are set to their reset values.
-  *
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
-{
- 8007b1c:	b580      	push	{r7, lr}
- 8007b1e:	b088      	sub	sp, #32
- 8007b20:	af00      	add	r7, sp, #0
- 8007b22:	6078      	str	r0, [r7, #4]
-  uint32_t tickstart = 0;
- 8007b24:	2300      	movs	r3, #0
- 8007b26:	617b      	str	r3, [r7, #20]
-  uint32_t tmpreg0 = 0;
- 8007b28:	2300      	movs	r3, #0
- 8007b2a:	613b      	str	r3, [r7, #16]
-  uint32_t tmpreg1 = 0;
- 8007b2c:	2300      	movs	r3, #0
- 8007b2e:	60fb      	str	r3, [r7, #12]
-  uint32_t plli2sused = 0;
- 8007b30:	2300      	movs	r3, #0
- 8007b32:	61fb      	str	r3, [r7, #28]
-  uint32_t pllsaiused = 0;
- 8007b34:	2300      	movs	r3, #0
- 8007b36:	61bb      	str	r3, [r7, #24]
-
-  /* Check the parameters */
-  assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
-
-  /*----------------------------------- I2S configuration ----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S))
- 8007b38:	687b      	ldr	r3, [r7, #4]
- 8007b3a:	681b      	ldr	r3, [r3, #0]
- 8007b3c:	f003 0301 	and.w	r3, r3, #1
- 8007b40:	2b00      	cmp	r3, #0
- 8007b42:	d012      	beq.n	8007b6a <HAL_RCCEx_PeriphCLKConfig+0x4e>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection));
-
-    /* Configure I2S Clock source */
-    __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection);
- 8007b44:	4b69      	ldr	r3, [pc, #420]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007b46:	689b      	ldr	r3, [r3, #8]
- 8007b48:	4a68      	ldr	r2, [pc, #416]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007b4a:	f423 0300 	bic.w	r3, r3, #8388608	; 0x800000
- 8007b4e:	6093      	str	r3, [r2, #8]
- 8007b50:	4b66      	ldr	r3, [pc, #408]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007b52:	689a      	ldr	r2, [r3, #8]
- 8007b54:	687b      	ldr	r3, [r7, #4]
- 8007b56:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 8007b58:	4964      	ldr	r1, [pc, #400]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007b5a:	4313      	orrs	r3, r2
- 8007b5c:	608b      	str	r3, [r1, #8]
-
-    /* Enable the PLLI2S when it's used as clock source for I2S */
-    if(PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)
- 8007b5e:	687b      	ldr	r3, [r7, #4]
- 8007b60:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 8007b62:	2b00      	cmp	r3, #0
- 8007b64:	d101      	bne.n	8007b6a <HAL_RCCEx_PeriphCLKConfig+0x4e>
-    {
-      plli2sused = 1;
- 8007b66:	2301      	movs	r3, #1
- 8007b68:	61fb      	str	r3, [r7, #28]
-    }
-  }
-
-  /*------------------------------------ SAI1 configuration --------------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1))
- 8007b6a:	687b      	ldr	r3, [r7, #4]
- 8007b6c:	681b      	ldr	r3, [r3, #0]
- 8007b6e:	f403 2300 	and.w	r3, r3, #524288	; 0x80000
- 8007b72:	2b00      	cmp	r3, #0
- 8007b74:	d017      	beq.n	8007ba6 <HAL_RCCEx_PeriphCLKConfig+0x8a>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection));
-
-    /* Configure SAI1 Clock source */
-    __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
- 8007b76:	4b5d      	ldr	r3, [pc, #372]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007b78:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
- 8007b7c:	f423 1240 	bic.w	r2, r3, #3145728	; 0x300000
- 8007b80:	687b      	ldr	r3, [r7, #4]
- 8007b82:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 8007b84:	4959      	ldr	r1, [pc, #356]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007b86:	4313      	orrs	r3, r2
- 8007b88:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
-    /* Enable the PLLI2S when it's used as clock source for SAI */
-    if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)
- 8007b8c:	687b      	ldr	r3, [r7, #4]
- 8007b8e:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 8007b90:	f5b3 1f80 	cmp.w	r3, #1048576	; 0x100000
- 8007b94:	d101      	bne.n	8007b9a <HAL_RCCEx_PeriphCLKConfig+0x7e>
-    {
-      plli2sused = 1;
- 8007b96:	2301      	movs	r3, #1
- 8007b98:	61fb      	str	r3, [r7, #28]
-    }
-    /* Enable the PLLSAI when it's used as clock source for SAI */
-    if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)
- 8007b9a:	687b      	ldr	r3, [r7, #4]
- 8007b9c:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 8007b9e:	2b00      	cmp	r3, #0
- 8007ba0:	d101      	bne.n	8007ba6 <HAL_RCCEx_PeriphCLKConfig+0x8a>
-    {
-      pllsaiused = 1;
- 8007ba2:	2301      	movs	r3, #1
- 8007ba4:	61bb      	str	r3, [r7, #24]
-    }
-  }
-
-  /*------------------------------------ SAI2 configuration --------------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2))
- 8007ba6:	687b      	ldr	r3, [r7, #4]
- 8007ba8:	681b      	ldr	r3, [r3, #0]
- 8007baa:	f403 1380 	and.w	r3, r3, #1048576	; 0x100000
- 8007bae:	2b00      	cmp	r3, #0
- 8007bb0:	d017      	beq.n	8007be2 <HAL_RCCEx_PeriphCLKConfig+0xc6>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection));
-
-    /* Configure SAI2 Clock source */
-    __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection);
- 8007bb2:	4b4e      	ldr	r3, [pc, #312]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007bb4:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
- 8007bb8:	f423 0240 	bic.w	r2, r3, #12582912	; 0xc00000
- 8007bbc:	687b      	ldr	r3, [r7, #4]
- 8007bbe:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8007bc0:	494a      	ldr	r1, [pc, #296]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007bc2:	4313      	orrs	r3, r2
- 8007bc4:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
-
-    /* Enable the PLLI2S when it's used as clock source for SAI */
-    if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)
- 8007bc8:	687b      	ldr	r3, [r7, #4]
- 8007bca:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8007bcc:	f5b3 0f80 	cmp.w	r3, #4194304	; 0x400000
- 8007bd0:	d101      	bne.n	8007bd6 <HAL_RCCEx_PeriphCLKConfig+0xba>
-    {
-      plli2sused = 1;
- 8007bd2:	2301      	movs	r3, #1
- 8007bd4:	61fb      	str	r3, [r7, #28]
-    }
-    /* Enable the PLLSAI when it's used as clock source for SAI */
-    if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)
- 8007bd6:	687b      	ldr	r3, [r7, #4]
- 8007bd8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8007bda:	2b00      	cmp	r3, #0
- 8007bdc:	d101      	bne.n	8007be2 <HAL_RCCEx_PeriphCLKConfig+0xc6>
-    {
-      pllsaiused = 1;
- 8007bde:	2301      	movs	r3, #1
- 8007be0:	61bb      	str	r3, [r7, #24]
-    }
-  }
-
-  /*-------------------------------------- SPDIF-RX Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
- 8007be2:	687b      	ldr	r3, [r7, #4]
- 8007be4:	681b      	ldr	r3, [r3, #0]
- 8007be6:	f003 7380 	and.w	r3, r3, #16777216	; 0x1000000
- 8007bea:	2b00      	cmp	r3, #0
- 8007bec:	d001      	beq.n	8007bf2 <HAL_RCCEx_PeriphCLKConfig+0xd6>
-  {
-      plli2sused = 1;
- 8007bee:	2301      	movs	r3, #1
- 8007bf0:	61fb      	str	r3, [r7, #28]
-  }
-
-  /*------------------------------------ RTC configuration --------------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
- 8007bf2:	687b      	ldr	r3, [r7, #4]
- 8007bf4:	681b      	ldr	r3, [r3, #0]
- 8007bf6:	f003 0320 	and.w	r3, r3, #32
- 8007bfa:	2b00      	cmp	r3, #0
- 8007bfc:	f000 808b 	beq.w	8007d16 <HAL_RCCEx_PeriphCLKConfig+0x1fa>
-  {
-    /* Check for RTC Parameters used to output RTCCLK */
-    assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
-
-    /* Enable Power Clock*/
-    __HAL_RCC_PWR_CLK_ENABLE();
- 8007c00:	4b3a      	ldr	r3, [pc, #232]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007c02:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8007c04:	4a39      	ldr	r2, [pc, #228]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007c06:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
- 8007c0a:	6413      	str	r3, [r2, #64]	; 0x40
- 8007c0c:	4b37      	ldr	r3, [pc, #220]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007c0e:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8007c10:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
- 8007c14:	60bb      	str	r3, [r7, #8]
- 8007c16:	68bb      	ldr	r3, [r7, #8]
-
-    /* Enable write access to Backup domain */
-    PWR->CR1 |= PWR_CR1_DBP;
- 8007c18:	4b35      	ldr	r3, [pc, #212]	; (8007cf0 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 8007c1a:	681b      	ldr	r3, [r3, #0]
- 8007c1c:	4a34      	ldr	r2, [pc, #208]	; (8007cf0 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 8007c1e:	f443 7380 	orr.w	r3, r3, #256	; 0x100
- 8007c22:	6013      	str	r3, [r2, #0]
-
-    /* Get Start Tick*/
-    tickstart = HAL_GetTick();
- 8007c24:	f7fc fc64 	bl	80044f0 <HAL_GetTick>
- 8007c28:	6178      	str	r0, [r7, #20]
-
-    /* Wait for Backup domain Write protection disable */
-    while((PWR->CR1 & PWR_CR1_DBP) == RESET)
- 8007c2a:	e008      	b.n	8007c3e <HAL_RCCEx_PeriphCLKConfig+0x122>
-    {
-      if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- 8007c2c:	f7fc fc60 	bl	80044f0 <HAL_GetTick>
- 8007c30:	4602      	mov	r2, r0
- 8007c32:	697b      	ldr	r3, [r7, #20]
- 8007c34:	1ad3      	subs	r3, r2, r3
- 8007c36:	2b64      	cmp	r3, #100	; 0x64
- 8007c38:	d901      	bls.n	8007c3e <HAL_RCCEx_PeriphCLKConfig+0x122>
-      {
-        return HAL_TIMEOUT;
- 8007c3a:	2303      	movs	r3, #3
- 8007c3c:	e355      	b.n	80082ea <HAL_RCCEx_PeriphCLKConfig+0x7ce>
-    while((PWR->CR1 & PWR_CR1_DBP) == RESET)
- 8007c3e:	4b2c      	ldr	r3, [pc, #176]	; (8007cf0 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
- 8007c40:	681b      	ldr	r3, [r3, #0]
- 8007c42:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 8007c46:	2b00      	cmp	r3, #0
- 8007c48:	d0f0      	beq.n	8007c2c <HAL_RCCEx_PeriphCLKConfig+0x110>
-      }
-    }
-
-    /* Reset the Backup domain only if the RTC Clock source selection is modified */
-    tmpreg0 = (RCC->BDCR & RCC_BDCR_RTCSEL);
- 8007c4a:	4b28      	ldr	r3, [pc, #160]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007c4c:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 8007c4e:	f403 7340 	and.w	r3, r3, #768	; 0x300
- 8007c52:	613b      	str	r3, [r7, #16]
-
-    if((tmpreg0 != 0x00000000U) && (tmpreg0 != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
- 8007c54:	693b      	ldr	r3, [r7, #16]
- 8007c56:	2b00      	cmp	r3, #0
- 8007c58:	d035      	beq.n	8007cc6 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
- 8007c5a:	687b      	ldr	r3, [r7, #4]
- 8007c5c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8007c5e:	f403 7340 	and.w	r3, r3, #768	; 0x300
- 8007c62:	693a      	ldr	r2, [r7, #16]
- 8007c64:	429a      	cmp	r2, r3
- 8007c66:	d02e      	beq.n	8007cc6 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
-    {
-      /* Store the content of BDCR register before the reset of Backup Domain */
-      tmpreg0 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
- 8007c68:	4b20      	ldr	r3, [pc, #128]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007c6a:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 8007c6c:	f423 7340 	bic.w	r3, r3, #768	; 0x300
- 8007c70:	613b      	str	r3, [r7, #16]
-
-      /* RTC Clock selection can be changed only if the Backup Domain is reset */
-      __HAL_RCC_BACKUPRESET_FORCE();
- 8007c72:	4b1e      	ldr	r3, [pc, #120]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007c74:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 8007c76:	4a1d      	ldr	r2, [pc, #116]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007c78:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
- 8007c7c:	6713      	str	r3, [r2, #112]	; 0x70
-      __HAL_RCC_BACKUPRESET_RELEASE();
- 8007c7e:	4b1b      	ldr	r3, [pc, #108]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007c80:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 8007c82:	4a1a      	ldr	r2, [pc, #104]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007c84:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
- 8007c88:	6713      	str	r3, [r2, #112]	; 0x70
-
-      /* Restore the Content of BDCR register */
-      RCC->BDCR = tmpreg0;
- 8007c8a:	4a18      	ldr	r2, [pc, #96]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007c8c:	693b      	ldr	r3, [r7, #16]
- 8007c8e:	6713      	str	r3, [r2, #112]	; 0x70
-
-      /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
-      if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
- 8007c90:	4b16      	ldr	r3, [pc, #88]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007c92:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 8007c94:	f003 0301 	and.w	r3, r3, #1
- 8007c98:	2b01      	cmp	r3, #1
- 8007c9a:	d114      	bne.n	8007cc6 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
-      {
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
- 8007c9c:	f7fc fc28 	bl	80044f0 <HAL_GetTick>
- 8007ca0:	6178      	str	r0, [r7, #20]
-
-        /* Wait till LSE is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8007ca2:	e00a      	b.n	8007cba <HAL_RCCEx_PeriphCLKConfig+0x19e>
-        {
-          if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 8007ca4:	f7fc fc24 	bl	80044f0 <HAL_GetTick>
- 8007ca8:	4602      	mov	r2, r0
- 8007caa:	697b      	ldr	r3, [r7, #20]
- 8007cac:	1ad3      	subs	r3, r2, r3
- 8007cae:	f241 3288 	movw	r2, #5000	; 0x1388
- 8007cb2:	4293      	cmp	r3, r2
- 8007cb4:	d901      	bls.n	8007cba <HAL_RCCEx_PeriphCLKConfig+0x19e>
-          {
-            return HAL_TIMEOUT;
- 8007cb6:	2303      	movs	r3, #3
- 8007cb8:	e317      	b.n	80082ea <HAL_RCCEx_PeriphCLKConfig+0x7ce>
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8007cba:	4b0c      	ldr	r3, [pc, #48]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007cbc:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 8007cbe:	f003 0302 	and.w	r3, r3, #2
- 8007cc2:	2b00      	cmp	r3, #0
- 8007cc4:	d0ee      	beq.n	8007ca4 <HAL_RCCEx_PeriphCLKConfig+0x188>
-          }
-        }
-      }
-    }
-    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- 8007cc6:	687b      	ldr	r3, [r7, #4]
- 8007cc8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8007cca:	f403 7340 	and.w	r3, r3, #768	; 0x300
- 8007cce:	f5b3 7f40 	cmp.w	r3, #768	; 0x300
- 8007cd2:	d111      	bne.n	8007cf8 <HAL_RCCEx_PeriphCLKConfig+0x1dc>
- 8007cd4:	4b05      	ldr	r3, [pc, #20]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007cd6:	689b      	ldr	r3, [r3, #8]
- 8007cd8:	f423 12f8 	bic.w	r2, r3, #2031616	; 0x1f0000
- 8007cdc:	687b      	ldr	r3, [r7, #4]
- 8007cde:	6b19      	ldr	r1, [r3, #48]	; 0x30
- 8007ce0:	4b04      	ldr	r3, [pc, #16]	; (8007cf4 <HAL_RCCEx_PeriphCLKConfig+0x1d8>)
- 8007ce2:	400b      	ands	r3, r1
- 8007ce4:	4901      	ldr	r1, [pc, #4]	; (8007cec <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
- 8007ce6:	4313      	orrs	r3, r2
- 8007ce8:	608b      	str	r3, [r1, #8]
- 8007cea:	e00b      	b.n	8007d04 <HAL_RCCEx_PeriphCLKConfig+0x1e8>
- 8007cec:	40023800 	.word	0x40023800
- 8007cf0:	40007000 	.word	0x40007000
- 8007cf4:	0ffffcff 	.word	0x0ffffcff
- 8007cf8:	4bb0      	ldr	r3, [pc, #704]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007cfa:	689b      	ldr	r3, [r3, #8]
- 8007cfc:	4aaf      	ldr	r2, [pc, #700]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007cfe:	f423 13f8 	bic.w	r3, r3, #2031616	; 0x1f0000
- 8007d02:	6093      	str	r3, [r2, #8]
- 8007d04:	4bad      	ldr	r3, [pc, #692]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007d06:	6f1a      	ldr	r2, [r3, #112]	; 0x70
- 8007d08:	687b      	ldr	r3, [r7, #4]
- 8007d0a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8007d0c:	f3c3 030b 	ubfx	r3, r3, #0, #12
- 8007d10:	49aa      	ldr	r1, [pc, #680]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007d12:	4313      	orrs	r3, r2
- 8007d14:	670b      	str	r3, [r1, #112]	; 0x70
-  }
-
-  /*------------------------------------ TIM configuration --------------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
- 8007d16:	687b      	ldr	r3, [r7, #4]
- 8007d18:	681b      	ldr	r3, [r3, #0]
- 8007d1a:	f003 0310 	and.w	r3, r3, #16
- 8007d1e:	2b00      	cmp	r3, #0
- 8007d20:	d010      	beq.n	8007d44 <HAL_RCCEx_PeriphCLKConfig+0x228>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));
-
-    /* Configure Timer Prescaler */
-    __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
- 8007d22:	4ba6      	ldr	r3, [pc, #664]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007d24:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
- 8007d28:	4aa4      	ldr	r2, [pc, #656]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007d2a:	f023 7380 	bic.w	r3, r3, #16777216	; 0x1000000
- 8007d2e:	f8c2 308c 	str.w	r3, [r2, #140]	; 0x8c
- 8007d32:	4ba2      	ldr	r3, [pc, #648]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007d34:	f8d3 208c 	ldr.w	r2, [r3, #140]	; 0x8c
- 8007d38:	687b      	ldr	r3, [r7, #4]
- 8007d3a:	6b9b      	ldr	r3, [r3, #56]	; 0x38
- 8007d3c:	499f      	ldr	r1, [pc, #636]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007d3e:	4313      	orrs	r3, r2
- 8007d40:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
-  }
-
-  /*-------------------------------------- I2C1 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
- 8007d44:	687b      	ldr	r3, [r7, #4]
- 8007d46:	681b      	ldr	r3, [r3, #0]
- 8007d48:	f403 4380 	and.w	r3, r3, #16384	; 0x4000
- 8007d4c:	2b00      	cmp	r3, #0
- 8007d4e:	d00a      	beq.n	8007d66 <HAL_RCCEx_PeriphCLKConfig+0x24a>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
-
-    /* Configure the I2C1 clock source */
-    __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
- 8007d50:	4b9a      	ldr	r3, [pc, #616]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007d52:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007d56:	f423 3240 	bic.w	r2, r3, #196608	; 0x30000
- 8007d5a:	687b      	ldr	r3, [r7, #4]
- 8007d5c:	6e5b      	ldr	r3, [r3, #100]	; 0x64
- 8007d5e:	4997      	ldr	r1, [pc, #604]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007d60:	4313      	orrs	r3, r2
- 8007d62:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- I2C2 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
- 8007d66:	687b      	ldr	r3, [r7, #4]
- 8007d68:	681b      	ldr	r3, [r3, #0]
- 8007d6a:	f403 4300 	and.w	r3, r3, #32768	; 0x8000
- 8007d6e:	2b00      	cmp	r3, #0
- 8007d70:	d00a      	beq.n	8007d88 <HAL_RCCEx_PeriphCLKConfig+0x26c>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
-
-    /* Configure the I2C2 clock source */
-    __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
- 8007d72:	4b92      	ldr	r3, [pc, #584]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007d74:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007d78:	f423 2240 	bic.w	r2, r3, #786432	; 0xc0000
- 8007d7c:	687b      	ldr	r3, [r7, #4]
- 8007d7e:	6e9b      	ldr	r3, [r3, #104]	; 0x68
- 8007d80:	498e      	ldr	r1, [pc, #568]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007d82:	4313      	orrs	r3, r2
- 8007d84:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- I2C3 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
- 8007d88:	687b      	ldr	r3, [r7, #4]
- 8007d8a:	681b      	ldr	r3, [r3, #0]
- 8007d8c:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
- 8007d90:	2b00      	cmp	r3, #0
- 8007d92:	d00a      	beq.n	8007daa <HAL_RCCEx_PeriphCLKConfig+0x28e>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
-
-    /* Configure the I2C3 clock source */
-    __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
- 8007d94:	4b89      	ldr	r3, [pc, #548]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007d96:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007d9a:	f423 1240 	bic.w	r2, r3, #3145728	; 0x300000
- 8007d9e:	687b      	ldr	r3, [r7, #4]
- 8007da0:	6edb      	ldr	r3, [r3, #108]	; 0x6c
- 8007da2:	4986      	ldr	r1, [pc, #536]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007da4:	4313      	orrs	r3, r2
- 8007da6:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- I2C4 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
- 8007daa:	687b      	ldr	r3, [r7, #4]
- 8007dac:	681b      	ldr	r3, [r3, #0]
- 8007dae:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
- 8007db2:	2b00      	cmp	r3, #0
- 8007db4:	d00a      	beq.n	8007dcc <HAL_RCCEx_PeriphCLKConfig+0x2b0>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));
-
-    /* Configure the I2C4 clock source */
-    __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
- 8007db6:	4b81      	ldr	r3, [pc, #516]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007db8:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007dbc:	f423 0240 	bic.w	r2, r3, #12582912	; 0xc00000
- 8007dc0:	687b      	ldr	r3, [r7, #4]
- 8007dc2:	6f1b      	ldr	r3, [r3, #112]	; 0x70
- 8007dc4:	497d      	ldr	r1, [pc, #500]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007dc6:	4313      	orrs	r3, r2
- 8007dc8:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- USART1 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
- 8007dcc:	687b      	ldr	r3, [r7, #4]
- 8007dce:	681b      	ldr	r3, [r3, #0]
- 8007dd0:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 8007dd4:	2b00      	cmp	r3, #0
- 8007dd6:	d00a      	beq.n	8007dee <HAL_RCCEx_PeriphCLKConfig+0x2d2>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
-
-    /* Configure the USART1 clock source */
-    __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
- 8007dd8:	4b78      	ldr	r3, [pc, #480]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007dda:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007dde:	f023 0203 	bic.w	r2, r3, #3
- 8007de2:	687b      	ldr	r3, [r7, #4]
- 8007de4:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8007de6:	4975      	ldr	r1, [pc, #468]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007de8:	4313      	orrs	r3, r2
- 8007dea:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- USART2 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
- 8007dee:	687b      	ldr	r3, [r7, #4]
- 8007df0:	681b      	ldr	r3, [r3, #0]
- 8007df2:	f003 0380 	and.w	r3, r3, #128	; 0x80
- 8007df6:	2b00      	cmp	r3, #0
- 8007df8:	d00a      	beq.n	8007e10 <HAL_RCCEx_PeriphCLKConfig+0x2f4>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
-
-    /* Configure the USART2 clock source */
-    __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
- 8007dfa:	4b70      	ldr	r3, [pc, #448]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007dfc:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007e00:	f023 020c 	bic.w	r2, r3, #12
- 8007e04:	687b      	ldr	r3, [r7, #4]
- 8007e06:	6c9b      	ldr	r3, [r3, #72]	; 0x48
- 8007e08:	496c      	ldr	r1, [pc, #432]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007e0a:	4313      	orrs	r3, r2
- 8007e0c:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- USART3 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
- 8007e10:	687b      	ldr	r3, [r7, #4]
- 8007e12:	681b      	ldr	r3, [r3, #0]
- 8007e14:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 8007e18:	2b00      	cmp	r3, #0
- 8007e1a:	d00a      	beq.n	8007e32 <HAL_RCCEx_PeriphCLKConfig+0x316>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
-
-    /* Configure the USART3 clock source */
-    __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
- 8007e1c:	4b67      	ldr	r3, [pc, #412]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007e1e:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007e22:	f023 0230 	bic.w	r2, r3, #48	; 0x30
- 8007e26:	687b      	ldr	r3, [r7, #4]
- 8007e28:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
- 8007e2a:	4964      	ldr	r1, [pc, #400]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007e2c:	4313      	orrs	r3, r2
- 8007e2e:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- UART4 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4)
- 8007e32:	687b      	ldr	r3, [r7, #4]
- 8007e34:	681b      	ldr	r3, [r3, #0]
- 8007e36:	f403 7300 	and.w	r3, r3, #512	; 0x200
- 8007e3a:	2b00      	cmp	r3, #0
- 8007e3c:	d00a      	beq.n	8007e54 <HAL_RCCEx_PeriphCLKConfig+0x338>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection));
-
-    /* Configure the UART4 clock source */
-    __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
- 8007e3e:	4b5f      	ldr	r3, [pc, #380]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007e40:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007e44:	f023 02c0 	bic.w	r2, r3, #192	; 0xc0
- 8007e48:	687b      	ldr	r3, [r7, #4]
- 8007e4a:	6d1b      	ldr	r3, [r3, #80]	; 0x50
- 8007e4c:	495b      	ldr	r1, [pc, #364]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007e4e:	4313      	orrs	r3, r2
- 8007e50:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- UART5 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
- 8007e54:	687b      	ldr	r3, [r7, #4]
- 8007e56:	681b      	ldr	r3, [r3, #0]
- 8007e58:	f403 6380 	and.w	r3, r3, #1024	; 0x400
- 8007e5c:	2b00      	cmp	r3, #0
- 8007e5e:	d00a      	beq.n	8007e76 <HAL_RCCEx_PeriphCLKConfig+0x35a>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection));
-
-    /* Configure the UART5 clock source */
-    __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection);
- 8007e60:	4b56      	ldr	r3, [pc, #344]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007e62:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007e66:	f423 7240 	bic.w	r2, r3, #768	; 0x300
- 8007e6a:	687b      	ldr	r3, [r7, #4]
- 8007e6c:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 8007e6e:	4953      	ldr	r1, [pc, #332]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007e70:	4313      	orrs	r3, r2
- 8007e72:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- USART6 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART6) == RCC_PERIPHCLK_USART6)
- 8007e76:	687b      	ldr	r3, [r7, #4]
- 8007e78:	681b      	ldr	r3, [r3, #0]
- 8007e7a:	f403 6300 	and.w	r3, r3, #2048	; 0x800
- 8007e7e:	2b00      	cmp	r3, #0
- 8007e80:	d00a      	beq.n	8007e98 <HAL_RCCEx_PeriphCLKConfig+0x37c>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_USART6CLKSOURCE(PeriphClkInit->Usart6ClockSelection));
-
-    /* Configure the USART6 clock source */
-    __HAL_RCC_USART6_CONFIG(PeriphClkInit->Usart6ClockSelection);
- 8007e82:	4b4e      	ldr	r3, [pc, #312]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007e84:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007e88:	f423 6240 	bic.w	r2, r3, #3072	; 0xc00
- 8007e8c:	687b      	ldr	r3, [r7, #4]
- 8007e8e:	6d9b      	ldr	r3, [r3, #88]	; 0x58
- 8007e90:	494a      	ldr	r1, [pc, #296]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007e92:	4313      	orrs	r3, r2
- 8007e94:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- UART7 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART7) == RCC_PERIPHCLK_UART7)
- 8007e98:	687b      	ldr	r3, [r7, #4]
- 8007e9a:	681b      	ldr	r3, [r3, #0]
- 8007e9c:	f403 5380 	and.w	r3, r3, #4096	; 0x1000
- 8007ea0:	2b00      	cmp	r3, #0
- 8007ea2:	d00a      	beq.n	8007eba <HAL_RCCEx_PeriphCLKConfig+0x39e>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection));
-
-    /* Configure the UART7 clock source */
-    __HAL_RCC_UART7_CONFIG(PeriphClkInit->Uart7ClockSelection);
- 8007ea4:	4b45      	ldr	r3, [pc, #276]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007ea6:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007eaa:	f423 5240 	bic.w	r2, r3, #12288	; 0x3000
- 8007eae:	687b      	ldr	r3, [r7, #4]
- 8007eb0:	6ddb      	ldr	r3, [r3, #92]	; 0x5c
- 8007eb2:	4942      	ldr	r1, [pc, #264]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007eb4:	4313      	orrs	r3, r2
- 8007eb6:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- UART8 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART8) == RCC_PERIPHCLK_UART8)
- 8007eba:	687b      	ldr	r3, [r7, #4]
- 8007ebc:	681b      	ldr	r3, [r3, #0]
- 8007ebe:	f403 5300 	and.w	r3, r3, #8192	; 0x2000
- 8007ec2:	2b00      	cmp	r3, #0
- 8007ec4:	d00a      	beq.n	8007edc <HAL_RCCEx_PeriphCLKConfig+0x3c0>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_UART8CLKSOURCE(PeriphClkInit->Uart8ClockSelection));
-
-    /* Configure the UART8 clock source */
-    __HAL_RCC_UART8_CONFIG(PeriphClkInit->Uart8ClockSelection);
- 8007ec6:	4b3d      	ldr	r3, [pc, #244]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007ec8:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007ecc:	f423 4240 	bic.w	r2, r3, #49152	; 0xc000
- 8007ed0:	687b      	ldr	r3, [r7, #4]
- 8007ed2:	6e1b      	ldr	r3, [r3, #96]	; 0x60
- 8007ed4:	4939      	ldr	r1, [pc, #228]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007ed6:	4313      	orrs	r3, r2
- 8007ed8:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*--------------------------------------- CEC Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
- 8007edc:	687b      	ldr	r3, [r7, #4]
- 8007ede:	681b      	ldr	r3, [r3, #0]
- 8007ee0:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
- 8007ee4:	2b00      	cmp	r3, #0
- 8007ee6:	d00a      	beq.n	8007efe <HAL_RCCEx_PeriphCLKConfig+0x3e2>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
-
-    /* Configure the CEC clock source */
-    __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
- 8007ee8:	4b34      	ldr	r3, [pc, #208]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007eea:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007eee:	f023 6280 	bic.w	r2, r3, #67108864	; 0x4000000
- 8007ef2:	687b      	ldr	r3, [r7, #4]
- 8007ef4:	6f9b      	ldr	r3, [r3, #120]	; 0x78
- 8007ef6:	4931      	ldr	r1, [pc, #196]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007ef8:	4313      	orrs	r3, r2
- 8007efa:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-
-  /*-------------------------------------- CK48 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
- 8007efe:	687b      	ldr	r3, [r7, #4]
- 8007f00:	681b      	ldr	r3, [r3, #0]
- 8007f02:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
- 8007f06:	2b00      	cmp	r3, #0
- 8007f08:	d011      	beq.n	8007f2e <HAL_RCCEx_PeriphCLKConfig+0x412>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_CLK48SOURCE(PeriphClkInit->Clk48ClockSelection));
-
-    /* Configure the CLK48 source */
-    __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
- 8007f0a:	4b2c      	ldr	r3, [pc, #176]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007f0c:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007f10:	f023 6200 	bic.w	r2, r3, #134217728	; 0x8000000
- 8007f14:	687b      	ldr	r3, [r7, #4]
- 8007f16:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
- 8007f18:	4928      	ldr	r1, [pc, #160]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007f1a:	4313      	orrs	r3, r2
- 8007f1c:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-
-    /* Enable the PLLSAI when it's used as clock source for CK48 */
-    if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP)
- 8007f20:	687b      	ldr	r3, [r7, #4]
- 8007f22:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
- 8007f24:	f1b3 6f00 	cmp.w	r3, #134217728	; 0x8000000
- 8007f28:	d101      	bne.n	8007f2e <HAL_RCCEx_PeriphCLKConfig+0x412>
-    {
-      pllsaiused = 1;
- 8007f2a:	2301      	movs	r3, #1
- 8007f2c:	61bb      	str	r3, [r7, #24]
-    }
-  }
-
-  /*-------------------------------------- LTDC Configuration -----------------------------------*/
-#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC)
- 8007f2e:	687b      	ldr	r3, [r7, #4]
- 8007f30:	681b      	ldr	r3, [r3, #0]
- 8007f32:	f003 0308 	and.w	r3, r3, #8
- 8007f36:	2b00      	cmp	r3, #0
- 8007f38:	d001      	beq.n	8007f3e <HAL_RCCEx_PeriphCLKConfig+0x422>
-  {
-    pllsaiused = 1;
- 8007f3a:	2301      	movs	r3, #1
- 8007f3c:	61bb      	str	r3, [r7, #24]
-  }
-#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx */
-
-  /*-------------------------------------- LPTIM1 Configuration -----------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
- 8007f3e:	687b      	ldr	r3, [r7, #4]
- 8007f40:	681b      	ldr	r3, [r3, #0]
- 8007f42:	f403 2380 	and.w	r3, r3, #262144	; 0x40000
- 8007f46:	2b00      	cmp	r3, #0
- 8007f48:	d00a      	beq.n	8007f60 <HAL_RCCEx_PeriphCLKConfig+0x444>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection));
-
-    /* Configure the LTPIM1 clock source */
-    __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
- 8007f4a:	4b1c      	ldr	r3, [pc, #112]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007f4c:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007f50:	f023 7240 	bic.w	r2, r3, #50331648	; 0x3000000
- 8007f54:	687b      	ldr	r3, [r7, #4]
- 8007f56:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 8007f58:	4918      	ldr	r1, [pc, #96]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007f5a:	4313      	orrs	r3, r2
- 8007f5c:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-   }
-
-  /*------------------------------------- SDMMC1 Configuration ------------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)
- 8007f60:	687b      	ldr	r3, [r7, #4]
- 8007f62:	681b      	ldr	r3, [r3, #0]
- 8007f64:	f403 0300 	and.w	r3, r3, #8388608	; 0x800000
- 8007f68:	2b00      	cmp	r3, #0
- 8007f6a:	d00b      	beq.n	8007f84 <HAL_RCCEx_PeriphCLKConfig+0x468>
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection));
-
-    /* Configure the SDMMC1 clock source */
-    __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection);
- 8007f6c:	4b13      	ldr	r3, [pc, #76]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007f6e:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 8007f72:	f023 5280 	bic.w	r2, r3, #268435456	; 0x10000000
- 8007f76:	687b      	ldr	r3, [r7, #4]
- 8007f78:	f8d3 3080 	ldr.w	r3, [r3, #128]	; 0x80
- 8007f7c:	490f      	ldr	r1, [pc, #60]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007f7e:	4313      	orrs	r3, r2
- 8007f80:	f8c1 3090 	str.w	r3, [r1, #144]	; 0x90
-  }
-#endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
-
-  /*-------------------------------------- PLLI2S Configuration ---------------------------------*/
-  /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S or SPDIF-RX */
-  if((plli2sused == 1) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
- 8007f84:	69fb      	ldr	r3, [r7, #28]
- 8007f86:	2b01      	cmp	r3, #1
- 8007f88:	d005      	beq.n	8007f96 <HAL_RCCEx_PeriphCLKConfig+0x47a>
- 8007f8a:	687b      	ldr	r3, [r7, #4]
- 8007f8c:	681b      	ldr	r3, [r3, #0]
- 8007f8e:	f1b3 7f00 	cmp.w	r3, #33554432	; 0x2000000
- 8007f92:	f040 80d8 	bne.w	8008146 <HAL_RCCEx_PeriphCLKConfig+0x62a>
-  {
-    /* Disable the PLLI2S */
-    __HAL_RCC_PLLI2S_DISABLE();
- 8007f96:	4b09      	ldr	r3, [pc, #36]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007f98:	681b      	ldr	r3, [r3, #0]
- 8007f9a:	4a08      	ldr	r2, [pc, #32]	; (8007fbc <HAL_RCCEx_PeriphCLKConfig+0x4a0>)
- 8007f9c:	f023 6380 	bic.w	r3, r3, #67108864	; 0x4000000
- 8007fa0:	6013      	str	r3, [r2, #0]
-
-    /* Get Start Tick*/
-    tickstart = HAL_GetTick();
- 8007fa2:	f7fc faa5 	bl	80044f0 <HAL_GetTick>
- 8007fa6:	6178      	str	r0, [r7, #20]
-
-    /* Wait till PLLI2S is disabled */
-    while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  != RESET)
- 8007fa8:	e00a      	b.n	8007fc0 <HAL_RCCEx_PeriphCLKConfig+0x4a4>
-    {
-      if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
- 8007faa:	f7fc faa1 	bl	80044f0 <HAL_GetTick>
- 8007fae:	4602      	mov	r2, r0
- 8007fb0:	697b      	ldr	r3, [r7, #20]
- 8007fb2:	1ad3      	subs	r3, r2, r3
- 8007fb4:	2b64      	cmp	r3, #100	; 0x64
- 8007fb6:	d903      	bls.n	8007fc0 <HAL_RCCEx_PeriphCLKConfig+0x4a4>
-      {
-        /* return in case of Timeout detected */
-        return HAL_TIMEOUT;
- 8007fb8:	2303      	movs	r3, #3
- 8007fba:	e196      	b.n	80082ea <HAL_RCCEx_PeriphCLKConfig+0x7ce>
- 8007fbc:	40023800 	.word	0x40023800
-    while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  != RESET)
- 8007fc0:	4b6c      	ldr	r3, [pc, #432]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 8007fc2:	681b      	ldr	r3, [r3, #0]
- 8007fc4:	f003 6300 	and.w	r3, r3, #134217728	; 0x8000000
- 8007fc8:	2b00      	cmp	r3, #0
- 8007fca:	d1ee      	bne.n	8007faa <HAL_RCCEx_PeriphCLKConfig+0x48e>
-
-    /* check for common PLLI2S Parameters */
-    assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
-
-    /*----------------- In Case of PLLI2S is selected as source clock for I2S -------------------*/
-    if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S)))
- 8007fcc:	687b      	ldr	r3, [r7, #4]
- 8007fce:	681b      	ldr	r3, [r3, #0]
- 8007fd0:	f003 0301 	and.w	r3, r3, #1
- 8007fd4:	2b00      	cmp	r3, #0
- 8007fd6:	d021      	beq.n	800801c <HAL_RCCEx_PeriphCLKConfig+0x500>
- 8007fd8:	687b      	ldr	r3, [r7, #4]
- 8007fda:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 8007fdc:	2b00      	cmp	r3, #0
- 8007fde:	d11d      	bne.n	800801c <HAL_RCCEx_PeriphCLKConfig+0x500>
-    {
-      /* check for Parameters */
-      assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
-
-      /* Read PLLI2SP and PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */
-      tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
- 8007fe0:	4b64      	ldr	r3, [pc, #400]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 8007fe2:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
- 8007fe6:	0c1b      	lsrs	r3, r3, #16
- 8007fe8:	f003 0303 	and.w	r3, r3, #3
- 8007fec:	613b      	str	r3, [r7, #16]
-      tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- 8007fee:	4b61      	ldr	r3, [pc, #388]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 8007ff0:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
- 8007ff4:	0e1b      	lsrs	r3, r3, #24
- 8007ff6:	f003 030f 	and.w	r3, r3, #15
- 8007ffa:	60fb      	str	r3, [r7, #12]
-      /* Configure the PLLI2S division factors */
-      /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
-      /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
-      __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , tmpreg0, tmpreg1, PeriphClkInit->PLLI2S.PLLI2SR);
- 8007ffc:	687b      	ldr	r3, [r7, #4]
- 8007ffe:	685b      	ldr	r3, [r3, #4]
- 8008000:	019a      	lsls	r2, r3, #6
- 8008002:	693b      	ldr	r3, [r7, #16]
- 8008004:	041b      	lsls	r3, r3, #16
- 8008006:	431a      	orrs	r2, r3
- 8008008:	68fb      	ldr	r3, [r7, #12]
- 800800a:	061b      	lsls	r3, r3, #24
- 800800c:	431a      	orrs	r2, r3
- 800800e:	687b      	ldr	r3, [r7, #4]
- 8008010:	689b      	ldr	r3, [r3, #8]
- 8008012:	071b      	lsls	r3, r3, #28
- 8008014:	4957      	ldr	r1, [pc, #348]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 8008016:	4313      	orrs	r3, r2
- 8008018:	f8c1 3084 	str.w	r3, [r1, #132]	; 0x84
-    }
-
-    /*----------------- In Case of PLLI2S is selected as source clock for SAI -------------------*/
-    if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
- 800801c:	687b      	ldr	r3, [r7, #4]
- 800801e:	681b      	ldr	r3, [r3, #0]
- 8008020:	f403 2300 	and.w	r3, r3, #524288	; 0x80000
- 8008024:	2b00      	cmp	r3, #0
- 8008026:	d004      	beq.n	8008032 <HAL_RCCEx_PeriphCLKConfig+0x516>
- 8008028:	687b      	ldr	r3, [r7, #4]
- 800802a:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 800802c:	f5b3 1f80 	cmp.w	r3, #1048576	; 0x100000
- 8008030:	d00a      	beq.n	8008048 <HAL_RCCEx_PeriphCLKConfig+0x52c>
-       ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
- 8008032:	687b      	ldr	r3, [r7, #4]
- 8008034:	681b      	ldr	r3, [r3, #0]
- 8008036:	f403 1380 	and.w	r3, r3, #1048576	; 0x100000
-    if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
- 800803a:	2b00      	cmp	r3, #0
- 800803c:	d02e      	beq.n	800809c <HAL_RCCEx_PeriphCLKConfig+0x580>
-       ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
- 800803e:	687b      	ldr	r3, [r7, #4]
- 8008040:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8008042:	f5b3 0f80 	cmp.w	r3, #4194304	; 0x400000
- 8008046:	d129      	bne.n	800809c <HAL_RCCEx_PeriphCLKConfig+0x580>
-      assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
-      /* Check for PLLI2S/DIVQ parameters */
-      assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
-
-      /* Read PLLI2SP and PLLI2SR values from PLLI2SCFGR register (this value is not needed for SAI configuration) */
-      tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos);
- 8008048:	4b4a      	ldr	r3, [pc, #296]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 800804a:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
- 800804e:	0c1b      	lsrs	r3, r3, #16
- 8008050:	f003 0303 	and.w	r3, r3, #3
- 8008054:	613b      	str	r3, [r7, #16]
-      tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- 8008056:	4b47      	ldr	r3, [pc, #284]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 8008058:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
- 800805c:	0f1b      	lsrs	r3, r3, #28
- 800805e:	f003 0307 	and.w	r3, r3, #7
- 8008062:	60fb      	str	r3, [r7, #12]
-      /* Configure the PLLI2S division factors */
-      /* PLLI2S_VCO Input  = PLL_SOURCE/PLLM */
-      /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
-      /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
-      __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, tmpreg0, PeriphClkInit->PLLI2S.PLLI2SQ, tmpreg1);
- 8008064:	687b      	ldr	r3, [r7, #4]
- 8008066:	685b      	ldr	r3, [r3, #4]
- 8008068:	019a      	lsls	r2, r3, #6
- 800806a:	693b      	ldr	r3, [r7, #16]
- 800806c:	041b      	lsls	r3, r3, #16
- 800806e:	431a      	orrs	r2, r3
- 8008070:	687b      	ldr	r3, [r7, #4]
- 8008072:	68db      	ldr	r3, [r3, #12]
- 8008074:	061b      	lsls	r3, r3, #24
- 8008076:	431a      	orrs	r2, r3
- 8008078:	68fb      	ldr	r3, [r7, #12]
- 800807a:	071b      	lsls	r3, r3, #28
- 800807c:	493d      	ldr	r1, [pc, #244]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 800807e:	4313      	orrs	r3, r2
- 8008080:	f8c1 3084 	str.w	r3, [r1, #132]	; 0x84
-
-      /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
-      __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
- 8008084:	4b3b      	ldr	r3, [pc, #236]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 8008086:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
- 800808a:	f023 021f 	bic.w	r2, r3, #31
- 800808e:	687b      	ldr	r3, [r7, #4]
- 8008090:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8008092:	3b01      	subs	r3, #1
- 8008094:	4937      	ldr	r1, [pc, #220]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 8008096:	4313      	orrs	r3, r2
- 8008098:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
-    }
-
-    /*----------------- In Case of PLLI2S is selected as source clock for SPDIF-RX -------------------*/
-    if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
- 800809c:	687b      	ldr	r3, [r7, #4]
- 800809e:	681b      	ldr	r3, [r3, #0]
- 80080a0:	f003 7380 	and.w	r3, r3, #16777216	; 0x1000000
- 80080a4:	2b00      	cmp	r3, #0
- 80080a6:	d01d      	beq.n	80080e4 <HAL_RCCEx_PeriphCLKConfig+0x5c8>
-    {
-      /* check for Parameters */
-      assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
-
-     /* Read PLLI2SR value from PLLI2SCFGR register (this value is not needed for SPDIF-RX configuration) */
-      tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- 80080a8:	4b32      	ldr	r3, [pc, #200]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 80080aa:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
- 80080ae:	0e1b      	lsrs	r3, r3, #24
- 80080b0:	f003 030f 	and.w	r3, r3, #15
- 80080b4:	613b      	str	r3, [r7, #16]
-      tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- 80080b6:	4b2f      	ldr	r3, [pc, #188]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 80080b8:	f8d3 3084 	ldr.w	r3, [r3, #132]	; 0x84
- 80080bc:	0f1b      	lsrs	r3, r3, #28
- 80080be:	f003 0307 	and.w	r3, r3, #7
- 80080c2:	60fb      	str	r3, [r7, #12]
-      /* Configure the PLLI2S division factors */
-      /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
-      /* SPDIFCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
-      __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, tmpreg0, tmpreg1);
- 80080c4:	687b      	ldr	r3, [r7, #4]
- 80080c6:	685b      	ldr	r3, [r3, #4]
- 80080c8:	019a      	lsls	r2, r3, #6
- 80080ca:	687b      	ldr	r3, [r7, #4]
- 80080cc:	691b      	ldr	r3, [r3, #16]
- 80080ce:	041b      	lsls	r3, r3, #16
- 80080d0:	431a      	orrs	r2, r3
- 80080d2:	693b      	ldr	r3, [r7, #16]
- 80080d4:	061b      	lsls	r3, r3, #24
- 80080d6:	431a      	orrs	r2, r3
- 80080d8:	68fb      	ldr	r3, [r7, #12]
- 80080da:	071b      	lsls	r3, r3, #28
- 80080dc:	4925      	ldr	r1, [pc, #148]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 80080de:	4313      	orrs	r3, r2
- 80080e0:	f8c1 3084 	str.w	r3, [r1, #132]	; 0x84
-    }
-
-    /*----------------- In Case of PLLI2S is just selected  -----------------*/
-    if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
- 80080e4:	687b      	ldr	r3, [r7, #4]
- 80080e6:	681b      	ldr	r3, [r3, #0]
- 80080e8:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
- 80080ec:	2b00      	cmp	r3, #0
- 80080ee:	d011      	beq.n	8008114 <HAL_RCCEx_PeriphCLKConfig+0x5f8>
-      assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
-
-      /* Configure the PLLI2S division factors */
-      /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLI2SM) */
-      /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
-      __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
- 80080f0:	687b      	ldr	r3, [r7, #4]
- 80080f2:	685b      	ldr	r3, [r3, #4]
- 80080f4:	019a      	lsls	r2, r3, #6
- 80080f6:	687b      	ldr	r3, [r7, #4]
- 80080f8:	691b      	ldr	r3, [r3, #16]
- 80080fa:	041b      	lsls	r3, r3, #16
- 80080fc:	431a      	orrs	r2, r3
- 80080fe:	687b      	ldr	r3, [r7, #4]
- 8008100:	68db      	ldr	r3, [r3, #12]
- 8008102:	061b      	lsls	r3, r3, #24
- 8008104:	431a      	orrs	r2, r3
- 8008106:	687b      	ldr	r3, [r7, #4]
- 8008108:	689b      	ldr	r3, [r3, #8]
- 800810a:	071b      	lsls	r3, r3, #28
- 800810c:	4919      	ldr	r1, [pc, #100]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 800810e:	4313      	orrs	r3, r2
- 8008110:	f8c1 3084 	str.w	r3, [r1, #132]	; 0x84
-    }
-
-    /* Enable the PLLI2S */
-    __HAL_RCC_PLLI2S_ENABLE();
- 8008114:	4b17      	ldr	r3, [pc, #92]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 8008116:	681b      	ldr	r3, [r3, #0]
- 8008118:	4a16      	ldr	r2, [pc, #88]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 800811a:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
- 800811e:	6013      	str	r3, [r2, #0]
-
-    /* Get Start Tick*/
-    tickstart = HAL_GetTick();
- 8008120:	f7fc f9e6 	bl	80044f0 <HAL_GetTick>
- 8008124:	6178      	str	r0, [r7, #20]
-
-    /* Wait till PLLI2S is ready */
-    while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  == RESET)
- 8008126:	e008      	b.n	800813a <HAL_RCCEx_PeriphCLKConfig+0x61e>
-    {
-      if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
- 8008128:	f7fc f9e2 	bl	80044f0 <HAL_GetTick>
- 800812c:	4602      	mov	r2, r0
- 800812e:	697b      	ldr	r3, [r7, #20]
- 8008130:	1ad3      	subs	r3, r2, r3
- 8008132:	2b64      	cmp	r3, #100	; 0x64
- 8008134:	d901      	bls.n	800813a <HAL_RCCEx_PeriphCLKConfig+0x61e>
-      {
-        /* return in case of Timeout detected */
-        return HAL_TIMEOUT;
- 8008136:	2303      	movs	r3, #3
- 8008138:	e0d7      	b.n	80082ea <HAL_RCCEx_PeriphCLKConfig+0x7ce>
-    while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  == RESET)
- 800813a:	4b0e      	ldr	r3, [pc, #56]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 800813c:	681b      	ldr	r3, [r3, #0]
- 800813e:	f003 6300 	and.w	r3, r3, #134217728	; 0x8000000
- 8008142:	2b00      	cmp	r3, #0
- 8008144:	d0f0      	beq.n	8008128 <HAL_RCCEx_PeriphCLKConfig+0x60c>
-    }
-  }
-
-  /*-------------------------------------- PLLSAI Configuration ---------------------------------*/
-  /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, LTDC or CK48 */
-  if(pllsaiused == 1)
- 8008146:	69bb      	ldr	r3, [r7, #24]
- 8008148:	2b01      	cmp	r3, #1
- 800814a:	f040 80cd 	bne.w	80082e8 <HAL_RCCEx_PeriphCLKConfig+0x7cc>
-  {
-    /* Disable PLLSAI Clock */
-    __HAL_RCC_PLLSAI_DISABLE();
- 800814e:	4b09      	ldr	r3, [pc, #36]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 8008150:	681b      	ldr	r3, [r3, #0]
- 8008152:	4a08      	ldr	r2, [pc, #32]	; (8008174 <HAL_RCCEx_PeriphCLKConfig+0x658>)
- 8008154:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
- 8008158:	6013      	str	r3, [r2, #0]
-
-    /* Get Start Tick*/
-    tickstart = HAL_GetTick();
- 800815a:	f7fc f9c9 	bl	80044f0 <HAL_GetTick>
- 800815e:	6178      	str	r0, [r7, #20]
-
-    /* Wait till PLLSAI is disabled */
-    while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- 8008160:	e00a      	b.n	8008178 <HAL_RCCEx_PeriphCLKConfig+0x65c>
-    {
-      if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
- 8008162:	f7fc f9c5 	bl	80044f0 <HAL_GetTick>
- 8008166:	4602      	mov	r2, r0
- 8008168:	697b      	ldr	r3, [r7, #20]
- 800816a:	1ad3      	subs	r3, r2, r3
- 800816c:	2b64      	cmp	r3, #100	; 0x64
- 800816e:	d903      	bls.n	8008178 <HAL_RCCEx_PeriphCLKConfig+0x65c>
-      {
-        /* return in case of Timeout detected */
-        return HAL_TIMEOUT;
- 8008170:	2303      	movs	r3, #3
- 8008172:	e0ba      	b.n	80082ea <HAL_RCCEx_PeriphCLKConfig+0x7ce>
- 8008174:	40023800 	.word	0x40023800
-    while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- 8008178:	4b5e      	ldr	r3, [pc, #376]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 800817a:	681b      	ldr	r3, [r3, #0]
- 800817c:	f003 5300 	and.w	r3, r3, #536870912	; 0x20000000
- 8008180:	f1b3 5f00 	cmp.w	r3, #536870912	; 0x20000000
- 8008184:	d0ed      	beq.n	8008162 <HAL_RCCEx_PeriphCLKConfig+0x646>
-
-    /* Check the PLLSAI division factors */
-    assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
-
-    /*----------------- In Case of PLLSAI is selected as source clock for SAI -------------------*/
-    if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
- 8008186:	687b      	ldr	r3, [r7, #4]
- 8008188:	681b      	ldr	r3, [r3, #0]
- 800818a:	f403 2300 	and.w	r3, r3, #524288	; 0x80000
- 800818e:	2b00      	cmp	r3, #0
- 8008190:	d003      	beq.n	800819a <HAL_RCCEx_PeriphCLKConfig+0x67e>
- 8008192:	687b      	ldr	r3, [r7, #4]
- 8008194:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 8008196:	2b00      	cmp	r3, #0
- 8008198:	d009      	beq.n	80081ae <HAL_RCCEx_PeriphCLKConfig+0x692>
-       ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
- 800819a:	687b      	ldr	r3, [r7, #4]
- 800819c:	681b      	ldr	r3, [r3, #0]
- 800819e:	f403 1380 	and.w	r3, r3, #1048576	; 0x100000
-    if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\
- 80081a2:	2b00      	cmp	r3, #0
- 80081a4:	d02e      	beq.n	8008204 <HAL_RCCEx_PeriphCLKConfig+0x6e8>
-       ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
- 80081a6:	687b      	ldr	r3, [r7, #4]
- 80081a8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 80081aa:	2b00      	cmp	r3, #0
- 80081ac:	d12a      	bne.n	8008204 <HAL_RCCEx_PeriphCLKConfig+0x6e8>
-      assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
-      /* check for PLLSAI/DIVQ Parameter */
-      assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
-
-      /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */
-      tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
- 80081ae:	4b51      	ldr	r3, [pc, #324]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 80081b0:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
- 80081b4:	0c1b      	lsrs	r3, r3, #16
- 80081b6:	f003 0303 	and.w	r3, r3, #3
- 80081ba:	613b      	str	r3, [r7, #16]
-      tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- 80081bc:	4b4d      	ldr	r3, [pc, #308]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 80081be:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
- 80081c2:	0f1b      	lsrs	r3, r3, #28
- 80081c4:	f003 0307 	and.w	r3, r3, #7
- 80081c8:	60fb      	str	r3, [r7, #12]
-      /* PLLSAI_VCO Input  = PLL_SOURCE/PLLM */
-      /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
-      /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
-      __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg0, PeriphClkInit->PLLSAI.PLLSAIQ, tmpreg1);
- 80081ca:	687b      	ldr	r3, [r7, #4]
- 80081cc:	695b      	ldr	r3, [r3, #20]
- 80081ce:	019a      	lsls	r2, r3, #6
- 80081d0:	693b      	ldr	r3, [r7, #16]
- 80081d2:	041b      	lsls	r3, r3, #16
- 80081d4:	431a      	orrs	r2, r3
- 80081d6:	687b      	ldr	r3, [r7, #4]
- 80081d8:	699b      	ldr	r3, [r3, #24]
- 80081da:	061b      	lsls	r3, r3, #24
- 80081dc:	431a      	orrs	r2, r3
- 80081de:	68fb      	ldr	r3, [r7, #12]
- 80081e0:	071b      	lsls	r3, r3, #28
- 80081e2:	4944      	ldr	r1, [pc, #272]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 80081e4:	4313      	orrs	r3, r2
- 80081e6:	f8c1 3088 	str.w	r3, [r1, #136]	; 0x88
-
-      /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
-      __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
- 80081ea:	4b42      	ldr	r3, [pc, #264]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 80081ec:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
- 80081f0:	f423 52f8 	bic.w	r2, r3, #7936	; 0x1f00
- 80081f4:	687b      	ldr	r3, [r7, #4]
- 80081f6:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 80081f8:	3b01      	subs	r3, #1
- 80081fa:	021b      	lsls	r3, r3, #8
- 80081fc:	493d      	ldr	r1, [pc, #244]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 80081fe:	4313      	orrs	r3, r2
- 8008200:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
-    }
-
-    /*----------------- In Case of PLLSAI is selected as source clock for CLK48 -------------------*/
-    /* In Case of PLLI2S is selected as source clock for CK48 */
-    if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP))
- 8008204:	687b      	ldr	r3, [r7, #4]
- 8008206:	681b      	ldr	r3, [r3, #0]
- 8008208:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
- 800820c:	2b00      	cmp	r3, #0
- 800820e:	d022      	beq.n	8008256 <HAL_RCCEx_PeriphCLKConfig+0x73a>
- 8008210:	687b      	ldr	r3, [r7, #4]
- 8008212:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
- 8008214:	f1b3 6f00 	cmp.w	r3, #134217728	; 0x8000000
- 8008218:	d11d      	bne.n	8008256 <HAL_RCCEx_PeriphCLKConfig+0x73a>
-    {
-      /* check for Parameters */
-      assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP));
-      /* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48 configuration) */
-      tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- 800821a:	4b36      	ldr	r3, [pc, #216]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 800821c:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
- 8008220:	0e1b      	lsrs	r3, r3, #24
- 8008222:	f003 030f 	and.w	r3, r3, #15
- 8008226:	613b      	str	r3, [r7, #16]
-      tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- 8008228:	4b32      	ldr	r3, [pc, #200]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 800822a:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
- 800822e:	0f1b      	lsrs	r3, r3, #28
- 8008230:	f003 0307 	and.w	r3, r3, #7
- 8008234:	60fb      	str	r3, [r7, #12]
-
-      /* Configure the PLLSAI division factors */
-      /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */
-      /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */
-      __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0, tmpreg1);
- 8008236:	687b      	ldr	r3, [r7, #4]
- 8008238:	695b      	ldr	r3, [r3, #20]
- 800823a:	019a      	lsls	r2, r3, #6
- 800823c:	687b      	ldr	r3, [r7, #4]
- 800823e:	6a1b      	ldr	r3, [r3, #32]
- 8008240:	041b      	lsls	r3, r3, #16
- 8008242:	431a      	orrs	r2, r3
- 8008244:	693b      	ldr	r3, [r7, #16]
- 8008246:	061b      	lsls	r3, r3, #24
- 8008248:	431a      	orrs	r2, r3
- 800824a:	68fb      	ldr	r3, [r7, #12]
- 800824c:	071b      	lsls	r3, r3, #28
- 800824e:	4929      	ldr	r1, [pc, #164]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 8008250:	4313      	orrs	r3, r2
- 8008252:	f8c1 3088 	str.w	r3, [r1, #136]	; 0x88
-    }
-
-#if defined(STM32F746xx) || defined(STM32F756xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) || defined (STM32F750xx)
-    /*---------------------------- LTDC configuration -------------------------------*/
-    if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC))
- 8008256:	687b      	ldr	r3, [r7, #4]
- 8008258:	681b      	ldr	r3, [r3, #0]
- 800825a:	f003 0308 	and.w	r3, r3, #8
- 800825e:	2b00      	cmp	r3, #0
- 8008260:	d028      	beq.n	80082b4 <HAL_RCCEx_PeriphCLKConfig+0x798>
-    {
-      assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR));
-      assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR));
-
-      /* Read PLLSAIP and PLLSAIQ value from PLLSAICFGR register (these value are not needed for LTDC configuration) */
-      tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- 8008262:	4b24      	ldr	r3, [pc, #144]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 8008264:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
- 8008268:	0e1b      	lsrs	r3, r3, #24
- 800826a:	f003 030f 	and.w	r3, r3, #15
- 800826e:	613b      	str	r3, [r7, #16]
-      tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos);
- 8008270:	4b20      	ldr	r3, [pc, #128]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 8008272:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
- 8008276:	0c1b      	lsrs	r3, r3, #16
- 8008278:	f003 0303 	and.w	r3, r3, #3
- 800827c:	60fb      	str	r3, [r7, #12]
-
-      /* PLLSAI_VCO Input  = PLL_SOURCE/PLLM */
-      /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
-      /* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */
-      __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg1, tmpreg0, PeriphClkInit->PLLSAI.PLLSAIR);
- 800827e:	687b      	ldr	r3, [r7, #4]
- 8008280:	695b      	ldr	r3, [r3, #20]
- 8008282:	019a      	lsls	r2, r3, #6
- 8008284:	68fb      	ldr	r3, [r7, #12]
- 8008286:	041b      	lsls	r3, r3, #16
- 8008288:	431a      	orrs	r2, r3
- 800828a:	693b      	ldr	r3, [r7, #16]
- 800828c:	061b      	lsls	r3, r3, #24
- 800828e:	431a      	orrs	r2, r3
- 8008290:	687b      	ldr	r3, [r7, #4]
- 8008292:	69db      	ldr	r3, [r3, #28]
- 8008294:	071b      	lsls	r3, r3, #28
- 8008296:	4917      	ldr	r1, [pc, #92]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 8008298:	4313      	orrs	r3, r2
- 800829a:	f8c1 3088 	str.w	r3, [r1, #136]	; 0x88
-
-      /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */
-      __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR);
- 800829e:	4b15      	ldr	r3, [pc, #84]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 80082a0:	f8d3 308c 	ldr.w	r3, [r3, #140]	; 0x8c
- 80082a4:	f423 3240 	bic.w	r2, r3, #196608	; 0x30000
- 80082a8:	687b      	ldr	r3, [r7, #4]
- 80082aa:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 80082ac:	4911      	ldr	r1, [pc, #68]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 80082ae:	4313      	orrs	r3, r2
- 80082b0:	f8c1 308c 	str.w	r3, [r1, #140]	; 0x8c
-    }
-#endif /* STM32F746xx || STM32F756xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx || STM32F750xx  */
-
-    /* Enable PLLSAI Clock */
-    __HAL_RCC_PLLSAI_ENABLE();
- 80082b4:	4b0f      	ldr	r3, [pc, #60]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 80082b6:	681b      	ldr	r3, [r3, #0]
- 80082b8:	4a0e      	ldr	r2, [pc, #56]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 80082ba:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
- 80082be:	6013      	str	r3, [r2, #0]
-
-    /* Get Start Tick*/
-    tickstart = HAL_GetTick();
- 80082c0:	f7fc f916 	bl	80044f0 <HAL_GetTick>
- 80082c4:	6178      	str	r0, [r7, #20]
-
-    /* Wait till PLLSAI is ready */
-    while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- 80082c6:	e008      	b.n	80082da <HAL_RCCEx_PeriphCLKConfig+0x7be>
-    {
-      if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
- 80082c8:	f7fc f912 	bl	80044f0 <HAL_GetTick>
- 80082cc:	4602      	mov	r2, r0
- 80082ce:	697b      	ldr	r3, [r7, #20]
- 80082d0:	1ad3      	subs	r3, r2, r3
- 80082d2:	2b64      	cmp	r3, #100	; 0x64
- 80082d4:	d901      	bls.n	80082da <HAL_RCCEx_PeriphCLKConfig+0x7be>
-      {
-        /* return in case of Timeout detected */
-        return HAL_TIMEOUT;
- 80082d6:	2303      	movs	r3, #3
- 80082d8:	e007      	b.n	80082ea <HAL_RCCEx_PeriphCLKConfig+0x7ce>
-    while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- 80082da:	4b06      	ldr	r3, [pc, #24]	; (80082f4 <HAL_RCCEx_PeriphCLKConfig+0x7d8>)
- 80082dc:	681b      	ldr	r3, [r3, #0]
- 80082de:	f003 5300 	and.w	r3, r3, #536870912	; 0x20000000
- 80082e2:	f1b3 5f00 	cmp.w	r3, #536870912	; 0x20000000
- 80082e6:	d1ef      	bne.n	80082c8 <HAL_RCCEx_PeriphCLKConfig+0x7ac>
-      }
-    }
-  }
-  return HAL_OK;
- 80082e8:	2300      	movs	r3, #0
-}
- 80082ea:	4618      	mov	r0, r3
- 80082ec:	3720      	adds	r7, #32
- 80082ee:	46bd      	mov	sp, r7
- 80082f0:	bd80      	pop	{r7, pc}
- 80082f2:	bf00      	nop
- 80082f4:	40023800 	.word	0x40023800
-
-080082f8 <HAL_RTC_Init>:
-  * @param  hrtc pointer to a RTC_HandleTypeDef structure that contains
-  *                the configuration information for RTC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
-{
- 80082f8:	b580      	push	{r7, lr}
- 80082fa:	b082      	sub	sp, #8
- 80082fc:	af00      	add	r7, sp, #0
- 80082fe:	6078      	str	r0, [r7, #4]
-  /* Check the RTC peripheral state */
-  if(hrtc == NULL)
- 8008300:	687b      	ldr	r3, [r7, #4]
- 8008302:	2b00      	cmp	r3, #0
- 8008304:	d101      	bne.n	800830a <HAL_RTC_Init+0x12>
-  {
-     return HAL_ERROR;
- 8008306:	2301      	movs	r3, #1
- 8008308:	e06b      	b.n	80083e2 <HAL_RTC_Init+0xea>
-    {
-      hrtc->MspDeInitCallback = HAL_RTC_MspDeInit;
-    }
-  }
-#else
-  if(hrtc->State == HAL_RTC_STATE_RESET)
- 800830a:	687b      	ldr	r3, [r7, #4]
- 800830c:	7f5b      	ldrb	r3, [r3, #29]
- 800830e:	b2db      	uxtb	r3, r3
- 8008310:	2b00      	cmp	r3, #0
- 8008312:	d105      	bne.n	8008320 <HAL_RTC_Init+0x28>
-  {
-    /* Allocate lock resource and initialize it */
-    hrtc->Lock = HAL_UNLOCKED;
- 8008314:	687b      	ldr	r3, [r7, #4]
- 8008316:	2200      	movs	r2, #0
- 8008318:	771a      	strb	r2, [r3, #28]
-
-    /* Initialize RTC MSP */
-    HAL_RTC_MspInit(hrtc);
- 800831a:	6878      	ldr	r0, [r7, #4]
- 800831c:	f7fb fd14 	bl	8003d48 <HAL_RTC_MspInit>
-  }
-#endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */
-
-  /* Set RTC state */
-  hrtc->State = HAL_RTC_STATE_BUSY;
- 8008320:	687b      	ldr	r3, [r7, #4]
- 8008322:	2202      	movs	r2, #2
- 8008324:	775a      	strb	r2, [r3, #29]
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- 8008326:	687b      	ldr	r3, [r7, #4]
- 8008328:	681b      	ldr	r3, [r3, #0]
- 800832a:	22ca      	movs	r2, #202	; 0xca
- 800832c:	625a      	str	r2, [r3, #36]	; 0x24
- 800832e:	687b      	ldr	r3, [r7, #4]
- 8008330:	681b      	ldr	r3, [r3, #0]
- 8008332:	2253      	movs	r2, #83	; 0x53
- 8008334:	625a      	str	r2, [r3, #36]	; 0x24
-
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
- 8008336:	6878      	ldr	r0, [r7, #4]
- 8008338:	f000 fb00 	bl	800893c <RTC_EnterInitMode>
- 800833c:	4603      	mov	r3, r0
- 800833e:	2b00      	cmp	r3, #0
- 8008340:	d008      	beq.n	8008354 <HAL_RTC_Init+0x5c>
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 8008342:	687b      	ldr	r3, [r7, #4]
- 8008344:	681b      	ldr	r3, [r3, #0]
- 8008346:	22ff      	movs	r2, #255	; 0xff
- 8008348:	625a      	str	r2, [r3, #36]	; 0x24
-
-    /* Set RTC state */
-    hrtc->State = HAL_RTC_STATE_ERROR;
- 800834a:	687b      	ldr	r3, [r7, #4]
- 800834c:	2204      	movs	r2, #4
- 800834e:	775a      	strb	r2, [r3, #29]
-
-    return HAL_ERROR;
- 8008350:	2301      	movs	r3, #1
- 8008352:	e046      	b.n	80083e2 <HAL_RTC_Init+0xea>
-  }
-  else
-  {
-    /* Clear RTC_CR FMT, OSEL and POL Bits */
-    hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL));
- 8008354:	687b      	ldr	r3, [r7, #4]
- 8008356:	681b      	ldr	r3, [r3, #0]
- 8008358:	6899      	ldr	r1, [r3, #8]
- 800835a:	687b      	ldr	r3, [r7, #4]
- 800835c:	681a      	ldr	r2, [r3, #0]
- 800835e:	4b23      	ldr	r3, [pc, #140]	; (80083ec <HAL_RTC_Init+0xf4>)
- 8008360:	400b      	ands	r3, r1
- 8008362:	6093      	str	r3, [r2, #8]
-    /* Set RTC_CR register */
-    hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity);
- 8008364:	687b      	ldr	r3, [r7, #4]
- 8008366:	681b      	ldr	r3, [r3, #0]
- 8008368:	6899      	ldr	r1, [r3, #8]
- 800836a:	687b      	ldr	r3, [r7, #4]
- 800836c:	685a      	ldr	r2, [r3, #4]
- 800836e:	687b      	ldr	r3, [r7, #4]
- 8008370:	691b      	ldr	r3, [r3, #16]
- 8008372:	431a      	orrs	r2, r3
- 8008374:	687b      	ldr	r3, [r7, #4]
- 8008376:	695b      	ldr	r3, [r3, #20]
- 8008378:	431a      	orrs	r2, r3
- 800837a:	687b      	ldr	r3, [r7, #4]
- 800837c:	681b      	ldr	r3, [r3, #0]
- 800837e:	430a      	orrs	r2, r1
- 8008380:	609a      	str	r2, [r3, #8]
-
-    /* Configure the RTC PRER */
-    hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv);
- 8008382:	687b      	ldr	r3, [r7, #4]
- 8008384:	681b      	ldr	r3, [r3, #0]
- 8008386:	687a      	ldr	r2, [r7, #4]
- 8008388:	68d2      	ldr	r2, [r2, #12]
- 800838a:	611a      	str	r2, [r3, #16]
-    hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16);
- 800838c:	687b      	ldr	r3, [r7, #4]
- 800838e:	681b      	ldr	r3, [r3, #0]
- 8008390:	6919      	ldr	r1, [r3, #16]
- 8008392:	687b      	ldr	r3, [r7, #4]
- 8008394:	689b      	ldr	r3, [r3, #8]
- 8008396:	041a      	lsls	r2, r3, #16
- 8008398:	687b      	ldr	r3, [r7, #4]
- 800839a:	681b      	ldr	r3, [r3, #0]
- 800839c:	430a      	orrs	r2, r1
- 800839e:	611a      	str	r2, [r3, #16]
-
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
- 80083a0:	687b      	ldr	r3, [r7, #4]
- 80083a2:	681b      	ldr	r3, [r3, #0]
- 80083a4:	68da      	ldr	r2, [r3, #12]
- 80083a6:	687b      	ldr	r3, [r7, #4]
- 80083a8:	681b      	ldr	r3, [r3, #0]
- 80083aa:	f022 0280 	bic.w	r2, r2, #128	; 0x80
- 80083ae:	60da      	str	r2, [r3, #12]
-
-    hrtc->Instance->OR &= (uint32_t)~RTC_OR_ALARMTYPE;
- 80083b0:	687b      	ldr	r3, [r7, #4]
- 80083b2:	681b      	ldr	r3, [r3, #0]
- 80083b4:	6cda      	ldr	r2, [r3, #76]	; 0x4c
- 80083b6:	687b      	ldr	r3, [r7, #4]
- 80083b8:	681b      	ldr	r3, [r3, #0]
- 80083ba:	f022 0208 	bic.w	r2, r2, #8
- 80083be:	64da      	str	r2, [r3, #76]	; 0x4c
-    hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType);
- 80083c0:	687b      	ldr	r3, [r7, #4]
- 80083c2:	681b      	ldr	r3, [r3, #0]
- 80083c4:	6cd9      	ldr	r1, [r3, #76]	; 0x4c
- 80083c6:	687b      	ldr	r3, [r7, #4]
- 80083c8:	699a      	ldr	r2, [r3, #24]
- 80083ca:	687b      	ldr	r3, [r7, #4]
- 80083cc:	681b      	ldr	r3, [r3, #0]
- 80083ce:	430a      	orrs	r2, r1
- 80083d0:	64da      	str	r2, [r3, #76]	; 0x4c
-
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 80083d2:	687b      	ldr	r3, [r7, #4]
- 80083d4:	681b      	ldr	r3, [r3, #0]
- 80083d6:	22ff      	movs	r2, #255	; 0xff
- 80083d8:	625a      	str	r2, [r3, #36]	; 0x24
-
-    /* Set RTC state */
-    hrtc->State = HAL_RTC_STATE_READY;
- 80083da:	687b      	ldr	r3, [r7, #4]
- 80083dc:	2201      	movs	r2, #1
- 80083de:	775a      	strb	r2, [r3, #29]
-
-    return HAL_OK;
- 80083e0:	2300      	movs	r3, #0
-  }
-}
- 80083e2:	4618      	mov	r0, r3
- 80083e4:	3708      	adds	r7, #8
- 80083e6:	46bd      	mov	sp, r7
- 80083e8:	bd80      	pop	{r7, pc}
- 80083ea:	bf00      	nop
- 80083ec:	ff8fffbf 	.word	0xff8fffbf
-
-080083f0 <HAL_RTC_SetTime>:
-  *            @arg FORMAT_BIN: Binary data format
-  *            @arg FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
-{
- 80083f0:	b590      	push	{r4, r7, lr}
- 80083f2:	b087      	sub	sp, #28
- 80083f4:	af00      	add	r7, sp, #0
- 80083f6:	60f8      	str	r0, [r7, #12]
- 80083f8:	60b9      	str	r1, [r7, #8]
- 80083fa:	607a      	str	r2, [r7, #4]
-  uint32_t tmpreg = 0;
- 80083fc:	2300      	movs	r3, #0
- 80083fe:	617b      	str	r3, [r7, #20]
-  assert_param(IS_RTC_FORMAT(Format));
-  assert_param(IS_RTC_DAYLIGHT_SAVING(sTime->DayLightSaving));
-  assert_param(IS_RTC_STORE_OPERATION(sTime->StoreOperation));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
- 8008400:	68fb      	ldr	r3, [r7, #12]
- 8008402:	7f1b      	ldrb	r3, [r3, #28]
- 8008404:	2b01      	cmp	r3, #1
- 8008406:	d101      	bne.n	800840c <HAL_RTC_SetTime+0x1c>
- 8008408:	2302      	movs	r3, #2
- 800840a:	e0a8      	b.n	800855e <HAL_RTC_SetTime+0x16e>
- 800840c:	68fb      	ldr	r3, [r7, #12]
- 800840e:	2201      	movs	r2, #1
- 8008410:	771a      	strb	r2, [r3, #28]
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
- 8008412:	68fb      	ldr	r3, [r7, #12]
- 8008414:	2202      	movs	r2, #2
- 8008416:	775a      	strb	r2, [r3, #29]
-
-  if(Format == RTC_FORMAT_BIN)
- 8008418:	687b      	ldr	r3, [r7, #4]
- 800841a:	2b00      	cmp	r3, #0
- 800841c:	d126      	bne.n	800846c <HAL_RTC_SetTime+0x7c>
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
- 800841e:	68fb      	ldr	r3, [r7, #12]
- 8008420:	681b      	ldr	r3, [r3, #0]
- 8008422:	689b      	ldr	r3, [r3, #8]
- 8008424:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 8008428:	2b00      	cmp	r3, #0
- 800842a:	d102      	bne.n	8008432 <HAL_RTC_SetTime+0x42>
-      assert_param(IS_RTC_HOUR12(sTime->Hours));
-      assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
-    }
-    else
-    {
-      sTime->TimeFormat = 0x00;
- 800842c:	68bb      	ldr	r3, [r7, #8]
- 800842e:	2200      	movs	r2, #0
- 8008430:	731a      	strb	r2, [r3, #12]
-      assert_param(IS_RTC_HOUR24(sTime->Hours));
-    }
-    assert_param(IS_RTC_MINUTES(sTime->Minutes));
-    assert_param(IS_RTC_SECONDS(sTime->Seconds));
-
-    tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16) | \
- 8008432:	68bb      	ldr	r3, [r7, #8]
- 8008434:	781b      	ldrb	r3, [r3, #0]
- 8008436:	4618      	mov	r0, r3
- 8008438:	f000 faac 	bl	8008994 <RTC_ByteToBcd2>
- 800843c:	4603      	mov	r3, r0
- 800843e:	041c      	lsls	r4, r3, #16
-                        ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8) | \
- 8008440:	68bb      	ldr	r3, [r7, #8]
- 8008442:	785b      	ldrb	r3, [r3, #1]
- 8008444:	4618      	mov	r0, r3
- 8008446:	f000 faa5 	bl	8008994 <RTC_ByteToBcd2>
- 800844a:	4603      	mov	r3, r0
- 800844c:	021b      	lsls	r3, r3, #8
-    tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16) | \
- 800844e:	431c      	orrs	r4, r3
-                        ((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \
- 8008450:	68bb      	ldr	r3, [r7, #8]
- 8008452:	789b      	ldrb	r3, [r3, #2]
- 8008454:	4618      	mov	r0, r3
- 8008456:	f000 fa9d 	bl	8008994 <RTC_ByteToBcd2>
- 800845a:	4603      	mov	r3, r0
-                        ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8) | \
- 800845c:	ea44 0203 	orr.w	r2, r4, r3
-                        (((uint32_t)sTime->TimeFormat) << 16));
- 8008460:	68bb      	ldr	r3, [r7, #8]
- 8008462:	7b1b      	ldrb	r3, [r3, #12]
- 8008464:	041b      	lsls	r3, r3, #16
-    tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16) | \
- 8008466:	4313      	orrs	r3, r2
- 8008468:	617b      	str	r3, [r7, #20]
- 800846a:	e018      	b.n	800849e <HAL_RTC_SetTime+0xae>
-  }
-  else
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
- 800846c:	68fb      	ldr	r3, [r7, #12]
- 800846e:	681b      	ldr	r3, [r3, #0]
- 8008470:	689b      	ldr	r3, [r3, #8]
- 8008472:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 8008476:	2b00      	cmp	r3, #0
- 8008478:	d102      	bne.n	8008480 <HAL_RTC_SetTime+0x90>
-      assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sTime->Hours)));
-      assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
-    }
-    else
-    {
-      sTime->TimeFormat = 0x00;
- 800847a:	68bb      	ldr	r3, [r7, #8]
- 800847c:	2200      	movs	r2, #0
- 800847e:	731a      	strb	r2, [r3, #12]
-      assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours)));
-    }
-    assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes)));
-    assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds)));
-    tmpreg = (((uint32_t)(sTime->Hours) << 16) | \
- 8008480:	68bb      	ldr	r3, [r7, #8]
- 8008482:	781b      	ldrb	r3, [r3, #0]
- 8008484:	041a      	lsls	r2, r3, #16
-              ((uint32_t)(sTime->Minutes) << 8) | \
- 8008486:	68bb      	ldr	r3, [r7, #8]
- 8008488:	785b      	ldrb	r3, [r3, #1]
- 800848a:	021b      	lsls	r3, r3, #8
-    tmpreg = (((uint32_t)(sTime->Hours) << 16) | \
- 800848c:	4313      	orrs	r3, r2
-              ((uint32_t)sTime->Seconds) | \
- 800848e:	68ba      	ldr	r2, [r7, #8]
- 8008490:	7892      	ldrb	r2, [r2, #2]
-              ((uint32_t)(sTime->Minutes) << 8) | \
- 8008492:	431a      	orrs	r2, r3
-              ((uint32_t)(sTime->TimeFormat) << 16));
- 8008494:	68bb      	ldr	r3, [r7, #8]
- 8008496:	7b1b      	ldrb	r3, [r3, #12]
- 8008498:	041b      	lsls	r3, r3, #16
-    tmpreg = (((uint32_t)(sTime->Hours) << 16) | \
- 800849a:	4313      	orrs	r3, r2
- 800849c:	617b      	str	r3, [r7, #20]
-  }
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- 800849e:	68fb      	ldr	r3, [r7, #12]
- 80084a0:	681b      	ldr	r3, [r3, #0]
- 80084a2:	22ca      	movs	r2, #202	; 0xca
- 80084a4:	625a      	str	r2, [r3, #36]	; 0x24
- 80084a6:	68fb      	ldr	r3, [r7, #12]
- 80084a8:	681b      	ldr	r3, [r3, #0]
- 80084aa:	2253      	movs	r2, #83	; 0x53
- 80084ac:	625a      	str	r2, [r3, #36]	; 0x24
-
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
- 80084ae:	68f8      	ldr	r0, [r7, #12]
- 80084b0:	f000 fa44 	bl	800893c <RTC_EnterInitMode>
- 80084b4:	4603      	mov	r3, r0
- 80084b6:	2b00      	cmp	r3, #0
- 80084b8:	d00b      	beq.n	80084d2 <HAL_RTC_SetTime+0xe2>
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 80084ba:	68fb      	ldr	r3, [r7, #12]
- 80084bc:	681b      	ldr	r3, [r3, #0]
- 80084be:	22ff      	movs	r2, #255	; 0xff
- 80084c0:	625a      	str	r2, [r3, #36]	; 0x24
-
-    /* Set RTC state */
-    hrtc->State = HAL_RTC_STATE_ERROR;
- 80084c2:	68fb      	ldr	r3, [r7, #12]
- 80084c4:	2204      	movs	r2, #4
- 80084c6:	775a      	strb	r2, [r3, #29]
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hrtc);
- 80084c8:	68fb      	ldr	r3, [r7, #12]
- 80084ca:	2200      	movs	r2, #0
- 80084cc:	771a      	strb	r2, [r3, #28]
-
-    return HAL_ERROR;
- 80084ce:	2301      	movs	r3, #1
- 80084d0:	e045      	b.n	800855e <HAL_RTC_SetTime+0x16e>
-  }
-  else
-  {
-    /* Set the RTC_TR register */
-    hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
- 80084d2:	68fb      	ldr	r3, [r7, #12]
- 80084d4:	681a      	ldr	r2, [r3, #0]
- 80084d6:	6979      	ldr	r1, [r7, #20]
- 80084d8:	4b23      	ldr	r3, [pc, #140]	; (8008568 <HAL_RTC_SetTime+0x178>)
- 80084da:	400b      	ands	r3, r1
- 80084dc:	6013      	str	r3, [r2, #0]
-
-    /* Clear the bits to be configured */
-    hrtc->Instance->CR &= (uint32_t)~RTC_CR_BKP;
- 80084de:	68fb      	ldr	r3, [r7, #12]
- 80084e0:	681b      	ldr	r3, [r3, #0]
- 80084e2:	689a      	ldr	r2, [r3, #8]
- 80084e4:	68fb      	ldr	r3, [r7, #12]
- 80084e6:	681b      	ldr	r3, [r3, #0]
- 80084e8:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
- 80084ec:	609a      	str	r2, [r3, #8]
-
-    /* Configure the RTC_CR register */
-    hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation);
- 80084ee:	68fb      	ldr	r3, [r7, #12]
- 80084f0:	681b      	ldr	r3, [r3, #0]
- 80084f2:	6899      	ldr	r1, [r3, #8]
- 80084f4:	68bb      	ldr	r3, [r7, #8]
- 80084f6:	691a      	ldr	r2, [r3, #16]
- 80084f8:	68bb      	ldr	r3, [r7, #8]
- 80084fa:	695b      	ldr	r3, [r3, #20]
- 80084fc:	431a      	orrs	r2, r3
- 80084fe:	68fb      	ldr	r3, [r7, #12]
- 8008500:	681b      	ldr	r3, [r3, #0]
- 8008502:	430a      	orrs	r2, r1
- 8008504:	609a      	str	r2, [r3, #8]
-
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
- 8008506:	68fb      	ldr	r3, [r7, #12]
- 8008508:	681b      	ldr	r3, [r3, #0]
- 800850a:	68da      	ldr	r2, [r3, #12]
- 800850c:	68fb      	ldr	r3, [r7, #12]
- 800850e:	681b      	ldr	r3, [r3, #0]
- 8008510:	f022 0280 	bic.w	r2, r2, #128	; 0x80
- 8008514:	60da      	str	r2, [r3, #12]
-
-    /* If  CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
- 8008516:	68fb      	ldr	r3, [r7, #12]
- 8008518:	681b      	ldr	r3, [r3, #0]
- 800851a:	689b      	ldr	r3, [r3, #8]
- 800851c:	f003 0320 	and.w	r3, r3, #32
- 8008520:	2b00      	cmp	r3, #0
- 8008522:	d111      	bne.n	8008548 <HAL_RTC_SetTime+0x158>
-    {
-      if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
- 8008524:	68f8      	ldr	r0, [r7, #12]
- 8008526:	f000 f9e1 	bl	80088ec <HAL_RTC_WaitForSynchro>
- 800852a:	4603      	mov	r3, r0
- 800852c:	2b00      	cmp	r3, #0
- 800852e:	d00b      	beq.n	8008548 <HAL_RTC_SetTime+0x158>
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 8008530:	68fb      	ldr	r3, [r7, #12]
- 8008532:	681b      	ldr	r3, [r3, #0]
- 8008534:	22ff      	movs	r2, #255	; 0xff
- 8008536:	625a      	str	r2, [r3, #36]	; 0x24
-
-        hrtc->State = HAL_RTC_STATE_ERROR;
- 8008538:	68fb      	ldr	r3, [r7, #12]
- 800853a:	2204      	movs	r2, #4
- 800853c:	775a      	strb	r2, [r3, #29]
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
- 800853e:	68fb      	ldr	r3, [r7, #12]
- 8008540:	2200      	movs	r2, #0
- 8008542:	771a      	strb	r2, [r3, #28]
-
-        return HAL_ERROR;
- 8008544:	2301      	movs	r3, #1
- 8008546:	e00a      	b.n	800855e <HAL_RTC_SetTime+0x16e>
-      }
-    }
-
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 8008548:	68fb      	ldr	r3, [r7, #12]
- 800854a:	681b      	ldr	r3, [r3, #0]
- 800854c:	22ff      	movs	r2, #255	; 0xff
- 800854e:	625a      	str	r2, [r3, #36]	; 0x24
-
-   hrtc->State = HAL_RTC_STATE_READY;
- 8008550:	68fb      	ldr	r3, [r7, #12]
- 8008552:	2201      	movs	r2, #1
- 8008554:	775a      	strb	r2, [r3, #29]
-
-   __HAL_UNLOCK(hrtc);
- 8008556:	68fb      	ldr	r3, [r7, #12]
- 8008558:	2200      	movs	r2, #0
- 800855a:	771a      	strb	r2, [r3, #28]
-
-   return HAL_OK;
- 800855c:	2300      	movs	r3, #0
-  }
-}
- 800855e:	4618      	mov	r0, r3
- 8008560:	371c      	adds	r7, #28
- 8008562:	46bd      	mov	sp, r7
- 8008564:	bd90      	pop	{r4, r7, pc}
- 8008566:	bf00      	nop
- 8008568:	007f7f7f 	.word	0x007f7f7f
-
-0800856c <HAL_RTC_SetDate>:
-  *            @arg RTC_FORMAT_BIN: Binary data format
-  *            @arg RTC_FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
-{
- 800856c:	b590      	push	{r4, r7, lr}
- 800856e:	b087      	sub	sp, #28
- 8008570:	af00      	add	r7, sp, #0
- 8008572:	60f8      	str	r0, [r7, #12]
- 8008574:	60b9      	str	r1, [r7, #8]
- 8008576:	607a      	str	r2, [r7, #4]
-  uint32_t datetmpreg = 0;
- 8008578:	2300      	movs	r3, #0
- 800857a:	617b      	str	r3, [r7, #20]
-
- /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-
- /* Process Locked */
- __HAL_LOCK(hrtc);
- 800857c:	68fb      	ldr	r3, [r7, #12]
- 800857e:	7f1b      	ldrb	r3, [r3, #28]
- 8008580:	2b01      	cmp	r3, #1
- 8008582:	d101      	bne.n	8008588 <HAL_RTC_SetDate+0x1c>
- 8008584:	2302      	movs	r3, #2
- 8008586:	e092      	b.n	80086ae <HAL_RTC_SetDate+0x142>
- 8008588:	68fb      	ldr	r3, [r7, #12]
- 800858a:	2201      	movs	r2, #1
- 800858c:	771a      	strb	r2, [r3, #28]
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
- 800858e:	68fb      	ldr	r3, [r7, #12]
- 8008590:	2202      	movs	r2, #2
- 8008592:	775a      	strb	r2, [r3, #29]
-
-  if((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U))
- 8008594:	687b      	ldr	r3, [r7, #4]
- 8008596:	2b00      	cmp	r3, #0
- 8008598:	d10e      	bne.n	80085b8 <HAL_RTC_SetDate+0x4c>
- 800859a:	68bb      	ldr	r3, [r7, #8]
- 800859c:	785b      	ldrb	r3, [r3, #1]
- 800859e:	f003 0310 	and.w	r3, r3, #16
- 80085a2:	2b00      	cmp	r3, #0
- 80085a4:	d008      	beq.n	80085b8 <HAL_RTC_SetDate+0x4c>
-  {
-    sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU);
- 80085a6:	68bb      	ldr	r3, [r7, #8]
- 80085a8:	785b      	ldrb	r3, [r3, #1]
- 80085aa:	f023 0310 	bic.w	r3, r3, #16
- 80085ae:	b2db      	uxtb	r3, r3
- 80085b0:	330a      	adds	r3, #10
- 80085b2:	b2da      	uxtb	r2, r3
- 80085b4:	68bb      	ldr	r3, [r7, #8]
- 80085b6:	705a      	strb	r2, [r3, #1]
-  }
-
-  assert_param(IS_RTC_WEEKDAY(sDate->WeekDay));
-
-  if(Format == RTC_FORMAT_BIN)
- 80085b8:	687b      	ldr	r3, [r7, #4]
- 80085ba:	2b00      	cmp	r3, #0
- 80085bc:	d11c      	bne.n	80085f8 <HAL_RTC_SetDate+0x8c>
-  {
-    assert_param(IS_RTC_YEAR(sDate->Year));
-    assert_param(IS_RTC_MONTH(sDate->Month));
-    assert_param(IS_RTC_DATE(sDate->Date));
-
-   datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16) | \
- 80085be:	68bb      	ldr	r3, [r7, #8]
- 80085c0:	78db      	ldrb	r3, [r3, #3]
- 80085c2:	4618      	mov	r0, r3
- 80085c4:	f000 f9e6 	bl	8008994 <RTC_ByteToBcd2>
- 80085c8:	4603      	mov	r3, r0
- 80085ca:	041c      	lsls	r4, r3, #16
-                 ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8) | \
- 80085cc:	68bb      	ldr	r3, [r7, #8]
- 80085ce:	785b      	ldrb	r3, [r3, #1]
- 80085d0:	4618      	mov	r0, r3
- 80085d2:	f000 f9df 	bl	8008994 <RTC_ByteToBcd2>
- 80085d6:	4603      	mov	r3, r0
- 80085d8:	021b      	lsls	r3, r3, #8
-   datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16) | \
- 80085da:	431c      	orrs	r4, r3
-                 ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \
- 80085dc:	68bb      	ldr	r3, [r7, #8]
- 80085de:	789b      	ldrb	r3, [r3, #2]
- 80085e0:	4618      	mov	r0, r3
- 80085e2:	f000 f9d7 	bl	8008994 <RTC_ByteToBcd2>
- 80085e6:	4603      	mov	r3, r0
-                 ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8) | \
- 80085e8:	ea44 0203 	orr.w	r2, r4, r3
-                 ((uint32_t)sDate->WeekDay << 13));
- 80085ec:	68bb      	ldr	r3, [r7, #8]
- 80085ee:	781b      	ldrb	r3, [r3, #0]
- 80085f0:	035b      	lsls	r3, r3, #13
-   datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16) | \
- 80085f2:	4313      	orrs	r3, r2
- 80085f4:	617b      	str	r3, [r7, #20]
- 80085f6:	e00e      	b.n	8008616 <HAL_RTC_SetDate+0xaa>
-  {
-    assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year)));
-    assert_param(IS_RTC_MONTH(RTC_Bcd2ToByte(sDate->Month)));
-    assert_param(IS_RTC_DATE(RTC_Bcd2ToByte(sDate->Date)));
-
-    datetmpreg = ((((uint32_t)sDate->Year) << 16) | \
- 80085f8:	68bb      	ldr	r3, [r7, #8]
- 80085fa:	78db      	ldrb	r3, [r3, #3]
- 80085fc:	041a      	lsls	r2, r3, #16
-                  (((uint32_t)sDate->Month) << 8) | \
- 80085fe:	68bb      	ldr	r3, [r7, #8]
- 8008600:	785b      	ldrb	r3, [r3, #1]
- 8008602:	021b      	lsls	r3, r3, #8
-    datetmpreg = ((((uint32_t)sDate->Year) << 16) | \
- 8008604:	4313      	orrs	r3, r2
-                  ((uint32_t)sDate->Date) | \
- 8008606:	68ba      	ldr	r2, [r7, #8]
- 8008608:	7892      	ldrb	r2, [r2, #2]
-                  (((uint32_t)sDate->Month) << 8) | \
- 800860a:	431a      	orrs	r2, r3
-                  (((uint32_t)sDate->WeekDay) << 13));
- 800860c:	68bb      	ldr	r3, [r7, #8]
- 800860e:	781b      	ldrb	r3, [r3, #0]
- 8008610:	035b      	lsls	r3, r3, #13
-    datetmpreg = ((((uint32_t)sDate->Year) << 16) | \
- 8008612:	4313      	orrs	r3, r2
- 8008614:	617b      	str	r3, [r7, #20]
-  }
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- 8008616:	68fb      	ldr	r3, [r7, #12]
- 8008618:	681b      	ldr	r3, [r3, #0]
- 800861a:	22ca      	movs	r2, #202	; 0xca
- 800861c:	625a      	str	r2, [r3, #36]	; 0x24
- 800861e:	68fb      	ldr	r3, [r7, #12]
- 8008620:	681b      	ldr	r3, [r3, #0]
- 8008622:	2253      	movs	r2, #83	; 0x53
- 8008624:	625a      	str	r2, [r3, #36]	; 0x24
-
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
- 8008626:	68f8      	ldr	r0, [r7, #12]
- 8008628:	f000 f988 	bl	800893c <RTC_EnterInitMode>
- 800862c:	4603      	mov	r3, r0
- 800862e:	2b00      	cmp	r3, #0
- 8008630:	d00b      	beq.n	800864a <HAL_RTC_SetDate+0xde>
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 8008632:	68fb      	ldr	r3, [r7, #12]
- 8008634:	681b      	ldr	r3, [r3, #0]
- 8008636:	22ff      	movs	r2, #255	; 0xff
- 8008638:	625a      	str	r2, [r3, #36]	; 0x24
-
-    /* Set RTC state*/
-    hrtc->State = HAL_RTC_STATE_ERROR;
- 800863a:	68fb      	ldr	r3, [r7, #12]
- 800863c:	2204      	movs	r2, #4
- 800863e:	775a      	strb	r2, [r3, #29]
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hrtc);
- 8008640:	68fb      	ldr	r3, [r7, #12]
- 8008642:	2200      	movs	r2, #0
- 8008644:	771a      	strb	r2, [r3, #28]
-
-    return HAL_ERROR;
- 8008646:	2301      	movs	r3, #1
- 8008648:	e031      	b.n	80086ae <HAL_RTC_SetDate+0x142>
-  }
-  else
-  {
-    /* Set the RTC_DR register */
-    hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK);
- 800864a:	68fb      	ldr	r3, [r7, #12]
- 800864c:	681a      	ldr	r2, [r3, #0]
- 800864e:	6979      	ldr	r1, [r7, #20]
- 8008650:	4b19      	ldr	r3, [pc, #100]	; (80086b8 <HAL_RTC_SetDate+0x14c>)
- 8008652:	400b      	ands	r3, r1
- 8008654:	6053      	str	r3, [r2, #4]
-
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
- 8008656:	68fb      	ldr	r3, [r7, #12]
- 8008658:	681b      	ldr	r3, [r3, #0]
- 800865a:	68da      	ldr	r2, [r3, #12]
- 800865c:	68fb      	ldr	r3, [r7, #12]
- 800865e:	681b      	ldr	r3, [r3, #0]
- 8008660:	f022 0280 	bic.w	r2, r2, #128	; 0x80
- 8008664:	60da      	str	r2, [r3, #12]
-
-    /* If  CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
- 8008666:	68fb      	ldr	r3, [r7, #12]
- 8008668:	681b      	ldr	r3, [r3, #0]
- 800866a:	689b      	ldr	r3, [r3, #8]
- 800866c:	f003 0320 	and.w	r3, r3, #32
- 8008670:	2b00      	cmp	r3, #0
- 8008672:	d111      	bne.n	8008698 <HAL_RTC_SetDate+0x12c>
-    {
-      if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
- 8008674:	68f8      	ldr	r0, [r7, #12]
- 8008676:	f000 f939 	bl	80088ec <HAL_RTC_WaitForSynchro>
- 800867a:	4603      	mov	r3, r0
- 800867c:	2b00      	cmp	r3, #0
- 800867e:	d00b      	beq.n	8008698 <HAL_RTC_SetDate+0x12c>
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 8008680:	68fb      	ldr	r3, [r7, #12]
- 8008682:	681b      	ldr	r3, [r3, #0]
- 8008684:	22ff      	movs	r2, #255	; 0xff
- 8008686:	625a      	str	r2, [r3, #36]	; 0x24
-
-        hrtc->State = HAL_RTC_STATE_ERROR;
- 8008688:	68fb      	ldr	r3, [r7, #12]
- 800868a:	2204      	movs	r2, #4
- 800868c:	775a      	strb	r2, [r3, #29]
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
- 800868e:	68fb      	ldr	r3, [r7, #12]
- 8008690:	2200      	movs	r2, #0
- 8008692:	771a      	strb	r2, [r3, #28]
-
-        return HAL_ERROR;
- 8008694:	2301      	movs	r3, #1
- 8008696:	e00a      	b.n	80086ae <HAL_RTC_SetDate+0x142>
-      }
-    }
-
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 8008698:	68fb      	ldr	r3, [r7, #12]
- 800869a:	681b      	ldr	r3, [r3, #0]
- 800869c:	22ff      	movs	r2, #255	; 0xff
- 800869e:	625a      	str	r2, [r3, #36]	; 0x24
-
-    hrtc->State = HAL_RTC_STATE_READY ;
- 80086a0:	68fb      	ldr	r3, [r7, #12]
- 80086a2:	2201      	movs	r2, #1
- 80086a4:	775a      	strb	r2, [r3, #29]
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hrtc);
- 80086a6:	68fb      	ldr	r3, [r7, #12]
- 80086a8:	2200      	movs	r2, #0
- 80086aa:	771a      	strb	r2, [r3, #28]
-
-    return HAL_OK;
- 80086ac:	2300      	movs	r3, #0
-  }
-}
- 80086ae:	4618      	mov	r0, r3
- 80086b0:	371c      	adds	r7, #28
- 80086b2:	46bd      	mov	sp, r7
- 80086b4:	bd90      	pop	{r4, r7, pc}
- 80086b6:	bf00      	nop
- 80086b8:	00ffff3f 	.word	0x00ffff3f
-
-080086bc <HAL_RTC_SetAlarm>:
-  *             @arg FORMAT_BIN: Binary data format
-  *             @arg FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
-{
- 80086bc:	b590      	push	{r4, r7, lr}
- 80086be:	b089      	sub	sp, #36	; 0x24
- 80086c0:	af00      	add	r7, sp, #0
- 80086c2:	60f8      	str	r0, [r7, #12]
- 80086c4:	60b9      	str	r1, [r7, #8]
- 80086c6:	607a      	str	r2, [r7, #4]
-  uint32_t tickstart = 0;
- 80086c8:	2300      	movs	r3, #0
- 80086ca:	61bb      	str	r3, [r7, #24]
-  uint32_t tmpreg = 0, subsecondtmpreg = 0;
- 80086cc:	2300      	movs	r3, #0
- 80086ce:	61fb      	str	r3, [r7, #28]
- 80086d0:	2300      	movs	r3, #0
- 80086d2:	617b      	str	r3, [r7, #20]
-  assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
-  assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
-  assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
- 80086d4:	68fb      	ldr	r3, [r7, #12]
- 80086d6:	7f1b      	ldrb	r3, [r3, #28]
- 80086d8:	2b01      	cmp	r3, #1
- 80086da:	d101      	bne.n	80086e0 <HAL_RTC_SetAlarm+0x24>
- 80086dc:	2302      	movs	r3, #2
- 80086de:	e101      	b.n	80088e4 <HAL_RTC_SetAlarm+0x228>
- 80086e0:	68fb      	ldr	r3, [r7, #12]
- 80086e2:	2201      	movs	r2, #1
- 80086e4:	771a      	strb	r2, [r3, #28]
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
- 80086e6:	68fb      	ldr	r3, [r7, #12]
- 80086e8:	2202      	movs	r2, #2
- 80086ea:	775a      	strb	r2, [r3, #29]
-
-  if(Format == RTC_FORMAT_BIN)
- 80086ec:	687b      	ldr	r3, [r7, #4]
- 80086ee:	2b00      	cmp	r3, #0
- 80086f0:	d137      	bne.n	8008762 <HAL_RTC_SetAlarm+0xa6>
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
- 80086f2:	68fb      	ldr	r3, [r7, #12]
- 80086f4:	681b      	ldr	r3, [r3, #0]
- 80086f6:	689b      	ldr	r3, [r3, #8]
- 80086f8:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 80086fc:	2b00      	cmp	r3, #0
- 80086fe:	d102      	bne.n	8008706 <HAL_RTC_SetAlarm+0x4a>
-      assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
-      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
-    }
-    else
-    {
-      sAlarm->AlarmTime.TimeFormat = 0x00;
- 8008700:	68bb      	ldr	r3, [r7, #8]
- 8008702:	2200      	movs	r2, #0
- 8008704:	731a      	strb	r2, [r3, #12]
-    else
-    {
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
-    }
-
-    tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16) | \
- 8008706:	68bb      	ldr	r3, [r7, #8]
- 8008708:	781b      	ldrb	r3, [r3, #0]
- 800870a:	4618      	mov	r0, r3
- 800870c:	f000 f942 	bl	8008994 <RTC_ByteToBcd2>
- 8008710:	4603      	mov	r3, r0
- 8008712:	041c      	lsls	r4, r3, #16
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8) | \
- 8008714:	68bb      	ldr	r3, [r7, #8]
- 8008716:	785b      	ldrb	r3, [r3, #1]
- 8008718:	4618      	mov	r0, r3
- 800871a:	f000 f93b 	bl	8008994 <RTC_ByteToBcd2>
- 800871e:	4603      	mov	r3, r0
- 8008720:	021b      	lsls	r3, r3, #8
-    tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16) | \
- 8008722:	431c      	orrs	r4, r3
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
- 8008724:	68bb      	ldr	r3, [r7, #8]
- 8008726:	789b      	ldrb	r3, [r3, #2]
- 8008728:	4618      	mov	r0, r3
- 800872a:	f000 f933 	bl	8008994 <RTC_ByteToBcd2>
- 800872e:	4603      	mov	r3, r0
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8) | \
- 8008730:	ea44 0203 	orr.w	r2, r4, r3
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \
- 8008734:	68bb      	ldr	r3, [r7, #8]
- 8008736:	7b1b      	ldrb	r3, [r3, #12]
- 8008738:	041b      	lsls	r3, r3, #16
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
- 800873a:	ea42 0403 	orr.w	r4, r2, r3
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24) | \
- 800873e:	68bb      	ldr	r3, [r7, #8]
- 8008740:	f893 3024 	ldrb.w	r3, [r3, #36]	; 0x24
- 8008744:	4618      	mov	r0, r3
- 8008746:	f000 f925 	bl	8008994 <RTC_ByteToBcd2>
- 800874a:	4603      	mov	r3, r0
- 800874c:	061b      	lsls	r3, r3, #24
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \
- 800874e:	ea44 0203 	orr.w	r2, r4, r3
-              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
- 8008752:	68bb      	ldr	r3, [r7, #8]
- 8008754:	6a1b      	ldr	r3, [r3, #32]
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24) | \
- 8008756:	431a      	orrs	r2, r3
-              ((uint32_t)sAlarm->AlarmMask));
- 8008758:	68bb      	ldr	r3, [r7, #8]
- 800875a:	699b      	ldr	r3, [r3, #24]
-    tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16) | \
- 800875c:	4313      	orrs	r3, r2
- 800875e:	61fb      	str	r3, [r7, #28]
- 8008760:	e023      	b.n	80087aa <HAL_RTC_SetAlarm+0xee>
-  }
-  else
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
- 8008762:	68fb      	ldr	r3, [r7, #12]
- 8008764:	681b      	ldr	r3, [r3, #0]
- 8008766:	689b      	ldr	r3, [r3, #8]
- 8008768:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 800876c:	2b00      	cmp	r3, #0
- 800876e:	d102      	bne.n	8008776 <HAL_RTC_SetAlarm+0xba>
-      assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
-      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
-    }
-    else
-    {
-      sAlarm->AlarmTime.TimeFormat = 0x00;
- 8008770:	68bb      	ldr	r3, [r7, #8]
- 8008772:	2200      	movs	r2, #0
- 8008774:	731a      	strb	r2, [r3, #12]
-    else
-    {
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay)));
-    }
-
-    tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16) | \
- 8008776:	68bb      	ldr	r3, [r7, #8]
- 8008778:	781b      	ldrb	r3, [r3, #0]
- 800877a:	041a      	lsls	r2, r3, #16
-              ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8) | \
- 800877c:	68bb      	ldr	r3, [r7, #8]
- 800877e:	785b      	ldrb	r3, [r3, #1]
- 8008780:	021b      	lsls	r3, r3, #8
-    tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16) | \
- 8008782:	4313      	orrs	r3, r2
-              ((uint32_t) sAlarm->AlarmTime.Seconds) | \
- 8008784:	68ba      	ldr	r2, [r7, #8]
- 8008786:	7892      	ldrb	r2, [r2, #2]
-              ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8) | \
- 8008788:	431a      	orrs	r2, r3
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \
- 800878a:	68bb      	ldr	r3, [r7, #8]
- 800878c:	7b1b      	ldrb	r3, [r3, #12]
- 800878e:	041b      	lsls	r3, r3, #16
-              ((uint32_t) sAlarm->AlarmTime.Seconds) | \
- 8008790:	431a      	orrs	r2, r3
-              ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24) | \
- 8008792:	68bb      	ldr	r3, [r7, #8]
- 8008794:	f893 3024 	ldrb.w	r3, [r3, #36]	; 0x24
- 8008798:	061b      	lsls	r3, r3, #24
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \
- 800879a:	431a      	orrs	r2, r3
-              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
- 800879c:	68bb      	ldr	r3, [r7, #8]
- 800879e:	6a1b      	ldr	r3, [r3, #32]
-              ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24) | \
- 80087a0:	431a      	orrs	r2, r3
-              ((uint32_t)sAlarm->AlarmMask));
- 80087a2:	68bb      	ldr	r3, [r7, #8]
- 80087a4:	699b      	ldr	r3, [r3, #24]
-    tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16) | \
- 80087a6:	4313      	orrs	r3, r2
- 80087a8:	61fb      	str	r3, [r7, #28]
-  }
-
-  /* Configure the Alarm A or Alarm B Sub Second registers */
-  subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask));
- 80087aa:	68bb      	ldr	r3, [r7, #8]
- 80087ac:	685a      	ldr	r2, [r3, #4]
- 80087ae:	68bb      	ldr	r3, [r7, #8]
- 80087b0:	69db      	ldr	r3, [r3, #28]
- 80087b2:	4313      	orrs	r3, r2
- 80087b4:	617b      	str	r3, [r7, #20]
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- 80087b6:	68fb      	ldr	r3, [r7, #12]
- 80087b8:	681b      	ldr	r3, [r3, #0]
- 80087ba:	22ca      	movs	r2, #202	; 0xca
- 80087bc:	625a      	str	r2, [r3, #36]	; 0x24
- 80087be:	68fb      	ldr	r3, [r7, #12]
- 80087c0:	681b      	ldr	r3, [r3, #0]
- 80087c2:	2253      	movs	r2, #83	; 0x53
- 80087c4:	625a      	str	r2, [r3, #36]	; 0x24
-
-  /* Configure the Alarm register */
-  if(sAlarm->Alarm == RTC_ALARM_A)
- 80087c6:	68bb      	ldr	r3, [r7, #8]
- 80087c8:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 80087ca:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
- 80087ce:	d13f      	bne.n	8008850 <HAL_RTC_SetAlarm+0x194>
-  {
-    /* Disable the Alarm A interrupt */
-    __HAL_RTC_ALARMA_DISABLE(hrtc);
- 80087d0:	68fb      	ldr	r3, [r7, #12]
- 80087d2:	681b      	ldr	r3, [r3, #0]
- 80087d4:	689a      	ldr	r2, [r3, #8]
- 80087d6:	68fb      	ldr	r3, [r7, #12]
- 80087d8:	681b      	ldr	r3, [r3, #0]
- 80087da:	f422 7280 	bic.w	r2, r2, #256	; 0x100
- 80087de:	609a      	str	r2, [r3, #8]
-
-    /* In case of interrupt mode is used, the interrupt source must disabled */
-    __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
- 80087e0:	68fb      	ldr	r3, [r7, #12]
- 80087e2:	681b      	ldr	r3, [r3, #0]
- 80087e4:	689a      	ldr	r2, [r3, #8]
- 80087e6:	68fb      	ldr	r3, [r7, #12]
- 80087e8:	681b      	ldr	r3, [r3, #0]
- 80087ea:	f422 5280 	bic.w	r2, r2, #4096	; 0x1000
- 80087ee:	609a      	str	r2, [r3, #8]
-
-    /* Get tick */
-    tickstart = HAL_GetTick();
- 80087f0:	f7fb fe7e 	bl	80044f0 <HAL_GetTick>
- 80087f4:	61b8      	str	r0, [r7, #24]
-
-    /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
-    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
- 80087f6:	e013      	b.n	8008820 <HAL_RTC_SetAlarm+0x164>
-    {
-      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
- 80087f8:	f7fb fe7a 	bl	80044f0 <HAL_GetTick>
- 80087fc:	4602      	mov	r2, r0
- 80087fe:	69bb      	ldr	r3, [r7, #24]
- 8008800:	1ad3      	subs	r3, r2, r3
- 8008802:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
- 8008806:	d90b      	bls.n	8008820 <HAL_RTC_SetAlarm+0x164>
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 8008808:	68fb      	ldr	r3, [r7, #12]
- 800880a:	681b      	ldr	r3, [r3, #0]
- 800880c:	22ff      	movs	r2, #255	; 0xff
- 800880e:	625a      	str	r2, [r3, #36]	; 0x24
-
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
- 8008810:	68fb      	ldr	r3, [r7, #12]
- 8008812:	2203      	movs	r2, #3
- 8008814:	775a      	strb	r2, [r3, #29]
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
- 8008816:	68fb      	ldr	r3, [r7, #12]
- 8008818:	2200      	movs	r2, #0
- 800881a:	771a      	strb	r2, [r3, #28]
-
-        return HAL_TIMEOUT;
- 800881c:	2303      	movs	r3, #3
- 800881e:	e061      	b.n	80088e4 <HAL_RTC_SetAlarm+0x228>
-    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
- 8008820:	68fb      	ldr	r3, [r7, #12]
- 8008822:	681b      	ldr	r3, [r3, #0]
- 8008824:	68db      	ldr	r3, [r3, #12]
- 8008826:	f003 0301 	and.w	r3, r3, #1
- 800882a:	2b00      	cmp	r3, #0
- 800882c:	d0e4      	beq.n	80087f8 <HAL_RTC_SetAlarm+0x13c>
-      }
-    }
-
-    hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
- 800882e:	68fb      	ldr	r3, [r7, #12]
- 8008830:	681b      	ldr	r3, [r3, #0]
- 8008832:	69fa      	ldr	r2, [r7, #28]
- 8008834:	61da      	str	r2, [r3, #28]
-    /* Configure the Alarm A Sub Second register */
-    hrtc->Instance->ALRMASSR = subsecondtmpreg;
- 8008836:	68fb      	ldr	r3, [r7, #12]
- 8008838:	681b      	ldr	r3, [r3, #0]
- 800883a:	697a      	ldr	r2, [r7, #20]
- 800883c:	645a      	str	r2, [r3, #68]	; 0x44
-    /* Configure the Alarm state: Enable Alarm */
-    __HAL_RTC_ALARMA_ENABLE(hrtc);
- 800883e:	68fb      	ldr	r3, [r7, #12]
- 8008840:	681b      	ldr	r3, [r3, #0]
- 8008842:	689a      	ldr	r2, [r3, #8]
- 8008844:	68fb      	ldr	r3, [r7, #12]
- 8008846:	681b      	ldr	r3, [r3, #0]
- 8008848:	f442 7280 	orr.w	r2, r2, #256	; 0x100
- 800884c:	609a      	str	r2, [r3, #8]
- 800884e:	e03e      	b.n	80088ce <HAL_RTC_SetAlarm+0x212>
-  }
-  else
-  {
-    /* Disable the Alarm B interrupt */
-    __HAL_RTC_ALARMB_DISABLE(hrtc);
- 8008850:	68fb      	ldr	r3, [r7, #12]
- 8008852:	681b      	ldr	r3, [r3, #0]
- 8008854:	689a      	ldr	r2, [r3, #8]
- 8008856:	68fb      	ldr	r3, [r7, #12]
- 8008858:	681b      	ldr	r3, [r3, #0]
- 800885a:	f422 7200 	bic.w	r2, r2, #512	; 0x200
- 800885e:	609a      	str	r2, [r3, #8]
-
-    /* In case of interrupt mode is used, the interrupt source must disabled */
-    __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB);
- 8008860:	68fb      	ldr	r3, [r7, #12]
- 8008862:	681b      	ldr	r3, [r3, #0]
- 8008864:	689a      	ldr	r2, [r3, #8]
- 8008866:	68fb      	ldr	r3, [r7, #12]
- 8008868:	681b      	ldr	r3, [r3, #0]
- 800886a:	f422 5200 	bic.w	r2, r2, #8192	; 0x2000
- 800886e:	609a      	str	r2, [r3, #8]
-
-    /* Get tick */
-    tickstart = HAL_GetTick();
- 8008870:	f7fb fe3e 	bl	80044f0 <HAL_GetTick>
- 8008874:	61b8      	str	r0, [r7, #24]
-
-    /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
-    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
- 8008876:	e013      	b.n	80088a0 <HAL_RTC_SetAlarm+0x1e4>
-    {
-      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
- 8008878:	f7fb fe3a 	bl	80044f0 <HAL_GetTick>
- 800887c:	4602      	mov	r2, r0
- 800887e:	69bb      	ldr	r3, [r7, #24]
- 8008880:	1ad3      	subs	r3, r2, r3
- 8008882:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
- 8008886:	d90b      	bls.n	80088a0 <HAL_RTC_SetAlarm+0x1e4>
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 8008888:	68fb      	ldr	r3, [r7, #12]
- 800888a:	681b      	ldr	r3, [r3, #0]
- 800888c:	22ff      	movs	r2, #255	; 0xff
- 800888e:	625a      	str	r2, [r3, #36]	; 0x24
-
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
- 8008890:	68fb      	ldr	r3, [r7, #12]
- 8008892:	2203      	movs	r2, #3
- 8008894:	775a      	strb	r2, [r3, #29]
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
- 8008896:	68fb      	ldr	r3, [r7, #12]
- 8008898:	2200      	movs	r2, #0
- 800889a:	771a      	strb	r2, [r3, #28]
-
-        return HAL_TIMEOUT;
- 800889c:	2303      	movs	r3, #3
- 800889e:	e021      	b.n	80088e4 <HAL_RTC_SetAlarm+0x228>
-    while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
- 80088a0:	68fb      	ldr	r3, [r7, #12]
- 80088a2:	681b      	ldr	r3, [r3, #0]
- 80088a4:	68db      	ldr	r3, [r3, #12]
- 80088a6:	f003 0302 	and.w	r3, r3, #2
- 80088aa:	2b00      	cmp	r3, #0
- 80088ac:	d0e4      	beq.n	8008878 <HAL_RTC_SetAlarm+0x1bc>
-      }
-    }
-
-    hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
- 80088ae:	68fb      	ldr	r3, [r7, #12]
- 80088b0:	681b      	ldr	r3, [r3, #0]
- 80088b2:	69fa      	ldr	r2, [r7, #28]
- 80088b4:	621a      	str	r2, [r3, #32]
-    /* Configure the Alarm B Sub Second register */
-    hrtc->Instance->ALRMBSSR = subsecondtmpreg;
- 80088b6:	68fb      	ldr	r3, [r7, #12]
- 80088b8:	681b      	ldr	r3, [r3, #0]
- 80088ba:	697a      	ldr	r2, [r7, #20]
- 80088bc:	649a      	str	r2, [r3, #72]	; 0x48
-    /* Configure the Alarm state: Enable Alarm */
-    __HAL_RTC_ALARMB_ENABLE(hrtc);
- 80088be:	68fb      	ldr	r3, [r7, #12]
- 80088c0:	681b      	ldr	r3, [r3, #0]
- 80088c2:	689a      	ldr	r2, [r3, #8]
- 80088c4:	68fb      	ldr	r3, [r7, #12]
- 80088c6:	681b      	ldr	r3, [r3, #0]
- 80088c8:	f442 7200 	orr.w	r2, r2, #512	; 0x200
- 80088cc:	609a      	str	r2, [r3, #8]
-  }
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 80088ce:	68fb      	ldr	r3, [r7, #12]
- 80088d0:	681b      	ldr	r3, [r3, #0]
- 80088d2:	22ff      	movs	r2, #255	; 0xff
- 80088d4:	625a      	str	r2, [r3, #36]	; 0x24
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
- 80088d6:	68fb      	ldr	r3, [r7, #12]
- 80088d8:	2201      	movs	r2, #1
- 80088da:	775a      	strb	r2, [r3, #29]
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
- 80088dc:	68fb      	ldr	r3, [r7, #12]
- 80088de:	2200      	movs	r2, #0
- 80088e0:	771a      	strb	r2, [r3, #28]
-
-  return HAL_OK;
- 80088e2:	2300      	movs	r3, #0
-}
- 80088e4:	4618      	mov	r0, r3
- 80088e6:	3724      	adds	r7, #36	; 0x24
- 80088e8:	46bd      	mov	sp, r7
- 80088ea:	bd90      	pop	{r4, r7, pc}
-
-080088ec <HAL_RTC_WaitForSynchro>:
-  * @param  hrtc pointer to a RTC_HandleTypeDef structure that contains
-  *                the configuration information for RTC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc)
-{
- 80088ec:	b580      	push	{r7, lr}
- 80088ee:	b084      	sub	sp, #16
- 80088f0:	af00      	add	r7, sp, #0
- 80088f2:	6078      	str	r0, [r7, #4]
-  uint32_t tickstart = 0;
- 80088f4:	2300      	movs	r3, #0
- 80088f6:	60fb      	str	r3, [r7, #12]
-
-  /* Clear RSF flag */
-  hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK;
- 80088f8:	687b      	ldr	r3, [r7, #4]
- 80088fa:	681b      	ldr	r3, [r3, #0]
- 80088fc:	68da      	ldr	r2, [r3, #12]
- 80088fe:	687b      	ldr	r3, [r7, #4]
- 8008900:	681b      	ldr	r3, [r3, #0]
- 8008902:	f022 02a0 	bic.w	r2, r2, #160	; 0xa0
- 8008906:	60da      	str	r2, [r3, #12]
-
-    /* Get tick */
-    tickstart = HAL_GetTick();
- 8008908:	f7fb fdf2 	bl	80044f0 <HAL_GetTick>
- 800890c:	60f8      	str	r0, [r7, #12]
-
-  /* Wait the registers to be synchronised */
-  while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET)
- 800890e:	e009      	b.n	8008924 <HAL_RTC_WaitForSynchro+0x38>
-  {
-    if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
- 8008910:	f7fb fdee 	bl	80044f0 <HAL_GetTick>
- 8008914:	4602      	mov	r2, r0
- 8008916:	68fb      	ldr	r3, [r7, #12]
- 8008918:	1ad3      	subs	r3, r2, r3
- 800891a:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
- 800891e:	d901      	bls.n	8008924 <HAL_RTC_WaitForSynchro+0x38>
-    {
-      return HAL_TIMEOUT;
- 8008920:	2303      	movs	r3, #3
- 8008922:	e007      	b.n	8008934 <HAL_RTC_WaitForSynchro+0x48>
-  while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET)
- 8008924:	687b      	ldr	r3, [r7, #4]
- 8008926:	681b      	ldr	r3, [r3, #0]
- 8008928:	68db      	ldr	r3, [r3, #12]
- 800892a:	f003 0320 	and.w	r3, r3, #32
- 800892e:	2b00      	cmp	r3, #0
- 8008930:	d0ee      	beq.n	8008910 <HAL_RTC_WaitForSynchro+0x24>
-    }
-  }
-
-  return HAL_OK;
- 8008932:	2300      	movs	r3, #0
-}
- 8008934:	4618      	mov	r0, r3
- 8008936:	3710      	adds	r7, #16
- 8008938:	46bd      	mov	sp, r7
- 800893a:	bd80      	pop	{r7, pc}
-
-0800893c <RTC_EnterInitMode>:
-  * @param  hrtc pointer to a RTC_HandleTypeDef structure that contains
-  *                the configuration information for RTC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc)
-{
- 800893c:	b580      	push	{r7, lr}
- 800893e:	b084      	sub	sp, #16
- 8008940:	af00      	add	r7, sp, #0
- 8008942:	6078      	str	r0, [r7, #4]
-  uint32_t tickstart = 0;
- 8008944:	2300      	movs	r3, #0
- 8008946:	60fb      	str	r3, [r7, #12]
-
-  /* Check if the Initialization mode is set */
-  if((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
- 8008948:	687b      	ldr	r3, [r7, #4]
- 800894a:	681b      	ldr	r3, [r3, #0]
- 800894c:	68db      	ldr	r3, [r3, #12]
- 800894e:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 8008952:	2b00      	cmp	r3, #0
- 8008954:	d119      	bne.n	800898a <RTC_EnterInitMode+0x4e>
-  {
-    /* Set the Initialization mode */
-    hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK;
- 8008956:	687b      	ldr	r3, [r7, #4]
- 8008958:	681b      	ldr	r3, [r3, #0]
- 800895a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
- 800895e:	60da      	str	r2, [r3, #12]
-
-    /* Get tick */
-    tickstart = HAL_GetTick();
- 8008960:	f7fb fdc6 	bl	80044f0 <HAL_GetTick>
- 8008964:	60f8      	str	r0, [r7, #12]
-
-    /* Wait till RTC is in INIT state and if Time out is reached exit */
-    while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
- 8008966:	e009      	b.n	800897c <RTC_EnterInitMode+0x40>
-    {
-      if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
- 8008968:	f7fb fdc2 	bl	80044f0 <HAL_GetTick>
- 800896c:	4602      	mov	r2, r0
- 800896e:	68fb      	ldr	r3, [r7, #12]
- 8008970:	1ad3      	subs	r3, r2, r3
- 8008972:	f5b3 7f7a 	cmp.w	r3, #1000	; 0x3e8
- 8008976:	d901      	bls.n	800897c <RTC_EnterInitMode+0x40>
-      {
-        return HAL_TIMEOUT;
- 8008978:	2303      	movs	r3, #3
- 800897a:	e007      	b.n	800898c <RTC_EnterInitMode+0x50>
-    while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
- 800897c:	687b      	ldr	r3, [r7, #4]
- 800897e:	681b      	ldr	r3, [r3, #0]
- 8008980:	68db      	ldr	r3, [r3, #12]
- 8008982:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 8008986:	2b00      	cmp	r3, #0
- 8008988:	d0ee      	beq.n	8008968 <RTC_EnterInitMode+0x2c>
-      }
-    }
-  }
-
-  return HAL_OK;
- 800898a:	2300      	movs	r3, #0
-}
- 800898c:	4618      	mov	r0, r3
- 800898e:	3710      	adds	r7, #16
- 8008990:	46bd      	mov	sp, r7
- 8008992:	bd80      	pop	{r7, pc}
-
-08008994 <RTC_ByteToBcd2>:
-  * @brief  Converts a 2 digit decimal to BCD format.
-  * @param  Value Byte to be converted
-  * @retval Converted byte
-  */
-uint8_t RTC_ByteToBcd2(uint8_t Value)
-{
- 8008994:	b480      	push	{r7}
- 8008996:	b085      	sub	sp, #20
- 8008998:	af00      	add	r7, sp, #0
- 800899a:	4603      	mov	r3, r0
- 800899c:	71fb      	strb	r3, [r7, #7]
-  uint32_t bcdhigh = 0;
- 800899e:	2300      	movs	r3, #0
- 80089a0:	60fb      	str	r3, [r7, #12]
-
-  while(Value >= 10)
- 80089a2:	e005      	b.n	80089b0 <RTC_ByteToBcd2+0x1c>
-  {
-    bcdhigh++;
- 80089a4:	68fb      	ldr	r3, [r7, #12]
- 80089a6:	3301      	adds	r3, #1
- 80089a8:	60fb      	str	r3, [r7, #12]
-    Value -= 10;
- 80089aa:	79fb      	ldrb	r3, [r7, #7]
- 80089ac:	3b0a      	subs	r3, #10
- 80089ae:	71fb      	strb	r3, [r7, #7]
-  while(Value >= 10)
- 80089b0:	79fb      	ldrb	r3, [r7, #7]
- 80089b2:	2b09      	cmp	r3, #9
- 80089b4:	d8f6      	bhi.n	80089a4 <RTC_ByteToBcd2+0x10>
-  }
-
-  return  ((uint8_t)(bcdhigh << 4) | Value);
- 80089b6:	68fb      	ldr	r3, [r7, #12]
- 80089b8:	b2db      	uxtb	r3, r3
- 80089ba:	011b      	lsls	r3, r3, #4
- 80089bc:	b2da      	uxtb	r2, r3
- 80089be:	79fb      	ldrb	r3, [r7, #7]
- 80089c0:	4313      	orrs	r3, r2
- 80089c2:	b2db      	uxtb	r3, r3
-}
- 80089c4:	4618      	mov	r0, r3
- 80089c6:	3714      	adds	r7, #20
- 80089c8:	46bd      	mov	sp, r7
- 80089ca:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80089ce:	4770      	bx	lr
-
-080089d0 <HAL_RTCEx_SetTimeStamp>:
-  *             @arg RTC_TIMESTAMPPIN_PI8: PI8 is selected as RTC TimeStamp Pin.
-  *             @arg RTC_TIMESTAMPPIN_PC1: PC1 is selected as RTC TimeStamp Pin.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
-{
- 80089d0:	b480      	push	{r7}
- 80089d2:	b087      	sub	sp, #28
- 80089d4:	af00      	add	r7, sp, #0
- 80089d6:	60f8      	str	r0, [r7, #12]
- 80089d8:	60b9      	str	r1, [r7, #8]
- 80089da:	607a      	str	r2, [r7, #4]
-  uint32_t tmpreg = 0;
- 80089dc:	2300      	movs	r3, #0
- 80089de:	617b      	str	r3, [r7, #20]
-  /* Check the parameters */
-  assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
-  assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
- 80089e0:	68fb      	ldr	r3, [r7, #12]
- 80089e2:	7f1b      	ldrb	r3, [r3, #28]
- 80089e4:	2b01      	cmp	r3, #1
- 80089e6:	d101      	bne.n	80089ec <HAL_RTCEx_SetTimeStamp+0x1c>
- 80089e8:	2302      	movs	r3, #2
- 80089ea:	e03e      	b.n	8008a6a <HAL_RTCEx_SetTimeStamp+0x9a>
- 80089ec:	68fb      	ldr	r3, [r7, #12]
- 80089ee:	2201      	movs	r2, #1
- 80089f0:	771a      	strb	r2, [r3, #28]
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
- 80089f2:	68fb      	ldr	r3, [r7, #12]
- 80089f4:	2202      	movs	r2, #2
- 80089f6:	775a      	strb	r2, [r3, #29]
-
-  /* Get the RTC_CR register and clear the bits to be configured */
-  tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
- 80089f8:	68fb      	ldr	r3, [r7, #12]
- 80089fa:	681b      	ldr	r3, [r3, #0]
- 80089fc:	689a      	ldr	r2, [r3, #8]
- 80089fe:	4b1e      	ldr	r3, [pc, #120]	; (8008a78 <HAL_RTCEx_SetTimeStamp+0xa8>)
- 8008a00:	4013      	ands	r3, r2
- 8008a02:	617b      	str	r3, [r7, #20]
-
-  tmpreg|= TimeStampEdge;
- 8008a04:	697a      	ldr	r2, [r7, #20]
- 8008a06:	68bb      	ldr	r3, [r7, #8]
- 8008a08:	4313      	orrs	r3, r2
- 8008a0a:	617b      	str	r3, [r7, #20]
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
- 8008a0c:	68fb      	ldr	r3, [r7, #12]
- 8008a0e:	681b      	ldr	r3, [r3, #0]
- 8008a10:	22ca      	movs	r2, #202	; 0xca
- 8008a12:	625a      	str	r2, [r3, #36]	; 0x24
- 8008a14:	68fb      	ldr	r3, [r7, #12]
- 8008a16:	681b      	ldr	r3, [r3, #0]
- 8008a18:	2253      	movs	r2, #83	; 0x53
- 8008a1a:	625a      	str	r2, [r3, #36]	; 0x24
-
-  hrtc->Instance->OR &= (uint32_t)~RTC_OR_TSINSEL;
- 8008a1c:	68fb      	ldr	r3, [r7, #12]
- 8008a1e:	681b      	ldr	r3, [r3, #0]
- 8008a20:	6cda      	ldr	r2, [r3, #76]	; 0x4c
- 8008a22:	68fb      	ldr	r3, [r7, #12]
- 8008a24:	681b      	ldr	r3, [r3, #0]
- 8008a26:	f022 0206 	bic.w	r2, r2, #6
- 8008a2a:	64da      	str	r2, [r3, #76]	; 0x4c
-  hrtc->Instance->OR |= (uint32_t)(RTC_TimeStampPin);
- 8008a2c:	68fb      	ldr	r3, [r7, #12]
- 8008a2e:	681b      	ldr	r3, [r3, #0]
- 8008a30:	6cd9      	ldr	r1, [r3, #76]	; 0x4c
- 8008a32:	68fb      	ldr	r3, [r7, #12]
- 8008a34:	681b      	ldr	r3, [r3, #0]
- 8008a36:	687a      	ldr	r2, [r7, #4]
- 8008a38:	430a      	orrs	r2, r1
- 8008a3a:	64da      	str	r2, [r3, #76]	; 0x4c
-
-  /* Configure the Time Stamp TSEDGE and Enable bits */
-  hrtc->Instance->CR = (uint32_t)tmpreg;
- 8008a3c:	68fb      	ldr	r3, [r7, #12]
- 8008a3e:	681b      	ldr	r3, [r3, #0]
- 8008a40:	697a      	ldr	r2, [r7, #20]
- 8008a42:	609a      	str	r2, [r3, #8]
-
-  __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
- 8008a44:	68fb      	ldr	r3, [r7, #12]
- 8008a46:	681b      	ldr	r3, [r3, #0]
- 8008a48:	689a      	ldr	r2, [r3, #8]
- 8008a4a:	68fb      	ldr	r3, [r7, #12]
- 8008a4c:	681b      	ldr	r3, [r3, #0]
- 8008a4e:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
- 8008a52:	609a      	str	r2, [r3, #8]
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
- 8008a54:	68fb      	ldr	r3, [r7, #12]
- 8008a56:	681b      	ldr	r3, [r3, #0]
- 8008a58:	22ff      	movs	r2, #255	; 0xff
- 8008a5a:	625a      	str	r2, [r3, #36]	; 0x24
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
- 8008a5c:	68fb      	ldr	r3, [r7, #12]
- 8008a5e:	2201      	movs	r2, #1
- 8008a60:	775a      	strb	r2, [r3, #29]
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
- 8008a62:	68fb      	ldr	r3, [r7, #12]
- 8008a64:	2200      	movs	r2, #0
- 8008a66:	771a      	strb	r2, [r3, #28]
-
-  return HAL_OK;
- 8008a68:	2300      	movs	r3, #0
-}
- 8008a6a:	4618      	mov	r0, r3
- 8008a6c:	371c      	adds	r7, #28
- 8008a6e:	46bd      	mov	sp, r7
- 8008a70:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8008a74:	4770      	bx	lr
- 8008a76:	bf00      	nop
- 8008a78:	fffff7f7 	.word	0xfffff7f7
-
-08008a7c <HAL_SDRAM_Init>:
-  *                the configuration information for SDRAM module.
-  * @param  Timing Pointer to SDRAM control timing structure 
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
-{   
- 8008a7c:	b580      	push	{r7, lr}
- 8008a7e:	b082      	sub	sp, #8
- 8008a80:	af00      	add	r7, sp, #0
- 8008a82:	6078      	str	r0, [r7, #4]
- 8008a84:	6039      	str	r1, [r7, #0]
-  /* Check the SDRAM handle parameter */
-  if(hsdram == NULL)
- 8008a86:	687b      	ldr	r3, [r7, #4]
- 8008a88:	2b00      	cmp	r3, #0
- 8008a8a:	d101      	bne.n	8008a90 <HAL_SDRAM_Init+0x14>
-  {
-    return HAL_ERROR;
- 8008a8c:	2301      	movs	r3, #1
- 8008a8e:	e025      	b.n	8008adc <HAL_SDRAM_Init+0x60>
-  }
-  
-  if(hsdram->State == HAL_SDRAM_STATE_RESET)
- 8008a90:	687b      	ldr	r3, [r7, #4]
- 8008a92:	f893 302c 	ldrb.w	r3, [r3, #44]	; 0x2c
- 8008a96:	b2db      	uxtb	r3, r3
- 8008a98:	2b00      	cmp	r3, #0
- 8008a9a:	d106      	bne.n	8008aaa <HAL_SDRAM_Init+0x2e>
-  {  
-    /* Allocate lock resource and initialize it */
-    hsdram->Lock = HAL_UNLOCKED;
- 8008a9c:	687b      	ldr	r3, [r7, #4]
- 8008a9e:	2200      	movs	r2, #0
- 8008aa0:	f883 202d 	strb.w	r2, [r3, #45]	; 0x2d
-
-    /* Init the low level hardware */
-    hsdram->MspInitCallback(hsdram);
-#else
-    /* Initialize the low level hardware (MSP) */
-    HAL_SDRAM_MspInit(hsdram);
- 8008aa4:	6878      	ldr	r0, [r7, #4]
- 8008aa6:	f7fb fbfd 	bl	80042a4 <HAL_SDRAM_MspInit>
-#endif
-  }
-  
-  /* Initialize the SDRAM controller state */
-  hsdram->State = HAL_SDRAM_STATE_BUSY;
- 8008aaa:	687b      	ldr	r3, [r7, #4]
- 8008aac:	2202      	movs	r2, #2
- 8008aae:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
-  
-  /* Initialize SDRAM control Interface */
-  FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
- 8008ab2:	687b      	ldr	r3, [r7, #4]
- 8008ab4:	681a      	ldr	r2, [r3, #0]
- 8008ab6:	687b      	ldr	r3, [r7, #4]
- 8008ab8:	3304      	adds	r3, #4
- 8008aba:	4619      	mov	r1, r3
- 8008abc:	4610      	mov	r0, r2
- 8008abe:	f001 fe61 	bl	800a784 <FMC_SDRAM_Init>
-  
-  /* Initialize SDRAM timing Interface */
-  FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank); 
- 8008ac2:	687b      	ldr	r3, [r7, #4]
- 8008ac4:	6818      	ldr	r0, [r3, #0]
- 8008ac6:	687b      	ldr	r3, [r7, #4]
- 8008ac8:	685b      	ldr	r3, [r3, #4]
- 8008aca:	461a      	mov	r2, r3
- 8008acc:	6839      	ldr	r1, [r7, #0]
- 8008ace:	f001 fecb 	bl	800a868 <FMC_SDRAM_Timing_Init>
-  
-  /* Update the SDRAM controller state */
-  hsdram->State = HAL_SDRAM_STATE_READY;
- 8008ad2:	687b      	ldr	r3, [r7, #4]
- 8008ad4:	2201      	movs	r2, #1
- 8008ad6:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
-  
-  return HAL_OK;
- 8008ada:	2300      	movs	r3, #0
-}
- 8008adc:	4618      	mov	r0, r3
- 8008ade:	3708      	adds	r7, #8
- 8008ae0:	46bd      	mov	sp, r7
- 8008ae2:	bd80      	pop	{r7, pc}
-
-08008ae4 <HAL_SDRAM_SendCommand>:
-  * @param  Command SDRAM command structure
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */  
-HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
-{
- 8008ae4:	b580      	push	{r7, lr}
- 8008ae6:	b084      	sub	sp, #16
- 8008ae8:	af00      	add	r7, sp, #0
- 8008aea:	60f8      	str	r0, [r7, #12]
- 8008aec:	60b9      	str	r1, [r7, #8]
- 8008aee:	607a      	str	r2, [r7, #4]
-  /* Check the SDRAM controller state */
-  if(hsdram->State == HAL_SDRAM_STATE_BUSY)
- 8008af0:	68fb      	ldr	r3, [r7, #12]
- 8008af2:	f893 302c 	ldrb.w	r3, [r3, #44]	; 0x2c
- 8008af6:	b2db      	uxtb	r3, r3
- 8008af8:	2b02      	cmp	r3, #2
- 8008afa:	d101      	bne.n	8008b00 <HAL_SDRAM_SendCommand+0x1c>
-  {
-    return HAL_BUSY;
- 8008afc:	2302      	movs	r3, #2
- 8008afe:	e018      	b.n	8008b32 <HAL_SDRAM_SendCommand+0x4e>
-  }
-  
-  /* Update the SDRAM state */
-  hsdram->State = HAL_SDRAM_STATE_BUSY;
- 8008b00:	68fb      	ldr	r3, [r7, #12]
- 8008b02:	2202      	movs	r2, #2
- 8008b04:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
-  
-  /* Send SDRAM command */
-  FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout);
- 8008b08:	68fb      	ldr	r3, [r7, #12]
- 8008b0a:	681b      	ldr	r3, [r3, #0]
- 8008b0c:	687a      	ldr	r2, [r7, #4]
- 8008b0e:	68b9      	ldr	r1, [r7, #8]
- 8008b10:	4618      	mov	r0, r3
- 8008b12:	f001 ff29 	bl	800a968 <FMC_SDRAM_SendCommand>
-  
-  /* Update the SDRAM controller state state */
-  if(Command->CommandMode == FMC_SDRAM_CMD_PALL)
- 8008b16:	68bb      	ldr	r3, [r7, #8]
- 8008b18:	681b      	ldr	r3, [r3, #0]
- 8008b1a:	2b02      	cmp	r3, #2
- 8008b1c:	d104      	bne.n	8008b28 <HAL_SDRAM_SendCommand+0x44>
-  {
-    hsdram->State = HAL_SDRAM_STATE_PRECHARGED;
- 8008b1e:	68fb      	ldr	r3, [r7, #12]
- 8008b20:	2205      	movs	r2, #5
- 8008b22:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
- 8008b26:	e003      	b.n	8008b30 <HAL_SDRAM_SendCommand+0x4c>
-  }
-  else
-  {
-    hsdram->State = HAL_SDRAM_STATE_READY;
- 8008b28:	68fb      	ldr	r3, [r7, #12]
- 8008b2a:	2201      	movs	r2, #1
- 8008b2c:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
-  }
-  
-  return HAL_OK;  
- 8008b30:	2300      	movs	r3, #0
-}
- 8008b32:	4618      	mov	r0, r3
- 8008b34:	3710      	adds	r7, #16
- 8008b36:	46bd      	mov	sp, r7
- 8008b38:	bd80      	pop	{r7, pc}
-
-08008b3a <HAL_SDRAM_ProgramRefreshRate>:
-  *                the configuration information for SDRAM module.  
-  * @param  RefreshRate The SDRAM refresh rate value       
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
-{
- 8008b3a:	b580      	push	{r7, lr}
- 8008b3c:	b082      	sub	sp, #8
- 8008b3e:	af00      	add	r7, sp, #0
- 8008b40:	6078      	str	r0, [r7, #4]
- 8008b42:	6039      	str	r1, [r7, #0]
-  /* Check the SDRAM controller state */
-  if(hsdram->State == HAL_SDRAM_STATE_BUSY)
- 8008b44:	687b      	ldr	r3, [r7, #4]
- 8008b46:	f893 302c 	ldrb.w	r3, [r3, #44]	; 0x2c
- 8008b4a:	b2db      	uxtb	r3, r3
- 8008b4c:	2b02      	cmp	r3, #2
- 8008b4e:	d101      	bne.n	8008b54 <HAL_SDRAM_ProgramRefreshRate+0x1a>
-  {
-    return HAL_BUSY;
- 8008b50:	2302      	movs	r3, #2
- 8008b52:	e00e      	b.n	8008b72 <HAL_SDRAM_ProgramRefreshRate+0x38>
-  } 
-  
-  /* Update the SDRAM state */
-  hsdram->State = HAL_SDRAM_STATE_BUSY;
- 8008b54:	687b      	ldr	r3, [r7, #4]
- 8008b56:	2202      	movs	r2, #2
- 8008b58:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
-  
-  /* Program the refresh rate */
-  FMC_SDRAM_ProgramRefreshRate(hsdram->Instance ,RefreshRate);
- 8008b5c:	687b      	ldr	r3, [r7, #4]
- 8008b5e:	681b      	ldr	r3, [r3, #0]
- 8008b60:	6839      	ldr	r1, [r7, #0]
- 8008b62:	4618      	mov	r0, r3
- 8008b64:	f001 ff21 	bl	800a9aa <FMC_SDRAM_ProgramRefreshRate>
-  
-  /* Update the SDRAM state */
-  hsdram->State = HAL_SDRAM_STATE_READY;
- 8008b68:	687b      	ldr	r3, [r7, #4]
- 8008b6a:	2201      	movs	r2, #1
- 8008b6c:	f883 202c 	strb.w	r2, [r3, #44]	; 0x2c
-  
-  return HAL_OK;   
- 8008b70:	2300      	movs	r3, #0
-}
- 8008b72:	4618      	mov	r0, r3
- 8008b74:	3708      	adds	r7, #8
- 8008b76:	46bd      	mov	sp, r7
- 8008b78:	bd80      	pop	{r7, pc}
-
-08008b7a <HAL_SPI_Init>:
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
-{
- 8008b7a:	b580      	push	{r7, lr}
- 8008b7c:	b084      	sub	sp, #16
- 8008b7e:	af00      	add	r7, sp, #0
- 8008b80:	6078      	str	r0, [r7, #4]
-  uint32_t frxth;
-
-  /* Check the SPI handle allocation */
-  if (hspi == NULL)
- 8008b82:	687b      	ldr	r3, [r7, #4]
- 8008b84:	2b00      	cmp	r3, #0
- 8008b86:	d101      	bne.n	8008b8c <HAL_SPI_Init+0x12>
-  {
-    return HAL_ERROR;
- 8008b88:	2301      	movs	r3, #1
- 8008b8a:	e084      	b.n	8008c96 <HAL_SPI_Init+0x11c>
-  {
-    assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
-    assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength));
-  }
-#else
-  hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- 8008b8c:	687b      	ldr	r3, [r7, #4]
- 8008b8e:	2200      	movs	r2, #0
- 8008b90:	629a      	str	r2, [r3, #40]	; 0x28
-#endif /* USE_SPI_CRC */
-
-  if (hspi->State == HAL_SPI_STATE_RESET)
- 8008b92:	687b      	ldr	r3, [r7, #4]
- 8008b94:	f893 305d 	ldrb.w	r3, [r3, #93]	; 0x5d
- 8008b98:	b2db      	uxtb	r3, r3
- 8008b9a:	2b00      	cmp	r3, #0
- 8008b9c:	d106      	bne.n	8008bac <HAL_SPI_Init+0x32>
-  {
-    /* Allocate lock resource and initialize it */
-    hspi->Lock = HAL_UNLOCKED;
- 8008b9e:	687b      	ldr	r3, [r7, #4]
- 8008ba0:	2200      	movs	r2, #0
- 8008ba2:	f883 205c 	strb.w	r2, [r3, #92]	; 0x5c
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
-    hspi->MspInitCallback(hspi);
-#else
-    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
-    HAL_SPI_MspInit(hspi);
- 8008ba6:	6878      	ldr	r0, [r7, #4]
- 8008ba8:	f7fb f8e8 	bl	8003d7c <HAL_SPI_MspInit>
-#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
-  }
-
-  hspi->State = HAL_SPI_STATE_BUSY;
- 8008bac:	687b      	ldr	r3, [r7, #4]
- 8008bae:	2202      	movs	r2, #2
- 8008bb0:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
-
-  /* Disable the selected SPI peripheral */
-  __HAL_SPI_DISABLE(hspi);
- 8008bb4:	687b      	ldr	r3, [r7, #4]
- 8008bb6:	681b      	ldr	r3, [r3, #0]
- 8008bb8:	681a      	ldr	r2, [r3, #0]
- 8008bba:	687b      	ldr	r3, [r7, #4]
- 8008bbc:	681b      	ldr	r3, [r3, #0]
- 8008bbe:	f022 0240 	bic.w	r2, r2, #64	; 0x40
- 8008bc2:	601a      	str	r2, [r3, #0]
-
-  /* Align by default the rs fifo threshold on the data size */
-  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
- 8008bc4:	687b      	ldr	r3, [r7, #4]
- 8008bc6:	68db      	ldr	r3, [r3, #12]
- 8008bc8:	f5b3 6fe0 	cmp.w	r3, #1792	; 0x700
- 8008bcc:	d902      	bls.n	8008bd4 <HAL_SPI_Init+0x5a>
-  {
-    frxth = SPI_RXFIFO_THRESHOLD_HF;
- 8008bce:	2300      	movs	r3, #0
- 8008bd0:	60fb      	str	r3, [r7, #12]
- 8008bd2:	e002      	b.n	8008bda <HAL_SPI_Init+0x60>
-  }
-  else
-  {
-    frxth = SPI_RXFIFO_THRESHOLD_QF;
- 8008bd4:	f44f 5380 	mov.w	r3, #4096	; 0x1000
- 8008bd8:	60fb      	str	r3, [r7, #12]
-  }
-
-  /* CRC calculation is valid only for 16Bit and 8 Bit */
-  if ((hspi->Init.DataSize != SPI_DATASIZE_16BIT) && (hspi->Init.DataSize != SPI_DATASIZE_8BIT))
- 8008bda:	687b      	ldr	r3, [r7, #4]
- 8008bdc:	68db      	ldr	r3, [r3, #12]
- 8008bde:	f5b3 6f70 	cmp.w	r3, #3840	; 0xf00
- 8008be2:	d007      	beq.n	8008bf4 <HAL_SPI_Init+0x7a>
- 8008be4:	687b      	ldr	r3, [r7, #4]
- 8008be6:	68db      	ldr	r3, [r3, #12]
- 8008be8:	f5b3 6fe0 	cmp.w	r3, #1792	; 0x700
- 8008bec:	d002      	beq.n	8008bf4 <HAL_SPI_Init+0x7a>
-  {
-    /* CRC must be disabled */
-    hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- 8008bee:	687b      	ldr	r3, [r7, #4]
- 8008bf0:	2200      	movs	r2, #0
- 8008bf2:	629a      	str	r2, [r3, #40]	; 0x28
-  }
-
-  /* Align the CRC Length on the data size */
-  if (hspi->Init.CRCLength == SPI_CRC_LENGTH_DATASIZE)
- 8008bf4:	687b      	ldr	r3, [r7, #4]
- 8008bf6:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8008bf8:	2b00      	cmp	r3, #0
- 8008bfa:	d10b      	bne.n	8008c14 <HAL_SPI_Init+0x9a>
-  {
-    /* CRC Length aligned on the data size : value set by default */
-    if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
- 8008bfc:	687b      	ldr	r3, [r7, #4]
- 8008bfe:	68db      	ldr	r3, [r3, #12]
- 8008c00:	f5b3 6fe0 	cmp.w	r3, #1792	; 0x700
- 8008c04:	d903      	bls.n	8008c0e <HAL_SPI_Init+0x94>
-    {
-      hspi->Init.CRCLength = SPI_CRC_LENGTH_16BIT;
- 8008c06:	687b      	ldr	r3, [r7, #4]
- 8008c08:	2202      	movs	r2, #2
- 8008c0a:	631a      	str	r2, [r3, #48]	; 0x30
- 8008c0c:	e002      	b.n	8008c14 <HAL_SPI_Init+0x9a>
-    }
-    else
-    {
-      hspi->Init.CRCLength = SPI_CRC_LENGTH_8BIT;
- 8008c0e:	687b      	ldr	r3, [r7, #4]
- 8008c10:	2201      	movs	r2, #1
- 8008c12:	631a      	str	r2, [r3, #48]	; 0x30
-  }
-
-  /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
-  /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management,
-  Communication speed, First bit and CRC calculation state */
-  WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction |
- 8008c14:	687b      	ldr	r3, [r7, #4]
- 8008c16:	685a      	ldr	r2, [r3, #4]
- 8008c18:	687b      	ldr	r3, [r7, #4]
- 8008c1a:	689b      	ldr	r3, [r3, #8]
- 8008c1c:	431a      	orrs	r2, r3
- 8008c1e:	687b      	ldr	r3, [r7, #4]
- 8008c20:	691b      	ldr	r3, [r3, #16]
- 8008c22:	431a      	orrs	r2, r3
- 8008c24:	687b      	ldr	r3, [r7, #4]
- 8008c26:	695b      	ldr	r3, [r3, #20]
- 8008c28:	431a      	orrs	r2, r3
- 8008c2a:	687b      	ldr	r3, [r7, #4]
- 8008c2c:	699b      	ldr	r3, [r3, #24]
- 8008c2e:	f403 7300 	and.w	r3, r3, #512	; 0x200
- 8008c32:	431a      	orrs	r2, r3
- 8008c34:	687b      	ldr	r3, [r7, #4]
- 8008c36:	69db      	ldr	r3, [r3, #28]
- 8008c38:	431a      	orrs	r2, r3
- 8008c3a:	687b      	ldr	r3, [r7, #4]
- 8008c3c:	6a1b      	ldr	r3, [r3, #32]
- 8008c3e:	ea42 0103 	orr.w	r1, r2, r3
- 8008c42:	687b      	ldr	r3, [r7, #4]
- 8008c44:	6a9a      	ldr	r2, [r3, #40]	; 0x28
- 8008c46:	687b      	ldr	r3, [r7, #4]
- 8008c48:	681b      	ldr	r3, [r3, #0]
- 8008c4a:	430a      	orrs	r2, r1
- 8008c4c:	601a      	str	r2, [r3, #0]
-    hspi->Instance->CR1 |= SPI_CR1_CRCL;
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Configure : NSS management, TI Mode, NSS Pulse, Data size and Rx Fifo threshold */
-  WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode |
- 8008c4e:	687b      	ldr	r3, [r7, #4]
- 8008c50:	699b      	ldr	r3, [r3, #24]
- 8008c52:	0c1b      	lsrs	r3, r3, #16
- 8008c54:	f003 0204 	and.w	r2, r3, #4
- 8008c58:	687b      	ldr	r3, [r7, #4]
- 8008c5a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8008c5c:	431a      	orrs	r2, r3
- 8008c5e:	687b      	ldr	r3, [r7, #4]
- 8008c60:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 8008c62:	431a      	orrs	r2, r3
- 8008c64:	687b      	ldr	r3, [r7, #4]
- 8008c66:	68db      	ldr	r3, [r3, #12]
- 8008c68:	ea42 0103 	orr.w	r1, r2, r3
- 8008c6c:	687b      	ldr	r3, [r7, #4]
- 8008c6e:	681b      	ldr	r3, [r3, #0]
- 8008c70:	68fa      	ldr	r2, [r7, #12]
- 8008c72:	430a      	orrs	r2, r1
- 8008c74:	605a      	str	r2, [r3, #4]
-  }
-#endif /* USE_SPI_CRC */
-
-#if defined(SPI_I2SCFGR_I2SMOD)
-  /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
-  CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
- 8008c76:	687b      	ldr	r3, [r7, #4]
- 8008c78:	681b      	ldr	r3, [r3, #0]
- 8008c7a:	69da      	ldr	r2, [r3, #28]
- 8008c7c:	687b      	ldr	r3, [r7, #4]
- 8008c7e:	681b      	ldr	r3, [r3, #0]
- 8008c80:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
- 8008c84:	61da      	str	r2, [r3, #28]
-#endif /* SPI_I2SCFGR_I2SMOD */
-
-  hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- 8008c86:	687b      	ldr	r3, [r7, #4]
- 8008c88:	2200      	movs	r2, #0
- 8008c8a:	661a      	str	r2, [r3, #96]	; 0x60
-  hspi->State     = HAL_SPI_STATE_READY;
- 8008c8c:	687b      	ldr	r3, [r7, #4]
- 8008c8e:	2201      	movs	r2, #1
- 8008c90:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
-
-  return HAL_OK;
- 8008c94:	2300      	movs	r3, #0
-}
- 8008c96:	4618      	mov	r0, r3
- 8008c98:	3710      	adds	r7, #16
- 8008c9a:	46bd      	mov	sp, r7
- 8008c9c:	bd80      	pop	{r7, pc}
-
-08008c9e <HAL_TIM_Base_Init>:
-  *         Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
-  * @param  htim TIM Base handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
-{
- 8008c9e:	b580      	push	{r7, lr}
- 8008ca0:	b082      	sub	sp, #8
- 8008ca2:	af00      	add	r7, sp, #0
- 8008ca4:	6078      	str	r0, [r7, #4]
-  /* Check the TIM handle allocation */
-  if (htim == NULL)
- 8008ca6:	687b      	ldr	r3, [r7, #4]
- 8008ca8:	2b00      	cmp	r3, #0
- 8008caa:	d101      	bne.n	8008cb0 <HAL_TIM_Base_Init+0x12>
-  {
-    return HAL_ERROR;
- 8008cac:	2301      	movs	r3, #1
- 8008cae:	e01d      	b.n	8008cec <HAL_TIM_Base_Init+0x4e>
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
-  if (htim->State == HAL_TIM_STATE_RESET)
- 8008cb0:	687b      	ldr	r3, [r7, #4]
- 8008cb2:	f893 303d 	ldrb.w	r3, [r3, #61]	; 0x3d
- 8008cb6:	b2db      	uxtb	r3, r3
- 8008cb8:	2b00      	cmp	r3, #0
- 8008cba:	d106      	bne.n	8008cca <HAL_TIM_Base_Init+0x2c>
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
- 8008cbc:	687b      	ldr	r3, [r7, #4]
- 8008cbe:	2200      	movs	r2, #0
- 8008cc0:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-    }
-    /* Init the low level hardware : GPIO, CLOCK, NVIC */
-    htim->Base_MspInitCallback(htim);
-#else
-    /* Init the low level hardware : GPIO, CLOCK, NVIC */
-    HAL_TIM_Base_MspInit(htim);
- 8008cc4:	6878      	ldr	r0, [r7, #4]
- 8008cc6:	f7fb f8cb 	bl	8003e60 <HAL_TIM_Base_MspInit>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-  }
-
-  /* Set the TIM state */
-  htim->State = HAL_TIM_STATE_BUSY;
- 8008cca:	687b      	ldr	r3, [r7, #4]
- 8008ccc:	2202      	movs	r2, #2
- 8008cce:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  /* Set the Time Base configuration */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
- 8008cd2:	687b      	ldr	r3, [r7, #4]
- 8008cd4:	681a      	ldr	r2, [r3, #0]
- 8008cd6:	687b      	ldr	r3, [r7, #4]
- 8008cd8:	3304      	adds	r3, #4
- 8008cda:	4619      	mov	r1, r3
- 8008cdc:	4610      	mov	r0, r2
- 8008cde:	f000 fbc3 	bl	8009468 <TIM_Base_SetConfig>
-
-  /* Initialize the TIM state*/
-  htim->State = HAL_TIM_STATE_READY;
- 8008ce2:	687b      	ldr	r3, [r7, #4]
- 8008ce4:	2201      	movs	r2, #1
- 8008ce6:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  return HAL_OK;
- 8008cea:	2300      	movs	r3, #0
-}
- 8008cec:	4618      	mov	r0, r3
- 8008cee:	3708      	adds	r7, #8
- 8008cf0:	46bd      	mov	sp, r7
- 8008cf2:	bd80      	pop	{r7, pc}
-
-08008cf4 <HAL_TIM_Base_Start_IT>:
-  * @brief  Starts the TIM Base generation in interrupt mode.
-  * @param  htim TIM Base handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
-{
- 8008cf4:	b480      	push	{r7}
- 8008cf6:	b085      	sub	sp, #20
- 8008cf8:	af00      	add	r7, sp, #0
- 8008cfa:	6078      	str	r0, [r7, #4]
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  /* Enable the TIM Update interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
- 8008cfc:	687b      	ldr	r3, [r7, #4]
- 8008cfe:	681b      	ldr	r3, [r3, #0]
- 8008d00:	68da      	ldr	r2, [r3, #12]
- 8008d02:	687b      	ldr	r3, [r7, #4]
- 8008d04:	681b      	ldr	r3, [r3, #0]
- 8008d06:	f042 0201 	orr.w	r2, r2, #1
- 8008d0a:	60da      	str	r2, [r3, #12]
-
-  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
-  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- 8008d0c:	687b      	ldr	r3, [r7, #4]
- 8008d0e:	681b      	ldr	r3, [r3, #0]
- 8008d10:	689a      	ldr	r2, [r3, #8]
- 8008d12:	4b0c      	ldr	r3, [pc, #48]	; (8008d44 <HAL_TIM_Base_Start_IT+0x50>)
- 8008d14:	4013      	ands	r3, r2
- 8008d16:	60fb      	str	r3, [r7, #12]
-  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- 8008d18:	68fb      	ldr	r3, [r7, #12]
- 8008d1a:	2b06      	cmp	r3, #6
- 8008d1c:	d00b      	beq.n	8008d36 <HAL_TIM_Base_Start_IT+0x42>
- 8008d1e:	68fb      	ldr	r3, [r7, #12]
- 8008d20:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
- 8008d24:	d007      	beq.n	8008d36 <HAL_TIM_Base_Start_IT+0x42>
-  {
-    __HAL_TIM_ENABLE(htim);
- 8008d26:	687b      	ldr	r3, [r7, #4]
- 8008d28:	681b      	ldr	r3, [r3, #0]
- 8008d2a:	681a      	ldr	r2, [r3, #0]
- 8008d2c:	687b      	ldr	r3, [r7, #4]
- 8008d2e:	681b      	ldr	r3, [r3, #0]
- 8008d30:	f042 0201 	orr.w	r2, r2, #1
- 8008d34:	601a      	str	r2, [r3, #0]
-  }
-
-  /* Return function status */
-  return HAL_OK;
- 8008d36:	2300      	movs	r3, #0
-}
- 8008d38:	4618      	mov	r0, r3
- 8008d3a:	3714      	adds	r7, #20
- 8008d3c:	46bd      	mov	sp, r7
- 8008d3e:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8008d42:	4770      	bx	lr
- 8008d44:	00010007 	.word	0x00010007
-
-08008d48 <HAL_TIM_PWM_Init>:
-  *         Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
-  * @param  htim TIM PWM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
-{
- 8008d48:	b580      	push	{r7, lr}
- 8008d4a:	b082      	sub	sp, #8
- 8008d4c:	af00      	add	r7, sp, #0
- 8008d4e:	6078      	str	r0, [r7, #4]
-  /* Check the TIM handle allocation */
-  if (htim == NULL)
- 8008d50:	687b      	ldr	r3, [r7, #4]
- 8008d52:	2b00      	cmp	r3, #0
- 8008d54:	d101      	bne.n	8008d5a <HAL_TIM_PWM_Init+0x12>
-  {
-    return HAL_ERROR;
- 8008d56:	2301      	movs	r3, #1
- 8008d58:	e01d      	b.n	8008d96 <HAL_TIM_PWM_Init+0x4e>
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
-  if (htim->State == HAL_TIM_STATE_RESET)
- 8008d5a:	687b      	ldr	r3, [r7, #4]
- 8008d5c:	f893 303d 	ldrb.w	r3, [r3, #61]	; 0x3d
- 8008d60:	b2db      	uxtb	r3, r3
- 8008d62:	2b00      	cmp	r3, #0
- 8008d64:	d106      	bne.n	8008d74 <HAL_TIM_PWM_Init+0x2c>
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
- 8008d66:	687b      	ldr	r3, [r7, #4]
- 8008d68:	2200      	movs	r2, #0
- 8008d6a:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-    }
-    /* Init the low level hardware : GPIO, CLOCK, NVIC */
-    htim->PWM_MspInitCallback(htim);
-#else
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
-    HAL_TIM_PWM_MspInit(htim);
- 8008d6e:	6878      	ldr	r0, [r7, #4]
- 8008d70:	f000 f815 	bl	8008d9e <HAL_TIM_PWM_MspInit>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-  }
-
-  /* Set the TIM state */
-  htim->State = HAL_TIM_STATE_BUSY;
- 8008d74:	687b      	ldr	r3, [r7, #4]
- 8008d76:	2202      	movs	r2, #2
- 8008d78:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  /* Init the base time for the PWM */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
- 8008d7c:	687b      	ldr	r3, [r7, #4]
- 8008d7e:	681a      	ldr	r2, [r3, #0]
- 8008d80:	687b      	ldr	r3, [r7, #4]
- 8008d82:	3304      	adds	r3, #4
- 8008d84:	4619      	mov	r1, r3
- 8008d86:	4610      	mov	r0, r2
- 8008d88:	f000 fb6e 	bl	8009468 <TIM_Base_SetConfig>
-
-  /* Initialize the TIM state*/
-  htim->State = HAL_TIM_STATE_READY;
- 8008d8c:	687b      	ldr	r3, [r7, #4]
- 8008d8e:	2201      	movs	r2, #1
- 8008d90:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  return HAL_OK;
- 8008d94:	2300      	movs	r3, #0
-}
- 8008d96:	4618      	mov	r0, r3
- 8008d98:	3708      	adds	r7, #8
- 8008d9a:	46bd      	mov	sp, r7
- 8008d9c:	bd80      	pop	{r7, pc}
-
-08008d9e <HAL_TIM_PWM_MspInit>:
-  * @brief  Initializes the TIM PWM MSP.
-  * @param  htim TIM PWM handle
-  * @retval None
-  */
-__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
-{
- 8008d9e:	b480      	push	{r7}
- 8008da0:	b083      	sub	sp, #12
- 8008da2:	af00      	add	r7, sp, #0
- 8008da4:	6078      	str	r0, [r7, #4]
-  UNUSED(htim);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TIM_PWM_MspInit could be implemented in the user file
-   */
-}
- 8008da6:	bf00      	nop
- 8008da8:	370c      	adds	r7, #12
- 8008daa:	46bd      	mov	sp, r7
- 8008dac:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8008db0:	4770      	bx	lr
-
-08008db2 <HAL_TIM_IRQHandler>:
-  * @brief  This function handles TIM interrupts requests.
-  * @param  htim TIM  handle
-  * @retval None
-  */
-void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
-{
- 8008db2:	b580      	push	{r7, lr}
- 8008db4:	b082      	sub	sp, #8
- 8008db6:	af00      	add	r7, sp, #0
- 8008db8:	6078      	str	r0, [r7, #4]
-  /* Capture compare 1 event */
-  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
- 8008dba:	687b      	ldr	r3, [r7, #4]
- 8008dbc:	681b      	ldr	r3, [r3, #0]
- 8008dbe:	691b      	ldr	r3, [r3, #16]
- 8008dc0:	f003 0302 	and.w	r3, r3, #2
- 8008dc4:	2b02      	cmp	r3, #2
- 8008dc6:	d122      	bne.n	8008e0e <HAL_TIM_IRQHandler+0x5c>
-  {
-    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
- 8008dc8:	687b      	ldr	r3, [r7, #4]
- 8008dca:	681b      	ldr	r3, [r3, #0]
- 8008dcc:	68db      	ldr	r3, [r3, #12]
- 8008dce:	f003 0302 	and.w	r3, r3, #2
- 8008dd2:	2b02      	cmp	r3, #2
- 8008dd4:	d11b      	bne.n	8008e0e <HAL_TIM_IRQHandler+0x5c>
-    {
-      {
-        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
- 8008dd6:	687b      	ldr	r3, [r7, #4]
- 8008dd8:	681b      	ldr	r3, [r3, #0]
- 8008dda:	f06f 0202 	mvn.w	r2, #2
- 8008dde:	611a      	str	r2, [r3, #16]
-        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
- 8008de0:	687b      	ldr	r3, [r7, #4]
- 8008de2:	2201      	movs	r2, #1
- 8008de4:	771a      	strb	r2, [r3, #28]
-
-        /* Input capture event */
-        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
- 8008de6:	687b      	ldr	r3, [r7, #4]
- 8008de8:	681b      	ldr	r3, [r3, #0]
- 8008dea:	699b      	ldr	r3, [r3, #24]
- 8008dec:	f003 0303 	and.w	r3, r3, #3
- 8008df0:	2b00      	cmp	r3, #0
- 8008df2:	d003      	beq.n	8008dfc <HAL_TIM_IRQHandler+0x4a>
-        {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-          htim->IC_CaptureCallback(htim);
-#else
-          HAL_TIM_IC_CaptureCallback(htim);
- 8008df4:	6878      	ldr	r0, [r7, #4]
- 8008df6:	f000 fb19 	bl	800942c <HAL_TIM_IC_CaptureCallback>
- 8008dfa:	e005      	b.n	8008e08 <HAL_TIM_IRQHandler+0x56>
-        {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-          htim->OC_DelayElapsedCallback(htim);
-          htim->PWM_PulseFinishedCallback(htim);
-#else
-          HAL_TIM_OC_DelayElapsedCallback(htim);
- 8008dfc:	6878      	ldr	r0, [r7, #4]
- 8008dfe:	f000 fb0b 	bl	8009418 <HAL_TIM_OC_DelayElapsedCallback>
-          HAL_TIM_PWM_PulseFinishedCallback(htim);
- 8008e02:	6878      	ldr	r0, [r7, #4]
- 8008e04:	f000 fb1c 	bl	8009440 <HAL_TIM_PWM_PulseFinishedCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-        }
-        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 8008e08:	687b      	ldr	r3, [r7, #4]
- 8008e0a:	2200      	movs	r2, #0
- 8008e0c:	771a      	strb	r2, [r3, #28]
-      }
-    }
-  }
-  /* Capture compare 2 event */
-  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
- 8008e0e:	687b      	ldr	r3, [r7, #4]
- 8008e10:	681b      	ldr	r3, [r3, #0]
- 8008e12:	691b      	ldr	r3, [r3, #16]
- 8008e14:	f003 0304 	and.w	r3, r3, #4
- 8008e18:	2b04      	cmp	r3, #4
- 8008e1a:	d122      	bne.n	8008e62 <HAL_TIM_IRQHandler+0xb0>
-  {
-    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
- 8008e1c:	687b      	ldr	r3, [r7, #4]
- 8008e1e:	681b      	ldr	r3, [r3, #0]
- 8008e20:	68db      	ldr	r3, [r3, #12]
- 8008e22:	f003 0304 	and.w	r3, r3, #4
- 8008e26:	2b04      	cmp	r3, #4
- 8008e28:	d11b      	bne.n	8008e62 <HAL_TIM_IRQHandler+0xb0>
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
- 8008e2a:	687b      	ldr	r3, [r7, #4]
- 8008e2c:	681b      	ldr	r3, [r3, #0]
- 8008e2e:	f06f 0204 	mvn.w	r2, #4
- 8008e32:	611a      	str	r2, [r3, #16]
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
- 8008e34:	687b      	ldr	r3, [r7, #4]
- 8008e36:	2202      	movs	r2, #2
- 8008e38:	771a      	strb	r2, [r3, #28]
-      /* Input capture event */
-      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
- 8008e3a:	687b      	ldr	r3, [r7, #4]
- 8008e3c:	681b      	ldr	r3, [r3, #0]
- 8008e3e:	699b      	ldr	r3, [r3, #24]
- 8008e40:	f403 7340 	and.w	r3, r3, #768	; 0x300
- 8008e44:	2b00      	cmp	r3, #0
- 8008e46:	d003      	beq.n	8008e50 <HAL_TIM_IRQHandler+0x9e>
-      {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-        htim->IC_CaptureCallback(htim);
-#else
-        HAL_TIM_IC_CaptureCallback(htim);
- 8008e48:	6878      	ldr	r0, [r7, #4]
- 8008e4a:	f000 faef 	bl	800942c <HAL_TIM_IC_CaptureCallback>
- 8008e4e:	e005      	b.n	8008e5c <HAL_TIM_IRQHandler+0xaa>
-      {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-        htim->OC_DelayElapsedCallback(htim);
-        htim->PWM_PulseFinishedCallback(htim);
-#else
-        HAL_TIM_OC_DelayElapsedCallback(htim);
- 8008e50:	6878      	ldr	r0, [r7, #4]
- 8008e52:	f000 fae1 	bl	8009418 <HAL_TIM_OC_DelayElapsedCallback>
-        HAL_TIM_PWM_PulseFinishedCallback(htim);
- 8008e56:	6878      	ldr	r0, [r7, #4]
- 8008e58:	f000 faf2 	bl	8009440 <HAL_TIM_PWM_PulseFinishedCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-      }
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 8008e5c:	687b      	ldr	r3, [r7, #4]
- 8008e5e:	2200      	movs	r2, #0
- 8008e60:	771a      	strb	r2, [r3, #28]
-    }
-  }
-  /* Capture compare 3 event */
-  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
- 8008e62:	687b      	ldr	r3, [r7, #4]
- 8008e64:	681b      	ldr	r3, [r3, #0]
- 8008e66:	691b      	ldr	r3, [r3, #16]
- 8008e68:	f003 0308 	and.w	r3, r3, #8
- 8008e6c:	2b08      	cmp	r3, #8
- 8008e6e:	d122      	bne.n	8008eb6 <HAL_TIM_IRQHandler+0x104>
-  {
-    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
- 8008e70:	687b      	ldr	r3, [r7, #4]
- 8008e72:	681b      	ldr	r3, [r3, #0]
- 8008e74:	68db      	ldr	r3, [r3, #12]
- 8008e76:	f003 0308 	and.w	r3, r3, #8
- 8008e7a:	2b08      	cmp	r3, #8
- 8008e7c:	d11b      	bne.n	8008eb6 <HAL_TIM_IRQHandler+0x104>
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
- 8008e7e:	687b      	ldr	r3, [r7, #4]
- 8008e80:	681b      	ldr	r3, [r3, #0]
- 8008e82:	f06f 0208 	mvn.w	r2, #8
- 8008e86:	611a      	str	r2, [r3, #16]
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
- 8008e88:	687b      	ldr	r3, [r7, #4]
- 8008e8a:	2204      	movs	r2, #4
- 8008e8c:	771a      	strb	r2, [r3, #28]
-      /* Input capture event */
-      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
- 8008e8e:	687b      	ldr	r3, [r7, #4]
- 8008e90:	681b      	ldr	r3, [r3, #0]
- 8008e92:	69db      	ldr	r3, [r3, #28]
- 8008e94:	f003 0303 	and.w	r3, r3, #3
- 8008e98:	2b00      	cmp	r3, #0
- 8008e9a:	d003      	beq.n	8008ea4 <HAL_TIM_IRQHandler+0xf2>
-      {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-        htim->IC_CaptureCallback(htim);
-#else
-        HAL_TIM_IC_CaptureCallback(htim);
- 8008e9c:	6878      	ldr	r0, [r7, #4]
- 8008e9e:	f000 fac5 	bl	800942c <HAL_TIM_IC_CaptureCallback>
- 8008ea2:	e005      	b.n	8008eb0 <HAL_TIM_IRQHandler+0xfe>
-      {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-        htim->OC_DelayElapsedCallback(htim);
-        htim->PWM_PulseFinishedCallback(htim);
-#else
-        HAL_TIM_OC_DelayElapsedCallback(htim);
- 8008ea4:	6878      	ldr	r0, [r7, #4]
- 8008ea6:	f000 fab7 	bl	8009418 <HAL_TIM_OC_DelayElapsedCallback>
-        HAL_TIM_PWM_PulseFinishedCallback(htim);
- 8008eaa:	6878      	ldr	r0, [r7, #4]
- 8008eac:	f000 fac8 	bl	8009440 <HAL_TIM_PWM_PulseFinishedCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-      }
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 8008eb0:	687b      	ldr	r3, [r7, #4]
- 8008eb2:	2200      	movs	r2, #0
- 8008eb4:	771a      	strb	r2, [r3, #28]
-    }
-  }
-  /* Capture compare 4 event */
-  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
- 8008eb6:	687b      	ldr	r3, [r7, #4]
- 8008eb8:	681b      	ldr	r3, [r3, #0]
- 8008eba:	691b      	ldr	r3, [r3, #16]
- 8008ebc:	f003 0310 	and.w	r3, r3, #16
- 8008ec0:	2b10      	cmp	r3, #16
- 8008ec2:	d122      	bne.n	8008f0a <HAL_TIM_IRQHandler+0x158>
-  {
-    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
- 8008ec4:	687b      	ldr	r3, [r7, #4]
- 8008ec6:	681b      	ldr	r3, [r3, #0]
- 8008ec8:	68db      	ldr	r3, [r3, #12]
- 8008eca:	f003 0310 	and.w	r3, r3, #16
- 8008ece:	2b10      	cmp	r3, #16
- 8008ed0:	d11b      	bne.n	8008f0a <HAL_TIM_IRQHandler+0x158>
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
- 8008ed2:	687b      	ldr	r3, [r7, #4]
- 8008ed4:	681b      	ldr	r3, [r3, #0]
- 8008ed6:	f06f 0210 	mvn.w	r2, #16
- 8008eda:	611a      	str	r2, [r3, #16]
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
- 8008edc:	687b      	ldr	r3, [r7, #4]
- 8008ede:	2208      	movs	r2, #8
- 8008ee0:	771a      	strb	r2, [r3, #28]
-      /* Input capture event */
-      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
- 8008ee2:	687b      	ldr	r3, [r7, #4]
- 8008ee4:	681b      	ldr	r3, [r3, #0]
- 8008ee6:	69db      	ldr	r3, [r3, #28]
- 8008ee8:	f403 7340 	and.w	r3, r3, #768	; 0x300
- 8008eec:	2b00      	cmp	r3, #0
- 8008eee:	d003      	beq.n	8008ef8 <HAL_TIM_IRQHandler+0x146>
-      {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-        htim->IC_CaptureCallback(htim);
-#else
-        HAL_TIM_IC_CaptureCallback(htim);
- 8008ef0:	6878      	ldr	r0, [r7, #4]
- 8008ef2:	f000 fa9b 	bl	800942c <HAL_TIM_IC_CaptureCallback>
- 8008ef6:	e005      	b.n	8008f04 <HAL_TIM_IRQHandler+0x152>
-      {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-        htim->OC_DelayElapsedCallback(htim);
-        htim->PWM_PulseFinishedCallback(htim);
-#else
-        HAL_TIM_OC_DelayElapsedCallback(htim);
- 8008ef8:	6878      	ldr	r0, [r7, #4]
- 8008efa:	f000 fa8d 	bl	8009418 <HAL_TIM_OC_DelayElapsedCallback>
-        HAL_TIM_PWM_PulseFinishedCallback(htim);
- 8008efe:	6878      	ldr	r0, [r7, #4]
- 8008f00:	f000 fa9e 	bl	8009440 <HAL_TIM_PWM_PulseFinishedCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-      }
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 8008f04:	687b      	ldr	r3, [r7, #4]
- 8008f06:	2200      	movs	r2, #0
- 8008f08:	771a      	strb	r2, [r3, #28]
-    }
-  }
-  /* TIM Update event */
-  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
- 8008f0a:	687b      	ldr	r3, [r7, #4]
- 8008f0c:	681b      	ldr	r3, [r3, #0]
- 8008f0e:	691b      	ldr	r3, [r3, #16]
- 8008f10:	f003 0301 	and.w	r3, r3, #1
- 8008f14:	2b01      	cmp	r3, #1
- 8008f16:	d10e      	bne.n	8008f36 <HAL_TIM_IRQHandler+0x184>
-  {
-    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
- 8008f18:	687b      	ldr	r3, [r7, #4]
- 8008f1a:	681b      	ldr	r3, [r3, #0]
- 8008f1c:	68db      	ldr	r3, [r3, #12]
- 8008f1e:	f003 0301 	and.w	r3, r3, #1
- 8008f22:	2b01      	cmp	r3, #1
- 8008f24:	d107      	bne.n	8008f36 <HAL_TIM_IRQHandler+0x184>
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
- 8008f26:	687b      	ldr	r3, [r7, #4]
- 8008f28:	681b      	ldr	r3, [r3, #0]
- 8008f2a:	f06f 0201 	mvn.w	r2, #1
- 8008f2e:	611a      	str	r2, [r3, #16]
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-      htim->PeriodElapsedCallback(htim);
-#else
-      HAL_TIM_PeriodElapsedCallback(htim);
- 8008f30:	6878      	ldr	r0, [r7, #4]
- 8008f32:	f7f8 ffbf 	bl	8001eb4 <HAL_TIM_PeriodElapsedCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-    }
-  }
-  /* TIM Break input event */
-  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
- 8008f36:	687b      	ldr	r3, [r7, #4]
- 8008f38:	681b      	ldr	r3, [r3, #0]
- 8008f3a:	691b      	ldr	r3, [r3, #16]
- 8008f3c:	f003 0380 	and.w	r3, r3, #128	; 0x80
- 8008f40:	2b80      	cmp	r3, #128	; 0x80
- 8008f42:	d10e      	bne.n	8008f62 <HAL_TIM_IRQHandler+0x1b0>
-  {
-    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
- 8008f44:	687b      	ldr	r3, [r7, #4]
- 8008f46:	681b      	ldr	r3, [r3, #0]
- 8008f48:	68db      	ldr	r3, [r3, #12]
- 8008f4a:	f003 0380 	and.w	r3, r3, #128	; 0x80
- 8008f4e:	2b80      	cmp	r3, #128	; 0x80
- 8008f50:	d107      	bne.n	8008f62 <HAL_TIM_IRQHandler+0x1b0>
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
- 8008f52:	687b      	ldr	r3, [r7, #4]
- 8008f54:	681b      	ldr	r3, [r3, #0]
- 8008f56:	f06f 0280 	mvn.w	r2, #128	; 0x80
- 8008f5a:	611a      	str	r2, [r3, #16]
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-      htim->BreakCallback(htim);
-#else
-      HAL_TIMEx_BreakCallback(htim);
- 8008f5c:	6878      	ldr	r0, [r7, #4]
- 8008f5e:	f000 ffb9 	bl	8009ed4 <HAL_TIMEx_BreakCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-    }
-  }
-  /* TIM Break2 input event */
-  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET)
- 8008f62:	687b      	ldr	r3, [r7, #4]
- 8008f64:	681b      	ldr	r3, [r3, #0]
- 8008f66:	691b      	ldr	r3, [r3, #16]
- 8008f68:	f403 7380 	and.w	r3, r3, #256	; 0x100
- 8008f6c:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
- 8008f70:	d10e      	bne.n	8008f90 <HAL_TIM_IRQHandler+0x1de>
-  {
-    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
- 8008f72:	687b      	ldr	r3, [r7, #4]
- 8008f74:	681b      	ldr	r3, [r3, #0]
- 8008f76:	68db      	ldr	r3, [r3, #12]
- 8008f78:	f003 0380 	and.w	r3, r3, #128	; 0x80
- 8008f7c:	2b80      	cmp	r3, #128	; 0x80
- 8008f7e:	d107      	bne.n	8008f90 <HAL_TIM_IRQHandler+0x1de>
-    {
-      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
- 8008f80:	687b      	ldr	r3, [r7, #4]
- 8008f82:	681b      	ldr	r3, [r3, #0]
- 8008f84:	f46f 7280 	mvn.w	r2, #256	; 0x100
- 8008f88:	611a      	str	r2, [r3, #16]
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-      htim->Break2Callback(htim);
-#else
-      HAL_TIMEx_Break2Callback(htim);
- 8008f8a:	6878      	ldr	r0, [r7, #4]
- 8008f8c:	f000 ffac 	bl	8009ee8 <HAL_TIMEx_Break2Callback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-    }
-  }
-  /* TIM Trigger detection event */
-  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
- 8008f90:	687b      	ldr	r3, [r7, #4]
- 8008f92:	681b      	ldr	r3, [r3, #0]
- 8008f94:	691b      	ldr	r3, [r3, #16]
- 8008f96:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 8008f9a:	2b40      	cmp	r3, #64	; 0x40
- 8008f9c:	d10e      	bne.n	8008fbc <HAL_TIM_IRQHandler+0x20a>
-  {
-    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
- 8008f9e:	687b      	ldr	r3, [r7, #4]
- 8008fa0:	681b      	ldr	r3, [r3, #0]
- 8008fa2:	68db      	ldr	r3, [r3, #12]
- 8008fa4:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 8008fa8:	2b40      	cmp	r3, #64	; 0x40
- 8008faa:	d107      	bne.n	8008fbc <HAL_TIM_IRQHandler+0x20a>
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
- 8008fac:	687b      	ldr	r3, [r7, #4]
- 8008fae:	681b      	ldr	r3, [r3, #0]
- 8008fb0:	f06f 0240 	mvn.w	r2, #64	; 0x40
- 8008fb4:	611a      	str	r2, [r3, #16]
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-      htim->TriggerCallback(htim);
-#else
-      HAL_TIM_TriggerCallback(htim);
- 8008fb6:	6878      	ldr	r0, [r7, #4]
- 8008fb8:	f000 fa4c 	bl	8009454 <HAL_TIM_TriggerCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-    }
-  }
-  /* TIM commutation event */
-  if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
- 8008fbc:	687b      	ldr	r3, [r7, #4]
- 8008fbe:	681b      	ldr	r3, [r3, #0]
- 8008fc0:	691b      	ldr	r3, [r3, #16]
- 8008fc2:	f003 0320 	and.w	r3, r3, #32
- 8008fc6:	2b20      	cmp	r3, #32
- 8008fc8:	d10e      	bne.n	8008fe8 <HAL_TIM_IRQHandler+0x236>
-  {
-    if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
- 8008fca:	687b      	ldr	r3, [r7, #4]
- 8008fcc:	681b      	ldr	r3, [r3, #0]
- 8008fce:	68db      	ldr	r3, [r3, #12]
- 8008fd0:	f003 0320 	and.w	r3, r3, #32
- 8008fd4:	2b20      	cmp	r3, #32
- 8008fd6:	d107      	bne.n	8008fe8 <HAL_TIM_IRQHandler+0x236>
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
- 8008fd8:	687b      	ldr	r3, [r7, #4]
- 8008fda:	681b      	ldr	r3, [r3, #0]
- 8008fdc:	f06f 0220 	mvn.w	r2, #32
- 8008fe0:	611a      	str	r2, [r3, #16]
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-      htim->CommutationCallback(htim);
-#else
-      HAL_TIMEx_CommutCallback(htim);
- 8008fe2:	6878      	ldr	r0, [r7, #4]
- 8008fe4:	f000 ff6c 	bl	8009ec0 <HAL_TIMEx_CommutCallback>
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-    }
-  }
-}
- 8008fe8:	bf00      	nop
- 8008fea:	3708      	adds	r7, #8
- 8008fec:	46bd      	mov	sp, r7
- 8008fee:	bd80      	pop	{r7, pc}
-
-08008ff0 <HAL_TIM_PWM_ConfigChannel>:
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
-                                            TIM_OC_InitTypeDef *sConfig,
-                                            uint32_t Channel)
-{
- 8008ff0:	b580      	push	{r7, lr}
- 8008ff2:	b084      	sub	sp, #16
- 8008ff4:	af00      	add	r7, sp, #0
- 8008ff6:	60f8      	str	r0, [r7, #12]
- 8008ff8:	60b9      	str	r1, [r7, #8]
- 8008ffa:	607a      	str	r2, [r7, #4]
-  assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
-  assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
-  assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
-
-  /* Process Locked */
-  __HAL_LOCK(htim);
- 8008ffc:	68fb      	ldr	r3, [r7, #12]
- 8008ffe:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
- 8009002:	2b01      	cmp	r3, #1
- 8009004:	d101      	bne.n	800900a <HAL_TIM_PWM_ConfigChannel+0x1a>
- 8009006:	2302      	movs	r3, #2
- 8009008:	e105      	b.n	8009216 <HAL_TIM_PWM_ConfigChannel+0x226>
- 800900a:	68fb      	ldr	r3, [r7, #12]
- 800900c:	2201      	movs	r2, #1
- 800900e:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-
-  htim->State = HAL_TIM_STATE_BUSY;
- 8009012:	68fb      	ldr	r3, [r7, #12]
- 8009014:	2202      	movs	r2, #2
- 8009016:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  switch (Channel)
- 800901a:	687b      	ldr	r3, [r7, #4]
- 800901c:	2b14      	cmp	r3, #20
- 800901e:	f200 80f0 	bhi.w	8009202 <HAL_TIM_PWM_ConfigChannel+0x212>
- 8009022:	a201      	add	r2, pc, #4	; (adr r2, 8009028 <HAL_TIM_PWM_ConfigChannel+0x38>)
- 8009024:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 8009028:	0800907d 	.word	0x0800907d
- 800902c:	08009203 	.word	0x08009203
- 8009030:	08009203 	.word	0x08009203
- 8009034:	08009203 	.word	0x08009203
- 8009038:	080090bd 	.word	0x080090bd
- 800903c:	08009203 	.word	0x08009203
- 8009040:	08009203 	.word	0x08009203
- 8009044:	08009203 	.word	0x08009203
- 8009048:	080090ff 	.word	0x080090ff
- 800904c:	08009203 	.word	0x08009203
- 8009050:	08009203 	.word	0x08009203
- 8009054:	08009203 	.word	0x08009203
- 8009058:	0800913f 	.word	0x0800913f
- 800905c:	08009203 	.word	0x08009203
- 8009060:	08009203 	.word	0x08009203
- 8009064:	08009203 	.word	0x08009203
- 8009068:	08009181 	.word	0x08009181
- 800906c:	08009203 	.word	0x08009203
- 8009070:	08009203 	.word	0x08009203
- 8009074:	08009203 	.word	0x08009203
- 8009078:	080091c1 	.word	0x080091c1
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-
-      /* Configure the Channel 1 in PWM mode */
-      TIM_OC1_SetConfig(htim->Instance, sConfig);
- 800907c:	68fb      	ldr	r3, [r7, #12]
- 800907e:	681b      	ldr	r3, [r3, #0]
- 8009080:	68b9      	ldr	r1, [r7, #8]
- 8009082:	4618      	mov	r0, r3
- 8009084:	f000 fa90 	bl	80095a8 <TIM_OC1_SetConfig>
-
-      /* Set the Preload enable bit for channel1 */
-      htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
- 8009088:	68fb      	ldr	r3, [r7, #12]
- 800908a:	681b      	ldr	r3, [r3, #0]
- 800908c:	699a      	ldr	r2, [r3, #24]
- 800908e:	68fb      	ldr	r3, [r7, #12]
- 8009090:	681b      	ldr	r3, [r3, #0]
- 8009092:	f042 0208 	orr.w	r2, r2, #8
- 8009096:	619a      	str	r2, [r3, #24]
-
-      /* Configure the Output Fast mode */
-      htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
- 8009098:	68fb      	ldr	r3, [r7, #12]
- 800909a:	681b      	ldr	r3, [r3, #0]
- 800909c:	699a      	ldr	r2, [r3, #24]
- 800909e:	68fb      	ldr	r3, [r7, #12]
- 80090a0:	681b      	ldr	r3, [r3, #0]
- 80090a2:	f022 0204 	bic.w	r2, r2, #4
- 80090a6:	619a      	str	r2, [r3, #24]
-      htim->Instance->CCMR1 |= sConfig->OCFastMode;
- 80090a8:	68fb      	ldr	r3, [r7, #12]
- 80090aa:	681b      	ldr	r3, [r3, #0]
- 80090ac:	6999      	ldr	r1, [r3, #24]
- 80090ae:	68bb      	ldr	r3, [r7, #8]
- 80090b0:	691a      	ldr	r2, [r3, #16]
- 80090b2:	68fb      	ldr	r3, [r7, #12]
- 80090b4:	681b      	ldr	r3, [r3, #0]
- 80090b6:	430a      	orrs	r2, r1
- 80090b8:	619a      	str	r2, [r3, #24]
-      break;
- 80090ba:	e0a3      	b.n	8009204 <HAL_TIM_PWM_ConfigChannel+0x214>
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-      /* Configure the Channel 2 in PWM mode */
-      TIM_OC2_SetConfig(htim->Instance, sConfig);
- 80090bc:	68fb      	ldr	r3, [r7, #12]
- 80090be:	681b      	ldr	r3, [r3, #0]
- 80090c0:	68b9      	ldr	r1, [r7, #8]
- 80090c2:	4618      	mov	r0, r3
- 80090c4:	f000 fae2 	bl	800968c <TIM_OC2_SetConfig>
-
-      /* Set the Preload enable bit for channel2 */
-      htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
- 80090c8:	68fb      	ldr	r3, [r7, #12]
- 80090ca:	681b      	ldr	r3, [r3, #0]
- 80090cc:	699a      	ldr	r2, [r3, #24]
- 80090ce:	68fb      	ldr	r3, [r7, #12]
- 80090d0:	681b      	ldr	r3, [r3, #0]
- 80090d2:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
- 80090d6:	619a      	str	r2, [r3, #24]
-
-      /* Configure the Output Fast mode */
-      htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
- 80090d8:	68fb      	ldr	r3, [r7, #12]
- 80090da:	681b      	ldr	r3, [r3, #0]
- 80090dc:	699a      	ldr	r2, [r3, #24]
- 80090de:	68fb      	ldr	r3, [r7, #12]
- 80090e0:	681b      	ldr	r3, [r3, #0]
- 80090e2:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
- 80090e6:	619a      	str	r2, [r3, #24]
-      htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
- 80090e8:	68fb      	ldr	r3, [r7, #12]
- 80090ea:	681b      	ldr	r3, [r3, #0]
- 80090ec:	6999      	ldr	r1, [r3, #24]
- 80090ee:	68bb      	ldr	r3, [r7, #8]
- 80090f0:	691b      	ldr	r3, [r3, #16]
- 80090f2:	021a      	lsls	r2, r3, #8
- 80090f4:	68fb      	ldr	r3, [r7, #12]
- 80090f6:	681b      	ldr	r3, [r3, #0]
- 80090f8:	430a      	orrs	r2, r1
- 80090fa:	619a      	str	r2, [r3, #24]
-      break;
- 80090fc:	e082      	b.n	8009204 <HAL_TIM_PWM_ConfigChannel+0x214>
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-
-      /* Configure the Channel 3 in PWM mode */
-      TIM_OC3_SetConfig(htim->Instance, sConfig);
- 80090fe:	68fb      	ldr	r3, [r7, #12]
- 8009100:	681b      	ldr	r3, [r3, #0]
- 8009102:	68b9      	ldr	r1, [r7, #8]
- 8009104:	4618      	mov	r0, r3
- 8009106:	f000 fb39 	bl	800977c <TIM_OC3_SetConfig>
-
-      /* Set the Preload enable bit for channel3 */
-      htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
- 800910a:	68fb      	ldr	r3, [r7, #12]
- 800910c:	681b      	ldr	r3, [r3, #0]
- 800910e:	69da      	ldr	r2, [r3, #28]
- 8009110:	68fb      	ldr	r3, [r7, #12]
- 8009112:	681b      	ldr	r3, [r3, #0]
- 8009114:	f042 0208 	orr.w	r2, r2, #8
- 8009118:	61da      	str	r2, [r3, #28]
-
-      /* Configure the Output Fast mode */
-      htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
- 800911a:	68fb      	ldr	r3, [r7, #12]
- 800911c:	681b      	ldr	r3, [r3, #0]
- 800911e:	69da      	ldr	r2, [r3, #28]
- 8009120:	68fb      	ldr	r3, [r7, #12]
- 8009122:	681b      	ldr	r3, [r3, #0]
- 8009124:	f022 0204 	bic.w	r2, r2, #4
- 8009128:	61da      	str	r2, [r3, #28]
-      htim->Instance->CCMR2 |= sConfig->OCFastMode;
- 800912a:	68fb      	ldr	r3, [r7, #12]
- 800912c:	681b      	ldr	r3, [r3, #0]
- 800912e:	69d9      	ldr	r1, [r3, #28]
- 8009130:	68bb      	ldr	r3, [r7, #8]
- 8009132:	691a      	ldr	r2, [r3, #16]
- 8009134:	68fb      	ldr	r3, [r7, #12]
- 8009136:	681b      	ldr	r3, [r3, #0]
- 8009138:	430a      	orrs	r2, r1
- 800913a:	61da      	str	r2, [r3, #28]
-      break;
- 800913c:	e062      	b.n	8009204 <HAL_TIM_PWM_ConfigChannel+0x214>
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-
-      /* Configure the Channel 4 in PWM mode */
-      TIM_OC4_SetConfig(htim->Instance, sConfig);
- 800913e:	68fb      	ldr	r3, [r7, #12]
- 8009140:	681b      	ldr	r3, [r3, #0]
- 8009142:	68b9      	ldr	r1, [r7, #8]
- 8009144:	4618      	mov	r0, r3
- 8009146:	f000 fb8f 	bl	8009868 <TIM_OC4_SetConfig>
-
-      /* Set the Preload enable bit for channel4 */
-      htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
- 800914a:	68fb      	ldr	r3, [r7, #12]
- 800914c:	681b      	ldr	r3, [r3, #0]
- 800914e:	69da      	ldr	r2, [r3, #28]
- 8009150:	68fb      	ldr	r3, [r7, #12]
- 8009152:	681b      	ldr	r3, [r3, #0]
- 8009154:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
- 8009158:	61da      	str	r2, [r3, #28]
-
-      /* Configure the Output Fast mode */
-      htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
- 800915a:	68fb      	ldr	r3, [r7, #12]
- 800915c:	681b      	ldr	r3, [r3, #0]
- 800915e:	69da      	ldr	r2, [r3, #28]
- 8009160:	68fb      	ldr	r3, [r7, #12]
- 8009162:	681b      	ldr	r3, [r3, #0]
- 8009164:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
- 8009168:	61da      	str	r2, [r3, #28]
-      htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
- 800916a:	68fb      	ldr	r3, [r7, #12]
- 800916c:	681b      	ldr	r3, [r3, #0]
- 800916e:	69d9      	ldr	r1, [r3, #28]
- 8009170:	68bb      	ldr	r3, [r7, #8]
- 8009172:	691b      	ldr	r3, [r3, #16]
- 8009174:	021a      	lsls	r2, r3, #8
- 8009176:	68fb      	ldr	r3, [r7, #12]
- 8009178:	681b      	ldr	r3, [r3, #0]
- 800917a:	430a      	orrs	r2, r1
- 800917c:	61da      	str	r2, [r3, #28]
-      break;
- 800917e:	e041      	b.n	8009204 <HAL_TIM_PWM_ConfigChannel+0x214>
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC5_INSTANCE(htim->Instance));
-
-      /* Configure the Channel 5 in PWM mode */
-      TIM_OC5_SetConfig(htim->Instance, sConfig);
- 8009180:	68fb      	ldr	r3, [r7, #12]
- 8009182:	681b      	ldr	r3, [r3, #0]
- 8009184:	68b9      	ldr	r1, [r7, #8]
- 8009186:	4618      	mov	r0, r3
- 8009188:	f000 fbc6 	bl	8009918 <TIM_OC5_SetConfig>
-
-      /* Set the Preload enable bit for channel5*/
-      htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE;
- 800918c:	68fb      	ldr	r3, [r7, #12]
- 800918e:	681b      	ldr	r3, [r3, #0]
- 8009190:	6d5a      	ldr	r2, [r3, #84]	; 0x54
- 8009192:	68fb      	ldr	r3, [r7, #12]
- 8009194:	681b      	ldr	r3, [r3, #0]
- 8009196:	f042 0208 	orr.w	r2, r2, #8
- 800919a:	655a      	str	r2, [r3, #84]	; 0x54
-
-      /* Configure the Output Fast mode */
-      htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE;
- 800919c:	68fb      	ldr	r3, [r7, #12]
- 800919e:	681b      	ldr	r3, [r3, #0]
- 80091a0:	6d5a      	ldr	r2, [r3, #84]	; 0x54
- 80091a2:	68fb      	ldr	r3, [r7, #12]
- 80091a4:	681b      	ldr	r3, [r3, #0]
- 80091a6:	f022 0204 	bic.w	r2, r2, #4
- 80091aa:	655a      	str	r2, [r3, #84]	; 0x54
-      htim->Instance->CCMR3 |= sConfig->OCFastMode;
- 80091ac:	68fb      	ldr	r3, [r7, #12]
- 80091ae:	681b      	ldr	r3, [r3, #0]
- 80091b0:	6d59      	ldr	r1, [r3, #84]	; 0x54
- 80091b2:	68bb      	ldr	r3, [r7, #8]
- 80091b4:	691a      	ldr	r2, [r3, #16]
- 80091b6:	68fb      	ldr	r3, [r7, #12]
- 80091b8:	681b      	ldr	r3, [r3, #0]
- 80091ba:	430a      	orrs	r2, r1
- 80091bc:	655a      	str	r2, [r3, #84]	; 0x54
-      break;
- 80091be:	e021      	b.n	8009204 <HAL_TIM_PWM_ConfigChannel+0x214>
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC6_INSTANCE(htim->Instance));
-
-      /* Configure the Channel 6 in PWM mode */
-      TIM_OC6_SetConfig(htim->Instance, sConfig);
- 80091c0:	68fb      	ldr	r3, [r7, #12]
- 80091c2:	681b      	ldr	r3, [r3, #0]
- 80091c4:	68b9      	ldr	r1, [r7, #8]
- 80091c6:	4618      	mov	r0, r3
- 80091c8:	f000 fbf8 	bl	80099bc <TIM_OC6_SetConfig>
-
-      /* Set the Preload enable bit for channel6 */
-      htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE;
- 80091cc:	68fb      	ldr	r3, [r7, #12]
- 80091ce:	681b      	ldr	r3, [r3, #0]
- 80091d0:	6d5a      	ldr	r2, [r3, #84]	; 0x54
- 80091d2:	68fb      	ldr	r3, [r7, #12]
- 80091d4:	681b      	ldr	r3, [r3, #0]
- 80091d6:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
- 80091da:	655a      	str	r2, [r3, #84]	; 0x54
-
-      /* Configure the Output Fast mode */
-      htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE;
- 80091dc:	68fb      	ldr	r3, [r7, #12]
- 80091de:	681b      	ldr	r3, [r3, #0]
- 80091e0:	6d5a      	ldr	r2, [r3, #84]	; 0x54
- 80091e2:	68fb      	ldr	r3, [r7, #12]
- 80091e4:	681b      	ldr	r3, [r3, #0]
- 80091e6:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
- 80091ea:	655a      	str	r2, [r3, #84]	; 0x54
-      htim->Instance->CCMR3 |= sConfig->OCFastMode << 8U;
- 80091ec:	68fb      	ldr	r3, [r7, #12]
- 80091ee:	681b      	ldr	r3, [r3, #0]
- 80091f0:	6d59      	ldr	r1, [r3, #84]	; 0x54
- 80091f2:	68bb      	ldr	r3, [r7, #8]
- 80091f4:	691b      	ldr	r3, [r3, #16]
- 80091f6:	021a      	lsls	r2, r3, #8
- 80091f8:	68fb      	ldr	r3, [r7, #12]
- 80091fa:	681b      	ldr	r3, [r3, #0]
- 80091fc:	430a      	orrs	r2, r1
- 80091fe:	655a      	str	r2, [r3, #84]	; 0x54
-      break;
- 8009200:	e000      	b.n	8009204 <HAL_TIM_PWM_ConfigChannel+0x214>
-    }
-
-    default:
-      break;
- 8009202:	bf00      	nop
-  }
-
-  htim->State = HAL_TIM_STATE_READY;
- 8009204:	68fb      	ldr	r3, [r7, #12]
- 8009206:	2201      	movs	r2, #1
- 8009208:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  __HAL_UNLOCK(htim);
- 800920c:	68fb      	ldr	r3, [r7, #12]
- 800920e:	2200      	movs	r2, #0
- 8009210:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-
-  return HAL_OK;
- 8009214:	2300      	movs	r3, #0
-}
- 8009216:	4618      	mov	r0, r3
- 8009218:	3710      	adds	r7, #16
- 800921a:	46bd      	mov	sp, r7
- 800921c:	bd80      	pop	{r7, pc}
- 800921e:	bf00      	nop
-
-08009220 <HAL_TIM_ConfigClockSource>:
-  * @param  sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
-  *         contains the clock source information for the TIM peripheral.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig)
-{
- 8009220:	b580      	push	{r7, lr}
- 8009222:	b084      	sub	sp, #16
- 8009224:	af00      	add	r7, sp, #0
- 8009226:	6078      	str	r0, [r7, #4]
- 8009228:	6039      	str	r1, [r7, #0]
-  uint32_t tmpsmcr;
-
-  /* Process Locked */
-  __HAL_LOCK(htim);
- 800922a:	687b      	ldr	r3, [r7, #4]
- 800922c:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
- 8009230:	2b01      	cmp	r3, #1
- 8009232:	d101      	bne.n	8009238 <HAL_TIM_ConfigClockSource+0x18>
- 8009234:	2302      	movs	r3, #2
- 8009236:	e0a6      	b.n	8009386 <HAL_TIM_ConfigClockSource+0x166>
- 8009238:	687b      	ldr	r3, [r7, #4]
- 800923a:	2201      	movs	r2, #1
- 800923c:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-
-  htim->State = HAL_TIM_STATE_BUSY;
- 8009240:	687b      	ldr	r3, [r7, #4]
- 8009242:	2202      	movs	r2, #2
- 8009244:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
-
-  /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
-  tmpsmcr = htim->Instance->SMCR;
- 8009248:	687b      	ldr	r3, [r7, #4]
- 800924a:	681b      	ldr	r3, [r3, #0]
- 800924c:	689b      	ldr	r3, [r3, #8]
- 800924e:	60fb      	str	r3, [r7, #12]
-  tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
- 8009250:	68fa      	ldr	r2, [r7, #12]
- 8009252:	4b4f      	ldr	r3, [pc, #316]	; (8009390 <HAL_TIM_ConfigClockSource+0x170>)
- 8009254:	4013      	ands	r3, r2
- 8009256:	60fb      	str	r3, [r7, #12]
-  tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
- 8009258:	68fb      	ldr	r3, [r7, #12]
- 800925a:	f423 437f 	bic.w	r3, r3, #65280	; 0xff00
- 800925e:	60fb      	str	r3, [r7, #12]
-  htim->Instance->SMCR = tmpsmcr;
- 8009260:	687b      	ldr	r3, [r7, #4]
- 8009262:	681b      	ldr	r3, [r3, #0]
- 8009264:	68fa      	ldr	r2, [r7, #12]
- 8009266:	609a      	str	r2, [r3, #8]
-
-  switch (sClockSourceConfig->ClockSource)
- 8009268:	683b      	ldr	r3, [r7, #0]
- 800926a:	681b      	ldr	r3, [r3, #0]
- 800926c:	2b40      	cmp	r3, #64	; 0x40
- 800926e:	d067      	beq.n	8009340 <HAL_TIM_ConfigClockSource+0x120>
- 8009270:	2b40      	cmp	r3, #64	; 0x40
- 8009272:	d80b      	bhi.n	800928c <HAL_TIM_ConfigClockSource+0x6c>
- 8009274:	2b10      	cmp	r3, #16
- 8009276:	d073      	beq.n	8009360 <HAL_TIM_ConfigClockSource+0x140>
- 8009278:	2b10      	cmp	r3, #16
- 800927a:	d802      	bhi.n	8009282 <HAL_TIM_ConfigClockSource+0x62>
- 800927c:	2b00      	cmp	r3, #0
- 800927e:	d06f      	beq.n	8009360 <HAL_TIM_ConfigClockSource+0x140>
-      TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
-      break;
-    }
-
-    default:
-      break;
- 8009280:	e078      	b.n	8009374 <HAL_TIM_ConfigClockSource+0x154>
-  switch (sClockSourceConfig->ClockSource)
- 8009282:	2b20      	cmp	r3, #32
- 8009284:	d06c      	beq.n	8009360 <HAL_TIM_ConfigClockSource+0x140>
- 8009286:	2b30      	cmp	r3, #48	; 0x30
- 8009288:	d06a      	beq.n	8009360 <HAL_TIM_ConfigClockSource+0x140>
-      break;
- 800928a:	e073      	b.n	8009374 <HAL_TIM_ConfigClockSource+0x154>
-  switch (sClockSourceConfig->ClockSource)
- 800928c:	2b70      	cmp	r3, #112	; 0x70
- 800928e:	d00d      	beq.n	80092ac <HAL_TIM_ConfigClockSource+0x8c>
- 8009290:	2b70      	cmp	r3, #112	; 0x70
- 8009292:	d804      	bhi.n	800929e <HAL_TIM_ConfigClockSource+0x7e>
- 8009294:	2b50      	cmp	r3, #80	; 0x50
- 8009296:	d033      	beq.n	8009300 <HAL_TIM_ConfigClockSource+0xe0>
- 8009298:	2b60      	cmp	r3, #96	; 0x60
- 800929a:	d041      	beq.n	8009320 <HAL_TIM_ConfigClockSource+0x100>
-      break;
- 800929c:	e06a      	b.n	8009374 <HAL_TIM_ConfigClockSource+0x154>
-  switch (sClockSourceConfig->ClockSource)
- 800929e:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
- 80092a2:	d066      	beq.n	8009372 <HAL_TIM_ConfigClockSource+0x152>
- 80092a4:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
- 80092a8:	d017      	beq.n	80092da <HAL_TIM_ConfigClockSource+0xba>
-      break;
- 80092aa:	e063      	b.n	8009374 <HAL_TIM_ConfigClockSource+0x154>
-      TIM_ETR_SetConfig(htim->Instance,
- 80092ac:	687b      	ldr	r3, [r7, #4]
- 80092ae:	6818      	ldr	r0, [r3, #0]
- 80092b0:	683b      	ldr	r3, [r7, #0]
- 80092b2:	6899      	ldr	r1, [r3, #8]
- 80092b4:	683b      	ldr	r3, [r7, #0]
- 80092b6:	685a      	ldr	r2, [r3, #4]
- 80092b8:	683b      	ldr	r3, [r7, #0]
- 80092ba:	68db      	ldr	r3, [r3, #12]
- 80092bc:	f000 fcd4 	bl	8009c68 <TIM_ETR_SetConfig>
-      tmpsmcr = htim->Instance->SMCR;
- 80092c0:	687b      	ldr	r3, [r7, #4]
- 80092c2:	681b      	ldr	r3, [r3, #0]
- 80092c4:	689b      	ldr	r3, [r3, #8]
- 80092c6:	60fb      	str	r3, [r7, #12]
-      tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
- 80092c8:	68fb      	ldr	r3, [r7, #12]
- 80092ca:	f043 0377 	orr.w	r3, r3, #119	; 0x77
- 80092ce:	60fb      	str	r3, [r7, #12]
-      htim->Instance->SMCR = tmpsmcr;
- 80092d0:	687b      	ldr	r3, [r7, #4]
- 80092d2:	681b      	ldr	r3, [r3, #0]
- 80092d4:	68fa      	ldr	r2, [r7, #12]
- 80092d6:	609a      	str	r2, [r3, #8]
-      break;
- 80092d8:	e04c      	b.n	8009374 <HAL_TIM_ConfigClockSource+0x154>
-      TIM_ETR_SetConfig(htim->Instance,
- 80092da:	687b      	ldr	r3, [r7, #4]
- 80092dc:	6818      	ldr	r0, [r3, #0]
- 80092de:	683b      	ldr	r3, [r7, #0]
- 80092e0:	6899      	ldr	r1, [r3, #8]
- 80092e2:	683b      	ldr	r3, [r7, #0]
- 80092e4:	685a      	ldr	r2, [r3, #4]
- 80092e6:	683b      	ldr	r3, [r7, #0]
- 80092e8:	68db      	ldr	r3, [r3, #12]
- 80092ea:	f000 fcbd 	bl	8009c68 <TIM_ETR_SetConfig>
-      htim->Instance->SMCR |= TIM_SMCR_ECE;
- 80092ee:	687b      	ldr	r3, [r7, #4]
- 80092f0:	681b      	ldr	r3, [r3, #0]
- 80092f2:	689a      	ldr	r2, [r3, #8]
- 80092f4:	687b      	ldr	r3, [r7, #4]
- 80092f6:	681b      	ldr	r3, [r3, #0]
- 80092f8:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
- 80092fc:	609a      	str	r2, [r3, #8]
-      break;
- 80092fe:	e039      	b.n	8009374 <HAL_TIM_ConfigClockSource+0x154>
-      TIM_TI1_ConfigInputStage(htim->Instance,
- 8009300:	687b      	ldr	r3, [r7, #4]
- 8009302:	6818      	ldr	r0, [r3, #0]
- 8009304:	683b      	ldr	r3, [r7, #0]
- 8009306:	6859      	ldr	r1, [r3, #4]
- 8009308:	683b      	ldr	r3, [r7, #0]
- 800930a:	68db      	ldr	r3, [r3, #12]
- 800930c:	461a      	mov	r2, r3
- 800930e:	f000 fc31 	bl	8009b74 <TIM_TI1_ConfigInputStage>
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
- 8009312:	687b      	ldr	r3, [r7, #4]
- 8009314:	681b      	ldr	r3, [r3, #0]
- 8009316:	2150      	movs	r1, #80	; 0x50
- 8009318:	4618      	mov	r0, r3
- 800931a:	f000 fc8a 	bl	8009c32 <TIM_ITRx_SetConfig>
-      break;
- 800931e:	e029      	b.n	8009374 <HAL_TIM_ConfigClockSource+0x154>
-      TIM_TI2_ConfigInputStage(htim->Instance,
- 8009320:	687b      	ldr	r3, [r7, #4]
- 8009322:	6818      	ldr	r0, [r3, #0]
- 8009324:	683b      	ldr	r3, [r7, #0]
- 8009326:	6859      	ldr	r1, [r3, #4]
- 8009328:	683b      	ldr	r3, [r7, #0]
- 800932a:	68db      	ldr	r3, [r3, #12]
- 800932c:	461a      	mov	r2, r3
- 800932e:	f000 fc50 	bl	8009bd2 <TIM_TI2_ConfigInputStage>
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
- 8009332:	687b      	ldr	r3, [r7, #4]
- 8009334:	681b      	ldr	r3, [r3, #0]
- 8009336:	2160      	movs	r1, #96	; 0x60
- 8009338:	4618      	mov	r0, r3
- 800933a:	f000 fc7a 	bl	8009c32 <TIM_ITRx_SetConfig>
-      break;
- 800933e:	e019      	b.n	8009374 <HAL_TIM_ConfigClockSource+0x154>
-      TIM_TI1_ConfigInputStage(htim->Instance,
- 8009340:	687b      	ldr	r3, [r7, #4]
- 8009342:	6818      	ldr	r0, [r3, #0]
- 8009344:	683b      	ldr	r3, [r7, #0]
- 8009346:	6859      	ldr	r1, [r3, #4]
- 8009348:	683b      	ldr	r3, [r7, #0]
- 800934a:	68db      	ldr	r3, [r3, #12]
- 800934c:	461a      	mov	r2, r3
- 800934e:	f000 fc11 	bl	8009b74 <TIM_TI1_ConfigInputStage>
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
- 8009352:	687b      	ldr	r3, [r7, #4]
- 8009354:	681b      	ldr	r3, [r3, #0]
- 8009356:	2140      	movs	r1, #64	; 0x40
- 8009358:	4618      	mov	r0, r3
- 800935a:	f000 fc6a 	bl	8009c32 <TIM_ITRx_SetConfig>
-      break;
- 800935e:	e009      	b.n	8009374 <HAL_TIM_ConfigClockSource+0x154>
-      TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
- 8009360:	687b      	ldr	r3, [r7, #4]
- 8009362:	681a      	ldr	r2, [r3, #0]
- 8009364:	683b      	ldr	r3, [r7, #0]
- 8009366:	681b      	ldr	r3, [r3, #0]
- 8009368:	4619      	mov	r1, r3
- 800936a:	4610      	mov	r0, r2
- 800936c:	f000 fc61 	bl	8009c32 <TIM_ITRx_SetConfig>
-      break;
- 8009370:	e000      	b.n	8009374 <HAL_TIM_ConfigClockSource+0x154>
-      break;
- 8009372:	bf00      	nop
-  }
-  htim->State = HAL_TIM_STATE_READY;
- 8009374:	687b      	ldr	r3, [r7, #4]
- 8009376:	2201      	movs	r2, #1
- 8009378:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  __HAL_UNLOCK(htim);
- 800937c:	687b      	ldr	r3, [r7, #4]
- 800937e:	2200      	movs	r2, #0
- 8009380:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-
-  return HAL_OK;
- 8009384:	2300      	movs	r3, #0
-}
- 8009386:	4618      	mov	r0, r3
- 8009388:	3710      	adds	r7, #16
- 800938a:	46bd      	mov	sp, r7
- 800938c:	bd80      	pop	{r7, pc}
- 800938e:	bf00      	nop
- 8009390:	fffeff88 	.word	0xfffeff88
-
-08009394 <HAL_TIM_SlaveConfigSynchro>:
-  *         timer input or external trigger input) and the Slave mode
-  *         (Disable, Reset, Gated, Trigger, External clock mode 1).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig)
-{
- 8009394:	b580      	push	{r7, lr}
- 8009396:	b082      	sub	sp, #8
- 8009398:	af00      	add	r7, sp, #0
- 800939a:	6078      	str	r0, [r7, #4]
- 800939c:	6039      	str	r1, [r7, #0]
-  /* Check the parameters */
-  assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
-  assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
-
-  __HAL_LOCK(htim);
- 800939e:	687b      	ldr	r3, [r7, #4]
- 80093a0:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
- 80093a4:	2b01      	cmp	r3, #1
- 80093a6:	d101      	bne.n	80093ac <HAL_TIM_SlaveConfigSynchro+0x18>
- 80093a8:	2302      	movs	r3, #2
- 80093aa:	e031      	b.n	8009410 <HAL_TIM_SlaveConfigSynchro+0x7c>
- 80093ac:	687b      	ldr	r3, [r7, #4]
- 80093ae:	2201      	movs	r2, #1
- 80093b0:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-
-  htim->State = HAL_TIM_STATE_BUSY;
- 80093b4:	687b      	ldr	r3, [r7, #4]
- 80093b6:	2202      	movs	r2, #2
- 80093b8:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK)
- 80093bc:	6839      	ldr	r1, [r7, #0]
- 80093be:	6878      	ldr	r0, [r7, #4]
- 80093c0:	f000 fb50 	bl	8009a64 <TIM_SlaveTimer_SetConfig>
- 80093c4:	4603      	mov	r3, r0
- 80093c6:	2b00      	cmp	r3, #0
- 80093c8:	d009      	beq.n	80093de <HAL_TIM_SlaveConfigSynchro+0x4a>
-  {
-    htim->State = HAL_TIM_STATE_READY;
- 80093ca:	687b      	ldr	r3, [r7, #4]
- 80093cc:	2201      	movs	r2, #1
- 80093ce:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-    __HAL_UNLOCK(htim);
- 80093d2:	687b      	ldr	r3, [r7, #4]
- 80093d4:	2200      	movs	r2, #0
- 80093d6:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-    return HAL_ERROR;
- 80093da:	2301      	movs	r3, #1
- 80093dc:	e018      	b.n	8009410 <HAL_TIM_SlaveConfigSynchro+0x7c>
-  }
-
-  /* Disable Trigger Interrupt */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER);
- 80093de:	687b      	ldr	r3, [r7, #4]
- 80093e0:	681b      	ldr	r3, [r3, #0]
- 80093e2:	68da      	ldr	r2, [r3, #12]
- 80093e4:	687b      	ldr	r3, [r7, #4]
- 80093e6:	681b      	ldr	r3, [r3, #0]
- 80093e8:	f022 0240 	bic.w	r2, r2, #64	; 0x40
- 80093ec:	60da      	str	r2, [r3, #12]
-
-  /* Disable Trigger DMA request */
-  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
- 80093ee:	687b      	ldr	r3, [r7, #4]
- 80093f0:	681b      	ldr	r3, [r3, #0]
- 80093f2:	68da      	ldr	r2, [r3, #12]
- 80093f4:	687b      	ldr	r3, [r7, #4]
- 80093f6:	681b      	ldr	r3, [r3, #0]
- 80093f8:	f422 4280 	bic.w	r2, r2, #16384	; 0x4000
- 80093fc:	60da      	str	r2, [r3, #12]
-
-  htim->State = HAL_TIM_STATE_READY;
- 80093fe:	687b      	ldr	r3, [r7, #4]
- 8009400:	2201      	movs	r2, #1
- 8009402:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  __HAL_UNLOCK(htim);
- 8009406:	687b      	ldr	r3, [r7, #4]
- 8009408:	2200      	movs	r2, #0
- 800940a:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-
-  return HAL_OK;
- 800940e:	2300      	movs	r3, #0
-}
- 8009410:	4618      	mov	r0, r3
- 8009412:	3708      	adds	r7, #8
- 8009414:	46bd      	mov	sp, r7
- 8009416:	bd80      	pop	{r7, pc}
-
-08009418 <HAL_TIM_OC_DelayElapsedCallback>:
-  * @brief  Output Compare callback in non-blocking mode
-  * @param  htim TIM OC handle
-  * @retval None
-  */
-__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
-{
- 8009418:	b480      	push	{r7}
- 800941a:	b083      	sub	sp, #12
- 800941c:	af00      	add	r7, sp, #0
- 800941e:	6078      	str	r0, [r7, #4]
-  UNUSED(htim);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
-   */
-}
- 8009420:	bf00      	nop
- 8009422:	370c      	adds	r7, #12
- 8009424:	46bd      	mov	sp, r7
- 8009426:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800942a:	4770      	bx	lr
-
-0800942c <HAL_TIM_IC_CaptureCallback>:
-  * @brief  Input Capture callback in non-blocking mode
-  * @param  htim TIM IC handle
-  * @retval None
-  */
-__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
-{
- 800942c:	b480      	push	{r7}
- 800942e:	b083      	sub	sp, #12
- 8009430:	af00      	add	r7, sp, #0
- 8009432:	6078      	str	r0, [r7, #4]
-  UNUSED(htim);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TIM_IC_CaptureCallback could be implemented in the user file
-   */
-}
- 8009434:	bf00      	nop
- 8009436:	370c      	adds	r7, #12
- 8009438:	46bd      	mov	sp, r7
- 800943a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800943e:	4770      	bx	lr
-
-08009440 <HAL_TIM_PWM_PulseFinishedCallback>:
-  * @brief  PWM Pulse finished callback in non-blocking mode
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
-{
- 8009440:	b480      	push	{r7}
- 8009442:	b083      	sub	sp, #12
- 8009444:	af00      	add	r7, sp, #0
- 8009446:	6078      	str	r0, [r7, #4]
-  UNUSED(htim);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
-   */
-}
- 8009448:	bf00      	nop
- 800944a:	370c      	adds	r7, #12
- 800944c:	46bd      	mov	sp, r7
- 800944e:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009452:	4770      	bx	lr
-
-08009454 <HAL_TIM_TriggerCallback>:
-  * @brief  Hall Trigger detection callback in non-blocking mode
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
-{
- 8009454:	b480      	push	{r7}
- 8009456:	b083      	sub	sp, #12
- 8009458:	af00      	add	r7, sp, #0
- 800945a:	6078      	str	r0, [r7, #4]
-  UNUSED(htim);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TIM_TriggerCallback could be implemented in the user file
-   */
-}
- 800945c:	bf00      	nop
- 800945e:	370c      	adds	r7, #12
- 8009460:	46bd      	mov	sp, r7
- 8009462:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009466:	4770      	bx	lr
-
-08009468 <TIM_Base_SetConfig>:
-  * @param  TIMx TIM peripheral
-  * @param  Structure TIM Base configuration structure
-  * @retval None
-  */
-void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
-{
- 8009468:	b480      	push	{r7}
- 800946a:	b085      	sub	sp, #20
- 800946c:	af00      	add	r7, sp, #0
- 800946e:	6078      	str	r0, [r7, #4]
- 8009470:	6039      	str	r1, [r7, #0]
-  uint32_t tmpcr1;
-  tmpcr1 = TIMx->CR1;
- 8009472:	687b      	ldr	r3, [r7, #4]
- 8009474:	681b      	ldr	r3, [r3, #0]
- 8009476:	60fb      	str	r3, [r7, #12]
-
-  /* Set TIM Time Base Unit parameters ---------------------------------------*/
-  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
- 8009478:	687b      	ldr	r3, [r7, #4]
- 800947a:	4a40      	ldr	r2, [pc, #256]	; (800957c <TIM_Base_SetConfig+0x114>)
- 800947c:	4293      	cmp	r3, r2
- 800947e:	d013      	beq.n	80094a8 <TIM_Base_SetConfig+0x40>
- 8009480:	687b      	ldr	r3, [r7, #4]
- 8009482:	f1b3 4f80 	cmp.w	r3, #1073741824	; 0x40000000
- 8009486:	d00f      	beq.n	80094a8 <TIM_Base_SetConfig+0x40>
- 8009488:	687b      	ldr	r3, [r7, #4]
- 800948a:	4a3d      	ldr	r2, [pc, #244]	; (8009580 <TIM_Base_SetConfig+0x118>)
- 800948c:	4293      	cmp	r3, r2
- 800948e:	d00b      	beq.n	80094a8 <TIM_Base_SetConfig+0x40>
- 8009490:	687b      	ldr	r3, [r7, #4]
- 8009492:	4a3c      	ldr	r2, [pc, #240]	; (8009584 <TIM_Base_SetConfig+0x11c>)
- 8009494:	4293      	cmp	r3, r2
- 8009496:	d007      	beq.n	80094a8 <TIM_Base_SetConfig+0x40>
- 8009498:	687b      	ldr	r3, [r7, #4]
- 800949a:	4a3b      	ldr	r2, [pc, #236]	; (8009588 <TIM_Base_SetConfig+0x120>)
- 800949c:	4293      	cmp	r3, r2
- 800949e:	d003      	beq.n	80094a8 <TIM_Base_SetConfig+0x40>
- 80094a0:	687b      	ldr	r3, [r7, #4]
- 80094a2:	4a3a      	ldr	r2, [pc, #232]	; (800958c <TIM_Base_SetConfig+0x124>)
- 80094a4:	4293      	cmp	r3, r2
- 80094a6:	d108      	bne.n	80094ba <TIM_Base_SetConfig+0x52>
-  {
-    /* Select the Counter Mode */
-    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
- 80094a8:	68fb      	ldr	r3, [r7, #12]
- 80094aa:	f023 0370 	bic.w	r3, r3, #112	; 0x70
- 80094ae:	60fb      	str	r3, [r7, #12]
-    tmpcr1 |= Structure->CounterMode;
- 80094b0:	683b      	ldr	r3, [r7, #0]
- 80094b2:	685b      	ldr	r3, [r3, #4]
- 80094b4:	68fa      	ldr	r2, [r7, #12]
- 80094b6:	4313      	orrs	r3, r2
- 80094b8:	60fb      	str	r3, [r7, #12]
-  }
-
-  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
- 80094ba:	687b      	ldr	r3, [r7, #4]
- 80094bc:	4a2f      	ldr	r2, [pc, #188]	; (800957c <TIM_Base_SetConfig+0x114>)
- 80094be:	4293      	cmp	r3, r2
- 80094c0:	d02b      	beq.n	800951a <TIM_Base_SetConfig+0xb2>
- 80094c2:	687b      	ldr	r3, [r7, #4]
- 80094c4:	f1b3 4f80 	cmp.w	r3, #1073741824	; 0x40000000
- 80094c8:	d027      	beq.n	800951a <TIM_Base_SetConfig+0xb2>
- 80094ca:	687b      	ldr	r3, [r7, #4]
- 80094cc:	4a2c      	ldr	r2, [pc, #176]	; (8009580 <TIM_Base_SetConfig+0x118>)
- 80094ce:	4293      	cmp	r3, r2
- 80094d0:	d023      	beq.n	800951a <TIM_Base_SetConfig+0xb2>
- 80094d2:	687b      	ldr	r3, [r7, #4]
- 80094d4:	4a2b      	ldr	r2, [pc, #172]	; (8009584 <TIM_Base_SetConfig+0x11c>)
- 80094d6:	4293      	cmp	r3, r2
- 80094d8:	d01f      	beq.n	800951a <TIM_Base_SetConfig+0xb2>
- 80094da:	687b      	ldr	r3, [r7, #4]
- 80094dc:	4a2a      	ldr	r2, [pc, #168]	; (8009588 <TIM_Base_SetConfig+0x120>)
- 80094de:	4293      	cmp	r3, r2
- 80094e0:	d01b      	beq.n	800951a <TIM_Base_SetConfig+0xb2>
- 80094e2:	687b      	ldr	r3, [r7, #4]
- 80094e4:	4a29      	ldr	r2, [pc, #164]	; (800958c <TIM_Base_SetConfig+0x124>)
- 80094e6:	4293      	cmp	r3, r2
- 80094e8:	d017      	beq.n	800951a <TIM_Base_SetConfig+0xb2>
- 80094ea:	687b      	ldr	r3, [r7, #4]
- 80094ec:	4a28      	ldr	r2, [pc, #160]	; (8009590 <TIM_Base_SetConfig+0x128>)
- 80094ee:	4293      	cmp	r3, r2
- 80094f0:	d013      	beq.n	800951a <TIM_Base_SetConfig+0xb2>
- 80094f2:	687b      	ldr	r3, [r7, #4]
- 80094f4:	4a27      	ldr	r2, [pc, #156]	; (8009594 <TIM_Base_SetConfig+0x12c>)
- 80094f6:	4293      	cmp	r3, r2
- 80094f8:	d00f      	beq.n	800951a <TIM_Base_SetConfig+0xb2>
- 80094fa:	687b      	ldr	r3, [r7, #4]
- 80094fc:	4a26      	ldr	r2, [pc, #152]	; (8009598 <TIM_Base_SetConfig+0x130>)
- 80094fe:	4293      	cmp	r3, r2
- 8009500:	d00b      	beq.n	800951a <TIM_Base_SetConfig+0xb2>
- 8009502:	687b      	ldr	r3, [r7, #4]
- 8009504:	4a25      	ldr	r2, [pc, #148]	; (800959c <TIM_Base_SetConfig+0x134>)
- 8009506:	4293      	cmp	r3, r2
- 8009508:	d007      	beq.n	800951a <TIM_Base_SetConfig+0xb2>
- 800950a:	687b      	ldr	r3, [r7, #4]
- 800950c:	4a24      	ldr	r2, [pc, #144]	; (80095a0 <TIM_Base_SetConfig+0x138>)
- 800950e:	4293      	cmp	r3, r2
- 8009510:	d003      	beq.n	800951a <TIM_Base_SetConfig+0xb2>
- 8009512:	687b      	ldr	r3, [r7, #4]
- 8009514:	4a23      	ldr	r2, [pc, #140]	; (80095a4 <TIM_Base_SetConfig+0x13c>)
- 8009516:	4293      	cmp	r3, r2
- 8009518:	d108      	bne.n	800952c <TIM_Base_SetConfig+0xc4>
-  {
-    /* Set the clock division */
-    tmpcr1 &= ~TIM_CR1_CKD;
- 800951a:	68fb      	ldr	r3, [r7, #12]
- 800951c:	f423 7340 	bic.w	r3, r3, #768	; 0x300
- 8009520:	60fb      	str	r3, [r7, #12]
-    tmpcr1 |= (uint32_t)Structure->ClockDivision;
- 8009522:	683b      	ldr	r3, [r7, #0]
- 8009524:	68db      	ldr	r3, [r3, #12]
- 8009526:	68fa      	ldr	r2, [r7, #12]
- 8009528:	4313      	orrs	r3, r2
- 800952a:	60fb      	str	r3, [r7, #12]
-  }
-
-  /* Set the auto-reload preload */
-  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
- 800952c:	68fb      	ldr	r3, [r7, #12]
- 800952e:	f023 0280 	bic.w	r2, r3, #128	; 0x80
- 8009532:	683b      	ldr	r3, [r7, #0]
- 8009534:	695b      	ldr	r3, [r3, #20]
- 8009536:	4313      	orrs	r3, r2
- 8009538:	60fb      	str	r3, [r7, #12]
-
-  TIMx->CR1 = tmpcr1;
- 800953a:	687b      	ldr	r3, [r7, #4]
- 800953c:	68fa      	ldr	r2, [r7, #12]
- 800953e:	601a      	str	r2, [r3, #0]
-
-  /* Set the Autoreload value */
-  TIMx->ARR = (uint32_t)Structure->Period ;
- 8009540:	683b      	ldr	r3, [r7, #0]
- 8009542:	689a      	ldr	r2, [r3, #8]
- 8009544:	687b      	ldr	r3, [r7, #4]
- 8009546:	62da      	str	r2, [r3, #44]	; 0x2c
-
-  /* Set the Prescaler value */
-  TIMx->PSC = Structure->Prescaler;
- 8009548:	683b      	ldr	r3, [r7, #0]
- 800954a:	681a      	ldr	r2, [r3, #0]
- 800954c:	687b      	ldr	r3, [r7, #4]
- 800954e:	629a      	str	r2, [r3, #40]	; 0x28
-
-  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
- 8009550:	687b      	ldr	r3, [r7, #4]
- 8009552:	4a0a      	ldr	r2, [pc, #40]	; (800957c <TIM_Base_SetConfig+0x114>)
- 8009554:	4293      	cmp	r3, r2
- 8009556:	d003      	beq.n	8009560 <TIM_Base_SetConfig+0xf8>
- 8009558:	687b      	ldr	r3, [r7, #4]
- 800955a:	4a0c      	ldr	r2, [pc, #48]	; (800958c <TIM_Base_SetConfig+0x124>)
- 800955c:	4293      	cmp	r3, r2
- 800955e:	d103      	bne.n	8009568 <TIM_Base_SetConfig+0x100>
-  {
-    /* Set the Repetition Counter value */
-    TIMx->RCR = Structure->RepetitionCounter;
- 8009560:	683b      	ldr	r3, [r7, #0]
- 8009562:	691a      	ldr	r2, [r3, #16]
- 8009564:	687b      	ldr	r3, [r7, #4]
- 8009566:	631a      	str	r2, [r3, #48]	; 0x30
-  }
-
-  /* Generate an update event to reload the Prescaler
-     and the repetition counter (only for advanced timer) value immediately */
-  TIMx->EGR = TIM_EGR_UG;
- 8009568:	687b      	ldr	r3, [r7, #4]
- 800956a:	2201      	movs	r2, #1
- 800956c:	615a      	str	r2, [r3, #20]
-}
- 800956e:	bf00      	nop
- 8009570:	3714      	adds	r7, #20
- 8009572:	46bd      	mov	sp, r7
- 8009574:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009578:	4770      	bx	lr
- 800957a:	bf00      	nop
- 800957c:	40010000 	.word	0x40010000
- 8009580:	40000400 	.word	0x40000400
- 8009584:	40000800 	.word	0x40000800
- 8009588:	40000c00 	.word	0x40000c00
- 800958c:	40010400 	.word	0x40010400
- 8009590:	40014000 	.word	0x40014000
- 8009594:	40014400 	.word	0x40014400
- 8009598:	40014800 	.word	0x40014800
- 800959c:	40001800 	.word	0x40001800
- 80095a0:	40001c00 	.word	0x40001c00
- 80095a4:	40002000 	.word	0x40002000
-
-080095a8 <TIM_OC1_SetConfig>:
-  * @param  TIMx to select the TIM peripheral
-  * @param  OC_Config The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- 80095a8:	b480      	push	{r7}
- 80095aa:	b087      	sub	sp, #28
- 80095ac:	af00      	add	r7, sp, #0
- 80095ae:	6078      	str	r0, [r7, #4]
- 80095b0:	6039      	str	r1, [r7, #0]
-  uint32_t tmpccmrx;
-  uint32_t tmpccer;
-  uint32_t tmpcr2;
-
-  /* Disable the Channel 1: Reset the CC1E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC1E;
- 80095b2:	687b      	ldr	r3, [r7, #4]
- 80095b4:	6a1b      	ldr	r3, [r3, #32]
- 80095b6:	f023 0201 	bic.w	r2, r3, #1
- 80095ba:	687b      	ldr	r3, [r7, #4]
- 80095bc:	621a      	str	r2, [r3, #32]
-
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
- 80095be:	687b      	ldr	r3, [r7, #4]
- 80095c0:	6a1b      	ldr	r3, [r3, #32]
- 80095c2:	617b      	str	r3, [r7, #20]
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  TIMx->CR2;
- 80095c4:	687b      	ldr	r3, [r7, #4]
- 80095c6:	685b      	ldr	r3, [r3, #4]
- 80095c8:	613b      	str	r3, [r7, #16]
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmrx = TIMx->CCMR1;
- 80095ca:	687b      	ldr	r3, [r7, #4]
- 80095cc:	699b      	ldr	r3, [r3, #24]
- 80095ce:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Compare Mode Bits */
-  tmpccmrx &= ~TIM_CCMR1_OC1M;
- 80095d0:	68fa      	ldr	r2, [r7, #12]
- 80095d2:	4b2b      	ldr	r3, [pc, #172]	; (8009680 <TIM_OC1_SetConfig+0xd8>)
- 80095d4:	4013      	ands	r3, r2
- 80095d6:	60fb      	str	r3, [r7, #12]
-  tmpccmrx &= ~TIM_CCMR1_CC1S;
- 80095d8:	68fb      	ldr	r3, [r7, #12]
- 80095da:	f023 0303 	bic.w	r3, r3, #3
- 80095de:	60fb      	str	r3, [r7, #12]
-  /* Select the Output Compare Mode */
-  tmpccmrx |= OC_Config->OCMode;
- 80095e0:	683b      	ldr	r3, [r7, #0]
- 80095e2:	681b      	ldr	r3, [r3, #0]
- 80095e4:	68fa      	ldr	r2, [r7, #12]
- 80095e6:	4313      	orrs	r3, r2
- 80095e8:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC1P;
- 80095ea:	697b      	ldr	r3, [r7, #20]
- 80095ec:	f023 0302 	bic.w	r3, r3, #2
- 80095f0:	617b      	str	r3, [r7, #20]
-  /* Set the Output Compare Polarity */
-  tmpccer |= OC_Config->OCPolarity;
- 80095f2:	683b      	ldr	r3, [r7, #0]
- 80095f4:	689b      	ldr	r3, [r3, #8]
- 80095f6:	697a      	ldr	r2, [r7, #20]
- 80095f8:	4313      	orrs	r3, r2
- 80095fa:	617b      	str	r3, [r7, #20]
-
-  if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
- 80095fc:	687b      	ldr	r3, [r7, #4]
- 80095fe:	4a21      	ldr	r2, [pc, #132]	; (8009684 <TIM_OC1_SetConfig+0xdc>)
- 8009600:	4293      	cmp	r3, r2
- 8009602:	d003      	beq.n	800960c <TIM_OC1_SetConfig+0x64>
- 8009604:	687b      	ldr	r3, [r7, #4]
- 8009606:	4a20      	ldr	r2, [pc, #128]	; (8009688 <TIM_OC1_SetConfig+0xe0>)
- 8009608:	4293      	cmp	r3, r2
- 800960a:	d10c      	bne.n	8009626 <TIM_OC1_SetConfig+0x7e>
-  {
-    /* Check parameters */
-    assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
-    /* Reset the Output N Polarity level */
-    tmpccer &= ~TIM_CCER_CC1NP;
- 800960c:	697b      	ldr	r3, [r7, #20]
- 800960e:	f023 0308 	bic.w	r3, r3, #8
- 8009612:	617b      	str	r3, [r7, #20]
-    /* Set the Output N Polarity */
-    tmpccer |= OC_Config->OCNPolarity;
- 8009614:	683b      	ldr	r3, [r7, #0]
- 8009616:	68db      	ldr	r3, [r3, #12]
- 8009618:	697a      	ldr	r2, [r7, #20]
- 800961a:	4313      	orrs	r3, r2
- 800961c:	617b      	str	r3, [r7, #20]
-    /* Reset the Output N State */
-    tmpccer &= ~TIM_CCER_CC1NE;
- 800961e:	697b      	ldr	r3, [r7, #20]
- 8009620:	f023 0304 	bic.w	r3, r3, #4
- 8009624:	617b      	str	r3, [r7, #20]
-  }
-
-  if (IS_TIM_BREAK_INSTANCE(TIMx))
- 8009626:	687b      	ldr	r3, [r7, #4]
- 8009628:	4a16      	ldr	r2, [pc, #88]	; (8009684 <TIM_OC1_SetConfig+0xdc>)
- 800962a:	4293      	cmp	r3, r2
- 800962c:	d003      	beq.n	8009636 <TIM_OC1_SetConfig+0x8e>
- 800962e:	687b      	ldr	r3, [r7, #4]
- 8009630:	4a15      	ldr	r2, [pc, #84]	; (8009688 <TIM_OC1_SetConfig+0xe0>)
- 8009632:	4293      	cmp	r3, r2
- 8009634:	d111      	bne.n	800965a <TIM_OC1_SetConfig+0xb2>
-    /* Check parameters */
-    assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
-    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
-    /* Reset the Output Compare and Output Compare N IDLE State */
-    tmpcr2 &= ~TIM_CR2_OIS1;
- 8009636:	693b      	ldr	r3, [r7, #16]
- 8009638:	f423 7380 	bic.w	r3, r3, #256	; 0x100
- 800963c:	613b      	str	r3, [r7, #16]
-    tmpcr2 &= ~TIM_CR2_OIS1N;
- 800963e:	693b      	ldr	r3, [r7, #16]
- 8009640:	f423 7300 	bic.w	r3, r3, #512	; 0x200
- 8009644:	613b      	str	r3, [r7, #16]
-    /* Set the Output Idle state */
-    tmpcr2 |= OC_Config->OCIdleState;
- 8009646:	683b      	ldr	r3, [r7, #0]
- 8009648:	695b      	ldr	r3, [r3, #20]
- 800964a:	693a      	ldr	r2, [r7, #16]
- 800964c:	4313      	orrs	r3, r2
- 800964e:	613b      	str	r3, [r7, #16]
-    /* Set the Output N Idle state */
-    tmpcr2 |= OC_Config->OCNIdleState;
- 8009650:	683b      	ldr	r3, [r7, #0]
- 8009652:	699b      	ldr	r3, [r3, #24]
- 8009654:	693a      	ldr	r2, [r7, #16]
- 8009656:	4313      	orrs	r3, r2
- 8009658:	613b      	str	r3, [r7, #16]
-  }
-
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
- 800965a:	687b      	ldr	r3, [r7, #4]
- 800965c:	693a      	ldr	r2, [r7, #16]
- 800965e:	605a      	str	r2, [r3, #4]
-
-  /* Write to TIMx CCMR1 */
-  TIMx->CCMR1 = tmpccmrx;
- 8009660:	687b      	ldr	r3, [r7, #4]
- 8009662:	68fa      	ldr	r2, [r7, #12]
- 8009664:	619a      	str	r2, [r3, #24]
-
-  /* Set the Capture Compare Register value */
-  TIMx->CCR1 = OC_Config->Pulse;
- 8009666:	683b      	ldr	r3, [r7, #0]
- 8009668:	685a      	ldr	r2, [r3, #4]
- 800966a:	687b      	ldr	r3, [r7, #4]
- 800966c:	635a      	str	r2, [r3, #52]	; 0x34
-
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
- 800966e:	687b      	ldr	r3, [r7, #4]
- 8009670:	697a      	ldr	r2, [r7, #20]
- 8009672:	621a      	str	r2, [r3, #32]
-}
- 8009674:	bf00      	nop
- 8009676:	371c      	adds	r7, #28
- 8009678:	46bd      	mov	sp, r7
- 800967a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800967e:	4770      	bx	lr
- 8009680:	fffeff8f 	.word	0xfffeff8f
- 8009684:	40010000 	.word	0x40010000
- 8009688:	40010400 	.word	0x40010400
-
-0800968c <TIM_OC2_SetConfig>:
-  * @param  TIMx to select the TIM peripheral
-  * @param  OC_Config The ouput configuration structure
-  * @retval None
-  */
-void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- 800968c:	b480      	push	{r7}
- 800968e:	b087      	sub	sp, #28
- 8009690:	af00      	add	r7, sp, #0
- 8009692:	6078      	str	r0, [r7, #4]
- 8009694:	6039      	str	r1, [r7, #0]
-  uint32_t tmpccmrx;
-  uint32_t tmpccer;
-  uint32_t tmpcr2;
-
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC2E;
- 8009696:	687b      	ldr	r3, [r7, #4]
- 8009698:	6a1b      	ldr	r3, [r3, #32]
- 800969a:	f023 0210 	bic.w	r2, r3, #16
- 800969e:	687b      	ldr	r3, [r7, #4]
- 80096a0:	621a      	str	r2, [r3, #32]
-
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
- 80096a2:	687b      	ldr	r3, [r7, #4]
- 80096a4:	6a1b      	ldr	r3, [r3, #32]
- 80096a6:	617b      	str	r3, [r7, #20]
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  TIMx->CR2;
- 80096a8:	687b      	ldr	r3, [r7, #4]
- 80096aa:	685b      	ldr	r3, [r3, #4]
- 80096ac:	613b      	str	r3, [r7, #16]
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmrx = TIMx->CCMR1;
- 80096ae:	687b      	ldr	r3, [r7, #4]
- 80096b0:	699b      	ldr	r3, [r3, #24]
- 80096b2:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Compare mode and Capture/Compare selection Bits */
-  tmpccmrx &= ~TIM_CCMR1_OC2M;
- 80096b4:	68fa      	ldr	r2, [r7, #12]
- 80096b6:	4b2e      	ldr	r3, [pc, #184]	; (8009770 <TIM_OC2_SetConfig+0xe4>)
- 80096b8:	4013      	ands	r3, r2
- 80096ba:	60fb      	str	r3, [r7, #12]
-  tmpccmrx &= ~TIM_CCMR1_CC2S;
- 80096bc:	68fb      	ldr	r3, [r7, #12]
- 80096be:	f423 7340 	bic.w	r3, r3, #768	; 0x300
- 80096c2:	60fb      	str	r3, [r7, #12]
-
-  /* Select the Output Compare Mode */
-  tmpccmrx |= (OC_Config->OCMode << 8U);
- 80096c4:	683b      	ldr	r3, [r7, #0]
- 80096c6:	681b      	ldr	r3, [r3, #0]
- 80096c8:	021b      	lsls	r3, r3, #8
- 80096ca:	68fa      	ldr	r2, [r7, #12]
- 80096cc:	4313      	orrs	r3, r2
- 80096ce:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC2P;
- 80096d0:	697b      	ldr	r3, [r7, #20]
- 80096d2:	f023 0320 	bic.w	r3, r3, #32
- 80096d6:	617b      	str	r3, [r7, #20]
-  /* Set the Output Compare Polarity */
-  tmpccer |= (OC_Config->OCPolarity << 4U);
- 80096d8:	683b      	ldr	r3, [r7, #0]
- 80096da:	689b      	ldr	r3, [r3, #8]
- 80096dc:	011b      	lsls	r3, r3, #4
- 80096de:	697a      	ldr	r2, [r7, #20]
- 80096e0:	4313      	orrs	r3, r2
- 80096e2:	617b      	str	r3, [r7, #20]
-
-  if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
- 80096e4:	687b      	ldr	r3, [r7, #4]
- 80096e6:	4a23      	ldr	r2, [pc, #140]	; (8009774 <TIM_OC2_SetConfig+0xe8>)
- 80096e8:	4293      	cmp	r3, r2
- 80096ea:	d003      	beq.n	80096f4 <TIM_OC2_SetConfig+0x68>
- 80096ec:	687b      	ldr	r3, [r7, #4]
- 80096ee:	4a22      	ldr	r2, [pc, #136]	; (8009778 <TIM_OC2_SetConfig+0xec>)
- 80096f0:	4293      	cmp	r3, r2
- 80096f2:	d10d      	bne.n	8009710 <TIM_OC2_SetConfig+0x84>
-  {
-    assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
-    /* Reset the Output N Polarity level */
-    tmpccer &= ~TIM_CCER_CC2NP;
- 80096f4:	697b      	ldr	r3, [r7, #20]
- 80096f6:	f023 0380 	bic.w	r3, r3, #128	; 0x80
- 80096fa:	617b      	str	r3, [r7, #20]
-    /* Set the Output N Polarity */
-    tmpccer |= (OC_Config->OCNPolarity << 4U);
- 80096fc:	683b      	ldr	r3, [r7, #0]
- 80096fe:	68db      	ldr	r3, [r3, #12]
- 8009700:	011b      	lsls	r3, r3, #4
- 8009702:	697a      	ldr	r2, [r7, #20]
- 8009704:	4313      	orrs	r3, r2
- 8009706:	617b      	str	r3, [r7, #20]
-    /* Reset the Output N State */
-    tmpccer &= ~TIM_CCER_CC2NE;
- 8009708:	697b      	ldr	r3, [r7, #20]
- 800970a:	f023 0340 	bic.w	r3, r3, #64	; 0x40
- 800970e:	617b      	str	r3, [r7, #20]
-
-  }
-
-  if (IS_TIM_BREAK_INSTANCE(TIMx))
- 8009710:	687b      	ldr	r3, [r7, #4]
- 8009712:	4a18      	ldr	r2, [pc, #96]	; (8009774 <TIM_OC2_SetConfig+0xe8>)
- 8009714:	4293      	cmp	r3, r2
- 8009716:	d003      	beq.n	8009720 <TIM_OC2_SetConfig+0x94>
- 8009718:	687b      	ldr	r3, [r7, #4]
- 800971a:	4a17      	ldr	r2, [pc, #92]	; (8009778 <TIM_OC2_SetConfig+0xec>)
- 800971c:	4293      	cmp	r3, r2
- 800971e:	d113      	bne.n	8009748 <TIM_OC2_SetConfig+0xbc>
-    /* Check parameters */
-    assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
-    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
-    /* Reset the Output Compare and Output Compare N IDLE State */
-    tmpcr2 &= ~TIM_CR2_OIS2;
- 8009720:	693b      	ldr	r3, [r7, #16]
- 8009722:	f423 6380 	bic.w	r3, r3, #1024	; 0x400
- 8009726:	613b      	str	r3, [r7, #16]
-    tmpcr2 &= ~TIM_CR2_OIS2N;
- 8009728:	693b      	ldr	r3, [r7, #16]
- 800972a:	f423 6300 	bic.w	r3, r3, #2048	; 0x800
- 800972e:	613b      	str	r3, [r7, #16]
-    /* Set the Output Idle state */
-    tmpcr2 |= (OC_Config->OCIdleState << 2U);
- 8009730:	683b      	ldr	r3, [r7, #0]
- 8009732:	695b      	ldr	r3, [r3, #20]
- 8009734:	009b      	lsls	r3, r3, #2
- 8009736:	693a      	ldr	r2, [r7, #16]
- 8009738:	4313      	orrs	r3, r2
- 800973a:	613b      	str	r3, [r7, #16]
-    /* Set the Output N Idle state */
-    tmpcr2 |= (OC_Config->OCNIdleState << 2U);
- 800973c:	683b      	ldr	r3, [r7, #0]
- 800973e:	699b      	ldr	r3, [r3, #24]
- 8009740:	009b      	lsls	r3, r3, #2
- 8009742:	693a      	ldr	r2, [r7, #16]
- 8009744:	4313      	orrs	r3, r2
- 8009746:	613b      	str	r3, [r7, #16]
-  }
-
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
- 8009748:	687b      	ldr	r3, [r7, #4]
- 800974a:	693a      	ldr	r2, [r7, #16]
- 800974c:	605a      	str	r2, [r3, #4]
-
-  /* Write to TIMx CCMR1 */
-  TIMx->CCMR1 = tmpccmrx;
- 800974e:	687b      	ldr	r3, [r7, #4]
- 8009750:	68fa      	ldr	r2, [r7, #12]
- 8009752:	619a      	str	r2, [r3, #24]
-
-  /* Set the Capture Compare Register value */
-  TIMx->CCR2 = OC_Config->Pulse;
- 8009754:	683b      	ldr	r3, [r7, #0]
- 8009756:	685a      	ldr	r2, [r3, #4]
- 8009758:	687b      	ldr	r3, [r7, #4]
- 800975a:	639a      	str	r2, [r3, #56]	; 0x38
-
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
- 800975c:	687b      	ldr	r3, [r7, #4]
- 800975e:	697a      	ldr	r2, [r7, #20]
- 8009760:	621a      	str	r2, [r3, #32]
-}
- 8009762:	bf00      	nop
- 8009764:	371c      	adds	r7, #28
- 8009766:	46bd      	mov	sp, r7
- 8009768:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800976c:	4770      	bx	lr
- 800976e:	bf00      	nop
- 8009770:	feff8fff 	.word	0xfeff8fff
- 8009774:	40010000 	.word	0x40010000
- 8009778:	40010400 	.word	0x40010400
-
-0800977c <TIM_OC3_SetConfig>:
-  * @param  TIMx to select the TIM peripheral
-  * @param  OC_Config The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- 800977c:	b480      	push	{r7}
- 800977e:	b087      	sub	sp, #28
- 8009780:	af00      	add	r7, sp, #0
- 8009782:	6078      	str	r0, [r7, #4]
- 8009784:	6039      	str	r1, [r7, #0]
-  uint32_t tmpccmrx;
-  uint32_t tmpccer;
-  uint32_t tmpcr2;
-
-  /* Disable the Channel 3: Reset the CC2E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC3E;
- 8009786:	687b      	ldr	r3, [r7, #4]
- 8009788:	6a1b      	ldr	r3, [r3, #32]
- 800978a:	f423 7280 	bic.w	r2, r3, #256	; 0x100
- 800978e:	687b      	ldr	r3, [r7, #4]
- 8009790:	621a      	str	r2, [r3, #32]
-
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
- 8009792:	687b      	ldr	r3, [r7, #4]
- 8009794:	6a1b      	ldr	r3, [r3, #32]
- 8009796:	617b      	str	r3, [r7, #20]
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  TIMx->CR2;
- 8009798:	687b      	ldr	r3, [r7, #4]
- 800979a:	685b      	ldr	r3, [r3, #4]
- 800979c:	613b      	str	r3, [r7, #16]
-
-  /* Get the TIMx CCMR2 register value */
-  tmpccmrx = TIMx->CCMR2;
- 800979e:	687b      	ldr	r3, [r7, #4]
- 80097a0:	69db      	ldr	r3, [r3, #28]
- 80097a2:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Compare mode and Capture/Compare selection Bits */
-  tmpccmrx &= ~TIM_CCMR2_OC3M;
- 80097a4:	68fa      	ldr	r2, [r7, #12]
- 80097a6:	4b2d      	ldr	r3, [pc, #180]	; (800985c <TIM_OC3_SetConfig+0xe0>)
- 80097a8:	4013      	ands	r3, r2
- 80097aa:	60fb      	str	r3, [r7, #12]
-  tmpccmrx &= ~TIM_CCMR2_CC3S;
- 80097ac:	68fb      	ldr	r3, [r7, #12]
- 80097ae:	f023 0303 	bic.w	r3, r3, #3
- 80097b2:	60fb      	str	r3, [r7, #12]
-  /* Select the Output Compare Mode */
-  tmpccmrx |= OC_Config->OCMode;
- 80097b4:	683b      	ldr	r3, [r7, #0]
- 80097b6:	681b      	ldr	r3, [r3, #0]
- 80097b8:	68fa      	ldr	r2, [r7, #12]
- 80097ba:	4313      	orrs	r3, r2
- 80097bc:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC3P;
- 80097be:	697b      	ldr	r3, [r7, #20]
- 80097c0:	f423 7300 	bic.w	r3, r3, #512	; 0x200
- 80097c4:	617b      	str	r3, [r7, #20]
-  /* Set the Output Compare Polarity */
-  tmpccer |= (OC_Config->OCPolarity << 8U);
- 80097c6:	683b      	ldr	r3, [r7, #0]
- 80097c8:	689b      	ldr	r3, [r3, #8]
- 80097ca:	021b      	lsls	r3, r3, #8
- 80097cc:	697a      	ldr	r2, [r7, #20]
- 80097ce:	4313      	orrs	r3, r2
- 80097d0:	617b      	str	r3, [r7, #20]
-
-  if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
- 80097d2:	687b      	ldr	r3, [r7, #4]
- 80097d4:	4a22      	ldr	r2, [pc, #136]	; (8009860 <TIM_OC3_SetConfig+0xe4>)
- 80097d6:	4293      	cmp	r3, r2
- 80097d8:	d003      	beq.n	80097e2 <TIM_OC3_SetConfig+0x66>
- 80097da:	687b      	ldr	r3, [r7, #4]
- 80097dc:	4a21      	ldr	r2, [pc, #132]	; (8009864 <TIM_OC3_SetConfig+0xe8>)
- 80097de:	4293      	cmp	r3, r2
- 80097e0:	d10d      	bne.n	80097fe <TIM_OC3_SetConfig+0x82>
-  {
-    assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
-    /* Reset the Output N Polarity level */
-    tmpccer &= ~TIM_CCER_CC3NP;
- 80097e2:	697b      	ldr	r3, [r7, #20]
- 80097e4:	f423 6300 	bic.w	r3, r3, #2048	; 0x800
- 80097e8:	617b      	str	r3, [r7, #20]
-    /* Set the Output N Polarity */
-    tmpccer |= (OC_Config->OCNPolarity << 8U);
- 80097ea:	683b      	ldr	r3, [r7, #0]
- 80097ec:	68db      	ldr	r3, [r3, #12]
- 80097ee:	021b      	lsls	r3, r3, #8
- 80097f0:	697a      	ldr	r2, [r7, #20]
- 80097f2:	4313      	orrs	r3, r2
- 80097f4:	617b      	str	r3, [r7, #20]
-    /* Reset the Output N State */
-    tmpccer &= ~TIM_CCER_CC3NE;
- 80097f6:	697b      	ldr	r3, [r7, #20]
- 80097f8:	f423 6380 	bic.w	r3, r3, #1024	; 0x400
- 80097fc:	617b      	str	r3, [r7, #20]
-  }
-
-  if (IS_TIM_BREAK_INSTANCE(TIMx))
- 80097fe:	687b      	ldr	r3, [r7, #4]
- 8009800:	4a17      	ldr	r2, [pc, #92]	; (8009860 <TIM_OC3_SetConfig+0xe4>)
- 8009802:	4293      	cmp	r3, r2
- 8009804:	d003      	beq.n	800980e <TIM_OC3_SetConfig+0x92>
- 8009806:	687b      	ldr	r3, [r7, #4]
- 8009808:	4a16      	ldr	r2, [pc, #88]	; (8009864 <TIM_OC3_SetConfig+0xe8>)
- 800980a:	4293      	cmp	r3, r2
- 800980c:	d113      	bne.n	8009836 <TIM_OC3_SetConfig+0xba>
-    /* Check parameters */
-    assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
-    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
-    /* Reset the Output Compare and Output Compare N IDLE State */
-    tmpcr2 &= ~TIM_CR2_OIS3;
- 800980e:	693b      	ldr	r3, [r7, #16]
- 8009810:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
- 8009814:	613b      	str	r3, [r7, #16]
-    tmpcr2 &= ~TIM_CR2_OIS3N;
- 8009816:	693b      	ldr	r3, [r7, #16]
- 8009818:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
- 800981c:	613b      	str	r3, [r7, #16]
-    /* Set the Output Idle state */
-    tmpcr2 |= (OC_Config->OCIdleState << 4U);
- 800981e:	683b      	ldr	r3, [r7, #0]
- 8009820:	695b      	ldr	r3, [r3, #20]
- 8009822:	011b      	lsls	r3, r3, #4
- 8009824:	693a      	ldr	r2, [r7, #16]
- 8009826:	4313      	orrs	r3, r2
- 8009828:	613b      	str	r3, [r7, #16]
-    /* Set the Output N Idle state */
-    tmpcr2 |= (OC_Config->OCNIdleState << 4U);
- 800982a:	683b      	ldr	r3, [r7, #0]
- 800982c:	699b      	ldr	r3, [r3, #24]
- 800982e:	011b      	lsls	r3, r3, #4
- 8009830:	693a      	ldr	r2, [r7, #16]
- 8009832:	4313      	orrs	r3, r2
- 8009834:	613b      	str	r3, [r7, #16]
-  }
-
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
- 8009836:	687b      	ldr	r3, [r7, #4]
- 8009838:	693a      	ldr	r2, [r7, #16]
- 800983a:	605a      	str	r2, [r3, #4]
-
-  /* Write to TIMx CCMR2 */
-  TIMx->CCMR2 = tmpccmrx;
- 800983c:	687b      	ldr	r3, [r7, #4]
- 800983e:	68fa      	ldr	r2, [r7, #12]
- 8009840:	61da      	str	r2, [r3, #28]
-
-  /* Set the Capture Compare Register value */
-  TIMx->CCR3 = OC_Config->Pulse;
- 8009842:	683b      	ldr	r3, [r7, #0]
- 8009844:	685a      	ldr	r2, [r3, #4]
- 8009846:	687b      	ldr	r3, [r7, #4]
- 8009848:	63da      	str	r2, [r3, #60]	; 0x3c
-
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
- 800984a:	687b      	ldr	r3, [r7, #4]
- 800984c:	697a      	ldr	r2, [r7, #20]
- 800984e:	621a      	str	r2, [r3, #32]
-}
- 8009850:	bf00      	nop
- 8009852:	371c      	adds	r7, #28
- 8009854:	46bd      	mov	sp, r7
- 8009856:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800985a:	4770      	bx	lr
- 800985c:	fffeff8f 	.word	0xfffeff8f
- 8009860:	40010000 	.word	0x40010000
- 8009864:	40010400 	.word	0x40010400
-
-08009868 <TIM_OC4_SetConfig>:
-  * @param  TIMx to select the TIM peripheral
-  * @param  OC_Config The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- 8009868:	b480      	push	{r7}
- 800986a:	b087      	sub	sp, #28
- 800986c:	af00      	add	r7, sp, #0
- 800986e:	6078      	str	r0, [r7, #4]
- 8009870:	6039      	str	r1, [r7, #0]
-  uint32_t tmpccmrx;
-  uint32_t tmpccer;
-  uint32_t tmpcr2;
-
-  /* Disable the Channel 4: Reset the CC4E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC4E;
- 8009872:	687b      	ldr	r3, [r7, #4]
- 8009874:	6a1b      	ldr	r3, [r3, #32]
- 8009876:	f423 5280 	bic.w	r2, r3, #4096	; 0x1000
- 800987a:	687b      	ldr	r3, [r7, #4]
- 800987c:	621a      	str	r2, [r3, #32]
-
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
- 800987e:	687b      	ldr	r3, [r7, #4]
- 8009880:	6a1b      	ldr	r3, [r3, #32]
- 8009882:	613b      	str	r3, [r7, #16]
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  TIMx->CR2;
- 8009884:	687b      	ldr	r3, [r7, #4]
- 8009886:	685b      	ldr	r3, [r3, #4]
- 8009888:	617b      	str	r3, [r7, #20]
-
-  /* Get the TIMx CCMR2 register value */
-  tmpccmrx = TIMx->CCMR2;
- 800988a:	687b      	ldr	r3, [r7, #4]
- 800988c:	69db      	ldr	r3, [r3, #28]
- 800988e:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Compare mode and Capture/Compare selection Bits */
-  tmpccmrx &= ~TIM_CCMR2_OC4M;
- 8009890:	68fa      	ldr	r2, [r7, #12]
- 8009892:	4b1e      	ldr	r3, [pc, #120]	; (800990c <TIM_OC4_SetConfig+0xa4>)
- 8009894:	4013      	ands	r3, r2
- 8009896:	60fb      	str	r3, [r7, #12]
-  tmpccmrx &= ~TIM_CCMR2_CC4S;
- 8009898:	68fb      	ldr	r3, [r7, #12]
- 800989a:	f423 7340 	bic.w	r3, r3, #768	; 0x300
- 800989e:	60fb      	str	r3, [r7, #12]
-
-  /* Select the Output Compare Mode */
-  tmpccmrx |= (OC_Config->OCMode << 8U);
- 80098a0:	683b      	ldr	r3, [r7, #0]
- 80098a2:	681b      	ldr	r3, [r3, #0]
- 80098a4:	021b      	lsls	r3, r3, #8
- 80098a6:	68fa      	ldr	r2, [r7, #12]
- 80098a8:	4313      	orrs	r3, r2
- 80098aa:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC4P;
- 80098ac:	693b      	ldr	r3, [r7, #16]
- 80098ae:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
- 80098b2:	613b      	str	r3, [r7, #16]
-  /* Set the Output Compare Polarity */
-  tmpccer |= (OC_Config->OCPolarity << 12U);
- 80098b4:	683b      	ldr	r3, [r7, #0]
- 80098b6:	689b      	ldr	r3, [r3, #8]
- 80098b8:	031b      	lsls	r3, r3, #12
- 80098ba:	693a      	ldr	r2, [r7, #16]
- 80098bc:	4313      	orrs	r3, r2
- 80098be:	613b      	str	r3, [r7, #16]
-
-  if (IS_TIM_BREAK_INSTANCE(TIMx))
- 80098c0:	687b      	ldr	r3, [r7, #4]
- 80098c2:	4a13      	ldr	r2, [pc, #76]	; (8009910 <TIM_OC4_SetConfig+0xa8>)
- 80098c4:	4293      	cmp	r3, r2
- 80098c6:	d003      	beq.n	80098d0 <TIM_OC4_SetConfig+0x68>
- 80098c8:	687b      	ldr	r3, [r7, #4]
- 80098ca:	4a12      	ldr	r2, [pc, #72]	; (8009914 <TIM_OC4_SetConfig+0xac>)
- 80098cc:	4293      	cmp	r3, r2
- 80098ce:	d109      	bne.n	80098e4 <TIM_OC4_SetConfig+0x7c>
-  {
-    /* Check parameters */
-    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
-    /* Reset the Output Compare IDLE State */
-    tmpcr2 &= ~TIM_CR2_OIS4;
- 80098d0:	697b      	ldr	r3, [r7, #20]
- 80098d2:	f423 4380 	bic.w	r3, r3, #16384	; 0x4000
- 80098d6:	617b      	str	r3, [r7, #20]
-
-    /* Set the Output Idle state */
-    tmpcr2 |= (OC_Config->OCIdleState << 6U);
- 80098d8:	683b      	ldr	r3, [r7, #0]
- 80098da:	695b      	ldr	r3, [r3, #20]
- 80098dc:	019b      	lsls	r3, r3, #6
- 80098de:	697a      	ldr	r2, [r7, #20]
- 80098e0:	4313      	orrs	r3, r2
- 80098e2:	617b      	str	r3, [r7, #20]
-  }
-
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
- 80098e4:	687b      	ldr	r3, [r7, #4]
- 80098e6:	697a      	ldr	r2, [r7, #20]
- 80098e8:	605a      	str	r2, [r3, #4]
-
-  /* Write to TIMx CCMR2 */
-  TIMx->CCMR2 = tmpccmrx;
- 80098ea:	687b      	ldr	r3, [r7, #4]
- 80098ec:	68fa      	ldr	r2, [r7, #12]
- 80098ee:	61da      	str	r2, [r3, #28]
-
-  /* Set the Capture Compare Register value */
-  TIMx->CCR4 = OC_Config->Pulse;
- 80098f0:	683b      	ldr	r3, [r7, #0]
- 80098f2:	685a      	ldr	r2, [r3, #4]
- 80098f4:	687b      	ldr	r3, [r7, #4]
- 80098f6:	641a      	str	r2, [r3, #64]	; 0x40
-
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
- 80098f8:	687b      	ldr	r3, [r7, #4]
- 80098fa:	693a      	ldr	r2, [r7, #16]
- 80098fc:	621a      	str	r2, [r3, #32]
-}
- 80098fe:	bf00      	nop
- 8009900:	371c      	adds	r7, #28
- 8009902:	46bd      	mov	sp, r7
- 8009904:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009908:	4770      	bx	lr
- 800990a:	bf00      	nop
- 800990c:	feff8fff 	.word	0xfeff8fff
- 8009910:	40010000 	.word	0x40010000
- 8009914:	40010400 	.word	0x40010400
-
-08009918 <TIM_OC5_SetConfig>:
-  * @param  OC_Config The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx,
-                              TIM_OC_InitTypeDef *OC_Config)
-{
- 8009918:	b480      	push	{r7}
- 800991a:	b087      	sub	sp, #28
- 800991c:	af00      	add	r7, sp, #0
- 800991e:	6078      	str	r0, [r7, #4]
- 8009920:	6039      	str	r1, [r7, #0]
-  uint32_t tmpccmrx;
-  uint32_t tmpccer;
-  uint32_t tmpcr2;
-
-  /* Disable the output: Reset the CCxE Bit */
-  TIMx->CCER &= ~TIM_CCER_CC5E;
- 8009922:	687b      	ldr	r3, [r7, #4]
- 8009924:	6a1b      	ldr	r3, [r3, #32]
- 8009926:	f423 3280 	bic.w	r2, r3, #65536	; 0x10000
- 800992a:	687b      	ldr	r3, [r7, #4]
- 800992c:	621a      	str	r2, [r3, #32]
-
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
- 800992e:	687b      	ldr	r3, [r7, #4]
- 8009930:	6a1b      	ldr	r3, [r3, #32]
- 8009932:	613b      	str	r3, [r7, #16]
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  TIMx->CR2;
- 8009934:	687b      	ldr	r3, [r7, #4]
- 8009936:	685b      	ldr	r3, [r3, #4]
- 8009938:	617b      	str	r3, [r7, #20]
-  /* Get the TIMx CCMR1 register value */
-  tmpccmrx = TIMx->CCMR3;
- 800993a:	687b      	ldr	r3, [r7, #4]
- 800993c:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 800993e:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Compare Mode Bits */
-  tmpccmrx &= ~(TIM_CCMR3_OC5M);
- 8009940:	68fa      	ldr	r2, [r7, #12]
- 8009942:	4b1b      	ldr	r3, [pc, #108]	; (80099b0 <TIM_OC5_SetConfig+0x98>)
- 8009944:	4013      	ands	r3, r2
- 8009946:	60fb      	str	r3, [r7, #12]
-  /* Select the Output Compare Mode */
-  tmpccmrx |= OC_Config->OCMode;
- 8009948:	683b      	ldr	r3, [r7, #0]
- 800994a:	681b      	ldr	r3, [r3, #0]
- 800994c:	68fa      	ldr	r2, [r7, #12]
- 800994e:	4313      	orrs	r3, r2
- 8009950:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC5P;
- 8009952:	693b      	ldr	r3, [r7, #16]
- 8009954:	f423 3300 	bic.w	r3, r3, #131072	; 0x20000
- 8009958:	613b      	str	r3, [r7, #16]
-  /* Set the Output Compare Polarity */
-  tmpccer |= (OC_Config->OCPolarity << 16U);
- 800995a:	683b      	ldr	r3, [r7, #0]
- 800995c:	689b      	ldr	r3, [r3, #8]
- 800995e:	041b      	lsls	r3, r3, #16
- 8009960:	693a      	ldr	r2, [r7, #16]
- 8009962:	4313      	orrs	r3, r2
- 8009964:	613b      	str	r3, [r7, #16]
-
-  if (IS_TIM_BREAK_INSTANCE(TIMx))
- 8009966:	687b      	ldr	r3, [r7, #4]
- 8009968:	4a12      	ldr	r2, [pc, #72]	; (80099b4 <TIM_OC5_SetConfig+0x9c>)
- 800996a:	4293      	cmp	r3, r2
- 800996c:	d003      	beq.n	8009976 <TIM_OC5_SetConfig+0x5e>
- 800996e:	687b      	ldr	r3, [r7, #4]
- 8009970:	4a11      	ldr	r2, [pc, #68]	; (80099b8 <TIM_OC5_SetConfig+0xa0>)
- 8009972:	4293      	cmp	r3, r2
- 8009974:	d109      	bne.n	800998a <TIM_OC5_SetConfig+0x72>
-  {
-    /* Reset the Output Compare IDLE State */
-    tmpcr2 &= ~TIM_CR2_OIS5;
- 8009976:	697b      	ldr	r3, [r7, #20]
- 8009978:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
- 800997c:	617b      	str	r3, [r7, #20]
-    /* Set the Output Idle state */
-    tmpcr2 |= (OC_Config->OCIdleState << 8U);
- 800997e:	683b      	ldr	r3, [r7, #0]
- 8009980:	695b      	ldr	r3, [r3, #20]
- 8009982:	021b      	lsls	r3, r3, #8
- 8009984:	697a      	ldr	r2, [r7, #20]
- 8009986:	4313      	orrs	r3, r2
- 8009988:	617b      	str	r3, [r7, #20]
-  }
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
- 800998a:	687b      	ldr	r3, [r7, #4]
- 800998c:	697a      	ldr	r2, [r7, #20]
- 800998e:	605a      	str	r2, [r3, #4]
-
-  /* Write to TIMx CCMR3 */
-  TIMx->CCMR3 = tmpccmrx;
- 8009990:	687b      	ldr	r3, [r7, #4]
- 8009992:	68fa      	ldr	r2, [r7, #12]
- 8009994:	655a      	str	r2, [r3, #84]	; 0x54
-
-  /* Set the Capture Compare Register value */
-  TIMx->CCR5 = OC_Config->Pulse;
- 8009996:	683b      	ldr	r3, [r7, #0]
- 8009998:	685a      	ldr	r2, [r3, #4]
- 800999a:	687b      	ldr	r3, [r7, #4]
- 800999c:	659a      	str	r2, [r3, #88]	; 0x58
-
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
- 800999e:	687b      	ldr	r3, [r7, #4]
- 80099a0:	693a      	ldr	r2, [r7, #16]
- 80099a2:	621a      	str	r2, [r3, #32]
-}
- 80099a4:	bf00      	nop
- 80099a6:	371c      	adds	r7, #28
- 80099a8:	46bd      	mov	sp, r7
- 80099aa:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80099ae:	4770      	bx	lr
- 80099b0:	fffeff8f 	.word	0xfffeff8f
- 80099b4:	40010000 	.word	0x40010000
- 80099b8:	40010400 	.word	0x40010400
-
-080099bc <TIM_OC6_SetConfig>:
-  * @param  OC_Config The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx,
-                              TIM_OC_InitTypeDef *OC_Config)
-{
- 80099bc:	b480      	push	{r7}
- 80099be:	b087      	sub	sp, #28
- 80099c0:	af00      	add	r7, sp, #0
- 80099c2:	6078      	str	r0, [r7, #4]
- 80099c4:	6039      	str	r1, [r7, #0]
-  uint32_t tmpccmrx;
-  uint32_t tmpccer;
-  uint32_t tmpcr2;
-
-  /* Disable the output: Reset the CCxE Bit */
-  TIMx->CCER &= ~TIM_CCER_CC6E;
- 80099c6:	687b      	ldr	r3, [r7, #4]
- 80099c8:	6a1b      	ldr	r3, [r3, #32]
- 80099ca:	f423 1280 	bic.w	r2, r3, #1048576	; 0x100000
- 80099ce:	687b      	ldr	r3, [r7, #4]
- 80099d0:	621a      	str	r2, [r3, #32]
-
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
- 80099d2:	687b      	ldr	r3, [r7, #4]
- 80099d4:	6a1b      	ldr	r3, [r3, #32]
- 80099d6:	613b      	str	r3, [r7, #16]
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  TIMx->CR2;
- 80099d8:	687b      	ldr	r3, [r7, #4]
- 80099da:	685b      	ldr	r3, [r3, #4]
- 80099dc:	617b      	str	r3, [r7, #20]
-  /* Get the TIMx CCMR1 register value */
-  tmpccmrx = TIMx->CCMR3;
- 80099de:	687b      	ldr	r3, [r7, #4]
- 80099e0:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 80099e2:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Compare Mode Bits */
-  tmpccmrx &= ~(TIM_CCMR3_OC6M);
- 80099e4:	68fa      	ldr	r2, [r7, #12]
- 80099e6:	4b1c      	ldr	r3, [pc, #112]	; (8009a58 <TIM_OC6_SetConfig+0x9c>)
- 80099e8:	4013      	ands	r3, r2
- 80099ea:	60fb      	str	r3, [r7, #12]
-  /* Select the Output Compare Mode */
-  tmpccmrx |= (OC_Config->OCMode << 8U);
- 80099ec:	683b      	ldr	r3, [r7, #0]
- 80099ee:	681b      	ldr	r3, [r3, #0]
- 80099f0:	021b      	lsls	r3, r3, #8
- 80099f2:	68fa      	ldr	r2, [r7, #12]
- 80099f4:	4313      	orrs	r3, r2
- 80099f6:	60fb      	str	r3, [r7, #12]
-
-  /* Reset the Output Polarity level */
-  tmpccer &= (uint32_t)~TIM_CCER_CC6P;
- 80099f8:	693b      	ldr	r3, [r7, #16]
- 80099fa:	f423 1300 	bic.w	r3, r3, #2097152	; 0x200000
- 80099fe:	613b      	str	r3, [r7, #16]
-  /* Set the Output Compare Polarity */
-  tmpccer |= (OC_Config->OCPolarity << 20U);
- 8009a00:	683b      	ldr	r3, [r7, #0]
- 8009a02:	689b      	ldr	r3, [r3, #8]
- 8009a04:	051b      	lsls	r3, r3, #20
- 8009a06:	693a      	ldr	r2, [r7, #16]
- 8009a08:	4313      	orrs	r3, r2
- 8009a0a:	613b      	str	r3, [r7, #16]
-
-  if (IS_TIM_BREAK_INSTANCE(TIMx))
- 8009a0c:	687b      	ldr	r3, [r7, #4]
- 8009a0e:	4a13      	ldr	r2, [pc, #76]	; (8009a5c <TIM_OC6_SetConfig+0xa0>)
- 8009a10:	4293      	cmp	r3, r2
- 8009a12:	d003      	beq.n	8009a1c <TIM_OC6_SetConfig+0x60>
- 8009a14:	687b      	ldr	r3, [r7, #4]
- 8009a16:	4a12      	ldr	r2, [pc, #72]	; (8009a60 <TIM_OC6_SetConfig+0xa4>)
- 8009a18:	4293      	cmp	r3, r2
- 8009a1a:	d109      	bne.n	8009a30 <TIM_OC6_SetConfig+0x74>
-  {
-    /* Reset the Output Compare IDLE State */
-    tmpcr2 &= ~TIM_CR2_OIS6;
- 8009a1c:	697b      	ldr	r3, [r7, #20]
- 8009a1e:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
- 8009a22:	617b      	str	r3, [r7, #20]
-    /* Set the Output Idle state */
-    tmpcr2 |= (OC_Config->OCIdleState << 10U);
- 8009a24:	683b      	ldr	r3, [r7, #0]
- 8009a26:	695b      	ldr	r3, [r3, #20]
- 8009a28:	029b      	lsls	r3, r3, #10
- 8009a2a:	697a      	ldr	r2, [r7, #20]
- 8009a2c:	4313      	orrs	r3, r2
- 8009a2e:	617b      	str	r3, [r7, #20]
-  }
-
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
- 8009a30:	687b      	ldr	r3, [r7, #4]
- 8009a32:	697a      	ldr	r2, [r7, #20]
- 8009a34:	605a      	str	r2, [r3, #4]
-
-  /* Write to TIMx CCMR3 */
-  TIMx->CCMR3 = tmpccmrx;
- 8009a36:	687b      	ldr	r3, [r7, #4]
- 8009a38:	68fa      	ldr	r2, [r7, #12]
- 8009a3a:	655a      	str	r2, [r3, #84]	; 0x54
-
-  /* Set the Capture Compare Register value */
-  TIMx->CCR6 = OC_Config->Pulse;
- 8009a3c:	683b      	ldr	r3, [r7, #0]
- 8009a3e:	685a      	ldr	r2, [r3, #4]
- 8009a40:	687b      	ldr	r3, [r7, #4]
- 8009a42:	65da      	str	r2, [r3, #92]	; 0x5c
-
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
- 8009a44:	687b      	ldr	r3, [r7, #4]
- 8009a46:	693a      	ldr	r2, [r7, #16]
- 8009a48:	621a      	str	r2, [r3, #32]
-}
- 8009a4a:	bf00      	nop
- 8009a4c:	371c      	adds	r7, #28
- 8009a4e:	46bd      	mov	sp, r7
- 8009a50:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009a54:	4770      	bx	lr
- 8009a56:	bf00      	nop
- 8009a58:	feff8fff 	.word	0xfeff8fff
- 8009a5c:	40010000 	.word	0x40010000
- 8009a60:	40010400 	.word	0x40010400
-
-08009a64 <TIM_SlaveTimer_SetConfig>:
-  * @param  sSlaveConfig Slave timer configuration
-  * @retval None
-  */
-static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
-                                                  TIM_SlaveConfigTypeDef *sSlaveConfig)
-{
- 8009a64:	b580      	push	{r7, lr}
- 8009a66:	b086      	sub	sp, #24
- 8009a68:	af00      	add	r7, sp, #0
- 8009a6a:	6078      	str	r0, [r7, #4]
- 8009a6c:	6039      	str	r1, [r7, #0]
-  uint32_t tmpsmcr;
-  uint32_t tmpccmr1;
-  uint32_t tmpccer;
-
-  /* Get the TIMx SMCR register value */
-  tmpsmcr = htim->Instance->SMCR;
- 8009a6e:	687b      	ldr	r3, [r7, #4]
- 8009a70:	681b      	ldr	r3, [r3, #0]
- 8009a72:	689b      	ldr	r3, [r3, #8]
- 8009a74:	617b      	str	r3, [r7, #20]
-
-  /* Reset the Trigger Selection Bits */
-  tmpsmcr &= ~TIM_SMCR_TS;
- 8009a76:	697b      	ldr	r3, [r7, #20]
- 8009a78:	f023 0370 	bic.w	r3, r3, #112	; 0x70
- 8009a7c:	617b      	str	r3, [r7, #20]
-  /* Set the Input Trigger source */
-  tmpsmcr |= sSlaveConfig->InputTrigger;
- 8009a7e:	683b      	ldr	r3, [r7, #0]
- 8009a80:	685b      	ldr	r3, [r3, #4]
- 8009a82:	697a      	ldr	r2, [r7, #20]
- 8009a84:	4313      	orrs	r3, r2
- 8009a86:	617b      	str	r3, [r7, #20]
-
-  /* Reset the slave mode Bits */
-  tmpsmcr &= ~TIM_SMCR_SMS;
- 8009a88:	697a      	ldr	r2, [r7, #20]
- 8009a8a:	4b39      	ldr	r3, [pc, #228]	; (8009b70 <TIM_SlaveTimer_SetConfig+0x10c>)
- 8009a8c:	4013      	ands	r3, r2
- 8009a8e:	617b      	str	r3, [r7, #20]
-  /* Set the slave mode */
-  tmpsmcr |= sSlaveConfig->SlaveMode;
- 8009a90:	683b      	ldr	r3, [r7, #0]
- 8009a92:	681b      	ldr	r3, [r3, #0]
- 8009a94:	697a      	ldr	r2, [r7, #20]
- 8009a96:	4313      	orrs	r3, r2
- 8009a98:	617b      	str	r3, [r7, #20]
-
-  /* Write to TIMx SMCR */
-  htim->Instance->SMCR = tmpsmcr;
- 8009a9a:	687b      	ldr	r3, [r7, #4]
- 8009a9c:	681b      	ldr	r3, [r3, #0]
- 8009a9e:	697a      	ldr	r2, [r7, #20]
- 8009aa0:	609a      	str	r2, [r3, #8]
-
-  /* Configure the trigger prescaler, filter, and polarity */
-  switch (sSlaveConfig->InputTrigger)
- 8009aa2:	683b      	ldr	r3, [r7, #0]
- 8009aa4:	685b      	ldr	r3, [r3, #4]
- 8009aa6:	2b30      	cmp	r3, #48	; 0x30
- 8009aa8:	d05c      	beq.n	8009b64 <TIM_SlaveTimer_SetConfig+0x100>
- 8009aaa:	2b30      	cmp	r3, #48	; 0x30
- 8009aac:	d806      	bhi.n	8009abc <TIM_SlaveTimer_SetConfig+0x58>
- 8009aae:	2b10      	cmp	r3, #16
- 8009ab0:	d058      	beq.n	8009b64 <TIM_SlaveTimer_SetConfig+0x100>
- 8009ab2:	2b20      	cmp	r3, #32
- 8009ab4:	d056      	beq.n	8009b64 <TIM_SlaveTimer_SetConfig+0x100>
- 8009ab6:	2b00      	cmp	r3, #0
- 8009ab8:	d054      	beq.n	8009b64 <TIM_SlaveTimer_SetConfig+0x100>
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      break;
-    }
-
-    default:
-      break;
- 8009aba:	e054      	b.n	8009b66 <TIM_SlaveTimer_SetConfig+0x102>
-  switch (sSlaveConfig->InputTrigger)
- 8009abc:	2b50      	cmp	r3, #80	; 0x50
- 8009abe:	d03d      	beq.n	8009b3c <TIM_SlaveTimer_SetConfig+0xd8>
- 8009ac0:	2b50      	cmp	r3, #80	; 0x50
- 8009ac2:	d802      	bhi.n	8009aca <TIM_SlaveTimer_SetConfig+0x66>
- 8009ac4:	2b40      	cmp	r3, #64	; 0x40
- 8009ac6:	d010      	beq.n	8009aea <TIM_SlaveTimer_SetConfig+0x86>
-      break;
- 8009ac8:	e04d      	b.n	8009b66 <TIM_SlaveTimer_SetConfig+0x102>
-  switch (sSlaveConfig->InputTrigger)
- 8009aca:	2b60      	cmp	r3, #96	; 0x60
- 8009acc:	d040      	beq.n	8009b50 <TIM_SlaveTimer_SetConfig+0xec>
- 8009ace:	2b70      	cmp	r3, #112	; 0x70
- 8009ad0:	d000      	beq.n	8009ad4 <TIM_SlaveTimer_SetConfig+0x70>
-      break;
- 8009ad2:	e048      	b.n	8009b66 <TIM_SlaveTimer_SetConfig+0x102>
-      TIM_ETR_SetConfig(htim->Instance,
- 8009ad4:	687b      	ldr	r3, [r7, #4]
- 8009ad6:	6818      	ldr	r0, [r3, #0]
- 8009ad8:	683b      	ldr	r3, [r7, #0]
- 8009ada:	68d9      	ldr	r1, [r3, #12]
- 8009adc:	683b      	ldr	r3, [r7, #0]
- 8009ade:	689a      	ldr	r2, [r3, #8]
- 8009ae0:	683b      	ldr	r3, [r7, #0]
- 8009ae2:	691b      	ldr	r3, [r3, #16]
- 8009ae4:	f000 f8c0 	bl	8009c68 <TIM_ETR_SetConfig>
-      break;
- 8009ae8:	e03d      	b.n	8009b66 <TIM_SlaveTimer_SetConfig+0x102>
-      if(sSlaveConfig->SlaveMode == TIM_SLAVEMODE_GATED)
- 8009aea:	683b      	ldr	r3, [r7, #0]
- 8009aec:	681b      	ldr	r3, [r3, #0]
- 8009aee:	2b05      	cmp	r3, #5
- 8009af0:	d101      	bne.n	8009af6 <TIM_SlaveTimer_SetConfig+0x92>
-        return HAL_ERROR;
- 8009af2:	2301      	movs	r3, #1
- 8009af4:	e038      	b.n	8009b68 <TIM_SlaveTimer_SetConfig+0x104>
-      tmpccer = htim->Instance->CCER;
- 8009af6:	687b      	ldr	r3, [r7, #4]
- 8009af8:	681b      	ldr	r3, [r3, #0]
- 8009afa:	6a1b      	ldr	r3, [r3, #32]
- 8009afc:	613b      	str	r3, [r7, #16]
-      htim->Instance->CCER &= ~TIM_CCER_CC1E;
- 8009afe:	687b      	ldr	r3, [r7, #4]
- 8009b00:	681b      	ldr	r3, [r3, #0]
- 8009b02:	6a1a      	ldr	r2, [r3, #32]
- 8009b04:	687b      	ldr	r3, [r7, #4]
- 8009b06:	681b      	ldr	r3, [r3, #0]
- 8009b08:	f022 0201 	bic.w	r2, r2, #1
- 8009b0c:	621a      	str	r2, [r3, #32]
-      tmpccmr1 = htim->Instance->CCMR1;
- 8009b0e:	687b      	ldr	r3, [r7, #4]
- 8009b10:	681b      	ldr	r3, [r3, #0]
- 8009b12:	699b      	ldr	r3, [r3, #24]
- 8009b14:	60fb      	str	r3, [r7, #12]
-      tmpccmr1 &= ~TIM_CCMR1_IC1F;
- 8009b16:	68fb      	ldr	r3, [r7, #12]
- 8009b18:	f023 03f0 	bic.w	r3, r3, #240	; 0xf0
- 8009b1c:	60fb      	str	r3, [r7, #12]
-      tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U);
- 8009b1e:	683b      	ldr	r3, [r7, #0]
- 8009b20:	691b      	ldr	r3, [r3, #16]
- 8009b22:	011b      	lsls	r3, r3, #4
- 8009b24:	68fa      	ldr	r2, [r7, #12]
- 8009b26:	4313      	orrs	r3, r2
- 8009b28:	60fb      	str	r3, [r7, #12]
-      htim->Instance->CCMR1 = tmpccmr1;
- 8009b2a:	687b      	ldr	r3, [r7, #4]
- 8009b2c:	681b      	ldr	r3, [r3, #0]
- 8009b2e:	68fa      	ldr	r2, [r7, #12]
- 8009b30:	619a      	str	r2, [r3, #24]
-      htim->Instance->CCER = tmpccer;
- 8009b32:	687b      	ldr	r3, [r7, #4]
- 8009b34:	681b      	ldr	r3, [r3, #0]
- 8009b36:	693a      	ldr	r2, [r7, #16]
- 8009b38:	621a      	str	r2, [r3, #32]
-      break;
- 8009b3a:	e014      	b.n	8009b66 <TIM_SlaveTimer_SetConfig+0x102>
-      TIM_TI1_ConfigInputStage(htim->Instance,
- 8009b3c:	687b      	ldr	r3, [r7, #4]
- 8009b3e:	6818      	ldr	r0, [r3, #0]
- 8009b40:	683b      	ldr	r3, [r7, #0]
- 8009b42:	6899      	ldr	r1, [r3, #8]
- 8009b44:	683b      	ldr	r3, [r7, #0]
- 8009b46:	691b      	ldr	r3, [r3, #16]
- 8009b48:	461a      	mov	r2, r3
- 8009b4a:	f000 f813 	bl	8009b74 <TIM_TI1_ConfigInputStage>
-      break;
- 8009b4e:	e00a      	b.n	8009b66 <TIM_SlaveTimer_SetConfig+0x102>
-      TIM_TI2_ConfigInputStage(htim->Instance,
- 8009b50:	687b      	ldr	r3, [r7, #4]
- 8009b52:	6818      	ldr	r0, [r3, #0]
- 8009b54:	683b      	ldr	r3, [r7, #0]
- 8009b56:	6899      	ldr	r1, [r3, #8]
- 8009b58:	683b      	ldr	r3, [r7, #0]
- 8009b5a:	691b      	ldr	r3, [r3, #16]
- 8009b5c:	461a      	mov	r2, r3
- 8009b5e:	f000 f838 	bl	8009bd2 <TIM_TI2_ConfigInputStage>
-      break;
- 8009b62:	e000      	b.n	8009b66 <TIM_SlaveTimer_SetConfig+0x102>
-      break;
- 8009b64:	bf00      	nop
-  }
-  return HAL_OK;
- 8009b66:	2300      	movs	r3, #0
-}
- 8009b68:	4618      	mov	r0, r3
- 8009b6a:	3718      	adds	r7, #24
- 8009b6c:	46bd      	mov	sp, r7
- 8009b6e:	bd80      	pop	{r7, pc}
- 8009b70:	fffefff8 	.word	0xfffefff8
-
-08009b74 <TIM_TI1_ConfigInputStage>:
-  * @param  TIM_ICFilter Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  */
-static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
-{
- 8009b74:	b480      	push	{r7}
- 8009b76:	b087      	sub	sp, #28
- 8009b78:	af00      	add	r7, sp, #0
- 8009b7a:	60f8      	str	r0, [r7, #12]
- 8009b7c:	60b9      	str	r1, [r7, #8]
- 8009b7e:	607a      	str	r2, [r7, #4]
-  uint32_t tmpccmr1;
-  uint32_t tmpccer;
-
-  /* Disable the Channel 1: Reset the CC1E Bit */
-  tmpccer = TIMx->CCER;
- 8009b80:	68fb      	ldr	r3, [r7, #12]
- 8009b82:	6a1b      	ldr	r3, [r3, #32]
- 8009b84:	617b      	str	r3, [r7, #20]
-  TIMx->CCER &= ~TIM_CCER_CC1E;
- 8009b86:	68fb      	ldr	r3, [r7, #12]
- 8009b88:	6a1b      	ldr	r3, [r3, #32]
- 8009b8a:	f023 0201 	bic.w	r2, r3, #1
- 8009b8e:	68fb      	ldr	r3, [r7, #12]
- 8009b90:	621a      	str	r2, [r3, #32]
-  tmpccmr1 = TIMx->CCMR1;
- 8009b92:	68fb      	ldr	r3, [r7, #12]
- 8009b94:	699b      	ldr	r3, [r3, #24]
- 8009b96:	613b      	str	r3, [r7, #16]
-
-  /* Set the filter */
-  tmpccmr1 &= ~TIM_CCMR1_IC1F;
- 8009b98:	693b      	ldr	r3, [r7, #16]
- 8009b9a:	f023 03f0 	bic.w	r3, r3, #240	; 0xf0
- 8009b9e:	613b      	str	r3, [r7, #16]
-  tmpccmr1 |= (TIM_ICFilter << 4U);
- 8009ba0:	687b      	ldr	r3, [r7, #4]
- 8009ba2:	011b      	lsls	r3, r3, #4
- 8009ba4:	693a      	ldr	r2, [r7, #16]
- 8009ba6:	4313      	orrs	r3, r2
- 8009ba8:	613b      	str	r3, [r7, #16]
-
-  /* Select the Polarity and set the CC1E Bit */
-  tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
- 8009baa:	697b      	ldr	r3, [r7, #20]
- 8009bac:	f023 030a 	bic.w	r3, r3, #10
- 8009bb0:	617b      	str	r3, [r7, #20]
-  tmpccer |= TIM_ICPolarity;
- 8009bb2:	697a      	ldr	r2, [r7, #20]
- 8009bb4:	68bb      	ldr	r3, [r7, #8]
- 8009bb6:	4313      	orrs	r3, r2
- 8009bb8:	617b      	str	r3, [r7, #20]
-
-  /* Write to TIMx CCMR1 and CCER registers */
-  TIMx->CCMR1 = tmpccmr1;
- 8009bba:	68fb      	ldr	r3, [r7, #12]
- 8009bbc:	693a      	ldr	r2, [r7, #16]
- 8009bbe:	619a      	str	r2, [r3, #24]
-  TIMx->CCER = tmpccer;
- 8009bc0:	68fb      	ldr	r3, [r7, #12]
- 8009bc2:	697a      	ldr	r2, [r7, #20]
- 8009bc4:	621a      	str	r2, [r3, #32]
-}
- 8009bc6:	bf00      	nop
- 8009bc8:	371c      	adds	r7, #28
- 8009bca:	46bd      	mov	sp, r7
- 8009bcc:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009bd0:	4770      	bx	lr
-
-08009bd2 <TIM_TI2_ConfigInputStage>:
-  * @param  TIM_ICFilter Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  */
-static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
-{
- 8009bd2:	b480      	push	{r7}
- 8009bd4:	b087      	sub	sp, #28
- 8009bd6:	af00      	add	r7, sp, #0
- 8009bd8:	60f8      	str	r0, [r7, #12]
- 8009bda:	60b9      	str	r1, [r7, #8]
- 8009bdc:	607a      	str	r2, [r7, #4]
-  uint32_t tmpccmr1;
-  uint32_t tmpccer;
-
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC2E;
- 8009bde:	68fb      	ldr	r3, [r7, #12]
- 8009be0:	6a1b      	ldr	r3, [r3, #32]
- 8009be2:	f023 0210 	bic.w	r2, r3, #16
- 8009be6:	68fb      	ldr	r3, [r7, #12]
- 8009be8:	621a      	str	r2, [r3, #32]
-  tmpccmr1 = TIMx->CCMR1;
- 8009bea:	68fb      	ldr	r3, [r7, #12]
- 8009bec:	699b      	ldr	r3, [r3, #24]
- 8009bee:	617b      	str	r3, [r7, #20]
-  tmpccer = TIMx->CCER;
- 8009bf0:	68fb      	ldr	r3, [r7, #12]
- 8009bf2:	6a1b      	ldr	r3, [r3, #32]
- 8009bf4:	613b      	str	r3, [r7, #16]
-
-  /* Set the filter */
-  tmpccmr1 &= ~TIM_CCMR1_IC2F;
- 8009bf6:	697b      	ldr	r3, [r7, #20]
- 8009bf8:	f423 4370 	bic.w	r3, r3, #61440	; 0xf000
- 8009bfc:	617b      	str	r3, [r7, #20]
-  tmpccmr1 |= (TIM_ICFilter << 12U);
- 8009bfe:	687b      	ldr	r3, [r7, #4]
- 8009c00:	031b      	lsls	r3, r3, #12
- 8009c02:	697a      	ldr	r2, [r7, #20]
- 8009c04:	4313      	orrs	r3, r2
- 8009c06:	617b      	str	r3, [r7, #20]
-
-  /* Select the Polarity and set the CC2E Bit */
-  tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
- 8009c08:	693b      	ldr	r3, [r7, #16]
- 8009c0a:	f023 03a0 	bic.w	r3, r3, #160	; 0xa0
- 8009c0e:	613b      	str	r3, [r7, #16]
-  tmpccer |= (TIM_ICPolarity << 4U);
- 8009c10:	68bb      	ldr	r3, [r7, #8]
- 8009c12:	011b      	lsls	r3, r3, #4
- 8009c14:	693a      	ldr	r2, [r7, #16]
- 8009c16:	4313      	orrs	r3, r2
- 8009c18:	613b      	str	r3, [r7, #16]
-
-  /* Write to TIMx CCMR1 and CCER registers */
-  TIMx->CCMR1 = tmpccmr1 ;
- 8009c1a:	68fb      	ldr	r3, [r7, #12]
- 8009c1c:	697a      	ldr	r2, [r7, #20]
- 8009c1e:	619a      	str	r2, [r3, #24]
-  TIMx->CCER = tmpccer;
- 8009c20:	68fb      	ldr	r3, [r7, #12]
- 8009c22:	693a      	ldr	r2, [r7, #16]
- 8009c24:	621a      	str	r2, [r3, #32]
-}
- 8009c26:	bf00      	nop
- 8009c28:	371c      	adds	r7, #28
- 8009c2a:	46bd      	mov	sp, r7
- 8009c2c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009c30:	4770      	bx	lr
-
-08009c32 <TIM_ITRx_SetConfig>:
-  *            @arg TIM_TS_TI2FP2: Filtered Timer Input 2
-  *            @arg TIM_TS_ETRF: External Trigger input
-  * @retval None
-  */
-static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
-{
- 8009c32:	b480      	push	{r7}
- 8009c34:	b085      	sub	sp, #20
- 8009c36:	af00      	add	r7, sp, #0
- 8009c38:	6078      	str	r0, [r7, #4]
- 8009c3a:	6039      	str	r1, [r7, #0]
-  uint32_t tmpsmcr;
-
-  /* Get the TIMx SMCR register value */
-  tmpsmcr = TIMx->SMCR;
- 8009c3c:	687b      	ldr	r3, [r7, #4]
- 8009c3e:	689b      	ldr	r3, [r3, #8]
- 8009c40:	60fb      	str	r3, [r7, #12]
-  /* Reset the TS Bits */
-  tmpsmcr &= ~TIM_SMCR_TS;
- 8009c42:	68fb      	ldr	r3, [r7, #12]
- 8009c44:	f023 0370 	bic.w	r3, r3, #112	; 0x70
- 8009c48:	60fb      	str	r3, [r7, #12]
-  /* Set the Input Trigger source and the slave mode*/
-  tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
- 8009c4a:	683a      	ldr	r2, [r7, #0]
- 8009c4c:	68fb      	ldr	r3, [r7, #12]
- 8009c4e:	4313      	orrs	r3, r2
- 8009c50:	f043 0307 	orr.w	r3, r3, #7
- 8009c54:	60fb      	str	r3, [r7, #12]
-  /* Write to TIMx SMCR */
-  TIMx->SMCR = tmpsmcr;
- 8009c56:	687b      	ldr	r3, [r7, #4]
- 8009c58:	68fa      	ldr	r2, [r7, #12]
- 8009c5a:	609a      	str	r2, [r3, #8]
-}
- 8009c5c:	bf00      	nop
- 8009c5e:	3714      	adds	r7, #20
- 8009c60:	46bd      	mov	sp, r7
- 8009c62:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009c66:	4770      	bx	lr
-
-08009c68 <TIM_ETR_SetConfig>:
-  *          This parameter must be a value between 0x00 and 0x0F
-  * @retval None
-  */
-void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
-                       uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
-{
- 8009c68:	b480      	push	{r7}
- 8009c6a:	b087      	sub	sp, #28
- 8009c6c:	af00      	add	r7, sp, #0
- 8009c6e:	60f8      	str	r0, [r7, #12]
- 8009c70:	60b9      	str	r1, [r7, #8]
- 8009c72:	607a      	str	r2, [r7, #4]
- 8009c74:	603b      	str	r3, [r7, #0]
-  uint32_t tmpsmcr;
-
-  tmpsmcr = TIMx->SMCR;
- 8009c76:	68fb      	ldr	r3, [r7, #12]
- 8009c78:	689b      	ldr	r3, [r3, #8]
- 8009c7a:	617b      	str	r3, [r7, #20]
-
-  /* Reset the ETR Bits */
-  tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
- 8009c7c:	697b      	ldr	r3, [r7, #20]
- 8009c7e:	f423 437f 	bic.w	r3, r3, #65280	; 0xff00
- 8009c82:	617b      	str	r3, [r7, #20]
-
-  /* Set the Prescaler, the Filter value and the Polarity */
-  tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
- 8009c84:	683b      	ldr	r3, [r7, #0]
- 8009c86:	021a      	lsls	r2, r3, #8
- 8009c88:	687b      	ldr	r3, [r7, #4]
- 8009c8a:	431a      	orrs	r2, r3
- 8009c8c:	68bb      	ldr	r3, [r7, #8]
- 8009c8e:	4313      	orrs	r3, r2
- 8009c90:	697a      	ldr	r2, [r7, #20]
- 8009c92:	4313      	orrs	r3, r2
- 8009c94:	617b      	str	r3, [r7, #20]
-
-  /* Write to TIMx SMCR */
-  TIMx->SMCR = tmpsmcr;
- 8009c96:	68fb      	ldr	r3, [r7, #12]
- 8009c98:	697a      	ldr	r2, [r7, #20]
- 8009c9a:	609a      	str	r2, [r3, #8]
-}
- 8009c9c:	bf00      	nop
- 8009c9e:	371c      	adds	r7, #28
- 8009ca0:	46bd      	mov	sp, r7
- 8009ca2:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009ca6:	4770      	bx	lr
-
-08009ca8 <HAL_TIMEx_MasterConfigSynchronization>:
-  *         mode.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
-                                                        TIM_MasterConfigTypeDef *sMasterConfig)
-{
- 8009ca8:	b480      	push	{r7}
- 8009caa:	b085      	sub	sp, #20
- 8009cac:	af00      	add	r7, sp, #0
- 8009cae:	6078      	str	r0, [r7, #4]
- 8009cb0:	6039      	str	r1, [r7, #0]
-  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
-  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
-
-  /* Check input state */
-  __HAL_LOCK(htim);
- 8009cb2:	687b      	ldr	r3, [r7, #4]
- 8009cb4:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
- 8009cb8:	2b01      	cmp	r3, #1
- 8009cba:	d101      	bne.n	8009cc0 <HAL_TIMEx_MasterConfigSynchronization+0x18>
- 8009cbc:	2302      	movs	r3, #2
- 8009cbe:	e06d      	b.n	8009d9c <HAL_TIMEx_MasterConfigSynchronization+0xf4>
- 8009cc0:	687b      	ldr	r3, [r7, #4]
- 8009cc2:	2201      	movs	r2, #1
- 8009cc4:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-
-  /* Change the handler state */
-  htim->State = HAL_TIM_STATE_BUSY;
- 8009cc8:	687b      	ldr	r3, [r7, #4]
- 8009cca:	2202      	movs	r2, #2
- 8009ccc:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = htim->Instance->CR2;
- 8009cd0:	687b      	ldr	r3, [r7, #4]
- 8009cd2:	681b      	ldr	r3, [r3, #0]
- 8009cd4:	685b      	ldr	r3, [r3, #4]
- 8009cd6:	60fb      	str	r3, [r7, #12]
-
-  /* Get the TIMx SMCR register value */
-  tmpsmcr = htim->Instance->SMCR;
- 8009cd8:	687b      	ldr	r3, [r7, #4]
- 8009cda:	681b      	ldr	r3, [r3, #0]
- 8009cdc:	689b      	ldr	r3, [r3, #8]
- 8009cde:	60bb      	str	r3, [r7, #8]
-
-  /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
-  if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
- 8009ce0:	687b      	ldr	r3, [r7, #4]
- 8009ce2:	681b      	ldr	r3, [r3, #0]
- 8009ce4:	4a30      	ldr	r2, [pc, #192]	; (8009da8 <HAL_TIMEx_MasterConfigSynchronization+0x100>)
- 8009ce6:	4293      	cmp	r3, r2
- 8009ce8:	d004      	beq.n	8009cf4 <HAL_TIMEx_MasterConfigSynchronization+0x4c>
- 8009cea:	687b      	ldr	r3, [r7, #4]
- 8009cec:	681b      	ldr	r3, [r3, #0]
- 8009cee:	4a2f      	ldr	r2, [pc, #188]	; (8009dac <HAL_TIMEx_MasterConfigSynchronization+0x104>)
- 8009cf0:	4293      	cmp	r3, r2
- 8009cf2:	d108      	bne.n	8009d06 <HAL_TIMEx_MasterConfigSynchronization+0x5e>
-  {
-    /* Check the parameters */
-    assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
-
-    /* Clear the MMS2 bits */
-    tmpcr2 &= ~TIM_CR2_MMS2;
- 8009cf4:	68fb      	ldr	r3, [r7, #12]
- 8009cf6:	f423 0370 	bic.w	r3, r3, #15728640	; 0xf00000
- 8009cfa:	60fb      	str	r3, [r7, #12]
-    /* Select the TRGO2 source*/
-    tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
- 8009cfc:	683b      	ldr	r3, [r7, #0]
- 8009cfe:	685b      	ldr	r3, [r3, #4]
- 8009d00:	68fa      	ldr	r2, [r7, #12]
- 8009d02:	4313      	orrs	r3, r2
- 8009d04:	60fb      	str	r3, [r7, #12]
-  }
-
-  /* Reset the MMS Bits */
-  tmpcr2 &= ~TIM_CR2_MMS;
- 8009d06:	68fb      	ldr	r3, [r7, #12]
- 8009d08:	f023 0370 	bic.w	r3, r3, #112	; 0x70
- 8009d0c:	60fb      	str	r3, [r7, #12]
-  /* Select the TRGO source */
-  tmpcr2 |=  sMasterConfig->MasterOutputTrigger;
- 8009d0e:	683b      	ldr	r3, [r7, #0]
- 8009d10:	681b      	ldr	r3, [r3, #0]
- 8009d12:	68fa      	ldr	r2, [r7, #12]
- 8009d14:	4313      	orrs	r3, r2
- 8009d16:	60fb      	str	r3, [r7, #12]
-
-  /* Update TIMx CR2 */
-  htim->Instance->CR2 = tmpcr2;
- 8009d18:	687b      	ldr	r3, [r7, #4]
- 8009d1a:	681b      	ldr	r3, [r3, #0]
- 8009d1c:	68fa      	ldr	r2, [r7, #12]
- 8009d1e:	605a      	str	r2, [r3, #4]
-
-  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- 8009d20:	687b      	ldr	r3, [r7, #4]
- 8009d22:	681b      	ldr	r3, [r3, #0]
- 8009d24:	4a20      	ldr	r2, [pc, #128]	; (8009da8 <HAL_TIMEx_MasterConfigSynchronization+0x100>)
- 8009d26:	4293      	cmp	r3, r2
- 8009d28:	d022      	beq.n	8009d70 <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8009d2a:	687b      	ldr	r3, [r7, #4]
- 8009d2c:	681b      	ldr	r3, [r3, #0]
- 8009d2e:	f1b3 4f80 	cmp.w	r3, #1073741824	; 0x40000000
- 8009d32:	d01d      	beq.n	8009d70 <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8009d34:	687b      	ldr	r3, [r7, #4]
- 8009d36:	681b      	ldr	r3, [r3, #0]
- 8009d38:	4a1d      	ldr	r2, [pc, #116]	; (8009db0 <HAL_TIMEx_MasterConfigSynchronization+0x108>)
- 8009d3a:	4293      	cmp	r3, r2
- 8009d3c:	d018      	beq.n	8009d70 <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8009d3e:	687b      	ldr	r3, [r7, #4]
- 8009d40:	681b      	ldr	r3, [r3, #0]
- 8009d42:	4a1c      	ldr	r2, [pc, #112]	; (8009db4 <HAL_TIMEx_MasterConfigSynchronization+0x10c>)
- 8009d44:	4293      	cmp	r3, r2
- 8009d46:	d013      	beq.n	8009d70 <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8009d48:	687b      	ldr	r3, [r7, #4]
- 8009d4a:	681b      	ldr	r3, [r3, #0]
- 8009d4c:	4a1a      	ldr	r2, [pc, #104]	; (8009db8 <HAL_TIMEx_MasterConfigSynchronization+0x110>)
- 8009d4e:	4293      	cmp	r3, r2
- 8009d50:	d00e      	beq.n	8009d70 <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8009d52:	687b      	ldr	r3, [r7, #4]
- 8009d54:	681b      	ldr	r3, [r3, #0]
- 8009d56:	4a15      	ldr	r2, [pc, #84]	; (8009dac <HAL_TIMEx_MasterConfigSynchronization+0x104>)
- 8009d58:	4293      	cmp	r3, r2
- 8009d5a:	d009      	beq.n	8009d70 <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8009d5c:	687b      	ldr	r3, [r7, #4]
- 8009d5e:	681b      	ldr	r3, [r3, #0]
- 8009d60:	4a16      	ldr	r2, [pc, #88]	; (8009dbc <HAL_TIMEx_MasterConfigSynchronization+0x114>)
- 8009d62:	4293      	cmp	r3, r2
- 8009d64:	d004      	beq.n	8009d70 <HAL_TIMEx_MasterConfigSynchronization+0xc8>
- 8009d66:	687b      	ldr	r3, [r7, #4]
- 8009d68:	681b      	ldr	r3, [r3, #0]
- 8009d6a:	4a15      	ldr	r2, [pc, #84]	; (8009dc0 <HAL_TIMEx_MasterConfigSynchronization+0x118>)
- 8009d6c:	4293      	cmp	r3, r2
- 8009d6e:	d10c      	bne.n	8009d8a <HAL_TIMEx_MasterConfigSynchronization+0xe2>
-  {
-    /* Reset the MSM Bit */
-    tmpsmcr &= ~TIM_SMCR_MSM;
- 8009d70:	68bb      	ldr	r3, [r7, #8]
- 8009d72:	f023 0380 	bic.w	r3, r3, #128	; 0x80
- 8009d76:	60bb      	str	r3, [r7, #8]
-    /* Set master mode */
-    tmpsmcr |= sMasterConfig->MasterSlaveMode;
- 8009d78:	683b      	ldr	r3, [r7, #0]
- 8009d7a:	689b      	ldr	r3, [r3, #8]
- 8009d7c:	68ba      	ldr	r2, [r7, #8]
- 8009d7e:	4313      	orrs	r3, r2
- 8009d80:	60bb      	str	r3, [r7, #8]
-
-    /* Update TIMx SMCR */
-    htim->Instance->SMCR = tmpsmcr;
- 8009d82:	687b      	ldr	r3, [r7, #4]
- 8009d84:	681b      	ldr	r3, [r3, #0]
- 8009d86:	68ba      	ldr	r2, [r7, #8]
- 8009d88:	609a      	str	r2, [r3, #8]
-  }
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
- 8009d8a:	687b      	ldr	r3, [r7, #4]
- 8009d8c:	2201      	movs	r2, #1
- 8009d8e:	f883 203d 	strb.w	r2, [r3, #61]	; 0x3d
-
-  __HAL_UNLOCK(htim);
- 8009d92:	687b      	ldr	r3, [r7, #4]
- 8009d94:	2200      	movs	r2, #0
- 8009d96:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-
-  return HAL_OK;
- 8009d9a:	2300      	movs	r3, #0
-}
- 8009d9c:	4618      	mov	r0, r3
- 8009d9e:	3714      	adds	r7, #20
- 8009da0:	46bd      	mov	sp, r7
- 8009da2:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009da6:	4770      	bx	lr
- 8009da8:	40010000 	.word	0x40010000
- 8009dac:	40010400 	.word	0x40010400
- 8009db0:	40000400 	.word	0x40000400
- 8009db4:	40000800 	.word	0x40000800
- 8009db8:	40000c00 	.word	0x40000c00
- 8009dbc:	40014000 	.word	0x40014000
- 8009dc0:	40001800 	.word	0x40001800
-
-08009dc4 <HAL_TIMEx_ConfigBreakDeadTime>:
-  *         interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
-                                                TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
-{
- 8009dc4:	b480      	push	{r7}
- 8009dc6:	b085      	sub	sp, #20
- 8009dc8:	af00      	add	r7, sp, #0
- 8009dca:	6078      	str	r0, [r7, #4]
- 8009dcc:	6039      	str	r1, [r7, #0]
-  /* Keep this variable initialized to 0 as it is used to configure BDTR register */
-  uint32_t tmpbdtr = 0U;
- 8009dce:	2300      	movs	r3, #0
- 8009dd0:	60fb      	str	r3, [r7, #12]
-  assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
-  assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
-  assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
-
-  /* Check input state */
-  __HAL_LOCK(htim);
- 8009dd2:	687b      	ldr	r3, [r7, #4]
- 8009dd4:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
- 8009dd8:	2b01      	cmp	r3, #1
- 8009dda:	d101      	bne.n	8009de0 <HAL_TIMEx_ConfigBreakDeadTime+0x1c>
- 8009ddc:	2302      	movs	r3, #2
- 8009dde:	e065      	b.n	8009eac <HAL_TIMEx_ConfigBreakDeadTime+0xe8>
- 8009de0:	687b      	ldr	r3, [r7, #4]
- 8009de2:	2201      	movs	r2, #1
- 8009de4:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-
-  /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
-     the OSSI State, the dead time value and the Automatic Output Enable Bit */
-
-  /* Set the BDTR bits */
-  MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
- 8009de8:	68fb      	ldr	r3, [r7, #12]
- 8009dea:	f023 02ff 	bic.w	r2, r3, #255	; 0xff
- 8009dee:	683b      	ldr	r3, [r7, #0]
- 8009df0:	68db      	ldr	r3, [r3, #12]
- 8009df2:	4313      	orrs	r3, r2
- 8009df4:	60fb      	str	r3, [r7, #12]
-  MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
- 8009df6:	68fb      	ldr	r3, [r7, #12]
- 8009df8:	f423 7240 	bic.w	r2, r3, #768	; 0x300
- 8009dfc:	683b      	ldr	r3, [r7, #0]
- 8009dfe:	689b      	ldr	r3, [r3, #8]
- 8009e00:	4313      	orrs	r3, r2
- 8009e02:	60fb      	str	r3, [r7, #12]
-  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
- 8009e04:	68fb      	ldr	r3, [r7, #12]
- 8009e06:	f423 6280 	bic.w	r2, r3, #1024	; 0x400
- 8009e0a:	683b      	ldr	r3, [r7, #0]
- 8009e0c:	685b      	ldr	r3, [r3, #4]
- 8009e0e:	4313      	orrs	r3, r2
- 8009e10:	60fb      	str	r3, [r7, #12]
-  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
- 8009e12:	68fb      	ldr	r3, [r7, #12]
- 8009e14:	f423 6200 	bic.w	r2, r3, #2048	; 0x800
- 8009e18:	683b      	ldr	r3, [r7, #0]
- 8009e1a:	681b      	ldr	r3, [r3, #0]
- 8009e1c:	4313      	orrs	r3, r2
- 8009e1e:	60fb      	str	r3, [r7, #12]
-  MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
- 8009e20:	68fb      	ldr	r3, [r7, #12]
- 8009e22:	f423 5280 	bic.w	r2, r3, #4096	; 0x1000
- 8009e26:	683b      	ldr	r3, [r7, #0]
- 8009e28:	691b      	ldr	r3, [r3, #16]
- 8009e2a:	4313      	orrs	r3, r2
- 8009e2c:	60fb      	str	r3, [r7, #12]
-  MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
- 8009e2e:	68fb      	ldr	r3, [r7, #12]
- 8009e30:	f423 5200 	bic.w	r2, r3, #8192	; 0x2000
- 8009e34:	683b      	ldr	r3, [r7, #0]
- 8009e36:	695b      	ldr	r3, [r3, #20]
- 8009e38:	4313      	orrs	r3, r2
- 8009e3a:	60fb      	str	r3, [r7, #12]
-  MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
- 8009e3c:	68fb      	ldr	r3, [r7, #12]
- 8009e3e:	f423 4280 	bic.w	r2, r3, #16384	; 0x4000
- 8009e42:	683b      	ldr	r3, [r7, #0]
- 8009e44:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 8009e46:	4313      	orrs	r3, r2
- 8009e48:	60fb      	str	r3, [r7, #12]
-  MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
- 8009e4a:	68fb      	ldr	r3, [r7, #12]
- 8009e4c:	f423 2270 	bic.w	r2, r3, #983040	; 0xf0000
- 8009e50:	683b      	ldr	r3, [r7, #0]
- 8009e52:	699b      	ldr	r3, [r3, #24]
- 8009e54:	041b      	lsls	r3, r3, #16
- 8009e56:	4313      	orrs	r3, r2
- 8009e58:	60fb      	str	r3, [r7, #12]
-
-  if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
- 8009e5a:	687b      	ldr	r3, [r7, #4]
- 8009e5c:	681b      	ldr	r3, [r3, #0]
- 8009e5e:	4a16      	ldr	r2, [pc, #88]	; (8009eb8 <HAL_TIMEx_ConfigBreakDeadTime+0xf4>)
- 8009e60:	4293      	cmp	r3, r2
- 8009e62:	d004      	beq.n	8009e6e <HAL_TIMEx_ConfigBreakDeadTime+0xaa>
- 8009e64:	687b      	ldr	r3, [r7, #4]
- 8009e66:	681b      	ldr	r3, [r3, #0]
- 8009e68:	4a14      	ldr	r2, [pc, #80]	; (8009ebc <HAL_TIMEx_ConfigBreakDeadTime+0xf8>)
- 8009e6a:	4293      	cmp	r3, r2
- 8009e6c:	d115      	bne.n	8009e9a <HAL_TIMEx_ConfigBreakDeadTime+0xd6>
-    assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
-    assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
-    assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
-
-    /* Set the BREAK2 input related BDTR bits */
-    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
- 8009e6e:	68fb      	ldr	r3, [r7, #12]
- 8009e70:	f423 0270 	bic.w	r2, r3, #15728640	; 0xf00000
- 8009e74:	683b      	ldr	r3, [r7, #0]
- 8009e76:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8009e78:	051b      	lsls	r3, r3, #20
- 8009e7a:	4313      	orrs	r3, r2
- 8009e7c:	60fb      	str	r3, [r7, #12]
-    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
- 8009e7e:	68fb      	ldr	r3, [r7, #12]
- 8009e80:	f023 7280 	bic.w	r2, r3, #16777216	; 0x1000000
- 8009e84:	683b      	ldr	r3, [r7, #0]
- 8009e86:	69db      	ldr	r3, [r3, #28]
- 8009e88:	4313      	orrs	r3, r2
- 8009e8a:	60fb      	str	r3, [r7, #12]
-    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
- 8009e8c:	68fb      	ldr	r3, [r7, #12]
- 8009e8e:	f023 7200 	bic.w	r2, r3, #33554432	; 0x2000000
- 8009e92:	683b      	ldr	r3, [r7, #0]
- 8009e94:	6a1b      	ldr	r3, [r3, #32]
- 8009e96:	4313      	orrs	r3, r2
- 8009e98:	60fb      	str	r3, [r7, #12]
-  }
-
-  /* Set TIMx_BDTR */
-  htim->Instance->BDTR = tmpbdtr;
- 8009e9a:	687b      	ldr	r3, [r7, #4]
- 8009e9c:	681b      	ldr	r3, [r3, #0]
- 8009e9e:	68fa      	ldr	r2, [r7, #12]
- 8009ea0:	645a      	str	r2, [r3, #68]	; 0x44
-
-  __HAL_UNLOCK(htim);
- 8009ea2:	687b      	ldr	r3, [r7, #4]
- 8009ea4:	2200      	movs	r2, #0
- 8009ea6:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
-
-  return HAL_OK;
- 8009eaa:	2300      	movs	r3, #0
-}
- 8009eac:	4618      	mov	r0, r3
- 8009eae:	3714      	adds	r7, #20
- 8009eb0:	46bd      	mov	sp, r7
- 8009eb2:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009eb6:	4770      	bx	lr
- 8009eb8:	40010000 	.word	0x40010000
- 8009ebc:	40010400 	.word	0x40010400
-
-08009ec0 <HAL_TIMEx_CommutCallback>:
-  * @brief  Hall commutation changed callback in non-blocking mode
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
-{
- 8009ec0:	b480      	push	{r7}
- 8009ec2:	b083      	sub	sp, #12
- 8009ec4:	af00      	add	r7, sp, #0
- 8009ec6:	6078      	str	r0, [r7, #4]
-  UNUSED(htim);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TIMEx_CommutCallback could be implemented in the user file
-   */
-}
- 8009ec8:	bf00      	nop
- 8009eca:	370c      	adds	r7, #12
- 8009ecc:	46bd      	mov	sp, r7
- 8009ece:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009ed2:	4770      	bx	lr
-
-08009ed4 <HAL_TIMEx_BreakCallback>:
-  * @brief  Hall Break detection callback in non-blocking mode
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
-{
- 8009ed4:	b480      	push	{r7}
- 8009ed6:	b083      	sub	sp, #12
- 8009ed8:	af00      	add	r7, sp, #0
- 8009eda:	6078      	str	r0, [r7, #4]
-  UNUSED(htim);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TIMEx_BreakCallback could be implemented in the user file
-   */
-}
- 8009edc:	bf00      	nop
- 8009ede:	370c      	adds	r7, #12
- 8009ee0:	46bd      	mov	sp, r7
- 8009ee2:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009ee6:	4770      	bx	lr
-
-08009ee8 <HAL_TIMEx_Break2Callback>:
-  * @brief  Hall Break2 detection callback in non blocking mode
-  * @param  htim: TIM handle
-  * @retval None
-  */
-__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
-{
- 8009ee8:	b480      	push	{r7}
- 8009eea:	b083      	sub	sp, #12
- 8009eec:	af00      	add	r7, sp, #0
- 8009eee:	6078      	str	r0, [r7, #4]
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIMEx_Break2Callback could be implemented in the user file
-   */
-}
- 8009ef0:	bf00      	nop
- 8009ef2:	370c      	adds	r7, #12
- 8009ef4:	46bd      	mov	sp, r7
- 8009ef6:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8009efa:	4770      	bx	lr
-
-08009efc <HAL_UART_Init>:
-  *        parameters in the UART_InitTypeDef and initialize the associated handle.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
-{
- 8009efc:	b580      	push	{r7, lr}
- 8009efe:	b082      	sub	sp, #8
- 8009f00:	af00      	add	r7, sp, #0
- 8009f02:	6078      	str	r0, [r7, #4]
-  /* Check the UART handle allocation */
-  if (huart == NULL)
- 8009f04:	687b      	ldr	r3, [r7, #4]
- 8009f06:	2b00      	cmp	r3, #0
- 8009f08:	d101      	bne.n	8009f0e <HAL_UART_Init+0x12>
-  {
-    return HAL_ERROR;
- 8009f0a:	2301      	movs	r3, #1
- 8009f0c:	e040      	b.n	8009f90 <HAL_UART_Init+0x94>
-  {
-    /* Check the parameters */
-    assert_param(IS_UART_INSTANCE(huart->Instance));
-  }
-
-  if (huart->gState == HAL_UART_STATE_RESET)
- 8009f0e:	687b      	ldr	r3, [r7, #4]
- 8009f10:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 8009f12:	2b00      	cmp	r3, #0
- 8009f14:	d106      	bne.n	8009f24 <HAL_UART_Init+0x28>
-  {
-    /* Allocate lock resource and initialize it */
-    huart->Lock = HAL_UNLOCKED;
- 8009f16:	687b      	ldr	r3, [r7, #4]
- 8009f18:	2200      	movs	r2, #0
- 8009f1a:	f883 2070 	strb.w	r2, [r3, #112]	; 0x70
-
-    /* Init the low level hardware */
-    huart->MspInitCallback(huart);
-#else
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_UART_MspInit(huart);
- 8009f1e:	6878      	ldr	r0, [r7, #4]
- 8009f20:	f7fa f86a 	bl	8003ff8 <HAL_UART_MspInit>
-#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
-  }
-
-  huart->gState = HAL_UART_STATE_BUSY;
- 8009f24:	687b      	ldr	r3, [r7, #4]
- 8009f26:	2224      	movs	r2, #36	; 0x24
- 8009f28:	675a      	str	r2, [r3, #116]	; 0x74
-
-  __HAL_UART_DISABLE(huart);
- 8009f2a:	687b      	ldr	r3, [r7, #4]
- 8009f2c:	681b      	ldr	r3, [r3, #0]
- 8009f2e:	681a      	ldr	r2, [r3, #0]
- 8009f30:	687b      	ldr	r3, [r7, #4]
- 8009f32:	681b      	ldr	r3, [r3, #0]
- 8009f34:	f022 0201 	bic.w	r2, r2, #1
- 8009f38:	601a      	str	r2, [r3, #0]
-
-  /* Set the UART Communication parameters */
-  if (UART_SetConfig(huart) == HAL_ERROR)
- 8009f3a:	6878      	ldr	r0, [r7, #4]
- 8009f3c:	f000 f82c 	bl	8009f98 <UART_SetConfig>
- 8009f40:	4603      	mov	r3, r0
- 8009f42:	2b01      	cmp	r3, #1
- 8009f44:	d101      	bne.n	8009f4a <HAL_UART_Init+0x4e>
-  {
-    return HAL_ERROR;
- 8009f46:	2301      	movs	r3, #1
- 8009f48:	e022      	b.n	8009f90 <HAL_UART_Init+0x94>
-  }
-
-  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
- 8009f4a:	687b      	ldr	r3, [r7, #4]
- 8009f4c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8009f4e:	2b00      	cmp	r3, #0
- 8009f50:	d002      	beq.n	8009f58 <HAL_UART_Init+0x5c>
-  {
-    UART_AdvFeatureConfig(huart);
- 8009f52:	6878      	ldr	r0, [r7, #4]
- 8009f54:	f000 faca 	bl	800a4ec <UART_AdvFeatureConfig>
-  }
-
-  /* In asynchronous mode, the following bits must be kept cleared:
-  - LINEN and CLKEN bits in the USART_CR2 register,
-  - SCEN, HDSEL and IREN  bits in the USART_CR3 register.*/
-  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- 8009f58:	687b      	ldr	r3, [r7, #4]
- 8009f5a:	681b      	ldr	r3, [r3, #0]
- 8009f5c:	685a      	ldr	r2, [r3, #4]
- 8009f5e:	687b      	ldr	r3, [r7, #4]
- 8009f60:	681b      	ldr	r3, [r3, #0]
- 8009f62:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
- 8009f66:	605a      	str	r2, [r3, #4]
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
- 8009f68:	687b      	ldr	r3, [r7, #4]
- 8009f6a:	681b      	ldr	r3, [r3, #0]
- 8009f6c:	689a      	ldr	r2, [r3, #8]
- 8009f6e:	687b      	ldr	r3, [r7, #4]
- 8009f70:	681b      	ldr	r3, [r3, #0]
- 8009f72:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
- 8009f76:	609a      	str	r2, [r3, #8]
-
-  __HAL_UART_ENABLE(huart);
- 8009f78:	687b      	ldr	r3, [r7, #4]
- 8009f7a:	681b      	ldr	r3, [r3, #0]
- 8009f7c:	681a      	ldr	r2, [r3, #0]
- 8009f7e:	687b      	ldr	r3, [r7, #4]
- 8009f80:	681b      	ldr	r3, [r3, #0]
- 8009f82:	f042 0201 	orr.w	r2, r2, #1
- 8009f86:	601a      	str	r2, [r3, #0]
-
-  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
- 8009f88:	6878      	ldr	r0, [r7, #4]
- 8009f8a:	f000 fb51 	bl	800a630 <UART_CheckIdleState>
- 8009f8e:	4603      	mov	r3, r0
-}
- 8009f90:	4618      	mov	r0, r3
- 8009f92:	3708      	adds	r7, #8
- 8009f94:	46bd      	mov	sp, r7
- 8009f96:	bd80      	pop	{r7, pc}
-
-08009f98 <UART_SetConfig>:
-  * @brief Configure the UART peripheral.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
-{
- 8009f98:	b580      	push	{r7, lr}
- 8009f9a:	b088      	sub	sp, #32
- 8009f9c:	af00      	add	r7, sp, #0
- 8009f9e:	6078      	str	r0, [r7, #4]
-  uint32_t tmpreg;
-  uint16_t brrtemp;
-  UART_ClockSourceTypeDef clocksource;
-  uint32_t usartdiv                   = 0x00000000U;
- 8009fa0:	2300      	movs	r3, #0
- 8009fa2:	61bb      	str	r3, [r7, #24]
-  HAL_StatusTypeDef ret               = HAL_OK;
- 8009fa4:	2300      	movs	r3, #0
- 8009fa6:	75fb      	strb	r3, [r7, #23]
-  *  the UART Word Length, Parity, Mode and oversampling:
-  *  set the M bits according to huart->Init.WordLength value
-  *  set PCE and PS bits according to huart->Init.Parity value
-  *  set TE and RE bits according to huart->Init.Mode value
-  *  set OVER8 bit according to huart->Init.OverSampling value */
-  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
- 8009fa8:	687b      	ldr	r3, [r7, #4]
- 8009faa:	689a      	ldr	r2, [r3, #8]
- 8009fac:	687b      	ldr	r3, [r7, #4]
- 8009fae:	691b      	ldr	r3, [r3, #16]
- 8009fb0:	431a      	orrs	r2, r3
- 8009fb2:	687b      	ldr	r3, [r7, #4]
- 8009fb4:	695b      	ldr	r3, [r3, #20]
- 8009fb6:	431a      	orrs	r2, r3
- 8009fb8:	687b      	ldr	r3, [r7, #4]
- 8009fba:	69db      	ldr	r3, [r3, #28]
- 8009fbc:	4313      	orrs	r3, r2
- 8009fbe:	613b      	str	r3, [r7, #16]
-  MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
- 8009fc0:	687b      	ldr	r3, [r7, #4]
- 8009fc2:	681b      	ldr	r3, [r3, #0]
- 8009fc4:	681a      	ldr	r2, [r3, #0]
- 8009fc6:	4bb1      	ldr	r3, [pc, #708]	; (800a28c <UART_SetConfig+0x2f4>)
- 8009fc8:	4013      	ands	r3, r2
- 8009fca:	687a      	ldr	r2, [r7, #4]
- 8009fcc:	6812      	ldr	r2, [r2, #0]
- 8009fce:	6939      	ldr	r1, [r7, #16]
- 8009fd0:	430b      	orrs	r3, r1
- 8009fd2:	6013      	str	r3, [r2, #0]
-
-  /*-------------------------- USART CR2 Configuration -----------------------*/
-  /* Configure the UART Stop Bits: Set STOP[13:12] bits according
-  * to huart->Init.StopBits value */
-  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
- 8009fd4:	687b      	ldr	r3, [r7, #4]
- 8009fd6:	681b      	ldr	r3, [r3, #0]
- 8009fd8:	685b      	ldr	r3, [r3, #4]
- 8009fda:	f423 5140 	bic.w	r1, r3, #12288	; 0x3000
- 8009fde:	687b      	ldr	r3, [r7, #4]
- 8009fe0:	68da      	ldr	r2, [r3, #12]
- 8009fe2:	687b      	ldr	r3, [r7, #4]
- 8009fe4:	681b      	ldr	r3, [r3, #0]
- 8009fe6:	430a      	orrs	r2, r1
- 8009fe8:	605a      	str	r2, [r3, #4]
-  /* Configure
-  * - UART HardWare Flow Control: set CTSE and RTSE bits according
-  *   to huart->Init.HwFlowCtl value
-  * - one-bit sampling method versus three samples' majority rule according
-  *   to huart->Init.OneBitSampling (not applicable to LPUART) */
-  tmpreg = (uint32_t)huart->Init.HwFlowCtl;
- 8009fea:	687b      	ldr	r3, [r7, #4]
- 8009fec:	699b      	ldr	r3, [r3, #24]
- 8009fee:	613b      	str	r3, [r7, #16]
-
-  tmpreg |= huart->Init.OneBitSampling;
- 8009ff0:	687b      	ldr	r3, [r7, #4]
- 8009ff2:	6a1b      	ldr	r3, [r3, #32]
- 8009ff4:	693a      	ldr	r2, [r7, #16]
- 8009ff6:	4313      	orrs	r3, r2
- 8009ff8:	613b      	str	r3, [r7, #16]
-  MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
- 8009ffa:	687b      	ldr	r3, [r7, #4]
- 8009ffc:	681b      	ldr	r3, [r3, #0]
- 8009ffe:	689b      	ldr	r3, [r3, #8]
- 800a000:	f423 6130 	bic.w	r1, r3, #2816	; 0xb00
- 800a004:	687b      	ldr	r3, [r7, #4]
- 800a006:	681b      	ldr	r3, [r3, #0]
- 800a008:	693a      	ldr	r2, [r7, #16]
- 800a00a:	430a      	orrs	r2, r1
- 800a00c:	609a      	str	r2, [r3, #8]
-
-
-  /*-------------------------- USART BRR Configuration -----------------------*/
-  UART_GETCLOCKSOURCE(huart, clocksource);
- 800a00e:	687b      	ldr	r3, [r7, #4]
- 800a010:	681b      	ldr	r3, [r3, #0]
- 800a012:	4a9f      	ldr	r2, [pc, #636]	; (800a290 <UART_SetConfig+0x2f8>)
- 800a014:	4293      	cmp	r3, r2
- 800a016:	d121      	bne.n	800a05c <UART_SetConfig+0xc4>
- 800a018:	4b9e      	ldr	r3, [pc, #632]	; (800a294 <UART_SetConfig+0x2fc>)
- 800a01a:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 800a01e:	f003 0303 	and.w	r3, r3, #3
- 800a022:	2b03      	cmp	r3, #3
- 800a024:	d816      	bhi.n	800a054 <UART_SetConfig+0xbc>
- 800a026:	a201      	add	r2, pc, #4	; (adr r2, 800a02c <UART_SetConfig+0x94>)
- 800a028:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 800a02c:	0800a03d 	.word	0x0800a03d
- 800a030:	0800a049 	.word	0x0800a049
- 800a034:	0800a043 	.word	0x0800a043
- 800a038:	0800a04f 	.word	0x0800a04f
- 800a03c:	2301      	movs	r3, #1
- 800a03e:	77fb      	strb	r3, [r7, #31]
- 800a040:	e151      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a042:	2302      	movs	r3, #2
- 800a044:	77fb      	strb	r3, [r7, #31]
- 800a046:	e14e      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a048:	2304      	movs	r3, #4
- 800a04a:	77fb      	strb	r3, [r7, #31]
- 800a04c:	e14b      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a04e:	2308      	movs	r3, #8
- 800a050:	77fb      	strb	r3, [r7, #31]
- 800a052:	e148      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a054:	2310      	movs	r3, #16
- 800a056:	77fb      	strb	r3, [r7, #31]
- 800a058:	bf00      	nop
- 800a05a:	e144      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a05c:	687b      	ldr	r3, [r7, #4]
- 800a05e:	681b      	ldr	r3, [r3, #0]
- 800a060:	4a8d      	ldr	r2, [pc, #564]	; (800a298 <UART_SetConfig+0x300>)
- 800a062:	4293      	cmp	r3, r2
- 800a064:	d134      	bne.n	800a0d0 <UART_SetConfig+0x138>
- 800a066:	4b8b      	ldr	r3, [pc, #556]	; (800a294 <UART_SetConfig+0x2fc>)
- 800a068:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 800a06c:	f003 030c 	and.w	r3, r3, #12
- 800a070:	2b0c      	cmp	r3, #12
- 800a072:	d829      	bhi.n	800a0c8 <UART_SetConfig+0x130>
- 800a074:	a201      	add	r2, pc, #4	; (adr r2, 800a07c <UART_SetConfig+0xe4>)
- 800a076:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 800a07a:	bf00      	nop
- 800a07c:	0800a0b1 	.word	0x0800a0b1
- 800a080:	0800a0c9 	.word	0x0800a0c9
- 800a084:	0800a0c9 	.word	0x0800a0c9
- 800a088:	0800a0c9 	.word	0x0800a0c9
- 800a08c:	0800a0bd 	.word	0x0800a0bd
- 800a090:	0800a0c9 	.word	0x0800a0c9
- 800a094:	0800a0c9 	.word	0x0800a0c9
- 800a098:	0800a0c9 	.word	0x0800a0c9
- 800a09c:	0800a0b7 	.word	0x0800a0b7
- 800a0a0:	0800a0c9 	.word	0x0800a0c9
- 800a0a4:	0800a0c9 	.word	0x0800a0c9
- 800a0a8:	0800a0c9 	.word	0x0800a0c9
- 800a0ac:	0800a0c3 	.word	0x0800a0c3
- 800a0b0:	2300      	movs	r3, #0
- 800a0b2:	77fb      	strb	r3, [r7, #31]
- 800a0b4:	e117      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a0b6:	2302      	movs	r3, #2
- 800a0b8:	77fb      	strb	r3, [r7, #31]
- 800a0ba:	e114      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a0bc:	2304      	movs	r3, #4
- 800a0be:	77fb      	strb	r3, [r7, #31]
- 800a0c0:	e111      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a0c2:	2308      	movs	r3, #8
- 800a0c4:	77fb      	strb	r3, [r7, #31]
- 800a0c6:	e10e      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a0c8:	2310      	movs	r3, #16
- 800a0ca:	77fb      	strb	r3, [r7, #31]
- 800a0cc:	bf00      	nop
- 800a0ce:	e10a      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a0d0:	687b      	ldr	r3, [r7, #4]
- 800a0d2:	681b      	ldr	r3, [r3, #0]
- 800a0d4:	4a71      	ldr	r2, [pc, #452]	; (800a29c <UART_SetConfig+0x304>)
- 800a0d6:	4293      	cmp	r3, r2
- 800a0d8:	d120      	bne.n	800a11c <UART_SetConfig+0x184>
- 800a0da:	4b6e      	ldr	r3, [pc, #440]	; (800a294 <UART_SetConfig+0x2fc>)
- 800a0dc:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 800a0e0:	f003 0330 	and.w	r3, r3, #48	; 0x30
- 800a0e4:	2b10      	cmp	r3, #16
- 800a0e6:	d00f      	beq.n	800a108 <UART_SetConfig+0x170>
- 800a0e8:	2b10      	cmp	r3, #16
- 800a0ea:	d802      	bhi.n	800a0f2 <UART_SetConfig+0x15a>
- 800a0ec:	2b00      	cmp	r3, #0
- 800a0ee:	d005      	beq.n	800a0fc <UART_SetConfig+0x164>
- 800a0f0:	e010      	b.n	800a114 <UART_SetConfig+0x17c>
- 800a0f2:	2b20      	cmp	r3, #32
- 800a0f4:	d005      	beq.n	800a102 <UART_SetConfig+0x16a>
- 800a0f6:	2b30      	cmp	r3, #48	; 0x30
- 800a0f8:	d009      	beq.n	800a10e <UART_SetConfig+0x176>
- 800a0fa:	e00b      	b.n	800a114 <UART_SetConfig+0x17c>
- 800a0fc:	2300      	movs	r3, #0
- 800a0fe:	77fb      	strb	r3, [r7, #31]
- 800a100:	e0f1      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a102:	2302      	movs	r3, #2
- 800a104:	77fb      	strb	r3, [r7, #31]
- 800a106:	e0ee      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a108:	2304      	movs	r3, #4
- 800a10a:	77fb      	strb	r3, [r7, #31]
- 800a10c:	e0eb      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a10e:	2308      	movs	r3, #8
- 800a110:	77fb      	strb	r3, [r7, #31]
- 800a112:	e0e8      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a114:	2310      	movs	r3, #16
- 800a116:	77fb      	strb	r3, [r7, #31]
- 800a118:	bf00      	nop
- 800a11a:	e0e4      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a11c:	687b      	ldr	r3, [r7, #4]
- 800a11e:	681b      	ldr	r3, [r3, #0]
- 800a120:	4a5f      	ldr	r2, [pc, #380]	; (800a2a0 <UART_SetConfig+0x308>)
- 800a122:	4293      	cmp	r3, r2
- 800a124:	d120      	bne.n	800a168 <UART_SetConfig+0x1d0>
- 800a126:	4b5b      	ldr	r3, [pc, #364]	; (800a294 <UART_SetConfig+0x2fc>)
- 800a128:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 800a12c:	f003 03c0 	and.w	r3, r3, #192	; 0xc0
- 800a130:	2b40      	cmp	r3, #64	; 0x40
- 800a132:	d00f      	beq.n	800a154 <UART_SetConfig+0x1bc>
- 800a134:	2b40      	cmp	r3, #64	; 0x40
- 800a136:	d802      	bhi.n	800a13e <UART_SetConfig+0x1a6>
- 800a138:	2b00      	cmp	r3, #0
- 800a13a:	d005      	beq.n	800a148 <UART_SetConfig+0x1b0>
- 800a13c:	e010      	b.n	800a160 <UART_SetConfig+0x1c8>
- 800a13e:	2b80      	cmp	r3, #128	; 0x80
- 800a140:	d005      	beq.n	800a14e <UART_SetConfig+0x1b6>
- 800a142:	2bc0      	cmp	r3, #192	; 0xc0
- 800a144:	d009      	beq.n	800a15a <UART_SetConfig+0x1c2>
- 800a146:	e00b      	b.n	800a160 <UART_SetConfig+0x1c8>
- 800a148:	2300      	movs	r3, #0
- 800a14a:	77fb      	strb	r3, [r7, #31]
- 800a14c:	e0cb      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a14e:	2302      	movs	r3, #2
- 800a150:	77fb      	strb	r3, [r7, #31]
- 800a152:	e0c8      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a154:	2304      	movs	r3, #4
- 800a156:	77fb      	strb	r3, [r7, #31]
- 800a158:	e0c5      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a15a:	2308      	movs	r3, #8
- 800a15c:	77fb      	strb	r3, [r7, #31]
- 800a15e:	e0c2      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a160:	2310      	movs	r3, #16
- 800a162:	77fb      	strb	r3, [r7, #31]
- 800a164:	bf00      	nop
- 800a166:	e0be      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a168:	687b      	ldr	r3, [r7, #4]
- 800a16a:	681b      	ldr	r3, [r3, #0]
- 800a16c:	4a4d      	ldr	r2, [pc, #308]	; (800a2a4 <UART_SetConfig+0x30c>)
- 800a16e:	4293      	cmp	r3, r2
- 800a170:	d124      	bne.n	800a1bc <UART_SetConfig+0x224>
- 800a172:	4b48      	ldr	r3, [pc, #288]	; (800a294 <UART_SetConfig+0x2fc>)
- 800a174:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 800a178:	f403 7340 	and.w	r3, r3, #768	; 0x300
- 800a17c:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
- 800a180:	d012      	beq.n	800a1a8 <UART_SetConfig+0x210>
- 800a182:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
- 800a186:	d802      	bhi.n	800a18e <UART_SetConfig+0x1f6>
- 800a188:	2b00      	cmp	r3, #0
- 800a18a:	d007      	beq.n	800a19c <UART_SetConfig+0x204>
- 800a18c:	e012      	b.n	800a1b4 <UART_SetConfig+0x21c>
- 800a18e:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
- 800a192:	d006      	beq.n	800a1a2 <UART_SetConfig+0x20a>
- 800a194:	f5b3 7f40 	cmp.w	r3, #768	; 0x300
- 800a198:	d009      	beq.n	800a1ae <UART_SetConfig+0x216>
- 800a19a:	e00b      	b.n	800a1b4 <UART_SetConfig+0x21c>
- 800a19c:	2300      	movs	r3, #0
- 800a19e:	77fb      	strb	r3, [r7, #31]
- 800a1a0:	e0a1      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a1a2:	2302      	movs	r3, #2
- 800a1a4:	77fb      	strb	r3, [r7, #31]
- 800a1a6:	e09e      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a1a8:	2304      	movs	r3, #4
- 800a1aa:	77fb      	strb	r3, [r7, #31]
- 800a1ac:	e09b      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a1ae:	2308      	movs	r3, #8
- 800a1b0:	77fb      	strb	r3, [r7, #31]
- 800a1b2:	e098      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a1b4:	2310      	movs	r3, #16
- 800a1b6:	77fb      	strb	r3, [r7, #31]
- 800a1b8:	bf00      	nop
- 800a1ba:	e094      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a1bc:	687b      	ldr	r3, [r7, #4]
- 800a1be:	681b      	ldr	r3, [r3, #0]
- 800a1c0:	4a39      	ldr	r2, [pc, #228]	; (800a2a8 <UART_SetConfig+0x310>)
- 800a1c2:	4293      	cmp	r3, r2
- 800a1c4:	d124      	bne.n	800a210 <UART_SetConfig+0x278>
- 800a1c6:	4b33      	ldr	r3, [pc, #204]	; (800a294 <UART_SetConfig+0x2fc>)
- 800a1c8:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 800a1cc:	f403 6340 	and.w	r3, r3, #3072	; 0xc00
- 800a1d0:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
- 800a1d4:	d012      	beq.n	800a1fc <UART_SetConfig+0x264>
- 800a1d6:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
- 800a1da:	d802      	bhi.n	800a1e2 <UART_SetConfig+0x24a>
- 800a1dc:	2b00      	cmp	r3, #0
- 800a1de:	d007      	beq.n	800a1f0 <UART_SetConfig+0x258>
- 800a1e0:	e012      	b.n	800a208 <UART_SetConfig+0x270>
- 800a1e2:	f5b3 6f00 	cmp.w	r3, #2048	; 0x800
- 800a1e6:	d006      	beq.n	800a1f6 <UART_SetConfig+0x25e>
- 800a1e8:	f5b3 6f40 	cmp.w	r3, #3072	; 0xc00
- 800a1ec:	d009      	beq.n	800a202 <UART_SetConfig+0x26a>
- 800a1ee:	e00b      	b.n	800a208 <UART_SetConfig+0x270>
- 800a1f0:	2301      	movs	r3, #1
- 800a1f2:	77fb      	strb	r3, [r7, #31]
- 800a1f4:	e077      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a1f6:	2302      	movs	r3, #2
- 800a1f8:	77fb      	strb	r3, [r7, #31]
- 800a1fa:	e074      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a1fc:	2304      	movs	r3, #4
- 800a1fe:	77fb      	strb	r3, [r7, #31]
- 800a200:	e071      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a202:	2308      	movs	r3, #8
- 800a204:	77fb      	strb	r3, [r7, #31]
- 800a206:	e06e      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a208:	2310      	movs	r3, #16
- 800a20a:	77fb      	strb	r3, [r7, #31]
- 800a20c:	bf00      	nop
- 800a20e:	e06a      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a210:	687b      	ldr	r3, [r7, #4]
- 800a212:	681b      	ldr	r3, [r3, #0]
- 800a214:	4a25      	ldr	r2, [pc, #148]	; (800a2ac <UART_SetConfig+0x314>)
- 800a216:	4293      	cmp	r3, r2
- 800a218:	d124      	bne.n	800a264 <UART_SetConfig+0x2cc>
- 800a21a:	4b1e      	ldr	r3, [pc, #120]	; (800a294 <UART_SetConfig+0x2fc>)
- 800a21c:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 800a220:	f403 5340 	and.w	r3, r3, #12288	; 0x3000
- 800a224:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
- 800a228:	d012      	beq.n	800a250 <UART_SetConfig+0x2b8>
- 800a22a:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
- 800a22e:	d802      	bhi.n	800a236 <UART_SetConfig+0x29e>
- 800a230:	2b00      	cmp	r3, #0
- 800a232:	d007      	beq.n	800a244 <UART_SetConfig+0x2ac>
- 800a234:	e012      	b.n	800a25c <UART_SetConfig+0x2c4>
- 800a236:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
- 800a23a:	d006      	beq.n	800a24a <UART_SetConfig+0x2b2>
- 800a23c:	f5b3 5f40 	cmp.w	r3, #12288	; 0x3000
- 800a240:	d009      	beq.n	800a256 <UART_SetConfig+0x2be>
- 800a242:	e00b      	b.n	800a25c <UART_SetConfig+0x2c4>
- 800a244:	2300      	movs	r3, #0
- 800a246:	77fb      	strb	r3, [r7, #31]
- 800a248:	e04d      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a24a:	2302      	movs	r3, #2
- 800a24c:	77fb      	strb	r3, [r7, #31]
- 800a24e:	e04a      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a250:	2304      	movs	r3, #4
- 800a252:	77fb      	strb	r3, [r7, #31]
- 800a254:	e047      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a256:	2308      	movs	r3, #8
- 800a258:	77fb      	strb	r3, [r7, #31]
- 800a25a:	e044      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a25c:	2310      	movs	r3, #16
- 800a25e:	77fb      	strb	r3, [r7, #31]
- 800a260:	bf00      	nop
- 800a262:	e040      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a264:	687b      	ldr	r3, [r7, #4]
- 800a266:	681b      	ldr	r3, [r3, #0]
- 800a268:	4a11      	ldr	r2, [pc, #68]	; (800a2b0 <UART_SetConfig+0x318>)
- 800a26a:	4293      	cmp	r3, r2
- 800a26c:	d139      	bne.n	800a2e2 <UART_SetConfig+0x34a>
- 800a26e:	4b09      	ldr	r3, [pc, #36]	; (800a294 <UART_SetConfig+0x2fc>)
- 800a270:	f8d3 3090 	ldr.w	r3, [r3, #144]	; 0x90
- 800a274:	f403 4340 	and.w	r3, r3, #49152	; 0xc000
- 800a278:	f5b3 4f80 	cmp.w	r3, #16384	; 0x4000
- 800a27c:	d027      	beq.n	800a2ce <UART_SetConfig+0x336>
- 800a27e:	f5b3 4f80 	cmp.w	r3, #16384	; 0x4000
- 800a282:	d817      	bhi.n	800a2b4 <UART_SetConfig+0x31c>
- 800a284:	2b00      	cmp	r3, #0
- 800a286:	d01c      	beq.n	800a2c2 <UART_SetConfig+0x32a>
- 800a288:	e027      	b.n	800a2da <UART_SetConfig+0x342>
- 800a28a:	bf00      	nop
- 800a28c:	efff69f3 	.word	0xefff69f3
- 800a290:	40011000 	.word	0x40011000
- 800a294:	40023800 	.word	0x40023800
- 800a298:	40004400 	.word	0x40004400
- 800a29c:	40004800 	.word	0x40004800
- 800a2a0:	40004c00 	.word	0x40004c00
- 800a2a4:	40005000 	.word	0x40005000
- 800a2a8:	40011400 	.word	0x40011400
- 800a2ac:	40007800 	.word	0x40007800
- 800a2b0:	40007c00 	.word	0x40007c00
- 800a2b4:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
- 800a2b8:	d006      	beq.n	800a2c8 <UART_SetConfig+0x330>
- 800a2ba:	f5b3 4f40 	cmp.w	r3, #49152	; 0xc000
- 800a2be:	d009      	beq.n	800a2d4 <UART_SetConfig+0x33c>
- 800a2c0:	e00b      	b.n	800a2da <UART_SetConfig+0x342>
- 800a2c2:	2300      	movs	r3, #0
- 800a2c4:	77fb      	strb	r3, [r7, #31]
- 800a2c6:	e00e      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a2c8:	2302      	movs	r3, #2
- 800a2ca:	77fb      	strb	r3, [r7, #31]
- 800a2cc:	e00b      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a2ce:	2304      	movs	r3, #4
- 800a2d0:	77fb      	strb	r3, [r7, #31]
- 800a2d2:	e008      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a2d4:	2308      	movs	r3, #8
- 800a2d6:	77fb      	strb	r3, [r7, #31]
- 800a2d8:	e005      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a2da:	2310      	movs	r3, #16
- 800a2dc:	77fb      	strb	r3, [r7, #31]
- 800a2de:	bf00      	nop
- 800a2e0:	e001      	b.n	800a2e6 <UART_SetConfig+0x34e>
- 800a2e2:	2310      	movs	r3, #16
- 800a2e4:	77fb      	strb	r3, [r7, #31]
-
-  if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
- 800a2e6:	687b      	ldr	r3, [r7, #4]
- 800a2e8:	69db      	ldr	r3, [r3, #28]
- 800a2ea:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
- 800a2ee:	d17f      	bne.n	800a3f0 <UART_SetConfig+0x458>
-  {
-    switch (clocksource)
- 800a2f0:	7ffb      	ldrb	r3, [r7, #31]
- 800a2f2:	2b08      	cmp	r3, #8
- 800a2f4:	d85c      	bhi.n	800a3b0 <UART_SetConfig+0x418>
- 800a2f6:	a201      	add	r2, pc, #4	; (adr r2, 800a2fc <UART_SetConfig+0x364>)
- 800a2f8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 800a2fc:	0800a321 	.word	0x0800a321
- 800a300:	0800a341 	.word	0x0800a341
- 800a304:	0800a361 	.word	0x0800a361
- 800a308:	0800a3b1 	.word	0x0800a3b1
- 800a30c:	0800a379 	.word	0x0800a379
- 800a310:	0800a3b1 	.word	0x0800a3b1
- 800a314:	0800a3b1 	.word	0x0800a3b1
- 800a318:	0800a3b1 	.word	0x0800a3b1
- 800a31c:	0800a399 	.word	0x0800a399
-    {
-      case UART_CLOCKSOURCE_PCLK1:
-        pclk = HAL_RCC_GetPCLK1Freq();
- 800a320:	f7fd fba2 	bl	8007a68 <HAL_RCC_GetPCLK1Freq>
- 800a324:	60f8      	str	r0, [r7, #12]
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
- 800a326:	68fb      	ldr	r3, [r7, #12]
- 800a328:	005a      	lsls	r2, r3, #1
- 800a32a:	687b      	ldr	r3, [r7, #4]
- 800a32c:	685b      	ldr	r3, [r3, #4]
- 800a32e:	085b      	lsrs	r3, r3, #1
- 800a330:	441a      	add	r2, r3
- 800a332:	687b      	ldr	r3, [r7, #4]
- 800a334:	685b      	ldr	r3, [r3, #4]
- 800a336:	fbb2 f3f3 	udiv	r3, r2, r3
- 800a33a:	b29b      	uxth	r3, r3
- 800a33c:	61bb      	str	r3, [r7, #24]
-        break;
- 800a33e:	e03a      	b.n	800a3b6 <UART_SetConfig+0x41e>
-      case UART_CLOCKSOURCE_PCLK2:
-        pclk = HAL_RCC_GetPCLK2Freq();
- 800a340:	f7fd fba6 	bl	8007a90 <HAL_RCC_GetPCLK2Freq>
- 800a344:	60f8      	str	r0, [r7, #12]
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
- 800a346:	68fb      	ldr	r3, [r7, #12]
- 800a348:	005a      	lsls	r2, r3, #1
- 800a34a:	687b      	ldr	r3, [r7, #4]
- 800a34c:	685b      	ldr	r3, [r3, #4]
- 800a34e:	085b      	lsrs	r3, r3, #1
- 800a350:	441a      	add	r2, r3
- 800a352:	687b      	ldr	r3, [r7, #4]
- 800a354:	685b      	ldr	r3, [r3, #4]
- 800a356:	fbb2 f3f3 	udiv	r3, r2, r3
- 800a35a:	b29b      	uxth	r3, r3
- 800a35c:	61bb      	str	r3, [r7, #24]
-        break;
- 800a35e:	e02a      	b.n	800a3b6 <UART_SetConfig+0x41e>
-      case UART_CLOCKSOURCE_HSI:
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
- 800a360:	687b      	ldr	r3, [r7, #4]
- 800a362:	685b      	ldr	r3, [r3, #4]
- 800a364:	085a      	lsrs	r2, r3, #1
- 800a366:	4b5f      	ldr	r3, [pc, #380]	; (800a4e4 <UART_SetConfig+0x54c>)
- 800a368:	4413      	add	r3, r2
- 800a36a:	687a      	ldr	r2, [r7, #4]
- 800a36c:	6852      	ldr	r2, [r2, #4]
- 800a36e:	fbb3 f3f2 	udiv	r3, r3, r2
- 800a372:	b29b      	uxth	r3, r3
- 800a374:	61bb      	str	r3, [r7, #24]
-        break;
- 800a376:	e01e      	b.n	800a3b6 <UART_SetConfig+0x41e>
-      case UART_CLOCKSOURCE_SYSCLK:
-        pclk = HAL_RCC_GetSysClockFreq();
- 800a378:	f7fd fab8 	bl	80078ec <HAL_RCC_GetSysClockFreq>
- 800a37c:	60f8      	str	r0, [r7, #12]
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
- 800a37e:	68fb      	ldr	r3, [r7, #12]
- 800a380:	005a      	lsls	r2, r3, #1
- 800a382:	687b      	ldr	r3, [r7, #4]
- 800a384:	685b      	ldr	r3, [r3, #4]
- 800a386:	085b      	lsrs	r3, r3, #1
- 800a388:	441a      	add	r2, r3
- 800a38a:	687b      	ldr	r3, [r7, #4]
- 800a38c:	685b      	ldr	r3, [r3, #4]
- 800a38e:	fbb2 f3f3 	udiv	r3, r2, r3
- 800a392:	b29b      	uxth	r3, r3
- 800a394:	61bb      	str	r3, [r7, #24]
-        break;
- 800a396:	e00e      	b.n	800a3b6 <UART_SetConfig+0x41e>
-      case UART_CLOCKSOURCE_LSE:
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
- 800a398:	687b      	ldr	r3, [r7, #4]
- 800a39a:	685b      	ldr	r3, [r3, #4]
- 800a39c:	085b      	lsrs	r3, r3, #1
- 800a39e:	f503 3280 	add.w	r2, r3, #65536	; 0x10000
- 800a3a2:	687b      	ldr	r3, [r7, #4]
- 800a3a4:	685b      	ldr	r3, [r3, #4]
- 800a3a6:	fbb2 f3f3 	udiv	r3, r2, r3
- 800a3aa:	b29b      	uxth	r3, r3
- 800a3ac:	61bb      	str	r3, [r7, #24]
-        break;
- 800a3ae:	e002      	b.n	800a3b6 <UART_SetConfig+0x41e>
-      default:
-        ret = HAL_ERROR;
- 800a3b0:	2301      	movs	r3, #1
- 800a3b2:	75fb      	strb	r3, [r7, #23]
-        break;
- 800a3b4:	bf00      	nop
-    }
-
-    /* USARTDIV must be greater than or equal to 0d16 */
-    if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 800a3b6:	69bb      	ldr	r3, [r7, #24]
- 800a3b8:	2b0f      	cmp	r3, #15
- 800a3ba:	d916      	bls.n	800a3ea <UART_SetConfig+0x452>
- 800a3bc:	69bb      	ldr	r3, [r7, #24]
- 800a3be:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
- 800a3c2:	d212      	bcs.n	800a3ea <UART_SetConfig+0x452>
-    {
-      brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
- 800a3c4:	69bb      	ldr	r3, [r7, #24]
- 800a3c6:	b29b      	uxth	r3, r3
- 800a3c8:	f023 030f 	bic.w	r3, r3, #15
- 800a3cc:	817b      	strh	r3, [r7, #10]
-      brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
- 800a3ce:	69bb      	ldr	r3, [r7, #24]
- 800a3d0:	085b      	lsrs	r3, r3, #1
- 800a3d2:	b29b      	uxth	r3, r3
- 800a3d4:	f003 0307 	and.w	r3, r3, #7
- 800a3d8:	b29a      	uxth	r2, r3
- 800a3da:	897b      	ldrh	r3, [r7, #10]
- 800a3dc:	4313      	orrs	r3, r2
- 800a3de:	817b      	strh	r3, [r7, #10]
-      huart->Instance->BRR = brrtemp;
- 800a3e0:	687b      	ldr	r3, [r7, #4]
- 800a3e2:	681b      	ldr	r3, [r3, #0]
- 800a3e4:	897a      	ldrh	r2, [r7, #10]
- 800a3e6:	60da      	str	r2, [r3, #12]
- 800a3e8:	e070      	b.n	800a4cc <UART_SetConfig+0x534>
-    }
-    else
-    {
-      ret = HAL_ERROR;
- 800a3ea:	2301      	movs	r3, #1
- 800a3ec:	75fb      	strb	r3, [r7, #23]
- 800a3ee:	e06d      	b.n	800a4cc <UART_SetConfig+0x534>
-    }
-  }
-  else
-  {
-    switch (clocksource)
- 800a3f0:	7ffb      	ldrb	r3, [r7, #31]
- 800a3f2:	2b08      	cmp	r3, #8
- 800a3f4:	d859      	bhi.n	800a4aa <UART_SetConfig+0x512>
- 800a3f6:	a201      	add	r2, pc, #4	; (adr r2, 800a3fc <UART_SetConfig+0x464>)
- 800a3f8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
- 800a3fc:	0800a421 	.word	0x0800a421
- 800a400:	0800a43f 	.word	0x0800a43f
- 800a404:	0800a45d 	.word	0x0800a45d
- 800a408:	0800a4ab 	.word	0x0800a4ab
- 800a40c:	0800a475 	.word	0x0800a475
- 800a410:	0800a4ab 	.word	0x0800a4ab
- 800a414:	0800a4ab 	.word	0x0800a4ab
- 800a418:	0800a4ab 	.word	0x0800a4ab
- 800a41c:	0800a493 	.word	0x0800a493
-    {
-      case UART_CLOCKSOURCE_PCLK1:
-        pclk = HAL_RCC_GetPCLK1Freq();
- 800a420:	f7fd fb22 	bl	8007a68 <HAL_RCC_GetPCLK1Freq>
- 800a424:	60f8      	str	r0, [r7, #12]
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
- 800a426:	687b      	ldr	r3, [r7, #4]
- 800a428:	685b      	ldr	r3, [r3, #4]
- 800a42a:	085a      	lsrs	r2, r3, #1
- 800a42c:	68fb      	ldr	r3, [r7, #12]
- 800a42e:	441a      	add	r2, r3
- 800a430:	687b      	ldr	r3, [r7, #4]
- 800a432:	685b      	ldr	r3, [r3, #4]
- 800a434:	fbb2 f3f3 	udiv	r3, r2, r3
- 800a438:	b29b      	uxth	r3, r3
- 800a43a:	61bb      	str	r3, [r7, #24]
-        break;
- 800a43c:	e038      	b.n	800a4b0 <UART_SetConfig+0x518>
-      case UART_CLOCKSOURCE_PCLK2:
-        pclk = HAL_RCC_GetPCLK2Freq();
- 800a43e:	f7fd fb27 	bl	8007a90 <HAL_RCC_GetPCLK2Freq>
- 800a442:	60f8      	str	r0, [r7, #12]
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
- 800a444:	687b      	ldr	r3, [r7, #4]
- 800a446:	685b      	ldr	r3, [r3, #4]
- 800a448:	085a      	lsrs	r2, r3, #1
- 800a44a:	68fb      	ldr	r3, [r7, #12]
- 800a44c:	441a      	add	r2, r3
- 800a44e:	687b      	ldr	r3, [r7, #4]
- 800a450:	685b      	ldr	r3, [r3, #4]
- 800a452:	fbb2 f3f3 	udiv	r3, r2, r3
- 800a456:	b29b      	uxth	r3, r3
- 800a458:	61bb      	str	r3, [r7, #24]
-        break;
- 800a45a:	e029      	b.n	800a4b0 <UART_SetConfig+0x518>
-      case UART_CLOCKSOURCE_HSI:
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
- 800a45c:	687b      	ldr	r3, [r7, #4]
- 800a45e:	685b      	ldr	r3, [r3, #4]
- 800a460:	085a      	lsrs	r2, r3, #1
- 800a462:	4b21      	ldr	r3, [pc, #132]	; (800a4e8 <UART_SetConfig+0x550>)
- 800a464:	4413      	add	r3, r2
- 800a466:	687a      	ldr	r2, [r7, #4]
- 800a468:	6852      	ldr	r2, [r2, #4]
- 800a46a:	fbb3 f3f2 	udiv	r3, r3, r2
- 800a46e:	b29b      	uxth	r3, r3
- 800a470:	61bb      	str	r3, [r7, #24]
-        break;
- 800a472:	e01d      	b.n	800a4b0 <UART_SetConfig+0x518>
-      case UART_CLOCKSOURCE_SYSCLK:
-        pclk = HAL_RCC_GetSysClockFreq();
- 800a474:	f7fd fa3a 	bl	80078ec <HAL_RCC_GetSysClockFreq>
- 800a478:	60f8      	str	r0, [r7, #12]
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
- 800a47a:	687b      	ldr	r3, [r7, #4]
- 800a47c:	685b      	ldr	r3, [r3, #4]
- 800a47e:	085a      	lsrs	r2, r3, #1
- 800a480:	68fb      	ldr	r3, [r7, #12]
- 800a482:	441a      	add	r2, r3
- 800a484:	687b      	ldr	r3, [r7, #4]
- 800a486:	685b      	ldr	r3, [r3, #4]
- 800a488:	fbb2 f3f3 	udiv	r3, r2, r3
- 800a48c:	b29b      	uxth	r3, r3
- 800a48e:	61bb      	str	r3, [r7, #24]
-        break;
- 800a490:	e00e      	b.n	800a4b0 <UART_SetConfig+0x518>
-      case UART_CLOCKSOURCE_LSE:
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
- 800a492:	687b      	ldr	r3, [r7, #4]
- 800a494:	685b      	ldr	r3, [r3, #4]
- 800a496:	085b      	lsrs	r3, r3, #1
- 800a498:	f503 4200 	add.w	r2, r3, #32768	; 0x8000
- 800a49c:	687b      	ldr	r3, [r7, #4]
- 800a49e:	685b      	ldr	r3, [r3, #4]
- 800a4a0:	fbb2 f3f3 	udiv	r3, r2, r3
- 800a4a4:	b29b      	uxth	r3, r3
- 800a4a6:	61bb      	str	r3, [r7, #24]
-        break;
- 800a4a8:	e002      	b.n	800a4b0 <UART_SetConfig+0x518>
-      default:
-        ret = HAL_ERROR;
- 800a4aa:	2301      	movs	r3, #1
- 800a4ac:	75fb      	strb	r3, [r7, #23]
-        break;
- 800a4ae:	bf00      	nop
-    }
-
-    /* USARTDIV must be greater than or equal to 0d16 */
-    if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 800a4b0:	69bb      	ldr	r3, [r7, #24]
- 800a4b2:	2b0f      	cmp	r3, #15
- 800a4b4:	d908      	bls.n	800a4c8 <UART_SetConfig+0x530>
- 800a4b6:	69bb      	ldr	r3, [r7, #24]
- 800a4b8:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
- 800a4bc:	d204      	bcs.n	800a4c8 <UART_SetConfig+0x530>
-    {
-      huart->Instance->BRR = usartdiv;
- 800a4be:	687b      	ldr	r3, [r7, #4]
- 800a4c0:	681b      	ldr	r3, [r3, #0]
- 800a4c2:	69ba      	ldr	r2, [r7, #24]
- 800a4c4:	60da      	str	r2, [r3, #12]
- 800a4c6:	e001      	b.n	800a4cc <UART_SetConfig+0x534>
-    }
-    else
-    {
-      ret = HAL_ERROR;
- 800a4c8:	2301      	movs	r3, #1
- 800a4ca:	75fb      	strb	r3, [r7, #23]
-    }
-  }
-
-
-  /* Clear ISR function pointers */
-  huart->RxISR = NULL;
- 800a4cc:	687b      	ldr	r3, [r7, #4]
- 800a4ce:	2200      	movs	r2, #0
- 800a4d0:	661a      	str	r2, [r3, #96]	; 0x60
-  huart->TxISR = NULL;
- 800a4d2:	687b      	ldr	r3, [r7, #4]
- 800a4d4:	2200      	movs	r2, #0
- 800a4d6:	665a      	str	r2, [r3, #100]	; 0x64
-
-  return ret;
- 800a4d8:	7dfb      	ldrb	r3, [r7, #23]
-}
- 800a4da:	4618      	mov	r0, r3
- 800a4dc:	3720      	adds	r7, #32
- 800a4de:	46bd      	mov	sp, r7
- 800a4e0:	bd80      	pop	{r7, pc}
- 800a4e2:	bf00      	nop
- 800a4e4:	01e84800 	.word	0x01e84800
- 800a4e8:	00f42400 	.word	0x00f42400
-
-0800a4ec <UART_AdvFeatureConfig>:
-  * @brief Configure the UART peripheral advanced features.
-  * @param huart UART handle.
-  * @retval None
-  */
-void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
-{
- 800a4ec:	b480      	push	{r7}
- 800a4ee:	b083      	sub	sp, #12
- 800a4f0:	af00      	add	r7, sp, #0
- 800a4f2:	6078      	str	r0, [r7, #4]
-  /* Check whether the set of advanced features to configure is properly set */
-  assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
-
-  /* if required, configure TX pin active level inversion */
-  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
- 800a4f4:	687b      	ldr	r3, [r7, #4]
- 800a4f6:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800a4f8:	f003 0301 	and.w	r3, r3, #1
- 800a4fc:	2b00      	cmp	r3, #0
- 800a4fe:	d00a      	beq.n	800a516 <UART_AdvFeatureConfig+0x2a>
-  {
-    assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
- 800a500:	687b      	ldr	r3, [r7, #4]
- 800a502:	681b      	ldr	r3, [r3, #0]
- 800a504:	685b      	ldr	r3, [r3, #4]
- 800a506:	f423 3100 	bic.w	r1, r3, #131072	; 0x20000
- 800a50a:	687b      	ldr	r3, [r7, #4]
- 800a50c:	6a9a      	ldr	r2, [r3, #40]	; 0x28
- 800a50e:	687b      	ldr	r3, [r7, #4]
- 800a510:	681b      	ldr	r3, [r3, #0]
- 800a512:	430a      	orrs	r2, r1
- 800a514:	605a      	str	r2, [r3, #4]
-  }
-
-  /* if required, configure RX pin active level inversion */
-  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
- 800a516:	687b      	ldr	r3, [r7, #4]
- 800a518:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800a51a:	f003 0302 	and.w	r3, r3, #2
- 800a51e:	2b00      	cmp	r3, #0
- 800a520:	d00a      	beq.n	800a538 <UART_AdvFeatureConfig+0x4c>
-  {
-    assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
- 800a522:	687b      	ldr	r3, [r7, #4]
- 800a524:	681b      	ldr	r3, [r3, #0]
- 800a526:	685b      	ldr	r3, [r3, #4]
- 800a528:	f423 3180 	bic.w	r1, r3, #65536	; 0x10000
- 800a52c:	687b      	ldr	r3, [r7, #4]
- 800a52e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 800a530:	687b      	ldr	r3, [r7, #4]
- 800a532:	681b      	ldr	r3, [r3, #0]
- 800a534:	430a      	orrs	r2, r1
- 800a536:	605a      	str	r2, [r3, #4]
-  }
-
-  /* if required, configure data inversion */
-  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
- 800a538:	687b      	ldr	r3, [r7, #4]
- 800a53a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800a53c:	f003 0304 	and.w	r3, r3, #4
- 800a540:	2b00      	cmp	r3, #0
- 800a542:	d00a      	beq.n	800a55a <UART_AdvFeatureConfig+0x6e>
-  {
-    assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
- 800a544:	687b      	ldr	r3, [r7, #4]
- 800a546:	681b      	ldr	r3, [r3, #0]
- 800a548:	685b      	ldr	r3, [r3, #4]
- 800a54a:	f423 2180 	bic.w	r1, r3, #262144	; 0x40000
- 800a54e:	687b      	ldr	r3, [r7, #4]
- 800a550:	6b1a      	ldr	r2, [r3, #48]	; 0x30
- 800a552:	687b      	ldr	r3, [r7, #4]
- 800a554:	681b      	ldr	r3, [r3, #0]
- 800a556:	430a      	orrs	r2, r1
- 800a558:	605a      	str	r2, [r3, #4]
-  }
-
-  /* if required, configure RX/TX pins swap */
-  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
- 800a55a:	687b      	ldr	r3, [r7, #4]
- 800a55c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800a55e:	f003 0308 	and.w	r3, r3, #8
- 800a562:	2b00      	cmp	r3, #0
- 800a564:	d00a      	beq.n	800a57c <UART_AdvFeatureConfig+0x90>
-  {
-    assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
- 800a566:	687b      	ldr	r3, [r7, #4]
- 800a568:	681b      	ldr	r3, [r3, #0]
- 800a56a:	685b      	ldr	r3, [r3, #4]
- 800a56c:	f423 4100 	bic.w	r1, r3, #32768	; 0x8000
- 800a570:	687b      	ldr	r3, [r7, #4]
- 800a572:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 800a574:	687b      	ldr	r3, [r7, #4]
- 800a576:	681b      	ldr	r3, [r3, #0]
- 800a578:	430a      	orrs	r2, r1
- 800a57a:	605a      	str	r2, [r3, #4]
-  }
-
-  /* if required, configure RX overrun detection disabling */
-  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
- 800a57c:	687b      	ldr	r3, [r7, #4]
- 800a57e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800a580:	f003 0310 	and.w	r3, r3, #16
- 800a584:	2b00      	cmp	r3, #0
- 800a586:	d00a      	beq.n	800a59e <UART_AdvFeatureConfig+0xb2>
-  {
-    assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
-    MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
- 800a588:	687b      	ldr	r3, [r7, #4]
- 800a58a:	681b      	ldr	r3, [r3, #0]
- 800a58c:	689b      	ldr	r3, [r3, #8]
- 800a58e:	f423 5180 	bic.w	r1, r3, #4096	; 0x1000
- 800a592:	687b      	ldr	r3, [r7, #4]
- 800a594:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 800a596:	687b      	ldr	r3, [r7, #4]
- 800a598:	681b      	ldr	r3, [r3, #0]
- 800a59a:	430a      	orrs	r2, r1
- 800a59c:	609a      	str	r2, [r3, #8]
-  }
-
-  /* if required, configure DMA disabling on reception error */
-  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
- 800a59e:	687b      	ldr	r3, [r7, #4]
- 800a5a0:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800a5a2:	f003 0320 	and.w	r3, r3, #32
- 800a5a6:	2b00      	cmp	r3, #0
- 800a5a8:	d00a      	beq.n	800a5c0 <UART_AdvFeatureConfig+0xd4>
-  {
-    assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
-    MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
- 800a5aa:	687b      	ldr	r3, [r7, #4]
- 800a5ac:	681b      	ldr	r3, [r3, #0]
- 800a5ae:	689b      	ldr	r3, [r3, #8]
- 800a5b0:	f423 5100 	bic.w	r1, r3, #8192	; 0x2000
- 800a5b4:	687b      	ldr	r3, [r7, #4]
- 800a5b6:	6bda      	ldr	r2, [r3, #60]	; 0x3c
- 800a5b8:	687b      	ldr	r3, [r7, #4]
- 800a5ba:	681b      	ldr	r3, [r3, #0]
- 800a5bc:	430a      	orrs	r2, r1
- 800a5be:	609a      	str	r2, [r3, #8]
-  }
-
-  /* if required, configure auto Baud rate detection scheme */
-  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
- 800a5c0:	687b      	ldr	r3, [r7, #4]
- 800a5c2:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800a5c4:	f003 0340 	and.w	r3, r3, #64	; 0x40
- 800a5c8:	2b00      	cmp	r3, #0
- 800a5ca:	d01a      	beq.n	800a602 <UART_AdvFeatureConfig+0x116>
-  {
-    assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
-    assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
- 800a5cc:	687b      	ldr	r3, [r7, #4]
- 800a5ce:	681b      	ldr	r3, [r3, #0]
- 800a5d0:	685b      	ldr	r3, [r3, #4]
- 800a5d2:	f423 1180 	bic.w	r1, r3, #1048576	; 0x100000
- 800a5d6:	687b      	ldr	r3, [r7, #4]
- 800a5d8:	6c1a      	ldr	r2, [r3, #64]	; 0x40
- 800a5da:	687b      	ldr	r3, [r7, #4]
- 800a5dc:	681b      	ldr	r3, [r3, #0]
- 800a5de:	430a      	orrs	r2, r1
- 800a5e0:	605a      	str	r2, [r3, #4]
-    /* set auto Baudrate detection parameters if detection is enabled */
-    if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
- 800a5e2:	687b      	ldr	r3, [r7, #4]
- 800a5e4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 800a5e6:	f5b3 1f80 	cmp.w	r3, #1048576	; 0x100000
- 800a5ea:	d10a      	bne.n	800a602 <UART_AdvFeatureConfig+0x116>
-    {
-      assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
-      MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
- 800a5ec:	687b      	ldr	r3, [r7, #4]
- 800a5ee:	681b      	ldr	r3, [r3, #0]
- 800a5f0:	685b      	ldr	r3, [r3, #4]
- 800a5f2:	f423 01c0 	bic.w	r1, r3, #6291456	; 0x600000
- 800a5f6:	687b      	ldr	r3, [r7, #4]
- 800a5f8:	6c5a      	ldr	r2, [r3, #68]	; 0x44
- 800a5fa:	687b      	ldr	r3, [r7, #4]
- 800a5fc:	681b      	ldr	r3, [r3, #0]
- 800a5fe:	430a      	orrs	r2, r1
- 800a600:	605a      	str	r2, [r3, #4]
-    }
-  }
-
-  /* if required, configure MSB first on communication line */
-  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
- 800a602:	687b      	ldr	r3, [r7, #4]
- 800a604:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800a606:	f003 0380 	and.w	r3, r3, #128	; 0x80
- 800a60a:	2b00      	cmp	r3, #0
- 800a60c:	d00a      	beq.n	800a624 <UART_AdvFeatureConfig+0x138>
-  {
-    assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
- 800a60e:	687b      	ldr	r3, [r7, #4]
- 800a610:	681b      	ldr	r3, [r3, #0]
- 800a612:	685b      	ldr	r3, [r3, #4]
- 800a614:	f423 2100 	bic.w	r1, r3, #524288	; 0x80000
- 800a618:	687b      	ldr	r3, [r7, #4]
- 800a61a:	6c9a      	ldr	r2, [r3, #72]	; 0x48
- 800a61c:	687b      	ldr	r3, [r7, #4]
- 800a61e:	681b      	ldr	r3, [r3, #0]
- 800a620:	430a      	orrs	r2, r1
- 800a622:	605a      	str	r2, [r3, #4]
-  }
-}
- 800a624:	bf00      	nop
- 800a626:	370c      	adds	r7, #12
- 800a628:	46bd      	mov	sp, r7
- 800a62a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800a62e:	4770      	bx	lr
-
-0800a630 <UART_CheckIdleState>:
-  * @brief Check the UART Idle State.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
-{
- 800a630:	b580      	push	{r7, lr}
- 800a632:	b086      	sub	sp, #24
- 800a634:	af02      	add	r7, sp, #8
- 800a636:	6078      	str	r0, [r7, #4]
-  uint32_t tickstart;
-
-  /* Initialize the UART ErrorCode */
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
- 800a638:	687b      	ldr	r3, [r7, #4]
- 800a63a:	2200      	movs	r2, #0
- 800a63c:	67da      	str	r2, [r3, #124]	; 0x7c
-
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
- 800a63e:	f7f9 ff57 	bl	80044f0 <HAL_GetTick>
- 800a642:	60f8      	str	r0, [r7, #12]
-
-  /* Check if the Transmitter is enabled */
-  if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
- 800a644:	687b      	ldr	r3, [r7, #4]
- 800a646:	681b      	ldr	r3, [r3, #0]
- 800a648:	681b      	ldr	r3, [r3, #0]
- 800a64a:	f003 0308 	and.w	r3, r3, #8
- 800a64e:	2b08      	cmp	r3, #8
- 800a650:	d10e      	bne.n	800a670 <UART_CheckIdleState+0x40>
-  {
-    /* Wait until TEACK flag is set */
-    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
- 800a652:	f06f 437e 	mvn.w	r3, #4261412864	; 0xfe000000
- 800a656:	9300      	str	r3, [sp, #0]
- 800a658:	68fb      	ldr	r3, [r7, #12]
- 800a65a:	2200      	movs	r2, #0
- 800a65c:	f44f 1100 	mov.w	r1, #2097152	; 0x200000
- 800a660:	6878      	ldr	r0, [r7, #4]
- 800a662:	f000 f814 	bl	800a68e <UART_WaitOnFlagUntilTimeout>
- 800a666:	4603      	mov	r3, r0
- 800a668:	2b00      	cmp	r3, #0
- 800a66a:	d001      	beq.n	800a670 <UART_CheckIdleState+0x40>
-    {
-      /* Timeout occurred */
-      return HAL_TIMEOUT;
- 800a66c:	2303      	movs	r3, #3
- 800a66e:	e00a      	b.n	800a686 <UART_CheckIdleState+0x56>
-    }
-  }
-#endif
-
-  /* Initialize the UART State */
-  huart->gState = HAL_UART_STATE_READY;
- 800a670:	687b      	ldr	r3, [r7, #4]
- 800a672:	2220      	movs	r2, #32
- 800a674:	675a      	str	r2, [r3, #116]	; 0x74
-  huart->RxState = HAL_UART_STATE_READY;
- 800a676:	687b      	ldr	r3, [r7, #4]
- 800a678:	2220      	movs	r2, #32
- 800a67a:	679a      	str	r2, [r3, #120]	; 0x78
-
-  __HAL_UNLOCK(huart);
- 800a67c:	687b      	ldr	r3, [r7, #4]
- 800a67e:	2200      	movs	r2, #0
- 800a680:	f883 2070 	strb.w	r2, [r3, #112]	; 0x70
-
-  return HAL_OK;
- 800a684:	2300      	movs	r3, #0
-}
- 800a686:	4618      	mov	r0, r3
- 800a688:	3710      	adds	r7, #16
- 800a68a:	46bd      	mov	sp, r7
- 800a68c:	bd80      	pop	{r7, pc}
-
-0800a68e <UART_WaitOnFlagUntilTimeout>:
-  * @param Timeout   Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
-                                              uint32_t Tickstart, uint32_t Timeout)
-{
- 800a68e:	b580      	push	{r7, lr}
- 800a690:	b084      	sub	sp, #16
- 800a692:	af00      	add	r7, sp, #0
- 800a694:	60f8      	str	r0, [r7, #12]
- 800a696:	60b9      	str	r1, [r7, #8]
- 800a698:	603b      	str	r3, [r7, #0]
- 800a69a:	4613      	mov	r3, r2
- 800a69c:	71fb      	strb	r3, [r7, #7]
-  /* Wait until flag is set */
-  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 800a69e:	e05d      	b.n	800a75c <UART_WaitOnFlagUntilTimeout+0xce>
-  {
-    /* Check for the Timeout */
-    if (Timeout != HAL_MAX_DELAY)
- 800a6a0:	69bb      	ldr	r3, [r7, #24]
- 800a6a2:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
- 800a6a6:	d059      	beq.n	800a75c <UART_WaitOnFlagUntilTimeout+0xce>
-    {
-      if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 800a6a8:	f7f9 ff22 	bl	80044f0 <HAL_GetTick>
- 800a6ac:	4602      	mov	r2, r0
- 800a6ae:	683b      	ldr	r3, [r7, #0]
- 800a6b0:	1ad3      	subs	r3, r2, r3
- 800a6b2:	69ba      	ldr	r2, [r7, #24]
- 800a6b4:	429a      	cmp	r2, r3
- 800a6b6:	d302      	bcc.n	800a6be <UART_WaitOnFlagUntilTimeout+0x30>
- 800a6b8:	69bb      	ldr	r3, [r7, #24]
- 800a6ba:	2b00      	cmp	r3, #0
- 800a6bc:	d11b      	bne.n	800a6f6 <UART_WaitOnFlagUntilTimeout+0x68>
-      {
-        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
- 800a6be:	68fb      	ldr	r3, [r7, #12]
- 800a6c0:	681b      	ldr	r3, [r3, #0]
- 800a6c2:	681a      	ldr	r2, [r3, #0]
- 800a6c4:	68fb      	ldr	r3, [r7, #12]
- 800a6c6:	681b      	ldr	r3, [r3, #0]
- 800a6c8:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
- 800a6cc:	601a      	str	r2, [r3, #0]
-        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 800a6ce:	68fb      	ldr	r3, [r7, #12]
- 800a6d0:	681b      	ldr	r3, [r3, #0]
- 800a6d2:	689a      	ldr	r2, [r3, #8]
- 800a6d4:	68fb      	ldr	r3, [r7, #12]
- 800a6d6:	681b      	ldr	r3, [r3, #0]
- 800a6d8:	f022 0201 	bic.w	r2, r2, #1
- 800a6dc:	609a      	str	r2, [r3, #8]
-
-        huart->gState = HAL_UART_STATE_READY;
- 800a6de:	68fb      	ldr	r3, [r7, #12]
- 800a6e0:	2220      	movs	r2, #32
- 800a6e2:	675a      	str	r2, [r3, #116]	; 0x74
-        huart->RxState = HAL_UART_STATE_READY;
- 800a6e4:	68fb      	ldr	r3, [r7, #12]
- 800a6e6:	2220      	movs	r2, #32
- 800a6e8:	679a      	str	r2, [r3, #120]	; 0x78
-
-        __HAL_UNLOCK(huart);
- 800a6ea:	68fb      	ldr	r3, [r7, #12]
- 800a6ec:	2200      	movs	r2, #0
- 800a6ee:	f883 2070 	strb.w	r2, [r3, #112]	; 0x70
-
-        return HAL_TIMEOUT;
- 800a6f2:	2303      	movs	r3, #3
- 800a6f4:	e042      	b.n	800a77c <UART_WaitOnFlagUntilTimeout+0xee>
-      }
-
-      if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
- 800a6f6:	68fb      	ldr	r3, [r7, #12]
- 800a6f8:	681b      	ldr	r3, [r3, #0]
- 800a6fa:	681b      	ldr	r3, [r3, #0]
- 800a6fc:	f003 0304 	and.w	r3, r3, #4
- 800a700:	2b00      	cmp	r3, #0
- 800a702:	d02b      	beq.n	800a75c <UART_WaitOnFlagUntilTimeout+0xce>
-      {
-        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
- 800a704:	68fb      	ldr	r3, [r7, #12]
- 800a706:	681b      	ldr	r3, [r3, #0]
- 800a708:	69db      	ldr	r3, [r3, #28]
- 800a70a:	f403 6300 	and.w	r3, r3, #2048	; 0x800
- 800a70e:	f5b3 6f00 	cmp.w	r3, #2048	; 0x800
- 800a712:	d123      	bne.n	800a75c <UART_WaitOnFlagUntilTimeout+0xce>
-        {
-          /* Clear Receiver Timeout flag*/
-          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
- 800a714:	68fb      	ldr	r3, [r7, #12]
- 800a716:	681b      	ldr	r3, [r3, #0]
- 800a718:	f44f 6200 	mov.w	r2, #2048	; 0x800
- 800a71c:	621a      	str	r2, [r3, #32]
-          
-          /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-          CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
- 800a71e:	68fb      	ldr	r3, [r7, #12]
- 800a720:	681b      	ldr	r3, [r3, #0]
- 800a722:	681a      	ldr	r2, [r3, #0]
- 800a724:	68fb      	ldr	r3, [r7, #12]
- 800a726:	681b      	ldr	r3, [r3, #0]
- 800a728:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
- 800a72c:	601a      	str	r2, [r3, #0]
-          CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 800a72e:	68fb      	ldr	r3, [r7, #12]
- 800a730:	681b      	ldr	r3, [r3, #0]
- 800a732:	689a      	ldr	r2, [r3, #8]
- 800a734:	68fb      	ldr	r3, [r7, #12]
- 800a736:	681b      	ldr	r3, [r3, #0]
- 800a738:	f022 0201 	bic.w	r2, r2, #1
- 800a73c:	609a      	str	r2, [r3, #8]
-
-          huart->gState = HAL_UART_STATE_READY;
- 800a73e:	68fb      	ldr	r3, [r7, #12]
- 800a740:	2220      	movs	r2, #32
- 800a742:	675a      	str	r2, [r3, #116]	; 0x74
-          huart->RxState = HAL_UART_STATE_READY;
- 800a744:	68fb      	ldr	r3, [r7, #12]
- 800a746:	2220      	movs	r2, #32
- 800a748:	679a      	str	r2, [r3, #120]	; 0x78
-          huart->ErrorCode = HAL_UART_ERROR_RTO;
- 800a74a:	68fb      	ldr	r3, [r7, #12]
- 800a74c:	2220      	movs	r2, #32
- 800a74e:	67da      	str	r2, [r3, #124]	; 0x7c
-          
-          /* Process Unlocked */
-          __HAL_UNLOCK(huart);
- 800a750:	68fb      	ldr	r3, [r7, #12]
- 800a752:	2200      	movs	r2, #0
- 800a754:	f883 2070 	strb.w	r2, [r3, #112]	; 0x70
-          
-          return HAL_TIMEOUT;
- 800a758:	2303      	movs	r3, #3
- 800a75a:	e00f      	b.n	800a77c <UART_WaitOnFlagUntilTimeout+0xee>
-  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 800a75c:	68fb      	ldr	r3, [r7, #12]
- 800a75e:	681b      	ldr	r3, [r3, #0]
- 800a760:	69da      	ldr	r2, [r3, #28]
- 800a762:	68bb      	ldr	r3, [r7, #8]
- 800a764:	4013      	ands	r3, r2
- 800a766:	68ba      	ldr	r2, [r7, #8]
- 800a768:	429a      	cmp	r2, r3
- 800a76a:	bf0c      	ite	eq
- 800a76c:	2301      	moveq	r3, #1
- 800a76e:	2300      	movne	r3, #0
- 800a770:	b2db      	uxtb	r3, r3
- 800a772:	461a      	mov	r2, r3
- 800a774:	79fb      	ldrb	r3, [r7, #7]
- 800a776:	429a      	cmp	r2, r3
- 800a778:	d092      	beq.n	800a6a0 <UART_WaitOnFlagUntilTimeout+0x12>
-        }
-      }
-    }
-  }
-  return HAL_OK;
- 800a77a:	2300      	movs	r3, #0
-}
- 800a77c:	4618      	mov	r0, r3
- 800a77e:	3710      	adds	r7, #16
- 800a780:	46bd      	mov	sp, r7
- 800a782:	bd80      	pop	{r7, pc}
-
-0800a784 <FMC_SDRAM_Init>:
-  * @param  Device Pointer to SDRAM device instance
-  * @param  Init Pointer to SDRAM Initialization structure   
-  * @retval HAL status
-  */
-HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDef *Init)
-{
- 800a784:	b480      	push	{r7}
- 800a786:	b085      	sub	sp, #20
- 800a788:	af00      	add	r7, sp, #0
- 800a78a:	6078      	str	r0, [r7, #4]
- 800a78c:	6039      	str	r1, [r7, #0]
-  uint32_t tmpr1 = 0;
- 800a78e:	2300      	movs	r3, #0
- 800a790:	60fb      	str	r3, [r7, #12]
-  uint32_t tmpr2 = 0;
- 800a792:	2300      	movs	r3, #0
- 800a794:	60bb      	str	r3, [r7, #8]
-  assert_param(IS_FMC_SDCLOCK_PERIOD(Init->SDClockPeriod));
-  assert_param(IS_FMC_READ_BURST(Init->ReadBurst));
-  assert_param(IS_FMC_READPIPE_DELAY(Init->ReadPipeDelay));   
-
-  /* Set SDRAM bank configuration parameters */
-  if (Init->SDBank != FMC_SDRAM_BANK2) 
- 800a796:	683b      	ldr	r3, [r7, #0]
- 800a798:	681b      	ldr	r3, [r3, #0]
- 800a79a:	2b01      	cmp	r3, #1
- 800a79c:	d027      	beq.n	800a7ee <FMC_SDRAM_Init+0x6a>
-  {
-    tmpr1 = Device->SDCR[FMC_SDRAM_BANK1];
- 800a79e:	687b      	ldr	r3, [r7, #4]
- 800a7a0:	681b      	ldr	r3, [r3, #0]
- 800a7a2:	60fb      	str	r3, [r7, #12]
-    
-    /* Clear NC, NR, MWID, NB, CAS, WP, SDCLK, RBURST, and RPIPE bits */
-    tmpr1 &= ((uint32_t)~(FMC_SDCR1_NC  | FMC_SDCR1_NR | FMC_SDCR1_MWID | \
- 800a7a4:	68fa      	ldr	r2, [r7, #12]
- 800a7a6:	4b2f      	ldr	r3, [pc, #188]	; (800a864 <FMC_SDRAM_Init+0xe0>)
- 800a7a8:	4013      	ands	r3, r2
- 800a7aa:	60fb      	str	r3, [r7, #12]
-                          FMC_SDCR1_NB  | FMC_SDCR1_CAS | FMC_SDCR1_WP   | \
-                          FMC_SDCR1_SDCLK | FMC_SDCR1_RBURST | FMC_SDCR1_RPIPE));
-
-    tmpr1 |= (uint32_t)(Init->ColumnBitsNumber   |\
- 800a7ac:	683b      	ldr	r3, [r7, #0]
- 800a7ae:	685a      	ldr	r2, [r3, #4]
-                        Init->RowBitsNumber      |\
- 800a7b0:	683b      	ldr	r3, [r7, #0]
- 800a7b2:	689b      	ldr	r3, [r3, #8]
-    tmpr1 |= (uint32_t)(Init->ColumnBitsNumber   |\
- 800a7b4:	431a      	orrs	r2, r3
-                        Init->MemoryDataWidth    |\
- 800a7b6:	683b      	ldr	r3, [r7, #0]
- 800a7b8:	68db      	ldr	r3, [r3, #12]
-                        Init->RowBitsNumber      |\
- 800a7ba:	431a      	orrs	r2, r3
-                        Init->InternalBankNumber |\
- 800a7bc:	683b      	ldr	r3, [r7, #0]
- 800a7be:	691b      	ldr	r3, [r3, #16]
-                        Init->MemoryDataWidth    |\
- 800a7c0:	431a      	orrs	r2, r3
-                        Init->CASLatency         |\
- 800a7c2:	683b      	ldr	r3, [r7, #0]
- 800a7c4:	695b      	ldr	r3, [r3, #20]
-                        Init->InternalBankNumber |\
- 800a7c6:	431a      	orrs	r2, r3
-                        Init->WriteProtection    |\
- 800a7c8:	683b      	ldr	r3, [r7, #0]
- 800a7ca:	699b      	ldr	r3, [r3, #24]
-                        Init->CASLatency         |\
- 800a7cc:	431a      	orrs	r2, r3
-                        Init->SDClockPeriod      |\
- 800a7ce:	683b      	ldr	r3, [r7, #0]
- 800a7d0:	69db      	ldr	r3, [r3, #28]
-                        Init->WriteProtection    |\
- 800a7d2:	431a      	orrs	r2, r3
-                        Init->ReadBurst          |\
- 800a7d4:	683b      	ldr	r3, [r7, #0]
- 800a7d6:	6a1b      	ldr	r3, [r3, #32]
-                        Init->SDClockPeriod      |\
- 800a7d8:	431a      	orrs	r2, r3
-                        Init->ReadPipeDelay
- 800a7da:	683b      	ldr	r3, [r7, #0]
- 800a7dc:	6a5b      	ldr	r3, [r3, #36]	; 0x24
-                        Init->ReadBurst          |\
- 800a7de:	4313      	orrs	r3, r2
-    tmpr1 |= (uint32_t)(Init->ColumnBitsNumber   |\
- 800a7e0:	68fa      	ldr	r2, [r7, #12]
- 800a7e2:	4313      	orrs	r3, r2
- 800a7e4:	60fb      	str	r3, [r7, #12]
-                        );                                      
-    Device->SDCR[FMC_SDRAM_BANK1] = tmpr1;
- 800a7e6:	687b      	ldr	r3, [r7, #4]
- 800a7e8:	68fa      	ldr	r2, [r7, #12]
- 800a7ea:	601a      	str	r2, [r3, #0]
- 800a7ec:	e032      	b.n	800a854 <FMC_SDRAM_Init+0xd0>
-  }
-  else /* FMC_Bank2_SDRAM */                      
-  {
-    tmpr1 = Device->SDCR[FMC_SDRAM_BANK1];
- 800a7ee:	687b      	ldr	r3, [r7, #4]
- 800a7f0:	681b      	ldr	r3, [r3, #0]
- 800a7f2:	60fb      	str	r3, [r7, #12]
-    
-    /* Clear SDCLK, RBURST, and RPIPE bits */
-    tmpr1 &= ((uint32_t)~(FMC_SDCR1_SDCLK | FMC_SDCR1_RBURST | FMC_SDCR1_RPIPE));
- 800a7f4:	68fb      	ldr	r3, [r7, #12]
- 800a7f6:	f423 43f8 	bic.w	r3, r3, #31744	; 0x7c00
- 800a7fa:	60fb      	str	r3, [r7, #12]
-    
-    tmpr1 |= (uint32_t)(Init->SDClockPeriod      |\
- 800a7fc:	683b      	ldr	r3, [r7, #0]
- 800a7fe:	69da      	ldr	r2, [r3, #28]
-                        Init->ReadBurst          |\
- 800a800:	683b      	ldr	r3, [r7, #0]
- 800a802:	6a1b      	ldr	r3, [r3, #32]
-    tmpr1 |= (uint32_t)(Init->SDClockPeriod      |\
- 800a804:	431a      	orrs	r2, r3
-                        Init->ReadPipeDelay);
- 800a806:	683b      	ldr	r3, [r7, #0]
- 800a808:	6a5b      	ldr	r3, [r3, #36]	; 0x24
-                        Init->ReadBurst          |\
- 800a80a:	4313      	orrs	r3, r2
-    tmpr1 |= (uint32_t)(Init->SDClockPeriod      |\
- 800a80c:	68fa      	ldr	r2, [r7, #12]
- 800a80e:	4313      	orrs	r3, r2
- 800a810:	60fb      	str	r3, [r7, #12]
-    
-    tmpr2 = Device->SDCR[FMC_SDRAM_BANK2];
- 800a812:	687b      	ldr	r3, [r7, #4]
- 800a814:	685b      	ldr	r3, [r3, #4]
- 800a816:	60bb      	str	r3, [r7, #8]
-    
-    /* Clear NC, NR, MWID, NB, CAS, WP, SDCLK, RBURST, and RPIPE bits */
-    tmpr2 &= ((uint32_t)~(FMC_SDCR1_NC  | FMC_SDCR1_NR | FMC_SDCR1_MWID | \
- 800a818:	68ba      	ldr	r2, [r7, #8]
- 800a81a:	4b12      	ldr	r3, [pc, #72]	; (800a864 <FMC_SDRAM_Init+0xe0>)
- 800a81c:	4013      	ands	r3, r2
- 800a81e:	60bb      	str	r3, [r7, #8]
-                          FMC_SDCR1_NB  | FMC_SDCR1_CAS | FMC_SDCR1_WP   | \
-                          FMC_SDCR1_SDCLK | FMC_SDCR1_RBURST | FMC_SDCR1_RPIPE));
-
-    tmpr2 |= (uint32_t)(Init->ColumnBitsNumber   |\
- 800a820:	683b      	ldr	r3, [r7, #0]
- 800a822:	685a      	ldr	r2, [r3, #4]
-                       Init->RowBitsNumber       |\
- 800a824:	683b      	ldr	r3, [r7, #0]
- 800a826:	689b      	ldr	r3, [r3, #8]
-    tmpr2 |= (uint32_t)(Init->ColumnBitsNumber   |\
- 800a828:	431a      	orrs	r2, r3
-                       Init->MemoryDataWidth     |\
- 800a82a:	683b      	ldr	r3, [r7, #0]
- 800a82c:	68db      	ldr	r3, [r3, #12]
-                       Init->RowBitsNumber       |\
- 800a82e:	431a      	orrs	r2, r3
-                       Init->InternalBankNumber  |\
- 800a830:	683b      	ldr	r3, [r7, #0]
- 800a832:	691b      	ldr	r3, [r3, #16]
-                       Init->MemoryDataWidth     |\
- 800a834:	431a      	orrs	r2, r3
-                       Init->CASLatency          |\
- 800a836:	683b      	ldr	r3, [r7, #0]
- 800a838:	695b      	ldr	r3, [r3, #20]
-                       Init->InternalBankNumber  |\
- 800a83a:	431a      	orrs	r2, r3
-                       Init->WriteProtection);
- 800a83c:	683b      	ldr	r3, [r7, #0]
- 800a83e:	699b      	ldr	r3, [r3, #24]
-                       Init->CASLatency          |\
- 800a840:	4313      	orrs	r3, r2
-    tmpr2 |= (uint32_t)(Init->ColumnBitsNumber   |\
- 800a842:	68ba      	ldr	r2, [r7, #8]
- 800a844:	4313      	orrs	r3, r2
- 800a846:	60bb      	str	r3, [r7, #8]
-
-    Device->SDCR[FMC_SDRAM_BANK1] = tmpr1;
- 800a848:	687b      	ldr	r3, [r7, #4]
- 800a84a:	68fa      	ldr	r2, [r7, #12]
- 800a84c:	601a      	str	r2, [r3, #0]
-    Device->SDCR[FMC_SDRAM_BANK2] = tmpr2;
- 800a84e:	687b      	ldr	r3, [r7, #4]
- 800a850:	68ba      	ldr	r2, [r7, #8]
- 800a852:	605a      	str	r2, [r3, #4]
-  }
-  
-  return HAL_OK;
- 800a854:	2300      	movs	r3, #0
-}
- 800a856:	4618      	mov	r0, r3
- 800a858:	3714      	adds	r7, #20
- 800a85a:	46bd      	mov	sp, r7
- 800a85c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800a860:	4770      	bx	lr
- 800a862:	bf00      	nop
- 800a864:	ffff8000 	.word	0xffff8000
-
-0800a868 <FMC_SDRAM_Timing_Init>:
-  * @param  Timing Pointer to SDRAM Timing structure
-  * @param  Bank SDRAM bank number   
-  * @retval HAL status
-  */
-HAL_StatusTypeDef FMC_SDRAM_Timing_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank)
-{
- 800a868:	b480      	push	{r7}
- 800a86a:	b087      	sub	sp, #28
- 800a86c:	af00      	add	r7, sp, #0
- 800a86e:	60f8      	str	r0, [r7, #12]
- 800a870:	60b9      	str	r1, [r7, #8]
- 800a872:	607a      	str	r2, [r7, #4]
-  uint32_t tmpr1 = 0;
- 800a874:	2300      	movs	r3, #0
- 800a876:	617b      	str	r3, [r7, #20]
-  uint32_t tmpr2 = 0;
- 800a878:	2300      	movs	r3, #0
- 800a87a:	613b      	str	r3, [r7, #16]
-  assert_param(IS_FMC_RP_DELAY(Timing->RPDelay));
-  assert_param(IS_FMC_RCD_DELAY(Timing->RCDDelay));
-  assert_param(IS_FMC_SDRAM_BANK(Bank));
-  
-  /* Set SDRAM device timing parameters */ 
-  if (Bank != FMC_SDRAM_BANK2) 
- 800a87c:	687b      	ldr	r3, [r7, #4]
- 800a87e:	2b01      	cmp	r3, #1
- 800a880:	d02e      	beq.n	800a8e0 <FMC_SDRAM_Timing_Init+0x78>
-  {
-    tmpr1 = Device->SDTR[FMC_SDRAM_BANK1];
- 800a882:	68fb      	ldr	r3, [r7, #12]
- 800a884:	689b      	ldr	r3, [r3, #8]
- 800a886:	617b      	str	r3, [r7, #20]
-    
-    /* Clear TMRD, TXSR, TRAS, TRC, TWR, TRP and TRCD bits */
-    tmpr1 &= ((uint32_t)~(FMC_SDTR1_TMRD  | FMC_SDTR1_TXSR | FMC_SDTR1_TRAS | \
- 800a888:	697b      	ldr	r3, [r7, #20]
- 800a88a:	f003 4370 	and.w	r3, r3, #4026531840	; 0xf0000000
- 800a88e:	617b      	str	r3, [r7, #20]
-                          FMC_SDTR1_TRC  | FMC_SDTR1_TWR | FMC_SDTR1_TRP | \
-                          FMC_SDTR1_TRCD));
-    
-    tmpr1 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
- 800a890:	68bb      	ldr	r3, [r7, #8]
- 800a892:	681b      	ldr	r3, [r3, #0]
- 800a894:	1e5a      	subs	r2, r3, #1
-                       (((Timing->ExitSelfRefreshDelay)-1) << 4) |\
- 800a896:	68bb      	ldr	r3, [r7, #8]
- 800a898:	685b      	ldr	r3, [r3, #4]
- 800a89a:	3b01      	subs	r3, #1
- 800a89c:	011b      	lsls	r3, r3, #4
-    tmpr1 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
- 800a89e:	431a      	orrs	r2, r3
-                       (((Timing->SelfRefreshTime)-1) << 8)      |\
- 800a8a0:	68bb      	ldr	r3, [r7, #8]
- 800a8a2:	689b      	ldr	r3, [r3, #8]
- 800a8a4:	3b01      	subs	r3, #1
- 800a8a6:	021b      	lsls	r3, r3, #8
-                       (((Timing->ExitSelfRefreshDelay)-1) << 4) |\
- 800a8a8:	431a      	orrs	r2, r3
-                       (((Timing->RowCycleDelay)-1) << 12)       |\
- 800a8aa:	68bb      	ldr	r3, [r7, #8]
- 800a8ac:	68db      	ldr	r3, [r3, #12]
- 800a8ae:	3b01      	subs	r3, #1
- 800a8b0:	031b      	lsls	r3, r3, #12
-                       (((Timing->SelfRefreshTime)-1) << 8)      |\
- 800a8b2:	431a      	orrs	r2, r3
-                       (((Timing->WriteRecoveryTime)-1) <<16)    |\
- 800a8b4:	68bb      	ldr	r3, [r7, #8]
- 800a8b6:	691b      	ldr	r3, [r3, #16]
- 800a8b8:	3b01      	subs	r3, #1
- 800a8ba:	041b      	lsls	r3, r3, #16
-                       (((Timing->RowCycleDelay)-1) << 12)       |\
- 800a8bc:	431a      	orrs	r2, r3
-                       (((Timing->RPDelay)-1) << 20)             |\
- 800a8be:	68bb      	ldr	r3, [r7, #8]
- 800a8c0:	695b      	ldr	r3, [r3, #20]
- 800a8c2:	3b01      	subs	r3, #1
- 800a8c4:	051b      	lsls	r3, r3, #20
-                       (((Timing->WriteRecoveryTime)-1) <<16)    |\
- 800a8c6:	431a      	orrs	r2, r3
-                       (((Timing->RCDDelay)-1) << 24));
- 800a8c8:	68bb      	ldr	r3, [r7, #8]
- 800a8ca:	699b      	ldr	r3, [r3, #24]
- 800a8cc:	3b01      	subs	r3, #1
- 800a8ce:	061b      	lsls	r3, r3, #24
-    tmpr1 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
- 800a8d0:	4313      	orrs	r3, r2
- 800a8d2:	697a      	ldr	r2, [r7, #20]
- 800a8d4:	4313      	orrs	r3, r2
- 800a8d6:	617b      	str	r3, [r7, #20]
-    Device->SDTR[FMC_SDRAM_BANK1] = tmpr1;
- 800a8d8:	68fb      	ldr	r3, [r7, #12]
- 800a8da:	697a      	ldr	r2, [r7, #20]
- 800a8dc:	609a      	str	r2, [r3, #8]
- 800a8de:	e039      	b.n	800a954 <FMC_SDRAM_Timing_Init+0xec>
-  }
-  else /* FMC_Bank2_SDRAM */
-  {
-    tmpr1 = Device->SDTR[FMC_SDRAM_BANK1];
- 800a8e0:	68fb      	ldr	r3, [r7, #12]
- 800a8e2:	689b      	ldr	r3, [r3, #8]
- 800a8e4:	617b      	str	r3, [r7, #20]
-    
-    /* Clear TRC and TRP bits */
-    tmpr1 &= ((uint32_t)~(FMC_SDTR1_TRC | FMC_SDTR1_TRP));
- 800a8e6:	697a      	ldr	r2, [r7, #20]
- 800a8e8:	4b1e      	ldr	r3, [pc, #120]	; (800a964 <FMC_SDRAM_Timing_Init+0xfc>)
- 800a8ea:	4013      	ands	r3, r2
- 800a8ec:	617b      	str	r3, [r7, #20]
-    
-    tmpr1 |= (uint32_t)((((Timing->RowCycleDelay)-1) << 12)       |\
- 800a8ee:	68bb      	ldr	r3, [r7, #8]
- 800a8f0:	68db      	ldr	r3, [r3, #12]
- 800a8f2:	3b01      	subs	r3, #1
- 800a8f4:	031a      	lsls	r2, r3, #12
-                        (((Timing->RPDelay)-1) << 20)); 
- 800a8f6:	68bb      	ldr	r3, [r7, #8]
- 800a8f8:	695b      	ldr	r3, [r3, #20]
- 800a8fa:	3b01      	subs	r3, #1
- 800a8fc:	051b      	lsls	r3, r3, #20
-    tmpr1 |= (uint32_t)((((Timing->RowCycleDelay)-1) << 12)       |\
- 800a8fe:	4313      	orrs	r3, r2
- 800a900:	697a      	ldr	r2, [r7, #20]
- 800a902:	4313      	orrs	r3, r2
- 800a904:	617b      	str	r3, [r7, #20]
-    
-    tmpr2 = Device->SDTR[FMC_SDRAM_BANK2];
- 800a906:	68fb      	ldr	r3, [r7, #12]
- 800a908:	68db      	ldr	r3, [r3, #12]
- 800a90a:	613b      	str	r3, [r7, #16]
-    
-    /* Clear TMRD, TXSR, TRAS, TRC, TWR, TRP and TRCD bits */
-    tmpr2 &= ((uint32_t)~(FMC_SDTR1_TMRD  | FMC_SDTR1_TXSR | FMC_SDTR1_TRAS | \
- 800a90c:	693b      	ldr	r3, [r7, #16]
- 800a90e:	f003 4370 	and.w	r3, r3, #4026531840	; 0xf0000000
- 800a912:	613b      	str	r3, [r7, #16]
-                          FMC_SDTR1_TRC  | FMC_SDTR1_TWR | FMC_SDTR1_TRP | \
-                          FMC_SDTR1_TRCD));
-    
-    tmpr2 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
- 800a914:	68bb      	ldr	r3, [r7, #8]
- 800a916:	681b      	ldr	r3, [r3, #0]
- 800a918:	1e5a      	subs	r2, r3, #1
-                       (((Timing->ExitSelfRefreshDelay)-1) << 4)  |\
- 800a91a:	68bb      	ldr	r3, [r7, #8]
- 800a91c:	685b      	ldr	r3, [r3, #4]
- 800a91e:	3b01      	subs	r3, #1
- 800a920:	011b      	lsls	r3, r3, #4
-    tmpr2 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
- 800a922:	431a      	orrs	r2, r3
-                       (((Timing->SelfRefreshTime)-1) << 8)       |\
- 800a924:	68bb      	ldr	r3, [r7, #8]
- 800a926:	689b      	ldr	r3, [r3, #8]
- 800a928:	3b01      	subs	r3, #1
- 800a92a:	021b      	lsls	r3, r3, #8
-                       (((Timing->ExitSelfRefreshDelay)-1) << 4)  |\
- 800a92c:	431a      	orrs	r2, r3
-                       (((Timing->WriteRecoveryTime)-1) <<16)     |\
- 800a92e:	68bb      	ldr	r3, [r7, #8]
- 800a930:	691b      	ldr	r3, [r3, #16]
- 800a932:	3b01      	subs	r3, #1
- 800a934:	041b      	lsls	r3, r3, #16
-                       (((Timing->SelfRefreshTime)-1) << 8)       |\
- 800a936:	431a      	orrs	r2, r3
-                       (((Timing->RCDDelay)-1) << 24));   
- 800a938:	68bb      	ldr	r3, [r7, #8]
- 800a93a:	699b      	ldr	r3, [r3, #24]
- 800a93c:	3b01      	subs	r3, #1
- 800a93e:	061b      	lsls	r3, r3, #24
-    tmpr2 |= (uint32_t)(((Timing->LoadToActiveDelay)-1)           |\
- 800a940:	4313      	orrs	r3, r2
- 800a942:	693a      	ldr	r2, [r7, #16]
- 800a944:	4313      	orrs	r3, r2
- 800a946:	613b      	str	r3, [r7, #16]
-
-    Device->SDTR[FMC_SDRAM_BANK1] = tmpr1;
- 800a948:	68fb      	ldr	r3, [r7, #12]
- 800a94a:	697a      	ldr	r2, [r7, #20]
- 800a94c:	609a      	str	r2, [r3, #8]
-    Device->SDTR[FMC_SDRAM_BANK2] = tmpr2;
- 800a94e:	68fb      	ldr	r3, [r7, #12]
- 800a950:	693a      	ldr	r2, [r7, #16]
- 800a952:	60da      	str	r2, [r3, #12]
-  }
-  
-  return HAL_OK;
- 800a954:	2300      	movs	r3, #0
-}
- 800a956:	4618      	mov	r0, r3
- 800a958:	371c      	adds	r7, #28
- 800a95a:	46bd      	mov	sp, r7
- 800a95c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800a960:	4770      	bx	lr
- 800a962:	bf00      	nop
- 800a964:	ff0f0fff 	.word	0xff0f0fff
-
-0800a968 <FMC_SDRAM_SendCommand>:
-  * @param  Timing Pointer to SDRAM Timing structure
-  * @param  Timeout Timeout wait value
-  * @retval HAL state
-  */  
-HAL_StatusTypeDef FMC_SDRAM_SendCommand(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
-{
- 800a968:	b480      	push	{r7}
- 800a96a:	b087      	sub	sp, #28
- 800a96c:	af00      	add	r7, sp, #0
- 800a96e:	60f8      	str	r0, [r7, #12]
- 800a970:	60b9      	str	r1, [r7, #8]
- 800a972:	607a      	str	r2, [r7, #4]
-  __IO uint32_t tmpr = 0;
- 800a974:	2300      	movs	r3, #0
- 800a976:	617b      	str	r3, [r7, #20]
-  assert_param(IS_FMC_COMMAND_TARGET(Command->CommandTarget));
-  assert_param(IS_FMC_AUTOREFRESH_NUMBER(Command->AutoRefreshNumber));
-  assert_param(IS_FMC_MODE_REGISTER(Command->ModeRegisterDefinition));  
-
-  /* Set command register */
-  tmpr = (uint32_t)((Command->CommandMode)                  |\
- 800a978:	68bb      	ldr	r3, [r7, #8]
- 800a97a:	681a      	ldr	r2, [r3, #0]
-                    (Command->CommandTarget)                |\
- 800a97c:	68bb      	ldr	r3, [r7, #8]
- 800a97e:	685b      	ldr	r3, [r3, #4]
-  tmpr = (uint32_t)((Command->CommandMode)                  |\
- 800a980:	431a      	orrs	r2, r3
-                    (((Command->AutoRefreshNumber)-1) << 5) |\
- 800a982:	68bb      	ldr	r3, [r7, #8]
- 800a984:	689b      	ldr	r3, [r3, #8]
- 800a986:	3b01      	subs	r3, #1
- 800a988:	015b      	lsls	r3, r3, #5
-                    (Command->CommandTarget)                |\
- 800a98a:	431a      	orrs	r2, r3
-                    ((Command->ModeRegisterDefinition) << 9)
- 800a98c:	68bb      	ldr	r3, [r7, #8]
- 800a98e:	68db      	ldr	r3, [r3, #12]
- 800a990:	025b      	lsls	r3, r3, #9
-  tmpr = (uint32_t)((Command->CommandMode)                  |\
- 800a992:	4313      	orrs	r3, r2
- 800a994:	617b      	str	r3, [r7, #20]
-                    );
-    
-  Device->SDCMR = tmpr;
- 800a996:	697a      	ldr	r2, [r7, #20]
- 800a998:	68fb      	ldr	r3, [r7, #12]
- 800a99a:	611a      	str	r2, [r3, #16]
-  
-  return HAL_OK;  
- 800a99c:	2300      	movs	r3, #0
-}
- 800a99e:	4618      	mov	r0, r3
- 800a9a0:	371c      	adds	r7, #28
- 800a9a2:	46bd      	mov	sp, r7
- 800a9a4:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800a9a8:	4770      	bx	lr
-
-0800a9aa <FMC_SDRAM_ProgramRefreshRate>:
-  * @param  Device Pointer to SDRAM device instance  
-  * @param  RefreshRate The SDRAM refresh rate value.       
-  * @retval HAL state
-  */
-HAL_StatusTypeDef FMC_SDRAM_ProgramRefreshRate(FMC_SDRAM_TypeDef *Device, uint32_t RefreshRate)
-{
- 800a9aa:	b480      	push	{r7}
- 800a9ac:	b083      	sub	sp, #12
- 800a9ae:	af00      	add	r7, sp, #0
- 800a9b0:	6078      	str	r0, [r7, #4]
- 800a9b2:	6039      	str	r1, [r7, #0]
-  /* Check the parameters */
-  assert_param(IS_FMC_SDRAM_DEVICE(Device));
-  assert_param(IS_FMC_REFRESH_RATE(RefreshRate));
-  
-  /* Set the refresh rate in command register */
-  Device->SDRTR |= (RefreshRate<<1);
- 800a9b4:	687b      	ldr	r3, [r7, #4]
- 800a9b6:	695a      	ldr	r2, [r3, #20]
- 800a9b8:	683b      	ldr	r3, [r7, #0]
- 800a9ba:	005b      	lsls	r3, r3, #1
- 800a9bc:	431a      	orrs	r2, r3
- 800a9be:	687b      	ldr	r3, [r7, #4]
- 800a9c0:	615a      	str	r2, [r3, #20]
-  
-  return HAL_OK;   
- 800a9c2:	2300      	movs	r3, #0
-}
- 800a9c4:	4618      	mov	r0, r3
- 800a9c6:	370c      	adds	r7, #12
- 800a9c8:	46bd      	mov	sp, r7
- 800a9ca:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800a9ce:	4770      	bx	lr
-
-0800a9d0 <makeFreeRtosPriority>:
-
-extern void xPortSysTickHandler(void);
-
-/* Convert from CMSIS type osPriority to FreeRTOS priority number */
-static unsigned portBASE_TYPE makeFreeRtosPriority (osPriority priority)
-{
- 800a9d0:	b480      	push	{r7}
- 800a9d2:	b085      	sub	sp, #20
- 800a9d4:	af00      	add	r7, sp, #0
- 800a9d6:	4603      	mov	r3, r0
- 800a9d8:	80fb      	strh	r3, [r7, #6]
-  unsigned portBASE_TYPE fpriority = tskIDLE_PRIORITY;
- 800a9da:	2300      	movs	r3, #0
- 800a9dc:	60fb      	str	r3, [r7, #12]
-  
-  if (priority != osPriorityError) {
- 800a9de:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
- 800a9e2:	2b84      	cmp	r3, #132	; 0x84
- 800a9e4:	d005      	beq.n	800a9f2 <makeFreeRtosPriority+0x22>
-    fpriority += (priority - osPriorityIdle);
- 800a9e6:	f9b7 2006 	ldrsh.w	r2, [r7, #6]
- 800a9ea:	68fb      	ldr	r3, [r7, #12]
- 800a9ec:	4413      	add	r3, r2
- 800a9ee:	3303      	adds	r3, #3
- 800a9f0:	60fb      	str	r3, [r7, #12]
-  }
-  
-  return fpriority;
- 800a9f2:	68fb      	ldr	r3, [r7, #12]
-}
- 800a9f4:	4618      	mov	r0, r3
- 800a9f6:	3714      	adds	r7, #20
- 800a9f8:	46bd      	mov	sp, r7
- 800a9fa:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800a9fe:	4770      	bx	lr
-
-0800aa00 <osThreadCreate>:
-* @param  argument      pointer that is passed to the thread function as start argument.
-* @retval thread ID for reference by other functions or NULL in case of error.
-* @note   MUST REMAIN UNCHANGED: \b osThreadCreate shall be consistent in every CMSIS-RTOS.
-*/
-osThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument)
-{
- 800aa00:	b5f0      	push	{r4, r5, r6, r7, lr}
- 800aa02:	b089      	sub	sp, #36	; 0x24
- 800aa04:	af04      	add	r7, sp, #16
- 800aa06:	6078      	str	r0, [r7, #4]
- 800aa08:	6039      	str	r1, [r7, #0]
-  TaskHandle_t handle;
-  
-#if( configSUPPORT_STATIC_ALLOCATION == 1 ) &&  ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-  if((thread_def->buffer != NULL) && (thread_def->controlblock != NULL)) {
- 800aa0a:	687b      	ldr	r3, [r7, #4]
- 800aa0c:	695b      	ldr	r3, [r3, #20]
- 800aa0e:	2b00      	cmp	r3, #0
- 800aa10:	d020      	beq.n	800aa54 <osThreadCreate+0x54>
- 800aa12:	687b      	ldr	r3, [r7, #4]
- 800aa14:	699b      	ldr	r3, [r3, #24]
- 800aa16:	2b00      	cmp	r3, #0
- 800aa18:	d01c      	beq.n	800aa54 <osThreadCreate+0x54>
-    handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
- 800aa1a:	687b      	ldr	r3, [r7, #4]
- 800aa1c:	685c      	ldr	r4, [r3, #4]
- 800aa1e:	687b      	ldr	r3, [r7, #4]
- 800aa20:	681d      	ldr	r5, [r3, #0]
- 800aa22:	687b      	ldr	r3, [r7, #4]
- 800aa24:	691e      	ldr	r6, [r3, #16]
- 800aa26:	687b      	ldr	r3, [r7, #4]
- 800aa28:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
- 800aa2c:	4618      	mov	r0, r3
- 800aa2e:	f7ff ffcf 	bl	800a9d0 <makeFreeRtosPriority>
- 800aa32:	4601      	mov	r1, r0
-              thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority),
-              thread_def->buffer, thread_def->controlblock);
- 800aa34:	687b      	ldr	r3, [r7, #4]
- 800aa36:	695b      	ldr	r3, [r3, #20]
- 800aa38:	687a      	ldr	r2, [r7, #4]
- 800aa3a:	6992      	ldr	r2, [r2, #24]
-    handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
- 800aa3c:	9202      	str	r2, [sp, #8]
- 800aa3e:	9301      	str	r3, [sp, #4]
- 800aa40:	9100      	str	r1, [sp, #0]
- 800aa42:	683b      	ldr	r3, [r7, #0]
- 800aa44:	4632      	mov	r2, r6
- 800aa46:	4629      	mov	r1, r5
- 800aa48:	4620      	mov	r0, r4
- 800aa4a:	f000 f8ed 	bl	800ac28 <xTaskCreateStatic>
- 800aa4e:	4603      	mov	r3, r0
- 800aa50:	60fb      	str	r3, [r7, #12]
- 800aa52:	e01c      	b.n	800aa8e <osThreadCreate+0x8e>
-  }
-  else {
-    if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
- 800aa54:	687b      	ldr	r3, [r7, #4]
- 800aa56:	685c      	ldr	r4, [r3, #4]
- 800aa58:	687b      	ldr	r3, [r7, #4]
- 800aa5a:	681d      	ldr	r5, [r3, #0]
-              thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority),
- 800aa5c:	687b      	ldr	r3, [r7, #4]
- 800aa5e:	691b      	ldr	r3, [r3, #16]
-    if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
- 800aa60:	b29e      	uxth	r6, r3
- 800aa62:	687b      	ldr	r3, [r7, #4]
- 800aa64:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
- 800aa68:	4618      	mov	r0, r3
- 800aa6a:	f7ff ffb1 	bl	800a9d0 <makeFreeRtosPriority>
- 800aa6e:	4602      	mov	r2, r0
- 800aa70:	f107 030c 	add.w	r3, r7, #12
- 800aa74:	9301      	str	r3, [sp, #4]
- 800aa76:	9200      	str	r2, [sp, #0]
- 800aa78:	683b      	ldr	r3, [r7, #0]
- 800aa7a:	4632      	mov	r2, r6
- 800aa7c:	4629      	mov	r1, r5
- 800aa7e:	4620      	mov	r0, r4
- 800aa80:	f000 f932 	bl	800ace8 <xTaskCreate>
- 800aa84:	4603      	mov	r3, r0
- 800aa86:	2b01      	cmp	r3, #1
- 800aa88:	d001      	beq.n	800aa8e <osThreadCreate+0x8e>
-              &handle) != pdPASS)  {
-      return NULL;
- 800aa8a:	2300      	movs	r3, #0
- 800aa8c:	e000      	b.n	800aa90 <osThreadCreate+0x90>
-                   &handle) != pdPASS)  {
-    return NULL;
-  }     
-#endif
-  
-  return handle;
- 800aa8e:	68fb      	ldr	r3, [r7, #12]
-}
- 800aa90:	4618      	mov	r0, r3
- 800aa92:	3714      	adds	r7, #20
- 800aa94:	46bd      	mov	sp, r7
- 800aa96:	bdf0      	pop	{r4, r5, r6, r7, pc}
-
-0800aa98 <osDelay>:
-* @brief   Wait for Timeout (Time Delay)
-* @param   millisec      time delay value
-* @retval  status code that indicates the execution status of the function.
-*/
-osStatus osDelay (uint32_t millisec)
-{
- 800aa98:	b580      	push	{r7, lr}
- 800aa9a:	b084      	sub	sp, #16
- 800aa9c:	af00      	add	r7, sp, #0
- 800aa9e:	6078      	str	r0, [r7, #4]
-#if INCLUDE_vTaskDelay
-  TickType_t ticks = millisec / portTICK_PERIOD_MS;
- 800aaa0:	687b      	ldr	r3, [r7, #4]
- 800aaa2:	60fb      	str	r3, [r7, #12]
-  
-  vTaskDelay(ticks ? ticks : 1);          /* Minimum delay = 1 tick */
- 800aaa4:	68fb      	ldr	r3, [r7, #12]
- 800aaa6:	2b00      	cmp	r3, #0
- 800aaa8:	d001      	beq.n	800aaae <osDelay+0x16>
- 800aaaa:	68fb      	ldr	r3, [r7, #12]
- 800aaac:	e000      	b.n	800aab0 <osDelay+0x18>
- 800aaae:	2301      	movs	r3, #1
- 800aab0:	4618      	mov	r0, r3
- 800aab2:	f000 fa5b 	bl	800af6c <vTaskDelay>
-  
-  return osOK;
- 800aab6:	2300      	movs	r3, #0
-#else
-  (void) millisec;
-  
-  return osErrorResource;
-#endif
-}
- 800aab8:	4618      	mov	r0, r3
- 800aaba:	3710      	adds	r7, #16
- 800aabc:	46bd      	mov	sp, r7
- 800aabe:	bd80      	pop	{r7, pc}
-
-0800aac0 <vListInitialise>:
-/*-----------------------------------------------------------
- * PUBLIC LIST API documented in list.h
- *----------------------------------------------------------*/
-
-void vListInitialise( List_t * const pxList )
-{
- 800aac0:	b480      	push	{r7}
- 800aac2:	b083      	sub	sp, #12
- 800aac4:	af00      	add	r7, sp, #0
- 800aac6:	6078      	str	r0, [r7, #4]
-	/* The list structure contains a list item which is used to mark the
-	end of the list.  To initialise the list the list end is inserted
-	as the only list entry. */
-	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
- 800aac8:	687b      	ldr	r3, [r7, #4]
- 800aaca:	f103 0208 	add.w	r2, r3, #8
- 800aace:	687b      	ldr	r3, [r7, #4]
- 800aad0:	605a      	str	r2, [r3, #4]
-
-	/* The list end value is the highest possible value in the list to
-	ensure it remains at the end of the list. */
-	pxList->xListEnd.xItemValue = portMAX_DELAY;
- 800aad2:	687b      	ldr	r3, [r7, #4]
- 800aad4:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
- 800aad8:	609a      	str	r2, [r3, #8]
-
-	/* The list end next and previous pointers point to itself so we know
-	when the list is empty. */
-	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
- 800aada:	687b      	ldr	r3, [r7, #4]
- 800aadc:	f103 0208 	add.w	r2, r3, #8
- 800aae0:	687b      	ldr	r3, [r7, #4]
- 800aae2:	60da      	str	r2, [r3, #12]
-	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
- 800aae4:	687b      	ldr	r3, [r7, #4]
- 800aae6:	f103 0208 	add.w	r2, r3, #8
- 800aaea:	687b      	ldr	r3, [r7, #4]
- 800aaec:	611a      	str	r2, [r3, #16]
-
-	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
- 800aaee:	687b      	ldr	r3, [r7, #4]
- 800aaf0:	2200      	movs	r2, #0
- 800aaf2:	601a      	str	r2, [r3, #0]
-
-	/* Write known values into the list if
-	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
-	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
-}
- 800aaf4:	bf00      	nop
- 800aaf6:	370c      	adds	r7, #12
- 800aaf8:	46bd      	mov	sp, r7
- 800aafa:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800aafe:	4770      	bx	lr
-
-0800ab00 <vListInitialiseItem>:
-/*-----------------------------------------------------------*/
-
-void vListInitialiseItem( ListItem_t * const pxItem )
-{
- 800ab00:	b480      	push	{r7}
- 800ab02:	b083      	sub	sp, #12
- 800ab04:	af00      	add	r7, sp, #0
- 800ab06:	6078      	str	r0, [r7, #4]
-	/* Make sure the list item is not recorded as being on a list. */
-	pxItem->pxContainer = NULL;
- 800ab08:	687b      	ldr	r3, [r7, #4]
- 800ab0a:	2200      	movs	r2, #0
- 800ab0c:	611a      	str	r2, [r3, #16]
-
-	/* Write known values into the list item if
-	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
-	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
-}
- 800ab0e:	bf00      	nop
- 800ab10:	370c      	adds	r7, #12
- 800ab12:	46bd      	mov	sp, r7
- 800ab14:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800ab18:	4770      	bx	lr
-
-0800ab1a <vListInsertEnd>:
-/*-----------------------------------------------------------*/
-
-void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
-{
- 800ab1a:	b480      	push	{r7}
- 800ab1c:	b085      	sub	sp, #20
- 800ab1e:	af00      	add	r7, sp, #0
- 800ab20:	6078      	str	r0, [r7, #4]
- 800ab22:	6039      	str	r1, [r7, #0]
-ListItem_t * const pxIndex = pxList->pxIndex;
- 800ab24:	687b      	ldr	r3, [r7, #4]
- 800ab26:	685b      	ldr	r3, [r3, #4]
- 800ab28:	60fb      	str	r3, [r7, #12]
-	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
-
-	/* Insert a new list item into pxList, but rather than sort the list,
-	makes the new list item the last item to be removed by a call to
-	listGET_OWNER_OF_NEXT_ENTRY(). */
-	pxNewListItem->pxNext = pxIndex;
- 800ab2a:	683b      	ldr	r3, [r7, #0]
- 800ab2c:	68fa      	ldr	r2, [r7, #12]
- 800ab2e:	605a      	str	r2, [r3, #4]
-	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
- 800ab30:	68fb      	ldr	r3, [r7, #12]
- 800ab32:	689a      	ldr	r2, [r3, #8]
- 800ab34:	683b      	ldr	r3, [r7, #0]
- 800ab36:	609a      	str	r2, [r3, #8]
-
-	/* Only used during decision coverage testing. */
-	mtCOVERAGE_TEST_DELAY();
-
-	pxIndex->pxPrevious->pxNext = pxNewListItem;
- 800ab38:	68fb      	ldr	r3, [r7, #12]
- 800ab3a:	689b      	ldr	r3, [r3, #8]
- 800ab3c:	683a      	ldr	r2, [r7, #0]
- 800ab3e:	605a      	str	r2, [r3, #4]
-	pxIndex->pxPrevious = pxNewListItem;
- 800ab40:	68fb      	ldr	r3, [r7, #12]
- 800ab42:	683a      	ldr	r2, [r7, #0]
- 800ab44:	609a      	str	r2, [r3, #8]
-
-	/* Remember which list the item is in. */
-	pxNewListItem->pxContainer = pxList;
- 800ab46:	683b      	ldr	r3, [r7, #0]
- 800ab48:	687a      	ldr	r2, [r7, #4]
- 800ab4a:	611a      	str	r2, [r3, #16]
-
-	( pxList->uxNumberOfItems )++;
- 800ab4c:	687b      	ldr	r3, [r7, #4]
- 800ab4e:	681b      	ldr	r3, [r3, #0]
- 800ab50:	1c5a      	adds	r2, r3, #1
- 800ab52:	687b      	ldr	r3, [r7, #4]
- 800ab54:	601a      	str	r2, [r3, #0]
-}
- 800ab56:	bf00      	nop
- 800ab58:	3714      	adds	r7, #20
- 800ab5a:	46bd      	mov	sp, r7
- 800ab5c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800ab60:	4770      	bx	lr
-
-0800ab62 <vListInsert>:
-/*-----------------------------------------------------------*/
-
-void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
-{
- 800ab62:	b480      	push	{r7}
- 800ab64:	b085      	sub	sp, #20
- 800ab66:	af00      	add	r7, sp, #0
- 800ab68:	6078      	str	r0, [r7, #4]
- 800ab6a:	6039      	str	r1, [r7, #0]
-ListItem_t *pxIterator;
-const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
- 800ab6c:	683b      	ldr	r3, [r7, #0]
- 800ab6e:	681b      	ldr	r3, [r3, #0]
- 800ab70:	60bb      	str	r3, [r7, #8]
-	new list item should be placed after it.  This ensures that TCBs which are
-	stored in ready lists (all of which have the same xItemValue value) get a
-	share of the CPU.  However, if the xItemValue is the same as the back marker
-	the iteration loop below will not end.  Therefore the value is checked
-	first, and the algorithm slightly modified if necessary. */
-	if( xValueOfInsertion == portMAX_DELAY )
- 800ab72:	68bb      	ldr	r3, [r7, #8]
- 800ab74:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
- 800ab78:	d103      	bne.n	800ab82 <vListInsert+0x20>
-	{
-		pxIterator = pxList->xListEnd.pxPrevious;
- 800ab7a:	687b      	ldr	r3, [r7, #4]
- 800ab7c:	691b      	ldr	r3, [r3, #16]
- 800ab7e:	60fb      	str	r3, [r7, #12]
- 800ab80:	e00c      	b.n	800ab9c <vListInsert+0x3a>
-			4) Using a queue or semaphore before it has been initialised or
-			   before the scheduler has been started (are interrupts firing
-			   before vTaskStartScheduler() has been called?).
-		**********************************************************************/
-
-		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
- 800ab82:	687b      	ldr	r3, [r7, #4]
- 800ab84:	3308      	adds	r3, #8
- 800ab86:	60fb      	str	r3, [r7, #12]
- 800ab88:	e002      	b.n	800ab90 <vListInsert+0x2e>
- 800ab8a:	68fb      	ldr	r3, [r7, #12]
- 800ab8c:	685b      	ldr	r3, [r3, #4]
- 800ab8e:	60fb      	str	r3, [r7, #12]
- 800ab90:	68fb      	ldr	r3, [r7, #12]
- 800ab92:	685b      	ldr	r3, [r3, #4]
- 800ab94:	681b      	ldr	r3, [r3, #0]
- 800ab96:	68ba      	ldr	r2, [r7, #8]
- 800ab98:	429a      	cmp	r2, r3
- 800ab9a:	d2f6      	bcs.n	800ab8a <vListInsert+0x28>
-			/* There is nothing to do here, just iterating to the wanted
-			insertion position. */
-		}
-	}
-
-	pxNewListItem->pxNext = pxIterator->pxNext;
- 800ab9c:	68fb      	ldr	r3, [r7, #12]
- 800ab9e:	685a      	ldr	r2, [r3, #4]
- 800aba0:	683b      	ldr	r3, [r7, #0]
- 800aba2:	605a      	str	r2, [r3, #4]
-	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
- 800aba4:	683b      	ldr	r3, [r7, #0]
- 800aba6:	685b      	ldr	r3, [r3, #4]
- 800aba8:	683a      	ldr	r2, [r7, #0]
- 800abaa:	609a      	str	r2, [r3, #8]
-	pxNewListItem->pxPrevious = pxIterator;
- 800abac:	683b      	ldr	r3, [r7, #0]
- 800abae:	68fa      	ldr	r2, [r7, #12]
- 800abb0:	609a      	str	r2, [r3, #8]
-	pxIterator->pxNext = pxNewListItem;
- 800abb2:	68fb      	ldr	r3, [r7, #12]
- 800abb4:	683a      	ldr	r2, [r7, #0]
- 800abb6:	605a      	str	r2, [r3, #4]
-
-	/* Remember which list the item is in.  This allows fast removal of the
-	item later. */
-	pxNewListItem->pxContainer = pxList;
- 800abb8:	683b      	ldr	r3, [r7, #0]
- 800abba:	687a      	ldr	r2, [r7, #4]
- 800abbc:	611a      	str	r2, [r3, #16]
-
-	( pxList->uxNumberOfItems )++;
- 800abbe:	687b      	ldr	r3, [r7, #4]
- 800abc0:	681b      	ldr	r3, [r3, #0]
- 800abc2:	1c5a      	adds	r2, r3, #1
- 800abc4:	687b      	ldr	r3, [r7, #4]
- 800abc6:	601a      	str	r2, [r3, #0]
-}
- 800abc8:	bf00      	nop
- 800abca:	3714      	adds	r7, #20
- 800abcc:	46bd      	mov	sp, r7
- 800abce:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800abd2:	4770      	bx	lr
-
-0800abd4 <uxListRemove>:
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
-{
- 800abd4:	b480      	push	{r7}
- 800abd6:	b085      	sub	sp, #20
- 800abd8:	af00      	add	r7, sp, #0
- 800abda:	6078      	str	r0, [r7, #4]
-/* The list item knows which list it is in.  Obtain the list from the list
-item. */
-List_t * const pxList = pxItemToRemove->pxContainer;
- 800abdc:	687b      	ldr	r3, [r7, #4]
- 800abde:	691b      	ldr	r3, [r3, #16]
- 800abe0:	60fb      	str	r3, [r7, #12]
-
-	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
- 800abe2:	687b      	ldr	r3, [r7, #4]
- 800abe4:	685b      	ldr	r3, [r3, #4]
- 800abe6:	687a      	ldr	r2, [r7, #4]
- 800abe8:	6892      	ldr	r2, [r2, #8]
- 800abea:	609a      	str	r2, [r3, #8]
-	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
- 800abec:	687b      	ldr	r3, [r7, #4]
- 800abee:	689b      	ldr	r3, [r3, #8]
- 800abf0:	687a      	ldr	r2, [r7, #4]
- 800abf2:	6852      	ldr	r2, [r2, #4]
- 800abf4:	605a      	str	r2, [r3, #4]
-
-	/* Only used during decision coverage testing. */
-	mtCOVERAGE_TEST_DELAY();
-
-	/* Make sure the index is left pointing to a valid item. */
-	if( pxList->pxIndex == pxItemToRemove )
- 800abf6:	68fb      	ldr	r3, [r7, #12]
- 800abf8:	685b      	ldr	r3, [r3, #4]
- 800abfa:	687a      	ldr	r2, [r7, #4]
- 800abfc:	429a      	cmp	r2, r3
- 800abfe:	d103      	bne.n	800ac08 <uxListRemove+0x34>
-	{
-		pxList->pxIndex = pxItemToRemove->pxPrevious;
- 800ac00:	687b      	ldr	r3, [r7, #4]
- 800ac02:	689a      	ldr	r2, [r3, #8]
- 800ac04:	68fb      	ldr	r3, [r7, #12]
- 800ac06:	605a      	str	r2, [r3, #4]
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	pxItemToRemove->pxContainer = NULL;
- 800ac08:	687b      	ldr	r3, [r7, #4]
- 800ac0a:	2200      	movs	r2, #0
- 800ac0c:	611a      	str	r2, [r3, #16]
-	( pxList->uxNumberOfItems )--;
- 800ac0e:	68fb      	ldr	r3, [r7, #12]
- 800ac10:	681b      	ldr	r3, [r3, #0]
- 800ac12:	1e5a      	subs	r2, r3, #1
- 800ac14:	68fb      	ldr	r3, [r7, #12]
- 800ac16:	601a      	str	r2, [r3, #0]
-
-	return pxList->uxNumberOfItems;
- 800ac18:	68fb      	ldr	r3, [r7, #12]
- 800ac1a:	681b      	ldr	r3, [r3, #0]
-}
- 800ac1c:	4618      	mov	r0, r3
- 800ac1e:	3714      	adds	r7, #20
- 800ac20:	46bd      	mov	sp, r7
- 800ac22:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800ac26:	4770      	bx	lr
-
-0800ac28 <xTaskCreateStatic>:
-									const uint32_t ulStackDepth,
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									StackType_t * const puxStackBuffer,
-									StaticTask_t * const pxTaskBuffer )
-	{
- 800ac28:	b580      	push	{r7, lr}
- 800ac2a:	b08e      	sub	sp, #56	; 0x38
- 800ac2c:	af04      	add	r7, sp, #16
- 800ac2e:	60f8      	str	r0, [r7, #12]
- 800ac30:	60b9      	str	r1, [r7, #8]
- 800ac32:	607a      	str	r2, [r7, #4]
- 800ac34:	603b      	str	r3, [r7, #0]
-	TCB_t *pxNewTCB;
-	TaskHandle_t xReturn;
-
-		configASSERT( puxStackBuffer != NULL );
- 800ac36:	6b7b      	ldr	r3, [r7, #52]	; 0x34
- 800ac38:	2b00      	cmp	r3, #0
- 800ac3a:	d10b      	bne.n	800ac54 <xTaskCreateStatic+0x2c>
-
-portFORCE_INLINE static void vPortRaiseBASEPRI( void )
-{
-uint32_t ulNewBASEPRI;
-
-	__asm volatile
- 800ac3c:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800ac40:	b672      	cpsid	i
- 800ac42:	f383 8811 	msr	BASEPRI, r3
- 800ac46:	f3bf 8f6f 	isb	sy
- 800ac4a:	f3bf 8f4f 	dsb	sy
- 800ac4e:	b662      	cpsie	i
- 800ac50:	623b      	str	r3, [r7, #32]
- 800ac52:	e7fe      	b.n	800ac52 <xTaskCreateStatic+0x2a>
-		configASSERT( pxTaskBuffer != NULL );
- 800ac54:	6bbb      	ldr	r3, [r7, #56]	; 0x38
- 800ac56:	2b00      	cmp	r3, #0
- 800ac58:	d10b      	bne.n	800ac72 <xTaskCreateStatic+0x4a>
- 800ac5a:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800ac5e:	b672      	cpsid	i
- 800ac60:	f383 8811 	msr	BASEPRI, r3
- 800ac64:	f3bf 8f6f 	isb	sy
- 800ac68:	f3bf 8f4f 	dsb	sy
- 800ac6c:	b662      	cpsie	i
- 800ac6e:	61fb      	str	r3, [r7, #28]
- 800ac70:	e7fe      	b.n	800ac70 <xTaskCreateStatic+0x48>
-		#if( configASSERT_DEFINED == 1 )
-		{
-			/* Sanity check that the size of the structure used to declare a
-			variable of type StaticTask_t equals the size of the real task
-			structure. */
-			volatile size_t xSize = sizeof( StaticTask_t );
- 800ac72:	2358      	movs	r3, #88	; 0x58
- 800ac74:	613b      	str	r3, [r7, #16]
-			configASSERT( xSize == sizeof( TCB_t ) );
- 800ac76:	693b      	ldr	r3, [r7, #16]
- 800ac78:	2b58      	cmp	r3, #88	; 0x58
- 800ac7a:	d00b      	beq.n	800ac94 <xTaskCreateStatic+0x6c>
- 800ac7c:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800ac80:	b672      	cpsid	i
- 800ac82:	f383 8811 	msr	BASEPRI, r3
- 800ac86:	f3bf 8f6f 	isb	sy
- 800ac8a:	f3bf 8f4f 	dsb	sy
- 800ac8e:	b662      	cpsie	i
- 800ac90:	61bb      	str	r3, [r7, #24]
- 800ac92:	e7fe      	b.n	800ac92 <xTaskCreateStatic+0x6a>
-			( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
- 800ac94:	693b      	ldr	r3, [r7, #16]
-		}
-		#endif /* configASSERT_DEFINED */
-
-
-		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
- 800ac96:	6bbb      	ldr	r3, [r7, #56]	; 0x38
- 800ac98:	2b00      	cmp	r3, #0
- 800ac9a:	d01e      	beq.n	800acda <xTaskCreateStatic+0xb2>
- 800ac9c:	6b7b      	ldr	r3, [r7, #52]	; 0x34
- 800ac9e:	2b00      	cmp	r3, #0
- 800aca0:	d01b      	beq.n	800acda <xTaskCreateStatic+0xb2>
-		{
-			/* The memory used for the task's TCB and stack are passed into this
-			function - use them. */
-			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
- 800aca2:	6bbb      	ldr	r3, [r7, #56]	; 0x38
- 800aca4:	627b      	str	r3, [r7, #36]	; 0x24
-			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
- 800aca6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800aca8:	6b7a      	ldr	r2, [r7, #52]	; 0x34
- 800acaa:	631a      	str	r2, [r3, #48]	; 0x30
-
-			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
-			{
-				/* Tasks can be created statically or dynamically, so note this
-				task was created statically in case the task is later deleted. */
-				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
- 800acac:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800acae:	2202      	movs	r2, #2
- 800acb0:	f883 2055 	strb.w	r2, [r3, #85]	; 0x55
-			}
-			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
-
-			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
- 800acb4:	2300      	movs	r3, #0
- 800acb6:	9303      	str	r3, [sp, #12]
- 800acb8:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800acba:	9302      	str	r3, [sp, #8]
- 800acbc:	f107 0314 	add.w	r3, r7, #20
- 800acc0:	9301      	str	r3, [sp, #4]
- 800acc2:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800acc4:	9300      	str	r3, [sp, #0]
- 800acc6:	683b      	ldr	r3, [r7, #0]
- 800acc8:	687a      	ldr	r2, [r7, #4]
- 800acca:	68b9      	ldr	r1, [r7, #8]
- 800accc:	68f8      	ldr	r0, [r7, #12]
- 800acce:	f000 f850 	bl	800ad72 <prvInitialiseNewTask>
-			prvAddNewTaskToReadyList( pxNewTCB );
- 800acd2:	6a78      	ldr	r0, [r7, #36]	; 0x24
- 800acd4:	f000 f8e0 	bl	800ae98 <prvAddNewTaskToReadyList>
- 800acd8:	e001      	b.n	800acde <xTaskCreateStatic+0xb6>
-		}
-		else
-		{
-			xReturn = NULL;
- 800acda:	2300      	movs	r3, #0
- 800acdc:	617b      	str	r3, [r7, #20]
-		}
-
-		return xReturn;
- 800acde:	697b      	ldr	r3, [r7, #20]
-	}
- 800ace0:	4618      	mov	r0, r3
- 800ace2:	3728      	adds	r7, #40	; 0x28
- 800ace4:	46bd      	mov	sp, r7
- 800ace6:	bd80      	pop	{r7, pc}
-
-0800ace8 <xTaskCreate>:
-							const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-							const configSTACK_DEPTH_TYPE usStackDepth,
-							void * const pvParameters,
-							UBaseType_t uxPriority,
-							TaskHandle_t * const pxCreatedTask )
-	{
- 800ace8:	b580      	push	{r7, lr}
- 800acea:	b08c      	sub	sp, #48	; 0x30
- 800acec:	af04      	add	r7, sp, #16
- 800acee:	60f8      	str	r0, [r7, #12]
- 800acf0:	60b9      	str	r1, [r7, #8]
- 800acf2:	603b      	str	r3, [r7, #0]
- 800acf4:	4613      	mov	r3, r2
- 800acf6:	80fb      	strh	r3, [r7, #6]
-		#else /* portSTACK_GROWTH */
-		{
-		StackType_t *pxStack;
-
-			/* Allocate space for the stack used by the task being created. */
-			pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
- 800acf8:	88fb      	ldrh	r3, [r7, #6]
- 800acfa:	009b      	lsls	r3, r3, #2
- 800acfc:	4618      	mov	r0, r3
- 800acfe:	f000 fd45 	bl	800b78c <pvPortMalloc>
- 800ad02:	6178      	str	r0, [r7, #20]
-
-			if( pxStack != NULL )
- 800ad04:	697b      	ldr	r3, [r7, #20]
- 800ad06:	2b00      	cmp	r3, #0
- 800ad08:	d00e      	beq.n	800ad28 <xTaskCreate+0x40>
-			{
-				/* Allocate space for the TCB. */
-				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
- 800ad0a:	2058      	movs	r0, #88	; 0x58
- 800ad0c:	f000 fd3e 	bl	800b78c <pvPortMalloc>
- 800ad10:	61f8      	str	r0, [r7, #28]
-
-				if( pxNewTCB != NULL )
- 800ad12:	69fb      	ldr	r3, [r7, #28]
- 800ad14:	2b00      	cmp	r3, #0
- 800ad16:	d003      	beq.n	800ad20 <xTaskCreate+0x38>
-				{
-					/* Store the stack location in the TCB. */
-					pxNewTCB->pxStack = pxStack;
- 800ad18:	69fb      	ldr	r3, [r7, #28]
- 800ad1a:	697a      	ldr	r2, [r7, #20]
- 800ad1c:	631a      	str	r2, [r3, #48]	; 0x30
- 800ad1e:	e005      	b.n	800ad2c <xTaskCreate+0x44>
-				}
-				else
-				{
-					/* The stack cannot be used as the TCB was not created.  Free
-					it again. */
-					vPortFree( pxStack );
- 800ad20:	6978      	ldr	r0, [r7, #20]
- 800ad22:	f000 fdff 	bl	800b924 <vPortFree>
- 800ad26:	e001      	b.n	800ad2c <xTaskCreate+0x44>
-				}
-			}
-			else
-			{
-				pxNewTCB = NULL;
- 800ad28:	2300      	movs	r3, #0
- 800ad2a:	61fb      	str	r3, [r7, #28]
-			}
-		}
-		#endif /* portSTACK_GROWTH */
-
-		if( pxNewTCB != NULL )
- 800ad2c:	69fb      	ldr	r3, [r7, #28]
- 800ad2e:	2b00      	cmp	r3, #0
- 800ad30:	d017      	beq.n	800ad62 <xTaskCreate+0x7a>
-		{
-			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
-			{
-				/* Tasks can be created statically or dynamically, so note this
-				task was created dynamically in case it is later deleted. */
-				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
- 800ad32:	69fb      	ldr	r3, [r7, #28]
- 800ad34:	2200      	movs	r2, #0
- 800ad36:	f883 2055 	strb.w	r2, [r3, #85]	; 0x55
-			}
-			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
-
-			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
- 800ad3a:	88fa      	ldrh	r2, [r7, #6]
- 800ad3c:	2300      	movs	r3, #0
- 800ad3e:	9303      	str	r3, [sp, #12]
- 800ad40:	69fb      	ldr	r3, [r7, #28]
- 800ad42:	9302      	str	r3, [sp, #8]
- 800ad44:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 800ad46:	9301      	str	r3, [sp, #4]
- 800ad48:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 800ad4a:	9300      	str	r3, [sp, #0]
- 800ad4c:	683b      	ldr	r3, [r7, #0]
- 800ad4e:	68b9      	ldr	r1, [r7, #8]
- 800ad50:	68f8      	ldr	r0, [r7, #12]
- 800ad52:	f000 f80e 	bl	800ad72 <prvInitialiseNewTask>
-			prvAddNewTaskToReadyList( pxNewTCB );
- 800ad56:	69f8      	ldr	r0, [r7, #28]
- 800ad58:	f000 f89e 	bl	800ae98 <prvAddNewTaskToReadyList>
-			xReturn = pdPASS;
- 800ad5c:	2301      	movs	r3, #1
- 800ad5e:	61bb      	str	r3, [r7, #24]
- 800ad60:	e002      	b.n	800ad68 <xTaskCreate+0x80>
-		}
-		else
-		{
-			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
- 800ad62:	f04f 33ff 	mov.w	r3, #4294967295	; 0xffffffff
- 800ad66:	61bb      	str	r3, [r7, #24]
-		}
-
-		return xReturn;
- 800ad68:	69bb      	ldr	r3, [r7, #24]
-	}
- 800ad6a:	4618      	mov	r0, r3
- 800ad6c:	3720      	adds	r7, #32
- 800ad6e:	46bd      	mov	sp, r7
- 800ad70:	bd80      	pop	{r7, pc}
-
-0800ad72 <prvInitialiseNewTask>:
-									void * const pvParameters,
-									UBaseType_t uxPriority,
-									TaskHandle_t * const pxCreatedTask,
-									TCB_t *pxNewTCB,
-									const MemoryRegion_t * const xRegions )
-{
- 800ad72:	b580      	push	{r7, lr}
- 800ad74:	b088      	sub	sp, #32
- 800ad76:	af00      	add	r7, sp, #0
- 800ad78:	60f8      	str	r0, [r7, #12]
- 800ad7a:	60b9      	str	r1, [r7, #8]
- 800ad7c:	607a      	str	r2, [r7, #4]
- 800ad7e:	603b      	str	r3, [r7, #0]
-
-	/* Avoid dependency on memset() if it is not required. */
-	#if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
-	{
-		/* Fill the stack with a known value to assist debugging. */
-		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
- 800ad80:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ad82:	6b18      	ldr	r0, [r3, #48]	; 0x30
- 800ad84:	687b      	ldr	r3, [r7, #4]
- 800ad86:	009b      	lsls	r3, r3, #2
- 800ad88:	461a      	mov	r2, r3
- 800ad8a:	21a5      	movs	r1, #165	; 0xa5
- 800ad8c:	f000 ff17 	bl	800bbbe <memset>
-	grows from high memory to low (as per the 80x86) or vice versa.
-	portSTACK_GROWTH is used to make the result positive or negative as required
-	by the port. */
-	#if( portSTACK_GROWTH < 0 )
-	{
-		pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
- 800ad90:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ad92:	6b1a      	ldr	r2, [r3, #48]	; 0x30
- 800ad94:	6879      	ldr	r1, [r7, #4]
- 800ad96:	f06f 4340 	mvn.w	r3, #3221225472	; 0xc0000000
- 800ad9a:	440b      	add	r3, r1
- 800ad9c:	009b      	lsls	r3, r3, #2
- 800ad9e:	4413      	add	r3, r2
- 800ada0:	61bb      	str	r3, [r7, #24]
-		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
- 800ada2:	69bb      	ldr	r3, [r7, #24]
- 800ada4:	f023 0307 	bic.w	r3, r3, #7
- 800ada8:	61bb      	str	r3, [r7, #24]
-
-		/* Check the alignment of the calculated top of stack is correct. */
-		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
- 800adaa:	69bb      	ldr	r3, [r7, #24]
- 800adac:	f003 0307 	and.w	r3, r3, #7
- 800adb0:	2b00      	cmp	r3, #0
- 800adb2:	d00b      	beq.n	800adcc <prvInitialiseNewTask+0x5a>
- 800adb4:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800adb8:	b672      	cpsid	i
- 800adba:	f383 8811 	msr	BASEPRI, r3
- 800adbe:	f3bf 8f6f 	isb	sy
- 800adc2:	f3bf 8f4f 	dsb	sy
- 800adc6:	b662      	cpsie	i
- 800adc8:	617b      	str	r3, [r7, #20]
- 800adca:	e7fe      	b.n	800adca <prvInitialiseNewTask+0x58>
-		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
-	}
-	#endif /* portSTACK_GROWTH */
-
-	/* Store the task name in the TCB. */
-	if( pcName != NULL )
- 800adcc:	68bb      	ldr	r3, [r7, #8]
- 800adce:	2b00      	cmp	r3, #0
- 800add0:	d01f      	beq.n	800ae12 <prvInitialiseNewTask+0xa0>
-	{
-		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
- 800add2:	2300      	movs	r3, #0
- 800add4:	61fb      	str	r3, [r7, #28]
- 800add6:	e012      	b.n	800adfe <prvInitialiseNewTask+0x8c>
-		{
-			pxNewTCB->pcTaskName[ x ] = pcName[ x ];
- 800add8:	68ba      	ldr	r2, [r7, #8]
- 800adda:	69fb      	ldr	r3, [r7, #28]
- 800addc:	4413      	add	r3, r2
- 800adde:	7819      	ldrb	r1, [r3, #0]
- 800ade0:	6b3a      	ldr	r2, [r7, #48]	; 0x30
- 800ade2:	69fb      	ldr	r3, [r7, #28]
- 800ade4:	4413      	add	r3, r2
- 800ade6:	3334      	adds	r3, #52	; 0x34
- 800ade8:	460a      	mov	r2, r1
- 800adea:	701a      	strb	r2, [r3, #0]
-
-			/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
-			configMAX_TASK_NAME_LEN characters just in case the memory after the
-			string is not accessible (extremely unlikely). */
-			if( pcName[ x ] == ( char ) 0x00 )
- 800adec:	68ba      	ldr	r2, [r7, #8]
- 800adee:	69fb      	ldr	r3, [r7, #28]
- 800adf0:	4413      	add	r3, r2
- 800adf2:	781b      	ldrb	r3, [r3, #0]
- 800adf4:	2b00      	cmp	r3, #0
- 800adf6:	d006      	beq.n	800ae06 <prvInitialiseNewTask+0x94>
-		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
- 800adf8:	69fb      	ldr	r3, [r7, #28]
- 800adfa:	3301      	adds	r3, #1
- 800adfc:	61fb      	str	r3, [r7, #28]
- 800adfe:	69fb      	ldr	r3, [r7, #28]
- 800ae00:	2b0f      	cmp	r3, #15
- 800ae02:	d9e9      	bls.n	800add8 <prvInitialiseNewTask+0x66>
- 800ae04:	e000      	b.n	800ae08 <prvInitialiseNewTask+0x96>
-			{
-				break;
- 800ae06:	bf00      	nop
-			}
-		}
-
-		/* Ensure the name string is terminated in the case that the string length
-		was greater or equal to configMAX_TASK_NAME_LEN. */
-		pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
- 800ae08:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae0a:	2200      	movs	r2, #0
- 800ae0c:	f883 2043 	strb.w	r2, [r3, #67]	; 0x43
- 800ae10:	e003      	b.n	800ae1a <prvInitialiseNewTask+0xa8>
-	}
-	else
-	{
-		/* The task has not been given a name, so just ensure there is a NULL
-		terminator when it is read out. */
-		pxNewTCB->pcTaskName[ 0 ] = 0x00;
- 800ae12:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae14:	2200      	movs	r2, #0
- 800ae16:	f883 2034 	strb.w	r2, [r3, #52]	; 0x34
-	}
-
-	/* This is used as an array index so must ensure it's not too large.  First
-	remove the privilege bit if one is present. */
-	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
- 800ae1a:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 800ae1c:	2b06      	cmp	r3, #6
- 800ae1e:	d901      	bls.n	800ae24 <prvInitialiseNewTask+0xb2>
-	{
-		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
- 800ae20:	2306      	movs	r3, #6
- 800ae22:	62bb      	str	r3, [r7, #40]	; 0x28
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	pxNewTCB->uxPriority = uxPriority;
- 800ae24:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae26:	6aba      	ldr	r2, [r7, #40]	; 0x28
- 800ae28:	62da      	str	r2, [r3, #44]	; 0x2c
-	#if ( configUSE_MUTEXES == 1 )
-	{
-		pxNewTCB->uxBasePriority = uxPriority;
- 800ae2a:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae2c:	6aba      	ldr	r2, [r7, #40]	; 0x28
- 800ae2e:	645a      	str	r2, [r3, #68]	; 0x44
-		pxNewTCB->uxMutexesHeld = 0;
- 800ae30:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae32:	2200      	movs	r2, #0
- 800ae34:	649a      	str	r2, [r3, #72]	; 0x48
-	}
-	#endif /* configUSE_MUTEXES */
-
-	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
- 800ae36:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae38:	3304      	adds	r3, #4
- 800ae3a:	4618      	mov	r0, r3
- 800ae3c:	f7ff fe60 	bl	800ab00 <vListInitialiseItem>
-	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
- 800ae40:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae42:	3318      	adds	r3, #24
- 800ae44:	4618      	mov	r0, r3
- 800ae46:	f7ff fe5b 	bl	800ab00 <vListInitialiseItem>
-
-	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
-	back to	the containing TCB from a generic item in a list. */
-	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
- 800ae4a:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae4c:	6b3a      	ldr	r2, [r7, #48]	; 0x30
- 800ae4e:	611a      	str	r2, [r3, #16]
-
-	/* Event lists are always in priority order. */
-	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
- 800ae50:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 800ae52:	f1c3 0207 	rsb	r2, r3, #7
- 800ae56:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae58:	619a      	str	r2, [r3, #24]
-	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
- 800ae5a:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae5c:	6b3a      	ldr	r2, [r7, #48]	; 0x30
- 800ae5e:	625a      	str	r2, [r3, #36]	; 0x24
-	}
-	#endif /* portCRITICAL_NESTING_IN_TCB */
-
-	#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-	{
-		pxNewTCB->pxTaskTag = NULL;
- 800ae60:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae62:	2200      	movs	r2, #0
- 800ae64:	64da      	str	r2, [r3, #76]	; 0x4c
-	}
-	#endif
-
-	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
-	{
-		pxNewTCB->ulNotifiedValue = 0;
- 800ae66:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae68:	2200      	movs	r2, #0
- 800ae6a:	651a      	str	r2, [r3, #80]	; 0x50
-		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
- 800ae6c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae6e:	2200      	movs	r2, #0
- 800ae70:	f883 2054 	strb.w	r2, [r3, #84]	; 0x54
-			}
-			#endif /* portSTACK_GROWTH */
-		}
-		#else /* portHAS_STACK_OVERFLOW_CHECKING */
-		{
-			pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
- 800ae74:	683a      	ldr	r2, [r7, #0]
- 800ae76:	68f9      	ldr	r1, [r7, #12]
- 800ae78:	69b8      	ldr	r0, [r7, #24]
- 800ae7a:	f000 fb5b 	bl	800b534 <pxPortInitialiseStack>
- 800ae7e:	4602      	mov	r2, r0
- 800ae80:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 800ae82:	601a      	str	r2, [r3, #0]
-		}
-		#endif /* portHAS_STACK_OVERFLOW_CHECKING */
-	}
-	#endif /* portUSING_MPU_WRAPPERS */
-
-	if( pxCreatedTask != NULL )
- 800ae84:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 800ae86:	2b00      	cmp	r3, #0
- 800ae88:	d002      	beq.n	800ae90 <prvInitialiseNewTask+0x11e>
-	{
-		/* Pass the handle out in an anonymous way.  The handle can be used to
-		change the created task's priority, delete the created task, etc.*/
-		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
- 800ae8a:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 800ae8c:	6b3a      	ldr	r2, [r7, #48]	; 0x30
- 800ae8e:	601a      	str	r2, [r3, #0]
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-}
- 800ae90:	bf00      	nop
- 800ae92:	3720      	adds	r7, #32
- 800ae94:	46bd      	mov	sp, r7
- 800ae96:	bd80      	pop	{r7, pc}
-
-0800ae98 <prvAddNewTaskToReadyList>:
-/*-----------------------------------------------------------*/
-
-static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
-{
- 800ae98:	b580      	push	{r7, lr}
- 800ae9a:	b082      	sub	sp, #8
- 800ae9c:	af00      	add	r7, sp, #0
- 800ae9e:	6078      	str	r0, [r7, #4]
-	/* Ensure interrupts don't access the task lists while the lists are being
-	updated. */
-	taskENTER_CRITICAL();
- 800aea0:	f000 fbc2 	bl	800b628 <vPortEnterCritical>
-	{
-		uxCurrentNumberOfTasks++;
- 800aea4:	4b2a      	ldr	r3, [pc, #168]	; (800af50 <prvAddNewTaskToReadyList+0xb8>)
- 800aea6:	681b      	ldr	r3, [r3, #0]
- 800aea8:	3301      	adds	r3, #1
- 800aeaa:	4a29      	ldr	r2, [pc, #164]	; (800af50 <prvAddNewTaskToReadyList+0xb8>)
- 800aeac:	6013      	str	r3, [r2, #0]
-		if( pxCurrentTCB == NULL )
- 800aeae:	4b29      	ldr	r3, [pc, #164]	; (800af54 <prvAddNewTaskToReadyList+0xbc>)
- 800aeb0:	681b      	ldr	r3, [r3, #0]
- 800aeb2:	2b00      	cmp	r3, #0
- 800aeb4:	d109      	bne.n	800aeca <prvAddNewTaskToReadyList+0x32>
-		{
-			/* There are no other tasks, or all the other tasks are in
-			the suspended state - make this the current task. */
-			pxCurrentTCB = pxNewTCB;
- 800aeb6:	4a27      	ldr	r2, [pc, #156]	; (800af54 <prvAddNewTaskToReadyList+0xbc>)
- 800aeb8:	687b      	ldr	r3, [r7, #4]
- 800aeba:	6013      	str	r3, [r2, #0]
-
-			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
- 800aebc:	4b24      	ldr	r3, [pc, #144]	; (800af50 <prvAddNewTaskToReadyList+0xb8>)
- 800aebe:	681b      	ldr	r3, [r3, #0]
- 800aec0:	2b01      	cmp	r3, #1
- 800aec2:	d110      	bne.n	800aee6 <prvAddNewTaskToReadyList+0x4e>
-			{
-				/* This is the first task to be created so do the preliminary
-				initialisation required.  We will not recover if this call
-				fails, but we will report the failure. */
-				prvInitialiseTaskLists();
- 800aec4:	f000 fa70 	bl	800b3a8 <prvInitialiseTaskLists>
- 800aec8:	e00d      	b.n	800aee6 <prvAddNewTaskToReadyList+0x4e>
-		else
-		{
-			/* If the scheduler is not already running, make this task the
-			current task if it is the highest priority task to be created
-			so far. */
-			if( xSchedulerRunning == pdFALSE )
- 800aeca:	4b23      	ldr	r3, [pc, #140]	; (800af58 <prvAddNewTaskToReadyList+0xc0>)
- 800aecc:	681b      	ldr	r3, [r3, #0]
- 800aece:	2b00      	cmp	r3, #0
- 800aed0:	d109      	bne.n	800aee6 <prvAddNewTaskToReadyList+0x4e>
-			{
-				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
- 800aed2:	4b20      	ldr	r3, [pc, #128]	; (800af54 <prvAddNewTaskToReadyList+0xbc>)
- 800aed4:	681b      	ldr	r3, [r3, #0]
- 800aed6:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 800aed8:	687b      	ldr	r3, [r7, #4]
- 800aeda:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 800aedc:	429a      	cmp	r2, r3
- 800aede:	d802      	bhi.n	800aee6 <prvAddNewTaskToReadyList+0x4e>
-				{
-					pxCurrentTCB = pxNewTCB;
- 800aee0:	4a1c      	ldr	r2, [pc, #112]	; (800af54 <prvAddNewTaskToReadyList+0xbc>)
- 800aee2:	687b      	ldr	r3, [r7, #4]
- 800aee4:	6013      	str	r3, [r2, #0]
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-		}
-
-		uxTaskNumber++;
- 800aee6:	4b1d      	ldr	r3, [pc, #116]	; (800af5c <prvAddNewTaskToReadyList+0xc4>)
- 800aee8:	681b      	ldr	r3, [r3, #0]
- 800aeea:	3301      	adds	r3, #1
- 800aeec:	4a1b      	ldr	r2, [pc, #108]	; (800af5c <prvAddNewTaskToReadyList+0xc4>)
- 800aeee:	6013      	str	r3, [r2, #0]
-			pxNewTCB->uxTCBNumber = uxTaskNumber;
-		}
-		#endif /* configUSE_TRACE_FACILITY */
-		traceTASK_CREATE( pxNewTCB );
-
-		prvAddTaskToReadyList( pxNewTCB );
- 800aef0:	687b      	ldr	r3, [r7, #4]
- 800aef2:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 800aef4:	2201      	movs	r2, #1
- 800aef6:	409a      	lsls	r2, r3
- 800aef8:	4b19      	ldr	r3, [pc, #100]	; (800af60 <prvAddNewTaskToReadyList+0xc8>)
- 800aefa:	681b      	ldr	r3, [r3, #0]
- 800aefc:	4313      	orrs	r3, r2
- 800aefe:	4a18      	ldr	r2, [pc, #96]	; (800af60 <prvAddNewTaskToReadyList+0xc8>)
- 800af00:	6013      	str	r3, [r2, #0]
- 800af02:	687b      	ldr	r3, [r7, #4]
- 800af04:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 800af06:	4613      	mov	r3, r2
- 800af08:	009b      	lsls	r3, r3, #2
- 800af0a:	4413      	add	r3, r2
- 800af0c:	009b      	lsls	r3, r3, #2
- 800af0e:	4a15      	ldr	r2, [pc, #84]	; (800af64 <prvAddNewTaskToReadyList+0xcc>)
- 800af10:	441a      	add	r2, r3
- 800af12:	687b      	ldr	r3, [r7, #4]
- 800af14:	3304      	adds	r3, #4
- 800af16:	4619      	mov	r1, r3
- 800af18:	4610      	mov	r0, r2
- 800af1a:	f7ff fdfe 	bl	800ab1a <vListInsertEnd>
-
-		portSETUP_TCB( pxNewTCB );
-	}
-	taskEXIT_CRITICAL();
- 800af1e:	f000 fbb5 	bl	800b68c <vPortExitCritical>
-
-	if( xSchedulerRunning != pdFALSE )
- 800af22:	4b0d      	ldr	r3, [pc, #52]	; (800af58 <prvAddNewTaskToReadyList+0xc0>)
- 800af24:	681b      	ldr	r3, [r3, #0]
- 800af26:	2b00      	cmp	r3, #0
- 800af28:	d00e      	beq.n	800af48 <prvAddNewTaskToReadyList+0xb0>
-	{
-		/* If the created task is of a higher priority than the current task
-		then it should run now. */
-		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
- 800af2a:	4b0a      	ldr	r3, [pc, #40]	; (800af54 <prvAddNewTaskToReadyList+0xbc>)
- 800af2c:	681b      	ldr	r3, [r3, #0]
- 800af2e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 800af30:	687b      	ldr	r3, [r7, #4]
- 800af32:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 800af34:	429a      	cmp	r2, r3
- 800af36:	d207      	bcs.n	800af48 <prvAddNewTaskToReadyList+0xb0>
-		{
-			taskYIELD_IF_USING_PREEMPTION();
- 800af38:	4b0b      	ldr	r3, [pc, #44]	; (800af68 <prvAddNewTaskToReadyList+0xd0>)
- 800af3a:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
- 800af3e:	601a      	str	r2, [r3, #0]
- 800af40:	f3bf 8f4f 	dsb	sy
- 800af44:	f3bf 8f6f 	isb	sy
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-}
- 800af48:	bf00      	nop
- 800af4a:	3708      	adds	r7, #8
- 800af4c:	46bd      	mov	sp, r7
- 800af4e:	bd80      	pop	{r7, pc}
- 800af50:	200003f0 	.word	0x200003f0
- 800af54:	200002f4 	.word	0x200002f4
- 800af58:	200003fc 	.word	0x200003fc
- 800af5c:	2000040c 	.word	0x2000040c
- 800af60:	200003f8 	.word	0x200003f8
- 800af64:	200002f8 	.word	0x200002f8
- 800af68:	e000ed04 	.word	0xe000ed04
-
-0800af6c <vTaskDelay>:
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelay == 1 )
-
-	void vTaskDelay( const TickType_t xTicksToDelay )
-	{
- 800af6c:	b580      	push	{r7, lr}
- 800af6e:	b084      	sub	sp, #16
- 800af70:	af00      	add	r7, sp, #0
- 800af72:	6078      	str	r0, [r7, #4]
-	BaseType_t xAlreadyYielded = pdFALSE;
- 800af74:	2300      	movs	r3, #0
- 800af76:	60fb      	str	r3, [r7, #12]
-
-		/* A delay time of zero just forces a reschedule. */
-		if( xTicksToDelay > ( TickType_t ) 0U )
- 800af78:	687b      	ldr	r3, [r7, #4]
- 800af7a:	2b00      	cmp	r3, #0
- 800af7c:	d018      	beq.n	800afb0 <vTaskDelay+0x44>
-		{
-			configASSERT( uxSchedulerSuspended == 0 );
- 800af7e:	4b14      	ldr	r3, [pc, #80]	; (800afd0 <vTaskDelay+0x64>)
- 800af80:	681b      	ldr	r3, [r3, #0]
- 800af82:	2b00      	cmp	r3, #0
- 800af84:	d00b      	beq.n	800af9e <vTaskDelay+0x32>
- 800af86:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800af8a:	b672      	cpsid	i
- 800af8c:	f383 8811 	msr	BASEPRI, r3
- 800af90:	f3bf 8f6f 	isb	sy
- 800af94:	f3bf 8f4f 	dsb	sy
- 800af98:	b662      	cpsie	i
- 800af9a:	60bb      	str	r3, [r7, #8]
- 800af9c:	e7fe      	b.n	800af9c <vTaskDelay+0x30>
-			vTaskSuspendAll();
- 800af9e:	f000 f81b 	bl	800afd8 <vTaskSuspendAll>
-				list or removed from the blocked list until the scheduler
-				is resumed.
-
-				This task cannot be in an event list as it is the currently
-				executing task. */
-				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
- 800afa2:	2100      	movs	r1, #0
- 800afa4:	6878      	ldr	r0, [r7, #4]
- 800afa6:	f000 fa5f 	bl	800b468 <prvAddCurrentTaskToDelayedList>
-			}
-			xAlreadyYielded = xTaskResumeAll();
- 800afaa:	f000 f823 	bl	800aff4 <xTaskResumeAll>
- 800afae:	60f8      	str	r0, [r7, #12]
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		/* Force a reschedule if xTaskResumeAll has not already done so, we may
-		have put ourselves to sleep. */
-		if( xAlreadyYielded == pdFALSE )
- 800afb0:	68fb      	ldr	r3, [r7, #12]
- 800afb2:	2b00      	cmp	r3, #0
- 800afb4:	d107      	bne.n	800afc6 <vTaskDelay+0x5a>
-		{
-			portYIELD_WITHIN_API();
- 800afb6:	4b07      	ldr	r3, [pc, #28]	; (800afd4 <vTaskDelay+0x68>)
- 800afb8:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
- 800afbc:	601a      	str	r2, [r3, #0]
- 800afbe:	f3bf 8f4f 	dsb	sy
- 800afc2:	f3bf 8f6f 	isb	sy
-		}
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
- 800afc6:	bf00      	nop
- 800afc8:	3710      	adds	r7, #16
- 800afca:	46bd      	mov	sp, r7
- 800afcc:	bd80      	pop	{r7, pc}
- 800afce:	bf00      	nop
- 800afd0:	20000414 	.word	0x20000414
- 800afd4:	e000ed04 	.word	0xe000ed04
-
-0800afd8 <vTaskSuspendAll>:
-	vPortEndScheduler();
-}
-/*----------------------------------------------------------*/
-
-void vTaskSuspendAll( void )
-{
- 800afd8:	b480      	push	{r7}
- 800afda:	af00      	add	r7, sp, #0
-	/* A critical section is not required as the variable is of type
-	BaseType_t.  Please read Richard Barry's reply in the following link to a
-	post in the FreeRTOS support forum before reporting this as a bug! -
-	http://goo.gl/wu4acr */
-	++uxSchedulerSuspended;
- 800afdc:	4b04      	ldr	r3, [pc, #16]	; (800aff0 <vTaskSuspendAll+0x18>)
- 800afde:	681b      	ldr	r3, [r3, #0]
- 800afe0:	3301      	adds	r3, #1
- 800afe2:	4a03      	ldr	r2, [pc, #12]	; (800aff0 <vTaskSuspendAll+0x18>)
- 800afe4:	6013      	str	r3, [r2, #0]
-	portMEMORY_BARRIER();
-}
- 800afe6:	bf00      	nop
- 800afe8:	46bd      	mov	sp, r7
- 800afea:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800afee:	4770      	bx	lr
- 800aff0:	20000414 	.word	0x20000414
-
-0800aff4 <xTaskResumeAll>:
-
-#endif /* configUSE_TICKLESS_IDLE */
-/*----------------------------------------------------------*/
-
-BaseType_t xTaskResumeAll( void )
-{
- 800aff4:	b580      	push	{r7, lr}
- 800aff6:	b084      	sub	sp, #16
- 800aff8:	af00      	add	r7, sp, #0
-TCB_t *pxTCB = NULL;
- 800affa:	2300      	movs	r3, #0
- 800affc:	60fb      	str	r3, [r7, #12]
-BaseType_t xAlreadyYielded = pdFALSE;
- 800affe:	2300      	movs	r3, #0
- 800b000:	60bb      	str	r3, [r7, #8]
-
-	/* If uxSchedulerSuspended is zero then this function does not match a
-	previous call to vTaskSuspendAll(). */
-	configASSERT( uxSchedulerSuspended );
- 800b002:	4b42      	ldr	r3, [pc, #264]	; (800b10c <xTaskResumeAll+0x118>)
- 800b004:	681b      	ldr	r3, [r3, #0]
- 800b006:	2b00      	cmp	r3, #0
- 800b008:	d10b      	bne.n	800b022 <xTaskResumeAll+0x2e>
- 800b00a:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b00e:	b672      	cpsid	i
- 800b010:	f383 8811 	msr	BASEPRI, r3
- 800b014:	f3bf 8f6f 	isb	sy
- 800b018:	f3bf 8f4f 	dsb	sy
- 800b01c:	b662      	cpsie	i
- 800b01e:	603b      	str	r3, [r7, #0]
- 800b020:	e7fe      	b.n	800b020 <xTaskResumeAll+0x2c>
-	/* It is possible that an ISR caused a task to be removed from an event
-	list while the scheduler was suspended.  If this was the case then the
-	removed task will have been added to the xPendingReadyList.  Once the
-	scheduler has been resumed it is safe to move all the pending ready
-	tasks from this list into their appropriate ready list. */
-	taskENTER_CRITICAL();
- 800b022:	f000 fb01 	bl	800b628 <vPortEnterCritical>
-	{
-		--uxSchedulerSuspended;
- 800b026:	4b39      	ldr	r3, [pc, #228]	; (800b10c <xTaskResumeAll+0x118>)
- 800b028:	681b      	ldr	r3, [r3, #0]
- 800b02a:	3b01      	subs	r3, #1
- 800b02c:	4a37      	ldr	r2, [pc, #220]	; (800b10c <xTaskResumeAll+0x118>)
- 800b02e:	6013      	str	r3, [r2, #0]
-
-		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
- 800b030:	4b36      	ldr	r3, [pc, #216]	; (800b10c <xTaskResumeAll+0x118>)
- 800b032:	681b      	ldr	r3, [r3, #0]
- 800b034:	2b00      	cmp	r3, #0
- 800b036:	d161      	bne.n	800b0fc <xTaskResumeAll+0x108>
-		{
-			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
- 800b038:	4b35      	ldr	r3, [pc, #212]	; (800b110 <xTaskResumeAll+0x11c>)
- 800b03a:	681b      	ldr	r3, [r3, #0]
- 800b03c:	2b00      	cmp	r3, #0
- 800b03e:	d05d      	beq.n	800b0fc <xTaskResumeAll+0x108>
-			{
-				/* Move any readied tasks from the pending list into the
-				appropriate ready list. */
-				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
- 800b040:	e02e      	b.n	800b0a0 <xTaskResumeAll+0xac>
-				{
-					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 800b042:	4b34      	ldr	r3, [pc, #208]	; (800b114 <xTaskResumeAll+0x120>)
- 800b044:	68db      	ldr	r3, [r3, #12]
- 800b046:	68db      	ldr	r3, [r3, #12]
- 800b048:	60fb      	str	r3, [r7, #12]
-					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
- 800b04a:	68fb      	ldr	r3, [r7, #12]
- 800b04c:	3318      	adds	r3, #24
- 800b04e:	4618      	mov	r0, r3
- 800b050:	f7ff fdc0 	bl	800abd4 <uxListRemove>
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
- 800b054:	68fb      	ldr	r3, [r7, #12]
- 800b056:	3304      	adds	r3, #4
- 800b058:	4618      	mov	r0, r3
- 800b05a:	f7ff fdbb 	bl	800abd4 <uxListRemove>
-					prvAddTaskToReadyList( pxTCB );
- 800b05e:	68fb      	ldr	r3, [r7, #12]
- 800b060:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 800b062:	2201      	movs	r2, #1
- 800b064:	409a      	lsls	r2, r3
- 800b066:	4b2c      	ldr	r3, [pc, #176]	; (800b118 <xTaskResumeAll+0x124>)
- 800b068:	681b      	ldr	r3, [r3, #0]
- 800b06a:	4313      	orrs	r3, r2
- 800b06c:	4a2a      	ldr	r2, [pc, #168]	; (800b118 <xTaskResumeAll+0x124>)
- 800b06e:	6013      	str	r3, [r2, #0]
- 800b070:	68fb      	ldr	r3, [r7, #12]
- 800b072:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 800b074:	4613      	mov	r3, r2
- 800b076:	009b      	lsls	r3, r3, #2
- 800b078:	4413      	add	r3, r2
- 800b07a:	009b      	lsls	r3, r3, #2
- 800b07c:	4a27      	ldr	r2, [pc, #156]	; (800b11c <xTaskResumeAll+0x128>)
- 800b07e:	441a      	add	r2, r3
- 800b080:	68fb      	ldr	r3, [r7, #12]
- 800b082:	3304      	adds	r3, #4
- 800b084:	4619      	mov	r1, r3
- 800b086:	4610      	mov	r0, r2
- 800b088:	f7ff fd47 	bl	800ab1a <vListInsertEnd>
-
-					/* If the moved task has a priority higher than the current
-					task then a yield must be performed. */
-					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
- 800b08c:	68fb      	ldr	r3, [r7, #12]
- 800b08e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 800b090:	4b23      	ldr	r3, [pc, #140]	; (800b120 <xTaskResumeAll+0x12c>)
- 800b092:	681b      	ldr	r3, [r3, #0]
- 800b094:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 800b096:	429a      	cmp	r2, r3
- 800b098:	d302      	bcc.n	800b0a0 <xTaskResumeAll+0xac>
-					{
-						xYieldPending = pdTRUE;
- 800b09a:	4b22      	ldr	r3, [pc, #136]	; (800b124 <xTaskResumeAll+0x130>)
- 800b09c:	2201      	movs	r2, #1
- 800b09e:	601a      	str	r2, [r3, #0]
-				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
- 800b0a0:	4b1c      	ldr	r3, [pc, #112]	; (800b114 <xTaskResumeAll+0x120>)
- 800b0a2:	681b      	ldr	r3, [r3, #0]
- 800b0a4:	2b00      	cmp	r3, #0
- 800b0a6:	d1cc      	bne.n	800b042 <xTaskResumeAll+0x4e>
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-
-				if( pxTCB != NULL )
- 800b0a8:	68fb      	ldr	r3, [r7, #12]
- 800b0aa:	2b00      	cmp	r3, #0
- 800b0ac:	d001      	beq.n	800b0b2 <xTaskResumeAll+0xbe>
-					which may have prevented the next unblock time from being
-					re-calculated, in which case re-calculate it now.  Mainly
-					important for low power tickless implementations, where
-					this can prevent an unnecessary exit from low power
-					state. */
-					prvResetNextTaskUnblockTime();
- 800b0ae:	f000 f9bb 	bl	800b428 <prvResetNextTaskUnblockTime>
-				/* If any ticks occurred while the scheduler was suspended then
-				they should be processed now.  This ensures the tick count does
-				not	slip, and that any delayed tasks are resumed at the correct
-				time. */
-				{
-					UBaseType_t uxPendedCounts = uxPendedTicks; /* Non-volatile copy. */
- 800b0b2:	4b1d      	ldr	r3, [pc, #116]	; (800b128 <xTaskResumeAll+0x134>)
- 800b0b4:	681b      	ldr	r3, [r3, #0]
- 800b0b6:	607b      	str	r3, [r7, #4]
-
-					if( uxPendedCounts > ( UBaseType_t ) 0U )
- 800b0b8:	687b      	ldr	r3, [r7, #4]
- 800b0ba:	2b00      	cmp	r3, #0
- 800b0bc:	d010      	beq.n	800b0e0 <xTaskResumeAll+0xec>
-					{
-						do
-						{
-							if( xTaskIncrementTick() != pdFALSE )
- 800b0be:	f000 f837 	bl	800b130 <xTaskIncrementTick>
- 800b0c2:	4603      	mov	r3, r0
- 800b0c4:	2b00      	cmp	r3, #0
- 800b0c6:	d002      	beq.n	800b0ce <xTaskResumeAll+0xda>
-							{
-								xYieldPending = pdTRUE;
- 800b0c8:	4b16      	ldr	r3, [pc, #88]	; (800b124 <xTaskResumeAll+0x130>)
- 800b0ca:	2201      	movs	r2, #1
- 800b0cc:	601a      	str	r2, [r3, #0]
-							}
-							else
-							{
-								mtCOVERAGE_TEST_MARKER();
-							}
-							--uxPendedCounts;
- 800b0ce:	687b      	ldr	r3, [r7, #4]
- 800b0d0:	3b01      	subs	r3, #1
- 800b0d2:	607b      	str	r3, [r7, #4]
-						} while( uxPendedCounts > ( UBaseType_t ) 0U );
- 800b0d4:	687b      	ldr	r3, [r7, #4]
- 800b0d6:	2b00      	cmp	r3, #0
- 800b0d8:	d1f1      	bne.n	800b0be <xTaskResumeAll+0xca>
-
-						uxPendedTicks = 0;
- 800b0da:	4b13      	ldr	r3, [pc, #76]	; (800b128 <xTaskResumeAll+0x134>)
- 800b0dc:	2200      	movs	r2, #0
- 800b0de:	601a      	str	r2, [r3, #0]
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-				}
-
-				if( xYieldPending != pdFALSE )
- 800b0e0:	4b10      	ldr	r3, [pc, #64]	; (800b124 <xTaskResumeAll+0x130>)
- 800b0e2:	681b      	ldr	r3, [r3, #0]
- 800b0e4:	2b00      	cmp	r3, #0
- 800b0e6:	d009      	beq.n	800b0fc <xTaskResumeAll+0x108>
-				{
-					#if( configUSE_PREEMPTION != 0 )
-					{
-						xAlreadyYielded = pdTRUE;
- 800b0e8:	2301      	movs	r3, #1
- 800b0ea:	60bb      	str	r3, [r7, #8]
-					}
-					#endif
-					taskYIELD_IF_USING_PREEMPTION();
- 800b0ec:	4b0f      	ldr	r3, [pc, #60]	; (800b12c <xTaskResumeAll+0x138>)
- 800b0ee:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
- 800b0f2:	601a      	str	r2, [r3, #0]
- 800b0f4:	f3bf 8f4f 	dsb	sy
- 800b0f8:	f3bf 8f6f 	isb	sy
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	taskEXIT_CRITICAL();
- 800b0fc:	f000 fac6 	bl	800b68c <vPortExitCritical>
-
-	return xAlreadyYielded;
- 800b100:	68bb      	ldr	r3, [r7, #8]
-}
- 800b102:	4618      	mov	r0, r3
- 800b104:	3710      	adds	r7, #16
- 800b106:	46bd      	mov	sp, r7
- 800b108:	bd80      	pop	{r7, pc}
- 800b10a:	bf00      	nop
- 800b10c:	20000414 	.word	0x20000414
- 800b110:	200003f0 	.word	0x200003f0
- 800b114:	200003b4 	.word	0x200003b4
- 800b118:	200003f8 	.word	0x200003f8
- 800b11c:	200002f8 	.word	0x200002f8
- 800b120:	200002f4 	.word	0x200002f4
- 800b124:	20000404 	.word	0x20000404
- 800b128:	20000400 	.word	0x20000400
- 800b12c:	e000ed04 	.word	0xe000ed04
-
-0800b130 <xTaskIncrementTick>:
-
-#endif /* INCLUDE_xTaskAbortDelay */
-/*----------------------------------------------------------*/
-
-BaseType_t xTaskIncrementTick( void )
-{
- 800b130:	b580      	push	{r7, lr}
- 800b132:	b086      	sub	sp, #24
- 800b134:	af00      	add	r7, sp, #0
-TCB_t * pxTCB;
-TickType_t xItemValue;
-BaseType_t xSwitchRequired = pdFALSE;
- 800b136:	2300      	movs	r3, #0
- 800b138:	617b      	str	r3, [r7, #20]
-
-	/* Called by the portable layer each time a tick interrupt occurs.
-	Increments the tick then checks to see if the new tick value will cause any
-	tasks to be unblocked. */
-	traceTASK_INCREMENT_TICK( xTickCount );
-	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
- 800b13a:	4b4f      	ldr	r3, [pc, #316]	; (800b278 <xTaskIncrementTick+0x148>)
- 800b13c:	681b      	ldr	r3, [r3, #0]
- 800b13e:	2b00      	cmp	r3, #0
- 800b140:	f040 8089 	bne.w	800b256 <xTaskIncrementTick+0x126>
-	{
-		/* Minor optimisation.  The tick count cannot change in this
-		block. */
-		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
- 800b144:	4b4d      	ldr	r3, [pc, #308]	; (800b27c <xTaskIncrementTick+0x14c>)
- 800b146:	681b      	ldr	r3, [r3, #0]
- 800b148:	3301      	adds	r3, #1
- 800b14a:	613b      	str	r3, [r7, #16]
-
-		/* Increment the RTOS tick, switching the delayed and overflowed
-		delayed lists if it wraps to 0. */
-		xTickCount = xConstTickCount;
- 800b14c:	4a4b      	ldr	r2, [pc, #300]	; (800b27c <xTaskIncrementTick+0x14c>)
- 800b14e:	693b      	ldr	r3, [r7, #16]
- 800b150:	6013      	str	r3, [r2, #0]
-
-		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
- 800b152:	693b      	ldr	r3, [r7, #16]
- 800b154:	2b00      	cmp	r3, #0
- 800b156:	d121      	bne.n	800b19c <xTaskIncrementTick+0x6c>
-		{
-			taskSWITCH_DELAYED_LISTS();
- 800b158:	4b49      	ldr	r3, [pc, #292]	; (800b280 <xTaskIncrementTick+0x150>)
- 800b15a:	681b      	ldr	r3, [r3, #0]
- 800b15c:	681b      	ldr	r3, [r3, #0]
- 800b15e:	2b00      	cmp	r3, #0
- 800b160:	d00b      	beq.n	800b17a <xTaskIncrementTick+0x4a>
- 800b162:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b166:	b672      	cpsid	i
- 800b168:	f383 8811 	msr	BASEPRI, r3
- 800b16c:	f3bf 8f6f 	isb	sy
- 800b170:	f3bf 8f4f 	dsb	sy
- 800b174:	b662      	cpsie	i
- 800b176:	603b      	str	r3, [r7, #0]
- 800b178:	e7fe      	b.n	800b178 <xTaskIncrementTick+0x48>
- 800b17a:	4b41      	ldr	r3, [pc, #260]	; (800b280 <xTaskIncrementTick+0x150>)
- 800b17c:	681b      	ldr	r3, [r3, #0]
- 800b17e:	60fb      	str	r3, [r7, #12]
- 800b180:	4b40      	ldr	r3, [pc, #256]	; (800b284 <xTaskIncrementTick+0x154>)
- 800b182:	681b      	ldr	r3, [r3, #0]
- 800b184:	4a3e      	ldr	r2, [pc, #248]	; (800b280 <xTaskIncrementTick+0x150>)
- 800b186:	6013      	str	r3, [r2, #0]
- 800b188:	4a3e      	ldr	r2, [pc, #248]	; (800b284 <xTaskIncrementTick+0x154>)
- 800b18a:	68fb      	ldr	r3, [r7, #12]
- 800b18c:	6013      	str	r3, [r2, #0]
- 800b18e:	4b3e      	ldr	r3, [pc, #248]	; (800b288 <xTaskIncrementTick+0x158>)
- 800b190:	681b      	ldr	r3, [r3, #0]
- 800b192:	3301      	adds	r3, #1
- 800b194:	4a3c      	ldr	r2, [pc, #240]	; (800b288 <xTaskIncrementTick+0x158>)
- 800b196:	6013      	str	r3, [r2, #0]
- 800b198:	f000 f946 	bl	800b428 <prvResetNextTaskUnblockTime>
-
-		/* See if this tick has made a timeout expire.  Tasks are stored in
-		the	queue in the order of their wake time - meaning once one task
-		has been found whose block time has not expired there is no need to
-		look any further down the list. */
-		if( xConstTickCount >= xNextTaskUnblockTime )
- 800b19c:	4b3b      	ldr	r3, [pc, #236]	; (800b28c <xTaskIncrementTick+0x15c>)
- 800b19e:	681b      	ldr	r3, [r3, #0]
- 800b1a0:	693a      	ldr	r2, [r7, #16]
- 800b1a2:	429a      	cmp	r2, r3
- 800b1a4:	d348      	bcc.n	800b238 <xTaskIncrementTick+0x108>
-		{
-			for( ;; )
-			{
-				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
- 800b1a6:	4b36      	ldr	r3, [pc, #216]	; (800b280 <xTaskIncrementTick+0x150>)
- 800b1a8:	681b      	ldr	r3, [r3, #0]
- 800b1aa:	681b      	ldr	r3, [r3, #0]
- 800b1ac:	2b00      	cmp	r3, #0
- 800b1ae:	d104      	bne.n	800b1ba <xTaskIncrementTick+0x8a>
-					/* The delayed list is empty.  Set xNextTaskUnblockTime
-					to the maximum possible value so it is extremely
-					unlikely that the
-					if( xTickCount >= xNextTaskUnblockTime ) test will pass
-					next time through. */
-					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
- 800b1b0:	4b36      	ldr	r3, [pc, #216]	; (800b28c <xTaskIncrementTick+0x15c>)
- 800b1b2:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
- 800b1b6:	601a      	str	r2, [r3, #0]
-					break;
- 800b1b8:	e03e      	b.n	800b238 <xTaskIncrementTick+0x108>
-				{
-					/* The delayed list is not empty, get the value of the
-					item at the head of the delayed list.  This is the time
-					at which the task at the head of the delayed list must
-					be removed from the Blocked state. */
-					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 800b1ba:	4b31      	ldr	r3, [pc, #196]	; (800b280 <xTaskIncrementTick+0x150>)
- 800b1bc:	681b      	ldr	r3, [r3, #0]
- 800b1be:	68db      	ldr	r3, [r3, #12]
- 800b1c0:	68db      	ldr	r3, [r3, #12]
- 800b1c2:	60bb      	str	r3, [r7, #8]
-					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
- 800b1c4:	68bb      	ldr	r3, [r7, #8]
- 800b1c6:	685b      	ldr	r3, [r3, #4]
- 800b1c8:	607b      	str	r3, [r7, #4]
-
-					if( xConstTickCount < xItemValue )
- 800b1ca:	693a      	ldr	r2, [r7, #16]
- 800b1cc:	687b      	ldr	r3, [r7, #4]
- 800b1ce:	429a      	cmp	r2, r3
- 800b1d0:	d203      	bcs.n	800b1da <xTaskIncrementTick+0xaa>
-						/* It is not time to unblock this item yet, but the
-						item value is the time at which the task at the head
-						of the blocked list must be removed from the Blocked
-						state -	so record the item value in
-						xNextTaskUnblockTime. */
-						xNextTaskUnblockTime = xItemValue;
- 800b1d2:	4a2e      	ldr	r2, [pc, #184]	; (800b28c <xTaskIncrementTick+0x15c>)
- 800b1d4:	687b      	ldr	r3, [r7, #4]
- 800b1d6:	6013      	str	r3, [r2, #0]
-						break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
- 800b1d8:	e02e      	b.n	800b238 <xTaskIncrementTick+0x108>
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* It is time to remove the item from the Blocked state. */
-					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
- 800b1da:	68bb      	ldr	r3, [r7, #8]
- 800b1dc:	3304      	adds	r3, #4
- 800b1de:	4618      	mov	r0, r3
- 800b1e0:	f7ff fcf8 	bl	800abd4 <uxListRemove>
-
-					/* Is the task waiting on an event also?  If so remove
-					it from the event list. */
-					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
- 800b1e4:	68bb      	ldr	r3, [r7, #8]
- 800b1e6:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 800b1e8:	2b00      	cmp	r3, #0
- 800b1ea:	d004      	beq.n	800b1f6 <xTaskIncrementTick+0xc6>
-					{
-						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
- 800b1ec:	68bb      	ldr	r3, [r7, #8]
- 800b1ee:	3318      	adds	r3, #24
- 800b1f0:	4618      	mov	r0, r3
- 800b1f2:	f7ff fcef 	bl	800abd4 <uxListRemove>
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* Place the unblocked task into the appropriate ready
-					list. */
-					prvAddTaskToReadyList( pxTCB );
- 800b1f6:	68bb      	ldr	r3, [r7, #8]
- 800b1f8:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 800b1fa:	2201      	movs	r2, #1
- 800b1fc:	409a      	lsls	r2, r3
- 800b1fe:	4b24      	ldr	r3, [pc, #144]	; (800b290 <xTaskIncrementTick+0x160>)
- 800b200:	681b      	ldr	r3, [r3, #0]
- 800b202:	4313      	orrs	r3, r2
- 800b204:	4a22      	ldr	r2, [pc, #136]	; (800b290 <xTaskIncrementTick+0x160>)
- 800b206:	6013      	str	r3, [r2, #0]
- 800b208:	68bb      	ldr	r3, [r7, #8]
- 800b20a:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 800b20c:	4613      	mov	r3, r2
- 800b20e:	009b      	lsls	r3, r3, #2
- 800b210:	4413      	add	r3, r2
- 800b212:	009b      	lsls	r3, r3, #2
- 800b214:	4a1f      	ldr	r2, [pc, #124]	; (800b294 <xTaskIncrementTick+0x164>)
- 800b216:	441a      	add	r2, r3
- 800b218:	68bb      	ldr	r3, [r7, #8]
- 800b21a:	3304      	adds	r3, #4
- 800b21c:	4619      	mov	r1, r3
- 800b21e:	4610      	mov	r0, r2
- 800b220:	f7ff fc7b 	bl	800ab1a <vListInsertEnd>
-					{
-						/* Preemption is on, but a context switch should
-						only be performed if the unblocked task has a
-						priority that is equal to or higher than the
-						currently executing task. */
-						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
- 800b224:	68bb      	ldr	r3, [r7, #8]
- 800b226:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 800b228:	4b1b      	ldr	r3, [pc, #108]	; (800b298 <xTaskIncrementTick+0x168>)
- 800b22a:	681b      	ldr	r3, [r3, #0]
- 800b22c:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 800b22e:	429a      	cmp	r2, r3
- 800b230:	d3b9      	bcc.n	800b1a6 <xTaskIncrementTick+0x76>
-						{
-							xSwitchRequired = pdTRUE;
- 800b232:	2301      	movs	r3, #1
- 800b234:	617b      	str	r3, [r7, #20]
-				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
- 800b236:	e7b6      	b.n	800b1a6 <xTaskIncrementTick+0x76>
-		/* Tasks of equal priority to the currently running task will share
-		processing time (time slice) if preemption is on, and the application
-		writer has not explicitly turned time slicing off. */
-		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
-		{
-			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
- 800b238:	4b17      	ldr	r3, [pc, #92]	; (800b298 <xTaskIncrementTick+0x168>)
- 800b23a:	681b      	ldr	r3, [r3, #0]
- 800b23c:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 800b23e:	4915      	ldr	r1, [pc, #84]	; (800b294 <xTaskIncrementTick+0x164>)
- 800b240:	4613      	mov	r3, r2
- 800b242:	009b      	lsls	r3, r3, #2
- 800b244:	4413      	add	r3, r2
- 800b246:	009b      	lsls	r3, r3, #2
- 800b248:	440b      	add	r3, r1
- 800b24a:	681b      	ldr	r3, [r3, #0]
- 800b24c:	2b01      	cmp	r3, #1
- 800b24e:	d907      	bls.n	800b260 <xTaskIncrementTick+0x130>
-			{
-				xSwitchRequired = pdTRUE;
- 800b250:	2301      	movs	r3, #1
- 800b252:	617b      	str	r3, [r7, #20]
- 800b254:	e004      	b.n	800b260 <xTaskIncrementTick+0x130>
-		}
-		#endif /* configUSE_TICK_HOOK */
-	}
-	else
-	{
-		++uxPendedTicks;
- 800b256:	4b11      	ldr	r3, [pc, #68]	; (800b29c <xTaskIncrementTick+0x16c>)
- 800b258:	681b      	ldr	r3, [r3, #0]
- 800b25a:	3301      	adds	r3, #1
- 800b25c:	4a0f      	ldr	r2, [pc, #60]	; (800b29c <xTaskIncrementTick+0x16c>)
- 800b25e:	6013      	str	r3, [r2, #0]
-		#endif
-	}
-
-	#if ( configUSE_PREEMPTION == 1 )
-	{
-		if( xYieldPending != pdFALSE )
- 800b260:	4b0f      	ldr	r3, [pc, #60]	; (800b2a0 <xTaskIncrementTick+0x170>)
- 800b262:	681b      	ldr	r3, [r3, #0]
- 800b264:	2b00      	cmp	r3, #0
- 800b266:	d001      	beq.n	800b26c <xTaskIncrementTick+0x13c>
-		{
-			xSwitchRequired = pdTRUE;
- 800b268:	2301      	movs	r3, #1
- 800b26a:	617b      	str	r3, [r7, #20]
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif /* configUSE_PREEMPTION */
-
-	return xSwitchRequired;
- 800b26c:	697b      	ldr	r3, [r7, #20]
-}
- 800b26e:	4618      	mov	r0, r3
- 800b270:	3718      	adds	r7, #24
- 800b272:	46bd      	mov	sp, r7
- 800b274:	bd80      	pop	{r7, pc}
- 800b276:	bf00      	nop
- 800b278:	20000414 	.word	0x20000414
- 800b27c:	200003f4 	.word	0x200003f4
- 800b280:	200003ac 	.word	0x200003ac
- 800b284:	200003b0 	.word	0x200003b0
- 800b288:	20000408 	.word	0x20000408
- 800b28c:	20000410 	.word	0x20000410
- 800b290:	200003f8 	.word	0x200003f8
- 800b294:	200002f8 	.word	0x200002f8
- 800b298:	200002f4 	.word	0x200002f4
- 800b29c:	20000400 	.word	0x20000400
- 800b2a0:	20000404 	.word	0x20000404
-
-0800b2a4 <vTaskSwitchContext>:
-
-#endif /* configUSE_APPLICATION_TASK_TAG */
-/*-----------------------------------------------------------*/
-
-void vTaskSwitchContext( void )
-{
- 800b2a4:	b580      	push	{r7, lr}
- 800b2a6:	b088      	sub	sp, #32
- 800b2a8:	af00      	add	r7, sp, #0
-	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
- 800b2aa:	4b3a      	ldr	r3, [pc, #232]	; (800b394 <vTaskSwitchContext+0xf0>)
- 800b2ac:	681b      	ldr	r3, [r3, #0]
- 800b2ae:	2b00      	cmp	r3, #0
- 800b2b0:	d003      	beq.n	800b2ba <vTaskSwitchContext+0x16>
-	{
-		/* The scheduler is currently suspended - do not allow a context
-		switch. */
-		xYieldPending = pdTRUE;
- 800b2b2:	4b39      	ldr	r3, [pc, #228]	; (800b398 <vTaskSwitchContext+0xf4>)
- 800b2b4:	2201      	movs	r2, #1
- 800b2b6:	601a      	str	r2, [r3, #0]
-			structure specific to this task. */
-			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
-		}
-		#endif /* configUSE_NEWLIB_REENTRANT */
-	}
-}
- 800b2b8:	e067      	b.n	800b38a <vTaskSwitchContext+0xe6>
-		xYieldPending = pdFALSE;
- 800b2ba:	4b37      	ldr	r3, [pc, #220]	; (800b398 <vTaskSwitchContext+0xf4>)
- 800b2bc:	2200      	movs	r2, #0
- 800b2be:	601a      	str	r2, [r3, #0]
-		taskCHECK_FOR_STACK_OVERFLOW();
- 800b2c0:	4b36      	ldr	r3, [pc, #216]	; (800b39c <vTaskSwitchContext+0xf8>)
- 800b2c2:	681b      	ldr	r3, [r3, #0]
- 800b2c4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 800b2c6:	61fb      	str	r3, [r7, #28]
- 800b2c8:	f04f 33a5 	mov.w	r3, #2779096485	; 0xa5a5a5a5
- 800b2cc:	61bb      	str	r3, [r7, #24]
- 800b2ce:	69fb      	ldr	r3, [r7, #28]
- 800b2d0:	681b      	ldr	r3, [r3, #0]
- 800b2d2:	69ba      	ldr	r2, [r7, #24]
- 800b2d4:	429a      	cmp	r2, r3
- 800b2d6:	d111      	bne.n	800b2fc <vTaskSwitchContext+0x58>
- 800b2d8:	69fb      	ldr	r3, [r7, #28]
- 800b2da:	3304      	adds	r3, #4
- 800b2dc:	681b      	ldr	r3, [r3, #0]
- 800b2de:	69ba      	ldr	r2, [r7, #24]
- 800b2e0:	429a      	cmp	r2, r3
- 800b2e2:	d10b      	bne.n	800b2fc <vTaskSwitchContext+0x58>
- 800b2e4:	69fb      	ldr	r3, [r7, #28]
- 800b2e6:	3308      	adds	r3, #8
- 800b2e8:	681b      	ldr	r3, [r3, #0]
- 800b2ea:	69ba      	ldr	r2, [r7, #24]
- 800b2ec:	429a      	cmp	r2, r3
- 800b2ee:	d105      	bne.n	800b2fc <vTaskSwitchContext+0x58>
- 800b2f0:	69fb      	ldr	r3, [r7, #28]
- 800b2f2:	330c      	adds	r3, #12
- 800b2f4:	681b      	ldr	r3, [r3, #0]
- 800b2f6:	69ba      	ldr	r2, [r7, #24]
- 800b2f8:	429a      	cmp	r2, r3
- 800b2fa:	d008      	beq.n	800b30e <vTaskSwitchContext+0x6a>
- 800b2fc:	4b27      	ldr	r3, [pc, #156]	; (800b39c <vTaskSwitchContext+0xf8>)
- 800b2fe:	681a      	ldr	r2, [r3, #0]
- 800b300:	4b26      	ldr	r3, [pc, #152]	; (800b39c <vTaskSwitchContext+0xf8>)
- 800b302:	681b      	ldr	r3, [r3, #0]
- 800b304:	3334      	adds	r3, #52	; 0x34
- 800b306:	4619      	mov	r1, r3
- 800b308:	4610      	mov	r0, r2
- 800b30a:	f7f5 f951 	bl	80005b0 <vApplicationStackOverflowHook>
-		taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 800b30e:	4b24      	ldr	r3, [pc, #144]	; (800b3a0 <vTaskSwitchContext+0xfc>)
- 800b310:	681b      	ldr	r3, [r3, #0]
- 800b312:	60fb      	str	r3, [r7, #12]
-		__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
- 800b314:	68fb      	ldr	r3, [r7, #12]
- 800b316:	fab3 f383 	clz	r3, r3
- 800b31a:	72fb      	strb	r3, [r7, #11]
-		return ucReturn;
- 800b31c:	7afb      	ldrb	r3, [r7, #11]
- 800b31e:	f1c3 031f 	rsb	r3, r3, #31
- 800b322:	617b      	str	r3, [r7, #20]
- 800b324:	491f      	ldr	r1, [pc, #124]	; (800b3a4 <vTaskSwitchContext+0x100>)
- 800b326:	697a      	ldr	r2, [r7, #20]
- 800b328:	4613      	mov	r3, r2
- 800b32a:	009b      	lsls	r3, r3, #2
- 800b32c:	4413      	add	r3, r2
- 800b32e:	009b      	lsls	r3, r3, #2
- 800b330:	440b      	add	r3, r1
- 800b332:	681b      	ldr	r3, [r3, #0]
- 800b334:	2b00      	cmp	r3, #0
- 800b336:	d10b      	bne.n	800b350 <vTaskSwitchContext+0xac>
-	__asm volatile
- 800b338:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b33c:	b672      	cpsid	i
- 800b33e:	f383 8811 	msr	BASEPRI, r3
- 800b342:	f3bf 8f6f 	isb	sy
- 800b346:	f3bf 8f4f 	dsb	sy
- 800b34a:	b662      	cpsie	i
- 800b34c:	607b      	str	r3, [r7, #4]
- 800b34e:	e7fe      	b.n	800b34e <vTaskSwitchContext+0xaa>
- 800b350:	697a      	ldr	r2, [r7, #20]
- 800b352:	4613      	mov	r3, r2
- 800b354:	009b      	lsls	r3, r3, #2
- 800b356:	4413      	add	r3, r2
- 800b358:	009b      	lsls	r3, r3, #2
- 800b35a:	4a12      	ldr	r2, [pc, #72]	; (800b3a4 <vTaskSwitchContext+0x100>)
- 800b35c:	4413      	add	r3, r2
- 800b35e:	613b      	str	r3, [r7, #16]
- 800b360:	693b      	ldr	r3, [r7, #16]
- 800b362:	685b      	ldr	r3, [r3, #4]
- 800b364:	685a      	ldr	r2, [r3, #4]
- 800b366:	693b      	ldr	r3, [r7, #16]
- 800b368:	605a      	str	r2, [r3, #4]
- 800b36a:	693b      	ldr	r3, [r7, #16]
- 800b36c:	685a      	ldr	r2, [r3, #4]
- 800b36e:	693b      	ldr	r3, [r7, #16]
- 800b370:	3308      	adds	r3, #8
- 800b372:	429a      	cmp	r2, r3
- 800b374:	d104      	bne.n	800b380 <vTaskSwitchContext+0xdc>
- 800b376:	693b      	ldr	r3, [r7, #16]
- 800b378:	685b      	ldr	r3, [r3, #4]
- 800b37a:	685a      	ldr	r2, [r3, #4]
- 800b37c:	693b      	ldr	r3, [r7, #16]
- 800b37e:	605a      	str	r2, [r3, #4]
- 800b380:	693b      	ldr	r3, [r7, #16]
- 800b382:	685b      	ldr	r3, [r3, #4]
- 800b384:	68db      	ldr	r3, [r3, #12]
- 800b386:	4a05      	ldr	r2, [pc, #20]	; (800b39c <vTaskSwitchContext+0xf8>)
- 800b388:	6013      	str	r3, [r2, #0]
-}
- 800b38a:	bf00      	nop
- 800b38c:	3720      	adds	r7, #32
- 800b38e:	46bd      	mov	sp, r7
- 800b390:	bd80      	pop	{r7, pc}
- 800b392:	bf00      	nop
- 800b394:	20000414 	.word	0x20000414
- 800b398:	20000404 	.word	0x20000404
- 800b39c:	200002f4 	.word	0x200002f4
- 800b3a0:	200003f8 	.word	0x200003f8
- 800b3a4:	200002f8 	.word	0x200002f8
-
-0800b3a8 <prvInitialiseTaskLists>:
-
-#endif /* portUSING_MPU_WRAPPERS */
-/*-----------------------------------------------------------*/
-
-static void prvInitialiseTaskLists( void )
-{
- 800b3a8:	b580      	push	{r7, lr}
- 800b3aa:	b082      	sub	sp, #8
- 800b3ac:	af00      	add	r7, sp, #0
-UBaseType_t uxPriority;
-
-	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
- 800b3ae:	2300      	movs	r3, #0
- 800b3b0:	607b      	str	r3, [r7, #4]
- 800b3b2:	e00c      	b.n	800b3ce <prvInitialiseTaskLists+0x26>
-	{
-		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
- 800b3b4:	687a      	ldr	r2, [r7, #4]
- 800b3b6:	4613      	mov	r3, r2
- 800b3b8:	009b      	lsls	r3, r3, #2
- 800b3ba:	4413      	add	r3, r2
- 800b3bc:	009b      	lsls	r3, r3, #2
- 800b3be:	4a12      	ldr	r2, [pc, #72]	; (800b408 <prvInitialiseTaskLists+0x60>)
- 800b3c0:	4413      	add	r3, r2
- 800b3c2:	4618      	mov	r0, r3
- 800b3c4:	f7ff fb7c 	bl	800aac0 <vListInitialise>
-	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
- 800b3c8:	687b      	ldr	r3, [r7, #4]
- 800b3ca:	3301      	adds	r3, #1
- 800b3cc:	607b      	str	r3, [r7, #4]
- 800b3ce:	687b      	ldr	r3, [r7, #4]
- 800b3d0:	2b06      	cmp	r3, #6
- 800b3d2:	d9ef      	bls.n	800b3b4 <prvInitialiseTaskLists+0xc>
-	}
-
-	vListInitialise( &xDelayedTaskList1 );
- 800b3d4:	480d      	ldr	r0, [pc, #52]	; (800b40c <prvInitialiseTaskLists+0x64>)
- 800b3d6:	f7ff fb73 	bl	800aac0 <vListInitialise>
-	vListInitialise( &xDelayedTaskList2 );
- 800b3da:	480d      	ldr	r0, [pc, #52]	; (800b410 <prvInitialiseTaskLists+0x68>)
- 800b3dc:	f7ff fb70 	bl	800aac0 <vListInitialise>
-	vListInitialise( &xPendingReadyList );
- 800b3e0:	480c      	ldr	r0, [pc, #48]	; (800b414 <prvInitialiseTaskLists+0x6c>)
- 800b3e2:	f7ff fb6d 	bl	800aac0 <vListInitialise>
-
-	#if ( INCLUDE_vTaskDelete == 1 )
-	{
-		vListInitialise( &xTasksWaitingTermination );
- 800b3e6:	480c      	ldr	r0, [pc, #48]	; (800b418 <prvInitialiseTaskLists+0x70>)
- 800b3e8:	f7ff fb6a 	bl	800aac0 <vListInitialise>
-	}
-	#endif /* INCLUDE_vTaskDelete */
-
-	#if ( INCLUDE_vTaskSuspend == 1 )
-	{
-		vListInitialise( &xSuspendedTaskList );
- 800b3ec:	480b      	ldr	r0, [pc, #44]	; (800b41c <prvInitialiseTaskLists+0x74>)
- 800b3ee:	f7ff fb67 	bl	800aac0 <vListInitialise>
-	}
-	#endif /* INCLUDE_vTaskSuspend */
-
-	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
-	using list2. */
-	pxDelayedTaskList = &xDelayedTaskList1;
- 800b3f2:	4b0b      	ldr	r3, [pc, #44]	; (800b420 <prvInitialiseTaskLists+0x78>)
- 800b3f4:	4a05      	ldr	r2, [pc, #20]	; (800b40c <prvInitialiseTaskLists+0x64>)
- 800b3f6:	601a      	str	r2, [r3, #0]
-	pxOverflowDelayedTaskList = &xDelayedTaskList2;
- 800b3f8:	4b0a      	ldr	r3, [pc, #40]	; (800b424 <prvInitialiseTaskLists+0x7c>)
- 800b3fa:	4a05      	ldr	r2, [pc, #20]	; (800b410 <prvInitialiseTaskLists+0x68>)
- 800b3fc:	601a      	str	r2, [r3, #0]
-}
- 800b3fe:	bf00      	nop
- 800b400:	3708      	adds	r7, #8
- 800b402:	46bd      	mov	sp, r7
- 800b404:	bd80      	pop	{r7, pc}
- 800b406:	bf00      	nop
- 800b408:	200002f8 	.word	0x200002f8
- 800b40c:	20000384 	.word	0x20000384
- 800b410:	20000398 	.word	0x20000398
- 800b414:	200003b4 	.word	0x200003b4
- 800b418:	200003c8 	.word	0x200003c8
- 800b41c:	200003dc 	.word	0x200003dc
- 800b420:	200003ac 	.word	0x200003ac
- 800b424:	200003b0 	.word	0x200003b0
-
-0800b428 <prvResetNextTaskUnblockTime>:
-
-#endif /* INCLUDE_vTaskDelete */
-/*-----------------------------------------------------------*/
-
-static void prvResetNextTaskUnblockTime( void )
-{
- 800b428:	b480      	push	{r7}
- 800b42a:	b083      	sub	sp, #12
- 800b42c:	af00      	add	r7, sp, #0
-TCB_t *pxTCB;
-
-	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
- 800b42e:	4b0c      	ldr	r3, [pc, #48]	; (800b460 <prvResetNextTaskUnblockTime+0x38>)
- 800b430:	681b      	ldr	r3, [r3, #0]
- 800b432:	681b      	ldr	r3, [r3, #0]
- 800b434:	2b00      	cmp	r3, #0
- 800b436:	d104      	bne.n	800b442 <prvResetNextTaskUnblockTime+0x1a>
-	{
-		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
-		the maximum possible value so it is	extremely unlikely that the
-		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
-		there is an item in the delayed list. */
-		xNextTaskUnblockTime = portMAX_DELAY;
- 800b438:	4b0a      	ldr	r3, [pc, #40]	; (800b464 <prvResetNextTaskUnblockTime+0x3c>)
- 800b43a:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
- 800b43e:	601a      	str	r2, [r3, #0]
-		which the task at the head of the delayed list should be removed
-		from the Blocked state. */
-		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
-		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
-	}
-}
- 800b440:	e008      	b.n	800b454 <prvResetNextTaskUnblockTime+0x2c>
-		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
- 800b442:	4b07      	ldr	r3, [pc, #28]	; (800b460 <prvResetNextTaskUnblockTime+0x38>)
- 800b444:	681b      	ldr	r3, [r3, #0]
- 800b446:	68db      	ldr	r3, [r3, #12]
- 800b448:	68db      	ldr	r3, [r3, #12]
- 800b44a:	607b      	str	r3, [r7, #4]
-		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
- 800b44c:	687b      	ldr	r3, [r7, #4]
- 800b44e:	685b      	ldr	r3, [r3, #4]
- 800b450:	4a04      	ldr	r2, [pc, #16]	; (800b464 <prvResetNextTaskUnblockTime+0x3c>)
- 800b452:	6013      	str	r3, [r2, #0]
-}
- 800b454:	bf00      	nop
- 800b456:	370c      	adds	r7, #12
- 800b458:	46bd      	mov	sp, r7
- 800b45a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800b45e:	4770      	bx	lr
- 800b460:	200003ac 	.word	0x200003ac
- 800b464:	20000410 	.word	0x20000410
-
-0800b468 <prvAddCurrentTaskToDelayedList>:
-	}
-#endif
-/*-----------------------------------------------------------*/
-
-static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
-{
- 800b468:	b580      	push	{r7, lr}
- 800b46a:	b084      	sub	sp, #16
- 800b46c:	af00      	add	r7, sp, #0
- 800b46e:	6078      	str	r0, [r7, #4]
- 800b470:	6039      	str	r1, [r7, #0]
-TickType_t xTimeToWake;
-const TickType_t xConstTickCount = xTickCount;
- 800b472:	4b29      	ldr	r3, [pc, #164]	; (800b518 <prvAddCurrentTaskToDelayedList+0xb0>)
- 800b474:	681b      	ldr	r3, [r3, #0]
- 800b476:	60fb      	str	r3, [r7, #12]
-	}
-	#endif
-
-	/* Remove the task from the ready list before adding it to the blocked list
-	as the same list item is used for both lists. */
-	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
- 800b478:	4b28      	ldr	r3, [pc, #160]	; (800b51c <prvAddCurrentTaskToDelayedList+0xb4>)
- 800b47a:	681b      	ldr	r3, [r3, #0]
- 800b47c:	3304      	adds	r3, #4
- 800b47e:	4618      	mov	r0, r3
- 800b480:	f7ff fba8 	bl	800abd4 <uxListRemove>
- 800b484:	4603      	mov	r3, r0
- 800b486:	2b00      	cmp	r3, #0
- 800b488:	d10b      	bne.n	800b4a2 <prvAddCurrentTaskToDelayedList+0x3a>
-	{
-		/* The current task must be in a ready list, so there is no need to
-		check, and the port reset macro can be called directly. */
-		portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority ); /*lint !e931 pxCurrentTCB cannot change as it is the calling task.  pxCurrentTCB->uxPriority and uxTopReadyPriority cannot change as called with scheduler suspended or in a critical section. */
- 800b48a:	4b24      	ldr	r3, [pc, #144]	; (800b51c <prvAddCurrentTaskToDelayedList+0xb4>)
- 800b48c:	681b      	ldr	r3, [r3, #0]
- 800b48e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 800b490:	2201      	movs	r2, #1
- 800b492:	fa02 f303 	lsl.w	r3, r2, r3
- 800b496:	43da      	mvns	r2, r3
- 800b498:	4b21      	ldr	r3, [pc, #132]	; (800b520 <prvAddCurrentTaskToDelayedList+0xb8>)
- 800b49a:	681b      	ldr	r3, [r3, #0]
- 800b49c:	4013      	ands	r3, r2
- 800b49e:	4a20      	ldr	r2, [pc, #128]	; (800b520 <prvAddCurrentTaskToDelayedList+0xb8>)
- 800b4a0:	6013      	str	r3, [r2, #0]
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	#if ( INCLUDE_vTaskSuspend == 1 )
-	{
-		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
- 800b4a2:	687b      	ldr	r3, [r7, #4]
- 800b4a4:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
- 800b4a8:	d10a      	bne.n	800b4c0 <prvAddCurrentTaskToDelayedList+0x58>
- 800b4aa:	683b      	ldr	r3, [r7, #0]
- 800b4ac:	2b00      	cmp	r3, #0
- 800b4ae:	d007      	beq.n	800b4c0 <prvAddCurrentTaskToDelayedList+0x58>
-		{
-			/* Add the task to the suspended task list instead of a delayed task
-			list to ensure it is not woken by a timing event.  It will block
-			indefinitely. */
-			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
- 800b4b0:	4b1a      	ldr	r3, [pc, #104]	; (800b51c <prvAddCurrentTaskToDelayedList+0xb4>)
- 800b4b2:	681b      	ldr	r3, [r3, #0]
- 800b4b4:	3304      	adds	r3, #4
- 800b4b6:	4619      	mov	r1, r3
- 800b4b8:	481a      	ldr	r0, [pc, #104]	; (800b524 <prvAddCurrentTaskToDelayedList+0xbc>)
- 800b4ba:	f7ff fb2e 	bl	800ab1a <vListInsertEnd>
-
-		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
-		( void ) xCanBlockIndefinitely;
-	}
-	#endif /* INCLUDE_vTaskSuspend */
-}
- 800b4be:	e026      	b.n	800b50e <prvAddCurrentTaskToDelayedList+0xa6>
-			xTimeToWake = xConstTickCount + xTicksToWait;
- 800b4c0:	68fa      	ldr	r2, [r7, #12]
- 800b4c2:	687b      	ldr	r3, [r7, #4]
- 800b4c4:	4413      	add	r3, r2
- 800b4c6:	60bb      	str	r3, [r7, #8]
-			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
- 800b4c8:	4b14      	ldr	r3, [pc, #80]	; (800b51c <prvAddCurrentTaskToDelayedList+0xb4>)
- 800b4ca:	681b      	ldr	r3, [r3, #0]
- 800b4cc:	68ba      	ldr	r2, [r7, #8]
- 800b4ce:	605a      	str	r2, [r3, #4]
-			if( xTimeToWake < xConstTickCount )
- 800b4d0:	68ba      	ldr	r2, [r7, #8]
- 800b4d2:	68fb      	ldr	r3, [r7, #12]
- 800b4d4:	429a      	cmp	r2, r3
- 800b4d6:	d209      	bcs.n	800b4ec <prvAddCurrentTaskToDelayedList+0x84>
-				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
- 800b4d8:	4b13      	ldr	r3, [pc, #76]	; (800b528 <prvAddCurrentTaskToDelayedList+0xc0>)
- 800b4da:	681a      	ldr	r2, [r3, #0]
- 800b4dc:	4b0f      	ldr	r3, [pc, #60]	; (800b51c <prvAddCurrentTaskToDelayedList+0xb4>)
- 800b4de:	681b      	ldr	r3, [r3, #0]
- 800b4e0:	3304      	adds	r3, #4
- 800b4e2:	4619      	mov	r1, r3
- 800b4e4:	4610      	mov	r0, r2
- 800b4e6:	f7ff fb3c 	bl	800ab62 <vListInsert>
-}
- 800b4ea:	e010      	b.n	800b50e <prvAddCurrentTaskToDelayedList+0xa6>
-				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
- 800b4ec:	4b0f      	ldr	r3, [pc, #60]	; (800b52c <prvAddCurrentTaskToDelayedList+0xc4>)
- 800b4ee:	681a      	ldr	r2, [r3, #0]
- 800b4f0:	4b0a      	ldr	r3, [pc, #40]	; (800b51c <prvAddCurrentTaskToDelayedList+0xb4>)
- 800b4f2:	681b      	ldr	r3, [r3, #0]
- 800b4f4:	3304      	adds	r3, #4
- 800b4f6:	4619      	mov	r1, r3
- 800b4f8:	4610      	mov	r0, r2
- 800b4fa:	f7ff fb32 	bl	800ab62 <vListInsert>
-				if( xTimeToWake < xNextTaskUnblockTime )
- 800b4fe:	4b0c      	ldr	r3, [pc, #48]	; (800b530 <prvAddCurrentTaskToDelayedList+0xc8>)
- 800b500:	681b      	ldr	r3, [r3, #0]
- 800b502:	68ba      	ldr	r2, [r7, #8]
- 800b504:	429a      	cmp	r2, r3
- 800b506:	d202      	bcs.n	800b50e <prvAddCurrentTaskToDelayedList+0xa6>
-					xNextTaskUnblockTime = xTimeToWake;
- 800b508:	4a09      	ldr	r2, [pc, #36]	; (800b530 <prvAddCurrentTaskToDelayedList+0xc8>)
- 800b50a:	68bb      	ldr	r3, [r7, #8]
- 800b50c:	6013      	str	r3, [r2, #0]
-}
- 800b50e:	bf00      	nop
- 800b510:	3710      	adds	r7, #16
- 800b512:	46bd      	mov	sp, r7
- 800b514:	bd80      	pop	{r7, pc}
- 800b516:	bf00      	nop
- 800b518:	200003f4 	.word	0x200003f4
- 800b51c:	200002f4 	.word	0x200002f4
- 800b520:	200003f8 	.word	0x200003f8
- 800b524:	200003dc 	.word	0x200003dc
- 800b528:	200003b0 	.word	0x200003b0
- 800b52c:	200003ac 	.word	0x200003ac
- 800b530:	20000410 	.word	0x20000410
-
-0800b534 <pxPortInitialiseStack>:
-
-/*
- * See header file for description.
- */
-StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
-{
- 800b534:	b480      	push	{r7}
- 800b536:	b085      	sub	sp, #20
- 800b538:	af00      	add	r7, sp, #0
- 800b53a:	60f8      	str	r0, [r7, #12]
- 800b53c:	60b9      	str	r1, [r7, #8]
- 800b53e:	607a      	str	r2, [r7, #4]
-	/* Simulate the stack frame as it would be created by a context switch
-	interrupt. */
-
-	/* Offset added to account for the way the MCU uses the stack on entry/exit
-	of interrupts, and to ensure alignment. */
-	pxTopOfStack--;
- 800b540:	68fb      	ldr	r3, [r7, #12]
- 800b542:	3b04      	subs	r3, #4
- 800b544:	60fb      	str	r3, [r7, #12]
-
-	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
- 800b546:	68fb      	ldr	r3, [r7, #12]
- 800b548:	f04f 7280 	mov.w	r2, #16777216	; 0x1000000
- 800b54c:	601a      	str	r2, [r3, #0]
-	pxTopOfStack--;
- 800b54e:	68fb      	ldr	r3, [r7, #12]
- 800b550:	3b04      	subs	r3, #4
- 800b552:	60fb      	str	r3, [r7, #12]
-	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
- 800b554:	68bb      	ldr	r3, [r7, #8]
- 800b556:	f023 0201 	bic.w	r2, r3, #1
- 800b55a:	68fb      	ldr	r3, [r7, #12]
- 800b55c:	601a      	str	r2, [r3, #0]
-	pxTopOfStack--;
- 800b55e:	68fb      	ldr	r3, [r7, #12]
- 800b560:	3b04      	subs	r3, #4
- 800b562:	60fb      	str	r3, [r7, #12]
-	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
- 800b564:	4a0c      	ldr	r2, [pc, #48]	; (800b598 <pxPortInitialiseStack+0x64>)
- 800b566:	68fb      	ldr	r3, [r7, #12]
- 800b568:	601a      	str	r2, [r3, #0]
-
-	/* Save code space by skipping register initialisation. */
-	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
- 800b56a:	68fb      	ldr	r3, [r7, #12]
- 800b56c:	3b14      	subs	r3, #20
- 800b56e:	60fb      	str	r3, [r7, #12]
-	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
- 800b570:	687a      	ldr	r2, [r7, #4]
- 800b572:	68fb      	ldr	r3, [r7, #12]
- 800b574:	601a      	str	r2, [r3, #0]
-
-	/* A save method is being used that requires each task to maintain its
-	own exec return value. */
-	pxTopOfStack--;
- 800b576:	68fb      	ldr	r3, [r7, #12]
- 800b578:	3b04      	subs	r3, #4
- 800b57a:	60fb      	str	r3, [r7, #12]
-	*pxTopOfStack = portINITIAL_EXC_RETURN;
- 800b57c:	68fb      	ldr	r3, [r7, #12]
- 800b57e:	f06f 0202 	mvn.w	r2, #2
- 800b582:	601a      	str	r2, [r3, #0]
-
-	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
- 800b584:	68fb      	ldr	r3, [r7, #12]
- 800b586:	3b20      	subs	r3, #32
- 800b588:	60fb      	str	r3, [r7, #12]
-
-	return pxTopOfStack;
- 800b58a:	68fb      	ldr	r3, [r7, #12]
-}
- 800b58c:	4618      	mov	r0, r3
- 800b58e:	3714      	adds	r7, #20
- 800b590:	46bd      	mov	sp, r7
- 800b592:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800b596:	4770      	bx	lr
- 800b598:	0800b59d 	.word	0x0800b59d
-
-0800b59c <prvTaskExitError>:
-/*-----------------------------------------------------------*/
-
-static void prvTaskExitError( void )
-{
- 800b59c:	b480      	push	{r7}
- 800b59e:	b085      	sub	sp, #20
- 800b5a0:	af00      	add	r7, sp, #0
-volatile uint32_t ulDummy = 0;
- 800b5a2:	2300      	movs	r3, #0
- 800b5a4:	607b      	str	r3, [r7, #4]
-	its caller as there is nothing to return to.  If a task wants to exit it
-	should instead call vTaskDelete( NULL ).
-
-	Artificially force an assert() to be triggered if configASSERT() is
-	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
- 800b5a6:	4b13      	ldr	r3, [pc, #76]	; (800b5f4 <prvTaskExitError+0x58>)
- 800b5a8:	681b      	ldr	r3, [r3, #0]
- 800b5aa:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
- 800b5ae:	d00b      	beq.n	800b5c8 <prvTaskExitError+0x2c>
- 800b5b0:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b5b4:	b672      	cpsid	i
- 800b5b6:	f383 8811 	msr	BASEPRI, r3
- 800b5ba:	f3bf 8f6f 	isb	sy
- 800b5be:	f3bf 8f4f 	dsb	sy
- 800b5c2:	b662      	cpsie	i
- 800b5c4:	60fb      	str	r3, [r7, #12]
- 800b5c6:	e7fe      	b.n	800b5c6 <prvTaskExitError+0x2a>
- 800b5c8:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b5cc:	b672      	cpsid	i
- 800b5ce:	f383 8811 	msr	BASEPRI, r3
- 800b5d2:	f3bf 8f6f 	isb	sy
- 800b5d6:	f3bf 8f4f 	dsb	sy
- 800b5da:	b662      	cpsie	i
- 800b5dc:	60bb      	str	r3, [r7, #8]
-	portDISABLE_INTERRUPTS();
-	while( ulDummy == 0 )
- 800b5de:	bf00      	nop
- 800b5e0:	687b      	ldr	r3, [r7, #4]
- 800b5e2:	2b00      	cmp	r3, #0
- 800b5e4:	d0fc      	beq.n	800b5e0 <prvTaskExitError+0x44>
-		about code appearing after this function is called - making ulDummy
-		volatile makes the compiler think the function could return and
-		therefore not output an 'unreachable code' warning for code that appears
-		after it. */
-	}
-}
- 800b5e6:	bf00      	nop
- 800b5e8:	3714      	adds	r7, #20
- 800b5ea:	46bd      	mov	sp, r7
- 800b5ec:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800b5f0:	4770      	bx	lr
- 800b5f2:	bf00      	nop
- 800b5f4:	20000048 	.word	0x20000048
-	...
-
-0800b600 <SVC_Handler>:
-/*-----------------------------------------------------------*/
-
-void vPortSVCHandler( void )
-{
-	__asm volatile (
- 800b600:	4b07      	ldr	r3, [pc, #28]	; (800b620 <pxCurrentTCBConst2>)
- 800b602:	6819      	ldr	r1, [r3, #0]
- 800b604:	6808      	ldr	r0, [r1, #0]
- 800b606:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800b60a:	f380 8809 	msr	PSP, r0
- 800b60e:	f3bf 8f6f 	isb	sy
- 800b612:	f04f 0000 	mov.w	r0, #0
- 800b616:	f380 8811 	msr	BASEPRI, r0
- 800b61a:	4770      	bx	lr
- 800b61c:	f3af 8000 	nop.w
-
-0800b620 <pxCurrentTCBConst2>:
- 800b620:	200002f4 	.word	0x200002f4
-					"	bx r14							\n"
-					"									\n"
-					"	.align 4						\n"
-					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-				);
-}
- 800b624:	bf00      	nop
- 800b626:	bf00      	nop
-
-0800b628 <vPortEnterCritical>:
-	configASSERT( uxCriticalNesting == 1000UL );
-}
-/*-----------------------------------------------------------*/
-
-void vPortEnterCritical( void )
-{
- 800b628:	b480      	push	{r7}
- 800b62a:	b083      	sub	sp, #12
- 800b62c:	af00      	add	r7, sp, #0
- 800b62e:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b632:	b672      	cpsid	i
- 800b634:	f383 8811 	msr	BASEPRI, r3
- 800b638:	f3bf 8f6f 	isb	sy
- 800b63c:	f3bf 8f4f 	dsb	sy
- 800b640:	b662      	cpsie	i
- 800b642:	607b      	str	r3, [r7, #4]
-	portDISABLE_INTERRUPTS();
-	uxCriticalNesting++;
- 800b644:	4b0f      	ldr	r3, [pc, #60]	; (800b684 <vPortEnterCritical+0x5c>)
- 800b646:	681b      	ldr	r3, [r3, #0]
- 800b648:	3301      	adds	r3, #1
- 800b64a:	4a0e      	ldr	r2, [pc, #56]	; (800b684 <vPortEnterCritical+0x5c>)
- 800b64c:	6013      	str	r3, [r2, #0]
-	/* This is not the interrupt safe version of the enter critical function so
-	assert() if it is being called from an interrupt context.  Only API
-	functions that end in "FromISR" can be used in an interrupt.  Only assert if
-	the critical nesting count is 1 to protect against recursive calls if the
-	assert function also uses a critical section. */
-	if( uxCriticalNesting == 1 )
- 800b64e:	4b0d      	ldr	r3, [pc, #52]	; (800b684 <vPortEnterCritical+0x5c>)
- 800b650:	681b      	ldr	r3, [r3, #0]
- 800b652:	2b01      	cmp	r3, #1
- 800b654:	d110      	bne.n	800b678 <vPortEnterCritical+0x50>
-	{
-		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
- 800b656:	4b0c      	ldr	r3, [pc, #48]	; (800b688 <vPortEnterCritical+0x60>)
- 800b658:	681b      	ldr	r3, [r3, #0]
- 800b65a:	b2db      	uxtb	r3, r3
- 800b65c:	2b00      	cmp	r3, #0
- 800b65e:	d00b      	beq.n	800b678 <vPortEnterCritical+0x50>
- 800b660:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b664:	b672      	cpsid	i
- 800b666:	f383 8811 	msr	BASEPRI, r3
- 800b66a:	f3bf 8f6f 	isb	sy
- 800b66e:	f3bf 8f4f 	dsb	sy
- 800b672:	b662      	cpsie	i
- 800b674:	603b      	str	r3, [r7, #0]
- 800b676:	e7fe      	b.n	800b676 <vPortEnterCritical+0x4e>
-	}
-}
- 800b678:	bf00      	nop
- 800b67a:	370c      	adds	r7, #12
- 800b67c:	46bd      	mov	sp, r7
- 800b67e:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800b682:	4770      	bx	lr
- 800b684:	20000048 	.word	0x20000048
- 800b688:	e000ed04 	.word	0xe000ed04
-
-0800b68c <vPortExitCritical>:
-/*-----------------------------------------------------------*/
-
-void vPortExitCritical( void )
-{
- 800b68c:	b480      	push	{r7}
- 800b68e:	b083      	sub	sp, #12
- 800b690:	af00      	add	r7, sp, #0
-	configASSERT( uxCriticalNesting );
- 800b692:	4b12      	ldr	r3, [pc, #72]	; (800b6dc <vPortExitCritical+0x50>)
- 800b694:	681b      	ldr	r3, [r3, #0]
- 800b696:	2b00      	cmp	r3, #0
- 800b698:	d10b      	bne.n	800b6b2 <vPortExitCritical+0x26>
- 800b69a:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b69e:	b672      	cpsid	i
- 800b6a0:	f383 8811 	msr	BASEPRI, r3
- 800b6a4:	f3bf 8f6f 	isb	sy
- 800b6a8:	f3bf 8f4f 	dsb	sy
- 800b6ac:	b662      	cpsie	i
- 800b6ae:	607b      	str	r3, [r7, #4]
- 800b6b0:	e7fe      	b.n	800b6b0 <vPortExitCritical+0x24>
-	uxCriticalNesting--;
- 800b6b2:	4b0a      	ldr	r3, [pc, #40]	; (800b6dc <vPortExitCritical+0x50>)
- 800b6b4:	681b      	ldr	r3, [r3, #0]
- 800b6b6:	3b01      	subs	r3, #1
- 800b6b8:	4a08      	ldr	r2, [pc, #32]	; (800b6dc <vPortExitCritical+0x50>)
- 800b6ba:	6013      	str	r3, [r2, #0]
-	if( uxCriticalNesting == 0 )
- 800b6bc:	4b07      	ldr	r3, [pc, #28]	; (800b6dc <vPortExitCritical+0x50>)
- 800b6be:	681b      	ldr	r3, [r3, #0]
- 800b6c0:	2b00      	cmp	r3, #0
- 800b6c2:	d104      	bne.n	800b6ce <vPortExitCritical+0x42>
- 800b6c4:	2300      	movs	r3, #0
- 800b6c6:	603b      	str	r3, [r7, #0]
-}
-/*-----------------------------------------------------------*/
-
-portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
-{
-	__asm volatile
- 800b6c8:	683b      	ldr	r3, [r7, #0]
- 800b6ca:	f383 8811 	msr	BASEPRI, r3
-	{
-		portENABLE_INTERRUPTS();
-	}
-}
- 800b6ce:	bf00      	nop
- 800b6d0:	370c      	adds	r7, #12
- 800b6d2:	46bd      	mov	sp, r7
- 800b6d4:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800b6d8:	4770      	bx	lr
- 800b6da:	bf00      	nop
- 800b6dc:	20000048 	.word	0x20000048
-
-0800b6e0 <PendSV_Handler>:
-
-void xPortPendSVHandler( void )
-{
-	/* This is a naked function. */
-
-	__asm volatile
- 800b6e0:	f3ef 8009 	mrs	r0, PSP
- 800b6e4:	f3bf 8f6f 	isb	sy
- 800b6e8:	4b15      	ldr	r3, [pc, #84]	; (800b740 <pxCurrentTCBConst>)
- 800b6ea:	681a      	ldr	r2, [r3, #0]
- 800b6ec:	f01e 0f10 	tst.w	lr, #16
- 800b6f0:	bf08      	it	eq
- 800b6f2:	ed20 8a10 	vstmdbeq	r0!, {s16-s31}
- 800b6f6:	e920 4ff0 	stmdb	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800b6fa:	6010      	str	r0, [r2, #0]
- 800b6fc:	e92d 0009 	stmdb	sp!, {r0, r3}
- 800b700:	f04f 0050 	mov.w	r0, #80	; 0x50
- 800b704:	b672      	cpsid	i
- 800b706:	f380 8811 	msr	BASEPRI, r0
- 800b70a:	f3bf 8f4f 	dsb	sy
- 800b70e:	f3bf 8f6f 	isb	sy
- 800b712:	b662      	cpsie	i
- 800b714:	f7ff fdc6 	bl	800b2a4 <vTaskSwitchContext>
- 800b718:	f04f 0000 	mov.w	r0, #0
- 800b71c:	f380 8811 	msr	BASEPRI, r0
- 800b720:	bc09      	pop	{r0, r3}
- 800b722:	6819      	ldr	r1, [r3, #0]
- 800b724:	6808      	ldr	r0, [r1, #0]
- 800b726:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800b72a:	f01e 0f10 	tst.w	lr, #16
- 800b72e:	bf08      	it	eq
- 800b730:	ecb0 8a10 	vldmiaeq	r0!, {s16-s31}
- 800b734:	f380 8809 	msr	PSP, r0
- 800b738:	f3bf 8f6f 	isb	sy
- 800b73c:	4770      	bx	lr
- 800b73e:	bf00      	nop
-
-0800b740 <pxCurrentTCBConst>:
- 800b740:	200002f4 	.word	0x200002f4
-	"										\n"
-	"	.align 4							\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
-	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
-	);
-}
- 800b744:	bf00      	nop
- 800b746:	bf00      	nop
-
-0800b748 <SysTick_Handler>:
-/*-----------------------------------------------------------*/
-
-void xPortSysTickHandler( void )
-{
- 800b748:	b580      	push	{r7, lr}
- 800b74a:	b082      	sub	sp, #8
- 800b74c:	af00      	add	r7, sp, #0
-	__asm volatile
- 800b74e:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b752:	b672      	cpsid	i
- 800b754:	f383 8811 	msr	BASEPRI, r3
- 800b758:	f3bf 8f6f 	isb	sy
- 800b75c:	f3bf 8f4f 	dsb	sy
- 800b760:	b662      	cpsie	i
- 800b762:	607b      	str	r3, [r7, #4]
-	save and then restore the interrupt mask value as its value is already
-	known. */
-	portDISABLE_INTERRUPTS();
-	{
-		/* Increment the RTOS tick. */
-		if( xTaskIncrementTick() != pdFALSE )
- 800b764:	f7ff fce4 	bl	800b130 <xTaskIncrementTick>
- 800b768:	4603      	mov	r3, r0
- 800b76a:	2b00      	cmp	r3, #0
- 800b76c:	d003      	beq.n	800b776 <SysTick_Handler+0x2e>
-		{
-			/* A context switch is required.  Context switching is performed in
-			the PendSV interrupt.  Pend the PendSV interrupt. */
-			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
- 800b76e:	4b06      	ldr	r3, [pc, #24]	; (800b788 <SysTick_Handler+0x40>)
- 800b770:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
- 800b774:	601a      	str	r2, [r3, #0]
- 800b776:	2300      	movs	r3, #0
- 800b778:	603b      	str	r3, [r7, #0]
-	__asm volatile
- 800b77a:	683b      	ldr	r3, [r7, #0]
- 800b77c:	f383 8811 	msr	BASEPRI, r3
-		}
-	}
-	portENABLE_INTERRUPTS();
-}
- 800b780:	bf00      	nop
- 800b782:	3708      	adds	r7, #8
- 800b784:	46bd      	mov	sp, r7
- 800b786:	bd80      	pop	{r7, pc}
- 800b788:	e000ed04 	.word	0xe000ed04
-
-0800b78c <pvPortMalloc>:
-static size_t xBlockAllocatedBit = 0;
-
-/*-----------------------------------------------------------*/
-
-void *pvPortMalloc( size_t xWantedSize )
-{
- 800b78c:	b580      	push	{r7, lr}
- 800b78e:	b08a      	sub	sp, #40	; 0x28
- 800b790:	af00      	add	r7, sp, #0
- 800b792:	6078      	str	r0, [r7, #4]
-BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-void *pvReturn = NULL;
- 800b794:	2300      	movs	r3, #0
- 800b796:	61fb      	str	r3, [r7, #28]
-
-	vTaskSuspendAll();
- 800b798:	f7ff fc1e 	bl	800afd8 <vTaskSuspendAll>
-	{
-		/* If this is the first call to malloc then the heap will require
-		initialisation to setup the list of free blocks. */
-		if( pxEnd == NULL )
- 800b79c:	4b5c      	ldr	r3, [pc, #368]	; (800b910 <pvPortMalloc+0x184>)
- 800b79e:	681b      	ldr	r3, [r3, #0]
- 800b7a0:	2b00      	cmp	r3, #0
- 800b7a2:	d101      	bne.n	800b7a8 <pvPortMalloc+0x1c>
-		{
-			prvHeapInit();
- 800b7a4:	f000 f91a 	bl	800b9dc <prvHeapInit>
-
-		/* Check the requested block size is not so large that the top bit is
-		set.  The top bit of the block size member of the BlockLink_t structure
-		is used to determine who owns the block - the application or the
-		kernel, so it must be free. */
-		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
- 800b7a8:	4b5a      	ldr	r3, [pc, #360]	; (800b914 <pvPortMalloc+0x188>)
- 800b7aa:	681a      	ldr	r2, [r3, #0]
- 800b7ac:	687b      	ldr	r3, [r7, #4]
- 800b7ae:	4013      	ands	r3, r2
- 800b7b0:	2b00      	cmp	r3, #0
- 800b7b2:	f040 8090 	bne.w	800b8d6 <pvPortMalloc+0x14a>
-		{
-			/* The wanted size is increased so it can contain a BlockLink_t
-			structure in addition to the requested amount of bytes. */
-			if( xWantedSize > 0 )
- 800b7b6:	687b      	ldr	r3, [r7, #4]
- 800b7b8:	2b00      	cmp	r3, #0
- 800b7ba:	d01e      	beq.n	800b7fa <pvPortMalloc+0x6e>
-			{
-				xWantedSize += xHeapStructSize;
- 800b7bc:	2208      	movs	r2, #8
- 800b7be:	687b      	ldr	r3, [r7, #4]
- 800b7c0:	4413      	add	r3, r2
- 800b7c2:	607b      	str	r3, [r7, #4]
-
-				/* Ensure that blocks are always aligned to the required number
-				of bytes. */
-				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
- 800b7c4:	687b      	ldr	r3, [r7, #4]
- 800b7c6:	f003 0307 	and.w	r3, r3, #7
- 800b7ca:	2b00      	cmp	r3, #0
- 800b7cc:	d015      	beq.n	800b7fa <pvPortMalloc+0x6e>
-				{
-					/* Byte alignment required. */
-					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
- 800b7ce:	687b      	ldr	r3, [r7, #4]
- 800b7d0:	f023 0307 	bic.w	r3, r3, #7
- 800b7d4:	3308      	adds	r3, #8
- 800b7d6:	607b      	str	r3, [r7, #4]
-					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
- 800b7d8:	687b      	ldr	r3, [r7, #4]
- 800b7da:	f003 0307 	and.w	r3, r3, #7
- 800b7de:	2b00      	cmp	r3, #0
- 800b7e0:	d00b      	beq.n	800b7fa <pvPortMalloc+0x6e>
-	__asm volatile
- 800b7e2:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b7e6:	b672      	cpsid	i
- 800b7e8:	f383 8811 	msr	BASEPRI, r3
- 800b7ec:	f3bf 8f6f 	isb	sy
- 800b7f0:	f3bf 8f4f 	dsb	sy
- 800b7f4:	b662      	cpsie	i
- 800b7f6:	617b      	str	r3, [r7, #20]
- 800b7f8:	e7fe      	b.n	800b7f8 <pvPortMalloc+0x6c>
-			else
-			{
-				mtCOVERAGE_TEST_MARKER();
-			}
-
-			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
- 800b7fa:	687b      	ldr	r3, [r7, #4]
- 800b7fc:	2b00      	cmp	r3, #0
- 800b7fe:	d06a      	beq.n	800b8d6 <pvPortMalloc+0x14a>
- 800b800:	4b45      	ldr	r3, [pc, #276]	; (800b918 <pvPortMalloc+0x18c>)
- 800b802:	681b      	ldr	r3, [r3, #0]
- 800b804:	687a      	ldr	r2, [r7, #4]
- 800b806:	429a      	cmp	r2, r3
- 800b808:	d865      	bhi.n	800b8d6 <pvPortMalloc+0x14a>
-			{
-				/* Traverse the list from the start	(lowest address) block until
-				one	of adequate size is found. */
-				pxPreviousBlock = &xStart;
- 800b80a:	4b44      	ldr	r3, [pc, #272]	; (800b91c <pvPortMalloc+0x190>)
- 800b80c:	623b      	str	r3, [r7, #32]
-				pxBlock = xStart.pxNextFreeBlock;
- 800b80e:	4b43      	ldr	r3, [pc, #268]	; (800b91c <pvPortMalloc+0x190>)
- 800b810:	681b      	ldr	r3, [r3, #0]
- 800b812:	627b      	str	r3, [r7, #36]	; 0x24
-				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
- 800b814:	e004      	b.n	800b820 <pvPortMalloc+0x94>
-				{
-					pxPreviousBlock = pxBlock;
- 800b816:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b818:	623b      	str	r3, [r7, #32]
-					pxBlock = pxBlock->pxNextFreeBlock;
- 800b81a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b81c:	681b      	ldr	r3, [r3, #0]
- 800b81e:	627b      	str	r3, [r7, #36]	; 0x24
-				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
- 800b820:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b822:	685b      	ldr	r3, [r3, #4]
- 800b824:	687a      	ldr	r2, [r7, #4]
- 800b826:	429a      	cmp	r2, r3
- 800b828:	d903      	bls.n	800b832 <pvPortMalloc+0xa6>
- 800b82a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b82c:	681b      	ldr	r3, [r3, #0]
- 800b82e:	2b00      	cmp	r3, #0
- 800b830:	d1f1      	bne.n	800b816 <pvPortMalloc+0x8a>
-				}
-
-				/* If the end marker was reached then a block of adequate size
-				was	not found. */
-				if( pxBlock != pxEnd )
- 800b832:	4b37      	ldr	r3, [pc, #220]	; (800b910 <pvPortMalloc+0x184>)
- 800b834:	681b      	ldr	r3, [r3, #0]
- 800b836:	6a7a      	ldr	r2, [r7, #36]	; 0x24
- 800b838:	429a      	cmp	r2, r3
- 800b83a:	d04c      	beq.n	800b8d6 <pvPortMalloc+0x14a>
-				{
-					/* Return the memory space pointed to - jumping over the
-					BlockLink_t structure at its start. */
-					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
- 800b83c:	6a3b      	ldr	r3, [r7, #32]
- 800b83e:	681b      	ldr	r3, [r3, #0]
- 800b840:	2208      	movs	r2, #8
- 800b842:	4413      	add	r3, r2
- 800b844:	61fb      	str	r3, [r7, #28]
-
-					/* This block is being returned for use so must be taken out
-					of the list of free blocks. */
-					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
- 800b846:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b848:	681a      	ldr	r2, [r3, #0]
- 800b84a:	6a3b      	ldr	r3, [r7, #32]
- 800b84c:	601a      	str	r2, [r3, #0]
-
-					/* If the block is larger than required it can be split into
-					two. */
-					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
- 800b84e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b850:	685a      	ldr	r2, [r3, #4]
- 800b852:	687b      	ldr	r3, [r7, #4]
- 800b854:	1ad2      	subs	r2, r2, r3
- 800b856:	2308      	movs	r3, #8
- 800b858:	005b      	lsls	r3, r3, #1
- 800b85a:	429a      	cmp	r2, r3
- 800b85c:	d920      	bls.n	800b8a0 <pvPortMalloc+0x114>
-					{
-						/* This block is to be split into two.  Create a new
-						block following the number of bytes requested. The void
-						cast is used to prevent byte alignment warnings from the
-						compiler. */
-						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
- 800b85e:	6a7a      	ldr	r2, [r7, #36]	; 0x24
- 800b860:	687b      	ldr	r3, [r7, #4]
- 800b862:	4413      	add	r3, r2
- 800b864:	61bb      	str	r3, [r7, #24]
-						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
- 800b866:	69bb      	ldr	r3, [r7, #24]
- 800b868:	f003 0307 	and.w	r3, r3, #7
- 800b86c:	2b00      	cmp	r3, #0
- 800b86e:	d00b      	beq.n	800b888 <pvPortMalloc+0xfc>
- 800b870:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b874:	b672      	cpsid	i
- 800b876:	f383 8811 	msr	BASEPRI, r3
- 800b87a:	f3bf 8f6f 	isb	sy
- 800b87e:	f3bf 8f4f 	dsb	sy
- 800b882:	b662      	cpsie	i
- 800b884:	613b      	str	r3, [r7, #16]
- 800b886:	e7fe      	b.n	800b886 <pvPortMalloc+0xfa>
-
-						/* Calculate the sizes of two blocks split from the
-						single block. */
-						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
- 800b888:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b88a:	685a      	ldr	r2, [r3, #4]
- 800b88c:	687b      	ldr	r3, [r7, #4]
- 800b88e:	1ad2      	subs	r2, r2, r3
- 800b890:	69bb      	ldr	r3, [r7, #24]
- 800b892:	605a      	str	r2, [r3, #4]
-						pxBlock->xBlockSize = xWantedSize;
- 800b894:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b896:	687a      	ldr	r2, [r7, #4]
- 800b898:	605a      	str	r2, [r3, #4]
-
-						/* Insert the new block into the list of free blocks. */
-						prvInsertBlockIntoFreeList( pxNewBlockLink );
- 800b89a:	69b8      	ldr	r0, [r7, #24]
- 800b89c:	f000 f900 	bl	800baa0 <prvInsertBlockIntoFreeList>
-					else
-					{
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					xFreeBytesRemaining -= pxBlock->xBlockSize;
- 800b8a0:	4b1d      	ldr	r3, [pc, #116]	; (800b918 <pvPortMalloc+0x18c>)
- 800b8a2:	681a      	ldr	r2, [r3, #0]
- 800b8a4:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b8a6:	685b      	ldr	r3, [r3, #4]
- 800b8a8:	1ad3      	subs	r3, r2, r3
- 800b8aa:	4a1b      	ldr	r2, [pc, #108]	; (800b918 <pvPortMalloc+0x18c>)
- 800b8ac:	6013      	str	r3, [r2, #0]
-
-					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
- 800b8ae:	4b1a      	ldr	r3, [pc, #104]	; (800b918 <pvPortMalloc+0x18c>)
- 800b8b0:	681a      	ldr	r2, [r3, #0]
- 800b8b2:	4b1b      	ldr	r3, [pc, #108]	; (800b920 <pvPortMalloc+0x194>)
- 800b8b4:	681b      	ldr	r3, [r3, #0]
- 800b8b6:	429a      	cmp	r2, r3
- 800b8b8:	d203      	bcs.n	800b8c2 <pvPortMalloc+0x136>
-					{
-						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
- 800b8ba:	4b17      	ldr	r3, [pc, #92]	; (800b918 <pvPortMalloc+0x18c>)
- 800b8bc:	681b      	ldr	r3, [r3, #0]
- 800b8be:	4a18      	ldr	r2, [pc, #96]	; (800b920 <pvPortMalloc+0x194>)
- 800b8c0:	6013      	str	r3, [r2, #0]
-						mtCOVERAGE_TEST_MARKER();
-					}
-
-					/* The block is being returned - it is allocated and owned
-					by the application and has no "next" block. */
-					pxBlock->xBlockSize |= xBlockAllocatedBit;
- 800b8c2:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b8c4:	685a      	ldr	r2, [r3, #4]
- 800b8c6:	4b13      	ldr	r3, [pc, #76]	; (800b914 <pvPortMalloc+0x188>)
- 800b8c8:	681b      	ldr	r3, [r3, #0]
- 800b8ca:	431a      	orrs	r2, r3
- 800b8cc:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b8ce:	605a      	str	r2, [r3, #4]
-					pxBlock->pxNextFreeBlock = NULL;
- 800b8d0:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 800b8d2:	2200      	movs	r2, #0
- 800b8d4:	601a      	str	r2, [r3, #0]
-			mtCOVERAGE_TEST_MARKER();
-		}
-
-		traceMALLOC( pvReturn, xWantedSize );
-	}
-	( void ) xTaskResumeAll();
- 800b8d6:	f7ff fb8d 	bl	800aff4 <xTaskResumeAll>
-
-	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
-	{
-		if( pvReturn == NULL )
- 800b8da:	69fb      	ldr	r3, [r7, #28]
- 800b8dc:	2b00      	cmp	r3, #0
- 800b8de:	d101      	bne.n	800b8e4 <pvPortMalloc+0x158>
-		{
-			extern void vApplicationMallocFailedHook( void );
-			vApplicationMallocFailedHook();
- 800b8e0:	f7f4 fe71 	bl	80005c6 <vApplicationMallocFailedHook>
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-	#endif
-
-	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
- 800b8e4:	69fb      	ldr	r3, [r7, #28]
- 800b8e6:	f003 0307 	and.w	r3, r3, #7
- 800b8ea:	2b00      	cmp	r3, #0
- 800b8ec:	d00b      	beq.n	800b906 <pvPortMalloc+0x17a>
- 800b8ee:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b8f2:	b672      	cpsid	i
- 800b8f4:	f383 8811 	msr	BASEPRI, r3
- 800b8f8:	f3bf 8f6f 	isb	sy
- 800b8fc:	f3bf 8f4f 	dsb	sy
- 800b900:	b662      	cpsie	i
- 800b902:	60fb      	str	r3, [r7, #12]
- 800b904:	e7fe      	b.n	800b904 <pvPortMalloc+0x178>
-	return pvReturn;
- 800b906:	69fb      	ldr	r3, [r7, #28]
-}
- 800b908:	4618      	mov	r0, r3
- 800b90a:	3728      	adds	r7, #40	; 0x28
- 800b90c:	46bd      	mov	sp, r7
- 800b90e:	bd80      	pop	{r7, pc}
- 800b910:	20008420 	.word	0x20008420
- 800b914:	2000842c 	.word	0x2000842c
- 800b918:	20008424 	.word	0x20008424
- 800b91c:	20008418 	.word	0x20008418
- 800b920:	20008428 	.word	0x20008428
-
-0800b924 <vPortFree>:
-/*-----------------------------------------------------------*/
-
-void vPortFree( void *pv )
-{
- 800b924:	b580      	push	{r7, lr}
- 800b926:	b086      	sub	sp, #24
- 800b928:	af00      	add	r7, sp, #0
- 800b92a:	6078      	str	r0, [r7, #4]
-uint8_t *puc = ( uint8_t * ) pv;
- 800b92c:	687b      	ldr	r3, [r7, #4]
- 800b92e:	617b      	str	r3, [r7, #20]
-BlockLink_t *pxLink;
-
-	if( pv != NULL )
- 800b930:	687b      	ldr	r3, [r7, #4]
- 800b932:	2b00      	cmp	r3, #0
- 800b934:	d04a      	beq.n	800b9cc <vPortFree+0xa8>
-	{
-		/* The memory being freed will have an BlockLink_t structure immediately
-		before it. */
-		puc -= xHeapStructSize;
- 800b936:	2308      	movs	r3, #8
- 800b938:	425b      	negs	r3, r3
- 800b93a:	697a      	ldr	r2, [r7, #20]
- 800b93c:	4413      	add	r3, r2
- 800b93e:	617b      	str	r3, [r7, #20]
-
-		/* This casting is to keep the compiler from issuing warnings. */
-		pxLink = ( void * ) puc;
- 800b940:	697b      	ldr	r3, [r7, #20]
- 800b942:	613b      	str	r3, [r7, #16]
-
-		/* Check the block is actually allocated. */
-		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
- 800b944:	693b      	ldr	r3, [r7, #16]
- 800b946:	685a      	ldr	r2, [r3, #4]
- 800b948:	4b22      	ldr	r3, [pc, #136]	; (800b9d4 <vPortFree+0xb0>)
- 800b94a:	681b      	ldr	r3, [r3, #0]
- 800b94c:	4013      	ands	r3, r2
- 800b94e:	2b00      	cmp	r3, #0
- 800b950:	d10b      	bne.n	800b96a <vPortFree+0x46>
- 800b952:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b956:	b672      	cpsid	i
- 800b958:	f383 8811 	msr	BASEPRI, r3
- 800b95c:	f3bf 8f6f 	isb	sy
- 800b960:	f3bf 8f4f 	dsb	sy
- 800b964:	b662      	cpsie	i
- 800b966:	60fb      	str	r3, [r7, #12]
- 800b968:	e7fe      	b.n	800b968 <vPortFree+0x44>
-		configASSERT( pxLink->pxNextFreeBlock == NULL );
- 800b96a:	693b      	ldr	r3, [r7, #16]
- 800b96c:	681b      	ldr	r3, [r3, #0]
- 800b96e:	2b00      	cmp	r3, #0
- 800b970:	d00b      	beq.n	800b98a <vPortFree+0x66>
- 800b972:	f04f 0350 	mov.w	r3, #80	; 0x50
- 800b976:	b672      	cpsid	i
- 800b978:	f383 8811 	msr	BASEPRI, r3
- 800b97c:	f3bf 8f6f 	isb	sy
- 800b980:	f3bf 8f4f 	dsb	sy
- 800b984:	b662      	cpsie	i
- 800b986:	60bb      	str	r3, [r7, #8]
- 800b988:	e7fe      	b.n	800b988 <vPortFree+0x64>
-
-		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
- 800b98a:	693b      	ldr	r3, [r7, #16]
- 800b98c:	685a      	ldr	r2, [r3, #4]
- 800b98e:	4b11      	ldr	r3, [pc, #68]	; (800b9d4 <vPortFree+0xb0>)
- 800b990:	681b      	ldr	r3, [r3, #0]
- 800b992:	4013      	ands	r3, r2
- 800b994:	2b00      	cmp	r3, #0
- 800b996:	d019      	beq.n	800b9cc <vPortFree+0xa8>
-		{
-			if( pxLink->pxNextFreeBlock == NULL )
- 800b998:	693b      	ldr	r3, [r7, #16]
- 800b99a:	681b      	ldr	r3, [r3, #0]
- 800b99c:	2b00      	cmp	r3, #0
- 800b99e:	d115      	bne.n	800b9cc <vPortFree+0xa8>
-			{
-				/* The block is being returned to the heap - it is no longer
-				allocated. */
-				pxLink->xBlockSize &= ~xBlockAllocatedBit;
- 800b9a0:	693b      	ldr	r3, [r7, #16]
- 800b9a2:	685a      	ldr	r2, [r3, #4]
- 800b9a4:	4b0b      	ldr	r3, [pc, #44]	; (800b9d4 <vPortFree+0xb0>)
- 800b9a6:	681b      	ldr	r3, [r3, #0]
- 800b9a8:	43db      	mvns	r3, r3
- 800b9aa:	401a      	ands	r2, r3
- 800b9ac:	693b      	ldr	r3, [r7, #16]
- 800b9ae:	605a      	str	r2, [r3, #4]
-
-				vTaskSuspendAll();
- 800b9b0:	f7ff fb12 	bl	800afd8 <vTaskSuspendAll>
-				{
-					/* Add this block to the list of free blocks. */
-					xFreeBytesRemaining += pxLink->xBlockSize;
- 800b9b4:	693b      	ldr	r3, [r7, #16]
- 800b9b6:	685a      	ldr	r2, [r3, #4]
- 800b9b8:	4b07      	ldr	r3, [pc, #28]	; (800b9d8 <vPortFree+0xb4>)
- 800b9ba:	681b      	ldr	r3, [r3, #0]
- 800b9bc:	4413      	add	r3, r2
- 800b9be:	4a06      	ldr	r2, [pc, #24]	; (800b9d8 <vPortFree+0xb4>)
- 800b9c0:	6013      	str	r3, [r2, #0]
-					traceFREE( pv, pxLink->xBlockSize );
-					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
- 800b9c2:	6938      	ldr	r0, [r7, #16]
- 800b9c4:	f000 f86c 	bl	800baa0 <prvInsertBlockIntoFreeList>
-				}
-				( void ) xTaskResumeAll();
- 800b9c8:	f7ff fb14 	bl	800aff4 <xTaskResumeAll>
-		else
-		{
-			mtCOVERAGE_TEST_MARKER();
-		}
-	}
-}
- 800b9cc:	bf00      	nop
- 800b9ce:	3718      	adds	r7, #24
- 800b9d0:	46bd      	mov	sp, r7
- 800b9d2:	bd80      	pop	{r7, pc}
- 800b9d4:	2000842c 	.word	0x2000842c
- 800b9d8:	20008424 	.word	0x20008424
-
-0800b9dc <prvHeapInit>:
-	/* This just exists to keep the linker quiet. */
-}
-/*-----------------------------------------------------------*/
-
-static void prvHeapInit( void )
-{
- 800b9dc:	b480      	push	{r7}
- 800b9de:	b085      	sub	sp, #20
- 800b9e0:	af00      	add	r7, sp, #0
-BlockLink_t *pxFirstFreeBlock;
-uint8_t *pucAlignedHeap;
-size_t uxAddress;
-size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
- 800b9e2:	f44f 4300 	mov.w	r3, #32768	; 0x8000
- 800b9e6:	60bb      	str	r3, [r7, #8]
-
-	/* Ensure the heap starts on a correctly aligned boundary. */
-	uxAddress = ( size_t ) ucHeap;
- 800b9e8:	4b27      	ldr	r3, [pc, #156]	; (800ba88 <prvHeapInit+0xac>)
- 800b9ea:	60fb      	str	r3, [r7, #12]
-
-	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
- 800b9ec:	68fb      	ldr	r3, [r7, #12]
- 800b9ee:	f003 0307 	and.w	r3, r3, #7
- 800b9f2:	2b00      	cmp	r3, #0
- 800b9f4:	d00c      	beq.n	800ba10 <prvHeapInit+0x34>
-	{
-		uxAddress += ( portBYTE_ALIGNMENT - 1 );
- 800b9f6:	68fb      	ldr	r3, [r7, #12]
- 800b9f8:	3307      	adds	r3, #7
- 800b9fa:	60fb      	str	r3, [r7, #12]
-		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
- 800b9fc:	68fb      	ldr	r3, [r7, #12]
- 800b9fe:	f023 0307 	bic.w	r3, r3, #7
- 800ba02:	60fb      	str	r3, [r7, #12]
-		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
- 800ba04:	68ba      	ldr	r2, [r7, #8]
- 800ba06:	68fb      	ldr	r3, [r7, #12]
- 800ba08:	1ad3      	subs	r3, r2, r3
- 800ba0a:	4a1f      	ldr	r2, [pc, #124]	; (800ba88 <prvHeapInit+0xac>)
- 800ba0c:	4413      	add	r3, r2
- 800ba0e:	60bb      	str	r3, [r7, #8]
-	}
-
-	pucAlignedHeap = ( uint8_t * ) uxAddress;
- 800ba10:	68fb      	ldr	r3, [r7, #12]
- 800ba12:	607b      	str	r3, [r7, #4]
-
-	/* xStart is used to hold a pointer to the first item in the list of free
-	blocks.  The void cast is used to prevent compiler warnings. */
-	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
- 800ba14:	4a1d      	ldr	r2, [pc, #116]	; (800ba8c <prvHeapInit+0xb0>)
- 800ba16:	687b      	ldr	r3, [r7, #4]
- 800ba18:	6013      	str	r3, [r2, #0]
-	xStart.xBlockSize = ( size_t ) 0;
- 800ba1a:	4b1c      	ldr	r3, [pc, #112]	; (800ba8c <prvHeapInit+0xb0>)
- 800ba1c:	2200      	movs	r2, #0
- 800ba1e:	605a      	str	r2, [r3, #4]
-
-	/* pxEnd is used to mark the end of the list of free blocks and is inserted
-	at the end of the heap space. */
-	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
- 800ba20:	687b      	ldr	r3, [r7, #4]
- 800ba22:	68ba      	ldr	r2, [r7, #8]
- 800ba24:	4413      	add	r3, r2
- 800ba26:	60fb      	str	r3, [r7, #12]
-	uxAddress -= xHeapStructSize;
- 800ba28:	2208      	movs	r2, #8
- 800ba2a:	68fb      	ldr	r3, [r7, #12]
- 800ba2c:	1a9b      	subs	r3, r3, r2
- 800ba2e:	60fb      	str	r3, [r7, #12]
-	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
- 800ba30:	68fb      	ldr	r3, [r7, #12]
- 800ba32:	f023 0307 	bic.w	r3, r3, #7
- 800ba36:	60fb      	str	r3, [r7, #12]
-	pxEnd = ( void * ) uxAddress;
- 800ba38:	68fb      	ldr	r3, [r7, #12]
- 800ba3a:	4a15      	ldr	r2, [pc, #84]	; (800ba90 <prvHeapInit+0xb4>)
- 800ba3c:	6013      	str	r3, [r2, #0]
-	pxEnd->xBlockSize = 0;
- 800ba3e:	4b14      	ldr	r3, [pc, #80]	; (800ba90 <prvHeapInit+0xb4>)
- 800ba40:	681b      	ldr	r3, [r3, #0]
- 800ba42:	2200      	movs	r2, #0
- 800ba44:	605a      	str	r2, [r3, #4]
-	pxEnd->pxNextFreeBlock = NULL;
- 800ba46:	4b12      	ldr	r3, [pc, #72]	; (800ba90 <prvHeapInit+0xb4>)
- 800ba48:	681b      	ldr	r3, [r3, #0]
- 800ba4a:	2200      	movs	r2, #0
- 800ba4c:	601a      	str	r2, [r3, #0]
-
-	/* To start with there is a single free block that is sized to take up the
-	entire heap space, minus the space taken by pxEnd. */
-	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
- 800ba4e:	687b      	ldr	r3, [r7, #4]
- 800ba50:	603b      	str	r3, [r7, #0]
-	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
- 800ba52:	683b      	ldr	r3, [r7, #0]
- 800ba54:	68fa      	ldr	r2, [r7, #12]
- 800ba56:	1ad2      	subs	r2, r2, r3
- 800ba58:	683b      	ldr	r3, [r7, #0]
- 800ba5a:	605a      	str	r2, [r3, #4]
-	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
- 800ba5c:	4b0c      	ldr	r3, [pc, #48]	; (800ba90 <prvHeapInit+0xb4>)
- 800ba5e:	681a      	ldr	r2, [r3, #0]
- 800ba60:	683b      	ldr	r3, [r7, #0]
- 800ba62:	601a      	str	r2, [r3, #0]
-
-	/* Only one block exists - and it covers the entire usable heap space. */
-	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
- 800ba64:	683b      	ldr	r3, [r7, #0]
- 800ba66:	685b      	ldr	r3, [r3, #4]
- 800ba68:	4a0a      	ldr	r2, [pc, #40]	; (800ba94 <prvHeapInit+0xb8>)
- 800ba6a:	6013      	str	r3, [r2, #0]
-	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
- 800ba6c:	683b      	ldr	r3, [r7, #0]
- 800ba6e:	685b      	ldr	r3, [r3, #4]
- 800ba70:	4a09      	ldr	r2, [pc, #36]	; (800ba98 <prvHeapInit+0xbc>)
- 800ba72:	6013      	str	r3, [r2, #0]
-
-	/* Work out the position of the top bit in a size_t variable. */
-	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
- 800ba74:	4b09      	ldr	r3, [pc, #36]	; (800ba9c <prvHeapInit+0xc0>)
- 800ba76:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
- 800ba7a:	601a      	str	r2, [r3, #0]
-}
- 800ba7c:	bf00      	nop
- 800ba7e:	3714      	adds	r7, #20
- 800ba80:	46bd      	mov	sp, r7
- 800ba82:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800ba86:	4770      	bx	lr
- 800ba88:	20000418 	.word	0x20000418
- 800ba8c:	20008418 	.word	0x20008418
- 800ba90:	20008420 	.word	0x20008420
- 800ba94:	20008428 	.word	0x20008428
- 800ba98:	20008424 	.word	0x20008424
- 800ba9c:	2000842c 	.word	0x2000842c
-
-0800baa0 <prvInsertBlockIntoFreeList>:
-/*-----------------------------------------------------------*/
-
-static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
-{
- 800baa0:	b480      	push	{r7}
- 800baa2:	b085      	sub	sp, #20
- 800baa4:	af00      	add	r7, sp, #0
- 800baa6:	6078      	str	r0, [r7, #4]
-BlockLink_t *pxIterator;
-uint8_t *puc;
-
-	/* Iterate through the list until a block is found that has a higher address
-	than the block being inserted. */
-	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
- 800baa8:	4b28      	ldr	r3, [pc, #160]	; (800bb4c <prvInsertBlockIntoFreeList+0xac>)
- 800baaa:	60fb      	str	r3, [r7, #12]
- 800baac:	e002      	b.n	800bab4 <prvInsertBlockIntoFreeList+0x14>
- 800baae:	68fb      	ldr	r3, [r7, #12]
- 800bab0:	681b      	ldr	r3, [r3, #0]
- 800bab2:	60fb      	str	r3, [r7, #12]
- 800bab4:	68fb      	ldr	r3, [r7, #12]
- 800bab6:	681b      	ldr	r3, [r3, #0]
- 800bab8:	687a      	ldr	r2, [r7, #4]
- 800baba:	429a      	cmp	r2, r3
- 800babc:	d8f7      	bhi.n	800baae <prvInsertBlockIntoFreeList+0xe>
-		/* Nothing to do here, just iterate to the right position. */
-	}
-
-	/* Do the block being inserted, and the block it is being inserted after
-	make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxIterator;
- 800babe:	68fb      	ldr	r3, [r7, #12]
- 800bac0:	60bb      	str	r3, [r7, #8]
-	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
- 800bac2:	68fb      	ldr	r3, [r7, #12]
- 800bac4:	685b      	ldr	r3, [r3, #4]
- 800bac6:	68ba      	ldr	r2, [r7, #8]
- 800bac8:	4413      	add	r3, r2
- 800baca:	687a      	ldr	r2, [r7, #4]
- 800bacc:	429a      	cmp	r2, r3
- 800bace:	d108      	bne.n	800bae2 <prvInsertBlockIntoFreeList+0x42>
-	{
-		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
- 800bad0:	68fb      	ldr	r3, [r7, #12]
- 800bad2:	685a      	ldr	r2, [r3, #4]
- 800bad4:	687b      	ldr	r3, [r7, #4]
- 800bad6:	685b      	ldr	r3, [r3, #4]
- 800bad8:	441a      	add	r2, r3
- 800bada:	68fb      	ldr	r3, [r7, #12]
- 800badc:	605a      	str	r2, [r3, #4]
-		pxBlockToInsert = pxIterator;
- 800bade:	68fb      	ldr	r3, [r7, #12]
- 800bae0:	607b      	str	r3, [r7, #4]
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	/* Do the block being inserted, and the block it is being inserted before
-	make a contiguous block of memory? */
-	puc = ( uint8_t * ) pxBlockToInsert;
- 800bae2:	687b      	ldr	r3, [r7, #4]
- 800bae4:	60bb      	str	r3, [r7, #8]
-	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
- 800bae6:	687b      	ldr	r3, [r7, #4]
- 800bae8:	685b      	ldr	r3, [r3, #4]
- 800baea:	68ba      	ldr	r2, [r7, #8]
- 800baec:	441a      	add	r2, r3
- 800baee:	68fb      	ldr	r3, [r7, #12]
- 800baf0:	681b      	ldr	r3, [r3, #0]
- 800baf2:	429a      	cmp	r2, r3
- 800baf4:	d118      	bne.n	800bb28 <prvInsertBlockIntoFreeList+0x88>
-	{
-		if( pxIterator->pxNextFreeBlock != pxEnd )
- 800baf6:	68fb      	ldr	r3, [r7, #12]
- 800baf8:	681a      	ldr	r2, [r3, #0]
- 800bafa:	4b15      	ldr	r3, [pc, #84]	; (800bb50 <prvInsertBlockIntoFreeList+0xb0>)
- 800bafc:	681b      	ldr	r3, [r3, #0]
- 800bafe:	429a      	cmp	r2, r3
- 800bb00:	d00d      	beq.n	800bb1e <prvInsertBlockIntoFreeList+0x7e>
-		{
-			/* Form one big block from the two blocks. */
-			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
- 800bb02:	687b      	ldr	r3, [r7, #4]
- 800bb04:	685a      	ldr	r2, [r3, #4]
- 800bb06:	68fb      	ldr	r3, [r7, #12]
- 800bb08:	681b      	ldr	r3, [r3, #0]
- 800bb0a:	685b      	ldr	r3, [r3, #4]
- 800bb0c:	441a      	add	r2, r3
- 800bb0e:	687b      	ldr	r3, [r7, #4]
- 800bb10:	605a      	str	r2, [r3, #4]
-			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
- 800bb12:	68fb      	ldr	r3, [r7, #12]
- 800bb14:	681b      	ldr	r3, [r3, #0]
- 800bb16:	681a      	ldr	r2, [r3, #0]
- 800bb18:	687b      	ldr	r3, [r7, #4]
- 800bb1a:	601a      	str	r2, [r3, #0]
- 800bb1c:	e008      	b.n	800bb30 <prvInsertBlockIntoFreeList+0x90>
-		}
-		else
-		{
-			pxBlockToInsert->pxNextFreeBlock = pxEnd;
- 800bb1e:	4b0c      	ldr	r3, [pc, #48]	; (800bb50 <prvInsertBlockIntoFreeList+0xb0>)
- 800bb20:	681a      	ldr	r2, [r3, #0]
- 800bb22:	687b      	ldr	r3, [r7, #4]
- 800bb24:	601a      	str	r2, [r3, #0]
- 800bb26:	e003      	b.n	800bb30 <prvInsertBlockIntoFreeList+0x90>
-		}
-	}
-	else
-	{
-		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
- 800bb28:	68fb      	ldr	r3, [r7, #12]
- 800bb2a:	681a      	ldr	r2, [r3, #0]
- 800bb2c:	687b      	ldr	r3, [r7, #4]
- 800bb2e:	601a      	str	r2, [r3, #0]
-
-	/* If the block being inserted plugged a gab, so was merged with the block
-	before and the block after, then it's pxNextFreeBlock pointer will have
-	already been set, and should not be set here as that would make it point
-	to itself. */
-	if( pxIterator != pxBlockToInsert )
- 800bb30:	68fa      	ldr	r2, [r7, #12]
- 800bb32:	687b      	ldr	r3, [r7, #4]
- 800bb34:	429a      	cmp	r2, r3
- 800bb36:	d002      	beq.n	800bb3e <prvInsertBlockIntoFreeList+0x9e>
-	{
-		pxIterator->pxNextFreeBlock = pxBlockToInsert;
- 800bb38:	68fb      	ldr	r3, [r7, #12]
- 800bb3a:	687a      	ldr	r2, [r7, #4]
- 800bb3c:	601a      	str	r2, [r3, #0]
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-}
- 800bb3e:	bf00      	nop
- 800bb40:	3714      	adds	r7, #20
- 800bb42:	46bd      	mov	sp, r7
- 800bb44:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800bb48:	4770      	bx	lr
- 800bb4a:	bf00      	nop
- 800bb4c:	20008418 	.word	0x20008418
- 800bb50:	20008420 	.word	0x20008420
-
-0800bb54 <__errno>:
- 800bb54:	4b01      	ldr	r3, [pc, #4]	; (800bb5c <__errno+0x8>)
- 800bb56:	6818      	ldr	r0, [r3, #0]
- 800bb58:	4770      	bx	lr
- 800bb5a:	bf00      	nop
- 800bb5c:	2000004c 	.word	0x2000004c
-
-0800bb60 <__libc_init_array>:
- 800bb60:	b570      	push	{r4, r5, r6, lr}
- 800bb62:	4e0d      	ldr	r6, [pc, #52]	; (800bb98 <__libc_init_array+0x38>)
- 800bb64:	4c0d      	ldr	r4, [pc, #52]	; (800bb9c <__libc_init_array+0x3c>)
- 800bb66:	1ba4      	subs	r4, r4, r6
- 800bb68:	10a4      	asrs	r4, r4, #2
- 800bb6a:	2500      	movs	r5, #0
- 800bb6c:	42a5      	cmp	r5, r4
- 800bb6e:	d109      	bne.n	800bb84 <__libc_init_array+0x24>
- 800bb70:	4e0b      	ldr	r6, [pc, #44]	; (800bba0 <__libc_init_array+0x40>)
- 800bb72:	4c0c      	ldr	r4, [pc, #48]	; (800bba4 <__libc_init_array+0x44>)
- 800bb74:	f000 fc28 	bl	800c3c8 <_init>
- 800bb78:	1ba4      	subs	r4, r4, r6
- 800bb7a:	10a4      	asrs	r4, r4, #2
- 800bb7c:	2500      	movs	r5, #0
- 800bb7e:	42a5      	cmp	r5, r4
- 800bb80:	d105      	bne.n	800bb8e <__libc_init_array+0x2e>
- 800bb82:	bd70      	pop	{r4, r5, r6, pc}
- 800bb84:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
- 800bb88:	4798      	blx	r3
- 800bb8a:	3501      	adds	r5, #1
- 800bb8c:	e7ee      	b.n	800bb6c <__libc_init_array+0xc>
- 800bb8e:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
- 800bb92:	4798      	blx	r3
- 800bb94:	3501      	adds	r5, #1
- 800bb96:	e7f2      	b.n	800bb7e <__libc_init_array+0x1e>
- 800bb98:	0800e3cc 	.word	0x0800e3cc
- 800bb9c:	0800e3cc 	.word	0x0800e3cc
- 800bba0:	0800e3cc 	.word	0x0800e3cc
- 800bba4:	0800e3d0 	.word	0x0800e3d0
-
-0800bba8 <memcpy>:
- 800bba8:	b510      	push	{r4, lr}
- 800bbaa:	1e43      	subs	r3, r0, #1
- 800bbac:	440a      	add	r2, r1
- 800bbae:	4291      	cmp	r1, r2
- 800bbb0:	d100      	bne.n	800bbb4 <memcpy+0xc>
- 800bbb2:	bd10      	pop	{r4, pc}
- 800bbb4:	f811 4b01 	ldrb.w	r4, [r1], #1
- 800bbb8:	f803 4f01 	strb.w	r4, [r3, #1]!
- 800bbbc:	e7f7      	b.n	800bbae <memcpy+0x6>
-
-0800bbbe <memset>:
- 800bbbe:	4402      	add	r2, r0
- 800bbc0:	4603      	mov	r3, r0
- 800bbc2:	4293      	cmp	r3, r2
- 800bbc4:	d100      	bne.n	800bbc8 <memset+0xa>
- 800bbc6:	4770      	bx	lr
- 800bbc8:	f803 1b01 	strb.w	r1, [r3], #1
- 800bbcc:	e7f9      	b.n	800bbc2 <memset+0x4>
-	...
-
-0800bbd0 <siprintf>:
- 800bbd0:	b40e      	push	{r1, r2, r3}
- 800bbd2:	b500      	push	{lr}
- 800bbd4:	b09c      	sub	sp, #112	; 0x70
- 800bbd6:	ab1d      	add	r3, sp, #116	; 0x74
- 800bbd8:	9002      	str	r0, [sp, #8]
- 800bbda:	9006      	str	r0, [sp, #24]
- 800bbdc:	f06f 4100 	mvn.w	r1, #2147483648	; 0x80000000
- 800bbe0:	4809      	ldr	r0, [pc, #36]	; (800bc08 <siprintf+0x38>)
- 800bbe2:	9107      	str	r1, [sp, #28]
- 800bbe4:	9104      	str	r1, [sp, #16]
- 800bbe6:	4909      	ldr	r1, [pc, #36]	; (800bc0c <siprintf+0x3c>)
- 800bbe8:	f853 2b04 	ldr.w	r2, [r3], #4
- 800bbec:	9105      	str	r1, [sp, #20]
- 800bbee:	6800      	ldr	r0, [r0, #0]
- 800bbf0:	9301      	str	r3, [sp, #4]
- 800bbf2:	a902      	add	r1, sp, #8
- 800bbf4:	f000 f866 	bl	800bcc4 <_svfiprintf_r>
- 800bbf8:	9b02      	ldr	r3, [sp, #8]
- 800bbfa:	2200      	movs	r2, #0
- 800bbfc:	701a      	strb	r2, [r3, #0]
- 800bbfe:	b01c      	add	sp, #112	; 0x70
- 800bc00:	f85d eb04 	ldr.w	lr, [sp], #4
- 800bc04:	b003      	add	sp, #12
- 800bc06:	4770      	bx	lr
- 800bc08:	2000004c 	.word	0x2000004c
- 800bc0c:	ffff0208 	.word	0xffff0208
-
-0800bc10 <__ssputs_r>:
- 800bc10:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 800bc14:	688e      	ldr	r6, [r1, #8]
- 800bc16:	429e      	cmp	r6, r3
- 800bc18:	4682      	mov	sl, r0
- 800bc1a:	460c      	mov	r4, r1
- 800bc1c:	4690      	mov	r8, r2
- 800bc1e:	4699      	mov	r9, r3
- 800bc20:	d837      	bhi.n	800bc92 <__ssputs_r+0x82>
- 800bc22:	898a      	ldrh	r2, [r1, #12]
- 800bc24:	f412 6f90 	tst.w	r2, #1152	; 0x480
- 800bc28:	d031      	beq.n	800bc8e <__ssputs_r+0x7e>
- 800bc2a:	6825      	ldr	r5, [r4, #0]
- 800bc2c:	6909      	ldr	r1, [r1, #16]
- 800bc2e:	1a6f      	subs	r7, r5, r1
- 800bc30:	6965      	ldr	r5, [r4, #20]
- 800bc32:	2302      	movs	r3, #2
- 800bc34:	eb05 0545 	add.w	r5, r5, r5, lsl #1
- 800bc38:	fb95 f5f3 	sdiv	r5, r5, r3
- 800bc3c:	f109 0301 	add.w	r3, r9, #1
- 800bc40:	443b      	add	r3, r7
- 800bc42:	429d      	cmp	r5, r3
- 800bc44:	bf38      	it	cc
- 800bc46:	461d      	movcc	r5, r3
- 800bc48:	0553      	lsls	r3, r2, #21
- 800bc4a:	d530      	bpl.n	800bcae <__ssputs_r+0x9e>
- 800bc4c:	4629      	mov	r1, r5
- 800bc4e:	f000 fb21 	bl	800c294 <_malloc_r>
- 800bc52:	4606      	mov	r6, r0
- 800bc54:	b950      	cbnz	r0, 800bc6c <__ssputs_r+0x5c>
- 800bc56:	230c      	movs	r3, #12
- 800bc58:	f8ca 3000 	str.w	r3, [sl]
- 800bc5c:	89a3      	ldrh	r3, [r4, #12]
- 800bc5e:	f043 0340 	orr.w	r3, r3, #64	; 0x40
- 800bc62:	81a3      	strh	r3, [r4, #12]
- 800bc64:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
- 800bc68:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 800bc6c:	463a      	mov	r2, r7
- 800bc6e:	6921      	ldr	r1, [r4, #16]
- 800bc70:	f7ff ff9a 	bl	800bba8 <memcpy>
- 800bc74:	89a3      	ldrh	r3, [r4, #12]
- 800bc76:	f423 6390 	bic.w	r3, r3, #1152	; 0x480
- 800bc7a:	f043 0380 	orr.w	r3, r3, #128	; 0x80
- 800bc7e:	81a3      	strh	r3, [r4, #12]
- 800bc80:	6126      	str	r6, [r4, #16]
- 800bc82:	6165      	str	r5, [r4, #20]
- 800bc84:	443e      	add	r6, r7
- 800bc86:	1bed      	subs	r5, r5, r7
- 800bc88:	6026      	str	r6, [r4, #0]
- 800bc8a:	60a5      	str	r5, [r4, #8]
- 800bc8c:	464e      	mov	r6, r9
- 800bc8e:	454e      	cmp	r6, r9
- 800bc90:	d900      	bls.n	800bc94 <__ssputs_r+0x84>
- 800bc92:	464e      	mov	r6, r9
- 800bc94:	4632      	mov	r2, r6
- 800bc96:	4641      	mov	r1, r8
- 800bc98:	6820      	ldr	r0, [r4, #0]
- 800bc9a:	f000 fa93 	bl	800c1c4 <memmove>
- 800bc9e:	68a3      	ldr	r3, [r4, #8]
- 800bca0:	1b9b      	subs	r3, r3, r6
- 800bca2:	60a3      	str	r3, [r4, #8]
- 800bca4:	6823      	ldr	r3, [r4, #0]
- 800bca6:	441e      	add	r6, r3
- 800bca8:	6026      	str	r6, [r4, #0]
- 800bcaa:	2000      	movs	r0, #0
- 800bcac:	e7dc      	b.n	800bc68 <__ssputs_r+0x58>
- 800bcae:	462a      	mov	r2, r5
- 800bcb0:	f000 fb4a 	bl	800c348 <_realloc_r>
- 800bcb4:	4606      	mov	r6, r0
- 800bcb6:	2800      	cmp	r0, #0
- 800bcb8:	d1e2      	bne.n	800bc80 <__ssputs_r+0x70>
- 800bcba:	6921      	ldr	r1, [r4, #16]
- 800bcbc:	4650      	mov	r0, sl
- 800bcbe:	f000 fa9b 	bl	800c1f8 <_free_r>
- 800bcc2:	e7c8      	b.n	800bc56 <__ssputs_r+0x46>
-
-0800bcc4 <_svfiprintf_r>:
- 800bcc4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800bcc8:	461d      	mov	r5, r3
- 800bcca:	898b      	ldrh	r3, [r1, #12]
- 800bccc:	061f      	lsls	r7, r3, #24
- 800bcce:	b09d      	sub	sp, #116	; 0x74
- 800bcd0:	4680      	mov	r8, r0
- 800bcd2:	460c      	mov	r4, r1
- 800bcd4:	4616      	mov	r6, r2
- 800bcd6:	d50f      	bpl.n	800bcf8 <_svfiprintf_r+0x34>
- 800bcd8:	690b      	ldr	r3, [r1, #16]
- 800bcda:	b96b      	cbnz	r3, 800bcf8 <_svfiprintf_r+0x34>
- 800bcdc:	2140      	movs	r1, #64	; 0x40
- 800bcde:	f000 fad9 	bl	800c294 <_malloc_r>
- 800bce2:	6020      	str	r0, [r4, #0]
- 800bce4:	6120      	str	r0, [r4, #16]
- 800bce6:	b928      	cbnz	r0, 800bcf4 <_svfiprintf_r+0x30>
- 800bce8:	230c      	movs	r3, #12
- 800bcea:	f8c8 3000 	str.w	r3, [r8]
- 800bcee:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
- 800bcf2:	e0c8      	b.n	800be86 <_svfiprintf_r+0x1c2>
- 800bcf4:	2340      	movs	r3, #64	; 0x40
- 800bcf6:	6163      	str	r3, [r4, #20]
- 800bcf8:	2300      	movs	r3, #0
- 800bcfa:	9309      	str	r3, [sp, #36]	; 0x24
- 800bcfc:	2320      	movs	r3, #32
- 800bcfe:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
- 800bd02:	2330      	movs	r3, #48	; 0x30
- 800bd04:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
- 800bd08:	9503      	str	r5, [sp, #12]
- 800bd0a:	f04f 0b01 	mov.w	fp, #1
- 800bd0e:	4637      	mov	r7, r6
- 800bd10:	463d      	mov	r5, r7
- 800bd12:	f815 3b01 	ldrb.w	r3, [r5], #1
- 800bd16:	b10b      	cbz	r3, 800bd1c <_svfiprintf_r+0x58>
- 800bd18:	2b25      	cmp	r3, #37	; 0x25
- 800bd1a:	d13e      	bne.n	800bd9a <_svfiprintf_r+0xd6>
- 800bd1c:	ebb7 0a06 	subs.w	sl, r7, r6
- 800bd20:	d00b      	beq.n	800bd3a <_svfiprintf_r+0x76>
- 800bd22:	4653      	mov	r3, sl
- 800bd24:	4632      	mov	r2, r6
- 800bd26:	4621      	mov	r1, r4
- 800bd28:	4640      	mov	r0, r8
- 800bd2a:	f7ff ff71 	bl	800bc10 <__ssputs_r>
- 800bd2e:	3001      	adds	r0, #1
- 800bd30:	f000 80a4 	beq.w	800be7c <_svfiprintf_r+0x1b8>
- 800bd34:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 800bd36:	4453      	add	r3, sl
- 800bd38:	9309      	str	r3, [sp, #36]	; 0x24
- 800bd3a:	783b      	ldrb	r3, [r7, #0]
- 800bd3c:	2b00      	cmp	r3, #0
- 800bd3e:	f000 809d 	beq.w	800be7c <_svfiprintf_r+0x1b8>
- 800bd42:	2300      	movs	r3, #0
- 800bd44:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
- 800bd48:	e9cd 2305 	strd	r2, r3, [sp, #20]
- 800bd4c:	9304      	str	r3, [sp, #16]
- 800bd4e:	9307      	str	r3, [sp, #28]
- 800bd50:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
- 800bd54:	931a      	str	r3, [sp, #104]	; 0x68
- 800bd56:	462f      	mov	r7, r5
- 800bd58:	2205      	movs	r2, #5
- 800bd5a:	f817 1b01 	ldrb.w	r1, [r7], #1
- 800bd5e:	4850      	ldr	r0, [pc, #320]	; (800bea0 <_svfiprintf_r+0x1dc>)
- 800bd60:	f7f4 fa56 	bl	8000210 <memchr>
- 800bd64:	9b04      	ldr	r3, [sp, #16]
- 800bd66:	b9d0      	cbnz	r0, 800bd9e <_svfiprintf_r+0xda>
- 800bd68:	06d9      	lsls	r1, r3, #27
- 800bd6a:	bf44      	itt	mi
- 800bd6c:	2220      	movmi	r2, #32
- 800bd6e:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
- 800bd72:	071a      	lsls	r2, r3, #28
- 800bd74:	bf44      	itt	mi
- 800bd76:	222b      	movmi	r2, #43	; 0x2b
- 800bd78:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
- 800bd7c:	782a      	ldrb	r2, [r5, #0]
- 800bd7e:	2a2a      	cmp	r2, #42	; 0x2a
- 800bd80:	d015      	beq.n	800bdae <_svfiprintf_r+0xea>
- 800bd82:	9a07      	ldr	r2, [sp, #28]
- 800bd84:	462f      	mov	r7, r5
- 800bd86:	2000      	movs	r0, #0
- 800bd88:	250a      	movs	r5, #10
- 800bd8a:	4639      	mov	r1, r7
- 800bd8c:	f811 3b01 	ldrb.w	r3, [r1], #1
- 800bd90:	3b30      	subs	r3, #48	; 0x30
- 800bd92:	2b09      	cmp	r3, #9
- 800bd94:	d94d      	bls.n	800be32 <_svfiprintf_r+0x16e>
- 800bd96:	b1b8      	cbz	r0, 800bdc8 <_svfiprintf_r+0x104>
- 800bd98:	e00f      	b.n	800bdba <_svfiprintf_r+0xf6>
- 800bd9a:	462f      	mov	r7, r5
- 800bd9c:	e7b8      	b.n	800bd10 <_svfiprintf_r+0x4c>
- 800bd9e:	4a40      	ldr	r2, [pc, #256]	; (800bea0 <_svfiprintf_r+0x1dc>)
- 800bda0:	1a80      	subs	r0, r0, r2
- 800bda2:	fa0b f000 	lsl.w	r0, fp, r0
- 800bda6:	4318      	orrs	r0, r3
- 800bda8:	9004      	str	r0, [sp, #16]
- 800bdaa:	463d      	mov	r5, r7
- 800bdac:	e7d3      	b.n	800bd56 <_svfiprintf_r+0x92>
- 800bdae:	9a03      	ldr	r2, [sp, #12]
- 800bdb0:	1d11      	adds	r1, r2, #4
- 800bdb2:	6812      	ldr	r2, [r2, #0]
- 800bdb4:	9103      	str	r1, [sp, #12]
- 800bdb6:	2a00      	cmp	r2, #0
- 800bdb8:	db01      	blt.n	800bdbe <_svfiprintf_r+0xfa>
- 800bdba:	9207      	str	r2, [sp, #28]
- 800bdbc:	e004      	b.n	800bdc8 <_svfiprintf_r+0x104>
- 800bdbe:	4252      	negs	r2, r2
- 800bdc0:	f043 0302 	orr.w	r3, r3, #2
- 800bdc4:	9207      	str	r2, [sp, #28]
- 800bdc6:	9304      	str	r3, [sp, #16]
- 800bdc8:	783b      	ldrb	r3, [r7, #0]
- 800bdca:	2b2e      	cmp	r3, #46	; 0x2e
- 800bdcc:	d10c      	bne.n	800bde8 <_svfiprintf_r+0x124>
- 800bdce:	787b      	ldrb	r3, [r7, #1]
- 800bdd0:	2b2a      	cmp	r3, #42	; 0x2a
- 800bdd2:	d133      	bne.n	800be3c <_svfiprintf_r+0x178>
- 800bdd4:	9b03      	ldr	r3, [sp, #12]
- 800bdd6:	1d1a      	adds	r2, r3, #4
- 800bdd8:	681b      	ldr	r3, [r3, #0]
- 800bdda:	9203      	str	r2, [sp, #12]
- 800bddc:	2b00      	cmp	r3, #0
- 800bdde:	bfb8      	it	lt
- 800bde0:	f04f 33ff 	movlt.w	r3, #4294967295	; 0xffffffff
- 800bde4:	3702      	adds	r7, #2
- 800bde6:	9305      	str	r3, [sp, #20]
- 800bde8:	4d2e      	ldr	r5, [pc, #184]	; (800bea4 <_svfiprintf_r+0x1e0>)
- 800bdea:	7839      	ldrb	r1, [r7, #0]
- 800bdec:	2203      	movs	r2, #3
- 800bdee:	4628      	mov	r0, r5
- 800bdf0:	f7f4 fa0e 	bl	8000210 <memchr>
- 800bdf4:	b138      	cbz	r0, 800be06 <_svfiprintf_r+0x142>
- 800bdf6:	2340      	movs	r3, #64	; 0x40
- 800bdf8:	1b40      	subs	r0, r0, r5
- 800bdfa:	fa03 f000 	lsl.w	r0, r3, r0
- 800bdfe:	9b04      	ldr	r3, [sp, #16]
- 800be00:	4303      	orrs	r3, r0
- 800be02:	3701      	adds	r7, #1
- 800be04:	9304      	str	r3, [sp, #16]
- 800be06:	7839      	ldrb	r1, [r7, #0]
- 800be08:	4827      	ldr	r0, [pc, #156]	; (800bea8 <_svfiprintf_r+0x1e4>)
- 800be0a:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
- 800be0e:	2206      	movs	r2, #6
- 800be10:	1c7e      	adds	r6, r7, #1
- 800be12:	f7f4 f9fd 	bl	8000210 <memchr>
- 800be16:	2800      	cmp	r0, #0
- 800be18:	d038      	beq.n	800be8c <_svfiprintf_r+0x1c8>
- 800be1a:	4b24      	ldr	r3, [pc, #144]	; (800beac <_svfiprintf_r+0x1e8>)
- 800be1c:	bb13      	cbnz	r3, 800be64 <_svfiprintf_r+0x1a0>
- 800be1e:	9b03      	ldr	r3, [sp, #12]
- 800be20:	3307      	adds	r3, #7
- 800be22:	f023 0307 	bic.w	r3, r3, #7
- 800be26:	3308      	adds	r3, #8
- 800be28:	9303      	str	r3, [sp, #12]
- 800be2a:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 800be2c:	444b      	add	r3, r9
- 800be2e:	9309      	str	r3, [sp, #36]	; 0x24
- 800be30:	e76d      	b.n	800bd0e <_svfiprintf_r+0x4a>
- 800be32:	fb05 3202 	mla	r2, r5, r2, r3
- 800be36:	2001      	movs	r0, #1
- 800be38:	460f      	mov	r7, r1
- 800be3a:	e7a6      	b.n	800bd8a <_svfiprintf_r+0xc6>
- 800be3c:	2300      	movs	r3, #0
- 800be3e:	3701      	adds	r7, #1
- 800be40:	9305      	str	r3, [sp, #20]
- 800be42:	4619      	mov	r1, r3
- 800be44:	250a      	movs	r5, #10
- 800be46:	4638      	mov	r0, r7
- 800be48:	f810 2b01 	ldrb.w	r2, [r0], #1
- 800be4c:	3a30      	subs	r2, #48	; 0x30
- 800be4e:	2a09      	cmp	r2, #9
- 800be50:	d903      	bls.n	800be5a <_svfiprintf_r+0x196>
- 800be52:	2b00      	cmp	r3, #0
- 800be54:	d0c8      	beq.n	800bde8 <_svfiprintf_r+0x124>
- 800be56:	9105      	str	r1, [sp, #20]
- 800be58:	e7c6      	b.n	800bde8 <_svfiprintf_r+0x124>
- 800be5a:	fb05 2101 	mla	r1, r5, r1, r2
- 800be5e:	2301      	movs	r3, #1
- 800be60:	4607      	mov	r7, r0
- 800be62:	e7f0      	b.n	800be46 <_svfiprintf_r+0x182>
- 800be64:	ab03      	add	r3, sp, #12
- 800be66:	9300      	str	r3, [sp, #0]
- 800be68:	4622      	mov	r2, r4
- 800be6a:	4b11      	ldr	r3, [pc, #68]	; (800beb0 <_svfiprintf_r+0x1ec>)
- 800be6c:	a904      	add	r1, sp, #16
- 800be6e:	4640      	mov	r0, r8
- 800be70:	f3af 8000 	nop.w
- 800be74:	f1b0 3fff 	cmp.w	r0, #4294967295	; 0xffffffff
- 800be78:	4681      	mov	r9, r0
- 800be7a:	d1d6      	bne.n	800be2a <_svfiprintf_r+0x166>
- 800be7c:	89a3      	ldrh	r3, [r4, #12]
- 800be7e:	065b      	lsls	r3, r3, #25
- 800be80:	f53f af35 	bmi.w	800bcee <_svfiprintf_r+0x2a>
- 800be84:	9809      	ldr	r0, [sp, #36]	; 0x24
- 800be86:	b01d      	add	sp, #116	; 0x74
- 800be88:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800be8c:	ab03      	add	r3, sp, #12
- 800be8e:	9300      	str	r3, [sp, #0]
- 800be90:	4622      	mov	r2, r4
- 800be92:	4b07      	ldr	r3, [pc, #28]	; (800beb0 <_svfiprintf_r+0x1ec>)
- 800be94:	a904      	add	r1, sp, #16
- 800be96:	4640      	mov	r0, r8
- 800be98:	f000 f882 	bl	800bfa0 <_printf_i>
- 800be9c:	e7ea      	b.n	800be74 <_svfiprintf_r+0x1b0>
- 800be9e:	bf00      	nop
- 800bea0:	0800e390 	.word	0x0800e390
- 800bea4:	0800e396 	.word	0x0800e396
- 800bea8:	0800e39a 	.word	0x0800e39a
- 800beac:	00000000 	.word	0x00000000
- 800beb0:	0800bc11 	.word	0x0800bc11
-
-0800beb4 <_printf_common>:
- 800beb4:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 800beb8:	4691      	mov	r9, r2
- 800beba:	461f      	mov	r7, r3
- 800bebc:	688a      	ldr	r2, [r1, #8]
- 800bebe:	690b      	ldr	r3, [r1, #16]
- 800bec0:	f8dd 8020 	ldr.w	r8, [sp, #32]
- 800bec4:	4293      	cmp	r3, r2
- 800bec6:	bfb8      	it	lt
- 800bec8:	4613      	movlt	r3, r2
- 800beca:	f8c9 3000 	str.w	r3, [r9]
- 800bece:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
- 800bed2:	4606      	mov	r6, r0
- 800bed4:	460c      	mov	r4, r1
- 800bed6:	b112      	cbz	r2, 800bede <_printf_common+0x2a>
- 800bed8:	3301      	adds	r3, #1
- 800beda:	f8c9 3000 	str.w	r3, [r9]
- 800bede:	6823      	ldr	r3, [r4, #0]
- 800bee0:	0699      	lsls	r1, r3, #26
- 800bee2:	bf42      	ittt	mi
- 800bee4:	f8d9 3000 	ldrmi.w	r3, [r9]
- 800bee8:	3302      	addmi	r3, #2
- 800beea:	f8c9 3000 	strmi.w	r3, [r9]
- 800beee:	6825      	ldr	r5, [r4, #0]
- 800bef0:	f015 0506 	ands.w	r5, r5, #6
- 800bef4:	d107      	bne.n	800bf06 <_printf_common+0x52>
- 800bef6:	f104 0a19 	add.w	sl, r4, #25
- 800befa:	68e3      	ldr	r3, [r4, #12]
- 800befc:	f8d9 2000 	ldr.w	r2, [r9]
- 800bf00:	1a9b      	subs	r3, r3, r2
- 800bf02:	42ab      	cmp	r3, r5
- 800bf04:	dc28      	bgt.n	800bf58 <_printf_common+0xa4>
- 800bf06:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
- 800bf0a:	6822      	ldr	r2, [r4, #0]
- 800bf0c:	3300      	adds	r3, #0
- 800bf0e:	bf18      	it	ne
- 800bf10:	2301      	movne	r3, #1
- 800bf12:	0692      	lsls	r2, r2, #26
- 800bf14:	d42d      	bmi.n	800bf72 <_printf_common+0xbe>
- 800bf16:	f104 0243 	add.w	r2, r4, #67	; 0x43
- 800bf1a:	4639      	mov	r1, r7
- 800bf1c:	4630      	mov	r0, r6
- 800bf1e:	47c0      	blx	r8
- 800bf20:	3001      	adds	r0, #1
- 800bf22:	d020      	beq.n	800bf66 <_printf_common+0xb2>
- 800bf24:	6823      	ldr	r3, [r4, #0]
- 800bf26:	68e5      	ldr	r5, [r4, #12]
- 800bf28:	f8d9 2000 	ldr.w	r2, [r9]
- 800bf2c:	f003 0306 	and.w	r3, r3, #6
- 800bf30:	2b04      	cmp	r3, #4
- 800bf32:	bf08      	it	eq
- 800bf34:	1aad      	subeq	r5, r5, r2
- 800bf36:	68a3      	ldr	r3, [r4, #8]
- 800bf38:	6922      	ldr	r2, [r4, #16]
- 800bf3a:	bf0c      	ite	eq
- 800bf3c:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
- 800bf40:	2500      	movne	r5, #0
- 800bf42:	4293      	cmp	r3, r2
- 800bf44:	bfc4      	itt	gt
- 800bf46:	1a9b      	subgt	r3, r3, r2
- 800bf48:	18ed      	addgt	r5, r5, r3
- 800bf4a:	f04f 0900 	mov.w	r9, #0
- 800bf4e:	341a      	adds	r4, #26
- 800bf50:	454d      	cmp	r5, r9
- 800bf52:	d11a      	bne.n	800bf8a <_printf_common+0xd6>
- 800bf54:	2000      	movs	r0, #0
- 800bf56:	e008      	b.n	800bf6a <_printf_common+0xb6>
- 800bf58:	2301      	movs	r3, #1
- 800bf5a:	4652      	mov	r2, sl
- 800bf5c:	4639      	mov	r1, r7
- 800bf5e:	4630      	mov	r0, r6
- 800bf60:	47c0      	blx	r8
- 800bf62:	3001      	adds	r0, #1
- 800bf64:	d103      	bne.n	800bf6e <_printf_common+0xba>
- 800bf66:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
- 800bf6a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 800bf6e:	3501      	adds	r5, #1
- 800bf70:	e7c3      	b.n	800befa <_printf_common+0x46>
- 800bf72:	18e1      	adds	r1, r4, r3
- 800bf74:	1c5a      	adds	r2, r3, #1
- 800bf76:	2030      	movs	r0, #48	; 0x30
- 800bf78:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
- 800bf7c:	4422      	add	r2, r4
- 800bf7e:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
- 800bf82:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
- 800bf86:	3302      	adds	r3, #2
- 800bf88:	e7c5      	b.n	800bf16 <_printf_common+0x62>
- 800bf8a:	2301      	movs	r3, #1
- 800bf8c:	4622      	mov	r2, r4
- 800bf8e:	4639      	mov	r1, r7
- 800bf90:	4630      	mov	r0, r6
- 800bf92:	47c0      	blx	r8
- 800bf94:	3001      	adds	r0, #1
- 800bf96:	d0e6      	beq.n	800bf66 <_printf_common+0xb2>
- 800bf98:	f109 0901 	add.w	r9, r9, #1
- 800bf9c:	e7d8      	b.n	800bf50 <_printf_common+0x9c>
-	...
-
-0800bfa0 <_printf_i>:
- 800bfa0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
- 800bfa4:	f101 0c43 	add.w	ip, r1, #67	; 0x43
- 800bfa8:	460c      	mov	r4, r1
- 800bfaa:	7e09      	ldrb	r1, [r1, #24]
- 800bfac:	b085      	sub	sp, #20
- 800bfae:	296e      	cmp	r1, #110	; 0x6e
- 800bfb0:	4617      	mov	r7, r2
- 800bfb2:	4606      	mov	r6, r0
- 800bfb4:	4698      	mov	r8, r3
- 800bfb6:	9a0c      	ldr	r2, [sp, #48]	; 0x30
- 800bfb8:	f000 80b3 	beq.w	800c122 <_printf_i+0x182>
- 800bfbc:	d822      	bhi.n	800c004 <_printf_i+0x64>
- 800bfbe:	2963      	cmp	r1, #99	; 0x63
- 800bfc0:	d036      	beq.n	800c030 <_printf_i+0x90>
- 800bfc2:	d80a      	bhi.n	800bfda <_printf_i+0x3a>
- 800bfc4:	2900      	cmp	r1, #0
- 800bfc6:	f000 80b9 	beq.w	800c13c <_printf_i+0x19c>
- 800bfca:	2958      	cmp	r1, #88	; 0x58
- 800bfcc:	f000 8083 	beq.w	800c0d6 <_printf_i+0x136>
- 800bfd0:	f104 0542 	add.w	r5, r4, #66	; 0x42
- 800bfd4:	f884 1042 	strb.w	r1, [r4, #66]	; 0x42
- 800bfd8:	e032      	b.n	800c040 <_printf_i+0xa0>
- 800bfda:	2964      	cmp	r1, #100	; 0x64
- 800bfdc:	d001      	beq.n	800bfe2 <_printf_i+0x42>
- 800bfde:	2969      	cmp	r1, #105	; 0x69
- 800bfe0:	d1f6      	bne.n	800bfd0 <_printf_i+0x30>
- 800bfe2:	6820      	ldr	r0, [r4, #0]
- 800bfe4:	6813      	ldr	r3, [r2, #0]
- 800bfe6:	0605      	lsls	r5, r0, #24
- 800bfe8:	f103 0104 	add.w	r1, r3, #4
- 800bfec:	d52a      	bpl.n	800c044 <_printf_i+0xa4>
- 800bfee:	681b      	ldr	r3, [r3, #0]
- 800bff0:	6011      	str	r1, [r2, #0]
- 800bff2:	2b00      	cmp	r3, #0
- 800bff4:	da03      	bge.n	800bffe <_printf_i+0x5e>
- 800bff6:	222d      	movs	r2, #45	; 0x2d
- 800bff8:	425b      	negs	r3, r3
- 800bffa:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
- 800bffe:	486f      	ldr	r0, [pc, #444]	; (800c1bc <_printf_i+0x21c>)
- 800c000:	220a      	movs	r2, #10
- 800c002:	e039      	b.n	800c078 <_printf_i+0xd8>
- 800c004:	2973      	cmp	r1, #115	; 0x73
- 800c006:	f000 809d 	beq.w	800c144 <_printf_i+0x1a4>
- 800c00a:	d808      	bhi.n	800c01e <_printf_i+0x7e>
- 800c00c:	296f      	cmp	r1, #111	; 0x6f
- 800c00e:	d020      	beq.n	800c052 <_printf_i+0xb2>
- 800c010:	2970      	cmp	r1, #112	; 0x70
- 800c012:	d1dd      	bne.n	800bfd0 <_printf_i+0x30>
- 800c014:	6823      	ldr	r3, [r4, #0]
- 800c016:	f043 0320 	orr.w	r3, r3, #32
- 800c01a:	6023      	str	r3, [r4, #0]
- 800c01c:	e003      	b.n	800c026 <_printf_i+0x86>
- 800c01e:	2975      	cmp	r1, #117	; 0x75
- 800c020:	d017      	beq.n	800c052 <_printf_i+0xb2>
- 800c022:	2978      	cmp	r1, #120	; 0x78
- 800c024:	d1d4      	bne.n	800bfd0 <_printf_i+0x30>
- 800c026:	2378      	movs	r3, #120	; 0x78
- 800c028:	f884 3045 	strb.w	r3, [r4, #69]	; 0x45
- 800c02c:	4864      	ldr	r0, [pc, #400]	; (800c1c0 <_printf_i+0x220>)
- 800c02e:	e055      	b.n	800c0dc <_printf_i+0x13c>
- 800c030:	6813      	ldr	r3, [r2, #0]
- 800c032:	1d19      	adds	r1, r3, #4
- 800c034:	681b      	ldr	r3, [r3, #0]
- 800c036:	6011      	str	r1, [r2, #0]
- 800c038:	f104 0542 	add.w	r5, r4, #66	; 0x42
- 800c03c:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
- 800c040:	2301      	movs	r3, #1
- 800c042:	e08c      	b.n	800c15e <_printf_i+0x1be>
- 800c044:	681b      	ldr	r3, [r3, #0]
- 800c046:	6011      	str	r1, [r2, #0]
- 800c048:	f010 0f40 	tst.w	r0, #64	; 0x40
- 800c04c:	bf18      	it	ne
- 800c04e:	b21b      	sxthne	r3, r3
- 800c050:	e7cf      	b.n	800bff2 <_printf_i+0x52>
- 800c052:	6813      	ldr	r3, [r2, #0]
- 800c054:	6825      	ldr	r5, [r4, #0]
- 800c056:	1d18      	adds	r0, r3, #4
- 800c058:	6010      	str	r0, [r2, #0]
- 800c05a:	0628      	lsls	r0, r5, #24
- 800c05c:	d501      	bpl.n	800c062 <_printf_i+0xc2>
- 800c05e:	681b      	ldr	r3, [r3, #0]
- 800c060:	e002      	b.n	800c068 <_printf_i+0xc8>
- 800c062:	0668      	lsls	r0, r5, #25
- 800c064:	d5fb      	bpl.n	800c05e <_printf_i+0xbe>
- 800c066:	881b      	ldrh	r3, [r3, #0]
- 800c068:	4854      	ldr	r0, [pc, #336]	; (800c1bc <_printf_i+0x21c>)
- 800c06a:	296f      	cmp	r1, #111	; 0x6f
- 800c06c:	bf14      	ite	ne
- 800c06e:	220a      	movne	r2, #10
- 800c070:	2208      	moveq	r2, #8
- 800c072:	2100      	movs	r1, #0
- 800c074:	f884 1043 	strb.w	r1, [r4, #67]	; 0x43
- 800c078:	6865      	ldr	r5, [r4, #4]
- 800c07a:	60a5      	str	r5, [r4, #8]
- 800c07c:	2d00      	cmp	r5, #0
- 800c07e:	f2c0 8095 	blt.w	800c1ac <_printf_i+0x20c>
- 800c082:	6821      	ldr	r1, [r4, #0]
- 800c084:	f021 0104 	bic.w	r1, r1, #4
- 800c088:	6021      	str	r1, [r4, #0]
- 800c08a:	2b00      	cmp	r3, #0
- 800c08c:	d13d      	bne.n	800c10a <_printf_i+0x16a>
- 800c08e:	2d00      	cmp	r5, #0
- 800c090:	f040 808e 	bne.w	800c1b0 <_printf_i+0x210>
- 800c094:	4665      	mov	r5, ip
- 800c096:	2a08      	cmp	r2, #8
- 800c098:	d10b      	bne.n	800c0b2 <_printf_i+0x112>
- 800c09a:	6823      	ldr	r3, [r4, #0]
- 800c09c:	07db      	lsls	r3, r3, #31
- 800c09e:	d508      	bpl.n	800c0b2 <_printf_i+0x112>
- 800c0a0:	6923      	ldr	r3, [r4, #16]
- 800c0a2:	6862      	ldr	r2, [r4, #4]
- 800c0a4:	429a      	cmp	r2, r3
- 800c0a6:	bfde      	ittt	le
- 800c0a8:	2330      	movle	r3, #48	; 0x30
- 800c0aa:	f805 3c01 	strble.w	r3, [r5, #-1]
- 800c0ae:	f105 35ff 	addle.w	r5, r5, #4294967295	; 0xffffffff
- 800c0b2:	ebac 0305 	sub.w	r3, ip, r5
- 800c0b6:	6123      	str	r3, [r4, #16]
- 800c0b8:	f8cd 8000 	str.w	r8, [sp]
- 800c0bc:	463b      	mov	r3, r7
- 800c0be:	aa03      	add	r2, sp, #12
- 800c0c0:	4621      	mov	r1, r4
- 800c0c2:	4630      	mov	r0, r6
- 800c0c4:	f7ff fef6 	bl	800beb4 <_printf_common>
- 800c0c8:	3001      	adds	r0, #1
- 800c0ca:	d14d      	bne.n	800c168 <_printf_i+0x1c8>
- 800c0cc:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
- 800c0d0:	b005      	add	sp, #20
- 800c0d2:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
- 800c0d6:	4839      	ldr	r0, [pc, #228]	; (800c1bc <_printf_i+0x21c>)
- 800c0d8:	f884 1045 	strb.w	r1, [r4, #69]	; 0x45
- 800c0dc:	6813      	ldr	r3, [r2, #0]
- 800c0de:	6821      	ldr	r1, [r4, #0]
- 800c0e0:	1d1d      	adds	r5, r3, #4
- 800c0e2:	681b      	ldr	r3, [r3, #0]
- 800c0e4:	6015      	str	r5, [r2, #0]
- 800c0e6:	060a      	lsls	r2, r1, #24
- 800c0e8:	d50b      	bpl.n	800c102 <_printf_i+0x162>
- 800c0ea:	07ca      	lsls	r2, r1, #31
- 800c0ec:	bf44      	itt	mi
- 800c0ee:	f041 0120 	orrmi.w	r1, r1, #32
- 800c0f2:	6021      	strmi	r1, [r4, #0]
- 800c0f4:	b91b      	cbnz	r3, 800c0fe <_printf_i+0x15e>
- 800c0f6:	6822      	ldr	r2, [r4, #0]
- 800c0f8:	f022 0220 	bic.w	r2, r2, #32
- 800c0fc:	6022      	str	r2, [r4, #0]
- 800c0fe:	2210      	movs	r2, #16
- 800c100:	e7b7      	b.n	800c072 <_printf_i+0xd2>
- 800c102:	064d      	lsls	r5, r1, #25
- 800c104:	bf48      	it	mi
- 800c106:	b29b      	uxthmi	r3, r3
- 800c108:	e7ef      	b.n	800c0ea <_printf_i+0x14a>
- 800c10a:	4665      	mov	r5, ip
- 800c10c:	fbb3 f1f2 	udiv	r1, r3, r2
- 800c110:	fb02 3311 	mls	r3, r2, r1, r3
- 800c114:	5cc3      	ldrb	r3, [r0, r3]
- 800c116:	f805 3d01 	strb.w	r3, [r5, #-1]!
- 800c11a:	460b      	mov	r3, r1
- 800c11c:	2900      	cmp	r1, #0
- 800c11e:	d1f5      	bne.n	800c10c <_printf_i+0x16c>
- 800c120:	e7b9      	b.n	800c096 <_printf_i+0xf6>
- 800c122:	6813      	ldr	r3, [r2, #0]
- 800c124:	6825      	ldr	r5, [r4, #0]
- 800c126:	6961      	ldr	r1, [r4, #20]
- 800c128:	1d18      	adds	r0, r3, #4
- 800c12a:	6010      	str	r0, [r2, #0]
- 800c12c:	0628      	lsls	r0, r5, #24
- 800c12e:	681b      	ldr	r3, [r3, #0]
- 800c130:	d501      	bpl.n	800c136 <_printf_i+0x196>
- 800c132:	6019      	str	r1, [r3, #0]
- 800c134:	e002      	b.n	800c13c <_printf_i+0x19c>
- 800c136:	066a      	lsls	r2, r5, #25
- 800c138:	d5fb      	bpl.n	800c132 <_printf_i+0x192>
- 800c13a:	8019      	strh	r1, [r3, #0]
- 800c13c:	2300      	movs	r3, #0
- 800c13e:	6123      	str	r3, [r4, #16]
- 800c140:	4665      	mov	r5, ip
- 800c142:	e7b9      	b.n	800c0b8 <_printf_i+0x118>
- 800c144:	6813      	ldr	r3, [r2, #0]
- 800c146:	1d19      	adds	r1, r3, #4
- 800c148:	6011      	str	r1, [r2, #0]
- 800c14a:	681d      	ldr	r5, [r3, #0]
- 800c14c:	6862      	ldr	r2, [r4, #4]
- 800c14e:	2100      	movs	r1, #0
- 800c150:	4628      	mov	r0, r5
- 800c152:	f7f4 f85d 	bl	8000210 <memchr>
- 800c156:	b108      	cbz	r0, 800c15c <_printf_i+0x1bc>
- 800c158:	1b40      	subs	r0, r0, r5
- 800c15a:	6060      	str	r0, [r4, #4]
- 800c15c:	6863      	ldr	r3, [r4, #4]
- 800c15e:	6123      	str	r3, [r4, #16]
- 800c160:	2300      	movs	r3, #0
- 800c162:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
- 800c166:	e7a7      	b.n	800c0b8 <_printf_i+0x118>
- 800c168:	6923      	ldr	r3, [r4, #16]
- 800c16a:	462a      	mov	r2, r5
- 800c16c:	4639      	mov	r1, r7
- 800c16e:	4630      	mov	r0, r6
- 800c170:	47c0      	blx	r8
- 800c172:	3001      	adds	r0, #1
- 800c174:	d0aa      	beq.n	800c0cc <_printf_i+0x12c>
- 800c176:	6823      	ldr	r3, [r4, #0]
- 800c178:	079b      	lsls	r3, r3, #30
- 800c17a:	d413      	bmi.n	800c1a4 <_printf_i+0x204>
- 800c17c:	68e0      	ldr	r0, [r4, #12]
- 800c17e:	9b03      	ldr	r3, [sp, #12]
- 800c180:	4298      	cmp	r0, r3
- 800c182:	bfb8      	it	lt
- 800c184:	4618      	movlt	r0, r3
- 800c186:	e7a3      	b.n	800c0d0 <_printf_i+0x130>
- 800c188:	2301      	movs	r3, #1
- 800c18a:	464a      	mov	r2, r9
- 800c18c:	4639      	mov	r1, r7
- 800c18e:	4630      	mov	r0, r6
- 800c190:	47c0      	blx	r8
- 800c192:	3001      	adds	r0, #1
- 800c194:	d09a      	beq.n	800c0cc <_printf_i+0x12c>
- 800c196:	3501      	adds	r5, #1
- 800c198:	68e3      	ldr	r3, [r4, #12]
- 800c19a:	9a03      	ldr	r2, [sp, #12]
- 800c19c:	1a9b      	subs	r3, r3, r2
- 800c19e:	42ab      	cmp	r3, r5
- 800c1a0:	dcf2      	bgt.n	800c188 <_printf_i+0x1e8>
- 800c1a2:	e7eb      	b.n	800c17c <_printf_i+0x1dc>
- 800c1a4:	2500      	movs	r5, #0
- 800c1a6:	f104 0919 	add.w	r9, r4, #25
- 800c1aa:	e7f5      	b.n	800c198 <_printf_i+0x1f8>
- 800c1ac:	2b00      	cmp	r3, #0
- 800c1ae:	d1ac      	bne.n	800c10a <_printf_i+0x16a>
- 800c1b0:	7803      	ldrb	r3, [r0, #0]
- 800c1b2:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
- 800c1b6:	f104 0542 	add.w	r5, r4, #66	; 0x42
- 800c1ba:	e76c      	b.n	800c096 <_printf_i+0xf6>
- 800c1bc:	0800e3a1 	.word	0x0800e3a1
- 800c1c0:	0800e3b2 	.word	0x0800e3b2
-
-0800c1c4 <memmove>:
- 800c1c4:	4288      	cmp	r0, r1
- 800c1c6:	b510      	push	{r4, lr}
- 800c1c8:	eb01 0302 	add.w	r3, r1, r2
- 800c1cc:	d807      	bhi.n	800c1de <memmove+0x1a>
- 800c1ce:	1e42      	subs	r2, r0, #1
- 800c1d0:	4299      	cmp	r1, r3
- 800c1d2:	d00a      	beq.n	800c1ea <memmove+0x26>
- 800c1d4:	f811 4b01 	ldrb.w	r4, [r1], #1
- 800c1d8:	f802 4f01 	strb.w	r4, [r2, #1]!
- 800c1dc:	e7f8      	b.n	800c1d0 <memmove+0xc>
- 800c1de:	4283      	cmp	r3, r0
- 800c1e0:	d9f5      	bls.n	800c1ce <memmove+0xa>
- 800c1e2:	1881      	adds	r1, r0, r2
- 800c1e4:	1ad2      	subs	r2, r2, r3
- 800c1e6:	42d3      	cmn	r3, r2
- 800c1e8:	d100      	bne.n	800c1ec <memmove+0x28>
- 800c1ea:	bd10      	pop	{r4, pc}
- 800c1ec:	f813 4d01 	ldrb.w	r4, [r3, #-1]!
- 800c1f0:	f801 4d01 	strb.w	r4, [r1, #-1]!
- 800c1f4:	e7f7      	b.n	800c1e6 <memmove+0x22>
-	...
-
-0800c1f8 <_free_r>:
- 800c1f8:	b538      	push	{r3, r4, r5, lr}
- 800c1fa:	4605      	mov	r5, r0
- 800c1fc:	2900      	cmp	r1, #0
- 800c1fe:	d045      	beq.n	800c28c <_free_r+0x94>
- 800c200:	f851 3c04 	ldr.w	r3, [r1, #-4]
- 800c204:	1f0c      	subs	r4, r1, #4
- 800c206:	2b00      	cmp	r3, #0
- 800c208:	bfb8      	it	lt
- 800c20a:	18e4      	addlt	r4, r4, r3
- 800c20c:	f000 f8d2 	bl	800c3b4 <__malloc_lock>
- 800c210:	4a1f      	ldr	r2, [pc, #124]	; (800c290 <_free_r+0x98>)
- 800c212:	6813      	ldr	r3, [r2, #0]
- 800c214:	4610      	mov	r0, r2
- 800c216:	b933      	cbnz	r3, 800c226 <_free_r+0x2e>
- 800c218:	6063      	str	r3, [r4, #4]
- 800c21a:	6014      	str	r4, [r2, #0]
- 800c21c:	4628      	mov	r0, r5
- 800c21e:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
- 800c222:	f000 b8c8 	b.w	800c3b6 <__malloc_unlock>
- 800c226:	42a3      	cmp	r3, r4
- 800c228:	d90c      	bls.n	800c244 <_free_r+0x4c>
- 800c22a:	6821      	ldr	r1, [r4, #0]
- 800c22c:	1862      	adds	r2, r4, r1
- 800c22e:	4293      	cmp	r3, r2
- 800c230:	bf04      	itt	eq
- 800c232:	681a      	ldreq	r2, [r3, #0]
- 800c234:	685b      	ldreq	r3, [r3, #4]
- 800c236:	6063      	str	r3, [r4, #4]
- 800c238:	bf04      	itt	eq
- 800c23a:	1852      	addeq	r2, r2, r1
- 800c23c:	6022      	streq	r2, [r4, #0]
- 800c23e:	6004      	str	r4, [r0, #0]
- 800c240:	e7ec      	b.n	800c21c <_free_r+0x24>
- 800c242:	4613      	mov	r3, r2
- 800c244:	685a      	ldr	r2, [r3, #4]
- 800c246:	b10a      	cbz	r2, 800c24c <_free_r+0x54>
- 800c248:	42a2      	cmp	r2, r4
- 800c24a:	d9fa      	bls.n	800c242 <_free_r+0x4a>
- 800c24c:	6819      	ldr	r1, [r3, #0]
- 800c24e:	1858      	adds	r0, r3, r1
- 800c250:	42a0      	cmp	r0, r4
- 800c252:	d10b      	bne.n	800c26c <_free_r+0x74>
- 800c254:	6820      	ldr	r0, [r4, #0]
- 800c256:	4401      	add	r1, r0
- 800c258:	1858      	adds	r0, r3, r1
- 800c25a:	4282      	cmp	r2, r0
- 800c25c:	6019      	str	r1, [r3, #0]
- 800c25e:	d1dd      	bne.n	800c21c <_free_r+0x24>
- 800c260:	6810      	ldr	r0, [r2, #0]
- 800c262:	6852      	ldr	r2, [r2, #4]
- 800c264:	605a      	str	r2, [r3, #4]
- 800c266:	4401      	add	r1, r0
- 800c268:	6019      	str	r1, [r3, #0]
- 800c26a:	e7d7      	b.n	800c21c <_free_r+0x24>
- 800c26c:	d902      	bls.n	800c274 <_free_r+0x7c>
- 800c26e:	230c      	movs	r3, #12
- 800c270:	602b      	str	r3, [r5, #0]
- 800c272:	e7d3      	b.n	800c21c <_free_r+0x24>
- 800c274:	6820      	ldr	r0, [r4, #0]
- 800c276:	1821      	adds	r1, r4, r0
- 800c278:	428a      	cmp	r2, r1
- 800c27a:	bf04      	itt	eq
- 800c27c:	6811      	ldreq	r1, [r2, #0]
- 800c27e:	6852      	ldreq	r2, [r2, #4]
- 800c280:	6062      	str	r2, [r4, #4]
- 800c282:	bf04      	itt	eq
- 800c284:	1809      	addeq	r1, r1, r0
- 800c286:	6021      	streq	r1, [r4, #0]
- 800c288:	605c      	str	r4, [r3, #4]
- 800c28a:	e7c7      	b.n	800c21c <_free_r+0x24>
- 800c28c:	bd38      	pop	{r3, r4, r5, pc}
- 800c28e:	bf00      	nop
- 800c290:	20008430 	.word	0x20008430
-
-0800c294 <_malloc_r>:
- 800c294:	b570      	push	{r4, r5, r6, lr}
- 800c296:	1ccd      	adds	r5, r1, #3
- 800c298:	f025 0503 	bic.w	r5, r5, #3
- 800c29c:	3508      	adds	r5, #8
- 800c29e:	2d0c      	cmp	r5, #12
- 800c2a0:	bf38      	it	cc
- 800c2a2:	250c      	movcc	r5, #12
- 800c2a4:	2d00      	cmp	r5, #0
- 800c2a6:	4606      	mov	r6, r0
- 800c2a8:	db01      	blt.n	800c2ae <_malloc_r+0x1a>
- 800c2aa:	42a9      	cmp	r1, r5
- 800c2ac:	d903      	bls.n	800c2b6 <_malloc_r+0x22>
- 800c2ae:	230c      	movs	r3, #12
- 800c2b0:	6033      	str	r3, [r6, #0]
- 800c2b2:	2000      	movs	r0, #0
- 800c2b4:	bd70      	pop	{r4, r5, r6, pc}
- 800c2b6:	f000 f87d 	bl	800c3b4 <__malloc_lock>
- 800c2ba:	4a21      	ldr	r2, [pc, #132]	; (800c340 <_malloc_r+0xac>)
- 800c2bc:	6814      	ldr	r4, [r2, #0]
- 800c2be:	4621      	mov	r1, r4
- 800c2c0:	b991      	cbnz	r1, 800c2e8 <_malloc_r+0x54>
- 800c2c2:	4c20      	ldr	r4, [pc, #128]	; (800c344 <_malloc_r+0xb0>)
- 800c2c4:	6823      	ldr	r3, [r4, #0]
- 800c2c6:	b91b      	cbnz	r3, 800c2d0 <_malloc_r+0x3c>
- 800c2c8:	4630      	mov	r0, r6
- 800c2ca:	f000 f863 	bl	800c394 <_sbrk_r>
- 800c2ce:	6020      	str	r0, [r4, #0]
- 800c2d0:	4629      	mov	r1, r5
- 800c2d2:	4630      	mov	r0, r6
- 800c2d4:	f000 f85e 	bl	800c394 <_sbrk_r>
- 800c2d8:	1c43      	adds	r3, r0, #1
- 800c2da:	d124      	bne.n	800c326 <_malloc_r+0x92>
- 800c2dc:	230c      	movs	r3, #12
- 800c2de:	6033      	str	r3, [r6, #0]
- 800c2e0:	4630      	mov	r0, r6
- 800c2e2:	f000 f868 	bl	800c3b6 <__malloc_unlock>
- 800c2e6:	e7e4      	b.n	800c2b2 <_malloc_r+0x1e>
- 800c2e8:	680b      	ldr	r3, [r1, #0]
- 800c2ea:	1b5b      	subs	r3, r3, r5
- 800c2ec:	d418      	bmi.n	800c320 <_malloc_r+0x8c>
- 800c2ee:	2b0b      	cmp	r3, #11
- 800c2f0:	d90f      	bls.n	800c312 <_malloc_r+0x7e>
- 800c2f2:	600b      	str	r3, [r1, #0]
- 800c2f4:	50cd      	str	r5, [r1, r3]
- 800c2f6:	18cc      	adds	r4, r1, r3
- 800c2f8:	4630      	mov	r0, r6
- 800c2fa:	f000 f85c 	bl	800c3b6 <__malloc_unlock>
- 800c2fe:	f104 000b 	add.w	r0, r4, #11
- 800c302:	1d23      	adds	r3, r4, #4
- 800c304:	f020 0007 	bic.w	r0, r0, #7
- 800c308:	1ac3      	subs	r3, r0, r3
- 800c30a:	d0d3      	beq.n	800c2b4 <_malloc_r+0x20>
- 800c30c:	425a      	negs	r2, r3
- 800c30e:	50e2      	str	r2, [r4, r3]
- 800c310:	e7d0      	b.n	800c2b4 <_malloc_r+0x20>
- 800c312:	428c      	cmp	r4, r1
- 800c314:	684b      	ldr	r3, [r1, #4]
- 800c316:	bf16      	itet	ne
- 800c318:	6063      	strne	r3, [r4, #4]
- 800c31a:	6013      	streq	r3, [r2, #0]
- 800c31c:	460c      	movne	r4, r1
- 800c31e:	e7eb      	b.n	800c2f8 <_malloc_r+0x64>
- 800c320:	460c      	mov	r4, r1
- 800c322:	6849      	ldr	r1, [r1, #4]
- 800c324:	e7cc      	b.n	800c2c0 <_malloc_r+0x2c>
- 800c326:	1cc4      	adds	r4, r0, #3
- 800c328:	f024 0403 	bic.w	r4, r4, #3
- 800c32c:	42a0      	cmp	r0, r4
- 800c32e:	d005      	beq.n	800c33c <_malloc_r+0xa8>
- 800c330:	1a21      	subs	r1, r4, r0
- 800c332:	4630      	mov	r0, r6
- 800c334:	f000 f82e 	bl	800c394 <_sbrk_r>
- 800c338:	3001      	adds	r0, #1
- 800c33a:	d0cf      	beq.n	800c2dc <_malloc_r+0x48>
- 800c33c:	6025      	str	r5, [r4, #0]
- 800c33e:	e7db      	b.n	800c2f8 <_malloc_r+0x64>
- 800c340:	20008430 	.word	0x20008430
- 800c344:	20008434 	.word	0x20008434
-
-0800c348 <_realloc_r>:
- 800c348:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 800c34a:	4607      	mov	r7, r0
- 800c34c:	4614      	mov	r4, r2
- 800c34e:	460e      	mov	r6, r1
- 800c350:	b921      	cbnz	r1, 800c35c <_realloc_r+0x14>
- 800c352:	4611      	mov	r1, r2
- 800c354:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
- 800c358:	f7ff bf9c 	b.w	800c294 <_malloc_r>
- 800c35c:	b922      	cbnz	r2, 800c368 <_realloc_r+0x20>
- 800c35e:	f7ff ff4b 	bl	800c1f8 <_free_r>
- 800c362:	4625      	mov	r5, r4
- 800c364:	4628      	mov	r0, r5
- 800c366:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
- 800c368:	f000 f826 	bl	800c3b8 <_malloc_usable_size_r>
- 800c36c:	42a0      	cmp	r0, r4
- 800c36e:	d20f      	bcs.n	800c390 <_realloc_r+0x48>
- 800c370:	4621      	mov	r1, r4
- 800c372:	4638      	mov	r0, r7
- 800c374:	f7ff ff8e 	bl	800c294 <_malloc_r>
- 800c378:	4605      	mov	r5, r0
- 800c37a:	2800      	cmp	r0, #0
- 800c37c:	d0f2      	beq.n	800c364 <_realloc_r+0x1c>
- 800c37e:	4631      	mov	r1, r6
- 800c380:	4622      	mov	r2, r4
- 800c382:	f7ff fc11 	bl	800bba8 <memcpy>
- 800c386:	4631      	mov	r1, r6
- 800c388:	4638      	mov	r0, r7
- 800c38a:	f7ff ff35 	bl	800c1f8 <_free_r>
- 800c38e:	e7e9      	b.n	800c364 <_realloc_r+0x1c>
- 800c390:	4635      	mov	r5, r6
- 800c392:	e7e7      	b.n	800c364 <_realloc_r+0x1c>
-
-0800c394 <_sbrk_r>:
- 800c394:	b538      	push	{r3, r4, r5, lr}
- 800c396:	4c06      	ldr	r4, [pc, #24]	; (800c3b0 <_sbrk_r+0x1c>)
- 800c398:	2300      	movs	r3, #0
- 800c39a:	4605      	mov	r5, r0
- 800c39c:	4608      	mov	r0, r1
- 800c39e:	6023      	str	r3, [r4, #0]
- 800c3a0:	f7f8 f810 	bl	80043c4 <_sbrk>
- 800c3a4:	1c43      	adds	r3, r0, #1
- 800c3a6:	d102      	bne.n	800c3ae <_sbrk_r+0x1a>
- 800c3a8:	6823      	ldr	r3, [r4, #0]
- 800c3aa:	b103      	cbz	r3, 800c3ae <_sbrk_r+0x1a>
- 800c3ac:	602b      	str	r3, [r5, #0]
- 800c3ae:	bd38      	pop	{r3, r4, r5, pc}
- 800c3b0:	20008af8 	.word	0x20008af8
-
-0800c3b4 <__malloc_lock>:
- 800c3b4:	4770      	bx	lr
-
-0800c3b6 <__malloc_unlock>:
- 800c3b6:	4770      	bx	lr
-
-0800c3b8 <_malloc_usable_size_r>:
- 800c3b8:	f851 3c04 	ldr.w	r3, [r1, #-4]
- 800c3bc:	1f18      	subs	r0, r3, #4
- 800c3be:	2b00      	cmp	r3, #0
- 800c3c0:	bfbc      	itt	lt
- 800c3c2:	580b      	ldrlt	r3, [r1, r0]
- 800c3c4:	18c0      	addlt	r0, r0, r3
- 800c3c6:	4770      	bx	lr
-
-0800c3c8 <_init>:
- 800c3c8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 800c3ca:	bf00      	nop
- 800c3cc:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 800c3ce:	bc08      	pop	{r3}
- 800c3d0:	469e      	mov	lr, r3
- 800c3d2:	4770      	bx	lr
-
-0800c3d4 <_fini>:
- 800c3d4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 800c3d6:	bf00      	nop
- 800c3d8:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 800c3da:	bc08      	pop	{r3}
- 800c3dc:	469e      	mov	lr, r3
- 800c3de:	4770      	bx	lr
diff --git a/Debug/prog_demo_2021.map b/Debug/prog_demo_2021.map
deleted file mode 100644
index b60cb31..0000000
--- a/Debug/prog_demo_2021.map
+++ /dev/null
@@ -1,10116 +0,0 @@
-Archive member included to satisfy reference by file (symbol)
-
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-errno.o)
-                              Core/Src/syscalls.o (__errno)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-exit.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (exit)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-impure.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-exit.o) (_global_impure_ptr)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-init.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (__libc_init_array)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memcpy-stub.o)
-                              Middlewares/Third_Party/FreeRTOS/Source/queue.o (memcpy)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memset.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o (memset)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sprintf.o)
-                              Core/Src/main.o (sprintf)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sprintf.o) (_svfprintf_r)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-vfprintf_i.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o) (_printf_i)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memchr.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o) (memchr)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memmove.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o) (memmove)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-freer.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o) (_free_r)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-mallocr.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o) (_malloc_r)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-reallocr.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o) (_realloc_r)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sbrkr.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-mallocr.o) (_sbrk_r)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-mlock.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-freer.o) (__malloc_lock)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-msizer.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-reallocr.o) (_malloc_usable_size_r)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-reent.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sbrkr.o) (errno)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_aeabi_uldivmod.o)
-                              Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o (__aeabi_uldivmod)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_udivmoddi4.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_aeabi_uldivmod.o) (__udivmoddi4)
-/opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_dvmd_tls.o)
-                              /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_aeabi_uldivmod.o) (__aeabi_ldiv0)
-
-Allocating common symbols
-Common symbol       size              file
-
-sdramHandle         0x34              Core/Src/stm32746g_discovery_sdram.o
-defaultTaskHandle   0x4               Core/Src/main.o
-hi2c3               0x4c              Core/Src/main.o
-hspi2               0x64              Core/Src/main.o
-huart7              0x80              Core/Src/main.o
-htim8               0x40              Core/Src/main.o
-errno               0x4               /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-reent.o)
-hi2c1               0x4c              Core/Src/main.o
-hLtdcHandler        0xa8              Core/Src/stm32746g_discovery_lcd.o
-uwTick              0x4               Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
-xQueueRegistry      0x40              Middlewares/Third_Party/FreeRTOS/Source/queue.o
-pFlash              0x1c              Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
-htim5               0x40              Core/Src/main.o
-htim3               0x40              Core/Src/main.o
-hltdc               0xa8              Core/Src/main.o
-hadc1               0x48              Core/Src/main.o
-hadc3               0x48              Core/Src/main.o
-huart1              0x80              Core/Src/main.o
-hdac                0x14              Core/Src/main.o
-hrtc                0x20              Core/Src/main.o
-htim6               0x40              Core/Src/stm32f7xx_hal_timebase_tim.o
-htim1               0x40              Core/Src/main.o
-huart6              0x80              Core/Src/main.o
-hdma2d              0x40              Core/Src/main.o
-htim2               0x40              Core/Src/main.o
-hsdram1             0x34              Core/Src/main.o
-
-Discarded input sections
-
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
- .data          0x0000000000000000        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
- .text          0x0000000000000000       0x74 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
- .ARM.extab     0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
- .ARM.exidx     0x0000000000000000        0x8 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
- .ARM.attributes
-                0x0000000000000000       0x20 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/freertos.o
- .text          0x0000000000000000        0x0 Core/Src/freertos.o
- .data          0x0000000000000000        0x0 Core/Src/freertos.o
- .bss           0x0000000000000000        0x0 Core/Src/freertos.o
- .text.vApplicationIdleHook
-                0x0000000000000000        0xe Core/Src/freertos.o
- .bss.xIdleTaskTCBBuffer
-                0x0000000000000000       0x58 Core/Src/freertos.o
- .bss.xIdleStack
-                0x0000000000000000      0x200 Core/Src/freertos.o
- .text.vApplicationGetIdleTaskMemory
-                0x0000000000000000       0x34 Core/Src/freertos.o
- .group         0x0000000000000000        0xc Core/Src/ft5336.o
- .group         0x0000000000000000        0xc Core/Src/ft5336.o
- .group         0x0000000000000000        0xc Core/Src/ft5336.o
- .group         0x0000000000000000        0xc Core/Src/ft5336.o
- .group         0x0000000000000000        0xc Core/Src/ft5336.o
- .group         0x0000000000000000        0xc Core/Src/ft5336.o
- .group         0x0000000000000000        0xc Core/Src/ft5336.o
- .group         0x0000000000000000        0xc Core/Src/ft5336.o
- .group         0x0000000000000000        0xc Core/Src/ft5336.o
- .text          0x0000000000000000        0x0 Core/Src/ft5336.o
- .data          0x0000000000000000        0x0 Core/Src/ft5336.o
- .bss           0x0000000000000000        0x0 Core/Src/ft5336.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/ft5336.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/ft5336.o
- .debug_macro   0x0000000000000000       0x8e Core/Src/ft5336.o
- .debug_macro   0x0000000000000000       0x51 Core/Src/ft5336.o
- .debug_macro   0x0000000000000000       0xef Core/Src/ft5336.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/ft5336.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/ft5336.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/main.o
- .text          0x0000000000000000        0x0 Core/Src/main.o
- .data          0x0000000000000000        0x0 Core/Src/main.o
- .bss           0x0000000000000000        0x0 Core/Src/main.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/main.o
- .debug_macro   0x0000000000000000      0x2bd Core/Src/main.o
- .debug_macro   0x0000000000000000       0x2e Core/Src/main.o
- .debug_macro   0x0000000000000000       0x3b Core/Src/main.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/main.o
- .debug_macro   0x0000000000000000       0x8e Core/Src/main.o
- .debug_macro   0x0000000000000000       0x51 Core/Src/main.o
- .debug_macro   0x0000000000000000       0xef Core/Src/main.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/main.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/main.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/main.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/main.o
- .debug_macro   0x0000000000000000       0xdf Core/Src/main.o
- .debug_macro   0x0000000000000000     0x12cd Core/Src/main.o
- .debug_macro   0x0000000000000000      0x11f Core/Src/main.o
- .debug_macro   0x0000000000000000       0x19 Core/Src/main.o
- .debug_macro   0x0000000000000000    0x190f0 Core/Src/main.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/main.o
- .debug_macro   0x0000000000000000     0x36b4 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x174 Core/Src/main.o
- .debug_macro   0x0000000000000000       0x61 Core/Src/main.o
- .debug_macro   0x0000000000000000     0x18ad Core/Src/main.o
- .debug_macro   0x0000000000000000      0x6c4 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x185 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x117 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x1fe Core/Src/main.o
- .debug_macro   0x0000000000000000       0x27 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x24f Core/Src/main.o
- .debug_macro   0x0000000000000000       0x41 Core/Src/main.o
- .debug_macro   0x0000000000000000       0x58 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x236 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x416 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x153 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x107 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x20f Core/Src/main.o
- .debug_macro   0x0000000000000000       0xea Core/Src/main.o
- .debug_macro   0x0000000000000000       0xa0 Core/Src/main.o
- .debug_macro   0x0000000000000000       0x3c Core/Src/main.o
- .debug_macro   0x0000000000000000      0x14f Core/Src/main.o
- .debug_macro   0x0000000000000000      0x25b Core/Src/main.o
- .debug_macro   0x0000000000000000       0x12 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x514 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x22c Core/Src/main.o
- .debug_macro   0x0000000000000000       0x5a Core/Src/main.o
- .debug_macro   0x0000000000000000       0xa5 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x198 Core/Src/main.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x12f Core/Src/main.o
- .debug_macro   0x0000000000000000      0x108 Core/Src/main.o
- .debug_macro   0x0000000000000000       0x35 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x313 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x4ca Core/Src/main.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x2fe Core/Src/main.o
- .debug_macro   0x0000000000000000      0xa2f Core/Src/main.o
- .debug_macro   0x0000000000000000       0x59 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x53c Core/Src/main.o
- .debug_macro   0x0000000000000000       0x44 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x14e Core/Src/main.o
- .debug_macro   0x0000000000000000      0x3f9 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x15a Core/Src/main.o
- .debug_macro   0x0000000000000000       0xde Core/Src/main.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/main.o
- .debug_macro   0x0000000000000000       0x26 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x4c5 Core/Src/main.o
- .debug_macro   0x0000000000000000       0xb5 Core/Src/main.o
- .debug_macro   0x0000000000000000       0xaa Core/Src/main.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/main.o
- .debug_macro   0x0000000000000000      0x39f Core/Src/main.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .text          0x0000000000000000        0x0 Core/Src/stm32746g_discovery.o
- .data          0x0000000000000000        0x0 Core/Src/stm32746g_discovery.o
- .bss           0x0000000000000000        0x0 Core/Src/stm32746g_discovery.o
- .rodata.GPIO_PIN
-                0x0000000000000000        0x4 Core/Src/stm32746g_discovery.o
- .data.BUTTON_PORT
-                0x0000000000000000        0xc Core/Src/stm32746g_discovery.o
- .rodata.BUTTON_PIN
-                0x0000000000000000        0x6 Core/Src/stm32746g_discovery.o
- .rodata.BUTTON_IRQn
-                0x0000000000000000        0x6 Core/Src/stm32746g_discovery.o
- .data.COM_USART
-                0x0000000000000000        0x4 Core/Src/stm32746g_discovery.o
- .data.COM_TX_PORT
-                0x0000000000000000        0x4 Core/Src/stm32746g_discovery.o
- .data.COM_RX_PORT
-                0x0000000000000000        0x4 Core/Src/stm32746g_discovery.o
- .rodata.COM_TX_PIN
-                0x0000000000000000        0x2 Core/Src/stm32746g_discovery.o
- .rodata.COM_RX_PIN
-                0x0000000000000000        0x2 Core/Src/stm32746g_discovery.o
- .rodata.COM_TX_AF
-                0x0000000000000000        0x2 Core/Src/stm32746g_discovery.o
- .rodata.COM_RX_AF
-                0x0000000000000000        0x2 Core/Src/stm32746g_discovery.o
- .bss.hI2cExtHandler
-                0x0000000000000000       0x4c Core/Src/stm32746g_discovery.o
- .text.BSP_GetVersion
-                0x0000000000000000       0x12 Core/Src/stm32746g_discovery.o
- .text.BSP_LED_Init
-                0x0000000000000000       0x68 Core/Src/stm32746g_discovery.o
- .text.BSP_LED_DeInit
-                0x0000000000000000       0x3c Core/Src/stm32746g_discovery.o
- .text.BSP_LED_On
-                0x0000000000000000       0x30 Core/Src/stm32746g_discovery.o
- .text.BSP_LED_Off
-                0x0000000000000000       0x30 Core/Src/stm32746g_discovery.o
- .text.BSP_LED_Toggle
-                0x0000000000000000       0x2c Core/Src/stm32746g_discovery.o
- .text.BSP_PB_Init
-                0x0000000000000000      0x118 Core/Src/stm32746g_discovery.o
- .text.BSP_PB_DeInit
-                0x0000000000000000       0x4c Core/Src/stm32746g_discovery.o
- .text.BSP_PB_GetState
-                0x0000000000000000       0x34 Core/Src/stm32746g_discovery.o
- .text.BSP_COM_Init
-                0x0000000000000000       0xdc Core/Src/stm32746g_discovery.o
- .text.BSP_COM_DeInit
-                0x0000000000000000       0x40 Core/Src/stm32746g_discovery.o
- .text.I2Cx_IsDeviceReady
-                0x0000000000000000       0x26 Core/Src/stm32746g_discovery.o
- .text.AUDIO_IO_Init
-                0x0000000000000000       0x14 Core/Src/stm32746g_discovery.o
- .text.AUDIO_IO_DeInit
-                0x0000000000000000        0xe Core/Src/stm32746g_discovery.o
- .text.AUDIO_IO_Write
-                0x0000000000000000       0x54 Core/Src/stm32746g_discovery.o
- .text.AUDIO_IO_Read
-                0x0000000000000000       0x58 Core/Src/stm32746g_discovery.o
- .text.AUDIO_IO_Delay
-                0x0000000000000000       0x16 Core/Src/stm32746g_discovery.o
- .text.CAMERA_IO_Init
-                0x0000000000000000       0x14 Core/Src/stm32746g_discovery.o
- .text.CAMERA_IO_Write
-                0x0000000000000000       0x34 Core/Src/stm32746g_discovery.o
- .text.CAMERA_IO_Read
-                0x0000000000000000       0x3c Core/Src/stm32746g_discovery.o
- .text.CAMERA_Delay
-                0x0000000000000000       0x16 Core/Src/stm32746g_discovery.o
- .text.EEPROM_IO_Init
-                0x0000000000000000       0x14 Core/Src/stm32746g_discovery.o
- .text.EEPROM_IO_WriteData
-                0x0000000000000000       0x38 Core/Src/stm32746g_discovery.o
- .text.EEPROM_IO_ReadData
-                0x0000000000000000       0x38 Core/Src/stm32746g_discovery.o
- .text.EEPROM_IO_IsDeviceReady
-                0x0000000000000000       0x28 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x2bd Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x2e Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x3b Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x8e Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x51 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0xef Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0xdf Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x11f Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x19 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x174 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x61 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x185 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x117 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x27 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x24f Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x41 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x58 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x236 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x416 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x153 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x107 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x20f Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0xea Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x3c Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x14f Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x25b Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x12 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x514 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x22c Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x5a Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x198 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x12f Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x108 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x35 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x313 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x59 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x53c Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000       0x44 Core/Src/stm32746g_discovery.o
- .debug_macro   0x0000000000000000      0x14e Core/Src/stm32746g_discovery.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_lcd.o
- .text          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_lcd.o
- .data          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_lcd.o
- .bss           0x0000000000000000        0x0 Core/Src/stm32746g_discovery_lcd.o
- .rodata.Font20_Table
-                0x0000000000000000      0xed8 Core/Src/stm32746g_discovery_lcd.o
- .data.Font20   0x0000000000000000        0x8 Core/Src/stm32746g_discovery_lcd.o
- .rodata.Font16_Table
-                0x0000000000000000      0xbe0 Core/Src/stm32746g_discovery_lcd.o
- .data.Font16   0x0000000000000000        0x8 Core/Src/stm32746g_discovery_lcd.o
- .rodata.Font8_Table
-                0x0000000000000000      0x2f8 Core/Src/stm32746g_discovery_lcd.o
- .data.Font8    0x0000000000000000        0x8 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_DeInit
-                0x0000000000000000       0x38 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetXSize
-                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetYSize
-                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_LayerRgb565Init
-                0x0000000000000000       0xc0 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetLayerVisible
-                0x0000000000000000       0x7c Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetLayerVisible_NoReload
-                0x0000000000000000       0x6c Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetTransparency
-                0x0000000000000000       0x24 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetTransparency_NoReload
-                0x0000000000000000       0x24 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetLayerAddress
-                0x0000000000000000       0x20 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetLayerAddress_NoReload
-                0x0000000000000000       0x20 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetLayerWindow
-                0x0000000000000000       0x44 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetLayerWindow_NoReload
-                0x0000000000000000       0x44 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetColorKeying
-                0x0000000000000000       0x28 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_SetColorKeying_NoReload
-                0x0000000000000000       0x28 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_ResetColorKeying
-                0x0000000000000000       0x1c Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_ResetColorKeying_NoReload
-                0x0000000000000000       0x1c Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_Reload
-                0x0000000000000000       0x1c Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_GetTextColor
-                0x0000000000000000       0x28 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_GetBackColor
-                0x0000000000000000       0x2c Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_ReadPixel
-                0x0000000000000000      0x14c Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_ClearStringLine
-                0x0000000000000000       0xc8 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_DrawVLine
-                0x0000000000000000       0xc4 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_DrawLine
-                0x0000000000000000      0x198 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_DrawRect
-                0x0000000000000000       0x62 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_DrawPolygon
-                0x0000000000000000       0x9a Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_DrawEllipse
-                0x0000000000000000      0x1f0 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_DrawBitmap
-                0x0000000000000000      0x160 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_FillRect
-                0x0000000000000000       0xf4 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_FillPolygon
-                0x0000000000000000      0x1c8 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_FillEllipse
-                0x0000000000000000      0x172 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_DisplayOff
-                0x0000000000000000       0x3c Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_LCD_MspDeInit
-                0x0000000000000000       0x94 Core/Src/stm32746g_discovery_lcd.o
- .text.FillTriangle
-                0x0000000000000000      0x17e Core/Src/stm32746g_discovery_lcd.o
- .text.LL_ConvertLineToARGB8888
-                0x0000000000000000       0x88 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x40 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x2bd Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x2e Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x3b Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x8e Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x51 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0xef Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0xdf Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x11f Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x19 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x174 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x61 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x185 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x117 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x27 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x24f Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x41 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x58 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x236 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x416 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x153 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x107 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x20f Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0xea Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x3c Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x14f Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x25b Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x12 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x514 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x22c Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x5a Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x198 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x12f Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x108 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x35 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x313 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x59 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x53c Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x44 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x14e Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x268 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000000000      0x12a Core/Src/stm32746g_discovery_lcd.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_sdram.o
- .text          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_sdram.o
- .data          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_sdram.o
- .bss           0x0000000000000000        0x0 Core/Src/stm32746g_discovery_sdram.o
- .text.BSP_SDRAM_DeInit
-                0x0000000000000000       0x40 Core/Src/stm32746g_discovery_sdram.o
- .text.BSP_SDRAM_ReadData
-                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_sdram.o
- .text.BSP_SDRAM_ReadData_DMA
-                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_sdram.o
- .text.BSP_SDRAM_WriteData
-                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_sdram.o
- .text.BSP_SDRAM_WriteData_DMA
-                0x0000000000000000       0x30 Core/Src/stm32746g_discovery_sdram.o
- .text.BSP_SDRAM_Sendcmd
-                0x0000000000000000       0x2c Core/Src/stm32746g_discovery_sdram.o
- .text.BSP_SDRAM_MspDeInit
-                0x0000000000000000       0x2c Core/Src/stm32746g_discovery_sdram.o
- .data.sdramstatus.9796
-                0x0000000000000000        0x1 Core/Src/stm32746g_discovery_sdram.o
- .bss.dma_handle.9842
-                0x0000000000000000       0x60 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x2bd Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x2e Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x3b Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x8e Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x51 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0xef Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0xdf Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x11f Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x19 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x174 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x61 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x185 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x117 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x27 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x24f Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x41 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x58 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x236 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x416 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x153 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x107 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x20f Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0xea Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x3c Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x14f Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x25b Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x12 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x514 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x22c Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x5a Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x198 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x12f Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x108 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x35 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x313 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x59 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x53c Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x44 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000      0x14e Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x0000000000000000       0x9a Core/Src/stm32746g_discovery_sdram.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32746g_discovery_ts.o
- .text          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_ts.o
- .data          0x0000000000000000        0x0 Core/Src/stm32746g_discovery_ts.o
- .bss           0x0000000000000000        0x0 Core/Src/stm32746g_discovery_ts.o
- .text.BSP_TS_DeInit
-                0x0000000000000000       0x10 Core/Src/stm32746g_discovery_ts.o
- .text.BSP_TS_ITConfig
-                0x0000000000000000       0x5c Core/Src/stm32746g_discovery_ts.o
- .text.BSP_TS_ITGetStatus
-                0x0000000000000000       0x24 Core/Src/stm32746g_discovery_ts.o
- .text.BSP_TS_ITClear
-                0x0000000000000000       0x20 Core/Src/stm32746g_discovery_ts.o
- .text.BSP_TS_ResetTouchData
-                0x0000000000000000       0x80 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x2bd Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x2e Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x3b Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x8e Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x51 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0xef Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0xdf Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x11f Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x19 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x174 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x61 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x185 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x117 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x27 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x24f Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x41 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x58 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x236 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x416 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x153 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x107 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x20f Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0xea Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x3c Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x14f Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x25b Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x12 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x514 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x22c Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x5a Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x198 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x12f Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x108 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x35 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x313 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x59 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x53c Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x44 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x14e Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x262 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000      0x39f Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000000000       0x2e Core/Src/stm32746g_discovery_ts.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_msp.o
- .text          0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_msp.o
- .data          0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_msp.o
- .bss           0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_msp.o
- .text.HAL_ADC_MspDeInit
-                0x0000000000000000       0x64 Core/Src/stm32f7xx_hal_msp.o
- .text.HAL_DAC_MspDeInit
-                0x0000000000000000       0x40 Core/Src/stm32f7xx_hal_msp.o
- .text.HAL_DMA2D_MspDeInit
-                0x0000000000000000       0x34 Core/Src/stm32f7xx_hal_msp.o
- .text.HAL_LTDC_MspDeInit
-                0x0000000000000000       0x78 Core/Src/stm32f7xx_hal_msp.o
- .text.HAL_RTC_MspDeInit
-                0x0000000000000000       0x34 Core/Src/stm32f7xx_hal_msp.o
- .text.HAL_SPI_MspDeInit
-                0x0000000000000000       0x48 Core/Src/stm32f7xx_hal_msp.o
- .text.HAL_TIM_Base_MspDeInit
-                0x0000000000000000       0xa0 Core/Src/stm32f7xx_hal_msp.o
- .text.HAL_UART_MspDeInit
-                0x0000000000000000       0x98 Core/Src/stm32f7xx_hal_msp.o
- .bss.FMC_DeInitialized
-                0x0000000000000000        0x4 Core/Src/stm32f7xx_hal_msp.o
- .text.HAL_FMC_MspDeInit
-                0x0000000000000000       0x7c Core/Src/stm32f7xx_hal_msp.o
- .text.HAL_SDRAM_MspDeInit
-                0x0000000000000000       0x14 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x2bd Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x2e Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x3b Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x8e Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x51 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0xef Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0xdf Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x11f Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x19 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x174 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x61 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x185 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x117 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x27 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x24f Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x41 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x58 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x236 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x416 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x153 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x107 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x20f Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0xea Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x3c Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x14f Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x25b Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x12 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x514 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x22c Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x5a Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x198 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x12f Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x108 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x35 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x313 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x59 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x53c Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x44 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x14e Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x3f9 Core/Src/stm32f7xx_hal_msp.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_hal_timebase_tim.o
- .text          0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_timebase_tim.o
- .data          0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_timebase_tim.o
- .bss           0x0000000000000000        0x0 Core/Src/stm32f7xx_hal_timebase_tim.o
- .text.HAL_SuspendTick
-                0x0000000000000000       0x24 Core/Src/stm32f7xx_hal_timebase_tim.o
- .text.HAL_ResumeTick
-                0x0000000000000000       0x24 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x2bd Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x2e Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x3b Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x8e Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x51 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0xef Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0xdf Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x11f Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x19 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x174 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x61 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x185 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x117 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x27 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x24f Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x41 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x58 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x236 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x416 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x153 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x107 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x20f Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0xea Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x3c Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x14f Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x25b Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x12 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x514 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x22c Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x5a Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x198 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x12f Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x108 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x35 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x313 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x59 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x53c Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000       0x44 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x0000000000000000      0x14e Core/Src/stm32f7xx_hal_timebase_tim.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/stm32f7xx_it.o
- .text          0x0000000000000000        0x0 Core/Src/stm32f7xx_it.o
- .data          0x0000000000000000        0x0 Core/Src/stm32f7xx_it.o
- .bss           0x0000000000000000        0x0 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x2bd Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x2e Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x3b Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x8e Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x51 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0xef Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0xdf Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000     0x12cd Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x11f Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x19 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000    0x190f0 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000     0x36b4 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x174 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x61 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000     0x18ad Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x6c4 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x185 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x117 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x1fe Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x27 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x24f Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x41 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x58 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x236 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x416 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x153 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x107 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x20f Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0xea Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0xa0 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x3c Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x14f Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x25b Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x12 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x514 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x22c Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x5a Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0xa5 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x198 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x12f Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x108 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x35 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x313 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x4ca Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x2fe Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0xa2f Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x59 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x53c Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000       0x44 Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x14e Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000000000      0x3f9 Core/Src/stm32f7xx_it.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/syscalls.o
- .text          0x0000000000000000        0x0 Core/Src/syscalls.o
- .data          0x0000000000000000        0x0 Core/Src/syscalls.o
- .bss           0x0000000000000000        0x0 Core/Src/syscalls.o
- .bss.__env     0x0000000000000000        0x4 Core/Src/syscalls.o
- .data.environ  0x0000000000000000        0x4 Core/Src/syscalls.o
- .text.initialise_monitor_handles
-                0x0000000000000000        0xe Core/Src/syscalls.o
- .text._getpid  0x0000000000000000       0x10 Core/Src/syscalls.o
- .text._kill    0x0000000000000000       0x20 Core/Src/syscalls.o
- .text._exit    0x0000000000000000       0x14 Core/Src/syscalls.o
- .text._read    0x0000000000000000       0x3a Core/Src/syscalls.o
- .text._write   0x0000000000000000       0x38 Core/Src/syscalls.o
- .text._close   0x0000000000000000       0x18 Core/Src/syscalls.o
- .text._fstat   0x0000000000000000       0x20 Core/Src/syscalls.o
- .text._isatty  0x0000000000000000       0x16 Core/Src/syscalls.o
- .text._lseek   0x0000000000000000       0x1a Core/Src/syscalls.o
- .text._open    0x0000000000000000       0x1c Core/Src/syscalls.o
- .text._wait    0x0000000000000000       0x1e Core/Src/syscalls.o
- .text._unlink  0x0000000000000000       0x1e Core/Src/syscalls.o
- .text._times   0x0000000000000000       0x18 Core/Src/syscalls.o
- .text._stat    0x0000000000000000       0x20 Core/Src/syscalls.o
- .text._link    0x0000000000000000       0x20 Core/Src/syscalls.o
- .text._fork    0x0000000000000000       0x16 Core/Src/syscalls.o
- .text._execve  0x0000000000000000       0x22 Core/Src/syscalls.o
- .debug_info    0x0000000000000000      0xebd Core/Src/syscalls.o
- .debug_abbrev  0x0000000000000000      0x261 Core/Src/syscalls.o
- .debug_aranges
-                0x0000000000000000       0xa8 Core/Src/syscalls.o
- .debug_ranges  0x0000000000000000       0x98 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0x243 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x40 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x18 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x94 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x3c Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x34 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x57 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0x174 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0x330 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x52 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x1f Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x20 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0x1a3 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x35 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x52 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x40 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x40 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0xd7 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x3d Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x35 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0x122 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x16 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x16 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x29 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0x241 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x16 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0x145 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0x189 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x16 Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x88 Core/Src/syscalls.o
- .debug_line    0x0000000000000000      0x711 Core/Src/syscalls.o
- .debug_str     0x0000000000000000     0x889b Core/Src/syscalls.o
- .comment       0x0000000000000000       0x7c Core/Src/syscalls.o
- .debug_frame   0x0000000000000000      0x2ac Core/Src/syscalls.o
- .ARM.attributes
-                0x0000000000000000       0x39 Core/Src/syscalls.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/sysmem.o
- .text          0x0000000000000000        0x0 Core/Src/sysmem.o
- .data          0x0000000000000000        0x0 Core/Src/sysmem.o
- .bss           0x0000000000000000        0x0 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x10 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x40 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x18 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x94 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x3c Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x34 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000      0x174 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x57 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x52 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x1f Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x20 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000      0x1a3 Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0xef Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/sysmem.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/sysmem.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .group         0x0000000000000000        0xc Core/Src/system_stm32f7xx.o
- .text          0x0000000000000000        0x0 Core/Src/system_stm32f7xx.o
- .data          0x0000000000000000        0x0 Core/Src/system_stm32f7xx.o
- .bss           0x0000000000000000        0x0 Core/Src/system_stm32f7xx.o
- .text.SystemCoreClockUpdate
-                0x0000000000000000       0xf4 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0xa5a Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x2e Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x3b Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x8e Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x51 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0xef Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x6a Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x1df Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x1c Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x22 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0xdf Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000     0x12cd Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x11f Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x19 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000    0x190f0 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x43 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x2bd Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000     0x36b4 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x174 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x61 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000     0x18ad Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x6c4 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x185 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x117 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x1fe Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x27 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x24f Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x41 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x58 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x236 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x416 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x153 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x107 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x20f Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0xea Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0xa0 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x3c Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x14f Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x25b Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x12 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x514 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x22c Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x5a Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0xa5 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x198 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x12f Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x108 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x35 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x313 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x4ca Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0xd6 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x2fe Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0xa2f Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x59 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x53c Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000       0x44 Core/Src/system_stm32f7xx.o
- .debug_macro   0x0000000000000000      0x14e Core/Src/system_stm32f7xx.o
- .text          0x0000000000000000       0x14 Core/Startup/startup_stm32f746nghx.o
- .data          0x0000000000000000        0x0 Core/Startup/startup_stm32f746nghx.o
- .bss           0x0000000000000000        0x0 Core/Startup/startup_stm32f746nghx.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_DeInit
-                0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_MspInit
-                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_MspDeInit
-                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_InitTick
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_GetTickPrio
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_SetTickFreq
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_GetTickFreq
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_SuspendTick
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_ResumeTick
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_GetHalVersion
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_GetREVID
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_GetDEVID
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_GetUIDw0
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_GetUIDw1
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_GetUIDw2
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_DBGMCU_EnableDBGSleepMode
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_DBGMCU_DisableDBGSleepMode
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_DBGMCU_EnableDBGStopMode
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_DBGMCU_DisableDBGStopMode
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_DBGMCU_EnableDBGStandbyMode
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_DBGMCU_DisableDBGStandbyMode
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_EnableCompensationCell
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_DisableCompensationCell
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_EnableFMCMemorySwapping
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .text.HAL_DisableFMCMemorySwapping
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_DeInit
-                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_Stop
-                0x0000000000000000       0x68 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_PollForEvent
-                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_Start_IT
-                0x0000000000000000      0x194 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_Stop_IT
-                0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_IRQHandler
-                0x0000000000000000      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_Start_DMA
-                0x0000000000000000      0x1dc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_Stop_DMA
-                0x0000000000000000       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_ConvCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_ConvHalfCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_LevelOutOfWindowCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_ErrorCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_AnalogWDGConfig
-                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_GetState
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.HAL_ADC_GetError
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.ADC_DMAConvCplt
-                0x0000000000000000       0xba Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.ADC_DMAHalfConvCplt
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.ADC_DMAError
-                0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_InjectedStart
-                0x0000000000000000      0x178 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_InjectedStart_IT
-                0x0000000000000000      0x188 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_InjectedStop
-                0x0000000000000000       0x98 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_InjectedPollForConversion
-                0x0000000000000000       0xe6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_InjectedStop_IT
-                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_InjectedGetValue
-                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_MultiModeStart_DMA
-                0x0000000000000000      0x178 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_MultiModeStop_DMA
-                0x0000000000000000       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_MultiModeGetValue
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_InjectedConvCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_InjectedConfigChannel
-                0x0000000000000000      0x31c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.HAL_ADCEx_MultiModeConfigChannel
-                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.ADC_MultiModeDMAConvCplt
-                0x0000000000000000       0xa6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.ADC_MultiModeDMAHalfConvCplt
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .text.ADC_MultiModeDMAError
-                0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_info    0x0000000000000000      0xaf9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_abbrev  0x0000000000000000      0x21c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_aranges
-                0x0000000000000000       0x90 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_ranges  0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_line    0x0000000000000000      0xafa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_str     0x0000000000000000    0xfa63d Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .debug_frame   0x0000000000000000      0x250 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .ARM.attributes
-                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.__NVIC_DisableIRQ
-                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.__NVIC_GetPendingIRQ
-                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.__NVIC_SetPendingIRQ
-                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.__NVIC_ClearPendingIRQ
-                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.__NVIC_GetActive
-                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.__NVIC_GetPriority
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.NVIC_DecodePriority
-                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.__NVIC_SystemReset
-                0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.SysTick_Config
-                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_NVIC_DisableIRQ
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_NVIC_SystemReset
-                0x0000000000000000        0x8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_SYSTICK_Config
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_MPU_Disable
-                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_MPU_Enable
-                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_MPU_ConfigRegion
-                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_NVIC_GetPriorityGrouping
-                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_NVIC_GetPriority
-                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_NVIC_SetPendingIRQ
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_NVIC_GetPendingIRQ
-                0x0000000000000000       0x1e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_NVIC_ClearPendingIRQ
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_NVIC_GetActive
-                0x0000000000000000       0x1e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_SYSTICK_CLKSourceConfig
-                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_SYSTICK_IRQHandler
-                0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_SYSTICK_Callback
-                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_DeInit
-                0x0000000000000000       0x3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_Start
-                0x0000000000000000       0xcc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_Stop
-                0x0000000000000000       0x36 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_Start_DMA
-                0x0000000000000000      0x15c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_Stop_DMA
-                0x0000000000000000       0x82 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_GetValue
-                0x0000000000000000       0x2a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_ConvCpltCallbackCh1
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_ConvHalfCpltCallbackCh1
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_ErrorCallbackCh1
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_SetValue
-                0x0000000000000000       0x4a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_GetState
-                0x0000000000000000       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.HAL_DAC_GetError
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.DAC_DMAConvCpltCh1
-                0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.DAC_DMAHalfConvCpltCh1
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .text.DAC_DMAErrorCh1
-                0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .text.HAL_DACEx_DualGetValue
-                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .text.HAL_DACEx_TriangleWaveGenerate
-                0x0000000000000000       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .text.HAL_DACEx_NoiseWaveGenerate
-                0x0000000000000000       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .text.HAL_DACEx_DualSetValue
-                0x0000000000000000       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .text.HAL_DACEx_ConvCpltCallbackCh2
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .text.HAL_DACEx_ConvHalfCpltCallbackCh2
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .text.HAL_DACEx_ErrorCallbackCh2
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .text.DAC_DMAConvCpltCh2
-                0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .text.DAC_DMAHalfConvCpltCh2
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .text.DAC_DMAErrorCh2
-                0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.HAL_DMA_Start
-                0x0000000000000000       0x76 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.HAL_DMA_Start_IT
-                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.HAL_DMA_Abort
-                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.HAL_DMA_Abort_IT
-                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.HAL_DMA_PollForTransfer
-                0x0000000000000000      0x1be Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.HAL_DMA_IRQHandler
-                0x0000000000000000      0x314 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.HAL_DMA_RegisterCallback
-                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.HAL_DMA_UnRegisterCallback
-                0x0000000000000000       0xd4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.HAL_DMA_GetState
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.HAL_DMA_GetError
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.DMA_SetConfig
-                0x0000000000000000       0x5c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_DeInit
-                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_Start_IT
-                0x0000000000000000       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_BlendingStart
-                0x0000000000000000       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_BlendingStart_IT
-                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_Abort
-                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_Suspend
-                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_Resume
-                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_EnableCLUT
-                0x0000000000000000       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_CLUTLoad
-                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_CLUTLoad_IT
-                0x0000000000000000       0xd0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_CLUTLoading_Abort
-                0x0000000000000000       0x9e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_CLUTLoading_Suspend
-                0x0000000000000000       0xf2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_CLUTLoading_Resume
-                0x0000000000000000       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_IRQHandler
-                0x0000000000000000      0x1f8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_LineEventCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_CLUTLoadingCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_ConfigCLUT
-                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_ProgramLineEvent
-                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_EnableDeadTime
-                0x0000000000000000       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_DisableDeadTime
-                0x0000000000000000       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_ConfigDeadTime
-                0x0000000000000000       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_GetState
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_DMA2D_GetError
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .text.HAL_DMAEx_MultiBufferStart
-                0x0000000000000000       0x96 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .text.HAL_DMAEx_MultiBufferStart_IT
-                0x0000000000000000     0x126c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .text.HAL_DMAEx_ChangeMemory
-                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .text.DMA_MultiBufferSetConfig
-                0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_info    0x0000000000000000      0x5d3 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_abbrev  0x0000000000000000      0x1b0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_aranges
-                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_ranges  0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_line    0x0000000000000000     0x1394 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_str     0x0000000000000000    0xfa277 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .debug_frame   0x0000000000000000       0xac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .ARM.attributes
-                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_info    0x0000000000000000      0x169 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_abbrev  0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_aranges
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x283 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_line    0x0000000000000000      0x802 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .debug_str     0x0000000000000000    0xf9ef2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .ARM.attributes
-                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .text.HAL_EXTI_SetConfigLine
-                0x0000000000000000      0x150 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .text.HAL_EXTI_GetConfigLine
-                0x0000000000000000      0x104 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .text.HAL_EXTI_ClearConfigLine
-                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .text.HAL_EXTI_RegisterCallback
-                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .text.HAL_EXTI_GetHandle
-                0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .text.HAL_EXTI_IRQHandler
-                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .text.HAL_EXTI_GetPending
-                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .text.HAL_EXTI_ClearPending
-                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .text.HAL_EXTI_GenerateSWI
-                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_info    0x0000000000000000      0x5e9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_abbrev  0x0000000000000000      0x1bc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_aranges
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_ranges  0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_line    0x0000000000000000      0x904 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_str     0x0000000000000000    0xfa10f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .debug_frame   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .ARM.attributes
-                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.HAL_FLASH_Program
-                0x0000000000000000       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.HAL_FLASH_Program_IT
-                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.HAL_FLASH_IRQHandler
-                0x0000000000000000      0x15c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.HAL_FLASH_EndOfOperationCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.HAL_FLASH_OperationErrorCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.HAL_FLASH_Unlock
-                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.HAL_FLASH_Lock
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.HAL_FLASH_OB_Unlock
-                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.HAL_FLASH_OB_Lock
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.HAL_FLASH_OB_Launch
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.HAL_FLASH_GetError
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.FLASH_WaitForLastOperation
-                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.FLASH_Program_DoubleWord
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.FLASH_Program_Word
-                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.FLASH_Program_HalfWord
-                0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.FLASH_Program_Byte
-                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .text.FLASH_SetErrorCode
-                0x0000000000000000       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_info    0x0000000000000000      0x646 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_abbrev  0x0000000000000000      0x248 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_aranges
-                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_ranges  0x0000000000000000       0x90 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x28e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_line    0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_str     0x0000000000000000    0xfa275 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .debug_frame   0x0000000000000000      0x274 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .ARM.attributes
-                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- COMMON         0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.HAL_FLASHEx_Erase
-                0x0000000000000000       0xd8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.HAL_FLASHEx_Erase_IT
-                0x0000000000000000       0x9c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.HAL_FLASHEx_OBProgram
-                0x0000000000000000      0x120 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.HAL_FLASHEx_OBGetConfig
-                0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_MassErase
-                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_Erase_Sector
-                0x0000000000000000       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_OB_GetWRP
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_OB_UserConfig
-                0x0000000000000000       0x6c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_OB_GetUser
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_OB_EnableWRP
-                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_OB_DisableWRP
-                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_OB_RDP_LevelConfig
-                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_OB_BOR_LevelConfig
-                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_OB_BootAddressConfig
-                0x0000000000000000       0x5c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_OB_GetRDP
-                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_OB_GetBOR
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .text.FLASH_OB_GetBootAddress
-                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_info    0x0000000000000000      0x78c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_abbrev  0x0000000000000000      0x21d Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_aranges
-                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_ranges  0x0000000000000000       0x90 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x28e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_line    0x0000000000000000      0xa1e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_str     0x0000000000000000    0xfa31c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .debug_frame   0x0000000000000000      0x284 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .ARM.attributes
-                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .text.HAL_GPIO_TogglePin
-                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .text.HAL_GPIO_LockPin
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .text.HAL_GPIO_EXTI_IRQHandler
-                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .text.HAL_GPIO_EXTI_Callback
-                0x0000000000000000       0x16 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Master_Transmit
-                0x0000000000000000      0x1e8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Master_Receive
-                0x0000000000000000      0x1ec Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Slave_Transmit
-                0x0000000000000000      0x212 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Slave_Receive
-                0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Master_Transmit_IT
-                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Master_Receive_IT
-                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Slave_Transmit_IT
-                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Slave_Receive_IT
-                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Master_Transmit_DMA
-                0x0000000000000000      0x1e0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Master_Receive_DMA
-                0x0000000000000000      0x1e0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Slave_Transmit_DMA
-                0x0000000000000000      0x16c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Slave_Receive_DMA
-                0x0000000000000000      0x16c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Mem_Write_IT
-                0x0000000000000000      0x128 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Mem_Read_IT
-                0x0000000000000000      0x12c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Mem_Write_DMA
-                0x0000000000000000      0x1ec Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Mem_Read_DMA
-                0x0000000000000000      0x1f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_IsDeviceReady
-                0x0000000000000000      0x210 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Master_Seq_Transmit_IT
-                0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Master_Seq_Transmit_DMA
-                0x0000000000000000      0x208 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Master_Seq_Receive_IT
-                0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Master_Seq_Receive_DMA
-                0x0000000000000000      0x208 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Slave_Seq_Transmit_IT
-                0x0000000000000000      0x144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Slave_Seq_Transmit_DMA
-                0x0000000000000000      0x26c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Slave_Seq_Receive_IT
-                0x0000000000000000      0x144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Slave_Seq_Receive_DMA
-                0x0000000000000000      0x26c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_EnableListen_IT
-                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_DisableListen_IT
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_Master_Abort_IT
-                0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_EV_IRQHandler
-                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_ER_IRQHandler
-                0x0000000000000000       0xc2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_MasterTxCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_MasterRxCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_SlaveTxCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_SlaveRxCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_AddrCallback
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_ListenCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_MemTxCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_MemRxCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_ErrorCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_AbortCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_GetMode
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2C_GetError
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_Master_ISR_IT
-                0x0000000000000000      0x252 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_Slave_ISR_IT
-                0x0000000000000000      0x206 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_Master_ISR_DMA
-                0x0000000000000000      0x1e6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_Slave_ISR_DMA
-                0x0000000000000000      0x190 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_ITAddrCplt
-                0x0000000000000000      0x104 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_ITMasterSeqCplt
-                0x0000000000000000       0x7a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_ITSlaveSeqCplt
-                0x0000000000000000       0x7a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_ITMasterCplt
-                0x0000000000000000      0x138 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_ITSlaveCplt
-                0x0000000000000000      0x1ac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_ITListenCplt
-                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_ITError
-                0x0000000000000000      0x180 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_DMAMasterTransmitCplt
-                0x0000000000000000       0x96 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_DMASlaveTransmitCplt
-                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_DMAMasterReceiveCplt
-                0x0000000000000000       0x96 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_DMASlaveReceiveCplt
-                0x0000000000000000       0x46 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_DMAError
-                0x0000000000000000       0x74 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_DMAAbort
-                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_WaitOnRXNEFlagUntilTimeout
-                0x0000000000000000       0xd8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_Enable_IRQ
-                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_Disable_IRQ
-                0x0000000000000000       0xca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_ConvertOtherXferOptions
-                0x0000000000000000       0x36 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_DeInit
-                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_ConfigColorKeying
-                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_ConfigCLUT
-                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_EnableColorKeying
-                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_DisableColorKeying
-                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_EnableCLUT
-                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_DisableCLUT
-                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_EnableDither
-                0x0000000000000000       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_DisableDither
-                0x0000000000000000       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetWindowSize
-                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetWindowPosition
-                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetPixelFormat
-                0x0000000000000000       0x6c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetAlpha
-                0x0000000000000000       0x6c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetAddress
-                0x0000000000000000       0x6c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetPitch
-                0x0000000000000000      0x10c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_ProgramLineEvent
-                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_Reload
-                0x0000000000000000       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_ConfigLayer_NoReload
-                0x0000000000000000       0x74 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetWindowSize_NoReload
-                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetWindowPosition_NoReload
-                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetPixelFormat_NoReload
-                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetAlpha_NoReload
-                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetAddress_NoReload
-                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_SetPitch_NoReload
-                0x0000000000000000       0xf0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_ConfigColorKeying_NoReload
-                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_EnableColorKeying_NoReload
-                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_DisableColorKeying_NoReload
-                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_EnableCLUT_NoReload
-                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_DisableCLUT_NoReload
-                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_LTDC_GetError
-                0x0000000000000000       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_info    0x0000000000000000      0x169 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_abbrev  0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_aranges
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_line    0x0000000000000000      0x806 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .debug_str     0x0000000000000000    0xf9ef6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .ARM.attributes
-                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_DeInit
-                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_DisableBkUpAccess
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_ConfigPVD
-                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_EnablePVD
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_DisablePVD
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_EnableWakeUpPin
-                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_DisableWakeUpPin
-                0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_EnterSLEEPMode
-                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_EnterSTOPMode
-                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_EnterSTANDBYMode
-                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_PVD_IRQHandler
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_PVDCallback
-                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_EnableSleepOnExit
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_DisableSleepOnExit
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_EnableSEVOnPend
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .text.HAL_PWR_DisableSEVOnPend
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_EnableBkUpReg
-                0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_DisableBkUpReg
-                0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_EnableFlashPowerDown
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_DisableFlashPowerDown
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_EnableMainRegulatorLowVoltage
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_DisableMainRegulatorLowVoltage
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_EnableLowRegulatorLowVoltage
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_DisableLowRegulatorLowVoltage
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_DisableOverDrive
-                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_EnterUnderDriveSTOPMode
-                0x0000000000000000       0xc8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_GetVoltageRange
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .text.HAL_PWREx_ControlVoltageScaling
-                0x0000000000000000       0xf4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .text.HAL_RCC_DeInit
-                0x0000000000000000      0x1c0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .text.HAL_RCC_MCOConfig
-                0x0000000000000000       0xc8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .text.HAL_RCC_EnableCSS
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .text.HAL_RCC_DisableCSS
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .text.HAL_RCC_GetOscConfig
-                0x0000000000000000      0x128 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .text.HAL_RCC_NMI_IRQHandler
-                0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .text.HAL_RCC_CSSCallback
-                0x0000000000000000        0xe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .text.HAL_RCCEx_GetPeriphCLKConfig
-                0x0000000000000000      0x218 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .text.HAL_RCCEx_GetPeriphCLKFreq
-                0x0000000000000000      0x268 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .text.HAL_RCCEx_EnablePLLI2S
-                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .text.HAL_RCCEx_DisablePLLI2S
-                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .text.HAL_RCCEx_EnablePLLSAI
-                0x0000000000000000       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .text.HAL_RCCEx_DisablePLLSAI
-                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_DeInit
-                0x0000000000000000      0x158 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_GetTime
-                0x0000000000000000       0xbc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_GetDate
-                0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_SetAlarm_IT
-                0x0000000000000000      0x270 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_DeactivateAlarm
-                0x0000000000000000      0x11a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_GetAlarm
-                0x0000000000000000      0x11e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_AlarmIRQHandler
-                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_AlarmAEventCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_PollForAlarmAEvent
-                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.HAL_RTC_GetState
-                0x0000000000000000       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .text.RTC_Bcd2ToByte
-                0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_SetTimeStamp_IT
-                0x0000000000000000       0xe8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_DeactivateTimeStamp
-                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_SetInternalTimeStamp
-                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_DeactivateInternalTimeStamp
-                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_GetTimeStamp
-                0x0000000000000000      0x140 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_SetTamper
-                0x0000000000000000      0x168 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_SetTamper_IT
-                0x0000000000000000      0x1d8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_DeactivateTamper
-                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_TamperTimeStampIRQHandler
-                0x0000000000000000      0x104 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_TimeStampEventCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_Tamper1EventCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_Tamper2EventCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_Tamper3EventCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_PollForTimeStampEvent
-                0x0000000000000000       0x86 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_PollForTamper1Event
-                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_PollForTamper2Event
-                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_PollForTamper3Event
-                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_SetWakeUpTimer
-                0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_SetWakeUpTimer_IT
-                0x0000000000000000      0x190 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_DeactivateWakeUpTimer
-                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_GetWakeUpTimer
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_WakeUpTimerIRQHandler
-                0x0000000000000000       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_WakeUpTimerEventCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_PollForWakeUpTimerEvent
-                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_BKUPWrite
-                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_BKUPRead
-                0x0000000000000000       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_SetSmoothCalib
-                0x0000000000000000       0xb6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_SetSynchroShift
-                0x0000000000000000       0xf8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_SetCalibrationOutPut
-                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_DeactivateCalibrationOutPut
-                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_SetRefClock
-                0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_DeactivateRefClock
-                0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_EnableBypassShadow
-                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_DisableBypassShadow
-                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_AlarmBEventCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .text.HAL_RTCEx_PollForAlarmBEvent
-                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_DeInit
-                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_IRQHandler
-                0x0000000000000000       0x34 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_RefreshErrorCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_DMA_XferCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_DMA_XferErrorCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_Read_8b
-                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_Write_8b
-                0x0000000000000000       0x86 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_Read_16b
-                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_Write_16b
-                0x0000000000000000       0x86 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_Read_32b
-                0x0000000000000000       0x7e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_Write_32b
-                0x0000000000000000       0x86 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_Read_DMA
-                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_Write_DMA
-                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_WriteProtection_Enable
-                0x0000000000000000       0x42 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_WriteProtection_Disable
-                0x0000000000000000       0x42 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_SetAutoRefreshNumber
-                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_GetModeStatus
-                0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .text.HAL_SDRAM_GetState
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_DeInit
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_Transmit
-                0x0000000000000000      0x2cc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_Receive
-                0x0000000000000000      0x250 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_TransmitReceive
-                0x0000000000000000      0x426 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_Transmit_IT
-                0x0000000000000000      0x10c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_Receive_IT
-                0x0000000000000000      0x150 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_TransmitReceive_IT
-                0x0000000000000000      0x160 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_Transmit_DMA
-                0x0000000000000000      0x1d8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_Receive_DMA
-                0x0000000000000000      0x238 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_TransmitReceive_DMA
-                0x0000000000000000      0x318 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_Abort
-                0x0000000000000000      0x240 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_Abort_IT
-                0x0000000000000000      0x1f4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_DMAPause
-                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_DMAResume
-                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_DMAStop
-                0x0000000000000000       0x7e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_IRQHandler
-                0x0000000000000000      0x200 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_TxCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_RxCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_TxRxCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_TxHalfCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_RxHalfCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_TxRxHalfCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_ErrorCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_AbortCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_GetState
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.HAL_SPI_GetError
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_DMATransmitCplt
-                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_DMAReceiveCplt
-                0x0000000000000000       0x86 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_DMATransmitReceiveCplt
-                0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_DMAHalfTransmitCplt
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_DMAHalfReceiveCplt
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_DMAHalfTransmitReceiveCplt
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_DMAError
-                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_DMAAbortOnError
-                0x0000000000000000       0x2a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_DMATxAbortCallback
-                0x0000000000000000       0xde Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_DMARxAbortCallback
-                0x0000000000000000       0xe2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_2linesRxISR_8BIT
-                0x0000000000000000       0xbe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_2linesTxISR_8BIT
-                0x0000000000000000       0x92 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_2linesRxISR_16BIT
-                0x0000000000000000       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_2linesTxISR_16BIT
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_RxISR_8BIT
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_RxISR_16BIT
-                0x0000000000000000       0x4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_TxISR_8BIT
-                0x0000000000000000       0x46 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_TxISR_16BIT
-                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_WaitFlagStateUntilTimeout
-                0x0000000000000000       0xd4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_WaitFifoStateUntilTimeout
-                0x0000000000000000       0xda Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_EndRxTransaction
-                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_EndRxTxTransaction
-                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_CloseRxTx_ISR
-                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_CloseRx_ISR
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_CloseTx_ISR
-                0x0000000000000000       0x7e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_AbortRx_ISR
-                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .text.SPI_AbortTx_ISR
-                0x0000000000000000      0x144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .text.HAL_SPIEx_FlushRxFifo
-                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_info    0x0000000000000000      0x6dc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_abbrev  0x0000000000000000      0x162 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_aranges
-                0x0000000000000000       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_ranges  0x0000000000000000       0x10 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x288 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_line    0x0000000000000000      0x823 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_str     0x0000000000000000    0xfa3be Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .debug_frame   0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .ARM.attributes
-                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Base_DeInit
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Base_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Base_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Base_Start
-                0x0000000000000000       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Base_Stop
-                0x0000000000000000       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Base_Stop_IT
-                0x0000000000000000       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Base_Start_DMA
-                0x0000000000000000       0xcc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Base_Stop_DMA
-                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_Init
-                0x0000000000000000       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_DeInit
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_Start
-                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_Stop
-                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_Start_IT
-                0x0000000000000000      0x114 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_Stop_IT
-                0x0000000000000000      0x134 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_Start_DMA
-                0x0000000000000000      0x230 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_Stop_DMA
-                0x0000000000000000      0x164 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PWM_DeInit
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PWM_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PWM_Start
-                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PWM_Stop
-                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PWM_Start_IT
-                0x0000000000000000      0x114 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PWM_Stop_IT
-                0x0000000000000000      0x134 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PWM_Start_DMA
-                0x0000000000000000      0x230 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PWM_Stop_DMA
-                0x0000000000000000      0x164 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_Init
-                0x0000000000000000       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_DeInit
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_Start
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_Stop
-                0x0000000000000000       0x52 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_Start_IT
-                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_Stop_IT
-                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_Start_DMA
-                0x0000000000000000      0x1f8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_Stop_DMA
-                0x0000000000000000      0x110 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OnePulse_Init
-                0x0000000000000000       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OnePulse_DeInit
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OnePulse_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OnePulse_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OnePulse_Start
-                0x0000000000000000       0x68 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OnePulse_Stop
-                0x0000000000000000       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OnePulse_Start_IT
-                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OnePulse_Stop_IT
-                0x0000000000000000       0xd8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Encoder_Init
-                0x0000000000000000      0x124 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Encoder_DeInit
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Encoder_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Encoder_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Encoder_Start
-                0x0000000000000000       0x6e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Encoder_Stop
-                0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Encoder_Start_IT
-                0x0000000000000000       0xae Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Encoder_Stop_IT
-                0x0000000000000000       0xd4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Encoder_Start_DMA
-                0x0000000000000000      0x1f4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Encoder_Stop_DMA
-                0x0000000000000000       0xfc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_ConfigChannel
-                0x0000000000000000       0xfc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_ConfigChannel
-                0x0000000000000000      0x138 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OnePulse_ConfigChannel
-                0x0000000000000000      0x184 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_DMABurst_WriteStart
-                0x0000000000000000      0x284 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_DMABurst_WriteStop
-                0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_DMABurst_ReadStart
-                0x0000000000000000      0x284 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_DMABurst_ReadStop
-                0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_GenerateEvent
-                0x0000000000000000       0x4e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_ConfigOCrefClear
-                0x0000000000000000      0x204 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_ConfigTI1Input
-                0x0000000000000000       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_SlaveConfigSynchro_IT
-                0x0000000000000000       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_ReadCapturedValue
-                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PeriodElapsedCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PeriodElapsedHalfCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_CaptureHalfCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_TriggerHalfCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_ErrorCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Base_GetState
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OC_GetState
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_PWM_GetState
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_IC_GetState
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_OnePulse_GetState
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.HAL_TIM_Encoder_GetState
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_DMAError
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_DMADelayPulseCplt
-                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_DMADelayPulseHalfCplt
-                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_DMACaptureCplt
-                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_DMACaptureHalfCplt
-                0x0000000000000000       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_DMAPeriodElapsedCplt
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_DMAPeriodElapsedHalfCplt
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_DMATriggerCplt
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_DMATriggerHalfCplt
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_TI1_SetConfig
-                0x0000000000000000       0xe8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_TI2_SetConfig
-                0x0000000000000000       0x7a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_TI3_SetConfig
-                0x0000000000000000       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_TI4_SetConfig
-                0x0000000000000000       0x7a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_CCxChannelCmd
-                0x0000000000000000       0x4a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_HallSensor_Init
-                0x0000000000000000      0x130 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_HallSensor_DeInit
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_HallSensor_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_HallSensor_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_HallSensor_Start
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_HallSensor_Stop
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_HallSensor_Start_IT
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_HallSensor_Stop_IT
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_HallSensor_Start_DMA
-                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_HallSensor_Stop_DMA
-                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_OCN_Start
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_OCN_Stop
-                0x0000000000000000       0x82 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_OCN_Start_IT
-                0x0000000000000000       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_OCN_Stop_IT
-                0x0000000000000000       0xec Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_OCN_Start_DMA
-                0x0000000000000000      0x18c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_OCN_Stop_DMA
-                0x0000000000000000       0xee Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_PWMN_Start
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_PWMN_Stop
-                0x0000000000000000       0x82 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_PWMN_Start_IT
-                0x0000000000000000       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_PWMN_Stop_IT
-                0x0000000000000000       0xec Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_PWMN_Start_DMA
-                0x0000000000000000      0x18c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_PWMN_Stop_DMA
-                0x0000000000000000       0xee Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_OnePulseN_Start
-                0x0000000000000000       0x32 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_OnePulseN_Stop
-                0x0000000000000000       0x82 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_OnePulseN_Start_IT
-                0x0000000000000000       0x52 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_OnePulseN_Stop_IT
-                0x0000000000000000       0xa2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_ConfigCommutEvent
-                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_ConfigCommutEvent_IT
-                0x0000000000000000       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_ConfigCommutEvent_DMA
-                0x0000000000000000       0xe4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_RemapConfig
-                0x0000000000000000       0x46 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_GroupChannel5
-                0x0000000000000000       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_CommutHalfCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.HAL_TIMEx_HallSensor_GetState
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.TIMEx_DMACommutationCplt
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.TIMEx_DMACommutationHalfCplt
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .text.TIM_CCxNChannelCmd
-                0x0000000000000000       0x4a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_HalfDuplex_Init
-                0x0000000000000000       0xac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_LIN_Init
-                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_MultiProcessor_Init
-                0x0000000000000000       0xd4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_DeInit
-                0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_MspInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_MspDeInit
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_Transmit
-                0x0000000000000000      0x122 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_Receive
-                0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_Transmit_IT
-                0x0000000000000000       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_Receive_IT
-                0x0000000000000000      0x144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_Transmit_DMA
-                0x0000000000000000       0xf8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_Receive_DMA
-                0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_DMAPause
-                0x0000000000000000       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_DMAResume
-                0x0000000000000000       0x8c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_DMAStop
-                0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_Abort
-                0x0000000000000000      0x11c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_AbortTransmit
-                0x0000000000000000       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_AbortReceive
-                0x0000000000000000       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_Abort_IT
-                0x0000000000000000      0x16c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_AbortTransmit_IT
-                0x0000000000000000       0xac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_AbortReceive_IT
-                0x0000000000000000       0xdc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_IRQHandler
-                0x0000000000000000      0x264 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_TxCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_TxHalfCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_RxCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_RxHalfCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_ErrorCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_AbortCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_AbortTransmitCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_AbortReceiveCpltCallback
-                0x0000000000000000       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_ReceiverTimeout_Config
-                0x0000000000000000       0x2a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_EnableReceiverTimeout
-                0x0000000000000000       0x5c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_DisableReceiverTimeout
-                0x0000000000000000       0x5c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_MultiProcessor_EnableMuteMode
-                0x0000000000000000       0x4a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_MultiProcessor_DisableMuteMode
-                0x0000000000000000       0x4a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_MultiProcessor_EnterMuteMode
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_HalfDuplex_EnableTransmitter
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_HalfDuplex_EnableReceiver
-                0x0000000000000000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_LIN_SendBreak
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_GetState
-                0x0000000000000000       0x26 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.HAL_UART_GetError
-                0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_EndTxTransfer
-                0x0000000000000000       0x2a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_EndRxTransfer
-                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_DMATransmitCplt
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_DMATxHalfCplt
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_DMAReceiveCplt
-                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_DMARxHalfCplt
-                0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_DMAError
-                0x0000000000000000       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_DMAAbortOnError
-                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_DMATxAbortCallback
-                0x0000000000000000       0x62 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_DMARxAbortCallback
-                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_DMATxOnlyAbortCallback
-                0x0000000000000000       0x2a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_DMARxOnlyAbortCallback
-                0x0000000000000000       0x42 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_TxISR_8BIT
-                0x0000000000000000       0x72 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_TxISR_16BIT
-                0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_EndTransmit_IT
-                0x0000000000000000       0x32 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_RxISR_8BIT
-                0x0000000000000000       0xa6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .text.UART_RxISR_16BIT
-                0x0000000000000000       0xa6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .text.HAL_RS485Ex_Init
-                0x0000000000000000       0xd0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .text.HAL_MultiProcessorEx_AddressLength_Set
-                0x0000000000000000       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_info    0x0000000000000000      0x773 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_abbrev  0x0000000000000000      0x17c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_aranges
-                0x0000000000000000       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_ranges  0x0000000000000000       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_line    0x0000000000000000      0x845 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_str     0x0000000000000000    0xfa3e2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .comment       0x0000000000000000       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .debug_frame   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .ARM.attributes
-                0x0000000000000000       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .data          0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .bss           0x0000000000000000        0x0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NORSRAM_Init
-                0x0000000000000000       0xe0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NORSRAM_DeInit
-                0x0000000000000000       0x68 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NORSRAM_Timing_Init
-                0x0000000000000000       0xa6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NORSRAM_Extended_Timing_Init
-                0x0000000000000000       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NORSRAM_WriteOperation_Enable
-                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NORSRAM_WriteOperation_Disable
-                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NAND_Init
-                0x0000000000000000       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NAND_CommonSpace_Timing_Init
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NAND_AttributeSpace_Timing_Init
-                0x0000000000000000       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NAND_DeInit
-                0x0000000000000000       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NAND_ECC_Enable
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NAND_ECC_Disable
-                0x0000000000000000       0x24 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_NAND_GetECC
-                0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_SDRAM_DeInit
-                0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_SDRAM_WriteProtection_Enable
-                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_SDRAM_WriteProtection_Disable
-                0x0000000000000000       0x2c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_SDRAM_SetAutoRefreshNumber
-                0x0000000000000000       0x26 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .text.FMC_SDRAM_GetModeStatus
-                0x0000000000000000       0x3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0xa5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x2bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x2e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x8e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x51 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0xef Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x6a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x1df Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x22 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0xdf Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000     0x12cd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x11f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x19 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000    0x190f0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x43 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000     0x36b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x61 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000     0x18ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x6c4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x185 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x117 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x1fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x27 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x24f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x41 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x236 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x416 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x153 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x107 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x20f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0xea Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x14f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x25b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x12 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x514 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x22c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x5a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0xa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x198 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x12f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x35 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x313 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x4ca Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0xd6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x2fe Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x59 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x53c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x0000000000000000      0x14e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.makeCmsisPriority
-                0x0000000000000000       0x2c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.inHandlerMode
-                0x0000000000000000       0x24 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osKernelStart
-                0x0000000000000000        0xe Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osKernelRunning
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osKernelSysTick
-                0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osThreadGetId
-                0x0000000000000000        0xe Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osThreadTerminate
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osThreadYield
-                0x0000000000000000       0x24 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osThreadSetPriority
-                0x0000000000000000       0x2a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osThreadGetPriority
-                0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osTimerCreate
-                0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osTimerStart
-                0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osTimerStop
-                0x0000000000000000       0x1e Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osTimerDelete
-                0x0000000000000000       0x1e Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osSignalSet
-                0x0000000000000000       0x80 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osSignalWait
-                0x0000000000000000       0x98 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMutexCreate
-                0x0000000000000000       0x30 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMutexWait
-                0x0000000000000000       0x9c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMutexRelease
-                0x0000000000000000       0x6c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMutexDelete
-                0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osSemaphoreCreate
-                0x0000000000000000       0x80 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osSemaphoreWait
-                0x0000000000000000       0x9c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osSemaphoreRelease
-                0x0000000000000000       0x6c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osSemaphoreDelete
-                0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osPoolCreate
-                0x0000000000000000       0xba Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osPoolAlloc
-                0x0000000000000000       0xc8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osPoolCAlloc
-                0x0000000000000000       0x2a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osPoolFree
-                0x0000000000000000       0x82 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMessageCreate
-                0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMessagePut
-                0x0000000000000000       0x80 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMessageGet
-                0x0000000000000000       0xe8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMailCreate
-                0x0000000000000000       0xb0 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMailAlloc
-                0x0000000000000000       0x2a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMailCAlloc
-                0x0000000000000000       0x46 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMailPut
-                0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMailGet
-                0x0000000000000000       0xe8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMailFree
-                0x0000000000000000       0x2a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osSystickHandler
-                0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osThreadSuspend
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osThreadResume
-                0x0000000000000000       0x44 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osThreadSuspendAll
-                0x0000000000000000        0xe Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osThreadResumeAll
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osDelayUntil
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osAbortDelay
-                0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osThreadList
-                0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMessagePeek
-                0x0000000000000000       0x96 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMessageWaiting
-                0x0000000000000000       0x2c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMessageAvailableSpace
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osMessageDelete
-                0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osRecursiveMutexCreate
-                0x0000000000000000       0x30 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osRecursiveMutexRelease
-                0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osRecursiveMutexWait
-                0x0000000000000000       0x58 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osSemaphoreGetCount
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x9a Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x0000000000000000       0xf2 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_info    0x0000000000000000       0x97 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_abbrev  0x0000000000000000       0x47 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_aranges
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0xe3 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_line    0x0000000000000000      0x49e Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .debug_str     0x0000000000000000     0x826e Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .comment       0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .ARM.attributes
-                0x0000000000000000       0x39 Middlewares/Third_Party/FreeRTOS/Source/croutine.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text.xEventGroupCreateStatic
-                0x0000000000000000       0x72 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text.xEventGroupCreate
-                0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text.xEventGroupSync
-                0x0000000000000000      0x164 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text.xEventGroupWaitBits
-                0x0000000000000000      0x1a4 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text.xEventGroupClearBits
-                0x0000000000000000       0x74 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text.xEventGroupGetBitsFromISR
-                0x0000000000000000       0x4a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text.xEventGroupSetBits
-                0x0000000000000000      0x11a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text.vEventGroupDelete
-                0x0000000000000000       0x6c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text.vEventGroupSetBitsCallback
-                0x0000000000000000       0x1a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text.vEventGroupClearBitsCallback
-                0x0000000000000000       0x1a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .text.prvTestWaitCondition
-                0x0000000000000000       0x44 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_info    0x0000000000000000     0x123e Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_abbrev  0x0000000000000000      0x2da Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_aranges
-                0x0000000000000000       0x70 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_ranges  0x0000000000000000       0x60 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000      0x1d3 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_macro   0x0000000000000000       0x19 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_line    0x0000000000000000      0x8a5 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_str     0x0000000000000000     0xbbe3 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .comment       0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .debug_frame   0x0000000000000000      0x1a4 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .ARM.attributes
-                0x0000000000000000       0x39 Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/list.o
- .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueGenericReset
-                0x0000000000000000       0xd4 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueGenericCreateStatic
-                0x0000000000000000       0xfa Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueGenericCreate
-                0x0000000000000000       0x82 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.prvInitialiseNewQueue
-                0x0000000000000000       0x3e Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.prvInitialiseMutex
-                0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueCreateMutex
-                0x0000000000000000       0x30 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueCreateMutexStatic
-                0x0000000000000000       0x36 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueGiveMutexRecursive
-                0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueTakeMutexRecursive
-                0x0000000000000000       0x6e Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueCreateCountingSemaphoreStatic
-                0x0000000000000000       0x72 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueCreateCountingSemaphore
-                0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueGenericSend
-                0x0000000000000000      0x204 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueGenericSendFromISR
-                0x0000000000000000      0x138 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueGiveFromISR
-                0x0000000000000000      0x122 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueReceive
-                0x0000000000000000      0x1c4 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueSemaphoreTake
-                0x0000000000000000      0x220 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueuePeek
-                0x0000000000000000      0x1c8 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueReceiveFromISR
-                0x0000000000000000      0x106 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueuePeekFromISR
-                0x0000000000000000       0xda Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.uxQueueMessagesWaiting
-                0x0000000000000000       0x3e Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.uxQueueSpacesAvailable
-                0x0000000000000000       0x48 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.uxQueueMessagesWaitingFromISR
-                0x0000000000000000       0x3e Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.vQueueDelete
-                0x0000000000000000       0x48 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.prvGetDisinheritPriorityAfterTimeout
-                0x0000000000000000       0x30 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.prvCopyDataToQueue
-                0x0000000000000000       0xd4 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.prvCopyDataFromQueue
-                0x0000000000000000       0x4c Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.prvUnlockQueue
-                0x0000000000000000       0xa4 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.prvIsQueueEmpty
-                0x0000000000000000       0x2c Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueIsQueueEmptyFromISR
-                0x0000000000000000       0x4a Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.prvIsQueueFull
-                0x0000000000000000       0x30 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.xQueueIsQueueFullFromISR
-                0x0000000000000000       0x4e Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.vQueueAddToRegistry
-                0x0000000000000000       0x50 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.pcQueueGetName
-                0x0000000000000000       0x4c Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .text.vQueueUnregisterQueue
-                0x0000000000000000       0x54 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_info    0x0000000000000000     0x21ea Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_abbrev  0x0000000000000000      0x336 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_aranges
-                0x0000000000000000      0x128 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_ranges  0x0000000000000000      0x118 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000      0x209 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_macro   0x0000000000000000       0x87 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_line    0x0000000000000000     0x102d Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_str     0x0000000000000000     0xbff9 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .comment       0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .debug_frame   0x0000000000000000      0x504 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .ARM.attributes
-                0x0000000000000000       0x39 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- COMMON         0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/queue.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferGenericCreate
-                0x0000000000000000       0xbc Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferGenericCreateStatic
-                0x0000000000000000      0x10c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.vStreamBufferDelete
-                0x0000000000000000       0x50 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferReset
-                0x0000000000000000       0x6e Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferSetTriggerLevel
-                0x0000000000000000       0x5e Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferSpacesAvailable
-                0x0000000000000000       0x68 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferBytesAvailable
-                0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferSend
-                0x0000000000000000      0x172 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferSendFromISR
-                0x0000000000000000       0xe8 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.prvWriteMessageToBuffer
-                0x0000000000000000       0x7a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferReceive
-                0x0000000000000000      0x130 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferNextMessageLengthBytes
-                0x0000000000000000       0x96 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferReceiveFromISR
-                0x0000000000000000       0xe4 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.prvReadMessageFromBuffer
-                0x0000000000000000       0x64 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferIsEmpty
-                0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferIsFull
-                0x0000000000000000       0x62 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferSendCompletedFromISR
-                0x0000000000000000       0x8a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.xStreamBufferReceiveCompletedFromISR
-                0x0000000000000000       0x8a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.prvWriteBytesToBuffer
-                0x0000000000000000       0xea Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.prvReadBytesFromBuffer
-                0x0000000000000000       0xfa Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.prvBytesInBuffer
-                0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .text.prvInitialiseNewStreamBuffer
-                0x0000000000000000       0x68 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_info    0x0000000000000000     0x1b2c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_abbrev  0x0000000000000000      0x32b Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_aranges
-                0x0000000000000000       0xc8 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_ranges  0x0000000000000000       0xb8 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000      0x1d3 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x46 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x10 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_line    0x0000000000000000      0xbf8 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_str     0x0000000000000000     0xbb16 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .comment       0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .debug_frame   0x0000000000000000      0x358 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .ARM.attributes
-                0x0000000000000000       0x39 Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.uxDeletedTasksWaitingCleanUp
-                0x0000000000000000        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.xIdleTaskHandle
-                0x0000000000000000        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskDelete
-                0x0000000000000000      0x120 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.uxTaskPriorityGet
-                0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.uxTaskPriorityGetFromISR
-                0x0000000000000000       0x5c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskPrioritySet
-                0x0000000000000000      0x154 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskSuspend
-                0x0000000000000000      0x128 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.prvTaskIsTaskSuspended
-                0x0000000000000000       0x64 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskResume
-                0x0000000000000000       0xbc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskResumeFromISR
-                0x0000000000000000       0xe8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .rodata        0x0000000000000000        0x5 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskStartScheduler
-                0x0000000000000000       0xc4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskEndScheduler
-                0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskGetTickCount
-                0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskGetTickCountFromISR
-                0x0000000000000000       0x24 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.uxTaskGetNumberOfTasks
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.pcTaskGetName
-                0x0000000000000000       0x4c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskSetApplicationTaskTag
-                0x0000000000000000       0x38 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskGetApplicationTaskTag
-                0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskGetApplicationTaskTagFromISR
-                0x0000000000000000       0x5c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskCallApplicationTaskHook
-                0x0000000000000000       0x44 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskPlaceOnEventList
-                0x0000000000000000       0x4c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskPlaceOnUnorderedEventList
-                0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskRemoveFromEventList
-                0x0000000000000000       0xc8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskRemoveFromUnorderedEventList
-                0x0000000000000000       0xc8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskSetTimeOutState
-                0x0000000000000000       0x50 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskInternalSetTimeOutState
-                0x0000000000000000       0x2c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskCheckForTimeOut
-                0x0000000000000000       0xc8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskMissedYield
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.prvIdleTask
-                0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.prvCheckTasksWaitingTermination
-                0x0000000000000000       0x58 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.prvDeleteTCB
-                0x0000000000000000       0x60 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskGetCurrentTaskHandle
-                0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskGetSchedulerState
-                0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskPriorityInherit
-                0x0000000000000000      0x100 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskPriorityDisinherit
-                0x0000000000000000      0x110 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskPriorityDisinheritAfterTimeout
-                0x0000000000000000      0x138 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.uxTaskResetEventItemValue
-                0x0000000000000000       0x30 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.pvTaskIncrementMutexHeldCount
-                0x0000000000000000       0x28 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.ulTaskNotifyTake
-                0x0000000000000000       0x90 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskNotifyWait
-                0x0000000000000000       0xb4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskGenericNotify
-                0x0000000000000000      0x170 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskGenericNotifyFromISR
-                0x0000000000000000      0x1c0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskNotifyGiveFromISR
-                0x0000000000000000      0x128 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.xTaskNotifyStateClear
-                0x0000000000000000       0x4c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x35 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x0000000000000000       0x91 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_info    0x0000000000000000      0x8ad Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_abbrev  0x0000000000000000      0x158 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_aranges
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000      0x1b1 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x87 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_macro   0x0000000000000000       0x97 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_line    0x0000000000000000      0x5e2 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .debug_str     0x0000000000000000     0xbc8c Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .comment       0x0000000000000000       0x7c Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .ARM.attributes
-                0x0000000000000000       0x39 Middlewares/Third_Party/FreeRTOS/Source/timers.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .bss.ucMaxSysCallPriority
-                0x0000000000000000        0x1 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .bss.ulMaxPRIGROUPValue
-                0x0000000000000000        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .rodata.pcInterruptPriorityRegisters
-                0x0000000000000000        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .text.prvPortStartFirstTask
-                0x0000000000000000       0x28 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .text.xPortStartScheduler
-                0x0000000000000000       0xf8 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .text.vPortEndScheduler
-                0x0000000000000000       0x38 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .text.vPortSetupTimerInterrupt
-                0x0000000000000000       0x48 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .text.vPortEnableVFP
-                0x0000000000000000       0x14 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .text.vPortValidateInterruptPriority
-                0x0000000000000000       0x84 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000      0x174 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000       0x8e Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000       0x51 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .group         0x0000000000000000        0xc Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .text          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .data          0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .bss           0x0000000000000000        0x0 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .rodata.xHeapStructSize
-                0x0000000000000000        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .text.xPortGetFreeHeapSize
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .text.xPortGetMinimumEverFreeHeapSize
-                0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .text.vPortInitialiseBlocks
-                0x0000000000000000        0xe Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000      0xa5a Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x18 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x22 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x40 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x94 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x3c Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x34 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000      0x10e Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x8d Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x57 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x52 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x1f Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x43 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x20 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000      0x1a3 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000      0x330 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x16 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x29 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0xef Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x6a Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000      0x1df Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000      0x109 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000      0x15a Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0xde Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x1c Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0x26 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000      0x4c5 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0xb5 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_macro   0x0000000000000000       0xaa Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-errno.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-errno.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-errno.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-exit.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-exit.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-exit.o)
- .text.exit     0x0000000000000000       0x28 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-exit.o)
- .debug_frame   0x0000000000000000       0x28 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-exit.o)
- .ARM.attributes
-                0x0000000000000000       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-exit.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-impure.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-impure.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-impure.o)
- .rodata._global_impure_ptr
-                0x0000000000000000        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-impure.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-init.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-init.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-init.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memcpy-stub.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memcpy-stub.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memcpy-stub.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memset.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memset.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memset.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sprintf.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sprintf.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sprintf.o)
- .text._sprintf_r
-                0x0000000000000000       0x38 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sprintf.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o)
- .text.__ssprint_r
-                0x0000000000000000       0xf0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-vfprintf_i.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-vfprintf_i.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-vfprintf_i.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memchr.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memchr.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memmove.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memmove.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memmove.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-freer.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-freer.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-freer.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-mallocr.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-mallocr.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-mallocr.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-reallocr.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-reallocr.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-reallocr.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sbrkr.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sbrkr.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sbrkr.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-mlock.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-mlock.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-mlock.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-msizer.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-msizer.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-msizer.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-reent.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-reent.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-reent.o)
- .text.cleanup_glue
-                0x0000000000000000       0x1a /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-reent.o)
- .text._reclaim_reent
-                0x0000000000000000       0xb8 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-reent.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_aeabi_uldivmod.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_aeabi_uldivmod.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_udivmoddi4.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_udivmoddi4.o)
- .ARM.extab     0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_udivmoddi4.o)
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_dvmd_tls.o)
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_dvmd_tls.o)
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
- .eh_frame      0x0000000000000000        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
- .ARM.attributes
-                0x0000000000000000       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
- .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
- .data          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
- .bss           0x0000000000000000        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
-
-Memory Configuration
-
-Name             Origin             Length             Attributes
-RAM              0x0000000020000000 0x0000000000050000 xrw
-FLASH            0x0000000008000000 0x0000000000100000 xr
-*default*        0x0000000000000000 0xffffffffffffffff
-
-Linker script and memory map
-
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/crt0.o
-LOAD Core/Src/freertos.o
-LOAD Core/Src/ft5336.o
-LOAD Core/Src/main.o
-LOAD Core/Src/stm32746g_discovery.o
-LOAD Core/Src/stm32746g_discovery_lcd.o
-LOAD Core/Src/stm32746g_discovery_sdram.o
-LOAD Core/Src/stm32746g_discovery_ts.o
-LOAD Core/Src/stm32f7xx_hal_msp.o
-LOAD Core/Src/stm32f7xx_hal_timebase_tim.o
-LOAD Core/Src/stm32f7xx_it.o
-LOAD Core/Src/syscalls.o
-LOAD Core/Src/sysmem.o
-LOAD Core/Src/system_stm32f7xx.o
-LOAD Core/Startup/startup_stm32f746nghx.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.o
-LOAD Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
-LOAD Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
-LOAD Middlewares/Third_Party/FreeRTOS/Source/croutine.o
-LOAD Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
-LOAD Middlewares/Third_Party/FreeRTOS/Source/list.o
-LOAD Middlewares/Third_Party/FreeRTOS/Source/queue.o
-LOAD Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
-LOAD Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-LOAD Middlewares/Third_Party/FreeRTOS/Source/timers.o
-LOAD Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
-LOAD Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
-START GROUP
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libm.a
-END GROUP
-START GROUP
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a
-END GROUP
-START GROUP
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libnosys.a
-END GROUP
-START GROUP
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libnosys.a
-END GROUP
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtend.o
-LOAD /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
-                0x0000000020050000                _estack = (ORIGIN (RAM) + LENGTH (RAM))
-                0x0000000000000200                _Min_Heap_Size = 0x200
-                0x0000000000000400                _Min_Stack_Size = 0x400
-
-.isr_vector     0x0000000008000000      0x1c8
-                0x0000000008000000                . = ALIGN (0x4)
- *(.isr_vector)
- .isr_vector    0x0000000008000000      0x1c8 Core/Startup/startup_stm32f746nghx.o
-                0x0000000008000000                g_pfnVectors
-                0x00000000080001c8                . = ALIGN (0x4)
-
-.text           0x00000000080001d0     0xc210
-                0x00000000080001d0                . = ALIGN (0x4)
- *(.text)
- .text          0x00000000080001d0       0x40 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
- .text          0x0000000008000210       0xa0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memchr.o)
-                0x0000000008000210                memchr
- .text          0x00000000080002b0       0x30 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_aeabi_uldivmod.o)
-                0x00000000080002b0                __aeabi_uldivmod
- .text          0x00000000080002e0      0x2cc /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_udivmoddi4.o)
-                0x00000000080002e0                __udivmoddi4
- .text          0x00000000080005ac        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_dvmd_tls.o)
-                0x00000000080005ac                __aeabi_ldiv0
-                0x00000000080005ac                __aeabi_idiv0
- *(.text*)
- .text.vApplicationStackOverflowHook
-                0x00000000080005b0       0x16 Core/Src/freertos.o
-                0x00000000080005b0                vApplicationStackOverflowHook
- .text.vApplicationMallocFailedHook
-                0x00000000080005c6        0xe Core/Src/freertos.o
-                0x00000000080005c6                vApplicationMallocFailedHook
- .text.ft5336_Init
-                0x00000000080005d4       0x1c Core/Src/ft5336.o
-                0x00000000080005d4                ft5336_Init
- .text.ft5336_Reset
-                0x00000000080005f0       0x16 Core/Src/ft5336.o
-                0x00000000080005f0                ft5336_Reset
- .text.ft5336_ReadID
-                0x0000000008000606       0x5c Core/Src/ft5336.o
-                0x0000000008000606                ft5336_ReadID
- .text.ft5336_TS_Start
-                0x0000000008000662       0x22 Core/Src/ft5336.o
-                0x0000000008000662                ft5336_TS_Start
- .text.ft5336_TS_DetectTouch
-                0x0000000008000684       0x54 Core/Src/ft5336.o
-                0x0000000008000684                ft5336_TS_DetectTouch
- .text.ft5336_TS_GetXY
-                0x00000000080006d8      0x1e0 Core/Src/ft5336.o
-                0x00000000080006d8                ft5336_TS_GetXY
- .text.ft5336_TS_EnableIT
-                0x00000000080008b8       0x28 Core/Src/ft5336.o
-                0x00000000080008b8                ft5336_TS_EnableIT
- .text.ft5336_TS_DisableIT
-                0x00000000080008e0       0x28 Core/Src/ft5336.o
-                0x00000000080008e0                ft5336_TS_DisableIT
- .text.ft5336_TS_ITStatus
-                0x0000000008000908       0x18 Core/Src/ft5336.o
-                0x0000000008000908                ft5336_TS_ITStatus
- .text.ft5336_TS_ClearIT
-                0x0000000008000920       0x16 Core/Src/ft5336.o
-                0x0000000008000920                ft5336_TS_ClearIT
- .text.ft5336_TS_GetGestureID
-                0x0000000008000936       0x32 Core/Src/ft5336.o
-                0x0000000008000936                ft5336_TS_GetGestureID
- .text.ft5336_TS_GetTouchInfo
-                0x0000000008000968      0x15c Core/Src/ft5336.o
-                0x0000000008000968                ft5336_TS_GetTouchInfo
- .text.ft5336_Get_I2C_InitializedStatus
-                0x0000000008000ac4       0x18 Core/Src/ft5336.o
- .text.ft5336_I2C_InitializeIfRequired
-                0x0000000008000adc       0x20 Core/Src/ft5336.o
- .text.ft5336_TS_Configure
-                0x0000000008000afc       0x1c Core/Src/ft5336.o
- .text.main     0x0000000008000b18      0x27c Core/Src/main.o
-                0x0000000008000b18                main
- .text.SystemClock_Config
-                0x0000000008000d94      0x160 Core/Src/main.o
-                0x0000000008000d94                SystemClock_Config
- .text.MX_ADC1_Init
-                0x0000000008000ef4       0xa4 Core/Src/main.o
- .text.MX_ADC3_Init
-                0x0000000008000f98       0xa4 Core/Src/main.o
- .text.MX_DAC_Init
-                0x000000000800103c       0x54 Core/Src/main.o
- .text.MX_DMA2D_Init
-                0x0000000008001090       0x64 Core/Src/main.o
- .text.MX_I2C1_Init
-                0x00000000080010f4       0x80 Core/Src/main.o
- .text.MX_I2C3_Init
-                0x0000000008001174       0x80 Core/Src/main.o
- .text.MX_LTDC_Init
-                0x00000000080011f4      0x104 Core/Src/main.o
- .text.MX_RTC_Init
-                0x00000000080012f8      0x14c Core/Src/main.o
- .text.MX_SPI2_Init
-                0x0000000008001444       0x7c Core/Src/main.o
- .text.MX_TIM1_Init
-                0x00000000080014c0       0xa8 Core/Src/main.o
- .text.MX_TIM2_Init
-                0x0000000008001568       0x9c Core/Src/main.o
- .text.MX_TIM3_Init
-                0x0000000008001604      0x11c Core/Src/main.o
- .text.MX_TIM5_Init
-                0x0000000008001720       0x9c Core/Src/main.o
- .text.MX_TIM8_Init
-                0x00000000080017bc      0x154 Core/Src/main.o
- .text.MX_UART7_Init
-                0x0000000008001910       0x60 Core/Src/main.o
- .text.MX_USART1_UART_Init
-                0x0000000008001970       0x60 Core/Src/main.o
- .text.MX_USART6_UART_Init
-                0x00000000080019d0       0x60 Core/Src/main.o
- .text.MX_FMC_Init
-                0x0000000008001a30       0x9c Core/Src/main.o
- .text.MX_GPIO_Init
-                0x0000000008001acc      0x3d8 Core/Src/main.o
- .text.StartDefaultTask
-                0x0000000008001ea4       0x10 Core/Src/main.o
-                0x0000000008001ea4                StartDefaultTask
- .text.HAL_TIM_PeriodElapsedCallback
-                0x0000000008001eb4       0x24 Core/Src/main.o
-                0x0000000008001eb4                HAL_TIM_PeriodElapsedCallback
- .text.Error_Handler
-                0x0000000008001ed8        0x8 Core/Src/main.o
-                0x0000000008001ed8                Error_Handler
- .text.I2Cx_MspInit
-                0x0000000008001ee0      0x160 Core/Src/stm32746g_discovery.o
- .text.I2Cx_Init
-                0x0000000008002040       0x78 Core/Src/stm32746g_discovery.o
- .text.I2Cx_ReadMultiple
-                0x00000000080020b8       0x5a Core/Src/stm32746g_discovery.o
- .text.I2Cx_WriteMultiple
-                0x0000000008002112       0x5a Core/Src/stm32746g_discovery.o
- .text.I2Cx_Error
-                0x000000000800216c       0x20 Core/Src/stm32746g_discovery.o
- .text.TS_IO_Init
-                0x000000000800218c       0x14 Core/Src/stm32746g_discovery.o
-                0x000000000800218c                TS_IO_Init
- .text.TS_IO_Write
-                0x00000000080021a0       0x34 Core/Src/stm32746g_discovery.o
-                0x00000000080021a0                TS_IO_Write
- .text.TS_IO_Read
-                0x00000000080021d4       0x3c Core/Src/stm32746g_discovery.o
-                0x00000000080021d4                TS_IO_Read
- .text.TS_IO_Delay
-                0x0000000008002210       0x16 Core/Src/stm32746g_discovery.o
-                0x0000000008002210                TS_IO_Delay
- *fill*         0x0000000008002226        0x2 
- .text.BSP_LCD_Init
-                0x0000000008002228       0xe0 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002228                BSP_LCD_Init
- .text.BSP_LCD_GetXSize
-                0x0000000008002308       0x28 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002308                BSP_LCD_GetXSize
- .text.BSP_LCD_GetYSize
-                0x0000000008002330       0x28 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002330                BSP_LCD_GetYSize
- .text.BSP_LCD_LayerDefaultInit
-                0x0000000008002358       0xc0 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002358                BSP_LCD_LayerDefaultInit
- .text.BSP_LCD_SelectLayer
-                0x0000000008002418       0x20 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002418                BSP_LCD_SelectLayer
- .text.BSP_LCD_SetTextColor
-                0x0000000008002438       0x30 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002438                BSP_LCD_SetTextColor
- .text.BSP_LCD_SetBackColor
-                0x0000000008002468       0x34 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002468                BSP_LCD_SetBackColor
- .text.BSP_LCD_SetFont
-                0x000000000800249c       0x34 Core/Src/stm32746g_discovery_lcd.o
-                0x000000000800249c                BSP_LCD_SetFont
- .text.BSP_LCD_GetFont
-                0x00000000080024d0       0x2c Core/Src/stm32746g_discovery_lcd.o
-                0x00000000080024d0                BSP_LCD_GetFont
- .text.BSP_LCD_Clear
-                0x00000000080024fc       0x50 Core/Src/stm32746g_discovery_lcd.o
-                0x00000000080024fc                BSP_LCD_Clear
- .text.BSP_LCD_DisplayChar
-                0x000000000800254c       0x88 Core/Src/stm32746g_discovery_lcd.o
-                0x000000000800254c                BSP_LCD_DisplayChar
- .text.BSP_LCD_DisplayStringAt
-                0x00000000080025d4      0x188 Core/Src/stm32746g_discovery_lcd.o
-                0x00000000080025d4                BSP_LCD_DisplayStringAt
- .text.BSP_LCD_DisplayStringAtLine
-                0x000000000800275c       0x2e Core/Src/stm32746g_discovery_lcd.o
-                0x000000000800275c                BSP_LCD_DisplayStringAtLine
- *fill*         0x000000000800278a        0x2 
- .text.BSP_LCD_DrawHLine
-                0x000000000800278c       0xbc Core/Src/stm32746g_discovery_lcd.o
-                0x000000000800278c                BSP_LCD_DrawHLine
- .text.BSP_LCD_DrawCircle
-                0x0000000008002848      0x1e0 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002848                BSP_LCD_DrawCircle
- .text.BSP_LCD_DrawPixel
-                0x0000000008002a28       0x90 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002a28                BSP_LCD_DrawPixel
- .text.BSP_LCD_FillCircle
-                0x0000000008002ab8      0x140 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002ab8                BSP_LCD_FillCircle
- .text.BSP_LCD_DisplayOn
-                0x0000000008002bf8       0x3c Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002bf8                BSP_LCD_DisplayOn
- .text.BSP_LCD_MspInit
-                0x0000000008002c34      0x1b4 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002c34                BSP_LCD_MspInit
- .text.BSP_LCD_ClockConfig
-                0x0000000008002de8       0x38 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000008002de8                BSP_LCD_ClockConfig
- .text.DrawChar
-                0x0000000008002e20      0x170 Core/Src/stm32746g_discovery_lcd.o
- .text.LL_FillBuffer
-                0x0000000008002f90       0x98 Core/Src/stm32746g_discovery_lcd.o
- .text.BSP_SDRAM_Init
-                0x0000000008003028       0xbc Core/Src/stm32746g_discovery_sdram.o
-                0x0000000008003028                BSP_SDRAM_Init
- .text.BSP_SDRAM_Initialization_sequence
-                0x00000000080030e4       0xc0 Core/Src/stm32746g_discovery_sdram.o
-                0x00000000080030e4                BSP_SDRAM_Initialization_sequence
- .text.BSP_SDRAM_MspInit
-                0x00000000080031a4      0x1f0 Core/Src/stm32746g_discovery_sdram.o
-                0x00000000080031a4                BSP_SDRAM_MspInit
- .text.BSP_TS_Init
-                0x0000000008003394       0x80 Core/Src/stm32746g_discovery_ts.o
-                0x0000000008003394                BSP_TS_Init
- .text.BSP_TS_GetState
-                0x0000000008003414      0x3ac Core/Src/stm32746g_discovery_ts.o
-                0x0000000008003414                BSP_TS_GetState
- .text.BSP_TS_Get_GestureId
-                0x00000000080037c0       0x94 Core/Src/stm32746g_discovery_ts.o
-                0x00000000080037c0                BSP_TS_Get_GestureId
- .text.HAL_MspInit
-                0x0000000008003854       0x50 Core/Src/stm32f7xx_hal_msp.o
-                0x0000000008003854                HAL_MspInit
- .text.HAL_ADC_MspInit
-                0x00000000080038a4       0xdc Core/Src/stm32f7xx_hal_msp.o
-                0x00000000080038a4                HAL_ADC_MspInit
- .text.HAL_DAC_MspInit
-                0x0000000008003980       0x90 Core/Src/stm32f7xx_hal_msp.o
-                0x0000000008003980                HAL_DAC_MspInit
- .text.HAL_DMA2D_MspInit
-                0x0000000008003a10       0x40 Core/Src/stm32f7xx_hal_msp.o
-                0x0000000008003a10                HAL_DMA2D_MspInit
- .text.HAL_I2C_MspInit
-                0x0000000008003a50       0xf0 Core/Src/stm32f7xx_hal_msp.o
-                0x0000000008003a50                HAL_I2C_MspInit
- .text.HAL_I2C_MspDeInit
-                0x0000000008003b40       0x78 Core/Src/stm32f7xx_hal_msp.o
-                0x0000000008003b40                HAL_I2C_MspDeInit
- .text.HAL_LTDC_MspInit
-                0x0000000008003bb8      0x190 Core/Src/stm32f7xx_hal_msp.o
-                0x0000000008003bb8                HAL_LTDC_MspInit
- .text.HAL_RTC_MspInit
-                0x0000000008003d48       0x34 Core/Src/stm32f7xx_hal_msp.o
-                0x0000000008003d48                HAL_RTC_MspInit
- .text.HAL_SPI_MspInit
-                0x0000000008003d7c       0xe4 Core/Src/stm32f7xx_hal_msp.o
-                0x0000000008003d7c                HAL_SPI_MspInit
- .text.HAL_TIM_Base_MspInit
-                0x0000000008003e60       0xdc Core/Src/stm32f7xx_hal_msp.o
-                0x0000000008003e60                HAL_TIM_Base_MspInit
- .text.HAL_TIM_MspPostInit
-                0x0000000008003f3c       0xbc Core/Src/stm32f7xx_hal_msp.o
-                0x0000000008003f3c                HAL_TIM_MspPostInit
- .text.HAL_UART_MspInit
-                0x0000000008003ff8      0x18c Core/Src/stm32f7xx_hal_msp.o
-                0x0000000008003ff8                HAL_UART_MspInit
- .text.HAL_FMC_MspInit
-                0x0000000008004184      0x120 Core/Src/stm32f7xx_hal_msp.o
- .text.HAL_SDRAM_MspInit
-                0x00000000080042a4       0x14 Core/Src/stm32f7xx_hal_msp.o
-                0x00000000080042a4                HAL_SDRAM_MspInit
- .text.HAL_InitTick
-                0x00000000080042b8       0xb0 Core/Src/stm32f7xx_hal_timebase_tim.o
-                0x00000000080042b8                HAL_InitTick
- .text.NMI_Handler
-                0x0000000008004368        0x6 Core/Src/stm32f7xx_it.o
-                0x0000000008004368                NMI_Handler
- .text.HardFault_Handler
-                0x000000000800436e        0x6 Core/Src/stm32f7xx_it.o
-                0x000000000800436e                HardFault_Handler
- .text.MemManage_Handler
-                0x0000000008004374        0x6 Core/Src/stm32f7xx_it.o
-                0x0000000008004374                MemManage_Handler
- .text.BusFault_Handler
-                0x000000000800437a        0x6 Core/Src/stm32f7xx_it.o
-                0x000000000800437a                BusFault_Handler
- .text.UsageFault_Handler
-                0x0000000008004380        0x6 Core/Src/stm32f7xx_it.o
-                0x0000000008004380                UsageFault_Handler
- .text.DebugMon_Handler
-                0x0000000008004386        0xe Core/Src/stm32f7xx_it.o
-                0x0000000008004386                DebugMon_Handler
- .text.TIM6_DAC_IRQHandler
-                0x0000000008004394       0x1c Core/Src/stm32f7xx_it.o
-                0x0000000008004394                TIM6_DAC_IRQHandler
- .text.LTDC_IRQHandler
-                0x00000000080043b0       0x14 Core/Src/stm32f7xx_it.o
-                0x00000000080043b0                LTDC_IRQHandler
- .text._sbrk    0x00000000080043c4       0x6c Core/Src/sysmem.o
-                0x00000000080043c4                _sbrk
- .text.SystemInit
-                0x0000000008004430       0x2c Core/Src/system_stm32f7xx.o
-                0x0000000008004430                SystemInit
- .text.Reset_Handler
-                0x000000000800445c       0x50 Core/Startup/startup_stm32f746nghx.o
-                0x000000000800445c                Reset_Handler
- .text.Default_Handler
-                0x00000000080044ac        0x2 Core/Startup/startup_stm32f746nghx.o
-                0x00000000080044ac                RTC_Alarm_IRQHandler
-                0x00000000080044ac                EXTI2_IRQHandler
-                0x00000000080044ac                TIM8_CC_IRQHandler
-                0x00000000080044ac                UART8_IRQHandler
-                0x00000000080044ac                SPI4_IRQHandler
-                0x00000000080044ac                TIM1_CC_IRQHandler
-                0x00000000080044ac                DMA2_Stream5_IRQHandler
-                0x00000000080044ac                DMA1_Stream5_IRQHandler
-                0x00000000080044ac                PVD_IRQHandler
-                0x00000000080044ac                TAMP_STAMP_IRQHandler
-                0x00000000080044ac                CAN2_RX1_IRQHandler
-                0x00000000080044ac                EXTI3_IRQHandler
-                0x00000000080044ac                TIM8_TRG_COM_TIM14_IRQHandler
-                0x00000000080044ac                TIM1_UP_TIM10_IRQHandler
-                0x00000000080044ac                TIM8_UP_TIM13_IRQHandler
-                0x00000000080044ac                I2C3_ER_IRQHandler
-                0x00000000080044ac                EXTI0_IRQHandler
-                0x00000000080044ac                I2C2_EV_IRQHandler
-                0x00000000080044ac                DMA1_Stream2_IRQHandler
-                0x00000000080044ac                CAN1_RX0_IRQHandler
-                0x00000000080044ac                FPU_IRQHandler
-                0x00000000080044ac                OTG_HS_WKUP_IRQHandler
-                0x00000000080044ac                LTDC_ER_IRQHandler
-                0x00000000080044ac                CAN2_SCE_IRQHandler
-                0x00000000080044ac                DMA2_Stream2_IRQHandler
-                0x00000000080044ac                SPI1_IRQHandler
-                0x00000000080044ac                TIM1_BRK_TIM9_IRQHandler
-                0x00000000080044ac                DCMI_IRQHandler
-                0x00000000080044ac                CAN2_RX0_IRQHandler
-                0x00000000080044ac                DMA2_Stream3_IRQHandler
-                0x00000000080044ac                SAI2_IRQHandler
-                0x00000000080044ac                USART6_IRQHandler
-                0x00000000080044ac                USART3_IRQHandler
-                0x00000000080044ac                CAN1_RX1_IRQHandler
-                0x00000000080044ac                UART5_IRQHandler
-                0x00000000080044ac                DMA2_Stream0_IRQHandler
-                0x00000000080044ac                TIM4_IRQHandler
-                0x00000000080044ac                QUADSPI_IRQHandler
-                0x00000000080044ac                I2C1_EV_IRQHandler
-                0x00000000080044ac                DMA1_Stream6_IRQHandler
-                0x00000000080044ac                DMA1_Stream1_IRQHandler
-                0x00000000080044ac                UART4_IRQHandler
-                0x00000000080044ac                TIM3_IRQHandler
-                0x00000000080044ac                RCC_IRQHandler
-                0x00000000080044ac                TIM8_BRK_TIM12_IRQHandler
-                0x00000000080044ac                Default_Handler
-                0x00000000080044ac                CEC_IRQHandler
-                0x00000000080044ac                EXTI15_10_IRQHandler
-                0x00000000080044ac                ADC_IRQHandler
-                0x00000000080044ac                DMA1_Stream7_IRQHandler
-                0x00000000080044ac                SPI5_IRQHandler
-                0x00000000080044ac                TIM7_IRQHandler
-                0x00000000080044ac                SDMMC1_IRQHandler
-                0x00000000080044ac                CAN2_TX_IRQHandler
-                0x00000000080044ac                TIM5_IRQHandler
-                0x00000000080044ac                DMA2_Stream7_IRQHandler
-                0x00000000080044ac                I2C3_EV_IRQHandler
-                0x00000000080044ac                EXTI9_5_IRQHandler
-                0x00000000080044ac                RTC_WKUP_IRQHandler
-                0x00000000080044ac                ETH_WKUP_IRQHandler
-                0x00000000080044ac                SPDIF_RX_IRQHandler
-                0x00000000080044ac                SPI2_IRQHandler
-                0x00000000080044ac                OTG_HS_EP1_IN_IRQHandler
-                0x00000000080044ac                DMA1_Stream0_IRQHandler
-                0x00000000080044ac                CAN1_TX_IRQHandler
-                0x00000000080044ac                EXTI4_IRQHandler
-                0x00000000080044ac                RNG_IRQHandler
-                0x00000000080044ac                ETH_IRQHandler
-                0x00000000080044ac                OTG_HS_EP1_OUT_IRQHandler
-                0x00000000080044ac                WWDG_IRQHandler
-                0x00000000080044ac                SPI6_IRQHandler
-                0x00000000080044ac                I2C4_EV_IRQHandler
-                0x00000000080044ac                TIM2_IRQHandler
-                0x00000000080044ac                OTG_FS_WKUP_IRQHandler
-                0x00000000080044ac                TIM1_TRG_COM_TIM11_IRQHandler
-                0x00000000080044ac                OTG_HS_IRQHandler
-                0x00000000080044ac                DMA2D_IRQHandler
-                0x00000000080044ac                EXTI1_IRQHandler
-                0x00000000080044ac                UART7_IRQHandler
-                0x00000000080044ac                USART2_IRQHandler
-                0x00000000080044ac                I2C2_ER_IRQHandler
-                0x00000000080044ac                DMA2_Stream1_IRQHandler
-                0x00000000080044ac                CAN1_SCE_IRQHandler
-                0x00000000080044ac                FLASH_IRQHandler
-                0x00000000080044ac                DMA2_Stream4_IRQHandler
-                0x00000000080044ac                USART1_IRQHandler
-                0x00000000080044ac                OTG_FS_IRQHandler
-                0x00000000080044ac                SPI3_IRQHandler
-                0x00000000080044ac                DMA1_Stream4_IRQHandler
-                0x00000000080044ac                I2C1_ER_IRQHandler
-                0x00000000080044ac                FMC_IRQHandler
-                0x00000000080044ac                LPTIM1_IRQHandler
-                0x00000000080044ac                I2C4_ER_IRQHandler
-                0x00000000080044ac                DMA2_Stream6_IRQHandler
-                0x00000000080044ac                SAI1_IRQHandler
-                0x00000000080044ac                DMA1_Stream3_IRQHandler
- .text.HAL_Init
-                0x00000000080044ae       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
-                0x00000000080044ae                HAL_Init
- .text.HAL_IncTick
-                0x00000000080044c8       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
-                0x00000000080044c8                HAL_IncTick
- .text.HAL_GetTick
-                0x00000000080044f0       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
-                0x00000000080044f0                HAL_GetTick
- .text.HAL_Delay
-                0x0000000008004508       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
-                0x0000000008004508                HAL_Delay
- .text.HAL_ADC_Init
-                0x000000000800454c       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
-                0x000000000800454c                HAL_ADC_Init
- .text.HAL_ADC_Start
-                0x00000000080045d4      0x180 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
-                0x00000000080045d4                HAL_ADC_Start
- .text.HAL_ADC_PollForConversion
-                0x0000000008004754      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
-                0x0000000008004754                HAL_ADC_PollForConversion
- .text.HAL_ADC_GetValue
-                0x000000000800485c       0x1a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
-                0x000000000800485c                HAL_ADC_GetValue
- *fill*         0x0000000008004876        0x2 
- .text.HAL_ADC_ConfigChannel
-                0x0000000008004878      0x294 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
-                0x0000000008004878                HAL_ADC_ConfigChannel
- .text.ADC_Init
-                0x0000000008004b0c      0x1f4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .text.__NVIC_SetPriorityGrouping
-                0x0000000008004d00       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.__NVIC_GetPriorityGrouping
-                0x0000000008004d48       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.__NVIC_EnableIRQ
-                0x0000000008004d64       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.__NVIC_SetPriority
-                0x0000000008004da0       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.NVIC_EncodePriority
-                0x0000000008004df4       0x66 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .text.HAL_NVIC_SetPriorityGrouping
-                0x0000000008004e5a       0x16 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
-                0x0000000008004e5a                HAL_NVIC_SetPriorityGrouping
- .text.HAL_NVIC_SetPriority
-                0x0000000008004e70       0x38 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
-                0x0000000008004e70                HAL_NVIC_SetPriority
- .text.HAL_NVIC_EnableIRQ
-                0x0000000008004ea8       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
-                0x0000000008004ea8                HAL_NVIC_EnableIRQ
- .text.HAL_DAC_Init
-                0x0000000008004ec4       0x44 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
-                0x0000000008004ec4                HAL_DAC_Init
- .text.HAL_DAC_IRQHandler
-                0x0000000008004f08       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
-                0x0000000008004f08                HAL_DAC_IRQHandler
- .text.HAL_DAC_DMAUnderrunCallbackCh1
-                0x0000000008004f9c       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
-                0x0000000008004f9c                HAL_DAC_DMAUnderrunCallbackCh1
- .text.HAL_DAC_ConfigChannel
-                0x0000000008004fb0       0x9a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
-                0x0000000008004fb0                HAL_DAC_ConfigChannel
- .text.HAL_DACEx_DMAUnderrunCallbackCh2
-                0x000000000800504a       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
-                0x000000000800504a                HAL_DACEx_DMAUnderrunCallbackCh2
- *fill*         0x000000000800505e        0x2 
- .text.HAL_DMA_Init
-                0x0000000008005060      0x15c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
-                0x0000000008005060                HAL_DMA_Init
- .text.HAL_DMA_DeInit
-                0x00000000080051bc       0xbc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
-                0x00000000080051bc                HAL_DMA_DeInit
- .text.DMA_CalcBaseAndBitshift
-                0x0000000008005278       0x6c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.DMA_CheckFifoParam
-                0x00000000080052e4       0xf4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .text.HAL_DMA2D_Init
-                0x00000000080053d8       0x94 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
-                0x00000000080053d8                HAL_DMA2D_Init
- .text.HAL_DMA2D_Start
-                0x000000000800546c       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
-                0x000000000800546c                HAL_DMA2D_Start
- .text.HAL_DMA2D_PollForTransfer
-                0x00000000080054c2      0x1d2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
-                0x00000000080054c2                HAL_DMA2D_PollForTransfer
- .text.HAL_DMA2D_ConfigLayer
-                0x0000000008005694      0x124 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
-                0x0000000008005694                HAL_DMA2D_ConfigLayer
- .text.DMA2D_SetConfig
-                0x00000000080057b8      0x138 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .text.HAL_GPIO_Init
-                0x00000000080058f0      0x354 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
-                0x00000000080058f0                HAL_GPIO_Init
- .text.HAL_GPIO_DeInit
-                0x0000000008005c44      0x214 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
-                0x0000000008005c44                HAL_GPIO_DeInit
- .text.HAL_GPIO_ReadPin
-                0x0000000008005e58       0x30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
-                0x0000000008005e58                HAL_GPIO_ReadPin
- .text.HAL_GPIO_WritePin
-                0x0000000008005e88       0x32 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
-                0x0000000008005e88                HAL_GPIO_WritePin
- *fill*         0x0000000008005eba        0x2 
- .text.HAL_I2C_Init
-                0x0000000008005ebc      0x120 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
-                0x0000000008005ebc                HAL_I2C_Init
- .text.HAL_I2C_DeInit
-                0x0000000008005fdc       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
-                0x0000000008005fdc                HAL_I2C_DeInit
- *fill*         0x000000000800603a        0x2 
- .text.HAL_I2C_Mem_Write
-                0x000000000800603c      0x228 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
-                0x000000000800603c                HAL_I2C_Mem_Write
- .text.HAL_I2C_Mem_Read
-                0x0000000008006264      0x234 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
-                0x0000000008006264                HAL_I2C_Mem_Read
- .text.HAL_I2C_GetState
-                0x0000000008006498       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
-                0x0000000008006498                HAL_I2C_GetState
- .text.I2C_RequestMemoryWrite
-                0x00000000080064b4       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_RequestMemoryRead
-                0x000000000800655c       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_Flush_TXDR
-                0x0000000008006604       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_WaitOnFlagUntilTimeout
-                0x000000000800664c       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_WaitOnTXISFlagUntilTimeout
-                0x00000000080066cc       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_WaitOnSTOPFlagUntilTimeout
-                0x000000000800674c       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_IsAcknowledgeFailed
-                0x00000000080067c4       0xcc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.I2C_TransferConfig
-                0x0000000008006890       0x5c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .text.HAL_I2CEx_ConfigAnalogFilter
-                0x00000000080068ec       0x96 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
-                0x00000000080068ec                HAL_I2CEx_ConfigAnalogFilter
- .text.HAL_I2CEx_ConfigDigitalFilter
-                0x0000000008006982       0x98 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
-                0x0000000008006982                HAL_I2CEx_ConfigDigitalFilter
- *fill*         0x0000000008006a1a        0x2 
- .text.HAL_LTDC_Init
-                0x0000000008006a1c      0x1a0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
-                0x0000000008006a1c                HAL_LTDC_Init
- .text.HAL_LTDC_IRQHandler
-                0x0000000008006bbc      0x148 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
-                0x0000000008006bbc                HAL_LTDC_IRQHandler
- .text.HAL_LTDC_ErrorCallback
-                0x0000000008006d04       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
-                0x0000000008006d04                HAL_LTDC_ErrorCallback
- .text.HAL_LTDC_LineEventCallback
-                0x0000000008006d18       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
-                0x0000000008006d18                HAL_LTDC_LineEventCallback
- .text.HAL_LTDC_ReloadEventCallback
-                0x0000000008006d2c       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
-                0x0000000008006d2c                HAL_LTDC_ReloadEventCallback
- .text.HAL_LTDC_ConfigLayer
-                0x0000000008006d40       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
-                0x0000000008006d40                HAL_LTDC_ConfigLayer
- .text.HAL_LTDC_GetState
-                0x0000000008006dbc       0x1c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
-                0x0000000008006dbc                HAL_LTDC_GetState
- .text.LTDC_SetConfig
-                0x0000000008006dd8      0x334 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .text.HAL_PWR_EnableBkUpAccess
-                0x000000000800710c       0x20 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
-                0x000000000800710c                HAL_PWR_EnableBkUpAccess
- .text.HAL_PWREx_EnableOverDrive
-                0x000000000800712c       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
-                0x000000000800712c                HAL_PWREx_EnableOverDrive
- .text.HAL_RCC_OscConfig
-                0x00000000080071cc      0x548 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
-                0x00000000080071cc                HAL_RCC_OscConfig
- .text.HAL_RCC_ClockConfig
-                0x0000000008007714      0x1d8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
-                0x0000000008007714                HAL_RCC_ClockConfig
- .text.HAL_RCC_GetSysClockFreq
-                0x00000000080078ec      0x164 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
-                0x00000000080078ec                HAL_RCC_GetSysClockFreq
- .text.HAL_RCC_GetHCLKFreq
-                0x0000000008007a50       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
-                0x0000000008007a50                HAL_RCC_GetHCLKFreq
- .text.HAL_RCC_GetPCLK1Freq
-                0x0000000008007a68       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
-                0x0000000008007a68                HAL_RCC_GetPCLK1Freq
- .text.HAL_RCC_GetPCLK2Freq
-                0x0000000008007a90       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
-                0x0000000008007a90                HAL_RCC_GetPCLK2Freq
- .text.HAL_RCC_GetClockConfig
-                0x0000000008007ab8       0x64 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
-                0x0000000008007ab8                HAL_RCC_GetClockConfig
- .text.HAL_RCCEx_PeriphCLKConfig
-                0x0000000008007b1c      0x7dc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
-                0x0000000008007b1c                HAL_RCCEx_PeriphCLKConfig
- .text.HAL_RTC_Init
-                0x00000000080082f8       0xf8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
-                0x00000000080082f8                HAL_RTC_Init
- .text.HAL_RTC_SetTime
-                0x00000000080083f0      0x17c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
-                0x00000000080083f0                HAL_RTC_SetTime
- .text.HAL_RTC_SetDate
-                0x000000000800856c      0x150 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
-                0x000000000800856c                HAL_RTC_SetDate
- .text.HAL_RTC_SetAlarm
-                0x00000000080086bc      0x230 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
-                0x00000000080086bc                HAL_RTC_SetAlarm
- .text.HAL_RTC_WaitForSynchro
-                0x00000000080088ec       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
-                0x00000000080088ec                HAL_RTC_WaitForSynchro
- .text.RTC_EnterInitMode
-                0x000000000800893c       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
-                0x000000000800893c                RTC_EnterInitMode
- .text.RTC_ByteToBcd2
-                0x0000000008008994       0x3c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
-                0x0000000008008994                RTC_ByteToBcd2
- .text.HAL_RTCEx_SetTimeStamp
-                0x00000000080089d0       0xac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
-                0x00000000080089d0                HAL_RTCEx_SetTimeStamp
- .text.HAL_SDRAM_Init
-                0x0000000008008a7c       0x68 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
-                0x0000000008008a7c                HAL_SDRAM_Init
- .text.HAL_SDRAM_SendCommand
-                0x0000000008008ae4       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
-                0x0000000008008ae4                HAL_SDRAM_SendCommand
- .text.HAL_SDRAM_ProgramRefreshRate
-                0x0000000008008b3a       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
-                0x0000000008008b3a                HAL_SDRAM_ProgramRefreshRate
- .text.HAL_SPI_Init
-                0x0000000008008b7a      0x124 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
-                0x0000000008008b7a                HAL_SPI_Init
- .text.HAL_TIM_Base_Init
-                0x0000000008008c9e       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008008c9e                HAL_TIM_Base_Init
- .text.HAL_TIM_Base_Start_IT
-                0x0000000008008cf4       0x54 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008008cf4                HAL_TIM_Base_Start_IT
- .text.HAL_TIM_PWM_Init
-                0x0000000008008d48       0x56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008008d48                HAL_TIM_PWM_Init
- .text.HAL_TIM_PWM_MspInit
-                0x0000000008008d9e       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008008d9e                HAL_TIM_PWM_MspInit
- .text.HAL_TIM_IRQHandler
-                0x0000000008008db2      0x23e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008008db2                HAL_TIM_IRQHandler
- .text.HAL_TIM_PWM_ConfigChannel
-                0x0000000008008ff0      0x230 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008008ff0                HAL_TIM_PWM_ConfigChannel
- .text.HAL_TIM_ConfigClockSource
-                0x0000000008009220      0x174 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008009220                HAL_TIM_ConfigClockSource
- .text.HAL_TIM_SlaveConfigSynchro
-                0x0000000008009394       0x84 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008009394                HAL_TIM_SlaveConfigSynchro
- .text.HAL_TIM_OC_DelayElapsedCallback
-                0x0000000008009418       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008009418                HAL_TIM_OC_DelayElapsedCallback
- .text.HAL_TIM_IC_CaptureCallback
-                0x000000000800942c       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x000000000800942c                HAL_TIM_IC_CaptureCallback
- .text.HAL_TIM_PWM_PulseFinishedCallback
-                0x0000000008009440       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008009440                HAL_TIM_PWM_PulseFinishedCallback
- .text.HAL_TIM_TriggerCallback
-                0x0000000008009454       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008009454                HAL_TIM_TriggerCallback
- .text.TIM_Base_SetConfig
-                0x0000000008009468      0x140 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008009468                TIM_Base_SetConfig
- .text.TIM_OC1_SetConfig
-                0x00000000080095a8       0xe4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_OC2_SetConfig
-                0x000000000800968c       0xf0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x000000000800968c                TIM_OC2_SetConfig
- .text.TIM_OC3_SetConfig
-                0x000000000800977c       0xec Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_OC4_SetConfig
-                0x0000000008009868       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_OC5_SetConfig
-                0x0000000008009918       0xa4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_OC6_SetConfig
-                0x00000000080099bc       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_SlaveTimer_SetConfig
-                0x0000000008009a64      0x110 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_TI1_ConfigInputStage
-                0x0000000008009b74       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_TI2_ConfigInputStage
-                0x0000000008009bd2       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_ITRx_SetConfig
-                0x0000000008009c32       0x36 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .text.TIM_ETR_SetConfig
-                0x0000000008009c68       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                0x0000000008009c68                TIM_ETR_SetConfig
- .text.HAL_TIMEx_MasterConfigSynchronization
-                0x0000000008009ca8      0x11c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
-                0x0000000008009ca8                HAL_TIMEx_MasterConfigSynchronization
- .text.HAL_TIMEx_ConfigBreakDeadTime
-                0x0000000008009dc4       0xfc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
-                0x0000000008009dc4                HAL_TIMEx_ConfigBreakDeadTime
- .text.HAL_TIMEx_CommutCallback
-                0x0000000008009ec0       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
-                0x0000000008009ec0                HAL_TIMEx_CommutCallback
- .text.HAL_TIMEx_BreakCallback
-                0x0000000008009ed4       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
-                0x0000000008009ed4                HAL_TIMEx_BreakCallback
- .text.HAL_TIMEx_Break2Callback
-                0x0000000008009ee8       0x14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
-                0x0000000008009ee8                HAL_TIMEx_Break2Callback
- .text.HAL_UART_Init
-                0x0000000008009efc       0x9c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
-                0x0000000008009efc                HAL_UART_Init
- .text.UART_SetConfig
-                0x0000000008009f98      0x554 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
-                0x0000000008009f98                UART_SetConfig
- .text.UART_AdvFeatureConfig
-                0x000000000800a4ec      0x144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
-                0x000000000800a4ec                UART_AdvFeatureConfig
- .text.UART_CheckIdleState
-                0x000000000800a630       0x5e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
-                0x000000000800a630                UART_CheckIdleState
- .text.UART_WaitOnFlagUntilTimeout
-                0x000000000800a68e       0xf6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
-                0x000000000800a68e                UART_WaitOnFlagUntilTimeout
- .text.FMC_SDRAM_Init
-                0x000000000800a784       0xe4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
-                0x000000000800a784                FMC_SDRAM_Init
- .text.FMC_SDRAM_Timing_Init
-                0x000000000800a868      0x100 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
-                0x000000000800a868                FMC_SDRAM_Timing_Init
- .text.FMC_SDRAM_SendCommand
-                0x000000000800a968       0x42 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
-                0x000000000800a968                FMC_SDRAM_SendCommand
- .text.FMC_SDRAM_ProgramRefreshRate
-                0x000000000800a9aa       0x26 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
-                0x000000000800a9aa                FMC_SDRAM_ProgramRefreshRate
- .text.makeFreeRtosPriority
-                0x000000000800a9d0       0x30 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .text.osThreadCreate
-                0x000000000800aa00       0x98 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
-                0x000000000800aa00                osThreadCreate
- .text.osDelay  0x000000000800aa98       0x28 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
-                0x000000000800aa98                osDelay
- .text.vListInitialise
-                0x000000000800aac0       0x40 Middlewares/Third_Party/FreeRTOS/Source/list.o
-                0x000000000800aac0                vListInitialise
- .text.vListInitialiseItem
-                0x000000000800ab00       0x1a Middlewares/Third_Party/FreeRTOS/Source/list.o
-                0x000000000800ab00                vListInitialiseItem
- .text.vListInsertEnd
-                0x000000000800ab1a       0x48 Middlewares/Third_Party/FreeRTOS/Source/list.o
-                0x000000000800ab1a                vListInsertEnd
- .text.vListInsert
-                0x000000000800ab62       0x72 Middlewares/Third_Party/FreeRTOS/Source/list.o
-                0x000000000800ab62                vListInsert
- .text.uxListRemove
-                0x000000000800abd4       0x54 Middlewares/Third_Party/FreeRTOS/Source/list.o
-                0x000000000800abd4                uxListRemove
- .text.xTaskCreateStatic
-                0x000000000800ac28       0xc0 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-                0x000000000800ac28                xTaskCreateStatic
- .text.xTaskCreate
-                0x000000000800ace8       0x8a Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-                0x000000000800ace8                xTaskCreate
- .text.prvInitialiseNewTask
-                0x000000000800ad72      0x126 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.prvAddNewTaskToReadyList
-                0x000000000800ae98       0xd4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.vTaskDelay
-                0x000000000800af6c       0x6c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-                0x000000000800af6c                vTaskDelay
- .text.vTaskSuspendAll
-                0x000000000800afd8       0x1c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-                0x000000000800afd8                vTaskSuspendAll
- .text.xTaskResumeAll
-                0x000000000800aff4      0x13c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-                0x000000000800aff4                xTaskResumeAll
- .text.xTaskIncrementTick
-                0x000000000800b130      0x174 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-                0x000000000800b130                xTaskIncrementTick
- .text.vTaskSwitchContext
-                0x000000000800b2a4      0x104 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-                0x000000000800b2a4                vTaskSwitchContext
- .text.prvInitialiseTaskLists
-                0x000000000800b3a8       0x80 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.prvResetNextTaskUnblockTime
-                0x000000000800b428       0x40 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.prvAddCurrentTaskToDelayedList
-                0x000000000800b468       0xcc Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .text.pxPortInitialiseStack
-                0x000000000800b534       0x68 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
-                0x000000000800b534                pxPortInitialiseStack
- .text.prvTaskExitError
-                0x000000000800b59c       0x5c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- *fill*         0x000000000800b5f8        0x8 
- .text.SVC_Handler
-                0x000000000800b600       0x28 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
-                0x000000000800b600                SVC_Handler
- .text.vPortEnterCritical
-                0x000000000800b628       0x64 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
-                0x000000000800b628                vPortEnterCritical
- .text.vPortExitCritical
-                0x000000000800b68c       0x54 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
-                0x000000000800b68c                vPortExitCritical
- .text.PendSV_Handler
-                0x000000000800b6e0       0x68 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
-                0x000000000800b6e0                PendSV_Handler
- .text.SysTick_Handler
-                0x000000000800b748       0x44 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
-                0x000000000800b748                SysTick_Handler
- .text.pvPortMalloc
-                0x000000000800b78c      0x198 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
-                0x000000000800b78c                pvPortMalloc
- .text.vPortFree
-                0x000000000800b924       0xb8 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
-                0x000000000800b924                vPortFree
- .text.prvHeapInit
-                0x000000000800b9dc       0xc4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .text.prvInsertBlockIntoFreeList
-                0x000000000800baa0       0xb4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .text.__errno  0x000000000800bb54        0xc /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-errno.o)
-                0x000000000800bb54                __errno
- .text.__libc_init_array
-                0x000000000800bb60       0x48 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-init.o)
-                0x000000000800bb60                __libc_init_array
- .text.memcpy   0x000000000800bba8       0x16 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memcpy-stub.o)
-                0x000000000800bba8                memcpy
- .text.memset   0x000000000800bbbe       0x10 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memset.o)
-                0x000000000800bbbe                memset
- *fill*         0x000000000800bbce        0x2 
- .text.sprintf  0x000000000800bbd0       0x40 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sprintf.o)
-                0x000000000800bbd0                sprintf
-                0x000000000800bbd0                siprintf
- .text.__ssputs_r
-                0x000000000800bc10       0xb4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o)
-                0x000000000800bc10                __ssputs_r
- .text._svfprintf_r
-                0x000000000800bcc4      0x1f0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o)
-                0x000000000800bcc4                _svfprintf_r
-                0x000000000800bcc4                _svfiprintf_r
- .text._printf_common
-                0x000000000800beb4       0xea /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-vfprintf_i.o)
-                0x000000000800beb4                _printf_common
- *fill*         0x000000000800bf9e        0x2 
- .text._printf_i
-                0x000000000800bfa0      0x224 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-vfprintf_i.o)
-                0x000000000800bfa0                _printf_i
- .text.memmove  0x000000000800c1c4       0x32 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memmove.o)
-                0x000000000800c1c4                memmove
- *fill*         0x000000000800c1f6        0x2 
- .text._free_r  0x000000000800c1f8       0x9c /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-freer.o)
-                0x000000000800c1f8                _free_r
- .text._malloc_r
-                0x000000000800c294       0xb4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-mallocr.o)
-                0x000000000800c294                _malloc_r
- .text._realloc_r
-                0x000000000800c348       0x4c /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-reallocr.o)
-                0x000000000800c348                _realloc_r
- .text._sbrk_r  0x000000000800c394       0x20 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sbrkr.o)
-                0x000000000800c394                _sbrk_r
- .text.__malloc_lock
-                0x000000000800c3b4        0x2 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-mlock.o)
-                0x000000000800c3b4                __malloc_lock
- .text.__malloc_unlock
-                0x000000000800c3b6        0x2 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-mlock.o)
-                0x000000000800c3b6                __malloc_unlock
- .text._malloc_usable_size_r
-                0x000000000800c3b8       0x10 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-msizer.o)
-                0x000000000800c3b8                _malloc_usable_size_r
- *(.glue_7)
- .glue_7        0x000000000800c3c8        0x0 linker stubs
- *(.glue_7t)
- .glue_7t       0x000000000800c3c8        0x0 linker stubs
- *(.eh_frame)
- .eh_frame      0x000000000800c3c8        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
- *(.init)
- .init          0x000000000800c3c8        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
-                0x000000000800c3c8                _init
- .init          0x000000000800c3cc        0x8 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
- *(.fini)
- .fini          0x000000000800c3d4        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
-                0x000000000800c3d4                _fini
- .fini          0x000000000800c3d8        0x8 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
-                0x000000000800c3e0                . = ALIGN (0x4)
-                0x000000000800c3e0                _etext = .
-
-.vfp11_veneer   0x000000000800c3e0        0x0
- .vfp11_veneer  0x000000000800c3e0        0x0 linker stubs
-
-.v4_bx          0x000000000800c3e0        0x0
- .v4_bx         0x000000000800c3e0        0x0 linker stubs
-
-.iplt           0x000000000800c3e0        0x0
- .iplt          0x000000000800c3e0        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
-
-.rodata         0x000000000800c3e0     0x1fe4
-                0x000000000800c3e0                . = ALIGN (0x4)
- *(.rodata)
- .rodata        0x000000000800c3e0       0x64 Core/Src/main.o
- *(.rodata*)
- .rodata.Font24_Table
-                0x000000000800c444     0x1ab8 Core/Src/stm32746g_discovery_lcd.o
-                0x000000000800c444                Font24_Table
- .rodata.Font12_Table
-                0x000000000800defc      0x474 Core/Src/stm32746g_discovery_lcd.o
-                0x000000000800defc                Font12_Table
- .rodata.AHBPrescTable
-                0x000000000800e370       0x10 Core/Src/system_stm32f7xx.o
-                0x000000000800e370                AHBPrescTable
- .rodata.APBPrescTable
-                0x000000000800e380        0x8 Core/Src/system_stm32f7xx.o
-                0x000000000800e380                APBPrescTable
- .rodata.flagBitshiftOffset.9876
-                0x000000000800e388        0x8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .rodata._svfprintf_r.str1.1
-                0x000000000800e390       0x11 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o)
- .rodata._printf_i.str1.1
-                0x000000000800e3a1       0x22 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-vfprintf_i.o)
-                0x000000000800e3c4                . = ALIGN (0x4)
- *fill*         0x000000000800e3c3        0x1 
-
-.ARM.extab      0x000000000800e3c4        0x0
-                0x000000000800e3c4                . = ALIGN (0x4)
- *(.ARM.extab* .gnu.linkonce.armextab.*)
-                0x000000000800e3c4                . = ALIGN (0x4)
-
-.ARM            0x000000000800e3c4        0x8
-                0x000000000800e3c4                . = ALIGN (0x4)
-                0x000000000800e3c4                __exidx_start = .
- *(.ARM.exidx*)
- .ARM.exidx     0x000000000800e3c4        0x8 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_udivmoddi4.o)
-                0x000000000800e3cc                __exidx_end = .
-                0x000000000800e3cc                . = ALIGN (0x4)
-
-.rel.dyn        0x000000000800e3cc        0x0
- .rel.iplt      0x000000000800e3cc        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
-
-.preinit_array  0x000000000800e3cc        0x0
-                0x000000000800e3cc                . = ALIGN (0x4)
-                0x000000000800e3cc                PROVIDE (__preinit_array_start = .)
- *(.preinit_array*)
-                0x000000000800e3cc                PROVIDE (__preinit_array_end = .)
-                0x000000000800e3cc                . = ALIGN (0x4)
-
-.init_array     0x000000000800e3cc        0x4
-                0x000000000800e3cc                . = ALIGN (0x4)
-                0x000000000800e3cc                PROVIDE (__init_array_start = .)
- *(SORT_BY_NAME(.init_array.*))
- *(.init_array*)
- .init_array    0x000000000800e3cc        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
-                0x000000000800e3d0                PROVIDE (__init_array_end = .)
-                0x000000000800e3d0                . = ALIGN (0x4)
-
-.fini_array     0x000000000800e3d0        0x4
-                0x000000000800e3d0                . = ALIGN (0x4)
-                [!provide]                        PROVIDE (__fini_array_start = .)
- *(SORT_BY_NAME(.fini_array.*))
- *(.fini_array*)
- .fini_array    0x000000000800e3d0        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
-                [!provide]                        PROVIDE (__fini_array_end = .)
-                0x000000000800e3d4                . = ALIGN (0x4)
-                0x000000000800e3d4                _sidata = LOADADDR (.data)
-
-.data           0x0000000020000000       0xb0 load address 0x000000000800e3d4
-                0x0000000020000000                . = ALIGN (0x4)
-                0x0000000020000000                _sdata = .
- *(.data)
- *(.data*)
- .data.ft5336_ts_drv
-                0x0000000020000000       0x28 Core/Src/ft5336.o
-                0x0000000020000000                ft5336_ts_drv
- .data.Font24   0x0000000020000028        0x8 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000020000028                Font24
- .data.Font12   0x0000000020000030        0x8 Core/Src/stm32746g_discovery_lcd.o
-                0x0000000020000030                Font12
- .data.sdramstatus.9792
-                0x0000000020000038        0x1 Core/Src/stm32746g_discovery_sdram.o
- *fill*         0x0000000020000039        0x3 
- .data.SystemCoreClock
-                0x000000002000003c        0x4 Core/Src/system_stm32f7xx.o
-                0x000000002000003c                SystemCoreClock
- .data.uwTickPrio
-                0x0000000020000040        0x4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
-                0x0000000020000040                uwTickPrio
- .data.uwTickFreq
-                0x0000000020000044        0x1 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
-                0x0000000020000044                uwTickFreq
- *fill*         0x0000000020000045        0x3 
- .data.uxCriticalNesting
-                0x0000000020000048        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .data._impure_ptr
-                0x000000002000004c        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-impure.o)
-                0x000000002000004c                _impure_ptr
- .data.impure_data
-                0x0000000020000050       0x60 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-impure.o)
- *(.RamFunc)
- *(.RamFunc*)
-                0x00000000200000b0                . = ALIGN (0x4)
-                0x00000000200000b0                _edata = .
-
-.igot.plt       0x00000000200000b0        0x0 load address 0x000000000800e484
- .igot.plt      0x00000000200000b0        0x0 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
-                0x00000000200000b0                . = ALIGN (0x4)
-
-.bss            0x00000000200000b0     0x8a4c load address 0x000000000800e484
-                0x00000000200000b0                _sbss = .
-                0x00000000200000b0                __bss_start__ = _sbss
- *(.bss)
- .bss           0x00000000200000b0       0x1c /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
- *(.bss*)
- .bss.ft5336_handle
-                0x00000000200000cc        0x3 Core/Src/ft5336.o
- *fill*         0x00000000200000cf        0x1 
- .bss.coord.5529
-                0x00000000200000d0        0x2 Core/Src/ft5336.o
- *fill*         0x00000000200000d2        0x2 
- .bss.TS_State.12025
-                0x00000000200000d4       0x2c Core/Src/main.o
- .bss.hI2cAudioHandler
-                0x0000000020000100       0x4c Core/Src/stm32746g_discovery.o
- .bss.hDma2dHandler
-                0x000000002000014c       0x40 Core/Src/stm32746g_discovery_lcd.o
- .bss.ActiveLayer
-                0x000000002000018c        0x4 Core/Src/stm32746g_discovery_lcd.o
- .bss.DrawProp  0x0000000020000190       0x18 Core/Src/stm32746g_discovery_lcd.o
- .bss.periph_clk_init_struct.10379
-                0x00000000200001a8       0x84 Core/Src/stm32746g_discovery_lcd.o
- .bss.Timing    0x000000002000022c       0x1c Core/Src/stm32746g_discovery_sdram.o
- .bss.Command   0x0000000020000248       0x10 Core/Src/stm32746g_discovery_sdram.o
- .bss.dma_handle.9828
-                0x0000000020000258       0x60 Core/Src/stm32746g_discovery_sdram.o
- .bss.tsDriver  0x00000000200002b8        0x4 Core/Src/stm32746g_discovery_ts.o
- .bss.tsXBoundary
-                0x00000000200002bc        0x2 Core/Src/stm32746g_discovery_ts.o
- .bss.tsYBoundary
-                0x00000000200002be        0x2 Core/Src/stm32746g_discovery_ts.o
- .bss.tsOrientation
-                0x00000000200002c0        0x1 Core/Src/stm32746g_discovery_ts.o
- .bss.I2cAddress
-                0x00000000200002c1        0x1 Core/Src/stm32746g_discovery_ts.o
- *fill*         0x00000000200002c2        0x2 
- .bss._x.9944   0x00000000200002c4       0x14 Core/Src/stm32746g_discovery_ts.o
- .bss._y.9945   0x00000000200002d8       0x14 Core/Src/stm32746g_discovery_ts.o
- .bss.FMC_Initialized
-                0x00000000200002ec        0x4 Core/Src/stm32f7xx_hal_msp.o
- .bss.__sbrk_heap_end
-                0x00000000200002f0        0x4 Core/Src/sysmem.o
- .bss.pxCurrentTCB
-                0x00000000200002f4        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-                0x00000000200002f4                pxCurrentTCB
- .bss.pxReadyTasksLists
-                0x00000000200002f8       0x8c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.xDelayedTaskList1
-                0x0000000020000384       0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.xDelayedTaskList2
-                0x0000000020000398       0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.pxDelayedTaskList
-                0x00000000200003ac        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.pxOverflowDelayedTaskList
-                0x00000000200003b0        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.xPendingReadyList
-                0x00000000200003b4       0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.xTasksWaitingTermination
-                0x00000000200003c8       0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.xSuspendedTaskList
-                0x00000000200003dc       0x14 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.uxCurrentNumberOfTasks
-                0x00000000200003f0        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.xTickCount
-                0x00000000200003f4        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.uxTopReadyPriority
-                0x00000000200003f8        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.xSchedulerRunning
-                0x00000000200003fc        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.uxPendedTicks
-                0x0000000020000400        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.xYieldPending
-                0x0000000020000404        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.xNumOfOverflows
-                0x0000000020000408        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.uxTaskNumber
-                0x000000002000040c        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.xNextTaskUnblockTime
-                0x0000000020000410        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.uxSchedulerSuspended
-                0x0000000020000414        0x4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .bss.ucHeap    0x0000000020000418     0x8000 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .bss.xStart    0x0000000020008418        0x8 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .bss.pxEnd     0x0000000020008420        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .bss.xFreeBytesRemaining
-                0x0000000020008424        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .bss.xMinimumEverFreeBytesRemaining
-                0x0000000020008428        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .bss.xBlockAllocatedBit
-                0x000000002000842c        0x4 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .bss.__malloc_free_list
-                0x0000000020008430        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-mallocr.o)
-                0x0000000020008430                __malloc_free_list
- .bss.__malloc_sbrk_start
-                0x0000000020008434        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-mallocr.o)
-                0x0000000020008434                __malloc_sbrk_start
- *(COMMON)
- COMMON         0x0000000020008438      0x5a0 Core/Src/main.o
-                0x0000000020008438                defaultTaskHandle
-                0x000000002000843c                hi2c3
-                0x0000000020008488                hspi2
-                0x00000000200084ec                huart7
-                0x000000002000856c                htim8
-                0x00000000200085ac                hi2c1
-                0x00000000200085f8                htim5
-                0x0000000020008638                htim3
-                0x0000000020008678                hltdc
-                0x0000000020008720                hadc1
-                0x0000000020008768                hadc3
-                0x00000000200087b0                huart1
-                0x0000000020008830                hdac
-                0x0000000020008844                hrtc
-                0x0000000020008864                htim1
-                0x00000000200088a4                huart6
-                0x0000000020008924                hdma2d
-                0x0000000020008964                htim2
-                0x00000000200089a4                hsdram1
- COMMON         0x00000000200089d8       0xa8 Core/Src/stm32746g_discovery_lcd.o
-                0x00000000200089d8                hLtdcHandler
- COMMON         0x0000000020008a80       0x34 Core/Src/stm32746g_discovery_sdram.o
-                0x0000000020008a80                sdramHandle
- COMMON         0x0000000020008ab4       0x40 Core/Src/stm32f7xx_hal_timebase_tim.o
-                0x0000000020008ab4                htim6
- COMMON         0x0000000020008af4        0x4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
-                0x0000000020008af4                uwTick
- COMMON         0x0000000020008af8        0x4 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-reent.o)
-                0x0000000020008af8                errno
-                0x0000000020008afc                . = ALIGN (0x4)
-                0x0000000020008afc                _ebss = .
-                0x0000000020008afc                __bss_end__ = _ebss
-
-._user_heap_stack
-                0x0000000020008afc      0x604 load address 0x000000000800e484
-                0x0000000020008b00                . = ALIGN (0x8)
- *fill*         0x0000000020008afc        0x4 
-                [!provide]                        PROVIDE (end = .)
-                0x0000000020008b00                PROVIDE (_end = .)
-                0x0000000020008d00                . = (. + _Min_Heap_Size)
- *fill*         0x0000000020008b00      0x200 
-                0x0000000020009100                . = (. + _Min_Stack_Size)
- *fill*         0x0000000020008d00      0x400 
-                0x0000000020009100                . = ALIGN (0x8)
-
-/DISCARD/
- libc.a(*)
- libm.a(*)
- libgcc.a(*)
-
-.ARM.attributes
-                0x0000000000000000       0x30
- *(.ARM.attributes)
- .ARM.attributes
-                0x0000000000000000       0x22 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crti.o
- .ARM.attributes
-                0x0000000000000022       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtbegin.o
- .ARM.attributes
-                0x0000000000000056       0x39 Core/Src/freertos.o
- .ARM.attributes
-                0x000000000000008f       0x39 Core/Src/ft5336.o
- .ARM.attributes
-                0x00000000000000c8       0x39 Core/Src/main.o
- .ARM.attributes
-                0x0000000000000101       0x39 Core/Src/stm32746g_discovery.o
- .ARM.attributes
-                0x000000000000013a       0x39 Core/Src/stm32746g_discovery_lcd.o
- .ARM.attributes
-                0x0000000000000173       0x39 Core/Src/stm32746g_discovery_sdram.o
- .ARM.attributes
-                0x00000000000001ac       0x39 Core/Src/stm32746g_discovery_ts.o
- .ARM.attributes
-                0x00000000000001e5       0x39 Core/Src/stm32f7xx_hal_msp.o
- .ARM.attributes
-                0x000000000000021e       0x39 Core/Src/stm32f7xx_hal_timebase_tim.o
- .ARM.attributes
-                0x0000000000000257       0x39 Core/Src/stm32f7xx_it.o
- .ARM.attributes
-                0x0000000000000290       0x39 Core/Src/sysmem.o
- .ARM.attributes
-                0x00000000000002c9       0x39 Core/Src/system_stm32f7xx.o
- .ARM.attributes
-                0x0000000000000302       0x21 Core/Startup/startup_stm32f746nghx.o
- .ARM.attributes
-                0x0000000000000323       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .ARM.attributes
-                0x000000000000035c       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .ARM.attributes
-                0x0000000000000395       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .ARM.attributes
-                0x00000000000003ce       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .ARM.attributes
-                0x0000000000000407       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .ARM.attributes
-                0x0000000000000440       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .ARM.attributes
-                0x0000000000000479       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .ARM.attributes
-                0x00000000000004b2       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .ARM.attributes
-                0x00000000000004eb       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .ARM.attributes
-                0x0000000000000524       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .ARM.attributes
-                0x000000000000055d       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .ARM.attributes
-                0x0000000000000596       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .ARM.attributes
-                0x00000000000005cf       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .ARM.attributes
-                0x0000000000000608       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .ARM.attributes
-                0x0000000000000641       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .ARM.attributes
-                0x000000000000067a       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .ARM.attributes
-                0x00000000000006b3       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .ARM.attributes
-                0x00000000000006ec       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .ARM.attributes
-                0x0000000000000725       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .ARM.attributes
-                0x000000000000075e       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .ARM.attributes
-                0x0000000000000797       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .ARM.attributes
-                0x00000000000007d0       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .ARM.attributes
-                0x0000000000000809       0x39 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .ARM.attributes
-                0x0000000000000842       0x39 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .ARM.attributes
-                0x000000000000087b       0x39 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .ARM.attributes
-                0x00000000000008b4       0x39 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .ARM.attributes
-                0x00000000000008ed       0x39 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .ARM.attributes
-                0x0000000000000926       0x39 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .ARM.attributes
-                0x000000000000095f       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-errno.o)
- .ARM.attributes
-                0x0000000000000993       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-impure.o)
- .ARM.attributes
-                0x00000000000009c7       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-init.o)
- .ARM.attributes
-                0x00000000000009fb       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memcpy-stub.o)
- .ARM.attributes
-                0x0000000000000a2f       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memset.o)
- .ARM.attributes
-                0x0000000000000a63       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sprintf.o)
- .ARM.attributes
-                0x0000000000000a97       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o)
- .ARM.attributes
-                0x0000000000000acb       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-vfprintf_i.o)
- .ARM.attributes
-                0x0000000000000aff       0x20 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memchr.o)
- .ARM.attributes
-                0x0000000000000b1f       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memmove.o)
- .ARM.attributes
-                0x0000000000000b53       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-freer.o)
- .ARM.attributes
-                0x0000000000000b87       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-mallocr.o)
- .ARM.attributes
-                0x0000000000000bbb       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-reallocr.o)
- .ARM.attributes
-                0x0000000000000bef       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sbrkr.o)
- .ARM.attributes
-                0x0000000000000c23       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-mlock.o)
- .ARM.attributes
-                0x0000000000000c57       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-msizer.o)
- .ARM.attributes
-                0x0000000000000c8b       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-reent.o)
- .ARM.attributes
-                0x0000000000000cbf       0x22 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_aeabi_uldivmod.o)
- .ARM.attributes
-                0x0000000000000ce1       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_udivmoddi4.o)
- .ARM.attributes
-                0x0000000000000d15       0x22 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_dvmd_tls.o)
- .ARM.attributes
-                0x0000000000000d37       0x22 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/crtn.o
-OUTPUT(prog_demo_2021.elf elf32-littlearm)
-
-.debug_info     0x0000000000000000    0x29de5
- .debug_info    0x0000000000000000      0x3c1 Core/Src/freertos.o
- .debug_info    0x00000000000003c1      0x591 Core/Src/ft5336.o
- .debug_info    0x0000000000000952     0x3b6b Core/Src/main.o
- .debug_info    0x00000000000044bd     0x19bb Core/Src/stm32746g_discovery.o
- .debug_info    0x0000000000005e78     0x2264 Core/Src/stm32746g_discovery_lcd.o
- .debug_info    0x00000000000080dc      0xf1e Core/Src/stm32746g_discovery_sdram.o
- .debug_info    0x0000000000008ffa      0x9dd Core/Src/stm32746g_discovery_ts.o
- .debug_info    0x00000000000099d7     0x2ae9 Core/Src/stm32f7xx_hal_msp.o
- .debug_info    0x000000000000c4c0      0xbe7 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_info    0x000000000000d0a7      0xbdf Core/Src/stm32f7xx_it.o
- .debug_info    0x000000000000dc86      0x985 Core/Src/sysmem.o
- .debug_info    0x000000000000e60b      0x73d Core/Src/system_stm32f7xx.o
- .debug_info    0x000000000000ed48       0x22 Core/Startup/startup_stm32f746nghx.o
- .debug_info    0x000000000000ed6a      0x9d3 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_info    0x000000000000f73d      0xc9d Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_info    0x00000000000103da     0x104a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_info    0x0000000000011424      0xa3a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_info    0x0000000000011e5e      0x7c0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_info    0x000000000001261e      0x968 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_info    0x0000000000012f86      0xee9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_info    0x0000000000013e6f      0x7dc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_info    0x000000000001464b     0x1fb9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_info    0x0000000000016604      0x738 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_info    0x0000000000016d3c     0x1104 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_info    0x0000000000017e40      0x9b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_info    0x00000000000187f4      0x96b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_info    0x000000000001915f      0x935 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_info    0x0000000000019a94      0x7ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_info    0x000000000001a241      0xc56 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_info    0x000000000001ae97      0xff7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_info    0x000000000001be8e      0xca1 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_info    0x000000000001cb2f     0x166a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_info    0x000000000001e199     0x25a2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_info    0x000000000002073b     0x121c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_info    0x0000000000021957     0x16d1 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_info    0x0000000000023028      0xccd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_info    0x0000000000023cf5     0x1ea9 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_info    0x0000000000025b9e      0xacb Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_info    0x0000000000026669     0x2699 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_info    0x0000000000028d02      0x4e4 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_info    0x00000000000291e6      0xbff Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
-
-.debug_abbrev   0x0000000000000000     0x51ee
- .debug_abbrev  0x0000000000000000      0x12a Core/Src/freertos.o
- .debug_abbrev  0x000000000000012a      0x1ea Core/Src/ft5336.o
- .debug_abbrev  0x0000000000000314      0x2cd Core/Src/main.o
- .debug_abbrev  0x00000000000005e1      0x287 Core/Src/stm32746g_discovery.o
- .debug_abbrev  0x0000000000000868      0x298 Core/Src/stm32746g_discovery_lcd.o
- .debug_abbrev  0x0000000000000b00      0x218 Core/Src/stm32746g_discovery_sdram.o
- .debug_abbrev  0x0000000000000d18      0x22b Core/Src/stm32746g_discovery_ts.o
- .debug_abbrev  0x0000000000000f43      0x24d Core/Src/stm32f7xx_hal_msp.o
- .debug_abbrev  0x0000000000001190      0x19d Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_abbrev  0x000000000000132d      0x169 Core/Src/stm32f7xx_it.o
- .debug_abbrev  0x0000000000001496      0x19b Core/Src/sysmem.o
- .debug_abbrev  0x0000000000001631      0x147 Core/Src/system_stm32f7xx.o
- .debug_abbrev  0x0000000000001778       0x12 Core/Startup/startup_stm32f746nghx.o
- .debug_abbrev  0x000000000000178a      0x1c7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_abbrev  0x0000000000001951      0x205 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_abbrev  0x0000000000001b56      0x2fa Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_abbrev  0x0000000000001e50      0x1e4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_abbrev  0x0000000000002034      0x1e8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_abbrev  0x000000000000221c      0x229 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_abbrev  0x0000000000002445      0x211 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_abbrev  0x0000000000002656      0x1c9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_abbrev  0x000000000000281f      0x22a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_abbrev  0x0000000000002a49      0x178 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_abbrev  0x0000000000002bc1      0x209 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_abbrev  0x0000000000002dca      0x1b6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_abbrev  0x0000000000002f80      0x1b8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_abbrev  0x0000000000003138      0x21a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_abbrev  0x0000000000003352      0x1ad Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_abbrev  0x00000000000034ff      0x1be Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_abbrev  0x00000000000036bd      0x1e9 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_abbrev  0x00000000000038a6      0x1f7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_abbrev  0x0000000000003a9d      0x228 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_abbrev  0x0000000000003cc5      0x230 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_abbrev  0x0000000000003ef5      0x21e Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_abbrev  0x0000000000004113      0x205 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_abbrev  0x0000000000004318      0x170 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_abbrev  0x0000000000004488      0x379 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_abbrev  0x0000000000004801      0x1cf Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_abbrev  0x00000000000049d0      0x349 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_abbrev  0x0000000000004d19      0x21b Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_abbrev  0x0000000000004f34      0x2ba Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
-
-.debug_aranges  0x0000000000000000     0x2490
- .debug_aranges
-                0x0000000000000000       0x38 Core/Src/freertos.o
- .debug_aranges
-                0x0000000000000038       0x90 Core/Src/ft5336.o
- .debug_aranges
-                0x00000000000000c8       0xd8 Core/Src/main.o
- .debug_aranges
-                0x00000000000001a0      0x128 Core/Src/stm32746g_discovery.o
- .debug_aranges
-                0x00000000000002c8      0x1d8 Core/Src/stm32746g_discovery_lcd.o
- .debug_aranges
-                0x00000000000004a0       0x68 Core/Src/stm32746g_discovery_sdram.o
- .debug_aranges
-                0x0000000000000508       0x58 Core/Src/stm32746g_discovery_ts.o
- .debug_aranges
-                0x0000000000000560       0xd8 Core/Src/stm32f7xx_hal_msp.o
- .debug_aranges
-                0x0000000000000638       0x30 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_aranges
-                0x0000000000000668       0x58 Core/Src/stm32f7xx_it.o
- .debug_aranges
-                0x00000000000006c0       0x20 Core/Src/sysmem.o
- .debug_aranges
-                0x00000000000006e0       0x28 Core/Src/system_stm32f7xx.o
- .debug_aranges
-                0x0000000000000708       0x28 Core/Startup/startup_stm32f746nghx.o
- .debug_aranges
-                0x0000000000000730      0x100 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_aranges
-                0x0000000000000830       0xe8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_aranges
-                0x0000000000000918      0x118 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_aranges
-                0x0000000000000a30       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_aranges
-                0x0000000000000af0       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_aranges
-                0x0000000000000b60       0x90 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_aranges
-                0x0000000000000bf0      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_aranges
-                0x0000000000000cf8       0x58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_aranges
-                0x0000000000000d50      0x288 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_aranges
-                0x0000000000000fd8       0x28 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_aranges
-                0x0000000000001000      0x158 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_aranges
-                0x0000000000001158       0xa0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_aranges
-                0x00000000000011f8       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_aranges
-                0x0000000000001278       0x88 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_aranges
-                0x0000000000001300       0x50 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_aranges
-                0x0000000000001350       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_aranges
-                0x0000000000001408      0x140 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_aranges
-                0x0000000000001548       0xd0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_aranges
-                0x0000000000001618      0x1d8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_aranges
-                0x00000000000017f0      0x3b8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_aranges
-                0x0000000000001ba8      0x160 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_aranges
-                0x0000000000001d08      0x210 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_aranges
-                0x0000000000001f18       0xc8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_aranges
-                0x0000000000001fe0      0x1d8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_aranges
-                0x00000000000021b8       0x40 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_aranges
-                0x00000000000021f8      0x1c8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_aranges
-                0x00000000000023c0       0x80 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_aranges
-                0x0000000000002440       0x50 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
-
-.debug_ranges   0x0000000000000000     0x2208
- .debug_ranges  0x0000000000000000       0x28 Core/Src/freertos.o
- .debug_ranges  0x0000000000000028       0x80 Core/Src/ft5336.o
- .debug_ranges  0x00000000000000a8       0xc8 Core/Src/main.o
- .debug_ranges  0x0000000000000170      0x118 Core/Src/stm32746g_discovery.o
- .debug_ranges  0x0000000000000288      0x1c8 Core/Src/stm32746g_discovery_lcd.o
- .debug_ranges  0x0000000000000450       0x58 Core/Src/stm32746g_discovery_sdram.o
- .debug_ranges  0x00000000000004a8       0x48 Core/Src/stm32746g_discovery_ts.o
- .debug_ranges  0x00000000000004f0       0xc8 Core/Src/stm32f7xx_hal_msp.o
- .debug_ranges  0x00000000000005b8       0x20 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_ranges  0x00000000000005d8       0x48 Core/Src/stm32f7xx_it.o
- .debug_ranges  0x0000000000000620       0x10 Core/Src/sysmem.o
- .debug_ranges  0x0000000000000630       0x18 Core/Src/system_stm32f7xx.o
- .debug_ranges  0x0000000000000648       0x20 Core/Startup/startup_stm32f746nghx.o
- .debug_ranges  0x0000000000000668       0xf0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_ranges  0x0000000000000758       0xd8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_ranges  0x0000000000000830      0x108 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_ranges  0x0000000000000938       0xb0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_ranges  0x00000000000009e8       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_ranges  0x0000000000000a48       0x80 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_ranges  0x0000000000000ac8       0xf8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_ranges  0x0000000000000bc0       0x48 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_ranges  0x0000000000000c08      0x278 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_ranges  0x0000000000000e80       0x18 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_ranges  0x0000000000000e98      0x148 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_ranges  0x0000000000000fe0       0x90 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_ranges  0x0000000000001070       0x70 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_ranges  0x00000000000010e0       0x78 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_ranges  0x0000000000001158       0x40 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_ranges  0x0000000000001198       0xa8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_ranges  0x0000000000001240      0x130 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_ranges  0x0000000000001370       0xc0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_ranges  0x0000000000001430      0x1c8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_ranges  0x00000000000015f8      0x3a8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_ranges  0x00000000000019a0      0x150 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_ranges  0x0000000000001af0      0x200 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_ranges  0x0000000000001cf0       0xb8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_ranges  0x0000000000001da8      0x1c8 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_ranges  0x0000000000001f70       0x30 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_ranges  0x0000000000001fa0      0x1b8 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_ranges  0x0000000000002158       0x70 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_ranges  0x00000000000021c8       0x40 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
-
-.debug_macro    0x0000000000000000    0x2df43
- .debug_macro   0x0000000000000000      0x2f9 Core/Src/freertos.o
- .debug_macro   0x00000000000002f9      0xa5a Core/Src/freertos.o
- .debug_macro   0x0000000000000d53      0x174 Core/Src/freertos.o
- .debug_macro   0x0000000000000ec7       0x22 Core/Src/freertos.o
- .debug_macro   0x0000000000000ee9       0x8e Core/Src/freertos.o
- .debug_macro   0x0000000000000f77       0x51 Core/Src/freertos.o
- .debug_macro   0x0000000000000fc8       0xef Core/Src/freertos.o
- .debug_macro   0x00000000000010b7       0x6a Core/Src/freertos.o
- .debug_macro   0x0000000000001121      0x1df Core/Src/freertos.o
- .debug_macro   0x0000000000001300      0x109 Core/Src/freertos.o
- .debug_macro   0x0000000000001409      0x15a Core/Src/freertos.o
- .debug_macro   0x0000000000001563       0xde Core/Src/freertos.o
- .debug_macro   0x0000000000001641       0x1c Core/Src/freertos.o
- .debug_macro   0x000000000000165d       0x26 Core/Src/freertos.o
- .debug_macro   0x0000000000001683      0x4c5 Core/Src/freertos.o
- .debug_macro   0x0000000000001b48       0xb5 Core/Src/freertos.o
- .debug_macro   0x0000000000001bfd       0xaa Core/Src/freertos.o
- .debug_macro   0x0000000000001ca7      0x2bd Core/Src/freertos.o
- .debug_macro   0x0000000000001f64       0x2e Core/Src/freertos.o
- .debug_macro   0x0000000000001f92       0x3b Core/Src/freertos.o
- .debug_macro   0x0000000000001fcd       0x1c Core/Src/freertos.o
- .debug_macro   0x0000000000001fe9       0x22 Core/Src/freertos.o
- .debug_macro   0x000000000000200b       0xdf Core/Src/freertos.o
- .debug_macro   0x00000000000020ea     0x12cd Core/Src/freertos.o
- .debug_macro   0x00000000000033b7      0x11f Core/Src/freertos.o
- .debug_macro   0x00000000000034d6       0x19 Core/Src/freertos.o
- .debug_macro   0x00000000000034ef    0x190f0 Core/Src/freertos.o
- .debug_macro   0x000000000001c5df       0x43 Core/Src/freertos.o
- .debug_macro   0x000000000001c622     0x36b4 Core/Src/freertos.o
- .debug_macro   0x000000000001fcd6       0x61 Core/Src/freertos.o
- .debug_macro   0x000000000001fd37     0x18ad Core/Src/freertos.o
- .debug_macro   0x00000000000215e4      0x6c4 Core/Src/freertos.o
- .debug_macro   0x0000000000021ca8      0x185 Core/Src/freertos.o
- .debug_macro   0x0000000000021e2d      0x117 Core/Src/freertos.o
- .debug_macro   0x0000000000021f44      0x1fe Core/Src/freertos.o
- .debug_macro   0x0000000000022142       0x27 Core/Src/freertos.o
- .debug_macro   0x0000000000022169      0x24f Core/Src/freertos.o
- .debug_macro   0x00000000000223b8       0x41 Core/Src/freertos.o
- .debug_macro   0x00000000000223f9       0x58 Core/Src/freertos.o
- .debug_macro   0x0000000000022451      0x236 Core/Src/freertos.o
- .debug_macro   0x0000000000022687      0x416 Core/Src/freertos.o
- .debug_macro   0x0000000000022a9d      0x153 Core/Src/freertos.o
- .debug_macro   0x0000000000022bf0      0x107 Core/Src/freertos.o
- .debug_macro   0x0000000000022cf7      0x20f Core/Src/freertos.o
- .debug_macro   0x0000000000022f06       0xea Core/Src/freertos.o
- .debug_macro   0x0000000000022ff0       0xa0 Core/Src/freertos.o
- .debug_macro   0x0000000000023090       0x3c Core/Src/freertos.o
- .debug_macro   0x00000000000230cc      0x14f Core/Src/freertos.o
- .debug_macro   0x000000000002321b      0x25b Core/Src/freertos.o
- .debug_macro   0x0000000000023476       0x12 Core/Src/freertos.o
- .debug_macro   0x0000000000023488      0x514 Core/Src/freertos.o
- .debug_macro   0x000000000002399c      0x22c Core/Src/freertos.o
- .debug_macro   0x0000000000023bc8       0x5a Core/Src/freertos.o
- .debug_macro   0x0000000000023c22       0xa5 Core/Src/freertos.o
- .debug_macro   0x0000000000023cc7      0x198 Core/Src/freertos.o
- .debug_macro   0x0000000000023e5f       0xd6 Core/Src/freertos.o
- .debug_macro   0x0000000000023f35      0x12f Core/Src/freertos.o
- .debug_macro   0x0000000000024064      0x108 Core/Src/freertos.o
- .debug_macro   0x000000000002416c       0x35 Core/Src/freertos.o
- .debug_macro   0x00000000000241a1      0x313 Core/Src/freertos.o
- .debug_macro   0x00000000000244b4      0x4ca Core/Src/freertos.o
- .debug_macro   0x000000000002497e       0xd6 Core/Src/freertos.o
- .debug_macro   0x0000000000024a54      0x2fe Core/Src/freertos.o
- .debug_macro   0x0000000000024d52      0xa2f Core/Src/freertos.o
- .debug_macro   0x0000000000025781       0x59 Core/Src/freertos.o
- .debug_macro   0x00000000000257da      0x53c Core/Src/freertos.o
- .debug_macro   0x0000000000025d16       0x44 Core/Src/freertos.o
- .debug_macro   0x0000000000025d5a      0x14e Core/Src/freertos.o
- .debug_macro   0x0000000000025ea8      0x3f9 Core/Src/freertos.o
- .debug_macro   0x00000000000262a1       0x7b Core/Src/ft5336.o
- .debug_macro   0x000000000002631c       0x10 Core/Src/ft5336.o
- .debug_macro   0x000000000002632c      0x39f Core/Src/ft5336.o
- .debug_macro   0x00000000000266cb      0x4f4 Core/Src/main.o
- .debug_macro   0x0000000000026bbf      0x109 Core/Src/main.o
- .debug_macro   0x0000000000026cc8       0x91 Core/Src/main.o
- .debug_macro   0x0000000000026d59       0x8d Core/Src/main.o
- .debug_macro   0x0000000000026de6       0x9a Core/Src/main.o
- .debug_macro   0x0000000000026e80       0x19 Core/Src/main.o
- .debug_macro   0x0000000000026e99       0xf2 Core/Src/main.o
- .debug_macro   0x0000000000026f8b       0x40 Core/Src/main.o
- .debug_macro   0x0000000000026fcb       0xa0 Core/Src/main.o
- .debug_macro   0x000000000002706b      0x268 Core/Src/main.o
- .debug_macro   0x00000000000272d3       0x10 Core/Src/main.o
- .debug_macro   0x00000000000272e3      0x12a Core/Src/main.o
- .debug_macro   0x000000000002740d       0x2e Core/Src/main.o
- .debug_macro   0x000000000002743b       0x46 Core/Src/main.o
- .debug_macro   0x0000000000027481       0x18 Core/Src/main.o
- .debug_macro   0x0000000000027499       0x3c Core/Src/main.o
- .debug_macro   0x00000000000274d5       0x34 Core/Src/main.o
- .debug_macro   0x0000000000027509       0x16 Core/Src/main.o
- .debug_macro   0x000000000002751f       0x35 Core/Src/main.o
- .debug_macro   0x0000000000027554      0x32a Core/Src/main.o
- .debug_macro   0x000000000002787e       0x10 Core/Src/main.o
- .debug_macro   0x000000000002788e       0x52 Core/Src/main.o
- .debug_macro   0x00000000000278e0       0x1f Core/Src/main.o
- .debug_macro   0x00000000000278ff       0x43 Core/Src/main.o
- .debug_macro   0x0000000000027942       0x20 Core/Src/main.o
- .debug_macro   0x0000000000027962      0x1a3 Core/Src/main.o
- .debug_macro   0x0000000000027b05       0x10 Core/Src/main.o
- .debug_macro   0x0000000000027b15       0x1c Core/Src/main.o
- .debug_macro   0x0000000000027b31       0x52 Core/Src/main.o
- .debug_macro   0x0000000000027b83       0x40 Core/Src/main.o
- .debug_macro   0x0000000000027bc3       0x10 Core/Src/main.o
- .debug_macro   0x0000000000027bd3       0x40 Core/Src/main.o
- .debug_macro   0x0000000000027c13       0xd7 Core/Src/main.o
- .debug_macro   0x0000000000027cea       0x1c Core/Src/main.o
- .debug_macro   0x0000000000027d06       0x3d Core/Src/main.o
- .debug_macro   0x0000000000027d43       0x16 Core/Src/main.o
- .debug_macro   0x0000000000027d59      0x145 Core/Src/main.o
- .debug_macro   0x0000000000027e9e      0x2af Core/Src/stm32746g_discovery.o
- .debug_macro   0x000000000002814d      0x262 Core/Src/stm32746g_discovery.o
- .debug_macro   0x00000000000283af      0x2e9 Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000028698       0x9a Core/Src/stm32746g_discovery_lcd.o
- .debug_macro   0x0000000000028732      0x291 Core/Src/stm32746g_discovery_sdram.o
- .debug_macro   0x00000000000289c3      0x2b8 Core/Src/stm32746g_discovery_ts.o
- .debug_macro   0x0000000000028c7b      0x291 Core/Src/stm32f7xx_hal_msp.o
- .debug_macro   0x0000000000028f0c      0x282 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_macro   0x000000000002918e      0x29b Core/Src/stm32f7xx_it.o
- .debug_macro   0x0000000000029429       0xee Core/Src/sysmem.o
- .debug_macro   0x0000000000029517      0x23b Core/Src/sysmem.o
- .debug_macro   0x0000000000029752      0x288 Core/Src/system_stm32f7xx.o
- .debug_macro   0x00000000000299da      0x2a6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_macro   0x0000000000029c80      0x283 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_macro   0x0000000000029f03      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_macro   0x000000000002a185      0x283 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_macro   0x000000000002a408      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_macro   0x000000000002a68a      0x288 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_macro   0x000000000002a912      0x291 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_macro   0x000000000002aba3      0x2b8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_macro   0x000000000002ae5b      0x347 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_macro   0x000000000002b1a2      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_macro   0x000000000002b424      0x283 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_macro   0x000000000002b6a7      0x2a0 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_macro   0x000000000002b947      0x29a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_macro   0x000000000002bbe1      0x2a6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_macro   0x000000000002be87      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_macro   0x000000000002c109      0x283 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_macro   0x000000000002c38c      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_macro   0x000000000002c60e      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_macro   0x000000000002c890      0x28a Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_macro   0x000000000002cb1a      0x283 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_macro   0x000000000002cd9d      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_macro   0x000000000002d01f      0x29f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_macro   0x000000000002d2be      0x282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_macro   0x000000000002d540      0x1f1 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x000000000002d731       0x10 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x000000000002d741       0x20 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x000000000002d761       0xc7 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_macro   0x000000000002d828      0x17a Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x000000000002d9a2      0x26c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x000000000002dc0e       0x10 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x000000000002dc1e      0x184 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_macro   0x000000000002dda2      0x1a1 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
-
-.debug_line     0x0000000000000000    0x1dc92
- .debug_line    0x0000000000000000      0x93d Core/Src/freertos.o
- .debug_line    0x000000000000093d      0x525 Core/Src/ft5336.o
- .debug_line    0x0000000000000e62     0x1015 Core/Src/main.o
- .debug_line    0x0000000000001e77      0xb16 Core/Src/stm32746g_discovery.o
- .debug_line    0x000000000000298d      0xf7e Core/Src/stm32746g_discovery_lcd.o
- .debug_line    0x000000000000390b      0x92d Core/Src/stm32746g_discovery_sdram.o
- .debug_line    0x0000000000004238      0x98d Core/Src/stm32746g_discovery_ts.o
- .debug_line    0x0000000000004bc5      0xb0c Core/Src/stm32f7xx_hal_msp.o
- .debug_line    0x00000000000056d1      0x83b Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_line    0x0000000000005f0c      0x8a0 Core/Src/stm32f7xx_it.o
- .debug_line    0x00000000000067ac      0x49a Core/Src/sysmem.o
- .debug_line    0x0000000000006c46      0x820 Core/Src/system_stm32f7xx.o
- .debug_line    0x0000000000007466       0x85 Core/Startup/startup_stm32f746nghx.o
- .debug_line    0x00000000000074eb      0xa2f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_line    0x0000000000007f1a      0xc58 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_line    0x0000000000008b72      0xb30 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_line    0x00000000000096a2      0xa60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_line    0x000000000000a102      0x923 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_line    0x000000000000aa25      0xadb Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_line    0x000000000000b500      0xd68 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_line    0x000000000000c268      0xa14 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_line    0x000000000000cc7c     0x1b8b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_line    0x000000000000e807      0x89f Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_line    0x000000000000f0a6     0x10de Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_line    0x0000000000010184      0x974 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_line    0x0000000000010af8      0x950 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_line    0x0000000000011448      0xaa5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_line    0x0000000000011eed      0xa17 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_line    0x0000000000012904      0xb97 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_line    0x000000000001349b      0xf47 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_line    0x00000000000143e2      0xb63 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_line    0x0000000000014f45     0x1282 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_line    0x00000000000161c7     0x1b4c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_line    0x0000000000017d13      0xeb7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_line    0x0000000000018bca     0x13b6 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_line    0x0000000000019f80      0xab7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_line    0x000000000001aa37      0xca3 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_line    0x000000000001b6da      0x643 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_line    0x000000000001bd1d     0x11f1 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_line    0x000000000001cf0e      0x659 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_line    0x000000000001d567      0x72b Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
-
-.debug_str      0x0000000000000000   0x114119
- .debug_str     0x0000000000000000    0xfe52f Core/Src/freertos.o
-                                      0xfec4a (size before relaxing)
- .debug_str     0x00000000000fe52f     0x1695 Core/Src/ft5336.o
-                                       0x5304 (size before relaxing)
- .debug_str     0x00000000000ffbc4     0xa3a8 Core/Src/main.o
-                                     0x10a6a6 (size before relaxing)
- .debug_str     0x0000000000109f6c      0xa61 Core/Src/stm32746g_discovery.o
-                                      0xfc3e2 (size before relaxing)
- .debug_str     0x000000000010a9cd      0x858 Core/Src/stm32746g_discovery_lcd.o
-                                      0xfcf08 (size before relaxing)
- .debug_str     0x000000000010b225      0x1a9 Core/Src/stm32746g_discovery_sdram.o
-                                      0xfb0b4 (size before relaxing)
- .debug_str     0x000000000010b3ce      0x160 Core/Src/stm32746g_discovery_ts.o
-                                      0xfced5 (size before relaxing)
- .debug_str     0x000000000010b52e      0x207 Core/Src/stm32f7xx_hal_msp.o
-                                      0xfcb64 (size before relaxing)
- .debug_str     0x000000000010b735       0x98 Core/Src/stm32f7xx_hal_timebase_tim.o
-                                      0xfab04 (size before relaxing)
- .debug_str     0x000000000010b7cd       0xa6 Core/Src/stm32f7xx_it.o
-                                      0xfb5c5 (size before relaxing)
- .debug_str     0x000000000010b873      0x369 Core/Src/sysmem.o
-                                       0x5f69 (size before relaxing)
- .debug_str     0x000000000010bbdc      0x188 Core/Src/system_stm32f7xx.o
-                                      0xfa160 (size before relaxing)
- .debug_str     0x000000000010bd64       0x36 Core/Startup/startup_stm32f746nghx.o
-                                         0x76 (size before relaxing)
- .debug_str     0x000000000010bd9a      0x341 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
-                                      0xfaa12 (size before relaxing)
- .debug_str     0x000000000010c0db      0x281 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
-                                      0xfa603 (size before relaxing)
- .debug_str     0x000000000010c35c      0x375 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
-                                      0xfaab9 (size before relaxing)
- .debug_str     0x000000000010c6d1      0x1bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
-                                      0xfa49e (size before relaxing)
- .debug_str     0x000000000010c88e      0x164 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
-                                      0xfa3ce (size before relaxing)
- .debug_str     0x000000000010c9f2      0x323 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
-                                      0xfa49a (size before relaxing)
- .debug_str     0x000000000010cd15      0x360 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
-                                      0xfa64b (size before relaxing)
- .debug_str     0x000000000010d075      0x244 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
-                                      0xfa336 (size before relaxing)
- .debug_str     0x000000000010d2b9      0xcd4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
-                                      0xfb24e (size before relaxing)
- .debug_str     0x000000000010df8d       0x3b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
-                                      0xfa48a (size before relaxing)
- .debug_str     0x000000000010dfc8      0x406 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
-                                      0xfa6ce (size before relaxing)
- .debug_str     0x000000000010e3ce      0x2c5 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
-                                      0xfa418 (size before relaxing)
- .debug_str     0x000000000010e693      0x1bd Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
-                                      0xfa3da (size before relaxing)
- .debug_str     0x000000000010e850      0x263 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
-                                      0xfa47b (size before relaxing)
- .debug_str     0x000000000010eab3      0x159 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
-                                      0xfa405 (size before relaxing)
- .debug_str     0x000000000010ec0c      0x1ac Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
-                                      0xfa474 (size before relaxing)
- .debug_str     0x000000000010edb8      0x5b2 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
-                                      0xfa801 (size before relaxing)
- .debug_str     0x000000000010f36a      0x254 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
-                                      0xfa66e (size before relaxing)
- .debug_str     0x000000000010f5be      0x557 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
-                                      0xfa91a (size before relaxing)
- .debug_str     0x000000000010fb15      0xc4b Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
-                                      0xfb1ec (size before relaxing)
- .debug_str     0x0000000000110760      0x448 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
-                                      0xfaa3f (size before relaxing)
- .debug_str     0x0000000000110ba8      0x7c7 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
-                                      0xfacbf (size before relaxing)
- .debug_str     0x000000000011136f      0x477 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
-                                      0xfa5be (size before relaxing)
- .debug_str     0x00000000001117e6      0x92b Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
-                                       0xe2cd (size before relaxing)
- .debug_str     0x0000000000112111      0x219 Middlewares/Third_Party/FreeRTOS/Source/list.o
-                                       0xa770 (size before relaxing)
- .debug_str     0x000000000011232a     0x1413 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-                                       0xcbef (size before relaxing)
- .debug_str     0x000000000011373d      0x782 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
-                                       0x84b8 (size before relaxing)
- .debug_str     0x0000000000113ebf      0x25a Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
-                                       0xaf80 (size before relaxing)
-
-.comment        0x0000000000000000       0x7b
- .comment       0x0000000000000000       0x7b Core/Src/freertos.o
-                                         0x7c (size before relaxing)
- .comment       0x000000000000007b       0x7c Core/Src/ft5336.o
- .comment       0x000000000000007b       0x7c Core/Src/main.o
- .comment       0x000000000000007b       0x7c Core/Src/stm32746g_discovery.o
- .comment       0x000000000000007b       0x7c Core/Src/stm32746g_discovery_lcd.o
- .comment       0x000000000000007b       0x7c Core/Src/stm32746g_discovery_sdram.o
- .comment       0x000000000000007b       0x7c Core/Src/stm32746g_discovery_ts.o
- .comment       0x000000000000007b       0x7c Core/Src/stm32f7xx_hal_msp.o
- .comment       0x000000000000007b       0x7c Core/Src/stm32f7xx_hal_timebase_tim.o
- .comment       0x000000000000007b       0x7c Core/Src/stm32f7xx_it.o
- .comment       0x000000000000007b       0x7c Core/Src/sysmem.o
- .comment       0x000000000000007b       0x7c Core/Src/system_stm32f7xx.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .comment       0x000000000000007b       0x7c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .comment       0x000000000000007b       0x7c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .comment       0x000000000000007b       0x7c Middlewares/Third_Party/FreeRTOS/Source/list.o
- .comment       0x000000000000007b       0x7c Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .comment       0x000000000000007b       0x7c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .comment       0x000000000000007b       0x7c Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
-
-.debug_frame    0x0000000000000000     0x9d9c
- .debug_frame   0x0000000000000000       0xa0 Core/Src/freertos.o
- .debug_frame   0x00000000000000a0      0x230 Core/Src/ft5336.o
- .debug_frame   0x00000000000002d0      0x330 Core/Src/main.o
- .debug_frame   0x0000000000000600      0x4b0 Core/Src/stm32746g_discovery.o
- .debug_frame   0x0000000000000ab0      0x840 Core/Src/stm32746g_discovery_lcd.o
- .debug_frame   0x00000000000012f0      0x168 Core/Src/stm32746g_discovery_sdram.o
- .debug_frame   0x0000000000001458      0x124 Core/Src/stm32746g_discovery_ts.o
- .debug_frame   0x000000000000157c      0x380 Core/Src/stm32f7xx_hal_msp.o
- .debug_frame   0x00000000000018fc       0x74 Core/Src/stm32f7xx_hal_timebase_tim.o
- .debug_frame   0x0000000000001970       0xe0 Core/Src/stm32f7xx_it.o
- .debug_frame   0x0000000000001a50       0x34 Core/Src/sysmem.o
- .debug_frame   0x0000000000001a84       0x58 Core/Src/system_stm32f7xx.o
- .debug_frame   0x0000000000001adc      0x3b4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.o
- .debug_frame   0x0000000000001e90      0x3fc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.o
- .debug_frame   0x000000000000228c      0x498 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.o
- .debug_frame   0x0000000000002724      0x338 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac.o
- .debug_frame   0x0000000000002a5c      0x1bc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dac_ex.o
- .debug_frame   0x0000000000002c18      0x250 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.o
- .debug_frame   0x0000000000002e68      0x490 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.o
- .debug_frame   0x00000000000032f8      0x14c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.o
- .debug_frame   0x0000000000003444      0xbbc Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.o
- .debug_frame   0x0000000000004000       0x60 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.o
- .debug_frame   0x0000000000004060      0x61c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.o
- .debug_frame   0x000000000000467c      0x254 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.o
- .debug_frame   0x00000000000048d0      0x1c8 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.o
- .debug_frame   0x0000000000004a98      0x1f4 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.o
- .debug_frame   0x0000000000004c8c      0x118 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.o
- .debug_frame   0x0000000000004da4      0x308 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc.o
- .debug_frame   0x00000000000050ac      0x59c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rtc_ex.o
- .debug_frame   0x0000000000005648      0x37c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.o
- .debug_frame   0x00000000000059c4      0x860 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_spi.o
- .debug_frame   0x0000000000006224     0x1144 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.o
- .debug_frame   0x0000000000007368      0x610 Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.o
- .debug_frame   0x0000000000007978      0x96c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.o
- .debug_frame   0x00000000000082e4      0x37c Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.o
- .debug_frame   0x0000000000008660      0x800 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
- .debug_frame   0x0000000000008e60       0xd8 Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_frame   0x0000000000008f38      0x7c4 Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_frame   0x00000000000096fc      0x1a8 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.o
- .debug_frame   0x00000000000098a4      0x108 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
- .debug_frame   0x00000000000099ac       0x20 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-errno.o)
- .debug_frame   0x00000000000099cc       0x2c /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-init.o)
- .debug_frame   0x00000000000099f8       0x28 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memcpy-stub.o)
- .debug_frame   0x0000000000009a20       0x20 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memset.o)
- .debug_frame   0x0000000000009a40       0x6c /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sprintf.o)
- .debug_frame   0x0000000000009aac       0x90 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-svfprintf.o)
- .debug_frame   0x0000000000009b3c       0x60 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-vfprintf_i.o)
- .debug_frame   0x0000000000009b9c       0x28 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-memmove.o)
- .debug_frame   0x0000000000009bc4       0x38 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-freer.o)
- .debug_frame   0x0000000000009bfc       0x2c /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-mallocr.o)
- .debug_frame   0x0000000000009c28       0x3c /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-reallocr.o)
- .debug_frame   0x0000000000009c64       0x2c /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-sbrkr.o)
- .debug_frame   0x0000000000009c90       0x30 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-mlock.o)
- .debug_frame   0x0000000000009cc0       0x20 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-nano-msizer.o)
- .debug_frame   0x0000000000009ce0       0x5c /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m/fpv4-sp/hard/libc_nano.a(lib_a-reent.o)
- .debug_frame   0x0000000000009d3c       0x2c /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_aeabi_uldivmod.o)
- .debug_frame   0x0000000000009d68       0x34 /opt/st/stm32cubeide_1.5.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7e-m/fpv4-sp/hard/libgcc.a(_udivmoddi4.o)
diff --git a/Debug/sources.mk b/Debug/sources.mk
index abaec4a..f1f7dec 100644
--- a/Debug/sources.mk
+++ b/Debug/sources.mk
@@ -22,8 +22,18 @@ SUBDIRS := \
 Core/Src \
 Core/Startup \
 Drivers/STM32F7xx_HAL_Driver/Src \
+LWIP/App \
+LWIP/Target \
 Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS \
 Middlewares/Third_Party/FreeRTOS/Source \
 Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1 \
 Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang \
+Middlewares/Third_Party/LwIP/src/api \
+Middlewares/Third_Party/LwIP/src/apps/mqtt \
+Middlewares/Third_Party/LwIP/src/core \
+Middlewares/Third_Party/LwIP/src/core/ipv4 \
+Middlewares/Third_Party/LwIP/src/core/ipv6 \
+Middlewares/Third_Party/LwIP/src/netif \
+Middlewares/Third_Party/LwIP/src/netif/ppp \
+Middlewares/Third_Party/LwIP/system/OS \
 
diff --git a/README.md b/README.md
index 15a2e15..84a2532 100644
--- a/README.md
+++ b/README.md
@@ -6,3 +6,8 @@
 ![Diagramme d'état du domaine](http://www.plantuml.com/plantuml/proxy?cache=no&src=https://raw.githubusercontent.com/EmileClement/Space_Invaders/master/Biblio/UML/threads.puml&fmt=svg)
 
 ### Communication UDP
+
+
+### Jsp pourquoi le read me est cassé
+
+Pour indiquer le joueur, on utilise 1 et pour les méchants on utilise 0.
\ No newline at end of file
diff --git a/Space_Invaders Debug.launch b/Space_Invaders Debug.launch
new file mode 100644
index 0000000..873c394
--- /dev/null
+++ b/Space_Invaders Debug.launch	
@@ -0,0 +1,73 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="com.st.stm32cube.ide.mcu.debug.launch.launchConfigurationType">
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.access_port_id" value="0"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.enable_live_expr" value="true"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.enable_swv" value="false"/>
+<intAttribute key="com.st.stm32cube.ide.mcu.debug.launch.formatVersion" value="2"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.ip_address_local" value="localhost"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.loadList" value="{&quot;fItems&quot;:[{&quot;fIsFromMainTab&quot;:true,&quot;fPath&quot;:&quot;Debug\\Space_Invaders.elf&quot;,&quot;fProjectName&quot;:&quot;Space_Invaders&quot;,&quot;fPerformBuild&quot;:true,&quot;fDownload&quot;:true,&quot;fLoadSymbols&quot;:true}]}"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.override_start_address_mode" value="default"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.remoteCommand" value="target remote"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.startServer" value="true"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.startuptab.exception.divby0" value="true"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.startuptab.exception.unaligned" value="false"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.startuptab.haltonexception" value="true"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swd_mode" value="true"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_port" value="61235"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_trace_div" value="8"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_trace_hclk" value="16000000"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.useRemoteTarget" value="true"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.vector_table" value=""/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.verify_flash_download" value="true"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.cti_allow_halt" value="false"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.cti_signal_halt" value="false"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_external_loader" value="false"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_logging" value="false"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_max_halt_delay" value="false"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_shared_stlink" value="false"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.external_loader" value=""/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.external_loader_init" value="false"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.frequency" value="0"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.halt_all_on_reset" value="false"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.log_file" value="C:\Users\thoma\Desktop\Scolaire\info_indus_s2\Projet\Space_Invaders\Debug\st-link_gdbserver_log.txt"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.low_power_debug" value="enable"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.max_halt_delay" value="2"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.reset_strategy" value="connect_under_reset"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_check_serial_number" value="false"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_txt_serial_number" value=""/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.watchdog_config" value="none"/>
+<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{&quot;fItems&quot;:[{&quot;fDisplayName&quot;:&quot;Reset&quot;,&quot;fIsSuppressible&quot;:false,&quot;fResetAttribute&quot;:&quot;Reset&quot;,&quot;fResetStrategies&quot;:[{&quot;fDisplayName&quot;:&quot;Reset&quot;,&quot;fLaunchAttribute&quot;:&quot;monitor reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset&quot;],&quot;fCmdOptions&quot;:[]},{&quot;fDisplayName&quot;:&quot;None&quot;,&quot;fLaunchAttribute&quot;:&quot;no_reset&quot;,&quot;fGdbCommands&quot;:[],&quot;fCmdOptions&quot;:[]}],&quot;fGdbCommandGroup&quot;:{&quot;name&quot;:&quot;Additional commands&quot;,&quot;commands&quot;:[]}}]}"/>
+<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.swv.swv_wait_for_sync" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="ST-LINK (ST-LINK GDB server)"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="61234"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="remote"/>
+<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug\Space_Invaders.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="Space_Invaders"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1194477200"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/Space_Invaders"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;&#13;&#10;"/>
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/Space_Invaders.ioc b/Space_Invaders.ioc
index 635e612..9822c86 100644
--- a/Space_Invaders.ioc
+++ b/Space_Invaders.ioc
@@ -12,8 +12,10 @@ ADC3.IPParameters=Channel-IN5,Channel-0\#ChannelRegularConversion,Channel-IN4
 ETH.IPParameters=MediaInterface
 ETH.MediaInterface=ETH_MEDIA_INTERFACE_RMII
 FREERTOS.FootprintOK=true
-FREERTOS.IPParameters=Tasks01,configUSE_APPLICATION_TASK_TAG,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configUSE_IDLE_HOOK,configUSE_MALLOC_FAILED_HOOK,configCHECK_FOR_STACK_OVERFLOW,configTOTAL_HEAP_SIZE,FootprintOK
-FREERTOS.Tasks01=GameMaster,0,128,f_GameMaster,Default,NULL,Dynamic,NULL,NULL;Joueur_1,0,128,f_Joueur_1,Default,NULL,Dynamic,NULL,NULL;Block_Enemie,-3,128,f_block_enemie,Default,NULL,Dynamic,NULL,NULL;Projectile,0,128,f_projectile,Default,sens, type,Dynamic,NULL,NULL
+FREERTOS.INCLUDE_vTaskDelayUntil=1
+FREERTOS.IPParameters=Tasks01,configUSE_APPLICATION_TASK_TAG,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configUSE_IDLE_HOOK,configUSE_MALLOC_FAILED_HOOK,configCHECK_FOR_STACK_OVERFLOW,configTOTAL_HEAP_SIZE,FootprintOK,Queues01,INCLUDE_vTaskDelayUntil
+FREERTOS.Queues01=Queue_E,16,uint16_t,0,Dynamic,NULL,NULL;Queue_F,1,uint8_t,0,Dynamic,NULL,NULL;Queue_J,16,uint16_t,0,Dynamic,NULL,NULL;Queue_P,16,uint16_t,0,Dynamic,NULL,NULL;Queue_N,16,uint16_t,0,Dynamic,NULL,NULL
+FREERTOS.Tasks01=GameMaster,0,128,f_GameMaster,Default,NULL,Dynamic,NULL,NULL;Joueur_1,0,128,f_Joueur_1,Default,NULL,Dynamic,NULL,NULL;Block_Enemie,-3,128,f_block_enemie,Default,NULL,Dynamic,NULL,NULL;Projectile,0,128,f_projectile,Default,NULL,Dynamic,Dynamic,NULL
 FREERTOS.configCHECK_FOR_STACK_OVERFLOW=2
 FREERTOS.configTOTAL_HEAP_SIZE=32768
 FREERTOS.configUSE_APPLICATION_TASK_TAG=1
@@ -768,7 +770,7 @@ ProjectManager.StackSize=0x400
 ProjectManager.TargetToolchain=STM32CubeIDE
 ProjectManager.ToolChainLocation=
 ProjectManager.UnderRoot=true
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ADC3_Init-ADC3-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_I2C3_Init-I2C3-false-HAL-true,6-MX_LTDC_Init-LTDC-false-HAL-true,7-MX_RTC_Init-RTC-false-HAL-true,8-MX_SPI2_Init-SPI2-false-HAL-true,9-MX_TIM1_Init-TIM1-false-HAL-true,10-MX_TIM2_Init-TIM2-false-HAL-true,11-MX_TIM3_Init-TIM3-false-HAL-true,12-MX_TIM5_Init-TIM5-false-HAL-true,13-MX_TIM8_Init-TIM8-false-HAL-true,14-MX_USART1_UART_Init-USART1-false-HAL-true,15-MX_USART6_UART_Init-USART6-false-HAL-true,16-MX_ADC1_Init-ADC1-false-HAL-true,17-MX_DAC_Init-DAC-false-HAL-true,18-MX_UART7_Init-UART7-false-HAL-true,19-MX_FMC_Init-FMC-false-HAL-true,20-MX_DMA2D_Init-DMA2D-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ADC3_Init-ADC3-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_I2C3_Init-I2C3-false-HAL-true,6-MX_LTDC_Init-LTDC-false-HAL-true,7-MX_RTC_Init-RTC-false-HAL-true,8-MX_SPI2_Init-SPI2-false-HAL-true,9-MX_TIM1_Init-TIM1-false-HAL-true,10-MX_TIM2_Init-TIM2-false-HAL-true,11-MX_TIM3_Init-TIM3-false-HAL-true,12-MX_TIM5_Init-TIM5-false-HAL-true,13-MX_TIM8_Init-TIM8-false-HAL-true,14-MX_USART1_UART_Init-USART1-false-HAL-true,15-MX_USART6_UART_Init-USART6-false-HAL-true,16-MX_ADC1_Init-ADC1-false-HAL-true,17-MX_DAC_Init-DAC-false-HAL-true,18-MX_UART7_Init-UART7-false-HAL-true,19-MX_FMC_Init-FMC-false-HAL-true,20-MX_DMA2D_Init-DMA2D-false-HAL-true,21-MX_CRC_Init-CRC-false-HAL-true,22-MX_RNG_Init-RNG-false-HAL-true,23-MX_LWIP_Init-LWIP-false-HAL-false,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
 RCC.AHBFreq_Value=200000000
 RCC.APB1CLKDivider=RCC_HCLK_DIV4
 RCC.APB1Freq_Value=50000000